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diff --git a/Readme.md b/Readme.md
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+# 版本记录：
+
+## 2026-04-02									叶阳文
+
+```
+	发布固件：RLY_10V485_V02_20260402.ihex		校验码：0x8FBC2043
+ 	软件版本：V02
+ 	硬件版本：BLV_10V485_V02
+
+	0V-10V温控继电器功能描述：
+        1、设备地址设置为硬件拨码开关地址加上20，如拨码开关为1，实际设备地址为21.
+        2、部分文档中记录数据包校验为和校验，实际主机固件中数据包为和校验取反
+        3、继电器1，2是实体继电器，这两个继电器有状态指示灯。
+        4、继电器3，继电器4，继电器5是低、中、高风速继电器，继电器开时输出电压。
+            注意：当控制多个风速继电器开时，高风速会覆盖低风速，所以如果控制多个风速继电器时，输出电压为高位继电器的电压。
+        5、默认低风速3000mV、中风速6000mV、高风速10000mV、风速停0mV。
+        6、协议使用A9继电器协议，对应前五位继电器。	
+```
+
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+[{
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+ }, {
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+ }, {
+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\FWlib\\apt32f102_gpio.c",
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+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\drivers\\apt32f102.c",
+  "directory": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source",
+  "arguments": ["csky-elfabiv2-gcc", "-nostdlibinc", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include", "-ID:/app/CDK/CSKY/csi/csi_core/csi_cdk/", "-ID:/app/CDK/CSKY/csi/csi_core/include/", "-ID:/app/CDK/CSKY/csi/csi_driver/include/", "-I.", "-ISYSTEM/inc", "-Iinclude", "-include", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache\\macro.h", "-DCONFIG_CSKY_MMU=0", "-U__CSKY_ABIV2__", "-c", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\drivers\\apt32f102.c", "-o", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\drivers\\apt32f102.o"]
+ }, {
+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\drivers\\apt32f102_ck801.c",
+  "directory": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source",
+  "arguments": ["csky-elfabiv2-gcc", "-nostdlibinc", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include", "-ID:/app/CDK/CSKY/csi/csi_core/csi_cdk/", "-ID:/app/CDK/CSKY/csi/csi_core/include/", "-ID:/app/CDK/CSKY/csi/csi_driver/include/", "-I.", "-ISYSTEM/inc", "-Iinclude", "-include", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache\\macro.h", "-DCONFIG_CSKY_MMU=0", "-U__CSKY_ABIV2__", "-c", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\drivers\\apt32f102_ck801.c", "-o", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\drivers\\apt32f102_ck801.o"]
+ }, {
+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\uart.c",
+  "directory": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source",
+  "arguments": ["csky-elfabiv2-gcc", "-nostdlibinc", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include", "-ID:/app/CDK/CSKY/csi/csi_core/csi_cdk/", "-ID:/app/CDK/CSKY/csi/csi_core/include/", "-ID:/app/CDK/CSKY/csi/csi_driver/include/", "-I.", "-ISYSTEM/inc", "-Iinclude", "-include", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache\\macro.h", "-DCONFIG_CSKY_MMU=0", "-U__CSKY_ABIV2__", "-c", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\uart.c", "-o", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\uart.o"]
+ }, {
+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\dip_switch.c",
+  "directory": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source",
+  "arguments": ["csky-elfabiv2-gcc", "-nostdlibinc", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include", "-ID:/app/CDK/CSKY/csi/csi_core/csi_cdk/", "-ID:/app/CDK/CSKY/csi/csi_core/include/", "-ID:/app/CDK/CSKY/csi/csi_driver/include/", "-I.", "-ISYSTEM/inc", "-Iinclude", "-include", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache\\macro.h", "-DCONFIG_CSKY_MMU=0", "-U__CSKY_ABIV2__", "-c", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\dip_switch.c", "-o", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\dip_switch.o"]
+ }, {
+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\control_rly.c",
+  "directory": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source",
+  "arguments": ["csky-elfabiv2-gcc", "-nostdlibinc", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include", "-ID:/app/CDK/CSKY/csi/csi_core/csi_cdk/", "-ID:/app/CDK/CSKY/csi/csi_core/include/", "-ID:/app/CDK/CSKY/csi/csi_driver/include/", "-I.", "-ISYSTEM/inc", "-Iinclude", "-include", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache\\macro.h", "-DCONFIG_CSKY_MMU=0", "-U__CSKY_ABIV2__", "-c", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\control_rly.c", "-o", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\control_rly.o"]
+ }, {
+  "file": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\eeprom.c",
+  "directory": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source",
+  "arguments": ["csky-elfabiv2-gcc", "-nostdlibinc", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "-isystem", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include", "-ID:/app/CDK/CSKY/csi/csi_core/csi_cdk/", "-ID:/app/CDK/CSKY/csi/csi_core/include/", "-ID:/app/CDK/CSKY/csi/csi_driver/include/", "-I.", "-ISYSTEM/inc", "-Iinclude", "-include", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache\\macro.h", "-DCONFIG_CSKY_MMU=0", "-U__CSKY_ABIV2__", "-c", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\eeprom.c", "-o", "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\SYSTEM\\eeprom.o"]
+ }]
\ No newline at end of file
diff --git a/Source/.cache/macro.h b/Source/.cache/macro.h
new file mode 100644
index 0000000..1c2239e
--- /dev/null
+++ b/Source/.cache/macro.h
@@ -0,0 +1,200 @@
+#define __HQ_FBIT__ 15
+#define __SFRACT_IBIT__ 0
+#define __FLT_MIN__ 1.1754943508222875e-38F
+#define __GCC_IEC_559_COMPLEX 0
+#define __UFRACT_MAX__ 0XFFFFP-16UR
+#define __DQ_FBIT__ 63
+#define __ULFRACT_FBIT__ 32
+#define __SACCUM_EPSILON__ 0x1P-7HK
+#define __CK801__ 1
+#define __USQ_IBIT__ 0
+#define __ACCUM_FBIT__ 15
+#define __WINT_MAX__ 0xffffffffU
+#define __USFRACT_FBIT__ 8
+#define __WCHAR_MAX__ 0x7fffffffL
+#define __LACCUM_IBIT__ 32
+#define __DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)
+#define __GCC_ATOMIC_CHAR_LOCK_FREE 1
+#define __GCC_IEC_559 0
+#define __csky_soft_float__ 1
+#define __FLT_EVAL_METHOD__ 0
+#define __LLACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LLK
+#define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 1
+#define __FRACT_FBIT__ 15
+#define __UACCUM_FBIT__ 16
+#define __LFRACT_IBIT__ 0
+#define __LFRACT_MAX__ 0X7FFFFFFFP-31LR
+#define __UINT_FAST8_MAX__ 0xffffffffU
+#define __cskyabi__ 2
+#define __SA_FBIT__ 15
+#define __LDBL_MAX__ 1.7976931348623157e+308L
+#define __FRACT_MAX__ 0X7FFFP-15R
+#define __cskyLE__ 1
+#define __UFRACT_FBIT__ 16
+#define __UFRACT_MIN__ 0.0UR
+#define __GCC_ATOMIC_BOOL_LOCK_FREE 1
+#define __LLFRACT_EPSILON__ 0x1P-63LLR
+#define __CHAR_UNSIGNED__ 1
+#define __UINT32_MAX__ 0xffffffffUL
+#define __ULFRACT_MAX__ 0XFFFFFFFFP-32ULR
+#define __TA_IBIT__ 64
+#define __LDBL_MAX_EXP__ 1024
+#define __WINT_MIN__ 0U
+#define __CSKY_REQUIRED_SCANF__ 1
+#define __ULLFRACT_MIN__ 0.0ULLR
+#define __WCHAR_MIN__ (-__WCHAR_MAX__ - 1)
+#define __GCC_ATOMIC_POINTER_LOCK_FREE 1
+#define __LLACCUM_MIN__ (-0X1P31LLK-0X1P31LLK)
+#define __USACCUM_IBIT__ 8
+#define __LFRACT_MIN__ (-0.5LR-0.5LR)
+#define __HA_IBIT__ 8
+#define __TQ_IBIT__ 0
+#define __FLT_EPSILON__ 1.1920928955078125e-7F
+#define __USFRACT_IBIT__ 0
+#define __LDBL_MIN__ 2.2250738585072014e-308L
+#define __FRACT_MIN__ (-0.5R-0.5R)
+#define __DA_IBIT__ 32
+#define __INT32_MAX__ 0x7fffffffL
+#define __UQQ_FBIT__ 8
+#define __UACCUM_MAX__ 0XFFFFFFFFP-16UK
+#define __DECIMAL_DIG__ 17
+#define __LFRACT_EPSILON__ 0x1P-31LR
+#define __ULFRACT_MIN__ 0.0ULR
+#define __ULACCUM_IBIT__ 32
+#define __UACCUM_EPSILON__ 0x1P-16UK
+#define __GNUC__ 6
+#define __ULLACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULLK
+#define __HQ_IBIT__ 0
+#define __SIZEOF_LONG_DOUBLE__ 8
+#define __BIGGEST_ALIGNMENT__ 4
+#define __DQ_IBIT__ 0
+#define __DBL_MAX__ ((double)1.7976931348623157e+308L)
+#define __ULFRACT_IBIT__ 0
+#define __cskyle__ 1
+#define __ACCUM_IBIT__ 16
+#define __LACCUM_MAX__ 0X7FFFFFFFFFFFFFFFP-31LK
+#define __INT_FAST16_TYPE__ int
+#define __INT_LEAST32_MAX__ 0x7fffffffL
+#define __USING_SJLJ_EXCEPTIONS__ 1
+#define __ACCUM_MAX__ 0X7FFFFFFFP-15K
+#define __USACCUM_EPSILON__ 0x1P-8UHK
+#define __SFRACT_MAX__ 0X7FP-7HR
+#define __FRACT_IBIT__ 0
+#define __UACCUM_MIN__ 0.0UK
+#define __CSKY_SOFT_FLOAT__ 1
+#define __UACCUM_IBIT__ 16
+#define __ULACCUM_MAX__ 0XFFFFFFFFFFFFFFFFP-32ULK
+#define __SIZEOF_WINT_T__ 4
+#define __SA_IBIT__ 16
+#define __ULLACCUM_MIN__ 0.0ULLK
+#define __GXX_ABI_VERSION 1010
+#define __UTA_FBIT__ 64
+#define __USFRACT_MAX__ 0XFFP-8UHR
+#define __UFRACT_IBIT__ 0
+#define __DBL_MIN__ ((double)2.2250738585072014e-308L)
+#define __LACCUM_MIN__ (-0X1P31LK-0X1P31LK)
+#define __ULLACCUM_FBIT__ 32
+#define __ULLFRACT_EPSILON__ 0x1P-64ULLR
+#define __ACCUM_MIN__ (-0X1P15K-0X1P15K)
+#define __SQ_IBIT__ 0
+#define __UHA_FBIT__ 8
+#define __SFRACT_MIN__ (-0.5HR-0.5HR)
+#define __UTQ_FBIT__ 128
+#define __VERSION__ "6.3.0"
+#define __ULLFRACT_FBIT__ 64
+#define __CSKYABIV2__ 1
+#define __ckcore__ 2
+#define __FRACT_EPSILON__ 0x1P-15R
+#define __ULACCUM_MIN__ 0.0ULK
+#define __UDA_FBIT__ 32
+#define __LLACCUM_EPSILON__ 0x1P-31LLK
+#define __GCC_ATOMIC_INT_LOCK_FREE 1
+#define __CSKYABI__ 2
+#define __CSKY_REQUIRED_PRINTF__ 1
+#define __USFRACT_MIN__ 0.0UHR
+#define __UQQ_IBIT__ 0
+#define __CSKYLE__ 1
+#define __INT32_C(c) c ## L
+#define __UHQ_FBIT__ 16
+#define __LLACCUM_FBIT__ 31
+#define __UDQ_FBIT__ 64
+#define __ELF__ 1
+#define __ULFRACT_EPSILON__ 0x1P-32ULR
+#define __LLFRACT_FBIT__ 63
+#define __LDBL_EPSILON__ 2.2204460492503131e-16L
+#define __SACCUM_MAX__ 0X7FFFP-7HK
+#define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 1
+#define __LACCUM_EPSILON__ 0x1P-31LK
+#define __INT_FAST16_MAX__ 0x7fffffff
+#define __USACCUM_MAX__ 0XFFFFP-8UHK
+#define __SFRACT_EPSILON__ 0x1P-7HR
+#define __USA_FBIT__ 16
+#define __UINT_FAST16_TYPE__ unsigned int
+#define __csky_required_scanf__ 1
+#define __SACCUM_FBIT__ 7
+#define __GCC_ATOMIC_LONG_LOCK_FREE 1
+#define __SQ_FBIT__ 31
+#define __INT_FAST8_MAX__ 0x7fffffff
+#define __QQ_FBIT__ 7
+#define __UTA_IBIT__ 64
+#define __LDBL_MANT_DIG__ 53
+#define __SFRACT_FBIT__ 7
+#define __SACCUM_MIN__ (-0X1P7HK-0X1P7HK)
+#define __CKCORE__ 2
+#define __WCHAR_TYPE__ long int
+#define __USQ_FBIT__ 32
+#define __ULLACCUM_IBIT__ 32
+#define __LACCUM_FBIT__ 31
+#define __USACCUM_MIN__ 0.0UHK
+#define __UHA_IBIT__ 8
+#define __UTQ_IBIT__ 0
+#define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 1
+#define __WINT_TYPE__ unsigned int
+#define __ULLFRACT_IBIT__ 0
+#define __LDBL_MIN_EXP__ (-1021)
+#define __UDA_IBIT__ 32
+#define __ck801__ 1
+#define __LFRACT_FBIT__ 31
+#define __LDBL_MAX_10_EXP__ 308
+#define __DBL_EPSILON__ ((double)2.2204460492503131e-16L)
+#define __INT_LEAST32_TYPE__ long int
+#define __SIZEOF_WCHAR_T__ 4
+#define __LLFRACT_MAX__ 0X7FFFFFFFFFFFFFFFP-63LLR
+#define __TQ_FBIT__ 127
+#define __INT_FAST8_TYPE__ int
+#define __ULLACCUM_EPSILON__ 0x1P-32ULLK
+#define __UHQ_IBIT__ 0
+#define __LLACCUM_IBIT__ 32
+#define __TA_FBIT__ 63
+#define __UDQ_IBIT__ 0
+#define __ckcoreLE__ 1
+#define __ACCUM_EPSILON__ 0x1P-15K
+#define __FLT_DENORM_MIN__ 1.4012984643248171e-45F
+#define __LLFRACT_IBIT__ 0
+#define __FLT_MAX__ 3.4028234663852886e+38F
+#define __USACCUM_FBIT__ 8
+#define __INT32_TYPE__ long int
+#define __UFRACT_EPSILON__ 0x1P-16UR
+#define __GNUC_MINOR__ 3
+#define __HA_FBIT__ 7
+#define __LDBL_DENORM_MIN__ 4.9406564584124654e-324L
+#define __csky__ 2
+#define __LLFRACT_MIN__ (-0.5LLR-0.5LLR)
+#define __DA_FBIT__ 31
+#define __UINT32_TYPE__ long unsigned int
+#define __USA_IBIT__ 16
+#define __LDBL_MIN_10_EXP__ (-307)
+#define __csky_required_printf__ 1
+#define __cskyabiv2__ 1
+#define __ULACCUM_EPSILON__ 0x1P-32ULK
+#define __SACCUM_IBIT__ 8
+#define __GCC_ATOMIC_LLONG_LOCK_FREE 1
+#define __LDBL_DIG__ 15
+#define __UINT_FAST16_MAX__ 0xffffffffU
+#define __GCC_ATOMIC_SHORT_LOCK_FREE 1
+#define __ULLFRACT_MAX__ 0XFFFFFFFFFFFFFFFFP-64ULLR
+#define __UINT_FAST8_TYPE__ unsigned int
+#define __USFRACT_EPSILON__ 0x1P-8UHR
+#define __ULACCUM_FBIT__ 32
+#define __QQ_IBIT__ 0
+#define __CSKY__ 2
diff --git a/Source/.cache/project.conf b/Source/.cache/project.conf
new file mode 100644
index 0000000..676d9fc
--- /dev/null
+++ b/Source/.cache/project.conf
@@ -0,0 +1,6 @@
+{
+ "device": " -mcpu=ck801 ",
+ "toolchain": "D:\\app\\CDKRepo\\Toolchain/CKV2ElfMinilib/V3.10.29/R/",
+ "toolchain_includes": ["d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\csky-elfabiv2", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include\\c++\\6.3.0\\backward", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\lib\\gcc\\csky-elfabiv2\\6.3.0\\include-fixed", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\sys-include", "d:\\app\\CDKRepo\\toolchain\\ckv2elfminilib\\v3.10.29\\R\\csky-elfabiv2\\include"],
+ "application": "G:\\WorkSpace_YYW2\\10V485_TC_RLY\\TC_RLY_10V485\\TC_RLY_10V485_V02\\Source\\.cache/"
+}
\ No newline at end of file
diff --git a/Source/.cdk/Project.cdkws.jane b/Source/.cdk/Project.cdkws.jane
new file mode 100644
index 0000000..26bca8d
--- /dev/null
+++ b/Source/.cdk/Project.cdkws.jane
@@ -0,0 +1,6 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Workspace>
+  <FindInFilesMask>
+    <![CDATA[*]]>
+  </FindInFilesMask>
+</Workspace>
diff --git a/Source/.cdk/Project.session b/Source/.cdk/Project.session
new file mode 100644
index 0000000..3d467df
--- /dev/null
+++ b/Source/.cdk/Project.session
@@ -0,0 +1,90 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Session Name="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\Project.cdkws">
+  <int Value="6" Name="m_selectedTab"/>
+  <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\Project.cdkws" Name="m_workspaceName"/>
+  <TabInfoArray Name="TabInfoArray">
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\includes.h" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="0" Name="FirstVisibleLine"/>
+      <int Value="41" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\main.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="0" Name="FirstVisibleLine"/>
+      <int Value="21" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\SYSTEM\dip_switch.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="65" Name="FirstVisibleLine"/>
+      <int Value="29" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\SYSTEM\eeprom.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="41" Name="FirstVisibleLine"/>
+      <int Value="191" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\SYSTEM\control_rly.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="47" Name="FirstVisibleLine"/>
+      <int Value="77" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\SYSTEM\inc\control_rly.h" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="0" Name="FirstVisibleLine"/>
+      <int Value="99" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\SYSTEM\inc\uart.h" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="0" Name="FirstVisibleLine"/>
+      <int Value="59" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\mcu_initial.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="288" Name="FirstVisibleLine"/>
+      <int Value="318" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\SYSTEM\uart.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="352" Name="FirstVisibleLine"/>
+      <int Value="442" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+    <TabInfo>
+      <wxString Value="G:\WorkSpace_YYW2\10V485_TC_RLY\TC_RLY_10V485\TC_RLY_10V485_V02\Source\mcu_interrupt.c" Name="FileName"/>
+      <wxString Value="MD203F8P" Name="ProjectName"/>
+      <int Value="884" Name="FirstVisibleLine"/>
+      <int Value="914" Name="CurrentLine"/>
+      <wxArrayString Name="Bookmarks"/>
+      <IntVector Name="CollapsedFolds"/>
+    </TabInfo>
+  </TabInfoArray>
+  <SerializedObject Name="m_breakpoints">
+    <long Value="0" Name="Count"/>
+  </SerializedObject>
+</Session>
diff --git a/Source/.cdk/compilation.db b/Source/.cdk/compilation.db
new file mode 100644
index 0000000..ffe8a39
Binary files /dev/null and b/Source/.cdk/compilation.db differ
diff --git a/Source/.cdk/refactoring.db b/Source/.cdk/refactoring.db
new file mode 100644
index 0000000..9da8d1e
Binary files /dev/null and b/Source/.cdk/refactoring.db differ
diff --git a/Source/FLASHDOWN/APT32F102_FLASHDOWN.elf b/Source/FLASHDOWN/APT32F102_FLASHDOWN.elf
new file mode 100644
index 0000000..1472d1d
Binary files /dev/null and b/Source/FLASHDOWN/APT32F102_FLASHDOWN.elf differ
diff --git a/Source/FWlib/apt32f102_adc.c b/Source/FWlib/apt32f102_adc.c
new file mode 100644
index 0000000..d59e771
--- /dev/null
+++ b/Source/FWlib/apt32f102_adc.c
@@ -0,0 +1,500 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_adc.c
+  * @author  APT AE Team
+  * @version V1.13
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_adc.h"
+
+/* defines -------------------------------------------------------------------*/
+/* externs--------------------------------------------------------------------*/
+/*************************************************************/
+//ADC12 RESET VALUE 
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void ADC12_RESET_VALUE(void)
+{
+	 ADC0->ECR	=	ADC_ECR_RST;     				/**< ECR  reset value  */
+	 ADC0->DCR	=	ADC_DCR_RST;                  	/**< DCR  reset value  */
+	 ADC0->PMSR	= 	ADC_PMSR_RST;       		  	/**< PMSR reset value  */
+	 //ADC0->CR	=	ADC_CR_RST;             		/**< CR   reset value  */
+	 ADC0->MR	=   ADC_MR_RST;                  	/**< MR   reset value  */
+	 ADC0->CSR	=   ADC_CSR_RST;                  	/**< CSR  reset value  */
+	 ADC0->SR 	=	ADC_SR_RST;                   	/**< SR   reset value  */
+	 ADC0->IER 	=	ADC_IER_RST;                	/**< IER  reset value  */
+	 ADC0->IDR 	=	ADC_IDR_RST;              		/**< IDR  reset value  */
+	 ADC0->IMR  =	ADC_IMR_RST;               		/**< IMR  reset value  */
+	 ADC0->SEQ[0]=	ADC_SEQx_RST;             		/**< SEQ0  reset value */
+	 ADC0->SEQ[1]=	ADC_SEQx_RST;             		/**< SEQ1  reset value */
+	 ADC0->SEQ[2]=	ADC_SEQx_RST;             		/**< SEQ2  reset value */
+	 ADC0->SEQ[3]=	ADC_SEQx_RST;             		/**< SEQ3  reset value */
+	 ADC0->SEQ[4]=	ADC_SEQx_RST;             		/**< SEQ4  reset value */
+	 ADC0->SEQ[5]=	ADC_SEQx_RST;             		/**< SEQ5  reset value */
+	 ADC0->SEQ[6]=	ADC_SEQx_RST;             		/**< SEQ6  reset value */
+	 ADC0->SEQ[7]=	ADC_SEQx_RST;             		/**< SEQ7  reset value */
+	 ADC0->SEQ[8]=	ADC_SEQx_RST;             		/**< SEQ8  reset value */
+	 ADC0->SEQ[9]=	ADC_SEQx_RST;             		/**< SEQ9  reset value */
+	 ADC0->SEQ[10]=	ADC_SEQx_RST;             		/**< SEQ10  reset value */
+	 ADC0->SEQ[11]=	ADC_SEQx_RST;             		/**< SEQ11  reset value */
+	 ADC0->SEQ[12]=	ADC_SEQx_RST;             		/**< SEQ12  reset value */
+	 ADC0->SEQ[13]=	ADC_SEQx_RST;             		/**< SEQ13  reset value */
+	 ADC0->SEQ[14]=	ADC_SEQx_RST;             		/**< SEQ14  reset value */
+	 ADC0->SEQ[15]=	ADC_SEQx_RST;             		/**< SEQ15  reset value */
+	 ADC0->DR[0]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[1]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[2]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[3]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[4]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[5]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[6]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[7]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[8]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[9]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[10]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[11]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[12]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[13]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[14]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->DR[15]  =	ADC_DR_RST;                		/**< DR   reset value  */
+	 ADC0->CMP0   =	ADC_CMP0_RST;               	/**< CMP1 reset value  */
+	 ADC0->CMP1   =	ADC_CMP1_RST;                	/**< CMP2 reset value  */
+}  
+/*************************************************************/
+//ADC12 Control
+//EntryParameter:ADC12_Control_x 
+//ADC12_Control_x:ADC12_SWRST , ADC12_ADCEN , ADC12_ADCDIS, ADC12_START, ADC12_STOP,ADC12_SWTRG
+//ReturnValue:NONE
+/*************************************************************/  
+  //control:ADC enable/disable ,start/stop,swrst
+void ADC12_Control(ADC12_Control_TypeDef ADC12_Control_x )
+{
+	ADC0->CR |= ADC12_Control_x;							// 
+}
+/*************************************************************/
+//ADC12 Interrupt ENABLE AND DISABLE
+//EntryParameter:ADC_IMR_X,NewState
+//ADC_IMR_X:ADC12_EOC,ADC12_READY,ADC12_OVR,ADC12_CMP0H,ADC12_CMP0L,ADC12_CMP1H,ADC12_CMP1L,ADC12_SEQ_END0~15
+//NewState:ENABLE , DISABLE
+//ReturnValue:NONE
+/*************************************************************/    
+  //ADC12_EOC:End of conversion interrupt
+  //ADC12_READY:ADC ready for conversion interrupt
+  //ADC12_OVR:Overrun interrupt
+  //ADC12_CMP0H:Higher than ADC_CMP1 interrupt
+  //ADC12_CMP0L:Lower than ADC_CMP1 interrupt
+  //ADC12_CMP1H:Higher than ADC_CMP2 interrupt
+  //ADC12_CMP1L:Lower than ADC_CMP2 interrupt
+  //ADC12_SEQ_END0~15:SEQx convert end interrupt
+void ADC12_ConfigInterrupt_CMD( ADC12_IMR_TypeDef ADC_IMR_X , FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		ADC0->IER  |= ADC_IMR_X;						//SET
+	}
+	else
+	{
+		ADC0->IDR  |= ADC_IMR_X;						//CLR
+	}
+} 
+/*************************************************************/
+//Read ADC12 Interrupt ENABLE status
+//EntryParameter:EnStatus_bit
+//EnStatus_bit:ADC12_EOC,ADC12_READY,ADC12_OVR,ADC12_CMP1H,ADC12_CMP1L,ADC12_CMP2H,ADC12_CMP2L,ADC12_SEQ_END0~15
+//ReturnValue:1=enabled/0=disabled
+/*************************************************************/   
+uint8_t ADC12_Read_IntEnStatus(ADC12_IMR_TypeDef EnStatus_bit)
+{
+	uint8_t value = 0;
+    uint32_t dat = 0;
+    dat= ADC0->IMR&EnStatus_bit;
+    if (dat == EnStatus_bit)								
+	{
+	    value = 1;
+	} 
+    return value;
+}
+/*************************************************************/
+//ADC12 CLK ENABLE AND DISABLE
+//EntryParameter:ADC_CLK_CMD,NewState
+//ADC_CLK_CMD:ADC_CLK_CR,ADC_DEBUG_MODE
+//NewState:ENABLE , DISABLE
+//ReturnValue:NONE
+/*************************************************************/      
+void ADC12_CLK_CMD(ADC12_CLK_TypeDef ADC_CLK_CMD , FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		ADC0->ECR  |= ADC_CLK_CMD;						//ENABLE
+		while(!(ADC0->PMSR&ADC_CLK_CMD));
+	}
+	else
+	{
+		ADC0->DCR  |= ADC_CLK_CMD;						//DISABLE
+		while(ADC0->PMSR&ADC_CLK_CMD);
+	}
+}
+/*************************************************************/
+//ADC12 software reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void ADC12_Software_Reset(void)
+{
+	ADC12_Control(ADC12_SWRST);
+}
+/*************************************************************/
+//ADC12 ENABLE
+//EntryParameter:NewState
+//NewState:ENABLE , DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ADC12_CMD(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		ADC12_Control(ADC12_ADCEN);						//ADC12 ENABLE
+		while(!(ADC0->SR &ADC12_ADCENS));
+	}
+	else
+	{
+		ADC12_Control(ADC12_ADCDIS);					//ADC12 DISABLE
+		while(ADC0->SR&ADC12_ADCENS);
+	}
+}
+/*************************************************************/
+//ADC12 READY wait
+//EntryParameter:NONE
+//ReturnValue:ADC12 READ FLAG
+/*************************************************************/ 
+void ADC12_ready_wait(void)  
+{
+	while(!(ADC0->SR&ADC12_READY));   					// Waiting for ADC0 Ready
+}
+/*************************************************************/
+//ADC12 End of conversion wait
+//EntryParameter:NONE
+//ReturnValue:ADC12 EOC
+/*************************************************************/ 
+void ADC12_EOC_wait(void)
+{
+	while(!(ADC0->SR & ADC12_EOC));			// EOC wait
+}
+/*************************************************************/
+//ADC12 End of conversion wait
+//EntryParameter:NONE
+//ReturnValue:ADC12 EOC
+/*************************************************************/ 
+void ADC12_SEQEND_wait(U8_T val)
+{
+	while(!(ADC0->SR & (0x01ul << (16+val))));			// EOC wait
+}  
+/*************************************************************/
+//ADC12 Data Register output
+//EntryParameter:NONE
+//ReturnValue:ADC12 DR
+/*************************************************************/ 
+U16_T ADC12_DATA_OUPUT(U16_T Data_index )
+{
+	return(ADC0->DR[Data_index]);
+} 
+/*************************************************************/
+//ADC12 Configure
+//EntryParameter:ADC12_BIT_SELECTED,ADC12_ConverMode,ADC12_DIV,NumConver
+//ADC12_BIT_SELECTED:ADC12_12BIT,ADC12_10BIT
+//ADC12_ConverMode:One_shot_mode,Continuous_mode
+//ADC12_PRI:0~15
+//adc12_SHR:0~255
+//ADC12_DIV:0~31
+//NumConver:Number of Conversions value=(1~12);
+//ReturnValue:NONE
+/*************************************************************/ 
+  //10BIT or 12BIT adc ;
+  //ADC12_BIT_SELECTED:ADC12_12BIT/ADC12_10BIT;
+  //ADC12_ConverMode:One_shot_mode/Continuous_mode;
+  //adc date output=last number of Conversions;
+void  ADC12_Configure_Mode(ADC12_10bitor12bit_TypeDef ADC12_BIT_SELECTED  , ADC12_ConverMode_TypeDef  ADC12_ConverMode  , U8_T ADC12_PRI, U8_T adc12_SHR , U8_T ADC12_DIV , U8_T NumConver ) 
+{
+	ADC0->MR=ADC12_DIV|((NumConver-1)<<10);
+	if(ADC12_ConverMode==One_shot_mode)
+	{
+		ADC0->MR&=~CONTCV;								//one short mode
+		while(ADC0->SR&ADC12_CTCVS);							
+	}
+	else if(ADC12_ConverMode==Continuous_mode)
+	{
+		ADC0->MR|=CONTCV;								//Continuous mode
+		while(!(ADC0->SR&ADC12_CTCVS));							
+	}
+	ADC12_CMD(ENABLE);									//ADC0 enable
+	if(ADC12_BIT_SELECTED)
+	{
+		ADC0->CR|=ADC12_10BITor12BIT;
+	}
+	else
+	{
+		ADC0->CR&=~ADC12_10BITor12BIT;
+	}
+	//ADC0->CR|=ADC12_VREF_VDD | ADC12_FVR_DIS;
+	ADC0->PRI=ADC12_PRI;
+	ADC0->SHR=adc12_SHR;								//adc Sampling & Holding cycles
+} 
+/*************************************************************/
+//ADC12 VREF slection=VDD
+//EntryParameter:NONE
+//ReturnValue:None
+/*************************************************************/ 
+void ADC12_Configure_VREF_Selecte(ADC12_VREFP_VREFN_Selected_TypeDef ADC12_VREFP_X_VREFN_X )
+{
+	if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_VDD_VREFN_VSS)
+	{
+		ADC0->CR=(ADC0->CR&0xfffefc3f)|(0x00<<6);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_EXIT_VREFN_VSS)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)  | 0x00000800;							
+		ADC0->CR=(ADC0->CR&0xfffefc3f)|(0x01<<6);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_FVR2048_VREFN_VSS)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)  | 0x00000800;							
+		ADC0->CR=(ADC0->CR&0xfcfefc3f)|(0x02<<6)|(0X01<<24)|(0X00<<25);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_FVR4096_VREFN_VSS)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)  | 0x00000800;							
+		ADC0->CR=(ADC0->CR&0xfcfefc3f)|(0x03<<6)|(0X01<<24)|(0X01<<25);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_INTVREF1000_VREFN_VSS)
+	{								
+		ADC0->CR=(ADC0->CR&0xfffefc3f)|(0x04<<6)|(0X00<<16)|(0X02<<17);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_VDD_VREFN_EXIT)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x0000B000;	
+		ADC0->CR=(ADC0->CR&0xfffefc3f)|(0x08<<6);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_EXIT_VREFN_EXIT)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x0000B000;
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)  | 0x00000800;			
+		ADC0->CR=(ADC0->CR&0xfffefc3f)|(0x09<<6);
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_FVR2048_VREFN_EXIT)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x0000B000;	
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)  | 0x00000800;
+		ADC0->CR=(ADC0->CR&0xfcfefc3f)|(0x0A<<6)|(0X01<<24)|(0X00<<25);			
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_FVR4096_VREFN_EXIT)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x0000B000;	
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)  | 0x00000800;
+		ADC0->CR=(ADC0->CR&0xfcfefc3f)|(0x0B<<6)|(0X01<<24)|(0X01<<25);	
+	}
+	else if(ADC12_VREFP_X_VREFN_X==ADC12_VREFP_INTVREF1000_VREFN_EXIT)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x0000B000;					
+		ADC0->CR=(ADC0->CR&0xfffefc3f)|(0x0C<<6)|(0X00<<16)|(0X02<<17);	
+	}
+}
+/*************************************************************/
+//ADC12 Compare function set
+//EntryParameter:ConverNum_CM0,ConverNum_CM1,CMP0_data,CMP1_data
+//ConverNum_CM0:VALUE=(0~15)
+//ConverNum_CM1:VALUE=(0~15)
+//CMP0_data:VALUE=(1~(0X3FF/0XFFF))
+//CMP1_data:VALUE=(1~(0X3FF/0XFFF))
+//ReturnValue:NONE
+/*************************************************************/ 
+  //ConverNum_CM0:Number of Conversions for Compare Function
+  //ConverNum_CM1:Number of Conversions for Compare Function
+  //ADC will generate a CMPxH/CMPxL interrupt when result of this number of conversion is higher/lower than data set in ADC_CMPx register.
+  //ConverNum_CM1Number of Conversions for Compare Function
+  //ADC will generate a CMP1H/CMP1L interrupt when result of this number of conversion is greater/less than data set in ADC_CMP1 register.
+  
+void ADC12_CompareFunction_set(U8_T ConverNum_CM0 , U8_T ConverNum_CM1 , U16_T CMP0_data , U16_T CMP1_data ) 
+{
+	ADC0->MR|=((ConverNum_CM0-0)<<16)|((ConverNum_CM1-0)<<22);
+	ADC0->CMP0=CMP0_data;
+	ADC0->CMP1=CMP1_data;
+}
+/*************************************************************/
+//ADC12 Conversion chanle seting
+//EntryParameter:ADC12_3/4/6/8CYCLES,SEQx,ADC12_ADCINX,ADC12_CV_RepeatNum1/2/4/8/16/32/64/128
+//SEQx:VALUE=(1~18)
+//ADC12_ADCINX:ADC12_ADCIN0~ADC12_ADCIN17,ADC12_INTVREF,ADC12_DIV4_VDD,ADC12_VSS
+//ReturnValue:NONE
+/*************************************************************/ 
+void ADC12_ConversionChannel_Config(ADC12_InputSet_TypeDef ADC12_ADCINX ,
+						ADC12_CV_RepeatNum_TypeDef CV_RepeatTime, ADC12_Control_TypeDef AVG_Set, U8_T SEQx)
+{
+	U8_T i;
+	for(i=0;i<15;i++)
+	{
+		ADC0->SEQ[i] &=~(0x01<<7);
+	}
+	switch(ADC12_ADCINX)
+	{
+		case 0:	
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC0 PB0.1
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFF0F)  | 0x00000010;			
+			break;
+		case 1:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0)  | 0x00000001;							//ADC1 PA0.0
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;						
+			break;
+		case 2:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F)  | 0x00000010;							//ADC2 PA0.1
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;	
+			break;
+		case 3:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x00001000;							//ADC3 PA0.3
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;	
+			break;
+		case 4:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00100000;							//ADC4 PA0.5
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;
+			break;
+		case 5:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF)  | 0x01000000;							//ADC5 PA0.6
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;		
+			break;
+		case 6:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)  | 0x10000000;							//ADC6 PA0.7
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;
+			break;
+		case 7:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC7 PB0.2
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF)  | 0x00000100;
+			break;
+		case 8:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC8 PB0.3
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF)  | 0x00001000;
+			break;
+		case 9:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC9 PA0.8
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0)  | 0x00000001;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;	
+			break;
+		case 10:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC10 PA0.9
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F)  | 0x00000010;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;
+			break;
+		case 11:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC11 PA0.10
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF)  | 0x00000100;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;			
+			break;
+		case 12:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC12 PA0.11
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF)  | 0x00001000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;	
+			break;
+		case 13:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC13 PA0.12
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00010000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;		
+			break;
+		case 14:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC14 PA0.13	
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00100000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFFF)  | 0x00000000;		
+			break;
+		case 15:
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFFF)  | 0x00000000;							//ADC15 PB0.0
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFFF)  | 0x00000000;	
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000001;		
+			break;
+		//case 18: break;
+		//case 19: break;
+		//case 20: break;
+		//case 21: break;
+		//case 22: break;
+		//case 23: break;
+		//case 24: break;
+		//case 25: break;
+		//case 26: break;
+		//case 27: break;
+		case 0x1Cul: break;
+		case 0x1Dul: break;
+		case 0x1Eul: break;
+	}
+	ADC0->SEQ[SEQx] = ADC0->SEQ[SEQx] & 0;
+	ADC0->SEQ[SEQx] = ADC0->SEQ[SEQx] | ADC12_ADCINX  | CV_RepeatTime | AVG_Set;
+}
+/*************************************************************/
+//ADC12 Compare statue output
+//EntryParameter:NBRCMPx_TypeDef,NBRCMPX_L_TypeDef
+//NBRCMPx_TypeDef:NBRCMP0_TypeDef,NBRCMP1_TypeDef
+//NBRCMPX_L_TypeDef:NBRCMPX_L_TypeDef,NBRCMPX_H_TypeDef
+//ReturnValue:ADC12 Compare result flag
+/*************************************************************/ 
+  //output statue:ADC-SR(ADC12_CMP0H/ADC12_CMP0L/ADC12_CMP1H/ADC12_CMP1L)
+U8_T ADC12_Compare_statue(ADC12_NBRCMPx_TypeDef ADC12_NBRCMPx, ADC12_NBRCMPx_HorL_TypeDef ADC12_NBRCMPx_HorL)
+{
+	if(ADC12_NBRCMPx==NBRCMP0_TypeDef)
+	{
+		if(ADC12_NBRCMPx_HorL==NBRCMPX_L_TypeDef)
+		{
+			return((ADC0->SR)&ADC12_CMP0L);
+		}
+		else
+		{
+			return((ADC0->SR)&ADC12_CMP0H);
+		}
+		
+	}
+	else
+	{
+		if(ADC12_NBRCMPx_HorL==NBRCMPX_L_TypeDef)
+		{
+			return((ADC0->SR)&ADC12_CMP1L);
+		}
+		else
+		{
+			return((ADC0->SR)&ADC12_CMP1H);
+		}
+	}
+}
+/*************************************************************/
+//ADC Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADC_Int_Enable(void)
+{
+    ADC0->CSR=0xFFFFFFFF;
+	INTC_ISER_WRITE(ADC_INT);    
+}
+/*************************************************************/
+//ADC Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADC_Int_Disable(void)
+{
+    INTC_ICER_WRITE(ADC_INT);    
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_bt.c b/Source/FWlib/apt32f102_bt.c
new file mode 100644
index 0000000..d560b42
--- /dev/null
+++ b/Source/FWlib/apt32f102_bt.c
@@ -0,0 +1,287 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_bt.c
+  * @author  APT AE Team
+  * @version V1.10
+  * @date    2021/08/25
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_bt.h"
+
+/* defines -------------------------------------------------------------------*/
+/* externs--------------------------------------------------------------------*/
+
+
+/*************************************************************/
+//Deinitializes the registers to their default reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+	BTx->CR=BT_RESET_VALUE;
+	BTx->PSCR=BT_RESET_VALUE;
+	BTx->PRDR=BT_RESET_VALUE;
+	BTx->CMP=BT_RESET_VALUE;
+	BTx->CNT=BT_RESET_VALUE;
+	BTx->EVTRG=BT_RESET_VALUE;
+	BTx->EVSWF=BT_RESET_VALUE;
+	BTx->RISR=BT_RESET_VALUE;
+	BTx->IMCR=BT_RESET_VALUE;
+	BTx->MISR=BT_RESET_VALUE;
+	BTx->ICR=BT_RESET_VALUE;
+}
+/*************************************************************/
+//BT IO Init
+//EntryParameter:LPT_OUT_PA09,LPT_OUT_PB01,LPT_IN_PA10,
+//ReturnValue:NONE
+/*************************************************************/
+void BT_IO_Init(BT_Pin_TypeDef BT_IONAME)
+{
+	if(BT_IONAME==BT0_PA00)										
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFFFF0)|0x00000006;  //BT0 PA0.0
+	}
+	if(BT_IONAME==BT0_PA02)										
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFF0FF)|0x00000600;  //BT0 PA0.2
+	}
+	if(BT_IONAME==BT0_PA05)										
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFF0FFFFF)|0x00500000;  //BT0 PA0.5
+	}
+	if(BT_IONAME==BT0_PB02)										
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFF0FF)|0x00000500;  //BT0 PB0.2
+	}
+	if(BT_IONAME==BT0_PB05)										
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFF0FFFFF)|0x00700000;  //BT0 PB0.5
+	}
+	if(BT_IONAME==BT0_PA11)										
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00008000;  //BT0 PA0.11
+	}
+	if(BT_IONAME==BT0_PA13)										
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFF0FFFFF)|0x00800000;  //BT0 PA0.13
+	}
+	if(BT_IONAME==BT0_PA15)										
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0X0FFFFFFF)|0x50000000;  //BT0 PA0.15
+	}
+	if(BT_IONAME==BT1_PA01)										
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFFF0F)|0x00000060;  //BT1 PA0.1
+	}
+	if(BT_IONAME==BT1_PA06)										
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XF0FFFFFF)|0x04000000;  //BT1 PA0.6
+	}
+	if(BT_IONAME==BT1_PA08)										
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFFF0)|0x00000006;  //BT1 PA0.8
+	}
+	if(BT_IONAME==BT1_PA12)										
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFF0FFFF)|0x00060000;  //BT1 PA0.12
+	}
+	if(BT_IONAME==BT1_PA14)										
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XF0FFFFFF)|0x05000000;  //BT1 PA0.14
+	}
+	if(BT_IONAME==BT1_PB00)										
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000008;  //BT1 PB0.0
+	}
+	if(BT_IONAME==BT1_PB04)										
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFF0FFFF)|0x00070000;  //BT1 PB0.4
+	}
+}
+/*************************************************************/
+// BT start
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+}
+/*************************************************************/
+// BT stop
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Stop(CSP_BT_T *BTx)
+{
+	BTx->RSSR &=0X0;
+}
+/*************************************************************/
+// BT stop High
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Stop_High(CSP_BT_T *BTx)
+{
+	BTx->CR |=(0x01<<6);
+	BTx->RSSR &=0X0;
+}
+/*************************************************************/
+// BT stop Low
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Stop_Low(CSP_BT_T *BTx)
+{
+	BTx->CR =BTx->CR & ~(0x01<<6);
+	BTx->RSSR &=0X0;
+}
+/*************************************************************/
+// BT soft reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+}
+/*************************************************************/
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+	BTx->PSCR = PSCR_DATA;
+}
+/*************************************************************/
+//BT ControlSet
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+}
+/*************************************************************/
+//BT Period / Compare set
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+	BTx->CMP =BTCMP_DATA;
+}
+/*************************************************************/
+//BT COUNTER set
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_CNT_Write(CSP_BT_T *BTx,U16_T BTCNT_DATA)
+{
+	BTx->CNT =BTCNT_DATA;
+}
+/*************************************************************/
+//BT read counters
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+U16_T BT_PRDR_Read(CSP_BT_T *BTx)
+{
+    return BTx->PRDR;
+}
+U16_T BT_CMP_Read(CSP_BT_T *BTx)
+{
+    return BTx->CMP;
+}
+U16_T BT_CNT_Read(CSP_BT_T *BTx)
+{
+    return BTx->CNT;
+}
+/*************************************************************/
+//BT Trigger Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Trigger_Configure(CSP_BT_T *BTx,BT_TRGSRC_TypeDef BTTRG,BT_TRGOE_TypeDef BTTRGOE)
+{
+	BTx->EVTRG|=BTTRG| BTTRGOE;
+}
+/*************************************************************/
+//BT SOFT Trigger
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Soft_Tigger(CSP_BT_T *BTx)
+{
+	BTx->EVSWF=0x01;
+}
+/*************************************************************/
+//BT inturrpt Configure
+//EntryParameter:BT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+/*************************************************************/
+//BT0 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT0_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT0_INT);
+}
+/*************************************************************/
+//BT0 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT0_INT_DISABLE(void)
+{
+	INTC_ICER_WRITE(BT0_INT);
+}
+/*************************************************************/
+//BT0 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+}
+/*************************************************************/
+//BT0 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_DISABLE(void)
+{
+	INTC_ICER_WRITE(BT1_INT);
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_coret.c b/Source/FWlib/apt32f102_coret.c
new file mode 100644
index 0000000..255e73c
--- /dev/null
+++ b/Source/FWlib/apt32f102_coret.c
@@ -0,0 +1,147 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_CORET.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_coret.h"
+#include "apt32f102_syscon.h"
+
+
+/* defines -------------------------------------------------------------------*/
+/* externs--------------------------------------------------------------------*/
+
+
+/*************************************************************/
+//Deinitializes the syscon registers to their default reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void CORET_DeInit(void)
+{
+	CK801->CORET_CSR=CORET_CSR_RST;
+	CK801->CORET_RVR=CORET_RVR_RST;
+	CK801->CORET_CVR=CORET_CVR_RST;
+	CK801->CORET_CALIB=CORET_CALIB_RST;
+}
+
+/*************************************************************/
+//CORET Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_Int_Enable(void)
+{
+    CK801->CORET_CVR = 0x0;							// Clear counter and flag
+	INTC_ISER_WRITE(CORET_INT);    
+}
+
+/*************************************************************/
+//CORET Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_Int_Disable(void)
+{
+    INTC_ICER_WRITE(CORET_INT);    
+}
+
+/*************************************************************/
+// CORET Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void  CORET_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(CORET_INT);    
+}
+
+/*************************************************************/
+// CORET Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void  CORET_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(CORET_INT);    
+}
+
+/*************************************************************/
+// CORET START
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_start(void)
+{
+	CK801->CORET_CSR|=0x01;
+}
+/*************************************************************/
+// CORET stop
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_stop(void)
+{
+	CK801->CORET_CSR&=0Xfffffffe;
+}
+/*************************************************************/
+// CORET CLKSOURC EX
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_CLKSOURCE_EX(void)
+{
+	CK801->CORET_CSR&=0Xfffffffb;
+}
+/*************************************************************/
+// CORET CLKSOURC IN
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_CLKSOURCE_IN(void)
+{
+	CK801->CORET_CSR|=0x04;
+}
+/*************************************************************/
+//CORET TICKINT enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_TICKINT_Enable(void)
+{
+    CK801->CORET_CSR|=0x02;
+}
+
+/*************************************************************/
+//CORET TICKINT enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_TICKINT_Disable(void)
+{
+   CK801->CORET_CSR&=0Xfffffffd;
+}
+
+/*************************************************************/
+// CORET reload
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CORET_reload(void)
+{
+	CK801->CORET_CVR = 0x0;							// Clear counter and flag
+}
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_countera.c b/Source/FWlib/apt32f102_countera.c
new file mode 100644
index 0000000..60dea0b
--- /dev/null
+++ b/Source/FWlib/apt32f102_countera.c
@@ -0,0 +1,153 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_countera.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_countera.h"
+/* defines -------------------------------------------------------------------*/
+
+/* externs--------------------------------------------------------------------*/
+
+
+/*************************************************************/
+//Count A RESET,CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNT_DeInit(void)
+{
+    CA0->CADATAH = CA_RESET_VALUE;
+    CA0->CADATAL = CA_RESET_VALUE;
+    CA0->CACON   = CA_RESET_VALUE;
+    CA0->INTMASK = CA_RESET_VALUE;
+}
+
+/*************************************************************/
+//CountA Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void COUNTA_Int_Enable(void)
+{
+    INTC_ISER_WRITE(CA_INT);    
+}
+/*************************************************************/
+//CountA Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void COUNTA_Int_Disable(void)
+{
+    INTC_ICER_WRITE(CA_INT);    
+}
+/*************************************************************/
+//CountA Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void COUNTA_Wakeup_Enable(void)
+{
+    INTC_IWER_WRITE(CA_INT);    
+}
+/*************************************************************/
+//CountA Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void COUNTA_Wakeup_Disable(void)
+{
+    INTC_IWDR_WRITE(CA_INT);    
+}
+/*************************************************************/
+//CountA Init
+//EntryParameter:Data_H,Data_L,INT_Mode,DIVx,Mode,Carrier,OSP_Mode
+//Data_H,Data_L:0x0000~0xFFFF
+//INT_MODE:Period_NA/Period_H/Period_L/Period_H_L
+//DIVx:DIV1/DIV2/DIV4/DIV8
+//Mode:ONESHOT_MODE / REPEAT_MODE
+//Carrier:CARRIER_OFF / CARRIER_ON
+//OSP_Mode:OSP_LOW /OSP_HIGH
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNTA_Init(uint32_t Data_H,uint32_t Data_L,CA_INT_TypeDef INT_Mode,
+                     CA_CLKDIV_TypeDef DIVx,CA_Mode_TypeDef Mode,CA_CARRIER_TypeDef Carrier,
+                     CA_OSP_TypeDef OSP_Mode)  
+{
+	COUNT_DeInit();
+    CA0->CADATAH = Data_H;//0x0000~0xFFFF      time(us)/(1/F Mhz) eg:10us/(1/4)=10us/0.25us=40,Data_H=40
+	CA0->CADATAL = Data_L;//0x0000~0xFFFF
+    CA0->CACON = DIVx | Mode | Carrier  | OSP_Mode ;
+    CA0->INTMASK = INT_Mode ;
+}
+/*************************************************************/
+//CountA config
+//EntryParameter:STROBE,Pend_val,Match_val,Stat_val,ENVELOPE
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNTA_Config(CA_STROBE_TypeDef STROBE,CA_PENDREM_TypeDef Pend_CON,
+                        CA_MATCHREM_TypeDef Match_CON,CA_REMSTAT_TypeDef Stat_CON,CA_ENVELOPE_TypeDef ENVELOPE )
+{
+    CA0->CACON = CA0->CACON | STROBE | Pend_CON | Match_CON | Stat_CON | ENVELOPE;
+}
+/*************************************************************/
+//CountA Start
+//EntryParameter:none
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNTA_Start(void)
+{
+    CA0->CACON=(CA0->CACON&0xFFFFFFF3)|0X04;                    //bit 2,This bit be cleared automatically
+}
+/*************************************************************/
+//CountA Stop
+//EntryParameter:none
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNTA_Stop(void)
+{
+    CA0->CACON=(CA0->CACON&0xFFFFFFF7)|0X08;                    //bit 4
+}
+/*************************************************************/
+//CountA data update
+//EntryParameter:none
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNTA_Data_Update(uint32_t Data_H,uint32_t Data_L)
+{
+    CA0->CADATAH = Data_H;//0x0000~0xFFFF      					time(us)/(1/F Mhz) eg:10us/(1/4)=10us/0.25us=40,Data_H=40
+	CA0->CADATAL = Data_L;//0x0000~0xFFFF
+	CA0->CACON = CA0->CACON | (1ul<<16);
+}
+/*************************************************************/
+//CountA Stop
+//EntryParameter:COUNTA_IO_G0
+//COUNTA_IO_G:0 PB0.01  1 PA0.05  2 PA0.11
+//ReturnValue:NONE
+/*************************************************************/  
+void COUNTA_IO_Init(CA_COUNTAIO_TypeDef COUNTA_IO_G)
+{
+	if(COUNTA_IO_G==0)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000040;									//BUZZ (PB0.01->AF1)
+	}
+	else if(COUNTA_IO_G==1)
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFF0FFFFF)|0x00600000;									//BUZZ (PA0.05->AF4)
+	}
+	else if(COUNTA_IO_G==2)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00007000;									//BUZZ (PA0.11->AF3)
+	}
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_crc.c b/Source/FWlib/apt32f102_crc.c
new file mode 100644
index 0000000..b5d6ec3
--- /dev/null
+++ b/Source/FWlib/apt32f102_crc.c
@@ -0,0 +1,150 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_crc.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+  
+  /* Includes ------------------------------------------------------------------*/
+#include "apt32f102_crc.h"
+
+/*************************************************************/
+// CRC enable/disable
+//EntryParameter:ENABLE/DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void CRC_CMD(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		CRC->CEDR  =0X01;						//SET
+	}
+	else
+	{
+		CRC->CEDR  =0X00;						//CLR
+	}
+}
+
+/*************************************************************/
+//CRC RESET
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void CRC_Soft_Reset(void)
+{
+	CRC->SRR = 0X01;
+}
+
+/*************************************************************/
+//CRC CONTROL
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void CRC_Configure(CRC_COMPIN_TypeDef COMPINX,CRC_COMPOUT_TypeDef COMPOUTX,CRC_ENDIANIN_TypeDef ENDIANINX,
+				   CRC_ENDIANOUT_TypeDef ENDIANOUT,CRC_POLY_TypeDef POLYX)
+{
+	CRC->CR	= 0;
+	CRC->CR |= COMPINX |COMPOUTX |ENDIANINX |ENDIANOUT| POLYX;
+}
+
+/*************************************************************/
+//CRC seed write
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void CRC_Seed_Write(U32_T seed_data)
+{
+	CRC->SEED = seed_data;
+}
+
+/*************************************************************/
+//CRC seed read
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T CRC_Seed_Read(void)
+{
+	return CRC->SEED;
+}
+
+/*************************************************************/
+//CRC datain
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void CRC_Datain(U32_T data_in)
+{
+	CRC->DATAIN=data_in;
+}
+
+/*************************************************************/
+//CRC Result read
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T CRC_Result_Read(void)
+{
+	return CRC->DATAOUT;
+}
+/*************************************************************/
+//CRC calc 32bit input
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T Chip_CRC_CRC32(U32_T *data, U32_T words)
+{
+	while (words > 0) {
+		CRC_Datain(*data);
+		data++;
+		words--;
+	}
+	return CRC_Result_Read();
+}
+/*************************************************************/
+//CRC calc 16bit input
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T Chip_CRC_CRC16(U16_T *data, U32_T size)
+{
+	U32_T i,j;
+	U8_T data_temp;
+	for (i=0; i<size; i++)
+	{
+	for(j=0;j<=1;j++)
+	{
+		if(j==0)data_temp=*data>>8;
+		if(j==1)data_temp=*data&0xff;
+		*(U8_T *)(AHB_CRCBase + 0x14 + (i%4)) = data_temp;
+	}
+	data++;
+	}
+	return CRC_Result_Read();
+}
+/*************************************************************/
+//CRC calc 8bit input
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T Chip_CRC_CRC8(U8_T *data, U32_T size)
+{
+	U32_T i;
+	for (i=0; i<size; i++)
+	{
+	*(U8_T *)(AHB_CRCBase + 0x14 + (i%4)) = *data;
+	data++;
+	}
+	return CRC_Result_Read();
+}
+
diff --git a/Source/FWlib/apt32f102_ept.c b/Source/FWlib/apt32f102_ept.c
new file mode 100644
index 0000000..f0faac1
--- /dev/null
+++ b/Source/FWlib/apt32f102_ept.c
@@ -0,0 +1,868 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_ept.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/03/29
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_ept.h"
+/* define --------------------------------------------------------------------*/
+/* externs--------------------------------------------------------------------*/
+/*************************************************************/
+//Deinitializes the EPT Software prg
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void EPT_Software_Prg(void)
+{
+	EPT0->CEDR|=0X01;
+	EPT0->RSSR=(EPT0->RSSR&0XFFFF0FFF)|(0X05<<12);
+}
+/*************************************************************/
+//Deinitializes the EPT start prg
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Start(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->RSSR|=0X01;
+	while(!(EPT0->RSSR&0x01));
+} 
+/*************************************************************/
+//Deinitializes the EPT stop prg
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->RSSR&=0Xfe;
+	while(EPT0->RSSR&0x01);
+}
+/*************************************************************/
+//Deinitializes the EPT IO Config,IO_Num_X
+//EntryParameter:EPT_IO_Mode_Type
+//EPT_IO_X:EPT_IO_CHAX,EPT_IO_CHAY,EPT_IO_CHBX,EPT_IO_CHBY,EPT_IO_CHCX,EPT_IO_CHCX,EPT_IO_CHD,EPT_IO_EPI
+//ReturnValue:NONE
+/*************************************************************/    
+void EPT_IO_SET(EPT_IO_Mode_Type EPT_IO_X , EPT_IO_NUM_Type IO_Num_X)
+{
+	if(EPT_IO_X==EPT_IO_CHAX)
+	{
+		if(IO_Num_X==IO_NUM_PA07)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)|0X60000000;				//PA0.7
+		}
+		else if(IO_Num_X==IO_NUM_PA10)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF)|0X00000500;				//PA0.10
+		}
+		else if(IO_Num_X==IO_NUM_PA15)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF)|0X40000000;				//PA0.15
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_CHAY)
+	{
+		if(IO_Num_X==IO_NUM_PB03)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF)|0X00005000;				//PB0.3
+		}
+		else if(IO_Num_X==IO_NUM_PB05)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF0FFFFF)|0X00500000;				//PB0.5
+		}
+		else if(IO_Num_X==IO_NUM_PA12)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)|0X00050000;				//PA0.12
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_CHBX)
+	{
+		if(IO_Num_X==IO_NUM_PB02)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF)|0X00000600;				//PB0.2
+		}
+		else if(IO_Num_X==IO_NUM_PA11)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF)|0X00005000;				//PA0.11
+		}
+		else if(IO_Num_X==IO_NUM_PA14)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF)|0X04000000;				//PA0.14
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_CHBY)
+	{
+		if(IO_Num_X==IO_NUM_PB04)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFF0FFFF)|0X00050000;				//PB0.4
+		}
+		else if(IO_Num_X==IO_NUM_PA05)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)|0X00800000;				//PA0.5
+		}
+		else if(IO_Num_X==IO_NUM_PA08)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0)|0X00000005;				//PA0.8
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_CHCX)
+	{
+		if(IO_Num_X==IO_NUM_PB05)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF0FFFFF)|0X00400000;				//PB0.5
+		}
+		else if(IO_Num_X==IO_NUM_PA03)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)|0X00005000;				//PA0.3
+		}
+		else if(IO_Num_X==IO_NUM_PB03)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF)|0X00004000;				//PB0.3
+		}
+		else if(IO_Num_X==IO_NUM_PB00)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)|0X00000005;				//PB0.0
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_CHCY)
+	{
+		if(IO_Num_X==IO_NUM_PB04)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFF0FFFF)|0X00040000;				//PB0.4
+		}
+		else if(IO_Num_X==IO_NUM_PA04)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF)|0X00050000;				//PA0.4
+		}
+		else if(IO_Num_X==IO_NUM_PA09)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F)|0X00000070;				//PA0.9
+		}
+		else if(IO_Num_X==IO_NUM_PA013)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)|0X00500000;				//PA0.13
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_CHD)
+	{
+		if(IO_Num_X==IO_NUM_PB03)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF)|0X00006000;				//PB0.3
+		}
+		else if(IO_Num_X==IO_NUM_PA08)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0)|0X00000004;				//PA0.8
+		}
+	}
+	else if(EPT_IO_X==EPT_IO_EPI)
+	{
+		if(IO_Num_X==IO_NUM_PA07)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)|0X50000000;				//PA0.7 EPI0
+		}
+		else if(IO_Num_X==IO_NUM_PA013)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)|0X00400000;				//PA0.13 EPI1
+		}
+		else if(IO_Num_X==IO_NUM_PB03)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF)|0X00007000;				//PB0.3 EPI2
+		}
+		else if(IO_Num_X==IO_NUM_PB02)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF)|0X00000700;				//PB0.2 EPI3
+		}
+	}
+}
+/*************************************************************/
+//Deinitializes the EPT PWM Config
+//EntryParameter:EPT_TCLK_Selecte_X,EPT_CNTMD_SELECTE_X,EPT_OPM_SELECTE_X,EPT_PSCR
+//EPT_TCLK_Selecte_X:EPT_Selecte_PCLK,EPT_Selecte_SYNCUSR3
+//EPT_CNTMD_SELECTE_X:EPT_CNTMD_increase,EPT_CNTMD_decrease,EPT_CNTMD_increaseTOdecrease
+//EPT_OPM_SELECTE_X:EPT_OPM_Once,EPT_OPM_Continue
+//EPT_PSCR:0~0XFFFF
+//ReturnValue:NONE
+/*************************************************************/  
+//Fclk=Fpclk/(PSC+1)
+void EPT_PWM_Config(EPT_TCLK_Selecte_Type EPT_TCLK_Selecte_X , EPT_CNTMD_SELECTE_Type EPT_CNTMD_SELECTE_X  , EPT_OPM_SELECTE_Type EPT_OPM_SELECTE_X
+					, U16_T EPT_PSCR)		
+{
+	EPT0->CEDR=(EPT0->CEDR&0XFFFFFF00)|(0X01|EPT_TCLK_Selecte_X|(0X01<<1)|(0X00<<6));
+	if(EPT_TCLK_Selecte_X==EPT_Selecte_PCLK)
+	{
+		EPT0->PSCR=EPT_PSCR;
+	}
+	EPT0->CR=(EPT0->CR&0xfff8ffc0)|EPT_CNTMD_SELECTE_X|(0x1<<2)|(0x0<<3)|(0x0<<4)|EPT_OPM_SELECTE_X|(0X0<<16)|(0x1<<18);
+} 
+/*************************************************************/
+//Deinitializes the EPT PWM Config
+//EntryParameter:EPT_CGSRC_TIN_Selecte_X,EPT_CGFLT_DIV,EPT_CGFLT_CNT,EPT_BURST_CMD
+//EPT_CGSRC_TIN_Selecte_X:EPT_CGSRC_TIN_BT0OUT,EPT_CGSRC_TIN_BT1OUT,EPT_CGSRC_CHAX,EPT_CGSRC_CHBX,EPT_CGSRC_DIS
+//EPT_CGFLT_DIV:0~255
+//EPT_CGFLT_CNT:0~7
+//EPT_BURST_CMD:EPT_BURST_ENABLE,EPT_BURST_DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void EPT_CG_gate_Config(EPT_CGSRC_TIN_Selecte_Type EPT_CGSRC_TIN_Selecte_X , U8_T EPT_CGFLT_DIV , U8_T EPT_CGFLT_CNT , EPT_BURST_CMD_Type EPT_BURST_CMD)
+{
+	EPT0->CR=(EPT0->CR&0xffff01ff)|EPT_BURST_CMD|EPT_CGFLT_CNT<<13|0x01<<10;
+	EPT0->CEDR=(EPT0->CEDR&0XFFFF00CF)|(EPT_CGFLT_DIV<<8);
+	if(EPT_CGSRC_TIN_Selecte_X==EPT_CGSRC_DIS)
+	{
+		EPT0->CEDR|=0X00<<4;
+		EPT0->CR|=0X03<<11;
+	}
+	else if(EPT_CGSRC_TIN_Selecte_X==EPT_CGSRC_TIN_BT0OUT)
+	{
+		EPT0->CEDR|=0X01<<4;
+		EPT0->CR|=0X02<<11;
+	}
+	else if(EPT_CGSRC_TIN_Selecte_X==EPT_CGSRC_TIN_BT1OUT)
+	{
+		EPT0->CEDR|=0X02<<4;
+		EPT0->CR|=0X02<<11;
+	}
+	else if(EPT_CGSRC_TIN_Selecte_X==EPT_CGSRC_CHAX)
+	{
+		EPT0->CEDR|=0X00<<4;
+		EPT0->CR|=0X00<<11;
+	}
+	else if(EPT_CGSRC_TIN_Selecte_X==EPT_CGSRC_CHBX)
+	{
+		EPT0->CEDR|=0X00<<4;
+		EPT0->CR|=0X01<<11;
+	}
+}
+/*************************************************************/
+//Deinitializes the EPT Caputer Config
+//EntryParameter:EPT_TCLK_Selecte_X,EPT_CNTMD_SELECTE_X,EPT_CAPMD_SELECTE_X,EPT_LOAD_CMPA_RST_CMD~EPT_LOAD_CMPD_RST_CMD,EPT_STOP_WRAP,EPT_PSCR
+//EPT_TCLK_Selecte_X:EPT_Selecte_PCLK,EPT_Selecte_SYNCUSR3
+//EPT_CNTMD_SELECTE_X:EPT_CNTMD_increase,EPT_CNTMD_decrease,EPT_CNTMD_increaseTOdecrease
+//EPT_CAPMD_SELECTE_X:EPT_CAPMD_Once,EPT_CAPMD_Continue
+//EPT_LOAD_CMPA_RST_CMD:EPT_LDARST_EN,EPT_LDARST_DIS
+//EPT_LOAD_CMPB_RST_CMD:EPT_LDBRST_EN,EPT_LDBRST_DIS
+//EPT_LOAD_CMPC_RST_CMD:EPT_LDCRST_EN,EPT_LDCRST_DIS
+//EPT_LOAD_CMPD_RST_CMD:EPT_LDDRST_EN,EPT_LDDRST_DIS
+//EPT_STOP_WRAP:0~3
+//EPT_PSCR:0~0XFFFF
+//ReturnValue:NONE
+/*************************************************************/  
+void EPT_Capture_Config(EPT_TCLK_Selecte_Type EPT_TCLK_Selecte_X , EPT_CNTMD_SELECTE_Type EPT_CNTMD_SELECTE_X  , EPT_CAPMD_SELECTE_Type EPT_CAPMD_SELECTE_X , EPT_CAPLDEN_CMD_Type CAP_CMD 
+					, EPT_LOAD_CMPA_RST_CMD_Type EPT_LOAD_CMPA_RST_CMD , EPT_LOAD_CMPB_RST_CMD_Type EPT_LOAD_CMPB_RST_CMD , EPT_LOAD_CMPC_RST_CMD_Type EPT_LOAD_CMPC_RST_CMD
+					, EPT_LOAD_CMPD_RST_CMD_Type EPT_LOAD_CMPD_RST_CMD , U8_T EPT_STOP_WRAP , U16_T EPT_PSCR)
+{
+	EPT0->CEDR=(EPT0->CEDR&0XFFFFFF00)|(0X01|EPT_TCLK_Selecte_X|(0X01<<1)|(0X00<<6));
+	if(EPT_TCLK_Selecte_X==EPT_Selecte_PCLK)
+	{
+		EPT0->PSCR=EPT_PSCR;
+	}
+	EPT0->CR=(EPT0->CR&0xf800fec0)|EPT_CNTMD_SELECTE_X|(0x0<<2)|(0x0<<3)|(0x0<<4)|CAP_CMD|EPT_CAPMD_SELECTE_X|(0X0<<16)|(0x0<<18)|(EPT_STOP_WRAP<<21)|
+				EPT_LOAD_CMPA_RST_CMD|EPT_LOAD_CMPB_RST_CMD|EPT_LOAD_CMPC_RST_CMD|EPT_LOAD_CMPD_RST_CMD;
+}
+
+/*************************************************************/
+//Deinitializes the EPT SYNCR Config
+//EntryParameter:EPT_Triggle_X,EPT_SYNCR_EN,EPT_SYNCUSR0_REARMTrig_Selecte,EPT_TRGSRC0_ExtSync_Selected,EPT_TRGSRC1_ExtSync_Selected
+//EPT_Triggle_X:EPT_Triggle_Continue,EPT_Triggle_Once
+//EPT_SYNCUSR0_REARMTrig_Selecte:EPT_SYNCUSR0_REARMTrig_DIS,EPT_SYNCUSR0_REARMTrig_T1,EPT_SYNCUSR0_REARMTrig_T2
+//EPT_SYNCUSR0_REARMTrig_T1T2
+//EPT_TRGSRC0_ExtSync_Selected:EPT_TRGSRC0_ExtSync_SYNCUSR0~EPT_TRGSRC0_ExtSync_SYNCUSR5
+//EPT_TRGSRC1_ExtSync_Selected:EPT_TRGSRC1_ExtSync_SYNCUSR0~EPT_TRGSRC1_ExtSync_SYNCUSR5
+//EPT_SYNCR_EN:0~0X3F
+//ReturnValue:NONE
+/*************************************************************/  
+void EPT_SYNCR_Config(EPT_Triggle_Mode_Type EPT_Triggle_X , EPT_SYNCUSR0_REARMTrig_Selecte_Type EPT_SYNCUSR0_REARMTrig_Selecte , EPT_TRGSRC0_ExtSync_Selected_Type EPT_TRGSRC0_ExtSync_Selected ,
+					  EPT_TRGSRC1_ExtSync_Selected_Type EPT_TRGSRC1_ExtSync_Selected , U8_T EPT_SYNCR_EN)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->SYNCR = (EPT0->SYNCR&0XC03F0000) |EPT_SYNCR_EN|EPT_Triggle_X|EPT_SYNCUSR0_REARMTrig_Selecte|EPT_TRGSRC0_ExtSync_Selected|EPT_TRGSRC1_ExtSync_Selected;
+}
+/*************************************************************/
+//Deinitializes the EPT CPCR Config
+//EntryParameter:EPT_CPCR_CMD,EPT_CPCR_Source_X,EPT_CDUTY_X,EPT_CPCR_OSPWTH,EPT_CPCR_CDIV
+//EPT_CPCR_CMD:EPT_CPCR_ENALBE,EPT_CPCR_Disable
+//EPT_CPCR_Source_X:EPT_CPCR_Source_TCLK,EPT_CPCR_Source_TIN_BT0OUT,EPT_CPCR_Source_TIN_BT1OUT
+//EPT_CDUTY_X:EPT_CDUTY_7_8~EPT_CDUTY_DIS
+//EPT_CPCR_OSPWTH:0~0X1F
+//EPT_CPCR_CDIV:0~0xf
+//ReturnValue:NONE
+/*************************************************************/ 
+//Fchop=PCLK/((CDIV+1)/8)  //Carrier frequency setting (CDIV>=1)
+//Twidth=Tchop*OSPWTH //First pulse width setting  
+void EPT_CPCR_Config(EPT_CPCR_CMD_Type EPT_CPCR_CMD , EPT_CPCR_Source_Selecte_Type EPT_CPCR_Source_X , EPT_CDUTY_Type EPT_CDUTY_X , U8_T EPT_CPCR_OSPWTH , U8_T EPT_CPCR_CDIV)
+{
+	if(EPT_CPCR_Source_X==EPT_CPCR_Source_TCLK)
+	{
+		EPT0->CPCR=(EPT_CPCR_CMD<<16)|(EPT_CPCR_CDIV<<7)|(EPT_CPCR_OSPWTH<<2)|EPT_CDUTY_X|(0x00<<14);
+	}
+	else
+	{
+		EPT0->CPCR=(EPT_CPCR_CMD<<16)|(EPT_CPCR_CDIV<<7)|(EPT_CPCR_OSPWTH<<2)|EPT_CDUTY_X|(0x01<<14);
+		if(EPT_CPCR_Source_X==EPT_CPCR_Source_TIN_BT0OUT)
+		{
+			EPT0->CEDR=(EPT0->CEDR&0xffffffcf)|(0x01<<4);
+		}
+		if(EPT_CPCR_Source_X==EPT_CPCR_Source_TIN_BT1OUT)
+		{
+			EPT0->CEDR=(EPT0->CEDR&0xffffffcf)|(0x02<<4);
+		}
+	}
+}
+/*************************************************************/
+//Deinitializes the EPT DBCR Config
+//EntryParameter:EPT_CHX_Selecte,EPT_INSEL_X,EPT_OUTSEL_X,EPT_OUT_POLARITY_X,EPT_OUT_SWAP_X
+//EPT_CHX_Selecte:EPT_CHA_Selecte,EPT_CHB_Selecte,EPT_CHC_Selecte
+//EPT_INSEL_X:EPT_PWMA_RISE_FALL,EPT_PWMB_RISE_PWMA_FALL,EPT_PWMA_RISE_PWMB_FALL,EPT_PWMB_RISE_FALL
+//EPT_OUTSEL_X:EPT_OUTSEL_PWMA_PWMB_Bypass,EPT_OUTSEL_DisRise_EnFall,EPT_OUTSEL_EnRise_DisFall,EPT_OUTSEL_EnRise_EnFall
+//EPT_OUT_POLARITY_X:EPT_PA_PB_OUT_Direct,EPT_PA_OUT_Reverse,EPT_PB_OUT_Reverse,EPT_PA_PB_OUT_Reverse
+//EPT_OUT_SWAP_X:EPT_PAtoCHX_PBtoCHY,EPT_PBtoCHX_PBtoCHY,EPT_PAtoCHX_PAtoCHY,EPT_PBtoCHX_PAtoCHY
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_DBCR_Config(EPT_CHX_Selecte_Type EPT_CHX_Selecte , EPT_INSEL_Type EPT_INSEL_X , EPT_OUTSEL_Type EPT_OUTSEL_X , EPT_OUT_POLARITY_Type EPT_OUT_POLARITY_X , EPT_OUT_SWAP_Type EPT_OUT_SWAP_X)
+{	
+	if(EPT_CHX_Selecte==EPT_CHA_Selecte)
+	{
+		EPT0->DBCR=(EPT0->DBCR&0XFFFFFF00)|EPT_INSEL_X|EPT_OUTSEL_X|(EPT_OUT_POLARITY_X<<2)|(EPT_OUT_SWAP_X<<6);
+	}
+	else if(EPT_CHX_Selecte==EPT_CHB_Selecte)
+	{
+		EPT0->DBCR=(EPT0->DBCR&0XFFFF00FF)|EPT_INSEL_X|EPT_OUTSEL_X|(EPT_OUT_POLARITY_X<<10)|(EPT_OUT_SWAP_X<<14);
+	}
+	else if(EPT_CHX_Selecte==EPT_CHC_Selecte)
+	{
+		EPT0->DBCR=(EPT0->DBCR&0XFF00FFFF)|EPT_INSEL_X|EPT_OUTSEL_X|(EPT_OUT_POLARITY_X<<18)|(EPT_OUT_SWAP_X<<22);
+	}
+	EPT0->DBCR|=0x01<<24;
+}
+/*************************************************************/
+//Deinitializes the EPT DB CLK Config
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+//Fdbclk=Fhclk/(DPSC+1)
+void EPT_DB_CLK_Config(U16_T DPSC , U16_T DTR , U16_T DTF)
+{
+	EPT0->DPSCR=DPSC;
+	EPT0->DBDTR=DTR;
+	EPT0->DBDTF=DTF;
+}
+/*************************************************************/
+//Deinitializes the EPT PWMA~PWMD Control
+//EntryParameter:EPT_PWMX_Selecte,EPT_CA_Selecte_X,EPT_CB_Selecte_X,
+//EPT_PWMX_Selecte:EPT_PWMA,EPT_PWMB,EPT_PWMC,EPT_PWMD
+//EPT_CA_Selecte_X:EPT_CA_Selecte_CMPA,EPT_CA_Selecte_CMPB,EPT_CA_Selecte_CMPC,EPT_CA_Selecte_CMPD
+//EPT_CB_Selecte_X:EPT_CB_Selecte_CMPA,EPT_CB_Selecte_CMPB,EPT_CB_Selecte_CMPC,EPT_CB_Selecte_CMPD
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_PWMX_Output_Control(
+							 EPT_PWMX_Selecte_Type EPT_PWMX_Selecte ,EPT_CA_Selecte_Type EPT_CA_Selecte_X , EPT_CB_Selecte_Type EPT_CB_Selecte_X ,
+							 EPT_PWM_ZRO_Output_Type EPT_PWM_ZRO_Event_Output , EPT_PWM_PRD_Output_Type EPT_PWM_PRD_Event_Output , 
+							 EPT_PWM_CAU_Output_Type EPT_PWM_CAU_Event_Output , EPT_PWM_CAD_Output_Type EPT_PWM_CAD_Event_Output ,
+							 EPT_PWM_CBU_Output_Type EPT_PWM_CBU_Event_Output , EPT_PWM_CBD_Output_Type EPT_PWM_CBD_Event_Output ,
+							 EPT_PWM_T1U_Output_Type EPT_PWM_T1U_Event_Output , EPT_PWM_T1D_Output_Type EPT_PWM_T1D_Event_Output ,
+							 EPT_PWM_T2U_Output_Type EPT_PWM_T2U_Event_Output , EPT_PWM_T2D_Output_Type EPT_PWM_T2D_Event_Output 
+							 )
+{
+	if(EPT_PWMX_Selecte==EPT_PWMA)
+	{
+		EPT0->AQCRA=EPT_CA_Selecte_X|EPT_CB_Selecte_X|EPT_PWM_ZRO_Event_Output|EPT_PWM_PRD_Event_Output|EPT_PWM_CAU_Event_Output|EPT_PWM_CAD_Event_Output|
+					EPT_PWM_CBU_Event_Output|EPT_PWM_CBD_Event_Output|EPT_PWM_T1U_Event_Output|EPT_PWM_T1D_Event_Output|EPT_PWM_T2U_Event_Output|EPT_PWM_T2D_Event_Output;
+	}
+	else if(EPT_PWMX_Selecte==EPT_PWMB)
+	{
+		EPT0->AQCRB=EPT_CA_Selecte_X|EPT_CB_Selecte_X|EPT_PWM_ZRO_Event_Output|EPT_PWM_PRD_Event_Output|EPT_PWM_CAU_Event_Output|EPT_PWM_CAD_Event_Output|
+					EPT_PWM_CBU_Event_Output|EPT_PWM_CBD_Event_Output|EPT_PWM_T1U_Event_Output|EPT_PWM_T1D_Event_Output|EPT_PWM_T2U_Event_Output|EPT_PWM_T2D_Event_Output;
+	}
+	else if(EPT_PWMX_Selecte==EPT_PWMC)
+	{
+		EPT0->AQCRC=EPT_CA_Selecte_X|EPT_CB_Selecte_X|EPT_PWM_ZRO_Event_Output|EPT_PWM_PRD_Event_Output|EPT_PWM_CAU_Event_Output|EPT_PWM_CAD_Event_Output|
+					EPT_PWM_CBU_Event_Output|EPT_PWM_CBD_Event_Output|EPT_PWM_T1U_Event_Output|EPT_PWM_T1D_Event_Output|EPT_PWM_T2U_Event_Output|EPT_PWM_T2D_Event_Output;
+	}
+	else if(EPT_PWMX_Selecte==EPT_PWMD)
+	{
+		EPT0->AQCRD=EPT_CA_Selecte_X|EPT_CB_Selecte_X|EPT_PWM_ZRO_Event_Output|EPT_PWM_PRD_Event_Output|EPT_PWM_CAU_Event_Output|EPT_PWM_CAD_Event_Output|
+					EPT_PWM_CBU_Event_Output|EPT_PWM_CBD_Event_Output|EPT_PWM_T1U_Event_Output|EPT_PWM_T1D_Event_Output|EPT_PWM_T2U_Event_Output|EPT_PWM_T2D_Event_Output;
+	}
+	
+}
+/*************************************************************/
+//Deinitializes the EPT Tevent selecte
+//EntryParameter:EPT_T1_Selecte,EPT_T2_Selecte 
+//EPT_T1_Selecte:0->SYNCUSR4,1->EP0,2->EP1,3->EP2,4->EP3,5->EP4,6->EP5,7->EP6
+//EPT_T2_Selecte:0->SYNCUSR5,1->EP0,2->EP1,3->EP2,4->EP3,5->EP4,6->EP5,7->EP6
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_Tevent_Selecte( U8_T EPT_T1_Selecte, U8_T EPT_T2_Selecte)
+{
+	EPT0->AQTSCR=EPT_T1_Selecte|(EPT_T2_Selecte<<4);
+}
+/*************************************************************/
+//Deinitializes the EPT PHSEN Config
+//EntryParameter:EPT_PHSEN_CMD,EPT_PHSDIR,PHSR
+//EPT_PHSEN_CMD:EPT_PHSEN_EN,EPT_PHSEN_DIS
+//EPT_PHSDIR:EPT_PHSDIR_increase,EPT_PHSEN_decrease
+//PHSR:0~0xffff
+//ReturnValue:NONE
+/*************************************************************/  
+void EPT_PHSEN_Config(EPT_PHSEN_CMD_Type EPT_PHSEN_CMD , EPT_PHSDIR_Type EPT_PHSDIR , U16_T PHSR)
+{
+	EPT0->CR=(EPT0->CR&0xffffff7f)|EPT_PHSEN_CMD;
+	EPT0->PHSR=PHSR|EPT_PHSDIR;
+}
+/*************************************************************/
+//Deinitializes the EPT PRDR CMPA CMPB CMPC CMPD_Config
+//EntryParameter:EPT_PRDR_Value,EPT_CMPA_Value,EPT_CMPB_Value,EPT_CMPC_Value,EPT_CMPD_Value
+//EPT_PRDR_Value:0~0xff
+//EPT_CMPA_Value:0~0xff
+//EPT_CMPB_Value:0~0xff
+//EPT_CMPC_Value:0~0xff
+//EPT_CMPD_Value:0~0xff
+/*************************************************************/ 
+void EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(U16_T EPT_PRDR_Value , U16_T EPT_CMPA_Value , U16_T EPT_CMPB_Value , U16_T EPT_CMPC_Value , U16_T EPT_CMPD_Value)
+{
+	EPT0->PRDR=EPT_PRDR_Value;
+	EPT0->CMPA=EPT_CMPA_Value;
+	EPT0->CMPB=EPT_CMPB_Value;
+	EPT0->CMPC=EPT_CMPC_Value;
+	EPT0->CMPD=EPT_CMPD_Value;
+}
+/*************************************************************/
+//Deinitializes the EPT SYNCR Rearm
+//EntryParameter:EPT_REARMX,EPT_REARM_MODE
+//EPT_REARMX:EPT_REARM_SYNCEN0,EPT_REARM_SYNCEN1,EPT_REARM_SYNCEN2,EPT_REARM_SYNCEN3,EPT_REARM_SYNCEN4,EPT_REARM_SYNCEN5
+//ReturnValue:NONE
+/*************************************************************/  
+void EPT_SYNCR_RearmClr(EPT_REARMX_Type EPT_REARMX )
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->SYNCR = (EPT0->SYNCR&0X3FC0FFFF)|EPT_REARMX;
+}
+/*************************************************************/
+//Deinitializes the EPT Caputer Rearm
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/  
+//EPT Caputer Rearm:clear counter， enable CAPLDEN automatic
+void EPT_Caputure_Rearm(void)
+{
+	EPT0->CR=(EPT0->CR&0xfffdffff)|(0x01<<19);
+}
+/*************************************************************/
+//Deinitializes the EPT Globle Event Load
+//EntryParameter:EPT_GLDMD_Selecte_X,GLDCFG_EN,EPT_GLD_OneShot_CMD,GLDPRD_CNT
+//EPT_GLD_OneShot_CMD:EPT_GLD_OneShot_DIS,EPT_GLD_OneShot_EN
+//EPT_GLDMD_Selecte_X:EPT_GLDMD_Selecte_ZRO,EPT_GLDMD_Selecte_PRD,EPT_GLDMD_Selecte_ZRO_PRD,EPT_GLDMD_Selecte_ZRO_ExiLoad_SYNC
+//EPT_GLDMD_Selecte_PRD_ExiLoad_SYNC,EPT_GLDMD_Selecte_ZRO_PRD_ExiLoad_SYNC,
+//GLDPRD_CNT:0~7(0->Trigger immediately,1->trigger when the event happens the 2nd time,7->trigger when the event happens the 7th time)
+//GLDCFG_EN:0~0x3fff
+//ReturnValue:NONE
+/*************************************************************/  
+//PRDR/CMPA/CMPB/CMPC/CMPD/DBDTR/DBCR/AQCRA/AQCRB/AQCRD/AQCSF/EMPSR load config
+void EPT_Globle_Eventload_Config(EPT_GLD_OneShot_CMD_Type EPT_GLD_OneShot_CMD , EPT_GLDMD_Selecte_Type EPT_GLDMD_Selecte_X , U8_T GLDPRD_CNT , U16_T GLDCFG_EN)
+{
+	EPT0->GLDCR=0X01|EPT_GLD_OneShot_CMD|EPT_GLDMD_Selecte_X|(GLDPRD_CNT<<7);
+	EPT0->GLDCFG=GLDCFG_EN;
+	/*if(EPT_GLDMD_Selecte_X==EPT_GLDMD_Selecte_SW)
+	{
+		EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+		EPT0->GLDCR2=0X02;
+	}*/
+}
+/*************************************************************/
+//Deinitializes the EPT Globle SW Load
+//EntryParameter:GLDCFG_EN
+//GLDCFG_EN:0X0~0X3FFF
+//EPT_GLDMD_Selecte_X:
+/*************************************************************/ 
+//PRDR/CMPA/CMPB/CMPC/CMPD/DBDTR/DBCR/AQCRA/AQCRB/AQCRD/AQCSF/EMPSR load config
+void EPT_Globle_SwLoad_CMD(void)
+{
+	//EPT0->GLDCR=0X01|EPT_GLDMD_Selecte_SW;
+	//EPT0->GLDCFG=GLDCFG_EN;
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->GLDCR2=0X03;
+}
+/*************************************************************/
+//Deinitializes the EPT PRDR Load 
+//EntryParameter:EPT_PRDR_EventLoad_x
+//EPT_PRDR_EventLoad_x:EPT_PRDR_EventLoad_PEND,EPT_PRDR_EventLoad_ExiLoad_SYNC,EPT_PRDR_EventLoad_Zro_ExiLoad_SYNC,
+//EPT_PRDR_EventLoad_Immediate
+/*************************************************************/ 
+void EPT_PRDR_EventLoad_Config(EPT_PRDR_EventLoad_Type EPT_PRDR_EventLoad_x)
+{
+	EPT0->GLDCR&=0XFFFFFFFE;	//Use independent configurations
+	EPT0->CR=(EPT0->CR&0xffffffcf)|EPT_PRDR_EventLoad_x;
+}
+/*************************************************************/
+//Deinitializes the EPT CMPX Load Config
+//EntryParameter:EPT_CMPX_EventLoad_x
+//EPT_CMPX_EventLoad_x:EPT_CMPX_EventLoad_DIS,EPT_CMPX_EventLoad_Immediate,EPT_CMPX_EventLoad_ZRO,
+//EPT_CMPX_EventLoad_PRD,EPT_CMPX_EventLoad_ExiLoad_SYNC
+/*************************************************************/ 
+//Unified load register:CMPA,CMPB,CMPC,CMPD
+void EPT_CMP_EventLoad_Config(EPT_CMPX_EventLoad_Type EPT_CMPX_EventLoad_x)
+{
+	EPT0->GLDCR&=0XFFFFFFFE;		//Use independent configurations
+	if(EPT_CMPX_EventLoad_x==EPT_CMPX_EventLoad_DIS)
+	{
+		EPT0->CMPLDR=0;
+	}
+	else if(EPT_CMPX_EventLoad_x==EPT_CMPX_EventLoad_Immediate)
+	{
+		EPT0->CMPLDR=0xf;
+	}
+	else if(EPT_CMPX_EventLoad_x==EPT_CMPX_EventLoad_ZRO)
+	{
+		EPT0->CMPLDR=0x2410;	
+	}
+	else if(EPT_CMPX_EventLoad_x==EPT_CMPX_EventLoad_PRD)
+	{
+		EPT0->CMPLDR=0x4920;
+	}
+	else if(EPT_CMPX_EventLoad_x==EPT_CMPX_EventLoad_ExiLoad_SYNC)
+	{
+		EPT0->CMPLDR=0x8240;
+	}
+}
+/*************************************************************/
+//Deinitializes the EPT AQCRX Load Config
+//EntryParameter:EPT_AQCRX_EventLoad_X
+//EPT_AQCRX_EventLoad_X:EPT_AQCRX_EventLoad_DIS,EPT_AQCRX_EventLoad_Immediate,EPT_AQCRX_EventLoad_ZRO,
+//EPT_AQCRX_EventLoad_PRD,EPT_AQCRX_EventLoad_ExiLoad_SYNC
+/*************************************************************/ 
+//Unified load register:AQCRA,AQCRB,AQCRC,AQCRD
+void EPT_AQCR_Eventload_Config(EPT_AQCRX_EventLoad_Type EPT_AQCRX_EventLoad_X)
+{
+	EPT0->GLDCR&=0XFFFFFFFE;		//Use independent configurations
+	if(EPT_AQCRX_EventLoad_X==EPT_AQCRX_EventLoad_DIS)
+	{
+		EPT0->AQLDR=0;
+	}
+	else if(EPT_AQCRX_EventLoad_X==EPT_AQCRX_EventLoad_Immediate)
+	{
+		EPT0->AQLDR=0x303;
+	}
+	else if(EPT_AQCRX_EventLoad_X==EPT_AQCRX_EventLoad_ZRO)
+	{
+		EPT0->AQLDR=0x2424;	
+	}
+	else if(EPT_AQCRX_EventLoad_X==EPT_AQCRX_EventLoad_PRD)
+	{
+		EPT0->AQLDR=0x4848;
+	}
+	else if(EPT_AQCRX_EventLoad_X==EPT_AQCRX_EventLoad_ExiLoad_SYNC)
+	{
+		EPT0->AQLDR=0x9090;
+	}
+}
+/*************************************************************/
+//Deinitializes the EPT DB Load Config
+//EntryParameter:EPT_DB_EventLoad_X
+//EPT_DB_EventLoad_X:EPT_DB_EventLoad_DIS,EPT_DB_EventLoad_Immediate,EPT_DB_EventLoad_ZRO,
+//EPT_DB_EventLoad_PRD,EPT_DB_EventLoad_ZRO_PRD
+/*************************************************************/ 
+//Unified load register:DBCR,DBDTR,DBDTF,DPSCR
+void EPT_DB_Eventload_Config(EPT_DB_EventLoad_Type EPT_DB_EventLoad_X)
+{
+	EPT0->GLDCR&=0XFFFFFFFE;		//Use independent configurations
+	if(EPT_DB_EventLoad_X==EPT_DB_EventLoad_DIS)
+	{
+		EPT0->DBLDR=0X249;
+	}
+	else if(EPT_DB_EventLoad_X==EPT_DB_EventLoad_Immediate)
+	{
+		EPT0->DBLDR=0;
+	}
+	else if(EPT_DB_EventLoad_X==EPT_DB_EventLoad_ZRO)
+	{
+		EPT0->DBLDR=0X249|(0X01<<1)|(0X01<<4)|(0X01<<7)|(0X01<<10);
+	}
+	else if(EPT_DB_EventLoad_X==EPT_DB_EventLoad_PRD)
+	{
+		EPT0->DBLDR=0X249|(0X02<<1)|(0X02<<4)|(0X02<<7)|(0X02<<10);
+	}
+	else if(EPT_DB_EventLoad_X==EPT_DB_EventLoad_ZRO_PRD)
+	{
+		EPT0->DBLDR=0X249|(0X03<<1)|(0X03<<4)|(0X03<<7)|(0X03<<10);
+	}
+}
+/*************************************************************/
+//EPT EVTRG Config
+//EntryParameter:EPT_TRGSRCX_Select,EPT_EVTRG_TRGSRCX_X,EPT_TRGSRCX_CMD,TRGEVXPRD
+//EPT_TRGSRCX_Select:EPT_TRGSRC0,EPT_TRGSRC1,EPT_TRGSRC2,EPT_TRGSRC3
+//EPT_EVTRG_TRGSRCX_X:
+//EPT_TRGSRCX_CMD:
+//TRGEVXPRD:0~0xf
+//ReturnValue: NONE
+/*************************************************************/
+void EPT_TRGSRCX_Config(EPT_TRGSRCX_Select_Type EPT_TRGSRCX_Select , EPT_EVTRG_TRGSRCX_TypeDef EPT_EVTRG_TRGSRCX_X , EPT_TRGSRCX_CMD_TypeDef EPT_TRGSRCX_CMD , U8_T TRGEVXPRD)
+{
+	if(EPT_TRGSRCX_Select==EPT_TRGSRC0)
+	{
+		EPT0->EVTRG=(EPT0->EVTRG&0xffeffff0)|(EPT_EVTRG_TRGSRCX_X<<0)|(EPT_TRGSRCX_CMD<<20);
+	}
+	else if(EPT_TRGSRCX_Select==EPT_TRGSRC1)
+	{
+		EPT0->EVTRG=(EPT0->EVTRG&0xffdfff0f)|(EPT_EVTRG_TRGSRCX_X<<4)|(EPT_TRGSRCX_CMD<<21);
+	}
+	else if(EPT_TRGSRCX_Select==EPT_TRGSRC2)
+	{
+		EPT0->EVTRG=(EPT0->EVTRG&0xffbff0ff)|(EPT_EVTRG_TRGSRCX_X<<8)|(EPT_TRGSRCX_CMD<<22);
+	}
+	else if(EPT_TRGSRCX_Select==EPT_TRGSRC3)
+	{
+		EPT0->EVTRG=(EPT0->EVTRG&0xff7f0fff)|(EPT_EVTRG_TRGSRCX_X<<12)|(EPT_TRGSRCX_CMD<<23);
+	}
+	EPT0->EVTRG|=0x0f0f0000;
+}
+/*************************************************************/
+//EPT EVTRG SWFTRG
+//EntryParameter:EPT_TRGSRCX_Select
+//EPT_TRGSRCX_Select:EPT_TRGSRC0,EPT_TRGSRC1,EPT_TRGSRC2,EPT_TRGSRC3
+//ReturnValue: NONE
+/*************************************************************/
+void EPT_TRGSRCX_SWFTRG(EPT_TRGSRCX_Select_Type EPT_TRGSRCX_Select)
+{
+	if(EPT_TRGSRCX_Select==EPT_TRGSRC0)
+	{
+		EPT0->EVSWF|=0X01;
+	}
+	else if(EPT_TRGSRCX_Select==EPT_TRGSRC1)
+	{
+		EPT0->EVSWF|=0X02;
+	}
+	else if(EPT_TRGSRCX_Select==EPT_TRGSRC2)
+	{
+		EPT0->EVSWF|=0X04;
+	}
+	else if(EPT_TRGSRCX_Select==EPT_TRGSRC3)
+	{
+		EPT0->EVSWF|=0X08;
+	}
+}
+/*************************************************************/
+//EPT INT ENABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void EPT_Int_Enable(EPT_INT_TypeDef EPT_X_INT)
+{
+	EPT0->ICR 	= EPT_X_INT;							//clear LVD INT status
+	EPT0->IMCR  |= EPT_X_INT;
+}
+/*************************************************************/
+//EPT INT DISABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void EPT_Int_Disable(EPT_INT_TypeDef EPT_X_INT)
+{
+	EPT0->IMCR  &= ~EPT_X_INT;
+}
+/*************************************************************/
+//EPT EMINT ENABLE.
+//EntryParameter:EPT_X_EMINT
+//EPT_X_EMINT:EPT_EP0_EMINT~EPT_EP7_EMINT,EPT_CPU_FAULT_EMINT,EPT_MEM_FAULT_EMINT,EPT_EOM_FAULT_EMINT
+//ReturnValue: NONE
+/*************************************************************/
+void EPT_EMInt_Enable(EPT_EMINT_TypeDef EPT_X_EMINT)
+{
+	EPT0->EMICR = EPT_X_EMINT;							//clear LVD INT status
+	EPT0->EMIMCR  |= EPT_X_EMINT;
+}
+/*************************************************************/
+//EPT EMINT DISABLE.
+//EntryParameter:EPT_X_EMINT
+//EPT_X_EMINT:EPT_EP0_EMINT~EPT_EP7_EMINT,EPT_CPU_FAULT_EMINT,EPT_MEM_FAULT_EMINT,EPT_EOM_FAULT_EMINT
+//ReturnValue: NONE
+/*************************************************************/
+void EPT_EMInt_Disable(EPT_EMINT_TypeDef EPT_X_EMINT)
+{
+	EPT0->EMIMCR  &= ~EPT_X_EMINT;
+}
+/*************************************************************/
+//EPT INT VECTOR enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_Vector_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EPT0_INT);    
+}
+/*************************************************************/
+//EPT INT VECTOR disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_Vector_Int_Disable(void)
+{
+    INTC_ICER_WRITE(EPT0_INT);    
+}
+/*************************************************************/
+//Deinitializes the EPT EP0~EP7 Config
+//EntryParameter:EPT_EPX,EPT_Input_selecte_x,EPT_FLT_PACE0_x,EPT_FLT_PACE1_x,EPT_EPIX_POL
+//EPT_EPX:EPT_EP0,EPT_EP1,EPT_EP2,EPT_EP3,EPT_EP4,EPT_EP5,EPT_EP6,EPT_EP7
+//EPT_Input_selecte_x:EPT_Input_selecte_EPI0~EPT_Input_selecte_EPI5,EPT_Input_selecte_ORL0,EPT_Input_selecte_ORL1
+//EPT_FLT_PACE0_x:EPT_FLT_PACE0_DIS~EPT_FLT_PACE0_4CLK(EP0~EP3)
+//EPT_FLT_PACE1_x:EPT_FLT_PACE1_DIS~EPT_FLT_PACE1_4CLK(EP4~EP7)
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_EPX_Config(EPT_EPX_Type EPT_EPX , EPT_Input_selecte_Type EPT_Input_selecte_x , EPT_FLT_PACE0_Type EPT_FLT_PACE0_x , EPT_FLT_PACE1_Type EPT_FLT_PACE1_x , U8_T ORL0_EPIx , U8_T ORL1_EPIx)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	if(EPT_EPX==EPT_EP0)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XFFFFFFF0)|(EPT_Input_selecte_x<<0);
+	}
+	else if(EPT_EPX==EPT_EP1)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XFFFFFF0F)|(EPT_Input_selecte_x<<4);
+	}
+	else if(EPT_EPX==EPT_EP2)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XFFFFF0FF)|(EPT_Input_selecte_x<<8);
+	}
+	else if(EPT_EPX==EPT_EP3)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XFFFF0FFF)|(EPT_Input_selecte_x<<12);
+	}
+	else if(EPT_EPX==EPT_EP4)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XFFF0FFFF)|(EPT_Input_selecte_x<<16);
+	}
+	else if(EPT_EPX==EPT_EP5)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XFF0FFFFF)|(EPT_Input_selecte_x<<20);
+	}
+	else if(EPT_EPX==EPT_EP6)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0XF0FFFFFF)|(EPT_Input_selecte_x<<24);
+	}
+	else if(EPT_EPX==EPT_EP7)
+	{
+		EPT0->EMSRC=(EPT0->EMSRC&0X0FFFFFFF)|(EPT_Input_selecte_x<<28);
+	}
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->EMSRC2=ORL0_EPIx|(ORL1_EPIx<<16)|EPT_FLT_PACE0_x|EPT_FLT_PACE1_x;
+}
+/*************************************************************/
+//Deinitializes EPT_EPIX POL Config
+//EntryParameter:EPT_EPIX_POL
+//EPT_EPIX_POL:BIT0->EPI0(0:Active high 1:Active low),BIT1->EPI1(0:Active high 1:Active low),
+//BIT2->EPI2(0:Active high 1:Active low),BIT3->EPI3(0:Active high 1:Active low),BIT4->EPI4(0:Active high 1:Active low)
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_EPIX_POL_Config(U8_T EPT_EPIX_POL)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->EMPOL=EPT_EPIX_POL;
+}
+/*************************************************************/
+//EPT EM Config
+//EntryParameter:EPT_LKCR_TRG_X,EPT_LKCR_Mode_X
+//EPT_LKCR_TRG_X:EPT_LKCR_TRG_EP0~EPT_LKCR_TRG_EP7,EPT_LKCR_TRG_CPU_FAULT,EPT_LKCR_TRG_MEM_FAULT,EPT_LKCR_TRG_EOM_FAULT
+//EPT_LKCR_Mode_X:EPT_LKCR_Mode_LOCK_DIS,EPT_LKCR_Mode_SLOCK_EN,EPT_LKCR_Mode_HLOCK_EN,EPT_LKCR_TRG_X_FAULT_HLOCK_EN,EPT_LKCR_TRG_X_FAULT_HLOCK_DIS
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_LKCR_TRG_Config(EPT_LKCR_TRG_Source_Type EPT_LKCR_TRG_X , EPT_LKCR_Mode_Type EPT_LKCR_Mode_X)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->EMECR|=(0X01<<21)|(0X01<<22)|(0X02<<24);			//EMOSR CNT=ZRO load，Automatically clear soft lock when CNT=ZRO&PRD
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	if(EPT_LKCR_TRG_X==EPT_LKCR_TRG_CPU_FAULT)
+	{
+		if(EPT_LKCR_Mode_X==EPT_LKCR_TRG_X_FAULT_HLOCK_EN)
+		{
+			EPT0->EMECR|=(0x01<<28);
+		}
+		else if(EPT_LKCR_Mode_X==EPT_LKCR_TRG_X_FAULT_HLOCK_DIS)
+		{
+			EPT0->EMECR&=~(0x01<<28);
+		}
+	}
+	else if(EPT_LKCR_TRG_X==EPT_LKCR_TRG_MEM_FAULT)
+	{
+		if(EPT_LKCR_Mode_X==EPT_LKCR_TRG_X_FAULT_HLOCK_EN)
+		{
+			EPT0->EMECR|=(0x01<<29);
+		}
+		else if(EPT_LKCR_Mode_X==EPT_LKCR_TRG_X_FAULT_HLOCK_DIS)
+		{
+			EPT0->EMECR&=~(0x01<<29);
+		}
+	}
+	else if(EPT_LKCR_TRG_X==EPT_LKCR_TRG_EOM_FAULT)
+	{
+		if(EPT_LKCR_Mode_X==EPT_LKCR_TRG_X_FAULT_HLOCK_EN)
+		{
+			EPT0->EMECR|=(0x01<<30);
+		}
+		else if(EPT_LKCR_Mode_X==EPT_LKCR_TRG_X_FAULT_HLOCK_DIS)
+		{
+			EPT0->EMECR&=~(0x01<<30);
+		}
+	}
+	else
+	{
+		EPT0->EMECR|=(EPT_LKCR_Mode_X<<(EPT_LKCR_TRG_X))|(0X01<<26);
+	}
+}
+/*************************************************************/
+//EPT EM Config
+//EntryParameter:EPT_OUTPUT_Channel_X,EPT_SHLOCK_OUTPUT_X
+//EPT_OUTPUT_Channel_X:EPT_OUTPUT_Channel_CHAX,EPT_OUTPUT_Channel_CHAY,EPT_OUTPUT_Channel_CHBX,EPT_OUTPUT_Channel_CHBY
+//EPT_OUTPUT_Channel_CHCX,EPT_OUTPUT_Channel_CHCY,EPT_OUTPUT_Channel_CHD
+//EPT_SHLOCK_OUTPUT_X:EPT_SHLOCK_OUTPUT_HImpedance,EPT_SHLOCK_OUTPUT_High,EPT_SHLOCK_OUTPUT_Low,EPT_SHLOCK_OUTPUT_Nochange
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_SHLOCK_OUTPUT_Config(EPT_OUTPUT_Channel_Type EPT_OUTPUT_Channel_X , EPT_SHLOCK_OUTPUT_Statue_Type EPT_SHLOCK_OUTPUT_X)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->EMOSR|=EPT_SHLOCK_OUTPUT_X<<EPT_OUTPUT_Channel_X;
+}
+/*************************************************************/
+//EPT software lock clr
+//EntryParameter:EPT_X_EMINT
+//EPT_X_EMINT:EPT_EP0_EMINT~EPT_EP7_EMINT,EPT_CPU_FAULT_EMINT,EPT_MEM_FAULT_EMINT,EPT_EOM_FAULT_EMINT
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_SLock_CLR(EPT_EMINT_TypeDef EPT_X_EMINT)
+{
+	EPT0->EMSLCLR|=EPT_X_EMINT;
+}
+/*************************************************************/
+//EPT H lock clr
+//EntryParameter:EPT_X_EMINT
+//EPT_X_EMINT:EPT_EP0_EMINT~EPT_EP7_EMINT,EPT_CPU_FAULT_EMINT,EPT_MEM_FAULT_EMINT,EPT_EOM_FAULT_EMINT
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_HLock_CLR(EPT_EMINT_TypeDef EPT_X_EMINT)
+{
+	EPT0->EMHLCLR|=EPT_X_EMINT;
+}
+/*************************************************************/
+//EPT software lock SET
+//EntryParameter:EPT_X_EMINT
+//EPT_X_EMINT:EPT_EP0_EMINT~EPT_EP7_EMINT,EPT_CPU_FAULT_EMINT,EPT_MEM_FAULT_EMINT,EPT_EOM_FAULT_EMINT
+//ReturnValue:NONE
+/*************************************************************/
+void EPT_SW_Set_lock(EPT_EMINT_TypeDef EPT_X_EMINT)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+	EPT0->EMFRCR|=EPT_X_EMINT;
+}
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_et.c b/Source/FWlib/apt32f102_et.c
new file mode 100644
index 0000000..f633abc
--- /dev/null
+++ b/Source/FWlib/apt32f102_et.c
@@ -0,0 +1,274 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_et.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+  
+  /* Includes ------------------------------------------------------------------*/
+#include "apt32f102_et.h"
+
+
+/*************************************************************/
+//ET RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void ET_DeInit(void)
+{
+	ETCB->EN 			= ET_RESET_VALUE;
+	ETCB->SWTRG 		= ET_RESET_VALUE;
+	ETCB->CH0CON0 		= ET_RESET_VALUE;
+	ETCB->CH0CON1	  	= ET_RESET_VALUE;
+	ETCB->CH1CON0 		= ET_RESET_VALUE;
+	ETCB->CH1CON1 		= ET_RESET_VALUE;
+	ETCB->CH2CON0 		= ET_RESET_VALUE;
+	ETCB->CH2CON1 		= ET_RESET_VALUE;
+	ETCB->CH3CON	 	= ET_RESET_VALUE;
+	ETCB->CH4CON	 	= ET_RESET_VALUE;
+	ETCB->CH5CON	 	= ET_RESET_VALUE;
+	ETCB->CH6CON	 	= ET_RESET_VALUE;
+	ETCB->CH7CON	 	= ET_RESET_VALUE;
+}
+/*************************************************************/
+//ET ENABLE
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_ENABLE(void)
+{
+	ETCB->EN	=	0x01;
+}
+/*************************************************************/
+//ET DISABLE
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_DISABLE(void)
+{
+	ETCB->EN	=	0x00;
+}
+/*************************************************************/
+//ET SWTRG Configure
+//EntryParameter:ETSWTRG_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_SWTRG_CMD(CRC_ETSWTRG_TypeDef ETSWTRG_X,FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		ETCB->SWTRG  |= ETSWTRG_X;						
+	}
+	else
+	{
+		ETCB->SWTRG  &= ~ETSWTRG_X;					
+	}
+}
+/*************************************************************/
+//ET CH0 source selection Configure
+//EntryParameter:ETSWTRG_X,NewState,SRCSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CH0_SRCSEL(CRC_ESRCSEL_TypeDef ESRCSEL_X,FunctionalStatus NewState,U8_T SRCSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		if(ESRCSEL_X==0)
+		{
+			ETCB->CH0CON0  |= 0X01| (SRCSEL_X<<1);
+		}
+		if(ESRCSEL_X==1)
+		{
+			ETCB->CH0CON0  |= (0X01<<10)| (SRCSEL_X<<11);
+		}
+		if(ESRCSEL_X==2)
+		{
+			ETCB->CH0CON0  |= (0X01<<20)| (SRCSEL_X<<21);
+		}
+	}
+	else
+	{
+		if(ESRCSEL_X==0)
+		{
+			ETCB->CH0CON0  &= 0X01| (SRCSEL_X<<1);
+		}
+		if(ESRCSEL_X==1)
+		{
+			ETCB->CH0CON0  &= (0X00<<10)| (SRCSEL_X<<11);
+		}
+		if(ESRCSEL_X==2)
+		{
+			ETCB->CH0CON0  &= (0X00<<20)| (SRCSEL_X<<21);
+		}				
+	}
+}
+/*************************************************************/
+//ET CHO CONTROL Configure
+//EntryParameter:NewState,TRIGMODEX,DSTSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CH0_CONTROL(FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T DSTSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		ETCB->CH0CON1  |= 0x01| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	else
+	{
+		ETCB->CH0CON1  &= 0x00| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	
+}
+/*************************************************************/
+//ET CHI1 source selection Configure
+//EntryParameter:ETSWTRG_X,NewState,SRCSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CH1_SRCSEL(CRC_DSTSEL_TypeDef DST_X,FunctionalStatus NewState,U8_T DSTSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		if(DST_X==0)
+		{
+			ETCB->CH1CON0  |= 0X01| (DSTSEL_X<<1);
+		}
+		if(DST_X==1)
+		{
+			ETCB->CH1CON0  |= (0X01<<10)| (DSTSEL_X<<11);
+		}
+		if(DST_X==2)
+		{
+			ETCB->CH1CON0  |= (0X01<<20)| (DSTSEL_X<<21);
+		}
+	}
+	else
+	{
+		if(DST_X==0)
+		{
+			ETCB->CH1CON0  &= 0X01| (DSTSEL_X<<1);
+		}
+		if(DST_X==1)
+		{
+			ETCB->CH1CON0  &= (0X00<<10)| (DSTSEL_X<<11);
+		}
+		if(DST_X==2)
+		{
+			ETCB->CH1CON0  &= (0X00<<20)| (DSTSEL_X<<21);
+		}				
+	}
+}
+/*************************************************************/
+//ET CH1 CONTROL Configure
+//EntryParameter:NewState,TRIGMODEX,SRCSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CH1_CONTROL(FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T DSTSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		ETCB->CH1CON1  |= 0x01| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	else
+	{
+		ETCB->CH1CON1  &= 0x00| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	
+}
+/*************************************************************/
+//ET CHI2 source selection Configure
+//EntryParameter:ETSWTRG_X,NewState,SRCSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CH2_SRCSEL(CRC_DSTSEL_TypeDef DST_X,FunctionalStatus NewState,U8_T DSTSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		if(DST_X==0)
+		{
+			ETCB->CH2CON0  |= 0X01| (DSTSEL_X<<1);
+		}
+		if(DST_X==1)
+		{
+			ETCB->CH2CON0  |= (0X01<<10)| (DSTSEL_X<<11);
+		}
+		if(DST_X==2)
+		{
+			ETCB->CH2CON0  |= (0X01<<20)| (DSTSEL_X<<21);
+		}
+	}
+	else
+	{
+		if(DST_X==0)
+		{
+			ETCB->CH2CON0  &= 0X01| (DSTSEL_X<<1);
+		}
+		if(DST_X==1)
+		{
+			ETCB->CH2CON0  &= (0X00<<10)| (DSTSEL_X<<11);
+		}
+		if(DST_X==2)
+		{
+			ETCB->CH2CON0  &= (0X00<<20)| (DSTSEL_X<<21);
+		}				
+	}
+}
+/*************************************************************/
+//ET CH2 CONTROL Configure
+//EntryParameter:NewState,TRIGMODEX,SRCSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CH2_CONTROL(FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T DSTSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		ETCB->CH2CON1  |= 0x01| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	else
+	{
+		ETCB->CH2CON1  &= 0x00| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	
+}
+/*************************************************************/
+//ET CH3~7 source selection/CONTROL Configure
+//EntryParameter:NewState,TRIGMODEX,SRCSEL_X
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void ET_CHx_CONTROL(CRC_ETCHX_TypeDef ETCHX,FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T SRCSEL_X,U8_T DSTSEL_X)
+{
+	if (NewState != DISABLE)
+	{
+		if(ETCHX==0)ETCB->CH3CON  |= 0x01|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==1)ETCB->CH4CON  |= 0x01|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==2)ETCB->CH5CON  |= 0x01|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==3)ETCB->CH6CON  |= 0x01|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==4)ETCB->CH7CON  |= 0x01|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+	else
+	{
+		if(ETCHX==0)ETCB->CH3CON  &= 0x00|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==1)ETCB->CH4CON  &= 0x00|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==2)ETCB->CH5CON  &= 0x00|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==3)ETCB->CH6CON  &= 0x00|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+		if(ETCHX==4)ETCB->CH7CON  &= 0x00|(SRCSEL_X<<12)| (DSTSEL_X<<26)| TRIGMODEX;
+	}
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_gpio.c b/Source/FWlib/apt32f102_gpio.c
new file mode 100644
index 0000000..15c6744
--- /dev/null
+++ b/Source/FWlib/apt32f102_gpio.c
@@ -0,0 +1,508 @@
+/*
+  ******************************************************************************
+  * @file    main.c
+  * @author  APT AE Team
+  * @version V1.10
+  * @date    2021/08/25
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_gpio.h"
+
+/* define --------------------------------------------------------------------*/
+
+/* externs--------------------------------------------------------------------*/
+/*************************************************************/
+//IO RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_DeInit(void)
+{
+    GPIOA0->CONLR &= 0xFF000000;                     
+    GPIOA0->CONHR = GPIO_RESET_VALUE;
+    GPIOB0->CONLR = GPIO_RESET_VALUE;                     
+    GPIOB0->CONHR = GPIO_RESET_VALUE;
+    GPIOA0->WODR  = GPIO_RESET_VALUE; 
+    GPIOB0->WODR  = GPIO_RESET_VALUE;
+    GPIOA0->SODR  = GPIO_RESET_VALUE; 
+    GPIOB0->SODR  = GPIO_RESET_VALUE;
+    GPIOA0->CODR  = GPIO_RESET_VALUE; 
+    GPIOB0->CODR  = GPIO_RESET_VALUE;
+	GPIOA0->ODSR  =	GPIO_RESET_VALUE;
+	GPIOB0->ODSR  =	GPIO_RESET_VALUE;
+	GPIOA0->PSDR  =	GPIO_RESET_VALUE;
+	GPIOB0->PSDR  =	GPIO_RESET_VALUE;
+	GPIOA0->FLTEN = 0xffff;
+	GPIOB0->FLTEN = 0x3f;
+    GPIOA0->PUDR  = GPIO_RESET_VALUE; 
+    GPIOB0->PUDR  = GPIO_RESET_VALUE;
+    GPIOA0->DSCR  = GPIO_RESET_VALUE;
+    GPIOB0->DSCR  = GPIO_RESET_VALUE;
+	GPIOA0->OMCR  = GPIO_RESET_VALUE;
+    GPIOB0->OMCR  = GPIO_RESET_VALUE;
+    GPIOA0->IECR  = GPIO_RESET_VALUE;
+    GPIOB0->IECR  = GPIO_RESET_VALUE;
+    GPIOGRP->IGRPL  = GPIO_RESET_VALUE;
+	GPIOGRP->IGRPH  = GPIO_RESET_VALUE;
+	GPIOGRP->IGREX  = GPIO_RESET_VALUE;
+	GPIOGRP->IO_CLKEN = 0xf;
+}  
+/*************************************************************/
+//IO OUTPUT INPUT SET 2
+//EntryParameter:GPIOx,byte,val
+//GPIOx:GPIOA0,GPIOB0
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//val:0x0000000~0xFFFFFFFF
+//val=0x11111111 all IO as input
+//val=0x22222222 all IO as output
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init2(CSP_GPIO_T *GPIOx,GPIO_byte_TypeDef byte,uint32_t val)
+{
+    if (byte==0)
+    {
+        (GPIOx)->CONLR=val;
+    }
+    else if(byte==1)
+    {
+        (GPIOx)->CONHR=val;
+    }
+}
+/*************************************************************/
+//IO OUTPUT INPUT SET 1
+//EntryParameter:GPIOx,GPIO_Pin(0~15),byte,Dir
+//GPIOx:GPIOA0,GPIOB0
+//GPIO_Pin:PIN_0~15
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    {
+    switch (PinNum)
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+        }
+    }
+    else if (PinNum<16)
+    {
+        switch (PinNum)
+    {
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    } 
+      if (Dir)
+        {
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+        }
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+/*************************************************************/
+//IO OUTPUT INPUT Disable
+//EntryParameter:GPIOx,GPIO_Pin(0~15)
+//GPIOx:GPIOA0,GPIOB0
+//GPIO_Pin:PIN_0~15
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_InPutOutPut_Disable(CSP_GPIO_T *GPIOx,uint8_t PinNum)
+{
+    uint32_t data_temp;
+    if(PinNum<8)
+    {
+    switch (PinNum)
+    {
+        case 0:data_temp=0xfffffff0;break;
+        case 1:data_temp=0xffffff0f;break;
+        case 2:data_temp=0xfffff0ff;break;
+        case 3:data_temp=0xffff0fff;break;
+        case 4:data_temp=0xfff0ffff;break;
+        case 5:data_temp=0xff0fffff;break;
+        case 6:data_temp=0xf0ffffff;break;
+        case 7:data_temp=0x0fffffff;break;
+    }
+         (GPIOx)->CONLR = (GPIOx)->CONLR & data_temp;
+    }
+    else if (PinNum<16)
+    {
+        switch (PinNum)
+    {
+        case 8:data_temp=0xfffffff0;break;
+        case 9:data_temp=0xffffff0f;break;
+        case 10:data_temp=0xfffff0ff;break;
+        case 11:data_temp=0xffff0fff;break;
+        case 12:data_temp=0xfff0ffff;break;
+        case 13:data_temp=0xff0fffff;break;
+        case 14:data_temp=0xf0ffffff;break;
+        case 15:data_temp=0x0fffffff;break;
+    } 
+         (GPIOx)->CONHR = (GPIOx)->CONHR & data_temp;    
+    }
+}
+/*************************************************************/
+//IO OUTPUT INPUT SET
+//EntryParameter:IO_MODE,GPIOx,val
+//GPIOx:GPIOA0,GPIOB0
+//IO_MODE:PUDR(IO PULL HIGH/LOW)
+//IO_MODE:DSCR(IO DRIVE STRENGHT)
+//IO_MODE:OMCR(OUTPUT MODE SET)
+//IO_MODE:IECR(IO INT ENABLE)
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_MODE_Init(CSP_GPIO_T *GPIOx,GPIO_Mode_TypeDef IO_MODE,uint32_t val)
+{
+        switch (IO_MODE)
+        {
+            case PUDR:(GPIOx)->PUDR  = val;break;               
+            case DSCR:(GPIOx)->DSCR  = val;break;
+            case OMCR:(GPIOx)->OMCR  = val;break;
+            case IECR:(GPIOx)->IECR  = val;break;
+        }
+}
+/*************************************************************/
+//Write GPIO pull high/low
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+}
+void GPIO_PullLow_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x02<<(bit*2));
+}
+void GPIO_PullHighLow_DIS(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = ((GPIOx)->PUDR) & ~(0x03<<(bit*2));
+}
+/*************************************************************/
+//Write GPIO open drain init
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_OpenDrain_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->OMCR  = ((GPIOx)->OMCR) | (0x01<<bit);
+}
+void GPIO_OpenDrain_DIS(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->OMCR  = ((GPIOx)->OMCR) & ~(0x01<<bit);
+}
+/*************************************************************/
+//Write GPIO open drain init
+//EntryParameter:GPIOx,uint8_t bit,INPUT_MODE_SETECTED_X
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//INPUT_MODE_SETECTED_X:INPUT_MODE_TTL1,INPUT_MODE_SETECTED_TTL2,INPUT_MODE_SETECTED_CMOSS
+//ReturnValue:VALUE
+/*************************************************************/
+//默认cmos口
+void GPIO_TTL_COSM_Selecte(CSP_GPIO_T *GPIOx,uint8_t bit,INPUT_MODE_SETECTED_TypeDef INPUT_MODE_SETECTED_X)
+{
+	if(INPUT_MODE_SETECTED_X==INPUT_MODE_SETECTED_CMOS)
+	{
+		(GPIOx)->DSCR  = ((GPIOx)->DSCR) & ~(0x01<<(bit*2+1));
+	}
+	else
+	{
+		(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2+1));
+		if(INPUT_MODE_SETECTED_X==INPUT_MODE_SETECTED_TTL1)
+		{
+			(GPIOx)->OMCR  = ((GPIOx)->OMCR) | (0x01<<(bit+16));
+		}
+		else if(INPUT_MODE_SETECTED_X==INPUT_MODE_SETECTED_TTL2)
+		{
+			(GPIOx)->OMCR  = ((GPIOx)->OMCR) & ~(0x01<<(bit+16));
+		}
+	}
+}
+/*************************************************************/
+//Write GPIO Drive Strength init
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+}
+void GPIO_DriveStrength_DIS(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) & ~(0x01<<(bit*2));
+}
+/*************************************************************/
+//IO OUTPUT INPUT SET
+//EntryParameter:
+//IO_MODE:IGRP(IO INT GROUP)
+//PinNum：0~15
+//SYSCON_EXIPIN_TypeDef:EXI_PIN0~EXI_PIN19
+//EXI0~EXI15:GPIOA0,GPIOB0
+//EXI16~EXI17:GPIOA0.0~GPIOA0.7
+//EXI18~EXI19:GPIOB0.0~GPIOB0.3
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_IntGroup_Set(GPIO_Group_TypeDef IO_MODE , uint8_t PinNum , GPIO_EXIPIN_TypeDef Selete_EXI_x)
+{
+	volatile unsigned int  R_data_temp;
+    volatile unsigned char R_GPIO_Pin;
+	if(Selete_EXI_x<16)
+	{
+		if((Selete_EXI_x==0)||(Selete_EXI_x==8))
+		{
+			R_data_temp=0xfffffff0;
+			R_GPIO_Pin=0;
+		}
+		else if((Selete_EXI_x==1)||(Selete_EXI_x==9))
+		{
+			R_data_temp=0xffffff0f;
+			R_GPIO_Pin=4;
+		}
+		else if((Selete_EXI_x==2)||(Selete_EXI_x==10))
+		{
+			R_data_temp=0xfffff0ff;
+			R_GPIO_Pin=8;
+		}
+		else if((Selete_EXI_x==3)||(Selete_EXI_x==11))
+		{
+			R_data_temp=0xffff0fff;
+			R_GPIO_Pin=12;
+		}
+		else if((Selete_EXI_x==4)||(Selete_EXI_x==12))
+		{
+			R_data_temp=0xfff0ffff;
+			R_GPIO_Pin=16;
+		}
+		else if((Selete_EXI_x==5)||(Selete_EXI_x==13))
+		{
+			R_data_temp=0xff0fffff;
+			R_GPIO_Pin=20;
+		}
+		else if((Selete_EXI_x==6)||(Selete_EXI_x==14))
+		{
+			R_data_temp=0xf0ffffff;
+			R_GPIO_Pin=24;
+		}
+		else if((Selete_EXI_x==7)||(Selete_EXI_x==15))
+		{
+			R_data_temp=0x0fffffff;
+			R_GPIO_Pin=28;
+		}
+		if(Selete_EXI_x<8)
+		{
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+		}
+		else if((Selete_EXI_x<16)&&(Selete_EXI_x>=8))
+		{
+			GPIOGRP->IGRPH =(GPIOGRP->IGRPH & R_data_temp) | (IO_MODE<<R_GPIO_Pin);    
+		}
+	}
+	else if(Selete_EXI_x<20)
+	{
+		if((IO_MODE==0)&&((Selete_EXI_x==16)||((Selete_EXI_x==17))))						//PA0.0~PA0.7
+		{
+			if(Selete_EXI_x==16)
+			{
+				GPIOGRP->IGREX =(GPIOGRP->IGREX)|PinNum;
+			}
+			else if(Selete_EXI_x==17)
+			{
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<4);
+			}
+		}
+		else if((IO_MODE==2)&&((Selete_EXI_x==18)||(Selete_EXI_x==19)))					//PB0.0~PB0.3
+		{
+			if(Selete_EXI_x==18)
+			{
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+			}
+			else if(Selete_EXI_x==19)
+			{
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+			}
+		}
+	}
+}
+/*************************************************************/
+//IO EXI SET 
+//EntryParameter:EXI_IO(EXI0~EXI13)
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIOA0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
+{
+    switch (EXI_IO)
+    {
+        case 0:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0) | 0X00000001;break;
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+        case 2:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000100;break;
+        case 3:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF) | 0X00001000;break;
+        case 4:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF) | 0X00010000;break;
+        case 5:GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF) | 0X00100000;break;
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+        case 7:GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF) | 0X10000000;break;
+        case 8:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000001;break;
+        case 9:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F) | 0X00000010;break;
+        case 10:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF) | 0X00000100;break;
+        case 11:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF) | 0X00001000;break;
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    }
+}
+void GPIOB0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
+{
+    switch (EXI_IO)
+    {
+        case 0:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0) | 0X00000001;break;
+        case 1:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+        case 2:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF) | 0X00000100;break;
+        case 3:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF0FFF) | 0X00001000;break;
+		case 4:GPIOB0->CONLR = (GPIOB0->CONLR&0XFFF0FFFF) | 0X00010000;break;
+		case 5:GPIOB0->CONLR = (GPIOB0->CONLR&0XFF0FFFFF) | 0X00100000;break;
+        default:break;
+    }
+}
+void GPIO_EXI_EN(CSP_GPIO_T *GPIOx,GPIO_EXI_TypeDef EXI_IO)
+{
+    (GPIOx)->IECR  |= 1<<EXI_IO;
+}
+/*************************************************************/
+//Write GPIO 
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+}
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+}
+/*************************************************************/
+//Write GPIO 
+//EntryParameter:GPIOx,uint8_t bitposi bitval
+//GPIOx:GPIOA0,GPIOB0
+//bitposi:0~15 bitval:0~1 0=low 1=high
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Set_Value(CSP_GPIO_T *GPIOx,uint8_t bitposi,uint8_t bitval)
+{
+    if (bitval==1)
+    {
+        (GPIOx)->SODR = (1ul<<bitposi);
+    }
+    else if ((bitval==0))
+    {
+        (GPIOx)->CODR = (1ul<<bitposi);
+    }
+}
+/*************************************************************/
+//Write GPIO reverse
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+     {
+       if (dat==1)  
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+           return;
+       }
+       if (dat==0)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+/*************************************************************/
+//READ PA IO STATUS
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    if (dat == (1<<bit))								
+	{
+	    value = 1;
+	} 
+    return value;
+}
+/*************************************************************/
+//READ PA OUTPUT STATUS
+//EntryParameter:GPIOx,uint8_t bit
+//GPIOx:GPIOA0,GPIOB0
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    if (dat == (1<<bit))								
+	{
+	    value = 1;
+	} 
+    return value;
+}
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_gpt.c b/Source/FWlib/apt32f102_gpt.c
new file mode 100644
index 0000000..fa2ef58
--- /dev/null
+++ b/Source/FWlib/apt32f102_gpt.c
@@ -0,0 +1,378 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_gpt.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_gpt.h"
+
+
+/*************************************************************/
+//GPT RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void GPT_DeInit(void)
+{
+	GPT0->CEDR 		= 0xBE980000;
+	GPT0->RSSR 		= GPT_RESET_VALUE;
+	GPT0->PSCR 		= GPT_RESET_VALUE;
+	GPT0->CR 		= 0X00010010;
+	GPT0->SYNCR 	= GPT_RESET_VALUE;
+	GPT0->GLDCR 	= GPT_RESET_VALUE;
+	GPT0->GLDCFG 	= GPT_RESET_VALUE;
+	GPT0->GLDCR2 	= GPT_RESET_VALUE;
+	GPT0->PRDR 		= GPT_RESET_VALUE;
+	GPT0->CMPA 		= GPT_RESET_VALUE;
+	GPT0->CMPB 		= GPT_RESET_VALUE;
+	GPT0->CMPLDR 	= 0X00002490;
+	GPT0->CNT 		= GPT_RESET_VALUE;
+	GPT0->AQLDR 	= 0X00000024;
+	GPT0->AQCRA 	= GPT_RESET_VALUE;
+	GPT0->AQCRB 	= GPT_RESET_VALUE;
+	GPT0->AQOSF	 	= 0X00000100;
+	GPT0->AQCSF 	= GPT_RESET_VALUE;
+	GPT0->TRGFTCR 	= GPT_RESET_VALUE;
+	GPT0->TRGFTWR	= GPT_RESET_VALUE;
+	GPT0->EVTRG 	= GPT_RESET_VALUE;
+	GPT0->EVPS 		= GPT_RESET_VALUE;
+	GPT0->EVCNTINIT = GPT_RESET_VALUE;
+	GPT0->EVSWF 	= GPT_RESET_VALUE;
+	GPT0->RISR		= GPT_RESET_VALUE;
+	GPT0->MISR 		= GPT_RESET_VALUE;
+	GPT0->IMCR 		= GPT_RESET_VALUE;
+	GPT0->ICR 		= GPT_RESET_VALUE;
+	GPT0->REGLINK 	= GPT_RESET_VALUE;
+}
+/*************************************************************/
+//GPT IO Init
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+	}
+	if(IONAME==GPT_CHA_PA09)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+	}
+	if(IONAME==GPT_CHA_PA010)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+	}
+	if(IONAME==GPT_CHB_PA010)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+	}
+	if(IONAME==GPT_CHB_PA011)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+	}
+	if(IONAME==GPT_CHB_PB00)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+	}
+}
+
+/*************************************************************/
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+	GPT0->PSCR=GPSCX;
+}
+/*************************************************************/
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+}
+
+/*************************************************************/
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+}
+/*************************************************************/
+//GPT Wave A OUT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+	if(GPTCHX==GPT_CHA)
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+/*************************************************************/
+//Deinitializes the GPT Caputer Config
+//EntryParameter:GPT_CNTMD_SELECTE_X,GPT_CAPMD_SELECTE_X,GPT_LOAD_CMPA_RST_CMD~GPT_LOAD_CMPB_RST_CMD,GPT_STOP_WRAP,GPT_PSCR
+//GPT_CNTMD_SELECTE_X:GPT_CNTMD_increase,GPT_CNTMD_decrease,GPT_CNTMD_increaseTOdecrease
+//GPT_CAPMD_SELECTE_X:GPT_CAPMD_Once,GPT_CAPMD_Continue
+//GPT_LOAD_CMPA_RST_CMD:GPT_LDARST_EN,GPT_LDARST_DIS
+//GPT_LOAD_CMPB_RST_CMD:GPT_LDBRST_EN,GPT_LDBRST_DIS
+//GPT_STOP_WRAP:0~3
+//GPT_PSCR:0~0XFFFF
+//ReturnValue:NONE
+/*************************************************************/  
+void GPT_Capture_Config(GPT_CNTMD_SELECTE_Type GPT_CNTMD_SELECTE_X  , GPT_CAPMD_SELECTE_Type GPT_CAPMD_SELECTE_X , GPT_CAPLDEN_TypeDef CAP_CMD 
+					, GPT_LDARST_TypeDef GPT_LOAD_CMPA_RST_CMD , GPT_LDBRST_TypeDef GPT_LOAD_CMPB_RST_CMD , 
+					GPT_LOAD_CMPC_RST_CMD_Type GPT_LOAD_CMPC_RST_CMD , GPT_LOAD_CMPD_RST_CMD_Type GPT_LOAD_CMPD_RST_CMD, U8_T GPT_STOP_WRAP )
+{
+	GPT0->CR=(GPT0->CR&0xf800fec0)|GPT_CNTMD_SELECTE_X|(0x0<<2)|(0x0<<3)|(0x0<<4)|CAP_CMD|GPT_CAPMD_SELECTE_X|(0X0<<16)|(0x0<<18)|(GPT_STOP_WRAP<<21)|
+				GPT_LOAD_CMPA_RST_CMD|GPT_LOAD_CMPB_RST_CMD|GPT_LOAD_CMPC_RST_CMD|GPT_LOAD_CMPD_RST_CMD;
+}
+/*************************************************************/
+//GPT SYNC Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_SyncSet_Configure(GPT_SYNCENX_TypeDef SYNCENx,GPT_OSTMDX_TypeDef OSTMDx,GPT_TXREARM0_TypeDef TXREARM0x,GPT_TRGO0SEL_TypeDef TRGO0SELx,
+							GPT_TRGO1SEL_TypeDef TRGO1SELx,GPT_AREARM_TypeDef AREARMx)
+{
+	GPT0->SYNCR |= SYNCENx| OSTMDx| TXREARM0x |TRGO0SELx|TRGO1SELx|AREARMx;
+}
+/*************************************************************/
+//GPT Trigger Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Trigger_Configure(GPT_SRCSEL_TypeDef SRCSELx,GPT_BLKINV_TypeDef BLKINVx,GPT_ALIGNMD_TypeDef ALIGNMDx,GPT_CROSSMD_TypeDef CROSSMDx,
+						U16_T G_OFFSET_DATA,U16_T G_WINDOW_DATA)
+{
+	GPT0->TRGFTCR |= SRCSELx| BLKINVx|ALIGNMDx| CROSSMDx;
+	GPT0->TRGFTWR |= G_OFFSET_DATA |(G_WINDOW_DATA<<16);
+	
+}
+/*************************************************************/
+//GPT Trigger Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_EVTRG_Configure(GPT_TRGSRC0_TypeDef TRGSRC0x,GPT_TRGSRC1_TypeDef TRGSRC1x,GPT_ESYN0OE_TypeDef ESYN0OEx,GPT_ESYN1OE_TypeDef ESYN1OEx,
+						GPT_CNT0INIT_TypeDef CNT0INITx,GPT_CNT1INIT_TypeDef CNT1INITx,U8_T TRGEV0prd,U8_T TRGEV1prd,U8_T TRGEV0cnt,U8_T TRGEV1cnt)
+{
+	GPT0->EVTRG |= TRGSRC0x |TRGSRC1x|ESYN0OEx|ESYN1OEx|CNT0INITx|CNT1INITx;
+	GPT0->EVPS  |= TRGEV0prd|(TRGEV1prd<<4)|(TRGEV0cnt<<16)|(TRGEV1cnt<<20);
+}
+/*************************************************************/
+//GPT OneceForce Out
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_OneceForce_Out(GPT_CHAFORCE_TypeDef CHAFORCEX,U8_T AFORCE_STATUS,GPT_CHBFORCE_TypeDef CHBFORCEX,U8_T BFORCE_STATUS,GPT_FORCELD_TypeDef FORCELDX)
+{
+	GPT0->AQOSF =CHAFORCEX|CHBFORCEX|FORCELDX|(AFORCE_STATUS<<1)|(BFORCE_STATUS<<5);
+}
+/*************************************************************/
+//GPT Continue Force Out
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Force_Out(GPT_FORCEA_TypeDef FORCEAX,GPT_FORCEB_TypeDef FORCEBX)
+{
+	GPT0->AQCSF =FORCEAX|FORCEBX;
+}
+/*************************************************************/
+//GPT Wave Compare Load Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_CmpLoad_Configure(GPT_SHDWCMPA_TypeDef SHDWCMPAX,GPT_SHDWCMPB_TypeDef SHDWCMPBX,GPT_LDAMD_TypeDef LDAMDX,GPT_LDBMD_TypeDef LDBMDX)
+{
+	GPT0->CMPLDR=SHDWCMPAX|SHDWCMPBX|LDAMDX|LDBMDX;
+}
+/*************************************************************/
+//GPT DEBUG MODE
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Debug_Mode(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		GPT0->CEDR  |= GPT_DEBUG_MODE;						
+	}
+	else
+	{
+		GPT0->CEDR  &= ~GPT_DEBUG_MODE;					
+	}
+}
+/*************************************************************/
+// GPT start
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+}
+/*************************************************************/
+// GPT stop
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Stop(void)
+{
+	GPT0->RSSR &= 0XFFFFFFFE;
+}
+/*************************************************************/
+// GPT soft reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Soft_Reset(void)
+{
+	GPT0->RSSR |= (0X5<<12);
+}
+/*************************************************************/
+// GPT Capture rearm
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Cap_Rearm(void)
+{
+	GPT0->CR |= (0X01<<19);
+}
+/*************************************************************/
+// GPT MODE
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Mode_CMD(GPT_WAVE_TypeDef WAVEX)
+{
+	GPT0->CR |= WAVEX;
+}
+/*************************************************************/
+// GPT soft reset at once sync mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_REARM_Write(void)
+{
+	GPT0->SYNCR |= (0X1<<16);
+}
+/*************************************************************/
+// GPT soft read at once sync mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U8_T GPT_REARM_Read(void)
+{
+	uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=(GPT0->SYNCR)&(1<<16);
+    if (dat)								
+	{
+	    value = 1;
+	} 
+    return value;
+}
+/*************************************************************/
+//GPT Period / Compare set
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+	GPT0->CMPA =CMPA_DATA;
+	GPT0->CMPB =CMPB_DATA;
+}
+/*************************************************************/
+//GPT read counters
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+U16_T GPT_PRDR_Read(void)
+{
+    return GPT0->PRDR;
+}
+U16_T GPT_CMPA_Read(void)
+{
+    return GPT0->CMPA;
+}
+U16_T GPT_CMPB_Read(void)
+{
+    return GPT0->CMPB;
+}
+U16_T GPT_CNT_Read(void)
+{
+    return GPT0->CNT;
+}
+/*************************************************************/
+//GPT inturrpt Configure
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+
+/*************************************************************/
+//GPT Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(GPT0_INT);
+}
+/*************************************************************/
+//LPT Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_INT_DISABLE(void)
+{
+	INTC_ICER_WRITE(GPT0_INT);
+}
+
+	
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_hwdiv.c b/Source/FWlib/apt32f102_hwdiv.c
new file mode 100644
index 0000000..a9a7c91
--- /dev/null
+++ b/Source/FWlib/apt32f102_hwdiv.c
@@ -0,0 +1,89 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_gpio.c
+  * @author  APT AE Team
+  * @version V1.24
+  * @date    2018/10/15
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_hwdiv.h"
+
+/* define --------------------------------------------------------------------*/
+/* externs--------------------------------------------------------------------*/
+/*************************************************************/
+//HWDIV RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void HWDIV_DeInit(void)
+{
+    HWD->DIVIDENT = HWDIV_RESET_VALUE;                     
+    HWD->DIVISOR = HWDIV_RESET_VALUE;
+    HWD->QUOTIENT = HWDIV_RESET_VALUE;                     
+    HWD->REMAIN = HWDIV_RESET_VALUE;
+    HWD->CR  = HWDIV_RESET_VALUE; 
+}
+/*************************************************************/
+//HWDIV UNSIGN Configure
+//EntryParameter:NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void HWDIV_UNSIGN_CMD(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		HWD->CR  |= HWDIV_UNSIGN_BIT;						
+	}
+	else
+	{
+		HWD->CR &= ~HWDIV_UNSIGN_BIT;					
+	}
+}
+/*************************************************************/
+//HWDIV Calculate
+//EntryParameter:NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void HWDIV_Calc_UNSIGN(U32_T DIVIDENDx,U32_T DIVISOR_x)
+{
+	HWD->DIVIDENT=DIVIDENDx;
+	HWD->DIVISOR=DIVISOR_x;
+}
+/*************************************************************/
+//HWDIV Calculate result
+//EntryParameter:NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T HWDIV_Calc_Quotient(void)
+{
+	return HWD->QUOTIENT;
+}
+/*************************************************************/
+//HWDIV Calculate result
+//EntryParameter:NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+U32_T HWDIV_Calc_Remain(void)
+{
+	return HWD->REMAIN;
+}
+/*************************************************************/ 
+void HWDIV_Calc_SIGN(long DIVIDENDx,long DIVISOR_x)
+{
+	HWD->DIVIDENT=DIVIDENDx;
+	HWD->DIVISOR=DIVISOR_x;
+}
diff --git a/Source/FWlib/apt32f102_i2c.c b/Source/FWlib/apt32f102_i2c.c
new file mode 100644
index 0000000..998f0e9
--- /dev/null
+++ b/Source/FWlib/apt32f102_i2c.c
@@ -0,0 +1,569 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_i2c.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+#include "apt32f102_i2c.h"
+volatile uint8_t I2CWrBuffer[BUFSIZE];
+volatile uint8_t I2CRdBuffer[BUFSIZE];
+volatile uint8_t RdIndex = 0;
+volatile uint8_t WrIndex = 0;
+volatile uint8_t I2C_Data_Adress;	
+volatile uint8_t I2C_St_Adress;	
+volatile U8_T f_ERROR=0;
+volatile U32_T R_IIC_ERROR_CONT;
+extern void delay_nms(unsigned int t);
+/*************************************************************/
+//I2C RESET,CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_DeInit(void)
+{
+    I2C0->ENABLE  	= 0;
+    I2C0->IMSCR  	= 0;
+    I2C0->ICR   	= 0X7FFF;
+} 
+/*************************************************************/
+//I2C MASTER Initial
+//EntryParameter:SPEEDMODE,MASTERBITS,
+//SPEEDMODE:FAST_MODE(>100K),STANDARD_MODE(<100K)
+//MASTERBITS:I2C_MASTRER_7BIT/I2C_MASTRER_10BIT
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Master_CONFIG(I2C_SDA_TypeDef I2C_SDA_IO,I2C_SCL_TypeDef I2C_SCL_IO,I2C_SPEEDMODE_TypeDef SPEEDMODE,
+						I2C_MASTRERBITS_TypeDef MASTERBITS,U16_T I2C_MASTER_ADDS,U16_T SS_SCLHX,U16_T SS_SCLLX)
+{
+	//SDA IO Initial
+    if(I2C_SDA_IO==I2C_SDA_PA00)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0)  | 0x00000005;            //PA0.0->SDA
+    }
+    else if(I2C_SDA_IO==I2C_SDA_PA03)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x00006000;            //PA0.3->SDA
+    }
+	else if (I2C_SDA_IO==I2C_SDA_PA07)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)  | 0x40000000;            //PA0.7->SDA        
+    }
+	else if(I2C_SDA_IO==I2C_SDA_PA013)
+    {
+    GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00600000;            //PA0.13->SDA
+    }
+	else if(I2C_SDA_IO==I2C_SDA_PA014)
+    {
+    GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF)  | 0x06000000;            //PA0.14->SDA
+    }
+	//SCL IO Initial
+	if (I2C_SCL_IO==I2C_SCL_PB00)
+    {
+    GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000006;            //PB0.0->SCL        
+    }
+	else if (I2C_SCL_IO==I2C_SCL_PB02)
+    {
+    GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF)  | 0x00000400;            //PB0.2->SCL        
+    }
+    else if(I2C_SCL_IO==I2C_SCL_PA01)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F)  | 0x00000050;            //PA0.1->SCL
+    }
+    else if(I2C_SCL_IO==I2C_SCL_PA04)
+    {
+     GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF)  | 0x00060000;            //PA0.4->SCL 
+    }
+	else if(I2C_SCL_IO==I2C_SCL_PA06)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF)  | 0x06000000;            //PA0.6->SCL  
+    }
+	else if(I2C_SCL_IO==I2C_SCL_PA015)
+    {
+    GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF)  | 0x60000000;            //PA0.15->SCL  
+    }
+	I2C0->ENABLE = (I2C0->ENABLE&0XFFFFFFFE)|I2C_DISABLE; 
+	I2C0->CR =(I2C0->CR&0XFFFFF000)|I2C_MASTER_EN |I2C_SLAVE_DIS| SPEEDMODE | MASTERBITS | I2C_RESTART_EN;				//Repeat start bit enable
+	I2C0->TADDR =I2C_MASTER_ADDS;
+	if(SPEEDMODE==FAST_MODE)
+	{
+		I2C0->FS_SCLH  = SS_SCLHX;  							//SCL high time
+		I2C0->FS_SCLL  = SS_SCLLX;  							//SCL low  time
+	}
+	else if(SPEEDMODE==STANDARD_MODE)
+	{
+		I2C0->SS_SCLH  = SS_SCLHX;  							//SCL high time
+		I2C0->SS_SCLL  = SS_SCLLX;  							//SCL low  time
+	}
+	
+}
+/*************************************************************/
+//I2C SLAVE Initial
+//EntryParameter:SPEEDMODE,SLAVEBITS,I2C_SALVE_ADD
+//SPEEDMODE:FAST_MODE(>100K),STANDARD_MODE(<100K)
+//SLAVEBITS:I2C_SLAVE_7BIT/I2C_SLAVE_10BIT
+//I2C_SALVE_ADD:I2C SLAVE ADDRESS
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Slave_CONFIG(I2C_SDA_TypeDef I2C_SDA_IO,I2C_SCL_TypeDef I2C_SCL_IO,I2C_SPEEDMODE_TypeDef SPEEDMODE,
+						I2C_SLAVEBITS_TypeDef SLAVEBITS,U16_T I2C_SALVE_ADDS,U16_T SS_SCLHX,U16_T SS_SCLLX)
+{
+	//SDA IO Initial
+    if(I2C_SDA_IO==I2C_SDA_PA00)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0)  | 0x00000005;            //PA0.0->SDA
+    }
+    else if(I2C_SDA_IO==I2C_SDA_PA03)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF)  | 0x00006000;            //PA0.3->SDA   ///
+    }
+	else if (I2C_SDA_IO==I2C_SDA_PA07)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF)  | 0x40000000;            //PA0.7->SDA        
+    }
+	else if(I2C_SDA_IO==I2C_SDA_PA013)
+    {
+    GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00600000;            //PA0.13->SDA
+    }
+	else if(I2C_SDA_IO==I2C_SDA_PA014)
+    {
+    GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF)  | 0x06000000;            //PA0.14->SDA
+    }
+	//SCL IO Initial
+	if (I2C_SCL_IO==I2C_SCL_PB00)
+    {
+    GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000006;            //PB0.0->SCL        
+    }
+	else if (I2C_SCL_IO==I2C_SCL_PB02)
+    {
+    GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFF0FF)  | 0x00000400;            //PB0.2->SCL        
+    }
+    else if(I2C_SCL_IO==I2C_SCL_PA01)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F)  | 0x00000050;            //PA0.1->SCL
+    }
+    else if(I2C_SCL_IO==I2C_SCL_PA04)
+    {
+     GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF)  | 0x00060000;            //PA0.4->SCL   //
+    }
+	else if(I2C_SCL_IO==I2C_SCL_PA06)
+    {
+    GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF)  | 0x06000000;            //PA0.6->SCL  
+    }
+	else if(I2C_SCL_IO==I2C_SCL_PA015)
+    {
+    GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF)  | 0x60000000;            //PA0.15->SCL  
+    }
+	I2C0->ENABLE = (I2C0->ENABLE&0XFFFFFFFE)|I2C_DISABLE;
+	I2C0->CR =(I2C0->CR&0XFFFFF000)| I2C_MASTER_DIS |I2C_SLAVE_EN | SPEEDMODE | SLAVEBITS;
+	I2C0->SADDR = I2C_SALVE_ADDS;
+	if(SPEEDMODE==FAST_MODE)
+	{
+		I2C0->FS_SCLH  = SS_SCLHX;  							//SCL high time
+		I2C0->FS_SCLL  = SS_SCLLX;  							//SCL low  time
+	}
+	else if(SPEEDMODE==STANDARD_MODE)
+	{
+		I2C0->SS_SCLH  = SS_SCLHX;  							//SCL high time
+		I2C0->SS_SCLL  = SS_SCLLX;  							//SCL low  time
+	}
+	INTC_IPR4_WRITE(0X40400040);   								//setting highest INT Priority when using i2c as salve
+}
+/*************************************************************/
+//I2C SDA TSETUP THOLD CONFIG
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_SDA_TSETUP_THOLD_CONFIG(U8_T SDA_TSETUP , U8_T SDA_RX_THOLD , U16_T SDA_TX_THOLD)
+{
+	I2C0->SDA_TSETUP=SDA_TSETUP;
+	I2C0->SDA_THOLD=(SDA_RX_THOLD<<16)|SDA_TX_THOLD;
+}
+/*************************************************************/
+//I2C INT CONFIG
+//EntryParameter:I2C_RX_UNDER,I2C_RX_OVER,I2C_RX_FULL,I2C_TX_OVER    
+//				 I2C_TX_EMPTY,I2C_RD_REQ,I2C_TX_ABRT,I2C_RX_DONE    
+//				 I2C_INT_BUSY,I2C_STOP_DET,I2C_START_DET,I2C_GEN_CALL   
+//				 I2C_RESTART_DET,I2C_MST_ON_HOLD,I2C_SCL_SLOW   
+//NewState:ENABLE/DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T INT_TYPE)
+{
+	if(NewState != DISABLE)
+	{
+		I2C0->IMSCR |= INT_TYPE;
+	}
+	else
+	{
+		I2C0->IMSCR &= (~INT_TYPE);
+	}
+}
+/*************************************************************/
+//I2C FIFO trigger data
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_FIFO_TriggerData(U16_T RX_FLSEL,U16_T TX_FLSEL)
+{
+	I2C0->RX_FLSEL = RX_FLSEL;  							
+	I2C0->TX_FLSEL = TX_FLSEL;  							
+}
+/*************************************************************/
+//I2C Stop
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Stop(void)
+{
+	I2C0->DATA_CMD = (I2C0->DATA_CMD&0XFFFFFDFF)|I2C_CMD_STOP;                         //Enable I2C
+}
+/*************************************************************/
+//I2C enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Enable(void)
+{
+	I2C0->ENABLE = (I2C0->ENABLE&0XFFFFFFFE)|I2C_ENABLE;                         //Enable I2C
+	while((I2C0->STATUS&0x1000)!=0x1000);
+}
+/*************************************************************/
+//I2C disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Disable(void)
+{
+	I2C0->ENABLE =(I2C0->ENABLE&0XFFFFFFFE)|I2C_DISABLE;                         //Disable I2C
+	while((I2C0->STATUS&0x1000)==0x1000);
+}
+/*************************************************************/
+//I2C Abort enable in master mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Abort_EN(void)
+{
+	I2C0->ENABLE = (I2C0->ENABLE&0XFFFFFFFD)|I2C_ABORT;                         //Enable Abort
+}
+/*************************************************************/
+//I2C Abort status
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T I2C_Abort_Status(void)
+{
+	uint8_t value = 0;
+    uint32_t dat = 0;
+	dat=(I2C0->ENABLE)&0x02;
+    if (dat == 0x02)								
+	{
+	    value = 1;										//aborting
+	} 
+    return value;										//no abort or abort over
+}
+/*************************************************************/
+//I2C RECOVER enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_SDA_Recover_EN(void)
+{
+	I2C0->ENABLE = (I2C0->ENABLE&0XFFFFFFF7)|I2C_SDA_REC_EN;                         //Enable Recover Enable
+}
+/*************************************************************/
+//I2C RECOVER enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_SDA_Recover_DIS(void)
+{
+	I2C0->ENABLE = (I2C0->ENABLE&0XFFFFFFF7)|I2C_SDA_REC_DIS;                         //Enable Recover Disable
+}
+/*************************************************************/
+//I2C Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Int_Enable(void)
+{
+	INTC_ISER_WRITE(I2C_INT);                             //Enable I2C interrupt
+}
+/*************************************************************/
+//I2C Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Int_Disable(void)
+{
+    INTC_ICER_WRITE(I2C_INT);                             //Disable I2C interrupt
+}
+/*************************************************************/
+//I2C WRITE OneByte
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_WRITE_Byte(U8_T write_adds,U8_T i2c_data)
+{
+	U16_T R_EEROR_CONT=0;
+	
+	I2C0->DATA_CMD = I2C_CMD_WRITE|write_adds ;
+	I2C0->DATA_CMD = i2c_data |I2C_CMD_STOP;
+	do
+	{
+		if(R_EEROR_CONT++>=10000)
+		{
+			R_EEROR_CONT=0;
+			f_ERROR=1;
+			I2C_Disable();
+			I2C_Enable();
+			break;
+		}
+	}
+	while( (I2C0->STATUS & I2C_BUSY) != I2C_BUSY ); 		//Wait for FSM working
+	do
+	{
+		if(R_EEROR_CONT++>=10000)
+		{
+			R_EEROR_CONT=0;
+			f_ERROR=1;
+			I2C_Disable();
+			I2C_Enable();
+			break;
+		}
+	}
+	while(((I2C0->STATUS) & I2C_TFE) != I2C_TFE);
+}
+/*************************************************************/
+//I2C WRITE nByte
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_WRITE_nByte(U8_T write_adds,volatile U8_T *i2c_data,U8_T NumByteToWrite)
+{
+	U16_T R_EEROR_CONT=0;
+	U8_T i;
+	I2C0->DATA_CMD = I2C_CMD_WRITE|write_adds ;
+	for(i=0;i<NumByteToWrite;i++)
+	{
+		if(i>=NumByteToWrite-1)
+		{
+			I2C0->DATA_CMD = *(i2c_data+i) |I2C_CMD_STOP;
+		}
+		else
+		{
+			I2C0->DATA_CMD = *(i2c_data+i);
+		}
+		do
+		{
+			if(R_EEROR_CONT++>=10000)
+			{
+				R_EEROR_CONT=0;
+				f_ERROR=1;
+				I2C_Disable();
+				I2C_Enable();
+				break;
+			}
+		}
+		while( (I2C0->STATUS & I2C_BUSY) != I2C_BUSY ); 		//Wait for FSM working
+		do
+		{
+			if(R_EEROR_CONT++>=10000)
+			{
+				R_EEROR_CONT=0;
+				f_ERROR=1;
+				I2C_Disable();
+				I2C_Enable();
+				break;
+			}
+		}
+		while(((I2C0->STATUS) & I2C_TFNF) != I2C_TFNF);
+	}
+}
+/*************************************************************/
+//I2C READ OneByte
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T I2C_READ_Byte(U8_T read_adds)
+{
+	U8_T value;
+	U16_T R_EEROR_CONT=0;
+	I2C0->DATA_CMD = I2C_CMD_WRITE|read_adds|I2C_CMD_RESTART1;
+	I2C0->DATA_CMD = I2C_CMD_READ |I2C_CMD_STOP;
+	do
+	{
+		if(R_EEROR_CONT++>=10000)
+		{
+			R_EEROR_CONT=0;
+			f_ERROR=1;
+			break;
+		}
+	}
+	while( (I2C0->STATUS & I2C_BUSY) != I2C_BUSY ); 		//Wait for FSM working
+	do
+	{
+		if(R_EEROR_CONT++>=10000)
+		{
+			R_EEROR_CONT=0;
+			f_ERROR=1;
+			break;
+		}
+	}
+	while( (I2C0->STATUS & I2C_RFNE) != I2C_RFNE ); 		//Wait for RX done
+	value=I2C0->DATA_CMD &0XFF;
+	return value;
+}
+/*************************************************************/
+//I2C READ nByte
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_READ_nByte(U8_T read_adds,volatile U8_T *i2c_data,U8_T NumByteToWrite)
+{
+	U16_T R_EEROR_CONT=0;
+	U8_T i;
+	I2C0->DATA_CMD = I2C_CMD_WRITE|read_adds|I2C_CMD_RESTART1;
+	for(i=0;i<NumByteToWrite;i++)
+	{
+		if(i>=NumByteToWrite-1)
+		{
+			I2C0->DATA_CMD = I2C_CMD_READ |I2C_CMD_STOP;
+		}
+		else
+		{
+			I2C0->DATA_CMD = I2C_CMD_READ;
+		}
+		do
+		{
+			if(R_EEROR_CONT++>=10000)
+			{
+				R_EEROR_CONT=0;
+				f_ERROR=1;
+				break;
+			}
+		}
+		while( (I2C0->STATUS & I2C_BUSY) != I2C_BUSY ); 		//Wait for FSM working
+		do
+		{
+			if(R_EEROR_CONT++>=10000)
+			{
+				R_EEROR_CONT=0;
+				f_ERROR=1;
+				break;
+			}
+		}
+		while( (I2C0->STATUS & I2C_RFNE) != I2C_RFNE ); 		//Wait for RX done
+		*(i2c_data+i)=I2C0->DATA_CMD &0XFF;
+	}
+}
+U16_T R_READ_BUF=0;
+/*************************************************************/
+//I2C slave Receive
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2C_Slave_Receive(void)
+{
+	
+	if(!(((I2C0->MISR&I2C_SCL_SLOW)==I2C_SCL_SLOW)
+			||((I2C0->MISR&I2C_TX_ABRT)==I2C_TX_ABRT)))				 //IIC is aborted when sclk locked))
+	{
+	if((I2C0->MISR&I2C_RX_FULL)==I2C_RX_FULL)        //Data received？
+	{
+		if(RdIndex==0)
+		{
+			RdIndex=1;
+			I2C_Data_Adress=I2C0->DATA_CMD&0XFF;
+			I2C_St_Adress=I2C_Data_Adress;
+		}
+		else
+		{
+			if(I2C_Data_Adress<BUFSIZE)
+			{
+				I2CRdBuffer[I2C_Data_Adress]= I2C0->DATA_CMD&0XFF;
+			}
+			I2C_Data_Adress++;
+		}
+		I2C0->ICR = I2C_RX_FULL;
+		R_IIC_ERROR_CONT=0;
+	}
+		
+	if((I2C0->MISR&I2C_RD_REQ)==I2C_RD_REQ)			//Read request generated
+	{
+		if(RdIndex==1)
+		{
+			RdIndex=2;
+			WrIndex = I2C_St_Adress;
+			//I2C_ConfigInterrupt_CMD(ENABLE,I2C_TX_EMPTY);
+			if(WrIndex<BUFSIZE)
+			{
+				I2C0->DATA_CMD= (I2C0->DATA_CMD&0XFFFFFF00) |I2CWrBuffer[WrIndex];
+			}	
+		}	
+		I2C0->ICR = I2C_RD_REQ;
+		R_IIC_ERROR_CONT=0;
+	} 
+                         
+	if((I2C0->MISR&I2C_TX_EMPTY)==I2C_TX_EMPTY)				//IIC send empty
+	{
+		if(RdIndex==2)
+		{
+			if(WrIndex+1<BUFSIZE)
+			{
+				I2C0->DATA_CMD= (I2C0->DATA_CMD&0XFFFFFF00) |I2CWrBuffer[WrIndex+1];
+			}
+			WrIndex++;
+		}
+		else
+		{
+			if(R_IIC_ERROR_CONT>10000)
+			{
+				I2C_Disable();
+				I2C0->DATA_CMD= (I2C0->DATA_CMD&0XFFFFFF00);
+				I2C_SLAVE_CONFIG();
+				R_IIC_ERROR_CONT=0;
+			}
+			else
+			{
+				R_IIC_ERROR_CONT++;
+			}
+		}
+		I2C0->CR = I2C_TX_EMPTY;
+	}	
+							
+	else if((I2C0->MISR&I2C_STOP_DET)==I2C_STOP_DET)
+	{
+		I2C0->ICR =I2C_STOP_DET;
+		if(RdIndex!=0)
+		{
+			RdIndex=0;
+			//I2C_ConfigInterrupt_CMD(DISABLE,I2C_TX_EMPTY);
+		}
+		R_READ_BUF=I2C0->DATA_CMD&0XFF;
+		R_IIC_ERROR_CONT=0;
+	}
+}
+else
+{
+		I2C_Disable();
+		I2C0->DATA_CMD= (I2C0->DATA_CMD&0XFFFFFF00);
+		I2C_SLAVE_CONFIG(); 
+		RdIndex=0;	
+		//I2C_ConfigInterrupt_CMD(ENABLE,I2C_TX_EMPTY);				
+		I2C0->ICR = I2C_SCL_SLOW|I2C_TX_ABRT;
+		R_IIC_ERROR_CONT=0;
+	
+}
+}
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_ifc.c b/Source/FWlib/apt32f102_ifc.c
new file mode 100644
index 0000000..bd23380
--- /dev/null
+++ b/Source/FWlib/apt32f102_ifc.c
@@ -0,0 +1,264 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_ifc.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_ifc.h"
+volatile unsigned int R_INT_FlashAdd;
+volatile unsigned char f_Drom_writing=0;
+/* define --------------------------------------------------------------------*/
+extern void delay_nms(unsigned int t); 
+/* externs--------------------------------------------------------------------*/
+/*************************************************************
+//ChipErase fuction
+//EntryParameter:NONE
+//ReturnValue:NONE
+*************************************************************/
+void ChipErase(void)
+{
+	SetUserKey;
+	EnChipErase;
+	StartErase;
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+}
+/*************************************************************
+//PageErase fuction
+//EntryParameter:XROM_PageAdd
+//XROM_PageAdd:PROM_PageAdd0~PROM_PageAdd255
+//DROM_PageAdd0~DROM_PageAdd31
+//ReturnValue:NONE
+*************************************************************/
+void PageErase(IFC_ROMSELETED_TypeDef XROM_PageAdd)
+{
+	SetUserKey;
+	EnPageErase;
+	IFC->FM_ADDR=XROM_PageAdd;
+	StartErase;
+	while(IFC->CR!=0x0);
+}
+/*************************************************************
+//Enable or Disable IFC Interrupt when Operate FlashData 
+//EntryParameter:FlashAdd、DataSize、*BufArry
+//ReturnValue:NONE
+*************************************************************/
+//PROM:Write at most 256 bytes once time
+//DROM:Write at most 64 bytes at once time
+//Interrupt mode requires multiple loop queries to complete
+void Page_ProgramData_int(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry)
+{
+	int i,DataBuffer;
+	if(!f_Drom_writing)
+	{
+		f_Drom_writing=1;
+		R_INT_FlashAdd=FlashAdd;
+		ifc_step=0;
+		//Page cache wipe 1
+		SetUserKey;
+		IFC->CMR=0x07;					//Page cache wipe
+		IFC->FM_ADDR=FlashAdd;
+		IFC->CR=0X01;					//Start Program
+		while(IFC->CR!=0x0);			//Wait for the operation to complete
+		//Write data to the cache 2
+		for(i=0;i<((DataSize+3)/4);i++)   //sizeof structure
+		{
+			DataBuffer=*BufArry+(*(BufArry+1)<<8)+(*(BufArry+2)<<16)+(*(BufArry+3)<<24);
+			*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
+			BufArry  +=4;
+		}
+		//Pre-programmed operation settings 3
+		SetUserKey;
+		IFC->CMR=0x06;					
+		IFC->FM_ADDR=FlashAdd;
+		IFC->CR=0X01;					//Start Program
+		while(IFC->CR!=0x0);			//Wait for the operation to complete
+		//Perform pre-programming 4
+		SetUserKey;
+		IFC->CMR=0x01;					
+		IFC->FM_ADDR=FlashAdd;			//
+		IFC->CR=0X01;					//Start Program
+	}
+}
+//Normal mode, when the call is completed once, it will delay 4.2ms in the program
+void Page_ProgramData(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry)
+{
+	int i,DataBuffer;
+
+	//Page cache wipe 1
+	SetUserKey;
+	IFC->CMR=0x07;					
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+	//Write data to the cache 2
+	for(i=0;i<((DataSize+3)/4);i++)   //sizeof structure
+	{
+		DataBuffer=*BufArry+(*(BufArry+1)<<8)+(*(BufArry+2)<<16)+(*(BufArry+3)<<24);
+		*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
+		BufArry  +=4;
+	}
+	//Pre-programmed operation settings 3
+	SetUserKey;
+	IFC->CMR=0x06;					
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+	//Perform pre-programming 4
+	SetUserKey;
+	IFC->CMR=0x01;					
+	IFC->FM_ADDR=FlashAdd;			//
+	IFC->CR=0X01;					//Start Program
+	while(IFC->RISR!=PEP_END_INT);			//Wait for the operation to complete
+	//Page erase 5
+	SetUserKey;
+	IFC->CMR=0x02;					
+	IFC->FM_ADDR=FlashAdd;			//
+	IFC->CR=0X01;					//Start Program
+	while(IFC->RISR!=ERS_END_INT);			//Wait for the operation to complete
+	//Write page cache data to flash memory 6
+	SetUserKey;
+	IFC->CMR=0x01;					
+	IFC->FM_ADDR=FlashAdd;		//
+	IFC->CR=0X01;					//Start Program
+	while(IFC->RISR!=RGM_END_INT);			//Wait for the operation to complete
+}
+void Page_ProgramData_U32(unsigned int FlashAdd,unsigned int DataSize,volatile U32_T *BufArry)
+{
+	int i,DataBuffer;
+
+	//Page cache wipe 1
+	SetUserKey;
+	IFC->CMR=0x07;					
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+	//Write data to the cache 2
+	for(i=0;i<DataSize;i++)   //sizeof structure
+	{
+		DataBuffer=*BufArry;
+		*(volatile unsigned int *)(FlashAdd)=DataBuffer;
+		BufArry  +=1;
+	}
+	//Pre-programmed operation settings 3
+	SetUserKey;
+	IFC->CMR=0x06;					
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+	//Perform pre-programming 4
+	SetUserKey;
+	IFC->CMR=0x01;					
+	IFC->FM_ADDR=FlashAdd;			//
+	IFC->CR=0X01;					//Start Program
+	while(IFC->RISR!=PEP_END_INT);			//Wait for the operation to complete
+	//Page erase 5
+	SetUserKey;
+	IFC->CMR=0x02;					
+	IFC->FM_ADDR=FlashAdd;			//
+	IFC->CR=0X01;					//Start Program
+	while(IFC->RISR!=ERS_END_INT);			//Wait for the operation to complete
+	//Write page cache data to flash memory 6
+	SetUserKey;
+	IFC->CMR=0x01;					
+	IFC->FM_ADDR=FlashAdd;		//
+	IFC->CR=0X01;					//Start Program
+	while(IFC->RISR!=RGM_END_INT);			//Wait for the operation to complete
+}
+/*************************************************************
+// ReadFlashData fuction return Data arry save in Flash
+// DataLength must be a multiple of 4, DataLength % 4 ==0.
+//EntryParameter:RdStartAdd、DataLength、*DataArryPoint
+//ReturnValue:NONE
+*************************************************************/
+void ReadDataArry(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint)
+{
+	unsigned int i,Buffer;
+	//delay_nms(1);
+	for(i=0;i<((DataLength+3)/4);i++)
+	{
+		Buffer=*(volatile unsigned int *)RdStartAdd;
+		*DataArryPoint=Buffer;
+		*(DataArryPoint+1)=Buffer>>8;
+		*(DataArryPoint+2)=Buffer>>16;
+		*(DataArryPoint+3)=Buffer>>24;
+		RdStartAdd +=4;
+		DataArryPoint +=4;
+	}
+}
+/*************************************************************
+//ReadFlashData fuction return Data arry save in Flash
+//EntryParameter:RdStartAdd、DataLength、*DataArryPoint
+//ReturnValue:NONE
+*************************************************************/
+void ReadDataArry_U8(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint)
+{
+	unsigned int i;
+	for (i=0;i<DataLength;i++)
+	{
+		if((i!=0)&&(i%4==0))
+		{
+			RdStartAdd +=4;
+		}	
+		*DataArryPoint=*(U8_T *)(RdStartAdd+ (i%4));
+		DataArryPoint++;
+	}
+}
+void ReadDataArry_U32(unsigned int RdStartAdd,unsigned int DataLength,volatile U32_T *DataArryPoint)
+{
+	unsigned int i;
+	for (i=0;i<DataLength;i++)
+	{
+		*DataArryPoint=*(U32_T *)(RdStartAdd);
+		DataArryPoint++;
+	}
+}
+/*************************************************************
+//Enable or Disable IFC Interrupt when Operate FlashData 
+//EntryParameter:IFC_INT_x
+//IFC_INT_x:ERS_END_INT,RGM_END_INT,PEP_END_INT,PROT_ERR_INT,UDEF_ERR_INT,ADDR_ERR_INT,OVW_ERR_INT
+//ReturnValue:NONE
+*************************************************************/
+void IFC_interrupt_CMD(FunctionalStatus NewState ,IFC_INT_TypeDef IFC_INT_x)
+{
+	if(NewState != DISABLE)
+	{
+		IFC->IMCR =IFC->IMCR|IFC_INT_x;
+	}
+	else 
+	{
+		IFC->IMCR =IFC->IMCR & (~IFC_INT_x);
+	}
+}
+/*************************************************************/
+//IFC Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFC_Int_Enable(void)
+{
+    IFC->ICR=0Xf007;					//CLAER IFC INT status
+	INTC_ISER_WRITE(IFC_INT);    
+}
+
+/*************************************************************/
+//IFC Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFC_Int_Disable(void)
+{
+    INTC_ICER_WRITE(IFC_INT);    
+}
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_iostring.c b/Source/FWlib/apt32f102_iostring.c
new file mode 100644
index 0000000..1a9420a
--- /dev/null
+++ b/Source/FWlib/apt32f102_iostring.c
@@ -0,0 +1,133 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_iostring.c
+  * @author  APT AE Team
+  * @version V1.00
+  * @date    2020/05/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+/******************************************************************************
+* Include Files
+******************************************************************************/
+#include "apt32f102.h"
+#include "apt32f102_uart.h"
+#include "stdarg.h"
+#include "stddef.h"
+#include "stdio.h"
+/******************************************************************************
+* Main code
+******************************************************************************/
+void __putchar__ (char s) 
+{
+//	UARTTxByte(UART0,s);		
+	UARTTxByte(UART1,s);
+}
+
+char *myitoa(int value, int* string, int radix)
+{
+
+		int tmp[33];
+		int* tp = tmp;
+		int i;
+		unsigned v;
+		int sign;
+		int* sp;
+		
+		if (radix > 36 || radix <= 1)
+		{
+			return 0;
+		}
+		
+		sign = (radix == 10 && value < 0);
+		if (sign)
+		v = -value;
+		else
+		v = (unsigned)value;
+		while (v || tp == tmp)
+		{
+			i = v % radix;
+			v = v / radix;
+			if (i < 10) {
+			*tp++ = i+'0';
+			
+			} else {
+			*tp++ = i + 'a' - 10;
+			
+			}
+					
+		}
+		
+		sp = string;
+		
+		if (sign)
+		*sp++ = '-';
+		while (tp > tmp)
+		*sp++ = *--tp;
+		*sp = 0;
+		return string;
+}
+
+
+void my_printf(const char *fmt, ...)
+{
+
+//    const char *s;
+	const int *s;
+    int d;
+    //char ch, *pbuf, buf[16];
+	char ch, *pbuf;
+	int buf[16];
+    va_list ap;
+    va_start(ap, fmt);
+    while (*fmt) {
+        if (*fmt != '%') {
+              __putchar__(*fmt++);
+            continue;
+        }
+        switch (*++fmt) {
+            case 's':
+                s = va_arg(ap, const char *);
+                for ( ; *s; s++) {
+                 __putchar__(*s);
+                }
+                break;
+            case 'd':
+                d = va_arg(ap, int);
+                myitoa(d, buf, 10);
+                for (s = buf; *s; s++) {
+                 __putchar__(*s);
+                }
+                break;
+                
+            case 'x':
+            case 'X':
+                d = va_arg(ap, int);
+                myitoa(d, buf, 16);
+                for (s = buf; *s; s++) {
+                 __putchar__(*s);
+                }
+                break;                
+            // Add other specifiers here...
+            case 'c':
+            case 'C':
+            	ch = (unsigned char)va_arg(ap, int);
+        	    pbuf = &ch;
+            	__putchar__(*pbuf);
+                break;
+            default:  
+                __putchar__(*fmt);
+                break;
+        }
+        fmt++;
+    }
+    va_end(ap);
+}
+
diff --git a/Source/FWlib/apt32f102_lpt.c b/Source/FWlib/apt32f102_lpt.c
new file mode 100644
index 0000000..1e5751c
--- /dev/null
+++ b/Source/FWlib/apt32f102_lpt.c
@@ -0,0 +1,260 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_lpt.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_lpt.h"
+
+/*************************************************************/
+//LPT RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void LPT_DeInit(void)
+{
+	LPT->CEDR 		= 0xBE980000;
+	LPT->RSSR 		= LPT_RESET_VALUE;
+	LPT->PSCR 		= LPT_RESET_VALUE;
+	LPT->CR	  		= 0X00010010;
+	LPT->SYNCR 		= LPT_RESET_VALUE;
+	LPT->PRDR 		= LPT_RESET_VALUE;
+	LPT->CMP 		= LPT_RESET_VALUE;
+	LPT->CNT 		= LPT_RESET_VALUE;
+	LPT->TRGFTCR 	= LPT_RESET_VALUE;
+	LPT->TRGFTWR 	= LPT_RESET_VALUE;
+	LPT->EVTRG 		= LPT_RESET_VALUE;
+	LPT->EVPS		= LPT_RESET_VALUE;
+	LPT->EVSWF 		= LPT_RESET_VALUE;
+	LPT->RISR 		= LPT_RESET_VALUE;
+	LPT->MISR 		= LPT_RESET_VALUE;
+	LPT->IMCR 		= LPT_RESET_VALUE;
+	LPT->ICR 		= LPT_RESET_VALUE;
+}
+/*************************************************************/
+//LPT IO Init
+//EntryParameter:LPT_OUT_PA09,LPT_OUT_PB01,LPT_IN_PA10,
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_IO_Init(LPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==LPT_OUT_PA09)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000080;
+	}
+	if(IONAME==LPT_OUT_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000080;
+	}
+	if(IONAME==LPT_IN_PA10)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000800;
+	}
+}
+/*************************************************************/
+//LPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_Configure(LPT_CLK_TypeDef CLKX,LPT_CSS_TypeDef CSSX,LPT_SHDWSTP_TypeDef SHDWSTPX,LPT_PSCDIV_TypeDef PSCDIVX,U8_T FLTCKPRSX,LPT_OPM_TypeDef OPMX)
+{
+	LPT->CEDR |=CLKX| CSSX| SHDWSTPX| (FLTCKPRSX<<8);
+	LPT->PSCR = PSCDIVX;
+	LPT->CR |=OPMX;
+}
+/*************************************************************/
+//LPT DEBUG MODE
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_Debug_Mode(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		LPT->CEDR  |= LPT_DEBUG_MODE;						
+	}
+	else
+	{
+		LPT->CEDR  &= ~LPT_DEBUG_MODE;					
+	}
+}
+/*************************************************************/
+//LPT Period / Compare set
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMP_DATA)
+{
+	LPT->PRDR =PRDR_DATA;
+	LPT->CMP =CMP_DATA;
+}
+/*************************************************************/
+//LPT COUNTER set
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_CNT_Write(U16_T CNT_DATA)
+{
+	LPT->CNT =CNT_DATA;
+}
+/*************************************************************/
+//LPT read counters
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+U16_T LPT_PRDR_Read(void)
+{
+    return LPT->PRDR;
+}
+U16_T LPT_CMP_Read(void)
+{
+    return LPT->CMP;
+}
+U16_T LPT_CNT_Read(void)
+{
+    return LPT->CNT;
+}
+/*************************************************************/
+//LPT ControlSet Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_ControlSet_Configure(LPT_SWSYN_TypeDef SWSYNX,LPT_IDLEST_TypeDef IDLESTX,LPT_PRDLD_TypeDef PRDLDX,LPT_POL_TypeDef POLX,
+							 LPT_FLTDEB_TypeDef FLTDEBX,LPT_PSCLD_TypeDef PSCLDX,LPT_CMPLD_TypeDef CMPLDX)
+{
+	LPT->CR |= SWSYNX| IDLESTX| PRDLDX| POLX| FLTDEBX| FLTDEBX| CMPLDX;
+}
+/*************************************************************/
+//LPT SYNC Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_SyncSet_Configure(LPT_TRGENX_TypeDef TRGENX,LPT_OSTMDX_TypeDef OSTMDX,LPT_AREARM_TypeDef AREARMX)
+{
+	LPT->SYNCR |= TRGENX| OSTMDX| AREARMX;
+}
+/*************************************************************/
+//LPT Trigger Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_Trigger_Configure(LPT_SRCSEL_TypeDef SRCSELX,LPT_BLKINV_TypeDef BLKINVX,LPT_CROSSMD_TypeDef CROSSMDX,LPT_TRGSRC0_TypeDef TRGSRC0X,
+						LPT_ESYN0OE_TypeDef ESYN0OEX,U16_T OFFSET_DATA,U16_T WINDOW_DATA,U8_T TRGEC0PRD_DATA)
+{
+	LPT->TRGFTCR |= SRCSELX| BLKINVX| CROSSMDX;
+	LPT->TRGFTWR |= OFFSET_DATA |(WINDOW_DATA<<16);
+	LPT->EVTRG |= TRGSRC0X |ESYN0OEX;
+	LPT->EVPS |=TRGEC0PRD_DATA;
+}
+void LPT_Trigger_EVPS(U8_T TRGEC0PRD_DATA,U8_T TRGEV0CNT_DATA)
+{
+	LPT->EVPS |= TRGEC0PRD_DATA |(TRGEV0CNT_DATA<<16);
+}
+void LPT_Trigger_Cnt(U8_T TRGEV0CNT_DATA)
+{
+	LPT->EVPS |= (TRGEV0CNT_DATA<<16);
+}
+void LPT_Soft_Trigger(void)
+{
+	LPT->EVSWF = 0X01;
+}
+/*************************************************************/
+// LPT start
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Start(void)
+{
+	LPT->RSSR |= 0X01;
+}
+/*************************************************************/
+// LPT stop
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Stop(void)
+{
+	LPT->RSSR &= 0XFFFFFFFE;
+}
+/*************************************************************/
+// LPT soft reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+}
+/*************************************************************/
+// LPT soft reset at once sync mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_REARM_Write(void)
+{
+	LPT->SYNCR |= (0X1<<16);
+}
+/*************************************************************/
+// LPT soft read at once sync mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+U8_T LPT_REARM_Read(void)
+{
+	uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=(LPT->SYNCR)&(1<<16);
+    if (dat)								
+	{
+	    value = 1;
+	} 
+    return value;
+}
+/*************************************************************/
+//LPT inturrpt Configure
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_ConfigInterrupt_CMD(FunctionalStatus NewState,LPT_IMSCR_TypeDef LPT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+	{
+		LPT->IMCR  |= LPT_IMSCR_X;						
+	}
+	else
+	{
+		LPT->IMCR  &= ~LPT_IMSCR_X;					
+	}
+}
+
+/*************************************************************/
+//LPT Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(LPT_INT);
+}
+/*************************************************************/
+//LPT Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPT_INT_DISABLE(void)
+{
+	INTC_ICER_WRITE(LPT_INT);
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_rtc.c b/Source/FWlib/apt32f102_rtc.c
new file mode 100644
index 0000000..654813a
--- /dev/null
+++ b/Source/FWlib/apt32f102_rtc.c
@@ -0,0 +1,316 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_interrupt.c
+  * @author  APT AE Team
+  * @version V1.11
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_rtc.h"
+/* define --------------------------------------------------------------------*/
+RTC_time_t  RTC_TimeDate_buf;
+RTC_Alarmset_T RTC_AlarmA_buf;
+RTC_Alarmset_T RTC_AlarmB_buf;
+/* externs--------------------------------------------------------------------*/
+
+/*************************************************************/
+//Deinitializes the RTC registers to their default reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void RTC_RST_VALUE(void)									//reset value
+{
+	RTC->TIMR=RTC_TIMR_RST;
+	RTC->DATR=RTC_DATR_RST;
+	RTC->CR=RTC_CR_RST;
+	RTC->CCR=RTC_CCR_RST;
+	RTC->ALRAR=RTC_ALRAR_RST;
+	RTC->ALRBR=RTC_ALRBR_RST;
+	RTC->SSR=RTC_SSR_RST;
+	RTC->CAL=RTC_CAL_RST;
+	RTC->IMCR=RTC_IMCR_RST;
+	RTC->EVTRG=RTC_EVTRG_RST;
+	RTC->EVPS=RTC_EVPS_RST;
+}
+/*************************************************************/
+//Deinitializes the RTC GPIO
+//EntryParameter:Rtc_Output_Mode_TypeDef
+//Rtc_Output_Mode_x:Alarm_A_pulse_output,Alarm_A_High,Alarm_A_Low,Alarm_B_pulse_output,Alarm_B_High,Alarm_B_Low
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_ALM_IO_SET(Rtc_Output_Mode_TypeDef Rtc_Output_Mode_x )
+{
+	GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF)|0X00000500;
+	RTC->KEY=0XCA53;
+	RTC->CR=(RTC->CR&0XFFFFE3FF)|Rtc_Output_Mode_x;
+	while(RTC->CR&0x02);
+}
+/*************************************************************/
+//Deinitializes the RTC clk config
+//EntryParameter:CLKSRC_X,DIVS,DIVA
+//CLKSRC_X:CLKSRC_ISOSC,CLKSRC_IMOSC,CLKSRC_EMOSC
+//DIVS:0~0X7FFF
+//DIVA:0~0X7F
+//ReturnValue:NONE
+/*************************************************************/ 
+//RTC CLK=(EMCLK/4)/(DIVS+1)/(DIVA+1)/4
+//		  (ISCLK)/(DIVS+1)/(DIVA+1)/4
+//		  (IMCLK/4)/(DIVS+1)/(DIVA+1)/4
+void RTCCLK_CONFIG(U16_T DIVS , U16_T DIVA , RTC_CLKSRC_TypeDef CLKSRC_X)
+{
+	RTC->KEY=0XCA53;
+	RTC->CCR|=(0X01<<27);
+	while(!(RTC->CCR&0x04000000));													//Wait for RTC to stabilize
+	RTC->CCR=(RTC->CCR&0xfc000000)|DIVS|(DIVA<<16)|(0X01<<23)|CLKSRC_X;
+	while(!(RTC->CCR&0x04000000));													//Wait for RTC to stabilize
+}
+/*************************************************************/
+//Deinitializes the RTC function config
+//EntryParameter:RTC_FMT_MODE_TypeDef,RTC_CPRD_TypeDef,Rtc_ClockOutput_Mode_TypeDe
+//RTC_FMT_MODE:RTC_24H,RTC_12H
+//RTC_CPRD_x:CPRD_NONE,CPRD_05S,CPRD_1S,CPRD_1MIN,CPRD_1HOUR,CPRD_1DAY,CPRD_1MONTH
+//Rtc_ClockOutput_x:COSEL_Cali_512hz,COSEL_Cali_1hz,COSEL_NoCali_512hz,COSEL_NoCali_1hz
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_Function_Config(RTC_FMT_MODE_TypeDef RTC_FMT_MODE , RTC_CPRD_TypeDef RTC_CPRD_x , Rtc_ClockOutput_Mode_TypeDef Rtc_ClockOutput_x)
+{
+	RTC->KEY=0XCA53;
+	RTC->CR=(RTC->CR&0xffff1cdf)|RTC_FMT_MODE|RTC_CPRD_x|Rtc_ClockOutput_x|0X01<<16;//enable read								
+}
+/*************************************************************/
+//Deinitializes the RTC Start
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_Start(void)
+{
+	RTC->KEY=0XCA53;
+	RTC->CR=RTC->CR&0xfffffffe;												
+	while((RTC->CR&0x01)!=0||(RTC->CR&0x02)==2);
+}
+/*************************************************************/
+//Deinitializes the RTC Stop
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_Stop(void)
+{
+	RTC->KEY=0XCA53;
+	RTC->CR=RTC->CR|0x01;
+	while((RTC->CR&0x01)!=1||(RTC->CR&0x02)==2);
+}
+/*************************************************************/
+//Deinitializes the RTC timer date set
+//EntryParameter:*RTC_TimeDate
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_TIMR_DATR_SET(RTC_time_t *RTC_TimeDate)
+{
+	RTC->KEY=0XCA53;
+	RTC->TIMR=(RTC_TimeDate->u8Hour<<16)|(RTC_TimeDate->u8Minute<<8)|(RTC_TimeDate->u8Second);			//Hour bit6->0:am 1:pm
+	RTC->DATR=(RTC_TimeDate->u8DayOfWeek<<24)|(RTC_TimeDate->u8Year<<16)|(RTC_TimeDate->u8Month<<8)|(RTC_TimeDate->u8Day<<0);		
+	while(RTC->CR&0x02);//busy wait TIMR DATR ALRAR ALRBR Data written
+}
+/*************************************************************/
+//Deinitializes the RTC timer date Read
+//EntryParameter:*RTC_TimeDate
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_TIMR_DATR_Read(RTC_time_t *RTC_TimeDate)
+{
+	RTC->KEY=0XCA53;
+	//RTC->CR|=0X01<<16;								//enable read
+	//while(RTC->CR&0x02);//busy wait TIMR DATR ALRAR ALRBR Data written
+	RTC_TimeDate->u8Second=(RTC->TIMR)&0x7f;
+	RTC_TimeDate->u8Minute=(RTC->TIMR>>8)&0x7f;
+	RTC_TimeDate->u8Hour=(RTC->TIMR>>16)&0x7f;
+	RTC_TimeDate->u8Day=(RTC->DATR)&0x7f;
+	RTC_TimeDate->u8Month=(RTC->DATR>>8)&0x7f;
+	RTC_TimeDate->u8Year=(RTC->DATR>>16)&0x7f;
+	RTC_TimeDate->u8DayOfWeek=(RTC->DATR>>24)&0x7f;
+	//RTC->CR&=0XFFFEFFFF;							//disable read
+}
+/*************************************************************/
+//Deinitializes the RTC AlarmA set
+//EntryParameter:*RTC_AlarmA,RTC_Alarm_Second_mask_TypeDef,RTC_Alarm_Minute_mask_TypeDef,
+//				 RTC_Alarm_Hour_mask_TypeDef,RTC_Alarm_DataOrWeek_mask_TypeDef,RTC_Alarm_WeekData_select_TypeDef,
+//				 RTC_Alarm_Register_select_TypeDef
+//RTC_Alarm_Second_x:Alarm_Second_EN,Alarm_Second_DIS
+//RTC_Alarm_Minute_x:Alarm_Minute_EN,Alarm_Minute_DIS
+//RTC_Alarm_Hour_x:Alarm_Hour_EN,Alarm_Hour_DIS
+//RTC_Alarm_DataOrWeek_x:Alarm_DataOrWeek_EN,Alarm_DataOrWeek_DIS
+//Alarm_x_selecte:Alarm_data_selecte,Alarm_week_selecte
+//Alarm_x:Alarm_A,Alarm_B
+//ReturnValue:NONE
+/*************************************************************/ 
+void RTC_Alarm_TIMR_DATR_SET(RTC_Alarm_Register_select_TypeDef Alarm_x  , RTC_Alarmset_T *RTC_AlarmA , RTC_Alarm_Second_mask_TypeDef RTC_Alarm_Second_x ,
+						RTC_Alarm_Minute_mask_TypeDef RTC_Alarm_Minute_x , RTC_Alarm_Hour_mask_TypeDef RTC_Alarm_Hour_x,
+						RTC_Alarm_DataOrWeek_mask_TypeDef RTC_Alarm_DataOrWeek_x,
+						RTC_Alarm_WeekData_select_TypeDef Alarm_x_selecte)
+{
+	RTC->KEY=0XCA53;
+	if(Alarm_x==Alarm_A)
+	{
+		RTC->CR=RTC->CR&0xfffffff7;
+		RTC->ALRAR=(Alarm_x_selecte)|(RTC_Alarm_DataOrWeek_x)|(RTC_Alarm_Hour_x)|(RTC_Alarm_Minute_x)|(RTC_Alarm_Second_x)|
+				(RTC_AlarmA->u8WeekOrData<<24)|(RTC_AlarmA->u8Hour<<16)|(RTC_AlarmA->u8Minute<<8)|(RTC_AlarmA->u8Second);		
+		while(RTC->CR&0x02);
+		RTC->CR|=Alarm_A_EN;		
+	}
+	if(Alarm_x==Alarm_B)
+	{
+		RTC->CR=RTC->CR&0xffffffef;
+		RTC->ALRBR=(Alarm_x_selecte)|(RTC_Alarm_DataOrWeek_x)|(RTC_Alarm_Hour_x)|(RTC_Alarm_Minute_x)|(RTC_Alarm_Second_x)|
+				(RTC_AlarmA->u8WeekOrData<<24)|(RTC_AlarmA->u8Hour<<16)|(RTC_AlarmA->u8Minute<<8)|(RTC_AlarmA->u8Second);		
+		while(RTC->CR&0x02);
+		RTC->CR|=Alarm_B_EN;				
+	}
+	RTC->KEY = 0;	
+	while(RTC->CR&0x02);//busy wait TIMR DATR ALRAR ALRBR Data written
+}
+/*************************************************************/
+//Deinitializes the RTC AlarmA read
+//EntryParameter:*RTC_AlarmA
+//ReturnValue:NONE
+/*************************************************************/
+void RTC_AlarmA_TIMR_DATR_Read(RTC_Alarmset_T *RTC_AlarmA)
+{
+	RTC->KEY=0XCA53;
+	//RTC->CR|=0X01<<16;									//enable read
+	//while(RTC->CR&0x02);//busy wait TIMR DATR ALRAR ALRBR Data written 
+	RTC_AlarmA->u8Second=(RTC->ALRAR)&0x7f;
+	RTC_AlarmA->u8Minute=(RTC->ALRAR>>8)&0x7f;
+	RTC_AlarmA->u8Hour=(RTC->ALRAR>>16)&0x7f;
+	RTC_AlarmA->u8WeekOrData=(RTC->ALRAR>>24)&0x3f;
+	//RTC->CR&=0XFFFEFFFF;								//disable read
+}		
+/*************************************************************/
+//Deinitializes the RTC AlarmB read
+//EntryParameter:*RTC_AlarmB
+//ReturnValue:NONE
+/*************************************************************/
+void RTC_AlarmB_TIMR_DATR_Read(RTC_Alarmset_T *RTC_AlarmB)
+{
+	RTC->KEY=0XCA53;
+	//RTC->CR|=0X01<<16;								//enable read
+	//while(RTC->CR&0x02);//busy wait TIMR DATR ALRAR ALRBR Data written
+	RTC_AlarmB->u8Second=(RTC->ALRBR)&0x7f;
+	RTC_AlarmB->u8Minute=(RTC->ALRBR>>8)&0x7f;
+	RTC_AlarmB->u8Hour=(RTC->ALRBR>>16)&0x7f;
+	RTC_AlarmB->u8WeekOrData=(RTC->ALRBR>>24)&0x3f;
+	//RTC->CR&=0XFFFEFFFF;							//disable read
+}
+/*************************************************************/
+//RTC EVTRG Config
+//EntryParameter:RTC_EVTRG_TRGSRC0_x,RTC_TRGSRCX_CMD,Trgev0Prd
+//RTC_EVTRG_TRGSRC0_x:RTC_EVTRG_TRGSRC0_DIS,RTC_EVTRG_TRGSRC0_AlarmA,
+//RTC_EVTRG_TRGSRC0_AlarmB,RTC_EVTRG_TRGSRC0_AlarmAB,RTC_EVTRG_TRGSRC0_CPRD
+//RTC_TRGSRCX_CMD:RTC_TRGSRC0_EN,RTC_TRGSRC0_DIS
+//Trgev0Prd:0~0x0f
+//ReturnValue: NONE
+/*************************************************************/
+void RTC_TRGSRC0_Config(RTC_EVTRG_TRGSRC0_TypeDef RTC_EVTRG_TRGSRC0_x , RTC_TRGSRCX_CMD_TypeDef RTC_TRGSRCX_CMD , U8_T Trgev0Prd)
+{
+	RTC->EVTRG=(RTC->EVTRG&0XFFEFFFF0)|RTC_EVTRG_TRGSRC0_x|RTC_TRGSRCX_CMD;
+	RTC->EVPS=(RTC->EVPS&0XFFFFFFF0)|Trgev0Prd;
+}
+/*************************************************************/
+//RTC EVTRG SWFTRG
+//EntryParameter:RTC_EVTRG_TRGSRC1_x,RTC_TRGSRCX_CMD,Trgev1Prd
+//RTC_EVTRG_TRGSRC1_x:RTC_EVTRG_TRGSRC1_DIS,RTC_EVTRG_TRGSRC1_AlarmA,
+//RTC_EVTRG_TRGSRC1_AlarmB,RTC_EVTRG_TRGSRC1_AlarmAB,RTC_EVTRG_TRGSRC1_CPRD
+//RTC_TRGSRCX_CMD:RTC_TRGSRC1_EN,RTC_TRGSRC1_DIS
+//Trgev1Prd:0~0x0f
+//ReturnValue: NONE
+/*************************************************************/
+void RTC_TRGSRC1_Config(RTC_EVTRG_TRGSRC1_TypeDef RTC_EVTRG_TRGSRC1_x , RTC_TRGSRCX_CMD_TypeDef RTC_TRGSRCX_CMD , U8_T Trgev1Prd)
+{
+	RTC->EVTRG=(RTC->EVTRG&0XFFDFFF0F)|RTC_EVTRG_TRGSRC1_x|RTC_TRGSRCX_CMD;
+	RTC->EVPS=(RTC->EVPS&0XFFFFFF0F)|Trgev1Prd<<4;
+}
+/*************************************************************/
+//RTC EVTRG SWFTRG
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void RTC_TRGSRC0_SWFTRG(void)
+{
+	RTC->EVSWF|=0X01;
+}
+/*************************************************************/
+//RTC EVTRG SWFTRG
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void RTC_TRGSRC1_SWFTRG(void)
+{
+	RTC->EVSWF|=0X02;
+}
+/*************************************************************/
+//RTC INT ENABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void RTC_Int_Enable(RTC_INT_TypeDef RTC_X_INT)
+{
+	RTC->ICR = RTC_X_INT;							//clear LVD INT status
+	RTC->IMCR  |= RTC_X_INT;
+}
+/*************************************************************/
+//RTC INT DISABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void RTC_Int_Disable(RTC_INT_TypeDef RTC_X_INT)
+{
+	RTC->IMCR  &= ~RTC_X_INT;
+}
+/*************************************************************/
+//RTC Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTC_Vector_Int_Enable(void)
+{
+	INTC_ISER_WRITE(RTC_INT);    
+}
+/*************************************************************/
+//RTC Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTC_Vector_Int_Disable(void)
+{
+    INTC_ICER_WRITE(RTC_INT);    
+}
+/*************************************************************/
+//RTC Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTC_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(RTC_INT);    
+}
+
+/*************************************************************/
+//RTC Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTC_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(RTC_INT);    
+}
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_sio.c b/Source/FWlib/apt32f102_sio.c
new file mode 100644
index 0000000..48259f0
--- /dev/null
+++ b/Source/FWlib/apt32f102_sio.c
@@ -0,0 +1,161 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_sio.c
+  * @author  APT AE Team
+  * @version V1.11
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_sio.h"
+
+
+/*************************************************************/
+//SIO RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void SIO_DeInit(void)
+{
+	SIO0->CR 		= SIO_RESET_VALUE;
+	SIO0->TXCR0 	= SIO_RESET_VALUE;
+	SIO0->TXCR1 	= SIO_RESET_VALUE;
+	//SIO0->TXBUF 	= SIO_RESET_VALUE;
+	SIO0->RXCR0 	= SIO_RESET_VALUE;
+	SIO0->RXCR1 	= SIO_RESET_VALUE;
+	SIO0->RXCR1 	= SIO_RESET_VALUE;
+	//SIO0->RXBUF 	= SIO_RESET_VALUE;
+	SIO0->RISR 		= SIO_RESET_VALUE;
+	SIO0->MISR 		= SIO_RESET_VALUE;
+	SIO0->IMCR 		= SIO_RESET_VALUE;
+	SIO0->ICR 		= SIO_RESET_VALUE;
+}
+/*************************************************************/
+//SIO IO Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void SIO_IO_Init(SIO_IOG_TypeDef IOGx)
+{
+	if(IOGx==SIO_PA02)
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFFF0FF)|0x00000400;
+	}
+	if(IOGx==SIO_PA03)
+	{
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFFF0FFF)|0x00008000;
+	}
+	if(IOGx==SIO_PA012)
+	{
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFF0FFFF)|0x00080000;
+	}
+	if(IOGx==SIO_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000070;
+	}
+}
+/*************************************************************/
+//SIO TX Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void SIO_TX_Init(SIO_CLK_TypeDef CLKX,U8_T TCKPRSX)
+{
+	SIO0->CR =CLKX | (TCKPRSX<<16) |(0X00<<8);
+	
+}
+/*************************************************************/
+//SIO TX Configure
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void SIO_TX_Configure(SIO_IDLEST_TypeDef IDLEX,SIO_TXDIR_TypeDef TXDIRX,U8_T TXBUFLENX,U8_T TXCNTX,U8_T D0DURX,U8_T D1DURX,SIO_LENOBH_TypeDef LENOBHX,
+					SIO_LENOBL_TypeDef LENOBLX,U8_T HSQX,U8_T LSQX)
+{
+	SIO0->TXCR0 =IDLEX | TXDIRX | (TXBUFLENX<<4) |(TXCNTX<<8);
+	SIO0->TXCR1=(D0DURX<<2)|(D1DURX<<5)|LENOBHX|LENOBLX|(HSQX<<16)|(LSQX<<24);
+}
+/*************************************************************/
+//SIO TX BUFFER SET
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void SIO_TXBUF_Set(U8_T D30,U8_T D28,U8_T D26,U8_T D24,U8_T D22,U8_T D20,U8_T D18,U8_T D16,
+					U8_T D14,U8_T D12,U8_T D10,U8_T D08,U8_T D06,U8_T D04,U8_T D02,U8_T D00)
+{
+	SIO0->TXBUF=(D30<<30)|(D28<<28)|(D26<<26)|(D24<<24)|(D22<<22)|(D20<<20)|(D18<<18)|(D16<<16)|
+				(D14<<14)|(D12<<12)|(D10<<10)|(D08<<8)|(D06<<6)|(D04<<4)|(D02<<2)|(D00<<0);
+}
+/*************************************************************/
+//SIO RX Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void SIO_RX_Init(SIO_CLK_TypeDef CLKX,SIO_RXDEB_TypeDef RXDEBX,U8_T DEBCKSX)
+{
+	SIO0->CR =CLKX | RXDEBX |(0X01<<8) | (DEBCKSX<<4);
+}
+/*************************************************************/
+//SIO RX Basic Configure
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void SIO_RX_Configure0(SIO_BSTSEL_TypeDef BSTSELX,SIO_TRGMODE_TypeDef TRGMX,U8_T SPLCNTX,U8_T EXTRACTX,U8_T HITHRX,
+					SIO_ALIGNEN_TypeDef ALIGNX,SIO_RXDIR_TypeDef RXDIRX,SIO_RXMODE_TypeDef RXMODEX,U8_T RXLENX,U8_T RXBUFLENX,U8_T RXKPRSX)
+{
+	SIO0->RXCR0=BSTSELX|TRGMX|(SPLCNTX<<4)|(EXTRACTX<<10)|(HITHRX<<16)|(ALIGNX)|RXDIRX|RXMODEX;			
+	SIO0->RXCR1=(RXLENX)|(RXBUFLENX<<8)|(RXKPRSX<<16);												
+}
+/*************************************************************/
+//SIO RX Configure 1
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void SIO_RX_Configure1(SIO_BREAKEN_TypeDef BREAKX,SIO_BREAKLVL_TypeDef BREAKLVLX,U8_T BREKCNTX,SIO_TORSTEN_TypeDef TORSTX,U8_T TOCNTX)
+{
+	SIO0->RXCR2=BREAKX|BREAKLVLX|(BREKCNTX<<3)|TORSTX|(TOCNTX<<16);
+}
+/*************************************************************/
+//SIO inturrpt Configure
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void SIO_ConfigInterrupt_CMD(FunctionalStatus NewState,SIO_IMSCR_TypeDef SIO_IMSCR_X)
+{
+	if (NewState != DISABLE)
+	{
+		SIO0->IMCR  |= SIO_IMSCR_X;						
+	}
+	else
+	{
+		SIO0->IMCR  &= ~SIO_IMSCR_X;					
+	}
+}
+/*************************************************************/
+//SIO Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(SIO_INT);
+}
+/*************************************************************/
+//SIO  Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO_INT_DISABLE(void)
+{
+	INTC_ICER_WRITE(SIO_INT);
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_spi.c b/Source/FWlib/apt32f102_spi.c
new file mode 100644
index 0000000..48e9d4d
--- /dev/null
+++ b/Source/FWlib/apt32f102_spi.c
@@ -0,0 +1,212 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_spi.c
+  * @author  APT AE Team
+  * @version V1.10
+  * @date    2021/08/25
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/ 
+#include "apt32f102_spi.h"
+/* defines -------------------------------------------------------------------*/
+
+/* -------- variables ---------------------------------------------------------*/
+
+/* externs--------------------------------------------------------------------*/
+extern void delay_nus(unsigned int t);
+/*************************************************************/
+//SPI RESET,CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_DeInit(void)
+{
+    SPI0->CR0   	= SPI_CR0_RST;
+    SPI0->CR1   	= SPI_CR1_RST;
+    //SPI0->DR   	 	= SPI_DR_RST;
+    SPI0->SR   	 	= SPI_SR_RST;
+    SPI0->CPSR   	= SPI_CPSR_RST;
+    SPI0->IMSCR   	= SPI_IMSCR_RST;
+    SPI0->RISR   	= SPI_RISR_RST;
+    SPI0->MISR   	= SPI_MISR_RST;
+    SPI0->ICR	 	= SPI_ICR_RST;
+}
+/*************************************************************/
+//SPI NSS IO Initial
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_NSS_IO_Init(U8_T SPI_NSS_IO_GROUP)
+{
+	if(SPI_NSS_IO_GROUP==0)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF)  | 0x05000000;				//PA0.6
+	}
+	else if(SPI_NSS_IO_GROUP==1)
+	{
+		GPIOB0->CONLR = (GPIOB0->CONLR&0XFF0FFFFF)  | 0x00800000;				//PB0.5
+	}
+}
+/*************************************************************/
+//SPI Master Init 	
+//EntryParameter:SPI_IO,SPI_DATA_SIZE_x,SPI_SPO_X,SPI_SPH_X,SPI_LBM_X,SPI_SCR,SPI_CPSDVSR
+//SPI_IO:SPI_G0,SPI_G1,SPI_G2
+//SPI_DATA_SIZE_x:SPI_DATA_SIZE_4BIT~SPI_DATA_SIZE_16BIT
+//SPI_SPO_X:SPI_SPO_0,SPI_SPO_1
+//SPI_SPH_X:SPI_SPH_0,SPI_SPH_1
+//SPI_LBM_X:SPI_LBM_0,SPI_LBM_1
+//SPI_RXIFLSEL_X:SPI_RXIFLSEL_1_8,SPI_RXIFLSEL_1_4,SPI_RXIFLSEL_1_2
+//SPI_SCR:0~255
+//SPI_CPSDVSR:2~254,Must be an even number between 2 and 254
+//ReturnValue:NONE
+/*************************************************************/
+//SPI Baud rate:FSSPCLK = FPCLK / (CPSDVR × (1 + SCR))
+//FPCLK (max) → 2 × FSSPCLKOUT (max) master	Fastest speed
+void SPI_Master_Init(SPI_IO_TypeDef SPI_IO , SPI_DATA_SIZE_TypeDef SPI_DATA_SIZE_x , SPI_SPO_TypeDef SPI_SPO_X , SPI_SPH_TypeDef SPI_SPH_X , SPI_LBM_TypeDef SPI_LBM_X , SPI_RXIFLSEL_TypeDef SPI_RXIFLSEL_X , U8_T SPI_SCR , U8_T SPI_CPSDVSR )
+{
+	if (SPI_IO==SPI_G0)
+    {
+		GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF00FF)  | 0x00008800;
+		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0)  | 0x00000008;            //PB0.2->SPI_SCK,PB0.3->SPI_MOSI,PA0.8->SPI_MIS0
+    }
+    else if(SPI_IO==SPI_G1)
+    {
+		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF000F)  | 0x00004440;            //PA0.9->SPI_SCK,PA0.10->SPI_MOSI,PA0.11->SPI_MIS0
+    }
+	else if(SPI_IO==SPI_G2)
+	{
+		GPIOB0->CONLR = (GPIOB0->CONLR&0XFFF0FFFF)  | 0x00080000;			//SPI_SCK->PB0.4
+		GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF)  | 0x88000000;			//SPI_MOSI->PA0.14,SPI_MISO->PA0.15
+	}
+	SPI0->CPSR=SPI_CPSDVSR;
+	
+	SPI0->CR0|=SPI_DATA_SIZE_x|(SPI_SPO_X<<6)|(SPI_SPH_X<<7)|(SPI_SCR<<8);
+	SPI0->CR1|=0X02|SPI_LBM_X|(SPI_RXIFLSEL_X<<4);
+}
+/*************************************************************/
+//SPI Slave Init 	
+//EntryParameter:SPI_IO,SPI_DATA_SIZE_x,SPI_RXIFLSEL_X,SPI_SCR,SPI_CPSDVSR
+//SPI_DATA_SIZE_x:SPI_DATA_SIZE_4BIT~SPI_DATA_SIZE_16BIT
+//SPI_RXIFLSEL_X:SPI_RXIFLSEL_1_8,SPI_RXIFLSEL_1_4,SPI_RXIFLSEL_1_2
+//SPI_SCR:0~255
+//SPI_CPSDVSR:2~254,Must be an even number between 2 and 254
+//ReturnValue:NONE
+/*************************************************************/
+//SPI波特率:FSSPCLK = FPCLK / (CPSDVR × (1 + SCR))
+//FPCLK (max) → 12 × FSSPCLKIN (max) slave	Fastest speed
+void SPI_Slave_Init(SPI_IO_TypeDef SPI_IO , SPI_DATA_SIZE_TypeDef SPI_DATA_SIZE_x , SPI_SPH_TypeDef SPI_SPH_X , SPI_RXIFLSEL_TypeDef SPI_RXIFLSEL_X , U8_T SPI_SCR , U8_T SPI_CPSDVSR)
+{
+	if (SPI_IO==SPI_G0)
+    {
+		GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFF00FF)  | 0x00008800;
+		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0)  | 0x00000008;            //PB0.2->SPI_SCK,PB0.3->SPI_MISO,PA0.8->SPI_MOSI
+    }
+    else if(SPI_IO==SPI_G1)
+    {
+		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF000F)  | 0x00004440;            //PA0.9->SPI_SCK,PA0.10->SPI_MISO,PA0.11->SPI_MOSI
+    }
+	else if(SPI_IO==SPI_G2)
+	{
+		GPIOB0->CONLR = (GPIOB0->CONLR&0XFFF0FFFF)  | 0x00080000;			//SPI_SCK->PB0.4
+		GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF)  | 0x88000000;			//SPI_MOSI->PA0.14,SPI_MISO->PA0.15
+	}
+	SPI0->CR0|=SPI_DATA_SIZE_x|(SPI_SPH_X<<7)|(SPI_SCR<<8);
+	SPI0->CPSR=SPI_CPSDVSR;
+	SPI0->CR1|=0X06|(SPI_RXIFLSEL_X<<4);
+}
+/*************************************************************/
+//SPI WRITE BYTE
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_WRITE_BYTE(U16_T wdata)
+{
+	while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	
+	SPI0->DR = wdata;
+	while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//wait for transmition finish
+}
+/*************************************************************/
+//SPI READ BYTE
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_READ_BYTE(U16_T wdata , volatile U16_T *rdata , U8_T Longth)
+{
+	U8_T i;
+	while(((SPI0->SR) & SSP_TNF) != SSP_TNF);		//Transmit FIFO is not full？
+	SPI0->DR = wdata;
+	while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+	delay_nus(1);
+	*rdata = SPI0->DR;
+	for(i=0;i<Longth;i++)
+	{
+		while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	
+		SPI0->DR=0;
+		while(((SPI0->SR) & SSP_BSY) == SSP_BSY);
+		*(rdata+i) = SPI0->DR;  	//get data from FIFO
+	}
+}
+/*************************************************************/
+//SPI inturrpt Configure
+//EntryParameter:SPI_IMSCR_X,NewState
+//SPI_IMSCR_X:SPI_PORIM,SPI_RTIM,SPI_RXIM,SPI_TXIM
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void SPI_ConfigInterrupt_CMD(FunctionalStatus NewState,SPI_IMSCR_TypeDef SPI_IMSCR_X)
+{
+	if (NewState != DISABLE)
+	{
+		SPI0->IMSCR  |= SPI_IMSCR_X;						//SET
+	}
+	else
+	{
+		SPI0->IMSCR  &= ~SPI_IMSCR_X;					//CLR
+	}
+}   
+/*************************************************************/
+//SPI Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SPI_INT);    
+}
+/*************************************************************/
+//SPI Interrupt disalbe
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_Int_Disable(void)
+{
+    INTC_ICER_WRITE(SPI_INT);    
+}
+/*************************************************************/
+//SPI Interrupt wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_Wakeup_Enable(void)
+{
+    INTC_IWER_WRITE(SPI_INT);    
+}
+
+/*************************************************************/
+//SPI Interrupt wake up disalbe
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI_Wakeup_Disable(void)
+{
+    INTC_IWDR_WRITE(SPI_INT);    
+}
+/******************* (C) COPYRIGHT 2018 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_syscon.c b/Source/FWlib/apt32f102_syscon.c
new file mode 100644
index 0000000..efe2770
--- /dev/null
+++ b/Source/FWlib/apt32f102_syscon.c
@@ -0,0 +1,817 @@
+/*
+  ******************************************************************************
+  * @file    main.c
+  * @author  APT AE Team
+  * @version V1.09
+  * @date    2021/07/30
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_syscon.h"
+/* define --------------------------------------------------------------------*/
+
+/* externs--------------------------------------------------------------------*/
+
+/*************************************************************/
+//Deinitializes the syscon registers to their default reset
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void SYSCON_RST_VALUE(void)									//reset value
+{
+	//SYSCON->IDCCR=SYSCON_IDCCR_RST;
+	//SYSCON->GCER=SYSCON_GCER_RST;
+	//SYSCON->GCDR=SYSCON_GCDR_RST;
+	//SYSCON->GCSR=SYSCON_GCSR_RST;
+	//SYSCON->CKST=SYSCON_CKST_RST;
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+	//SYSCON->PCLKCR=SYSCON_PCLKCR_RST;
+	//SYSCON->PCER0=SYSCON_PCER0_RST;
+	//SYSCON->PCDR0=SYSCON_PCDR0_RST;
+	//SYSCON->PCSR0=SYSCON_PCSR0_RST;
+	//SYSCON->PCER1=SYSCON_PCER1_RST;
+	//SYSCON->PCDR1=SYSCON_PCDR1_RST;
+	//SYSCON->PCSR1=SYSCON_PCSR1_RST;
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+	//SYSCON->CLCR=SYSCON_CLCR_RST;
+	//SYSCON->PWRCR=SYSCON_PWRCR_RST;
+	//SYSCON->IMER=SYSCON_IMER_RST;
+	//SYSCON->IMDR=SYSCON_IMDR_RST;
+	//SYSCON->IMCR=SYSCON_IMCR_RST;
+	//SYSCON->IAR=SYSCON_IAR_RST;
+	//SYSCON->ICR=SYSCON_ICR_RST;
+	//SYSCON->RISR=SYSCON_RISR_RST;
+	//SYSCON->MISR=SYSCON_MISR_RST;
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+	//SYSCON->EXIER=SYSCON_EXIER_RST;
+	//SYSCON->EXIDR=SYSCON_EXIDR_RST;
+	//SYSCON->EXIMR=SYSCON_EXIMR_RST;
+	//SYSCON->EXIAR=SYSCON_EXIAR_RST;
+	//SYSCON->EXICR=SYSCON_EXICR_RST;
+	//SYSCON->EXIRS=SYSCON_EXIRS_RST;
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+	//SYSCON->PWROPT=SYSCON_PWROPT_RST;
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+//	SYSCON->UREG0=SYSCON_UREG0_RST;
+//	SYSCON->UREG1=SYSCON_UREG1_RST;
+//	SYSCON->UREG2=SYSCON_UREG2_RST;
+//	SYSCON->UREG3=SYSCON_UREG3_RST;
+}
+/*************************************************************/
+//EMOSC OSTR Config
+//EM_CNT:0~0X3FF
+//EM_GM:0~0X1F
+//EM_FLEN;EM_FLEN_DIS,EM_FLEN_EN
+//EM_FLSEL:EM_FLSEL_5ns,EM_FLSEL_10ns,EM_FLSEL_15ns,EM_FLSEL_20ns
+/*************************************************************/  
+void EMOSC_OSTR_Config(U16_T EM_CNT, U8_T EM_GM,EM_LFSEL_TypeDef EM_LFSEL_X, EM_Filter_CMD_TypeDef EM_FLEN_X, EM_Filter_TypeDef EM_FLSEL_X)
+{
+	SYSCON->OSTR=EM_CNT|(EM_GM<<11)|EM_LFSEL_X|EM_FLEN_X|EM_FLSEL_X;
+}
+/*************************************************************/
+//SYSCON General Control
+//EntryParameter:NewState:,ENDIS_X
+//NewState:ENABLE,DISABLE
+//ENDIS_X:ENDIS_ISOSC,ENDIS_IMOSC,ENDIS_EMOSC,ENDIS_HFOSC
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+		switch(ENDIS_X)
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+				break;
+			case ENDIS_EMOSC:
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+				break;	
+			case ENDIS_ISOSC:
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+				break;
+			case ENDIS_HFOSC:
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+				break;	
+			case ENDIS_IDLE_PCLK:
+				break;	
+			case ENDIS_SYSTICK:
+				break;	
+		}
+	}
+	else
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+
+/*************************************************************/
+//Seleted system clk and seleted clk div
+//EntryParameter:SYSCLK_X,HCLK_DIV_X,PCLK_DIV_X
+//SYSCLK_X:SYSCLK_IMOSC,SYSCLK_EMOSC,SYSCLK_ISOSC,SYSCLK_HFOSC
+//HCLK_DIV_X:HCLK_DIV_1/2/3/4/5/6/7/8/12/16/24/32/64/128/256
+//PCLK_DIV_X:PCLK_DIV_1,PCLK_DIV_2,PCLK_DIV_4,PCLK_DIV_8,PCLK_DIV_16
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+	if(SystemClk_data_x==HFOSC_48M)
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+	}
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+}
+/*************************************************************/
+//clear system clk register
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_Clear(void)
+{
+	SYSCON->SCLKCR=0xd22d0000;
+	while(SYSCON->SCLKCR!=0);
+}
+/*************************************************************/
+//SYSCON IMOSC SELECTE
+//EntryParameter:IMOSC_SELECTE_X
+//IMOSC_SELECTE_X:IMOSC_SELECTE_5556K,IMOSC_SELECTE_4194K;IMOSC_SELECTE_2097K;IMOSC_SELECTE_131K
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_IMOSC_SELECTE(IMOSC_SELECTE_TypeDef IMOSC_SELECTE_X)
+{		
+	//SYSCON_General_CMD(DISABLE,ENDIS_IMOSC);					//disalbe IMOSC
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFFC)|IMOSC_SELECTE_X;	//IMOSC CLK selected
+	//SYSCON_General_CMD(ENABLE,ENDIS_IMOSC);						//enable IMOSC
+}
+/*************************************************************/
+//SYSCON HFOSC SELECTE
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+/*************************************************************/
+//WDT enable and disable 
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+	if(NewState != DISABLE)
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+	}
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+/*************************************************************/
+//reload WDT CN
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+}
+/*************************************************************/
+//IWDCNT Config
+//EntryParameter:NewStateE_IWDT_SHORT,IWDT_TIME_X,IWDT_INTW_DIV_X
+//NewStateE_IWDT_SHORT:ENABLE_IWDT_SHORT,DISABLE_IWDT_SHORT
+//IWDT_TIME_X:IWDT_TIME_128MS,IWDT_TIME_256MS,IWDT_TIME_500MS,IWDT_TIME_1S,IWDT_TIME_2S,IWDT_TIME_3S,IWDT_TIME_4S,IWDT_TIME_8S
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+}
+/*************************************************************/
+//LVD Config  and set LVD INT
+//EntryParameter:X_LVDEN,INTDET_LVL_X,RSTDET_LVL_X,X_LVD_INT
+//X_LVDEN:ENABLE_LVDEN,DISABLE_LVDEN
+//INTDET_LVL_X:INTDET_LVL_1_8V,INTDET_LVL_2_1V,INTDET_LVL_2_5V,INTDET_LVL_2_9V,INTDET_LVL_3_3V,INTDET_LVL_3_7V,INTDET_LVL_4_1V,INTDET_LVL_4_5V
+//RSTDET_LVL_X:RSTDET_LVL_1_6V,RSTDET_LVL_2_0V,RSTDET_LVL_2_4V,RSTDET_LVL_2_8V,RSTDET_LVL_3_2V,RSTDET_LVL_3_6V,RSTDET_LVL_4_0V,RSTDET_LVL_4_4V
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+}
+/*************************************************************/
+//LVD INT ENABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+	SYSCON->IMER  |= LVD_INT_ST;
+}
+/*************************************************************/
+//LVD INT DISABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Disable(void)
+{
+	SYSCON->IMDR  |= LVD_INT_ST;
+}
+/*************************************************************/
+//WDT INT ENABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+	SYSCON->IMER  |= IWDT_INT_ST;
+}
+/*************************************************************/
+//WDT INT DISABLE.
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Disable(void)
+{
+	SYSCON->IMDR  |= IWDT_INT_ST;
+}
+/*************************************************************/
+//Reset status.
+//EntryParameter:NONE
+//ReturnValue: rsr_dat
+//rsr_dat=0x01 power on reset
+//rsr_dat=0x02 low voltage reset
+//rsr_dat=0x04 ex-pin reset
+//rsr_dat=0x10 wdt reset
+//rsr_dat=0x40 ex clock invalid reset
+//rsr_dat=0x80 cpu request reset
+//rsr_dat=0x100 software reset
+/*************************************************************/
+U32_T Read_Reset_Status(void)
+{
+	return (SYSCON->RSR & 0x1ff);
+}
+/*************************************************************/
+//external trigger  Mode Selection Functions
+//EntryParameter:NewState,EXIPIN,EXI_tringer_mode
+//NewState:ENABLE,DISABLE
+//EXIPIN:EXI_PIN0/1/2/3/4/5/6/7/8/9/10/11/12/13
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+	{
+		case _EXIRT:
+		if(NewState != DISABLE)
+		{
+			SYSCON->EXIRT |=EXIPIN;
+		}
+		else
+		{
+			SYSCON->EXIRT &=~EXIPIN;	
+		}
+		break;
+		case _EXIFT:
+		if(NewState != DISABLE)
+		{
+			SYSCON->EXIFT |=EXIPIN;
+		}
+		else
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+/*************************************************************/
+//external interrupt enable and disable 
+//EntryParameter:NewState,EXIPIN,* GPIOX
+//* GPIOX:GPIOA,GPIOB
+//EXIPIN:EXI_PIN0/1/2/3/4/5/6/7/8/9/10/11/12/13
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void EXTI_interrupt_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN)
+{
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+	if(NewState != DISABLE)
+	{
+		SYSCON->EXIER|=EXIPIN;								//EXI4 interrupt enable
+		while(!(SYSCON->EXIMR&EXIPIN));						//Check EXI is enabled or not
+		SYSCON->EXICR |=EXIPIN;								// Clear EXI status bit
+	}
+	else
+	{
+		SYSCON->EXIDR|=EXIPIN;
+	}
+}
+/*************************************************************/
+//GPIO EXTI interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPIO_EXTI_interrupt(CSP_GPIO_T * GPIOX,U32_T GPIO_IECR_VALUE)
+{
+	GPIOX->IECR=GPIO_IECR_VALUE;
+}
+/*************************************************************/
+//PLCK goto SLEEP mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void PCLK_goto_idle_mode(void)
+{
+	asm ("doze");											// Enter sleep mode
+}  
+/*************************************************************/
+//PLCK goto SLEEP mode
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void PCLK_goto_deepsleep_mode(void)
+{
+	SYSCON->WKCR=0X3F<<8;
+	asm ("stop");
+}  
+/*************************************************************/
+//EXI0 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI0_INT);    
+}
+
+/*************************************************************/
+//EXI0 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0_Int_Disable(void)
+{
+    INTC_ICER_WRITE(EXI0_INT);    
+}
+
+/*************************************************************/
+//EXI1 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI1_INT);    
+}
+
+/*************************************************************/
+//EXI1 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1_Int_Disable(void)
+{
+    INTC_ICER_WRITE(EXI1_INT);    
+}
+
+/*************************************************************/
+//EXI2 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI2_INT);    
+}
+
+/*************************************************************/
+//EXI2 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2_Int_Disable(void)
+{
+    INTC_ICER_WRITE(EXI2_INT);    
+}
+
+/*************************************************************/
+//EXI3 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI3_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI3_INT);    
+}
+
+/*************************************************************/
+//EXI3 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI3_Int_Disable(void)
+{
+    INTC_ICER_WRITE(EXI3_INT);    
+}
+
+/*************************************************************/
+//EXI4 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI4_INT);    
+}
+
+/*************************************************************/
+//EXI4 Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_Int_Disable(void)
+{
+    INTC_ICER_WRITE(EXI4_INT);    
+}
+/*************************************************************/
+//EXI0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(EXI0_INT);    
+}
+
+/*************************************************************/
+//EXI0 Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(EXI0_INT);    
+}
+
+/*************************************************************/
+//EXI1 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(EXI1_INT);    
+}
+
+/*************************************************************/
+//EXI1 Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(EXI1_INT);    
+}
+
+/*************************************************************/
+//EXI2 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(EXI2_INT);    
+}
+
+/*************************************************************/
+//EXI2 Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(EXI2_INT);    
+}
+
+/*************************************************************/
+//EXI3 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI3_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(EXI3_INT);    
+}
+
+/*************************************************************/
+//EXI3 Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI3_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(EXI3_INT);    
+}
+
+/*************************************************************/
+//EXI4 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(EXI4_INT);    
+}
+
+/*************************************************************/
+//EXI4 Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(EXI4_INT);    
+}
+/*************************************************************/
+//SYSCON Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+}
+
+/*************************************************************/
+//SYSCON Interrupt disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Disable(void)
+{
+    INTC_ICER_WRITE(SYSCON_INT);    
+}
+/*************************************************************/
+//SYSCON Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(SYSCON_INT);    
+}
+/*************************************************************/
+//set PA0.0/PA0.8 as CLO output 
+//EntryParameter:CLO_PA02/CLO_PA08
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CLO_CONFIG(CLO_IO_TypeDef clo_io)
+{
+	if (clo_io==CLO_PA02)
+	{
+		GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000700;
+	}
+	if (clo_io==CLO_PA08)
+	{
+		GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000007;
+	}
+	
+}
+/*************************************************************/
+//set CLO clk and div
+//EntryParameter:clomxr/clodivr
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CLO_SRC_SET(SystemClk_CLOMX_TypeDef clomxr,SystemClk_CLODIV_TypeDef clodivr)
+{
+	SYSCON->OPT1=(SYSCON->OPT1 & 0XFFFF00FF)|(clomxr<<8)|(clodivr<<12);
+}
+/*************************************************************/
+//SYSCON Wake up disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(SYSCON_INT);    
+}
+/*************************************************************/
+//READ CIF0 data
+//EntryParameter:None
+//ReturnValue:VALUE
+/*************************************************************/
+U32_T SYSCON_Read_CINF0(void)
+{
+    U32_T value = 0;
+    value=SYSCON->CINF0;
+    return value;
+}
+/*************************************************************/
+//READ CIF1 data
+//EntryParameter:None
+//ReturnValue:VALUE
+/*************************************************************/
+U32_T SYSCON_Read_CINF1(void)
+{
+    U32_T value = 0;
+    value=SYSCON->CINF1;
+    return value;
+}
+/*************************************************************/
+//Software_Reset
+//EntryParameter:None
+//ReturnValue:MCU reset
+/*************************************************************/
+void SYSCON_Software_Reset(void)
+{
+	SYSCON->IDCCR=IDCCR_KEY|SWRST;
+}
+/*************************************************************/
+//Interrupt Priority initial
+//EntryParameter:00/40/80/C0
+//----------------------
+//CORET_INT   IRQ0
+//SYSCON_INT  IRQ1
+//IFC_INT     IRQ2
+//ADC_INT     IRQ3
+//----------------------
+//EPT0_INT    IRQ4
+//****DUMMY   IRQ5
+//WWDT_INT    IRQ6
+//EXI0_INT    IRQ7
+//----------------------
+//EXI1_INT    IRQ8
+//GPT0_INT    IRQ9 
+//****DUMMY   IRQ10
+//****DUMMY   IRQ11
+//----------------------
+//RTC_INT     IRQ12
+//UART0_INT   IRQ13
+//UART1_INT   IRQ14
+//UART2_INT   IRQ15
+//----------------------
+//****DUMMY   IRQ16
+//I2C_INT     IRQ17
+//****DUMMY   IRQ18
+//SPI_INT     IRQ19
+//----------------------
+//SIO_INT     IRQ20
+//EXI2_INT    IRQ21
+//EXI3_INT    IRQ22
+//EXI4_INT    IRQ23
+//----------------------
+//CA_INT      IRQ24
+//TKEY_INT    IRQ25
+//LPT_INT     IRQ26
+//****DUMMY   IRQ27
+//----------------------
+//BT0_INT     IRQ28
+//BT1_INT     IRQ29
+//----------------------
+//ReturnValue:None
+//00:Priority 0		highest
+//40:Priority 1
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+}
+/*************************************************************/
+//Set Interrupt Priority
+//EntryParameter:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+}
+/*************************************************************/
+//IO REMAP
+//EntryParameter:GPIOA0(0,1,2,3,4,5,6,7) GPIOB0(2,3),GPIOA0(8,9,10,11,12,13)
+//0x00=I2C_SCL 0X01=I2C_SDA 0X02=GPT_CHA 0X03=GPT_CHB
+//0X04=SPI_MOSI 0X05=SPI_MISO 0X06=SPI_SCK 0X07=SPI_NSS
+//0x00=UART0_RX 0X01=UART0_TX 0X02=EPT_CHAX 0X03=PT_CHBX
+//0X04=PT_CHCX 0X05=PT_CHAY 0X06=PT_CHBY 0X07=PT_CHCY
+//ReturnValue:NONE
+/*************************************************************/
+void GPIO_Remap(CSP_GPIO_T *GPIOx,uint8_t bit,IOMAP_DIR_TypeDef iomap_data)
+{
+	U8_T i;
+	if(iomap_data&0x10)
+	{
+		iomap_data=iomap_data&0X0F;
+		if(iomap_data==0)
+		{
+			for(i=0;i<28;i+=4)
+			{
+				if((SYSCON->IOMAP1&(0xf<<i))==0)
+				{
+					SYSCON->IOMAP1=SYSCON->IOMAP1|(0xf<<i);
+				}
+			}
+		}
+		if(bit==2){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xfffffff0)|iomap_data;(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFF0FF) | 0x00000A00;}
+		if(bit==3){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xffffff0f)|(iomap_data<<4);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFF0FFF) | 0x0000A000;}
+		if(bit==8){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xfffff0ff)|(iomap_data<<8);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFFFFF0) | 0x0000000A;}
+		if(bit==9){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xffff0fff)|(iomap_data<<12);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFFFF0F) | 0x000000A0;}
+		if(bit==10){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xfff0ffff)|(iomap_data<<16);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFFF0FF) | 0x00000A00;}
+		if(bit==11){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xff0fffff)|(iomap_data<<20);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFFF0FFF) | 0x0000A000;}
+		if(bit==12){SYSCON->IOMAP1=(SYSCON->IOMAP1&0xf0ffffff)|(iomap_data<<24);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFFF0FFFF) | 0x000A0000;}
+		if(bit==13){SYSCON->IOMAP1=(SYSCON->IOMAP1&0x0fffffff)|(iomap_data<<28);(GPIOx)->CONHR =((GPIOx)->CONHR&0XFF0FFFFF) | 0x00A00000;}
+	}
+	else
+	{
+		if(iomap_data==0)
+		{
+			for(i=0;i<28;i+=4)
+			{
+			if((SYSCON->IOMAP0&(0xf<<i))==0)
+				{
+					SYSCON->IOMAP0=SYSCON->IOMAP0|(0xf<<i);
+				}
+			}
+		}
+		if(bit==0){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xfffffff0)|iomap_data;(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFFFF0) | 0x0000000A;}
+		if(bit==1){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xffffff0f)|(iomap_data<<4);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFFF0F) | 0x000000A0;}
+		if(bit==2){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xfffff0ff)|(iomap_data<<8);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFFF0FF) | 0x00000A00;}
+		if(bit==3){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xffff0fff)|(iomap_data<<12);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFFF0FFF) | 0x0000A000;}
+		if(bit==4){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xfff0ffff)|(iomap_data<<16);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFFF0FFFF) | 0x000A0000;}
+		if(bit==5){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xff0fffff)|(iomap_data<<20);(GPIOx)->CONLR =((GPIOx)->CONLR&0XFF0FFFFF) | 0x00A00000;}
+		if(bit==6){SYSCON->IOMAP0=(SYSCON->IOMAP0&0xf0ffffff)|(iomap_data<<24);(GPIOx)->CONLR =((GPIOx)->CONLR&0XF0FFFFFF) | 0x0A000000;}
+		if(bit==7){SYSCON->IOMAP0=(SYSCON->IOMAP0&0x0fffffff)|(iomap_data<<28);(GPIOx)->CONLR =((GPIOx)->CONLR&0X0FFFFFFF) | 0x0A0000000;}
+	}
+}
+/******************* (C) COPYRIGHT 2018 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_tkey_parameter.c b/Source/FWlib/apt32f102_tkey_parameter.c
new file mode 100644
index 0000000..36c7295
--- /dev/null
+++ b/Source/FWlib/apt32f102_tkey_parameter.c
@@ -0,0 +1,99 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_tkey_parameter.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+#include "apt32f102_tkey.h"
+
+
+void tk_parameter_init(void)
+{
+/****************************************************
+//TK parameter define
+*****************************************************/
+	TK_IO_ENABLE=0x4F01;							//TK IO ENABLE Bit16-->Bit0;0=DISABLE 1=ENABLE
+	
+	TK_senprd[0]=180;								//TCH0 scan period = TCH0 sens
+	TK_senprd[1]=70;								//TCH1 scan period = TCH1 sens
+	TK_senprd[2]=70;								//TCH2 scan period = TCH2 sens
+	TK_senprd[3]=70;								//TCH3 scan period = TCH3 sens
+	TK_senprd[4]=70;								//TCH4 scan period = TCH4 sens
+	TK_senprd[5]=70;								//TCH5 scan period = TCH5 sens
+	TK_senprd[6]=70;								//TCH6 scan period = TCH6 sens
+	TK_senprd[7]=70;								//TCH7 scan period = TCH7 sens
+	TK_senprd[8]=180;								//TCH8 scan period = TCH8 sens
+	TK_senprd[9]=180;								//TCH9 scan period = TCH9 sens
+	TK_senprd[10]=70;								//TCH10 scan period = TCH10 sens
+	TK_senprd[11]=70;								//TCH11 scan period = TCH11 sens
+	TK_senprd[12]=180;								//TCH12 scan period = TCH12 sens
+	TK_senprd[13]=180;								//TCH13 scan period = TCH13 sens
+	TK_senprd[14]=180;								//TCH14 scan period = TCH14 sens
+	TK_senprd[15]=70;								//TCH15 scan period = TCH15 sens
+	TK_senprd[16]=70;								//TCH16 scan period = TCH16 sens
+	TK_Triggerlevel[0]=100;							//TCH0 TK_Trigger level
+	TK_Triggerlevel[1]=40;							//TCH1 TK_Trigger level
+	TK_Triggerlevel[2]=40;							//TCH2 TK_Trigger level
+	TK_Triggerlevel[3]=40;							//TCH3 TK_Trigger level
+	TK_Triggerlevel[4]=40;							//TCH4 TK_Trigger level
+	TK_Triggerlevel[5]=40;							//TCH5 TK_Trigger level
+	TK_Triggerlevel[6]=40;							//TCH6 TK_Trigger level
+	TK_Triggerlevel[7]=40;							//TCH7 TK_Trigger level
+	TK_Triggerlevel[8]=100;							//TCH8 TK_Trigger level
+	TK_Triggerlevel[9]=100;							//TCH9 TK_Trigger level
+	TK_Triggerlevel[10]=40;							//TCH10 TK_Trigger level
+	TK_Triggerlevel[11]=40;							//TCH11 TK_Trigger level
+	TK_Triggerlevel[12]=100;							//TCH12 TK_Trigger level
+	TK_Triggerlevel[13]=100;							//TCH13 TK_Trigger level
+	TK_Triggerlevel[14]=100;							//TCH14 TK_Trigger level
+	TK_Triggerlevel[15]=40;							//TCH15 TK_Trigger level
+	TK_Triggerlevel[16]=40;							//TCH16 TK_Trigger level
+	Press_debounce_data=6;							//Press debounce 1~10
+	Release_debounce_data=5;						//Release debounce 1~10
+	Key_mode=1;										//Key mode 0=single key 1=multi key
+	MultiTimes_Filter=40;							//MultiTimes Filter,>4 ENABLE <4 DISABLE
+	Valid_Key_Num=6;								//Valid Key number when touched
+	Base_Speed=20;									//baseline update speed
+	TK_longpress_time=8;							//longpress rebuild time = _TK_longpress_time1*1s  0=disable
+	TK_BaseCnt=59999;								//10ms  TK_BaseCnt=10ms*48M/8-1,this register need to modify when mcu's Freq changed
+
+/****************************************************
+//TK low power function define
+*****************************************************/
+	TK_Lowpower_mode=DISABLE;						//touch key can goto sleep when TK lowpower mode enable
+	TK_Lowpower_level=2;							//0=20ms 1=50ms 2=100ms 3=150ms 4=200ms,Scan interval when sleep
+	TK_Wakeup_level=50;								//touch key Trigger level in sleep
+/****************************************************
+//TK special parameter define
+*****************************************************/
+	TK_PSEL_MODE=TK_PSEL_FVR;						//tk power sel:TK_PSEL_FVR/TK_PSEL_AVDD   when select TK_PSEL_FVR PA0.2(TCH3) need a 104 cap
+	TK_FVR_LEVEL=TK_FVR_2048V;						//FVR level:TK_FVR_2048V/TK_FVR_4096V
+	TK_EC_LEVEL=TK_EC_1V;							//C0 voltage sel:TK_EC_1V/TK_EC_2V/TK_EC_3V/TK_EC_3_6V
+	TK_icon[0]=6;									//TCH0 TK Scan icon range 0~7
+	TK_icon[1]=6;									//TCH1 TK Scan icon range 0~7
+	TK_icon[2]=6;									//TCH2 TK Scan icon range 0~7
+	TK_icon[3]=6;									//TCH3 TK Scan icon range 0~7
+	TK_icon[4]=6;									//TCH4 TK Scan icon range 0~7
+	TK_icon[5]=6;									//TCH5 TK Scan icon range 0~7
+	TK_icon[6]=6;									//TCH6 TK Scan icon range 0~7
+	TK_icon[7]=6;									//TCH7 TK Scan icon range 0~7
+	TK_icon[8]=6;									//TCH8 TK Scan icon range 0~7
+	TK_icon[9]=6;									//TCH9 TK Scan icon range 0~7
+	TK_icon[10]=6;									//TCH10 TK Scan icon range 0~7
+	TK_icon[11]=6;									//TCH11 TK Scan icon range 0~7
+	TK_icon[12]=6;									//TCH12 TK Scan icon range 0~7
+	TK_icon[13]=6;									//TCH13 TK Scan icon range 0~7
+	TK_icon[14]=6;									//TCH14 TK Scan icon range 0~7
+	TK_icon[15]=6;									//TCH15 TK Scan icon range 0~7
+	TK_icon[16]=6;									//TCH16 TK Scan icon range 0~7
+}
\ No newline at end of file
diff --git a/Source/FWlib/apt32f102_uart.c b/Source/FWlib/apt32f102_uart.c
new file mode 100644
index 0000000..bd81163
--- /dev/null
+++ b/Source/FWlib/apt32f102_uart.c
@@ -0,0 +1,397 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_uart.c
+  * @author  APT AE Team
+  * @version V1.15
+  * @date    2022/09/05
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_uart.h"
+
+
+/* define --------------------------------------------------------------------*/
+volatile U8_T RxDataFlag=0;
+volatile U8_T TxDataFlag=0;
+volatile U8_T f_Uart_send_Complete;
+volatile U16_T Uart_send_Length_temp;
+volatile U8_T Uart_send_Length;
+volatile U8_T Uart_buffer[UART_BUFSIZE];
+/* externs--------------------------------------------------------------------*/
+
+
+/*************************************************************/
+//UART RESET,CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    UART0->SR   = UART_RESET_VALUE;
+    UART0->CTRL = UART_RESET_VALUE;
+    UART0->ISR  = UART_RESET_VALUE;
+    UART0->BRDIV =UART_RESET_VALUE;
+}
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    UART1->SR   = UART_RESET_VALUE;
+    UART1->CTRL = UART_RESET_VALUE;
+    UART1->ISR  = UART_RESET_VALUE;
+    UART1->BRDIV =UART_RESET_VALUE;
+}
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    UART2->SR   = UART_RESET_VALUE;
+    UART2->CTRL = UART_RESET_VALUE;
+    UART2->ISR  = UART_RESET_VALUE;
+    UART2->BRDIV =UART_RESET_VALUE;
+}
+/*************************************************************/
+//UART0 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+}
+/*************************************************************/
+//UART0 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Disable(void)
+{
+	INTC_ICER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+}
+/*************************************************************/
+//UART1 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_Int_Enable(void)
+{
+    UART1->ISR=0x0F;									//clear UART1 INT status
+	INTC_ISER_WRITE(UART1_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+}
+/*************************************************************/
+//UART1 Interrupt Disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_Int_Disable(void)
+{
+    INTC_ICER_WRITE(UART1_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+}
+/*************************************************************/
+//UART1 Interrupt enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+}
+/*************************************************************/
+//UART1 Interrupt Disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Disable(void)
+{
+    INTC_ICER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+}
+/*************************************************************/
+//UART0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(UART0_INT);    
+}
+
+/*************************************************************/
+//UART0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(UART0_INT);    
+}
+/*************************************************************/
+//UART0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(UART1_INT);    
+}
+
+/*************************************************************/
+//UART0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(UART1_INT);    
+}
+/*************************************************************/
+//UART0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_WakeUp_Enable(void)
+{
+    INTC_IWER_WRITE(UART2_INT);    
+}
+
+/*************************************************************/
+//UART0 Wake up enable
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_WakeUp_Disable(void)
+{
+    INTC_IWDR_WRITE(UART2_INT);    
+}
+/*************************************************************/
+//UART IO Init
+//EntryParameter:IO_UARTX,UART_IO_G
+//IO_UARTX:IO_UART0,IO_UART1
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    {
+		if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+		}
+		else if(UART_IO_G==1)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+		}
+    }
+     if (IO_UART_NUM==IO_UART1)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+		}
+		else if(UART_IO_G==1)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+		}
+		else if(UART_IO_G==2)
+		{
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+		}
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+		}
+		else if(UART_IO_G==1)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+		}
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+/*************************************************************/
+//UART Init
+//EntryParameter:UART0,UART1,UART2 ,baudrate_u16 
+//e.g:
+//sys_clk@24MHz, 24/4(div)=6MHz, 6000000/115200bps=52,baudrate_u16=52
+//sys_clk@24MHz, 24/2(div)=12MHz, 12000000/115200bps=104,baudrate_u16=104
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+}
+/*************************************************************/
+//UART init and enable RX,TX interrupt
+//EntryParameter:UART0,UART1,UART2 ,baudrate_u16 
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+}
+/*************************************************************/
+//UART init and enable RX interrupt
+//EntryParameter:UART0,UART1,UART2 ,baudrate_u16 
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT |PAR_DAT);
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+   
+}
+/*************************************************************/
+//UART Close
+//EntryParameter:UART0,UART1,UART2
+//ReturnValue:NONE
+/*************************************************************/
+void UARTClose(CSP_UART_T *uart)
+{
+	// Set Transmitter Disable
+	CSP_UART_SET_CTRL(uart, 0x00);
+}
+/*************************************************************/
+//UART TX Byte loop send
+//EntryParameter:UART0,UART1,UART2,txdata_u8
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTxByte(CSP_UART_T *uart,U8_T txdata_u8)
+{
+	unsigned int  DataI;
+	// Write the transmit buffer
+	CSP_UART_SET_DATA(uart,txdata_u8);
+	do
+	{
+		DataI = CSP_UART_GET_SR(uart);
+		DataI = DataI & UART_TX_FULL;
+	}
+	while(DataI == UART_TX_FULL);    //Loop  when tx is full
+}
+/*************************************************************/
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+/*************************************************************/
+//UART  INT Transmit 
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTTransmit_data_set(CSP_UART_T *uart )
+{
+	if(!f_Uart_send_Complete)
+	{
+		f_Uart_send_Complete=1;
+		Uart_send_Length_temp++;
+		CSP_UART_SET_DATA(uart,Uart_buffer[0]);
+	}
+}
+void UARTTransmit_INT_Send(CSP_UART_T *uart )
+{
+	if(f_Uart_send_Complete)
+	{
+		if(Uart_send_Length_temp>=Uart_send_Length)
+		{
+			f_Uart_send_Complete=0;
+			Uart_send_Length_temp=0;
+		}
+		else
+		{
+			CSP_UART_SET_DATA(uart,Uart_buffer[Uart_send_Length_temp++]);
+		}
+	}	
+}
+/*************************************************************/
+//UART RX Byte 
+//EntryParameter:UART0,UART1,UART2,Rxdata_u16
+//ReturnValue:NONE
+/*************************************************************/
+U16_T UARTRxByte(CSP_UART_T *uart,U8_T *Rxdata_u16)
+{
+	unsigned int  DataI;
+
+	DataI = CSP_UART_GET_SR(uart);
+	DataI = DataI & UART_RX_FULL;
+	if(DataI != UART_RX_FULL)    //Loop  when rx is not full
+		return FALSE;
+	else
+	{
+		*Rxdata_u16 = CSP_UART_GET_DATA(uart);
+	    return TRUE;
+	}
+}
+
+/*************************************************************/
+//UART RX Return Byte 
+//EntryParameter:UART0,UART1,UART2
+//ReturnValue:(uart)->DATA
+/*************************************************************/
+U8_T UART_ReturnRxByte(CSP_UART_T *uart)
+{
+	RxDataFlag = FALSE;
+	while(RxDataFlag != TRUE);
+	return CSP_UART_GET_DATA(uart);
+}
+
+/*************************************************************/
+//UART Receive
+//EntryParameter:UART0,UART1,UART2，destAddress_u16，length_u16
+//ReturnValue:FALSE/TRUE
+/*************************************************************/
+U16_T UARTReceive(CSP_UART_T *uart,U8_T *destAddress_u16,U16_T length_u16)
+{
+	unsigned int  DataI,DataJ,LoopTime;
+
+	DataJ = 0;
+	LoopTime = 0;
+	do{
+		DataI = CSP_UART_GET_SR(uart);
+		DataI = DataI & UART_RX_FULL;
+		if(DataI == UART_RX_FULL)    //Loop  when rx is full
+		{
+			*destAddress_u16++ = CSP_UART_GET_DATA(uart);
+			DataJ++;
+			LoopTime = 0;
+		}
+		if(LoopTime ++ >= 0xfff0)
+			return FALSE;
+	}while(DataJ < length_u16);
+	return TRUE;
+}
diff --git a/Source/FWlib/apt32f102_wwdt.c b/Source/FWlib/apt32f102_wwdt.c
new file mode 100644
index 0000000..35591a1
--- /dev/null
+++ b/Source/FWlib/apt32f102_wwdt.c
@@ -0,0 +1,90 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_wwdt.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+  
+  /* Includes ------------------------------------------------------------------*/
+#include "apt32f102_wwdt.h"
+
+
+/*************************************************************/
+//WWDT RESET CLEAR ALL REGISTER
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/  
+void WWDT_DeInit(void)
+{
+	WWDT->CR 	= 0x000000FF;
+	WWDT->CFGR 	= 0x000000FF;
+	WWDT->RISR 	= WWDT_RESET_VALUE;
+	WWDT->MISR	= WWDT_RESET_VALUE;
+	WWDT->IMCR 	= WWDT_RESET_VALUE;
+	WWDT->ICR 	= WWDT_RESET_VALUE;
+}
+/*************************************************************/
+//WWDT CONFIG
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CONFIG(WWDT_PSCDIV_TypeDef PSCDIVX,U8_T WND_DATA,WWDT_DBGEN_TypeDef DBGENX)
+{
+	WWDT->CFGR =WND_DATA;
+	WWDT->CFGR |= PSCDIVX |DBGENX;
+}
+/*************************************************************/
+//WWDT ENABLE/DISABLE
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CMD(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		WWDT->CR  |= 0x01<<8;						
+	}
+	else
+	{
+		WWDT->CR  &= 0xfffffeff;					
+	}
+}
+/*************************************************************/
+//WWDT load data
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+}
+/*************************************************************/
+//WWDT INT ENABLE/DISABLE
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void WWDT_Int_Config(FunctionalStatus NewState)
+{
+	if (NewState != DISABLE)
+	{
+		WWDT->ICR = WWDT_EVI;				
+		WWDT->IMCR  |= WWDT_EVI;
+		INTC_ISER_WRITE(WWDT_INT);  
+	}
+	else
+	{
+		WWDT->IMCR  &= ~WWDT_EVI;					//CLR
+		INTC_ICER_WRITE(WWDT_INT);  
+	}
+}
\ No newline at end of file
diff --git a/Source/Lst/NRF_T1F_CR_V01_20240415.asm b/Source/Lst/NRF_T1F_CR_V01_20240415.asm
new file mode 100644
index 0000000..b984ed2
--- /dev/null
+++ b/Source/Lst/NRF_T1F_CR_V01_20240415.asm
@@ -0,0 +1,10719 @@
+
+.//Obj/NRF_T1F_CR_V01_20240415.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	00002ede 	.long	0x00002ede
+       8:	00002ece 	.long	0x00002ece
+       c:	00000184 	.long	0x00000184
+      10:	00002ed6 	.long	0x00002ed6
+      14:	00002e94 	.long	0x00002e94
+      18:	00000184 	.long	0x00000184
+      1c:	00002ec6 	.long	0x00002ec6
+      20:	00002ebe 	.long	0x00002ebe
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	00002eb6 	.long	0x00002eb6
+      44:	00002eae 	.long	0x00002eae
+      48:	00002ea6 	.long	0x00002ea6
+      4c:	00002e9e 	.long	0x00002e9e
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00002e96 	.long	0x00002e96
+      80:	00004124 	.long	0x00004124
+      84:	00002574 	.long	0x00002574
+      88:	00002664 	.long	0x00002664
+      8c:	000026cc 	.long	0x000026cc
+      90:	00002734 	.long	0x00002734
+      94:	00000184 	.long	0x00000184
+      98:	000028e0 	.long	0x000028e0
+      9c:	00002c4c 	.long	0x00002c4c
+      a0:	00002c7c 	.long	0x00002c7c
+      a4:	00002914 	.long	0x00002914
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00002994 	.long	0x00002994
+      b4:	00002a04 	.long	0x00002a04
+      b8:	00002a40 	.long	0x00002a40
+      bc:	00002a7c 	.long	0x00002a7c
+      c0:	00000184 	.long	0x00000184
+      c4:	00002eee 	.long	0x00002eee
+      c8:	00000184 	.long	0x00000184
+      cc:	00002b10 	.long	0x00002b10
+      d0:	00002bf8 	.long	0x00002bf8
+      d4:	00002cac 	.long	0x00002cac
+      d8:	00002cf4 	.long	0x00002cf4
+      dc:	00002d50 	.long	0x00002d50
+      e0:	00002ee6 	.long	0x00002ee6
+      e4:	00003b94 	.long	0x00003b94
+      e8:	00002db0 	.long	0x00002db0
+      ec:	00000184 	.long	0x00000184
+      f0:	00002de4 	.long	0x00002de4
+      f4:	00002e30 	.long	0x00002e30
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x1a50	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x232c	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00001a50 	.long	0x00001a50
+     198:	00000160 	.long	0x00000160
+     19c:	0000232c 	.long	0x0000232c
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x4420	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00004420 	.long	0x00004420
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x4420	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x4420	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00004420 	.long	0x00004420
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x4450	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00004450 	.long	0x00004450
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x4450	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00004450 	.long	0x00004450
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x4450	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00004450 	.long	0x00004450
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x4464	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	00004464 	.long	0x00004464
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__memset_fast>:
+    1964:	14c3      	push      	r4-r6
+    1966:	7444      	zextb      	r1, r1
+    1968:	3a40      	cmpnei      	r2, 0
+    196a:	0c1f      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    196c:	6d43      	mov      	r5, r0
+    196e:	6d03      	mov      	r4, r0
+    1970:	3603      	movi      	r6, 3
+    1972:	6918      	and      	r4, r6
+    1974:	3c40      	cmpnei      	r4, 0
+    1976:	0c1a      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    1978:	a520      	st.b      	r1, (r5, 0x0)
+    197a:	2a00      	subi      	r2, 1
+    197c:	3a40      	cmpnei      	r2, 0
+    197e:	0c15      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1980:	2500      	addi      	r5, 1
+    1982:	6d17      	mov      	r4, r5
+    1984:	3603      	movi      	r6, 3
+    1986:	6918      	and      	r4, r6
+    1988:	3c40      	cmpnei      	r4, 0
+    198a:	0c10      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    198c:	a520      	st.b      	r1, (r5, 0x0)
+    198e:	2a00      	subi      	r2, 1
+    1990:	3a40      	cmpnei      	r2, 0
+    1992:	0c0b      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1994:	2500      	addi      	r5, 1
+    1996:	6d17      	mov      	r4, r5
+    1998:	3603      	movi      	r6, 3
+    199a:	6918      	and      	r4, r6
+    199c:	3c40      	cmpnei      	r4, 0
+    199e:	0c06      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a0:	a520      	st.b      	r1, (r5, 0x0)
+    19a2:	2a00      	subi      	r2, 1
+    19a4:	2500      	addi      	r5, 1
+    19a6:	0402      	br      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a8:	1483      	pop      	r4-r6
+    19aa:	4168      	lsli      	r3, r1, 8
+    19ac:	6c4c      	or      	r1, r3
+    19ae:	4170      	lsli      	r3, r1, 16
+    19b0:	6c4c      	or      	r1, r3
+    19b2:	3a2f      	cmplti      	r2, 16
+    19b4:	0809      	bt      	0x19c6	// 19c6 <__memset_fast+0x62>
+    19b6:	b520      	st.w      	r1, (r5, 0x0)
+    19b8:	b521      	st.w      	r1, (r5, 0x4)
+    19ba:	b522      	st.w      	r1, (r5, 0x8)
+    19bc:	b523      	st.w      	r1, (r5, 0xc)
+    19be:	2a0f      	subi      	r2, 16
+    19c0:	250f      	addi      	r5, 16
+    19c2:	3a2f      	cmplti      	r2, 16
+    19c4:	0ff9      	bf      	0x19b6	// 19b6 <__memset_fast+0x52>
+    19c6:	3a23      	cmplti      	r2, 4
+    19c8:	0806      	bt      	0x19d4	// 19d4 <__memset_fast+0x70>
+    19ca:	2a03      	subi      	r2, 4
+    19cc:	b520      	st.w      	r1, (r5, 0x0)
+    19ce:	2503      	addi      	r5, 4
+    19d0:	3a23      	cmplti      	r2, 4
+    19d2:	0ffc      	bf      	0x19ca	// 19ca <__memset_fast+0x66>
+    19d4:	3a40      	cmpnei      	r2, 0
+    19d6:	0fe9      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19d8:	2a00      	subi      	r2, 1
+    19da:	a520      	st.b      	r1, (r5, 0x0)
+    19dc:	3a40      	cmpnei      	r2, 0
+    19de:	0fe5      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e0:	2a00      	subi      	r2, 1
+    19e2:	a521      	st.b      	r1, (r5, 0x1)
+    19e4:	3a40      	cmpnei      	r2, 0
+    19e6:	0fe1      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e8:	a522      	st.b      	r1, (r5, 0x2)
+    19ea:	1483      	pop      	r4-r6
+
+000019ec <__memcpy_fast>:
+    19ec:	14c3      	push      	r4-r6
+    19ee:	6d83      	mov      	r6, r0
+    19f0:	6d07      	mov      	r4, r1
+    19f2:	6d18      	or      	r4, r6
+    19f4:	3303      	movi      	r3, 3
+    19f6:	690c      	and      	r4, r3
+    19f8:	3c40      	cmpnei      	r4, 0
+    19fa:	0c0b      	bf      	0x1a10	// 1a10 <__memcpy_fast+0x24>
+    19fc:	3a40      	cmpnei      	r2, 0
+    19fe:	0c08      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a00:	8160      	ld.b      	r3, (r1, 0x0)
+    1a02:	2100      	addi      	r1, 1
+    1a04:	2a00      	subi      	r2, 1
+    1a06:	a660      	st.b      	r3, (r6, 0x0)
+    1a08:	2600      	addi      	r6, 1
+    1a0a:	3a40      	cmpnei      	r2, 0
+    1a0c:	0bfa      	bt      	0x1a00	// 1a00 <__memcpy_fast+0x14>
+    1a0e:	1483      	pop      	r4-r6
+    1a10:	3a2f      	cmplti      	r2, 16
+    1a12:	080e      	bt      	0x1a2e	// 1a2e <__memcpy_fast+0x42>
+    1a14:	91a0      	ld.w      	r5, (r1, 0x0)
+    1a16:	9161      	ld.w      	r3, (r1, 0x4)
+    1a18:	9182      	ld.w      	r4, (r1, 0x8)
+    1a1a:	b6a0      	st.w      	r5, (r6, 0x0)
+    1a1c:	91a3      	ld.w      	r5, (r1, 0xc)
+    1a1e:	b661      	st.w      	r3, (r6, 0x4)
+    1a20:	b682      	st.w      	r4, (r6, 0x8)
+    1a22:	b6a3      	st.w      	r5, (r6, 0xc)
+    1a24:	2a0f      	subi      	r2, 16
+    1a26:	210f      	addi      	r1, 16
+    1a28:	260f      	addi      	r6, 16
+    1a2a:	3a2f      	cmplti      	r2, 16
+    1a2c:	0ff4      	bf      	0x1a14	// 1a14 <__memcpy_fast+0x28>
+    1a2e:	3a23      	cmplti      	r2, 4
+    1a30:	0808      	bt      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+    1a32:	9160      	ld.w      	r3, (r1, 0x0)
+    1a34:	2a03      	subi      	r2, 4
+    1a36:	2103      	addi      	r1, 4
+    1a38:	b660      	st.w      	r3, (r6, 0x0)
+    1a3a:	2603      	addi      	r6, 4
+    1a3c:	3a23      	cmplti      	r2, 4
+    1a3e:	0ffa      	bf      	0x1a32	// 1a32 <__memcpy_fast+0x46>
+    1a40:	3a40      	cmpnei      	r2, 0
+    1a42:	0fe6      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a44:	8160      	ld.b      	r3, (r1, 0x0)
+    1a46:	2100      	addi      	r1, 1
+    1a48:	2a00      	subi      	r2, 1
+    1a4a:	a660      	st.b      	r3, (r6, 0x0)
+    1a4c:	2600      	addi      	r6, 1
+    1a4e:	07f9      	br      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+
+Disassembly of section .text.__main:
+
+00001a50 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    1a50:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    1a52:	1009      	lrw      	r0, 0x20000000	// 1a74 <__main+0x24>
+    1a54:	1029      	lrw      	r1, 0x4644	// 1a78 <__main+0x28>
+    1a56:	6442      	cmpne      	r0, r1
+    1a58:	0c05      	bf      	0x1a62	// 1a62 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    1a5a:	1049      	lrw      	r2, 0x2000009c	// 1a7c <__main+0x2c>
+    1a5c:	6082      	subu      	r2, r0
+    1a5e:	e3ffffc7 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    1a62:	1048      	lrw      	r2, 0x20000520	// 1a80 <__main+0x30>
+    1a64:	1008      	lrw      	r0, 0x2000009c	// 1a84 <__main+0x34>
+    1a66:	640a      	cmpne      	r2, r0
+    1a68:	0c05      	bf      	0x1a72	// 1a72 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    1a6a:	6082      	subu      	r2, r0
+    1a6c:	3100      	movi      	r1, 0
+    1a6e:	e3ffff7b 	bsr      	0x1964	// 1964 <__memset_fast>
+  }
+
+	
+}
+    1a72:	1490      	pop      	r15
+    1a74:	20000000 	.long	0x20000000
+    1a78:	00004644 	.long	0x00004644
+    1a7c:	2000009c 	.long	0x2000009c
+    1a80:	20000520 	.long	0x20000520
+    1a84:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00001a88 <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    1a88:	3848      	cmpnei      	r0, 8
+    1a8a:	080a      	bt      	0x1a9e	// 1a9e <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    1a8c:	107a      	lrw      	r3, 0x2000004c	// 1af4 <SYSCON_General_CMD.part.0+0x6c>
+    1a8e:	32ff      	movi      	r2, 255
+    1a90:	9320      	ld.w      	r1, (r3, 0x0)
+    1a92:	9160      	ld.w      	r3, (r1, 0x0)
+    1a94:	424c      	lsli      	r2, r2, 12
+    1a96:	68c9      	andn      	r3, r2
+    1a98:	3bae      	bseti      	r3, 14
+    1a9a:	3bb2      	bseti      	r3, 18
+    1a9c:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    1a9e:	1077      	lrw      	r3, 0x2000005c	// 1af8 <SYSCON_General_CMD.part.0+0x70>
+    1aa0:	9360      	ld.w      	r3, (r3, 0x0)
+    1aa2:	9341      	ld.w      	r2, (r3, 0x4)
+    1aa4:	6c80      	or      	r2, r0
+    1aa6:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    1aa8:	9343      	ld.w      	r2, (r3, 0xc)
+    1aaa:	6880      	and      	r2, r0
+    1aac:	3a40      	cmpnei      	r2, 0
+    1aae:	0ffd      	bf      	0x1aa8	// 1aa8 <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    1ab0:	3842      	cmpnei      	r0, 2
+    1ab2:	0807      	bt      	0x1ac0	// 1ac0 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    1ab4:	3102      	movi      	r1, 2
+    1ab6:	9344      	ld.w      	r2, (r3, 0x10)
+    1ab8:	6884      	and      	r2, r1
+    1aba:	3a40      	cmpnei      	r2, 0
+    1abc:	0ffd      	bf      	0x1ab6	// 1ab6 <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    1abe:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    1ac0:	3802      	cmphsi      	r0, 3
+    1ac2:	0809      	bt      	0x1ad4	// 1ad4 <SYSCON_General_CMD.part.0+0x4c>
+    1ac4:	3841      	cmpnei      	r0, 1
+    1ac6:	0bfc      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    1ac8:	3101      	movi      	r1, 1
+    1aca:	9344      	ld.w      	r2, (r3, 0x10)
+    1acc:	6884      	and      	r2, r1
+    1ace:	3a40      	cmpnei      	r2, 0
+    1ad0:	0ffd      	bf      	0x1aca	// 1aca <SYSCON_General_CMD.part.0+0x42>
+    1ad2:	07f6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ad4:	3848      	cmpnei      	r0, 8
+    1ad6:	0807      	bt      	0x1ae4	// 1ae4 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    1ad8:	3108      	movi      	r1, 8
+    1ada:	9344      	ld.w      	r2, (r3, 0x10)
+    1adc:	6884      	and      	r2, r1
+    1ade:	3a40      	cmpnei      	r2, 0
+    1ae0:	0ffd      	bf      	0x1ada	// 1ada <SYSCON_General_CMD.part.0+0x52>
+    1ae2:	07ee      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ae4:	3850      	cmpnei      	r0, 16
+    1ae6:	0bec      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    1ae8:	3110      	movi      	r1, 16
+    1aea:	9344      	ld.w      	r2, (r3, 0x10)
+    1aec:	6884      	and      	r2, r1
+    1aee:	3a40      	cmpnei      	r2, 0
+    1af0:	0ffd      	bf      	0x1aea	// 1aea <SYSCON_General_CMD.part.0+0x62>
+    1af2:	07e6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+    1af4:	2000004c 	.long	0x2000004c
+    1af8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00001afc <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    1afc:	106c      	lrw      	r3, 0x2000005c	// 1b2c <SYSCON_RST_VALUE+0x30>
+    1afe:	104d      	lrw      	r2, 0xffff	// 1b30 <SYSCON_RST_VALUE+0x34>
+    1b00:	9360      	ld.w      	r3, (r3, 0x0)
+    1b02:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    1b04:	104c      	lrw      	r2, 0xffffff	// 1b34 <SYSCON_RST_VALUE+0x38>
+    1b06:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    1b08:	104c      	lrw      	r2, 0xd22d0000	// 1b38 <SYSCON_RST_VALUE+0x3c>
+    1b0a:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    1b0c:	104c      	lrw      	r2, 0x70ff3bff	// 1b3c <SYSCON_RST_VALUE+0x40>
+    1b0e:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    1b10:	320a      	movi      	r2, 10
+    1b12:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b14:	102b      	lrw      	r1, 0x70c	// 1b40 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    1b16:	237f      	addi      	r3, 128
+    1b18:	3200      	movi      	r2, 0
+    1b1a:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    1b1c:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b1e:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    1b20:	1029      	lrw      	r1, 0x3fe	// 1b44 <SYSCON_RST_VALUE+0x48>
+    1b22:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    1b24:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    1b26:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    1b28:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    1b2a:	783c      	jmp      	r15
+    1b2c:	2000005c 	.long	0x2000005c
+    1b30:	0000ffff 	.long	0x0000ffff
+    1b34:	00ffffff 	.long	0x00ffffff
+    1b38:	d22d0000 	.long	0xd22d0000
+    1b3c:	70ff3bff 	.long	0x70ff3bff
+    1b40:	0000070c 	.long	0x0000070c
+    1b44:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+00001b48 <SYSCON_General_CMD>:
+{
+    1b48:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    1b4a:	3840      	cmpnei      	r0, 0
+    1b4c:	0c05      	bf      	0x1b56	// 1b56 <SYSCON_General_CMD+0xe>
+    1b4e:	6c07      	mov      	r0, r1
+    1b50:	e3ffff9c 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+}
+    1b54:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    1b56:	1068      	lrw      	r3, 0x2000005c	// 1b74 <SYSCON_General_CMD+0x2c>
+    1b58:	9360      	ld.w      	r3, (r3, 0x0)
+    1b5a:	9342      	ld.w      	r2, (r3, 0x8)
+    1b5c:	6c84      	or      	r2, r1
+    1b5e:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    1b60:	9343      	ld.w      	r2, (r3, 0xc)
+    1b62:	6884      	and      	r2, r1
+    1b64:	3a40      	cmpnei      	r2, 0
+    1b66:	0bfd      	bt      	0x1b60	// 1b60 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    1b68:	237f      	addi      	r3, 128
+    1b6a:	9301      	ld.w      	r0, (r3, 0x4)
+    1b6c:	6c40      	or      	r1, r0
+    1b6e:	b321      	st.w      	r1, (r3, 0x4)
+}
+    1b70:	07f2      	br      	0x1b54	// 1b54 <SYSCON_General_CMD+0xc>
+    1b72:	0000      	bkpt
+    1b74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+00001b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    1b78:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    1b7a:	3b48      	cmpnei      	r3, 8
+    1b7c:	0828      	bt      	0x1bcc	// 1bcc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b7e:	109d      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b80:	3501      	movi      	r5, 1
+    1b82:	9480      	ld.w      	r4, (r4, 0x0)
+    1b84:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    1b86:	3504      	movi      	r5, 4
+    1b88:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1b8a:	5b83      	subi      	r4, r3, 1
+    1b8c:	3c01      	cmphsi      	r4, 2
+    1b8e:	0c2b      	bf      	0x1be4	// 1be4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b90:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    1b92:	3c04      	cmphsi      	r4, 5
+    1b94:	0c03      	bf      	0x1b9a	// 1b9a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b96:	3b4b      	cmpnei      	r3, 11
+    1b98:	0807      	bt      	0x1ba6	// 1ba6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b9a:	1076      	lrw      	r3, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b9c:	3401      	movi      	r4, 1
+    1b9e:	9360      	ld.w      	r3, (r3, 0x0)
+    1ba0:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    1ba2:	3400      	movi      	r4, 0
+    1ba4:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1ba6:	1094      	lrw      	r4, 0xd22d0000	// 1bf4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    1ba8:	6c10      	or      	r0, r4
+    1baa:	1074      	lrw      	r3, 0x2000005c	// 1bf8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    1bac:	6c40      	or      	r1, r0
+    1bae:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb0:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1bb2:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb4:	4001      	lsli      	r0, r0, 1
+    1bb6:	9324      	ld.w      	r1, (r3, 0x10)
+    1bb8:	6840      	and      	r1, r0
+    1bba:	3940      	cmpnei      	r1, 0
+    1bbc:	0ffd      	bf      	0x1bb6	// 1bb6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    1bbe:	1030      	lrw      	r1, 0xc33c0000	// 1bfc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    1bc0:	6c48      	or      	r1, r2
+    1bc2:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    1bc4:	9328      	ld.w      	r1, (r3, 0x20)
+    1bc6:	644a      	cmpne      	r2, r1
+    1bc8:	0bfe      	bt      	0x1bc4	// 1bc4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    1bca:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    1bcc:	3b40      	cmpnei      	r3, 0
+    1bce:	0c03      	bf      	0x1bd4	// 1bd4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    1bd0:	3b49      	cmpnei      	r3, 9
+    1bd2:	0807      	bt      	0x1be0	// 1be0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    1bd4:	1087      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bd6:	3501      	movi      	r5, 1
+    1bd8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bda:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    1bdc:	3502      	movi      	r5, 2
+    1bde:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1be0:	3b4a      	cmpnei      	r3, 10
+    1be2:	0bd4      	bt      	0x1b8a	// 1b8a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    1be4:	1083      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1be6:	3501      	movi      	r5, 1
+    1be8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bea:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    1bec:	b4a5      	st.w      	r5, (r4, 0x14)
+    1bee:	07d1      	br      	0x1b90	// 1b90 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    1bf0:	20000060 	.long	0x20000060
+    1bf4:	d22d0000 	.long	0xd22d0000
+    1bf8:	2000005c 	.long	0x2000005c
+    1bfc:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+00001c00 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    1c00:	14d1      	push      	r4, r15
+    1c02:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    1c04:	3110      	movi      	r1, 16
+    1c06:	3000      	movi      	r0, 0
+    1c08:	e3ffffa0 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    1c0c:	1066      	lrw      	r3, 0x2000005c	// 1c24 <SYSCON_HFOSC_SELECTE+0x24>
+    1c0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c10:	9319      	ld.w      	r0, (r3, 0x64)
+    1c12:	3884      	bclri      	r0, 4
+    1c14:	3885      	bclri      	r0, 5
+    1c16:	6c10      	or      	r0, r4
+    1c18:	b319      	st.w      	r0, (r3, 0x64)
+    1c1a:	3010      	movi      	r0, 16
+    1c1c:	e3ffff36 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    1c20:	1491      	pop      	r4, r15
+    1c22:	0000      	bkpt
+    1c24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+00001c28 <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    1c28:	106c      	lrw      	r3, 0x2000005c	// 1c58 <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    1c2a:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c2c:	9360      	ld.w      	r3, (r3, 0x0)
+    1c2e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1c30:	0c0a      	bf      	0x1c44	// 1c44 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c32:	104b      	lrw      	r2, 0x78870000	// 1c5c <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c34:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c36:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c38:	4125      	lsli      	r1, r1, 5
+    1c3a:	934d      	ld.w      	r2, (r3, 0x34)
+    1c3c:	6884      	and      	r2, r1
+    1c3e:	3a40      	cmpnei      	r2, 0
+    1c40:	0ffd      	bf      	0x1c3a	// 1c3a <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    1c42:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c44:	1047      	lrw      	r2, 0x788755aa	// 1c60 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c46:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c48:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c4a:	4125      	lsli      	r1, r1, 5
+    1c4c:	934d      	ld.w      	r2, (r3, 0x34)
+    1c4e:	6884      	and      	r2, r1
+    1c50:	3a40      	cmpnei      	r2, 0
+    1c52:	0bfd      	bt      	0x1c4c	// 1c4c <SYSCON_WDT_CMD+0x24>
+    1c54:	07f7      	br      	0x1c42	// 1c42 <SYSCON_WDT_CMD+0x1a>
+    1c56:	0000      	bkpt
+    1c58:	2000005c 	.long	0x2000005c
+    1c5c:	78870000 	.long	0x78870000
+    1c60:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00001c64 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    1c64:	1064      	lrw      	r3, 0x2000005c	// 1c74 <SYSCON_IWDCNT_Reload+0x10>
+    1c66:	32b4      	movi      	r2, 180
+    1c68:	9360      	ld.w      	r3, (r3, 0x0)
+    1c6a:	237f      	addi      	r3, 128
+    1c6c:	4257      	lsli      	r2, r2, 23
+    1c6e:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    1c70:	783c      	jmp      	r15
+    1c72:	0000      	bkpt
+    1c74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+00001c78 <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    1c78:	1044      	lrw      	r2, 0x87780000	// 1c88 <SYSCON_IWDCNT_Config+0x10>
+    1c7a:	1065      	lrw      	r3, 0x2000005c	// 1c8c <SYSCON_IWDCNT_Config+0x14>
+    1c7c:	6c48      	or      	r1, r2
+    1c7e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c80:	6c04      	or      	r0, r1
+    1c82:	237f      	addi      	r3, 128
+    1c84:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    1c86:	783c      	jmp      	r15
+    1c88:	87780000 	.long	0x87780000
+    1c8c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00001c90 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    1c90:	14c3      	push      	r4-r6
+    1c92:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    1c94:	10c5      	lrw      	r6, 0xb44b0000	// 1ca8 <SYSCON_LVD_Config+0x18>
+    1c96:	6d18      	or      	r4, r6
+    1c98:	6cd0      	or      	r3, r4
+    1c9a:	6c8c      	or      	r2, r3
+    1c9c:	6c48      	or      	r1, r2
+    1c9e:	10a4      	lrw      	r5, 0x2000005c	// 1cac <SYSCON_LVD_Config+0x1c>
+    1ca0:	6c04      	or      	r0, r1
+    1ca2:	95a0      	ld.w      	r5, (r5, 0x0)
+    1ca4:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    1ca6:	1483      	pop      	r4-r6
+    1ca8:	b44b0000 	.long	0xb44b0000
+    1cac:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00001cb0 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    1cb0:	1066      	lrw      	r3, 0x2000005c	// 1cc8 <LVD_Int_Enable+0x18>
+    1cb2:	3180      	movi      	r1, 128
+    1cb4:	9360      	ld.w      	r3, (r3, 0x0)
+    1cb6:	3280      	movi      	r2, 128
+    1cb8:	604c      	addu      	r1, r3
+    1cba:	4244      	lsli      	r2, r2, 4
+    1cbc:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    1cbe:	935d      	ld.w      	r2, (r3, 0x74)
+    1cc0:	3aab      	bseti      	r2, 11
+    1cc2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1cc4:	783c      	jmp      	r15
+    1cc6:	0000      	bkpt
+    1cc8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00001ccc <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    1ccc:	1066      	lrw      	r3, 0x2000005c	// 1ce4 <IWDT_Int_Enable+0x18>
+    1cce:	3180      	movi      	r1, 128
+    1cd0:	9360      	ld.w      	r3, (r3, 0x0)
+    1cd2:	3280      	movi      	r2, 128
+    1cd4:	604c      	addu      	r1, r3
+    1cd6:	4241      	lsli      	r2, r2, 1
+    1cd8:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    1cda:	935d      	ld.w      	r2, (r3, 0x74)
+    1cdc:	3aa8      	bseti      	r2, 8
+    1cde:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1ce0:	783c      	jmp      	r15
+    1ce2:	0000      	bkpt
+    1ce4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+00001ce8 <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    1ce8:	3a40      	cmpnei      	r2, 0
+    1cea:	0c04      	bf      	0x1cf2	// 1cf2 <EXTI_trigger_CMD+0xa>
+    1cec:	3a41      	cmpnei      	r2, 1
+    1cee:	0c0e      	bf      	0x1d0a	// 1d0a <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    1cf0:	783c      	jmp      	r15
+    1cf2:	106d      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1cf4:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    1cf6:	9360      	ld.w      	r3, (r3, 0x0)
+    1cf8:	237f      	addi      	r3, 128
+    1cfa:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    1cfc:	0c04      	bf      	0x1d04	// 1d04 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    1cfe:	6c48      	or      	r1, r2
+    1d00:	b325      	st.w      	r1, (r3, 0x14)
+    1d02:	07f7      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    1d04:	6885      	andn      	r2, r1
+    1d06:	b345      	st.w      	r2, (r3, 0x14)
+    1d08:	07f4      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d0a:	1067      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d0c:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    1d0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1d10:	237f      	addi      	r3, 128
+    1d12:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    1d14:	0c04      	bf      	0x1d1c	// 1d1c <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    1d16:	6c48      	or      	r1, r2
+    1d18:	b326      	st.w      	r1, (r3, 0x18)
+    1d1a:	07eb      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    1d1c:	6885      	andn      	r2, r1
+    1d1e:	b346      	st.w      	r2, (r3, 0x18)
+}
+    1d20:	07e8      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d22:	0000      	bkpt
+    1d24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+00001d28 <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    1d28:	3202      	movi      	r2, 2
+    1d2a:	1062      	lrw      	r3, 0xe000e100	// 1d30 <SYSCON_Int_Enable+0x8>
+    1d2c:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1d2e:	783c      	jmp      	r15
+    1d30:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+00001d34 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d34:	1066      	lrw      	r3, 0xe000e400	// 1d4c <SYSCON_INT_Priority+0x18>
+    1d36:	1047      	lrw      	r2, 0xc0c0c0c0	// 1d50 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d38:	1027      	lrw      	r1, 0xc0c000c0	// 1d54 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d3a:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    1d3c:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    1d3e:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    1d40:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    1d42:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    1d44:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d46:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    1d48:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    1d4a:	783c      	jmp      	r15
+    1d4c:	e000e400 	.long	0xe000e400
+    1d50:	c0c0c0c0 	.long	0xc0c0c0c0
+    1d54:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+00001d58 <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    1d58:	14c1      	push      	r4
+    1d5a:	4862      	lsri      	r3, r0, 2
+    1d5c:	4342      	lsli      	r2, r3, 2
+    1d5e:	106a      	lrw      	r3, 0x20000064	// 1d84 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    1d60:	3403      	movi      	r4, 3
+    1d62:	9360      	ld.w      	r3, (r3, 0x0)
+    1d64:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d66:	3280      	movi      	r2, 128
+    1d68:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    1d6a:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d6c:	60c8      	addu      	r3, r2
+    1d6e:	4003      	lsli      	r0, r0, 3
+    1d70:	34ff      	movi      	r4, 255
+    1d72:	9340      	ld.w      	r2, (r3, 0x0)
+    1d74:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1d76:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d78:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1d7a:	7040      	lsl      	r1, r0
+    1d7c:	6c48      	or      	r1, r2
+    1d7e:	b320      	st.w      	r1, (r3, 0x0)
+}
+    1d80:	1481      	pop      	r4
+    1d82:	0000      	bkpt
+    1d84:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+00001d88 <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    1d88:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    1d8a:	3907      	cmphsi      	r1, 8
+{
+    1d8c:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    1d8e:	0830      	bt      	0x1dee	// 1dee <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    1d90:	5903      	subi      	r0, r1, 1
+    1d92:	3806      	cmphsi      	r0, 7
+    1d94:	0827      	bt      	0x1de2	// 1de2 <GPIO_Init+0x5a>
+    1d96:	e3fff7b3 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1d9a:	1004      	.short	0x1004
+    1d9c:	1d1a1613 	.long	0x1d1a1613
+    1da0:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1da2:	3300      	movi      	r3, 0
+    1da4:	3104      	movi      	r1, 4
+    1da6:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    1da8:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1daa:	9440      	ld.w      	r2, (r4, 0x0)
+    1dac:	68c8      	and      	r3, r2
+        if (Dir)
+    1dae:	0c1e      	bf      	0x1dea	// 1dea <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1db0:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1db2:	7084      	lsl      	r2, r1
+    1db4:	6cc8      	or      	r3, r2
+    1db6:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    1db8:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1dba:	3108      	movi      	r1, 8
+    1dbc:	1166      	lrw      	r3, 0xfffff0ff	// 1e54 <GPIO_Init+0xcc>
+    1dbe:	07f5      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1dc0:	310c      	movi      	r1, 12
+    1dc2:	1166      	lrw      	r3, 0xffff0fff	// 1e58 <GPIO_Init+0xd0>
+    1dc4:	07f2      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1dc6:	3110      	movi      	r1, 16
+    1dc8:	1165      	lrw      	r3, 0xfff10000	// 1e5c <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1dca:	2b00      	subi      	r3, 1
+    1dcc:	07ee      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1dce:	3114      	movi      	r1, 20
+    1dd0:	1164      	lrw      	r3, 0xff100000	// 1e60 <GPIO_Init+0xd8>
+    1dd2:	07fc      	br      	0x1dca	// 1dca <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1dd4:	33f1      	movi      	r3, 241
+    1dd6:	3118      	movi      	r1, 24
+    1dd8:	4378      	lsli      	r3, r3, 24
+    1dda:	07f8      	br      	0x1dca	// 1dca <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1ddc:	311c      	movi      	r1, 28
+    1dde:	1162      	lrw      	r3, 0xfffffff	// 1e64 <GPIO_Init+0xdc>
+    1de0:	07e4      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1de2:	3300      	movi      	r3, 0
+    1de4:	3100      	movi      	r1, 0
+    1de6:	2b0f      	subi      	r3, 16
+    1de8:	07e0      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1dea:	3202      	movi      	r2, 2
+    1dec:	07e3      	br      	0x1db2	// 1db2 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    1dee:	390f      	cmphsi      	r1, 16
+    1df0:	0be4      	bt      	0x1db8	// 1db8 <GPIO_Init+0x30>
+        switch (PinNum)
+    1df2:	2908      	subi      	r1, 9
+    1df4:	3906      	cmphsi      	r1, 7
+    1df6:	6c07      	mov      	r0, r1
+    1df8:	0827      	bt      	0x1e46	// 1e46 <GPIO_Init+0xbe>
+    1dfa:	e3fff781 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1dfe:	1004      	.short	0x1004
+    1e00:	1d1a1613 	.long	0x1d1a1613
+    1e04:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e06:	3300      	movi      	r3, 0
+    1e08:	3104      	movi      	r1, 4
+    1e0a:	2bf0      	subi      	r3, 241
+      if (Dir)
+    1e0c:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e0e:	9441      	ld.w      	r2, (r4, 0x4)
+    1e10:	68c8      	and      	r3, r2
+      if (Dir)
+    1e12:	0c1e      	bf      	0x1e4e	// 1e4e <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e14:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e16:	7084      	lsl      	r2, r1
+    1e18:	6cc8      	or      	r3, r2
+    1e1a:	b461      	st.w      	r3, (r4, 0x4)
+}
+    1e1c:	07ce      	br      	0x1db8	// 1db8 <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e1e:	3108      	movi      	r1, 8
+    1e20:	106d      	lrw      	r3, 0xfffff0ff	// 1e54 <GPIO_Init+0xcc>
+    1e22:	07f5      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e24:	310c      	movi      	r1, 12
+    1e26:	106d      	lrw      	r3, 0xffff0fff	// 1e58 <GPIO_Init+0xd0>
+    1e28:	07f2      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e2a:	3110      	movi      	r1, 16
+    1e2c:	106c      	lrw      	r3, 0xfff10000	// 1e5c <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e2e:	2b00      	subi      	r3, 1
+    1e30:	07ee      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e32:	3114      	movi      	r1, 20
+    1e34:	106b      	lrw      	r3, 0xff100000	// 1e60 <GPIO_Init+0xd8>
+    1e36:	07fc      	br      	0x1e2e	// 1e2e <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e38:	33f1      	movi      	r3, 241
+    1e3a:	3118      	movi      	r1, 24
+    1e3c:	4378      	lsli      	r3, r3, 24
+    1e3e:	07f8      	br      	0x1e2e	// 1e2e <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e40:	311c      	movi      	r1, 28
+    1e42:	1069      	lrw      	r3, 0xfffffff	// 1e64 <GPIO_Init+0xdc>
+    1e44:	07e4      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e46:	3300      	movi      	r3, 0
+    1e48:	3100      	movi      	r1, 0
+    1e4a:	2b0f      	subi      	r3, 16
+    1e4c:	07e0      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e4e:	3202      	movi      	r2, 2
+    1e50:	07e3      	br      	0x1e16	// 1e16 <GPIO_Init+0x8e>
+    1e52:	0000      	bkpt
+    1e54:	fffff0ff 	.long	0xfffff0ff
+    1e58:	ffff0fff 	.long	0xffff0fff
+    1e5c:	fff10000 	.long	0xfff10000
+    1e60:	ff100000 	.long	0xff100000
+    1e64:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+00001e68 <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    1e68:	4121      	lsli      	r1, r1, 1
+    1e6a:	3203      	movi      	r2, 3
+    1e6c:	9068      	ld.w      	r3, (r0, 0x20)
+    1e6e:	7084      	lsl      	r2, r1
+    1e70:	68c9      	andn      	r3, r2
+    1e72:	3201      	movi      	r2, 1
+    1e74:	7084      	lsl      	r2, r1
+    1e76:	6cc8      	or      	r3, r2
+    1e78:	b068      	st.w      	r3, (r0, 0x20)
+}
+    1e7a:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00001e7c <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    1e7c:	4121      	lsli      	r1, r1, 1
+    1e7e:	3301      	movi      	r3, 1
+    1e80:	9049      	ld.w      	r2, (r0, 0x24)
+    1e82:	70c4      	lsl      	r3, r1
+    1e84:	6cc8      	or      	r3, r2
+    1e86:	b069      	st.w      	r3, (r0, 0x24)
+}
+    1e88:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+00001e8a <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    1e8a:	3301      	movi      	r3, 1
+    1e8c:	70c4      	lsl      	r3, r1
+    1e8e:	b063      	st.w      	r3, (r0, 0xc)
+}
+    1e90:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00001e92 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    1e92:	3301      	movi      	r3, 1
+    1e94:	70c4      	lsl      	r3, r1
+    1e96:	b064      	st.w      	r3, (r0, 0x10)
+}
+    1e98:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00001e9a <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    1e9a:	3301      	movi      	r3, 1
+    1e9c:	9046      	ld.w      	r2, (r0, 0x18)
+    1e9e:	70c4      	lsl      	r3, r1
+    1ea0:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    1ea2:	64ca      	cmpne      	r2, r3
+    1ea4:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    1ea6:	7400      	zextb      	r0, r0
+}
+    1ea8:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00001eaa <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    1eaa:	3301      	movi      	r3, 1
+    1eac:	9045      	ld.w      	r2, (r0, 0x14)
+    1eae:	70c4      	lsl      	r3, r1
+    1eb0:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    1eb2:	64ca      	cmpne      	r2, r3
+    1eb4:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    1eb6:	7400      	zextb      	r0, r0
+}
+    1eb8:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00001ebc <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    1ebc:	1064      	lrw      	r3, 0x20000014	// 1ecc <LPT_Soft_Reset+0x10>
+    1ebe:	9340      	ld.w      	r2, (r3, 0x0)
+    1ec0:	9261      	ld.w      	r3, (r2, 0x4)
+    1ec2:	3bac      	bseti      	r3, 12
+    1ec4:	3bae      	bseti      	r3, 14
+    1ec6:	b261      	st.w      	r3, (r2, 0x4)
+}
+    1ec8:	783c      	jmp      	r15
+    1eca:	0000      	bkpt
+    1ecc:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+00001ed0 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    1ed0:	1063      	lrw      	r3, 0x20000010	// 1edc <WWDT_CNT_Load+0xc>
+    1ed2:	9360      	ld.w      	r3, (r3, 0x0)
+    1ed4:	9340      	ld.w      	r2, (r3, 0x0)
+    1ed6:	6c08      	or      	r0, r2
+    1ed8:	b300      	st.w      	r0, (r3, 0x0)
+}
+    1eda:	783c      	jmp      	r15
+    1edc:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+00001ee0 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    1ee0:	3300      	movi      	r3, 0
+    1ee2:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    1ee4:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    1ee6:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    1ee8:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    1eea:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    1eec:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    1eee:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    1ef0:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    1ef2:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    1ef4:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    1ef6:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    1ef8:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    1efa:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+00001efc <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    1efc:	9060      	ld.w      	r3, (r0, 0x0)
+    1efe:	3ba0      	bseti      	r3, 0
+    1f00:	b060      	st.w      	r3, (r0, 0x0)
+}
+    1f02:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+00001f04 <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    1f04:	9060      	ld.w      	r3, (r0, 0x0)
+    1f06:	3bac      	bseti      	r3, 12
+    1f08:	3bae      	bseti      	r3, 14
+    1f0a:	b060      	st.w      	r3, (r0, 0x0)
+}
+    1f0c:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+00001f0e <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    1f0e:	14c3      	push      	r4-r6
+    1f10:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f12:	6d97      	mov      	r6, r5
+    1f14:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    1f16:	6d18      	or      	r4, r6
+    1f18:	6cd0      	or      	r3, r4
+    1f1a:	90a1      	ld.w      	r5, (r0, 0x4)
+    1f1c:	6c4c      	or      	r1, r3
+    1f1e:	6c54      	or      	r1, r5
+    1f20:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    1f22:	b042      	st.w      	r2, (r0, 0x8)
+}
+    1f24:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+00001f26 <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    1f26:	14c4      	push      	r4-r7
+    1f28:	1421      	subi      	r14, r14, 4
+    1f2a:	9885      	ld.w      	r4, (r14, 0x14)
+    1f2c:	6dd3      	mov      	r7, r4
+    1f2e:	9886      	ld.w      	r4, (r14, 0x18)
+    1f30:	b880      	st.w      	r4, (r14, 0x0)
+    1f32:	9887      	ld.w      	r4, (r14, 0x1c)
+    1f34:	6d93      	mov      	r6, r4
+    1f36:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    1f38:	6d58      	or      	r5, r6
+    1f3a:	98c0      	ld.w      	r6, (r14, 0x0)
+    1f3c:	6d58      	or      	r5, r6
+    1f3e:	6d5c      	or      	r5, r7
+    1f40:	6cd4      	or      	r3, r5
+    1f42:	6c8c      	or      	r2, r3
+    1f44:	9081      	ld.w      	r4, (r0, 0x4)
+    1f46:	6c48      	or      	r1, r2
+    1f48:	6d04      	or      	r4, r1
+    1f4a:	6d9f      	mov      	r6, r7
+    1f4c:	b081      	st.w      	r4, (r0, 0x4)
+}
+    1f4e:	1401      	addi      	r14, r14, 4
+    1f50:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+00001f52 <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    1f52:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    1f54:	b044      	st.w      	r2, (r0, 0x10)
+}
+    1f56:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00001f58 <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    1f58:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    1f5a:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    1f5c:	0c04      	bf      	0x1f64	// 1f64 <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    1f5e:	6c8c      	or      	r2, r3
+    1f60:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    1f62:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    1f64:	68c9      	andn      	r3, r2
+    1f66:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    1f68:	07fd      	br      	0x1f62	// 1f62 <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00001f6c <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    1f6c:	3380      	movi      	r3, 128
+    1f6e:	4376      	lsli      	r3, r3, 22
+    1f70:	1042      	lrw      	r2, 0xe000e100	// 1f78 <BT1_INT_ENABLE+0xc>
+    1f72:	b260      	st.w      	r3, (r2, 0x0)
+}
+    1f74:	783c      	jmp      	r15
+    1f76:	0000      	bkpt
+    1f78:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00001f7c <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    1f7c:	3840      	cmpnei      	r0, 0
+    1f7e:	080a      	bt      	0x1f92	// 1f92 <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    1f80:	1165      	lrw      	r3, 0x20000048	// 2014 <GPT_IO_Init+0x98>
+    1f82:	31f0      	movi      	r1, 240
+    1f84:	9340      	ld.w      	r2, (r3, 0x0)
+    1f86:	9260      	ld.w      	r3, (r2, 0x0)
+    1f88:	68c5      	andn      	r3, r1
+    1f8a:	3ba4      	bseti      	r3, 4
+    1f8c:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    1f8e:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    1f90:	040b      	br      	0x1fa6	// 1fa6 <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    1f92:	3841      	cmpnei      	r0, 1
+    1f94:	080a      	bt      	0x1fa8	// 1fa8 <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    1f96:	1161      	lrw      	r3, 0x2000004c	// 2018 <GPT_IO_Init+0x9c>
+    1f98:	31f0      	movi      	r1, 240
+    1f9a:	9340      	ld.w      	r2, (r3, 0x0)
+    1f9c:	9261      	ld.w      	r3, (r2, 0x4)
+    1f9e:	68c5      	andn      	r3, r1
+    1fa0:	3ba4      	bseti      	r3, 4
+    1fa2:	3ba6      	bseti      	r3, 6
+    1fa4:	b261      	st.w      	r3, (r2, 0x4)
+}
+    1fa6:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    1fa8:	3842      	cmpnei      	r0, 2
+    1faa:	080b      	bt      	0x1fc0	// 1fc0 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    1fac:	107b      	lrw      	r3, 0x2000004c	// 2018 <GPT_IO_Init+0x9c>
+    1fae:	32f0      	movi      	r2, 240
+    1fb0:	9320      	ld.w      	r1, (r3, 0x0)
+    1fb2:	9161      	ld.w      	r3, (r1, 0x4)
+    1fb4:	4244      	lsli      	r2, r2, 4
+    1fb6:	68c9      	andn      	r3, r2
+    1fb8:	3ba9      	bseti      	r3, 9
+    1fba:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    1fbc:	b161      	st.w      	r3, (r1, 0x4)
+    1fbe:	07f4      	br      	0x1fa6	// 1fa6 <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    1fc0:	3843      	cmpnei      	r0, 3
+    1fc2:	080b      	bt      	0x1fd8	// 1fd8 <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    1fc4:	1075      	lrw      	r3, 0x2000004c	// 2018 <GPT_IO_Init+0x9c>
+    1fc6:	32f0      	movi      	r2, 240
+    1fc8:	9320      	ld.w      	r1, (r3, 0x0)
+    1fca:	4244      	lsli      	r2, r2, 4
+    1fcc:	9161      	ld.w      	r3, (r1, 0x4)
+    1fce:	68c9      	andn      	r3, r2
+    1fd0:	32e0      	movi      	r2, 224
+    1fd2:	4243      	lsli      	r2, r2, 3
+    1fd4:	6cc8      	or      	r3, r2
+    1fd6:	07f3      	br      	0x1fbc	// 1fbc <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    1fd8:	3844      	cmpnei      	r0, 4
+    1fda:	080a      	bt      	0x1fee	// 1fee <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    1fdc:	106f      	lrw      	r3, 0x2000004c	// 2018 <GPT_IO_Init+0x9c>
+    1fde:	32f0      	movi      	r2, 240
+    1fe0:	9320      	ld.w      	r1, (r3, 0x0)
+    1fe2:	9161      	ld.w      	r3, (r1, 0x4)
+    1fe4:	4248      	lsli      	r2, r2, 8
+    1fe6:	68c9      	andn      	r3, r2
+    1fe8:	3bad      	bseti      	r3, 13
+    1fea:	3bae      	bseti      	r3, 14
+    1fec:	07e8      	br      	0x1fbc	// 1fbc <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    1fee:	3845      	cmpnei      	r0, 5
+    1ff0:	0808      	bt      	0x2000	// 2000 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    1ff2:	1069      	lrw      	r3, 0x20000048	// 2014 <GPT_IO_Init+0x98>
+    1ff4:	310f      	movi      	r1, 15
+    1ff6:	9340      	ld.w      	r2, (r3, 0x0)
+    1ff8:	9260      	ld.w      	r3, (r2, 0x0)
+    1ffa:	68c5      	andn      	r3, r1
+    1ffc:	3ba2      	bseti      	r3, 2
+    1ffe:	07c8      	br      	0x1f8e	// 1f8e <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    2000:	3846      	cmpnei      	r0, 6
+    2002:	0bd2      	bt      	0x1fa6	// 1fa6 <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    2004:	1064      	lrw      	r3, 0x20000048	// 2014 <GPT_IO_Init+0x98>
+    2006:	31f0      	movi      	r1, 240
+    2008:	9340      	ld.w      	r2, (r3, 0x0)
+    200a:	9260      	ld.w      	r3, (r2, 0x0)
+    200c:	68c5      	andn      	r3, r1
+    200e:	3ba5      	bseti      	r3, 5
+    2010:	3ba6      	bseti      	r3, 6
+    2012:	07be      	br      	0x1f8e	// 1f8e <GPT_IO_Init+0x12>
+    2014:	20000048 	.long	0x20000048
+    2018:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+0000201c <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    201c:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    201e:	6c48      	or      	r1, r2
+    2020:	1083      	lrw      	r4, 0x20000024	// 202c <GPT_Configure+0x10>
+    2022:	6c04      	or      	r0, r1
+    2024:	9480      	ld.w      	r4, (r4, 0x0)
+    2026:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    2028:	b462      	st.w      	r3, (r4, 0x8)
+}
+    202a:	1481      	pop      	r4
+    202c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00002030 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    2030:	14c4      	push      	r4-r7
+    2032:	1423      	subi      	r14, r14, 12
+    2034:	9887      	ld.w      	r4, (r14, 0x1c)
+    2036:	6dd3      	mov      	r7, r4
+    2038:	9888      	ld.w      	r4, (r14, 0x20)
+    203a:	b880      	st.w      	r4, (r14, 0x0)
+    203c:	9889      	ld.w      	r4, (r14, 0x24)
+    203e:	b881      	st.w      	r4, (r14, 0x4)
+    2040:	988a      	ld.w      	r4, (r14, 0x28)
+    2042:	b882      	st.w      	r4, (r14, 0x8)
+    2044:	988b      	ld.w      	r4, (r14, 0x2c)
+    2046:	6d93      	mov      	r6, r4
+    2048:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    204a:	3cb2      	bseti      	r4, 18
+    204c:	6d18      	or      	r4, r6
+    204e:	98c2      	ld.w      	r6, (r14, 0x8)
+    2050:	6d18      	or      	r4, r6
+    2052:	98c1      	ld.w      	r6, (r14, 0x4)
+    2054:	6d18      	or      	r4, r6
+    2056:	98c0      	ld.w      	r6, (r14, 0x0)
+    2058:	6d18      	or      	r4, r6
+    205a:	6d1c      	or      	r4, r7
+    205c:	6cd0      	or      	r3, r4
+    205e:	6c8c      	or      	r2, r3
+    2060:	6c48      	or      	r1, r2
+    2062:	10a4      	lrw      	r5, 0x20000024	// 2070 <GPT_WaveCtrl_Configure+0x40>
+    2064:	6c04      	or      	r0, r1
+    2066:	95a0      	ld.w      	r5, (r5, 0x0)
+    2068:	6d9f      	mov      	r6, r7
+    206a:	b503      	st.w      	r0, (r5, 0xc)
+}
+    206c:	1403      	addi      	r14, r14, 12
+    206e:	1484      	pop      	r4-r7
+    2070:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+00002074 <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    2074:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    2076:	6c8c      	or      	r2, r3
+    2078:	6c48      	or      	r1, r2
+    207a:	1083      	lrw      	r4, 0x20000024	// 2084 <GPT_WaveLoad_Configure+0x10>
+    207c:	6c04      	or      	r0, r1
+    207e:	9480      	ld.w      	r4, (r4, 0x0)
+    2080:	b411      	st.w      	r0, (r4, 0x44)
+}
+    2082:	1481      	pop      	r4
+    2084:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+00002088 <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    2088:	14c4      	push      	r4-r7
+    208a:	1425      	subi      	r14, r14, 20
+    208c:	1c09      	addi      	r4, r14, 36
+    208e:	8480      	ld.b      	r4, (r4, 0x0)
+    2090:	b880      	st.w      	r4, (r14, 0x0)
+    2092:	1c0a      	addi      	r4, r14, 40
+    2094:	8480      	ld.b      	r4, (r4, 0x0)
+    2096:	b881      	st.w      	r4, (r14, 0x4)
+    2098:	1c0b      	addi      	r4, r14, 44
+    209a:	8480      	ld.b      	r4, (r4, 0x0)
+    209c:	b882      	st.w      	r4, (r14, 0x8)
+    209e:	1c0c      	addi      	r4, r14, 48
+    20a0:	8480      	ld.b      	r4, (r4, 0x0)
+    20a2:	b883      	st.w      	r4, (r14, 0xc)
+    20a4:	1c0d      	addi      	r4, r14, 52
+    20a6:	8480      	ld.b      	r4, (r4, 0x0)
+    20a8:	1e10      	addi      	r6, r14, 64
+    20aa:	b884      	st.w      	r4, (r14, 0x10)
+    20ac:	1d0f      	addi      	r5, r14, 60
+    20ae:	1c0e      	addi      	r4, r14, 56
+    20b0:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    20b2:	3840      	cmpnei      	r0, 0
+{
+    20b4:	1e11      	addi      	r6, r14, 68
+    20b6:	8480      	ld.b      	r4, (r4, 0x0)
+    20b8:	85a0      	ld.b      	r5, (r5, 0x0)
+    20ba:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    20bc:	081f      	bt      	0x20fa	// 20fa <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    20be:	47f0      	lsli      	r7, r7, 16
+    20c0:	46d2      	lsli      	r6, r6, 18
+    20c2:	45ae      	lsli      	r5, r5, 14
+    20c4:	6dd8      	or      	r7, r6
+    20c6:	6dd4      	or      	r7, r5
+    20c8:	448c      	lsli      	r4, r4, 12
+    20ca:	6dd0      	or      	r7, r4
+    20cc:	9884      	ld.w      	r4, (r14, 0x10)
+    20ce:	448a      	lsli      	r4, r4, 10
+    20d0:	6dd0      	or      	r7, r4
+    20d2:	9883      	ld.w      	r4, (r14, 0xc)
+    20d4:	4488      	lsli      	r4, r4, 8
+    20d6:	98a2      	ld.w      	r5, (r14, 0x8)
+    20d8:	6d1c      	or      	r4, r7
+    20da:	45e6      	lsli      	r7, r5, 6
+    20dc:	6d1c      	or      	r4, r7
+    20de:	6c90      	or      	r2, r4
+    20e0:	6cc8      	or      	r3, r2
+    20e2:	9841      	ld.w      	r2, (r14, 0x4)
+    20e4:	4244      	lsli      	r2, r2, 4
+    20e6:	6cc8      	or      	r3, r2
+    20e8:	6c4c      	or      	r1, r3
+    20ea:	9860      	ld.w      	r3, (r14, 0x0)
+    20ec:	4362      	lsli      	r3, r3, 2
+    20ee:	1013      	lrw      	r0, 0x20000024	// 2138 <GPT_WaveOut_Configure+0xb0>
+    20f0:	6c4c      	or      	r1, r3
+    20f2:	9000      	ld.w      	r0, (r0, 0x0)
+    20f4:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    20f6:	1405      	addi      	r14, r14, 20
+    20f8:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    20fa:	3841      	cmpnei      	r0, 1
+    20fc:	0bfd      	bt      	0x20f6	// 20f6 <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    20fe:	47f0      	lsli      	r7, r7, 16
+    2100:	46d2      	lsli      	r6, r6, 18
+    2102:	45ae      	lsli      	r5, r5, 14
+    2104:	6dd8      	or      	r7, r6
+    2106:	6dd4      	or      	r7, r5
+    2108:	448c      	lsli      	r4, r4, 12
+    210a:	6dd0      	or      	r7, r4
+    210c:	9884      	ld.w      	r4, (r14, 0x10)
+    210e:	448a      	lsli      	r4, r4, 10
+    2110:	6dd0      	or      	r7, r4
+    2112:	9883      	ld.w      	r4, (r14, 0xc)
+    2114:	4488      	lsli      	r4, r4, 8
+    2116:	98a2      	ld.w      	r5, (r14, 0x8)
+    2118:	6d1c      	or      	r4, r7
+    211a:	45e6      	lsli      	r7, r5, 6
+    211c:	6d1c      	or      	r4, r7
+    211e:	6c90      	or      	r2, r4
+    2120:	6cc8      	or      	r3, r2
+    2122:	9841      	ld.w      	r2, (r14, 0x4)
+    2124:	4244      	lsli      	r2, r2, 4
+    2126:	6cc8      	or      	r3, r2
+    2128:	6c4c      	or      	r1, r3
+    212a:	9860      	ld.w      	r3, (r14, 0x0)
+    212c:	4362      	lsli      	r3, r3, 2
+    212e:	1003      	lrw      	r0, 0x20000024	// 2138 <GPT_WaveOut_Configure+0xb0>
+    2130:	6c4c      	or      	r1, r3
+    2132:	9000      	ld.w      	r0, (r0, 0x0)
+    2134:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    2136:	07e0      	br      	0x20f6	// 20f6 <GPT_WaveOut_Configure+0x6e>
+    2138:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+0000213c <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    213c:	1063      	lrw      	r3, 0x20000024	// 2148 <GPT_Start+0xc>
+    213e:	9340      	ld.w      	r2, (r3, 0x0)
+    2140:	9261      	ld.w      	r3, (r2, 0x4)
+    2142:	3ba0      	bseti      	r3, 0
+    2144:	b261      	st.w      	r3, (r2, 0x4)
+}
+    2146:	783c      	jmp      	r15
+    2148:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+0000214c <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    214c:	1063      	lrw      	r3, 0x20000024	// 2158 <GPT_Period_CMP_Write+0xc>
+    214e:	9360      	ld.w      	r3, (r3, 0x0)
+    2150:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    2152:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    2154:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    2156:	783c      	jmp      	r15
+    2158:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+0000215c <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    215c:	1066      	lrw      	r3, 0x20000024	// 2174 <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    215e:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    2160:	9360      	ld.w      	r3, (r3, 0x0)
+    2162:	237f      	addi      	r3, 128
+    2164:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    2166:	0c04      	bf      	0x216e	// 216e <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    2168:	6c48      	or      	r1, r2
+    216a:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    216c:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    216e:	6885      	andn      	r2, r1
+    2170:	b356      	st.w      	r2, (r3, 0x58)
+}
+    2172:	07fd      	br      	0x216c	// 216c <GPT_ConfigInterrupt_CMD+0x10>
+    2174:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+00002178 <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    2178:	1065      	lrw      	r3, 0x20000040	// 218c <UART0_DeInit+0x14>
+    217a:	3200      	movi      	r2, 0
+    217c:	9360      	ld.w      	r3, (r3, 0x0)
+    217e:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    2180:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    2182:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    2184:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    2186:	b344      	st.w      	r2, (r3, 0x10)
+}
+    2188:	783c      	jmp      	r15
+    218a:	0000      	bkpt
+    218c:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00002190 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    2190:	1065      	lrw      	r3, 0x2000003c	// 21a4 <UART1_DeInit+0x14>
+    2192:	3200      	movi      	r2, 0
+    2194:	9360      	ld.w      	r3, (r3, 0x0)
+    2196:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    2198:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    219a:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    219c:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    219e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    21a0:	783c      	jmp      	r15
+    21a2:	0000      	bkpt
+    21a4:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+000021a8 <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    21a8:	1065      	lrw      	r3, 0x20000038	// 21bc <UART2_DeInit+0x14>
+    21aa:	3200      	movi      	r2, 0
+    21ac:	9360      	ld.w      	r3, (r3, 0x0)
+    21ae:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    21b0:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    21b2:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    21b4:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    21b6:	b344      	st.w      	r2, (r3, 0x10)
+}
+    21b8:	783c      	jmp      	r15
+    21ba:	0000      	bkpt
+    21bc:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+000021c0 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    21c0:	1065      	lrw      	r3, 0x20000040	// 21d4 <UART0_Int_Enable+0x14>
+    21c2:	320f      	movi      	r2, 15
+    21c4:	9360      	ld.w      	r3, (r3, 0x0)
+    21c6:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    21c8:	3380      	movi      	r3, 128
+    21ca:	4366      	lsli      	r3, r3, 6
+    21cc:	1043      	lrw      	r2, 0xe000e100	// 21d8 <UART0_Int_Enable+0x18>
+    21ce:	b260      	st.w      	r3, (r2, 0x0)
+}
+    21d0:	783c      	jmp      	r15
+    21d2:	0000      	bkpt
+    21d4:	20000040 	.long	0x20000040
+    21d8:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000021dc <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    21dc:	1065      	lrw      	r3, 0x20000038	// 21f0 <UART2_Int_Enable+0x14>
+    21de:	320f      	movi      	r2, 15
+    21e0:	9360      	ld.w      	r3, (r3, 0x0)
+    21e2:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    21e4:	3380      	movi      	r3, 128
+    21e6:	4368      	lsli      	r3, r3, 8
+    21e8:	1043      	lrw      	r2, 0xe000e100	// 21f4 <UART2_Int_Enable+0x18>
+    21ea:	b260      	st.w      	r3, (r2, 0x0)
+}
+    21ec:	783c      	jmp      	r15
+    21ee:	0000      	bkpt
+    21f0:	20000038 	.long	0x20000038
+    21f4:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+000021f8 <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    21f8:	3840      	cmpnei      	r0, 0
+    21fa:	0821      	bt      	0x223c	// 223c <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    21fc:	3940      	cmpnei      	r1, 0
+    21fe:	080a      	bt      	0x2212	// 2212 <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    2200:	1177      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    2202:	31ff      	movi      	r1, 255
+    2204:	9340      	ld.w      	r2, (r3, 0x0)
+    2206:	9260      	ld.w      	r3, (r2, 0x0)
+    2208:	68c5      	andn      	r3, r1
+    220a:	3ba2      	bseti      	r3, 2
+    220c:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    220e:	b260      	st.w      	r3, (r2, 0x0)
+    2210:	0415      	br      	0x223a	// 223a <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    2212:	3941      	cmpnei      	r1, 1
+    2214:	0813      	bt      	0x223a	// 223a <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    2216:	1172      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    2218:	31f0      	movi      	r1, 240
+    221a:	9340      	ld.w      	r2, (r3, 0x0)
+    221c:	9260      	ld.w      	r3, (r2, 0x0)
+    221e:	4130      	lsli      	r1, r1, 16
+    2220:	68c5      	andn      	r3, r1
+    2222:	31e0      	movi      	r1, 224
+    2224:	412f      	lsli      	r1, r1, 15
+    2226:	6cc4      	or      	r3, r1
+    2228:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    222a:	31f0      	movi      	r1, 240
+    222c:	9261      	ld.w      	r3, (r2, 0x4)
+    222e:	412c      	lsli      	r1, r1, 12
+    2230:	68c5      	andn      	r3, r1
+    2232:	31e0      	movi      	r1, 224
+    2234:	412b      	lsli      	r1, r1, 11
+    2236:	6cc4      	or      	r3, r1
+    2238:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    223a:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    223c:	3841      	cmpnei      	r0, 1
+    223e:	082d      	bt      	0x2298	// 2298 <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    2240:	3940      	cmpnei      	r1, 0
+    2242:	0814      	bt      	0x226a	// 226a <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    2244:	1167      	lrw      	r3, 0x20000048	// 22e0 <UART_IO_Init+0xe8>
+    2246:	310f      	movi      	r1, 15
+    2248:	9340      	ld.w      	r2, (r3, 0x0)
+    224a:	9260      	ld.w      	r3, (r2, 0x0)
+    224c:	68c5      	andn      	r3, r1
+    224e:	3107      	movi      	r1, 7
+    2250:	6cc4      	or      	r3, r1
+    2252:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    2254:	32f0      	movi      	r2, 240
+    2256:	1162      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    2258:	4250      	lsli      	r2, r2, 16
+    225a:	9320      	ld.w      	r1, (r3, 0x0)
+    225c:	9161      	ld.w      	r3, (r1, 0x4)
+    225e:	68c9      	andn      	r3, r2
+    2260:	32e0      	movi      	r2, 224
+    2262:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    2264:	6cc8      	or      	r3, r2
+    2266:	b161      	st.w      	r3, (r1, 0x4)
+    2268:	07e9      	br      	0x223a	// 223a <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    226a:	3941      	cmpnei      	r1, 1
+    226c:	080c      	bt      	0x2284	// 2284 <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    226e:	107c      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    2270:	32ff      	movi      	r2, 255
+    2272:	9320      	ld.w      	r1, (r3, 0x0)
+    2274:	424c      	lsli      	r2, r2, 12
+    2276:	9160      	ld.w      	r3, (r1, 0x0)
+    2278:	68c9      	andn      	r3, r2
+    227a:	32ee      	movi      	r2, 238
+    227c:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    227e:	6cc8      	or      	r3, r2
+    2280:	b160      	st.w      	r3, (r1, 0x0)
+}
+    2282:	07dc      	br      	0x223a	// 223a <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    2284:	3942      	cmpnei      	r1, 2
+    2286:	0bda      	bt      	0x223a	// 223a <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    2288:	1075      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    228a:	32ee      	movi      	r2, 238
+    228c:	9320      	ld.w      	r1, (r3, 0x0)
+    228e:	9161      	ld.w      	r3, (r1, 0x4)
+    2290:	4368      	lsli      	r3, r3, 8
+    2292:	4b68      	lsri      	r3, r3, 8
+    2294:	4257      	lsli      	r2, r2, 23
+    2296:	07e7      	br      	0x2264	// 2264 <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    2298:	3842      	cmpnei      	r0, 2
+    229a:	0bd0      	bt      	0x223a	// 223a <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    229c:	3940      	cmpnei      	r1, 0
+    229e:	0809      	bt      	0x22b0	// 22b0 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    22a0:	106f      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    22a2:	31ff      	movi      	r1, 255
+    22a4:	9340      	ld.w      	r2, (r3, 0x0)
+    22a6:	9260      	ld.w      	r3, (r2, 0x0)
+    22a8:	68c5      	andn      	r3, r1
+    22aa:	3177      	movi      	r1, 119
+    22ac:	6cc4      	or      	r3, r1
+    22ae:	07b0      	br      	0x220e	// 220e <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    22b0:	3941      	cmpnei      	r1, 1
+    22b2:	0809      	bt      	0x22c4	// 22c4 <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    22b4:	106a      	lrw      	r3, 0x2000004c	// 22dc <UART_IO_Init+0xe4>
+    22b6:	32ee      	movi      	r2, 238
+    22b8:	9320      	ld.w      	r1, (r3, 0x0)
+    22ba:	9160      	ld.w      	r3, (r1, 0x0)
+    22bc:	4368      	lsli      	r3, r3, 8
+    22be:	4b68      	lsri      	r3, r3, 8
+    22c0:	4257      	lsli      	r2, r2, 23
+    22c2:	07de      	br      	0x227e	// 227e <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    22c4:	3942      	cmpnei      	r1, 2
+    22c6:	0bba      	bt      	0x223a	// 223a <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    22c8:	1066      	lrw      	r3, 0x20000048	// 22e0 <UART_IO_Init+0xe8>
+    22ca:	32ff      	movi      	r2, 255
+    22cc:	9320      	ld.w      	r1, (r3, 0x0)
+    22ce:	4250      	lsli      	r2, r2, 16
+    22d0:	9160      	ld.w      	r3, (r1, 0x0)
+    22d2:	68c9      	andn      	r3, r2
+    22d4:	32cc      	movi      	r2, 204
+    22d6:	424f      	lsli      	r2, r2, 15
+    22d8:	07d3      	br      	0x227e	// 227e <UART_IO_Init+0x86>
+    22da:	0000      	bkpt
+    22dc:	2000004c 	.long	0x2000004c
+    22e0:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000022e4 <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    22e4:	1063      	lrw      	r3, 0x80003	// 22f0 <UARTInit+0xc>
+    22e6:	6c8c      	or      	r2, r3
+    22e8:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    22ea:	b024      	st.w      	r1, (r0, 0x10)
+}
+    22ec:	783c      	jmp      	r15
+    22ee:	0000      	bkpt
+    22f0:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+000022f4 <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    22f4:	1063      	lrw      	r3, 0x8000f	// 2300 <UARTInitRxTxIntEn+0xc>
+    22f6:	6c8c      	or      	r2, r3
+    22f8:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    22fa:	b024      	st.w      	r1, (r0, 0x10)
+}
+    22fc:	783c      	jmp      	r15
+    22fe:	0000      	bkpt
+    2300:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.EPT_Stop:
+
+00002304 <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    2304:	1068      	lrw      	r3, 0x20000020	// 2324 <EPT_Stop+0x20>
+    2306:	3280      	movi      	r2, 128
+    2308:	9360      	ld.w      	r3, (r3, 0x0)
+    230a:	608c      	addu      	r2, r3
+    230c:	1027      	lrw      	r1, 0xa55ac73a	// 2328 <EPT_Stop+0x24>
+    230e:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    2310:	9341      	ld.w      	r2, (r3, 0x4)
+    2312:	31fe      	movi      	r1, 254
+    2314:	6884      	and      	r2, r1
+    2316:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    2318:	3101      	movi      	r1, 1
+    231a:	9341      	ld.w      	r2, (r3, 0x4)
+    231c:	6884      	and      	r2, r1
+    231e:	3a40      	cmpnei      	r2, 0
+    2320:	0bfd      	bt      	0x231a	// 231a <EPT_Stop+0x16>
+}
+    2322:	783c      	jmp      	r15
+    2324:	20000020 	.long	0x20000020
+    2328:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+0000232c <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    232c:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    232e:	1093      	lrw      	r4, 0x20000048	// 2378 <main+0x4c>
+    2330:	3201      	movi      	r2, 1
+    2332:	9400      	ld.w      	r0, (r4, 0x0)
+    2334:	3102      	movi      	r1, 2
+    2336:	e3fffd29 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    233a:	9400      	ld.w      	r0, (r4, 0x0)
+    233c:	3102      	movi      	r1, 2
+    233e:	e3fffd95 	bsr      	0x1e68	// 1e68 <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    2342:	3102      	movi      	r1, 2
+    2344:	9400      	ld.w      	r0, (r4, 0x0)
+    2346:	e3fffdaa 	bsr      	0x1e9a	// 1e9a <GPIO_Read_Status>
+    234a:	108d      	lrw      	r4, 0x2000009c	// 237c <main+0x50>
+    234c:	a400      	st.b      	r0, (r4, 0x0)
+	
+	APT32F102_init();							//102 initial
+    234e:	e00000dd 	bsr      	0x2508	// 2508 <APT32F102_init>
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    2352:	102c      	lrw      	r1, 0x4564	// 2380 <main+0x54>
+    2354:	3000      	movi      	r0, 0
+    2356:	e0000697 	bsr      	0x3084	// 3084 <Dbg_Println>
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    235a:	e3fffc85 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+
+		//UART2_TASK();
+		
+		Card_Read_TasK();
+    235e:	e000095f 	bsr      	0x361c	// 361c <Card_Read_TasK>
+		
+		if(rf_exist == 0x01)
+    2362:	8460      	ld.b      	r3, (r4, 0x0)
+    2364:	3b41      	cmpnei      	r3, 1
+    2366:	0804      	bt      	0x236e	// 236e <main+0x42>
+		{
+			LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    2368:	e0000ab0 	bsr      	0x38c8	// 38c8 <LogicCtrl_NoRF_Task>
+    236c:	07f7      	br      	0x235a	// 235a <main+0x2e>
+		}
+		else if(rf_exist == 0x00)
+    236e:	3b40      	cmpnei      	r3, 0
+    2370:	0bf5      	bt      	0x235a	// 235a <main+0x2e>
+		{
+			LogicCtrl_Task();         //带RF模块执行逻辑
+    2372:	e0000a2f 	bsr      	0x37d0	// 37d0 <LogicCtrl_Task>
+    2376:	07f2      	br      	0x235a	// 235a <main+0x2e>
+    2378:	20000048 	.long	0x20000048
+    237c:	2000009c 	.long	0x2000009c
+    2380:	00004564 	.long	0x00004564
+
+Disassembly of section .text.delay_nms:
+
+00002384 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    2384:	14d0      	push      	r15
+    2386:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    2388:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    238a:	3300      	movi      	r3, 0
+    j = 50* t;
+    238c:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    238e:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    2390:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    2392:	b860      	st.w      	r3, (r14, 0x0)
+    2394:	9840      	ld.w      	r2, (r14, 0x0)
+    2396:	9861      	ld.w      	r3, (r14, 0x4)
+    2398:	64c8      	cmphs      	r2, r3
+    239a:	0c03      	bf      	0x23a0	// 23a0 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    239c:	1403      	addi      	r14, r14, 12
+    239e:	1490      	pop      	r15
+        k++;
+    23a0:	9862      	ld.w      	r3, (r14, 0x8)
+    23a2:	2300      	addi      	r3, 1
+    23a4:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    23a6:	e3fffc5f 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    23aa:	9860      	ld.w      	r3, (r14, 0x0)
+    23ac:	2300      	addi      	r3, 1
+    23ae:	07f2      	br      	0x2392	// 2392 <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000023b0 <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    23b0:	14d0      	push      	r15
+    23b2:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    23b4:	3000      	movi      	r0, 0
+    23b6:	e3fffde3 	bsr      	0x1f7c	// 1f7c <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    23ba:	3300      	movi      	r3, 0
+    23bc:	3240      	movi      	r2, 64
+    23be:	3100      	movi      	r1, 0
+    23c0:	3001      	movi      	r0, 1
+    23c2:	e3fffe2d 	bsr      	0x201c	// 201c <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    23c6:	3300      	movi      	r3, 0
+    23c8:	b865      	st.w      	r3, (r14, 0x14)
+    23ca:	b864      	st.w      	r3, (r14, 0x10)
+    23cc:	b863      	st.w      	r3, (r14, 0xc)
+    23ce:	b862      	st.w      	r3, (r14, 0x8)
+    23d0:	b861      	st.w      	r3, (r14, 0x4)
+    23d2:	b860      	st.w      	r3, (r14, 0x0)
+    23d4:	3208      	movi      	r2, 8
+    23d6:	3100      	movi      	r1, 0
+    23d8:	3000      	movi      	r0, 0
+    23da:	e3fffe2b 	bsr      	0x2030	// 2030 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    23de:	1079      	lrw      	r3, 0x2000009c	// 2440 <GPT0_CONFIG+0x90>
+    23e0:	8360      	ld.b      	r3, (r3, 0x0)
+    23e2:	3b41      	cmpnei      	r3, 1
+    23e4:	0827      	bt      	0x2432	// 2432 <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    23e6:	31fa      	movi      	r1, 250
+    23e8:	4123      	lsli      	r1, r1, 3
+    23ea:	3200      	movi      	r2, 0
+    23ec:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    23ee:	e3fffeaf 	bsr      	0x214c	// 214c <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    23f2:	3320      	movi      	r3, 32
+    23f4:	3204      	movi      	r2, 4
+    23f6:	3100      	movi      	r1, 0
+    23f8:	3001      	movi      	r0, 1
+    23fa:	e3fffe3d 	bsr      	0x2074	// 2074 <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    23fe:	3300      	movi      	r3, 0
+    2400:	3201      	movi      	r2, 1
+    2402:	b868      	st.w      	r3, (r14, 0x20)
+    2404:	b867      	st.w      	r3, (r14, 0x1c)
+    2406:	b866      	st.w      	r3, (r14, 0x18)
+    2408:	b865      	st.w      	r3, (r14, 0x14)
+    240a:	b864      	st.w      	r3, (r14, 0x10)
+    240c:	b863      	st.w      	r3, (r14, 0xc)
+    240e:	b842      	st.w      	r2, (r14, 0x8)
+    2410:	b841      	st.w      	r2, (r14, 0x4)
+    2412:	b860      	st.w      	r3, (r14, 0x0)
+    2414:	3200      	movi      	r2, 0
+    2416:	3302      	movi      	r3, 2
+    2418:	3100      	movi      	r1, 0
+    241a:	3000      	movi      	r0, 0
+    241c:	e3fffe36 	bsr      	0x2088	// 2088 <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    2420:	e3fffe8e 	bsr      	0x213c	// 213c <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    2424:	3180      	movi      	r1, 128
+    2426:	4129      	lsli      	r1, r1, 9
+    2428:	3001      	movi      	r0, 1
+    242a:	e3fffe99 	bsr      	0x215c	// 215c <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    242e:	1409      	addi      	r14, r14, 36
+    2430:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    2432:	3b40      	cmpnei      	r3, 0
+    2434:	0bdf      	bt      	0x23f2	// 23f2 <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    2436:	30fa      	movi      	r0, 250
+    2438:	3200      	movi      	r2, 0
+    243a:	3100      	movi      	r1, 0
+    243c:	4003      	lsli      	r0, r0, 3
+    243e:	07d8      	br      	0x23ee	// 23ee <GPT0_CONFIG+0x3e>
+    2440:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.BT_CONFIG:
+
+00002444 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    2444:	14d2      	push      	r4-r5, r15
+    2446:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    2448:	1095      	lrw      	r4, 0x20000008	// 249c <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    244a:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    244c:	9400      	ld.w      	r0, (r4, 0x0)
+    244e:	e3fffd49 	bsr      	0x1ee0	// 1ee0 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    2452:	9400      	ld.w      	r0, (r4, 0x0)
+    2454:	b8a1      	st.w      	r5, (r14, 0x4)
+    2456:	b8a0      	st.w      	r5, (r14, 0x0)
+    2458:	3308      	movi      	r3, 8
+    245a:	3200      	movi      	r2, 0
+    245c:	3101      	movi      	r1, 1
+    245e:	e3fffd58 	bsr      	0x1f0e	// 1f0e <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    2462:	3380      	movi      	r3, 128
+    2464:	4363      	lsli      	r3, r3, 3
+    2466:	b861      	st.w      	r3, (r14, 0x4)
+    2468:	9400      	ld.w      	r0, (r4, 0x0)
+    246a:	3300      	movi      	r3, 0
+    246c:	b8a3      	st.w      	r5, (r14, 0xc)
+    246e:	b8a2      	st.w      	r5, (r14, 0x8)
+    2470:	b8a0      	st.w      	r5, (r14, 0x0)
+    2472:	3200      	movi      	r2, 0
+    2474:	3180      	movi      	r1, 128
+    2476:	e3fffd58 	bsr      	0x1f26	// 1f26 <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    247a:	3201      	movi      	r2, 1
+    247c:	1029      	lrw      	r1, 0x12ac	// 24a0 <BT_CONFIG+0x5c>
+    247e:	9400      	ld.w      	r0, (r4, 0x0)
+    2480:	e3fffd69 	bsr      	0x1f52	// 1f52 <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    2484:	9400      	ld.w      	r0, (r4, 0x0)
+    2486:	e3fffd3b 	bsr      	0x1efc	// 1efc <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    248a:	9400      	ld.w      	r0, (r4, 0x0)
+    248c:	3202      	movi      	r2, 2
+    248e:	3101      	movi      	r1, 1
+    2490:	e3fffd64 	bsr      	0x1f58	// 1f58 <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    2494:	e3fffd6c 	bsr      	0x1f6c	// 1f6c <BT1_INT_ENABLE>
+	
+}
+    2498:	1404      	addi      	r14, r14, 16
+    249a:	1492      	pop      	r4-r5, r15
+    249c:	20000008 	.long	0x20000008
+    24a0:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000024a4 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    24a4:	14d0      	push      	r15
+    24a6:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    24a8:	e3fffb2a 	bsr      	0x1afc	// 1afc <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    24ac:	3101      	movi      	r1, 1
+    24ae:	3001      	movi      	r0, 1
+    24b0:	e3fffb4c 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    24b4:	3000      	movi      	r0, 0
+    24b6:	e3fffba5 	bsr      	0x1c00	// 1c00 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    24ba:	3180      	movi      	r1, 128
+    24bc:	3308      	movi      	r3, 8
+    24be:	3200      	movi      	r2, 0
+    24c0:	4121      	lsli      	r1, r1, 1
+    24c2:	3002      	movi      	r0, 2
+    24c4:	e3fffb5a 	bsr      	0x1b78	// 1b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    24c8:	3080      	movi      	r0, 128
+    24ca:	3118      	movi      	r1, 24
+    24cc:	4002      	lsli      	r0, r0, 2
+    24ce:	e3fffbd5 	bsr      	0x1c78	// 1c78 <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    24d2:	3001      	movi      	r0, 1
+    24d4:	e3fffbaa 	bsr      	0x1c28	// 1c28 <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    24d8:	e3fffbc6 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    24dc:	e3fffbf8 	bsr      	0x1ccc	// 1ccc <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    24e0:	3340      	movi      	r3, 64
+    24e2:	b860      	st.w      	r3, (r14, 0x0)
+    24e4:	31c0      	movi      	r1, 192
+    24e6:	3380      	movi      	r3, 128
+    24e8:	4364      	lsli      	r3, r3, 4
+    24ea:	3200      	movi      	r2, 0
+    24ec:	4123      	lsli      	r1, r1, 3
+    24ee:	3000      	movi      	r0, 0
+    24f0:	e3fffbd0 	bsr      	0x1c90	// 1c90 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    24f4:	e3fffbde 	bsr      	0x1cb0	// 1cb0 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    24f8:	e3fffc18 	bsr      	0x1d28	// 1d28 <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    24fc:	3000      	movi      	r0, 0
+    24fe:	e0000e4f 	bsr      	0x419c	// 419c <std_clk_calib>
+	
+}
+    2502:	1401      	addi      	r14, r14, 4
+    2504:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00002508 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    2508:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    250a:	1078      	lrw      	r3, 0x2000005c	// 2568 <APT32F102_init+0x60>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    250c:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    250e:	9340      	ld.w      	r2, (r3, 0x0)
+    2510:	1077      	lrw      	r3, 0xfffffff	// 256c <APT32F102_init+0x64>
+    2512:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    2514:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    2516:	926c      	ld.w      	r3, (r2, 0x30)
+    2518:	68c4      	and      	r3, r1
+    251a:	3b40      	cmpnei      	r3, 0
+    251c:	0ffd      	bf      	0x2516	// 2516 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    251e:	e3ffffc3 	bsr      	0x24a4	// 24a4 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    2522:	e000050f 	bsr      	0x2f40	// 2f40 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    2526:	e3fffc07 	bsr      	0x1d34	// 1d34 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    252a:	3101      	movi      	r1, 1
+    252c:	300f      	movi      	r0, 15
+    252e:	e3fffc15 	bsr      	0x1d58	// 1d58 <Set_INT_Priority>
+//	Set_INT_Priority(SIO_IRQ,1);				//SIO优先级最高
+//	
+	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+    2532:	3102      	movi      	r1, 2
+    2534:	3019      	movi      	r0, 25
+    2536:	e3fffc11 	bsr      	0x1d58	// 1d58 <Set_INT_Priority>
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    253a:	e3ffff85 	bsr      	0x2444	// 2444 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    253e:	e3ffff39 	bsr      	0x23b0	// 23b0 <GPT0_CONFIG>
+	
+	UARTx_Init(UART_1,NULL);
+    2542:	3100      	movi      	r1, 0
+    2544:	3001      	movi      	r0, 1
+    2546:	e0000501 	bsr      	0x2f48	// 2f48 <UARTx_Init>
+//	UARTx_Init(UART_2,NULL);
+	
+	RC522_Init();
+    254a:	e00006b7 	bsr      	0x32b8	// 32b8 <RC522_Init>
+	
+
+	if(rf_exist == 0x01)       //不带无线模块初始化
+    254e:	1069      	lrw      	r3, 0x2000009c	// 2570 <APT32F102_init+0x68>
+    2550:	8360      	ld.b      	r3, (r3, 0x0)
+    2552:	3b41      	cmpnei      	r3, 1
+    2554:	0804      	bt      	0x255c	// 255c <APT32F102_init+0x54>
+	{
+		LogicCtrl_NoRF_Init(); 
+    2556:	e0000989 	bsr      	0x3868	// 3868 <LogicCtrl_NoRF_Init>
+	}
+	else if(rf_exist == 0x00)  //带无线模块初始化
+	{
+		LogicCtrl_Init();     
+	}
+}
+    255a:	1490      	pop      	r15
+	else if(rf_exist == 0x00)  //带无线模块初始化
+    255c:	3b40      	cmpnei      	r3, 0
+    255e:	0bfe      	bt      	0x255a	// 255a <APT32F102_init+0x52>
+		LogicCtrl_Init();     
+    2560:	e0000922 	bsr      	0x37a4	// 37a4 <LogicCtrl_Init>
+}
+    2564:	07fb      	br      	0x255a	// 255a <APT32F102_init+0x52>
+    2566:	0000      	bkpt
+    2568:	2000005c 	.long	0x2000005c
+    256c:	0fffffff 	.long	0x0fffffff
+    2570:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00002574 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    2574:	1460      	nie
+    2576:	1462      	ipush
+    // ISR content ...
+	nop;
+    2578:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    257a:	117a      	lrw      	r3, 0x2000005c	// 2660 <SYSCONIntHandler+0xec>
+    257c:	3280      	movi      	r2, 128
+    257e:	9360      	ld.w      	r3, (r3, 0x0)
+    2580:	60c8      	addu      	r3, r2
+    2582:	9323      	ld.w      	r1, (r3, 0xc)
+    2584:	3001      	movi      	r0, 1
+    2586:	6840      	and      	r1, r0
+    2588:	3940      	cmpnei      	r1, 0
+    258a:	0c04      	bf      	0x2592	// 2592 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    258c:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    258e:	1463      	ipop
+    2590:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    2592:	9323      	ld.w      	r1, (r3, 0xc)
+    2594:	3002      	movi      	r0, 2
+    2596:	6840      	and      	r1, r0
+    2598:	3940      	cmpnei      	r1, 0
+    259a:	0bf9      	bt      	0x258c	// 258c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    259c:	9323      	ld.w      	r1, (r3, 0xc)
+    259e:	3008      	movi      	r0, 8
+    25a0:	6840      	and      	r1, r0
+    25a2:	3940      	cmpnei      	r1, 0
+    25a4:	0bf4      	bt      	0x258c	// 258c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    25a6:	9323      	ld.w      	r1, (r3, 0xc)
+    25a8:	3010      	movi      	r0, 16
+    25aa:	6840      	and      	r1, r0
+    25ac:	3940      	cmpnei      	r1, 0
+    25ae:	0bef      	bt      	0x258c	// 258c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    25b0:	9323      	ld.w      	r1, (r3, 0xc)
+    25b2:	6848      	and      	r1, r2
+    25b4:	3940      	cmpnei      	r1, 0
+    25b6:	0c03      	bf      	0x25bc	// 25bc <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    25b8:	b341      	st.w      	r2, (r3, 0x4)
+}
+    25ba:	07ea      	br      	0x258e	// 258e <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    25bc:	3280      	movi      	r2, 128
+    25be:	9323      	ld.w      	r1, (r3, 0xc)
+    25c0:	4241      	lsli      	r2, r2, 1
+    25c2:	6848      	and      	r1, r2
+    25c4:	3940      	cmpnei      	r1, 0
+    25c6:	0bf9      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    25c8:	3280      	movi      	r2, 128
+    25ca:	9323      	ld.w      	r1, (r3, 0xc)
+    25cc:	4242      	lsli      	r2, r2, 2
+    25ce:	6848      	and      	r1, r2
+    25d0:	3940      	cmpnei      	r1, 0
+    25d2:	0bf3      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    25d4:	3280      	movi      	r2, 128
+    25d6:	9323      	ld.w      	r1, (r3, 0xc)
+    25d8:	4243      	lsli      	r2, r2, 3
+    25da:	6848      	and      	r1, r2
+    25dc:	3940      	cmpnei      	r1, 0
+    25de:	0bed      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    25e0:	3280      	movi      	r2, 128
+    25e2:	9323      	ld.w      	r1, (r3, 0xc)
+    25e4:	4244      	lsli      	r2, r2, 4
+    25e6:	6848      	and      	r1, r2
+    25e8:	3940      	cmpnei      	r1, 0
+    25ea:	0c03      	bf      	0x25f0	// 25f0 <SYSCONIntHandler+0x7c>
+		nop;
+    25ec:	6c03      	mov      	r0, r0
+    25ee:	07e5      	br      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    25f0:	3280      	movi      	r2, 128
+    25f2:	9323      	ld.w      	r1, (r3, 0xc)
+    25f4:	4245      	lsli      	r2, r2, 5
+    25f6:	6848      	and      	r1, r2
+    25f8:	3940      	cmpnei      	r1, 0
+    25fa:	0bdf      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    25fc:	3280      	movi      	r2, 128
+    25fe:	9323      	ld.w      	r1, (r3, 0xc)
+    2600:	4246      	lsli      	r2, r2, 6
+    2602:	6848      	and      	r1, r2
+    2604:	3940      	cmpnei      	r1, 0
+    2606:	0bd9      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    2608:	3280      	movi      	r2, 128
+    260a:	9323      	ld.w      	r1, (r3, 0xc)
+    260c:	4247      	lsli      	r2, r2, 7
+    260e:	6848      	and      	r1, r2
+    2610:	3940      	cmpnei      	r1, 0
+    2612:	0bd3      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    2614:	3280      	movi      	r2, 128
+    2616:	9323      	ld.w      	r1, (r3, 0xc)
+    2618:	424b      	lsli      	r2, r2, 11
+    261a:	6848      	and      	r1, r2
+    261c:	3940      	cmpnei      	r1, 0
+    261e:	0bcd      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    2620:	3280      	movi      	r2, 128
+    2622:	9323      	ld.w      	r1, (r3, 0xc)
+    2624:	424c      	lsli      	r2, r2, 12
+    2626:	6848      	and      	r1, r2
+    2628:	3940      	cmpnei      	r1, 0
+    262a:	0bc7      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    262c:	3280      	movi      	r2, 128
+    262e:	9323      	ld.w      	r1, (r3, 0xc)
+    2630:	424d      	lsli      	r2, r2, 13
+    2632:	6848      	and      	r1, r2
+    2634:	3940      	cmpnei      	r1, 0
+    2636:	0bc1      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    2638:	3280      	movi      	r2, 128
+    263a:	9323      	ld.w      	r1, (r3, 0xc)
+    263c:	424e      	lsli      	r2, r2, 14
+    263e:	6848      	and      	r1, r2
+    2640:	3940      	cmpnei      	r1, 0
+    2642:	0bbb      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    2644:	3280      	movi      	r2, 128
+    2646:	9323      	ld.w      	r1, (r3, 0xc)
+    2648:	424f      	lsli      	r2, r2, 15
+    264a:	6848      	and      	r1, r2
+    264c:	3940      	cmpnei      	r1, 0
+    264e:	0bb5      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    2650:	3280      	movi      	r2, 128
+    2652:	9323      	ld.w      	r1, (r3, 0xc)
+    2654:	4256      	lsli      	r2, r2, 22
+    2656:	6848      	and      	r1, r2
+    2658:	3940      	cmpnei      	r1, 0
+    265a:	0baf      	bt      	0x25b8	// 25b8 <SYSCONIntHandler+0x44>
+    265c:	0799      	br      	0x258e	// 258e <SYSCONIntHandler+0x1a>
+    265e:	0000      	bkpt
+    2660:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00002664 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    2664:	1460      	nie
+    2666:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    2668:	1078      	lrw      	r3, 0x20000060	// 26c8 <IFCIntHandler+0x64>
+    266a:	3101      	movi      	r1, 1
+    266c:	9360      	ld.w      	r3, (r3, 0x0)
+    266e:	934b      	ld.w      	r2, (r3, 0x2c)
+    2670:	6884      	and      	r2, r1
+    2672:	3a40      	cmpnei      	r2, 0
+    2674:	0c04      	bf      	0x267c	// 267c <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    2676:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    2678:	1463      	ipop
+    267a:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    267c:	934b      	ld.w      	r2, (r3, 0x2c)
+    267e:	3102      	movi      	r1, 2
+    2680:	6884      	and      	r2, r1
+    2682:	3a40      	cmpnei      	r2, 0
+    2684:	0bf9      	bt      	0x2676	// 2676 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    2686:	934b      	ld.w      	r2, (r3, 0x2c)
+    2688:	3104      	movi      	r1, 4
+    268a:	6884      	and      	r2, r1
+    268c:	3a40      	cmpnei      	r2, 0
+    268e:	0bf4      	bt      	0x2676	// 2676 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    2690:	3280      	movi      	r2, 128
+    2692:	932b      	ld.w      	r1, (r3, 0x2c)
+    2694:	4245      	lsli      	r2, r2, 5
+    2696:	6848      	and      	r1, r2
+    2698:	3940      	cmpnei      	r1, 0
+    269a:	0c03      	bf      	0x26a0	// 26a0 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    269c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    269e:	07ed      	br      	0x2678	// 2678 <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    26a0:	3280      	movi      	r2, 128
+    26a2:	932b      	ld.w      	r1, (r3, 0x2c)
+    26a4:	4246      	lsli      	r2, r2, 6
+    26a6:	6848      	and      	r1, r2
+    26a8:	3940      	cmpnei      	r1, 0
+    26aa:	0bf9      	bt      	0x269c	// 269c <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    26ac:	3280      	movi      	r2, 128
+    26ae:	932b      	ld.w      	r1, (r3, 0x2c)
+    26b0:	4247      	lsli      	r2, r2, 7
+    26b2:	6848      	and      	r1, r2
+    26b4:	3940      	cmpnei      	r1, 0
+    26b6:	0bf3      	bt      	0x269c	// 269c <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    26b8:	3280      	movi      	r2, 128
+    26ba:	932b      	ld.w      	r1, (r3, 0x2c)
+    26bc:	4248      	lsli      	r2, r2, 8
+    26be:	6848      	and      	r1, r2
+    26c0:	3940      	cmpnei      	r1, 0
+    26c2:	0bed      	bt      	0x269c	// 269c <IFCIntHandler+0x38>
+    26c4:	07da      	br      	0x2678	// 2678 <IFCIntHandler+0x14>
+    26c6:	0000      	bkpt
+    26c8:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+000026cc <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    26cc:	1460      	nie
+    26ce:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    26d0:	1078      	lrw      	r3, 0x20000050	// 2730 <ADCIntHandler+0x64>
+    26d2:	3101      	movi      	r1, 1
+    26d4:	9360      	ld.w      	r3, (r3, 0x0)
+    26d6:	9348      	ld.w      	r2, (r3, 0x20)
+    26d8:	6884      	and      	r2, r1
+    26da:	3a40      	cmpnei      	r2, 0
+    26dc:	0c04      	bf      	0x26e4	// 26e4 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    26de:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    26e0:	1463      	ipop
+    26e2:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    26e4:	9348      	ld.w      	r2, (r3, 0x20)
+    26e6:	3102      	movi      	r1, 2
+    26e8:	6884      	and      	r2, r1
+    26ea:	3a40      	cmpnei      	r2, 0
+    26ec:	0bf9      	bt      	0x26de	// 26de <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    26ee:	9348      	ld.w      	r2, (r3, 0x20)
+    26f0:	3104      	movi      	r1, 4
+    26f2:	6884      	and      	r2, r1
+    26f4:	3a40      	cmpnei      	r2, 0
+    26f6:	0bf4      	bt      	0x26de	// 26de <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    26f8:	9348      	ld.w      	r2, (r3, 0x20)
+    26fa:	3110      	movi      	r1, 16
+    26fc:	6884      	and      	r2, r1
+    26fe:	3a40      	cmpnei      	r2, 0
+    2700:	0bef      	bt      	0x26de	// 26de <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    2702:	9348      	ld.w      	r2, (r3, 0x20)
+    2704:	3120      	movi      	r1, 32
+    2706:	6884      	and      	r2, r1
+    2708:	3a40      	cmpnei      	r2, 0
+    270a:	0bea      	bt      	0x26de	// 26de <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    270c:	9348      	ld.w      	r2, (r3, 0x20)
+    270e:	3140      	movi      	r1, 64
+    2710:	6884      	and      	r2, r1
+    2712:	3a40      	cmpnei      	r2, 0
+    2714:	0be5      	bt      	0x26de	// 26de <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    2716:	9348      	ld.w      	r2, (r3, 0x20)
+    2718:	3180      	movi      	r1, 128
+    271a:	6884      	and      	r2, r1
+    271c:	3a40      	cmpnei      	r2, 0
+    271e:	0be0      	bt      	0x26de	// 26de <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    2720:	3280      	movi      	r2, 128
+    2722:	9328      	ld.w      	r1, (r3, 0x20)
+    2724:	4249      	lsli      	r2, r2, 9
+    2726:	6848      	and      	r1, r2
+    2728:	3940      	cmpnei      	r1, 0
+    272a:	0fdb      	bf      	0x26e0	// 26e0 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    272c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    272e:	07d9      	br      	0x26e0	// 26e0 <ADCIntHandler+0x14>
+    2730:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00002734 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    2734:	1460      	nie
+    2736:	1462      	ipush
+    2738:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    273a:	1387      	lrw      	r4, 0x20000020	// 28d4 <EPT0IntHandler+0x1a0>
+    273c:	3280      	movi      	r2, 128
+    273e:	9460      	ld.w      	r3, (r4, 0x0)
+    2740:	60c8      	addu      	r3, r2
+    2742:	9335      	ld.w      	r1, (r3, 0x54)
+    2744:	3001      	movi      	r0, 1
+    2746:	6840      	and      	r1, r0
+    2748:	3940      	cmpnei      	r1, 0
+    274a:	0c03      	bf      	0x2750	// 2750 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    274c:	b317      	st.w      	r0, (r3, 0x5c)
+    274e:	0424      	br      	0x2796	// 2796 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    2750:	9335      	ld.w      	r1, (r3, 0x54)
+    2752:	3002      	movi      	r0, 2
+    2754:	6840      	and      	r1, r0
+    2756:	3940      	cmpnei      	r1, 0
+    2758:	0bfa      	bt      	0x274c	// 274c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    275a:	9335      	ld.w      	r1, (r3, 0x54)
+    275c:	3004      	movi      	r0, 4
+    275e:	6840      	and      	r1, r0
+    2760:	3940      	cmpnei      	r1, 0
+    2762:	0bf5      	bt      	0x274c	// 274c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    2764:	9335      	ld.w      	r1, (r3, 0x54)
+    2766:	3008      	movi      	r0, 8
+    2768:	6840      	and      	r1, r0
+    276a:	3940      	cmpnei      	r1, 0
+    276c:	0bf0      	bt      	0x274c	// 274c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    276e:	9335      	ld.w      	r1, (r3, 0x54)
+    2770:	3010      	movi      	r0, 16
+    2772:	6840      	and      	r1, r0
+    2774:	3940      	cmpnei      	r1, 0
+    2776:	0c1f      	bf      	0x27b4	// 27b4 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    2778:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    277a:	3200      	movi      	r2, 0
+    277c:	3101      	movi      	r1, 1
+    277e:	3000      	movi      	r0, 0
+    2780:	e3fffab4 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    2784:	3201      	movi      	r2, 1
+    2786:	3101      	movi      	r1, 1
+    2788:	3001      	movi      	r0, 1
+    278a:	e3fffaaf 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    278e:	9460      	ld.w      	r3, (r4, 0x0)
+    2790:	934b      	ld.w      	r2, (r3, 0x2c)
+    2792:	1272      	lrw      	r3, 0x20000158	// 28d8 <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2794:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    2796:	9460      	ld.w      	r3, (r4, 0x0)
+    2798:	3280      	movi      	r2, 128
+    279a:	60c8      	addu      	r3, r2
+    279c:	932b      	ld.w      	r1, (r3, 0x2c)
+    279e:	3001      	movi      	r0, 1
+    27a0:	6840      	and      	r1, r0
+    27a2:	3940      	cmpnei      	r1, 0
+    27a4:	0c61      	bf      	0x2866	// 2866 <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    27a6:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    27a8:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    27ac:	9880      	ld.w      	r4, (r14, 0x0)
+    27ae:	1402      	addi      	r14, r14, 8
+    27b0:	1463      	ipop
+    27b2:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    27b4:	9335      	ld.w      	r1, (r3, 0x54)
+    27b6:	3020      	movi      	r0, 32
+    27b8:	6840      	and      	r1, r0
+    27ba:	3940      	cmpnei      	r1, 0
+    27bc:	0c10      	bf      	0x27dc	// 27dc <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    27be:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    27c0:	3200      	movi      	r2, 0
+    27c2:	3101      	movi      	r1, 1
+    27c4:	3001      	movi      	r0, 1
+    27c6:	e3fffa91 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    27ca:	3201      	movi      	r2, 1
+    27cc:	3101      	movi      	r1, 1
+    27ce:	3000      	movi      	r0, 0
+    27d0:	e3fffa8c 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    27d4:	9460      	ld.w      	r3, (r4, 0x0)
+    27d6:	934c      	ld.w      	r2, (r3, 0x30)
+    27d8:	1261      	lrw      	r3, 0x20000154	// 28dc <EPT0IntHandler+0x1a8>
+    27da:	07dd      	br      	0x2794	// 2794 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    27dc:	9335      	ld.w      	r1, (r3, 0x54)
+    27de:	3040      	movi      	r0, 64
+    27e0:	6840      	and      	r1, r0
+    27e2:	3940      	cmpnei      	r1, 0
+    27e4:	0bb4      	bt      	0x274c	// 274c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    27e6:	9335      	ld.w      	r1, (r3, 0x54)
+    27e8:	6848      	and      	r1, r2
+    27ea:	3940      	cmpnei      	r1, 0
+    27ec:	0c03      	bf      	0x27f2	// 27f2 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    27ee:	b357      	st.w      	r2, (r3, 0x5c)
+    27f0:	07d3      	br      	0x2796	// 2796 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    27f2:	3280      	movi      	r2, 128
+    27f4:	9335      	ld.w      	r1, (r3, 0x54)
+    27f6:	4241      	lsli      	r2, r2, 1
+    27f8:	6848      	and      	r1, r2
+    27fa:	3940      	cmpnei      	r1, 0
+    27fc:	0bf9      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    27fe:	3280      	movi      	r2, 128
+    2800:	9335      	ld.w      	r1, (r3, 0x54)
+    2802:	4242      	lsli      	r2, r2, 2
+    2804:	6848      	and      	r1, r2
+    2806:	3940      	cmpnei      	r1, 0
+    2808:	0bf3      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    280a:	3280      	movi      	r2, 128
+    280c:	9335      	ld.w      	r1, (r3, 0x54)
+    280e:	4243      	lsli      	r2, r2, 3
+    2810:	6848      	and      	r1, r2
+    2812:	3940      	cmpnei      	r1, 0
+    2814:	0bed      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    2816:	3280      	movi      	r2, 128
+    2818:	9335      	ld.w      	r1, (r3, 0x54)
+    281a:	4244      	lsli      	r2, r2, 4
+    281c:	6848      	and      	r1, r2
+    281e:	3940      	cmpnei      	r1, 0
+    2820:	0be7      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    2822:	3280      	movi      	r2, 128
+    2824:	9335      	ld.w      	r1, (r3, 0x54)
+    2826:	4245      	lsli      	r2, r2, 5
+    2828:	6848      	and      	r1, r2
+    282a:	3940      	cmpnei      	r1, 0
+    282c:	0be1      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    282e:	3280      	movi      	r2, 128
+    2830:	9335      	ld.w      	r1, (r3, 0x54)
+    2832:	4246      	lsli      	r2, r2, 6
+    2834:	6848      	and      	r1, r2
+    2836:	3940      	cmpnei      	r1, 0
+    2838:	0bdb      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    283a:	3280      	movi      	r2, 128
+    283c:	9335      	ld.w      	r1, (r3, 0x54)
+    283e:	4247      	lsli      	r2, r2, 7
+    2840:	6848      	and      	r1, r2
+    2842:	3940      	cmpnei      	r1, 0
+    2844:	0bd5      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    2846:	3280      	movi      	r2, 128
+    2848:	9335      	ld.w      	r1, (r3, 0x54)
+    284a:	4248      	lsli      	r2, r2, 8
+    284c:	6848      	and      	r1, r2
+    284e:	3940      	cmpnei      	r1, 0
+    2850:	0bcf      	bt      	0x27ee	// 27ee <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    2852:	3280      	movi      	r2, 128
+    2854:	9335      	ld.w      	r1, (r3, 0x54)
+    2856:	4249      	lsli      	r2, r2, 9
+    2858:	6848      	and      	r1, r2
+    285a:	3940      	cmpnei      	r1, 0
+    285c:	0f9d      	bf      	0x2796	// 2796 <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    285e:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    2860:	e3fffd52 	bsr      	0x2304	// 2304 <EPT_Stop>
+    2864:	0799      	br      	0x2796	// 2796 <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    2866:	932b      	ld.w      	r1, (r3, 0x2c)
+    2868:	3002      	movi      	r0, 2
+    286a:	6840      	and      	r1, r0
+    286c:	3940      	cmpnei      	r1, 0
+    286e:	0b9c      	bt      	0x27a6	// 27a6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    2870:	932b      	ld.w      	r1, (r3, 0x2c)
+    2872:	3004      	movi      	r0, 4
+    2874:	6840      	and      	r1, r0
+    2876:	3940      	cmpnei      	r1, 0
+    2878:	0b97      	bt      	0x27a6	// 27a6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    287a:	932b      	ld.w      	r1, (r3, 0x2c)
+    287c:	3008      	movi      	r0, 8
+    287e:	6840      	and      	r1, r0
+    2880:	3940      	cmpnei      	r1, 0
+    2882:	0b92      	bt      	0x27a6	// 27a6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    2884:	932b      	ld.w      	r1, (r3, 0x2c)
+    2886:	3010      	movi      	r0, 16
+    2888:	6840      	and      	r1, r0
+    288a:	3940      	cmpnei      	r1, 0
+    288c:	0b8d      	bt      	0x27a6	// 27a6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    288e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2890:	3020      	movi      	r0, 32
+    2892:	6840      	and      	r1, r0
+    2894:	3940      	cmpnei      	r1, 0
+    2896:	0b88      	bt      	0x27a6	// 27a6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    2898:	932b      	ld.w      	r1, (r3, 0x2c)
+    289a:	3040      	movi      	r0, 64
+    289c:	6840      	and      	r1, r0
+    289e:	3940      	cmpnei      	r1, 0
+    28a0:	0b83      	bt      	0x27a6	// 27a6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    28a2:	932b      	ld.w      	r1, (r3, 0x2c)
+    28a4:	6848      	and      	r1, r2
+    28a6:	3940      	cmpnei      	r1, 0
+    28a8:	0c03      	bf      	0x28ae	// 28ae <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    28aa:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    28ac:	077e      	br      	0x27a8	// 27a8 <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    28ae:	3280      	movi      	r2, 128
+    28b0:	932b      	ld.w      	r1, (r3, 0x2c)
+    28b2:	4241      	lsli      	r2, r2, 1
+    28b4:	6848      	and      	r1, r2
+    28b6:	3940      	cmpnei      	r1, 0
+    28b8:	0bf9      	bt      	0x28aa	// 28aa <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    28ba:	3280      	movi      	r2, 128
+    28bc:	932b      	ld.w      	r1, (r3, 0x2c)
+    28be:	4242      	lsli      	r2, r2, 2
+    28c0:	6848      	and      	r1, r2
+    28c2:	3940      	cmpnei      	r1, 0
+    28c4:	0bf3      	bt      	0x28aa	// 28aa <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    28c6:	3280      	movi      	r2, 128
+    28c8:	932b      	ld.w      	r1, (r3, 0x2c)
+    28ca:	4243      	lsli      	r2, r2, 3
+    28cc:	6848      	and      	r1, r2
+    28ce:	3940      	cmpnei      	r1, 0
+    28d0:	0bed      	bt      	0x28aa	// 28aa <EPT0IntHandler+0x176>
+    28d2:	076b      	br      	0x27a8	// 27a8 <EPT0IntHandler+0x74>
+    28d4:	20000020 	.long	0x20000020
+    28d8:	20000158 	.long	0x20000158
+    28dc:	20000154 	.long	0x20000154
+
+Disassembly of section .text.WWDTHandler:
+
+000028e0 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    28e0:	1460      	nie
+    28e2:	1462      	ipush
+    28e4:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    28e6:	10ab      	lrw      	r5, 0x20000010	// 2910 <WWDTHandler+0x30>
+    28e8:	3401      	movi      	r4, 1
+    28ea:	9560      	ld.w      	r3, (r5, 0x0)
+    28ec:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    28ee:	30ff      	movi      	r0, 255
+    28f0:	e3fffaf0 	bsr      	0x1ed0	// 1ed0 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    28f4:	9540      	ld.w      	r2, (r5, 0x0)
+    28f6:	9263      	ld.w      	r3, (r2, 0xc)
+    28f8:	68d0      	and      	r3, r4
+    28fa:	3b40      	cmpnei      	r3, 0
+    28fc:	0c02      	bf      	0x2900	// 2900 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    28fe:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    2900:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    2904:	98a1      	ld.w      	r5, (r14, 0x4)
+    2906:	9880      	ld.w      	r4, (r14, 0x0)
+    2908:	1403      	addi      	r14, r14, 12
+    290a:	1463      	ipop
+    290c:	1461      	nir
+    290e:	0000      	bkpt
+    2910:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00002914 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    2914:	1460      	nie
+    2916:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    2918:	107e      	lrw      	r3, 0x20000024	// 2990 <GPT0IntHandler+0x7c>
+    291a:	3101      	movi      	r1, 1
+    291c:	9360      	ld.w      	r3, (r3, 0x0)
+    291e:	237f      	addi      	r3, 128
+    2920:	9355      	ld.w      	r2, (r3, 0x54)
+    2922:	6884      	and      	r2, r1
+    2924:	3a40      	cmpnei      	r2, 0
+    2926:	0c04      	bf      	0x292e	// 292e <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    2928:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    292a:	1463      	ipop
+    292c:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    292e:	9355      	ld.w      	r2, (r3, 0x54)
+    2930:	3102      	movi      	r1, 2
+    2932:	6884      	and      	r2, r1
+    2934:	3a40      	cmpnei      	r2, 0
+    2936:	0bf9      	bt      	0x2928	// 2928 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    2938:	9355      	ld.w      	r2, (r3, 0x54)
+    293a:	3110      	movi      	r1, 16
+    293c:	6884      	and      	r2, r1
+    293e:	3a40      	cmpnei      	r2, 0
+    2940:	0bf4      	bt      	0x2928	// 2928 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    2942:	9355      	ld.w      	r2, (r3, 0x54)
+    2944:	3120      	movi      	r1, 32
+    2946:	6884      	and      	r2, r1
+    2948:	3a40      	cmpnei      	r2, 0
+    294a:	0bef      	bt      	0x2928	// 2928 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    294c:	3280      	movi      	r2, 128
+    294e:	9335      	ld.w      	r1, (r3, 0x54)
+    2950:	4241      	lsli      	r2, r2, 1
+    2952:	6848      	and      	r1, r2
+    2954:	3940      	cmpnei      	r1, 0
+    2956:	0c03      	bf      	0x295c	// 295c <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    2958:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    295a:	07e8      	br      	0x292a	// 292a <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    295c:	3280      	movi      	r2, 128
+    295e:	9335      	ld.w      	r1, (r3, 0x54)
+    2960:	4242      	lsli      	r2, r2, 2
+    2962:	6848      	and      	r1, r2
+    2964:	3940      	cmpnei      	r1, 0
+    2966:	0bf9      	bt      	0x2958	// 2958 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    2968:	3280      	movi      	r2, 128
+    296a:	9335      	ld.w      	r1, (r3, 0x54)
+    296c:	4243      	lsli      	r2, r2, 3
+    296e:	6848      	and      	r1, r2
+    2970:	3940      	cmpnei      	r1, 0
+    2972:	0bf3      	bt      	0x2958	// 2958 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    2974:	3280      	movi      	r2, 128
+    2976:	9335      	ld.w      	r1, (r3, 0x54)
+    2978:	4244      	lsli      	r2, r2, 4
+    297a:	6848      	and      	r1, r2
+    297c:	3940      	cmpnei      	r1, 0
+    297e:	0bed      	bt      	0x2958	// 2958 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    2980:	3280      	movi      	r2, 128
+    2982:	9335      	ld.w      	r1, (r3, 0x54)
+    2984:	4249      	lsli      	r2, r2, 9
+    2986:	6848      	and      	r1, r2
+    2988:	3940      	cmpnei      	r1, 0
+    298a:	0be7      	bt      	0x2958	// 2958 <GPT0IntHandler+0x44>
+    298c:	07cf      	br      	0x292a	// 292a <GPT0IntHandler+0x16>
+    298e:	0000      	bkpt
+    2990:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00002994 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    2994:	1460      	nie
+    2996:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    2998:	1079      	lrw      	r3, 0x20000018	// 29fc <RTCIntHandler+0x68>
+    299a:	3101      	movi      	r1, 1
+    299c:	9360      	ld.w      	r3, (r3, 0x0)
+    299e:	934a      	ld.w      	r2, (r3, 0x28)
+    29a0:	6884      	and      	r2, r1
+    29a2:	3a40      	cmpnei      	r2, 0
+    29a4:	0c14      	bf      	0x29cc	// 29cc <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    29a6:	1057      	lrw      	r2, 0xca53	// 2a00 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    29a8:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    29aa:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    29ac:	9342      	ld.w      	r2, (r3, 0x8)
+    29ae:	6c84      	or      	r2, r1
+    29b0:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    29b2:	3280      	movi      	r2, 128
+    29b4:	424d      	lsli      	r2, r2, 13
+    29b6:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    29b8:	3102      	movi      	r1, 2
+    29ba:	9342      	ld.w      	r2, (r3, 0x8)
+    29bc:	6884      	and      	r2, r1
+    29be:	3a40      	cmpnei      	r2, 0
+    29c0:	0bfd      	bt      	0x29ba	// 29ba <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    29c2:	9342      	ld.w      	r2, (r3, 0x8)
+    29c4:	3a80      	bclri      	r2, 0
+    29c6:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    29c8:	1463      	ipop
+    29ca:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    29cc:	934a      	ld.w      	r2, (r3, 0x28)
+    29ce:	3102      	movi      	r1, 2
+    29d0:	6884      	and      	r2, r1
+    29d2:	3a40      	cmpnei      	r2, 0
+    29d4:	0c03      	bf      	0x29da	// 29da <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    29d6:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    29d8:	07f8      	br      	0x29c8	// 29c8 <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    29da:	934a      	ld.w      	r2, (r3, 0x28)
+    29dc:	3104      	movi      	r1, 4
+    29de:	6884      	and      	r2, r1
+    29e0:	3a40      	cmpnei      	r2, 0
+    29e2:	0bfa      	bt      	0x29d6	// 29d6 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    29e4:	934a      	ld.w      	r2, (r3, 0x28)
+    29e6:	3108      	movi      	r1, 8
+    29e8:	6884      	and      	r2, r1
+    29ea:	3a40      	cmpnei      	r2, 0
+    29ec:	0bf5      	bt      	0x29d6	// 29d6 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    29ee:	934a      	ld.w      	r2, (r3, 0x28)
+    29f0:	3110      	movi      	r1, 16
+    29f2:	6884      	and      	r2, r1
+    29f4:	3a40      	cmpnei      	r2, 0
+    29f6:	0bf0      	bt      	0x29d6	// 29d6 <RTCIntHandler+0x42>
+    29f8:	07e8      	br      	0x29c8	// 29c8 <RTCIntHandler+0x34>
+    29fa:	0000      	bkpt
+    29fc:	20000018 	.long	0x20000018
+    2a00:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00002a04 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    2a04:	1460      	nie
+    2a06:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a08:	106d      	lrw      	r3, 0x20000040	// 2a3c <UART0IntHandler+0x38>
+    2a0a:	3102      	movi      	r1, 2
+    2a0c:	9360      	ld.w      	r3, (r3, 0x0)
+    2a0e:	9343      	ld.w      	r2, (r3, 0xc)
+    2a10:	6884      	and      	r2, r1
+    2a12:	3a40      	cmpnei      	r2, 0
+    2a14:	0c03      	bf      	0x2a1a	// 2a1a <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    2a16:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2a18:	0410      	br      	0x2a38	// 2a38 <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2a1a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a1c:	3101      	movi      	r1, 1
+    2a1e:	6884      	and      	r2, r1
+    2a20:	3a40      	cmpnei      	r2, 0
+    2a22:	0bfa      	bt      	0x2a16	// 2a16 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2a24:	9343      	ld.w      	r2, (r3, 0xc)
+    2a26:	3108      	movi      	r1, 8
+    2a28:	6884      	and      	r2, r1
+    2a2a:	3a40      	cmpnei      	r2, 0
+    2a2c:	0bf5      	bt      	0x2a16	// 2a16 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2a2e:	9343      	ld.w      	r2, (r3, 0xc)
+    2a30:	3104      	movi      	r1, 4
+    2a32:	6884      	and      	r2, r1
+    2a34:	3a40      	cmpnei      	r2, 0
+    2a36:	0bf0      	bt      	0x2a16	// 2a16 <UART0IntHandler+0x12>
+}
+    2a38:	1463      	ipop
+    2a3a:	1461      	nir
+    2a3c:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00002a40 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    2a40:	1460      	nie
+    2a42:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a44:	106d      	lrw      	r3, 0x2000003c	// 2a78 <UART1IntHandler+0x38>
+    2a46:	3102      	movi      	r1, 2
+    2a48:	9360      	ld.w      	r3, (r3, 0x0)
+    2a4a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a4c:	6884      	and      	r2, r1
+    2a4e:	3a40      	cmpnei      	r2, 0
+    2a50:	0c03      	bf      	0x2a56	// 2a56 <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    2a52:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2a54:	0410      	br      	0x2a74	// 2a74 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2a56:	9343      	ld.w      	r2, (r3, 0xc)
+    2a58:	3101      	movi      	r1, 1
+    2a5a:	6884      	and      	r2, r1
+    2a5c:	3a40      	cmpnei      	r2, 0
+    2a5e:	0bfa      	bt      	0x2a52	// 2a52 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2a60:	9343      	ld.w      	r2, (r3, 0xc)
+    2a62:	3108      	movi      	r1, 8
+    2a64:	6884      	and      	r2, r1
+    2a66:	3a40      	cmpnei      	r2, 0
+    2a68:	0bf5      	bt      	0x2a52	// 2a52 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2a6a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a6c:	3104      	movi      	r1, 4
+    2a6e:	6884      	and      	r2, r1
+    2a70:	3a40      	cmpnei      	r2, 0
+    2a72:	0bf0      	bt      	0x2a52	// 2a52 <UART1IntHandler+0x12>
+}
+    2a74:	1463      	ipop
+    2a76:	1461      	nir
+    2a78:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00002a7c <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    2a7c:	1460      	nie
+    2a7e:	1462      	ipush
+    2a80:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a82:	107f      	lrw      	r3, 0x20000038	// 2afc <UART2IntHandler+0x80>
+    2a84:	3102      	movi      	r1, 2
+    2a86:	9360      	ld.w      	r3, (r3, 0x0)
+    2a88:	9343      	ld.w      	r2, (r3, 0xc)
+    2a8a:	6884      	and      	r2, r1
+    2a8c:	3a40      	cmpnei      	r2, 0
+    2a8e:	0c0b      	bf      	0x2aa4	// 2aa4 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    2a90:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    2a92:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    2a94:	7400      	zextb      	r0, r0
+    2a96:	e00002c5 	bsr      	0x3020	// 3020 <UART2_RecvINT_Processing>
+		//GPIO_Write_Low(GPIOB0,3);
+		
+		//GPIO_Reverse(GPIOB0,3);
+	}
+	
+}
+    2a9a:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2a9e:	1401      	addi      	r14, r14, 4
+    2aa0:	1463      	ipop
+    2aa2:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2aa4:	9323      	ld.w      	r1, (r3, 0xc)
+    2aa6:	3201      	movi      	r2, 1
+    2aa8:	6848      	and      	r1, r2
+    2aaa:	3940      	cmpnei      	r1, 0
+    2aac:	0c0d      	bf      	0x2ac6	// 2ac6 <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    2aae:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    2ab0:	1074      	lrw      	r3, 0x200000ac	// 2b00 <UART2IntHandler+0x84>
+    2ab2:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2ab4:	1074      	lrw      	r3, 0x200000b0	// 2b04 <UART2IntHandler+0x88>
+    2ab6:	9360      	ld.w      	r3, (r3, 0x0)
+    2ab8:	3b41      	cmpnei      	r3, 1
+    2aba:	0bf0      	bt      	0x2a9a	// 2a9a <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    2abc:	1053      	lrw      	r2, 0x200000b4	// 2b08 <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    2abe:	9260      	ld.w      	r3, (r2, 0x0)
+    2ac0:	2300      	addi      	r3, 1
+    2ac2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2ac4:	07eb      	br      	0x2a9a	// 2a9a <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2ac6:	9343      	ld.w      	r2, (r3, 0xc)
+    2ac8:	3108      	movi      	r1, 8
+    2aca:	6884      	and      	r2, r1
+    2acc:	3a40      	cmpnei      	r2, 0
+    2ace:	0c03      	bf      	0x2ad4	// 2ad4 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    2ad0:	b323      	st.w      	r1, (r3, 0xc)
+    2ad2:	07e4      	br      	0x2a9a	// 2a9a <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2ad4:	9343      	ld.w      	r2, (r3, 0xc)
+    2ad6:	3104      	movi      	r1, 4
+    2ad8:	6884      	and      	r2, r1
+    2ada:	3a40      	cmpnei      	r2, 0
+    2adc:	0bfa      	bt      	0x2ad0	// 2ad0 <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2ade:	3180      	movi      	r1, 128
+    2ae0:	9303      	ld.w      	r0, (r3, 0xc)
+    2ae2:	412c      	lsli      	r1, r1, 12
+    2ae4:	6804      	and      	r0, r1
+    2ae6:	3840      	cmpnei      	r0, 0
+    2ae8:	0fd9      	bf      	0x2a9a	// 2a9a <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    2aea:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    2aec:	1065      	lrw      	r3, 0x200000ac	// 2b00 <UART2IntHandler+0x84>
+    2aee:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2af0:	1065      	lrw      	r3, 0x200000b0	// 2b04 <UART2IntHandler+0x88>
+    2af2:	9360      	ld.w      	r3, (r3, 0x0)
+    2af4:	3b41      	cmpnei      	r3, 1
+    2af6:	0bd2      	bt      	0x2a9a	// 2a9a <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    2af8:	1045      	lrw      	r2, 0x200000b8	// 2b0c <UART2IntHandler+0x90>
+    2afa:	07e2      	br      	0x2abe	// 2abe <UART2IntHandler+0x42>
+    2afc:	20000038 	.long	0x20000038
+    2b00:	200000ac 	.long	0x200000ac
+    2b04:	200000b0 	.long	0x200000b0
+    2b08:	200000b4 	.long	0x200000b4
+    2b0c:	200000b8 	.long	0x200000b8
+
+Disassembly of section .text.SPI0IntHandler:
+
+00002b10 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    2b10:	1460      	nie
+    2b12:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    2b14:	1178      	lrw      	r3, 0x20000034	// 2bf4 <SPI0IntHandler+0xe4>
+    2b16:	3101      	movi      	r1, 1
+    2b18:	9360      	ld.w      	r3, (r3, 0x0)
+    2b1a:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b1c:	6884      	and      	r2, r1
+    2b1e:	3a40      	cmpnei      	r2, 0
+    2b20:	0c03      	bf      	0x2b26	// 2b26 <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    2b22:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    2b24:	0407      	br      	0x2b32	// 2b32 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    2b26:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b28:	3002      	movi      	r0, 2
+    2b2a:	6880      	and      	r2, r0
+    2b2c:	3a40      	cmpnei      	r2, 0
+    2b2e:	0c04      	bf      	0x2b36	// 2b36 <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    2b30:	b308      	st.w      	r0, (r3, 0x20)
+}
+    2b32:	1463      	ipop
+    2b34:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    2b36:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b38:	3004      	movi      	r0, 4
+    2b3a:	6880      	and      	r2, r0
+    2b3c:	3a40      	cmpnei      	r2, 0
+    2b3e:	0c55      	bf      	0x2be8	// 2be8 <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    2b40:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    2b42:	9302      	ld.w      	r0, (r3, 0x8)
+    2b44:	32aa      	movi      	r2, 170
+    2b46:	6482      	cmpne      	r0, r2
+    2b48:	083e      	bt      	0x2bc4	// 2bc4 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b4a:	3102      	movi      	r1, 2
+    2b4c:	9343      	ld.w      	r2, (r3, 0xc)
+    2b4e:	6884      	and      	r2, r1
+    2b50:	3a40      	cmpnei      	r2, 0
+    2b52:	0ffd      	bf      	0x2b4c	// 2b4c <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    2b54:	3211      	movi      	r2, 17
+    2b56:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b58:	3110      	movi      	r1, 16
+    2b5a:	9343      	ld.w      	r2, (r3, 0xc)
+    2b5c:	6884      	and      	r2, r1
+    2b5e:	3a40      	cmpnei      	r2, 0
+    2b60:	0bfd      	bt      	0x2b5a	// 2b5a <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b62:	3102      	movi      	r1, 2
+    2b64:	9343      	ld.w      	r2, (r3, 0xc)
+    2b66:	6884      	and      	r2, r1
+    2b68:	3a40      	cmpnei      	r2, 0
+    2b6a:	0ffd      	bf      	0x2b64	// 2b64 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    2b6c:	3212      	movi      	r2, 18
+    2b6e:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b70:	3110      	movi      	r1, 16
+    2b72:	9343      	ld.w      	r2, (r3, 0xc)
+    2b74:	6884      	and      	r2, r1
+    2b76:	3a40      	cmpnei      	r2, 0
+    2b78:	0bfd      	bt      	0x2b72	// 2b72 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b7a:	3102      	movi      	r1, 2
+    2b7c:	9343      	ld.w      	r2, (r3, 0xc)
+    2b7e:	6884      	and      	r2, r1
+    2b80:	3a40      	cmpnei      	r2, 0
+    2b82:	0ffd      	bf      	0x2b7c	// 2b7c <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    2b84:	3213      	movi      	r2, 19
+    2b86:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b88:	3110      	movi      	r1, 16
+    2b8a:	9343      	ld.w      	r2, (r3, 0xc)
+    2b8c:	6884      	and      	r2, r1
+    2b8e:	3a40      	cmpnei      	r2, 0
+    2b90:	0bfd      	bt      	0x2b8a	// 2b8a <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b92:	3102      	movi      	r1, 2
+    2b94:	9343      	ld.w      	r2, (r3, 0xc)
+    2b96:	6884      	and      	r2, r1
+    2b98:	3a40      	cmpnei      	r2, 0
+    2b9a:	0ffd      	bf      	0x2b94	// 2b94 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    2b9c:	3214      	movi      	r2, 20
+    2b9e:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2ba0:	3110      	movi      	r1, 16
+    2ba2:	9343      	ld.w      	r2, (r3, 0xc)
+    2ba4:	6884      	and      	r2, r1
+    2ba6:	3a40      	cmpnei      	r2, 0
+    2ba8:	0bfd      	bt      	0x2ba2	// 2ba2 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2baa:	3102      	movi      	r1, 2
+    2bac:	9343      	ld.w      	r2, (r3, 0xc)
+    2bae:	6884      	and      	r2, r1
+    2bb0:	3a40      	cmpnei      	r2, 0
+    2bb2:	0ffd      	bf      	0x2bac	// 2bac <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    2bb4:	3215      	movi      	r2, 21
+    2bb6:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2bb8:	3110      	movi      	r1, 16
+    2bba:	9343      	ld.w      	r2, (r3, 0xc)
+    2bbc:	6884      	and      	r2, r1
+    2bbe:	3a40      	cmpnei      	r2, 0
+    2bc0:	0bfd      	bt      	0x2bba	// 2bba <SPI0IntHandler+0xaa>
+    2bc2:	07b8      	br      	0x2b32	// 2b32 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    2bc4:	9343      	ld.w      	r2, (r3, 0xc)
+    2bc6:	6884      	and      	r2, r1
+    2bc8:	3a40      	cmpnei      	r2, 0
+    2bca:	0bb4      	bt      	0x2b32	// 2b32 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    2bcc:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2bce:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    2bd0:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bd2:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bd4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bd6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bd8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bda:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bdc:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2bde:	9343      	ld.w      	r2, (r3, 0xc)
+    2be0:	6884      	and      	r2, r1
+    2be2:	3a40      	cmpnei      	r2, 0
+    2be4:	0bfd      	bt      	0x2bde	// 2bde <SPI0IntHandler+0xce>
+    2be6:	07a6      	br      	0x2b32	// 2b32 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    2be8:	9347      	ld.w      	r2, (r3, 0x1c)
+    2bea:	3108      	movi      	r1, 8
+    2bec:	6884      	and      	r2, r1
+    2bee:	3a40      	cmpnei      	r2, 0
+    2bf0:	0b99      	bt      	0x2b22	// 2b22 <SPI0IntHandler+0x12>
+    2bf2:	07a0      	br      	0x2b32	// 2b32 <SPI0IntHandler+0x22>
+    2bf4:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+00002bf8 <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    2bf8:	1460      	nie
+    2bfa:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    2bfc:	1073      	lrw      	r3, 0x2000002c	// 2c48 <SIO0IntHandler+0x50>
+    2bfe:	3104      	movi      	r1, 4
+    2c00:	9360      	ld.w      	r3, (r3, 0x0)
+    2c02:	9349      	ld.w      	r2, (r3, 0x24)
+    2c04:	6884      	and      	r2, r1
+    2c06:	3a40      	cmpnei      	r2, 0
+    2c08:	0c02      	bf      	0x2c0c	// 2c0c <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    2c0a:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    2c0c:	9349      	ld.w      	r2, (r3, 0x24)
+    2c0e:	3101      	movi      	r1, 1
+    2c10:	6884      	and      	r2, r1
+    2c12:	3a40      	cmpnei      	r2, 0
+    2c14:	0c02      	bf      	0x2c18	// 2c18 <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    2c16:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    2c18:	9349      	ld.w      	r2, (r3, 0x24)
+    2c1a:	3102      	movi      	r1, 2
+    2c1c:	6884      	and      	r2, r1
+    2c1e:	3a40      	cmpnei      	r2, 0
+    2c20:	0c03      	bf      	0x2c26	// 2c26 <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    2c22:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    2c24:	0410      	br      	0x2c44	// 2c44 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    2c26:	9349      	ld.w      	r2, (r3, 0x24)
+    2c28:	3108      	movi      	r1, 8
+    2c2a:	6884      	and      	r2, r1
+    2c2c:	3a40      	cmpnei      	r2, 0
+    2c2e:	0bfa      	bt      	0x2c22	// 2c22 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    2c30:	9349      	ld.w      	r2, (r3, 0x24)
+    2c32:	3110      	movi      	r1, 16
+    2c34:	6884      	and      	r2, r1
+    2c36:	3a40      	cmpnei      	r2, 0
+    2c38:	0bf5      	bt      	0x2c22	// 2c22 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    2c3a:	9349      	ld.w      	r2, (r3, 0x24)
+    2c3c:	3120      	movi      	r1, 32
+    2c3e:	6884      	and      	r2, r1
+    2c40:	3a40      	cmpnei      	r2, 0
+    2c42:	0bf0      	bt      	0x2c22	// 2c22 <SIO0IntHandler+0x2a>
+}
+    2c44:	1463      	ipop
+    2c46:	1461      	nir
+    2c48:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00002c4c <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    2c4c:	1460      	nie
+    2c4e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    2c50:	106a      	lrw      	r3, 0x2000005c	// 2c78 <EXI0IntHandler+0x2c>
+    2c52:	3101      	movi      	r1, 1
+    2c54:	9360      	ld.w      	r3, (r3, 0x0)
+    2c56:	237f      	addi      	r3, 128
+    2c58:	934c      	ld.w      	r2, (r3, 0x30)
+    2c5a:	6884      	and      	r2, r1
+    2c5c:	3a40      	cmpnei      	r2, 0
+    2c5e:	0c04      	bf      	0x2c66	// 2c66 <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    2c60:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    2c62:	1463      	ipop
+    2c64:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    2c66:	3280      	movi      	r2, 128
+    2c68:	932c      	ld.w      	r1, (r3, 0x30)
+    2c6a:	4249      	lsli      	r2, r2, 9
+    2c6c:	6848      	and      	r1, r2
+    2c6e:	3940      	cmpnei      	r1, 0
+    2c70:	0ff9      	bf      	0x2c62	// 2c62 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    2c72:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2c74:	07f7      	br      	0x2c62	// 2c62 <EXI0IntHandler+0x16>
+    2c76:	0000      	bkpt
+    2c78:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00002c7c <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    2c7c:	1460      	nie
+    2c7e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    2c80:	106a      	lrw      	r3, 0x2000005c	// 2ca8 <EXI1IntHandler+0x2c>
+    2c82:	3102      	movi      	r1, 2
+    2c84:	9360      	ld.w      	r3, (r3, 0x0)
+    2c86:	237f      	addi      	r3, 128
+    2c88:	934c      	ld.w      	r2, (r3, 0x30)
+    2c8a:	6884      	and      	r2, r1
+    2c8c:	3a40      	cmpnei      	r2, 0
+    2c8e:	0c04      	bf      	0x2c96	// 2c96 <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    2c90:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    2c92:	1463      	ipop
+    2c94:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    2c96:	3280      	movi      	r2, 128
+    2c98:	932c      	ld.w      	r1, (r3, 0x30)
+    2c9a:	424a      	lsli      	r2, r2, 10
+    2c9c:	6848      	and      	r1, r2
+    2c9e:	3940      	cmpnei      	r1, 0
+    2ca0:	0ff9      	bf      	0x2c92	// 2c92 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    2ca2:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2ca4:	07f7      	br      	0x2c92	// 2c92 <EXI1IntHandler+0x16>
+    2ca6:	0000      	bkpt
+    2ca8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+00002cac <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    2cac:	1460      	nie
+    2cae:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    2cb0:	1070      	lrw      	r3, 0x2000005c	// 2cf0 <EXI2to3IntHandler+0x44>
+    2cb2:	3104      	movi      	r1, 4
+    2cb4:	9360      	ld.w      	r3, (r3, 0x0)
+    2cb6:	237f      	addi      	r3, 128
+    2cb8:	934c      	ld.w      	r2, (r3, 0x30)
+    2cba:	6884      	and      	r2, r1
+    2cbc:	3a40      	cmpnei      	r2, 0
+    2cbe:	0c04      	bf      	0x2cc6	// 2cc6 <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    2cc0:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    2cc2:	1463      	ipop
+    2cc4:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    2cc6:	934c      	ld.w      	r2, (r3, 0x30)
+    2cc8:	3108      	movi      	r1, 8
+    2cca:	6884      	and      	r2, r1
+    2ccc:	3a40      	cmpnei      	r2, 0
+    2cce:	0bf9      	bt      	0x2cc0	// 2cc0 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    2cd0:	3280      	movi      	r2, 128
+    2cd2:	932c      	ld.w      	r1, (r3, 0x30)
+    2cd4:	424b      	lsli      	r2, r2, 11
+    2cd6:	6848      	and      	r1, r2
+    2cd8:	3940      	cmpnei      	r1, 0
+    2cda:	0c03      	bf      	0x2ce0	// 2ce0 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    2cdc:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2cde:	07f2      	br      	0x2cc2	// 2cc2 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    2ce0:	3280      	movi      	r2, 128
+    2ce2:	932c      	ld.w      	r1, (r3, 0x30)
+    2ce4:	424c      	lsli      	r2, r2, 12
+    2ce6:	6848      	and      	r1, r2
+    2ce8:	3940      	cmpnei      	r1, 0
+    2cea:	0bf9      	bt      	0x2cdc	// 2cdc <EXI2to3IntHandler+0x30>
+    2cec:	07eb      	br      	0x2cc2	// 2cc2 <EXI2to3IntHandler+0x16>
+    2cee:	0000      	bkpt
+    2cf0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+00002cf4 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    2cf4:	1460      	nie
+    2cf6:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    2cf8:	1075      	lrw      	r3, 0x2000005c	// 2d4c <EXI4to9IntHandler+0x58>
+    2cfa:	3280      	movi      	r2, 128
+    2cfc:	9360      	ld.w      	r3, (r3, 0x0)
+    2cfe:	60c8      	addu      	r3, r2
+    2d00:	932c      	ld.w      	r1, (r3, 0x30)
+    2d02:	3010      	movi      	r0, 16
+    2d04:	6840      	and      	r1, r0
+    2d06:	3940      	cmpnei      	r1, 0
+    2d08:	0c04      	bf      	0x2d10	// 2d10 <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    2d0a:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    2d0c:	1463      	ipop
+    2d0e:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    2d10:	932c      	ld.w      	r1, (r3, 0x30)
+    2d12:	3020      	movi      	r0, 32
+    2d14:	6840      	and      	r1, r0
+    2d16:	3940      	cmpnei      	r1, 0
+    2d18:	0bf9      	bt      	0x2d0a	// 2d0a <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    2d1a:	932c      	ld.w      	r1, (r3, 0x30)
+    2d1c:	3040      	movi      	r0, 64
+    2d1e:	6840      	and      	r1, r0
+    2d20:	3940      	cmpnei      	r1, 0
+    2d22:	0bf4      	bt      	0x2d0a	// 2d0a <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    2d24:	932c      	ld.w      	r1, (r3, 0x30)
+    2d26:	6848      	and      	r1, r2
+    2d28:	3940      	cmpnei      	r1, 0
+    2d2a:	0c03      	bf      	0x2d30	// 2d30 <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    2d2c:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2d2e:	07ef      	br      	0x2d0c	// 2d0c <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    2d30:	3280      	movi      	r2, 128
+    2d32:	932c      	ld.w      	r1, (r3, 0x30)
+    2d34:	4241      	lsli      	r2, r2, 1
+    2d36:	6848      	and      	r1, r2
+    2d38:	3940      	cmpnei      	r1, 0
+    2d3a:	0bf9      	bt      	0x2d2c	// 2d2c <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    2d3c:	3280      	movi      	r2, 128
+    2d3e:	932c      	ld.w      	r1, (r3, 0x30)
+    2d40:	4242      	lsli      	r2, r2, 2
+    2d42:	6848      	and      	r1, r2
+    2d44:	3940      	cmpnei      	r1, 0
+    2d46:	0bf3      	bt      	0x2d2c	// 2d2c <EXI4to9IntHandler+0x38>
+    2d48:	07e2      	br      	0x2d0c	// 2d0c <EXI4to9IntHandler+0x18>
+    2d4a:	0000      	bkpt
+    2d4c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00002d50 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    2d50:	1460      	nie
+    2d52:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    2d54:	1076      	lrw      	r3, 0x2000005c	// 2dac <EXI10to15IntHandler+0x5c>
+    2d56:	3280      	movi      	r2, 128
+    2d58:	9360      	ld.w      	r3, (r3, 0x0)
+    2d5a:	237f      	addi      	r3, 128
+    2d5c:	932c      	ld.w      	r1, (r3, 0x30)
+    2d5e:	4243      	lsli      	r2, r2, 3
+    2d60:	6848      	and      	r1, r2
+    2d62:	3940      	cmpnei      	r1, 0
+    2d64:	0c03      	bf      	0x2d6a	// 2d6a <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    2d66:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    2d68:	041f      	br      	0x2da6	// 2da6 <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    2d6a:	3280      	movi      	r2, 128
+    2d6c:	932c      	ld.w      	r1, (r3, 0x30)
+    2d6e:	4244      	lsli      	r2, r2, 4
+    2d70:	6848      	and      	r1, r2
+    2d72:	3940      	cmpnei      	r1, 0
+    2d74:	0bf9      	bt      	0x2d66	// 2d66 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    2d76:	3280      	movi      	r2, 128
+    2d78:	932c      	ld.w      	r1, (r3, 0x30)
+    2d7a:	4245      	lsli      	r2, r2, 5
+    2d7c:	6848      	and      	r1, r2
+    2d7e:	3940      	cmpnei      	r1, 0
+    2d80:	0bf3      	bt      	0x2d66	// 2d66 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    2d82:	3280      	movi      	r2, 128
+    2d84:	932c      	ld.w      	r1, (r3, 0x30)
+    2d86:	4246      	lsli      	r2, r2, 6
+    2d88:	6848      	and      	r1, r2
+    2d8a:	3940      	cmpnei      	r1, 0
+    2d8c:	0bed      	bt      	0x2d66	// 2d66 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    2d8e:	3280      	movi      	r2, 128
+    2d90:	932c      	ld.w      	r1, (r3, 0x30)
+    2d92:	4247      	lsli      	r2, r2, 7
+    2d94:	6848      	and      	r1, r2
+    2d96:	3940      	cmpnei      	r1, 0
+    2d98:	0be7      	bt      	0x2d66	// 2d66 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    2d9a:	3280      	movi      	r2, 128
+    2d9c:	932c      	ld.w      	r1, (r3, 0x30)
+    2d9e:	4248      	lsli      	r2, r2, 8
+    2da0:	6848      	and      	r1, r2
+    2da2:	3940      	cmpnei      	r1, 0
+    2da4:	0be1      	bt      	0x2d66	// 2d66 <EXI10to15IntHandler+0x16>
+}
+    2da6:	1463      	ipop
+    2da8:	1461      	nir
+    2daa:	0000      	bkpt
+    2dac:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+00002db0 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    2db0:	1460      	nie
+    2db2:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    2db4:	106b      	lrw      	r3, 0x20000014	// 2de0 <LPTIntHandler+0x30>
+    2db6:	3101      	movi      	r1, 1
+    2db8:	9360      	ld.w      	r3, (r3, 0x0)
+    2dba:	934e      	ld.w      	r2, (r3, 0x38)
+    2dbc:	6884      	and      	r2, r1
+    2dbe:	3a40      	cmpnei      	r2, 0
+    2dc0:	0c03      	bf      	0x2dc6	// 2dc6 <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    2dc2:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    2dc4:	040b      	br      	0x2dda	// 2dda <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    2dc6:	934e      	ld.w      	r2, (r3, 0x38)
+    2dc8:	3102      	movi      	r1, 2
+    2dca:	6884      	and      	r2, r1
+    2dcc:	3a40      	cmpnei      	r2, 0
+    2dce:	0bfa      	bt      	0x2dc2	// 2dc2 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    2dd0:	934e      	ld.w      	r2, (r3, 0x38)
+    2dd2:	3104      	movi      	r1, 4
+    2dd4:	6884      	and      	r2, r1
+    2dd6:	3a40      	cmpnei      	r2, 0
+    2dd8:	0bf5      	bt      	0x2dc2	// 2dc2 <LPTIntHandler+0x12>
+}
+    2dda:	1463      	ipop
+    2ddc:	1461      	nir
+    2dde:	0000      	bkpt
+    2de0:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+00002de4 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    2de4:	1460      	nie
+    2de6:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    2de8:	1071      	lrw      	r3, 0x2000000c	// 2e2c <BT0IntHandler+0x48>
+    2dea:	3101      	movi      	r1, 1
+    2dec:	9360      	ld.w      	r3, (r3, 0x0)
+    2dee:	934c      	ld.w      	r2, (r3, 0x30)
+    2df0:	6884      	and      	r2, r1
+    2df2:	3a40      	cmpnei      	r2, 0
+    2df4:	0c0a      	bf      	0x2e08	// 2e08 <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    2df6:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    2df8:	9341      	ld.w      	r2, (r3, 0x4)
+    2dfa:	3a86      	bclri      	r2, 6
+    2dfc:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    2dfe:	9340      	ld.w      	r2, (r3, 0x0)
+    2e00:	3200      	movi      	r2, 0
+    2e02:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    2e04:	1463      	ipop
+    2e06:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    2e08:	934c      	ld.w      	r2, (r3, 0x30)
+    2e0a:	3102      	movi      	r1, 2
+    2e0c:	6884      	and      	r2, r1
+    2e0e:	3a40      	cmpnei      	r2, 0
+    2e10:	0c03      	bf      	0x2e16	// 2e16 <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    2e12:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    2e14:	07f8      	br      	0x2e04	// 2e04 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    2e16:	934c      	ld.w      	r2, (r3, 0x30)
+    2e18:	3104      	movi      	r1, 4
+    2e1a:	6884      	and      	r2, r1
+    2e1c:	3a40      	cmpnei      	r2, 0
+    2e1e:	0bfa      	bt      	0x2e12	// 2e12 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    2e20:	934c      	ld.w      	r2, (r3, 0x30)
+    2e22:	3108      	movi      	r1, 8
+    2e24:	6884      	and      	r2, r1
+    2e26:	3a40      	cmpnei      	r2, 0
+    2e28:	0bf5      	bt      	0x2e12	// 2e12 <BT0IntHandler+0x2e>
+    2e2a:	07ed      	br      	0x2e04	// 2e04 <BT0IntHandler+0x20>
+    2e2c:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00002e30 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    2e30:	1460      	nie
+    2e32:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    2e34:	1076      	lrw      	r3, 0x20000008	// 2e8c <BT1IntHandler+0x5c>
+    2e36:	3101      	movi      	r1, 1
+    2e38:	9360      	ld.w      	r3, (r3, 0x0)
+    2e3a:	934c      	ld.w      	r2, (r3, 0x30)
+    2e3c:	6884      	and      	r2, r1
+    2e3e:	3a40      	cmpnei      	r2, 0
+    2e40:	0c03      	bf      	0x2e46	// 2e46 <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    2e42:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    2e44:	0416      	br      	0x2e70	// 2e70 <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    2e46:	934c      	ld.w      	r2, (r3, 0x30)
+    2e48:	3102      	movi      	r1, 2
+    2e4a:	6884      	and      	r2, r1
+    2e4c:	3a40      	cmpnei      	r2, 0
+    2e4e:	0c13      	bf      	0x2e74	// 2e74 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    2e50:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    2e52:	1070      	lrw      	r3, 0x200000a0	// 2e90 <BT1IntHandler+0x60>
+    2e54:	8340      	ld.b      	r2, (r3, 0x0)
+    2e56:	2200      	addi      	r2, 1
+    2e58:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    2e5a:	9321      	ld.w      	r1, (r3, 0x4)
+    2e5c:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    2e5e:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    2e60:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    2e62:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    2e64:	0c06      	bf      	0x2e70	// 2e70 <BT1IntHandler+0x40>
+			NUM = 0;
+    2e66:	3200      	movi      	r2, 0
+    2e68:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    2e6a:	9342      	ld.w      	r2, (r3, 0x8)
+    2e6c:	2200      	addi      	r2, 1
+    2e6e:	b342      	st.w      	r2, (r3, 0x8)
+}
+    2e70:	1463      	ipop
+    2e72:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    2e74:	934c      	ld.w      	r2, (r3, 0x30)
+    2e76:	3104      	movi      	r1, 4
+    2e78:	6884      	and      	r2, r1
+    2e7a:	3a40      	cmpnei      	r2, 0
+    2e7c:	0be3      	bt      	0x2e42	// 2e42 <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    2e7e:	934c      	ld.w      	r2, (r3, 0x30)
+    2e80:	3108      	movi      	r1, 8
+    2e82:	6884      	and      	r2, r1
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	0bde      	bt      	0x2e42	// 2e42 <BT1IntHandler+0x12>
+    2e88:	07f4      	br      	0x2e70	// 2e70 <BT1IntHandler+0x40>
+    2e8a:	0000      	bkpt
+    2e8c:	20000008 	.long	0x20000008
+    2e90:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00002e94 <PriviledgeVioHandler>:
+    2e94:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00002e96 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    2e96:	1460      	nie
+    2e98:	1462      	ipush
+    // ISR content ...
+
+}
+    2e9a:	1463      	ipop
+    2e9c:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+00002e9e <Trap3Handler>:
+    2e9e:	1460      	nie
+    2ea0:	1462      	ipush
+    2ea2:	1463      	ipop
+    2ea4:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+00002ea6 <Trap2Handler>:
+    2ea6:	1460      	nie
+    2ea8:	1462      	ipush
+    2eaa:	1463      	ipop
+    2eac:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+00002eae <Trap1Handler>:
+    2eae:	1460      	nie
+    2eb0:	1462      	ipush
+    2eb2:	1463      	ipop
+    2eb4:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+00002eb6 <Trap0Handler>:
+    2eb6:	1460      	nie
+    2eb8:	1462      	ipush
+    2eba:	1463      	ipop
+    2ebc:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+00002ebe <UnrecExecpHandler>:
+    2ebe:	1460      	nie
+    2ec0:	1462      	ipush
+    2ec2:	1463      	ipop
+    2ec4:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+00002ec6 <BreakPointHandler>:
+    2ec6:	1460      	nie
+    2ec8:	1462      	ipush
+    2eca:	1463      	ipop
+    2ecc:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+00002ece <AccessErrHandler>:
+    2ece:	1460      	nie
+    2ed0:	1462      	ipush
+    2ed2:	1463      	ipop
+    2ed4:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+00002ed6 <IllegalInstrHandler>:
+    2ed6:	1460      	nie
+    2ed8:	1462      	ipush
+    2eda:	1463      	ipop
+    2edc:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+00002ede <MisalignedHandler>:
+    2ede:	1460      	nie
+    2ee0:	1462      	ipush
+    2ee2:	1463      	ipop
+    2ee4:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+00002ee6 <CNTAIntHandler>:
+    2ee6:	1460      	nie
+    2ee8:	1462      	ipush
+    2eea:	1463      	ipop
+    2eec:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+00002eee <I2CIntHandler>:
+    2eee:	1460      	nie
+    2ef0:	1462      	ipush
+    2ef2:	1463      	ipop
+    2ef4:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+00002ef8 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    2ef8:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    2efa:	c0006023 	mfcr      	r3, cr<0, 0>
+    2efe:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    2f02:	1046      	lrw      	r2, 0x20000000	// 2f18 <__divsi3+0x20>
+    2f04:	3400      	movi      	r4, 0
+    2f06:	9240      	ld.w      	r2, (r2, 0x0)
+    2f08:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    2f0a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    2f0c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    2f0e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    2f10:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    2f14:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    2f16:	1481      	pop      	r4
+    2f18:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00002f1c <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    2f1c:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    2f1e:	c0006023 	mfcr      	r3, cr<0, 0>
+    2f22:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    2f26:	1046      	lrw      	r2, 0x20000000	// 2f3c <__udivsi3+0x20>
+    2f28:	3401      	movi      	r4, 1
+    2f2a:	9240      	ld.w      	r2, (r2, 0x0)
+    2f2c:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    2f2e:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    2f30:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    2f32:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    2f34:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    2f38:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    2f3a:	1481      	pop      	r4
+    2f3c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00002f40 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    2f40:	c1807420 	psrset      	ee, ie
+}
+    2f44:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00002f48 <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    2f48:	14d1      	push      	r4, r15
+	switch(uart_id){
+    2f4a:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    2f4c:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    2f4e:	0c1a      	bf      	0x2f82	// 2f82 <UARTx_Init+0x3a>
+    2f50:	3840      	cmpnei      	r0, 0
+    2f52:	0c04      	bf      	0x2f5a	// 2f5a <UARTx_Init+0x12>
+    2f54:	3842      	cmpnei      	r0, 2
+    2f56:	0c2a      	bf      	0x2faa	// 2faa <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    2f58:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    2f5a:	e3fff90f 	bsr      	0x2178	// 2178 <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    2f5e:	118a      	lrw      	r4, 0x20000040	// 3004 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    2f60:	3100      	movi      	r1, 0
+    2f62:	3000      	movi      	r0, 0
+    2f64:	e3fff94a 	bsr      	0x21f8	// 21f8 <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    2f68:	9400      	ld.w      	r0, (r4, 0x0)
+    2f6a:	3200      	movi      	r2, 0
+    2f6c:	1127      	lrw      	r1, 0x2710	// 3008 <UARTx_Init+0xc0>
+    2f6e:	e3fff9bb 	bsr      	0x22e4	// 22e4 <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    2f72:	9400      	ld.w      	r0, (r4, 0x0)
+    2f74:	3200      	movi      	r2, 0
+    2f76:	1125      	lrw      	r1, 0x2710	// 3008 <UARTx_Init+0xc0>
+    2f78:	e3fff9be 	bsr      	0x22f4	// 22f4 <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    2f7c:	e3fff922 	bsr      	0x21c0	// 21c0 <UART0_Int_Enable>
+			break;
+    2f80:	07ec      	br      	0x2f58	// 2f58 <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    2f82:	e3fff907 	bsr      	0x2190	// 2190 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    2f86:	3102      	movi      	r1, 2
+    2f88:	3001      	movi      	r0, 1
+    2f8a:	e3fff937 	bsr      	0x21f8	// 21f8 <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    2f8e:	1180      	lrw      	r4, 0x2000003c	// 300c <UARTx_Init+0xc4>
+    2f90:	31d0      	movi      	r1, 208
+    2f92:	9400      	ld.w      	r0, (r4, 0x0)
+    2f94:	3200      	movi      	r2, 0
+    2f96:	4121      	lsli      	r1, r1, 1
+    2f98:	e3fff9a6 	bsr      	0x22e4	// 22e4 <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    2f9c:	31d0      	movi      	r1, 208
+    2f9e:	9400      	ld.w      	r0, (r4, 0x0)
+    2fa0:	3200      	movi      	r2, 0
+    2fa2:	4121      	lsli      	r1, r1, 1
+    2fa4:	e3fff9a8 	bsr      	0x22f4	// 22f4 <UARTInitRxTxIntEn>
+			break;
+    2fa8:	07d8      	br      	0x2f58	// 2f58 <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    2faa:	e3fff8ff 	bsr      	0x21a8	// 21a8 <UART2_DeInit>
+			UART_IO_Init(IO_UART2,0);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    2fae:	3100      	movi      	r1, 0
+    2fb0:	3002      	movi      	r0, 2
+    2fb2:	e3fff923 	bsr      	0x21f8	// 21f8 <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    2fb6:	1077      	lrw      	r3, 0x20000038	// 3010 <UARTx_Init+0xc8>
+    2fb8:	31d0      	movi      	r1, 208
+    2fba:	9300      	ld.w      	r0, (r3, 0x0)
+    2fbc:	3200      	movi      	r2, 0
+    2fbe:	4121      	lsli      	r1, r1, 1
+    2fc0:	e3fff99a 	bsr      	0x22f4	// 22f4 <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    2fc4:	e3fff90c 	bsr      	0x21dc	// 21dc <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    2fc8:	3273      	movi      	r2, 115
+    2fca:	3100      	movi      	r1, 0
+    2fcc:	1012      	lrw      	r0, 0x20000184	// 3014 <UARTx_Init+0xcc>
+    2fce:	e3fff4cb 	bsr      	0x1964	// 1964 <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    2fd2:	1072      	lrw      	r3, 0x200001eb	// 3018 <UARTx_Init+0xd0>
+    2fd4:	3203      	movi      	r2, 3
+    2fd6:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    2fd8:	4c48      	lsri      	r2, r4, 8
+    2fda:	a388      	st.b      	r4, (r3, 0x8)
+    2fdc:	a349      	st.b      	r2, (r3, 0x9)
+    2fde:	4c50      	lsri      	r2, r4, 16
+    2fe0:	4c98      	lsri      	r4, r4, 24
+    2fe2:	a38b      	st.b      	r4, (r3, 0xb)
+    2fe4:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    2fe6:	3103      	movi      	r1, 3
+    2fe8:	108d      	lrw      	r4, 0x20000048	// 301c <UARTx_Init+0xd4>
+    2fea:	3200      	movi      	r2, 0
+    2fec:	9400      	ld.w      	r0, (r4, 0x0)
+    2fee:	e3fff6cd 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    2ff2:	9400      	ld.w      	r0, (r4, 0x0)
+    2ff4:	3103      	movi      	r1, 3
+    2ff6:	e3fff743 	bsr      	0x1e7c	// 1e7c <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    2ffa:	9400      	ld.w      	r0, (r4, 0x0)
+    2ffc:	3103      	movi      	r1, 3
+    2ffe:	e3fff74a 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+}
+    3002:	07ab      	br      	0x2f58	// 2f58 <UARTx_Init+0x10>
+    3004:	20000040 	.long	0x20000040
+    3008:	00002710 	.long	0x00002710
+    300c:	2000003c 	.long	0x2000003c
+    3010:	20000038 	.long	0x20000038
+    3014:	20000184 	.long	0x20000184
+    3018:	200001eb 	.long	0x200001eb
+    301c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+00003020 <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    3020:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    3022:	1075      	lrw      	r3, 0x200001e4	// 3074 <UART2_RecvINT_Processing+0x54>
+    3024:	8346      	ld.b      	r2, (r3, 0x6)
+    3026:	8325      	ld.b      	r1, (r3, 0x5)
+    3028:	4248      	lsli      	r2, r2, 8
+    302a:	6c84      	or      	r2, r1
+    302c:	3162      	movi      	r1, 98
+    302e:	10b3      	lrw      	r5, 0x20000184	// 3078 <UART2_RecvINT_Processing+0x58>
+    3030:	3440      	movi      	r4, 64
+    3032:	6485      	cmplt      	r1, r2
+    3034:	6114      	addu      	r4, r5
+    3036:	0c06      	bf      	0x3042	// 3042 <UART2_RecvINT_Processing+0x22>
+    3038:	3225      	movi      	r2, 37
+    303a:	6090      	addu      	r2, r4
+    303c:	3100      	movi      	r1, 0
+    303e:	a220      	st.b      	r1, (r2, 0x0)
+    3040:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    3042:	8346      	ld.b      	r2, (r3, 0x6)
+    3044:	8325      	ld.b      	r1, (r3, 0x5)
+    3046:	4248      	lsli      	r2, r2, 8
+    3048:	6c84      	or      	r2, r1
+    304a:	5a22      	addi      	r1, r2, 1
+    304c:	6094      	addu      	r2, r5
+    304e:	a200      	st.b      	r0, (r2, 0x0)
+    3050:	2424      	addi      	r4, 37
+    3052:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    3054:	104a      	lrw      	r2, 0x200000a8	// 307c <UART2_RecvINT_Processing+0x5c>
+    3056:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    3058:	a420      	st.b      	r1, (r4, 0x0)
+    305a:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    305c:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    305e:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    3060:	1028      	lrw      	r1, 0x200001ef	// 3080 <UART2_RecvINT_Processing+0x60>
+    3062:	a140      	st.b      	r2, (r1, 0x0)
+    3064:	a101      	st.b      	r0, (r1, 0x1)
+    3066:	4a10      	lsri      	r0, r2, 16
+    3068:	4a58      	lsri      	r2, r2, 24
+    306a:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    306c:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    306e:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    3070:	a344      	st.b      	r2, (r3, 0x4)
+}
+    3072:	1482      	pop      	r4-r5
+    3074:	200001e4 	.long	0x200001e4
+    3078:	20000184 	.long	0x20000184
+    307c:	200000a8 	.long	0x200000a8
+    3080:	200001ef 	.long	0x200001ef
+
+Disassembly of section .text.Dbg_Println:
+
+00003084 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    3084:	1423      	subi      	r14, r14, 12
+    3086:	b862      	st.w      	r3, (r14, 0x8)
+    3088:	b841      	st.w      	r2, (r14, 0x4)
+    308a:	b820      	st.w      	r1, (r14, 0x0)
+		
+		
+    }
+
+#endif	
+}
+    308c:	1403      	addi      	r14, r14, 12
+    308e:	783c      	jmp      	r15
+
+Disassembly of section .text.RC522_Delay:
+
+00003090 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    3090:	3300      	movi      	r3, 0
+    3092:	640e      	cmpne      	r3, r0
+    3094:	0802      	bt      	0x3098	// 3098 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    3096:	783c      	jmp      	r15
+        nop;
+    3098:	6c03      	mov      	r0, r0
+        nop;
+    309a:	6c03      	mov      	r0, r0
+        nop;
+    309c:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    309e:	2300      	addi      	r3, 1
+    30a0:	07f9      	br      	0x3092	// 3092 <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+000030a4 <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    30a4:	14d4      	push      	r4-r7, r15
+    30a6:	6d83      	mov      	r6, r0
+    30a8:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    30aa:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    30ac:	10f2      	lrw      	r7, 0x2000004c	// 30f4 <RC522_ReadWriteOneByte+0x50>
+    30ae:	3109      	movi      	r1, 9
+    30b0:	9700      	ld.w      	r0, (r7, 0x0)
+    30b2:	e3fff6f0 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    30b6:	74da      	sextb      	r3, r6
+    30b8:	3bdf      	btsti      	r3, 31
+    30ba:	310a      	movi      	r1, 10
+    30bc:	9700      	ld.w      	r0, (r7, 0x0)
+    30be:	0c18      	bf      	0x30ee	// 30ee <RC522_ReadWriteOneByte+0x4a>
+    30c0:	e3fff6e5 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    30c4:	3109      	movi      	r1, 9
+    30c6:	9700      	ld.w      	r0, (r7, 0x0)
+    30c8:	e3fff6e1 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    30cc:	310b      	movi      	r1, 11
+    30ce:	9700      	ld.w      	r0, (r7, 0x0)
+    30d0:	e3fff6e5 	bsr      	0x1e9a	// 1e9a <GPIO_Read_Status>
+        tx_data<<=1;
+    30d4:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    30d6:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    30d8:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    30da:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    30dc:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    30de:	0c02      	bf      	0x30e2	// 30e2 <RC522_ReadWriteOneByte+0x3e>
+    30e0:	3ca0      	bseti      	r4, 0
+    30e2:	2d00      	subi      	r5, 1
+    30e4:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    30e6:	3d40      	cmpnei      	r5, 0
+    30e8:	0be3      	bt      	0x30ae	// 30ae <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    30ea:	6c13      	mov      	r0, r4
+    30ec:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    30ee:	e3fff6d2 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    30f2:	07e9      	br      	0x30c4	// 30c4 <RC522_ReadWriteOneByte+0x20>
+    30f4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+000030f8 <RC522_ReadRawRC>:
+{
+    30f8:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    30fa:	10ad      	lrw      	r5, 0x20000048	// 312c <RC522_ReadRawRC+0x34>
+    30fc:	3105      	movi      	r1, 5
+{
+    30fe:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    3100:	9500      	ld.w      	r0, (r5, 0x0)
+    3102:	e3fff6c8 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    3106:	4401      	lsli      	r0, r4, 1
+    3108:	347e      	movi      	r4, 126
+    310a:	6810      	and      	r0, r4
+    310c:	3400      	movi      	r4, 0
+    310e:	2c7f      	subi      	r4, 128
+    3110:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    3112:	7400      	zextb      	r0, r0
+    3114:	e3ffffc8 	bsr      	0x30a4	// 30a4 <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    3118:	3000      	movi      	r0, 0
+    311a:	e3ffffc5 	bsr      	0x30a4	// 30a4 <RC522_ReadWriteOneByte>
+    311e:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    3120:	3105      	movi      	r1, 5
+    3122:	9500      	ld.w      	r0, (r5, 0x0)
+    3124:	e3fff6b3 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+}
+    3128:	6c13      	mov      	r0, r4
+    312a:	1492      	pop      	r4-r5, r15
+    312c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+00003130 <RC522_WriteRawRC>:
+{
+    3130:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    3132:	10ab      	lrw      	r5, 0x20000048	// 315c <RC522_WriteRawRC+0x2c>
+{
+    3134:	6d87      	mov      	r6, r1
+    3136:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    3138:	3105      	movi      	r1, 5
+    313a:	9500      	ld.w      	r0, (r5, 0x0)
+    313c:	e3fff6ab 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    3140:	4481      	lsli      	r4, r4, 1
+    3142:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    3144:	6810      	and      	r0, r4
+    3146:	e3ffffaf 	bsr      	0x30a4	// 30a4 <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    314a:	6c1b      	mov      	r0, r6
+    314c:	e3ffffac 	bsr      	0x30a4	// 30a4 <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    3150:	9500      	ld.w      	r0, (r5, 0x0)
+    3152:	3105      	movi      	r1, 5
+    3154:	e3fff69b 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+}
+    3158:	1493      	pop      	r4-r6, r15
+    315a:	0000      	bkpt
+    315c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_PcdReset:
+
+00003160 <RC522_PcdReset>:
+{
+    3160:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    3162:	310f      	movi      	r1, 15
+    3164:	3001      	movi      	r0, 1
+    3166:	e3ffffe5 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    316a:	310f      	movi      	r1, 15
+    316c:	3001      	movi      	r0, 1
+    316e:	e3ffffe1 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    3172:	300a      	movi      	r0, 10
+    3174:	e3ffff8e 	bsr      	0x3090	// 3090 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    3178:	313d      	movi      	r1, 61
+    317a:	3011      	movi      	r0, 17
+    317c:	e3ffffda 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    3180:	311e      	movi      	r1, 30
+    3182:	302d      	movi      	r0, 45
+    3184:	e3ffffd6 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    3188:	3100      	movi      	r1, 0
+    318a:	302c      	movi      	r0, 44
+    318c:	e3ffffd2 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    3190:	318d      	movi      	r1, 141
+    3192:	302a      	movi      	r0, 42
+    3194:	e3ffffce 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    3198:	313e      	movi      	r1, 62
+    319a:	302b      	movi      	r0, 43
+    319c:	e3ffffca 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    31a0:	3140      	movi      	r1, 64
+    31a2:	3015      	movi      	r0, 21
+    31a4:	e3ffffc6 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+}
+    31a8:	3000      	movi      	r0, 0
+    31aa:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+000031ac <RC522_SetBitMask>:
+{
+    31ac:	14d2      	push      	r4-r5, r15
+    31ae:	6d47      	mov      	r5, r1
+    31b0:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    31b2:	e3ffffa3 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    31b6:	6c43      	mov      	r1, r0
+    31b8:	6c54      	or      	r1, r5
+    31ba:	7444      	zextb      	r1, r1
+    31bc:	6c13      	mov      	r0, r4
+    31be:	e3ffffb9 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+}
+    31c2:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+000031c4 <RC522_PcdAntennaOn>:
+{
+    31c4:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    31c6:	3014      	movi      	r0, 20
+    31c8:	e3ffff98 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    31cc:	3303      	movi      	r3, 3
+    31ce:	680c      	and      	r0, r3
+    31d0:	3840      	cmpnei      	r0, 0
+    31d2:	0805      	bt      	0x31dc	// 31dc <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    31d4:	3103      	movi      	r1, 3
+    31d6:	3014      	movi      	r0, 20
+    31d8:	e3ffffea 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+}
+    31dc:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000031de <RC522_ClearBitMask>:
+{
+    31de:	14d2      	push      	r4-r5, r15
+    31e0:	6d47      	mov      	r5, r1
+    31e2:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    31e4:	e3ffff8a 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    31e8:	6815      	andn      	r0, r5
+    31ea:	7440      	zextb      	r1, r0
+    31ec:	6c13      	mov      	r0, r4
+    31ee:	e3ffffa1 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+}
+    31f2:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+000031f4 <RC522_PcdAntennaOff>:
+{
+    31f4:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    31f6:	3103      	movi      	r1, 3
+    31f8:	3014      	movi      	r0, 20
+    31fa:	e3fffff2 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+}
+    31fe:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_CalulateCRC:
+
+00003200 <RC522_CalulateCRC>:
+{
+    3200:	14d3      	push      	r4-r6, r15
+    3202:	6d03      	mov      	r4, r0
+    3204:	6d87      	mov      	r6, r1
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    3206:	3005      	movi      	r0, 5
+    3208:	3104      	movi      	r1, 4
+{
+    320a:	6d4b      	mov      	r5, r2
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    320c:	e3ffffe9 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    3210:	3100      	movi      	r1, 0
+    3212:	3001      	movi      	r0, 1
+    3214:	e3ffff8e 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80); //清FIFO指针
+    3218:	3180      	movi      	r1, 128
+    321a:	300a      	movi      	r0, 10
+    321c:	e3ffffc8 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+    3220:	6190      	addu      	r6, r4
+    for(i=0;i<len;i++)
+    3222:	6592      	cmpne      	r4, r6
+    3224:	081b      	bt      	0x325a	// 325a <RC522_CalulateCRC+0x5a>
+        RC522_WriteRawRC(CommandReg,PCD_CALCCRC);   //等待CRC计算完成
+    3226:	3103      	movi      	r1, 3
+    3228:	3001      	movi      	r0, 1
+    322a:	e3ffff83 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    322e:	34ff      	movi      	r4, 255
+    3230:	2c00      	subi      	r4, 1
+        n=RC522_ReadRawRC(DivIrqReg);
+    3232:	3005      	movi      	r0, 5
+    3234:	7510      	zextb      	r4, r4
+    3236:	e3ffff61 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    while((i!=0)&&!(n&0x04));//CRCIrq = 1
+    323a:	3c40      	cmpnei      	r4, 0
+    323c:	0c06      	bf      	0x3248	// 3248 <RC522_CalulateCRC+0x48>
+    323e:	3304      	movi      	r3, 4
+    3240:	680c      	and      	r0, r3
+    3242:	7400      	zextb      	r0, r0
+    3244:	3840      	cmpnei      	r0, 0
+    3246:	0ff5      	bf      	0x3230	// 3230 <RC522_CalulateCRC+0x30>
+    pOut[0]=RC522_ReadRawRC(CRCResultRegL);
+    3248:	3022      	movi      	r0, 34
+    324a:	e3ffff57 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    324e:	a500      	st.b      	r0, (r5, 0x0)
+    pOut[1]=RC522_ReadRawRC(CRCResultRegM);
+    3250:	3021      	movi      	r0, 33
+    3252:	e3ffff53 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    3256:	a501      	st.b      	r0, (r5, 0x1)
+}
+    3258:	1493      	pop      	r4-r6, r15
+            RC522_WriteRawRC(FIFODataReg,*(pIn +i));  //开始RCR计算
+    325a:	8420      	ld.b      	r1, (r4, 0x0)
+    325c:	3009      	movi      	r0, 9
+    325e:	e3ffff69 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    3262:	2400      	addi      	r4, 1
+    3264:	07df      	br      	0x3222	// 3222 <RC522_CalulateCRC+0x22>
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+00003266 <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    3266:	14d0      	push      	r15
+        RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    3268:	3108      	movi      	r1, 8
+    326a:	3008      	movi      	r0, 8
+    326c:	e3ffffb9 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+        RC522_WriteRawRC(ModeReg,0x3D);          //3F//CRC初始值0x6363
+    3270:	313d      	movi      	r1, 61
+    3272:	3011      	movi      	r0, 17
+    3274:	e3ffff5e 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RxSelReg,0x86);         //84
+    3278:	3186      	movi      	r1, 134
+    327a:	3017      	movi      	r0, 23
+    327c:	e3ffff5a 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RFCfgReg,0x7F);         //4F  //调整卡的感应距离//RxGain = 48dB调节卡感应距离
+    3280:	317f      	movi      	r1, 127
+    3282:	3026      	movi      	r0, 38
+    3284:	e3ffff56 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegL,30);        //tmoLength);// TReloadVal = 'h6a =tmoLength(dec)
+    3288:	311e      	movi      	r1, 30
+    328a:	302d      	movi      	r0, 45
+    328c:	e3ffff52 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegH,0);
+    3290:	3100      	movi      	r1, 0
+    3292:	302c      	movi      	r0, 44
+    3294:	e3ffff4e 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TModeReg,0x8D);
+    3298:	318d      	movi      	r1, 141
+    329a:	302a      	movi      	r0, 42
+    329c:	e3ffff4a 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TPrescalerReg,0x3E);
+    32a0:	313e      	movi      	r1, 62
+    32a2:	302b      	movi      	r0, 43
+    32a4:	e3ffff46 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+        RC522_Delay(1000);
+    32a8:	30fa      	movi      	r0, 250
+    32aa:	4002      	lsli      	r0, r0, 2
+    32ac:	e3fffef2 	bsr      	0x3090	// 3090 <RC522_Delay>
+        RC522_PcdAntennaOn();      //开启天线
+    32b0:	e3ffff8a 	bsr      	0x31c4	// 31c4 <RC522_PcdAntennaOn>
+}
+    32b4:	3000      	movi      	r0, 0
+    32b6:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+000032b8 <RC522_Init>:
+{
+    32b8:	14d1      	push      	r4, r15
+	nop;
+    32ba:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    32bc:	1184      	lrw      	r4, 0x2000004c	// 334c <RC522_Init+0x94>
+    32be:	3200      	movi      	r2, 0
+    32c0:	9400      	ld.w      	r0, (r4, 0x0)
+    32c2:	3109      	movi      	r1, 9
+    32c4:	e3fff562 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    32c8:	3200      	movi      	r2, 0
+    32ca:	9400      	ld.w      	r0, (r4, 0x0)
+    32cc:	310a      	movi      	r1, 10
+    32ce:	e3fff55d 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    32d2:	9400      	ld.w      	r0, (r4, 0x0)
+    32d4:	310b      	movi      	r1, 11
+    32d6:	e3fff5c9 	bsr      	0x1e68	// 1e68 <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    32da:	9400      	ld.w      	r0, (r4, 0x0)
+    32dc:	3201      	movi      	r2, 1
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    32de:	109d      	lrw      	r4, 0x20000048	// 3350 <RC522_Init+0x98>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    32e0:	310b      	movi      	r1, 11
+    32e2:	e3fff553 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    32e6:	9400      	ld.w      	r0, (r4, 0x0)
+    32e8:	3200      	movi      	r2, 0
+    32ea:	3105      	movi      	r1, 5
+    32ec:	e3fff54e 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+    GPIO_Init(GPIOB0,4,Output);			//RST
+    32f0:	9400      	ld.w      	r0, (r4, 0x0)
+    32f2:	3200      	movi      	r2, 0
+    32f4:	3104      	movi      	r1, 4
+    32f6:	e3fff549 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOB0,3,Intput);			//IRQ
+    32fa:	3201      	movi      	r2, 1
+    32fc:	9400      	ld.w      	r0, (r4, 0x0)
+    32fe:	3103      	movi      	r1, 3
+    3300:	e3fff544 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_High(GPIOB0,5);
+    3304:	9400      	ld.w      	r0, (r4, 0x0)
+    3306:	3105      	movi      	r1, 5
+    3308:	e3fff5c1 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    GPIO_Write_High(GPIOB0,4);
+    330c:	3104      	movi      	r1, 4
+    330e:	9400      	ld.w      	r0, (r4, 0x0)
+    3310:	e3fff5bd 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    3314:	e3ffff26 	bsr      	0x3160	// 3160 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    3318:	e3ffff6e 	bsr      	0x31f4	// 31f4 <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    331c:	3002      	movi      	r0, 2
+    331e:	e3fffeb9 	bsr      	0x3090	// 3090 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    3322:	e3ffff51 	bsr      	0x31c4	// 31c4 <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    3326:	108c      	lrw      	r4, 0x200001f7	// 3354 <RC522_Init+0x9c>
+    3328:	e3ffff9f 	bsr      	0x3266	// 3266 <M500PcdConfigISOType.part.1>
+    332c:	3228      	movi      	r2, 40
+    332e:	3100      	movi      	r1, 0
+    3330:	6c13      	mov      	r0, r4
+    3332:	e3fff319 	bsr      	0x1964	// 1964 <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    3336:	3318      	movi      	r3, 24
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    3338:	6c13      	mov      	r0, r4
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    333a:	a468      	st.b      	r3, (r4, 0x8)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    333c:	3206      	movi      	r2, 6
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    333e:	3360      	movi      	r3, 96
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    3340:	31ff      	movi      	r1, 255
+    3342:	201f      	addi      	r0, 32
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    3344:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    3346:	e3fff30f 	bsr      	0x1964	// 1964 <__memset_fast>
+}
+    334a:	1491      	pop      	r4, r15
+    334c:	2000004c 	.long	0x2000004c
+    3350:	20000048 	.long	0x20000048
+    3354:	200001f7 	.long	0x200001f7
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+00003358 <RC522_PcdComMF522>:
+{
+    3358:	14d4      	push      	r4-r7, r15
+    335a:	1424      	subi      	r14, r14, 16
+    335c:	b861      	st.w      	r3, (r14, 0x4)
+    switch (Command) {
+    335e:	384c      	cmpnei      	r0, 12
+{
+    3360:	9869      	ld.w      	r3, (r14, 0x24)
+    3362:	6d43      	mov      	r5, r0
+    3364:	6dc7      	mov      	r7, r1
+    3366:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    3368:	0c4c      	bf      	0x3400	// 3400 <RC522_PcdComMF522+0xa8>
+    336a:	384e      	cmpnei      	r0, 14
+    336c:	0c4d      	bf      	0x3406	// 3406 <RC522_PcdComMF522+0xae>
+    U8_T waitFor=0x00;
+    336e:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    3370:	3400      	movi      	r4, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    3372:	6c53      	mov      	r1, r4
+    3374:	39a7      	bseti      	r1, 7
+    3376:	3002      	movi      	r0, 2
+    3378:	b842      	st.w      	r2, (r14, 0x8)
+    337a:	e3fffedb 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    337e:	3180      	movi      	r1, 128
+    3380:	3004      	movi      	r0, 4
+    3382:	e3ffff2e 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    3386:	3100      	movi      	r1, 0
+    3388:	3001      	movi      	r0, 1
+    338a:	e3fffed3 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    338e:	3180      	movi      	r1, 128
+    3390:	300a      	movi      	r0, 10
+    3392:	e3ffff0d 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    3396:	9842      	ld.w      	r2, (r14, 0x8)
+    3398:	6cdf      	mov      	r3, r7
+    339a:	7489      	zexth      	r2, r2
+    339c:	3700      	movi      	r7, 0
+    339e:	649c      	cmphs      	r7, r2
+    33a0:	0c36      	bf      	0x340c	// 340c <RC522_PcdComMF522+0xb4>
+	RC522_WriteRawRC(CommandReg,Command);
+    33a2:	6c57      	mov      	r1, r5
+    33a4:	3001      	movi      	r0, 1
+    33a6:	e3fffec5 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    33aa:	3d4c      	cmpnei      	r5, 12
+    33ac:	0805      	bt      	0x33b6	// 33b6 <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    33ae:	3180      	movi      	r1, 128
+    33b0:	300d      	movi      	r0, 13
+    33b2:	e3fffefd 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    33b6:	33fa      	movi      	r3, 250
+    33b8:	4363      	lsli      	r3, r3, 3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    33ba:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    33bc:	3004      	movi      	r0, 4
+    33be:	b862      	st.w      	r3, (r14, 0x8)
+    33c0:	e3fffe9c 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+		i--;
+    33c4:	9862      	ld.w      	r3, (r14, 0x8)
+    33c6:	2b00      	subi      	r3, 1
+    33c8:	74cd      	zexth      	r3, r3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    33ca:	3b40      	cmpnei      	r3, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    33cc:	6dc3      	mov      	r7, r0
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    33ce:	0c05      	bf      	0x33d8	// 33d8 <RC522_PcdComMF522+0x80>
+    33d0:	6c83      	mov      	r2, r0
+    33d2:	6898      	and      	r2, r6
+    33d4:	3a40      	cmpnei      	r2, 0
+    33d6:	0ff3      	bf      	0x33bc	// 33bc <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    33d8:	3180      	movi      	r1, 128
+    33da:	300d      	movi      	r0, 13
+    33dc:	b862      	st.w      	r3, (r14, 0x8)
+    33de:	e3ffff00 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+	if(i!=0)
+    33e2:	9862      	ld.w      	r3, (r14, 0x8)
+    33e4:	3b40      	cmpnei      	r3, 0
+    33e6:	081f      	bt      	0x3424	// 3424 <RC522_PcdComMF522+0xcc>
+    char stats=MI_ERR;
+    33e8:	3702      	movi      	r7, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    33ea:	3180      	movi      	r1, 128
+    33ec:	300c      	movi      	r0, 12
+    33ee:	e3fffedf 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    33f2:	3100      	movi      	r1, 0
+    33f4:	3001      	movi      	r0, 1
+    33f6:	e3fffe9d 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+}
+    33fa:	6c1f      	mov      	r0, r7
+    33fc:	1404      	addi      	r14, r14, 16
+    33fe:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    3400:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    3402:	3477      	movi      	r4, 119
+        break;
+    3404:	07b7      	br      	0x3372	// 3372 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    3406:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    3408:	3412      	movi      	r4, 18
+    340a:	07b4      	br      	0x3372	// 3372 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    340c:	8320      	ld.b      	r1, (r3, 0x0)
+    340e:	3009      	movi      	r0, 9
+    3410:	b843      	st.w      	r2, (r14, 0xc)
+    3412:	b862      	st.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    3414:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    3416:	e3fffe8d 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    341a:	9862      	ld.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    341c:	75dd      	zexth      	r7, r7
+    341e:	2300      	addi      	r3, 1
+    3420:	9843      	ld.w      	r2, (r14, 0xc)
+    3422:	07be      	br      	0x339e	// 339e <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    3424:	3006      	movi      	r0, 6
+    3426:	e3fffe69 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    342a:	331b      	movi      	r3, 27
+    342c:	680c      	and      	r0, r3
+    342e:	3840      	cmpnei      	r0, 0
+    3430:	0bdc      	bt      	0x33e8	// 33e8 <RC522_PcdComMF522+0x90>
+            stats=MI_OK;
+    3432:	3301      	movi      	r3, 1
+    3434:	690c      	and      	r4, r3
+            if(Command==PCD_TRANSCEIVE)
+    3436:	3d4c      	cmpnei      	r5, 12
+            stats=MI_OK;
+    3438:	69d0      	and      	r7, r4
+            if(Command==PCD_TRANSCEIVE)
+    343a:	0bd8      	bt      	0x33ea	// 33ea <RC522_PcdComMF522+0x92>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    343c:	300a      	movi      	r0, 10
+    343e:	e3fffe5d 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    3442:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    3444:	300c      	movi      	r0, 12
+    3446:	e3fffe59 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    344a:	3307      	movi      	r3, 7
+    344c:	680c      	and      	r0, r3
+                if(lastBits)
+    344e:	3840      	cmpnei      	r0, 0
+    3450:	0c1b      	bf      	0x3486	// 3486 <RC522_PcdComMF522+0x12e>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    3452:	5c63      	subi      	r3, r4, 1
+    3454:	4363      	lsli      	r3, r3, 3
+    3456:	600c      	addu      	r0, r3
+    3458:	9860      	ld.w      	r3, (r14, 0x0)
+    345a:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    345c:	3c40      	cmpnei      	r4, 0
+    345e:	0c18      	bf      	0x348e	// 348e <RC522_PcdComMF522+0x136>
+    3460:	6cd3      	mov      	r3, r4
+    3462:	7510      	zextb      	r4, r4
+    3464:	3c12      	cmphsi      	r4, 19
+    3466:	0c02      	bf      	0x346a	// 346a <RC522_PcdComMF522+0x112>
+    3468:	3312      	movi      	r3, 18
+    346a:	74cc      	zextb      	r3, r3
+    346c:	98c1      	ld.w      	r6, (r14, 0x4)
+                for(i=0; i<n; i++)
+    346e:	3500      	movi      	r5, 0
+    3470:	750d      	zexth      	r4, r3
+    3472:	6514      	cmphs      	r5, r4
+    3474:	0bbb      	bt      	0x33ea	// 33ea <RC522_PcdComMF522+0x92>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    3476:	3009      	movi      	r0, 9
+    3478:	e3fffe40 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    347c:	2500      	addi      	r5, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    347e:	a600      	st.b      	r0, (r6, 0x0)
+                for(i=0; i<n; i++)
+    3480:	7555      	zexth      	r5, r5
+    3482:	2600      	addi      	r6, 1
+    3484:	07f7      	br      	0x3472	// 3472 <RC522_PcdComMF522+0x11a>
+                    *pOutLenBit=n*8;
+    3486:	4463      	lsli      	r3, r4, 3
+    3488:	9840      	ld.w      	r2, (r14, 0x0)
+    348a:	a260      	st.b      	r3, (r2, 0x0)
+    348c:	07e8      	br      	0x345c	// 345c <RC522_PcdComMF522+0x104>
+                if(n==0)n=1;
+    348e:	3301      	movi      	r3, 1
+    3490:	07ee      	br      	0x346c	// 346c <RC522_PcdComMF522+0x114>
+
+Disassembly of section .text.RC522_PcdSelect:
+
+00003492 <RC522_PcdSelect>:
+{
+    3492:	14d1      	push      	r4, r15
+    3494:	1427      	subi      	r14, r14, 28
+    ucComMF522Buf[0]=PICC_ANTICOLL1;
+    3496:	3300      	movi      	r3, 0
+    3498:	2b6c      	subi      	r3, 109
+    349a:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x70;
+    349e:	3370      	movi      	r3, 112
+    34a0:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    ucComMF522Buf[6]=0;
+    34a4:	3300      	movi      	r3, 0
+    34a6:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    34aa:	1a02      	addi      	r2, r14, 8
+    34ac:	582e      	addi      	r1, r0, 4
+        ucComMF522Buf[i+2]=*(pSnr+i);
+    34ae:	8060      	ld.b      	r3, (r0, 0x0)
+    34b0:	a262      	st.b      	r3, (r2, 0x2)
+        ucComMF522Buf[6]^=*(pSnr+i);
+    34b2:	d88e000e 	ld.b      	r4, (r14, 0xe)
+    34b6:	2000      	addi      	r0, 1
+    34b8:	6cd1      	xor      	r3, r4
+    for(i=0;i<4;i++)
+    34ba:	6442      	cmpne      	r0, r1
+        ucComMF522Buf[6]^=*(pSnr+i);
+    34bc:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    34c0:	2200      	addi      	r2, 1
+    for(i=0;i<4;i++)
+    34c2:	0bf6      	bt      	0x34ae	// 34ae <RC522_PcdSelect+0x1c>
+    RC522_CalulateCRC(ucComMF522Buf,7,&ucComMF522Buf[7]); //用MF522计算CRC16函数，校验数据
+    34c4:	1b02      	addi      	r3, r14, 8
+    34c6:	5b5a      	addi      	r2, r3, 7
+    34c8:	6c0f      	mov      	r0, r3
+    34ca:	3107      	movi      	r1, 7
+    34cc:	e3fffe9a 	bsr      	0x3200	// 3200 <RC522_CalulateCRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    34d0:	3407      	movi      	r4, 7
+    RC522_ClearBitMask(Status2Reg,0x08);                    //清RC522寄存器位
+    34d2:	3108      	movi      	r1, 8
+    34d4:	3008      	movi      	r0, 8
+    34d6:	e3fffe84 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    34da:	6138      	addu      	r4, r14
+    34dc:	1b02      	addi      	r3, r14, 8
+    34de:	b880      	st.w      	r4, (r14, 0x0)
+    34e0:	3209      	movi      	r2, 9
+    34e2:	6c4f      	mov      	r1, r3
+    34e4:	300c      	movi      	r0, 12
+    34e6:	e3ffff39 	bsr      	0x3358	// 3358 <RC522_PcdComMF522>
+    if((stats==MI_OK)&&(unLen==0x18))stats=MI_OK;
+    34ea:	3840      	cmpnei      	r0, 0
+    34ec:	0806      	bt      	0x34f8	// 34f8 <RC522_PcdSelect+0x66>
+    34ee:	8460      	ld.b      	r3, (r4, 0x0)
+    34f0:	3b58      	cmpnei      	r3, 24
+    34f2:	0803      	bt      	0x34f8	// 34f8 <RC522_PcdSelect+0x66>
+}
+    34f4:	1407      	addi      	r14, r14, 28
+    34f6:	1491      	pop      	r4, r15
+    else stats=MI_ERR;
+    34f8:	3002      	movi      	r0, 2
+    34fa:	07fd      	br      	0x34f4	// 34f4 <RC522_PcdSelect+0x62>
+
+Disassembly of section .text.RC522_PcdAuthState:
+
+000034fc <RC522_PcdAuthState>:
+{
+    34fc:	14d2      	push      	r4-r5, r15
+    34fe:	1427      	subi      	r14, r14, 28
+    3500:	6d0f      	mov      	r4, r3
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    3502:	1b02      	addi      	r3, r14, 8
+{
+    3504:	6d47      	mov      	r5, r1
+    ucComMF522Buf[0]=auth_mode;
+    3506:	dc0e0008 	st.b      	r0, (r14, 0x8)
+{
+    350a:	6c4b      	mov      	r1, r2
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    350c:	5b06      	addi      	r0, r3, 2
+    350e:	3206      	movi      	r2, 6
+    ucComMF522Buf[1]=addr;
+    3510:	dcae0009 	st.b      	r5, (r14, 0x9)
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    3514:	e3fff26c 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+    memcpy(&ucComMF522Buf[8],pSnr,4);
+    3518:	1b02      	addi      	r3, r14, 8
+    351a:	6c53      	mov      	r1, r4
+    351c:	5b1e      	addi      	r0, r3, 8
+    351e:	3204      	movi      	r2, 4
+    3520:	e3fff266 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    3524:	3307      	movi      	r3, 7
+    3526:	60f8      	addu      	r3, r14
+    3528:	b860      	st.w      	r3, (r14, 0x0)
+    352a:	1b02      	addi      	r3, r14, 8
+    352c:	320c      	movi      	r2, 12
+    352e:	6c4f      	mov      	r1, r3
+    3530:	300e      	movi      	r0, 14
+    3532:	e3ffff13 	bsr      	0x3358	// 3358 <RC522_PcdComMF522>
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    3536:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    3538:	6d03      	mov      	r4, r0
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    353a:	0809      	bt      	0x354c	// 354c <RC522_PcdAuthState+0x50>
+    353c:	3008      	movi      	r0, 8
+    353e:	e3fffddd 	bsr      	0x30f8	// 30f8 <RC522_ReadRawRC>
+    3542:	3308      	movi      	r3, 8
+    3544:	680c      	and      	r0, r3
+    3546:	7400      	zextb      	r0, r0
+    3548:	3840      	cmpnei      	r0, 0
+    354a:	0802      	bt      	0x354e	// 354e <RC522_PcdAuthState+0x52>
+    354c:	3402      	movi      	r4, 2
+}
+    354e:	6c13      	mov      	r0, r4
+    3550:	1407      	addi      	r14, r14, 28
+    3552:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00003554 <RC522_PcdRequest>:
+{
+    3554:	14d2      	push      	r4-r5, r15
+    3556:	1427      	subi      	r14, r14, 28
+    3558:	6d43      	mov      	r5, r0
+    355a:	6d07      	mov      	r4, r1
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    355c:	3008      	movi      	r0, 8
+    355e:	3108      	movi      	r1, 8
+    3560:	e3fffe3f 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    3564:	3107      	movi      	r1, 7
+    3566:	300d      	movi      	r0, 13
+    3568:	e3fffde4 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    356c:	3103      	movi      	r1, 3
+    356e:	3014      	movi      	r0, 20
+    3570:	e3fffe1e 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    3574:	dcae0008 	st.b      	r5, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    3578:	3507      	movi      	r5, 7
+    357a:	1b02      	addi      	r3, r14, 8
+    357c:	6178      	addu      	r5, r14
+    357e:	b8a0      	st.w      	r5, (r14, 0x0)
+    3580:	3201      	movi      	r2, 1
+    3582:	6c4f      	mov      	r1, r3
+    3584:	300c      	movi      	r0, 12
+    3586:	e3fffee9 	bsr      	0x3358	// 3358 <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    358a:	3840      	cmpnei      	r0, 0
+    358c:	080c      	bt      	0x35a4	// 35a4 <RC522_PcdRequest+0x50>
+    358e:	8560      	ld.b      	r3, (r5, 0x0)
+    3590:	3b50      	cmpnei      	r3, 16
+    3592:	0809      	bt      	0x35a4	// 35a4 <RC522_PcdRequest+0x50>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    3594:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    3598:	a460      	st.b      	r3, (r4, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    359a:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    359e:	a461      	st.b      	r3, (r4, 0x1)
+}
+    35a0:	1407      	addi      	r14, r14, 28
+    35a2:	1492      	pop      	r4-r5, r15
+        stats = MI_ERR;
+    35a4:	3002      	movi      	r0, 2
+    35a6:	07fd      	br      	0x35a0	// 35a0 <RC522_PcdRequest+0x4c>
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+000035a8 <RC522_PcdAnticoll>:
+{
+    35a8:	14d2      	push      	r4-r5, r15
+    35aa:	1427      	subi      	r14, r14, 28
+    35ac:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    35ae:	3108      	movi      	r1, 8
+    35b0:	3008      	movi      	r0, 8
+    35b2:	e3fffe16 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    35b6:	3100      	movi      	r1, 0
+    35b8:	300d      	movi      	r0, 13
+    35ba:	e3fffdbb 	bsr      	0x3130	// 3130 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    35be:	3180      	movi      	r1, 128
+    35c0:	300e      	movi      	r0, 14
+    35c2:	e3fffe0e 	bsr      	0x31de	// 31de <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    35c6:	3300      	movi      	r3, 0
+    35c8:	2b6c      	subi      	r3, 109
+    35ca:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    35ce:	3320      	movi      	r3, 32
+    35d0:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    35d4:	3307      	movi      	r3, 7
+    35d6:	60f8      	addu      	r3, r14
+    35d8:	b860      	st.w      	r3, (r14, 0x0)
+    35da:	1b02      	addi      	r3, r14, 8
+    35dc:	3202      	movi      	r2, 2
+    35de:	6c4f      	mov      	r1, r3
+    35e0:	300c      	movi      	r0, 12
+    35e2:	e3fffebb 	bsr      	0x3358	// 3358 <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    35e6:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    35e8:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    35ea:	0812      	bt      	0x360e	// 360e <RC522_PcdAnticoll+0x66>
+    35ec:	3300      	movi      	r3, 0
+    35ee:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    35f0:	1902      	addi      	r1, r14, 8
+    35f2:	604c      	addu      	r1, r3
+    35f4:	8120      	ld.b      	r1, (r1, 0x0)
+    35f6:	5d0c      	addu      	r0, r5, r3
+    35f8:	2300      	addi      	r3, 1
+    35fa:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    35fc:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    35fe:	6c49      	xor      	r1, r2
+    3600:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    3602:	0bf7      	bt      	0x35f0	// 35f0 <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    3604:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    3608:	644e      	cmpne      	r3, r1
+    360a:	0c02      	bf      	0x360e	// 360e <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    360c:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    360e:	3180      	movi      	r1, 128
+    3610:	300e      	movi      	r0, 14
+    3612:	e3fffdcd 	bsr      	0x31ac	// 31ac <RC522_SetBitMask>
+}
+    3616:	6c13      	mov      	r0, r4
+    3618:	1407      	addi      	r14, r14, 28
+    361a:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+0000361c <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    361c:	14d2      	push      	r4-r5, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    361e:	112b      	lrw      	r1, 0x200000a8	// 36c8 <Card_Read_TasK+0xac>
+    3620:	114b      	lrw      	r2, 0x200000bc	// 36cc <Card_Read_TasK+0xb0>
+    3622:	118c      	lrw      	r4, 0x200001f7	// 36d0 <Card_Read_TasK+0xb4>
+    3624:	9200      	ld.w      	r0, (r2, 0x0)
+    3626:	9160      	ld.w      	r3, (r1, 0x0)
+    3628:	60c2      	subu      	r3, r0
+    362a:	3063      	movi      	r0, 99
+    362c:	64c0      	cmphs      	r0, r3
+    362e:	082c      	bt      	0x3686	// 3686 <Card_Read_TasK+0x6a>
+        scan_tick = SysTick_1ms;
+    3630:	9160      	ld.w      	r3, (r1, 0x0)
+		
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read");
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    3632:	3119      	movi      	r1, 25
+    3634:	6050      	addu      	r1, r4
+    3636:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    3638:	b260      	st.w      	r3, (r2, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    363a:	e3ffff8d 	bsr      	0x3554	// 3554 <RC522_PcdRequest>
+    363e:	3520      	movi      	r5, 32
+    3640:	3840      	cmpnei      	r0, 0
+    3642:	6150      	addu      	r5, r4
+    3644:	0836      	bt      	0x36b0	// 36b0 <Card_Read_TasK+0x94>
+            CardInfo.FailNum = 0x00;
+    3646:	3300      	movi      	r3, 0
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    3648:	1123      	lrw      	r1, 0x456f	// 36d4 <Card_Read_TasK+0xb8>
+            CardInfo.FailNum = 0x00;
+    364a:	a566      	st.b      	r3, (r5, 0x6)
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    364c:	e3fffd1c 	bsr      	0x3084	// 3084 <Dbg_Println>
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    3650:	301b      	movi      	r0, 27
+    3652:	6010      	addu      	r0, r4
+    3654:	e3ffffaa 	bsr      	0x35a8	// 35a8 <RC522_PcdAnticoll>
+    3658:	3840      	cmpnei      	r0, 0
+    365a:	0829      	bt      	0x36ac	// 36ac <Card_Read_TasK+0x90>
+                //选定要进行操作的卡片
+                if(RC522_PcdSelect(CardInfo.SN)==MI_OK){
+    365c:	301b      	movi      	r0, 27
+    365e:	6010      	addu      	r0, r4
+    3660:	e3ffff19 	bsr      	0x3492	// 3492 <RC522_PcdSelect>
+    3664:	3840      	cmpnei      	r0, 0
+    3666:	0821      	bt      	0x36a8	// 36a8 <Card_Read_TasK+0x8c>
+                    //验证卡片密码
+                    if(RC522_PcdAuthState(CardInfo.CardKeyType, CardInfo.BlockLoc, CardInfo.CardKey, CardInfo.SN)==MI_OK){
+    3668:	331b      	movi      	r3, 27
+    366a:	8428      	ld.b      	r1, (r4, 0x8)
+    366c:	841f      	ld.b      	r0, (r4, 0x1f)
+    366e:	60d0      	addu      	r3, r4
+    3670:	6c97      	mov      	r2, r5
+    3672:	e3ffff45 	bsr      	0x34fc	// 34fc <RC522_PcdAuthState>
+    3676:	3840      	cmpnei      	r0, 0
+    3678:	0813      	bt      	0x369e	// 369e <Card_Read_TasK+0x82>
+                        //读取指定块的数据
+//                        if(RC522_PcdRead(CardInfo.BlockLoc, CardInfo.CradDataBuf)==MI_OK)
+						{
+
+                            Dbg_Println(DBG_BIT_SYS_STATUS, "Card Block %d",CardInfo.BlockLoc);
+    367a:	8448      	ld.b      	r2, (r4, 0x8)
+    367c:	1037      	lrw      	r1, 0x457f	// 36d8 <Card_Read_TasK+0xbc>
+    367e:	e3fffd03 	bsr      	0x3084	// 3084 <Dbg_Println>
+
+                            //Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "Card Data",CardInfo.CradDataBuf,BLOCK_HAVE_BYTE);
+							
+							CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    3682:	3301      	movi      	r3, 1
+    3684:	a467      	st.b      	r3, (r4, 0x7)
+                CardInfo.FailNum++;
+            }
+        }
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    3686:	8467      	ld.b      	r3, (r4, 0x7)
+    3688:	8446      	ld.b      	r2, (r4, 0x6)
+    368a:	64ca      	cmpne      	r2, r3
+    368c:	0c08      	bf      	0x369c	// 369c <Card_Read_TasK+0x80>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    368e:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    3690:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    3692:	0805      	bt      	0x369c	// 369c <Card_Read_TasK+0x80>
+            
+			Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+    3694:	1032      	lrw      	r1, 0x45d1	// 36dc <Card_Read_TasK+0xc0>
+    3696:	3000      	movi      	r0, 0
+    3698:	e3fffcf6 	bsr      	0x3084	// 3084 <Dbg_Println>
+
+        }
+    }
+
+
+}
+    369c:	1492      	pop      	r4-r5, r15
+                        Dbg_Println(DBG_BIT_SYS_STATUS, "Card Key Error");
+    369e:	1031      	lrw      	r1, 0x458d	// 36e0 <Card_Read_TasK+0xc4>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    36a0:	3000      	movi      	r0, 0
+    36a2:	e3fffcf1 	bsr      	0x3084	// 3084 <Dbg_Println>
+    36a6:	07f0      	br      	0x3686	// 3686 <Card_Read_TasK+0x6a>
+                    Dbg_Println(DBG_BIT_SYS_STATUS, "Card Select Error");
+    36a8:	102f      	lrw      	r1, 0x459c	// 36e4 <Card_Read_TasK+0xc8>
+    36aa:	07fb      	br      	0x36a0	// 36a0 <Card_Read_TasK+0x84>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    36ac:	102f      	lrw      	r1, 0x45ae	// 36e8 <Card_Read_TasK+0xcc>
+    36ae:	07f9      	br      	0x36a0	// 36a0 <Card_Read_TasK+0x84>
+            if(CardInfo.FailNum >= 5){
+    36b0:	8566      	ld.b      	r3, (r5, 0x6)
+    36b2:	3b04      	cmphsi      	r3, 5
+    36b4:	0c07      	bf      	0x36c2	// 36c2 <Card_Read_TasK+0xa6>
+                CardInfo.FailNum = 0;
+    36b6:	3300      	movi      	r3, 0
+    36b8:	a566      	st.b      	r3, (r5, 0x6)
+				CardInfo.SuccNum = 0;
+    36ba:	a567      	st.b      	r3, (r5, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    36bc:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_FAILD");
+    36be:	102c      	lrw      	r1, 0x45c0	// 36ec <Card_Read_TasK+0xd0>
+    36c0:	07f0      	br      	0x36a0	// 36a0 <Card_Read_TasK+0x84>
+                CardInfo.FailNum++;
+    36c2:	2300      	addi      	r3, 1
+    36c4:	a566      	st.b      	r3, (r5, 0x6)
+    36c6:	07e0      	br      	0x3686	// 3686 <Card_Read_TasK+0x6a>
+    36c8:	200000a8 	.long	0x200000a8
+    36cc:	200000bc 	.long	0x200000bc
+    36d0:	200001f7 	.long	0x200001f7
+    36d4:	0000456f 	.long	0x0000456f
+    36d8:	0000457f 	.long	0x0000457f
+    36dc:	000045d1 	.long	0x000045d1
+    36e0:	0000458d 	.long	0x0000458d
+    36e4:	0000459c 	.long	0x0000459c
+    36e8:	000045ae 	.long	0x000045ae
+    36ec:	000045c0 	.long	0x000045c0
+
+Disassembly of section .text.RLY_Light_Ctrl.part.0:
+
+000036f0 <RLY_Light_Ctrl.part.0>:
+	}
+}
+
+
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+    36f0:	14d0      	push      	r15
+{
+	if(state == 0x01)
+	{
+		CTRL_RLY_ON;
+    36f2:	1066      	lrw      	r3, 0x2000004c	// 3708 <RLY_Light_Ctrl.part.0+0x18>
+    36f4:	3100      	movi      	r1, 0
+    36f6:	9300      	ld.w      	r0, (r3, 0x0)
+    36f8:	e3fff3cd 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+        GPT0->CMPA = 0;
+    36fc:	1064      	lrw      	r3, 0x20000024	// 370c <RLY_Light_Ctrl.part.0+0x1c>
+    36fe:	3200      	movi      	r2, 0
+    3700:	9360      	ld.w      	r3, (r3, 0x0)
+    3702:	b34b      	st.w      	r2, (r3, 0x2c)
+	else if(state == 0x00)
+	{
+		CTRL_RLY_OFF;
+		Ctrl_Backlight(1);
+	}
+}
+    3704:	1490      	pop      	r15
+    3706:	0000      	bkpt
+    3708:	2000004c 	.long	0x2000004c
+    370c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00003710 <KEY1_LONG_PRESS_RELEASE_Handler>:
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_Handler");
+}
+
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    3710:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    3712:	1032      	lrw      	r1, 0x45e0	// 3758 <KEY1_LONG_PRESS_RELEASE_Handler+0x48>
+    3714:	3000      	movi      	r0, 0
+    3716:	e3fffcb7 	bsr      	0x3084	// 3084 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    371a:	1071      	lrw      	r3, 0x200001f7	// 375c <KEY1_LONG_PRESS_RELEASE_Handler+0x4c>
+    371c:	8367      	ld.b      	r3, (r3, 0x7)
+    371e:	3b40      	cmpnei      	r3, 0
+    3720:	1090      	lrw      	r4, 0x20000250	// 3760 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    3722:	0818      	bt      	0x3752	// 3752 <KEY1_LONG_PRESS_RELEASE_Handler+0x42>
+	{
+		if(READ_RLY_STATE != 0x00)
+    3724:	1070      	lrw      	r3, 0x2000004c	// 3764 <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    3726:	3100      	movi      	r1, 0
+    3728:	9300      	ld.w      	r0, (r3, 0x0)
+    372a:	e3fff3c0 	bsr      	0x1eaa	// 1eaa <GPIO_Read_Output>
+    372e:	3840      	cmpnei      	r0, 0
+    3730:	0c07      	bf      	0x373e	// 373e <KEY1_LONG_PRESS_RELEASE_Handler+0x2e>
+    3732:	e3ffffdf 	bsr      	0x36f0	// 36f0 <RLY_Light_Ctrl.part.0>
+		{
+			RLY_Light_Ctrl(1);
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    3736:	102d      	lrw      	r1, 0x45fb	// 3768 <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    3738:	3000      	movi      	r0, 0
+    373a:	e3fffca5 	bsr      	0x3084	// 3084 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    373e:	106c      	lrw      	r3, 0x200000a8	// 376c <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    3740:	104c      	lrw      	r2, 0x20000251	// 3770 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    3742:	9360      	ld.w      	r3, (r3, 0x0)
+    3744:	4b28      	lsri      	r1, r3, 8
+    3746:	a461      	st.b      	r3, (r4, 0x1)
+    3748:	a221      	st.b      	r1, (r2, 0x1)
+    374a:	4b30      	lsri      	r1, r3, 16
+    374c:	4b78      	lsri      	r3, r3, 24
+    374e:	a222      	st.b      	r1, (r2, 0x2)
+    3750:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    3752:	3302      	movi      	r3, 2
+    3754:	a460      	st.b      	r3, (r4, 0x0)
+}
+    3756:	1491      	pop      	r4, r15
+    3758:	000045e0 	.long	0x000045e0
+    375c:	200001f7 	.long	0x200001f7
+    3760:	20000250 	.long	0x20000250
+    3764:	2000004c 	.long	0x2000004c
+    3768:	000045fb 	.long	0x000045fb
+    376c:	200000a8 	.long	0x200000a8
+    3770:	20000251 	.long	0x20000251
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00003774 <RLY_Light_Ctrl>:
+{
+    3774:	14d0      	push      	r15
+	if(state == 0x01)
+    3776:	3841      	cmpnei      	r0, 1
+    3778:	0804      	bt      	0x3780	// 3780 <RLY_Light_Ctrl+0xc>
+    377a:	e3ffffbb 	bsr      	0x36f0	// 36f0 <RLY_Light_Ctrl.part.0>
+}
+    377e:	1490      	pop      	r15
+	else if(state == 0x00)
+    3780:	3840      	cmpnei      	r0, 0
+    3782:	0bfe      	bt      	0x377e	// 377e <RLY_Light_Ctrl+0xa>
+		CTRL_RLY_OFF;
+    3784:	1066      	lrw      	r3, 0x2000004c	// 379c <RLY_Light_Ctrl+0x28>
+    3786:	3100      	movi      	r1, 0
+    3788:	9300      	ld.w      	r0, (r3, 0x0)
+    378a:	e3fff380 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        GPT0->CMPA = 2000;
+    378e:	1065      	lrw      	r3, 0x20000024	// 37a0 <RLY_Light_Ctrl+0x2c>
+    3790:	9340      	ld.w      	r2, (r3, 0x0)
+    3792:	33fa      	movi      	r3, 250
+    3794:	4363      	lsli      	r3, r3, 3
+    3796:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    3798:	07f3      	br      	0x377e	// 377e <RLY_Light_Ctrl+0xa>
+    379a:	0000      	bkpt
+    379c:	2000004c 	.long	0x2000004c
+    37a0:	20000024 	.long	0x20000024
+
+Disassembly of section .text.LogicCtrl_Init:
+
+000037a4 <LogicCtrl_Init>:
+{
+    37a4:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    37a6:	1089      	lrw      	r4, 0x20000048	// 37c8 <LogicCtrl_Init+0x24>
+    37a8:	3200      	movi      	r2, 0
+    37aa:	9400      	ld.w      	r0, (r4, 0x0)
+    37ac:	3100      	movi      	r1, 0
+    37ae:	e3fff2ed 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	CTRL_CARD_OUT;
+    37b2:	9400      	ld.w      	r0, (r4, 0x0)
+    37b4:	3100      	movi      	r1, 0
+    37b6:	e3fff36a 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    37ba:	1065      	lrw      	r3, 0x2000004c	// 37cc <LogicCtrl_Init+0x28>
+    37bc:	3201      	movi      	r2, 1
+    37be:	9300      	ld.w      	r0, (r3, 0x0)
+    37c0:	310c      	movi      	r1, 12
+    37c2:	e3fff2e3 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+}
+    37c6:	1491      	pop      	r4, r15
+    37c8:	20000048 	.long	0x20000048
+    37cc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+000037d0 <LogicCtrl_Task>:
+{
+    37d0:	14d2      	push      	r4-r5, r15
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 1))
+    37d2:	1161      	lrw      	r3, 0x200001f7	// 3854 <LogicCtrl_Task+0x84>
+    37d4:	8347      	ld.b      	r2, (r3, 0x7)
+    37d6:	3a41      	cmpnei      	r2, 1
+    37d8:	6d0f      	mov      	r4, r3
+    37da:	0822      	bt      	0x381e	// 381e <LogicCtrl_Task+0x4e>
+    37dc:	10bf      	lrw      	r5, 0x20000048	// 3858 <LogicCtrl_Task+0x88>
+    37de:	3100      	movi      	r1, 0
+    37e0:	9500      	ld.w      	r0, (r5, 0x0)
+    37e2:	e3fff364 	bsr      	0x1eaa	// 1eaa <GPIO_Read_Output>
+    37e6:	3841      	cmpnei      	r0, 1
+    37e8:	081b      	bt      	0x381e	// 381e <LogicCtrl_Task+0x4e>
+		CTRL_CARD_IN;
+    37ea:	9500      	ld.w      	r0, (r5, 0x0)
+    37ec:	3100      	movi      	r1, 0
+    37ee:	e3fff352 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    37f2:	9500      	ld.w      	r0, (r5, 0x0)
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    37f4:	3100      	movi      	r1, 0
+    37f6:	e3fff35a 	bsr      	0x1eaa	// 1eaa <GPIO_Read_Output>
+    37fa:	6c83      	mov      	r2, r0
+    37fc:	1038      	lrw      	r1, 0x460d	// 385c <LogicCtrl_Task+0x8c>
+    37fe:	3000      	movi      	r0, 0
+    3800:	e3fffc42 	bsr      	0x3084	// 3084 <Dbg_Println>
+	if(READ_LED_IN == 0x00)
+    3804:	1097      	lrw      	r4, 0x2000004c	// 3860 <LogicCtrl_Task+0x90>
+    3806:	310c      	movi      	r1, 12
+    3808:	9400      	ld.w      	r0, (r4, 0x0)
+    380a:	e3fff348 	bsr      	0x1e9a	// 1e9a <GPIO_Read_Status>
+    380e:	3840      	cmpnei      	r0, 0
+    3810:	0817      	bt      	0x383e	// 383e <LogicCtrl_Task+0x6e>
+        GPT0->CMPA = 2000;
+    3812:	1075      	lrw      	r3, 0x20000024	// 3864 <LogicCtrl_Task+0x94>
+    3814:	9340      	ld.w      	r2, (r3, 0x0)
+    3816:	33fa      	movi      	r3, 250
+    3818:	4363      	lsli      	r3, r3, 3
+    381a:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    381c:	1492      	pop      	r4-r5, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 0))
+    381e:	8467      	ld.b      	r3, (r4, 0x7)
+    3820:	3b40      	cmpnei      	r3, 0
+    3822:	0bf1      	bt      	0x3804	// 3804 <LogicCtrl_Task+0x34>
+    3824:	108d      	lrw      	r4, 0x20000048	// 3858 <LogicCtrl_Task+0x88>
+    3826:	3100      	movi      	r1, 0
+    3828:	9400      	ld.w      	r0, (r4, 0x0)
+    382a:	e3fff340 	bsr      	0x1eaa	// 1eaa <GPIO_Read_Output>
+    382e:	3840      	cmpnei      	r0, 0
+    3830:	0bea      	bt      	0x3804	// 3804 <LogicCtrl_Task+0x34>
+		CTRL_CARD_OUT;
+    3832:	9400      	ld.w      	r0, (r4, 0x0)
+    3834:	3100      	movi      	r1, 0
+    3836:	e3fff32a 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    383a:	9400      	ld.w      	r0, (r4, 0x0)
+    383c:	07dc      	br      	0x37f4	// 37f4 <LogicCtrl_Task+0x24>
+	else if(READ_LED_IN == 0x01)
+    383e:	9400      	ld.w      	r0, (r4, 0x0)
+    3840:	310c      	movi      	r1, 12
+    3842:	e3fff32c 	bsr      	0x1e9a	// 1e9a <GPIO_Read_Status>
+    3846:	3841      	cmpnei      	r0, 1
+    3848:	0bea      	bt      	0x381c	// 381c <LogicCtrl_Task+0x4c>
+        GPT0->CMPA = 0;
+    384a:	1067      	lrw      	r3, 0x20000024	// 3864 <LogicCtrl_Task+0x94>
+    384c:	3200      	movi      	r2, 0
+    384e:	9360      	ld.w      	r3, (r3, 0x0)
+    3850:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    3852:	07e5      	br      	0x381c	// 381c <LogicCtrl_Task+0x4c>
+    3854:	200001f7 	.long	0x200001f7
+    3858:	20000048 	.long	0x20000048
+    385c:	0000460d 	.long	0x0000460d
+    3860:	2000004c 	.long	0x2000004c
+    3864:	20000024 	.long	0x20000024
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00003868 <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    3868:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOA0,RLY_OUT_PIN,Output);			
+    386a:	1093      	lrw      	r4, 0x2000004c	// 38b4 <LogicCtrl_NoRF_Init+0x4c>
+    386c:	3200      	movi      	r2, 0
+    386e:	9400      	ld.w      	r0, (r4, 0x0)
+    3870:	3100      	movi      	r1, 0
+    3872:	e3fff28b 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	CTRL_RLY_OFF;
+    3876:	9400      	ld.w      	r0, (r4, 0x0)
+    3878:	3100      	movi      	r1, 0
+    387a:	e3fff308 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    387e:	3205      	movi      	r2, 5
+    3880:	3100      	movi      	r1, 0
+    3882:	100e      	lrw      	r0, 0x20000250	// 38b8 <LogicCtrl_NoRF_Init+0x50>
+    3884:	e3fff070 	bsr      	0x1964	// 1964 <__memset_fast>
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    3888:	9400      	ld.w      	r0, (r4, 0x0)
+    388a:	3201      	movi      	r2, 1
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    388c:	108c      	lrw      	r4, 0x20000220	// 38bc <LogicCtrl_NoRF_Init+0x54>
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    388e:	3101      	movi      	r1, 1
+    3890:	e3fff27c 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    3894:	3301      	movi      	r3, 1
+    3896:	6c13      	mov      	r0, r4
+    3898:	3200      	movi      	r2, 0
+    389a:	102a      	lrw      	r1, 0x3b28	// 38c0 <LogicCtrl_NoRF_Init+0x58>
+    389c:	e0000074 	bsr      	0x3984	// 3984 <button_init>
+	
+//	button_attach(&KEY1, LONG_PRESS_START, KEY1_LONG_PRESS_START_Handler);
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    38a0:	1049      	lrw      	r2, 0x3710	// 38c4 <LogicCtrl_NoRF_Init+0x5c>
+    38a2:	3107      	movi      	r1, 7
+    38a4:	6c13      	mov      	r0, r4
+    38a6:	e000008c 	bsr      	0x39be	// 39be <button_attach>
+	button_start(&KEY1);
+    38aa:	6c13      	mov      	r0, r4
+    38ac:	e000011e 	bsr      	0x3ae8	// 3ae8 <button_start>
+}
+    38b0:	1491      	pop      	r4, r15
+    38b2:	0000      	bkpt
+    38b4:	2000004c 	.long	0x2000004c
+    38b8:	20000250 	.long	0x20000250
+    38bc:	20000220 	.long	0x20000220
+    38c0:	00003b28 	.long	0x00003b28
+    38c4:	00003710 	.long	0x00003710
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+000038c8 <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    38c8:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+	
+	if(SysTick_1ms - test_tick > 5)
+    38ca:	1188      	lrw      	r4, 0x200000a8	// 3968 <LogicCtrl_NoRF_Task+0xa0>
+    38cc:	11a8      	lrw      	r5, 0x200000c0	// 396c <LogicCtrl_NoRF_Task+0xa4>
+    38ce:	9460      	ld.w      	r3, (r4, 0x0)
+    38d0:	9540      	ld.w      	r2, (r5, 0x0)
+    38d2:	60ca      	subu      	r3, r2
+    38d4:	3b05      	cmphsi      	r3, 6
+    38d6:	0c05      	bf      	0x38e0	// 38e0 <LogicCtrl_NoRF_Task+0x18>
+	{
+		test_tick = SysTick_1ms;
+    38d8:	9460      	ld.w      	r3, (r4, 0x0)
+    38da:	b560      	st.w      	r3, (r5, 0x0)
+		button_ticks();
+    38dc:	e0000118 	bsr      	0x3b0c	// 3b0c <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    38e0:	11c4      	lrw      	r6, 0x200001f7	// 3970 <LogicCtrl_NoRF_Task+0xa8>
+    38e2:	8667      	ld.b      	r3, (r6, 0x7)
+    38e4:	3b41      	cmpnei      	r3, 1
+    38e6:	082f      	bt      	0x3944	// 3944 <LogicCtrl_NoRF_Task+0x7c>
+    38e8:	e3ffff04 	bsr      	0x36f0	// 36f0 <RLY_Light_Ctrl.part.0>
+	{
+		RLY_Light_Ctrl(1);
+		card_tick = SysTick_1ms;
+    38ec:	9460      	ld.w      	r3, (r4, 0x0)
+    38ee:	b561      	st.w      	r3, (r5, 0x4)
+		dm_in.DM_State = 0x00;
+    38f0:	3200      	movi      	r2, 0
+    38f2:	1161      	lrw      	r3, 0x20000250	// 3974 <LogicCtrl_NoRF_Task+0xac>
+    38f4:	a340      	st.b      	r2, (r3, 0x0)
+		RLY_Light_Ctrl(0);
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card OUT RLY OFF");
+	}
+	
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    38f6:	8667      	ld.b      	r3, (r6, 0x7)
+    38f8:	3b40      	cmpnei      	r3, 0
+    38fa:	0824      	bt      	0x3942	// 3942 <LogicCtrl_NoRF_Task+0x7a>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    38fc:	107e      	lrw      	r3, 0x20000250	// 3974 <LogicCtrl_NoRF_Task+0xac>
+    38fe:	8340      	ld.b      	r2, (r3, 0x0)
+    3900:	3a42      	cmpnei      	r2, 2
+    3902:	0820      	bt      	0x3942	// 3942 <LogicCtrl_NoRF_Task+0x7a>
+    3904:	8322      	ld.b      	r1, (r3, 0x2)
+    3906:	8341      	ld.b      	r2, (r3, 0x1)
+    3908:	4128      	lsli      	r1, r1, 8
+    390a:	6c48      	or      	r1, r2
+    390c:	8343      	ld.b      	r2, (r3, 0x3)
+    390e:	4250      	lsli      	r2, r2, 16
+    3910:	6c48      	or      	r1, r2
+    3912:	8344      	ld.b      	r2, (r3, 0x4)
+    3914:	4258      	lsli      	r2, r2, 24
+    3916:	6c84      	or      	r2, r1
+    3918:	9400      	ld.w      	r0, (r4, 0x0)
+    391a:	600a      	subu      	r0, r2
+    391c:	1057      	lrw      	r2, 0x752f	// 3978 <LogicCtrl_NoRF_Task+0xb0>
+    391e:	6408      	cmphs      	r2, r0
+    3920:	0811      	bt      	0x3942	// 3942 <LogicCtrl_NoRF_Task+0x7a>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    3922:	9440      	ld.w      	r2, (r4, 0x0)
+    3924:	5b22      	addi      	r1, r3, 1
+    3926:	a341      	st.b      	r2, (r3, 0x1)
+    3928:	4a68      	lsri      	r3, r2, 8
+    392a:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    392c:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    392e:	4a70      	lsri      	r3, r2, 16
+    3930:	4a58      	lsri      	r2, r2, 24
+    3932:	a162      	st.b      	r3, (r1, 0x2)
+    3934:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    3936:	e3ffff1f 	bsr      	0x3774	// 3774 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    393a:	1031      	lrw      	r1, 0x4632	// 397c <LogicCtrl_NoRF_Task+0xb4>
+    393c:	3000      	movi      	r0, 0
+    393e:	e3fffba3 	bsr      	0x3084	// 3084 <Dbg_Println>
+		}
+	}
+    3942:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= 40000))
+    3944:	3b40      	cmpnei      	r3, 0
+    3946:	0bd8      	bt      	0x38f6	// 38f6 <LogicCtrl_NoRF_Task+0x2e>
+    3948:	106b      	lrw      	r3, 0x20000250	// 3974 <LogicCtrl_NoRF_Task+0xac>
+    394a:	8360      	ld.b      	r3, (r3, 0x0)
+    394c:	3b40      	cmpnei      	r3, 0
+    394e:	0bd4      	bt      	0x38f6	// 38f6 <LogicCtrl_NoRF_Task+0x2e>
+    3950:	9541      	ld.w      	r2, (r5, 0x4)
+    3952:	9460      	ld.w      	r3, (r4, 0x0)
+    3954:	60ca      	subu      	r3, r2
+    3956:	104b      	lrw      	r2, 0x9c3f	// 3980 <LogicCtrl_NoRF_Task+0xb8>
+    3958:	64c8      	cmphs      	r2, r3
+    395a:	0bce      	bt      	0x38f6	// 38f6 <LogicCtrl_NoRF_Task+0x2e>
+		card_tick = SysTick_1ms;
+    395c:	9460      	ld.w      	r3, (r4, 0x0)
+		RLY_Light_Ctrl(0);
+    395e:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    3960:	b561      	st.w      	r3, (r5, 0x4)
+		RLY_Light_Ctrl(0);
+    3962:	e3ffff09 	bsr      	0x3774	// 3774 <RLY_Light_Ctrl>
+    3966:	07c8      	br      	0x38f6	// 38f6 <LogicCtrl_NoRF_Task+0x2e>
+    3968:	200000a8 	.long	0x200000a8
+    396c:	200000c0 	.long	0x200000c0
+    3970:	200001f7 	.long	0x200001f7
+    3974:	20000250 	.long	0x20000250
+    3978:	0000752f 	.long	0x0000752f
+    397c:	00004632 	.long	0x00004632
+    3980:	00009c3f 	.long	0x00009c3f
+
+Disassembly of section .text.button_init:
+
+00003984 <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    3984:	14d4      	push      	r4-r7, r15
+    3986:	6dc7      	mov      	r7, r1
+    3988:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    398a:	3100      	movi      	r1, 0
+    398c:	3230      	movi      	r2, 48
+{
+    398e:	6d03      	mov      	r4, r0
+    3990:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    3992:	e3ffefe9 	bsr      	0x1964	// 1964 <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    3996:	3300      	movi      	r3, 0
+    3998:	2b6f      	subi      	r3, 112
+    399a:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    399c:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    399e:	6c17      	mov      	r0, r5
+    39a0:	7bdd      	jsr      	r7
+    39a2:	8443      	ld.b      	r2, (r4, 0x3)
+    39a4:	337f      	movi      	r3, 127
+    39a6:	688c      	and      	r2, r3
+    39a8:	4007      	lsli      	r0, r0, 7
+    39aa:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    39ac:	3201      	movi      	r2, 1
+    39ae:	6988      	and      	r6, r2
+    39b0:	7480      	zextb      	r2, r0
+    39b2:	46c6      	lsli      	r6, r6, 6
+    39b4:	3a86      	bclri      	r2, 6
+    39b6:	6c98      	or      	r2, r6
+    39b8:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    39ba:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    39bc:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+000039be <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    39be:	2102      	addi      	r1, 3
+    39c0:	4122      	lsli      	r1, r1, 2
+    39c2:	6040      	addu      	r1, r0
+    39c4:	b140      	st.w      	r2, (r1, 0x0)
+}
+    39c6:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+000039c8 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    39c8:	14d3      	push      	r4-r6, r15
+    39ca:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    39cc:	9462      	ld.w      	r3, (r4, 0x8)
+    39ce:	8004      	ld.b      	r0, (r0, 0x4)
+    39d0:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    39d2:	8463      	ld.b      	r3, (r4, 0x3)
+    39d4:	433d      	lsli      	r1, r3, 29
+    39d6:	493d      	lsri      	r1, r1, 29
+    39d8:	3940      	cmpnei      	r1, 0
+    39da:	0c04      	bf      	0x39e2	// 39e2 <button_handler+0x1a>
+    39dc:	8c40      	ld.h      	r2, (r4, 0x0)
+    39de:	2200      	addi      	r2, 1
+    39e0:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    39e2:	4b47      	lsri      	r2, r3, 7
+    39e4:	640a      	cmpne      	r2, r0
+    39e6:	0c21      	bf      	0x3a28	// 3a28 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    39e8:	435a      	lsli      	r2, r3, 26
+    39ea:	4a5d      	lsri      	r2, r2, 29
+    39ec:	3507      	movi      	r5, 7
+    39ee:	2200      	addi      	r2, 1
+    39f0:	6894      	and      	r2, r5
+    39f2:	7488      	zextb      	r2, r2
+    39f4:	6948      	and      	r5, r2
+    39f6:	45c3      	lsli      	r6, r5, 3
+    39f8:	3538      	movi      	r5, 56
+    39fa:	68d5      	andn      	r3, r5
+    39fc:	6d8c      	or      	r6, r3
+    39fe:	3a02      	cmphsi      	r2, 3
+    3a00:	a4c3      	st.b      	r6, (r4, 0x3)
+    3a02:	0c09      	bf      	0x3a14	// 3a14 <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    3a04:	4067      	lsli      	r3, r0, 7
+    3a06:	327f      	movi      	r2, 127
+    3a08:	8403      	ld.b      	r0, (r4, 0x3)
+    3a0a:	6808      	and      	r0, r2
+    3a0c:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    3a0e:	7400      	zextb      	r0, r0
+    3a10:	6815      	andn      	r0, r5
+    3a12:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    3a14:	3941      	cmpnei      	r1, 1
+    3a16:	0c2f      	bf      	0x3a74	// 3a74 <button_handler+0xac>
+    3a18:	3940      	cmpnei      	r1, 0
+    3a1a:	0c0b      	bf      	0x3a30	// 3a30 <button_handler+0x68>
+    3a1c:	3945      	cmpnei      	r1, 5
+    3a1e:	0c53      	bf      	0x3ac4	// 3ac4 <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    3a20:	8463      	ld.b      	r3, (r4, 0x3)
+    3a22:	3207      	movi      	r2, 7
+    3a24:	68c9      	andn      	r3, r2
+    3a26:	0420      	br      	0x3a66	// 3a66 <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    3a28:	3238      	movi      	r2, 56
+    3a2a:	68c9      	andn      	r3, r2
+    3a2c:	a463      	st.b      	r3, (r4, 0x3)
+    3a2e:	07f3      	br      	0x3a14	// 3a14 <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    3a30:	8463      	ld.b      	r3, (r4, 0x3)
+    3a32:	4359      	lsli      	r2, r3, 25
+    3a34:	4a5f      	lsri      	r2, r2, 31
+    3a36:	4b67      	lsri      	r3, r3, 7
+    3a38:	648e      	cmpne      	r3, r2
+    3a3a:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    3a3c:	320f      	movi      	r2, 15
+    3a3e:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    3a40:	0815      	bt      	0x3a6a	// 3a6a <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    3a42:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    3a44:	9463      	ld.w      	r3, (r4, 0xc)
+    3a46:	3b40      	cmpnei      	r3, 0
+    3a48:	0c03      	bf      	0x3a4e	// 3a4e <button_handler+0x86>
+    3a4a:	6c13      	mov      	r0, r4
+    3a4c:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    3a4e:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    3a50:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    3a52:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    3a54:	330f      	movi      	r3, 15
+    3a56:	688d      	andn      	r2, r3
+    3a58:	3101      	movi      	r1, 1
+    3a5a:	6c84      	or      	r2, r1
+    3a5c:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    3a5e:	8463      	ld.b      	r3, (r4, 0x3)
+    3a60:	3207      	movi      	r2, 7
+    3a62:	68c9      	andn      	r3, r2
+    3a64:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    3a66:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    3a68:	0405      	br      	0x3a72	// 3a72 <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    3a6a:	3200      	movi      	r2, 0
+    3a6c:	2a6f      	subi      	r2, 112
+    3a6e:	6cc8      	or      	r3, r2
+    3a70:	a462      	st.b      	r3, (r4, 0x2)
+}
+    3a72:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    3a74:	8463      	ld.b      	r3, (r4, 0x3)
+    3a76:	4359      	lsli      	r2, r3, 25
+    3a78:	4a5f      	lsri      	r2, r2, 31
+    3a7a:	4b67      	lsri      	r3, r3, 7
+    3a7c:	648e      	cmpne      	r3, r2
+    3a7e:	0c0e      	bf      	0x3a9a	// 3a9a <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    3a80:	8462      	ld.b      	r3, (r4, 0x2)
+    3a82:	320f      	movi      	r2, 15
+    3a84:	68c8      	and      	r3, r2
+    3a86:	3ba4      	bseti      	r3, 4
+    3a88:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    3a8a:	9464      	ld.w      	r3, (r4, 0x10)
+    3a8c:	3b40      	cmpnei      	r3, 0
+    3a8e:	0c03      	bf      	0x3a94	// 3a94 <button_handler+0xcc>
+    3a90:	6c13      	mov      	r0, r4
+    3a92:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    3a94:	3300      	movi      	r3, 0
+    3a96:	ac60      	st.h      	r3, (r4, 0x0)
+    3a98:	07c4      	br      	0x3a20	// 3a20 <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    3a9a:	8c40      	ld.h      	r2, (r4, 0x0)
+    3a9c:	33c8      	movi      	r3, 200
+    3a9e:	648c      	cmphs      	r3, r2
+    3aa0:	0be9      	bt      	0x3a72	// 3a72 <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    3aa2:	8462      	ld.b      	r3, (r4, 0x2)
+    3aa4:	320f      	movi      	r2, 15
+    3aa6:	68c8      	and      	r3, r2
+    3aa8:	3ba4      	bseti      	r3, 4
+    3aaa:	3ba6      	bseti      	r3, 6
+    3aac:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    3aae:	9468      	ld.w      	r3, (r4, 0x20)
+    3ab0:	3b40      	cmpnei      	r3, 0
+    3ab2:	0c03      	bf      	0x3ab8	// 3ab8 <button_handler+0xf0>
+    3ab4:	6c13      	mov      	r0, r4
+    3ab6:	7bcd      	jsr      	r3
+			handle->state = 5;
+    3ab8:	8463      	ld.b      	r3, (r4, 0x3)
+    3aba:	3207      	movi      	r2, 7
+    3abc:	68c9      	andn      	r3, r2
+    3abe:	3ba0      	bseti      	r3, 0
+    3ac0:	3ba2      	bseti      	r3, 2
+    3ac2:	07d2      	br      	0x3a66	// 3a66 <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    3ac4:	8463      	ld.b      	r3, (r4, 0x3)
+    3ac6:	4359      	lsli      	r2, r3, 25
+    3ac8:	4a5f      	lsri      	r2, r2, 31
+    3aca:	4b67      	lsri      	r3, r3, 7
+    3acc:	648e      	cmpne      	r3, r2
+    3ace:	0fd2      	bf      	0x3a72	// 3a72 <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    3ad0:	8462      	ld.b      	r3, (r4, 0x2)
+    3ad2:	320f      	movi      	r2, 15
+    3ad4:	68c8      	and      	r3, r2
+    3ad6:	3270      	movi      	r2, 112
+    3ad8:	6cc8      	or      	r3, r2
+    3ada:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    3adc:	946a      	ld.w      	r3, (r4, 0x28)
+    3ade:	3b40      	cmpnei      	r3, 0
+    3ae0:	0fa0      	bf      	0x3a20	// 3a20 <button_handler+0x58>
+    3ae2:	6c13      	mov      	r0, r4
+    3ae4:	7bcd      	jsr      	r3
+    3ae6:	079d      	br      	0x3a20	// 3a20 <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00003ae8 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    3ae8:	1068      	lrw      	r3, 0x200000c8	// 3b08 <button_start+0x20>
+    3aea:	9320      	ld.w      	r1, (r3, 0x0)
+    3aec:	6c87      	mov      	r2, r1
+	while(target) {
+    3aee:	3a40      	cmpnei      	r2, 0
+    3af0:	0805      	bt      	0x3afa	// 3afa <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    3af2:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    3af4:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    3af6:	3000      	movi      	r0, 0
+}
+    3af8:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    3afa:	640a      	cmpne      	r2, r0
+    3afc:	0c03      	bf      	0x3b02	// 3b02 <button_start+0x1a>
+		target = target->next;
+    3afe:	924b      	ld.w      	r2, (r2, 0x2c)
+    3b00:	07f7      	br      	0x3aee	// 3aee <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    3b02:	3000      	movi      	r0, 0
+    3b04:	2800      	subi      	r0, 1
+    3b06:	07f9      	br      	0x3af8	// 3af8 <button_start+0x10>
+    3b08:	200000c8 	.long	0x200000c8
+
+Disassembly of section .text.button_ticks:
+
+00003b0c <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    3b0c:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    3b0e:	1066      	lrw      	r3, 0x200000c8	// 3b24 <button_ticks+0x18>
+    3b10:	9380      	ld.w      	r4, (r3, 0x0)
+    3b12:	3c40      	cmpnei      	r4, 0
+    3b14:	0802      	bt      	0x3b18	// 3b18 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    3b16:	1491      	pop      	r4, r15
+		button_handler(target);
+    3b18:	6c13      	mov      	r0, r4
+    3b1a:	e3ffff57 	bsr      	0x39c8	// 39c8 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    3b1e:	948b      	ld.w      	r4, (r4, 0x2c)
+    3b20:	07f9      	br      	0x3b12	// 3b12 <button_ticks+0x6>
+    3b22:	0000      	bkpt
+    3b24:	200000c8 	.long	0x200000c8
+
+Disassembly of section .text.read_button_GPIO:
+
+00003b28 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    3b28:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    3b2a:	1064      	lrw      	r3, 0x2000004c	// 3b38 <read_button_GPIO+0x10>
+{
+    3b2c:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    3b2e:	9300      	ld.w      	r0, (r3, 0x0)
+    3b30:	e3fff1b5 	bsr      	0x1e9a	// 1e9a <GPIO_Read_Status>
+	return state;
+    3b34:	1490      	pop      	r15
+    3b36:	0000      	bkpt
+    3b38:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+00003b3c <TK_Sampling_prog>:
+    3b3c:	14c4      	push      	r4-r7
+    3b3e:	1072      	lrw      	r3, 0x20000054	// 3b84 <TK_Sampling_prog+0x48>
+    3b40:	1012      	lrw      	r0, 0x200004fe	// 3b88 <TK_Sampling_prog+0x4c>
+    3b42:	1093      	lrw      	r4, 0x2000036f	// 3b8c <TK_Sampling_prog+0x50>
+    3b44:	6d83      	mov      	r6, r0
+    3b46:	93a0      	ld.w      	r5, (r3, 0x0)
+    3b48:	3300      	movi      	r3, 0
+    3b4a:	4342      	lsli      	r2, r3, 2
+    3b4c:	6094      	addu      	r2, r5
+    3b4e:	9220      	ld.w      	r1, (r2, 0x0)
+    3b50:	4341      	lsli      	r2, r3, 1
+    3b52:	6080      	addu      	r2, r0
+    3b54:	7445      	zexth      	r1, r1
+    3b56:	aa20      	st.h      	r1, (r2, 0x0)
+    3b58:	8440      	ld.b      	r2, (r4, 0x0)
+    3b5a:	3a41      	cmpnei      	r2, 1
+    3b5c:	080f      	bt      	0x3b7a	// 3b7a <TK_Sampling_prog+0x3e>
+    3b5e:	3300      	movi      	r3, 0
+    3b60:	10ec      	lrw      	r7, 0x20000258	// 3b90 <TK_Sampling_prog+0x54>
+    3b62:	4341      	lsli      	r2, r3, 1
+    3b64:	5e28      	addu      	r1, r6, r2
+    3b66:	8920      	ld.h      	r1, (r1, 0x0)
+    3b68:	2300      	addi      	r3, 1
+    3b6a:	7445      	zexth      	r1, r1
+    3b6c:	609c      	addu      	r2, r7
+    3b6e:	3b51      	cmpnei      	r3, 17
+    3b70:	aa20      	st.h      	r1, (r2, 0x0)
+    3b72:	0bf8      	bt      	0x3b62	// 3b62 <TK_Sampling_prog+0x26>
+    3b74:	3300      	movi      	r3, 0
+    3b76:	a460      	st.b      	r3, (r4, 0x0)
+    3b78:	3311      	movi      	r3, 17
+    3b7a:	2300      	addi      	r3, 1
+    3b7c:	74cc      	zextb      	r3, r3
+    3b7e:	3b10      	cmphsi      	r3, 17
+    3b80:	0fe5      	bf      	0x3b4a	// 3b4a <TK_Sampling_prog+0xe>
+    3b82:	1484      	pop      	r4-r7
+    3b84:	20000054 	.long	0x20000054
+    3b88:	200004fe 	.long	0x200004fe
+    3b8c:	2000036f 	.long	0x2000036f
+    3b90:	20000258 	.long	0x20000258
+
+Disassembly of section .text.TKEYIntHandler:
+
+00003b94 <TKEYIntHandler>:
+    3b94:	1460      	nie
+    3b96:	1462      	ipush
+    3b98:	14d1      	push      	r4, r15
+    3b9a:	109e      	lrw      	r4, 0x20000068	// 3c10 <TKEYIntHandler+0x7c>
+    3b9c:	9460      	ld.w      	r3, (r4, 0x0)
+    3b9e:	3b40      	cmpnei      	r3, 0
+    3ba0:	080b      	bt      	0x3bb6	// 3bb6 <TKEYIntHandler+0x22>
+    3ba2:	3301      	movi      	r3, 1
+    3ba4:	b460      	st.w      	r3, (r4, 0x0)
+    3ba6:	107c      	lrw      	r3, 0x200002ec	// 3c14 <TKEYIntHandler+0x80>
+    3ba8:	8360      	ld.b      	r3, (r3, 0x0)
+    3baa:	3b41      	cmpnei      	r3, 1
+    3bac:	0805      	bt      	0x3bb6	// 3bb6 <TKEYIntHandler+0x22>
+    3bae:	e3ffffc7 	bsr      	0x3b3c	// 3b3c <TK_Sampling_prog>
+    3bb2:	3301      	movi      	r3, 1
+    3bb4:	a464      	st.b      	r3, (r4, 0x4)
+    3bb6:	1079      	lrw      	r3, 0x20000058	// 3c18 <TKEYIntHandler+0x84>
+    3bb8:	3101      	movi      	r1, 1
+    3bba:	9360      	ld.w      	r3, (r3, 0x0)
+    3bbc:	934a      	ld.w      	r2, (r3, 0x28)
+    3bbe:	6884      	and      	r2, r1
+    3bc0:	3a40      	cmpnei      	r2, 0
+    3bc2:	0c02      	bf      	0x3bc6	// 3bc6 <TKEYIntHandler+0x32>
+    3bc4:	b32c      	st.w      	r1, (r3, 0x30)
+    3bc6:	934a      	ld.w      	r2, (r3, 0x28)
+    3bc8:	3102      	movi      	r1, 2
+    3bca:	6884      	and      	r2, r1
+    3bcc:	3a40      	cmpnei      	r2, 0
+    3bce:	0c02      	bf      	0x3bd2	// 3bd2 <TKEYIntHandler+0x3e>
+    3bd0:	b32c      	st.w      	r1, (r3, 0x30)
+    3bd2:	934a      	ld.w      	r2, (r3, 0x28)
+    3bd4:	3104      	movi      	r1, 4
+    3bd6:	6884      	and      	r2, r1
+    3bd8:	3a40      	cmpnei      	r2, 0
+    3bda:	0c02      	bf      	0x3bde	// 3bde <TKEYIntHandler+0x4a>
+    3bdc:	b32c      	st.w      	r1, (r3, 0x30)
+    3bde:	934a      	ld.w      	r2, (r3, 0x28)
+    3be0:	3108      	movi      	r1, 8
+    3be2:	6884      	and      	r2, r1
+    3be4:	3a40      	cmpnei      	r2, 0
+    3be6:	0c02      	bf      	0x3bea	// 3bea <TKEYIntHandler+0x56>
+    3be8:	b32c      	st.w      	r1, (r3, 0x30)
+    3bea:	934a      	ld.w      	r2, (r3, 0x28)
+    3bec:	3110      	movi      	r1, 16
+    3bee:	6884      	and      	r2, r1
+    3bf0:	3a40      	cmpnei      	r2, 0
+    3bf2:	0c02      	bf      	0x3bf6	// 3bf6 <TKEYIntHandler+0x62>
+    3bf4:	b32c      	st.w      	r1, (r3, 0x30)
+    3bf6:	934a      	ld.w      	r2, (r3, 0x28)
+    3bf8:	3120      	movi      	r1, 32
+    3bfa:	6884      	and      	r2, r1
+    3bfc:	3a40      	cmpnei      	r2, 0
+    3bfe:	0c02      	bf      	0x3c02	// 3c02 <TKEYIntHandler+0x6e>
+    3c00:	b32c      	st.w      	r1, (r3, 0x30)
+    3c02:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3c06:	9880      	ld.w      	r4, (r14, 0x0)
+    3c08:	1402      	addi      	r14, r14, 8
+    3c0a:	1463      	ipop
+    3c0c:	1461      	nir
+    3c0e:	0000      	bkpt
+    3c10:	20000068 	.long	0x20000068
+    3c14:	200002ec 	.long	0x200002ec
+    3c18:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+00003c1c <get_key_number>:
+    3c1c:	14c2      	push      	r4-r5
+    3c1e:	3200      	movi      	r2, 0
+    3c20:	3000      	movi      	r0, 0
+    3c22:	1088      	lrw      	r4, 0x2000038c	// 3c40 <get_key_number+0x24>
+    3c24:	3501      	movi      	r5, 1
+    3c26:	3120      	movi      	r1, 32
+    3c28:	9460      	ld.w      	r3, (r4, 0x0)
+    3c2a:	70c9      	lsr      	r3, r2
+    3c2c:	68d4      	and      	r3, r5
+    3c2e:	3b40      	cmpnei      	r3, 0
+    3c30:	0c02      	bf      	0x3c34	// 3c34 <get_key_number+0x18>
+    3c32:	2000      	addi      	r0, 1
+    3c34:	2200      	addi      	r2, 1
+    3c36:	644a      	cmpne      	r2, r1
+    3c38:	0bf8      	bt      	0x3c28	// 3c28 <get_key_number+0xc>
+    3c3a:	7400      	zextb      	r0, r0
+    3c3c:	1482      	pop      	r4-r5
+    3c3e:	0000      	bkpt
+    3c40:	2000038c 	.long	0x2000038c
+
+Disassembly of section .text.TK_Scan_Start:
+
+00003c44 <TK_Scan_Start>:
+    3c44:	1046      	lrw      	r2, 0x20000068	// 3c5c <TK_Scan_Start+0x18>
+    3c46:	8264      	ld.b      	r3, (r2, 0x4)
+    3c48:	74cc      	zextb      	r3, r3
+    3c4a:	3b41      	cmpnei      	r3, 1
+    3c4c:	0807      	bt      	0x3c5a	// 3c5a <TK_Scan_Start+0x16>
+    3c4e:	1025      	lrw      	r1, 0x20000058	// 3c60 <TK_Scan_Start+0x1c>
+    3c50:	9120      	ld.w      	r1, (r1, 0x0)
+    3c52:	b162      	st.w      	r3, (r1, 0x8)
+    3c54:	3300      	movi      	r3, 0
+    3c56:	b260      	st.w      	r3, (r2, 0x0)
+    3c58:	a264      	st.b      	r3, (r2, 0x4)
+    3c5a:	783c      	jmp      	r15
+    3c5c:	20000068 	.long	0x20000068
+    3c60:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+00003c64 <TK_Keymap_prog>:
+    3c64:	14d4      	push      	r4-r7, r15
+    3c66:	1425      	subi      	r14, r14, 20
+    3c68:	1271      	lrw      	r3, 0x200000f8	// 3dac <TK_Keymap_prog+0x148>
+    3c6a:	8360      	ld.b      	r3, (r3, 0x0)
+    3c6c:	b860      	st.w      	r3, (r14, 0x0)
+    3c6e:	3400      	movi      	r4, 0
+    3c70:	1270      	lrw      	r3, 0x200000cc	// 3db0 <TK_Keymap_prog+0x14c>
+    3c72:	8360      	ld.b      	r3, (r3, 0x0)
+    3c74:	b861      	st.w      	r3, (r14, 0x4)
+    3c76:	12f0      	lrw      	r7, 0x20000302	// 3db4 <TK_Keymap_prog+0x150>
+    3c78:	1270      	lrw      	r3, 0x200000d5	// 3db8 <TK_Keymap_prog+0x154>
+    3c7a:	83a0      	ld.b      	r5, (r3, 0x0)
+    3c7c:	1270      	lrw      	r3, 0x200000d4	// 3dbc <TK_Keymap_prog+0x158>
+    3c7e:	8360      	ld.b      	r3, (r3, 0x0)
+    3c80:	b862      	st.w      	r3, (r14, 0x8)
+    3c82:	6d9f      	mov      	r6, r7
+    3c84:	126f      	lrw      	r3, 0x200004fe	// 3dc0 <TK_Keymap_prog+0x15c>
+    3c86:	b863      	st.w      	r3, (r14, 0xc)
+    3c88:	4461      	lsli      	r3, r4, 1
+    3c8a:	9843      	ld.w      	r2, (r14, 0xc)
+    3c8c:	608c      	addu      	r2, r3
+    3c8e:	122e      	lrw      	r1, 0x20000258	// 3dc4 <TK_Keymap_prog+0x160>
+    3c90:	604c      	addu      	r1, r3
+    3c92:	8a40      	ld.h      	r2, (r2, 0x0)
+    3c94:	8920      	ld.h      	r1, (r1, 0x0)
+    3c96:	6086      	subu      	r2, r1
+    3c98:	748b      	sexth      	r2, r2
+    3c9a:	5f2c      	addu      	r1, r7, r3
+    3c9c:	a940      	st.h      	r2, (r1, 0x0)
+    3c9e:	8940      	ld.h      	r2, (r1, 0x0)
+    3ca0:	748b      	sexth      	r2, r2
+    3ca2:	3adf      	btsti      	r2, 31
+    3ca4:	1249      	lrw      	r2, 0x200004ba	// 3dc8 <TK_Keymap_prog+0x164>
+    3ca6:	608c      	addu      	r2, r3
+    3ca8:	0c37      	bf      	0x3d16	// 3d16 <TK_Keymap_prog+0xb2>
+    3caa:	3100      	movi      	r1, 0
+    3cac:	aa20      	st.h      	r1, (r2, 0x0)
+    3cae:	9840      	ld.w      	r2, (r14, 0x0)
+    3cb0:	3a01      	cmphsi      	r2, 2
+    3cb2:	0c6d      	bf      	0x3d8c	// 3d8c <TK_Keymap_prog+0x128>
+    3cb4:	4461      	lsli      	r3, r4, 1
+    3cb6:	5e2c      	addu      	r1, r6, r3
+    3cb8:	1205      	lrw      	r0, 0x20000126	// 3dcc <TK_Keymap_prog+0x168>
+    3cba:	8940      	ld.h      	r2, (r1, 0x0)
+    3cbc:	60c0      	addu      	r3, r0
+    3cbe:	748b      	sexth      	r2, r2
+    3cc0:	8b60      	ld.h      	r3, (r3, 0x0)
+    3cc2:	648d      	cmplt      	r3, r2
+    3cc4:	9840      	ld.w      	r2, (r14, 0x0)
+    3cc6:	7cc8      	mult      	r3, r2
+    3cc8:	0c2a      	bf      	0x3d1c	// 3d1c <TK_Keymap_prog+0xb8>
+    3cca:	8940      	ld.h      	r2, (r1, 0x0)
+    3ccc:	748b      	sexth      	r2, r2
+    3cce:	64c9      	cmplt      	r2, r3
+    3cd0:	0c26      	bf      	0x3d1c	// 3d1c <TK_Keymap_prog+0xb8>
+    3cd2:	1240      	lrw      	r2, 0x200002f0	// 3dd0 <TK_Keymap_prog+0x16c>
+    3cd4:	6090      	addu      	r2, r4
+    3cd6:	8260      	ld.b      	r3, (r2, 0x0)
+    3cd8:	2300      	addi      	r3, 1
+    3cda:	74cc      	zextb      	r3, r3
+    3cdc:	a260      	st.b      	r3, (r2, 0x0)
+    3cde:	3100      	movi      	r1, 0
+    3ce0:	117d      	lrw      	r3, 0x200002d6	// 3dd4 <TK_Keymap_prog+0x170>
+    3ce2:	60d0      	addu      	r3, r4
+    3ce4:	a320      	st.b      	r1, (r3, 0x0)
+    3ce6:	117d      	lrw      	r3, 0x200003b2	// 3dd8 <TK_Keymap_prog+0x174>
+    3ce8:	60d0      	addu      	r3, r4
+    3cea:	a320      	st.b      	r1, (r3, 0x0)
+    3cec:	117c      	lrw      	r3, 0x2000042c	// 3ddc <TK_Keymap_prog+0x178>
+    3cee:	60d0      	addu      	r3, r4
+    3cf0:	a320      	st.b      	r1, (r3, 0x0)
+    3cf2:	8260      	ld.b      	r3, (r2, 0x0)
+    3cf4:	9821      	ld.w      	r1, (r14, 0x4)
+    3cf6:	64c4      	cmphs      	r1, r3
+    3cf8:	081f      	bt      	0x3d36	// 3d36 <TK_Keymap_prog+0xd2>
+    3cfa:	3d40      	cmpnei      	r5, 0
+    3cfc:	0852      	bt      	0x3da0	// 3da0 <TK_Keymap_prog+0x13c>
+    3cfe:	1139      	lrw      	r1, 0x200002e8	// 3de0 <TK_Keymap_prog+0x17c>
+    3d00:	9160      	ld.w      	r3, (r1, 0x0)
+    3d02:	3b40      	cmpnei      	r3, 0
+    3d04:	0806      	bt      	0x3d10	// 3d10 <TK_Keymap_prog+0xac>
+    3d06:	9100      	ld.w      	r0, (r1, 0x0)
+    3d08:	3301      	movi      	r3, 1
+    3d0a:	70d0      	lsl      	r3, r4
+    3d0c:	6cc0      	or      	r3, r0
+    3d0e:	b160      	st.w      	r3, (r1, 0x0)
+    3d10:	3300      	movi      	r3, 0
+    3d12:	a260      	st.b      	r3, (r2, 0x0)
+    3d14:	0411      	br      	0x3d36	// 3d36 <TK_Keymap_prog+0xd2>
+    3d16:	8920      	ld.h      	r1, (r1, 0x0)
+    3d18:	7445      	zexth      	r1, r1
+    3d1a:	07c9      	br      	0x3cac	// 3cac <TK_Keymap_prog+0x48>
+    3d1c:	4441      	lsli      	r2, r4, 1
+    3d1e:	6098      	addu      	r2, r6
+    3d20:	8a40      	ld.h      	r2, (r2, 0x0)
+    3d22:	748b      	sexth      	r2, r2
+    3d24:	648d      	cmplt      	r3, r2
+    3d26:	0c08      	bf      	0x3d36	// 3d36 <TK_Keymap_prog+0xd2>
+    3d28:	3300      	movi      	r3, 0
+    3d2a:	114e      	lrw      	r2, 0x200002e8	// 3de0 <TK_Keymap_prog+0x17c>
+    3d2c:	2b01      	subi      	r3, 2
+    3d2e:	9220      	ld.w      	r1, (r2, 0x0)
+    3d30:	70d3      	rotl      	r3, r4
+    3d32:	68c4      	and      	r3, r1
+    3d34:	b260      	st.w      	r3, (r2, 0x0)
+    3d36:	4441      	lsli      	r2, r4, 1
+    3d38:	5e68      	addu      	r3, r6, r2
+    3d3a:	8b60      	ld.h      	r3, (r3, 0x0)
+    3d3c:	74cf      	sexth      	r3, r3
+    3d3e:	b864      	st.w      	r3, (r14, 0x10)
+    3d40:	3105      	movi      	r1, 5
+    3d42:	1163      	lrw      	r3, 0x20000126	// 3dcc <TK_Keymap_prog+0x168>
+    3d44:	608c      	addu      	r2, r3
+    3d46:	8a00      	ld.h      	r0, (r2, 0x0)
+    3d48:	4002      	lsli      	r0, r0, 2
+    3d4a:	e3fff8d7 	bsr      	0x2ef8	// 2ef8 <__divsi3>
+    3d4e:	9864      	ld.w      	r3, (r14, 0x10)
+    3d50:	640d      	cmplt      	r3, r0
+    3d52:	0c18      	bf      	0x3d82	// 3d82 <TK_Keymap_prog+0x11e>
+    3d54:	1140      	lrw      	r2, 0x200002d6	// 3dd4 <TK_Keymap_prog+0x170>
+    3d56:	6090      	addu      	r2, r4
+    3d58:	8260      	ld.b      	r3, (r2, 0x0)
+    3d5a:	2300      	addi      	r3, 1
+    3d5c:	74cc      	zextb      	r3, r3
+    3d5e:	a260      	st.b      	r3, (r2, 0x0)
+    3d60:	3100      	movi      	r1, 0
+    3d62:	107c      	lrw      	r3, 0x200002f0	// 3dd0 <TK_Keymap_prog+0x16c>
+    3d64:	60d0      	addu      	r3, r4
+    3d66:	a320      	st.b      	r1, (r3, 0x0)
+    3d68:	8260      	ld.b      	r3, (r2, 0x0)
+    3d6a:	9822      	ld.w      	r1, (r14, 0x8)
+    3d6c:	64c4      	cmphs      	r1, r3
+    3d6e:	080a      	bt      	0x3d82	// 3d82 <TK_Keymap_prog+0x11e>
+    3d70:	3300      	movi      	r3, 0
+    3d72:	103c      	lrw      	r1, 0x200002e8	// 3de0 <TK_Keymap_prog+0x17c>
+    3d74:	2b01      	subi      	r3, 2
+    3d76:	9100      	ld.w      	r0, (r1, 0x0)
+    3d78:	70d3      	rotl      	r3, r4
+    3d7a:	68c0      	and      	r3, r0
+    3d7c:	b160      	st.w      	r3, (r1, 0x0)
+    3d7e:	3300      	movi      	r3, 0
+    3d80:	a260      	st.b      	r3, (r2, 0x0)
+    3d82:	2400      	addi      	r4, 1
+    3d84:	3c51      	cmpnei      	r4, 17
+    3d86:	0b81      	bt      	0x3c88	// 3c88 <TK_Keymap_prog+0x24>
+    3d88:	1405      	addi      	r14, r14, 20
+    3d8a:	1494      	pop      	r4-r7, r15
+    3d8c:	60d8      	addu      	r3, r6
+    3d8e:	4441      	lsli      	r2, r4, 1
+    3d90:	102f      	lrw      	r1, 0x20000126	// 3dcc <TK_Keymap_prog+0x168>
+    3d92:	8b60      	ld.h      	r3, (r3, 0x0)
+    3d94:	6084      	addu      	r2, r1
+    3d96:	74cf      	sexth      	r3, r3
+    3d98:	8a40      	ld.h      	r2, (r2, 0x0)
+    3d9a:	64c9      	cmplt      	r2, r3
+    3d9c:	0fcd      	bf      	0x3d36	// 3d36 <TK_Keymap_prog+0xd2>
+    3d9e:	079a      	br      	0x3cd2	// 3cd2 <TK_Keymap_prog+0x6e>
+    3da0:	3d41      	cmpnei      	r5, 1
+    3da2:	0bb7      	bt      	0x3d10	// 3d10 <TK_Keymap_prog+0xac>
+    3da4:	102f      	lrw      	r1, 0x200002e8	// 3de0 <TK_Keymap_prog+0x17c>
+    3da6:	6cd7      	mov      	r3, r5
+    3da8:	9100      	ld.w      	r0, (r1, 0x0)
+    3daa:	07b0      	br      	0x3d0a	// 3d0a <TK_Keymap_prog+0xa6>
+    3dac:	200000f8 	.long	0x200000f8
+    3db0:	200000cc 	.long	0x200000cc
+    3db4:	20000302 	.long	0x20000302
+    3db8:	200000d5 	.long	0x200000d5
+    3dbc:	200000d4 	.long	0x200000d4
+    3dc0:	200004fe 	.long	0x200004fe
+    3dc4:	20000258 	.long	0x20000258
+    3dc8:	200004ba 	.long	0x200004ba
+    3dcc:	20000126 	.long	0x20000126
+    3dd0:	200002f0 	.long	0x200002f0
+    3dd4:	200002d6 	.long	0x200002d6
+    3dd8:	200003b2 	.long	0x200003b2
+    3ddc:	2000042c 	.long	0x2000042c
+    3de0:	200002e8 	.long	0x200002e8
+
+Disassembly of section .text.TK_overflow_predict:
+
+00003de4 <TK_overflow_predict>:
+    3de4:	14d4      	push      	r4-r7, r15
+    3de6:	1421      	subi      	r14, r14, 4
+    3de8:	11d9      	lrw      	r6, 0x20000068	// 3ecc <TK_overflow_predict+0xe8>
+    3dea:	8665      	ld.b      	r3, (r6, 0x5)
+    3dec:	3b41      	cmpnei      	r3, 1
+    3dee:	085f      	bt      	0x3eac	// 3eac <TK_overflow_predict+0xc8>
+    3df0:	1158      	lrw      	r2, 0x20000408	// 3ed0 <TK_overflow_predict+0xec>
+    3df2:	8260      	ld.b      	r3, (r2, 0x0)
+    3df4:	2300      	addi      	r3, 1
+    3df6:	74cc      	zextb      	r3, r3
+    3df8:	a260      	st.b      	r3, (r2, 0x0)
+    3dfa:	8260      	ld.b      	r3, (r2, 0x0)
+    3dfc:	1136      	lrw      	r1, 0x200000f9	// 3ed4 <TK_overflow_predict+0xf0>
+    3dfe:	8120      	ld.b      	r1, (r1, 0x0)
+    3e00:	64c4      	cmphs      	r1, r3
+    3e02:	0855      	bt      	0x3eac	// 3eac <TK_overflow_predict+0xc8>
+    3e04:	3300      	movi      	r3, 0
+    3e06:	a260      	st.b      	r3, (r2, 0x0)
+    3e08:	3500      	movi      	r5, 0
+    3e0a:	11f4      	lrw      	r7, 0x200000fc	// 3ed8 <TK_overflow_predict+0xf4>
+    3e0c:	2605      	addi      	r6, 6
+    3e0e:	9760      	ld.w      	r3, (r7, 0x0)
+    3e10:	70d5      	lsr      	r3, r5
+    3e12:	3201      	movi      	r2, 1
+    3e14:	68c8      	and      	r3, r2
+    3e16:	3b40      	cmpnei      	r3, 0
+    3e18:	0c34      	bf      	0x3e80	// 3e80 <TK_overflow_predict+0x9c>
+    3e1a:	4581      	lsli      	r4, r5, 1
+    3e1c:	5e70      	addu      	r3, r6, r4
+    3e1e:	8b00      	ld.h      	r0, (r3, 0x0)
+    3e20:	e3ffebc0 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    3e24:	6cc7      	mov      	r3, r1
+    3e26:	3180      	movi      	r1, 128
+    3e28:	6c83      	mov      	r2, r0
+    3e2a:	4137      	lsli      	r1, r1, 23
+    3e2c:	3000      	movi      	r0, 0
+    3e2e:	e3ffe1c3 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    3e32:	116b      	lrw      	r3, 0x20000102	// 3edc <TK_overflow_predict+0xf8>
+    3e34:	60d0      	addu      	r3, r4
+    3e36:	8b60      	ld.h      	r3, (r3, 0x0)
+    3e38:	4364      	lsli      	r3, r3, 4
+    3e3a:	230e      	addi      	r3, 15
+    3e3c:	b860      	st.w      	r3, (r14, 0x0)
+    3e3e:	e3ffe769 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    3e42:	9860      	ld.w      	r3, (r14, 0x0)
+    3e44:	7cc0      	mult      	r3, r0
+    3e46:	1147      	lrw      	r2, 0x20000498	// 3ee0 <TK_overflow_predict+0xfc>
+    3e48:	740d      	zexth      	r0, r3
+    3e4a:	6090      	addu      	r2, r4
+    3e4c:	1166      	lrw      	r3, 0x200004fe	// 3ee4 <TK_overflow_predict+0x100>
+    3e4e:	60d0      	addu      	r3, r4
+    3e50:	aa00      	st.h      	r0, (r2, 0x0)
+    3e52:	8b60      	ld.h      	r3, (r3, 0x0)
+    3e54:	8a00      	ld.h      	r0, (r2, 0x0)
+    3e56:	7401      	zexth      	r0, r0
+    3e58:	325f      	movi      	r2, 95
+    3e5a:	74cd      	zexth      	r3, r3
+    3e5c:	7c08      	mult      	r0, r2
+    3e5e:	3164      	movi      	r1, 100
+    3e60:	b860      	st.w      	r3, (r14, 0x0)
+    3e62:	e3fff84b 	bsr      	0x2ef8	// 2ef8 <__divsi3>
+    3e66:	9860      	ld.w      	r3, (r14, 0x0)
+    3e68:	64c1      	cmplt      	r0, r3
+    3e6a:	0c0b      	bf      	0x3e80	// 3e80 <TK_overflow_predict+0x9c>
+    3e6c:	107f      	lrw      	r3, 0x200000d6	// 3ee8 <TK_overflow_predict+0x104>
+    3e6e:	610c      	addu      	r4, r3
+    3e70:	8c60      	ld.h      	r3, (r4, 0x0)
+    3e72:	3b06      	cmphsi      	r3, 7
+    3e74:	0806      	bt      	0x3e80	// 3e80 <TK_overflow_predict+0x9c>
+    3e76:	2300      	addi      	r3, 1
+    3e78:	ac60      	st.h      	r3, (r4, 0x0)
+    3e7a:	3201      	movi      	r2, 1
+    3e7c:	107c      	lrw      	r3, 0x2000035d	// 3eec <TK_overflow_predict+0x108>
+    3e7e:	a340      	st.b      	r2, (r3, 0x0)
+    3e80:	2500      	addi      	r5, 1
+    3e82:	3d51      	cmpnei      	r5, 17
+    3e84:	0bc5      	bt      	0x3e0e	// 3e0e <TK_overflow_predict+0x2a>
+    3e86:	107a      	lrw      	r3, 0x2000035d	// 3eec <TK_overflow_predict+0x108>
+    3e88:	8340      	ld.b      	r2, (r3, 0x0)
+    3e8a:	3a41      	cmpnei      	r2, 1
+    3e8c:	0810      	bt      	0x3eac	// 3eac <TK_overflow_predict+0xc8>
+    3e8e:	3200      	movi      	r2, 0
+    3e90:	a340      	st.b      	r2, (r3, 0x0)
+    3e92:	3200      	movi      	r2, 0
+    3e94:	1077      	lrw      	r3, 0x20000058	// 3ef0 <TK_overflow_predict+0x10c>
+    3e96:	1018      	lrw      	r0, 0x2000042b	// 3ef4 <TK_overflow_predict+0x110>
+    3e98:	10b8      	lrw      	r5, 0x20000464	// 3ef8 <TK_overflow_predict+0x114>
+    3e9a:	10d4      	lrw      	r6, 0x200000d6	// 3ee8 <TK_overflow_predict+0x104>
+    3e9c:	9360      	ld.w      	r3, (r3, 0x0)
+    3e9e:	b342      	st.w      	r2, (r3, 0x8)
+    3ea0:	1077      	lrw      	r3, 0x20000054	// 3efc <TK_overflow_predict+0x118>
+    3ea2:	9380      	ld.w      	r4, (r3, 0x0)
+    3ea4:	3300      	movi      	r3, 0
+    3ea6:	8040      	ld.b      	r2, (r0, 0x0)
+    3ea8:	648c      	cmphs      	r3, r2
+    3eaa:	0c03      	bf      	0x3eb0	// 3eb0 <TK_overflow_predict+0xcc>
+    3eac:	1401      	addi      	r14, r14, 4
+    3eae:	1494      	pop      	r4-r7, r15
+    3eb0:	5d4c      	addu      	r2, r5, r3
+    3eb2:	8240      	ld.b      	r2, (r2, 0x0)
+    3eb4:	4241      	lsli      	r2, r2, 1
+    3eb6:	4322      	lsli      	r1, r3, 2
+    3eb8:	6098      	addu      	r2, r6
+    3eba:	6050      	addu      	r1, r4
+    3ebc:	8a40      	ld.h      	r2, (r2, 0x0)
+    3ebe:	91f2      	ld.w      	r7, (r1, 0x48)
+    3ec0:	4254      	lsli      	r2, r2, 20
+    3ec2:	6c9c      	or      	r2, r7
+    3ec4:	2300      	addi      	r3, 1
+    3ec6:	b152      	st.w      	r2, (r1, 0x48)
+    3ec8:	74cc      	zextb      	r3, r3
+    3eca:	07ee      	br      	0x3ea6	// 3ea6 <TK_overflow_predict+0xc2>
+    3ecc:	20000068 	.long	0x20000068
+    3ed0:	20000408 	.long	0x20000408
+    3ed4:	200000f9 	.long	0x200000f9
+    3ed8:	200000fc 	.long	0x200000fc
+    3edc:	20000102 	.long	0x20000102
+    3ee0:	20000498 	.long	0x20000498
+    3ee4:	200004fe 	.long	0x200004fe
+    3ee8:	200000d6 	.long	0x200000d6
+    3eec:	2000035d 	.long	0x2000035d
+    3ef0:	20000058 	.long	0x20000058
+    3ef4:	2000042b 	.long	0x2000042b
+    3ef8:	20000464 	.long	0x20000464
+    3efc:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00003f00 <TK_Baseline_tracking>:
+    3f00:	14c4      	push      	r4-r7
+    3f02:	1422      	subi      	r14, r14, 8
+    3f04:	1348      	lrw      	r2, 0x2000038a	// 40a4 <TK_Baseline_tracking+0x1a4>
+    3f06:	8260      	ld.b      	r3, (r2, 0x0)
+    3f08:	2300      	addi      	r3, 1
+    3f0a:	74cc      	zextb      	r3, r3
+    3f0c:	a260      	st.b      	r3, (r2, 0x0)
+    3f0e:	8260      	ld.b      	r3, (r2, 0x0)
+    3f10:	1326      	lrw      	r1, 0x200000f9	// 40a8 <TK_Baseline_tracking+0x1a8>
+    3f12:	8120      	ld.b      	r1, (r1, 0x0)
+    3f14:	644c      	cmphs      	r3, r1
+    3f16:	0cad      	bf      	0x4070	// 4070 <TK_Baseline_tracking+0x170>
+    3f18:	3300      	movi      	r3, 0
+    3f1a:	a260      	st.b      	r3, (r2, 0x0)
+    3f1c:	1364      	lrw      	r3, 0x200002e8	// 40ac <TK_Baseline_tracking+0x1ac>
+    3f1e:	9360      	ld.w      	r3, (r3, 0x0)
+    3f20:	3b40      	cmpnei      	r3, 0
+    3f22:	08a7      	bt      	0x4070	// 4070 <TK_Baseline_tracking+0x170>
+    3f24:	1323      	lrw      	r1, 0x20000302	// 40b0 <TK_Baseline_tracking+0x1b0>
+    3f26:	6dc7      	mov      	r7, r1
+    3f28:	b820      	st.w      	r1, (r14, 0x0)
+    3f2a:	3200      	movi      	r2, 0
+    3f2c:	1362      	lrw      	r3, 0x20000126	// 40b4 <TK_Baseline_tracking+0x1b4>
+    3f2e:	1323      	lrw      	r1, 0x20000258	// 40b8 <TK_Baseline_tracking+0x1b8>
+    3f30:	4201      	lsli      	r0, r2, 1
+    3f32:	9880      	ld.w      	r4, (r14, 0x0)
+    3f34:	6100      	addu      	r4, r0
+    3f36:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f38:	7513      	sexth      	r4, r4
+    3f3a:	3cdf      	btsti      	r4, 31
+    3f3c:	0c27      	bf      	0x3f8a	// 3f8a <TK_Baseline_tracking+0x8a>
+    3f3e:	13a0      	lrw      	r5, 0x200004fe	// 40bc <TK_Baseline_tracking+0x1bc>
+    3f40:	5980      	addu      	r4, r1, r0
+    3f42:	6014      	addu      	r0, r5
+    3f44:	b881      	st.w      	r4, (r14, 0x4)
+    3f46:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f48:	88c0      	ld.h      	r6, (r0, 0x0)
+    3f4a:	7511      	zexth      	r4, r4
+    3f4c:	7599      	zexth      	r6, r6
+    3f4e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    3f50:	611a      	subu      	r4, r6
+    3f52:	6551      	cmplt      	r4, r5
+    3f54:	081b      	bt      	0x3f8a	// 3f8a <TK_Baseline_tracking+0x8a>
+    3f56:	9881      	ld.w      	r4, (r14, 0x4)
+    3f58:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f5a:	8800      	ld.h      	r0, (r0, 0x0)
+    3f5c:	7511      	zexth      	r4, r4
+    3f5e:	7401      	zexth      	r0, r0
+    3f60:	5c01      	subu      	r0, r4, r0
+    3f62:	4581      	lsli      	r4, r5, 1
+    3f64:	6150      	addu      	r5, r4
+    3f66:	6541      	cmplt      	r0, r5
+    3f68:	0c11      	bf      	0x3f8a	// 3f8a <TK_Baseline_tracking+0x8a>
+    3f6a:	1296      	lrw      	r4, 0x2000042c	// 40c0 <TK_Baseline_tracking+0x1c0>
+    3f6c:	6108      	addu      	r4, r2
+    3f6e:	8400      	ld.b      	r0, (r4, 0x0)
+    3f70:	2000      	addi      	r0, 1
+    3f72:	7400      	zextb      	r0, r0
+    3f74:	a400      	st.b      	r0, (r4, 0x0)
+    3f76:	1214      	lrw      	r0, 0x20000088	// 40c4 <TK_Baseline_tracking+0x1c4>
+    3f78:	84a0      	ld.b      	r5, (r4, 0x0)
+    3f7a:	8008      	ld.b      	r0, (r0, 0x8)
+    3f7c:	6540      	cmphs      	r0, r5
+    3f7e:	0806      	bt      	0x3f8a	// 3f8a <TK_Baseline_tracking+0x8a>
+    3f80:	1212      	lrw      	r0, 0x2000036f	// 40c8 <TK_Baseline_tracking+0x1c8>
+    3f82:	3501      	movi      	r5, 1
+    3f84:	a0a0      	st.b      	r5, (r0, 0x0)
+    3f86:	3000      	movi      	r0, 0
+    3f88:	a400      	st.b      	r0, (r4, 0x0)
+    3f8a:	4201      	lsli      	r0, r2, 1
+    3f8c:	5f80      	addu      	r4, r7, r0
+    3f8e:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f90:	7513      	sexth      	r4, r4
+    3f92:	3c20      	cmplti      	r4, 1
+    3f94:	0870      	bt      	0x4074	// 4074 <TK_Baseline_tracking+0x174>
+    3f96:	128a      	lrw      	r4, 0x200004fe	// 40bc <TK_Baseline_tracking+0x1bc>
+    3f98:	6100      	addu      	r4, r0
+    3f9a:	59a0      	addu      	r5, r1, r0
+    3f9c:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f9e:	8da0      	ld.h      	r5, (r5, 0x0)
+    3fa0:	7555      	zexth      	r5, r5
+    3fa2:	7511      	zexth      	r4, r4
+    3fa4:	6116      	subu      	r4, r5
+    3fa6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    3fa8:	45a2      	lsli      	r5, r5, 2
+    3faa:	6551      	cmplt      	r4, r5
+    3fac:	0864      	bt      	0x4074	// 4074 <TK_Baseline_tracking+0x174>
+    3fae:	1288      	lrw      	r4, 0x200003b2	// 40cc <TK_Baseline_tracking+0x1cc>
+    3fb0:	6108      	addu      	r4, r2
+    3fb2:	84a0      	ld.b      	r5, (r4, 0x0)
+    3fb4:	2500      	addi      	r5, 1
+    3fb6:	7554      	zextb      	r5, r5
+    3fb8:	a4a0      	st.b      	r5, (r4, 0x0)
+    3fba:	12a3      	lrw      	r5, 0x20000088	// 40c4 <TK_Baseline_tracking+0x1c4>
+    3fbc:	84c0      	ld.b      	r6, (r4, 0x0)
+    3fbe:	85a9      	ld.b      	r5, (r5, 0x9)
+    3fc0:	6594      	cmphs      	r5, r6
+    3fc2:	0806      	bt      	0x3fce	// 3fce <TK_Baseline_tracking+0xce>
+    3fc4:	12a1      	lrw      	r5, 0x2000036f	// 40c8 <TK_Baseline_tracking+0x1c8>
+    3fc6:	3601      	movi      	r6, 1
+    3fc8:	a5c0      	st.b      	r6, (r5, 0x0)
+    3fca:	3500      	movi      	r5, 0
+    3fcc:	a4a0      	st.b      	r5, (r4, 0x0)
+    3fce:	5f80      	addu      	r4, r7, r0
+    3fd0:	8c80      	ld.h      	r4, (r4, 0x0)
+    3fd2:	7513      	sexth      	r4, r4
+    3fd4:	3cdf      	btsti      	r4, 31
+    3fd6:	0c10      	bf      	0x3ff6	// 3ff6 <TK_Baseline_tracking+0xf6>
+    3fd8:	11d9      	lrw      	r6, 0x200004fe	// 40bc <TK_Baseline_tracking+0x1bc>
+    3fda:	59a0      	addu      	r5, r1, r0
+    3fdc:	6180      	addu      	r6, r0
+    3fde:	8d80      	ld.h      	r4, (r5, 0x0)
+    3fe0:	8ec0      	ld.h      	r6, (r6, 0x0)
+    3fe2:	7599      	zexth      	r6, r6
+    3fe4:	7511      	zexth      	r4, r4
+    3fe6:	611a      	subu      	r4, r6
+    3fe8:	8bc0      	ld.h      	r6, (r3, 0x0)
+    3fea:	6591      	cmplt      	r4, r6
+    3fec:	0c05      	bf      	0x3ff6	// 3ff6 <TK_Baseline_tracking+0xf6>
+    3fee:	8d80      	ld.h      	r4, (r5, 0x0)
+    3ff0:	2c00      	subi      	r4, 1
+    3ff2:	7511      	zexth      	r4, r4
+    3ff4:	ad80      	st.h      	r4, (r5, 0x0)
+    3ff6:	5f80      	addu      	r4, r7, r0
+    3ff8:	8c80      	ld.h      	r4, (r4, 0x0)
+    3ffa:	7513      	sexth      	r4, r4
+    3ffc:	3cdf      	btsti      	r4, 31
+    3ffe:	0c11      	bf      	0x4020	// 4020 <TK_Baseline_tracking+0x120>
+    4000:	11cf      	lrw      	r6, 0x200004fe	// 40bc <TK_Baseline_tracking+0x1bc>
+    4002:	59a0      	addu      	r5, r1, r0
+    4004:	6180      	addu      	r6, r0
+    4006:	8d80      	ld.h      	r4, (r5, 0x0)
+    4008:	8ec0      	ld.h      	r6, (r6, 0x0)
+    400a:	7599      	zexth      	r6, r6
+    400c:	7511      	zexth      	r4, r4
+    400e:	611a      	subu      	r4, r6
+    4010:	8bc0      	ld.h      	r6, (r3, 0x0)
+    4012:	4ec1      	lsri      	r6, r6, 1
+    4014:	6591      	cmplt      	r4, r6
+    4016:	0805      	bt      	0x4020	// 4020 <TK_Baseline_tracking+0x120>
+    4018:	8d80      	ld.h      	r4, (r5, 0x0)
+    401a:	2c01      	subi      	r4, 2
+    401c:	7511      	zexth      	r4, r4
+    401e:	ad80      	st.h      	r4, (r5, 0x0)
+    4020:	5fa0      	addu      	r5, r7, r0
+    4022:	8d80      	ld.h      	r4, (r5, 0x0)
+    4024:	7513      	sexth      	r4, r4
+    4026:	3c20      	cmplti      	r4, 1
+    4028:	080c      	bt      	0x4040	// 4040 <TK_Baseline_tracking+0x140>
+    402a:	8da0      	ld.h      	r5, (r5, 0x0)
+    402c:	8b80      	ld.h      	r4, (r3, 0x0)
+    402e:	7557      	sexth      	r5, r5
+    4030:	4c81      	lsri      	r4, r4, 1
+    4032:	6515      	cmplt      	r5, r4
+    4034:	0c06      	bf      	0x4040	// 4040 <TK_Baseline_tracking+0x140>
+    4036:	59a0      	addu      	r5, r1, r0
+    4038:	8d80      	ld.h      	r4, (r5, 0x0)
+    403a:	2400      	addi      	r4, 1
+    403c:	7511      	zexth      	r4, r4
+    403e:	ad80      	st.h      	r4, (r5, 0x0)
+    4040:	5fa0      	addu      	r5, r7, r0
+    4042:	8d80      	ld.h      	r4, (r5, 0x0)
+    4044:	7513      	sexth      	r4, r4
+    4046:	3c20      	cmplti      	r4, 1
+    4048:	0810      	bt      	0x4068	// 4068 <TK_Baseline_tracking+0x168>
+    404a:	8dc0      	ld.h      	r6, (r5, 0x0)
+    404c:	759b      	sexth      	r6, r6
+    404e:	8b80      	ld.h      	r4, (r3, 0x0)
+    4050:	6519      	cmplt      	r6, r4
+    4052:	0c0b      	bf      	0x4068	// 4068 <TK_Baseline_tracking+0x168>
+    4054:	8da0      	ld.h      	r5, (r5, 0x0)
+    4056:	7557      	sexth      	r5, r5
+    4058:	4c81      	lsri      	r4, r4, 1
+    405a:	6515      	cmplt      	r5, r4
+    405c:	0806      	bt      	0x4068	// 4068 <TK_Baseline_tracking+0x168>
+    405e:	6004      	addu      	r0, r1
+    4060:	8880      	ld.h      	r4, (r0, 0x0)
+    4062:	2401      	addi      	r4, 2
+    4064:	7511      	zexth      	r4, r4
+    4066:	a880      	st.h      	r4, (r0, 0x0)
+    4068:	2200      	addi      	r2, 1
+    406a:	3a51      	cmpnei      	r2, 17
+    406c:	2301      	addi      	r3, 2
+    406e:	0b61      	bt      	0x3f30	// 3f30 <TK_Baseline_tracking+0x30>
+    4070:	1402      	addi      	r14, r14, 8
+    4072:	1484      	pop      	r4-r7
+    4074:	5f80      	addu      	r4, r7, r0
+    4076:	8c80      	ld.h      	r4, (r4, 0x0)
+    4078:	7513      	sexth      	r4, r4
+    407a:	3cdf      	btsti      	r4, 31
+    407c:	0fa9      	bf      	0x3fce	// 3fce <TK_Baseline_tracking+0xce>
+    407e:	10b0      	lrw      	r5, 0x200004fe	// 40bc <TK_Baseline_tracking+0x1bc>
+    4080:	5980      	addu      	r4, r1, r0
+    4082:	6140      	addu      	r5, r0
+    4084:	8c80      	ld.h      	r4, (r4, 0x0)
+    4086:	8da0      	ld.h      	r5, (r5, 0x0)
+    4088:	7555      	zexth      	r5, r5
+    408a:	8bc0      	ld.h      	r6, (r3, 0x0)
+    408c:	7511      	zexth      	r4, r4
+    408e:	6116      	subu      	r4, r5
+    4090:	46a1      	lsli      	r5, r6, 1
+    4092:	6158      	addu      	r5, r6
+    4094:	6551      	cmplt      	r4, r5
+    4096:	0b9c      	bt      	0x3fce	// 3fce <TK_Baseline_tracking+0xce>
+    4098:	108c      	lrw      	r4, 0x2000036f	// 40c8 <TK_Baseline_tracking+0x1c8>
+    409a:	3501      	movi      	r5, 1
+    409c:	a4a0      	st.b      	r5, (r4, 0x0)
+    409e:	6c03      	mov      	r0, r0
+    40a0:	0797      	br      	0x3fce	// 3fce <TK_Baseline_tracking+0xce>
+    40a2:	0000      	bkpt
+    40a4:	2000038a 	.long	0x2000038a
+    40a8:	200000f9 	.long	0x200000f9
+    40ac:	200002e8 	.long	0x200002e8
+    40b0:	20000302 	.long	0x20000302
+    40b4:	20000126 	.long	0x20000126
+    40b8:	20000258 	.long	0x20000258
+    40bc:	200004fe 	.long	0x200004fe
+    40c0:	2000042c 	.long	0x2000042c
+    40c4:	20000088 	.long	0x20000088
+    40c8:	2000036f 	.long	0x2000036f
+    40cc:	200003b2 	.long	0x200003b2
+
+Disassembly of section .text.TK_result_prog:
+
+000040d0 <TK_result_prog>:
+    40d0:	14d2      	push      	r4-r5, r15
+    40d2:	1050      	lrw      	r2, 0x200002e8	// 4110 <TK_result_prog+0x40>
+    40d4:	1090      	lrw      	r4, 0x2000038c	// 4114 <TK_result_prog+0x44>
+    40d6:	9260      	ld.w      	r3, (r2, 0x0)
+    40d8:	3b40      	cmpnei      	r3, 0
+    40da:	0c02      	bf      	0x40de	// 40de <TK_result_prog+0xe>
+    40dc:	9260      	ld.w      	r3, (r2, 0x0)
+    40de:	b460      	st.w      	r3, (r4, 0x0)
+    40e0:	9460      	ld.w      	r3, (r4, 0x0)
+    40e2:	3b40      	cmpnei      	r3, 0
+    40e4:	10ad      	lrw      	r5, 0x20000460	// 4118 <TK_result_prog+0x48>
+    40e6:	0c11      	bf      	0x4108	// 4108 <TK_result_prog+0x38>
+    40e8:	9440      	ld.w      	r2, (r4, 0x0)
+    40ea:	9560      	ld.w      	r3, (r5, 0x0)
+    40ec:	64ca      	cmpne      	r2, r3
+    40ee:	0c03      	bf      	0x40f4	// 40f4 <TK_result_prog+0x24>
+    40f0:	9460      	ld.w      	r3, (r4, 0x0)
+    40f2:	b560      	st.w      	r3, (r5, 0x0)
+    40f4:	e3fffd94 	bsr      	0x3c1c	// 3c1c <get_key_number>
+    40f8:	1069      	lrw      	r3, 0x20000100	// 411c <TK_result_prog+0x4c>
+    40fa:	8360      	ld.b      	r3, (r3, 0x0)
+    40fc:	640c      	cmphs      	r3, r0
+    40fe:	0804      	bt      	0x4106	// 4106 <TK_result_prog+0x36>
+    4100:	3300      	movi      	r3, 0
+    4102:	b460      	st.w      	r3, (r4, 0x0)
+    4104:	b560      	st.w      	r3, (r5, 0x0)
+    4106:	1492      	pop      	r4-r5, r15
+    4108:	1046      	lrw      	r2, 0x20000384	// 4120 <TK_result_prog+0x50>
+    410a:	b560      	st.w      	r3, (r5, 0x0)
+    410c:	b260      	st.w      	r3, (r2, 0x0)
+    410e:	07fc      	br      	0x4106	// 4106 <TK_result_prog+0x36>
+    4110:	200002e8 	.long	0x200002e8
+    4114:	2000038c 	.long	0x2000038c
+    4118:	20000460 	.long	0x20000460
+    411c:	20000100 	.long	0x20000100
+    4120:	20000384 	.long	0x20000384
+
+Disassembly of section .text.CORETHandler:
+
+00004124 <CORETHandler>:
+    4124:	1460      	nie
+    4126:	1462      	ipush
+    4128:	14d1      	push      	r4, r15
+    412a:	1077      	lrw      	r3, 0x20000064	// 4184 <CORETHandler+0x60>
+    412c:	3400      	movi      	r4, 0
+    412e:	9360      	ld.w      	r3, (r3, 0x0)
+    4130:	b386      	st.w      	r4, (r3, 0x18)
+    4132:	1076      	lrw      	r3, 0x200002ec	// 4188 <CORETHandler+0x64>
+    4134:	8360      	ld.b      	r3, (r3, 0x0)
+    4136:	3b41      	cmpnei      	r3, 1
+    4138:	0820      	bt      	0x4178	// 4178 <CORETHandler+0x54>
+    413a:	e3fffd85 	bsr      	0x3c44	// 3c44 <TK_Scan_Start>
+    413e:	e3fffd93 	bsr      	0x3c64	// 3c64 <TK_Keymap_prog>
+    4142:	e3fffe51 	bsr      	0x3de4	// 3de4 <TK_overflow_predict>
+    4146:	e3fffedd 	bsr      	0x3f00	// 3f00 <TK_Baseline_tracking>
+    414a:	e3ffffc3 	bsr      	0x40d0	// 40d0 <TK_result_prog>
+    414e:	1070      	lrw      	r3, 0x2000038c	// 418c <CORETHandler+0x68>
+    4150:	9360      	ld.w      	r3, (r3, 0x0)
+    4152:	3b40      	cmpnei      	r3, 0
+    4154:	0c12      	bf      	0x4178	// 4178 <CORETHandler+0x54>
+    4156:	106f      	lrw      	r3, 0x200000d0	// 4190 <CORETHandler+0x6c>
+    4158:	9340      	ld.w      	r2, (r3, 0x0)
+    415a:	3a40      	cmpnei      	r2, 0
+    415c:	0c0e      	bf      	0x4178	// 4178 <CORETHandler+0x54>
+    415e:	106e      	lrw      	r3, 0x20000384	// 4194 <CORETHandler+0x70>
+    4160:	3064      	movi      	r0, 100
+    4162:	9320      	ld.w      	r1, (r3, 0x0)
+    4164:	2100      	addi      	r1, 1
+    4166:	b320      	st.w      	r1, (r3, 0x0)
+    4168:	9320      	ld.w      	r1, (r3, 0x0)
+    416a:	7c80      	mult      	r2, r0
+    416c:	6448      	cmphs      	r2, r1
+    416e:	0805      	bt      	0x4178	// 4178 <CORETHandler+0x54>
+    4170:	104a      	lrw      	r2, 0x2000036f	// 4198 <CORETHandler+0x74>
+    4172:	3101      	movi      	r1, 1
+    4174:	a220      	st.b      	r1, (r2, 0x0)
+    4176:	b380      	st.w      	r4, (r3, 0x0)
+    4178:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    417c:	9880      	ld.w      	r4, (r14, 0x0)
+    417e:	1402      	addi      	r14, r14, 8
+    4180:	1463      	ipop
+    4182:	1461      	nir
+    4184:	20000064 	.long	0x20000064
+    4188:	200002ec 	.long	0x200002ec
+    418c:	2000038c 	.long	0x2000038c
+    4190:	200000d0 	.long	0x200000d0
+    4194:	20000384 	.long	0x20000384
+    4198:	2000036f 	.long	0x2000036f
+
+Disassembly of section .text.std_clk_calib:
+
+0000419c <std_clk_calib>:
+    419c:	14d4      	push      	r4-r7, r15
+    419e:	142d      	subi      	r14, r14, 52
+    41a0:	3201      	movi      	r2, 1
+    41a2:	03ce      	lrw      	r6, 0x2000005c	// 43e4 <std_clk_calib+0x248>
+    41a4:	6cc3      	mov      	r3, r0
+    41a6:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    41aa:	9640      	ld.w      	r2, (r6, 0x0)
+    41ac:	9247      	ld.w      	r2, (r2, 0x1c)
+    41ae:	7488      	zextb      	r2, r2
+    41b0:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    41b4:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    41b8:	3a40      	cmpnei      	r2, 0
+    41ba:	0c08      	bf      	0x41ca	// 41ca <std_clk_calib+0x2e>
+    41bc:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    41c0:	3a42      	cmpnei      	r2, 2
+    41c2:	0c04      	bf      	0x41ca	// 41ca <std_clk_calib+0x2e>
+    41c4:	3000      	movi      	r0, 0
+    41c6:	140d      	addi      	r14, r14, 52
+    41c8:	1494      	pop      	r4-r7, r15
+    41ca:	0397      	lrw      	r4, 0x2000000c	// 43e8 <std_clk_calib+0x24c>
+    41cc:	3209      	movi      	r2, 9
+    41ce:	9400      	ld.w      	r0, (r4, 0x0)
+    41d0:	3b40      	cmpnei      	r3, 0
+    41d2:	b041      	st.w      	r2, (r0, 0x4)
+    41d4:	0857      	bt      	0x4282	// 4282 <std_clk_calib+0xe6>
+    41d6:	3307      	movi      	r3, 7
+    41d8:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    41dc:	037b      	lrw      	r3, 0x2dc6c00	// 43ec <std_clk_calib+0x250>
+    41de:	b863      	st.w      	r3, (r14, 0xc)
+    41e0:	3380      	movi      	r3, 128
+    41e2:	4362      	lsli      	r3, r3, 2
+    41e4:	b867      	st.w      	r3, (r14, 0x1c)
+    41e6:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    41ea:	74cc      	zextb      	r3, r3
+    41ec:	b062      	st.w      	r3, (r0, 0x8)
+    41ee:	037e      	lrw      	r3, 0xffff	// 43f0 <std_clk_calib+0x254>
+    41f0:	b063      	st.w      	r3, (r0, 0xc)
+    41f2:	3201      	movi      	r2, 1
+    41f4:	3101      	movi      	r1, 1
+    41f6:	03bf      	lrw      	r5, 0x20000014	// 43f4 <std_clk_calib+0x258>
+    41f8:	e3ffeeb0 	bsr      	0x1f58	// 1f58 <BT_ConfigInterrupt_CMD>
+    41fc:	95e0      	ld.w      	r7, (r5, 0x0)
+    41fe:	137f      	lrw      	r3, 0xbe9c0005	// 43f8 <std_clk_calib+0x25c>
+    4200:	b760      	st.w      	r3, (r7, 0x0)
+    4202:	135f      	lrw      	r2, 0x30010	// 43fc <std_clk_calib+0x260>
+    4204:	3300      	movi      	r3, 0
+    4206:	b762      	st.w      	r3, (r7, 0x8)
+    4208:	b743      	st.w      	r2, (r7, 0xc)
+    420a:	32d8      	movi      	r2, 216
+    420c:	b745      	st.w      	r2, (r7, 0x14)
+    420e:	974f      	ld.w      	r2, (r7, 0x3c)
+    4210:	3aa2      	bseti      	r2, 2
+    4212:	b74f      	st.w      	r2, (r7, 0x3c)
+    4214:	9803      	ld.w      	r0, (r14, 0xc)
+    4216:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    421a:	327d      	movi      	r2, 125
+    421c:	2100      	addi      	r1, 1
+    421e:	7c48      	mult      	r1, r2
+    4220:	b861      	st.w      	r3, (r14, 0x4)
+    4222:	e3fff67d 	bsr      	0x2f1c	// 2f1c <__udivsi3>
+    4226:	b804      	st.w      	r0, (r14, 0x10)
+    4228:	32fa      	movi      	r2, 250
+    422a:	9824      	ld.w      	r1, (r14, 0x10)
+    422c:	4242      	lsli      	r2, r2, 2
+    422e:	6448      	cmphs      	r2, r1
+    4230:	0bca      	bt      	0x41c4	// 41c4 <std_clk_calib+0x28>
+    4232:	9844      	ld.w      	r2, (r14, 0x10)
+    4234:	3178      	movi      	r1, 120
+    4236:	9804      	ld.w      	r0, (r14, 0x10)
+    4238:	b840      	st.w      	r2, (r14, 0x0)
+    423a:	e3fff671 	bsr      	0x2f1c	// 2f1c <__udivsi3>
+    423e:	9840      	ld.w      	r2, (r14, 0x0)
+    4240:	6082      	subu      	r2, r0
+    4242:	b845      	st.w      	r2, (r14, 0x14)
+    4244:	9804      	ld.w      	r0, (r14, 0x10)
+    4246:	3178      	movi      	r1, 120
+    4248:	9844      	ld.w      	r2, (r14, 0x10)
+    424a:	b840      	st.w      	r2, (r14, 0x0)
+    424c:	e3fff668 	bsr      	0x2f1c	// 2f1c <__udivsi3>
+    4250:	9840      	ld.w      	r2, (r14, 0x0)
+    4252:	6008      	addu      	r0, r2
+    4254:	b806      	st.w      	r0, (r14, 0x18)
+    4256:	c0807020 	psrclr      	ie
+    425a:	9640      	ld.w      	r2, (r6, 0x0)
+    425c:	9254      	ld.w      	r2, (r2, 0x50)
+    425e:	b848      	st.w      	r2, (r14, 0x20)
+    4260:	9861      	ld.w      	r3, (r14, 0x4)
+    4262:	9440      	ld.w      	r2, (r4, 0x0)
+    4264:	b260      	st.w      	r3, (r2, 0x0)
+    4266:	b761      	st.w      	r3, (r7, 0x4)
+    4268:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    426c:	3b40      	cmpnei      	r3, 0
+    426e:	083e      	bt      	0x42ea	// 42ea <std_clk_calib+0x14e>
+    4270:	e3ffee26 	bsr      	0x1ebc	// 1ebc <LPT_Soft_Reset>
+    4274:	9400      	ld.w      	r0, (r4, 0x0)
+    4276:	e3ffee47 	bsr      	0x1f04	// 1f04 <BT_Soft_Reset>
+    427a:	c1807420 	psrset      	ee, ie
+    427e:	3001      	movi      	r0, 1
+    4280:	07a3      	br      	0x41c6	// 41c6 <std_clk_calib+0x2a>
+    4282:	3b41      	cmpnei      	r3, 1
+    4284:	0806      	bt      	0x4290	// 4290 <std_clk_calib+0xf4>
+    4286:	3303      	movi      	r3, 3
+    4288:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    428c:	127d      	lrw      	r3, 0x16e3600	// 4400 <std_clk_calib+0x264>
+    428e:	07a8      	br      	0x41de	// 41de <std_clk_calib+0x42>
+    4290:	3b42      	cmpnei      	r3, 2
+    4292:	0806      	bt      	0x429e	// 429e <std_clk_calib+0x102>
+    4294:	3301      	movi      	r3, 1
+    4296:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    429a:	127b      	lrw      	r3, 0xb71b00	// 4404 <std_clk_calib+0x268>
+    429c:	07a1      	br      	0x41de	// 41de <std_clk_calib+0x42>
+    429e:	3b43      	cmpnei      	r3, 3
+    42a0:	0806      	bt      	0x42ac	// 42ac <std_clk_calib+0x110>
+    42a2:	3300      	movi      	r3, 0
+    42a4:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    42a8:	1278      	lrw      	r3, 0x5b8d80	// 4408 <std_clk_calib+0x26c>
+    42aa:	079a      	br      	0x41de	// 41de <std_clk_calib+0x42>
+    42ac:	3b44      	cmpnei      	r3, 4
+    42ae:	0809      	bt      	0x42c0	// 42c0 <std_clk_calib+0x124>
+    42b0:	3300      	movi      	r3, 0
+    42b2:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    42b6:	1276      	lrw      	r3, 0x54c720	// 440c <std_clk_calib+0x270>
+    42b8:	b863      	st.w      	r3, (r14, 0xc)
+    42ba:	3380      	movi      	r3, 128
+    42bc:	4369      	lsli      	r3, r3, 9
+    42be:	0793      	br      	0x41e4	// 41e4 <std_clk_calib+0x48>
+    42c0:	3b45      	cmpnei      	r3, 5
+    42c2:	0806      	bt      	0x42ce	// 42ce <std_clk_calib+0x132>
+    42c4:	3300      	movi      	r3, 0
+    42c6:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    42ca:	1272      	lrw      	r3, 0x3ffed0	// 4410 <std_clk_calib+0x274>
+    42cc:	07f6      	br      	0x42b8	// 42b8 <std_clk_calib+0x11c>
+    42ce:	3b46      	cmpnei      	r3, 6
+    42d0:	0806      	bt      	0x42dc	// 42dc <std_clk_calib+0x140>
+    42d2:	3300      	movi      	r3, 0
+    42d4:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    42d8:	126f      	lrw      	r3, 0x1fff68	// 4414 <std_clk_calib+0x278>
+    42da:	07ef      	br      	0x42b8	// 42b8 <std_clk_calib+0x11c>
+    42dc:	3b47      	cmpnei      	r3, 7
+    42de:	0b84      	bt      	0x41e6	// 41e6 <std_clk_calib+0x4a>
+    42e0:	3300      	movi      	r3, 0
+    42e2:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    42e6:	126d      	lrw      	r3, 0x1ffb8	// 4418 <std_clk_calib+0x27c>
+    42e8:	07e8      	br      	0x42b8	// 42b8 <std_clk_calib+0x11c>
+    42ea:	9560      	ld.w      	r3, (r5, 0x0)
+    42ec:	3101      	movi      	r1, 1
+    42ee:	9440      	ld.w      	r2, (r4, 0x0)
+    42f0:	b321      	st.w      	r1, (r3, 0x4)
+    42f2:	b220      	st.w      	r1, (r2, 0x0)
+    42f4:	3100      	movi      	r1, 0
+    42f6:	b327      	st.w      	r1, (r3, 0x1c)
+    42f8:	3004      	movi      	r0, 4
+    42fa:	b225      	st.w      	r1, (r2, 0x14)
+    42fc:	932e      	ld.w      	r1, (r3, 0x38)
+    42fe:	6840      	and      	r1, r0
+    4300:	3940      	cmpnei      	r1, 0
+    4302:	0ffd      	bf      	0x42fc	// 42fc <std_clk_calib+0x160>
+    4304:	9225      	ld.w      	r1, (r2, 0x14)
+    4306:	b82a      	st.w      	r1, (r14, 0x28)
+    4308:	3100      	movi      	r1, 0
+    430a:	b310      	st.w      	r0, (r3, 0x40)
+    430c:	b327      	st.w      	r1, (r3, 0x1c)
+    430e:	3004      	movi      	r0, 4
+    4310:	b225      	st.w      	r1, (r2, 0x14)
+    4312:	932e      	ld.w      	r1, (r3, 0x38)
+    4314:	6840      	and      	r1, r0
+    4316:	3940      	cmpnei      	r1, 0
+    4318:	0ffd      	bf      	0x4312	// 4312 <std_clk_calib+0x176>
+    431a:	9225      	ld.w      	r1, (r2, 0x14)
+    431c:	b82b      	st.w      	r1, (r14, 0x2c)
+    431e:	3100      	movi      	r1, 0
+    4320:	b310      	st.w      	r0, (r3, 0x40)
+    4322:	b327      	st.w      	r1, (r3, 0x1c)
+    4324:	3004      	movi      	r0, 4
+    4326:	b225      	st.w      	r1, (r2, 0x14)
+    4328:	932e      	ld.w      	r1, (r3, 0x38)
+    432a:	6840      	and      	r1, r0
+    432c:	3940      	cmpnei      	r1, 0
+    432e:	0ffd      	bf      	0x4328	// 4328 <std_clk_calib+0x18c>
+    4330:	9225      	ld.w      	r1, (r2, 0x14)
+    4332:	b82c      	st.w      	r1, (r14, 0x30)
+    4334:	b310      	st.w      	r0, (r3, 0x40)
+    4336:	982b      	ld.w      	r1, (r14, 0x2c)
+    4338:	980c      	ld.w      	r0, (r14, 0x30)
+    433a:	6040      	addu      	r1, r0
+    433c:	b829      	st.w      	r1, (r14, 0x24)
+    433e:	9829      	ld.w      	r1, (r14, 0x24)
+    4340:	4921      	lsri      	r1, r1, 1
+    4342:	b829      	st.w      	r1, (r14, 0x24)
+    4344:	3100      	movi      	r1, 0
+    4346:	b321      	st.w      	r1, (r3, 0x4)
+    4348:	b220      	st.w      	r1, (r2, 0x0)
+    434a:	b327      	st.w      	r1, (r3, 0x1c)
+    434c:	b225      	st.w      	r1, (r2, 0x14)
+    434e:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4352:	3b42      	cmpnei      	r3, 2
+    4354:	9849      	ld.w      	r2, (r14, 0x24)
+    4356:	082c      	bt      	0x43ae	// 43ae <std_clk_calib+0x212>
+    4358:	1171      	lrw      	r3, 0x7ff	// 441c <std_clk_calib+0x280>
+    435a:	648c      	cmphs      	r3, r2
+    435c:	0c03      	bf      	0x4362	// 4362 <std_clk_calib+0x1c6>
+    435e:	3300      	movi      	r3, 0
+    4360:	040f      	br      	0x437e	// 437e <std_clk_calib+0x1e2>
+    4362:	9849      	ld.w      	r2, (r14, 0x24)
+    4364:	9866      	ld.w      	r3, (r14, 0x18)
+    4366:	648c      	cmphs      	r3, r2
+    4368:	080e      	bt      	0x4384	// 4384 <std_clk_calib+0x1e8>
+    436a:	9868      	ld.w      	r3, (r14, 0x20)
+    436c:	9847      	ld.w      	r2, (r14, 0x1c)
+    436e:	60ca      	subu      	r3, r2
+    4370:	b868      	st.w      	r3, (r14, 0x20)
+    4372:	32fe      	movi      	r2, 254
+    4374:	9868      	ld.w      	r3, (r14, 0x20)
+    4376:	4248      	lsli      	r2, r2, 8
+    4378:	68c8      	and      	r3, r2
+    437a:	3b40      	cmpnei      	r3, 0
+    437c:	0812      	bt      	0x43a0	// 43a0 <std_clk_calib+0x204>
+    437e:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    4382:	0721      	br      	0x41c4	// 41c4 <std_clk_calib+0x28>
+    4384:	9849      	ld.w      	r2, (r14, 0x24)
+    4386:	9865      	ld.w      	r3, (r14, 0x14)
+    4388:	64c8      	cmphs      	r2, r3
+    438a:	0829      	bt      	0x43dc	// 43dc <std_clk_calib+0x240>
+    438c:	9868      	ld.w      	r3, (r14, 0x20)
+    438e:	9847      	ld.w      	r2, (r14, 0x1c)
+    4390:	60c8      	addu      	r3, r2
+    4392:	b868      	st.w      	r3, (r14, 0x20)
+    4394:	33fe      	movi      	r3, 254
+    4396:	9848      	ld.w      	r2, (r14, 0x20)
+    4398:	4368      	lsli      	r3, r3, 8
+    439a:	688c      	and      	r2, r3
+    439c:	64ca      	cmpne      	r2, r3
+    439e:	0fe0      	bf      	0x435e	// 435e <std_clk_calib+0x1c2>
+    43a0:	9660      	ld.w      	r3, (r6, 0x0)
+    43a2:	9848      	ld.w      	r2, (r14, 0x20)
+    43a4:	b354      	st.w      	r2, (r3, 0x50)
+    43a6:	3001      	movi      	r0, 1
+    43a8:	e3ffefee 	bsr      	0x2384	// 2384 <delay_nms>
+    43ac:	075e      	br      	0x4268	// 4268 <std_clk_calib+0xcc>
+    43ae:	9866      	ld.w      	r3, (r14, 0x18)
+    43b0:	648c      	cmphs      	r3, r2
+    43b2:	0809      	bt      	0x43c4	// 43c4 <std_clk_calib+0x228>
+    43b4:	9868      	ld.w      	r3, (r14, 0x20)
+    43b6:	9847      	ld.w      	r2, (r14, 0x1c)
+    43b8:	60ca      	subu      	r3, r2
+    43ba:	b868      	st.w      	r3, (r14, 0x20)
+    43bc:	32ff      	movi      	r2, 255
+    43be:	9868      	ld.w      	r3, (r14, 0x20)
+    43c0:	4250      	lsli      	r2, r2, 16
+    43c2:	07db      	br      	0x4378	// 4378 <std_clk_calib+0x1dc>
+    43c4:	9849      	ld.w      	r2, (r14, 0x24)
+    43c6:	9865      	ld.w      	r3, (r14, 0x14)
+    43c8:	64c8      	cmphs      	r2, r3
+    43ca:	0809      	bt      	0x43dc	// 43dc <std_clk_calib+0x240>
+    43cc:	9868      	ld.w      	r3, (r14, 0x20)
+    43ce:	9847      	ld.w      	r2, (r14, 0x1c)
+    43d0:	60c8      	addu      	r3, r2
+    43d2:	b868      	st.w      	r3, (r14, 0x20)
+    43d4:	33ff      	movi      	r3, 255
+    43d6:	9848      	ld.w      	r2, (r14, 0x20)
+    43d8:	4370      	lsli      	r3, r3, 16
+    43da:	07e0      	br      	0x439a	// 439a <std_clk_calib+0x1fe>
+    43dc:	3300      	movi      	r3, 0
+    43de:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    43e2:	07e2      	br      	0x43a6	// 43a6 <std_clk_calib+0x20a>
+    43e4:	2000005c 	.long	0x2000005c
+    43e8:	2000000c 	.long	0x2000000c
+    43ec:	02dc6c00 	.long	0x02dc6c00
+    43f0:	0000ffff 	.long	0x0000ffff
+    43f4:	20000014 	.long	0x20000014
+    43f8:	be9c0005 	.long	0xbe9c0005
+    43fc:	00030010 	.long	0x00030010
+    4400:	016e3600 	.long	0x016e3600
+    4404:	00b71b00 	.long	0x00b71b00
+    4408:	005b8d80 	.long	0x005b8d80
+    440c:	0054c720 	.long	0x0054c720
+    4410:	003ffed0 	.long	0x003ffed0
+    4414:	001fff68 	.long	0x001fff68
+    4418:	0001ffb8 	.long	0x0001ffb8
+    441c:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/NRF_T1F_CR_V01_20240415.map b/Source/Lst/NRF_T1F_CR_V01_20240415.map
new file mode 100644
index 0000000..3718383
--- /dev/null
+++ b/Source/Lst/NRF_T1F_CR_V01_20240415.map
@@ -0,0 +1,2154 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          313356 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         156
+  Section header string table index: 153
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 001a50 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00001a50 002a50 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00001a88 002a88 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00001afc 002afc 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        00001b48 002b48 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        00001b78 002b78 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        00001c00 002c00 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        00001c28 002c28 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00001c64 002c64 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        00001c78 002c78 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00001c90 002c90 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00001cb0 002cb0 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00001ccc 002ccc 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        00001ce8 002ce8 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        00001d28 002d28 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        00001d34 002d34 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        00001d58 002d58 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        00001d88 002d88 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        00001e68 002e68 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00001e7c 002e7c 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        00001e8a 002e8a 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00001e92 002e92 000008 00  AX  0   0  2
+  [23] .text.GPIO_Read_S PROGBITS        00001e9a 002e9a 000010 00  AX  0   0  2
+  [24] .text.GPIO_Read_O PROGBITS        00001eaa 002eaa 000010 00  AX  0   0  2
+  [25] .text.LPT_Soft_Re PROGBITS        00001ebc 002ebc 000014 00  AX  0   0  4
+  [26] .text.WWDT_CNT_Lo PROGBITS        00001ed0 002ed0 000010 00  AX  0   0  4
+  [27] .text.BT_DeInit   PROGBITS        00001ee0 002ee0 00001c 00  AX  0   0  2
+  [28] .text.BT_Start    PROGBITS        00001efc 002efc 000008 00  AX  0   0  2
+  [29] .text.BT_Soft_Res PROGBITS        00001f04 002f04 00000a 00  AX  0   0  2
+  [30] .text.BT_Configur PROGBITS        00001f0e 002f0e 000018 00  AX  0   0  2
+  [31] .text.BT_ControlS PROGBITS        00001f26 002f26 00002c 00  AX  0   0  2
+  [32] .text.BT_Period_C PROGBITS        00001f52 002f52 000006 00  AX  0   0  2
+  [33] .text.BT_ConfigIn PROGBITS        00001f58 002f58 000012 00  AX  0   0  2
+  [34] .text.BT1_INT_ENA PROGBITS        00001f6c 002f6c 000010 00  AX  0   0  4
+  [35] .text.GPT_IO_Init PROGBITS        00001f7c 002f7c 0000a0 00  AX  0   0  4
+  [36] .text.GPT_Configu PROGBITS        0000201c 00301c 000014 00  AX  0   0  4
+  [37] .text.GPT_WaveCtr PROGBITS        00002030 003030 000044 00  AX  0   0  4
+  [38] .text.GPT_WaveLoa PROGBITS        00002074 003074 000014 00  AX  0   0  4
+  [39] .text.GPT_WaveOut PROGBITS        00002088 003088 0000b4 00  AX  0   0  4
+  [40] .text.GPT_Start   PROGBITS        0000213c 00313c 000010 00  AX  0   0  4
+  [41] .text.GPT_Period_ PROGBITS        0000214c 00314c 000010 00  AX  0   0  4
+  [42] .text.GPT_ConfigI PROGBITS        0000215c 00315c 00001c 00  AX  0   0  4
+  [43] .text.UART0_DeIni PROGBITS        00002178 003178 000018 00  AX  0   0  4
+  [44] .text.UART1_DeIni PROGBITS        00002190 003190 000018 00  AX  0   0  4
+  [45] .text.UART2_DeIni PROGBITS        000021a8 0031a8 000018 00  AX  0   0  4
+  [46] .text.UART0_Int_E PROGBITS        000021c0 0031c0 00001c 00  AX  0   0  4
+  [47] .text.UART2_Int_E PROGBITS        000021dc 0031dc 00001c 00  AX  0   0  4
+  [48] .text.UART_IO_Ini PROGBITS        000021f8 0031f8 0000ec 00  AX  0   0  4
+  [49] .text.UARTInit    PROGBITS        000022e4 0032e4 000010 00  AX  0   0  4
+  [50] .text.UARTInitRxT PROGBITS        000022f4 0032f4 000010 00  AX  0   0  4
+  [51] .text.EPT_Stop    PROGBITS        00002304 003304 000028 00  AX  0   0  4
+  [52] .text.startup.mai PROGBITS        0000232c 00332c 000058 00  AX  0   0  4
+  [53] .text.delay_nms   PROGBITS        00002384 003384 00002c 00  AX  0   0  2
+  [54] .text.GPT0_CONFIG PROGBITS        000023b0 0033b0 000094 00  AX  0   0  4
+  [55] .text.BT_CONFIG   PROGBITS        00002444 003444 000060 00  AX  0   0  4
+  [56] .text.SYSCON_CONF PROGBITS        000024a4 0034a4 000062 00  AX  0   0  2
+  [57] .text.APT32F102_i PROGBITS        00002508 003508 00006c 00  AX  0   0  4
+  [58] .text.SYSCONIntHa PROGBITS        00002574 003574 0000f0 00  AX  0   0  4
+  [59] .text.IFCIntHandl PROGBITS        00002664 003664 000068 00  AX  0   0  4
+  [60] .text.ADCIntHandl PROGBITS        000026cc 0036cc 000068 00  AX  0   0  4
+  [61] .text.EPT0IntHand PROGBITS        00002734 003734 0001ac 00  AX  0   0  4
+  [62] .text.WWDTHandler PROGBITS        000028e0 0038e0 000034 00  AX  0   0  4
+  [63] .text.GPT0IntHand PROGBITS        00002914 003914 000080 00  AX  0   0  4
+  [64] .text.RTCIntHandl PROGBITS        00002994 003994 000070 00  AX  0   0  4
+  [65] .text.UART0IntHan PROGBITS        00002a04 003a04 00003c 00  AX  0   0  4
+  [66] .text.UART1IntHan PROGBITS        00002a40 003a40 00003c 00  AX  0   0  4
+  [67] .text.UART2IntHan PROGBITS        00002a7c 003a7c 000094 00  AX  0   0  4
+  [68] .text.SPI0IntHand PROGBITS        00002b10 003b10 0000e8 00  AX  0   0  4
+  [69] .text.SIO0IntHand PROGBITS        00002bf8 003bf8 000054 00  AX  0   0  4
+  [70] .text.EXI0IntHand PROGBITS        00002c4c 003c4c 000030 00  AX  0   0  4
+  [71] .text.EXI1IntHand PROGBITS        00002c7c 003c7c 000030 00  AX  0   0  4
+  [72] .text.EXI2to3IntH PROGBITS        00002cac 003cac 000048 00  AX  0   0  4
+  [73] .text.EXI4to9IntH PROGBITS        00002cf4 003cf4 00005c 00  AX  0   0  4
+  [74] .text.EXI10to15In PROGBITS        00002d50 003d50 000060 00  AX  0   0  4
+  [75] .text.LPTIntHandl PROGBITS        00002db0 003db0 000034 00  AX  0   0  4
+  [76] .text.BT0IntHandl PROGBITS        00002de4 003de4 00004c 00  AX  0   0  4
+  [77] .text.BT1IntHandl PROGBITS        00002e30 003e30 000064 00  AX  0   0  4
+  [78] .text.PriviledgeV PROGBITS        00002e94 003e94 000002 00  AX  0   0  2
+  [79] .text.PendTrapHan PROGBITS        00002e96 003e96 000008 00  AX  0   0  2
+  [80] .text.Trap3Handle PROGBITS        00002e9e 003e9e 000008 00  AX  0   0  2
+  [81] .text.Trap2Handle PROGBITS        00002ea6 003ea6 000008 00  AX  0   0  2
+  [82] .text.Trap1Handle PROGBITS        00002eae 003eae 000008 00  AX  0   0  2
+  [83] .text.Trap0Handle PROGBITS        00002eb6 003eb6 000008 00  AX  0   0  2
+  [84] .text.UnrecExecpH PROGBITS        00002ebe 003ebe 000008 00  AX  0   0  2
+  [85] .text.BreakPointH PROGBITS        00002ec6 003ec6 000008 00  AX  0   0  2
+  [86] .text.AccessErrHa PROGBITS        00002ece 003ece 000008 00  AX  0   0  2
+  [87] .text.IllegalInst PROGBITS        00002ed6 003ed6 000008 00  AX  0   0  2
+  [88] .text.MisalignedH PROGBITS        00002ede 003ede 000008 00  AX  0   0  2
+  [89] .text.CNTAIntHand PROGBITS        00002ee6 003ee6 000008 00  AX  0   0  2
+  [90] .text.I2CIntHandl PROGBITS        00002eee 003eee 000008 00  AX  0   0  2
+  [91] .text.__divsi3    PROGBITS        00002ef8 003ef8 000024 00  AX  0   0  4
+  [92] .text.__udivsi3   PROGBITS        00002f1c 003f1c 000024 00  AX  0   0  4
+  [93] .text.CK_CPU_EnAl PROGBITS        00002f40 003f40 000006 00  AX  0   0  2
+  [94] .text.UARTx_Init  PROGBITS        00002f48 003f48 0000d8 00  AX  0   0  4
+  [95] .text.UART2_RecvI PROGBITS        00003020 004020 000064 00  AX  0   0  4
+  [96] .text.Dbg_Println PROGBITS        00003084 004084 00000c 00  AX  0   0  2
+  [97] .text.RC522_Delay PROGBITS        00003090 004090 000012 00  AX  0   0  2
+  [98] .text.RC522_ReadW PROGBITS        000030a4 0040a4 000054 00  AX  0   0  4
+  [99] .text.RC522_ReadR PROGBITS        000030f8 0040f8 000038 00  AX  0   0  4
+  [100] .text.RC522_Write PROGBITS        00003130 004130 000030 00  AX  0   0  4
+  [101] .text.RC522_PcdRe PROGBITS        00003160 004160 00004c 00  AX  0   0  2
+  [102] .text.RC522_SetBi PROGBITS        000031ac 0041ac 000018 00  AX  0   0  2
+  [103] .text.RC522_PcdAn PROGBITS        000031c4 0041c4 00001a 00  AX  0   0  2
+  [104] .text.RC522_Clear PROGBITS        000031de 0041de 000016 00  AX  0   0  2
+  [105] .text.RC522_PcdAn PROGBITS        000031f4 0041f4 00000c 00  AX  0   0  2
+  [106] .text.RC522_Calul PROGBITS        00003200 004200 000066 00  AX  0   0  2
+  [107] .text.M500PcdConf PROGBITS        00003266 004266 000052 00  AX  0   0  2
+  [108] .text.RC522_Init  PROGBITS        000032b8 0042b8 0000a0 00  AX  0   0  4
+  [109] .text.RC522_PcdCo PROGBITS        00003358 004358 00013a 00  AX  0   0  2
+  [110] .text.RC522_PcdSe PROGBITS        00003492 004492 00006a 00  AX  0   0  2
+  [111] .text.RC522_PcdAu PROGBITS        000034fc 0044fc 000058 00  AX  0   0  2
+  [112] .text.RC522_PcdRe PROGBITS        00003554 004554 000054 00  AX  0   0  2
+  [113] .text.RC522_PcdAn PROGBITS        000035a8 0045a8 000074 00  AX  0   0  2
+  [114] .text.Card_Read_T PROGBITS        0000361c 00461c 0000d4 00  AX  0   0  4
+  [115] .text.RLY_Light_C PROGBITS        000036f0 0046f0 000020 00  AX  0   0  4
+  [116] .text.KEY1_LONG_P PROGBITS        00003710 004710 000064 00  AX  0   0  4
+  [117] .text.RLY_Light_C PROGBITS        00003774 004774 000030 00  AX  0   0  4
+  [118] .text.LogicCtrl_I PROGBITS        000037a4 0047a4 00002c 00  AX  0   0  4
+  [119] .text.LogicCtrl_T PROGBITS        000037d0 0047d0 000098 00  AX  0   0  4
+  [120] .text.LogicCtrl_N PROGBITS        00003868 004868 000060 00  AX  0   0  4
+  [121] .text.LogicCtrl_N PROGBITS        000038c8 0048c8 0000bc 00  AX  0   0  4
+  [122] .text.button_init PROGBITS        00003984 004984 00003a 00  AX  0   0  2
+  [123] .text.button_atta PROGBITS        000039be 0049be 00000a 00  AX  0   0  2
+  [124] .text.button_hand PROGBITS        000039c8 0049c8 000120 00  AX  0   0  2
+  [125] .text.button_star PROGBITS        00003ae8 004ae8 000024 00  AX  0   0  4
+  [126] .text.button_tick PROGBITS        00003b0c 004b0c 00001c 00  AX  0   0  4
+  [127] .text.read_button PROGBITS        00003b28 004b28 000014 00  AX  0   0  4
+  [128] .text.TK_Sampling PROGBITS        00003b3c 004b3c 000058 00  AX  0   0  4
+  [129] .text.TKEYIntHand PROGBITS        00003b94 004b94 000088 00  AX  0   0  4
+  [130] .text.get_key_num PROGBITS        00003c1c 004c1c 000028 00  AX  0   0  4
+  [131] .text.TK_Scan_Sta PROGBITS        00003c44 004c44 000020 00  AX  0   0  4
+  [132] .text.TK_Keymap_p PROGBITS        00003c64 004c64 000180 00  AX  0   0  4
+  [133] .text.TK_overflow PROGBITS        00003de4 004de4 00011c 00  AX  0   0  4
+  [134] .text.TK_Baseline PROGBITS        00003f00 004f00 0001d0 00  AX  0   0  4
+  [135] .text.TK_result_p PROGBITS        000040d0 0050d0 000054 00  AX  0   0  4
+  [136] .text.CORETHandle PROGBITS        00004124 005124 000078 00  AX  0   0  4
+  [137] .text.std_clk_cal PROGBITS        0000419c 00519c 000284 00  AX  0   0  4
+  [138] .RomCode          PROGBITS        00004420 00609c 000000 00   W  0   0  1
+  [139] .rodata           PROGBITS        00004420 005420 000224 00   A  0   0  4
+  [140] .data             PROGBITS        20000000 006000 00009c 00  WA  0   0  4
+  [141] .bss              NOBITS          2000009c 00609c 000484 00  WA  0   0  4
+  [142] .csky.attributes  CSKY_ATTRIBUTES 00000000 00609c 000022 00      0   0  1
+  [143] .comment          PROGBITS        00000000 0060be 000042 01  MS  0   0  1
+  [144] .csky_stack_size  PROGBITS        00000000 006100 0007fc 00      0   0 16
+  [145] .debug_line       PROGBITS        00000000 0068fc 003899 00      0   0  1
+  [146] .debug_info       PROGBITS        00000000 00a195 02ba68 00      0   0  1
+  [147] .debug_abbrev     PROGBITS        00000000 035bfd 00285b 00      0   0  1
+  [148] .debug_aranges    PROGBITS        00000000 038458 000ca0 00      0   0  8
+  [149] .debug_ranges     PROGBITS        00000000 0390f8 000b98 00      0   0  1
+  [150] .debug_str        PROGBITS        00000000 039c90 008725 01  MS  0   0  1
+  [151] .debug_frame      PROGBITS        00000000 0423b8 001d7c 00      0   0  4
+  [152] .debug_loc        PROGBITS        00000000 044134 002db9 00      0   0  1
+  [153] .shstrtab         STRTAB          00000000 04bb5b 000cae 00      0   0  1
+  [154] .symtab           SYMTAB          00000000 046ef0 0039e0 10     155 639  4
+  [155] .strtab           STRTAB          00000000 04a8d0 00128b 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x04644 0x04644 R E 0x1000
+  LOAD           0x006000 0x20000000 0x00004644 0x0009c 0x00520 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_CalulateCRC .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdSelect .text.RC522_PcdAuthState .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.RLY_Light_Ctrl.part.0 .text.KEY1_LONG_PRESS_RELEASE_Handler .text.RLY_Light_Ctrl .text.LogicCtrl_Init .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl.part.0) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) for RC522_CalulateCRC
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) for RC522_PcdSelect
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) for RC522_PcdAuthState
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to memcpy_fast.o(.text) for memcpy
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (491 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2899 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text.GPIO_Reverse(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3093 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3410 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3155 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4123 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3526 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTransmit(Obj/FWlib_apt32f102_uart.o), (30 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3642 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4842 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4950 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7599 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2848 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text.__modsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text.__umodsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text.CK_CPU_DisAllNormalIrq(Obj/drivers_apt32f102_ck801.o), (6 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_uart.o), (4 bytes).
+	Removing .text.UART1_TASK(Obj/SYSTEM_uart.o), (148 bytes).
+	Removing .text.UART1_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (148 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (136 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (2 bytes).
+	Removing .text(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .text.RC522_Reset(Obj/SYSTEM_rc522.o), (22 bytes).
+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .text.get_button_event(Obj/SYSTEM_button.o), (6 bytes).
+	Removing .text.button_stop(Obj/SYSTEM_button.o), (32 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (113 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+
+615 unused seciton(s) (total 179309 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	$d                                 0x00000000               0  .text
+	FWlib_apt32f102_clkcalib.o         0x00000000     df        0  *ABS*
+	FWlib_apt32f102_tkey_c_1_17.o      0x00000000     df        0  *ABS*
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+	Obj/arch_mem_init.o                0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102.o            0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102_ck801.o      0x00000000     df        0  *ABS*
+	Obj/main.o                         0x00000000     df        0  *ABS*
+	Obj/mcu_initial.o                  0x00000000     df        0  *ABS*
+	Obj/mcu_interrupt.o                0x00000000     df        0  *ABS*
+	_addsub_df.o                       0x00000000     df        0  *ABS*
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+	$t                                 0x00003084               0  .text.Dbg_Println
+	$d                                 0x00003090               0  .text.RC522_Delay
+	$t                                 0x00003090               0  .text.RC522_Delay
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+	$t                                 0x000030a4               0  .text.RC522_ReadWriteOneByte
+	$d                                 0x000030f4               0  .text.RC522_ReadWriteOneByte
+	$d                                 0x000030f8               0  .text.RC522_ReadRawRC
+	$t                                 0x000030f8               0  .text.RC522_ReadRawRC
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+	$d                                 0x00003130               0  .text.RC522_WriteRawRC
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+	$t                                 0x00003160               0  .text.RC522_PcdReset
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+	$t                                 0x000031ac               0  .text.RC522_SetBitMask
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+	$t                                 0x000031c4               0  .text.RC522_PcdAntennaOn
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+	$t                                 0x000031de               0  .text.RC522_ClearBitMask
+	$d                                 0x000031f4               0  .text.RC522_PcdAntennaOff
+	$t                                 0x000031f4               0  .text.RC522_PcdAntennaOff
+	$d                                 0x00003200               0  .text.RC522_CalulateCRC
+	$t                                 0x00003200               0  .text.RC522_CalulateCRC
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+	$t                                 0x00003266               0  .text.M500PcdConfigISOType.part.1
+	$d                                 0x000032b8               0  .text.RC522_Init
+	$t                                 0x000032b8               0  .text.RC522_Init
+	$d                                 0x0000334c               0  .text.RC522_Init
+	$d                                 0x00003358               0  .text.RC522_PcdComMF522
+	$t                                 0x00003358               0  .text.RC522_PcdComMF522
+	$d                                 0x00003492               0  .text.RC522_PcdSelect
+	$t                                 0x00003492               0  .text.RC522_PcdSelect
+	$d                                 0x000034fc               0  .text.RC522_PcdAuthState
+	$t                                 0x000034fc               0  .text.RC522_PcdAuthState
+	$d                                 0x00003554               0  .text.RC522_PcdRequest
+	$t                                 0x00003554               0  .text.RC522_PcdRequest
+	$d                                 0x000035a8               0  .text.RC522_PcdAnticoll
+	$t                                 0x000035a8               0  .text.RC522_PcdAnticoll
+	$d                                 0x0000361c               0  .text.Card_Read_TasK
+	$t                                 0x0000361c               0  .text.Card_Read_TasK
+	$d                                 0x000036c8               0  .text.Card_Read_TasK
+	RLY_Light_Ctrl.part.0              0x000036f0      F       32  .text.RLY_Light_Ctrl.part.0
+	$d                                 0x000036f0               0  .text.RLY_Light_Ctrl.part.0
+	$t                                 0x000036f0               0  .text.RLY_Light_Ctrl.part.0
+	$d                                 0x00003708               0  .text.RLY_Light_Ctrl.part.0
+	$d                                 0x00003710               0  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	$t                                 0x00003710               0  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	$d                                 0x00003758               0  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	$d                                 0x00003774               0  .text.RLY_Light_Ctrl
+	$t                                 0x00003774               0  .text.RLY_Light_Ctrl
+	$d                                 0x0000379c               0  .text.RLY_Light_Ctrl
+	$d                                 0x000037a4               0  .text.LogicCtrl_Init
+	$t                                 0x000037a4               0  .text.LogicCtrl_Init
+	$d                                 0x000037c8               0  .text.LogicCtrl_Init
+	$d                                 0x000037d0               0  .text.LogicCtrl_Task
+	$t                                 0x000037d0               0  .text.LogicCtrl_Task
+	$d                                 0x00003854               0  .text.LogicCtrl_Task
+	$d                                 0x00003868               0  .text.LogicCtrl_NoRF_Init
+	$t                                 0x00003868               0  .text.LogicCtrl_NoRF_Init
+	$d                                 0x000038b4               0  .text.LogicCtrl_NoRF_Init
+	$d                                 0x000038c8               0  .text.LogicCtrl_NoRF_Task
+	$t                                 0x000038c8               0  .text.LogicCtrl_NoRF_Task
+	$d                                 0x00003968               0  .text.LogicCtrl_NoRF_Task
+	$d                                 0x00003984               0  .text.button_init
+	$t                                 0x00003984               0  .text.button_init
+	$d                                 0x000039be               0  .text.button_attach
+	$t                                 0x000039be               0  .text.button_attach
+	$d                                 0x000039c8               0  .text.button_handler
+	$t                                 0x000039c8               0  .text.button_handler
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+	$t                                 0x00003ae8               0  .text.button_start
+	$d                                 0x00003b08               0  .text.button_start
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+	$t                                 0x00003b0c               0  .text.button_ticks
+	$d                                 0x00003b24               0  .text.button_ticks
+	$d                                 0x00003b28               0  .text.read_button_GPIO
+	$t                                 0x00003b28               0  .text.read_button_GPIO
+	$d                                 0x00003b38               0  .text.read_button_GPIO
+	$d                                 0x00003b3c               0  .text.TK_Sampling_prog
+	$t                                 0x00003b3c               0  .text.TK_Sampling_prog
+	$d                                 0x00003b84               0  .text.TK_Sampling_prog
+	$d                                 0x00003b94               0  .text.TKEYIntHandler
+	$t                                 0x00003b94               0  .text.TKEYIntHandler
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+	$t                                 0x00003c1c               0  .text.get_key_number
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+	$t                                 0x00003c44               0  .text.TK_Scan_Start
+	$d                                 0x00003c5c               0  .text.TK_Scan_Start
+	$d                                 0x00003c64               0  .text.TK_Keymap_prog
+	$t                                 0x00003c64               0  .text.TK_Keymap_prog
+	$d                                 0x00003dac               0  .text.TK_Keymap_prog
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+	$t                                 0x00003de4               0  .text.TK_overflow_predict
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+	$d                                 0x00003f00               0  .text.TK_Baseline_tracking
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+	$d                                 0x000040a4               0  .text.TK_Baseline_tracking
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+	$t                                 0x000040d0               0  .text.TK_result_prog
+	$d                                 0x00004110               0  .text.TK_result_prog
+	$d                                 0x00004124               0  .text.CORETHandler
+	$t                                 0x00004124               0  .text.CORETHandler
+	$d                                 0x00004184               0  .text.CORETHandler
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+	$t                                 0x0000419c               0  .text.std_clk_calib
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+	dp_l                               0x00004430      O       16  .rodata
+	dp_h                               0x00004440      O       16  .rodata
+	NUM.6009                           0x200000a0      O        1  .bss
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+	card_tick.5925                     0x200000c4      O        4  .bss
+	head_handle                        0x200000c8      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
+	__fixunsdfsi                       0x00000d10      F       56  .text
+	__adddf3                           0x0000101c      F       46  .text
+	__subdf3                           0x0000104c      F       54  .text
+	__muldf3                           0x00001084      F      564  .text
+	__divdf3                           0x000012b8      F      340  .text
+	__gtdf2                            0x0000140c      F       60  .text
+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__memset_fast                      0x00001964    w F      136  .text
+	memset                             0x00001964    w F      136  .text
+	__memcpy_fast                      0x000019ec    w F      100  .text
+	memcpy                             0x000019ec    w F      100  .text
+	__main                             0x00001a50      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00001afc      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x00001b48      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x00001b78      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x00001c00      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x00001c28      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00001c64      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x00001c78      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00001c90      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00001cb0      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00001ccc      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x00001ce8      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x00001d28      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x00001d34      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x00001d58      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x00001d88      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x00001e68      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00001e7c      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x00001e8a      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00001e92      F        8  .text.GPIO_Write_Low
+	GPIO_Read_Status                   0x00001e9a      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00001eaa      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00001ebc      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x00001ed0      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x00001ee0      F       28  .text.BT_DeInit
+	BT_Start                           0x00001efc      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x00001f04      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x00001f0e      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x00001f26      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x00001f52      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00001f58      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00001f6c      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00001f7c      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x0000201c      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00002030      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x00002074      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x00002088      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x0000213c      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x0000214c      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x0000215c      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x00002178      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00002190      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x000021a8      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x000021c0      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000021dc      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x000021f8      F      236  .text.UART_IO_Init
+	UARTInit                           0x000022e4      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x000022f4      F       16  .text.UARTInitRxTxIntEn
+	EPT_Stop                           0x00002304      F       40  .text.EPT_Stop
+	main                               0x0000232c      F       88  .text.startup.main
+	delay_nms                          0x00002384      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000023b0      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x00002444      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000024a4      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00002508      F      108  .text.APT32F102_init
+	SYSCONIntHandler                   0x00002574      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00002664      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x000026cc      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00002734      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x000028e0      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00002914      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00002994      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00002a04      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00002a40      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00002a7c      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x00002b10      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x00002bf8      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00002c4c      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00002c7c      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x00002cac      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x00002cf4      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00002d50      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x00002db0      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x00002de4      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00002e30      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00002e94      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00002e96      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x00002e9e      F        8  .text.Trap3Handler
+	Trap2Handler                       0x00002ea6      F        8  .text.Trap2Handler
+	Trap1Handler                       0x00002eae      F        8  .text.Trap1Handler
+	Trap0Handler                       0x00002eb6      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x00002ebe      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x00002ec6      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x00002ece      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x00002ed6      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x00002ede      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x00002ee6      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x00002eee      F        8  .text.I2CIntHandler
+	__divsi3                           0x00002ef8      F       36  .text.__divsi3
+	__udivsi3                          0x00002f1c      F       36  .text.__udivsi3
+	CK_CPU_EnAllNormalIrq              0x00002f40      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x00002f48      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x00003020      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x00003084      F       12  .text.Dbg_Println
+	RC522_Delay                        0x00003090      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x000030a4      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x000030f8      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x00003130      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00003160      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x000031ac      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x000031c4      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000031de      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x000031f4      F       12  .text.RC522_PcdAntennaOff
+	RC522_CalulateCRC                  0x00003200      F      102  .text.RC522_CalulateCRC
+	RC522_Init                         0x000032b8      F      160  .text.RC522_Init
+	RC522_PcdComMF522                  0x00003358      F      314  .text.RC522_PcdComMF522
+	RC522_PcdSelect                    0x00003492      F      106  .text.RC522_PcdSelect
+	RC522_PcdAuthState                 0x000034fc      F       88  .text.RC522_PcdAuthState
+	RC522_PcdRequest                   0x00003554      F       84  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x000035a8      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x0000361c      F      212  .text.Card_Read_TasK
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00003710      F      100  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	RLY_Light_Ctrl                     0x00003774      F       48  .text.RLY_Light_Ctrl
+	LogicCtrl_Init                     0x000037a4      F       44  .text.LogicCtrl_Init
+	LogicCtrl_Task                     0x000037d0      F      152  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00003868      F       96  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x000038c8      F      188  .text.LogicCtrl_NoRF_Task
+	button_init                        0x00003984      F       58  .text.button_init
+	button_attach                      0x000039be      F       10  .text.button_attach
+	button_handler                     0x000039c8      F      288  .text.button_handler
+	button_start                       0x00003ae8      F       36  .text.button_start
+	button_ticks                       0x00003b0c      F       28  .text.button_ticks
+	read_button_GPIO                   0x00003b28      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x00003b3c      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x00003b94      F      136  .text.TKEYIntHandler
+	get_key_number                     0x00003c1c      F       40  .text.get_key_number
+	TK_Scan_Start                      0x00003c44      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x00003c64      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00003de4      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00003f00      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x000040d0      F       84  .text.TK_result_prog
+	CORETHandler                       0x00004124      F      120  .text.CORETHandler
+	std_clk_calib                      0x0000419c      F      644  .text.std_clk_calib
+	__thenan_df                        0x00004450      O       20  .rodata
+	__clz_tab                          0x00004464      O      256  .rodata
+	_end_rodata                        0x00004644               0  .rodata
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+	_start_data                        0x20000000               0  .data
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+	BT1                                0x20000008      O        4  .data
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+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	s_tkey                             0x20000068      O        4  .data
+	samp_setover_f                     0x2000006c      O        1  .data
+	tk_overflow_en                     0x2000006d      O        1  .data
+	tk_div                             0x2000006e      O       34  .data
+	neg_build_bounce                   0x20000090      O        1  .data
+	pos_build_bounce                   0x20000091      O        1  .data
+	tk_scan_para0                      0x20000094      O        4  .data
+	scan_step_temp                     0x20000098      O        1  .data
+	_end_data                          0x2000009c               0  .data
+	_bss_start                         0x2000009c               0  .bss
+	rf_exist                           0x2000009c      O        1  .bss
+	test_state                         0x2000009d      O        1  .bss
+	SysTick_100us                      0x200000a4      O        4  .bss
+	SysTick_1ms                        0x200000a8      O        4  .bss
+	RS485_Comming                      0x200000ac      O        4  .bss
+	RS485_Comm_Flag                    0x200000b0      O        4  .bss
+	RS485_Comm_Start                   0x200000b4      O        4  .bss
+	RS485_Comm_End                     0x200000b8      O        4  .bss
+	scan_tick                          0x200000bc      O        4  .bss
+	Press_debounce_data                0x200000cc      O        1  .bss
+	TK_Lowpower_mode                   0x200000cd      O        1  .bss
+	TK_Lowpower_level                  0x200000ce      O        1  .bss
+	TK_longpress_time                  0x200000d0      O        4  .bss
+	Release_debounce_data              0x200000d4      O        1  .bss
+	Key_mode                           0x200000d5      O        1  .bss
+	TK_icon                            0x200000d6      O       34  .bss
+	MultiTimes_Filter                  0x200000f8      O        1  .bss
+	Base_Speed                         0x200000f9      O        1  .bss
+	TK_IO_ENABLE                       0x200000fc      O        4  .bss
+	Valid_Key_Num                      0x20000100      O        1  .bss
+	TK_senprd                          0x20000102      O       34  .bss
+	TK_Wakeup_level                    0x20000124      O        1  .bss
+	TK_Triggerlevel                    0x20000126      O       34  .bss
+	TK_EC_LEVEL                        0x20000148      O        2  .bss
+	TK_FVR_LEVEL                       0x2000014a      O        2  .bss
+	TK_BaseCnt                         0x2000014c      O        4  .bss
+	TK_PSEL_MODE                       0x20000150      O        2  .bss
+	R_CMPB_BUF                         0x20000154      O        4  .bss
+	R_CMPA_BUF                         0x20000158      O        4  .bss
+	R_SIORX_buf                        0x2000015c      O       40  .bss
+	g_uart                             0x20000184      O      115  .bss
+	CardInfo                           0x200001f7      O       40  .bss
+	KEY1                               0x20000220      O       48  .bss
+	dm_in                              0x20000250      O        5  .bss
+	baseline_data0                     0x20000258      O       34  .bss
+	TK_Postive_build2                  0x2000027a      O       17  .bss
+	Key_Map1                           0x2000028c      O        4  .bss
+	offset_data2_abs                   0x20000290      O       34  .bss
+	scan_f                             0x200002b2      O        1  .bss
+	offset_data1_abs                   0x200002b4      O       34  .bss
+	Release_debounce0                  0x200002d6      O       17  .bss
+	Key_Map0                           0x200002e8      O        4  .bss
+	bsae_over_f                        0x200002ec      O        1  .bss
+	scan_cnt                           0x200002ee      O        2  .bss
+	Press_debounce0                    0x200002f0      O       17  .bss
+	offset_data0                       0x20000302      O       34  .bss
+	sampling_data1                     0x20000324      O       34  .bss
+	Key_Map2                           0x20000348      O        4  .bss
+	Release_debounce1                  0x2000034c      O       17  .bss
+	tk_overflow_f                      0x2000035d      O        1  .bss
+	TK_Negtive_build2                  0x2000035e      O       17  .bss
+	base_update_f                      0x2000036f      O        1  .bss
+	TK_Postive_build1                  0x20000370      O       17  .bss
+	time_cnt                           0x20000384      O        4  .bss
+	lpt_scan_pend_cnt                  0x20000388      O        2  .bss
+	TK_track_cnt                       0x2000038a      O        1  .bss
+	Key_Map                            0x2000038c      O        4  .bss
+	baseline_data1                     0x20000390      O       34  .bss
+	TK_Postive_build0                  0x200003b2      O       17  .bss
+	sampling_data2                     0x200003c4      O       34  .bss
+	offset_data1                       0x200003e6      O       34  .bss
+	TK_ovrdect_cnt                     0x20000408      O        1  .bss
+	Press_debounce2                    0x20000409      O       17  .bss
+	TK_Negtive_build1                  0x2000041a      O       17  .bss
+	tk_num                             0x2000042b      O        1  .bss
+	TK_Negtive_build0                  0x2000042c      O       17  .bss
+	Press_debounce1                    0x2000043d      O       17  .bss
+	Release_debounce2                  0x2000044e      O       17  .bss
+	r_Key_Map_Temp                     0x20000460      O        4  .bss
+	tk_seque                           0x20000464      O       17  .bss
+	scan_step                          0x20000475      O        1  .bss
+	baseline_data2                     0x20000476      O       34  .bss
+	tk_sampling_max                    0x20000498      O       34  .bss
+	offset_data0_abs                   0x200004ba      O       34  .bss
+	offset_data2                       0x200004dc      O       34  .bss
+	sampling_data0                     0x200004fe      O       34  .bss
+	_ebss                              0x20000520               0  .bss
+	_end                               0x20000520               0  .bss
+	end                                0x20000520               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00004644, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1006  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1014  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1020  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1027  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1038  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1043  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1050  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1057  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1064  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1071  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1078  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1085  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1092  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1099  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1113  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1120  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1127  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1133  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1140  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1147  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000088   Code   RO       1168  .text          	memset_fast.o
+    0x000019ec   0x00000064   Code   RO       1173  .text          	memcpy_fast.o
+    0x00001a50   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00001a88   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00001afc   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x00001b48   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001b78   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c00   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x00001c28   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001c64   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x00001c78   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c90   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cb0   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ccc   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ce8   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d28   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d34   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001d58   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001d88   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001e68   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001e7c   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x00001e8a   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00001e92   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x00001e9a   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00001eaa   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00001ebc   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x00001ed0   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x00001ee0   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x00001efc   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x00001f04   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x00001f0e   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x00001f26   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x00001f52   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00001f58   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00001f6c   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00001f7c   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x0000201c   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002030   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002074   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002088   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000213c   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x0000214c   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x0000215c   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x00002178   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00002190   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021a8   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021c0   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000021dc   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000021f8   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000022e4   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x000022f4   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x00002304   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x0000232c   0x00000058   Code   RO        690  .text.startup.main	Obj/main.o
+    0x00002384   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000023b0   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x00002444   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x000024a4   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00002508   0x0000006c   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00002574   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00002664   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x000026cc   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00002734   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x000028e0   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00002914   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002994   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00002a04   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00002a40   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00002a7c   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00002b10   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x00002bf8   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00002c4c   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00002c7c   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x00002cac   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x00002cf4   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00002d50   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x00002db0   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x00002de4   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00002e30   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00002e94   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x00002e96   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x00002e9e   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x00002ea6   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x00002eae   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x00002eb6   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x00002ebe   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x00002ec6   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x00002ece   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x00002ed6   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x00002ede   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x00002ee6   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x00002eee   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x00002ef8   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00002f1c   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x00002f40   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00002f48   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x00003020   0x00000064   Code   RO        823  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x00003084   0x0000000c   Code   RO        829  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00003090   0x00000012   Code   RO        847  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x000030a4   0x00000054   Code   RO        848  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x000030f8   0x00000038   Code   RO        849  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x00003130   0x00000030   Code   RO        850  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00003160   0x0000004c   Code   RO        851  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x000031ac   0x00000018   Code   RO        852  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x000031c4   0x0000001a   Code   RO        853  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000031de   0x00000016   Code   RO        854  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x000031f4   0x0000000c   Code   RO        855  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x00003200   0x00000066   Code   RO        857  .text.RC522_CalulateCRC	Obj/SYSTEM_rc522.o
+    0x00003266   0x00000052   Code   RO        858  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x000032b8   0x000000a0   Code   RO        860  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x00003358   0x0000013a   Code   RO        861  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x00003492   0x0000006a   Code   RO        863  .text.RC522_PcdSelect	Obj/SYSTEM_rc522.o
+    0x000034fc   0x00000058   Code   RO        864  .text.RC522_PcdAuthState	Obj/SYSTEM_rc522.o
+    0x00003554   0x00000054   Code   RO        867  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x000035a8   0x00000074   Code   RO        868  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x0000361c   0x000000d4   Code   RO        869  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x000036f0   0x00000020   Code   RO        887  .text.RLY_Light_Ctrl.part.0	Obj/SYSTEM_logic_ctrl.o
+    0x00003710   0x00000064   Code   RO        888  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x00003774   0x00000030   Code   RO        890  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x000037a4   0x0000002c   Code   RO        891  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x000037d0   0x00000098   Code   RO        892  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003868   0x00000060   Code   RO        894  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x000038c8   0x000000bc   Code   RO        895  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003984   0x0000003a   Code   RO        913  .text.button_init	Obj/SYSTEM_button.o
+    0x000039be   0x0000000a   Code   RO        914  .text.button_attach	Obj/SYSTEM_button.o
+    0x000039c8   0x00000120   Code   RO        916  .text.button_handler	Obj/SYSTEM_button.o
+    0x00003ae8   0x00000024   Code   RO        917  .text.button_start	Obj/SYSTEM_button.o
+    0x00003b0c   0x0000001c   Code   RO        919  .text.button_ticks	Obj/SYSTEM_button.o
+    0x00003b28   0x00000014   Code   RO        920  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x00003b3c   0x00000058   Code   RO        952  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003b94   0x00000088   Code   RO        956  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003c1c   0x00000028   Code   RO        957  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003c44   0x00000020   Code   RO        959  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003c64   0x00000180   Code   RO        960  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003de4   0x0000011c   Code   RO        961  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003f00   0x000001d0   Code   RO        962  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x000040d0   0x00000054   Code   RO        963  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004124   0x00000078   Code   RO        964  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000419c   0x00000284   Code   RO        986  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00004420   0x00000030   Data   RO       1009  .rodata        	pow.o
+    0x00004450   0x00000014   Data   RO       1109  .rodata        	_thenan_df.o
+    0x00004464   0x00000100   Data   RO       1157  .rodata        	_clz.o
+    0x00004564   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x0000456f   0x00000071   Data   RO        870  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x000045e0   0x00000063   Data   RO        896  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+    0x00004643   0x00000001   PAD
+
+    Region RAM (Base: 0x20000000, Size: 0x00000520, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000031   Data   RW        943  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000099   0x00000003   PAD
+    0x2000009c   0x00000002   Zero   RW        689  .bss           	Obj/main.o
+    0x2000009e   0x00000002   PAD
+    0x200000a0   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000ac   0x00000010   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200000bc   0x00000004   Zero   RW        846  .bss           	Obj/SYSTEM_rc522.o
+    0x200000c0   0x00000008   Zero   RW        886  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200000c8   0x00000004   Zero   RW        912  .bss           	Obj/SYSTEM_button.o
+    0x200000cc   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000152   0x00000002   PAD
+    0x20000154   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x20000184   0x00000073   Zero   RW        843  COMMON         	Obj/SYSTEM_uart.o
+    0x200001f7   0x00000028   Zero   RW        883  COMMON         	Obj/SYSTEM_rc522.o
+    0x2000021f   0x00000001   PAD
+    0x20000220   0x00000035   Zero   RW        909  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x20000255   0x00000003   PAD
+    0x20000258   0x000002c8   Zero   RW        982  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        274   Obj/arch_crt0.o
+         56          0          0          0        810   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
+        306          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        396          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+         88         11          0        136      10738   Obj/main.o
+        494          0          0          0      16057   Obj/mcu_initial.o
+       2434          0          0         60      14189   Obj/mcu_interrupt.o
+         72          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        328          0          0        131      11962   Obj/SYSTEM_uart.o
+       1630        113          0         44      15756   Obj/SYSTEM_rc522.o
+        660         99          0         61      11503   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11467   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       8852        223        104        436     238642   Object Totals
+          4          1          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16345   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16345   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+	------------------------------------------------------------
+       3172        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+	------------------------------------------------------------
+        236          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      17428        548        156       1156     263662   Grand Totals
+      17428        548        156       1156     263662   Elf Image Totals
+      17428        548        156          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				17976 (  17.55kB)
+Total	RW	Size (RW Data + ZI Data)			1312 (  1.28kB)
+Total	ROM	Size (Code + RO Data + RW Data)		18132 (  17.71kB)
+
+======================================================================
diff --git a/Source/Lst/RF_T1F_CR_V01_20240513.asm b/Source/Lst/RF_T1F_CR_V01_20240513.asm
new file mode 100644
index 0000000..9cc3ffc
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20240513.asm
@@ -0,0 +1,13815 @@
+
+.//Obj/RF_T1F_CR_V01_20240513.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	000043d2 	.long	0x000043d2
+       8:	000043c2 	.long	0x000043c2
+       c:	00000184 	.long	0x00000184
+      10:	000043ca 	.long	0x000043ca
+      14:	00004388 	.long	0x00004388
+      18:	00000184 	.long	0x00000184
+      1c:	000043ba 	.long	0x000043ba
+      20:	000043b2 	.long	0x000043b2
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	000043aa 	.long	0x000043aa
+      44:	000043a2 	.long	0x000043a2
+      48:	0000439a 	.long	0x0000439a
+      4c:	00004392 	.long	0x00004392
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	0000438a 	.long	0x0000438a
+      80:	0000589c 	.long	0x0000589c
+      84:	00003a68 	.long	0x00003a68
+      88:	00003b58 	.long	0x00003b58
+      8c:	00003bc0 	.long	0x00003bc0
+      90:	00003c28 	.long	0x00003c28
+      94:	00000184 	.long	0x00000184
+      98:	00003dd4 	.long	0x00003dd4
+      9c:	00004140 	.long	0x00004140
+      a0:	00004170 	.long	0x00004170
+      a4:	00003e08 	.long	0x00003e08
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00003e88 	.long	0x00003e88
+      b4:	00003ef8 	.long	0x00003ef8
+      b8:	00003f34 	.long	0x00003f34
+      bc:	00003f70 	.long	0x00003f70
+      c0:	00000184 	.long	0x00000184
+      c4:	000043e2 	.long	0x000043e2
+      c8:	00000184 	.long	0x00000184
+      cc:	00004004 	.long	0x00004004
+      d0:	000040ec 	.long	0x000040ec
+      d4:	000041a0 	.long	0x000041a0
+      d8:	000041e8 	.long	0x000041e8
+      dc:	00004244 	.long	0x00004244
+      e0:	000043da 	.long	0x000043da
+      e4:	0000530c 	.long	0x0000530c
+      e8:	000042a4 	.long	0x000042a4
+      ec:	00000184 	.long	0x00000184
+      f0:	000042d8 	.long	0x000042d8
+      f4:	00004324 	.long	0x00004324
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x2f14	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x3824	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00002f14 	.long	0x00002f14
+     198:	00000160 	.long	0x00000160
+     19c:	00003824 	.long	0x00003824
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x5b98	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00005b98 	.long	0x00005b98
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x5b98	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x5b98	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00005b98 	.long	0x00005b98
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x5bc8	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00005bc8 	.long	0x00005bc8
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x5bc8	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00005bc8 	.long	0x00005bc8
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x5bc8	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00005bc8 	.long	0x00005bc8
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x5bdc	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	00005bdc 	.long	0x00005bdc
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__cskyvprintfsnprintf>:
+    1964:	1422      	subi      	r14, r14, 8
+    1966:	b861      	st.w      	r3, (r14, 0x4)
+    1968:	b840      	st.w      	r2, (r14, 0x0)
+    196a:	14d0      	push      	r15
+    196c:	1421      	subi      	r14, r14, 4
+    196e:	9862      	ld.w      	r3, (r14, 0x8)
+    1970:	b860      	st.w      	r3, (r14, 0x0)
+    1972:	9840      	ld.w      	r2, (r14, 0x0)
+    1974:	1b03      	addi      	r3, r14, 12
+    1976:	e0000026 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+    197a:	1401      	addi      	r14, r14, 4
+    197c:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    1980:	1403      	addi      	r14, r14, 12
+    1982:	783c      	jmp      	r15
+
+00001984 <swrite>:
+    1984:	14d3      	push      	r4-r6, r15
+    1986:	6d4b      	mov      	r5, r2
+    1988:	9582      	ld.w      	r4, (r5, 0x8)
+    198a:	9241      	ld.w      	r2, (r2, 0x4)
+    198c:	610a      	subu      	r4, r2
+    198e:	3c40      	cmpnei      	r4, 0
+    1990:	6d87      	mov      	r6, r1
+    1992:	0c16      	bf      	0x19be	// 19be <swrite+0x3a>
+    1994:	6504      	cmphs      	r1, r4
+    1996:	0802      	bt      	0x199a	// 199a <swrite+0x16>
+    1998:	6d07      	mov      	r4, r1
+    199a:	9560      	ld.w      	r3, (r5, 0x0)
+    199c:	3b40      	cmpnei      	r3, 0
+    199e:	0c0d      	bf      	0x19b8	// 19b8 <swrite+0x34>
+    19a0:	60c8      	addu      	r3, r2
+    19a2:	6c43      	mov      	r1, r0
+    19a4:	6c93      	mov      	r2, r4
+    19a6:	6c0f      	mov      	r0, r3
+    19a8:	e000007e 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    19ac:	9500      	ld.w      	r0, (r5, 0x0)
+    19ae:	9521      	ld.w      	r1, (r5, 0x4)
+    19b0:	6010      	addu      	r0, r4
+    19b2:	6004      	addu      	r0, r1
+    19b4:	3200      	movi      	r2, 0
+    19b6:	a040      	st.b      	r2, (r0, 0x0)
+    19b8:	9561      	ld.w      	r3, (r5, 0x4)
+    19ba:	610c      	addu      	r4, r3
+    19bc:	b581      	st.w      	r4, (r5, 0x4)
+    19be:	6c1b      	mov      	r0, r6
+    19c0:	1493      	pop      	r4-r6, r15
+
+000019c2 <__cskyvprintfvsnprintf>:
+    19c2:	14d3      	push      	r4-r6, r15
+    19c4:	1425      	subi      	r14, r14, 20
+    19c6:	6d07      	mov      	r4, r1
+    19c8:	6d43      	mov      	r5, r0
+    19ca:	6c4b      	mov      	r1, r2
+    19cc:	1802      	addi      	r0, r14, 8
+    19ce:	3200      	movi      	r2, 0
+    19d0:	3c40      	cmpnei      	r4, 0
+    19d2:	b0a0      	st.w      	r5, (r0, 0x0)
+    19d4:	b041      	st.w      	r2, (r0, 0x4)
+    19d6:	0c1c      	bf      	0x1a0e	// 1a0e <__cskyvprintfvsnprintf+0x4c>
+    19d8:	5cc3      	subi      	r6, r4, 1
+    19da:	b0c2      	st.w      	r6, (r0, 0x8)
+    19dc:	b800      	st.w      	r0, (r14, 0x0)
+    19de:	6c8f      	mov      	r2, r3
+    19e0:	100e      	lrw      	r0, 0x1984	// 1a18 <__cskyvprintfvsnprintf+0x56>
+    19e2:	b801      	st.w      	r0, (r14, 0x4)
+    19e4:	6c3b      	mov      	r0, r14
+    19e6:	e00000ab 	bsr      	0x1b3c	// 1b3c <__v2_printf>
+    19ea:	3d40      	cmpnei      	r5, 0
+    19ec:	0c0f      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19ee:	3c40      	cmpnei      	r4, 0
+    19f0:	0c0d      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f2:	38df      	btsti      	r0, 31
+    19f4:	080b      	bt      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f6:	3300      	movi      	r3, 0
+    19f8:	2b00      	subi      	r3, 1
+    19fa:	64d2      	cmpne      	r4, r3
+    19fc:	0c0b      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    19fe:	6500      	cmphs      	r0, r4
+    1a00:	0c09      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    1a02:	6114      	addu      	r4, r5
+    1a04:	2c00      	subi      	r4, 1
+    1a06:	3100      	movi      	r1, 0
+    1a08:	a420      	st.b      	r1, (r4, 0x0)
+    1a0a:	1405      	addi      	r14, r14, 20
+    1a0c:	1493      	pop      	r4-r6, r15
+    1a0e:	3600      	movi      	r6, 0
+    1a10:	07e5      	br      	0x19da	// 19da <__cskyvprintfvsnprintf+0x18>
+    1a12:	5d80      	addu      	r4, r5, r0
+    1a14:	07f9      	br      	0x1a06	// 1a06 <__cskyvprintfvsnprintf+0x44>
+    1a16:	0000      	bkpt
+    1a18:	00001984 	.long	0x00001984
+
+00001a1c <__memset_fast>:
+    1a1c:	14c3      	push      	r4-r6
+    1a1e:	7444      	zextb      	r1, r1
+    1a20:	3a40      	cmpnei      	r2, 0
+    1a22:	0c1f      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a24:	6d43      	mov      	r5, r0
+    1a26:	6d03      	mov      	r4, r0
+    1a28:	3603      	movi      	r6, 3
+    1a2a:	6918      	and      	r4, r6
+    1a2c:	3c40      	cmpnei      	r4, 0
+    1a2e:	0c1a      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a30:	a520      	st.b      	r1, (r5, 0x0)
+    1a32:	2a00      	subi      	r2, 1
+    1a34:	3a40      	cmpnei      	r2, 0
+    1a36:	0c15      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a38:	2500      	addi      	r5, 1
+    1a3a:	6d17      	mov      	r4, r5
+    1a3c:	3603      	movi      	r6, 3
+    1a3e:	6918      	and      	r4, r6
+    1a40:	3c40      	cmpnei      	r4, 0
+    1a42:	0c10      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a44:	a520      	st.b      	r1, (r5, 0x0)
+    1a46:	2a00      	subi      	r2, 1
+    1a48:	3a40      	cmpnei      	r2, 0
+    1a4a:	0c0b      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a4c:	2500      	addi      	r5, 1
+    1a4e:	6d17      	mov      	r4, r5
+    1a50:	3603      	movi      	r6, 3
+    1a52:	6918      	and      	r4, r6
+    1a54:	3c40      	cmpnei      	r4, 0
+    1a56:	0c06      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a58:	a520      	st.b      	r1, (r5, 0x0)
+    1a5a:	2a00      	subi      	r2, 1
+    1a5c:	2500      	addi      	r5, 1
+    1a5e:	0402      	br      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a60:	1483      	pop      	r4-r6
+    1a62:	4168      	lsli      	r3, r1, 8
+    1a64:	6c4c      	or      	r1, r3
+    1a66:	4170      	lsli      	r3, r1, 16
+    1a68:	6c4c      	or      	r1, r3
+    1a6a:	3a2f      	cmplti      	r2, 16
+    1a6c:	0809      	bt      	0x1a7e	// 1a7e <__memset_fast+0x62>
+    1a6e:	b520      	st.w      	r1, (r5, 0x0)
+    1a70:	b521      	st.w      	r1, (r5, 0x4)
+    1a72:	b522      	st.w      	r1, (r5, 0x8)
+    1a74:	b523      	st.w      	r1, (r5, 0xc)
+    1a76:	2a0f      	subi      	r2, 16
+    1a78:	250f      	addi      	r5, 16
+    1a7a:	3a2f      	cmplti      	r2, 16
+    1a7c:	0ff9      	bf      	0x1a6e	// 1a6e <__memset_fast+0x52>
+    1a7e:	3a23      	cmplti      	r2, 4
+    1a80:	0806      	bt      	0x1a8c	// 1a8c <__memset_fast+0x70>
+    1a82:	2a03      	subi      	r2, 4
+    1a84:	b520      	st.w      	r1, (r5, 0x0)
+    1a86:	2503      	addi      	r5, 4
+    1a88:	3a23      	cmplti      	r2, 4
+    1a8a:	0ffc      	bf      	0x1a82	// 1a82 <__memset_fast+0x66>
+    1a8c:	3a40      	cmpnei      	r2, 0
+    1a8e:	0fe9      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a90:	2a00      	subi      	r2, 1
+    1a92:	a520      	st.b      	r1, (r5, 0x0)
+    1a94:	3a40      	cmpnei      	r2, 0
+    1a96:	0fe5      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a98:	2a00      	subi      	r2, 1
+    1a9a:	a521      	st.b      	r1, (r5, 0x1)
+    1a9c:	3a40      	cmpnei      	r2, 0
+    1a9e:	0fe1      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1aa0:	a522      	st.b      	r1, (r5, 0x2)
+    1aa2:	1483      	pop      	r4-r6
+
+00001aa4 <__memcpy_fast>:
+    1aa4:	14c3      	push      	r4-r6
+    1aa6:	6d83      	mov      	r6, r0
+    1aa8:	6d07      	mov      	r4, r1
+    1aaa:	6d18      	or      	r4, r6
+    1aac:	3303      	movi      	r3, 3
+    1aae:	690c      	and      	r4, r3
+    1ab0:	3c40      	cmpnei      	r4, 0
+    1ab2:	0c0b      	bf      	0x1ac8	// 1ac8 <__memcpy_fast+0x24>
+    1ab4:	3a40      	cmpnei      	r2, 0
+    1ab6:	0c08      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1ab8:	8160      	ld.b      	r3, (r1, 0x0)
+    1aba:	2100      	addi      	r1, 1
+    1abc:	2a00      	subi      	r2, 1
+    1abe:	a660      	st.b      	r3, (r6, 0x0)
+    1ac0:	2600      	addi      	r6, 1
+    1ac2:	3a40      	cmpnei      	r2, 0
+    1ac4:	0bfa      	bt      	0x1ab8	// 1ab8 <__memcpy_fast+0x14>
+    1ac6:	1483      	pop      	r4-r6
+    1ac8:	3a2f      	cmplti      	r2, 16
+    1aca:	080e      	bt      	0x1ae6	// 1ae6 <__memcpy_fast+0x42>
+    1acc:	91a0      	ld.w      	r5, (r1, 0x0)
+    1ace:	9161      	ld.w      	r3, (r1, 0x4)
+    1ad0:	9182      	ld.w      	r4, (r1, 0x8)
+    1ad2:	b6a0      	st.w      	r5, (r6, 0x0)
+    1ad4:	91a3      	ld.w      	r5, (r1, 0xc)
+    1ad6:	b661      	st.w      	r3, (r6, 0x4)
+    1ad8:	b682      	st.w      	r4, (r6, 0x8)
+    1ada:	b6a3      	st.w      	r5, (r6, 0xc)
+    1adc:	2a0f      	subi      	r2, 16
+    1ade:	210f      	addi      	r1, 16
+    1ae0:	260f      	addi      	r6, 16
+    1ae2:	3a2f      	cmplti      	r2, 16
+    1ae4:	0ff4      	bf      	0x1acc	// 1acc <__memcpy_fast+0x28>
+    1ae6:	3a23      	cmplti      	r2, 4
+    1ae8:	0808      	bt      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+    1aea:	9160      	ld.w      	r3, (r1, 0x0)
+    1aec:	2a03      	subi      	r2, 4
+    1aee:	2103      	addi      	r1, 4
+    1af0:	b660      	st.w      	r3, (r6, 0x0)
+    1af2:	2603      	addi      	r6, 4
+    1af4:	3a23      	cmplti      	r2, 4
+    1af6:	0ffa      	bf      	0x1aea	// 1aea <__memcpy_fast+0x46>
+    1af8:	3a40      	cmpnei      	r2, 0
+    1afa:	0fe6      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1afc:	8160      	ld.b      	r3, (r1, 0x0)
+    1afe:	2100      	addi      	r1, 1
+    1b00:	2a00      	subi      	r2, 1
+    1b02:	a660      	st.b      	r3, (r6, 0x0)
+    1b04:	2600      	addi      	r6, 1
+    1b06:	07f9      	br      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+
+00001b08 <PAD.1851>:
+    1b08:	14d4      	push      	r4-r7, r15
+    1b0a:	3820      	cmplti      	r0, 1
+    1b0c:	6d03      	mov      	r4, r0
+    1b0e:	6d47      	mov      	r5, r1
+    1b10:	6df7      	mov      	r7, r13
+    1b12:	080d      	bt      	0x1b2c	// 1b2c <PAD.1851+0x24>
+    1b14:	6d83      	mov      	r6, r0
+    1b16:	3e30      	cmplti      	r6, 17
+    1b18:	9700      	ld.w      	r0, (r7, 0x0)
+    1b1a:	0c0a      	bf      	0x1b2e	// 1b2e <PAD.1851+0x26>
+    1b1c:	5c63      	subi      	r3, r4, 1
+    1b1e:	4b24      	lsri      	r1, r3, 4
+    1b20:	4164      	lsli      	r3, r1, 4
+    1b22:	9040      	ld.w      	r2, (r0, 0x0)
+    1b24:	5c2d      	subu      	r1, r4, r3
+    1b26:	9081      	ld.w      	r4, (r0, 0x4)
+    1b28:	6c17      	mov      	r0, r5
+    1b2a:	7bd1      	jsr      	r4
+    1b2c:	1494      	pop      	r4-r7, r15
+    1b2e:	9040      	ld.w      	r2, (r0, 0x0)
+    1b30:	9061      	ld.w      	r3, (r0, 0x4)
+    1b32:	3110      	movi      	r1, 16
+    1b34:	6c17      	mov      	r0, r5
+    1b36:	7bcd      	jsr      	r3
+    1b38:	2e0f      	subi      	r6, 16
+    1b3a:	07ee      	br      	0x1b16	// 1b16 <PAD.1851+0xe>
+
+00001b3c <__v2_printf>:
+    1b3c:	14d4      	push      	r4-r7, r15
+    1b3e:	143c      	subi      	r14, r14, 112
+    1b40:	b826      	st.w      	r1, (r14, 0x18)
+    1b42:	1912      	addi      	r1, r14, 72
+    1b44:	1b21      	addi      	r3, r14, 132
+    1b46:	b810      	st.w      	r0, (r14, 0x40)
+    1b48:	2100      	addi      	r1, 1
+    1b4a:	3000      	movi      	r0, 0
+    1b4c:	6d4b      	mov      	r5, r2
+    1b4e:	b871      	st.w      	r3, (r14, 0x44)
+    1b50:	b80a      	st.w      	r0, (r14, 0x28)
+    1b52:	b809      	st.w      	r0, (r14, 0x24)
+    1b54:	b82d      	st.w      	r1, (r14, 0x34)
+    1b56:	9886      	ld.w      	r4, (r14, 0x18)
+    1b58:	3325      	movi      	r3, 37
+    1b5a:	84c0      	ld.b      	r6, (r4, 0x0)
+    1b5c:	3e40      	cmpnei      	r6, 0
+    1b5e:	0c03      	bf      	0x1b64	// 1b64 <__v2_printf+0x28>
+    1b60:	64da      	cmpne      	r6, r3
+    1b62:	0845      	bt      	0x1bec	// 1bec <__v2_printf+0xb0>
+    1b64:	9846      	ld.w      	r2, (r14, 0x18)
+    1b66:	5cc9      	subu      	r6, r4, r2
+    1b68:	3e40      	cmpnei      	r6, 0
+    1b6a:	0c0a      	bf      	0x1b7e	// 1b7e <__v2_printf+0x42>
+    1b6c:	9870      	ld.w      	r3, (r14, 0x40)
+    1b6e:	9340      	ld.w      	r2, (r3, 0x0)
+    1b70:	6c5b      	mov      	r1, r6
+    1b72:	9361      	ld.w      	r3, (r3, 0x4)
+    1b74:	9806      	ld.w      	r0, (r14, 0x18)
+    1b76:	7bcd      	jsr      	r3
+    1b78:	9809      	ld.w      	r0, (r14, 0x24)
+    1b7a:	6018      	addu      	r0, r6
+    1b7c:	b809      	st.w      	r0, (r14, 0x24)
+    1b7e:	8420      	ld.b      	r1, (r4, 0x0)
+    1b80:	3940      	cmpnei      	r1, 0
+    1b82:	0803      	bt      	0x1b88	// 1b88 <__v2_printf+0x4c>
+    1b84:	e8000367 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1b88:	3637      	movi      	r6, 55
+    1b8a:	1a01      	addi      	r2, r14, 4
+    1b8c:	3700      	movi      	r7, 0
+    1b8e:	6188      	addu      	r6, r2
+    1b90:	a6e0      	st.b      	r7, (r6, 0x0)
+    1b92:	3300      	movi      	r3, 0
+    1b94:	3600      	movi      	r6, 0
+    1b96:	2400      	addi      	r4, 1
+    1b98:	3000      	movi      	r0, 0
+    1b9a:	3100      	movi      	r1, 0
+    1b9c:	2e00      	subi      	r6, 1
+    1b9e:	b867      	st.w      	r3, (r14, 0x1c)
+    1ba0:	3700      	movi      	r7, 0
+    1ba2:	5c42      	addi      	r2, r4, 1
+    1ba4:	b846      	st.w      	r2, (r14, 0x18)
+    1ba6:	8480      	ld.b      	r4, (r4, 0x0)
+    1ba8:	3364      	movi      	r3, 100
+    1baa:	64d2      	cmpne      	r4, r3
+    1bac:	0d90      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1bae:	650d      	cmplt      	r3, r4
+    1bb0:	084e      	bt      	0x1c4c	// 1c4c <__v2_printf+0x110>
+    1bb2:	322e      	movi      	r2, 46
+    1bb4:	6492      	cmpne      	r4, r2
+    1bb6:	0d41      	bf      	0x1e38	// 1e38 <__v2_printf+0x2fc>
+    1bb8:	6509      	cmplt      	r2, r4
+    1bba:	0829      	bt      	0x1c0c	// 1c0c <__v2_printf+0xd0>
+    1bbc:	332a      	movi      	r3, 42
+    1bbe:	64d2      	cmpne      	r4, r3
+    1bc0:	0d31      	bf      	0x1e22	// 1e22 <__v2_printf+0x2e6>
+    1bc2:	650d      	cmplt      	r3, r4
+    1bc4:	081c      	bt      	0x1bfc	// 1bfc <__v2_printf+0xc0>
+    1bc6:	3220      	movi      	r2, 32
+    1bc8:	6492      	cmpne      	r4, r2
+    1bca:	0d25      	bf      	0x1e14	// 1e14 <__v2_printf+0x2d8>
+    1bcc:	3323      	movi      	r3, 35
+    1bce:	64d2      	cmpne      	r4, r3
+    1bd0:	0d27      	bf      	0x1e1e	// 1e1e <__v2_printf+0x2e2>
+    1bd2:	3c40      	cmpnei      	r4, 0
+    1bd4:	0803      	bt      	0x1bda	// 1bda <__v2_printf+0x9e>
+    1bd6:	e800033e 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1bda:	1e12      	addi      	r6, r14, 72
+    1bdc:	3037      	movi      	r0, 55
+    1bde:	1a01      	addi      	r2, r14, 4
+    1be0:	a680      	st.b      	r4, (r6, 0x0)
+    1be2:	6008      	addu      	r0, r2
+    1be4:	3400      	movi      	r4, 0
+    1be6:	a080      	st.b      	r4, (r0, 0x0)
+    1be8:	b8a5      	st.w      	r5, (r14, 0x14)
+    1bea:	042c      	br      	0x1c42	// 1c42 <__v2_printf+0x106>
+    1bec:	2400      	addi      	r4, 1
+    1bee:	07b6      	br      	0x1b5a	// 1b5a <__v2_printf+0x1e>
+    1bf0:	3001      	movi      	r0, 1
+    1bf2:	312b      	movi      	r1, 43
+    1bf4:	9886      	ld.w      	r4, (r14, 0x18)
+    1bf6:	07d6      	br      	0x1ba2	// 1ba2 <__v2_printf+0x66>
+    1bf8:	6d4f      	mov      	r5, r3
+    1bfa:	07fd      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1bfc:	322b      	movi      	r2, 43
+    1bfe:	6492      	cmpne      	r4, r2
+    1c00:	0ff8      	bf      	0x1bf0	// 1bf0 <__v2_printf+0xb4>
+    1c02:	332d      	movi      	r3, 45
+    1c04:	64d2      	cmpne      	r4, r3
+    1c06:	0be6      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c08:	3fa2      	bseti      	r7, 2
+    1c0a:	07f5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c0c:	3339      	movi      	r3, 57
+    1c0e:	650d      	cmplt      	r3, r4
+    1c10:	0809      	bt      	0x1c22	// 1c22 <__v2_printf+0xe6>
+    1c12:	3231      	movi      	r2, 49
+    1c14:	6491      	cmplt      	r4, r2
+    1c16:	0d34      	bf      	0x1e7e	// 1e7e <__v2_printf+0x342>
+    1c18:	3330      	movi      	r3, 48
+    1c1a:	64d2      	cmpne      	r4, r3
+    1c1c:	0bdb      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c1e:	3fa7      	bseti      	r7, 7
+    1c20:	07ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c22:	3258      	movi      	r2, 88
+    1c24:	6492      	cmpne      	r4, r2
+    1c26:	0cd3      	bf      	0x1dcc	// 1dcc <__v2_printf+0x290>
+    1c28:	3063      	movi      	r0, 99
+    1c2a:	6412      	cmpne      	r4, r0
+    1c2c:	0bd3      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c2e:	3337      	movi      	r3, 55
+    1c30:	1a01      	addi      	r2, r14, 4
+    1c32:	5d2e      	addi      	r1, r5, 4
+    1c34:	85c0      	ld.b      	r6, (r5, 0x0)
+    1c36:	3400      	movi      	r4, 0
+    1c38:	1d12      	addi      	r5, r14, 72
+    1c3a:	60c8      	addu      	r3, r2
+    1c3c:	b825      	st.w      	r1, (r14, 0x14)
+    1c3e:	a5c0      	st.b      	r6, (r5, 0x0)
+    1c40:	a380      	st.b      	r4, (r3, 0x0)
+    1c42:	3601      	movi      	r6, 1
+    1c44:	3500      	movi      	r5, 0
+    1c46:	1c12      	addi      	r4, r14, 72
+    1c48:	e8000295 	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1c4c:	336d      	movi      	r3, 109
+    1c4e:	64d2      	cmpne      	r4, r3
+    1c50:	0d2d      	bf      	0x1eaa	// 1eaa <__v2_printf+0x36e>
+    1c52:	650d      	cmplt      	r3, r4
+    1c54:	0883      	bt      	0x1d5a	// 1d5a <__v2_printf+0x21e>
+    1c56:	3268      	movi      	r2, 104
+    1c58:	6492      	cmpne      	r4, r2
+    1c5a:	0d24      	bf      	0x1ea2	// 1ea2 <__v2_printf+0x366>
+    1c5c:	6509      	cmplt      	r2, r4
+    1c5e:	086f      	bt      	0x1d3c	// 1d3c <__v2_printf+0x200>
+    1c60:	3366      	movi      	r3, 102
+    1c62:	64d1      	cmplt      	r4, r3
+    1c64:	0bb7      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c66:	3840      	cmpnei      	r0, 0
+    1c68:	0c05      	bf      	0x1c72	// 1c72 <__v2_printf+0x136>
+    1c6a:	3037      	movi      	r0, 55
+    1c6c:	1a01      	addi      	r2, r14, 4
+    1c6e:	6008      	addu      	r0, r2
+    1c70:	a020      	st.b      	r1, (r0, 0x0)
+    1c72:	5d3e      	addi      	r1, r5, 8
+    1c74:	b825      	st.w      	r1, (r14, 0x14)
+    1c76:	9500      	ld.w      	r0, (r5, 0x0)
+    1c78:	9521      	ld.w      	r1, (r5, 0x4)
+    1c7a:	98a7      	ld.w      	r5, (r14, 0x1c)
+    1c7c:	3d40      	cmpnei      	r5, 0
+    1c7e:	0803      	bt      	0x1c84	// 1c84 <__v2_printf+0x148>
+    1c80:	3301      	movi      	r3, 1
+    1c82:	b867      	st.w      	r3, (r14, 0x1c)
+    1c84:	3200      	movi      	r2, 0
+    1c86:	2a00      	subi      	r2, 1
+    1c88:	649a      	cmpne      	r6, r2
+    1c8a:	0d58      	bf      	0x1f3a	// 1f3a <__v2_printf+0x3fe>
+    1c8c:	6d5b      	mov      	r5, r6
+    1c8e:	9867      	ld.w      	r3, (r14, 0x1c)
+    1c90:	b860      	st.w      	r3, (r14, 0x0)
+    1c92:	b8a1      	st.w      	r5, (r14, 0x4)
+    1c94:	3328      	movi      	r3, 40
+    1c96:	1a12      	addi      	r2, r14, 72
+    1c98:	e000069d 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    1c9c:	3100      	movi      	r1, 0
+    1c9e:	2900      	subi      	r1, 1
+    1ca0:	645a      	cmpne      	r6, r1
+    1ca2:	b808      	st.w      	r0, (r14, 0x20)
+    1ca4:	0c1a      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1ca6:	312e      	movi      	r1, 46
+    1ca8:	980d      	ld.w      	r0, (r14, 0x34)
+    1caa:	e00008c9 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cae:	3840      	cmpnei      	r0, 0
+    1cb0:	98c8      	ld.w      	r6, (r14, 0x20)
+    1cb2:	0d48      	bf      	0x1f42	// 1f42 <__v2_printf+0x406>
+    1cb4:	3d40      	cmpnei      	r5, 0
+    1cb6:	0805      	bt      	0x1cc0	// 1cc0 <__v2_printf+0x184>
+    1cb8:	3101      	movi      	r1, 1
+    1cba:	685c      	and      	r1, r7
+    1cbc:	3940      	cmpnei      	r1, 0
+    1cbe:	0d40      	bf      	0x1f3e	// 1f3e <__v2_printf+0x402>
+    1cc0:	58c2      	addi      	r6, r0, 1
+    1cc2:	2500      	addi      	r5, 1
+    1cc4:	5d59      	subu      	r2, r5, r6
+    1cc6:	6080      	addu      	r2, r0
+    1cc8:	3a20      	cmplti      	r2, 1
+    1cca:	0805      	bt      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1ccc:	2600      	addi      	r6, 1
+    1cce:	8660      	ld.b      	r3, (r6, 0x0)
+    1cd0:	3b40      	cmpnei      	r3, 0
+    1cd2:	0bf9      	bt      	0x1cc4	// 1cc4 <__v2_printf+0x188>
+    1cd4:	3500      	movi      	r5, 0
+    1cd6:	a6a0      	st.b      	r5, (r6, 0x0)
+    1cd8:	3067      	movi      	r0, 103
+    1cda:	6412      	cmpne      	r4, r0
+    1cdc:	0822      	bt      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cde:	312e      	movi      	r1, 46
+    1ce0:	1812      	addi      	r0, r14, 72
+    1ce2:	e00008ad 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1ce6:	3840      	cmpnei      	r0, 0
+    1ce8:	6d03      	mov      	r4, r0
+    1cea:	0c1b      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cec:	3165      	movi      	r1, 101
+    1cee:	e00008a7 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cf2:	6c43      	mov      	r1, r0
+    1cf4:	84c0      	ld.b      	r6, (r4, 0x0)
+    1cf6:	3e40      	cmpnei      	r6, 0
+    1cf8:	0930      	bt      	0x1f58	// 1f58 <__v2_printf+0x41c>
+    1cfa:	3940      	cmpnei      	r1, 0
+    1cfc:	0c02      	bf      	0x1d00	// 1d00 <__v2_printf+0x1c4>
+    1cfe:	6d07      	mov      	r4, r1
+    1d00:	3630      	movi      	r6, 48
+    1d02:	5c63      	subi      	r3, r4, 1
+    1d04:	8340      	ld.b      	r2, (r3, 0x0)
+    1d06:	658a      	cmpne      	r2, r6
+    1d08:	0d2a      	bf      	0x1f5c	// 1f5c <__v2_printf+0x420>
+    1d0a:	352e      	movi      	r5, 46
+    1d0c:	654a      	cmpne      	r2, r5
+    1d0e:	0802      	bt      	0x1d12	// 1d12 <__v2_printf+0x1d6>
+    1d10:	6d0f      	mov      	r4, r3
+    1d12:	3000      	movi      	r0, 0
+    1d14:	3940      	cmpnei      	r1, 0
+    1d16:	a400      	st.b      	r0, (r4, 0x0)
+    1d18:	0c04      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1d1a:	6c13      	mov      	r0, r4
+    1d1c:	e0000838 	bsr      	0x2d8c	// 2d8c <__strcpy_fast>
+    1d20:	1912      	addi      	r1, r14, 72
+    1d22:	81c0      	ld.b      	r6, (r1, 0x0)
+    1d24:	332d      	movi      	r3, 45
+    1d26:	64da      	cmpne      	r6, r3
+    1d28:	0c02      	bf      	0x1d2c	// 1d2c <__v2_printf+0x1f0>
+    1d2a:	05ef      	br      	0x2108	// 2108 <__v2_printf+0x5cc>
+    1d2c:	3437      	movi      	r4, 55
+    1d2e:	1801      	addi      	r0, r14, 4
+    1d30:	352d      	movi      	r5, 45
+    1d32:	6100      	addu      	r4, r0
+    1d34:	a4a0      	st.b      	r5, (r4, 0x0)
+    1d36:	1912      	addi      	r1, r14, 72
+    1d38:	5982      	addi      	r4, r1, 1
+    1d3a:	05ec      	br      	0x2112	// 2112 <__v2_printf+0x5d6>
+    1d3c:	3369      	movi      	r3, 105
+    1d3e:	64d2      	cmpne      	r4, r3
+    1d40:	0cc6      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1d42:	326c      	movi      	r2, 108
+    1d44:	6492      	cmpne      	r4, r2
+    1d46:	0b46      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d48:	9866      	ld.w      	r3, (r14, 0x18)
+    1d4a:	8340      	ld.b      	r2, (r3, 0x0)
+    1d4c:	650a      	cmpne      	r2, r4
+    1d4e:	08ac      	bt      	0x1ea6	// 1ea6 <__v2_printf+0x36a>
+    1d50:	9886      	ld.w      	r4, (r14, 0x18)
+    1d52:	2400      	addi      	r4, 1
+    1d54:	b886      	st.w      	r4, (r14, 0x18)
+    1d56:	3fa5      	bseti      	r7, 5
+    1d58:	074e      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1d5a:	3371      	movi      	r3, 113
+    1d5c:	64d2      	cmpne      	r4, r3
+    1d5e:	0ffc      	bf      	0x1d56	// 1d56 <__v2_printf+0x21a>
+    1d60:	650d      	cmplt      	r3, r4
+    1d62:	081a      	bt      	0x1d96	// 1d96 <__v2_printf+0x25a>
+    1d64:	306f      	movi      	r0, 111
+    1d66:	6412      	cmpne      	r4, r0
+    1d68:	0cfc      	bf      	0x1f60	// 1f60 <__v2_printf+0x424>
+    1d6a:	3170      	movi      	r1, 112
+    1d6c:	6452      	cmpne      	r4, r1
+    1d6e:	0b32      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d70:	5d4e      	addi      	r2, r5, 4
+    1d72:	3400      	movi      	r4, 0
+    1d74:	95a0      	ld.w      	r5, (r5, 0x0)
+    1d76:	b845      	st.w      	r2, (r14, 0x14)
+    1d78:	1901      	addi      	r1, r14, 4
+    1d7a:	3239      	movi      	r2, 57
+    1d7c:	b8a3      	st.w      	r5, (r14, 0xc)
+    1d7e:	b884      	st.w      	r4, (r14, 0x10)
+    1d80:	3330      	movi      	r3, 48
+    1d82:	180f      	addi      	r0, r14, 60
+    1d84:	3578      	movi      	r5, 120
+    1d86:	6084      	addu      	r2, r1
+    1d88:	0195      	lrw      	r4, 0x6078	// 20b0 <__v2_printf+0x574>
+    1d8a:	3fa1      	bseti      	r7, 1
+    1d8c:	a060      	st.b      	r3, (r0, 0x0)
+    1d8e:	a2a0      	st.b      	r5, (r2, 0x0)
+    1d90:	b88a      	st.w      	r4, (r14, 0x28)
+    1d92:	3402      	movi      	r4, 2
+    1d94:	04f1      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1d96:	3275      	movi      	r2, 117
+    1d98:	6492      	cmpne      	r4, r2
+    1d9a:	0d28      	bf      	0x1fea	// 1fea <__v2_printf+0x4ae>
+    1d9c:	3378      	movi      	r3, 120
+    1d9e:	64d2      	cmpne      	r4, r3
+    1da0:	0d44      	bf      	0x2028	// 2028 <__v2_printf+0x4ec>
+    1da2:	3173      	movi      	r1, 115
+    1da4:	6452      	cmpne      	r4, r1
+    1da6:	0b16      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1da8:	3200      	movi      	r2, 0
+    1daa:	3037      	movi      	r0, 55
+    1dac:	1901      	addi      	r1, r14, 4
+    1dae:	2a00      	subi      	r2, 1
+    1db0:	5d6e      	addi      	r3, r5, 4
+    1db2:	9580      	ld.w      	r4, (r5, 0x0)
+    1db4:	6004      	addu      	r0, r1
+    1db6:	3500      	movi      	r5, 0
+    1db8:	649a      	cmpne      	r6, r2
+    1dba:	b865      	st.w      	r3, (r14, 0x14)
+    1dbc:	a0a0      	st.b      	r5, (r0, 0x0)
+    1dbe:	090b      	bt      	0x1fd4	// 1fd4 <__v2_printf+0x498>
+    1dc0:	6cd3      	mov      	r3, r4
+    1dc2:	83c0      	ld.b      	r6, (r3, 0x0)
+    1dc4:	3e40      	cmpnei      	r6, 0
+    1dc6:	0910      	bt      	0x1fe6	// 1fe6 <__v2_printf+0x4aa>
+    1dc8:	5bd1      	subu      	r6, r3, r4
+    1dca:	047f      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1dcc:	3840      	cmpnei      	r0, 0
+    1dce:	0c05      	bf      	0x1dd8	// 1dd8 <__v2_printf+0x29c>
+    1dd0:	3037      	movi      	r0, 55
+    1dd2:	1b01      	addi      	r3, r14, 4
+    1dd4:	600c      	addu      	r0, r3
+    1dd6:	a020      	st.b      	r1, (r0, 0x0)
+    1dd8:	0228      	lrw      	r1, 0x6067	// 20b4 <__v2_printf+0x578>
+    1dda:	3020      	movi      	r0, 32
+    1ddc:	681c      	and      	r0, r7
+    1dde:	3840      	cmpnei      	r0, 0
+    1de0:	b82a      	st.w      	r1, (r14, 0x28)
+    1de2:	0d2b      	bf      	0x2038	// 2038 <__v2_printf+0x4fc>
+    1de4:	5d5e      	addi      	r2, r5, 8
+    1de6:	b845      	st.w      	r2, (r14, 0x14)
+    1de8:	9520      	ld.w      	r1, (r5, 0x0)
+    1dea:	9541      	ld.w      	r2, (r5, 0x4)
+    1dec:	b823      	st.w      	r1, (r14, 0xc)
+    1dee:	b844      	st.w      	r2, (r14, 0x10)
+    1df0:	3001      	movi      	r0, 1
+    1df2:	681c      	and      	r0, r7
+    1df4:	3840      	cmpnei      	r0, 0
+    1df6:	0fce      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1df8:	98a3      	ld.w      	r5, (r14, 0xc)
+    1dfa:	9864      	ld.w      	r3, (r14, 0x10)
+    1dfc:	6d4c      	or      	r5, r3
+    1dfe:	3d40      	cmpnei      	r5, 0
+    1e00:	0fc9      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e02:	3039      	movi      	r0, 57
+    1e04:	1d01      	addi      	r5, r14, 4
+    1e06:	3130      	movi      	r1, 48
+    1e08:	1a0f      	addi      	r2, r14, 60
+    1e0a:	6014      	addu      	r0, r5
+    1e0c:	a220      	st.b      	r1, (r2, 0x0)
+    1e0e:	a080      	st.b      	r4, (r0, 0x0)
+    1e10:	3fa1      	bseti      	r7, 1
+    1e12:	07c0      	br      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e14:	3940      	cmpnei      	r1, 0
+    1e16:	0aef      	bt      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e18:	3001      	movi      	r0, 1
+    1e1a:	3120      	movi      	r1, 32
+    1e1c:	06ec      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e1e:	3fa0      	bseti      	r7, 0
+    1e20:	06ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e22:	9580      	ld.w      	r4, (r5, 0x0)
+    1e24:	3cdf      	btsti      	r4, 31
+    1e26:	5d6e      	addi      	r3, r5, 4
+    1e28:	b887      	st.w      	r4, (r14, 0x1c)
+    1e2a:	0ee7      	bf      	0x1bf8	// 1bf8 <__v2_printf+0xbc>
+    1e2c:	9847      	ld.w      	r2, (r14, 0x1c)
+    1e2e:	3500      	movi      	r5, 0
+    1e30:	614a      	subu      	r5, r2
+    1e32:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1e34:	6d4f      	mov      	r5, r3
+    1e36:	06e9      	br      	0x1c08	// 1c08 <__v2_printf+0xcc>
+    1e38:	98c6      	ld.w      	r6, (r14, 0x18)
+    1e3a:	8680      	ld.b      	r4, (r6, 0x0)
+    1e3c:	322a      	movi      	r2, 42
+    1e3e:	9866      	ld.w      	r3, (r14, 0x18)
+    1e40:	6492      	cmpne      	r4, r2
+    1e42:	2300      	addi      	r3, 1
+    1e44:	0c0b      	bf      	0x1e5a	// 1e5a <__v2_printf+0x31e>
+    1e46:	b865      	st.w      	r3, (r14, 0x14)
+    1e48:	3600      	movi      	r6, 0
+    1e4a:	3300      	movi      	r3, 0
+    1e4c:	2b2f      	subi      	r3, 48
+    1e4e:	60d0      	addu      	r3, r4
+    1e50:	3b09      	cmphsi      	r3, 10
+    1e52:	9845      	ld.w      	r2, (r14, 0x14)
+    1e54:	0c0c      	bf      	0x1e6c	// 1e6c <__v2_printf+0x330>
+    1e56:	b846      	st.w      	r2, (r14, 0x18)
+    1e58:	06a8      	br      	0x1ba8	// 1ba8 <__v2_printf+0x6c>
+    1e5a:	95c0      	ld.w      	r6, (r5, 0x0)
+    1e5c:	3edf      	btsti      	r6, 31
+    1e5e:	5d8e      	addi      	r4, r5, 4
+    1e60:	0c03      	bf      	0x1e66	// 1e66 <__v2_printf+0x32a>
+    1e62:	3600      	movi      	r6, 0
+    1e64:	2e00      	subi      	r6, 1
+    1e66:	6d53      	mov      	r5, r4
+    1e68:	b866      	st.w      	r3, (r14, 0x18)
+    1e6a:	06c5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e6c:	340a      	movi      	r4, 10
+    1e6e:	7d18      	mult      	r4, r6
+    1e70:	9845      	ld.w      	r2, (r14, 0x14)
+    1e72:	6d8f      	mov      	r6, r3
+    1e74:	6190      	addu      	r6, r4
+    1e76:	8280      	ld.b      	r4, (r2, 0x0)
+    1e78:	2200      	addi      	r2, 1
+    1e7a:	b845      	st.w      	r2, (r14, 0x14)
+    1e7c:	07e7      	br      	0x1e4a	// 1e4a <__v2_printf+0x30e>
+    1e7e:	3200      	movi      	r2, 0
+    1e80:	b847      	st.w      	r2, (r14, 0x1c)
+    1e82:	9867      	ld.w      	r3, (r14, 0x1c)
+    1e84:	320a      	movi      	r2, 10
+    1e86:	7cc8      	mult      	r3, r2
+    1e88:	2c2f      	subi      	r4, 48
+    1e8a:	610c      	addu      	r4, r3
+    1e8c:	b887      	st.w      	r4, (r14, 0x1c)
+    1e8e:	3300      	movi      	r3, 0
+    1e90:	9886      	ld.w      	r4, (r14, 0x18)
+    1e92:	5c42      	addi      	r2, r4, 1
+    1e94:	2b2f      	subi      	r3, 48
+    1e96:	8480      	ld.b      	r4, (r4, 0x0)
+    1e98:	60d0      	addu      	r3, r4
+    1e9a:	3b09      	cmphsi      	r3, 10
+    1e9c:	b846      	st.w      	r2, (r14, 0x18)
+    1e9e:	0ff2      	bf      	0x1e82	// 1e82 <__v2_printf+0x346>
+    1ea0:	07db      	br      	0x1e56	// 1e56 <__v2_printf+0x31a>
+    1ea2:	3fa6      	bseti      	r7, 6
+    1ea4:	06a8      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1ea6:	3fa4      	bseti      	r7, 4
+    1ea8:	06a6      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1eaa:	3840      	cmpnei      	r0, 0
+    1eac:	0c05      	bf      	0x1eb6	// 1eb6 <__v2_printf+0x37a>
+    1eae:	3637      	movi      	r6, 55
+    1eb0:	1b01      	addi      	r3, r14, 4
+    1eb2:	618c      	addu      	r6, r3
+    1eb4:	a620      	st.b      	r1, (r6, 0x0)
+    1eb6:	033e      	lrw      	r1, 0x20000750	// 20b8 <__v2_printf+0x57c>
+    1eb8:	9100      	ld.w      	r0, (r1, 0x0)
+    1eba:	e00007cb 	bsr      	0x2e50	// 2e50 <__GI_strerror>
+    1ebe:	6d03      	mov      	r4, r0
+    1ec0:	e000073c 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    1ec4:	6d83      	mov      	r6, r0
+    1ec6:	b8a5      	st.w      	r5, (r14, 0x14)
+    1ec8:	3500      	movi      	r5, 0
+    1eca:	0554      	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1ecc:	3840      	cmpnei      	r0, 0
+    1ece:	0c05      	bf      	0x1ed8	// 1ed8 <__v2_printf+0x39c>
+    1ed0:	3037      	movi      	r0, 55
+    1ed2:	1a01      	addi      	r2, r14, 4
+    1ed4:	6008      	addu      	r0, r2
+    1ed6:	a020      	st.b      	r1, (r0, 0x0)
+    1ed8:	3420      	movi      	r4, 32
+    1eda:	691c      	and      	r4, r7
+    1edc:	3c40      	cmpnei      	r4, 0
+    1ede:	0c1a      	bf      	0x1f12	// 1f12 <__v2_printf+0x3d6>
+    1ee0:	5d7e      	addi      	r3, r5, 8
+    1ee2:	9520      	ld.w      	r1, (r5, 0x0)
+    1ee4:	9541      	ld.w      	r2, (r5, 0x4)
+    1ee6:	b865      	st.w      	r3, (r14, 0x14)
+    1ee8:	b823      	st.w      	r1, (r14, 0xc)
+    1eea:	b844      	st.w      	r2, (r14, 0x10)
+    1eec:	9804      	ld.w      	r0, (r14, 0x10)
+    1eee:	38df      	btsti      	r0, 31
+    1ef0:	0c0f      	bf      	0x1f0e	// 1f0e <__v2_printf+0x3d2>
+    1ef2:	9883      	ld.w      	r4, (r14, 0xc)
+    1ef4:	98a4      	ld.w      	r5, (r14, 0x10)
+    1ef6:	3200      	movi      	r2, 0
+    1ef8:	3300      	movi      	r3, 0
+    1efa:	6488      	cmphs      	r2, r2
+    1efc:	6093      	subc      	r2, r4
+    1efe:	60d7      	subc      	r3, r5
+    1f00:	b843      	st.w      	r2, (r14, 0xc)
+    1f02:	b864      	st.w      	r3, (r14, 0x10)
+    1f04:	3237      	movi      	r2, 55
+    1f06:	1b01      	addi      	r3, r14, 4
+    1f08:	352d      	movi      	r5, 45
+    1f0a:	608c      	addu      	r2, r3
+    1f0c:	a2a0      	st.b      	r5, (r2, 0x0)
+    1f0e:	3401      	movi      	r4, 1
+    1f10:	0438      	br      	0x1f80	// 1f80 <__v2_printf+0x444>
+    1f12:	3310      	movi      	r3, 16
+    1f14:	68dc      	and      	r3, r7
+    1f16:	3b40      	cmpnei      	r3, 0
+    1f18:	0c08      	bf      	0x1f28	// 1f28 <__v2_printf+0x3ec>
+    1f1a:	5d4e      	addi      	r2, r5, 4
+    1f1c:	b845      	st.w      	r2, (r14, 0x14)
+    1f1e:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f20:	559f      	asri      	r4, r5, 31
+    1f22:	b8a3      	st.w      	r5, (r14, 0xc)
+    1f24:	b884      	st.w      	r4, (r14, 0x10)
+    1f26:	07e3      	br      	0x1eec	// 1eec <__v2_printf+0x3b0>
+    1f28:	3140      	movi      	r1, 64
+    1f2a:	685c      	and      	r1, r7
+    1f2c:	5d0e      	addi      	r0, r5, 4
+    1f2e:	3940      	cmpnei      	r1, 0
+    1f30:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f32:	b805      	st.w      	r0, (r14, 0x14)
+    1f34:	0ff6      	bf      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f36:	7557      	sexth      	r5, r5
+    1f38:	07f4      	br      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f3a:	3506      	movi      	r5, 6
+    1f3c:	06a9      	br      	0x1c8e	// 1c8e <__v2_printf+0x152>
+    1f3e:	6d83      	mov      	r6, r0
+    1f40:	06ca      	br      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1f42:	3201      	movi      	r2, 1
+    1f44:	689c      	and      	r2, r7
+    1f46:	3a40      	cmpnei      	r2, 0
+    1f48:	0ec8      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f4a:	1d12      	addi      	r5, r14, 72
+    1f4c:	6158      	addu      	r5, r6
+    1f4e:	332e      	movi      	r3, 46
+    1f50:	3000      	movi      	r0, 0
+    1f52:	a560      	st.b      	r3, (r5, 0x0)
+    1f54:	a501      	st.b      	r0, (r5, 0x1)
+    1f56:	06c1      	br      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f58:	2400      	addi      	r4, 1
+    1f5a:	06cd      	br      	0x1cf4	// 1cf4 <__v2_printf+0x1b8>
+    1f5c:	6d0f      	mov      	r4, r3
+    1f5e:	06d2      	br      	0x1d02	// 1d02 <__v2_printf+0x1c6>
+    1f60:	3320      	movi      	r3, 32
+    1f62:	68dc      	and      	r3, r7
+    1f64:	3b40      	cmpnei      	r3, 0
+    1f66:	0c24      	bf      	0x1fae	// 1fae <__v2_printf+0x472>
+    1f68:	5d7e      	addi      	r3, r5, 8
+    1f6a:	9500      	ld.w      	r0, (r5, 0x0)
+    1f6c:	9521      	ld.w      	r1, (r5, 0x4)
+    1f6e:	b865      	st.w      	r3, (r14, 0x14)
+    1f70:	b803      	st.w      	r0, (r14, 0xc)
+    1f72:	b824      	st.w      	r1, (r14, 0x10)
+    1f74:	3400      	movi      	r4, 0
+    1f76:	3537      	movi      	r5, 55
+    1f78:	1801      	addi      	r0, r14, 4
+    1f7a:	3200      	movi      	r2, 0
+    1f7c:	6140      	addu      	r5, r0
+    1f7e:	a540      	st.b      	r2, (r5, 0x0)
+    1f80:	3100      	movi      	r1, 0
+    1f82:	2900      	subi      	r1, 1
+    1f84:	9803      	ld.w      	r0, (r14, 0xc)
+    1f86:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f88:	645a      	cmpne      	r6, r1
+    1f8a:	6c14      	or      	r0, r5
+    1f8c:	0cc8      	bf      	0x211c	// 211c <__v2_printf+0x5e0>
+    1f8e:	6c9f      	mov      	r2, r7
+    1f90:	3a87      	bclri      	r2, 7
+    1f92:	3840      	cmpnei      	r0, 0
+    1f94:	b848      	st.w      	r2, (r14, 0x20)
+    1f96:	08c6      	bt      	0x2122	// 2122 <__v2_printf+0x5e6>
+    1f98:	3e40      	cmpnei      	r6, 0
+    1f9a:	0cac      	bf      	0x20f2	// 20f2 <__v2_printf+0x5b6>
+    1f9c:	3c41      	cmpnei      	r4, 1
+    1f9e:	0c68      	bf      	0x206e	// 206e <__v2_printf+0x532>
+    1fa0:	3c42      	cmpnei      	r4, 2
+    1fa2:	0c8d      	bf      	0x20bc	// 20bc <__v2_printf+0x580>
+    1fa4:	3300      	movi      	r3, 0
+    1fa6:	3400      	movi      	r4, 0
+    1fa8:	b863      	st.w      	r3, (r14, 0xc)
+    1faa:	b884      	st.w      	r4, (r14, 0x10)
+    1fac:	04bf      	br      	0x212a	// 212a <__v2_printf+0x5ee>
+    1fae:	3010      	movi      	r0, 16
+    1fb0:	681c      	and      	r0, r7
+    1fb2:	3840      	cmpnei      	r0, 0
+    1fb4:	0c05      	bf      	0x1fbe	// 1fbe <__v2_printf+0x482>
+    1fb6:	5d8e      	addi      	r4, r5, 4
+    1fb8:	b885      	st.w      	r4, (r14, 0x14)
+    1fba:	95a0      	ld.w      	r5, (r5, 0x0)
+    1fbc:	0408      	br      	0x1fcc	// 1fcc <__v2_printf+0x490>
+    1fbe:	3240      	movi      	r2, 64
+    1fc0:	689c      	and      	r2, r7
+    1fc2:	5d2e      	addi      	r1, r5, 4
+    1fc4:	3a40      	cmpnei      	r2, 0
+    1fc6:	b825      	st.w      	r1, (r14, 0x14)
+    1fc8:	0ff9      	bf      	0x1fba	// 1fba <__v2_printf+0x47e>
+    1fca:	8da0      	ld.h      	r5, (r5, 0x0)
+    1fcc:	3400      	movi      	r4, 0
+    1fce:	b8a3      	st.w      	r5, (r14, 0xc)
+    1fd0:	b884      	st.w      	r4, (r14, 0x10)
+    1fd2:	07d2      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1fd4:	5cb8      	addu      	r5, r4, r6
+    1fd6:	6cd3      	mov      	r3, r4
+    1fd8:	654e      	cmpne      	r3, r5
+    1fda:	0f77      	bf      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1fdc:	8300      	ld.b      	r0, (r3, 0x0)
+    1fde:	3840      	cmpnei      	r0, 0
+    1fe0:	0ef4      	bf      	0x1dc8	// 1dc8 <__v2_printf+0x28c>
+    1fe2:	2300      	addi      	r3, 1
+    1fe4:	07fa      	br      	0x1fd8	// 1fd8 <__v2_printf+0x49c>
+    1fe6:	2300      	addi      	r3, 1
+    1fe8:	06ed      	br      	0x1dc2	// 1dc2 <__v2_printf+0x286>
+    1fea:	3420      	movi      	r4, 32
+    1fec:	691c      	and      	r4, r7
+    1fee:	3c40      	cmpnei      	r4, 0
+    1ff0:	0c09      	bf      	0x2002	// 2002 <__v2_printf+0x4c6>
+    1ff2:	5d7e      	addi      	r3, r5, 8
+    1ff4:	9520      	ld.w      	r1, (r5, 0x0)
+    1ff6:	9541      	ld.w      	r2, (r5, 0x4)
+    1ff8:	b865      	st.w      	r3, (r14, 0x14)
+    1ffa:	b823      	st.w      	r1, (r14, 0xc)
+    1ffc:	b844      	st.w      	r2, (r14, 0x10)
+    1ffe:	3401      	movi      	r4, 1
+    2000:	07bb      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    2002:	3310      	movi      	r3, 16
+    2004:	68dc      	and      	r3, r7
+    2006:	3b40      	cmpnei      	r3, 0
+    2008:	0c05      	bf      	0x2012	// 2012 <__v2_printf+0x4d6>
+    200a:	5d0e      	addi      	r0, r5, 4
+    200c:	b805      	st.w      	r0, (r14, 0x14)
+    200e:	95a0      	ld.w      	r5, (r5, 0x0)
+    2010:	0408      	br      	0x2020	// 2020 <__v2_printf+0x4e4>
+    2012:	3140      	movi      	r1, 64
+    2014:	685c      	and      	r1, r7
+    2016:	5d4e      	addi      	r2, r5, 4
+    2018:	3940      	cmpnei      	r1, 0
+    201a:	b845      	st.w      	r2, (r14, 0x14)
+    201c:	0ff9      	bf      	0x200e	// 200e <__v2_printf+0x4d2>
+    201e:	8da0      	ld.h      	r5, (r5, 0x0)
+    2020:	3400      	movi      	r4, 0
+    2022:	b8a3      	st.w      	r5, (r14, 0xc)
+    2024:	b884      	st.w      	r4, (r14, 0x10)
+    2026:	07ec      	br      	0x1ffe	// 1ffe <__v2_printf+0x4c2>
+    2028:	3840      	cmpnei      	r0, 0
+    202a:	0c05      	bf      	0x2034	// 2034 <__v2_printf+0x4f8>
+    202c:	3337      	movi      	r3, 55
+    202e:	1a01      	addi      	r2, r14, 4
+    2030:	60c8      	addu      	r3, r2
+    2032:	a320      	st.b      	r1, (r3, 0x0)
+    2034:	103f      	lrw      	r1, 0x6078	// 20b0 <__v2_printf+0x574>
+    2036:	06d2      	br      	0x1dda	// 1dda <__v2_printf+0x29e>
+    2038:	3310      	movi      	r3, 16
+    203a:	68dc      	and      	r3, r7
+    203c:	3b40      	cmpnei      	r3, 0
+    203e:	0c05      	bf      	0x2048	// 2048 <__v2_printf+0x50c>
+    2040:	5d0e      	addi      	r0, r5, 4
+    2042:	b805      	st.w      	r0, (r14, 0x14)
+    2044:	95a0      	ld.w      	r5, (r5, 0x0)
+    2046:	0408      	br      	0x2056	// 2056 <__v2_printf+0x51a>
+    2048:	3240      	movi      	r2, 64
+    204a:	689c      	and      	r2, r7
+    204c:	5d2e      	addi      	r1, r5, 4
+    204e:	3a40      	cmpnei      	r2, 0
+    2050:	b825      	st.w      	r1, (r14, 0x14)
+    2052:	0ff9      	bf      	0x2044	// 2044 <__v2_printf+0x508>
+    2054:	8da0      	ld.h      	r5, (r5, 0x0)
+    2056:	3300      	movi      	r3, 0
+    2058:	b8a3      	st.w      	r5, (r14, 0xc)
+    205a:	b864      	st.w      	r3, (r14, 0x10)
+    205c:	06ca      	br      	0x1df0	// 1df0 <__v2_printf+0x2b4>
+    205e:	6cd3      	mov      	r3, r4
+    2060:	0467      	br      	0x212e	// 212e <__v2_printf+0x5f2>
+    2062:	9884      	ld.w      	r4, (r14, 0x10)
+    2064:	3c40      	cmpnei      	r4, 0
+    2066:	080b      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    2068:	9843      	ld.w      	r2, (r14, 0xc)
+    206a:	3a09      	cmphsi      	r2, 10
+    206c:	0808      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    206e:	9883      	ld.w      	r4, (r14, 0xc)
+    2070:	242f      	addi      	r4, 48
+    2072:	1f1a      	addi      	r7, r14, 104
+    2074:	a787      	st.b      	r4, (r7, 0x7)
+    2076:	1c12      	addi      	r4, r14, 72
+    2078:	2426      	addi      	r4, 39
+    207a:	0478      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    207c:	1c1c      	addi      	r4, r14, 112
+    207e:	3530      	movi      	r5, 48
+    2080:	320a      	movi      	r2, 10
+    2082:	3300      	movi      	r3, 0
+    2084:	9803      	ld.w      	r0, (r14, 0xc)
+    2086:	9824      	ld.w      	r1, (r14, 0x10)
+    2088:	e00002c2 	bsr      	0x260c	// 260c <__umoddi3>
+    208c:	6014      	addu      	r0, r5
+    208e:	2c00      	subi      	r4, 1
+    2090:	a400      	st.b      	r0, (r4, 0x0)
+    2092:	320a      	movi      	r2, 10
+    2094:	9803      	ld.w      	r0, (r14, 0xc)
+    2096:	9824      	ld.w      	r1, (r14, 0x10)
+    2098:	3300      	movi      	r3, 0
+    209a:	e00000e3 	bsr      	0x2260	// 2260 <__udivdi3>
+    209e:	b803      	st.w      	r0, (r14, 0xc)
+    20a0:	b824      	st.w      	r1, (r14, 0x10)
+    20a2:	9823      	ld.w      	r1, (r14, 0xc)
+    20a4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20a6:	6c5c      	or      	r1, r7
+    20a8:	3940      	cmpnei      	r1, 0
+    20aa:	0beb      	bt      	0x2080	// 2080 <__v2_printf+0x544>
+    20ac:	045f      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20ae:	0000      	bkpt
+    20b0:	00006078 	.long	0x00006078
+    20b4:	00006067 	.long	0x00006067
+    20b8:	20000750 	.long	0x20000750
+    20bc:	3300      	movi      	r3, 0
+    20be:	3400      	movi      	r4, 0
+    20c0:	b863      	st.w      	r3, (r14, 0xc)
+    20c2:	b884      	st.w      	r4, (r14, 0x10)
+    20c4:	1c1c      	addi      	r4, r14, 112
+    20c6:	320f      	movi      	r2, 15
+    20c8:	9803      	ld.w      	r0, (r14, 0xc)
+    20ca:	982a      	ld.w      	r1, (r14, 0x28)
+    20cc:	6808      	and      	r0, r2
+    20ce:	6004      	addu      	r0, r1
+    20d0:	80a0      	ld.b      	r5, (r0, 0x0)
+    20d2:	2c00      	subi      	r4, 1
+    20d4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20d6:	a4a0      	st.b      	r5, (r4, 0x0)
+    20d8:	98a4      	ld.w      	r5, (r14, 0x10)
+    20da:	9863      	ld.w      	r3, (r14, 0xc)
+    20dc:	471c      	lsli      	r0, r7, 28
+    20de:	4de4      	lsri      	r7, r5, 4
+    20e0:	4b24      	lsri      	r1, r3, 4
+    20e2:	b8e4      	st.w      	r7, (r14, 0x10)
+    20e4:	6c04      	or      	r0, r1
+    20e6:	9864      	ld.w      	r3, (r14, 0x10)
+    20e8:	b803      	st.w      	r0, (r14, 0xc)
+    20ea:	6c0c      	or      	r0, r3
+    20ec:	3840      	cmpnei      	r0, 0
+    20ee:	0bed      	bt      	0x20c8	// 20c8 <__v2_printf+0x58c>
+    20f0:	043d      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20f2:	3c40      	cmpnei      	r4, 0
+    20f4:	0808      	bt      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20f6:	3301      	movi      	r3, 1
+    20f8:	68dc      	and      	r3, r7
+    20fa:	3b40      	cmpnei      	r3, 0
+    20fc:	0c04      	bf      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20fe:	1f1a      	addi      	r7, r14, 104
+    2100:	3430      	movi      	r4, 48
+    2102:	07b9      	br      	0x2074	// 2074 <__v2_printf+0x538>
+    2104:	1c1c      	addi      	r4, r14, 112
+    2106:	0432      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    2108:	322b      	movi      	r2, 43
+    210a:	649a      	cmpne      	r6, r2
+    210c:	0802      	bt      	0x2110	// 2110 <__v2_printf+0x5d4>
+    210e:	0614      	br      	0x1d36	// 1d36 <__v2_printf+0x1fa>
+    2110:	1c12      	addi      	r4, r14, 72
+    2112:	6c13      	mov      	r0, r4
+    2114:	e0000612 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    2118:	6d83      	mov      	r6, r0
+    211a:	06d7      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    211c:	3840      	cmpnei      	r0, 0
+    211e:	b8e8      	st.w      	r7, (r14, 0x20)
+    2120:	0f3e      	bf      	0x1f9c	// 1f9c <__v2_printf+0x460>
+    2122:	3c41      	cmpnei      	r4, 1
+    2124:	0f9f      	bf      	0x2062	// 2062 <__v2_printf+0x526>
+    2126:	3c42      	cmpnei      	r4, 2
+    2128:	0fce      	bf      	0x20c4	// 20c4 <__v2_printf+0x588>
+    212a:	1b1c      	addi      	r3, r14, 112
+    212c:	3707      	movi      	r7, 7
+    212e:	9823      	ld.w      	r1, (r14, 0xc)
+    2130:	685c      	and      	r1, r7
+    2132:	212f      	addi      	r1, 48
+    2134:	9804      	ld.w      	r0, (r14, 0x10)
+    2136:	7484      	zextb      	r2, r1
+    2138:	9823      	ld.w      	r1, (r14, 0xc)
+    213a:	40bd      	lsli      	r5, r0, 29
+    213c:	4903      	lsri      	r0, r1, 3
+    213e:	9824      	ld.w      	r1, (r14, 0x10)
+    2140:	4923      	lsri      	r1, r1, 3
+    2142:	b824      	st.w      	r1, (r14, 0x10)
+    2144:	6d40      	or      	r5, r0
+    2146:	9804      	ld.w      	r0, (r14, 0x10)
+    2148:	b8a3      	st.w      	r5, (r14, 0xc)
+    214a:	6d40      	or      	r5, r0
+    214c:	5b83      	subi      	r4, r3, 1
+    214e:	3d40      	cmpnei      	r5, 0
+    2150:	a440      	st.b      	r2, (r4, 0x0)
+    2152:	0b86      	bt      	0x205e	// 205e <__v2_printf+0x522>
+    2154:	3701      	movi      	r7, 1
+    2156:	9828      	ld.w      	r1, (r14, 0x20)
+    2158:	69c4      	and      	r7, r1
+    215a:	3f40      	cmpnei      	r7, 0
+    215c:	0c07      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    215e:	3530      	movi      	r5, 48
+    2160:	654a      	cmpne      	r2, r5
+    2162:	0c04      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    2164:	5b87      	subi      	r4, r3, 2
+    2166:	3330      	movi      	r3, 48
+    2168:	a460      	st.b      	r3, (r4, 0x0)
+    216a:	6d5b      	mov      	r5, r6
+    216c:	1e1c      	addi      	r6, r14, 112
+    216e:	6192      	subu      	r6, r4
+    2170:	98e8      	ld.w      	r7, (r14, 0x20)
+    2172:	6595      	cmplt      	r5, r6
+    2174:	b8a8      	st.w      	r5, (r14, 0x20)
+    2176:	0c02      	bf      	0x217a	// 217a <__v2_printf+0x63e>
+    2178:	b8c8      	st.w      	r6, (r14, 0x20)
+    217a:	3037      	movi      	r0, 55
+    217c:	1b01      	addi      	r3, r14, 4
+    217e:	600c      	addu      	r0, r3
+    2180:	8040      	ld.b      	r2, (r0, 0x0)
+    2182:	3a40      	cmpnei      	r2, 0
+    2184:	0c04      	bf      	0x218c	// 218c <__v2_printf+0x650>
+    2186:	9828      	ld.w      	r1, (r14, 0x20)
+    2188:	2100      	addi      	r1, 1
+    218a:	b828      	st.w      	r1, (r14, 0x20)
+    218c:	3002      	movi      	r0, 2
+    218e:	681c      	and      	r0, r7
+    2190:	3840      	cmpnei      	r0, 0
+    2192:	b80b      	st.w      	r0, (r14, 0x2c)
+    2194:	0c04      	bf      	0x219c	// 219c <__v2_printf+0x660>
+    2196:	9868      	ld.w      	r3, (r14, 0x20)
+    2198:	2301      	addi      	r3, 2
+    219a:	b868      	st.w      	r3, (r14, 0x20)
+    219c:	3284      	movi      	r2, 132
+    219e:	689c      	and      	r2, r7
+    21a0:	3a40      	cmpnei      	r2, 0
+    21a2:	b84c      	st.w      	r2, (r14, 0x30)
+    21a4:	080b      	bt      	0x21ba	// 21ba <__v2_printf+0x67e>
+    21a6:	3310      	movi      	r3, 16
+    21a8:	1a0c      	addi      	r2, r14, 48
+    21aa:	9827      	ld.w      	r1, (r14, 0x1c)
+    21ac:	9808      	ld.w      	r0, (r14, 0x20)
+    21ae:	60c8      	addu      	r3, r2
+    21b0:	5901      	subu      	r0, r1, r0
+    21b2:	6f4f      	mov      	r13, r3
+    21b4:	1129      	lrw      	r1, 0x5cdc	// 2258 <__v2_printf+0x71c>
+    21b6:	e3fffca9 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    21ba:	3137      	movi      	r1, 55
+    21bc:	1801      	addi      	r0, r14, 4
+    21be:	6040      	addu      	r1, r0
+    21c0:	8160      	ld.b      	r3, (r1, 0x0)
+    21c2:	3b40      	cmpnei      	r3, 0
+    21c4:	0c0b      	bf      	0x21da	// 21da <__v2_printf+0x69e>
+    21c6:	9830      	ld.w      	r1, (r14, 0x40)
+    21c8:	9101      	ld.w      	r0, (r1, 0x4)
+    21ca:	b802      	st.w      	r0, (r14, 0x8)
+    21cc:	1b0c      	addi      	r3, r14, 48
+    21ce:	300b      	movi      	r0, 11
+    21d0:	9140      	ld.w      	r2, (r1, 0x0)
+    21d2:	600c      	addu      	r0, r3
+    21d4:	3101      	movi      	r1, 1
+    21d6:	9862      	ld.w      	r3, (r14, 0x8)
+    21d8:	7bcd      	jsr      	r3
+    21da:	984b      	ld.w      	r2, (r14, 0x2c)
+    21dc:	3a40      	cmpnei      	r2, 0
+    21de:	0c07      	bf      	0x21ec	// 21ec <__v2_printf+0x6b0>
+    21e0:	9830      	ld.w      	r1, (r14, 0x40)
+    21e2:	9140      	ld.w      	r2, (r1, 0x0)
+    21e4:	9161      	ld.w      	r3, (r1, 0x4)
+    21e6:	180f      	addi      	r0, r14, 60
+    21e8:	3102      	movi      	r1, 2
+    21ea:	7bcd      	jsr      	r3
+    21ec:	3080      	movi      	r0, 128
+    21ee:	984c      	ld.w      	r2, (r14, 0x30)
+    21f0:	640a      	cmpne      	r2, r0
+    21f2:	080b      	bt      	0x2208	// 2208 <__v2_printf+0x6cc>
+    21f4:	9827      	ld.w      	r1, (r14, 0x1c)
+    21f6:	9868      	ld.w      	r3, (r14, 0x20)
+    21f8:	590d      	subu      	r0, r1, r3
+    21fa:	1a0c      	addi      	r2, r14, 48
+    21fc:	3110      	movi      	r1, 16
+    21fe:	6048      	addu      	r1, r2
+    2200:	6f47      	mov      	r13, r1
+    2202:	1037      	lrw      	r1, 0x5cec	// 225c <__v2_printf+0x720>
+    2204:	e3fffc82 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    2208:	5d19      	subu      	r0, r5, r6
+    220a:	1b0c      	addi      	r3, r14, 48
+    220c:	3510      	movi      	r5, 16
+    220e:	614c      	addu      	r5, r3
+    2210:	6f57      	mov      	r13, r5
+    2212:	6d77      	mov      	r5, r13
+    2214:	1032      	lrw      	r1, 0x5cec	// 225c <__v2_printf+0x720>
+    2216:	e3fffc79 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    221a:	9500      	ld.w      	r0, (r5, 0x0)
+    221c:	9040      	ld.w      	r2, (r0, 0x0)
+    221e:	9061      	ld.w      	r3, (r0, 0x4)
+    2220:	6c13      	mov      	r0, r4
+    2222:	3404      	movi      	r4, 4
+    2224:	6c5b      	mov      	r1, r6
+    2226:	691c      	and      	r4, r7
+    2228:	7bcd      	jsr      	r3
+    222a:	3c40      	cmpnei      	r4, 0
+    222c:	0c08      	bf      	0x223c	// 223c <__v2_printf+0x700>
+    222e:	9828      	ld.w      	r1, (r14, 0x20)
+    2230:	98c7      	ld.w      	r6, (r14, 0x1c)
+    2232:	5e05      	subu      	r0, r6, r1
+    2234:	6f57      	mov      	r13, r5
+    2236:	1029      	lrw      	r1, 0x5cdc	// 2258 <__v2_printf+0x71c>
+    2238:	e3fffc68 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    223c:	98a7      	ld.w      	r5, (r14, 0x1c)
+    223e:	9848      	ld.w      	r2, (r14, 0x20)
+    2240:	6495      	cmplt      	r5, r2
+    2242:	0c02      	bf      	0x2246	// 2246 <__v2_printf+0x70a>
+    2244:	6d4b      	mov      	r5, r2
+    2246:	9809      	ld.w      	r0, (r14, 0x24)
+    2248:	6014      	addu      	r0, r5
+    224a:	b809      	st.w      	r0, (r14, 0x24)
+    224c:	98a5      	ld.w      	r5, (r14, 0x14)
+    224e:	e800fc84 	br      	0x1b56	// 1b56 <__v2_printf+0x1a>
+    2252:	9809      	ld.w      	r0, (r14, 0x24)
+    2254:	141c      	addi      	r14, r14, 112
+    2256:	1494      	pop      	r4-r7, r15
+    2258:	00005cdc 	.long	0x00005cdc
+    225c:	00005cec 	.long	0x00005cec
+
+00002260 <__udivdi3>:
+    2260:	14d4      	push      	r4-r7, r15
+    2262:	1426      	subi      	r14, r14, 24
+    2264:	6dc7      	mov      	r7, r1
+    2266:	3b40      	cmpnei      	r3, 0
+    2268:	6d03      	mov      	r4, r0
+    226a:	6c4f      	mov      	r1, r3
+    226c:	6d8b      	mov      	r6, r2
+    226e:	b800      	st.w      	r0, (r14, 0x0)
+    2270:	6d5f      	mov      	r5, r7
+    2272:	085b      	bt      	0x2328	// 2328 <__udivdi3+0xc8>
+    2274:	649c      	cmphs      	r7, r2
+    2276:	0874      	bt      	0x235e	// 235e <__udivdi3+0xfe>
+    2278:	003d      	lrw      	r1, 0xffff	// 2600 <__udivdi3+0x3a0>
+    227a:	6484      	cmphs      	r1, r2
+    227c:	0cdc      	bf      	0x2434	// 2434 <__udivdi3+0x1d4>
+    227e:	31ff      	movi      	r1, 255
+    2280:	6484      	cmphs      	r1, r2
+    2282:	0802      	bt      	0x2286	// 2286 <__udivdi3+0x26>
+    2284:	3308      	movi      	r3, 8
+    2286:	6c4b      	mov      	r1, r2
+    2288:	704d      	lsr      	r1, r3
+    228a:	0100      	lrw      	r0, 0x5bdc	// 2604 <__udivdi3+0x3a4>
+    228c:	6040      	addu      	r1, r0
+    228e:	8120      	ld.b      	r1, (r1, 0x0)
+    2290:	60c4      	addu      	r3, r1
+    2292:	3120      	movi      	r1, 32
+    2294:	604e      	subu      	r1, r3
+    2296:	3940      	cmpnei      	r1, 0
+    2298:	0c09      	bf      	0x22aa	// 22aa <__udivdi3+0x4a>
+    229a:	6d53      	mov      	r5, r4
+    229c:	7084      	lsl      	r2, r1
+    229e:	71c4      	lsl      	r7, r1
+    22a0:	714d      	lsr      	r5, r3
+    22a2:	7104      	lsl      	r4, r1
+    22a4:	6d8b      	mov      	r6, r2
+    22a6:	6d5c      	or      	r5, r7
+    22a8:	b880      	st.w      	r4, (r14, 0x0)
+    22aa:	4e90      	lsri      	r4, r6, 16
+    22ac:	6c53      	mov      	r1, r4
+    22ae:	6c17      	mov      	r0, r5
+    22b0:	e00010d4 	bsr      	0x4458	// 4458 <__umodsi3>
+    22b4:	b801      	st.w      	r0, (r14, 0x4)
+    22b6:	6c53      	mov      	r1, r4
+    22b8:	6c17      	mov      	r0, r5
+    22ba:	e00010ab 	bsr      	0x4410	// 4410 <__udivsi3>
+    22be:	75d9      	zexth      	r7, r6
+    22c0:	9861      	ld.w      	r3, (r14, 0x4)
+    22c2:	9820      	ld.w      	r1, (r14, 0x0)
+    22c4:	6c9f      	mov      	r2, r7
+    22c6:	4370      	lsli      	r3, r3, 16
+    22c8:	4930      	lsri      	r1, r1, 16
+    22ca:	7c80      	mult      	r2, r0
+    22cc:	6cc4      	or      	r3, r1
+    22ce:	648c      	cmphs      	r3, r2
+    22d0:	6d43      	mov      	r5, r0
+    22d2:	0808      	bt      	0x22e2	// 22e2 <__udivdi3+0x82>
+    22d4:	60d8      	addu      	r3, r6
+    22d6:	658c      	cmphs      	r3, r6
+    22d8:	5823      	subi      	r1, r0, 1
+    22da:	0c03      	bf      	0x22e0	// 22e0 <__udivdi3+0x80>
+    22dc:	648c      	cmphs      	r3, r2
+    22de:	0d8e      	bf      	0x25fa	// 25fa <__udivdi3+0x39a>
+    22e0:	6d47      	mov      	r5, r1
+    22e2:	60ca      	subu      	r3, r2
+    22e4:	6c53      	mov      	r1, r4
+    22e6:	6c0f      	mov      	r0, r3
+    22e8:	b862      	st.w      	r3, (r14, 0x8)
+    22ea:	e00010b7 	bsr      	0x4458	// 4458 <__umodsi3>
+    22ee:	9862      	ld.w      	r3, (r14, 0x8)
+    22f0:	b801      	st.w      	r0, (r14, 0x4)
+    22f2:	6c53      	mov      	r1, r4
+    22f4:	6c0f      	mov      	r0, r3
+    22f6:	e000108d 	bsr      	0x4410	// 4410 <__udivsi3>
+    22fa:	9841      	ld.w      	r2, (r14, 0x4)
+    22fc:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2300:	4250      	lsli      	r2, r2, 16
+    2302:	74cd      	zexth      	r3, r3
+    2304:	7dc0      	mult      	r7, r0
+    2306:	6c8c      	or      	r2, r3
+    2308:	65c8      	cmphs      	r2, r7
+    230a:	6d03      	mov      	r4, r0
+    230c:	0808      	bt      	0x231c	// 231c <__udivdi3+0xbc>
+    230e:	6098      	addu      	r2, r6
+    2310:	6588      	cmphs      	r2, r6
+    2312:	5863      	subi      	r3, r0, 1
+    2314:	0d4d      	bf      	0x25ae	// 25ae <__udivdi3+0x34e>
+    2316:	65c8      	cmphs      	r2, r7
+    2318:	094b      	bt      	0x25ae	// 25ae <__udivdi3+0x34e>
+    231a:	2c01      	subi      	r4, 2
+    231c:	4510      	lsli      	r0, r5, 16
+    231e:	3700      	movi      	r7, 0
+    2320:	6c10      	or      	r0, r4
+    2322:	6c5f      	mov      	r1, r7
+    2324:	1406      	addi      	r14, r14, 24
+    2326:	1494      	pop      	r4-r7, r15
+    2328:	64dc      	cmphs      	r7, r3
+    232a:	0c76      	bf      	0x2416	// 2416 <__udivdi3+0x1b6>
+    232c:	026a      	lrw      	r3, 0xffff	// 2600 <__udivdi3+0x3a0>
+    232e:	644c      	cmphs      	r3, r1
+    2330:	0878      	bt      	0x2420	// 2420 <__udivdi3+0x1c0>
+    2332:	0269      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2334:	644c      	cmphs      	r3, r1
+    2336:	0d48      	bf      	0x25c6	// 25c6 <__udivdi3+0x366>
+    2338:	3610      	movi      	r6, 16
+    233a:	6cc7      	mov      	r3, r1
+    233c:	70d9      	lsr      	r3, r6
+    233e:	020d      	lrw      	r0, 0x5bdc	// 2604 <__udivdi3+0x3a4>
+    2340:	60c0      	addu      	r3, r0
+    2342:	8360      	ld.b      	r3, (r3, 0x0)
+    2344:	618c      	addu      	r6, r3
+    2346:	3020      	movi      	r0, 32
+    2348:	5879      	subu      	r3, r0, r6
+    234a:	3b40      	cmpnei      	r3, 0
+    234c:	b860      	st.w      	r3, (r14, 0x0)
+    234e:	0878      	bt      	0x243e	// 243e <__udivdi3+0x1de>
+    2350:	65c4      	cmphs      	r1, r7
+    2352:	0d40      	bf      	0x25d2	// 25d2 <__udivdi3+0x372>
+    2354:	6490      	cmphs      	r4, r2
+    2356:	6c0f      	mov      	r0, r3
+    2358:	600d      	addc      	r0, r3
+    235a:	3700      	movi      	r7, 0
+    235c:	045f      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    235e:	3a40      	cmpnei      	r2, 0
+    2360:	0808      	bt      	0x2370	// 2370 <__udivdi3+0x110>
+    2362:	3100      	movi      	r1, 0
+    2364:	3001      	movi      	r0, 1
+    2366:	b861      	st.w      	r3, (r14, 0x4)
+    2368:	e0001054 	bsr      	0x4410	// 4410 <__udivsi3>
+    236c:	6d83      	mov      	r6, r0
+    236e:	9861      	ld.w      	r3, (r14, 0x4)
+    2370:	025b      	lrw      	r2, 0xffff	// 2600 <__udivdi3+0x3a0>
+    2372:	6588      	cmphs      	r2, r6
+    2374:	085b      	bt      	0x242a	// 242a <__udivdi3+0x1ca>
+    2376:	027a      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2378:	658c      	cmphs      	r3, r6
+    237a:	0d28      	bf      	0x25ca	// 25ca <__udivdi3+0x36a>
+    237c:	3310      	movi      	r3, 16
+    237e:	6c9b      	mov      	r2, r6
+    2380:	023e      	lrw      	r1, 0x5bdc	// 2604 <__udivdi3+0x3a4>
+    2382:	708d      	lsr      	r2, r3
+    2384:	6084      	addu      	r2, r1
+    2386:	8240      	ld.b      	r2, (r2, 0x0)
+    2388:	5a2c      	addu      	r1, r2, r3
+    238a:	3220      	movi      	r2, 32
+    238c:	6086      	subu      	r2, r1
+    238e:	3a40      	cmpnei      	r2, 0
+    2390:	08c0      	bt      	0x2510	// 2510 <__udivdi3+0x2b0>
+    2392:	74d9      	zexth      	r3, r6
+    2394:	5f99      	subu      	r4, r7, r6
+    2396:	4eb0      	lsri      	r5, r6, 16
+    2398:	b861      	st.w      	r3, (r14, 0x4)
+    239a:	3701      	movi      	r7, 1
+    239c:	6c57      	mov      	r1, r5
+    239e:	6c13      	mov      	r0, r4
+    23a0:	e000105c 	bsr      	0x4458	// 4458 <__umodsi3>
+    23a4:	b802      	st.w      	r0, (r14, 0x8)
+    23a6:	6c57      	mov      	r1, r5
+    23a8:	6c13      	mov      	r0, r4
+    23aa:	e0001033 	bsr      	0x4410	// 4410 <__udivsi3>
+    23ae:	9862      	ld.w      	r3, (r14, 0x8)
+    23b0:	4330      	lsli      	r1, r3, 16
+    23b2:	9860      	ld.w      	r3, (r14, 0x0)
+    23b4:	9841      	ld.w      	r2, (r14, 0x4)
+    23b6:	4b70      	lsri      	r3, r3, 16
+    23b8:	7c80      	mult      	r2, r0
+    23ba:	6cc4      	or      	r3, r1
+    23bc:	648c      	cmphs      	r3, r2
+    23be:	6d03      	mov      	r4, r0
+    23c0:	0808      	bt      	0x23d0	// 23d0 <__udivdi3+0x170>
+    23c2:	60d8      	addu      	r3, r6
+    23c4:	658c      	cmphs      	r3, r6
+    23c6:	5823      	subi      	r1, r0, 1
+    23c8:	0c03      	bf      	0x23ce	// 23ce <__udivdi3+0x16e>
+    23ca:	648c      	cmphs      	r3, r2
+    23cc:	0d14      	bf      	0x25f4	// 25f4 <__udivdi3+0x394>
+    23ce:	6d07      	mov      	r4, r1
+    23d0:	60ca      	subu      	r3, r2
+    23d2:	6c57      	mov      	r1, r5
+    23d4:	6c0f      	mov      	r0, r3
+    23d6:	b863      	st.w      	r3, (r14, 0xc)
+    23d8:	e0001040 	bsr      	0x4458	// 4458 <__umodsi3>
+    23dc:	9863      	ld.w      	r3, (r14, 0xc)
+    23de:	6c57      	mov      	r1, r5
+    23e0:	b802      	st.w      	r0, (r14, 0x8)
+    23e2:	6c0f      	mov      	r0, r3
+    23e4:	e0001016 	bsr      	0x4410	// 4410 <__udivsi3>
+    23e8:	9842      	ld.w      	r2, (r14, 0x8)
+    23ea:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    23ee:	9821      	ld.w      	r1, (r14, 0x4)
+    23f0:	4250      	lsli      	r2, r2, 16
+    23f2:	74cd      	zexth      	r3, r3
+    23f4:	7c40      	mult      	r1, r0
+    23f6:	6cc8      	or      	r3, r2
+    23f8:	644c      	cmphs      	r3, r1
+    23fa:	6d43      	mov      	r5, r0
+    23fc:	0808      	bt      	0x240c	// 240c <__udivdi3+0x1ac>
+    23fe:	60d8      	addu      	r3, r6
+    2400:	658c      	cmphs      	r3, r6
+    2402:	5843      	subi      	r2, r0, 1
+    2404:	0cd3      	bf      	0x25aa	// 25aa <__udivdi3+0x34a>
+    2406:	644c      	cmphs      	r3, r1
+    2408:	08d1      	bt      	0x25aa	// 25aa <__udivdi3+0x34a>
+    240a:	2d01      	subi      	r5, 2
+    240c:	4410      	lsli      	r0, r4, 16
+    240e:	6c14      	or      	r0, r5
+    2410:	6c5f      	mov      	r1, r7
+    2412:	1406      	addi      	r14, r14, 24
+    2414:	1494      	pop      	r4-r7, r15
+    2416:	3700      	movi      	r7, 0
+    2418:	3000      	movi      	r0, 0
+    241a:	6c5f      	mov      	r1, r7
+    241c:	1406      	addi      	r14, r14, 24
+    241e:	1494      	pop      	r4-r7, r15
+    2420:	33ff      	movi      	r3, 255
+    2422:	644c      	cmphs      	r3, r1
+    2424:	6583      	mvcv      	r6
+    2426:	46c3      	lsli      	r6, r6, 3
+    2428:	0789      	br      	0x233a	// 233a <__udivdi3+0xda>
+    242a:	32ff      	movi      	r2, 255
+    242c:	6588      	cmphs      	r2, r6
+    242e:	0ba8      	bt      	0x237e	// 237e <__udivdi3+0x11e>
+    2430:	3308      	movi      	r3, 8
+    2432:	07a6      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    2434:	1375      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2436:	648c      	cmphs      	r3, r2
+    2438:	0ccb      	bf      	0x25ce	// 25ce <__udivdi3+0x36e>
+    243a:	3310      	movi      	r3, 16
+    243c:	0725      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    243e:	9800      	ld.w      	r0, (r14, 0x0)
+    2440:	6ccb      	mov      	r3, r2
+    2442:	6d4b      	mov      	r5, r2
+    2444:	7040      	lsl      	r1, r0
+    2446:	7140      	lsl      	r5, r0
+    2448:	70d9      	lsr      	r3, r6
+    244a:	6cc4      	or      	r3, r1
+    244c:	b8a3      	st.w      	r5, (r14, 0xc)
+    244e:	6d53      	mov      	r5, r4
+    2450:	6c4f      	mov      	r1, r3
+    2452:	7159      	lsr      	r5, r6
+    2454:	6cdf      	mov      	r3, r7
+    2456:	71c0      	lsl      	r7, r0
+    2458:	6d5c      	or      	r5, r7
+    245a:	70d9      	lsr      	r3, r6
+    245c:	b8a1      	st.w      	r5, (r14, 0x4)
+    245e:	49b0      	lsri      	r5, r1, 16
+    2460:	b822      	st.w      	r1, (r14, 0x8)
+    2462:	75c5      	zexth      	r7, r1
+    2464:	6c0f      	mov      	r0, r3
+    2466:	6c57      	mov      	r1, r5
+    2468:	b864      	st.w      	r3, (r14, 0x10)
+    246a:	e0000ff7 	bsr      	0x4458	// 4458 <__umodsi3>
+    246e:	9864      	ld.w      	r3, (r14, 0x10)
+    2470:	6d83      	mov      	r6, r0
+    2472:	6c57      	mov      	r1, r5
+    2474:	6c0f      	mov      	r0, r3
+    2476:	e0000fcd 	bsr      	0x4410	// 4410 <__udivsi3>
+    247a:	6c5f      	mov      	r1, r7
+    247c:	7c40      	mult      	r1, r0
+    247e:	6c87      	mov      	r2, r1
+    2480:	4630      	lsli      	r1, r6, 16
+    2482:	98c1      	ld.w      	r6, (r14, 0x4)
+    2484:	4ed0      	lsri      	r6, r6, 16
+    2486:	6d84      	or      	r6, r1
+    2488:	6498      	cmphs      	r6, r2
+    248a:	6cc3      	mov      	r3, r0
+    248c:	0807      	bt      	0x249a	// 249a <__udivdi3+0x23a>
+    248e:	5823      	subi      	r1, r0, 1
+    2490:	9802      	ld.w      	r0, (r14, 0x8)
+    2492:	6180      	addu      	r6, r0
+    2494:	6418      	cmphs      	r6, r0
+    2496:	08a6      	bt      	0x25e2	// 25e2 <__udivdi3+0x382>
+    2498:	6cc7      	mov      	r3, r1
+    249a:	618a      	subu      	r6, r2
+    249c:	6c57      	mov      	r1, r5
+    249e:	6c1b      	mov      	r0, r6
+    24a0:	b865      	st.w      	r3, (r14, 0x14)
+    24a2:	e0000fdb 	bsr      	0x4458	// 4458 <__umodsi3>
+    24a6:	b804      	st.w      	r0, (r14, 0x10)
+    24a8:	6c57      	mov      	r1, r5
+    24aa:	6c1b      	mov      	r0, r6
+    24ac:	e0000fb2 	bsr      	0x4410	// 4410 <__udivsi3>
+    24b0:	9864      	ld.w      	r3, (r14, 0x10)
+    24b2:	6c9f      	mov      	r2, r7
+    24b4:	43f0      	lsli      	r7, r3, 16
+    24b6:	d86e1002 	ld.h      	r3, (r14, 0x4)
+    24ba:	744d      	zexth      	r1, r3
+    24bc:	7c80      	mult      	r2, r0
+    24be:	6dc4      	or      	r7, r1
+    24c0:	649c      	cmphs      	r7, r2
+    24c2:	9865      	ld.w      	r3, (r14, 0x14)
+    24c4:	0807      	bt      	0x24d2	// 24d2 <__udivdi3+0x272>
+    24c6:	98a2      	ld.w      	r5, (r14, 0x8)
+    24c8:	61d4      	addu      	r7, r5
+    24ca:	655c      	cmphs      	r7, r5
+    24cc:	5823      	subi      	r1, r0, 1
+    24ce:	0885      	bt      	0x25d8	// 25d8 <__udivdi3+0x378>
+    24d0:	6c07      	mov      	r0, r1
+    24d2:	4370      	lsli      	r3, r3, 16
+    24d4:	6c0c      	or      	r0, r3
+    24d6:	74c1      	zexth      	r3, r0
+    24d8:	61ca      	subu      	r7, r2
+    24da:	9843      	ld.w      	r2, (r14, 0xc)
+    24dc:	7549      	zexth      	r5, r2
+    24de:	4830      	lsri      	r1, r0, 16
+    24e0:	4a50      	lsri      	r2, r2, 16
+    24e2:	6d8f      	mov      	r6, r3
+    24e4:	7d94      	mult      	r6, r5
+    24e6:	7cc8      	mult      	r3, r2
+    24e8:	7d44      	mult      	r5, r1
+    24ea:	60d4      	addu      	r3, r5
+    24ec:	7c48      	mult      	r1, r2
+    24ee:	4e50      	lsri      	r2, r6, 16
+    24f0:	60c8      	addu      	r3, r2
+    24f2:	654c      	cmphs      	r3, r5
+    24f4:	0804      	bt      	0x24fc	// 24fc <__udivdi3+0x29c>
+    24f6:	3280      	movi      	r2, 128
+    24f8:	4249      	lsli      	r2, r2, 9
+    24fa:	6048      	addu      	r1, r2
+    24fc:	4b50      	lsri      	r2, r3, 16
+    24fe:	6048      	addu      	r1, r2
+    2500:	645c      	cmphs      	r7, r1
+    2502:	0c5f      	bf      	0x25c0	// 25c0 <__udivdi3+0x360>
+    2504:	645e      	cmpne      	r7, r1
+    2506:	0c56      	bf      	0x25b2	// 25b2 <__udivdi3+0x352>
+    2508:	3700      	movi      	r7, 0
+    250a:	6c5f      	mov      	r1, r7
+    250c:	1406      	addi      	r14, r14, 24
+    250e:	1494      	pop      	r4-r7, r15
+    2510:	6d53      	mov      	r5, r4
+    2512:	6cdf      	mov      	r3, r7
+    2514:	7145      	lsr      	r5, r1
+    2516:	71c8      	lsl      	r7, r2
+    2518:	7188      	lsl      	r6, r2
+    251a:	6d5c      	or      	r5, r7
+    251c:	70c5      	lsr      	r3, r1
+    251e:	6dd7      	mov      	r7, r5
+    2520:	b8a3      	st.w      	r5, (r14, 0xc)
+    2522:	4eb0      	lsri      	r5, r6, 16
+    2524:	7108      	lsl      	r4, r2
+    2526:	6c57      	mov      	r1, r5
+    2528:	7499      	zexth      	r2, r6
+    252a:	6c0f      	mov      	r0, r3
+    252c:	b841      	st.w      	r2, (r14, 0x4)
+    252e:	b880      	st.w      	r4, (r14, 0x0)
+    2530:	b862      	st.w      	r3, (r14, 0x8)
+    2532:	e0000f93 	bsr      	0x4458	// 4458 <__umodsi3>
+    2536:	9862      	ld.w      	r3, (r14, 0x8)
+    2538:	6d03      	mov      	r4, r0
+    253a:	6c57      	mov      	r1, r5
+    253c:	6c0f      	mov      	r0, r3
+    253e:	e0000f69 	bsr      	0x4410	// 4410 <__udivsi3>
+    2542:	6cc3      	mov      	r3, r0
+    2544:	7499      	zexth      	r2, r6
+    2546:	7cc8      	mult      	r3, r2
+    2548:	4450      	lsli      	r2, r4, 16
+    254a:	4f90      	lsri      	r4, r7, 16
+    254c:	6d08      	or      	r4, r2
+    254e:	64d0      	cmphs      	r4, r3
+    2550:	6c43      	mov      	r1, r0
+    2552:	b802      	st.w      	r0, (r14, 0x8)
+    2554:	080b      	bt      	0x256a	// 256a <__udivdi3+0x30a>
+    2556:	6118      	addu      	r4, r6
+    2558:	6c87      	mov      	r2, r1
+    255a:	6590      	cmphs      	r4, r6
+    255c:	2a00      	subi      	r2, 1
+    255e:	0c49      	bf      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2560:	64d0      	cmphs      	r4, r3
+    2562:	0847      	bt      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2564:	2a00      	subi      	r2, 1
+    2566:	b842      	st.w      	r2, (r14, 0x8)
+    2568:	6118      	addu      	r4, r6
+    256a:	610e      	subu      	r4, r3
+    256c:	6c57      	mov      	r1, r5
+    256e:	6c13      	mov      	r0, r4
+    2570:	e0000f74 	bsr      	0x4458	// 4458 <__umodsi3>
+    2574:	6dc3      	mov      	r7, r0
+    2576:	6c57      	mov      	r1, r5
+    2578:	6c13      	mov      	r0, r4
+    257a:	e0000f4b 	bsr      	0x4410	// 4410 <__udivsi3>
+    257e:	d84e1006 	ld.h      	r2, (r14, 0xc)
+    2582:	74d9      	zexth      	r3, r6
+    2584:	47f0      	lsli      	r7, r7, 16
+    2586:	7509      	zexth      	r4, r2
+    2588:	7cc0      	mult      	r3, r0
+    258a:	6dd0      	or      	r7, r4
+    258c:	64dc      	cmphs      	r7, r3
+    258e:	0809      	bt      	0x25a0	// 25a0 <__udivdi3+0x340>
+    2590:	61d8      	addu      	r7, r6
+    2592:	659c      	cmphs      	r7, r6
+    2594:	5843      	subi      	r2, r0, 1
+    2596:	0c2b      	bf      	0x25ec	// 25ec <__udivdi3+0x38c>
+    2598:	64dc      	cmphs      	r7, r3
+    259a:	0829      	bt      	0x25ec	// 25ec <__udivdi3+0x38c>
+    259c:	2801      	subi      	r0, 2
+    259e:	61d8      	addu      	r7, r6
+    25a0:	5f8d      	subu      	r4, r7, r3
+    25a2:	9862      	ld.w      	r3, (r14, 0x8)
+    25a4:	43f0      	lsli      	r7, r3, 16
+    25a6:	6dc0      	or      	r7, r0
+    25a8:	06fa      	br      	0x239c	// 239c <__udivdi3+0x13c>
+    25aa:	6d4b      	mov      	r5, r2
+    25ac:	0730      	br      	0x240c	// 240c <__udivdi3+0x1ac>
+    25ae:	6d0f      	mov      	r4, r3
+    25b0:	06b6      	br      	0x231c	// 231c <__udivdi3+0xbc>
+    25b2:	9840      	ld.w      	r2, (r14, 0x0)
+    25b4:	4370      	lsli      	r3, r3, 16
+    25b6:	7599      	zexth      	r6, r6
+    25b8:	7108      	lsl      	r4, r2
+    25ba:	60d8      	addu      	r3, r6
+    25bc:	64d0      	cmphs      	r4, r3
+    25be:	0ba5      	bt      	0x2508	// 2508 <__udivdi3+0x2a8>
+    25c0:	2800      	subi      	r0, 1
+    25c2:	3700      	movi      	r7, 0
+    25c4:	07a3      	br      	0x250a	// 250a <__udivdi3+0x2aa>
+    25c6:	3618      	movi      	r6, 24
+    25c8:	06b9      	br      	0x233a	// 233a <__udivdi3+0xda>
+    25ca:	3318      	movi      	r3, 24
+    25cc:	06d9      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    25ce:	3318      	movi      	r3, 24
+    25d0:	065b      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    25d2:	3700      	movi      	r7, 0
+    25d4:	3001      	movi      	r0, 1
+    25d6:	0722      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    25d8:	649c      	cmphs      	r7, r2
+    25da:	0b7b      	bt      	0x24d0	// 24d0 <__udivdi3+0x270>
+    25dc:	2801      	subi      	r0, 2
+    25de:	61d4      	addu      	r7, r5
+    25e0:	0779      	br      	0x24d2	// 24d2 <__udivdi3+0x272>
+    25e2:	6498      	cmphs      	r6, r2
+    25e4:	0b5a      	bt      	0x2498	// 2498 <__udivdi3+0x238>
+    25e6:	2b01      	subi      	r3, 2
+    25e8:	6180      	addu      	r6, r0
+    25ea:	0758      	br      	0x249a	// 249a <__udivdi3+0x23a>
+    25ec:	6c0b      	mov      	r0, r2
+    25ee:	07d9      	br      	0x25a0	// 25a0 <__udivdi3+0x340>
+    25f0:	b842      	st.w      	r2, (r14, 0x8)
+    25f2:	07bc      	br      	0x256a	// 256a <__udivdi3+0x30a>
+    25f4:	2c01      	subi      	r4, 2
+    25f6:	60d8      	addu      	r3, r6
+    25f8:	06ec      	br      	0x23d0	// 23d0 <__udivdi3+0x170>
+    25fa:	2d01      	subi      	r5, 2
+    25fc:	60d8      	addu      	r3, r6
+    25fe:	0672      	br      	0x22e2	// 22e2 <__udivdi3+0x82>
+    2600:	0000ffff 	.long	0x0000ffff
+    2604:	00005bdc 	.long	0x00005bdc
+    2608:	00ffffff 	.long	0x00ffffff
+
+0000260c <__umoddi3>:
+    260c:	14d4      	push      	r4-r7, r15
+    260e:	1427      	subi      	r14, r14, 28
+    2610:	6d07      	mov      	r4, r1
+    2612:	6c4f      	mov      	r1, r3
+    2614:	6d43      	mov      	r5, r0
+    2616:	3940      	cmpnei      	r1, 0
+    2618:	6dcf      	mov      	r7, r3
+    261a:	6c0b      	mov      	r0, r2
+    261c:	b8a0      	st.w      	r5, (r14, 0x0)
+    261e:	6cd3      	mov      	r3, r4
+    2620:	085a      	bt      	0x26d4	// 26d4 <__umoddi3+0xc8>
+    2622:	6490      	cmphs      	r4, r2
+    2624:	0877      	bt      	0x2712	// 2712 <__umoddi3+0x106>
+    2626:	0120      	lrw      	r1, 0xffff	// 29a0 <__umoddi3+0x394>
+    2628:	6484      	cmphs      	r1, r2
+    262a:	0cd2      	bf      	0x27ce	// 27ce <__umoddi3+0x1c2>
+    262c:	31ff      	movi      	r1, 255
+    262e:	6484      	cmphs      	r1, r2
+    2630:	0802      	bt      	0x2634	// 2634 <__umoddi3+0x28>
+    2632:	3708      	movi      	r7, 8
+    2634:	6c43      	mov      	r1, r0
+    2636:	705d      	lsr      	r1, r7
+    2638:	01c4      	lrw      	r6, 0x5bdc	// 29a4 <__umoddi3+0x398>
+    263a:	6058      	addu      	r1, r6
+    263c:	8120      	ld.b      	r1, (r1, 0x0)
+    263e:	61c4      	addu      	r7, r1
+    2640:	3120      	movi      	r1, 32
+    2642:	605e      	subu      	r1, r7
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	b821      	st.w      	r1, (r14, 0x4)
+    2648:	0c09      	bf      	0x265a	// 265a <__umoddi3+0x4e>
+    264a:	6cd7      	mov      	r3, r5
+    264c:	6c83      	mov      	r2, r0
+    264e:	7104      	lsl      	r4, r1
+    2650:	70dd      	lsr      	r3, r7
+    2652:	7144      	lsl      	r5, r1
+    2654:	7084      	lsl      	r2, r1
+    2656:	6cd0      	or      	r3, r4
+    2658:	b8a0      	st.w      	r5, (r14, 0x0)
+    265a:	4a90      	lsri      	r4, r2, 16
+    265c:	6c53      	mov      	r1, r4
+    265e:	6c0f      	mov      	r0, r3
+    2660:	75c9      	zexth      	r7, r2
+    2662:	b843      	st.w      	r2, (r14, 0xc)
+    2664:	b862      	st.w      	r3, (r14, 0x8)
+    2666:	e0000ef9 	bsr      	0x4458	// 4458 <__umodsi3>
+    266a:	9862      	ld.w      	r3, (r14, 0x8)
+    266c:	6d43      	mov      	r5, r0
+    266e:	6c53      	mov      	r1, r4
+    2670:	6c0f      	mov      	r0, r3
+    2672:	e0000ecf 	bsr      	0x4410	// 4410 <__udivsi3>
+    2676:	9840      	ld.w      	r2, (r14, 0x0)
+    2678:	4570      	lsli      	r3, r5, 16
+    267a:	4ab0      	lsri      	r5, r2, 16
+    267c:	7c1c      	mult      	r0, r7
+    267e:	6cd4      	or      	r3, r5
+    2680:	640c      	cmphs      	r3, r0
+    2682:	9843      	ld.w      	r2, (r14, 0xc)
+    2684:	0806      	bt      	0x2690	// 2690 <__umoddi3+0x84>
+    2686:	60c8      	addu      	r3, r2
+    2688:	648c      	cmphs      	r3, r2
+    268a:	0c03      	bf      	0x2690	// 2690 <__umoddi3+0x84>
+    268c:	640c      	cmphs      	r3, r0
+    268e:	0d7d      	bf      	0x2988	// 2988 <__umoddi3+0x37c>
+    2690:	60c2      	subu      	r3, r0
+    2692:	6c53      	mov      	r1, r4
+    2694:	6c0f      	mov      	r0, r3
+    2696:	b843      	st.w      	r2, (r14, 0xc)
+    2698:	b862      	st.w      	r3, (r14, 0x8)
+    269a:	e0000edf 	bsr      	0x4458	// 4458 <__umodsi3>
+    269e:	9862      	ld.w      	r3, (r14, 0x8)
+    26a0:	6d43      	mov      	r5, r0
+    26a2:	6c53      	mov      	r1, r4
+    26a4:	6c0f      	mov      	r0, r3
+    26a6:	e0000eb5 	bsr      	0x4410	// 4410 <__udivsi3>
+    26aa:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    26ae:	7dc0      	mult      	r7, r0
+    26b0:	45b0      	lsli      	r5, r5, 16
+    26b2:	740d      	zexth      	r0, r3
+    26b4:	6d40      	or      	r5, r0
+    26b6:	65d4      	cmphs      	r5, r7
+    26b8:	0807      	bt      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26ba:	9843      	ld.w      	r2, (r14, 0xc)
+    26bc:	6148      	addu      	r5, r2
+    26be:	6494      	cmphs      	r5, r2
+    26c0:	0c03      	bf      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26c2:	65d4      	cmphs      	r5, r7
+    26c4:	0d5e      	bf      	0x2980	// 2980 <__umoddi3+0x374>
+    26c6:	615e      	subu      	r5, r7
+    26c8:	6c17      	mov      	r0, r5
+    26ca:	9861      	ld.w      	r3, (r14, 0x4)
+    26cc:	700d      	lsr      	r0, r3
+    26ce:	3100      	movi      	r1, 0
+    26d0:	1407      	addi      	r14, r14, 28
+    26d2:	1494      	pop      	r4-r7, r15
+    26d4:	6450      	cmphs      	r4, r1
+    26d6:	0c6e      	bf      	0x27b2	// 27b2 <__umoddi3+0x1a6>
+    26d8:	024d      	lrw      	r2, 0xffff	// 29a0 <__umoddi3+0x394>
+    26da:	6448      	cmphs      	r2, r1
+    26dc:	086f      	bt      	0x27ba	// 27ba <__umoddi3+0x1ae>
+    26de:	024c      	lrw      	r2, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    26e0:	6448      	cmphs      	r2, r1
+    26e2:	0d3f      	bf      	0x2960	// 2960 <__umoddi3+0x354>
+    26e4:	3610      	movi      	r6, 16
+    26e6:	6c87      	mov      	r2, r1
+    26e8:	7099      	lsr      	r2, r6
+    26ea:	02f0      	lrw      	r7, 0x5bdc	// 29a4 <__umoddi3+0x398>
+    26ec:	609c      	addu      	r2, r7
+    26ee:	8240      	ld.b      	r2, (r2, 0x0)
+    26f0:	6188      	addu      	r6, r2
+    26f2:	3720      	movi      	r7, 32
+    26f4:	61da      	subu      	r7, r6
+    26f6:	3f40      	cmpnei      	r7, 0
+    26f8:	0870      	bt      	0x27d8	// 27d8 <__umoddi3+0x1cc>
+    26fa:	6504      	cmphs      	r1, r4
+    26fc:	0c03      	bf      	0x2702	// 2702 <__umoddi3+0xf6>
+    26fe:	6414      	cmphs      	r5, r0
+    2700:	0d46      	bf      	0x298c	// 298c <__umoddi3+0x380>
+    2702:	5d01      	subu      	r0, r5, r0
+    2704:	6414      	cmphs      	r5, r0
+    2706:	6106      	subu      	r4, r1
+    2708:	6483      	mvcv      	r2
+    270a:	5c69      	subu      	r3, r4, r2
+    270c:	6c4f      	mov      	r1, r3
+    270e:	1407      	addi      	r14, r14, 28
+    2710:	1494      	pop      	r4-r7, r15
+    2712:	3a40      	cmpnei      	r2, 0
+    2714:	0806      	bt      	0x2720	// 2720 <__umoddi3+0x114>
+    2716:	3100      	movi      	r1, 0
+    2718:	3001      	movi      	r0, 1
+    271a:	e0000e7b 	bsr      	0x4410	// 4410 <__udivsi3>
+    271e:	6c83      	mov      	r2, r0
+    2720:	027f      	lrw      	r3, 0xffff	// 29a0 <__umoddi3+0x394>
+    2722:	648c      	cmphs      	r3, r2
+    2724:	0850      	bt      	0x27c4	// 27c4 <__umoddi3+0x1b8>
+    2726:	027e      	lrw      	r3, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    2728:	648c      	cmphs      	r3, r2
+    272a:	0d1d      	bf      	0x2964	// 2964 <__umoddi3+0x358>
+    272c:	3710      	movi      	r7, 16
+    272e:	6ccb      	mov      	r3, r2
+    2730:	70dd      	lsr      	r3, r7
+    2732:	0322      	lrw      	r1, 0x5bdc	// 29a4 <__umoddi3+0x398>
+    2734:	60c4      	addu      	r3, r1
+    2736:	8360      	ld.b      	r3, (r3, 0x0)
+    2738:	61cc      	addu      	r7, r3
+    273a:	3320      	movi      	r3, 32
+    273c:	60de      	subu      	r3, r7
+    273e:	3b40      	cmpnei      	r3, 0
+    2740:	b861      	st.w      	r3, (r14, 0x4)
+    2742:	08c2      	bt      	0x28c6	// 28c6 <__umoddi3+0x2ba>
+    2744:	74c9      	zexth      	r3, r2
+    2746:	610a      	subu      	r4, r2
+    2748:	4af0      	lsri      	r7, r2, 16
+    274a:	6d8f      	mov      	r6, r3
+    274c:	6c5f      	mov      	r1, r7
+    274e:	6c13      	mov      	r0, r4
+    2750:	b842      	st.w      	r2, (r14, 0x8)
+    2752:	e0000e83 	bsr      	0x4458	// 4458 <__umodsi3>
+    2756:	6d43      	mov      	r5, r0
+    2758:	6c5f      	mov      	r1, r7
+    275a:	6c13      	mov      	r0, r4
+    275c:	e0000e5a 	bsr      	0x4410	// 4410 <__udivsi3>
+    2760:	9860      	ld.w      	r3, (r14, 0x0)
+    2762:	4590      	lsli      	r4, r5, 16
+    2764:	4bb0      	lsri      	r5, r3, 16
+    2766:	7c18      	mult      	r0, r6
+    2768:	6d14      	or      	r4, r5
+    276a:	6410      	cmphs      	r4, r0
+    276c:	9842      	ld.w      	r2, (r14, 0x8)
+    276e:	0806      	bt      	0x277a	// 277a <__umoddi3+0x16e>
+    2770:	6108      	addu      	r4, r2
+    2772:	6490      	cmphs      	r4, r2
+    2774:	0c03      	bf      	0x277a	// 277a <__umoddi3+0x16e>
+    2776:	6410      	cmphs      	r4, r0
+    2778:	0d06      	bf      	0x2984	// 2984 <__umoddi3+0x378>
+    277a:	6102      	subu      	r4, r0
+    277c:	6c5f      	mov      	r1, r7
+    277e:	6c13      	mov      	r0, r4
+    2780:	b842      	st.w      	r2, (r14, 0x8)
+    2782:	e0000e6b 	bsr      	0x4458	// 4458 <__umodsi3>
+    2786:	6d43      	mov      	r5, r0
+    2788:	6c5f      	mov      	r1, r7
+    278a:	6c13      	mov      	r0, r4
+    278c:	e0000e42 	bsr      	0x4410	// 4410 <__udivsi3>
+    2790:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2794:	7c18      	mult      	r0, r6
+    2796:	45b0      	lsli      	r5, r5, 16
+    2798:	758d      	zexth      	r6, r3
+    279a:	6d58      	or      	r5, r6
+    279c:	6414      	cmphs      	r5, r0
+    279e:	0808      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a0:	9842      	ld.w      	r2, (r14, 0x8)
+    27a2:	6148      	addu      	r5, r2
+    27a4:	6494      	cmphs      	r5, r2
+    27a6:	0c04      	bf      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a8:	6414      	cmphs      	r5, r0
+    27aa:	0802      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27ac:	6148      	addu      	r5, r2
+    27ae:	6142      	subu      	r5, r0
+    27b0:	078c      	br      	0x26c8	// 26c8 <__umoddi3+0xbc>
+    27b2:	6c17      	mov      	r0, r5
+    27b4:	6c53      	mov      	r1, r4
+    27b6:	1407      	addi      	r14, r14, 28
+    27b8:	1494      	pop      	r4-r7, r15
+    27ba:	32ff      	movi      	r2, 255
+    27bc:	6448      	cmphs      	r2, r1
+    27be:	6583      	mvcv      	r6
+    27c0:	46c3      	lsli      	r6, r6, 3
+    27c2:	0792      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    27c4:	33ff      	movi      	r3, 255
+    27c6:	648c      	cmphs      	r3, r2
+    27c8:	0bb3      	bt      	0x272e	// 272e <__umoddi3+0x122>
+    27ca:	3708      	movi      	r7, 8
+    27cc:	07b1      	br      	0x272e	// 272e <__umoddi3+0x122>
+    27ce:	1337      	lrw      	r1, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    27d0:	6484      	cmphs      	r1, r2
+    27d2:	0ccb      	bf      	0x2968	// 2968 <__umoddi3+0x35c>
+    27d4:	3710      	movi      	r7, 16
+    27d6:	072f      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    27d8:	6cc3      	mov      	r3, r0
+    27da:	705c      	lsl      	r1, r7
+    27dc:	70d9      	lsr      	r3, r6
+    27de:	6cc4      	or      	r3, r1
+    27e0:	6c57      	mov      	r1, r5
+    27e2:	6c93      	mov      	r2, r4
+    27e4:	7059      	lsr      	r1, r6
+    27e6:	711c      	lsl      	r4, r7
+    27e8:	7099      	lsr      	r2, r6
+    27ea:	6c50      	or      	r1, r4
+    27ec:	701c      	lsl      	r0, r7
+    27ee:	4b90      	lsri      	r4, r3, 16
+    27f0:	715c      	lsl      	r5, r7
+    27f2:	b803      	st.w      	r0, (r14, 0xc)
+    27f4:	b820      	st.w      	r1, (r14, 0x0)
+    27f6:	b8a4      	st.w      	r5, (r14, 0x10)
+    27f8:	6c53      	mov      	r1, r4
+    27fa:	754d      	zexth      	r5, r3
+    27fc:	6c0b      	mov      	r0, r2
+    27fe:	b862      	st.w      	r3, (r14, 0x8)
+    2800:	b8a1      	st.w      	r5, (r14, 0x4)
+    2802:	b846      	st.w      	r2, (r14, 0x18)
+    2804:	e0000e2a 	bsr      	0x4458	// 4458 <__umodsi3>
+    2808:	9846      	ld.w      	r2, (r14, 0x18)
+    280a:	b805      	st.w      	r0, (r14, 0x14)
+    280c:	6c53      	mov      	r1, r4
+    280e:	6c0b      	mov      	r0, r2
+    2810:	e0000e00 	bsr      	0x4410	// 4410 <__udivsi3>
+    2814:	9841      	ld.w      	r2, (r14, 0x4)
+    2816:	7c80      	mult      	r2, r0
+    2818:	9865      	ld.w      	r3, (r14, 0x14)
+    281a:	6d43      	mov      	r5, r0
+    281c:	9800      	ld.w      	r0, (r14, 0x0)
+    281e:	4330      	lsli      	r1, r3, 16
+    2820:	4870      	lsri      	r3, r0, 16
+    2822:	6cc4      	or      	r3, r1
+    2824:	648c      	cmphs      	r3, r2
+    2826:	0807      	bt      	0x2834	// 2834 <__umoddi3+0x228>
+    2828:	9802      	ld.w      	r0, (r14, 0x8)
+    282a:	60c0      	addu      	r3, r0
+    282c:	640c      	cmphs      	r3, r0
+    282e:	5d23      	subi      	r1, r5, 1
+    2830:	08a3      	bt      	0x2976	// 2976 <__umoddi3+0x36a>
+    2832:	6d47      	mov      	r5, r1
+    2834:	60ca      	subu      	r3, r2
+    2836:	6c53      	mov      	r1, r4
+    2838:	6c0f      	mov      	r0, r3
+    283a:	b866      	st.w      	r3, (r14, 0x18)
+    283c:	e0000e0e 	bsr      	0x4458	// 4458 <__umodsi3>
+    2840:	9866      	ld.w      	r3, (r14, 0x18)
+    2842:	6c53      	mov      	r1, r4
+    2844:	b805      	st.w      	r0, (r14, 0x14)
+    2846:	6c0f      	mov      	r0, r3
+    2848:	e0000de4 	bsr      	0x4410	// 4410 <__udivsi3>
+    284c:	9845      	ld.w      	r2, (r14, 0x14)
+    284e:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2852:	9821      	ld.w      	r1, (r14, 0x4)
+    2854:	4250      	lsli      	r2, r2, 16
+    2856:	750d      	zexth      	r4, r3
+    2858:	7c40      	mult      	r1, r0
+    285a:	6c90      	or      	r2, r4
+    285c:	6448      	cmphs      	r2, r1
+    285e:	0807      	bt      	0x286c	// 286c <__umoddi3+0x260>
+    2860:	9882      	ld.w      	r4, (r14, 0x8)
+    2862:	6090      	addu      	r2, r4
+    2864:	6508      	cmphs      	r2, r4
+    2866:	5863      	subi      	r3, r0, 1
+    2868:	0882      	bt      	0x296c	// 296c <__umoddi3+0x360>
+    286a:	6c0f      	mov      	r0, r3
+    286c:	45b0      	lsli      	r5, r5, 16
+    286e:	6d40      	or      	r5, r0
+    2870:	74d5      	zexth      	r3, r5
+    2872:	9803      	ld.w      	r0, (r14, 0xc)
+    2874:	4db0      	lsri      	r5, r5, 16
+    2876:	6d0f      	mov      	r4, r3
+    2878:	6086      	subu      	r2, r1
+    287a:	7441      	zexth      	r1, r0
+    287c:	4810      	lsri      	r0, r0, 16
+    287e:	7d04      	mult      	r4, r1
+    2880:	7cc0      	mult      	r3, r0
+    2882:	7c54      	mult      	r1, r5
+    2884:	60c4      	addu      	r3, r1
+    2886:	7d40      	mult      	r5, r0
+    2888:	4c10      	lsri      	r0, r4, 16
+    288a:	60c0      	addu      	r3, r0
+    288c:	644c      	cmphs      	r3, r1
+    288e:	0804      	bt      	0x2896	// 2896 <__umoddi3+0x28a>
+    2890:	3180      	movi      	r1, 128
+    2892:	4129      	lsli      	r1, r1, 9
+    2894:	6144      	addu      	r5, r1
+    2896:	4b30      	lsri      	r1, r3, 16
+    2898:	6144      	addu      	r5, r1
+    289a:	4370      	lsli      	r3, r3, 16
+    289c:	7511      	zexth      	r4, r4
+    289e:	6548      	cmphs      	r2, r5
+    28a0:	60d0      	addu      	r3, r4
+    28a2:	0c56      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    28a4:	654a      	cmpne      	r2, r5
+    28a6:	0c76      	bf      	0x2992	// 2992 <__umoddi3+0x386>
+    28a8:	5a35      	subu      	r1, r2, r5
+    28aa:	6c0f      	mov      	r0, r3
+    28ac:	9864      	ld.w      	r3, (r14, 0x10)
+    28ae:	5b01      	subu      	r0, r3, r0
+    28b0:	640c      	cmphs      	r3, r0
+    28b2:	64c3      	mvcv      	r3
+    28b4:	598d      	subu      	r4, r1, r3
+    28b6:	6d53      	mov      	r5, r4
+    28b8:	7158      	lsl      	r5, r6
+    28ba:	701d      	lsr      	r0, r7
+    28bc:	6c53      	mov      	r1, r4
+    28be:	6c14      	or      	r0, r5
+    28c0:	705d      	lsr      	r1, r7
+    28c2:	1407      	addi      	r14, r14, 28
+    28c4:	1494      	pop      	r4-r7, r15
+    28c6:	9801      	ld.w      	r0, (r14, 0x4)
+    28c8:	6c57      	mov      	r1, r5
+    28ca:	6cd3      	mov      	r3, r4
+    28cc:	705d      	lsr      	r1, r7
+    28ce:	7100      	lsl      	r4, r0
+    28d0:	7080      	lsl      	r2, r0
+    28d2:	6c50      	or      	r1, r4
+    28d4:	70dd      	lsr      	r3, r7
+    28d6:	6d07      	mov      	r4, r1
+    28d8:	4af0      	lsri      	r7, r2, 16
+    28da:	b822      	st.w      	r1, (r14, 0x8)
+    28dc:	7449      	zexth      	r1, r2
+    28de:	7140      	lsl      	r5, r0
+    28e0:	6d87      	mov      	r6, r1
+    28e2:	6c0f      	mov      	r0, r3
+    28e4:	6c5f      	mov      	r1, r7
+    28e6:	b844      	st.w      	r2, (r14, 0x10)
+    28e8:	b8a0      	st.w      	r5, (r14, 0x0)
+    28ea:	b863      	st.w      	r3, (r14, 0xc)
+    28ec:	e0000db6 	bsr      	0x4458	// 4458 <__umodsi3>
+    28f0:	9863      	ld.w      	r3, (r14, 0xc)
+    28f2:	6d43      	mov      	r5, r0
+    28f4:	6c5f      	mov      	r1, r7
+    28f6:	6c0f      	mov      	r0, r3
+    28f8:	e0000d8c 	bsr      	0x4410	// 4410 <__udivsi3>
+    28fc:	45b0      	lsli      	r5, r5, 16
+    28fe:	4c70      	lsri      	r3, r4, 16
+    2900:	7c18      	mult      	r0, r6
+    2902:	6d4c      	or      	r5, r3
+    2904:	6414      	cmphs      	r5, r0
+    2906:	9844      	ld.w      	r2, (r14, 0x10)
+    2908:	0807      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    290a:	6148      	addu      	r5, r2
+    290c:	6494      	cmphs      	r5, r2
+    290e:	0c04      	bf      	0x2916	// 2916 <__umoddi3+0x30a>
+    2910:	6414      	cmphs      	r5, r0
+    2912:	0802      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    2914:	6148      	addu      	r5, r2
+    2916:	6142      	subu      	r5, r0
+    2918:	6c5f      	mov      	r1, r7
+    291a:	6c17      	mov      	r0, r5
+    291c:	b843      	st.w      	r2, (r14, 0xc)
+    291e:	e0000d9d 	bsr      	0x4458	// 4458 <__umodsi3>
+    2922:	6d03      	mov      	r4, r0
+    2924:	6c5f      	mov      	r1, r7
+    2926:	6c17      	mov      	r0, r5
+    2928:	e0000d74 	bsr      	0x4410	// 4410 <__udivsi3>
+    292c:	d86e1004 	ld.h      	r3, (r14, 0x8)
+    2930:	4490      	lsli      	r4, r4, 16
+    2932:	744d      	zexth      	r1, r3
+    2934:	7c18      	mult      	r0, r6
+    2936:	6d04      	or      	r4, r1
+    2938:	6410      	cmphs      	r4, r0
+    293a:	9843      	ld.w      	r2, (r14, 0xc)
+    293c:	0807      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    293e:	6108      	addu      	r4, r2
+    2940:	6490      	cmphs      	r4, r2
+    2942:	0c04      	bf      	0x294a	// 294a <__umoddi3+0x33e>
+    2944:	6410      	cmphs      	r4, r0
+    2946:	0802      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    2948:	6108      	addu      	r4, r2
+    294a:	6102      	subu      	r4, r0
+    294c:	0700      	br      	0x274c	// 274c <__umoddi3+0x140>
+    294e:	9823      	ld.w      	r1, (r14, 0xc)
+    2950:	5b05      	subu      	r0, r3, r1
+    2952:	640c      	cmphs      	r3, r0
+    2954:	9822      	ld.w      	r1, (r14, 0x8)
+    2956:	6146      	subu      	r5, r1
+    2958:	64c3      	mvcv      	r3
+    295a:	614e      	subu      	r5, r3
+    295c:	5a35      	subu      	r1, r2, r5
+    295e:	07a7      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    2960:	3618      	movi      	r6, 24
+    2962:	06c2      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    2964:	3718      	movi      	r7, 24
+    2966:	06e4      	br      	0x272e	// 272e <__umoddi3+0x122>
+    2968:	3718      	movi      	r7, 24
+    296a:	0665      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    296c:	6448      	cmphs      	r2, r1
+    296e:	0b7e      	bt      	0x286a	// 286a <__umoddi3+0x25e>
+    2970:	2801      	subi      	r0, 2
+    2972:	6090      	addu      	r2, r4
+    2974:	077c      	br      	0x286c	// 286c <__umoddi3+0x260>
+    2976:	648c      	cmphs      	r3, r2
+    2978:	0b5d      	bt      	0x2832	// 2832 <__umoddi3+0x226>
+    297a:	2d01      	subi      	r5, 2
+    297c:	60c0      	addu      	r3, r0
+    297e:	075b      	br      	0x2834	// 2834 <__umoddi3+0x228>
+    2980:	6148      	addu      	r5, r2
+    2982:	06a2      	br      	0x26c6	// 26c6 <__umoddi3+0xba>
+    2984:	6108      	addu      	r4, r2
+    2986:	06fa      	br      	0x277a	// 277a <__umoddi3+0x16e>
+    2988:	60c8      	addu      	r3, r2
+    298a:	0683      	br      	0x2690	// 2690 <__umoddi3+0x84>
+    298c:	6c17      	mov      	r0, r5
+    298e:	6c4f      	mov      	r1, r3
+    2990:	06bf      	br      	0x270e	// 270e <__umoddi3+0x102>
+    2992:	9824      	ld.w      	r1, (r14, 0x10)
+    2994:	64c4      	cmphs      	r1, r3
+    2996:	0fdc      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    2998:	6c0f      	mov      	r0, r3
+    299a:	3100      	movi      	r1, 0
+    299c:	0788      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    299e:	0000      	bkpt
+    29a0:	0000ffff 	.long	0x0000ffff
+    29a4:	00005bdc 	.long	0x00005bdc
+    29a8:	00ffffff 	.long	0x00ffffff
+
+000029ac <copystring>:
+    29ac:	14c2      	push      	r4-r5
+    29ae:	3300      	movi      	r3, 0
+    29b0:	644d      	cmplt      	r3, r1
+    29b2:	0803      	bt      	0x29b8	// 29b8 <copystring+0xc>
+    29b4:	6c0f      	mov      	r0, r3
+    29b6:	1482      	pop      	r4-r5
+    29b8:	5aac      	addu      	r5, r2, r3
+    29ba:	588c      	addu      	r4, r0, r3
+    29bc:	2300      	addi      	r3, 1
+    29be:	85a0      	ld.b      	r5, (r5, 0x0)
+    29c0:	3b43      	cmpnei      	r3, 3
+    29c2:	a4a0      	st.b      	r5, (r4, 0x0)
+    29c4:	0bf6      	bt      	0x29b0	// 29b0 <copystring+0x4>
+    29c6:	3923      	cmplti      	r1, 4
+    29c8:	0bf6      	bt      	0x29b4	// 29b4 <copystring+0x8>
+    29ca:	3300      	movi      	r3, 0
+    29cc:	a063      	st.b      	r3, (r0, 0x3)
+    29ce:	3304      	movi      	r3, 4
+    29d0:	07f2      	br      	0x29b4	// 29b4 <copystring+0x8>
+
+000029d2 <__GI___dtostr>:
+    29d2:	14d4      	push      	r4-r7, r15
+    29d4:	142c      	subi      	r14, r14, 48
+    29d6:	6d8f      	mov      	r6, r3
+    29d8:	9871      	ld.w      	r3, (r14, 0x44)
+    29da:	b80a      	st.w      	r0, (r14, 0x28)
+    29dc:	b824      	st.w      	r1, (r14, 0x10)
+    29de:	b842      	st.w      	r2, (r14, 0x8)
+    29e0:	b86b      	st.w      	r3, (r14, 0x2c)
+    29e2:	98f2      	ld.w      	r7, (r14, 0x48)
+    29e4:	e0000244 	bsr      	0x2e6c	// 2e6c <__isinf>
+    29e8:	3840      	cmpnei      	r0, 0
+    29ea:	0c0a      	bf      	0x29fe	// 29fe <__GI___dtostr+0x2c>
+    29ec:	0244      	lrw      	r2, 0x6089	// 2cd8 <__GI___dtostr+0x306>
+    29ee:	6c5b      	mov      	r1, r6
+    29f0:	9802      	ld.w      	r0, (r14, 0x8)
+    29f2:	e3ffffdd 	bsr      	0x29ac	// 29ac <copystring>
+    29f6:	b809      	st.w      	r0, (r14, 0x24)
+    29f8:	9809      	ld.w      	r0, (r14, 0x24)
+    29fa:	140c      	addi      	r14, r14, 48
+    29fc:	1494      	pop      	r4-r7, r15
+    29fe:	980a      	ld.w      	r0, (r14, 0x28)
+    2a00:	9824      	ld.w      	r1, (r14, 0x10)
+    2a02:	e0000185 	bsr      	0x2d0c	// 2d0c <__isnan>
+    2a06:	3840      	cmpnei      	r0, 0
+    2a08:	b809      	st.w      	r0, (r14, 0x24)
+    2a0a:	0c03      	bf      	0x2a10	// 2a10 <__GI___dtostr+0x3e>
+    2a0c:	024b      	lrw      	r2, 0x608d	// 2cdc <__GI___dtostr+0x30a>
+    2a0e:	07f0      	br      	0x29ee	// 29ee <__GI___dtostr+0x1c>
+    2a10:	3200      	movi      	r2, 0
+    2a12:	3300      	movi      	r3, 0
+    2a14:	980a      	ld.w      	r0, (r14, 0x28)
+    2a16:	9824      	ld.w      	r1, (r14, 0x10)
+    2a18:	e0000242 	bsr      	0x2e9c	// 2e9c <__eqdf2>
+    2a1c:	3840      	cmpnei      	r0, 0
+    2a1e:	082d      	bt      	0x2a78	// 2a78 <__GI___dtostr+0xa6>
+    2a20:	3f40      	cmpnei      	r7, 0
+    2a22:	0d57      	bf      	0x2cd0	// 2cd0 <__GI___dtostr+0x2fe>
+    2a24:	5fa6      	addi      	r5, r7, 2
+    2a26:	6558      	cmphs      	r6, r5
+    2a28:	0d56      	bf      	0x2cd4	// 2cd4 <__GI___dtostr+0x302>
+    2a2a:	3d40      	cmpnei      	r5, 0
+    2a2c:	0c0b      	bf      	0x2a42	// 2a42 <__GI___dtostr+0x70>
+    2a2e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a30:	39df      	btsti      	r1, 31
+    2a32:	0c1a      	bf      	0x2a66	// 2a66 <__GI___dtostr+0x94>
+    2a34:	9802      	ld.w      	r0, (r14, 0x8)
+    2a36:	322d      	movi      	r2, 45
+    2a38:	a040      	st.b      	r2, (r0, 0x0)
+    2a3a:	5d02      	addi      	r0, r5, 1
+    2a3c:	3501      	movi      	r5, 1
+    2a3e:	6414      	cmphs      	r5, r0
+    2a40:	0c16      	bf      	0x2a6c	// 2a6c <__GI___dtostr+0x9a>
+    2a42:	9882      	ld.w      	r4, (r14, 0x8)
+    2a44:	8420      	ld.b      	r1, (r4, 0x0)
+    2a46:	3330      	movi      	r3, 48
+    2a48:	64c6      	cmpne      	r1, r3
+    2a4a:	3000      	movi      	r0, 0
+    2a4c:	6001      	addc      	r0, r0
+    2a4e:	9842      	ld.w      	r2, (r14, 0x8)
+    2a50:	9822      	ld.w      	r1, (r14, 0x8)
+    2a52:	6008      	addu      	r0, r2
+    2a54:	342e      	movi      	r4, 46
+    2a56:	6054      	addu      	r1, r5
+    2a58:	3300      	movi      	r3, 0
+    2a5a:	a081      	st.b      	r4, (r0, 0x1)
+    2a5c:	b8a9      	st.w      	r5, (r14, 0x24)
+    2a5e:	a160      	st.b      	r3, (r1, 0x0)
+    2a60:	07cc      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2a62:	3501      	movi      	r5, 1
+    2a64:	07e5      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2a66:	6c17      	mov      	r0, r5
+    2a68:	3500      	movi      	r5, 0
+    2a6a:	07ea      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a6c:	9842      	ld.w      	r2, (r14, 0x8)
+    2a6e:	6094      	addu      	r2, r5
+    2a70:	3430      	movi      	r4, 48
+    2a72:	a280      	st.b      	r4, (r2, 0x0)
+    2a74:	2500      	addi      	r5, 1
+    2a76:	07e4      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a78:	3200      	movi      	r2, 0
+    2a7a:	3300      	movi      	r3, 0
+    2a7c:	980a      	ld.w      	r0, (r14, 0x28)
+    2a7e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a80:	e000022c 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2a84:	38df      	btsti      	r0, 31
+    2a86:	0c8e      	bf      	0x2ba2	// 2ba2 <__GI___dtostr+0x1d0>
+    2a88:	3180      	movi      	r1, 128
+    2a8a:	98a2      	ld.w      	r5, (r14, 0x8)
+    2a8c:	9884      	ld.w      	r4, (r14, 0x10)
+    2a8e:	4158      	lsli      	r2, r1, 24
+    2a90:	332d      	movi      	r3, 45
+    2a92:	a560      	st.b      	r3, (r5, 0x0)
+    2a94:	6108      	addu      	r4, r2
+    2a96:	2e00      	subi      	r6, 1
+    2a98:	2500      	addi      	r5, 1
+    2a9a:	3000      	movi      	r0, 0
+    2a9c:	032e      	lrw      	r1, 0x3fe00000	// 2ce0 <__GI___dtostr+0x30e>
+    2a9e:	3300      	movi      	r3, 0
+    2aa0:	b865      	st.w      	r3, (r14, 0x14)
+    2aa2:	9845      	ld.w      	r2, (r14, 0x14)
+    2aa4:	65ca      	cmpne      	r2, r7
+    2aa6:	0881      	bt      	0x2ba8	// 2ba8 <__GI___dtostr+0x1d6>
+    2aa8:	6c83      	mov      	r2, r0
+    2aaa:	6cc7      	mov      	r3, r1
+    2aac:	980a      	ld.w      	r0, (r14, 0x28)
+    2aae:	6c53      	mov      	r1, r4
+    2ab0:	e3fff2b6 	bsr      	0x101c	// 101c <__adddf3>
+    2ab4:	3200      	movi      	r2, 0
+    2ab6:	0373      	lrw      	r3, 0x3ff00000	// 2ce4 <__GI___dtostr+0x312>
+    2ab8:	b806      	st.w      	r0, (r14, 0x18)
+    2aba:	b827      	st.w      	r1, (r14, 0x1c)
+    2abc:	e000020e 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2ac0:	38df      	btsti      	r0, 31
+    2ac2:	0c05      	bf      	0x2acc	// 2acc <__GI___dtostr+0xfa>
+    2ac4:	3430      	movi      	r4, 48
+    2ac6:	a580      	st.b      	r4, (r5, 0x0)
+    2ac8:	2e00      	subi      	r6, 1
+    2aca:	2500      	addi      	r5, 1
+    2acc:	9804      	ld.w      	r0, (r14, 0x10)
+    2ace:	4021      	lsli      	r1, r0, 1
+    2ad0:	0379      	lrw      	r3, 0xfffffc01	// 2ce8 <__GI___dtostr+0x316>
+    2ad2:	4915      	lsri      	r0, r1, 21
+    2ad4:	600c      	addu      	r0, r3
+    2ad6:	e3fff4f5 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2ada:	035a      	lrw      	r2, 0x509f79ff	// 2cec <__GI___dtostr+0x31a>
+    2adc:	037a      	lrw      	r3, 0x3fd34413	// 2cf0 <__GI___dtostr+0x31e>
+    2ade:	e3fff2d3 	bsr      	0x1084	// 1084 <__muldf3>
+    2ae2:	e3fff527 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2ae6:	5842      	addi      	r2, r0, 1
+    2ae8:	3a20      	cmplti      	r2, 1
+    2aea:	b848      	st.w      	r2, (r14, 0x20)
+    2aec:	08e7      	bt      	0x2cba	// 2cba <__GI___dtostr+0x2e8>
+    2aee:	033d      	lrw      	r1, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2af0:	6dcb      	mov      	r7, r2
+    2af2:	3400      	movi      	r4, 0
+    2af4:	b823      	st.w      	r1, (r14, 0xc)
+    2af6:	3f0a      	cmphsi      	r7, 11
+    2af8:	085f      	bt      	0x2bb6	// 2bb6 <__GI___dtostr+0x1e4>
+    2afa:	3f41      	cmpnei      	r7, 1
+    2afc:	0868      	bt      	0x2bcc	// 2bcc <__GI___dtostr+0x1fa>
+    2afe:	135f      	lrw      	r2, 0xcccccccd	// 2cf8 <__GI___dtostr+0x326>
+    2b00:	137f      	lrw      	r3, 0x3feccccc	// 2cfc <__GI___dtostr+0x32a>
+    2b02:	6c13      	mov      	r0, r4
+    2b04:	9823      	ld.w      	r1, (r14, 0xc)
+    2b06:	e3fff483 	bsr      	0x140c	// 140c <__gtdf2>
+    2b0a:	3820      	cmplti      	r0, 1
+    2b0c:	0c6a      	bf      	0x2be0	// 2be0 <__GI___dtostr+0x20e>
+    2b0e:	9862      	ld.w      	r3, (r14, 0x8)
+    2b10:	64d6      	cmpne      	r5, r3
+    2b12:	0807      	bt      	0x2b20	// 2b20 <__GI___dtostr+0x14e>
+    2b14:	3e40      	cmpnei      	r6, 0
+    2b16:	0f71      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b18:	3230      	movi      	r2, 48
+    2b1a:	a540      	st.b      	r2, (r5, 0x0)
+    2b1c:	2e00      	subi      	r6, 1
+    2b1e:	2500      	addi      	r5, 1
+    2b20:	9805      	ld.w      	r0, (r14, 0x14)
+    2b22:	3840      	cmpnei      	r0, 0
+    2b24:	08cf      	bt      	0x2cc2	// 2cc2 <__GI___dtostr+0x2f0>
+    2b26:	9822      	ld.w      	r1, (r14, 0x8)
+    2b28:	5d65      	subu      	r3, r5, r1
+    2b2a:	2300      	addi      	r3, 1
+    2b2c:	984b      	ld.w      	r2, (r14, 0x2c)
+    2b2e:	648c      	cmphs      	r3, r2
+    2b30:	08a5      	bt      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b32:	3e40      	cmpnei      	r6, 0
+    2b34:	0f62      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b36:	372e      	movi      	r7, 46
+    2b38:	a5e0      	st.b      	r7, (r5, 0x0)
+    2b3a:	980b      	ld.w      	r0, (r14, 0x2c)
+    2b3c:	5de2      	addi      	r7, r5, 1
+    2b3e:	9822      	ld.w      	r1, (r14, 0x8)
+    2b40:	2000      	addi      	r0, 1
+    2b42:	5f65      	subu      	r3, r7, r1
+    2b44:	584d      	subu      	r2, r0, r3
+    2b46:	2e00      	subi      	r6, 1
+    2b48:	b845      	st.w      	r2, (r14, 0x14)
+    2b4a:	9805      	ld.w      	r0, (r14, 0x14)
+    2b4c:	6418      	cmphs      	r6, r0
+    2b4e:	0f55      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b50:	6d43      	mov      	r5, r0
+    2b52:	615c      	addu      	r5, r7
+    2b54:	36ff      	movi      	r6, 255
+    2b56:	655e      	cmpne      	r7, r5
+    2b58:	0c91      	bf      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b5a:	6c93      	mov      	r2, r4
+    2b5c:	9863      	ld.w      	r3, (r14, 0xc)
+    2b5e:	9806      	ld.w      	r0, (r14, 0x18)
+    2b60:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b62:	e3fff3ab 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b66:	e3fff4e5 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2b6a:	3130      	movi      	r1, 48
+    2b6c:	6040      	addu      	r1, r0
+    2b6e:	a720      	st.b      	r1, (r7, 0x0)
+    2b70:	6818      	and      	r0, r6
+    2b72:	e3fff4a7 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2b76:	6c93      	mov      	r2, r4
+    2b78:	9863      	ld.w      	r3, (r14, 0xc)
+    2b7a:	e3fff285 	bsr      	0x1084	// 1084 <__muldf3>
+    2b7e:	6c83      	mov      	r2, r0
+    2b80:	6cc7      	mov      	r3, r1
+    2b82:	9806      	ld.w      	r0, (r14, 0x18)
+    2b84:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b86:	e3fff263 	bsr      	0x104c	// 104c <__subdf3>
+    2b8a:	b806      	st.w      	r0, (r14, 0x18)
+    2b8c:	b827      	st.w      	r1, (r14, 0x1c)
+    2b8e:	6c13      	mov      	r0, r4
+    2b90:	9823      	ld.w      	r1, (r14, 0xc)
+    2b92:	3200      	movi      	r2, 0
+    2b94:	1278      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2b96:	e3fff391 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b9a:	2700      	addi      	r7, 1
+    2b9c:	6d03      	mov      	r4, r0
+    2b9e:	b823      	st.w      	r1, (r14, 0xc)
+    2ba0:	07db      	br      	0x2b56	// 2b56 <__GI___dtostr+0x184>
+    2ba2:	98a2      	ld.w      	r5, (r14, 0x8)
+    2ba4:	9884      	ld.w      	r4, (r14, 0x10)
+    2ba6:	077a      	br      	0x2a9a	// 2a9a <__GI___dtostr+0xc8>
+    2ba8:	1276      	lrw      	r3, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2baa:	1257      	lrw      	r2, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2bac:	e3fff26c 	bsr      	0x1084	// 1084 <__muldf3>
+    2bb0:	9865      	ld.w      	r3, (r14, 0x14)
+    2bb2:	2300      	addi      	r3, 1
+    2bb4:	0776      	br      	0x2aa0	// 2aa0 <__GI___dtostr+0xce>
+    2bb6:	3080      	movi      	r0, 128
+    2bb8:	4056      	lsli      	r2, r0, 22
+    2bba:	9823      	ld.w      	r1, (r14, 0xc)
+    2bbc:	6c13      	mov      	r0, r4
+    2bbe:	1273      	lrw      	r3, 0x4202a05f	// 2d08 <__GI___dtostr+0x336>
+    2bc0:	e3fff262 	bsr      	0x1084	// 1084 <__muldf3>
+    2bc4:	6d03      	mov      	r4, r0
+    2bc6:	b823      	st.w      	r1, (r14, 0xc)
+    2bc8:	2f09      	subi      	r7, 10
+    2bca:	0796      	br      	0x2af6	// 2af6 <__GI___dtostr+0x124>
+    2bcc:	6c13      	mov      	r0, r4
+    2bce:	9823      	ld.w      	r1, (r14, 0xc)
+    2bd0:	3200      	movi      	r2, 0
+    2bd2:	1269      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2bd4:	e3fff258 	bsr      	0x1084	// 1084 <__muldf3>
+    2bd8:	6d03      	mov      	r4, r0
+    2bda:	b823      	st.w      	r1, (r14, 0xc)
+    2bdc:	2f00      	subi      	r7, 1
+    2bde:	078e      	br      	0x2afa	// 2afa <__GI___dtostr+0x128>
+    2be0:	9863      	ld.w      	r3, (r14, 0xc)
+    2be2:	6c93      	mov      	r2, r4
+    2be4:	9806      	ld.w      	r0, (r14, 0x18)
+    2be6:	9827      	ld.w      	r1, (r14, 0x1c)
+    2be8:	e3fff368 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2bec:	e3fff4a2 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2bf0:	3f40      	cmpnei      	r7, 0
+    2bf2:	74c0      	zextb      	r3, r0
+    2bf4:	0c03      	bf      	0x2bfa	// 2bfa <__GI___dtostr+0x228>
+    2bf6:	3b40      	cmpnei      	r3, 0
+    2bf8:	0c58      	bf      	0x2ca8	// 2ca8 <__GI___dtostr+0x2d6>
+    2bfa:	232f      	addi      	r3, 48
+    2bfc:	3e40      	cmpnei      	r6, 0
+    2bfe:	a560      	st.b      	r3, (r5, 0x0)
+    2c00:	2500      	addi      	r5, 1
+    2c02:	0842      	bt      	0x2c86	// 2c86 <__GI___dtostr+0x2b4>
+    2c04:	6c93      	mov      	r2, r4
+    2c06:	9863      	ld.w      	r3, (r14, 0xc)
+    2c08:	980a      	ld.w      	r0, (r14, 0x28)
+    2c0a:	9824      	ld.w      	r1, (r14, 0x10)
+    2c0c:	e3fff356 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2c10:	9845      	ld.w      	r2, (r14, 0x14)
+    2c12:	988b      	ld.w      	r4, (r14, 0x2c)
+    2c14:	b841      	st.w      	r2, (r14, 0x4)
+    2c16:	b880      	st.w      	r4, (r14, 0x0)
+    2c18:	3300      	movi      	r3, 0
+    2c1a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c1c:	e3fffedb 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    2c20:	3840      	cmpnei      	r0, 0
+    2c22:	0eeb      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c24:	5dc0      	addu      	r6, r5, r0
+    2c26:	37fa      	movi      	r7, 250
+    2c28:	3565      	movi      	r5, 101
+    2c2a:	6c02      	nor      	r0, r0
+    2c2c:	a6a0      	st.b      	r5, (r6, 0x0)
+    2c2e:	6d03      	mov      	r4, r0
+    2c30:	5ea2      	addi      	r5, r6, 1
+    2c32:	3101      	movi      	r1, 1
+    2c34:	3604      	movi      	r6, 4
+    2c36:	47e2      	lsli      	r7, r7, 2
+    2c38:	9808      	ld.w      	r0, (r14, 0x20)
+    2c3a:	65c1      	cmplt      	r0, r7
+    2c3c:	0c03      	bf      	0x2c42	// 2c42 <__GI___dtostr+0x270>
+    2c3e:	3940      	cmpnei      	r1, 0
+    2c40:	0811      	bt      	0x2c62	// 2c62 <__GI___dtostr+0x290>
+    2c42:	3c40      	cmpnei      	r4, 0
+    2c44:	0c08      	bf      	0x2c54	// 2c54 <__GI___dtostr+0x282>
+    2c46:	6c5f      	mov      	r1, r7
+    2c48:	9808      	ld.w      	r0, (r14, 0x20)
+    2c4a:	e0000bd1 	bsr      	0x43ec	// 43ec <__divsi3>
+    2c4e:	202f      	addi      	r0, 48
+    2c50:	a500      	st.b      	r0, (r5, 0x0)
+    2c52:	2500      	addi      	r5, 1
+    2c54:	6c5f      	mov      	r1, r7
+    2c56:	9808      	ld.w      	r0, (r14, 0x20)
+    2c58:	e0000bee 	bsr      	0x4434	// 4434 <__modsi3>
+    2c5c:	2c00      	subi      	r4, 1
+    2c5e:	b808      	st.w      	r0, (r14, 0x20)
+    2c60:	3100      	movi      	r1, 0
+    2c62:	b823      	st.w      	r1, (r14, 0xc)
+    2c64:	6c1f      	mov      	r0, r7
+    2c66:	310a      	movi      	r1, 10
+    2c68:	2e00      	subi      	r6, 1
+    2c6a:	e0000bc1 	bsr      	0x43ec	// 43ec <__divsi3>
+    2c6e:	3e40      	cmpnei      	r6, 0
+    2c70:	6dc3      	mov      	r7, r0
+    2c72:	9823      	ld.w      	r1, (r14, 0xc)
+    2c74:	0be2      	bt      	0x2c38	// 2c38 <__GI___dtostr+0x266>
+    2c76:	3c40      	cmpnei      	r4, 0
+    2c78:	0ec0      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c7a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c7c:	3300      	movi      	r3, 0
+    2c7e:	5d89      	subu      	r4, r5, r2
+    2c80:	a560      	st.b      	r3, (r5, 0x0)
+    2c82:	b889      	st.w      	r4, (r14, 0x24)
+    2c84:	06ba      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c86:	7400      	zextb      	r0, r0
+    2c88:	e3fff41c 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2c8c:	6c93      	mov      	r2, r4
+    2c8e:	9863      	ld.w      	r3, (r14, 0xc)
+    2c90:	e3fff1fa 	bsr      	0x1084	// 1084 <__muldf3>
+    2c94:	6c83      	mov      	r2, r0
+    2c96:	6cc7      	mov      	r3, r1
+    2c98:	9806      	ld.w      	r0, (r14, 0x18)
+    2c9a:	9827      	ld.w      	r1, (r14, 0x1c)
+    2c9c:	e3fff1d8 	bsr      	0x104c	// 104c <__subdf3>
+    2ca0:	b806      	st.w      	r0, (r14, 0x18)
+    2ca2:	b827      	st.w      	r1, (r14, 0x1c)
+    2ca4:	2e00      	subi      	r6, 1
+    2ca6:	3700      	movi      	r7, 0
+    2ca8:	6c13      	mov      	r0, r4
+    2caa:	9823      	ld.w      	r1, (r14, 0xc)
+    2cac:	3200      	movi      	r2, 0
+    2cae:	1072      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2cb0:	e3fff304 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2cb4:	6d03      	mov      	r4, r0
+    2cb6:	b823      	st.w      	r1, (r14, 0xc)
+    2cb8:	0723      	br      	0x2afe	// 2afe <__GI___dtostr+0x12c>
+    2cba:	1012      	lrw      	r0, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2cbc:	1092      	lrw      	r4, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2cbe:	b803      	st.w      	r0, (r14, 0xc)
+    2cc0:	0727      	br      	0x2b0e	// 2b0e <__GI___dtostr+0x13c>
+    2cc2:	3e40      	cmpnei      	r6, 0
+    2cc4:	0e9a      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2cc6:	372e      	movi      	r7, 46
+    2cc8:	a5e0      	st.b      	r7, (r5, 0x0)
+    2cca:	2e00      	subi      	r6, 1
+    2ccc:	5de2      	addi      	r7, r5, 1
+    2cce:	073e      	br      	0x2b4a	// 2b4a <__GI___dtostr+0x178>
+    2cd0:	3e40      	cmpnei      	r6, 0
+    2cd2:	0ac8      	bt      	0x2a62	// 2a62 <__GI___dtostr+0x90>
+    2cd4:	3508      	movi      	r5, 8
+    2cd6:	06ac      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2cd8:	00006089 	.long	0x00006089
+    2cdc:	0000608d 	.long	0x0000608d
+    2ce0:	3fe00000 	.long	0x3fe00000
+    2ce4:	3ff00000 	.long	0x3ff00000
+    2ce8:	fffffc01 	.long	0xfffffc01
+    2cec:	509f79ff 	.long	0x509f79ff
+    2cf0:	3fd34413 	.long	0x3fd34413
+    2cf4:	40240000 	.long	0x40240000
+    2cf8:	cccccccd 	.long	0xcccccccd
+    2cfc:	3feccccc 	.long	0x3feccccc
+    2d00:	3fb99999 	.long	0x3fb99999
+    2d04:	9999999a 	.long	0x9999999a
+    2d08:	4202a05f 	.long	0x4202a05f
+
+00002d0c <__isnan>:
+    2d0c:	416c      	lsli      	r3, r1, 12
+    2d0e:	4b4c      	lsri      	r2, r3, 12
+    2d10:	6c08      	or      	r0, r2
+    2d12:	3840      	cmpnei      	r0, 0
+    2d14:	0c0e      	bf      	0x2d30	// 2d30 <__isnan+0x24>
+    2d16:	1008      	lrw      	r0, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d18:	6840      	and      	r1, r0
+    2d1a:	6cc7      	mov      	r3, r1
+    2d1c:	3000      	movi      	r0, 0
+    2d1e:	1026      	lrw      	r1, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d20:	3200      	movi      	r2, 0
+    2d22:	6c81      	xor      	r2, r0
+    2d24:	6cc5      	xor      	r3, r1
+    2d26:	6c8c      	or      	r2, r3
+    2d28:	3a40      	cmpnei      	r2, 0
+    2d2a:	6443      	mvcv      	r1
+    2d2c:	7404      	zextb      	r0, r1
+    2d2e:	783c      	jmp      	r15
+    2d30:	3000      	movi      	r0, 0
+    2d32:	07fe      	br      	0x2d2e	// 2d2e <__isnan+0x22>
+    2d34:	7ff00000 	.long	0x7ff00000
+
+00002d38 <__strlen_fast>:
+    2d38:	6c43      	mov      	r1, r0
+    2d3a:	3203      	movi      	r2, 3
+    2d3c:	6808      	and      	r0, r2
+    2d3e:	3840      	cmpnei      	r0, 0
+    2d40:	0c08      	bf      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d42:	3000      	movi      	r0, 0
+    2d44:	8140      	ld.b      	r2, (r1, 0x0)
+    2d46:	3a40      	cmpnei      	r2, 0
+    2d48:	0c20      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d4a:	2100      	addi      	r1, 1
+    2d4c:	2000      	addi      	r0, 1
+    2d4e:	07fb      	br      	0x2d44	// 2d44 <__strlen_fast+0xc>
+    2d50:	9140      	ld.w      	r2, (r1, 0x0)
+    2d52:	680b      	tstnbz      	r2
+    2d54:	0c04      	bf      	0x2d5c	// 2d5c <__strlen_fast+0x24>
+    2d56:	2103      	addi      	r1, 4
+    2d58:	2003      	addi      	r0, 4
+    2d5a:	07fb      	br      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d5c:	31ff      	movi      	r1, 255
+    2d5e:	6ccb      	mov      	r3, r2
+    2d60:	68c4      	and      	r3, r1
+    2d62:	3b40      	cmpnei      	r3, 0
+    2d64:	0c12      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d66:	2000      	addi      	r0, 1
+    2d68:	3110      	movi      	r1, 16
+    2d6a:	6ccb      	mov      	r3, r2
+    2d6c:	70c4      	lsl      	r3, r1
+    2d6e:	3118      	movi      	r1, 24
+    2d70:	70c5      	lsr      	r3, r1
+    2d72:	3b40      	cmpnei      	r3, 0
+    2d74:	0c0a      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d76:	2000      	addi      	r0, 1
+    2d78:	3108      	movi      	r1, 8
+    2d7a:	6ccb      	mov      	r3, r2
+    2d7c:	70c4      	lsl      	r3, r1
+    2d7e:	3118      	movi      	r1, 24
+    2d80:	70c5      	lsr      	r3, r1
+    2d82:	3b40      	cmpnei      	r3, 0
+    2d84:	0c02      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d86:	2000      	addi      	r0, 1
+    2d88:	783c      	jmp      	r15
+	...
+
+00002d8c <__strcpy_fast>:
+    2d8c:	14c1      	push      	r4
+    2d8e:	6d03      	mov      	r4, r0
+    2d90:	6c87      	mov      	r2, r1
+    2d92:	6c90      	or      	r2, r4
+    2d94:	3303      	movi      	r3, 3
+    2d96:	688c      	and      	r2, r3
+    2d98:	3a40      	cmpnei      	r2, 0
+    2d9a:	0c08      	bf      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2d9c:	8160      	ld.b      	r3, (r1, 0x0)
+    2d9e:	a460      	st.b      	r3, (r4, 0x0)
+    2da0:	2100      	addi      	r1, 1
+    2da2:	2400      	addi      	r4, 1
+    2da4:	3b40      	cmpnei      	r3, 0
+    2da6:	0bfb      	bt      	0x2d9c	// 2d9c <__strcpy_fast+0x10>
+    2da8:	1481      	pop      	r4
+    2daa:	9160      	ld.w      	r3, (r1, 0x0)
+    2dac:	680f      	tstnbz      	r3
+    2dae:	0c2e      	bf      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2db0:	b460      	st.w      	r3, (r4, 0x0)
+    2db2:	9161      	ld.w      	r3, (r1, 0x4)
+    2db4:	680f      	tstnbz      	r3
+    2db6:	0c1d      	bf      	0x2df0	// 2df0 <__strcpy_fast+0x64>
+    2db8:	b461      	st.w      	r3, (r4, 0x4)
+    2dba:	9162      	ld.w      	r3, (r1, 0x8)
+    2dbc:	680f      	tstnbz      	r3
+    2dbe:	0c1b      	bf      	0x2df4	// 2df4 <__strcpy_fast+0x68>
+    2dc0:	b462      	st.w      	r3, (r4, 0x8)
+    2dc2:	9163      	ld.w      	r3, (r1, 0xc)
+    2dc4:	680f      	tstnbz      	r3
+    2dc6:	0c19      	bf      	0x2df8	// 2df8 <__strcpy_fast+0x6c>
+    2dc8:	b463      	st.w      	r3, (r4, 0xc)
+    2dca:	9164      	ld.w      	r3, (r1, 0x10)
+    2dcc:	680f      	tstnbz      	r3
+    2dce:	0c17      	bf      	0x2dfc	// 2dfc <__strcpy_fast+0x70>
+    2dd0:	b464      	st.w      	r3, (r4, 0x10)
+    2dd2:	9165      	ld.w      	r3, (r1, 0x14)
+    2dd4:	680f      	tstnbz      	r3
+    2dd6:	0c15      	bf      	0x2e00	// 2e00 <__strcpy_fast+0x74>
+    2dd8:	b465      	st.w      	r3, (r4, 0x14)
+    2dda:	9166      	ld.w      	r3, (r1, 0x18)
+    2ddc:	680f      	tstnbz      	r3
+    2dde:	0c13      	bf      	0x2e04	// 2e04 <__strcpy_fast+0x78>
+    2de0:	b466      	st.w      	r3, (r4, 0x18)
+    2de2:	9167      	ld.w      	r3, (r1, 0x1c)
+    2de4:	680f      	tstnbz      	r3
+    2de6:	0c11      	bf      	0x2e08	// 2e08 <__strcpy_fast+0x7c>
+    2de8:	b467      	st.w      	r3, (r4, 0x1c)
+    2dea:	241f      	addi      	r4, 32
+    2dec:	211f      	addi      	r1, 32
+    2dee:	07de      	br      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2df0:	2403      	addi      	r4, 4
+    2df2:	040c      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df4:	2407      	addi      	r4, 8
+    2df6:	040a      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df8:	240b      	addi      	r4, 12
+    2dfa:	0408      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2dfc:	240f      	addi      	r4, 16
+    2dfe:	0406      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e00:	2413      	addi      	r4, 20
+    2e02:	0404      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e04:	2417      	addi      	r4, 24
+    2e06:	0402      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e08:	241b      	addi      	r4, 28
+    2e0a:	3118      	movi      	r1, 24
+    2e0c:	6c8f      	mov      	r2, r3
+    2e0e:	7084      	lsl      	r2, r1
+    2e10:	7085      	lsr      	r2, r1
+    2e12:	a440      	st.b      	r2, (r4, 0x0)
+    2e14:	3a40      	cmpnei      	r2, 0
+    2e16:	0c12      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e18:	3110      	movi      	r1, 16
+    2e1a:	6c8f      	mov      	r2, r3
+    2e1c:	7084      	lsl      	r2, r1
+    2e1e:	3118      	movi      	r1, 24
+    2e20:	7085      	lsr      	r2, r1
+    2e22:	a441      	st.b      	r2, (r4, 0x1)
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0c0a      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e28:	3108      	movi      	r1, 8
+    2e2a:	6c8f      	mov      	r2, r3
+    2e2c:	7084      	lsl      	r2, r1
+    2e2e:	3118      	movi      	r1, 24
+    2e30:	7085      	lsr      	r2, r1
+    2e32:	a442      	st.b      	r2, (r4, 0x2)
+    2e34:	3a40      	cmpnei      	r2, 0
+    2e36:	0c02      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e38:	b460      	st.w      	r3, (r4, 0x0)
+    2e3a:	1481      	pop      	r4
+
+00002e3c <__GI_strchr>:
+    2e3c:	8040      	ld.b      	r2, (r0, 0x0)
+    2e3e:	644a      	cmpne      	r2, r1
+    2e40:	0c06      	bf      	0x2e4c	// 2e4c <__GI_strchr+0x10>
+    2e42:	3a40      	cmpnei      	r2, 0
+    2e44:	0c03      	bf      	0x2e4a	// 2e4a <__GI_strchr+0xe>
+    2e46:	2000      	addi      	r0, 1
+    2e48:	07fa      	br      	0x2e3c	// 2e3c <__GI_strchr>
+    2e4a:	6c0b      	mov      	r0, r2
+    2e4c:	783c      	jmp      	r15
+	...
+
+00002e50 <__GI_strerror>:
+    2e50:	338f      	movi      	r3, 143
+    2e52:	640c      	cmphs      	r3, r0
+    2e54:	0c06      	bf      	0x2e60	// 2e60 <__GI_strerror+0x10>
+    2e56:	4002      	lsli      	r0, r0, 2
+    2e58:	1023      	lrw      	r1, 0x5cfc	// 2e64 <__GI_strerror+0x14>
+    2e5a:	6004      	addu      	r0, r1
+    2e5c:	9000      	ld.w      	r0, (r0, 0x0)
+    2e5e:	783c      	jmp      	r15
+    2e60:	1002      	lrw      	r0, 0x5f63	// 2e68 <__GI_strerror+0x18>
+    2e62:	07fe      	br      	0x2e5e	// 2e5e <__GI_strerror+0xe>
+    2e64:	00005cfc 	.long	0x00005cfc
+    2e68:	00005f63 	.long	0x00005f63
+
+00002e6c <__isinf>:
+    2e6c:	3840      	cmpnei      	r0, 0
+    2e6e:	6c83      	mov      	r2, r0
+    2e70:	6cc7      	mov      	r3, r1
+    2e72:	0804      	bt      	0x2e7a	// 2e7a <__isinf+0xe>
+    2e74:	1028      	lrw      	r1, 0x7ff00000	// 2e94 <__isinf+0x28>
+    2e76:	644e      	cmpne      	r3, r1
+    2e78:	0c0b      	bf      	0x2e8e	// 2e8e <__isinf+0x22>
+    2e7a:	3000      	movi      	r0, 0
+    2e7c:	1027      	lrw      	r1, 0xfff00000	// 2e98 <__isinf+0x2c>
+    2e7e:	6c81      	xor      	r2, r0
+    2e80:	6cc5      	xor      	r3, r1
+    2e82:	6c8c      	or      	r2, r3
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	64c3      	mvcv      	r3
+    2e88:	3000      	movi      	r0, 0
+    2e8a:	600e      	subu      	r0, r3
+    2e8c:	783c      	jmp      	r15
+    2e8e:	3001      	movi      	r0, 1
+    2e90:	07fe      	br      	0x2e8c	// 2e8c <__isinf+0x20>
+    2e92:	0000      	bkpt
+    2e94:	7ff00000 	.long	0x7ff00000
+    2e98:	fff00000 	.long	0xfff00000
+
+00002e9c <__eqdf2>:
+    2e9c:	14d0      	push      	r15
+    2e9e:	142e      	subi      	r14, r14, 56
+    2ea0:	b800      	st.w      	r0, (r14, 0x0)
+    2ea2:	b821      	st.w      	r1, (r14, 0x4)
+    2ea4:	6c3b      	mov      	r0, r14
+    2ea6:	1904      	addi      	r1, r14, 16
+    2ea8:	b863      	st.w      	r3, (r14, 0xc)
+    2eaa:	b842      	st.w      	r2, (r14, 0x8)
+    2eac:	e3fff4b4 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb0:	1909      	addi      	r1, r14, 36
+    2eb2:	1802      	addi      	r0, r14, 8
+    2eb4:	e3fff4b0 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb8:	9864      	ld.w      	r3, (r14, 0x10)
+    2eba:	3b01      	cmphsi      	r3, 2
+    2ebc:	0c0a      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ebe:	9869      	ld.w      	r3, (r14, 0x24)
+    2ec0:	3b01      	cmphsi      	r3, 2
+    2ec2:	0c07      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ec4:	1909      	addi      	r1, r14, 36
+    2ec6:	1804      	addi      	r0, r14, 16
+    2ec8:	e3fff508 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2ecc:	140e      	addi      	r14, r14, 56
+    2ece:	1490      	pop      	r15
+    2ed0:	3001      	movi      	r0, 1
+    2ed2:	140e      	addi      	r14, r14, 56
+    2ed4:	1490      	pop      	r15
+	...
+
+00002ed8 <__ltdf2>:
+    2ed8:	14d0      	push      	r15
+    2eda:	142e      	subi      	r14, r14, 56
+    2edc:	b800      	st.w      	r0, (r14, 0x0)
+    2ede:	b821      	st.w      	r1, (r14, 0x4)
+    2ee0:	6c3b      	mov      	r0, r14
+    2ee2:	1904      	addi      	r1, r14, 16
+    2ee4:	b863      	st.w      	r3, (r14, 0xc)
+    2ee6:	b842      	st.w      	r2, (r14, 0x8)
+    2ee8:	e3fff496 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eec:	1909      	addi      	r1, r14, 36
+    2eee:	1802      	addi      	r0, r14, 8
+    2ef0:	e3fff492 	bsr      	0x1814	// 1814 <__unpack_d>
+    2ef4:	9864      	ld.w      	r3, (r14, 0x10)
+    2ef6:	3b01      	cmphsi      	r3, 2
+    2ef8:	0c0a      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2efa:	9869      	ld.w      	r3, (r14, 0x24)
+    2efc:	3b01      	cmphsi      	r3, 2
+    2efe:	0c07      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2f00:	1909      	addi      	r1, r14, 36
+    2f02:	1804      	addi      	r0, r14, 16
+    2f04:	e3fff4ea 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2f08:	140e      	addi      	r14, r14, 56
+    2f0a:	1490      	pop      	r15
+    2f0c:	3001      	movi      	r0, 1
+    2f0e:	140e      	addi      	r14, r14, 56
+    2f10:	1490      	pop      	r15
+
+Disassembly of section .text.__main:
+
+00002f14 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    2f14:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    2f16:	1009      	lrw      	r0, 0x20000000	// 2f38 <__main+0x24>
+    2f18:	1029      	lrw      	r1, 0x6818	// 2f3c <__main+0x28>
+    2f1a:	6442      	cmpne      	r0, r1
+    2f1c:	0c05      	bf      	0x2f26	// 2f26 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    2f1e:	1049      	lrw      	r2, 0x200000a0	// 2f40 <__main+0x2c>
+    2f20:	6082      	subu      	r2, r0
+    2f22:	e3fff5c1 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    2f26:	1048      	lrw      	r2, 0x20000758	// 2f44 <__main+0x30>
+    2f28:	1008      	lrw      	r0, 0x200000a0	// 2f48 <__main+0x34>
+    2f2a:	640a      	cmpne      	r2, r0
+    2f2c:	0c05      	bf      	0x2f36	// 2f36 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    2f2e:	6082      	subu      	r2, r0
+    2f30:	3100      	movi      	r1, 0
+    2f32:	e3fff575 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+  }
+
+	
+}
+    2f36:	1490      	pop      	r15
+    2f38:	20000000 	.long	0x20000000
+    2f3c:	00006818 	.long	0x00006818
+    2f40:	200000a0 	.long	0x200000a0
+    2f44:	20000758 	.long	0x20000758
+    2f48:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00002f4c <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    2f4c:	3848      	cmpnei      	r0, 8
+    2f4e:	080a      	bt      	0x2f62	// 2f62 <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    2f50:	107a      	lrw      	r3, 0x2000004c	// 2fb8 <SYSCON_General_CMD.part.0+0x6c>
+    2f52:	32ff      	movi      	r2, 255
+    2f54:	9320      	ld.w      	r1, (r3, 0x0)
+    2f56:	9160      	ld.w      	r3, (r1, 0x0)
+    2f58:	424c      	lsli      	r2, r2, 12
+    2f5a:	68c9      	andn      	r3, r2
+    2f5c:	3bae      	bseti      	r3, 14
+    2f5e:	3bb2      	bseti      	r3, 18
+    2f60:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    2f62:	1077      	lrw      	r3, 0x2000005c	// 2fbc <SYSCON_General_CMD.part.0+0x70>
+    2f64:	9360      	ld.w      	r3, (r3, 0x0)
+    2f66:	9341      	ld.w      	r2, (r3, 0x4)
+    2f68:	6c80      	or      	r2, r0
+    2f6a:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    2f6c:	9343      	ld.w      	r2, (r3, 0xc)
+    2f6e:	6880      	and      	r2, r0
+    2f70:	3a40      	cmpnei      	r2, 0
+    2f72:	0ffd      	bf      	0x2f6c	// 2f6c <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    2f74:	3842      	cmpnei      	r0, 2
+    2f76:	0807      	bt      	0x2f84	// 2f84 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    2f78:	3102      	movi      	r1, 2
+    2f7a:	9344      	ld.w      	r2, (r3, 0x10)
+    2f7c:	6884      	and      	r2, r1
+    2f7e:	3a40      	cmpnei      	r2, 0
+    2f80:	0ffd      	bf      	0x2f7a	// 2f7a <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    2f82:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    2f84:	3802      	cmphsi      	r0, 3
+    2f86:	0809      	bt      	0x2f98	// 2f98 <SYSCON_General_CMD.part.0+0x4c>
+    2f88:	3841      	cmpnei      	r0, 1
+    2f8a:	0bfc      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    2f8c:	3101      	movi      	r1, 1
+    2f8e:	9344      	ld.w      	r2, (r3, 0x10)
+    2f90:	6884      	and      	r2, r1
+    2f92:	3a40      	cmpnei      	r2, 0
+    2f94:	0ffd      	bf      	0x2f8e	// 2f8e <SYSCON_General_CMD.part.0+0x42>
+    2f96:	07f6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2f98:	3848      	cmpnei      	r0, 8
+    2f9a:	0807      	bt      	0x2fa8	// 2fa8 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	9344      	ld.w      	r2, (r3, 0x10)
+    2fa0:	6884      	and      	r2, r1
+    2fa2:	3a40      	cmpnei      	r2, 0
+    2fa4:	0ffd      	bf      	0x2f9e	// 2f9e <SYSCON_General_CMD.part.0+0x52>
+    2fa6:	07ee      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2fa8:	3850      	cmpnei      	r0, 16
+    2faa:	0bec      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    2fac:	3110      	movi      	r1, 16
+    2fae:	9344      	ld.w      	r2, (r3, 0x10)
+    2fb0:	6884      	and      	r2, r1
+    2fb2:	3a40      	cmpnei      	r2, 0
+    2fb4:	0ffd      	bf      	0x2fae	// 2fae <SYSCON_General_CMD.part.0+0x62>
+    2fb6:	07e6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+    2fb8:	2000004c 	.long	0x2000004c
+    2fbc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00002fc0 <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    2fc0:	106c      	lrw      	r3, 0x2000005c	// 2ff0 <SYSCON_RST_VALUE+0x30>
+    2fc2:	104d      	lrw      	r2, 0xffff	// 2ff4 <SYSCON_RST_VALUE+0x34>
+    2fc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2fc6:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    2fc8:	104c      	lrw      	r2, 0xffffff	// 2ff8 <SYSCON_RST_VALUE+0x38>
+    2fca:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    2fcc:	104c      	lrw      	r2, 0xd22d0000	// 2ffc <SYSCON_RST_VALUE+0x3c>
+    2fce:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    2fd0:	104c      	lrw      	r2, 0x70ff3bff	// 3000 <SYSCON_RST_VALUE+0x40>
+    2fd2:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    2fd4:	320a      	movi      	r2, 10
+    2fd6:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fd8:	102b      	lrw      	r1, 0x70c	// 3004 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    2fda:	237f      	addi      	r3, 128
+    2fdc:	3200      	movi      	r2, 0
+    2fde:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    2fe0:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fe2:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    2fe4:	1029      	lrw      	r1, 0x3fe	// 3008 <SYSCON_RST_VALUE+0x48>
+    2fe6:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    2fe8:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    2fea:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    2fec:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    2fee:	783c      	jmp      	r15
+    2ff0:	2000005c 	.long	0x2000005c
+    2ff4:	0000ffff 	.long	0x0000ffff
+    2ff8:	00ffffff 	.long	0x00ffffff
+    2ffc:	d22d0000 	.long	0xd22d0000
+    3000:	70ff3bff 	.long	0x70ff3bff
+    3004:	0000070c 	.long	0x0000070c
+    3008:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+0000300c <SYSCON_General_CMD>:
+{
+    300c:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    300e:	3840      	cmpnei      	r0, 0
+    3010:	0c05      	bf      	0x301a	// 301a <SYSCON_General_CMD+0xe>
+    3012:	6c07      	mov      	r0, r1
+    3014:	e3ffff9c 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+}
+    3018:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    301a:	1068      	lrw      	r3, 0x2000005c	// 3038 <SYSCON_General_CMD+0x2c>
+    301c:	9360      	ld.w      	r3, (r3, 0x0)
+    301e:	9342      	ld.w      	r2, (r3, 0x8)
+    3020:	6c84      	or      	r2, r1
+    3022:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    3024:	9343      	ld.w      	r2, (r3, 0xc)
+    3026:	6884      	and      	r2, r1
+    3028:	3a40      	cmpnei      	r2, 0
+    302a:	0bfd      	bt      	0x3024	// 3024 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    302c:	237f      	addi      	r3, 128
+    302e:	9301      	ld.w      	r0, (r3, 0x4)
+    3030:	6c40      	or      	r1, r0
+    3032:	b321      	st.w      	r1, (r3, 0x4)
+}
+    3034:	07f2      	br      	0x3018	// 3018 <SYSCON_General_CMD+0xc>
+    3036:	0000      	bkpt
+    3038:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+0000303c <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    303c:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    303e:	3b48      	cmpnei      	r3, 8
+    3040:	0828      	bt      	0x3090	// 3090 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    3042:	109d      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3044:	3501      	movi      	r5, 1
+    3046:	9480      	ld.w      	r4, (r4, 0x0)
+    3048:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    304a:	3504      	movi      	r5, 4
+    304c:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    304e:	5b83      	subi      	r4, r3, 1
+    3050:	3c01      	cmphsi      	r4, 2
+    3052:	0c2b      	bf      	0x30a8	// 30a8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    3054:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    3056:	3c04      	cmphsi      	r4, 5
+    3058:	0c03      	bf      	0x305e	// 305e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    305a:	3b4b      	cmpnei      	r3, 11
+    305c:	0807      	bt      	0x306a	// 306a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    305e:	1076      	lrw      	r3, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3060:	3401      	movi      	r4, 1
+    3062:	9360      	ld.w      	r3, (r3, 0x0)
+    3064:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    3066:	3400      	movi      	r4, 0
+    3068:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    306a:	1094      	lrw      	r4, 0xd22d0000	// 30b8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    306c:	6c10      	or      	r0, r4
+    306e:	1074      	lrw      	r3, 0x2000005c	// 30bc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    3070:	6c40      	or      	r1, r0
+    3072:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3074:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    3076:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3078:	4001      	lsli      	r0, r0, 1
+    307a:	9324      	ld.w      	r1, (r3, 0x10)
+    307c:	6840      	and      	r1, r0
+    307e:	3940      	cmpnei      	r1, 0
+    3080:	0ffd      	bf      	0x307a	// 307a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    3082:	1030      	lrw      	r1, 0xc33c0000	// 30c0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    3084:	6c48      	or      	r1, r2
+    3086:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    3088:	9328      	ld.w      	r1, (r3, 0x20)
+    308a:	644a      	cmpne      	r2, r1
+    308c:	0bfe      	bt      	0x3088	// 3088 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    308e:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    3090:	3b40      	cmpnei      	r3, 0
+    3092:	0c03      	bf      	0x3098	// 3098 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    3094:	3b49      	cmpnei      	r3, 9
+    3096:	0807      	bt      	0x30a4	// 30a4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    3098:	1087      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    309a:	3501      	movi      	r5, 1
+    309c:	9480      	ld.w      	r4, (r4, 0x0)
+    309e:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    30a0:	3502      	movi      	r5, 2
+    30a2:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    30a4:	3b4a      	cmpnei      	r3, 10
+    30a6:	0bd4      	bt      	0x304e	// 304e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    30a8:	1083      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    30aa:	3501      	movi      	r5, 1
+    30ac:	9480      	ld.w      	r4, (r4, 0x0)
+    30ae:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    30b0:	b4a5      	st.w      	r5, (r4, 0x14)
+    30b2:	07d1      	br      	0x3054	// 3054 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    30b4:	20000060 	.long	0x20000060
+    30b8:	d22d0000 	.long	0xd22d0000
+    30bc:	2000005c 	.long	0x2000005c
+    30c0:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+000030c4 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    30c4:	14d1      	push      	r4, r15
+    30c6:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    30c8:	3110      	movi      	r1, 16
+    30ca:	3000      	movi      	r0, 0
+    30cc:	e3ffffa0 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    30d0:	1066      	lrw      	r3, 0x2000005c	// 30e8 <SYSCON_HFOSC_SELECTE+0x24>
+    30d2:	9360      	ld.w      	r3, (r3, 0x0)
+    30d4:	9319      	ld.w      	r0, (r3, 0x64)
+    30d6:	3884      	bclri      	r0, 4
+    30d8:	3885      	bclri      	r0, 5
+    30da:	6c10      	or      	r0, r4
+    30dc:	b319      	st.w      	r0, (r3, 0x64)
+    30de:	3010      	movi      	r0, 16
+    30e0:	e3ffff36 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    30e4:	1491      	pop      	r4, r15
+    30e6:	0000      	bkpt
+    30e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+000030ec <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    30ec:	106c      	lrw      	r3, 0x2000005c	// 311c <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    30ee:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f0:	9360      	ld.w      	r3, (r3, 0x0)
+    30f2:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    30f4:	0c0a      	bf      	0x3108	// 3108 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f6:	104b      	lrw      	r2, 0x78870000	// 3120 <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30f8:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30fa:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30fc:	4125      	lsli      	r1, r1, 5
+    30fe:	934d      	ld.w      	r2, (r3, 0x34)
+    3100:	6884      	and      	r2, r1
+    3102:	3a40      	cmpnei      	r2, 0
+    3104:	0ffd      	bf      	0x30fe	// 30fe <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    3106:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    3108:	1047      	lrw      	r2, 0x788755aa	// 3124 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310a:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    310c:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310e:	4125      	lsli      	r1, r1, 5
+    3110:	934d      	ld.w      	r2, (r3, 0x34)
+    3112:	6884      	and      	r2, r1
+    3114:	3a40      	cmpnei      	r2, 0
+    3116:	0bfd      	bt      	0x3110	// 3110 <SYSCON_WDT_CMD+0x24>
+    3118:	07f7      	br      	0x3106	// 3106 <SYSCON_WDT_CMD+0x1a>
+    311a:	0000      	bkpt
+    311c:	2000005c 	.long	0x2000005c
+    3120:	78870000 	.long	0x78870000
+    3124:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00003128 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    3128:	1064      	lrw      	r3, 0x2000005c	// 3138 <SYSCON_IWDCNT_Reload+0x10>
+    312a:	32b4      	movi      	r2, 180
+    312c:	9360      	ld.w      	r3, (r3, 0x0)
+    312e:	237f      	addi      	r3, 128
+    3130:	4257      	lsli      	r2, r2, 23
+    3132:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    3134:	783c      	jmp      	r15
+    3136:	0000      	bkpt
+    3138:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+0000313c <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    313c:	1044      	lrw      	r2, 0x87780000	// 314c <SYSCON_IWDCNT_Config+0x10>
+    313e:	1065      	lrw      	r3, 0x2000005c	// 3150 <SYSCON_IWDCNT_Config+0x14>
+    3140:	6c48      	or      	r1, r2
+    3142:	9360      	ld.w      	r3, (r3, 0x0)
+    3144:	6c04      	or      	r0, r1
+    3146:	237f      	addi      	r3, 128
+    3148:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    314a:	783c      	jmp      	r15
+    314c:	87780000 	.long	0x87780000
+    3150:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00003154 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    3154:	14c3      	push      	r4-r6
+    3156:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    3158:	10c5      	lrw      	r6, 0xb44b0000	// 316c <SYSCON_LVD_Config+0x18>
+    315a:	6d18      	or      	r4, r6
+    315c:	6cd0      	or      	r3, r4
+    315e:	6c8c      	or      	r2, r3
+    3160:	6c48      	or      	r1, r2
+    3162:	10a4      	lrw      	r5, 0x2000005c	// 3170 <SYSCON_LVD_Config+0x1c>
+    3164:	6c04      	or      	r0, r1
+    3166:	95a0      	ld.w      	r5, (r5, 0x0)
+    3168:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    316a:	1483      	pop      	r4-r6
+    316c:	b44b0000 	.long	0xb44b0000
+    3170:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00003174 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    3174:	1066      	lrw      	r3, 0x2000005c	// 318c <LVD_Int_Enable+0x18>
+    3176:	3180      	movi      	r1, 128
+    3178:	9360      	ld.w      	r3, (r3, 0x0)
+    317a:	3280      	movi      	r2, 128
+    317c:	604c      	addu      	r1, r3
+    317e:	4244      	lsli      	r2, r2, 4
+    3180:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    3182:	935d      	ld.w      	r2, (r3, 0x74)
+    3184:	3aab      	bseti      	r2, 11
+    3186:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    3188:	783c      	jmp      	r15
+    318a:	0000      	bkpt
+    318c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00003190 <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    3190:	1066      	lrw      	r3, 0x2000005c	// 31a8 <IWDT_Int_Enable+0x18>
+    3192:	3180      	movi      	r1, 128
+    3194:	9360      	ld.w      	r3, (r3, 0x0)
+    3196:	3280      	movi      	r2, 128
+    3198:	604c      	addu      	r1, r3
+    319a:	4241      	lsli      	r2, r2, 1
+    319c:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    319e:	935d      	ld.w      	r2, (r3, 0x74)
+    31a0:	3aa8      	bseti      	r2, 8
+    31a2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    31a4:	783c      	jmp      	r15
+    31a6:	0000      	bkpt
+    31a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+000031ac <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    31ac:	3a40      	cmpnei      	r2, 0
+    31ae:	0c04      	bf      	0x31b6	// 31b6 <EXTI_trigger_CMD+0xa>
+    31b0:	3a41      	cmpnei      	r2, 1
+    31b2:	0c0e      	bf      	0x31ce	// 31ce <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    31b4:	783c      	jmp      	r15
+    31b6:	106d      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31b8:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    31ba:	9360      	ld.w      	r3, (r3, 0x0)
+    31bc:	237f      	addi      	r3, 128
+    31be:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    31c0:	0c04      	bf      	0x31c8	// 31c8 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    31c2:	6c48      	or      	r1, r2
+    31c4:	b325      	st.w      	r1, (r3, 0x14)
+    31c6:	07f7      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    31c8:	6885      	andn      	r2, r1
+    31ca:	b345      	st.w      	r2, (r3, 0x14)
+    31cc:	07f4      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31ce:	1067      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31d0:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    31d2:	9360      	ld.w      	r3, (r3, 0x0)
+    31d4:	237f      	addi      	r3, 128
+    31d6:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    31d8:	0c04      	bf      	0x31e0	// 31e0 <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    31da:	6c48      	or      	r1, r2
+    31dc:	b326      	st.w      	r1, (r3, 0x18)
+    31de:	07eb      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    31e0:	6885      	andn      	r2, r1
+    31e2:	b346      	st.w      	r2, (r3, 0x18)
+}
+    31e4:	07e8      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31e6:	0000      	bkpt
+    31e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+000031ec <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    31ec:	3202      	movi      	r2, 2
+    31ee:	1062      	lrw      	r3, 0xe000e100	// 31f4 <SYSCON_Int_Enable+0x8>
+    31f0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    31f2:	783c      	jmp      	r15
+    31f4:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+000031f8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31f8:	1066      	lrw      	r3, 0xe000e400	// 3210 <SYSCON_INT_Priority+0x18>
+    31fa:	1047      	lrw      	r2, 0xc0c0c0c0	// 3214 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    31fc:	1027      	lrw      	r1, 0xc0c000c0	// 3218 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31fe:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    3200:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    3202:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    3204:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    3206:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    3208:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    320a:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    320c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    320e:	783c      	jmp      	r15
+    3210:	e000e400 	.long	0xe000e400
+    3214:	c0c0c0c0 	.long	0xc0c0c0c0
+    3218:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+0000321c <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    321c:	14c1      	push      	r4
+    321e:	4862      	lsri      	r3, r0, 2
+    3220:	4342      	lsli      	r2, r3, 2
+    3222:	106a      	lrw      	r3, 0x20000064	// 3248 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    3224:	3403      	movi      	r4, 3
+    3226:	9360      	ld.w      	r3, (r3, 0x0)
+    3228:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    322a:	3280      	movi      	r2, 128
+    322c:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    322e:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    3230:	60c8      	addu      	r3, r2
+    3232:	4003      	lsli      	r0, r0, 3
+    3234:	34ff      	movi      	r4, 255
+    3236:	9340      	ld.w      	r2, (r3, 0x0)
+    3238:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    323c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323e:	7040      	lsl      	r1, r0
+    3240:	6c48      	or      	r1, r2
+    3242:	b320      	st.w      	r1, (r3, 0x0)
+}
+    3244:	1481      	pop      	r4
+    3246:	0000      	bkpt
+    3248:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+0000324c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    324c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    324e:	3907      	cmphsi      	r1, 8
+{
+    3250:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    3252:	0830      	bt      	0x32b2	// 32b2 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    3254:	5903      	subi      	r0, r1, 1
+    3256:	3806      	cmphsi      	r0, 7
+    3258:	0827      	bt      	0x32a6	// 32a6 <GPIO_Init+0x5a>
+    325a:	e3ffed51 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    325e:	1004      	.short	0x1004
+    3260:	1d1a1613 	.long	0x1d1a1613
+    3264:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    3266:	3300      	movi      	r3, 0
+    3268:	3104      	movi      	r1, 4
+    326a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    326c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    326e:	9440      	ld.w      	r2, (r4, 0x0)
+    3270:	68c8      	and      	r3, r2
+        if (Dir)
+    3272:	0c1e      	bf      	0x32ae	// 32ae <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    3274:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    3276:	7084      	lsl      	r2, r1
+    3278:	6cc8      	or      	r3, r2
+    327a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    327c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    327e:	3108      	movi      	r1, 8
+    3280:	1166      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    3282:	07f5      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    3284:	310c      	movi      	r1, 12
+    3286:	1166      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    3288:	07f2      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    328a:	3110      	movi      	r1, 16
+    328c:	1165      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    328e:	2b00      	subi      	r3, 1
+    3290:	07ee      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    3292:	3114      	movi      	r1, 20
+    3294:	1164      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    3296:	07fc      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    3298:	33f1      	movi      	r3, 241
+    329a:	3118      	movi      	r1, 24
+    329c:	4378      	lsli      	r3, r3, 24
+    329e:	07f8      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    32a0:	311c      	movi      	r1, 28
+    32a2:	1162      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    32a4:	07e4      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    32a6:	3300      	movi      	r3, 0
+    32a8:	3100      	movi      	r1, 0
+    32aa:	2b0f      	subi      	r3, 16
+    32ac:	07e0      	br      	0x326c	// 326c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    32ae:	3202      	movi      	r2, 2
+    32b0:	07e3      	br      	0x3276	// 3276 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    32b2:	390f      	cmphsi      	r1, 16
+    32b4:	0be4      	bt      	0x327c	// 327c <GPIO_Init+0x30>
+        switch (PinNum)
+    32b6:	2908      	subi      	r1, 9
+    32b8:	3906      	cmphsi      	r1, 7
+    32ba:	6c07      	mov      	r0, r1
+    32bc:	0827      	bt      	0x330a	// 330a <GPIO_Init+0xbe>
+    32be:	e3ffed1f 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    32c2:	1004      	.short	0x1004
+    32c4:	1d1a1613 	.long	0x1d1a1613
+    32c8:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    32ca:	3300      	movi      	r3, 0
+    32cc:	3104      	movi      	r1, 4
+    32ce:	2bf0      	subi      	r3, 241
+      if (Dir)
+    32d0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d2:	9441      	ld.w      	r2, (r4, 0x4)
+    32d4:	68c8      	and      	r3, r2
+      if (Dir)
+    32d6:	0c1e      	bf      	0x3312	// 3312 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    32da:	7084      	lsl      	r2, r1
+    32dc:	6cc8      	or      	r3, r2
+    32de:	b461      	st.w      	r3, (r4, 0x4)
+}
+    32e0:	07ce      	br      	0x327c	// 327c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    32e2:	3108      	movi      	r1, 8
+    32e4:	106d      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    32e6:	07f5      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    32e8:	310c      	movi      	r1, 12
+    32ea:	106d      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    32ec:	07f2      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    32ee:	3110      	movi      	r1, 16
+    32f0:	106c      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32f2:	2b00      	subi      	r3, 1
+    32f4:	07ee      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    32f6:	3114      	movi      	r1, 20
+    32f8:	106b      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    32fa:	07fc      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32fc:	33f1      	movi      	r3, 241
+    32fe:	3118      	movi      	r1, 24
+    3300:	4378      	lsli      	r3, r3, 24
+    3302:	07f8      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    3304:	311c      	movi      	r1, 28
+    3306:	1069      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    3308:	07e4      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    330a:	3300      	movi      	r3, 0
+    330c:	3100      	movi      	r1, 0
+    330e:	2b0f      	subi      	r3, 16
+    3310:	07e0      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    3312:	3202      	movi      	r2, 2
+    3314:	07e3      	br      	0x32da	// 32da <GPIO_Init+0x8e>
+    3316:	0000      	bkpt
+    3318:	fffff0ff 	.long	0xfffff0ff
+    331c:	ffff0fff 	.long	0xffff0fff
+    3320:	fff10000 	.long	0xfff10000
+    3324:	ff100000 	.long	0xff100000
+    3328:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+0000332c <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    332c:	4121      	lsli      	r1, r1, 1
+    332e:	3203      	movi      	r2, 3
+    3330:	9068      	ld.w      	r3, (r0, 0x20)
+    3332:	7084      	lsl      	r2, r1
+    3334:	68c9      	andn      	r3, r2
+    3336:	3201      	movi      	r2, 1
+    3338:	7084      	lsl      	r2, r1
+    333a:	6cc8      	or      	r3, r2
+    333c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    333e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00003340 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    3340:	4121      	lsli      	r1, r1, 1
+    3342:	3301      	movi      	r3, 1
+    3344:	9049      	ld.w      	r2, (r0, 0x24)
+    3346:	70c4      	lsl      	r3, r1
+    3348:	6cc8      	or      	r3, r2
+    334a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    334c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+0000334e <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    334e:	3301      	movi      	r3, 1
+    3350:	70c4      	lsl      	r3, r1
+    3352:	b063      	st.w      	r3, (r0, 0xc)
+}
+    3354:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00003356 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    3356:	3301      	movi      	r3, 1
+    3358:	70c4      	lsl      	r3, r1
+    335a:	b064      	st.w      	r3, (r0, 0x10)
+}
+    335c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+0000335e <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    335e:	9045      	ld.w      	r2, (r0, 0x14)
+    3360:	3301      	movi      	r3, 1
+    3362:	7085      	lsr      	r2, r1
+    3364:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    3366:	3a40      	cmpnei      	r2, 0
+    3368:	70c4      	lsl      	r3, r1
+    336a:	0c03      	bf      	0x3370	// 3370 <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    336c:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    336e:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    3370:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    3372:	07fe      	br      	0x336e	// 336e <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00003374 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    3374:	3301      	movi      	r3, 1
+    3376:	9046      	ld.w      	r2, (r0, 0x18)
+    3378:	70c4      	lsl      	r3, r1
+    337a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    337c:	64ca      	cmpne      	r2, r3
+    337e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3380:	7400      	zextb      	r0, r0
+}
+    3382:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00003384 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    3384:	3301      	movi      	r3, 1
+    3386:	9045      	ld.w      	r2, (r0, 0x14)
+    3388:	70c4      	lsl      	r3, r1
+    338a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    338c:	64ca      	cmpne      	r2, r3
+    338e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3390:	7400      	zextb      	r0, r0
+}
+    3392:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00003394 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    3394:	1064      	lrw      	r3, 0x20000014	// 33a4 <LPT_Soft_Reset+0x10>
+    3396:	9340      	ld.w      	r2, (r3, 0x0)
+    3398:	9261      	ld.w      	r3, (r2, 0x4)
+    339a:	3bac      	bseti      	r3, 12
+    339c:	3bae      	bseti      	r3, 14
+    339e:	b261      	st.w      	r3, (r2, 0x4)
+}
+    33a0:	783c      	jmp      	r15
+    33a2:	0000      	bkpt
+    33a4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+000033a8 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    33a8:	1063      	lrw      	r3, 0x20000010	// 33b4 <WWDT_CNT_Load+0xc>
+    33aa:	9360      	ld.w      	r3, (r3, 0x0)
+    33ac:	9340      	ld.w      	r2, (r3, 0x0)
+    33ae:	6c08      	or      	r0, r2
+    33b0:	b300      	st.w      	r0, (r3, 0x0)
+}
+    33b2:	783c      	jmp      	r15
+    33b4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+000033b8 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    33b8:	3300      	movi      	r3, 0
+    33ba:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    33bc:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    33be:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    33c0:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    33c2:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    33c4:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    33c6:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    33c8:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    33ca:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    33cc:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    33ce:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    33d0:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    33d2:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000033d4 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    33d4:	9060      	ld.w      	r3, (r0, 0x0)
+    33d6:	3ba0      	bseti      	r3, 0
+    33d8:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33da:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000033dc <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    33dc:	9060      	ld.w      	r3, (r0, 0x0)
+    33de:	3bac      	bseti      	r3, 12
+    33e0:	3bae      	bseti      	r3, 14
+    33e2:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33e4:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000033e6 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    33e6:	14c3      	push      	r4-r6
+    33e8:	98a4      	ld.w      	r5, (r14, 0x10)
+    33ea:	6d97      	mov      	r6, r5
+    33ec:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    33ee:	6d18      	or      	r4, r6
+    33f0:	6cd0      	or      	r3, r4
+    33f2:	90a1      	ld.w      	r5, (r0, 0x4)
+    33f4:	6c4c      	or      	r1, r3
+    33f6:	6c54      	or      	r1, r5
+    33f8:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    33fa:	b042      	st.w      	r2, (r0, 0x8)
+}
+    33fc:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000033fe <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    33fe:	14c4      	push      	r4-r7
+    3400:	1421      	subi      	r14, r14, 4
+    3402:	9885      	ld.w      	r4, (r14, 0x14)
+    3404:	6dd3      	mov      	r7, r4
+    3406:	9886      	ld.w      	r4, (r14, 0x18)
+    3408:	b880      	st.w      	r4, (r14, 0x0)
+    340a:	9887      	ld.w      	r4, (r14, 0x1c)
+    340c:	6d93      	mov      	r6, r4
+    340e:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    3410:	6d58      	or      	r5, r6
+    3412:	98c0      	ld.w      	r6, (r14, 0x0)
+    3414:	6d58      	or      	r5, r6
+    3416:	6d5c      	or      	r5, r7
+    3418:	6cd4      	or      	r3, r5
+    341a:	6c8c      	or      	r2, r3
+    341c:	9081      	ld.w      	r4, (r0, 0x4)
+    341e:	6c48      	or      	r1, r2
+    3420:	6d04      	or      	r4, r1
+    3422:	6d9f      	mov      	r6, r7
+    3424:	b081      	st.w      	r4, (r0, 0x4)
+}
+    3426:	1401      	addi      	r14, r14, 4
+    3428:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+0000342a <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    342a:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    342c:	b044      	st.w      	r2, (r0, 0x10)
+}
+    342e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00003430 <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    3430:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3432:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    3434:	0c04      	bf      	0x343c	// 343c <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3436:	6c8c      	or      	r2, r3
+    3438:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    343a:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    343c:	68c9      	andn      	r3, r2
+    343e:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    3440:	07fd      	br      	0x343a	// 343a <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00003444 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    3444:	3380      	movi      	r3, 128
+    3446:	4376      	lsli      	r3, r3, 22
+    3448:	1042      	lrw      	r2, 0xe000e100	// 3450 <BT1_INT_ENABLE+0xc>
+    344a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    344c:	783c      	jmp      	r15
+    344e:	0000      	bkpt
+    3450:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00003454 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    3454:	3840      	cmpnei      	r0, 0
+    3456:	080a      	bt      	0x346a	// 346a <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    3458:	1165      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    345a:	31f0      	movi      	r1, 240
+    345c:	9340      	ld.w      	r2, (r3, 0x0)
+    345e:	9260      	ld.w      	r3, (r2, 0x0)
+    3460:	68c5      	andn      	r3, r1
+    3462:	3ba4      	bseti      	r3, 4
+    3464:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    3466:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    3468:	040b      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    346a:	3841      	cmpnei      	r0, 1
+    346c:	080a      	bt      	0x3480	// 3480 <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    346e:	1161      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3470:	31f0      	movi      	r1, 240
+    3472:	9340      	ld.w      	r2, (r3, 0x0)
+    3474:	9261      	ld.w      	r3, (r2, 0x4)
+    3476:	68c5      	andn      	r3, r1
+    3478:	3ba4      	bseti      	r3, 4
+    347a:	3ba6      	bseti      	r3, 6
+    347c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    347e:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    3480:	3842      	cmpnei      	r0, 2
+    3482:	080b      	bt      	0x3498	// 3498 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    3484:	107b      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3486:	32f0      	movi      	r2, 240
+    3488:	9320      	ld.w      	r1, (r3, 0x0)
+    348a:	9161      	ld.w      	r3, (r1, 0x4)
+    348c:	4244      	lsli      	r2, r2, 4
+    348e:	68c9      	andn      	r3, r2
+    3490:	3ba9      	bseti      	r3, 9
+    3492:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    3494:	b161      	st.w      	r3, (r1, 0x4)
+    3496:	07f4      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    3498:	3843      	cmpnei      	r0, 3
+    349a:	080b      	bt      	0x34b0	// 34b0 <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    349c:	1075      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    349e:	32f0      	movi      	r2, 240
+    34a0:	9320      	ld.w      	r1, (r3, 0x0)
+    34a2:	4244      	lsli      	r2, r2, 4
+    34a4:	9161      	ld.w      	r3, (r1, 0x4)
+    34a6:	68c9      	andn      	r3, r2
+    34a8:	32e0      	movi      	r2, 224
+    34aa:	4243      	lsli      	r2, r2, 3
+    34ac:	6cc8      	or      	r3, r2
+    34ae:	07f3      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    34b0:	3844      	cmpnei      	r0, 4
+    34b2:	080a      	bt      	0x34c6	// 34c6 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    34b4:	106f      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    34b6:	32f0      	movi      	r2, 240
+    34b8:	9320      	ld.w      	r1, (r3, 0x0)
+    34ba:	9161      	ld.w      	r3, (r1, 0x4)
+    34bc:	4248      	lsli      	r2, r2, 8
+    34be:	68c9      	andn      	r3, r2
+    34c0:	3bad      	bseti      	r3, 13
+    34c2:	3bae      	bseti      	r3, 14
+    34c4:	07e8      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    34c6:	3845      	cmpnei      	r0, 5
+    34c8:	0808      	bt      	0x34d8	// 34d8 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    34ca:	1069      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34cc:	310f      	movi      	r1, 15
+    34ce:	9340      	ld.w      	r2, (r3, 0x0)
+    34d0:	9260      	ld.w      	r3, (r2, 0x0)
+    34d2:	68c5      	andn      	r3, r1
+    34d4:	3ba2      	bseti      	r3, 2
+    34d6:	07c8      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    34d8:	3846      	cmpnei      	r0, 6
+    34da:	0bd2      	bt      	0x347e	// 347e <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    34dc:	1064      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34de:	31f0      	movi      	r1, 240
+    34e0:	9340      	ld.w      	r2, (r3, 0x0)
+    34e2:	9260      	ld.w      	r3, (r2, 0x0)
+    34e4:	68c5      	andn      	r3, r1
+    34e6:	3ba5      	bseti      	r3, 5
+    34e8:	3ba6      	bseti      	r3, 6
+    34ea:	07be      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+    34ec:	20000048 	.long	0x20000048
+    34f0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000034f4 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    34f4:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    34f6:	6c48      	or      	r1, r2
+    34f8:	1083      	lrw      	r4, 0x20000024	// 3504 <GPT_Configure+0x10>
+    34fa:	6c04      	or      	r0, r1
+    34fc:	9480      	ld.w      	r4, (r4, 0x0)
+    34fe:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    3500:	b462      	st.w      	r3, (r4, 0x8)
+}
+    3502:	1481      	pop      	r4
+    3504:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00003508 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    3508:	14c4      	push      	r4-r7
+    350a:	1423      	subi      	r14, r14, 12
+    350c:	9887      	ld.w      	r4, (r14, 0x1c)
+    350e:	6dd3      	mov      	r7, r4
+    3510:	9888      	ld.w      	r4, (r14, 0x20)
+    3512:	b880      	st.w      	r4, (r14, 0x0)
+    3514:	9889      	ld.w      	r4, (r14, 0x24)
+    3516:	b881      	st.w      	r4, (r14, 0x4)
+    3518:	988a      	ld.w      	r4, (r14, 0x28)
+    351a:	b882      	st.w      	r4, (r14, 0x8)
+    351c:	988b      	ld.w      	r4, (r14, 0x2c)
+    351e:	6d93      	mov      	r6, r4
+    3520:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    3522:	3cb2      	bseti      	r4, 18
+    3524:	6d18      	or      	r4, r6
+    3526:	98c2      	ld.w      	r6, (r14, 0x8)
+    3528:	6d18      	or      	r4, r6
+    352a:	98c1      	ld.w      	r6, (r14, 0x4)
+    352c:	6d18      	or      	r4, r6
+    352e:	98c0      	ld.w      	r6, (r14, 0x0)
+    3530:	6d18      	or      	r4, r6
+    3532:	6d1c      	or      	r4, r7
+    3534:	6cd0      	or      	r3, r4
+    3536:	6c8c      	or      	r2, r3
+    3538:	6c48      	or      	r1, r2
+    353a:	10a4      	lrw      	r5, 0x20000024	// 3548 <GPT_WaveCtrl_Configure+0x40>
+    353c:	6c04      	or      	r0, r1
+    353e:	95a0      	ld.w      	r5, (r5, 0x0)
+    3540:	6d9f      	mov      	r6, r7
+    3542:	b503      	st.w      	r0, (r5, 0xc)
+}
+    3544:	1403      	addi      	r14, r14, 12
+    3546:	1484      	pop      	r4-r7
+    3548:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+0000354c <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    354c:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    354e:	6c8c      	or      	r2, r3
+    3550:	6c48      	or      	r1, r2
+    3552:	1083      	lrw      	r4, 0x20000024	// 355c <GPT_WaveLoad_Configure+0x10>
+    3554:	6c04      	or      	r0, r1
+    3556:	9480      	ld.w      	r4, (r4, 0x0)
+    3558:	b411      	st.w      	r0, (r4, 0x44)
+}
+    355a:	1481      	pop      	r4
+    355c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+00003560 <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    3560:	14c4      	push      	r4-r7
+    3562:	1425      	subi      	r14, r14, 20
+    3564:	1c09      	addi      	r4, r14, 36
+    3566:	8480      	ld.b      	r4, (r4, 0x0)
+    3568:	b880      	st.w      	r4, (r14, 0x0)
+    356a:	1c0a      	addi      	r4, r14, 40
+    356c:	8480      	ld.b      	r4, (r4, 0x0)
+    356e:	b881      	st.w      	r4, (r14, 0x4)
+    3570:	1c0b      	addi      	r4, r14, 44
+    3572:	8480      	ld.b      	r4, (r4, 0x0)
+    3574:	b882      	st.w      	r4, (r14, 0x8)
+    3576:	1c0c      	addi      	r4, r14, 48
+    3578:	8480      	ld.b      	r4, (r4, 0x0)
+    357a:	b883      	st.w      	r4, (r14, 0xc)
+    357c:	1c0d      	addi      	r4, r14, 52
+    357e:	8480      	ld.b      	r4, (r4, 0x0)
+    3580:	1e10      	addi      	r6, r14, 64
+    3582:	b884      	st.w      	r4, (r14, 0x10)
+    3584:	1d0f      	addi      	r5, r14, 60
+    3586:	1c0e      	addi      	r4, r14, 56
+    3588:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    358a:	3840      	cmpnei      	r0, 0
+{
+    358c:	1e11      	addi      	r6, r14, 68
+    358e:	8480      	ld.b      	r4, (r4, 0x0)
+    3590:	85a0      	ld.b      	r5, (r5, 0x0)
+    3592:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    3594:	081f      	bt      	0x35d2	// 35d2 <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    3596:	47f0      	lsli      	r7, r7, 16
+    3598:	46d2      	lsli      	r6, r6, 18
+    359a:	45ae      	lsli      	r5, r5, 14
+    359c:	6dd8      	or      	r7, r6
+    359e:	6dd4      	or      	r7, r5
+    35a0:	448c      	lsli      	r4, r4, 12
+    35a2:	6dd0      	or      	r7, r4
+    35a4:	9884      	ld.w      	r4, (r14, 0x10)
+    35a6:	448a      	lsli      	r4, r4, 10
+    35a8:	6dd0      	or      	r7, r4
+    35aa:	9883      	ld.w      	r4, (r14, 0xc)
+    35ac:	4488      	lsli      	r4, r4, 8
+    35ae:	98a2      	ld.w      	r5, (r14, 0x8)
+    35b0:	6d1c      	or      	r4, r7
+    35b2:	45e6      	lsli      	r7, r5, 6
+    35b4:	6d1c      	or      	r4, r7
+    35b6:	6c90      	or      	r2, r4
+    35b8:	6cc8      	or      	r3, r2
+    35ba:	9841      	ld.w      	r2, (r14, 0x4)
+    35bc:	4244      	lsli      	r2, r2, 4
+    35be:	6cc8      	or      	r3, r2
+    35c0:	6c4c      	or      	r1, r3
+    35c2:	9860      	ld.w      	r3, (r14, 0x0)
+    35c4:	4362      	lsli      	r3, r3, 2
+    35c6:	1013      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    35c8:	6c4c      	or      	r1, r3
+    35ca:	9000      	ld.w      	r0, (r0, 0x0)
+    35cc:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    35ce:	1405      	addi      	r14, r14, 20
+    35d0:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    35d2:	3841      	cmpnei      	r0, 1
+    35d4:	0bfd      	bt      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    35d6:	47f0      	lsli      	r7, r7, 16
+    35d8:	46d2      	lsli      	r6, r6, 18
+    35da:	45ae      	lsli      	r5, r5, 14
+    35dc:	6dd8      	or      	r7, r6
+    35de:	6dd4      	or      	r7, r5
+    35e0:	448c      	lsli      	r4, r4, 12
+    35e2:	6dd0      	or      	r7, r4
+    35e4:	9884      	ld.w      	r4, (r14, 0x10)
+    35e6:	448a      	lsli      	r4, r4, 10
+    35e8:	6dd0      	or      	r7, r4
+    35ea:	9883      	ld.w      	r4, (r14, 0xc)
+    35ec:	4488      	lsli      	r4, r4, 8
+    35ee:	98a2      	ld.w      	r5, (r14, 0x8)
+    35f0:	6d1c      	or      	r4, r7
+    35f2:	45e6      	lsli      	r7, r5, 6
+    35f4:	6d1c      	or      	r4, r7
+    35f6:	6c90      	or      	r2, r4
+    35f8:	6cc8      	or      	r3, r2
+    35fa:	9841      	ld.w      	r2, (r14, 0x4)
+    35fc:	4244      	lsli      	r2, r2, 4
+    35fe:	6cc8      	or      	r3, r2
+    3600:	6c4c      	or      	r1, r3
+    3602:	9860      	ld.w      	r3, (r14, 0x0)
+    3604:	4362      	lsli      	r3, r3, 2
+    3606:	1003      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    3608:	6c4c      	or      	r1, r3
+    360a:	9000      	ld.w      	r0, (r0, 0x0)
+    360c:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    360e:	07e0      	br      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+    3610:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00003614 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    3614:	1063      	lrw      	r3, 0x20000024	// 3620 <GPT_Start+0xc>
+    3616:	9340      	ld.w      	r2, (r3, 0x0)
+    3618:	9261      	ld.w      	r3, (r2, 0x4)
+    361a:	3ba0      	bseti      	r3, 0
+    361c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    361e:	783c      	jmp      	r15
+    3620:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00003624 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    3624:	1063      	lrw      	r3, 0x20000024	// 3630 <GPT_Period_CMP_Write+0xc>
+    3626:	9360      	ld.w      	r3, (r3, 0x0)
+    3628:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    362a:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    362c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    362e:	783c      	jmp      	r15
+    3630:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00003634 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    3634:	1066      	lrw      	r3, 0x20000024	// 364c <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    3636:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3638:	9360      	ld.w      	r3, (r3, 0x0)
+    363a:	237f      	addi      	r3, 128
+    363c:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    363e:	0c04      	bf      	0x3646	// 3646 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3640:	6c48      	or      	r1, r2
+    3642:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    3644:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    3646:	6885      	andn      	r2, r1
+    3648:	b356      	st.w      	r2, (r3, 0x58)
+}
+    364a:	07fd      	br      	0x3644	// 3644 <GPT_ConfigInterrupt_CMD+0x10>
+    364c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+00003650 <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    3650:	1065      	lrw      	r3, 0x20000040	// 3664 <UART0_DeInit+0x14>
+    3652:	3200      	movi      	r2, 0
+    3654:	9360      	ld.w      	r3, (r3, 0x0)
+    3656:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    3658:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    365a:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    365c:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    365e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3660:	783c      	jmp      	r15
+    3662:	0000      	bkpt
+    3664:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00003668 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    3668:	1065      	lrw      	r3, 0x2000003c	// 367c <UART1_DeInit+0x14>
+    366a:	3200      	movi      	r2, 0
+    366c:	9360      	ld.w      	r3, (r3, 0x0)
+    366e:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    3670:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    3672:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    3674:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    3676:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3678:	783c      	jmp      	r15
+    367a:	0000      	bkpt
+    367c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+00003680 <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    3680:	1065      	lrw      	r3, 0x20000038	// 3694 <UART2_DeInit+0x14>
+    3682:	3200      	movi      	r2, 0
+    3684:	9360      	ld.w      	r3, (r3, 0x0)
+    3686:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    3688:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    368a:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    368c:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    368e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3690:	783c      	jmp      	r15
+    3692:	0000      	bkpt
+    3694:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+00003698 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    3698:	1065      	lrw      	r3, 0x20000040	// 36ac <UART0_Int_Enable+0x14>
+    369a:	320f      	movi      	r2, 15
+    369c:	9360      	ld.w      	r3, (r3, 0x0)
+    369e:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36a0:	3380      	movi      	r3, 128
+    36a2:	4366      	lsli      	r3, r3, 6
+    36a4:	1043      	lrw      	r2, 0xe000e100	// 36b0 <UART0_Int_Enable+0x18>
+    36a6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36a8:	783c      	jmp      	r15
+    36aa:	0000      	bkpt
+    36ac:	20000040 	.long	0x20000040
+    36b0:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000036b4 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    36b4:	1065      	lrw      	r3, 0x20000038	// 36c8 <UART2_Int_Enable+0x14>
+    36b6:	320f      	movi      	r2, 15
+    36b8:	9360      	ld.w      	r3, (r3, 0x0)
+    36ba:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36bc:	3380      	movi      	r3, 128
+    36be:	4368      	lsli      	r3, r3, 8
+    36c0:	1043      	lrw      	r2, 0xe000e100	// 36cc <UART2_Int_Enable+0x18>
+    36c2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36c4:	783c      	jmp      	r15
+    36c6:	0000      	bkpt
+    36c8:	20000038 	.long	0x20000038
+    36cc:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+000036d0 <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    36d0:	3840      	cmpnei      	r0, 0
+    36d2:	0821      	bt      	0x3714	// 3714 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    36d4:	3940      	cmpnei      	r1, 0
+    36d6:	080a      	bt      	0x36ea	// 36ea <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    36d8:	1177      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36da:	31ff      	movi      	r1, 255
+    36dc:	9340      	ld.w      	r2, (r3, 0x0)
+    36de:	9260      	ld.w      	r3, (r2, 0x0)
+    36e0:	68c5      	andn      	r3, r1
+    36e2:	3ba2      	bseti      	r3, 2
+    36e4:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    36e6:	b260      	st.w      	r3, (r2, 0x0)
+    36e8:	0415      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    36ea:	3941      	cmpnei      	r1, 1
+    36ec:	0813      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    36ee:	1172      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36f0:	31f0      	movi      	r1, 240
+    36f2:	9340      	ld.w      	r2, (r3, 0x0)
+    36f4:	9260      	ld.w      	r3, (r2, 0x0)
+    36f6:	4130      	lsli      	r1, r1, 16
+    36f8:	68c5      	andn      	r3, r1
+    36fa:	31e0      	movi      	r1, 224
+    36fc:	412f      	lsli      	r1, r1, 15
+    36fe:	6cc4      	or      	r3, r1
+    3700:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    3702:	31f0      	movi      	r1, 240
+    3704:	9261      	ld.w      	r3, (r2, 0x4)
+    3706:	412c      	lsli      	r1, r1, 12
+    3708:	68c5      	andn      	r3, r1
+    370a:	31e0      	movi      	r1, 224
+    370c:	412b      	lsli      	r1, r1, 11
+    370e:	6cc4      	or      	r3, r1
+    3710:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    3712:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    3714:	3841      	cmpnei      	r0, 1
+    3716:	082d      	bt      	0x3770	// 3770 <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    3718:	3940      	cmpnei      	r1, 0
+    371a:	0814      	bt      	0x3742	// 3742 <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    371c:	1167      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    371e:	310f      	movi      	r1, 15
+    3720:	9340      	ld.w      	r2, (r3, 0x0)
+    3722:	9260      	ld.w      	r3, (r2, 0x0)
+    3724:	68c5      	andn      	r3, r1
+    3726:	3107      	movi      	r1, 7
+    3728:	6cc4      	or      	r3, r1
+    372a:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    372c:	32f0      	movi      	r2, 240
+    372e:	1162      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3730:	4250      	lsli      	r2, r2, 16
+    3732:	9320      	ld.w      	r1, (r3, 0x0)
+    3734:	9161      	ld.w      	r3, (r1, 0x4)
+    3736:	68c9      	andn      	r3, r2
+    3738:	32e0      	movi      	r2, 224
+    373a:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    373c:	6cc8      	or      	r3, r2
+    373e:	b161      	st.w      	r3, (r1, 0x4)
+    3740:	07e9      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    3742:	3941      	cmpnei      	r1, 1
+    3744:	080c      	bt      	0x375c	// 375c <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    3746:	107c      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3748:	32ff      	movi      	r2, 255
+    374a:	9320      	ld.w      	r1, (r3, 0x0)
+    374c:	424c      	lsli      	r2, r2, 12
+    374e:	9160      	ld.w      	r3, (r1, 0x0)
+    3750:	68c9      	andn      	r3, r2
+    3752:	32ee      	movi      	r2, 238
+    3754:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    3756:	6cc8      	or      	r3, r2
+    3758:	b160      	st.w      	r3, (r1, 0x0)
+}
+    375a:	07dc      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    375c:	3942      	cmpnei      	r1, 2
+    375e:	0bda      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    3760:	1075      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3762:	32ee      	movi      	r2, 238
+    3764:	9320      	ld.w      	r1, (r3, 0x0)
+    3766:	9161      	ld.w      	r3, (r1, 0x4)
+    3768:	4368      	lsli      	r3, r3, 8
+    376a:	4b68      	lsri      	r3, r3, 8
+    376c:	4257      	lsli      	r2, r2, 23
+    376e:	07e7      	br      	0x373c	// 373c <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    3770:	3842      	cmpnei      	r0, 2
+    3772:	0bd0      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    3774:	3940      	cmpnei      	r1, 0
+    3776:	0809      	bt      	0x3788	// 3788 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    3778:	106f      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    377a:	31ff      	movi      	r1, 255
+    377c:	9340      	ld.w      	r2, (r3, 0x0)
+    377e:	9260      	ld.w      	r3, (r2, 0x0)
+    3780:	68c5      	andn      	r3, r1
+    3782:	3177      	movi      	r1, 119
+    3784:	6cc4      	or      	r3, r1
+    3786:	07b0      	br      	0x36e6	// 36e6 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    3788:	3941      	cmpnei      	r1, 1
+    378a:	0809      	bt      	0x379c	// 379c <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    378c:	106a      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    378e:	32ee      	movi      	r2, 238
+    3790:	9320      	ld.w      	r1, (r3, 0x0)
+    3792:	9160      	ld.w      	r3, (r1, 0x0)
+    3794:	4368      	lsli      	r3, r3, 8
+    3796:	4b68      	lsri      	r3, r3, 8
+    3798:	4257      	lsli      	r2, r2, 23
+    379a:	07de      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    379c:	3942      	cmpnei      	r1, 2
+    379e:	0bba      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    37a0:	1066      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    37a2:	32ff      	movi      	r2, 255
+    37a4:	9320      	ld.w      	r1, (r3, 0x0)
+    37a6:	4250      	lsli      	r2, r2, 16
+    37a8:	9160      	ld.w      	r3, (r1, 0x0)
+    37aa:	68c9      	andn      	r3, r2
+    37ac:	32cc      	movi      	r2, 204
+    37ae:	424f      	lsli      	r2, r2, 15
+    37b0:	07d3      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+    37b2:	0000      	bkpt
+    37b4:	2000004c 	.long	0x2000004c
+    37b8:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000037bc <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    37bc:	1063      	lrw      	r3, 0x80003	// 37c8 <UARTInit+0xc>
+    37be:	6c8c      	or      	r2, r3
+    37c0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37c2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37c4:	783c      	jmp      	r15
+    37c6:	0000      	bkpt
+    37c8:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+000037cc <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    37cc:	1063      	lrw      	r3, 0x8000f	// 37d8 <UARTInitRxTxIntEn+0xc>
+    37ce:	6c8c      	or      	r2, r3
+    37d0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37d2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37d4:	783c      	jmp      	r15
+    37d6:	0000      	bkpt
+    37d8:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+000037dc <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    37dc:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37de:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    37e0:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37e2:	5b85      	subu      	r4, r3, r1
+    37e4:	6490      	cmphs      	r4, r2
+    37e6:	0c02      	bf      	0x37ea	// 37ea <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    37e8:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    37ea:	8380      	ld.b      	r4, (r3, 0x0)
+    37ec:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    37ee:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    37f0:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    37f2:	3c40      	cmpnei      	r4, 0
+    37f4:	0bfd      	bt      	0x37ee	// 37ee <UARTTransmit+0x12>
+    37f6:	2300      	addi      	r3, 1
+    37f8:	07f5      	br      	0x37e2	// 37e2 <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000037fc <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    37fc:	1068      	lrw      	r3, 0x20000020	// 381c <EPT_Stop+0x20>
+    37fe:	3280      	movi      	r2, 128
+    3800:	9360      	ld.w      	r3, (r3, 0x0)
+    3802:	608c      	addu      	r2, r3
+    3804:	1027      	lrw      	r1, 0xa55ac73a	// 3820 <EPT_Stop+0x24>
+    3806:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    3808:	9341      	ld.w      	r2, (r3, 0x4)
+    380a:	31fe      	movi      	r1, 254
+    380c:	6884      	and      	r2, r1
+    380e:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    3810:	3101      	movi      	r1, 1
+    3812:	9341      	ld.w      	r2, (r3, 0x4)
+    3814:	6884      	and      	r2, r1
+    3816:	3a40      	cmpnei      	r2, 0
+    3818:	0bfd      	bt      	0x3812	// 3812 <EPT_Stop+0x16>
+}
+    381a:	783c      	jmp      	r15
+    381c:	20000020 	.long	0x20000020
+    3820:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00003824 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    3824:	14d1      	push      	r4, r15
+	
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3826:	1099      	lrw      	r4, 0x20000048	// 3888 <main+0x64>
+    3828:	3201      	movi      	r2, 1
+    382a:	9400      	ld.w      	r0, (r4, 0x0)
+    382c:	3102      	movi      	r1, 2
+    382e:	e3fffd0f 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    3832:	9400      	ld.w      	r0, (r4, 0x0)
+    3834:	3102      	movi      	r1, 2
+    3836:	e3fffd7b 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    383a:	3102      	movi      	r1, 2
+    383c:	9400      	ld.w      	r0, (r4, 0x0)
+    383e:	e3fffd9b 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    3842:	1093      	lrw      	r4, 0x200000a0	// 388c <main+0x68>
+	last_state = rf_exist;
+    3844:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3846:	a400      	st.b      	r0, (r4, 0x0)
+	APT32F102_init();							//102 initial
+    3848:	e00000e8 	bsr      	0x3a18	// 3a18 <APT32F102_init>
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    384c:	1031      	lrw      	r1, 0x5f3c	// 3890 <main+0x6c>
+    384e:	3000      	movi      	r0, 0
+    3850:	e00006b8 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    3854:	e3fffc6a 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+
+		//UART2_TASK();
+		Detect_WIFI_Task();
+    3858:	e0000bd6 	bsr      	0x5004	// 5004 <Detect_WIFI_Task>
+//		test_task();
+		BackLight_Task();
+    385c:	e0000bba 	bsr      	0x4fd0	// 4fd0 <BackLight_Task>
+		if (finish_flag == 1) {
+    3860:	8462      	ld.b      	r3, (r4, 0x2)
+    3862:	3b41      	cmpnei      	r3, 1
+    3864:	0bf8      	bt      	0x3854	// 3854 <main+0x30>
+			Card_Read_TasK();
+    3866:	e00009bf 	bsr      	0x4be4	// 4be4 <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    386a:	8460      	ld.b      	r3, (r4, 0x0)
+    386c:	3b41      	cmpnei      	r3, 1
+    386e:	0806      	bt      	0x387a	// 387a <main+0x56>
+			{
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    3870:	e0000b4c 	bsr      	0x4f08	// 4f08 <LogicCtrl_NoRF_Task>
+				DM_Led_Task();
+    3874:	e0000c12 	bsr      	0x5098	// 5098 <DM_Led_Task>
+    3878:	07ee      	br      	0x3854	// 3854 <main+0x30>
+			}
+			else if(rf_exist == 0x00)
+    387a:	3b40      	cmpnei      	r3, 0
+    387c:	0bec      	bt      	0x3854	// 3854 <main+0x30>
+			{
+				Debounce_Task();
+    387e:	e0000a93 	bsr      	0x4da4	// 4da4 <Debounce_Task>
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    3882:	e0000ac5 	bsr      	0x4e0c	// 4e0c <LogicCtrl_Task>
+    3886:	07e7      	br      	0x3854	// 3854 <main+0x30>
+    3888:	20000048 	.long	0x20000048
+    388c:	200000a0 	.long	0x200000a0
+    3890:	00005f3c 	.long	0x00005f3c
+
+Disassembly of section .text.delay_nms:
+
+00003894 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    3894:	14d0      	push      	r15
+    3896:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    3898:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    389a:	3300      	movi      	r3, 0
+    j = 50* t;
+    389c:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    389e:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    38a0:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    38a2:	b860      	st.w      	r3, (r14, 0x0)
+    38a4:	9840      	ld.w      	r2, (r14, 0x0)
+    38a6:	9861      	ld.w      	r3, (r14, 0x4)
+    38a8:	64c8      	cmphs      	r2, r3
+    38aa:	0c03      	bf      	0x38b0	// 38b0 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    38ac:	1403      	addi      	r14, r14, 12
+    38ae:	1490      	pop      	r15
+        k++;
+    38b0:	9862      	ld.w      	r3, (r14, 0x8)
+    38b2:	2300      	addi      	r3, 1
+    38b4:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    38b6:	e3fffc39 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    38ba:	9860      	ld.w      	r3, (r14, 0x0)
+    38bc:	2300      	addi      	r3, 1
+    38be:	07f2      	br      	0x38a2	// 38a2 <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000038c0 <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    38c0:	14d0      	push      	r15
+    38c2:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    38c4:	3000      	movi      	r0, 0
+    38c6:	e3fffdc7 	bsr      	0x3454	// 3454 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    38ca:	3300      	movi      	r3, 0
+    38cc:	3240      	movi      	r2, 64
+    38ce:	3100      	movi      	r1, 0
+    38d0:	3001      	movi      	r0, 1
+    38d2:	e3fffe11 	bsr      	0x34f4	// 34f4 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    38d6:	3300      	movi      	r3, 0
+    38d8:	b865      	st.w      	r3, (r14, 0x14)
+    38da:	b864      	st.w      	r3, (r14, 0x10)
+    38dc:	b863      	st.w      	r3, (r14, 0xc)
+    38de:	b862      	st.w      	r3, (r14, 0x8)
+    38e0:	b861      	st.w      	r3, (r14, 0x4)
+    38e2:	b860      	st.w      	r3, (r14, 0x0)
+    38e4:	3208      	movi      	r2, 8
+    38e6:	3100      	movi      	r1, 0
+    38e8:	3000      	movi      	r0, 0
+    38ea:	e3fffe0f 	bsr      	0x3508	// 3508 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    38ee:	1079      	lrw      	r3, 0x200000a0	// 3950 <GPT0_CONFIG+0x90>
+    38f0:	8360      	ld.b      	r3, (r3, 0x0)
+    38f2:	3b41      	cmpnei      	r3, 1
+    38f4:	0827      	bt      	0x3942	// 3942 <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    38f6:	31fa      	movi      	r1, 250
+    38f8:	4123      	lsli      	r1, r1, 3
+    38fa:	3200      	movi      	r2, 0
+    38fc:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    38fe:	e3fffe93 	bsr      	0x3624	// 3624 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    3902:	3320      	movi      	r3, 32
+    3904:	3204      	movi      	r2, 4
+    3906:	3100      	movi      	r1, 0
+    3908:	3001      	movi      	r0, 1
+    390a:	e3fffe21 	bsr      	0x354c	// 354c <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    390e:	3300      	movi      	r3, 0
+    3910:	3201      	movi      	r2, 1
+    3912:	b868      	st.w      	r3, (r14, 0x20)
+    3914:	b867      	st.w      	r3, (r14, 0x1c)
+    3916:	b866      	st.w      	r3, (r14, 0x18)
+    3918:	b865      	st.w      	r3, (r14, 0x14)
+    391a:	b864      	st.w      	r3, (r14, 0x10)
+    391c:	b863      	st.w      	r3, (r14, 0xc)
+    391e:	b842      	st.w      	r2, (r14, 0x8)
+    3920:	b841      	st.w      	r2, (r14, 0x4)
+    3922:	b860      	st.w      	r3, (r14, 0x0)
+    3924:	3200      	movi      	r2, 0
+    3926:	3302      	movi      	r3, 2
+    3928:	3100      	movi      	r1, 0
+    392a:	3000      	movi      	r0, 0
+    392c:	e3fffe1a 	bsr      	0x3560	// 3560 <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    3930:	e3fffe72 	bsr      	0x3614	// 3614 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    3934:	3180      	movi      	r1, 128
+    3936:	4129      	lsli      	r1, r1, 9
+    3938:	3001      	movi      	r0, 1
+    393a:	e3fffe7d 	bsr      	0x3634	// 3634 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    393e:	1409      	addi      	r14, r14, 36
+    3940:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    3942:	3b40      	cmpnei      	r3, 0
+    3944:	0bdf      	bt      	0x3902	// 3902 <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    3946:	30fa      	movi      	r0, 250
+    3948:	3200      	movi      	r2, 0
+    394a:	3100      	movi      	r1, 0
+    394c:	4003      	lsli      	r0, r0, 3
+    394e:	07d8      	br      	0x38fe	// 38fe <GPT0_CONFIG+0x3e>
+    3950:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.BT_CONFIG:
+
+00003954 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    3954:	14d2      	push      	r4-r5, r15
+    3956:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    3958:	1095      	lrw      	r4, 0x20000008	// 39ac <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    395a:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    395c:	9400      	ld.w      	r0, (r4, 0x0)
+    395e:	e3fffd2d 	bsr      	0x33b8	// 33b8 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    3962:	9400      	ld.w      	r0, (r4, 0x0)
+    3964:	b8a1      	st.w      	r5, (r14, 0x4)
+    3966:	b8a0      	st.w      	r5, (r14, 0x0)
+    3968:	3308      	movi      	r3, 8
+    396a:	3200      	movi      	r2, 0
+    396c:	3101      	movi      	r1, 1
+    396e:	e3fffd3c 	bsr      	0x33e6	// 33e6 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    3972:	3380      	movi      	r3, 128
+    3974:	4363      	lsli      	r3, r3, 3
+    3976:	b861      	st.w      	r3, (r14, 0x4)
+    3978:	9400      	ld.w      	r0, (r4, 0x0)
+    397a:	3300      	movi      	r3, 0
+    397c:	b8a3      	st.w      	r5, (r14, 0xc)
+    397e:	b8a2      	st.w      	r5, (r14, 0x8)
+    3980:	b8a0      	st.w      	r5, (r14, 0x0)
+    3982:	3200      	movi      	r2, 0
+    3984:	3180      	movi      	r1, 128
+    3986:	e3fffd3c 	bsr      	0x33fe	// 33fe <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    398a:	3201      	movi      	r2, 1
+    398c:	1029      	lrw      	r1, 0x12ac	// 39b0 <BT_CONFIG+0x5c>
+    398e:	9400      	ld.w      	r0, (r4, 0x0)
+    3990:	e3fffd4d 	bsr      	0x342a	// 342a <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    3994:	9400      	ld.w      	r0, (r4, 0x0)
+    3996:	e3fffd1f 	bsr      	0x33d4	// 33d4 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    399a:	9400      	ld.w      	r0, (r4, 0x0)
+    399c:	3202      	movi      	r2, 2
+    399e:	3101      	movi      	r1, 1
+    39a0:	e3fffd48 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    39a4:	e3fffd50 	bsr      	0x3444	// 3444 <BT1_INT_ENABLE>
+	
+}
+    39a8:	1404      	addi      	r14, r14, 16
+    39aa:	1492      	pop      	r4-r5, r15
+    39ac:	20000008 	.long	0x20000008
+    39b0:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000039b4 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    39b4:	14d0      	push      	r15
+    39b6:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    39b8:	e3fffb04 	bsr      	0x2fc0	// 2fc0 <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    39bc:	3101      	movi      	r1, 1
+    39be:	3001      	movi      	r0, 1
+    39c0:	e3fffb26 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    39c4:	3000      	movi      	r0, 0
+    39c6:	e3fffb7f 	bsr      	0x30c4	// 30c4 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    39ca:	3180      	movi      	r1, 128
+    39cc:	3308      	movi      	r3, 8
+    39ce:	3200      	movi      	r2, 0
+    39d0:	4121      	lsli      	r1, r1, 1
+    39d2:	3002      	movi      	r0, 2
+    39d4:	e3fffb34 	bsr      	0x303c	// 303c <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    39d8:	3080      	movi      	r0, 128
+    39da:	3118      	movi      	r1, 24
+    39dc:	4002      	lsli      	r0, r0, 2
+    39de:	e3fffbaf 	bsr      	0x313c	// 313c <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    39e2:	3001      	movi      	r0, 1
+    39e4:	e3fffb84 	bsr      	0x30ec	// 30ec <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    39e8:	e3fffba0 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    39ec:	e3fffbd2 	bsr      	0x3190	// 3190 <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    39f0:	3340      	movi      	r3, 64
+    39f2:	b860      	st.w      	r3, (r14, 0x0)
+    39f4:	31c0      	movi      	r1, 192
+    39f6:	3380      	movi      	r3, 128
+    39f8:	4364      	lsli      	r3, r3, 4
+    39fa:	3200      	movi      	r2, 0
+    39fc:	4123      	lsli      	r1, r1, 3
+    39fe:	3000      	movi      	r0, 0
+    3a00:	e3fffbaa 	bsr      	0x3154	// 3154 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    3a04:	e3fffbb8 	bsr      	0x3174	// 3174 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    3a08:	e3fffbf2 	bsr      	0x31ec	// 31ec <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    3a0c:	3000      	movi      	r0, 0
+    3a0e:	e0000f83 	bsr      	0x5914	// 5914 <std_clk_calib>
+	
+}
+    3a12:	1401      	addi      	r14, r14, 4
+    3a14:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00003a18 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    3a18:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a1a:	1072      	lrw      	r3, 0x2000005c	// 3a60 <APT32F102_init+0x48>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a1c:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a1e:	9340      	ld.w      	r2, (r3, 0x0)
+    3a20:	1071      	lrw      	r3, 0xfffffff	// 3a64 <APT32F102_init+0x4c>
+    3a22:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    3a24:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a26:	926c      	ld.w      	r3, (r2, 0x30)
+    3a28:	68c4      	and      	r3, r1
+    3a2a:	3b40      	cmpnei      	r3, 0
+    3a2c:	0ffd      	bf      	0x3a26	// 3a26 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    3a2e:	e3ffffc3 	bsr      	0x39b4	// 39b4 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    3a32:	e0000525 	bsr      	0x447c	// 447c <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    3a36:	e3fffbe1 	bsr      	0x31f8	// 31f8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    3a3a:	3101      	movi      	r1, 1
+    3a3c:	300f      	movi      	r0, 15
+    3a3e:	e3fffbef 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//	Set_INT_Priority(SIO_IRQ,1);				//SIO优先级最高
+//	
+	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+    3a42:	3102      	movi      	r1, 2
+    3a44:	3019      	movi      	r0, 25
+    3a46:	e3fffbeb 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    3a4a:	e3ffff85 	bsr      	0x3954	// 3954 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    3a4e:	e3ffff39 	bsr      	0x38c0	// 38c0 <GPT0_CONFIG>
+	
+	UARTx_Init(UART_1,NULL);
+    3a52:	3100      	movi      	r1, 0
+    3a54:	3001      	movi      	r0, 1
+    3a56:	e0000517 	bsr      	0x4484	// 4484 <UARTx_Init>
+//	UARTx_Init(UART_2,NULL);
+	
+	RC522_Init();
+    3a5a:	e0000713 	bsr      	0x4880	// 4880 <RC522_Init>
+//	}
+//	else if(rf_exist == 0x00)  //带无线模块初始化
+//	{
+//		LogicCtrl_Init();     
+//	}
+}
+    3a5e:	1490      	pop      	r15
+    3a60:	2000005c 	.long	0x2000005c
+    3a64:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00003a68 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    3a68:	1460      	nie
+    3a6a:	1462      	ipush
+    // ISR content ...
+	nop;
+    3a6c:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    3a6e:	117a      	lrw      	r3, 0x2000005c	// 3b54 <SYSCONIntHandler+0xec>
+    3a70:	3280      	movi      	r2, 128
+    3a72:	9360      	ld.w      	r3, (r3, 0x0)
+    3a74:	60c8      	addu      	r3, r2
+    3a76:	9323      	ld.w      	r1, (r3, 0xc)
+    3a78:	3001      	movi      	r0, 1
+    3a7a:	6840      	and      	r1, r0
+    3a7c:	3940      	cmpnei      	r1, 0
+    3a7e:	0c04      	bf      	0x3a86	// 3a86 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    3a80:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    3a82:	1463      	ipop
+    3a84:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    3a86:	9323      	ld.w      	r1, (r3, 0xc)
+    3a88:	3002      	movi      	r0, 2
+    3a8a:	6840      	and      	r1, r0
+    3a8c:	3940      	cmpnei      	r1, 0
+    3a8e:	0bf9      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    3a90:	9323      	ld.w      	r1, (r3, 0xc)
+    3a92:	3008      	movi      	r0, 8
+    3a94:	6840      	and      	r1, r0
+    3a96:	3940      	cmpnei      	r1, 0
+    3a98:	0bf4      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    3a9a:	9323      	ld.w      	r1, (r3, 0xc)
+    3a9c:	3010      	movi      	r0, 16
+    3a9e:	6840      	and      	r1, r0
+    3aa0:	3940      	cmpnei      	r1, 0
+    3aa2:	0bef      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    3aa4:	9323      	ld.w      	r1, (r3, 0xc)
+    3aa6:	6848      	and      	r1, r2
+    3aa8:	3940      	cmpnei      	r1, 0
+    3aaa:	0c03      	bf      	0x3ab0	// 3ab0 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    3aac:	b341      	st.w      	r2, (r3, 0x4)
+}
+    3aae:	07ea      	br      	0x3a82	// 3a82 <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    3ab0:	3280      	movi      	r2, 128
+    3ab2:	9323      	ld.w      	r1, (r3, 0xc)
+    3ab4:	4241      	lsli      	r2, r2, 1
+    3ab6:	6848      	and      	r1, r2
+    3ab8:	3940      	cmpnei      	r1, 0
+    3aba:	0bf9      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    3abc:	3280      	movi      	r2, 128
+    3abe:	9323      	ld.w      	r1, (r3, 0xc)
+    3ac0:	4242      	lsli      	r2, r2, 2
+    3ac2:	6848      	and      	r1, r2
+    3ac4:	3940      	cmpnei      	r1, 0
+    3ac6:	0bf3      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    3ac8:	3280      	movi      	r2, 128
+    3aca:	9323      	ld.w      	r1, (r3, 0xc)
+    3acc:	4243      	lsli      	r2, r2, 3
+    3ace:	6848      	and      	r1, r2
+    3ad0:	3940      	cmpnei      	r1, 0
+    3ad2:	0bed      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    3ad4:	3280      	movi      	r2, 128
+    3ad6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ad8:	4244      	lsli      	r2, r2, 4
+    3ada:	6848      	and      	r1, r2
+    3adc:	3940      	cmpnei      	r1, 0
+    3ade:	0c03      	bf      	0x3ae4	// 3ae4 <SYSCONIntHandler+0x7c>
+		nop;
+    3ae0:	6c03      	mov      	r0, r0
+    3ae2:	07e5      	br      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    3ae4:	3280      	movi      	r2, 128
+    3ae6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ae8:	4245      	lsli      	r2, r2, 5
+    3aea:	6848      	and      	r1, r2
+    3aec:	3940      	cmpnei      	r1, 0
+    3aee:	0bdf      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    3af0:	3280      	movi      	r2, 128
+    3af2:	9323      	ld.w      	r1, (r3, 0xc)
+    3af4:	4246      	lsli      	r2, r2, 6
+    3af6:	6848      	and      	r1, r2
+    3af8:	3940      	cmpnei      	r1, 0
+    3afa:	0bd9      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    3afc:	3280      	movi      	r2, 128
+    3afe:	9323      	ld.w      	r1, (r3, 0xc)
+    3b00:	4247      	lsli      	r2, r2, 7
+    3b02:	6848      	and      	r1, r2
+    3b04:	3940      	cmpnei      	r1, 0
+    3b06:	0bd3      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    3b08:	3280      	movi      	r2, 128
+    3b0a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b0c:	424b      	lsli      	r2, r2, 11
+    3b0e:	6848      	and      	r1, r2
+    3b10:	3940      	cmpnei      	r1, 0
+    3b12:	0bcd      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    3b14:	3280      	movi      	r2, 128
+    3b16:	9323      	ld.w      	r1, (r3, 0xc)
+    3b18:	424c      	lsli      	r2, r2, 12
+    3b1a:	6848      	and      	r1, r2
+    3b1c:	3940      	cmpnei      	r1, 0
+    3b1e:	0bc7      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    3b20:	3280      	movi      	r2, 128
+    3b22:	9323      	ld.w      	r1, (r3, 0xc)
+    3b24:	424d      	lsli      	r2, r2, 13
+    3b26:	6848      	and      	r1, r2
+    3b28:	3940      	cmpnei      	r1, 0
+    3b2a:	0bc1      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    3b2c:	3280      	movi      	r2, 128
+    3b2e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b30:	424e      	lsli      	r2, r2, 14
+    3b32:	6848      	and      	r1, r2
+    3b34:	3940      	cmpnei      	r1, 0
+    3b36:	0bbb      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    3b38:	3280      	movi      	r2, 128
+    3b3a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b3c:	424f      	lsli      	r2, r2, 15
+    3b3e:	6848      	and      	r1, r2
+    3b40:	3940      	cmpnei      	r1, 0
+    3b42:	0bb5      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    3b44:	3280      	movi      	r2, 128
+    3b46:	9323      	ld.w      	r1, (r3, 0xc)
+    3b48:	4256      	lsli      	r2, r2, 22
+    3b4a:	6848      	and      	r1, r2
+    3b4c:	3940      	cmpnei      	r1, 0
+    3b4e:	0baf      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+    3b50:	0799      	br      	0x3a82	// 3a82 <SYSCONIntHandler+0x1a>
+    3b52:	0000      	bkpt
+    3b54:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00003b58 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    3b58:	1460      	nie
+    3b5a:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    3b5c:	1078      	lrw      	r3, 0x20000060	// 3bbc <IFCIntHandler+0x64>
+    3b5e:	3101      	movi      	r1, 1
+    3b60:	9360      	ld.w      	r3, (r3, 0x0)
+    3b62:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b64:	6884      	and      	r2, r1
+    3b66:	3a40      	cmpnei      	r2, 0
+    3b68:	0c04      	bf      	0x3b70	// 3b70 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    3b6a:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    3b6c:	1463      	ipop
+    3b6e:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    3b70:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b72:	3102      	movi      	r1, 2
+    3b74:	6884      	and      	r2, r1
+    3b76:	3a40      	cmpnei      	r2, 0
+    3b78:	0bf9      	bt      	0x3b6a	// 3b6a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    3b7a:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b7c:	3104      	movi      	r1, 4
+    3b7e:	6884      	and      	r2, r1
+    3b80:	3a40      	cmpnei      	r2, 0
+    3b82:	0bf4      	bt      	0x3b6a	// 3b6a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    3b84:	3280      	movi      	r2, 128
+    3b86:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b88:	4245      	lsli      	r2, r2, 5
+    3b8a:	6848      	and      	r1, r2
+    3b8c:	3940      	cmpnei      	r1, 0
+    3b8e:	0c03      	bf      	0x3b94	// 3b94 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    3b90:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    3b92:	07ed      	br      	0x3b6c	// 3b6c <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    3b94:	3280      	movi      	r2, 128
+    3b96:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b98:	4246      	lsli      	r2, r2, 6
+    3b9a:	6848      	and      	r1, r2
+    3b9c:	3940      	cmpnei      	r1, 0
+    3b9e:	0bf9      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    3ba0:	3280      	movi      	r2, 128
+    3ba2:	932b      	ld.w      	r1, (r3, 0x2c)
+    3ba4:	4247      	lsli      	r2, r2, 7
+    3ba6:	6848      	and      	r1, r2
+    3ba8:	3940      	cmpnei      	r1, 0
+    3baa:	0bf3      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    3bac:	3280      	movi      	r2, 128
+    3bae:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bb0:	4248      	lsli      	r2, r2, 8
+    3bb2:	6848      	and      	r1, r2
+    3bb4:	3940      	cmpnei      	r1, 0
+    3bb6:	0bed      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+    3bb8:	07da      	br      	0x3b6c	// 3b6c <IFCIntHandler+0x14>
+    3bba:	0000      	bkpt
+    3bbc:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00003bc0 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    3bc0:	1460      	nie
+    3bc2:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    3bc4:	1078      	lrw      	r3, 0x20000050	// 3c24 <ADCIntHandler+0x64>
+    3bc6:	3101      	movi      	r1, 1
+    3bc8:	9360      	ld.w      	r3, (r3, 0x0)
+    3bca:	9348      	ld.w      	r2, (r3, 0x20)
+    3bcc:	6884      	and      	r2, r1
+    3bce:	3a40      	cmpnei      	r2, 0
+    3bd0:	0c04      	bf      	0x3bd8	// 3bd8 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    3bd2:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    3bd4:	1463      	ipop
+    3bd6:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    3bd8:	9348      	ld.w      	r2, (r3, 0x20)
+    3bda:	3102      	movi      	r1, 2
+    3bdc:	6884      	and      	r2, r1
+    3bde:	3a40      	cmpnei      	r2, 0
+    3be0:	0bf9      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    3be2:	9348      	ld.w      	r2, (r3, 0x20)
+    3be4:	3104      	movi      	r1, 4
+    3be6:	6884      	and      	r2, r1
+    3be8:	3a40      	cmpnei      	r2, 0
+    3bea:	0bf4      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    3bec:	9348      	ld.w      	r2, (r3, 0x20)
+    3bee:	3110      	movi      	r1, 16
+    3bf0:	6884      	and      	r2, r1
+    3bf2:	3a40      	cmpnei      	r2, 0
+    3bf4:	0bef      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    3bf6:	9348      	ld.w      	r2, (r3, 0x20)
+    3bf8:	3120      	movi      	r1, 32
+    3bfa:	6884      	and      	r2, r1
+    3bfc:	3a40      	cmpnei      	r2, 0
+    3bfe:	0bea      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    3c00:	9348      	ld.w      	r2, (r3, 0x20)
+    3c02:	3140      	movi      	r1, 64
+    3c04:	6884      	and      	r2, r1
+    3c06:	3a40      	cmpnei      	r2, 0
+    3c08:	0be5      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    3c0a:	9348      	ld.w      	r2, (r3, 0x20)
+    3c0c:	3180      	movi      	r1, 128
+    3c0e:	6884      	and      	r2, r1
+    3c10:	3a40      	cmpnei      	r2, 0
+    3c12:	0be0      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    3c14:	3280      	movi      	r2, 128
+    3c16:	9328      	ld.w      	r1, (r3, 0x20)
+    3c18:	4249      	lsli      	r2, r2, 9
+    3c1a:	6848      	and      	r1, r2
+    3c1c:	3940      	cmpnei      	r1, 0
+    3c1e:	0fdb      	bf      	0x3bd4	// 3bd4 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    3c20:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    3c22:	07d9      	br      	0x3bd4	// 3bd4 <ADCIntHandler+0x14>
+    3c24:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00003c28 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    3c28:	1460      	nie
+    3c2a:	1462      	ipush
+    3c2c:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    3c2e:	1387      	lrw      	r4, 0x20000020	// 3dc8 <EPT0IntHandler+0x1a0>
+    3c30:	3280      	movi      	r2, 128
+    3c32:	9460      	ld.w      	r3, (r4, 0x0)
+    3c34:	60c8      	addu      	r3, r2
+    3c36:	9335      	ld.w      	r1, (r3, 0x54)
+    3c38:	3001      	movi      	r0, 1
+    3c3a:	6840      	and      	r1, r0
+    3c3c:	3940      	cmpnei      	r1, 0
+    3c3e:	0c03      	bf      	0x3c44	// 3c44 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    3c40:	b317      	st.w      	r0, (r3, 0x5c)
+    3c42:	0424      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    3c44:	9335      	ld.w      	r1, (r3, 0x54)
+    3c46:	3002      	movi      	r0, 2
+    3c48:	6840      	and      	r1, r0
+    3c4a:	3940      	cmpnei      	r1, 0
+    3c4c:	0bfa      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    3c4e:	9335      	ld.w      	r1, (r3, 0x54)
+    3c50:	3004      	movi      	r0, 4
+    3c52:	6840      	and      	r1, r0
+    3c54:	3940      	cmpnei      	r1, 0
+    3c56:	0bf5      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    3c58:	9335      	ld.w      	r1, (r3, 0x54)
+    3c5a:	3008      	movi      	r0, 8
+    3c5c:	6840      	and      	r1, r0
+    3c5e:	3940      	cmpnei      	r1, 0
+    3c60:	0bf0      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    3c62:	9335      	ld.w      	r1, (r3, 0x54)
+    3c64:	3010      	movi      	r0, 16
+    3c66:	6840      	and      	r1, r0
+    3c68:	3940      	cmpnei      	r1, 0
+    3c6a:	0c1f      	bf      	0x3ca8	// 3ca8 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    3c6c:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    3c6e:	3200      	movi      	r2, 0
+    3c70:	3101      	movi      	r1, 1
+    3c72:	3000      	movi      	r0, 0
+    3c74:	e3fffa9c 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    3c78:	3201      	movi      	r2, 1
+    3c7a:	3101      	movi      	r1, 1
+    3c7c:	3001      	movi      	r0, 1
+    3c7e:	e3fffa97 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    3c82:	9460      	ld.w      	r3, (r4, 0x0)
+    3c84:	934b      	ld.w      	r2, (r3, 0x2c)
+    3c86:	1272      	lrw      	r3, 0x2000037c	// 3dcc <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3c88:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    3c8a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c8c:	3280      	movi      	r2, 128
+    3c8e:	60c8      	addu      	r3, r2
+    3c90:	932b      	ld.w      	r1, (r3, 0x2c)
+    3c92:	3001      	movi      	r0, 1
+    3c94:	6840      	and      	r1, r0
+    3c96:	3940      	cmpnei      	r1, 0
+    3c98:	0c61      	bf      	0x3d5a	// 3d5a <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    3c9a:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    3c9c:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3ca0:	9880      	ld.w      	r4, (r14, 0x0)
+    3ca2:	1402      	addi      	r14, r14, 8
+    3ca4:	1463      	ipop
+    3ca6:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    3ca8:	9335      	ld.w      	r1, (r3, 0x54)
+    3caa:	3020      	movi      	r0, 32
+    3cac:	6840      	and      	r1, r0
+    3cae:	3940      	cmpnei      	r1, 0
+    3cb0:	0c10      	bf      	0x3cd0	// 3cd0 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    3cb2:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    3cb4:	3200      	movi      	r2, 0
+    3cb6:	3101      	movi      	r1, 1
+    3cb8:	3001      	movi      	r0, 1
+    3cba:	e3fffa79 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    3cbe:	3201      	movi      	r2, 1
+    3cc0:	3101      	movi      	r1, 1
+    3cc2:	3000      	movi      	r0, 0
+    3cc4:	e3fffa74 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3cc8:	9460      	ld.w      	r3, (r4, 0x0)
+    3cca:	934c      	ld.w      	r2, (r3, 0x30)
+    3ccc:	1261      	lrw      	r3, 0x20000378	// 3dd0 <EPT0IntHandler+0x1a8>
+    3cce:	07dd      	br      	0x3c88	// 3c88 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    3cd0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cd2:	3040      	movi      	r0, 64
+    3cd4:	6840      	and      	r1, r0
+    3cd6:	3940      	cmpnei      	r1, 0
+    3cd8:	0bb4      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    3cda:	9335      	ld.w      	r1, (r3, 0x54)
+    3cdc:	6848      	and      	r1, r2
+    3cde:	3940      	cmpnei      	r1, 0
+    3ce0:	0c03      	bf      	0x3ce6	// 3ce6 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    3ce2:	b357      	st.w      	r2, (r3, 0x5c)
+    3ce4:	07d3      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    3ce6:	3280      	movi      	r2, 128
+    3ce8:	9335      	ld.w      	r1, (r3, 0x54)
+    3cea:	4241      	lsli      	r2, r2, 1
+    3cec:	6848      	and      	r1, r2
+    3cee:	3940      	cmpnei      	r1, 0
+    3cf0:	0bf9      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    3cf2:	3280      	movi      	r2, 128
+    3cf4:	9335      	ld.w      	r1, (r3, 0x54)
+    3cf6:	4242      	lsli      	r2, r2, 2
+    3cf8:	6848      	and      	r1, r2
+    3cfa:	3940      	cmpnei      	r1, 0
+    3cfc:	0bf3      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    3cfe:	3280      	movi      	r2, 128
+    3d00:	9335      	ld.w      	r1, (r3, 0x54)
+    3d02:	4243      	lsli      	r2, r2, 3
+    3d04:	6848      	and      	r1, r2
+    3d06:	3940      	cmpnei      	r1, 0
+    3d08:	0bed      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    3d0a:	3280      	movi      	r2, 128
+    3d0c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d0e:	4244      	lsli      	r2, r2, 4
+    3d10:	6848      	and      	r1, r2
+    3d12:	3940      	cmpnei      	r1, 0
+    3d14:	0be7      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    3d16:	3280      	movi      	r2, 128
+    3d18:	9335      	ld.w      	r1, (r3, 0x54)
+    3d1a:	4245      	lsli      	r2, r2, 5
+    3d1c:	6848      	and      	r1, r2
+    3d1e:	3940      	cmpnei      	r1, 0
+    3d20:	0be1      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    3d22:	3280      	movi      	r2, 128
+    3d24:	9335      	ld.w      	r1, (r3, 0x54)
+    3d26:	4246      	lsli      	r2, r2, 6
+    3d28:	6848      	and      	r1, r2
+    3d2a:	3940      	cmpnei      	r1, 0
+    3d2c:	0bdb      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    3d2e:	3280      	movi      	r2, 128
+    3d30:	9335      	ld.w      	r1, (r3, 0x54)
+    3d32:	4247      	lsli      	r2, r2, 7
+    3d34:	6848      	and      	r1, r2
+    3d36:	3940      	cmpnei      	r1, 0
+    3d38:	0bd5      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    3d3a:	3280      	movi      	r2, 128
+    3d3c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d3e:	4248      	lsli      	r2, r2, 8
+    3d40:	6848      	and      	r1, r2
+    3d42:	3940      	cmpnei      	r1, 0
+    3d44:	0bcf      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    3d46:	3280      	movi      	r2, 128
+    3d48:	9335      	ld.w      	r1, (r3, 0x54)
+    3d4a:	4249      	lsli      	r2, r2, 9
+    3d4c:	6848      	and      	r1, r2
+    3d4e:	3940      	cmpnei      	r1, 0
+    3d50:	0f9d      	bf      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    3d52:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    3d54:	e3fffd54 	bsr      	0x37fc	// 37fc <EPT_Stop>
+    3d58:	0799      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    3d5a:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d5c:	3002      	movi      	r0, 2
+    3d5e:	6840      	and      	r1, r0
+    3d60:	3940      	cmpnei      	r1, 0
+    3d62:	0b9c      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    3d64:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d66:	3004      	movi      	r0, 4
+    3d68:	6840      	and      	r1, r0
+    3d6a:	3940      	cmpnei      	r1, 0
+    3d6c:	0b97      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    3d6e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d70:	3008      	movi      	r0, 8
+    3d72:	6840      	and      	r1, r0
+    3d74:	3940      	cmpnei      	r1, 0
+    3d76:	0b92      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    3d78:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d7a:	3010      	movi      	r0, 16
+    3d7c:	6840      	and      	r1, r0
+    3d7e:	3940      	cmpnei      	r1, 0
+    3d80:	0b8d      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    3d82:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d84:	3020      	movi      	r0, 32
+    3d86:	6840      	and      	r1, r0
+    3d88:	3940      	cmpnei      	r1, 0
+    3d8a:	0b88      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    3d8c:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d8e:	3040      	movi      	r0, 64
+    3d90:	6840      	and      	r1, r0
+    3d92:	3940      	cmpnei      	r1, 0
+    3d94:	0b83      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    3d96:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d98:	6848      	and      	r1, r2
+    3d9a:	3940      	cmpnei      	r1, 0
+    3d9c:	0c03      	bf      	0x3da2	// 3da2 <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    3d9e:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    3da0:	077e      	br      	0x3c9c	// 3c9c <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    3da2:	3280      	movi      	r2, 128
+    3da4:	932b      	ld.w      	r1, (r3, 0x2c)
+    3da6:	4241      	lsli      	r2, r2, 1
+    3da8:	6848      	and      	r1, r2
+    3daa:	3940      	cmpnei      	r1, 0
+    3dac:	0bf9      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    3dae:	3280      	movi      	r2, 128
+    3db0:	932b      	ld.w      	r1, (r3, 0x2c)
+    3db2:	4242      	lsli      	r2, r2, 2
+    3db4:	6848      	and      	r1, r2
+    3db6:	3940      	cmpnei      	r1, 0
+    3db8:	0bf3      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    3dba:	3280      	movi      	r2, 128
+    3dbc:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dbe:	4243      	lsli      	r2, r2, 3
+    3dc0:	6848      	and      	r1, r2
+    3dc2:	3940      	cmpnei      	r1, 0
+    3dc4:	0bed      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+    3dc6:	076b      	br      	0x3c9c	// 3c9c <EPT0IntHandler+0x74>
+    3dc8:	20000020 	.long	0x20000020
+    3dcc:	2000037c 	.long	0x2000037c
+    3dd0:	20000378 	.long	0x20000378
+
+Disassembly of section .text.WWDTHandler:
+
+00003dd4 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    3dd4:	1460      	nie
+    3dd6:	1462      	ipush
+    3dd8:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    3dda:	10ab      	lrw      	r5, 0x20000010	// 3e04 <WWDTHandler+0x30>
+    3ddc:	3401      	movi      	r4, 1
+    3dde:	9560      	ld.w      	r3, (r5, 0x0)
+    3de0:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    3de2:	30ff      	movi      	r0, 255
+    3de4:	e3fffae2 	bsr      	0x33a8	// 33a8 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    3de8:	9540      	ld.w      	r2, (r5, 0x0)
+    3dea:	9263      	ld.w      	r3, (r2, 0xc)
+    3dec:	68d0      	and      	r3, r4
+    3dee:	3b40      	cmpnei      	r3, 0
+    3df0:	0c02      	bf      	0x3df4	// 3df4 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    3df2:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    3df4:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    3df8:	98a1      	ld.w      	r5, (r14, 0x4)
+    3dfa:	9880      	ld.w      	r4, (r14, 0x0)
+    3dfc:	1403      	addi      	r14, r14, 12
+    3dfe:	1463      	ipop
+    3e00:	1461      	nir
+    3e02:	0000      	bkpt
+    3e04:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00003e08 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    3e08:	1460      	nie
+    3e0a:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    3e0c:	107e      	lrw      	r3, 0x20000024	// 3e84 <GPT0IntHandler+0x7c>
+    3e0e:	3101      	movi      	r1, 1
+    3e10:	9360      	ld.w      	r3, (r3, 0x0)
+    3e12:	237f      	addi      	r3, 128
+    3e14:	9355      	ld.w      	r2, (r3, 0x54)
+    3e16:	6884      	and      	r2, r1
+    3e18:	3a40      	cmpnei      	r2, 0
+    3e1a:	0c04      	bf      	0x3e22	// 3e22 <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    3e1c:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    3e1e:	1463      	ipop
+    3e20:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    3e22:	9355      	ld.w      	r2, (r3, 0x54)
+    3e24:	3102      	movi      	r1, 2
+    3e26:	6884      	and      	r2, r1
+    3e28:	3a40      	cmpnei      	r2, 0
+    3e2a:	0bf9      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    3e2c:	9355      	ld.w      	r2, (r3, 0x54)
+    3e2e:	3110      	movi      	r1, 16
+    3e30:	6884      	and      	r2, r1
+    3e32:	3a40      	cmpnei      	r2, 0
+    3e34:	0bf4      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    3e36:	9355      	ld.w      	r2, (r3, 0x54)
+    3e38:	3120      	movi      	r1, 32
+    3e3a:	6884      	and      	r2, r1
+    3e3c:	3a40      	cmpnei      	r2, 0
+    3e3e:	0bef      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    3e40:	3280      	movi      	r2, 128
+    3e42:	9335      	ld.w      	r1, (r3, 0x54)
+    3e44:	4241      	lsli      	r2, r2, 1
+    3e46:	6848      	and      	r1, r2
+    3e48:	3940      	cmpnei      	r1, 0
+    3e4a:	0c03      	bf      	0x3e50	// 3e50 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    3e4c:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    3e4e:	07e8      	br      	0x3e1e	// 3e1e <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    3e50:	3280      	movi      	r2, 128
+    3e52:	9335      	ld.w      	r1, (r3, 0x54)
+    3e54:	4242      	lsli      	r2, r2, 2
+    3e56:	6848      	and      	r1, r2
+    3e58:	3940      	cmpnei      	r1, 0
+    3e5a:	0bf9      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    3e5c:	3280      	movi      	r2, 128
+    3e5e:	9335      	ld.w      	r1, (r3, 0x54)
+    3e60:	4243      	lsli      	r2, r2, 3
+    3e62:	6848      	and      	r1, r2
+    3e64:	3940      	cmpnei      	r1, 0
+    3e66:	0bf3      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    3e68:	3280      	movi      	r2, 128
+    3e6a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e6c:	4244      	lsli      	r2, r2, 4
+    3e6e:	6848      	and      	r1, r2
+    3e70:	3940      	cmpnei      	r1, 0
+    3e72:	0bed      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    3e74:	3280      	movi      	r2, 128
+    3e76:	9335      	ld.w      	r1, (r3, 0x54)
+    3e78:	4249      	lsli      	r2, r2, 9
+    3e7a:	6848      	and      	r1, r2
+    3e7c:	3940      	cmpnei      	r1, 0
+    3e7e:	0be7      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+    3e80:	07cf      	br      	0x3e1e	// 3e1e <GPT0IntHandler+0x16>
+    3e82:	0000      	bkpt
+    3e84:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00003e88 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    3e88:	1460      	nie
+    3e8a:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    3e8c:	1079      	lrw      	r3, 0x20000018	// 3ef0 <RTCIntHandler+0x68>
+    3e8e:	3101      	movi      	r1, 1
+    3e90:	9360      	ld.w      	r3, (r3, 0x0)
+    3e92:	934a      	ld.w      	r2, (r3, 0x28)
+    3e94:	6884      	and      	r2, r1
+    3e96:	3a40      	cmpnei      	r2, 0
+    3e98:	0c14      	bf      	0x3ec0	// 3ec0 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    3e9a:	1057      	lrw      	r2, 0xca53	// 3ef4 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    3e9c:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    3e9e:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    3ea0:	9342      	ld.w      	r2, (r3, 0x8)
+    3ea2:	6c84      	or      	r2, r1
+    3ea4:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    3ea6:	3280      	movi      	r2, 128
+    3ea8:	424d      	lsli      	r2, r2, 13
+    3eaa:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    3eac:	3102      	movi      	r1, 2
+    3eae:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb0:	6884      	and      	r2, r1
+    3eb2:	3a40      	cmpnei      	r2, 0
+    3eb4:	0bfd      	bt      	0x3eae	// 3eae <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    3eb6:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb8:	3a80      	bclri      	r2, 0
+    3eba:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    3ebc:	1463      	ipop
+    3ebe:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    3ec0:	934a      	ld.w      	r2, (r3, 0x28)
+    3ec2:	3102      	movi      	r1, 2
+    3ec4:	6884      	and      	r2, r1
+    3ec6:	3a40      	cmpnei      	r2, 0
+    3ec8:	0c03      	bf      	0x3ece	// 3ece <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    3eca:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    3ecc:	07f8      	br      	0x3ebc	// 3ebc <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    3ece:	934a      	ld.w      	r2, (r3, 0x28)
+    3ed0:	3104      	movi      	r1, 4
+    3ed2:	6884      	and      	r2, r1
+    3ed4:	3a40      	cmpnei      	r2, 0
+    3ed6:	0bfa      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    3ed8:	934a      	ld.w      	r2, (r3, 0x28)
+    3eda:	3108      	movi      	r1, 8
+    3edc:	6884      	and      	r2, r1
+    3ede:	3a40      	cmpnei      	r2, 0
+    3ee0:	0bf5      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    3ee2:	934a      	ld.w      	r2, (r3, 0x28)
+    3ee4:	3110      	movi      	r1, 16
+    3ee6:	6884      	and      	r2, r1
+    3ee8:	3a40      	cmpnei      	r2, 0
+    3eea:	0bf0      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+    3eec:	07e8      	br      	0x3ebc	// 3ebc <RTCIntHandler+0x34>
+    3eee:	0000      	bkpt
+    3ef0:	20000018 	.long	0x20000018
+    3ef4:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00003ef8 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    3ef8:	1460      	nie
+    3efa:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3efc:	106d      	lrw      	r3, 0x20000040	// 3f30 <UART0IntHandler+0x38>
+    3efe:	3102      	movi      	r1, 2
+    3f00:	9360      	ld.w      	r3, (r3, 0x0)
+    3f02:	9343      	ld.w      	r2, (r3, 0xc)
+    3f04:	6884      	and      	r2, r1
+    3f06:	3a40      	cmpnei      	r2, 0
+    3f08:	0c03      	bf      	0x3f0e	// 3f0e <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    3f0a:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f0c:	0410      	br      	0x3f2c	// 3f2c <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f0e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f10:	3101      	movi      	r1, 1
+    3f12:	6884      	and      	r2, r1
+    3f14:	3a40      	cmpnei      	r2, 0
+    3f16:	0bfa      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f18:	9343      	ld.w      	r2, (r3, 0xc)
+    3f1a:	3108      	movi      	r1, 8
+    3f1c:	6884      	and      	r2, r1
+    3f1e:	3a40      	cmpnei      	r2, 0
+    3f20:	0bf5      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f22:	9343      	ld.w      	r2, (r3, 0xc)
+    3f24:	3104      	movi      	r1, 4
+    3f26:	6884      	and      	r2, r1
+    3f28:	3a40      	cmpnei      	r2, 0
+    3f2a:	0bf0      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+}
+    3f2c:	1463      	ipop
+    3f2e:	1461      	nir
+    3f30:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00003f34 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    3f34:	1460      	nie
+    3f36:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f38:	106d      	lrw      	r3, 0x2000003c	// 3f6c <UART1IntHandler+0x38>
+    3f3a:	3102      	movi      	r1, 2
+    3f3c:	9360      	ld.w      	r3, (r3, 0x0)
+    3f3e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f40:	6884      	and      	r2, r1
+    3f42:	3a40      	cmpnei      	r2, 0
+    3f44:	0c03      	bf      	0x3f4a	// 3f4a <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    3f46:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f48:	0410      	br      	0x3f68	// 3f68 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f4a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f4c:	3101      	movi      	r1, 1
+    3f4e:	6884      	and      	r2, r1
+    3f50:	3a40      	cmpnei      	r2, 0
+    3f52:	0bfa      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f54:	9343      	ld.w      	r2, (r3, 0xc)
+    3f56:	3108      	movi      	r1, 8
+    3f58:	6884      	and      	r2, r1
+    3f5a:	3a40      	cmpnei      	r2, 0
+    3f5c:	0bf5      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f5e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f60:	3104      	movi      	r1, 4
+    3f62:	6884      	and      	r2, r1
+    3f64:	3a40      	cmpnei      	r2, 0
+    3f66:	0bf0      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+}
+    3f68:	1463      	ipop
+    3f6a:	1461      	nir
+    3f6c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00003f70 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    3f70:	1460      	nie
+    3f72:	1462      	ipush
+    3f74:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f76:	107f      	lrw      	r3, 0x20000038	// 3ff0 <UART2IntHandler+0x80>
+    3f78:	3102      	movi      	r1, 2
+    3f7a:	9360      	ld.w      	r3, (r3, 0x0)
+    3f7c:	9343      	ld.w      	r2, (r3, 0xc)
+    3f7e:	6884      	and      	r2, r1
+    3f80:	3a40      	cmpnei      	r2, 0
+    3f82:	0c0b      	bf      	0x3f98	// 3f98 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    3f84:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    3f86:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    3f88:	7400      	zextb      	r0, r0
+    3f8a:	e00002e9 	bsr      	0x455c	// 455c <UART2_RecvINT_Processing>
+		//GPIO_Write_Low(GPIOB0,3);
+		
+		//GPIO_Reverse(GPIOB0,3);
+	}
+	
+}
+    3f8e:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3f92:	1401      	addi      	r14, r14, 4
+    3f94:	1463      	ipop
+    3f96:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f98:	9323      	ld.w      	r1, (r3, 0xc)
+    3f9a:	3201      	movi      	r2, 1
+    3f9c:	6848      	and      	r1, r2
+    3f9e:	3940      	cmpnei      	r1, 0
+    3fa0:	0c0d      	bf      	0x3fba	// 3fba <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    3fa2:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    3fa4:	1074      	lrw      	r3, 0x200000b8	// 3ff4 <UART2IntHandler+0x84>
+    3fa6:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fa8:	1074      	lrw      	r3, 0x200000bc	// 3ff8 <UART2IntHandler+0x88>
+    3faa:	9360      	ld.w      	r3, (r3, 0x0)
+    3fac:	3b41      	cmpnei      	r3, 1
+    3fae:	0bf0      	bt      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    3fb0:	1053      	lrw      	r2, 0x200000c0	// 3ffc <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    3fb2:	9260      	ld.w      	r3, (r2, 0x0)
+    3fb4:	2300      	addi      	r3, 1
+    3fb6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    3fb8:	07eb      	br      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3fba:	9343      	ld.w      	r2, (r3, 0xc)
+    3fbc:	3108      	movi      	r1, 8
+    3fbe:	6884      	and      	r2, r1
+    3fc0:	3a40      	cmpnei      	r2, 0
+    3fc2:	0c03      	bf      	0x3fc8	// 3fc8 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    3fc4:	b323      	st.w      	r1, (r3, 0xc)
+    3fc6:	07e4      	br      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3fc8:	9343      	ld.w      	r2, (r3, 0xc)
+    3fca:	3104      	movi      	r1, 4
+    3fcc:	6884      	and      	r2, r1
+    3fce:	3a40      	cmpnei      	r2, 0
+    3fd0:	0bfa      	bt      	0x3fc4	// 3fc4 <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    3fd2:	3180      	movi      	r1, 128
+    3fd4:	9303      	ld.w      	r0, (r3, 0xc)
+    3fd6:	412c      	lsli      	r1, r1, 12
+    3fd8:	6804      	and      	r0, r1
+    3fda:	3840      	cmpnei      	r0, 0
+    3fdc:	0fd9      	bf      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    3fde:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    3fe0:	1065      	lrw      	r3, 0x200000b8	// 3ff4 <UART2IntHandler+0x84>
+    3fe2:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fe4:	1065      	lrw      	r3, 0x200000bc	// 3ff8 <UART2IntHandler+0x88>
+    3fe6:	9360      	ld.w      	r3, (r3, 0x0)
+    3fe8:	3b41      	cmpnei      	r3, 1
+    3fea:	0bd2      	bt      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    3fec:	1045      	lrw      	r2, 0x200000c4	// 4000 <UART2IntHandler+0x90>
+    3fee:	07e2      	br      	0x3fb2	// 3fb2 <UART2IntHandler+0x42>
+    3ff0:	20000038 	.long	0x20000038
+    3ff4:	200000b8 	.long	0x200000b8
+    3ff8:	200000bc 	.long	0x200000bc
+    3ffc:	200000c0 	.long	0x200000c0
+    4000:	200000c4 	.long	0x200000c4
+
+Disassembly of section .text.SPI0IntHandler:
+
+00004004 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    4004:	1460      	nie
+    4006:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    4008:	1178      	lrw      	r3, 0x20000034	// 40e8 <SPI0IntHandler+0xe4>
+    400a:	3101      	movi      	r1, 1
+    400c:	9360      	ld.w      	r3, (r3, 0x0)
+    400e:	9347      	ld.w      	r2, (r3, 0x1c)
+    4010:	6884      	and      	r2, r1
+    4012:	3a40      	cmpnei      	r2, 0
+    4014:	0c03      	bf      	0x401a	// 401a <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    4016:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    4018:	0407      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    401a:	9347      	ld.w      	r2, (r3, 0x1c)
+    401c:	3002      	movi      	r0, 2
+    401e:	6880      	and      	r2, r0
+    4020:	3a40      	cmpnei      	r2, 0
+    4022:	0c04      	bf      	0x402a	// 402a <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    4024:	b308      	st.w      	r0, (r3, 0x20)
+}
+    4026:	1463      	ipop
+    4028:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    402a:	9347      	ld.w      	r2, (r3, 0x1c)
+    402c:	3004      	movi      	r0, 4
+    402e:	6880      	and      	r2, r0
+    4030:	3a40      	cmpnei      	r2, 0
+    4032:	0c55      	bf      	0x40dc	// 40dc <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    4034:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    4036:	9302      	ld.w      	r0, (r3, 0x8)
+    4038:	32aa      	movi      	r2, 170
+    403a:	6482      	cmpne      	r0, r2
+    403c:	083e      	bt      	0x40b8	// 40b8 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    403e:	3102      	movi      	r1, 2
+    4040:	9343      	ld.w      	r2, (r3, 0xc)
+    4042:	6884      	and      	r2, r1
+    4044:	3a40      	cmpnei      	r2, 0
+    4046:	0ffd      	bf      	0x4040	// 4040 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    4048:	3211      	movi      	r2, 17
+    404a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    404c:	3110      	movi      	r1, 16
+    404e:	9343      	ld.w      	r2, (r3, 0xc)
+    4050:	6884      	and      	r2, r1
+    4052:	3a40      	cmpnei      	r2, 0
+    4054:	0bfd      	bt      	0x404e	// 404e <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4056:	3102      	movi      	r1, 2
+    4058:	9343      	ld.w      	r2, (r3, 0xc)
+    405a:	6884      	and      	r2, r1
+    405c:	3a40      	cmpnei      	r2, 0
+    405e:	0ffd      	bf      	0x4058	// 4058 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    4060:	3212      	movi      	r2, 18
+    4062:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4064:	3110      	movi      	r1, 16
+    4066:	9343      	ld.w      	r2, (r3, 0xc)
+    4068:	6884      	and      	r2, r1
+    406a:	3a40      	cmpnei      	r2, 0
+    406c:	0bfd      	bt      	0x4066	// 4066 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    406e:	3102      	movi      	r1, 2
+    4070:	9343      	ld.w      	r2, (r3, 0xc)
+    4072:	6884      	and      	r2, r1
+    4074:	3a40      	cmpnei      	r2, 0
+    4076:	0ffd      	bf      	0x4070	// 4070 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    4078:	3213      	movi      	r2, 19
+    407a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    407c:	3110      	movi      	r1, 16
+    407e:	9343      	ld.w      	r2, (r3, 0xc)
+    4080:	6884      	and      	r2, r1
+    4082:	3a40      	cmpnei      	r2, 0
+    4084:	0bfd      	bt      	0x407e	// 407e <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4086:	3102      	movi      	r1, 2
+    4088:	9343      	ld.w      	r2, (r3, 0xc)
+    408a:	6884      	and      	r2, r1
+    408c:	3a40      	cmpnei      	r2, 0
+    408e:	0ffd      	bf      	0x4088	// 4088 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    4090:	3214      	movi      	r2, 20
+    4092:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4094:	3110      	movi      	r1, 16
+    4096:	9343      	ld.w      	r2, (r3, 0xc)
+    4098:	6884      	and      	r2, r1
+    409a:	3a40      	cmpnei      	r2, 0
+    409c:	0bfd      	bt      	0x4096	// 4096 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    409e:	3102      	movi      	r1, 2
+    40a0:	9343      	ld.w      	r2, (r3, 0xc)
+    40a2:	6884      	and      	r2, r1
+    40a4:	3a40      	cmpnei      	r2, 0
+    40a6:	0ffd      	bf      	0x40a0	// 40a0 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    40a8:	3215      	movi      	r2, 21
+    40aa:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    40ac:	3110      	movi      	r1, 16
+    40ae:	9343      	ld.w      	r2, (r3, 0xc)
+    40b0:	6884      	and      	r2, r1
+    40b2:	3a40      	cmpnei      	r2, 0
+    40b4:	0bfd      	bt      	0x40ae	// 40ae <SPI0IntHandler+0xaa>
+    40b6:	07b8      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    40b8:	9343      	ld.w      	r2, (r3, 0xc)
+    40ba:	6884      	and      	r2, r1
+    40bc:	3a40      	cmpnei      	r2, 0
+    40be:	0bb4      	bt      	0x4026	// 4026 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    40c0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40c2:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    40c4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40c6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40c8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ca:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40cc:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ce:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40d2:	9343      	ld.w      	r2, (r3, 0xc)
+    40d4:	6884      	and      	r2, r1
+    40d6:	3a40      	cmpnei      	r2, 0
+    40d8:	0bfd      	bt      	0x40d2	// 40d2 <SPI0IntHandler+0xce>
+    40da:	07a6      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    40dc:	9347      	ld.w      	r2, (r3, 0x1c)
+    40de:	3108      	movi      	r1, 8
+    40e0:	6884      	and      	r2, r1
+    40e2:	3a40      	cmpnei      	r2, 0
+    40e4:	0b99      	bt      	0x4016	// 4016 <SPI0IntHandler+0x12>
+    40e6:	07a0      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+    40e8:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+000040ec <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    40ec:	1460      	nie
+    40ee:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    40f0:	1073      	lrw      	r3, 0x2000002c	// 413c <SIO0IntHandler+0x50>
+    40f2:	3104      	movi      	r1, 4
+    40f4:	9360      	ld.w      	r3, (r3, 0x0)
+    40f6:	9349      	ld.w      	r2, (r3, 0x24)
+    40f8:	6884      	and      	r2, r1
+    40fa:	3a40      	cmpnei      	r2, 0
+    40fc:	0c02      	bf      	0x4100	// 4100 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    40fe:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    4100:	9349      	ld.w      	r2, (r3, 0x24)
+    4102:	3101      	movi      	r1, 1
+    4104:	6884      	and      	r2, r1
+    4106:	3a40      	cmpnei      	r2, 0
+    4108:	0c02      	bf      	0x410c	// 410c <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    410a:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    410c:	9349      	ld.w      	r2, (r3, 0x24)
+    410e:	3102      	movi      	r1, 2
+    4110:	6884      	and      	r2, r1
+    4112:	3a40      	cmpnei      	r2, 0
+    4114:	0c03      	bf      	0x411a	// 411a <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    4116:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    4118:	0410      	br      	0x4138	// 4138 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    411a:	9349      	ld.w      	r2, (r3, 0x24)
+    411c:	3108      	movi      	r1, 8
+    411e:	6884      	and      	r2, r1
+    4120:	3a40      	cmpnei      	r2, 0
+    4122:	0bfa      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    4124:	9349      	ld.w      	r2, (r3, 0x24)
+    4126:	3110      	movi      	r1, 16
+    4128:	6884      	and      	r2, r1
+    412a:	3a40      	cmpnei      	r2, 0
+    412c:	0bf5      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    412e:	9349      	ld.w      	r2, (r3, 0x24)
+    4130:	3120      	movi      	r1, 32
+    4132:	6884      	and      	r2, r1
+    4134:	3a40      	cmpnei      	r2, 0
+    4136:	0bf0      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+}
+    4138:	1463      	ipop
+    413a:	1461      	nir
+    413c:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00004140 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    4140:	1460      	nie
+    4142:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    4144:	106a      	lrw      	r3, 0x2000005c	// 416c <EXI0IntHandler+0x2c>
+    4146:	3101      	movi      	r1, 1
+    4148:	9360      	ld.w      	r3, (r3, 0x0)
+    414a:	237f      	addi      	r3, 128
+    414c:	934c      	ld.w      	r2, (r3, 0x30)
+    414e:	6884      	and      	r2, r1
+    4150:	3a40      	cmpnei      	r2, 0
+    4152:	0c04      	bf      	0x415a	// 415a <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    4154:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    4156:	1463      	ipop
+    4158:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    415a:	3280      	movi      	r2, 128
+    415c:	932c      	ld.w      	r1, (r3, 0x30)
+    415e:	4249      	lsli      	r2, r2, 9
+    4160:	6848      	and      	r1, r2
+    4162:	3940      	cmpnei      	r1, 0
+    4164:	0ff9      	bf      	0x4156	// 4156 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    4166:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4168:	07f7      	br      	0x4156	// 4156 <EXI0IntHandler+0x16>
+    416a:	0000      	bkpt
+    416c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00004170 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    4170:	1460      	nie
+    4172:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    4174:	106a      	lrw      	r3, 0x2000005c	// 419c <EXI1IntHandler+0x2c>
+    4176:	3102      	movi      	r1, 2
+    4178:	9360      	ld.w      	r3, (r3, 0x0)
+    417a:	237f      	addi      	r3, 128
+    417c:	934c      	ld.w      	r2, (r3, 0x30)
+    417e:	6884      	and      	r2, r1
+    4180:	3a40      	cmpnei      	r2, 0
+    4182:	0c04      	bf      	0x418a	// 418a <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    4184:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    4186:	1463      	ipop
+    4188:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    418a:	3280      	movi      	r2, 128
+    418c:	932c      	ld.w      	r1, (r3, 0x30)
+    418e:	424a      	lsli      	r2, r2, 10
+    4190:	6848      	and      	r1, r2
+    4192:	3940      	cmpnei      	r1, 0
+    4194:	0ff9      	bf      	0x4186	// 4186 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    4196:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4198:	07f7      	br      	0x4186	// 4186 <EXI1IntHandler+0x16>
+    419a:	0000      	bkpt
+    419c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+000041a0 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    41a0:	1460      	nie
+    41a2:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    41a4:	1070      	lrw      	r3, 0x2000005c	// 41e4 <EXI2to3IntHandler+0x44>
+    41a6:	3104      	movi      	r1, 4
+    41a8:	9360      	ld.w      	r3, (r3, 0x0)
+    41aa:	237f      	addi      	r3, 128
+    41ac:	934c      	ld.w      	r2, (r3, 0x30)
+    41ae:	6884      	and      	r2, r1
+    41b0:	3a40      	cmpnei      	r2, 0
+    41b2:	0c04      	bf      	0x41ba	// 41ba <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    41b4:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    41b6:	1463      	ipop
+    41b8:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    41ba:	934c      	ld.w      	r2, (r3, 0x30)
+    41bc:	3108      	movi      	r1, 8
+    41be:	6884      	and      	r2, r1
+    41c0:	3a40      	cmpnei      	r2, 0
+    41c2:	0bf9      	bt      	0x41b4	// 41b4 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    41c4:	3280      	movi      	r2, 128
+    41c6:	932c      	ld.w      	r1, (r3, 0x30)
+    41c8:	424b      	lsli      	r2, r2, 11
+    41ca:	6848      	and      	r1, r2
+    41cc:	3940      	cmpnei      	r1, 0
+    41ce:	0c03      	bf      	0x41d4	// 41d4 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    41d0:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41d2:	07f2      	br      	0x41b6	// 41b6 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    41d4:	3280      	movi      	r2, 128
+    41d6:	932c      	ld.w      	r1, (r3, 0x30)
+    41d8:	424c      	lsli      	r2, r2, 12
+    41da:	6848      	and      	r1, r2
+    41dc:	3940      	cmpnei      	r1, 0
+    41de:	0bf9      	bt      	0x41d0	// 41d0 <EXI2to3IntHandler+0x30>
+    41e0:	07eb      	br      	0x41b6	// 41b6 <EXI2to3IntHandler+0x16>
+    41e2:	0000      	bkpt
+    41e4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+000041e8 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    41e8:	1460      	nie
+    41ea:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    41ec:	1075      	lrw      	r3, 0x2000005c	// 4240 <EXI4to9IntHandler+0x58>
+    41ee:	3280      	movi      	r2, 128
+    41f0:	9360      	ld.w      	r3, (r3, 0x0)
+    41f2:	60c8      	addu      	r3, r2
+    41f4:	932c      	ld.w      	r1, (r3, 0x30)
+    41f6:	3010      	movi      	r0, 16
+    41f8:	6840      	and      	r1, r0
+    41fa:	3940      	cmpnei      	r1, 0
+    41fc:	0c04      	bf      	0x4204	// 4204 <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    41fe:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    4200:	1463      	ipop
+    4202:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    4204:	932c      	ld.w      	r1, (r3, 0x30)
+    4206:	3020      	movi      	r0, 32
+    4208:	6840      	and      	r1, r0
+    420a:	3940      	cmpnei      	r1, 0
+    420c:	0bf9      	bt      	0x41fe	// 41fe <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    420e:	932c      	ld.w      	r1, (r3, 0x30)
+    4210:	3040      	movi      	r0, 64
+    4212:	6840      	and      	r1, r0
+    4214:	3940      	cmpnei      	r1, 0
+    4216:	0bf4      	bt      	0x41fe	// 41fe <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    4218:	932c      	ld.w      	r1, (r3, 0x30)
+    421a:	6848      	and      	r1, r2
+    421c:	3940      	cmpnei      	r1, 0
+    421e:	0c03      	bf      	0x4224	// 4224 <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    4220:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4222:	07ef      	br      	0x4200	// 4200 <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    4224:	3280      	movi      	r2, 128
+    4226:	932c      	ld.w      	r1, (r3, 0x30)
+    4228:	4241      	lsli      	r2, r2, 1
+    422a:	6848      	and      	r1, r2
+    422c:	3940      	cmpnei      	r1, 0
+    422e:	0bf9      	bt      	0x4220	// 4220 <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    4230:	3280      	movi      	r2, 128
+    4232:	932c      	ld.w      	r1, (r3, 0x30)
+    4234:	4242      	lsli      	r2, r2, 2
+    4236:	6848      	and      	r1, r2
+    4238:	3940      	cmpnei      	r1, 0
+    423a:	0bf3      	bt      	0x4220	// 4220 <EXI4to9IntHandler+0x38>
+    423c:	07e2      	br      	0x4200	// 4200 <EXI4to9IntHandler+0x18>
+    423e:	0000      	bkpt
+    4240:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00004244 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    4244:	1460      	nie
+    4246:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    4248:	1076      	lrw      	r3, 0x2000005c	// 42a0 <EXI10to15IntHandler+0x5c>
+    424a:	3280      	movi      	r2, 128
+    424c:	9360      	ld.w      	r3, (r3, 0x0)
+    424e:	237f      	addi      	r3, 128
+    4250:	932c      	ld.w      	r1, (r3, 0x30)
+    4252:	4243      	lsli      	r2, r2, 3
+    4254:	6848      	and      	r1, r2
+    4256:	3940      	cmpnei      	r1, 0
+    4258:	0c03      	bf      	0x425e	// 425e <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    425a:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    425c:	041f      	br      	0x429a	// 429a <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    425e:	3280      	movi      	r2, 128
+    4260:	932c      	ld.w      	r1, (r3, 0x30)
+    4262:	4244      	lsli      	r2, r2, 4
+    4264:	6848      	and      	r1, r2
+    4266:	3940      	cmpnei      	r1, 0
+    4268:	0bf9      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    426a:	3280      	movi      	r2, 128
+    426c:	932c      	ld.w      	r1, (r3, 0x30)
+    426e:	4245      	lsli      	r2, r2, 5
+    4270:	6848      	and      	r1, r2
+    4272:	3940      	cmpnei      	r1, 0
+    4274:	0bf3      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    4276:	3280      	movi      	r2, 128
+    4278:	932c      	ld.w      	r1, (r3, 0x30)
+    427a:	4246      	lsli      	r2, r2, 6
+    427c:	6848      	and      	r1, r2
+    427e:	3940      	cmpnei      	r1, 0
+    4280:	0bed      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    4282:	3280      	movi      	r2, 128
+    4284:	932c      	ld.w      	r1, (r3, 0x30)
+    4286:	4247      	lsli      	r2, r2, 7
+    4288:	6848      	and      	r1, r2
+    428a:	3940      	cmpnei      	r1, 0
+    428c:	0be7      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    428e:	3280      	movi      	r2, 128
+    4290:	932c      	ld.w      	r1, (r3, 0x30)
+    4292:	4248      	lsli      	r2, r2, 8
+    4294:	6848      	and      	r1, r2
+    4296:	3940      	cmpnei      	r1, 0
+    4298:	0be1      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+}
+    429a:	1463      	ipop
+    429c:	1461      	nir
+    429e:	0000      	bkpt
+    42a0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+000042a4 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    42a4:	1460      	nie
+    42a6:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    42a8:	106b      	lrw      	r3, 0x20000014	// 42d4 <LPTIntHandler+0x30>
+    42aa:	3101      	movi      	r1, 1
+    42ac:	9360      	ld.w      	r3, (r3, 0x0)
+    42ae:	934e      	ld.w      	r2, (r3, 0x38)
+    42b0:	6884      	and      	r2, r1
+    42b2:	3a40      	cmpnei      	r2, 0
+    42b4:	0c03      	bf      	0x42ba	// 42ba <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    42b6:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    42b8:	040b      	br      	0x42ce	// 42ce <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    42ba:	934e      	ld.w      	r2, (r3, 0x38)
+    42bc:	3102      	movi      	r1, 2
+    42be:	6884      	and      	r2, r1
+    42c0:	3a40      	cmpnei      	r2, 0
+    42c2:	0bfa      	bt      	0x42b6	// 42b6 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    42c4:	934e      	ld.w      	r2, (r3, 0x38)
+    42c6:	3104      	movi      	r1, 4
+    42c8:	6884      	and      	r2, r1
+    42ca:	3a40      	cmpnei      	r2, 0
+    42cc:	0bf5      	bt      	0x42b6	// 42b6 <LPTIntHandler+0x12>
+}
+    42ce:	1463      	ipop
+    42d0:	1461      	nir
+    42d2:	0000      	bkpt
+    42d4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+000042d8 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    42d8:	1460      	nie
+    42da:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    42dc:	1071      	lrw      	r3, 0x2000000c	// 4320 <BT0IntHandler+0x48>
+    42de:	3101      	movi      	r1, 1
+    42e0:	9360      	ld.w      	r3, (r3, 0x0)
+    42e2:	934c      	ld.w      	r2, (r3, 0x30)
+    42e4:	6884      	and      	r2, r1
+    42e6:	3a40      	cmpnei      	r2, 0
+    42e8:	0c0a      	bf      	0x42fc	// 42fc <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    42ea:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    42ec:	9341      	ld.w      	r2, (r3, 0x4)
+    42ee:	3a86      	bclri      	r2, 6
+    42f0:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    42f2:	9340      	ld.w      	r2, (r3, 0x0)
+    42f4:	3200      	movi      	r2, 0
+    42f6:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    42f8:	1463      	ipop
+    42fa:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    42fc:	934c      	ld.w      	r2, (r3, 0x30)
+    42fe:	3102      	movi      	r1, 2
+    4300:	6884      	and      	r2, r1
+    4302:	3a40      	cmpnei      	r2, 0
+    4304:	0c03      	bf      	0x430a	// 430a <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    4306:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    4308:	07f8      	br      	0x42f8	// 42f8 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    430a:	934c      	ld.w      	r2, (r3, 0x30)
+    430c:	3104      	movi      	r1, 4
+    430e:	6884      	and      	r2, r1
+    4310:	3a40      	cmpnei      	r2, 0
+    4312:	0bfa      	bt      	0x4306	// 4306 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    4314:	934c      	ld.w      	r2, (r3, 0x30)
+    4316:	3108      	movi      	r1, 8
+    4318:	6884      	and      	r2, r1
+    431a:	3a40      	cmpnei      	r2, 0
+    431c:	0bf5      	bt      	0x4306	// 4306 <BT0IntHandler+0x2e>
+    431e:	07ed      	br      	0x42f8	// 42f8 <BT0IntHandler+0x20>
+    4320:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00004324 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    4324:	1460      	nie
+    4326:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    4328:	1076      	lrw      	r3, 0x20000008	// 4380 <BT1IntHandler+0x5c>
+    432a:	3101      	movi      	r1, 1
+    432c:	9360      	ld.w      	r3, (r3, 0x0)
+    432e:	934c      	ld.w      	r2, (r3, 0x30)
+    4330:	6884      	and      	r2, r1
+    4332:	3a40      	cmpnei      	r2, 0
+    4334:	0c03      	bf      	0x433a	// 433a <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    4336:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    4338:	0416      	br      	0x4364	// 4364 <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    433a:	934c      	ld.w      	r2, (r3, 0x30)
+    433c:	3102      	movi      	r1, 2
+    433e:	6884      	and      	r2, r1
+    4340:	3a40      	cmpnei      	r2, 0
+    4342:	0c13      	bf      	0x4368	// 4368 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    4344:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    4346:	1070      	lrw      	r3, 0x200000ac	// 4384 <BT1IntHandler+0x60>
+    4348:	8340      	ld.b      	r2, (r3, 0x0)
+    434a:	2200      	addi      	r2, 1
+    434c:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    434e:	9321      	ld.w      	r1, (r3, 0x4)
+    4350:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    4352:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    4354:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    4356:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    4358:	0c06      	bf      	0x4364	// 4364 <BT1IntHandler+0x40>
+			NUM = 0;
+    435a:	3200      	movi      	r2, 0
+    435c:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    435e:	9342      	ld.w      	r2, (r3, 0x8)
+    4360:	2200      	addi      	r2, 1
+    4362:	b342      	st.w      	r2, (r3, 0x8)
+}
+    4364:	1463      	ipop
+    4366:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    4368:	934c      	ld.w      	r2, (r3, 0x30)
+    436a:	3104      	movi      	r1, 4
+    436c:	6884      	and      	r2, r1
+    436e:	3a40      	cmpnei      	r2, 0
+    4370:	0be3      	bt      	0x4336	// 4336 <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    4372:	934c      	ld.w      	r2, (r3, 0x30)
+    4374:	3108      	movi      	r1, 8
+    4376:	6884      	and      	r2, r1
+    4378:	3a40      	cmpnei      	r2, 0
+    437a:	0bde      	bt      	0x4336	// 4336 <BT1IntHandler+0x12>
+    437c:	07f4      	br      	0x4364	// 4364 <BT1IntHandler+0x40>
+    437e:	0000      	bkpt
+    4380:	20000008 	.long	0x20000008
+    4384:	200000ac 	.long	0x200000ac
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00004388 <PriviledgeVioHandler>:
+    4388:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+0000438a <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    438a:	1460      	nie
+    438c:	1462      	ipush
+    // ISR content ...
+
+}
+    438e:	1463      	ipop
+    4390:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+00004392 <Trap3Handler>:
+    4392:	1460      	nie
+    4394:	1462      	ipush
+    4396:	1463      	ipop
+    4398:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+0000439a <Trap2Handler>:
+    439a:	1460      	nie
+    439c:	1462      	ipush
+    439e:	1463      	ipop
+    43a0:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+000043a2 <Trap1Handler>:
+    43a2:	1460      	nie
+    43a4:	1462      	ipush
+    43a6:	1463      	ipop
+    43a8:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+000043aa <Trap0Handler>:
+    43aa:	1460      	nie
+    43ac:	1462      	ipush
+    43ae:	1463      	ipop
+    43b0:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+000043b2 <UnrecExecpHandler>:
+    43b2:	1460      	nie
+    43b4:	1462      	ipush
+    43b6:	1463      	ipop
+    43b8:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+000043ba <BreakPointHandler>:
+    43ba:	1460      	nie
+    43bc:	1462      	ipush
+    43be:	1463      	ipop
+    43c0:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+000043c2 <AccessErrHandler>:
+    43c2:	1460      	nie
+    43c4:	1462      	ipush
+    43c6:	1463      	ipop
+    43c8:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+000043ca <IllegalInstrHandler>:
+    43ca:	1460      	nie
+    43cc:	1462      	ipush
+    43ce:	1463      	ipop
+    43d0:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+000043d2 <MisalignedHandler>:
+    43d2:	1460      	nie
+    43d4:	1462      	ipush
+    43d6:	1463      	ipop
+    43d8:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+000043da <CNTAIntHandler>:
+    43da:	1460      	nie
+    43dc:	1462      	ipush
+    43de:	1463      	ipop
+    43e0:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+000043e2 <I2CIntHandler>:
+    43e2:	1460      	nie
+    43e4:	1462      	ipush
+    43e6:	1463      	ipop
+    43e8:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000043ec <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    43ec:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    43ee:	c0006023 	mfcr      	r3, cr<0, 0>
+    43f2:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    43f6:	1046      	lrw      	r2, 0x20000000	// 440c <__divsi3+0x20>
+    43f8:	3400      	movi      	r4, 0
+    43fa:	9240      	ld.w      	r2, (r2, 0x0)
+    43fc:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    43fe:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4400:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4402:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4404:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    4408:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    440a:	1481      	pop      	r4
+    440c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00004410 <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    4410:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4412:	c0006023 	mfcr      	r3, cr<0, 0>
+    4416:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    441a:	1046      	lrw      	r2, 0x20000000	// 4430 <__udivsi3+0x20>
+    441c:	3401      	movi      	r4, 1
+    441e:	9240      	ld.w      	r2, (r2, 0x0)
+    4420:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4422:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4424:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4426:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4428:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    442c:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    442e:	1481      	pop      	r4
+    4430:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__modsi3:
+
+00004434 <__modsi3>:
+
+int __modsi3 ( int a,  int b)
+{   
+    4434:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4436:	c0006023 	mfcr      	r3, cr<0, 0>
+    443a:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 0;
+    443e:	1046      	lrw      	r2, 0x20000000	// 4454 <__modsi3+0x20>
+    4440:	3400      	movi      	r4, 0
+    4442:	9240      	ld.w      	r2, (r2, 0x0)
+    4444:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4446:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4448:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    444a:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    444c:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4450:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    4452:	1481      	pop      	r4
+    4454:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+00004458 <__umodsi3>:
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    4458:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    445a:	c0006023 	mfcr      	r3, cr<0, 0>
+    445e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    4462:	1046      	lrw      	r2, 0x20000000	// 4478 <__umodsi3+0x20>
+    4464:	3401      	movi      	r4, 1
+    4466:	9240      	ld.w      	r2, (r2, 0x0)
+    4468:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    446a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    446c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    446e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4470:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4474:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    4476:	1481      	pop      	r4
+    4478:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+0000447c <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    447c:	c1807420 	psrset      	ee, ie
+}
+    4480:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00004484 <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4484:	14d1      	push      	r4, r15
+	switch(uart_id){
+    4486:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4488:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    448a:	0c1a      	bf      	0x44be	// 44be <UARTx_Init+0x3a>
+    448c:	3840      	cmpnei      	r0, 0
+    448e:	0c04      	bf      	0x4496	// 4496 <UARTx_Init+0x12>
+    4490:	3842      	cmpnei      	r0, 2
+    4492:	0c2a      	bf      	0x44e6	// 44e6 <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    4494:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    4496:	e3fff8dd 	bsr      	0x3650	// 3650 <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    449a:	118a      	lrw      	r4, 0x20000040	// 4540 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    449c:	3100      	movi      	r1, 0
+    449e:	3000      	movi      	r0, 0
+    44a0:	e3fff918 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44a4:	9400      	ld.w      	r0, (r4, 0x0)
+    44a6:	3200      	movi      	r2, 0
+    44a8:	1127      	lrw      	r1, 0x2710	// 4544 <UARTx_Init+0xc0>
+    44aa:	e3fff989 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    44ae:	9400      	ld.w      	r0, (r4, 0x0)
+    44b0:	3200      	movi      	r2, 0
+    44b2:	1125      	lrw      	r1, 0x2710	// 4544 <UARTx_Init+0xc0>
+    44b4:	e3fff98c 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    44b8:	e3fff8f0 	bsr      	0x3698	// 3698 <UART0_Int_Enable>
+			break;
+    44bc:	07ec      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    44be:	e3fff8d5 	bsr      	0x3668	// 3668 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44c2:	3102      	movi      	r1, 2
+    44c4:	3001      	movi      	r0, 1
+    44c6:	e3fff905 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    44ca:	1180      	lrw      	r4, 0x2000003c	// 4548 <UARTx_Init+0xc4>
+    44cc:	31d0      	movi      	r1, 208
+    44ce:	9400      	ld.w      	r0, (r4, 0x0)
+    44d0:	3200      	movi      	r2, 0
+    44d2:	4121      	lsli      	r1, r1, 1
+    44d4:	e3fff974 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44d8:	31d0      	movi      	r1, 208
+    44da:	9400      	ld.w      	r0, (r4, 0x0)
+    44dc:	3200      	movi      	r2, 0
+    44de:	4121      	lsli      	r1, r1, 1
+    44e0:	e3fff976 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			break;
+    44e4:	07d8      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    44e6:	e3fff8cd 	bsr      	0x3680	// 3680 <UART2_DeInit>
+			UART_IO_Init(IO_UART2,0);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44ea:	3100      	movi      	r1, 0
+    44ec:	3002      	movi      	r0, 2
+    44ee:	e3fff8f1 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44f2:	1077      	lrw      	r3, 0x20000038	// 454c <UARTx_Init+0xc8>
+    44f4:	31d0      	movi      	r1, 208
+    44f6:	9300      	ld.w      	r0, (r3, 0x0)
+    44f8:	3200      	movi      	r2, 0
+    44fa:	4121      	lsli      	r1, r1, 1
+    44fc:	e3fff968 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    4500:	e3fff8da 	bsr      	0x36b4	// 36b4 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    4504:	3273      	movi      	r2, 115
+    4506:	3100      	movi      	r1, 0
+    4508:	1012      	lrw      	r0, 0x200003a8	// 4550 <UARTx_Init+0xcc>
+    450a:	e3ffea89 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    450e:	1072      	lrw      	r3, 0x2000040f	// 4554 <UARTx_Init+0xd0>
+    4510:	3203      	movi      	r2, 3
+    4512:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    4514:	4c48      	lsri      	r2, r4, 8
+    4516:	a388      	st.b      	r4, (r3, 0x8)
+    4518:	a349      	st.b      	r2, (r3, 0x9)
+    451a:	4c50      	lsri      	r2, r4, 16
+    451c:	4c98      	lsri      	r4, r4, 24
+    451e:	a38b      	st.b      	r4, (r3, 0xb)
+    4520:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    4522:	3103      	movi      	r1, 3
+    4524:	108d      	lrw      	r4, 0x20000048	// 4558 <UARTx_Init+0xd4>
+    4526:	3200      	movi      	r2, 0
+    4528:	9400      	ld.w      	r0, (r4, 0x0)
+    452a:	e3fff691 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    452e:	9400      	ld.w      	r0, (r4, 0x0)
+    4530:	3103      	movi      	r1, 3
+    4532:	e3fff707 	bsr      	0x3340	// 3340 <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    4536:	9400      	ld.w      	r0, (r4, 0x0)
+    4538:	3103      	movi      	r1, 3
+    453a:	e3fff70e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    453e:	07ab      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+    4540:	20000040 	.long	0x20000040
+    4544:	00002710 	.long	0x00002710
+    4548:	2000003c 	.long	0x2000003c
+    454c:	20000038 	.long	0x20000038
+    4550:	200003a8 	.long	0x200003a8
+    4554:	2000040f 	.long	0x2000040f
+    4558:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+0000455c <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    455c:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    455e:	1075      	lrw      	r3, 0x20000408	// 45b0 <UART2_RecvINT_Processing+0x54>
+    4560:	8346      	ld.b      	r2, (r3, 0x6)
+    4562:	8325      	ld.b      	r1, (r3, 0x5)
+    4564:	4248      	lsli      	r2, r2, 8
+    4566:	6c84      	or      	r2, r1
+    4568:	3162      	movi      	r1, 98
+    456a:	10b3      	lrw      	r5, 0x200003a8	// 45b4 <UART2_RecvINT_Processing+0x58>
+    456c:	3440      	movi      	r4, 64
+    456e:	6485      	cmplt      	r1, r2
+    4570:	6114      	addu      	r4, r5
+    4572:	0c06      	bf      	0x457e	// 457e <UART2_RecvINT_Processing+0x22>
+    4574:	3225      	movi      	r2, 37
+    4576:	6090      	addu      	r2, r4
+    4578:	3100      	movi      	r1, 0
+    457a:	a220      	st.b      	r1, (r2, 0x0)
+    457c:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    457e:	8346      	ld.b      	r2, (r3, 0x6)
+    4580:	8325      	ld.b      	r1, (r3, 0x5)
+    4582:	4248      	lsli      	r2, r2, 8
+    4584:	6c84      	or      	r2, r1
+    4586:	5a22      	addi      	r1, r2, 1
+    4588:	6094      	addu      	r2, r5
+    458a:	a200      	st.b      	r0, (r2, 0x0)
+    458c:	2424      	addi      	r4, 37
+    458e:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4590:	104a      	lrw      	r2, 0x200000b4	// 45b8 <UART2_RecvINT_Processing+0x5c>
+    4592:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    4594:	a420      	st.b      	r1, (r4, 0x0)
+    4596:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4598:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    459a:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    459c:	1028      	lrw      	r1, 0x20000413	// 45bc <UART2_RecvINT_Processing+0x60>
+    459e:	a140      	st.b      	r2, (r1, 0x0)
+    45a0:	a101      	st.b      	r0, (r1, 0x1)
+    45a2:	4a10      	lsri      	r0, r2, 16
+    45a4:	4a58      	lsri      	r2, r2, 24
+    45a6:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    45a8:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45aa:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    45ac:	a344      	st.b      	r2, (r3, 0x4)
+}
+    45ae:	1482      	pop      	r4-r5
+    45b0:	20000408 	.long	0x20000408
+    45b4:	200003a8 	.long	0x200003a8
+    45b8:	200000b4 	.long	0x200000b4
+    45bc:	20000413 	.long	0x20000413
+
+Disassembly of section .text.Dbg_Println:
+
+000045c0 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    45c0:	1423      	subi      	r14, r14, 12
+    45c2:	b862      	st.w      	r3, (r14, 0x8)
+    45c4:	b841      	st.w      	r2, (r14, 0x4)
+    45c6:	b820      	st.w      	r1, (r14, 0x0)
+    45c8:	14d2      	push      	r4-r5, r15
+    45ca:	1422      	subi      	r14, r14, 8
+    45cc:	9865      	ld.w      	r3, (r14, 0x14)
+    45ce:	b861      	st.w      	r3, (r14, 0x4)
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+    45d0:	3301      	movi      	r3, 1
+    45d2:	105c      	lrw      	r2, 0x20000068	// 4640 <Dbg_Println+0x80>
+    45d4:	70c0      	lsl      	r3, r0
+    45d6:	9240      	ld.w      	r2, (r2, 0x0)
+    45d8:	68c8      	and      	r3, r2
+    45da:	3b40      	cmpnei      	r3, 0
+    45dc:	0c2b      	bf      	0x4632	// 4632 <Dbg_Println+0x72>
+        SysTick_Now = SysTick_1ms;
+    45de:	109a      	lrw      	r4, 0x200000b8	// 4644 <Dbg_Println+0x84>
+    45e0:	107a      	lrw      	r3, 0x200000b4	// 4648 <Dbg_Println+0x88>
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45e2:	9445      	ld.w      	r2, (r4, 0x14)
+        SysTick_Now = SysTick_1ms;
+    45e4:	9360      	ld.w      	r3, (r3, 0x0)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45e6:	5b49      	subu      	r2, r3, r2
+        SysTick_Now = SysTick_1ms;
+    45e8:	b464      	st.w      	r3, (r4, 0x10)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ea:	b446      	st.w      	r2, (r4, 0x18)
+        SysTick_Last = SysTick_Now;
+    45ec:	b465      	st.w      	r3, (r4, 0x14)
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+    45ee:	3180      	movi      	r1, 128
+    45f0:	301c      	movi      	r0, 28
+    45f2:	b840      	st.w      	r2, (r14, 0x0)
+    45f4:	4122      	lsli      	r1, r1, 2
+    45f6:	1056      	lrw      	r2, 0x5f53	// 464c <Dbg_Println+0x8c>
+    45f8:	6010      	addu      	r0, r4
+    45fa:	e3ffe9b5 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    45fe:	10b5      	lrw      	r5, 0x2000003c	// 4650 <Dbg_Println+0x90>
+    4600:	311c      	movi      	r1, 28
+    4602:	7481      	zexth      	r2, r0
+    4604:	6050      	addu      	r1, r4
+    4606:	9500      	ld.w      	r0, (r5, 0x0)
+    4608:	e3fff8ea 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+    460c:	3180      	movi      	r1, 128
+    460e:	301c      	movi      	r0, 28
+    4610:	1b06      	addi      	r3, r14, 24
+    4612:	9841      	ld.w      	r2, (r14, 0x4)
+    4614:	4122      	lsli      	r1, r1, 2
+    4616:	6010      	addu      	r0, r4
+    4618:	e3ffe9d5 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+    461c:	6c53      	mov      	r1, r4
+    461e:	7481      	zexth      	r2, r0
+    4620:	211b      	addi      	r1, 28
+    4622:	9500      	ld.w      	r0, (r5, 0x0)
+    4624:	e3fff8dc 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		DBG_Printf("\r\n",2);
+    4628:	9500      	ld.w      	r0, (r5, 0x0)
+    462a:	3202      	movi      	r2, 2
+    462c:	102a      	lrw      	r1, 0x5f61	// 4654 <Dbg_Println+0x94>
+    462e:	e3fff8d7 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		
+    }
+
+#endif	
+}
+    4632:	1402      	addi      	r14, r14, 8
+    4634:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    4638:	98a1      	ld.w      	r5, (r14, 0x4)
+    463a:	9880      	ld.w      	r4, (r14, 0x0)
+    463c:	1406      	addi      	r14, r14, 24
+    463e:	783c      	jmp      	r15
+    4640:	20000068 	.long	0x20000068
+    4644:	200000b8 	.long	0x200000b8
+    4648:	200000b4 	.long	0x200000b4
+    464c:	00005f53 	.long	0x00005f53
+    4650:	2000003c 	.long	0x2000003c
+    4654:	00005f61 	.long	0x00005f61
+
+Disassembly of section .text.RC522_Delay:
+
+00004658 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    4658:	3300      	movi      	r3, 0
+    465a:	640e      	cmpne      	r3, r0
+    465c:	0802      	bt      	0x4660	// 4660 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    465e:	783c      	jmp      	r15
+        nop;
+    4660:	6c03      	mov      	r0, r0
+        nop;
+    4662:	6c03      	mov      	r0, r0
+        nop;
+    4664:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    4666:	2300      	addi      	r3, 1
+    4668:	07f9      	br      	0x465a	// 465a <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+0000466c <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    466c:	14d4      	push      	r4-r7, r15
+    466e:	6d83      	mov      	r6, r0
+    4670:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    4672:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    4674:	10f2      	lrw      	r7, 0x2000004c	// 46bc <RC522_ReadWriteOneByte+0x50>
+    4676:	3109      	movi      	r1, 9
+    4678:	9700      	ld.w      	r0, (r7, 0x0)
+    467a:	e3fff66e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    467e:	74da      	sextb      	r3, r6
+    4680:	3bdf      	btsti      	r3, 31
+    4682:	310a      	movi      	r1, 10
+    4684:	9700      	ld.w      	r0, (r7, 0x0)
+    4686:	0c18      	bf      	0x46b6	// 46b6 <RC522_ReadWriteOneByte+0x4a>
+    4688:	e3fff663 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    468c:	3109      	movi      	r1, 9
+    468e:	9700      	ld.w      	r0, (r7, 0x0)
+    4690:	e3fff65f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    4694:	310b      	movi      	r1, 11
+    4696:	9700      	ld.w      	r0, (r7, 0x0)
+    4698:	e3fff66e 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+        tx_data<<=1;
+    469c:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    469e:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a0:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    46a2:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    46a4:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a6:	0c02      	bf      	0x46aa	// 46aa <RC522_ReadWriteOneByte+0x3e>
+    46a8:	3ca0      	bseti      	r4, 0
+    46aa:	2d00      	subi      	r5, 1
+    46ac:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    46ae:	3d40      	cmpnei      	r5, 0
+    46b0:	0be3      	bt      	0x4676	// 4676 <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    46b2:	6c13      	mov      	r0, r4
+    46b4:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    46b6:	e3fff650 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    46ba:	07e9      	br      	0x468c	// 468c <RC522_ReadWriteOneByte+0x20>
+    46bc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+000046c0 <RC522_ReadRawRC>:
+{
+    46c0:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    46c2:	10ad      	lrw      	r5, 0x20000048	// 46f4 <RC522_ReadRawRC+0x34>
+    46c4:	3105      	movi      	r1, 5
+{
+    46c6:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    46c8:	9500      	ld.w      	r0, (r5, 0x0)
+    46ca:	e3fff646 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    46ce:	4401      	lsli      	r0, r4, 1
+    46d0:	347e      	movi      	r4, 126
+    46d2:	6810      	and      	r0, r4
+    46d4:	3400      	movi      	r4, 0
+    46d6:	2c7f      	subi      	r4, 128
+    46d8:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    46da:	7400      	zextb      	r0, r0
+    46dc:	e3ffffc8 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    46e0:	3000      	movi      	r0, 0
+    46e2:	e3ffffc5 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    46e6:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    46e8:	3105      	movi      	r1, 5
+    46ea:	9500      	ld.w      	r0, (r5, 0x0)
+    46ec:	e3fff631 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    46f0:	6c13      	mov      	r0, r4
+    46f2:	1492      	pop      	r4-r5, r15
+    46f4:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+000046f8 <RC522_WriteRawRC>:
+{
+    46f8:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    46fa:	10ab      	lrw      	r5, 0x20000048	// 4724 <RC522_WriteRawRC+0x2c>
+{
+    46fc:	6d87      	mov      	r6, r1
+    46fe:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    4700:	3105      	movi      	r1, 5
+    4702:	9500      	ld.w      	r0, (r5, 0x0)
+    4704:	e3fff629 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    4708:	4481      	lsli      	r4, r4, 1
+    470a:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    470c:	6810      	and      	r0, r4
+    470e:	e3ffffaf 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    4712:	6c1b      	mov      	r0, r6
+    4714:	e3ffffac 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    4718:	9500      	ld.w      	r0, (r5, 0x0)
+    471a:	3105      	movi      	r1, 5
+    471c:	e3fff619 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4720:	1493      	pop      	r4-r6, r15
+    4722:	0000      	bkpt
+    4724:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_PcdReset:
+
+00004728 <RC522_PcdReset>:
+{
+    4728:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    472a:	310f      	movi      	r1, 15
+    472c:	3001      	movi      	r0, 1
+    472e:	e3ffffe5 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    4732:	310f      	movi      	r1, 15
+    4734:	3001      	movi      	r0, 1
+    4736:	e3ffffe1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    473a:	300a      	movi      	r0, 10
+    473c:	e3ffff8e 	bsr      	0x4658	// 4658 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    4740:	313d      	movi      	r1, 61
+    4742:	3011      	movi      	r0, 17
+    4744:	e3ffffda 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    4748:	311e      	movi      	r1, 30
+    474a:	302d      	movi      	r0, 45
+    474c:	e3ffffd6 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    4750:	3100      	movi      	r1, 0
+    4752:	302c      	movi      	r0, 44
+    4754:	e3ffffd2 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    4758:	318d      	movi      	r1, 141
+    475a:	302a      	movi      	r0, 42
+    475c:	e3ffffce 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    4760:	313e      	movi      	r1, 62
+    4762:	302b      	movi      	r0, 43
+    4764:	e3ffffca 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    4768:	3140      	movi      	r1, 64
+    476a:	3015      	movi      	r0, 21
+    476c:	e3ffffc6 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    4770:	3000      	movi      	r0, 0
+    4772:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+00004774 <RC522_SetBitMask>:
+{
+    4774:	14d2      	push      	r4-r5, r15
+    4776:	6d47      	mov      	r5, r1
+    4778:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    477a:	e3ffffa3 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    477e:	6c43      	mov      	r1, r0
+    4780:	6c54      	or      	r1, r5
+    4782:	7444      	zextb      	r1, r1
+    4784:	6c13      	mov      	r0, r4
+    4786:	e3ffffb9 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    478a:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+0000478c <RC522_PcdAntennaOn>:
+{
+    478c:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    478e:	3014      	movi      	r0, 20
+    4790:	e3ffff98 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    4794:	3303      	movi      	r3, 3
+    4796:	680c      	and      	r0, r3
+    4798:	3840      	cmpnei      	r0, 0
+    479a:	0805      	bt      	0x47a4	// 47a4 <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    479c:	3103      	movi      	r1, 3
+    479e:	3014      	movi      	r0, 20
+    47a0:	e3ffffea 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+}
+    47a4:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000047a6 <RC522_ClearBitMask>:
+{
+    47a6:	14d2      	push      	r4-r5, r15
+    47a8:	6d47      	mov      	r5, r1
+    47aa:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    47ac:	e3ffff8a 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    47b0:	6815      	andn      	r0, r5
+    47b2:	7440      	zextb      	r1, r0
+    47b4:	6c13      	mov      	r0, r4
+    47b6:	e3ffffa1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    47ba:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+000047bc <RC522_PcdAntennaOff>:
+{
+    47bc:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    47be:	3103      	movi      	r1, 3
+    47c0:	3014      	movi      	r0, 20
+    47c2:	e3fffff2 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+}
+    47c6:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_CalulateCRC:
+
+000047c8 <RC522_CalulateCRC>:
+{
+    47c8:	14d3      	push      	r4-r6, r15
+    47ca:	6d03      	mov      	r4, r0
+    47cc:	6d87      	mov      	r6, r1
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    47ce:	3005      	movi      	r0, 5
+    47d0:	3104      	movi      	r1, 4
+{
+    47d2:	6d4b      	mov      	r5, r2
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    47d4:	e3ffffe9 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    47d8:	3100      	movi      	r1, 0
+    47da:	3001      	movi      	r0, 1
+    47dc:	e3ffff8e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80); //清FIFO指针
+    47e0:	3180      	movi      	r1, 128
+    47e2:	300a      	movi      	r0, 10
+    47e4:	e3ffffc8 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    47e8:	6190      	addu      	r6, r4
+    for(i=0;i<len;i++)
+    47ea:	6592      	cmpne      	r4, r6
+    47ec:	081b      	bt      	0x4822	// 4822 <RC522_CalulateCRC+0x5a>
+        RC522_WriteRawRC(CommandReg,PCD_CALCCRC);   //等待CRC计算完成
+    47ee:	3103      	movi      	r1, 3
+    47f0:	3001      	movi      	r0, 1
+    47f2:	e3ffff83 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    47f6:	34ff      	movi      	r4, 255
+    47f8:	2c00      	subi      	r4, 1
+        n=RC522_ReadRawRC(DivIrqReg);
+    47fa:	3005      	movi      	r0, 5
+    47fc:	7510      	zextb      	r4, r4
+    47fe:	e3ffff61 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    while((i!=0)&&!(n&0x04));//CRCIrq = 1
+    4802:	3c40      	cmpnei      	r4, 0
+    4804:	0c06      	bf      	0x4810	// 4810 <RC522_CalulateCRC+0x48>
+    4806:	3304      	movi      	r3, 4
+    4808:	680c      	and      	r0, r3
+    480a:	7400      	zextb      	r0, r0
+    480c:	3840      	cmpnei      	r0, 0
+    480e:	0ff5      	bf      	0x47f8	// 47f8 <RC522_CalulateCRC+0x30>
+    pOut[0]=RC522_ReadRawRC(CRCResultRegL);
+    4810:	3022      	movi      	r0, 34
+    4812:	e3ffff57 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4816:	a500      	st.b      	r0, (r5, 0x0)
+    pOut[1]=RC522_ReadRawRC(CRCResultRegM);
+    4818:	3021      	movi      	r0, 33
+    481a:	e3ffff53 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    481e:	a501      	st.b      	r0, (r5, 0x1)
+}
+    4820:	1493      	pop      	r4-r6, r15
+            RC522_WriteRawRC(FIFODataReg,*(pIn +i));  //开始RCR计算
+    4822:	8420      	ld.b      	r1, (r4, 0x0)
+    4824:	3009      	movi      	r0, 9
+    4826:	e3ffff69 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    482a:	2400      	addi      	r4, 1
+    482c:	07df      	br      	0x47ea	// 47ea <RC522_CalulateCRC+0x22>
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+0000482e <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    482e:	14d0      	push      	r15
+        RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    4830:	3108      	movi      	r1, 8
+    4832:	3008      	movi      	r0, 8
+    4834:	e3ffffb9 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+        RC522_WriteRawRC(ModeReg,0x3D);          //3F//CRC初始值0x6363
+    4838:	313d      	movi      	r1, 61
+    483a:	3011      	movi      	r0, 17
+    483c:	e3ffff5e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RxSelReg,0x86);         //84
+    4840:	3186      	movi      	r1, 134
+    4842:	3017      	movi      	r0, 23
+    4844:	e3ffff5a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RFCfgReg,0x7F);         //4F  //调整卡的感应距离//RxGain = 48dB调节卡感应距离
+    4848:	317f      	movi      	r1, 127
+    484a:	3026      	movi      	r0, 38
+    484c:	e3ffff56 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegL,30);        //tmoLength);// TReloadVal = 'h6a =tmoLength(dec)
+    4850:	311e      	movi      	r1, 30
+    4852:	302d      	movi      	r0, 45
+    4854:	e3ffff52 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegH,0);
+    4858:	3100      	movi      	r1, 0
+    485a:	302c      	movi      	r0, 44
+    485c:	e3ffff4e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TModeReg,0x8D);
+    4860:	318d      	movi      	r1, 141
+    4862:	302a      	movi      	r0, 42
+    4864:	e3ffff4a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TPrescalerReg,0x3E);
+    4868:	313e      	movi      	r1, 62
+    486a:	302b      	movi      	r0, 43
+    486c:	e3ffff46 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_Delay(1000);
+    4870:	30fa      	movi      	r0, 250
+    4872:	4002      	lsli      	r0, r0, 2
+    4874:	e3fffef2 	bsr      	0x4658	// 4658 <RC522_Delay>
+        RC522_PcdAntennaOn();      //开启天线
+    4878:	e3ffff8a 	bsr      	0x478c	// 478c <RC522_PcdAntennaOn>
+}
+    487c:	3000      	movi      	r0, 0
+    487e:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+00004880 <RC522_Init>:
+{
+    4880:	14d1      	push      	r4, r15
+	nop;
+    4882:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    4884:	1184      	lrw      	r4, 0x2000004c	// 4914 <RC522_Init+0x94>
+    4886:	3200      	movi      	r2, 0
+    4888:	9400      	ld.w      	r0, (r4, 0x0)
+    488a:	3109      	movi      	r1, 9
+    488c:	e3fff4e0 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    4890:	3200      	movi      	r2, 0
+    4892:	9400      	ld.w      	r0, (r4, 0x0)
+    4894:	310a      	movi      	r1, 10
+    4896:	e3fff4db 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    489a:	9400      	ld.w      	r0, (r4, 0x0)
+    489c:	310b      	movi      	r1, 11
+    489e:	e3fff547 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    48a2:	9400      	ld.w      	r0, (r4, 0x0)
+    48a4:	3201      	movi      	r2, 1
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    48a6:	109d      	lrw      	r4, 0x20000048	// 4918 <RC522_Init+0x98>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    48a8:	310b      	movi      	r1, 11
+    48aa:	e3fff4d1 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    48ae:	9400      	ld.w      	r0, (r4, 0x0)
+    48b0:	3200      	movi      	r2, 0
+    48b2:	3105      	movi      	r1, 5
+    48b4:	e3fff4cc 	bsr      	0x324c	// 324c <GPIO_Init>
+    GPIO_Init(GPIOB0,4,Output);			//RST
+    48b8:	9400      	ld.w      	r0, (r4, 0x0)
+    48ba:	3200      	movi      	r2, 0
+    48bc:	3104      	movi      	r1, 4
+    48be:	e3fff4c7 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOB0,3,Intput);			//IRQ
+    48c2:	3201      	movi      	r2, 1
+    48c4:	9400      	ld.w      	r0, (r4, 0x0)
+    48c6:	3103      	movi      	r1, 3
+    48c8:	e3fff4c2 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_High(GPIOB0,5);
+    48cc:	9400      	ld.w      	r0, (r4, 0x0)
+    48ce:	3105      	movi      	r1, 5
+    48d0:	e3fff53f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    GPIO_Write_High(GPIOB0,4);
+    48d4:	3104      	movi      	r1, 4
+    48d6:	9400      	ld.w      	r0, (r4, 0x0)
+    48d8:	e3fff53b 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    48dc:	e3ffff26 	bsr      	0x4728	// 4728 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    48e0:	e3ffff6e 	bsr      	0x47bc	// 47bc <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    48e4:	3002      	movi      	r0, 2
+    48e6:	e3fffeb9 	bsr      	0x4658	// 4658 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    48ea:	e3ffff51 	bsr      	0x478c	// 478c <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    48ee:	108c      	lrw      	r4, 0x2000041b	// 491c <RC522_Init+0x9c>
+    48f0:	e3ffff9f 	bsr      	0x482e	// 482e <M500PcdConfigISOType.part.1>
+    48f4:	3228      	movi      	r2, 40
+    48f6:	3100      	movi      	r1, 0
+    48f8:	6c13      	mov      	r0, r4
+    48fa:	e3ffe891 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    48fe:	3318      	movi      	r3, 24
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    4900:	6c13      	mov      	r0, r4
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    4902:	a468      	st.b      	r3, (r4, 0x8)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    4904:	3206      	movi      	r2, 6
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    4906:	3360      	movi      	r3, 96
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    4908:	31ff      	movi      	r1, 255
+    490a:	201f      	addi      	r0, 32
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    490c:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    490e:	e3ffe887 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+}
+    4912:	1491      	pop      	r4, r15
+    4914:	2000004c 	.long	0x2000004c
+    4918:	20000048 	.long	0x20000048
+    491c:	2000041b 	.long	0x2000041b
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+00004920 <RC522_PcdComMF522>:
+{
+    4920:	14d4      	push      	r4-r7, r15
+    4922:	1424      	subi      	r14, r14, 16
+    4924:	b861      	st.w      	r3, (r14, 0x4)
+    switch (Command) {
+    4926:	384c      	cmpnei      	r0, 12
+{
+    4928:	9869      	ld.w      	r3, (r14, 0x24)
+    492a:	6d43      	mov      	r5, r0
+    492c:	6dc7      	mov      	r7, r1
+    492e:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    4930:	0c4c      	bf      	0x49c8	// 49c8 <RC522_PcdComMF522+0xa8>
+    4932:	384e      	cmpnei      	r0, 14
+    4934:	0c4d      	bf      	0x49ce	// 49ce <RC522_PcdComMF522+0xae>
+    U8_T waitFor=0x00;
+    4936:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    4938:	3400      	movi      	r4, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    493a:	6c53      	mov      	r1, r4
+    493c:	39a7      	bseti      	r1, 7
+    493e:	3002      	movi      	r0, 2
+    4940:	b842      	st.w      	r2, (r14, 0x8)
+    4942:	e3fffedb 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    4946:	3180      	movi      	r1, 128
+    4948:	3004      	movi      	r0, 4
+    494a:	e3ffff2e 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    494e:	3100      	movi      	r1, 0
+    4950:	3001      	movi      	r0, 1
+    4952:	e3fffed3 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    4956:	3180      	movi      	r1, 128
+    4958:	300a      	movi      	r0, 10
+    495a:	e3ffff0d 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    495e:	9842      	ld.w      	r2, (r14, 0x8)
+    4960:	6cdf      	mov      	r3, r7
+    4962:	7489      	zexth      	r2, r2
+    4964:	3700      	movi      	r7, 0
+    4966:	649c      	cmphs      	r7, r2
+    4968:	0c36      	bf      	0x49d4	// 49d4 <RC522_PcdComMF522+0xb4>
+	RC522_WriteRawRC(CommandReg,Command);
+    496a:	6c57      	mov      	r1, r5
+    496c:	3001      	movi      	r0, 1
+    496e:	e3fffec5 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    4972:	3d4c      	cmpnei      	r5, 12
+    4974:	0805      	bt      	0x497e	// 497e <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    4976:	3180      	movi      	r1, 128
+    4978:	300d      	movi      	r0, 13
+    497a:	e3fffefd 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    497e:	33fa      	movi      	r3, 250
+    4980:	4363      	lsli      	r3, r3, 3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4982:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4984:	3004      	movi      	r0, 4
+    4986:	b862      	st.w      	r3, (r14, 0x8)
+    4988:	e3fffe9c 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+		i--;
+    498c:	9862      	ld.w      	r3, (r14, 0x8)
+    498e:	2b00      	subi      	r3, 1
+    4990:	74cd      	zexth      	r3, r3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4992:	3b40      	cmpnei      	r3, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4994:	6dc3      	mov      	r7, r0
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4996:	0c05      	bf      	0x49a0	// 49a0 <RC522_PcdComMF522+0x80>
+    4998:	6c83      	mov      	r2, r0
+    499a:	6898      	and      	r2, r6
+    499c:	3a40      	cmpnei      	r2, 0
+    499e:	0ff3      	bf      	0x4984	// 4984 <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    49a0:	3180      	movi      	r1, 128
+    49a2:	300d      	movi      	r0, 13
+    49a4:	b862      	st.w      	r3, (r14, 0x8)
+    49a6:	e3ffff00 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+	if(i!=0)
+    49aa:	9862      	ld.w      	r3, (r14, 0x8)
+    49ac:	3b40      	cmpnei      	r3, 0
+    49ae:	081f      	bt      	0x49ec	// 49ec <RC522_PcdComMF522+0xcc>
+    char stats=MI_ERR;
+    49b0:	3702      	movi      	r7, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    49b2:	3180      	movi      	r1, 128
+    49b4:	300c      	movi      	r0, 12
+    49b6:	e3fffedf 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    49ba:	3100      	movi      	r1, 0
+    49bc:	3001      	movi      	r0, 1
+    49be:	e3fffe9d 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    49c2:	6c1f      	mov      	r0, r7
+    49c4:	1404      	addi      	r14, r14, 16
+    49c6:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    49c8:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    49ca:	3477      	movi      	r4, 119
+        break;
+    49cc:	07b7      	br      	0x493a	// 493a <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    49ce:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    49d0:	3412      	movi      	r4, 18
+    49d2:	07b4      	br      	0x493a	// 493a <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49d4:	8320      	ld.b      	r1, (r3, 0x0)
+    49d6:	3009      	movi      	r0, 9
+    49d8:	b843      	st.w      	r2, (r14, 0xc)
+    49da:	b862      	st.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    49dc:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49de:	e3fffe8d 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    49e2:	9862      	ld.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    49e4:	75dd      	zexth      	r7, r7
+    49e6:	2300      	addi      	r3, 1
+    49e8:	9843      	ld.w      	r2, (r14, 0xc)
+    49ea:	07be      	br      	0x4966	// 4966 <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    49ec:	3006      	movi      	r0, 6
+    49ee:	e3fffe69 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    49f2:	331b      	movi      	r3, 27
+    49f4:	680c      	and      	r0, r3
+    49f6:	3840      	cmpnei      	r0, 0
+    49f8:	0bdc      	bt      	0x49b0	// 49b0 <RC522_PcdComMF522+0x90>
+            stats=MI_OK;
+    49fa:	3301      	movi      	r3, 1
+    49fc:	690c      	and      	r4, r3
+            if(Command==PCD_TRANSCEIVE)
+    49fe:	3d4c      	cmpnei      	r5, 12
+            stats=MI_OK;
+    4a00:	69d0      	and      	r7, r4
+            if(Command==PCD_TRANSCEIVE)
+    4a02:	0bd8      	bt      	0x49b2	// 49b2 <RC522_PcdComMF522+0x92>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    4a04:	300a      	movi      	r0, 10
+    4a06:	e3fffe5d 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4a0a:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4a0c:	300c      	movi      	r0, 12
+    4a0e:	e3fffe59 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4a12:	3307      	movi      	r3, 7
+    4a14:	680c      	and      	r0, r3
+                if(lastBits)
+    4a16:	3840      	cmpnei      	r0, 0
+    4a18:	0c1b      	bf      	0x4a4e	// 4a4e <RC522_PcdComMF522+0x12e>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    4a1a:	5c63      	subi      	r3, r4, 1
+    4a1c:	4363      	lsli      	r3, r3, 3
+    4a1e:	600c      	addu      	r0, r3
+    4a20:	9860      	ld.w      	r3, (r14, 0x0)
+    4a22:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    4a24:	3c40      	cmpnei      	r4, 0
+    4a26:	0c18      	bf      	0x4a56	// 4a56 <RC522_PcdComMF522+0x136>
+    4a28:	6cd3      	mov      	r3, r4
+    4a2a:	7510      	zextb      	r4, r4
+    4a2c:	3c12      	cmphsi      	r4, 19
+    4a2e:	0c02      	bf      	0x4a32	// 4a32 <RC522_PcdComMF522+0x112>
+    4a30:	3312      	movi      	r3, 18
+    4a32:	74cc      	zextb      	r3, r3
+    4a34:	98c1      	ld.w      	r6, (r14, 0x4)
+                for(i=0; i<n; i++)
+    4a36:	3500      	movi      	r5, 0
+    4a38:	750d      	zexth      	r4, r3
+    4a3a:	6514      	cmphs      	r5, r4
+    4a3c:	0bbb      	bt      	0x49b2	// 49b2 <RC522_PcdComMF522+0x92>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a3e:	3009      	movi      	r0, 9
+    4a40:	e3fffe40 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    4a44:	2500      	addi      	r5, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a46:	a600      	st.b      	r0, (r6, 0x0)
+                for(i=0; i<n; i++)
+    4a48:	7555      	zexth      	r5, r5
+    4a4a:	2600      	addi      	r6, 1
+    4a4c:	07f7      	br      	0x4a3a	// 4a3a <RC522_PcdComMF522+0x11a>
+                    *pOutLenBit=n*8;
+    4a4e:	4463      	lsli      	r3, r4, 3
+    4a50:	9840      	ld.w      	r2, (r14, 0x0)
+    4a52:	a260      	st.b      	r3, (r2, 0x0)
+    4a54:	07e8      	br      	0x4a24	// 4a24 <RC522_PcdComMF522+0x104>
+                if(n==0)n=1;
+    4a56:	3301      	movi      	r3, 1
+    4a58:	07ee      	br      	0x4a34	// 4a34 <RC522_PcdComMF522+0x114>
+
+Disassembly of section .text.RC522_PcdSelect:
+
+00004a5a <RC522_PcdSelect>:
+{
+    4a5a:	14d1      	push      	r4, r15
+    4a5c:	1427      	subi      	r14, r14, 28
+    ucComMF522Buf[0]=PICC_ANTICOLL1;
+    4a5e:	3300      	movi      	r3, 0
+    4a60:	2b6c      	subi      	r3, 109
+    4a62:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x70;
+    4a66:	3370      	movi      	r3, 112
+    4a68:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    ucComMF522Buf[6]=0;
+    4a6c:	3300      	movi      	r3, 0
+    4a6e:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    4a72:	1a02      	addi      	r2, r14, 8
+    4a74:	582e      	addi      	r1, r0, 4
+        ucComMF522Buf[i+2]=*(pSnr+i);
+    4a76:	8060      	ld.b      	r3, (r0, 0x0)
+    4a78:	a262      	st.b      	r3, (r2, 0x2)
+        ucComMF522Buf[6]^=*(pSnr+i);
+    4a7a:	d88e000e 	ld.b      	r4, (r14, 0xe)
+    4a7e:	2000      	addi      	r0, 1
+    4a80:	6cd1      	xor      	r3, r4
+    for(i=0;i<4;i++)
+    4a82:	6442      	cmpne      	r0, r1
+        ucComMF522Buf[6]^=*(pSnr+i);
+    4a84:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    4a88:	2200      	addi      	r2, 1
+    for(i=0;i<4;i++)
+    4a8a:	0bf6      	bt      	0x4a76	// 4a76 <RC522_PcdSelect+0x1c>
+    RC522_CalulateCRC(ucComMF522Buf,7,&ucComMF522Buf[7]); //用MF522计算CRC16函数，校验数据
+    4a8c:	1b02      	addi      	r3, r14, 8
+    4a8e:	5b5a      	addi      	r2, r3, 7
+    4a90:	6c0f      	mov      	r0, r3
+    4a92:	3107      	movi      	r1, 7
+    4a94:	e3fffe9a 	bsr      	0x47c8	// 47c8 <RC522_CalulateCRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    4a98:	3407      	movi      	r4, 7
+    RC522_ClearBitMask(Status2Reg,0x08);                    //清RC522寄存器位
+    4a9a:	3108      	movi      	r1, 8
+    4a9c:	3008      	movi      	r0, 8
+    4a9e:	e3fffe84 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    4aa2:	6138      	addu      	r4, r14
+    4aa4:	1b02      	addi      	r3, r14, 8
+    4aa6:	b880      	st.w      	r4, (r14, 0x0)
+    4aa8:	3209      	movi      	r2, 9
+    4aaa:	6c4f      	mov      	r1, r3
+    4aac:	300c      	movi      	r0, 12
+    4aae:	e3ffff39 	bsr      	0x4920	// 4920 <RC522_PcdComMF522>
+    if((stats==MI_OK)&&(unLen==0x18))stats=MI_OK;
+    4ab2:	3840      	cmpnei      	r0, 0
+    4ab4:	0806      	bt      	0x4ac0	// 4ac0 <RC522_PcdSelect+0x66>
+    4ab6:	8460      	ld.b      	r3, (r4, 0x0)
+    4ab8:	3b58      	cmpnei      	r3, 24
+    4aba:	0803      	bt      	0x4ac0	// 4ac0 <RC522_PcdSelect+0x66>
+}
+    4abc:	1407      	addi      	r14, r14, 28
+    4abe:	1491      	pop      	r4, r15
+    else stats=MI_ERR;
+    4ac0:	3002      	movi      	r0, 2
+    4ac2:	07fd      	br      	0x4abc	// 4abc <RC522_PcdSelect+0x62>
+
+Disassembly of section .text.RC522_PcdAuthState:
+
+00004ac4 <RC522_PcdAuthState>:
+{
+    4ac4:	14d2      	push      	r4-r5, r15
+    4ac6:	1427      	subi      	r14, r14, 28
+    4ac8:	6d0f      	mov      	r4, r3
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    4aca:	1b02      	addi      	r3, r14, 8
+{
+    4acc:	6d47      	mov      	r5, r1
+    ucComMF522Buf[0]=auth_mode;
+    4ace:	dc0e0008 	st.b      	r0, (r14, 0x8)
+{
+    4ad2:	6c4b      	mov      	r1, r2
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    4ad4:	5b06      	addi      	r0, r3, 2
+    4ad6:	3206      	movi      	r2, 6
+    ucComMF522Buf[1]=addr;
+    4ad8:	dcae0009 	st.b      	r5, (r14, 0x9)
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    4adc:	e3ffe7e4 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    memcpy(&ucComMF522Buf[8],pSnr,4);
+    4ae0:	1b02      	addi      	r3, r14, 8
+    4ae2:	6c53      	mov      	r1, r4
+    4ae4:	5b1e      	addi      	r0, r3, 8
+    4ae6:	3204      	movi      	r2, 4
+    4ae8:	e3ffe7de 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    4aec:	3307      	movi      	r3, 7
+    4aee:	60f8      	addu      	r3, r14
+    4af0:	b860      	st.w      	r3, (r14, 0x0)
+    4af2:	1b02      	addi      	r3, r14, 8
+    4af4:	320c      	movi      	r2, 12
+    4af6:	6c4f      	mov      	r1, r3
+    4af8:	300e      	movi      	r0, 14
+    4afa:	e3ffff13 	bsr      	0x4920	// 4920 <RC522_PcdComMF522>
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    4afe:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    4b00:	6d03      	mov      	r4, r0
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    4b02:	0809      	bt      	0x4b14	// 4b14 <RC522_PcdAuthState+0x50>
+    4b04:	3008      	movi      	r0, 8
+    4b06:	e3fffddd 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4b0a:	3308      	movi      	r3, 8
+    4b0c:	680c      	and      	r0, r3
+    4b0e:	7400      	zextb      	r0, r0
+    4b10:	3840      	cmpnei      	r0, 0
+    4b12:	0802      	bt      	0x4b16	// 4b16 <RC522_PcdAuthState+0x52>
+    4b14:	3402      	movi      	r4, 2
+}
+    4b16:	6c13      	mov      	r0, r4
+    4b18:	1407      	addi      	r14, r14, 28
+    4b1a:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00004b1c <RC522_PcdRequest>:
+{
+    4b1c:	14d2      	push      	r4-r5, r15
+    4b1e:	1427      	subi      	r14, r14, 28
+    4b20:	6d43      	mov      	r5, r0
+    4b22:	6d07      	mov      	r4, r1
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    4b24:	3008      	movi      	r0, 8
+    4b26:	3108      	movi      	r1, 8
+    4b28:	e3fffe3f 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    4b2c:	3107      	movi      	r1, 7
+    4b2e:	300d      	movi      	r0, 13
+    4b30:	e3fffde4 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    4b34:	3103      	movi      	r1, 3
+    4b36:	3014      	movi      	r0, 20
+    4b38:	e3fffe1e 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    4b3c:	dcae0008 	st.b      	r5, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4b40:	3507      	movi      	r5, 7
+    4b42:	1b02      	addi      	r3, r14, 8
+    4b44:	6178      	addu      	r5, r14
+    4b46:	b8a0      	st.w      	r5, (r14, 0x0)
+    4b48:	3201      	movi      	r2, 1
+    4b4a:	6c4f      	mov      	r1, r3
+    4b4c:	300c      	movi      	r0, 12
+    4b4e:	e3fffee9 	bsr      	0x4920	// 4920 <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    4b52:	3840      	cmpnei      	r0, 0
+    4b54:	080c      	bt      	0x4b6c	// 4b6c <RC522_PcdRequest+0x50>
+    4b56:	8560      	ld.b      	r3, (r5, 0x0)
+    4b58:	3b50      	cmpnei      	r3, 16
+    4b5a:	0809      	bt      	0x4b6c	// 4b6c <RC522_PcdRequest+0x50>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    4b5c:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4b60:	a460      	st.b      	r3, (r4, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    4b62:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4b66:	a461      	st.b      	r3, (r4, 0x1)
+}
+    4b68:	1407      	addi      	r14, r14, 28
+    4b6a:	1492      	pop      	r4-r5, r15
+        stats = MI_ERR;
+    4b6c:	3002      	movi      	r0, 2
+    4b6e:	07fd      	br      	0x4b68	// 4b68 <RC522_PcdRequest+0x4c>
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00004b70 <RC522_PcdAnticoll>:
+{
+    4b70:	14d2      	push      	r4-r5, r15
+    4b72:	1427      	subi      	r14, r14, 28
+    4b74:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    4b76:	3108      	movi      	r1, 8
+    4b78:	3008      	movi      	r0, 8
+    4b7a:	e3fffe16 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    4b7e:	3100      	movi      	r1, 0
+    4b80:	300d      	movi      	r0, 13
+    4b82:	e3fffdbb 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    4b86:	3180      	movi      	r1, 128
+    4b88:	300e      	movi      	r0, 14
+    4b8a:	e3fffe0e 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    4b8e:	3300      	movi      	r3, 0
+    4b90:	2b6c      	subi      	r3, 109
+    4b92:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    4b96:	3320      	movi      	r3, 32
+    4b98:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4b9c:	3307      	movi      	r3, 7
+    4b9e:	60f8      	addu      	r3, r14
+    4ba0:	b860      	st.w      	r3, (r14, 0x0)
+    4ba2:	1b02      	addi      	r3, r14, 8
+    4ba4:	3202      	movi      	r2, 2
+    4ba6:	6c4f      	mov      	r1, r3
+    4ba8:	300c      	movi      	r0, 12
+    4baa:	e3fffebb 	bsr      	0x4920	// 4920 <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    4bae:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4bb0:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    4bb2:	0812      	bt      	0x4bd6	// 4bd6 <RC522_PcdAnticoll+0x66>
+    4bb4:	3300      	movi      	r3, 0
+    4bb6:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    4bb8:	1902      	addi      	r1, r14, 8
+    4bba:	604c      	addu      	r1, r3
+    4bbc:	8120      	ld.b      	r1, (r1, 0x0)
+    4bbe:	5d0c      	addu      	r0, r5, r3
+    4bc0:	2300      	addi      	r3, 1
+    4bc2:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    4bc4:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    4bc6:	6c49      	xor      	r1, r2
+    4bc8:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    4bca:	0bf7      	bt      	0x4bb8	// 4bb8 <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    4bcc:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    4bd0:	644e      	cmpne      	r3, r1
+    4bd2:	0c02      	bf      	0x4bd6	// 4bd6 <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    4bd4:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    4bd6:	3180      	movi      	r1, 128
+    4bd8:	300e      	movi      	r0, 14
+    4bda:	e3fffdcd 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+}
+    4bde:	6c13      	mov      	r0, r4
+    4be0:	1407      	addi      	r14, r14, 28
+    4be2:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+00004be4 <Card_Read_TasK>:
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+U16_T test_count = 0;
+void Card_Read_TasK(void){
+    4be4:	14d3      	push      	r4-r6, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    4be6:	114d      	lrw      	r2, 0x200000b4	// 4c98 <Card_Read_TasK+0xb4>
+    4be8:	11cd      	lrw      	r6, 0x200002d4	// 4c9c <Card_Read_TasK+0xb8>
+    4bea:	118e      	lrw      	r4, 0x2000041b	// 4ca0 <Card_Read_TasK+0xbc>
+    4bec:	9620      	ld.w      	r1, (r6, 0x0)
+    4bee:	9260      	ld.w      	r3, (r2, 0x0)
+    4bf0:	60c6      	subu      	r3, r1
+    4bf2:	3163      	movi      	r1, 99
+    4bf4:	64c4      	cmphs      	r1, r3
+    4bf6:	082c      	bt      	0x4c4e	// 4c4e <Card_Read_TasK+0x6a>
+        scan_tick = SysTick_1ms;
+		
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read");
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4bf8:	3119      	movi      	r1, 25
+        scan_tick = SysTick_1ms;
+    4bfa:	9260      	ld.w      	r3, (r2, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4bfc:	6050      	addu      	r1, r4
+    4bfe:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    4c00:	b660      	st.w      	r3, (r6, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4c02:	e3ffff8d 	bsr      	0x4b1c	// 4b1c <RC522_PcdRequest>
+    4c06:	3520      	movi      	r5, 32
+    4c08:	3840      	cmpnei      	r0, 0
+    4c0a:	6150      	addu      	r5, r4
+    4c0c:	0836      	bt      	0x4c78	// 4c78 <Card_Read_TasK+0x94>
+            CardInfo.FailNum = 0x00;
+    4c0e:	3300      	movi      	r3, 0
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    4c10:	1125      	lrw      	r1, 0x5f85	// 4ca4 <Card_Read_TasK+0xc0>
+            CardInfo.FailNum = 0x00;
+    4c12:	a566      	st.b      	r3, (r5, 0x6)
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    4c14:	e3fffcd6 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4c18:	301b      	movi      	r0, 27
+    4c1a:	6010      	addu      	r0, r4
+    4c1c:	e3ffffaa 	bsr      	0x4b70	// 4b70 <RC522_PcdAnticoll>
+    4c20:	3840      	cmpnei      	r0, 0
+    4c22:	0829      	bt      	0x4c74	// 4c74 <Card_Read_TasK+0x90>
+                //选定要进行操作的卡片
+                if(RC522_PcdSelect(CardInfo.SN)==MI_OK){
+    4c24:	301b      	movi      	r0, 27
+    4c26:	6010      	addu      	r0, r4
+    4c28:	e3ffff19 	bsr      	0x4a5a	// 4a5a <RC522_PcdSelect>
+    4c2c:	3840      	cmpnei      	r0, 0
+    4c2e:	0821      	bt      	0x4c70	// 4c70 <Card_Read_TasK+0x8c>
+                    //验证卡片密码
+                    if(RC522_PcdAuthState(CardInfo.CardKeyType, CardInfo.BlockLoc, CardInfo.CardKey, CardInfo.SN)==MI_OK){
+    4c30:	331b      	movi      	r3, 27
+    4c32:	8428      	ld.b      	r1, (r4, 0x8)
+    4c34:	841f      	ld.b      	r0, (r4, 0x1f)
+    4c36:	60d0      	addu      	r3, r4
+    4c38:	6c97      	mov      	r2, r5
+    4c3a:	e3ffff45 	bsr      	0x4ac4	// 4ac4 <RC522_PcdAuthState>
+    4c3e:	3840      	cmpnei      	r0, 0
+    4c40:	0813      	bt      	0x4c66	// 4c66 <Card_Read_TasK+0x82>
+                        //读取指定块的数据
+//                        if(RC522_PcdRead(CardInfo.BlockLoc, CardInfo.CradDataBuf)==MI_OK)
+						{
+
+                            Dbg_Println(DBG_BIT_SYS_STATUS, "Card Block %d",CardInfo.BlockLoc);
+    4c42:	8448      	ld.b      	r2, (r4, 0x8)
+    4c44:	1039      	lrw      	r1, 0x5f95	// 4ca8 <Card_Read_TasK+0xc4>
+    4c46:	e3fffcbd 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+                            //Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "Card Data",CardInfo.CradDataBuf,BLOCK_HAVE_BYTE);
+							
+							CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    4c4a:	3301      	movi      	r3, 1
+    4c4c:	a467      	st.b      	r3, (r4, 0x7)
+                CardInfo.FailNum++;
+            }
+        }
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    4c4e:	8467      	ld.b      	r3, (r4, 0x7)
+    4c50:	8446      	ld.b      	r2, (r4, 0x6)
+    4c52:	64ca      	cmpne      	r2, r3
+    4c54:	0c08      	bf      	0x4c64	// 4c64 <Card_Read_TasK+0x80>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4c56:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    4c58:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4c5a:	0805      	bt      	0x4c64	// 4c64 <Card_Read_TasK+0x80>
+            
+			Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+    4c5c:	1034      	lrw      	r1, 0x5fe7	// 4cac <Card_Read_TasK+0xc8>
+    4c5e:	3000      	movi      	r0, 0
+    4c60:	e3fffcb0 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+        }
+    }
+
+
+}
+    4c64:	1493      	pop      	r4-r6, r15
+                        Dbg_Println(DBG_BIT_SYS_STATUS, "Card Key Error");
+    4c66:	1033      	lrw      	r1, 0x5fa3	// 4cb0 <Card_Read_TasK+0xcc>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4c68:	3000      	movi      	r0, 0
+    4c6a:	e3fffcab 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+    4c6e:	07f0      	br      	0x4c4e	// 4c4e <Card_Read_TasK+0x6a>
+                    Dbg_Println(DBG_BIT_SYS_STATUS, "Card Select Error");
+    4c70:	1031      	lrw      	r1, 0x5fb2	// 4cb4 <Card_Read_TasK+0xd0>
+    4c72:	07fb      	br      	0x4c68	// 4c68 <Card_Read_TasK+0x84>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4c74:	1031      	lrw      	r1, 0x5fc4	// 4cb8 <Card_Read_TasK+0xd4>
+    4c76:	07f9      	br      	0x4c68	// 4c68 <Card_Read_TasK+0x84>
+            if(CardInfo.FailNum >= 5){
+    4c78:	8566      	ld.b      	r3, (r5, 0x6)
+    4c7a:	3b04      	cmphsi      	r3, 5
+    4c7c:	0c0b      	bf      	0x4c92	// 4c92 <Card_Read_TasK+0xae>
+                CardInfo.FailNum = 0;
+    4c7e:	3300      	movi      	r3, 0
+    4c80:	a566      	st.b      	r3, (r5, 0x6)
+				CardInfo.SuccNum = 0;
+    4c82:	a567      	st.b      	r3, (r5, 0x7)
+				test_count ++;
+    4c84:	8e62      	ld.h      	r3, (r6, 0x4)
+    4c86:	2300      	addi      	r3, 1
+    4c88:	ae62      	st.h      	r3, (r6, 0x4)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    4c8a:	3300      	movi      	r3, 0
+    4c8c:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_FAILD");
+    4c8e:	102c      	lrw      	r1, 0x5fd6	// 4cbc <Card_Read_TasK+0xd8>
+    4c90:	07ec      	br      	0x4c68	// 4c68 <Card_Read_TasK+0x84>
+                CardInfo.FailNum++;
+    4c92:	2300      	addi      	r3, 1
+    4c94:	a566      	st.b      	r3, (r5, 0x6)
+    4c96:	07dc      	br      	0x4c4e	// 4c4e <Card_Read_TasK+0x6a>
+    4c98:	200000b4 	.long	0x200000b4
+    4c9c:	200002d4 	.long	0x200002d4
+    4ca0:	2000041b 	.long	0x2000041b
+    4ca4:	00005f85 	.long	0x00005f85
+    4ca8:	00005f95 	.long	0x00005f95
+    4cac:	00005fe7 	.long	0x00005fe7
+    4cb0:	00005fa3 	.long	0x00005fa3
+    4cb4:	00005fb2 	.long	0x00005fb2
+    4cb8:	00005fc4 	.long	0x00005fc4
+    4cbc:	00005fd6 	.long	0x00005fd6
+
+Disassembly of section .text.RLY_Light_Ctrl.part.0:
+
+00004cc0 <RLY_Light_Ctrl.part.0>:
+	}
+}
+
+
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+    4cc0:	14d0      	push      	r15
+{
+	if(state == 0x01)
+	{
+		CTRL_RLY_ON;
+    4cc2:	1064      	lrw      	r3, 0x2000004c	// 4cd0 <RLY_Light_Ctrl.part.0+0x10>
+    4cc4:	3100      	movi      	r1, 0
+    4cc6:	9300      	ld.w      	r0, (r3, 0x0)
+    4cc8:	e3fff347 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	else if(state == 0x00)
+	{
+		CTRL_RLY_OFF;
+//		Ctrl_Backlight(1);
+	}
+}
+    4ccc:	1490      	pop      	r15
+    4cce:	0000      	bkpt
+    4cd0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00004cd4 <KEY1_LONG_PRESS_RELEASE_Handler>:
+
+
+U8_T LED_STATE = 0;
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    4cd4:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    4cd6:	1034      	lrw      	r1, 0x5fff	// 4d24 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    4cd8:	3000      	movi      	r0, 0
+    4cda:	e3fffc73 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4cde:	1073      	lrw      	r3, 0x2000041b	// 4d28 <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    4ce0:	8367      	ld.b      	r3, (r3, 0x7)
+    4ce2:	3b40      	cmpnei      	r3, 0
+    4ce4:	1092      	lrw      	r4, 0x2000047c	// 4d2c <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    4ce6:	081b      	bt      	0x4d1c	// 4d1c <KEY1_LONG_PRESS_RELEASE_Handler+0x48>
+	{
+		if(READ_RLY_STATE != 0x00)
+    4ce8:	1072      	lrw      	r3, 0x2000004c	// 4d30 <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    4cea:	3100      	movi      	r1, 0
+    4cec:	9300      	ld.w      	r0, (r3, 0x0)
+    4cee:	e3fff34b 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4cf2:	3840      	cmpnei      	r0, 0
+    4cf4:	0c0a      	bf      	0x4d08	// 4d08 <KEY1_LONG_PRESS_RELEASE_Handler+0x34>
+    4cf6:	e3ffffe5 	bsr      	0x4cc0	// 4cc0 <RLY_Light_Ctrl.part.0>
+		{
+			RLY_Light_Ctrl(1);
+			LED_STATE = 4;
+    4cfa:	106f      	lrw      	r3, 0x200002e0	// 4d34 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    4cfc:	3204      	movi      	r2, 4
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4cfe:	102f      	lrw      	r1, 0x601a	// 4d38 <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    4d00:	3000      	movi      	r0, 0
+			LED_STATE = 4;
+    4d02:	a340      	st.b      	r2, (r3, 0x0)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4d04:	e3fffc5e 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    4d08:	106d      	lrw      	r3, 0x200000b4	// 4d3c <KEY1_LONG_PRESS_RELEASE_Handler+0x68>
+    4d0a:	104e      	lrw      	r2, 0x2000047d	// 4d40 <KEY1_LONG_PRESS_RELEASE_Handler+0x6c>
+    4d0c:	9360      	ld.w      	r3, (r3, 0x0)
+    4d0e:	4b28      	lsri      	r1, r3, 8
+    4d10:	a461      	st.b      	r3, (r4, 0x1)
+    4d12:	a221      	st.b      	r1, (r2, 0x1)
+    4d14:	4b30      	lsri      	r1, r3, 16
+    4d16:	4b78      	lsri      	r3, r3, 24
+    4d18:	a222      	st.b      	r1, (r2, 0x2)
+    4d1a:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    4d1c:	3302      	movi      	r3, 2
+    4d1e:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4d20:	1491      	pop      	r4, r15
+    4d22:	0000      	bkpt
+    4d24:	00005fff 	.long	0x00005fff
+    4d28:	2000041b 	.long	0x2000041b
+    4d2c:	2000047c 	.long	0x2000047c
+    4d30:	2000004c 	.long	0x2000004c
+    4d34:	200002e0 	.long	0x200002e0
+    4d38:	0000601a 	.long	0x0000601a
+    4d3c:	200000b4 	.long	0x200000b4
+    4d40:	2000047d 	.long	0x2000047d
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00004d44 <RLY_Light_Ctrl>:
+{
+    4d44:	14d0      	push      	r15
+	if(state == 0x01)
+    4d46:	3841      	cmpnei      	r0, 1
+    4d48:	0804      	bt      	0x4d50	// 4d50 <RLY_Light_Ctrl+0xc>
+    4d4a:	e3ffffbb 	bsr      	0x4cc0	// 4cc0 <RLY_Light_Ctrl.part.0>
+}
+    4d4e:	1490      	pop      	r15
+	else if(state == 0x00)
+    4d50:	3840      	cmpnei      	r0, 0
+    4d52:	0bfe      	bt      	0x4d4e	// 4d4e <RLY_Light_Ctrl+0xa>
+		CTRL_RLY_OFF;
+    4d54:	1063      	lrw      	r3, 0x2000004c	// 4d60 <RLY_Light_Ctrl+0x1c>
+    4d56:	3100      	movi      	r1, 0
+    4d58:	9300      	ld.w      	r0, (r3, 0x0)
+    4d5a:	e3fff2fa 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4d5e:	07f8      	br      	0x4d4e	// 4d4e <RLY_Light_Ctrl+0xa>
+    4d60:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Init:
+
+00004d64 <LogicCtrl_Init>:
+{
+    4d64:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    4d66:	108d      	lrw      	r4, 0x20000048	// 4d98 <LogicCtrl_Init+0x34>
+    4d68:	3200      	movi      	r2, 0
+    4d6a:	9400      	ld.w      	r0, (r4, 0x0)
+    4d6c:	3100      	movi      	r1, 0
+    4d6e:	e3fff26f 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_CARD_OUT;
+    4d72:	9400      	ld.w      	r0, (r4, 0x0)
+    4d74:	3100      	movi      	r1, 0
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    4d76:	108a      	lrw      	r4, 0x2000004c	// 4d9c <LogicCtrl_Init+0x38>
+	CTRL_CARD_OUT;
+    4d78:	e3fff2eb 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    4d7c:	3201      	movi      	r2, 1
+    4d7e:	9400      	ld.w      	r0, (r4, 0x0)
+    4d80:	310c      	movi      	r1, 12
+    4d82:	e3fff265 	bsr      	0x324c	// 324c <GPIO_Init>
+	g_read.Led_state = READ_LED_IN;
+    4d86:	9400      	ld.w      	r0, (r4, 0x0)
+    4d88:	310c      	movi      	r1, 12
+    4d8a:	e3fff2f5 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    4d8e:	1065      	lrw      	r3, 0x20000444	// 4da0 <LogicCtrl_Init+0x3c>
+	g_read.last_state = g_read.Led_state;
+    4d90:	a302      	st.b      	r0, (r3, 0x2)
+	g_read.Led_state = READ_LED_IN;
+    4d92:	a303      	st.b      	r0, (r3, 0x3)
+}
+    4d94:	1491      	pop      	r4, r15
+    4d96:	0000      	bkpt
+    4d98:	20000048 	.long	0x20000048
+    4d9c:	2000004c 	.long	0x2000004c
+    4da0:	20000444 	.long	0x20000444
+
+Disassembly of section .text.Debounce_Task:
+
+00004da4 <Debounce_Task>:
+void Debounce_Task(void){
+    4da4:	14d1      	push      	r4, r15
+	if (SysTick_1ms - g_read.read_tick >= 10) {
+    4da6:	1097      	lrw      	r4, 0x20000444	// 4e00 <Debounce_Task+0x5c>
+    4da8:	8445      	ld.b      	r2, (r4, 0x5)
+    4daa:	8464      	ld.b      	r3, (r4, 0x4)
+    4dac:	4248      	lsli      	r2, r2, 8
+    4dae:	6c8c      	or      	r2, r3
+    4db0:	8466      	ld.b      	r3, (r4, 0x6)
+    4db2:	4370      	lsli      	r3, r3, 16
+    4db4:	6c8c      	or      	r2, r3
+    4db6:	8467      	ld.b      	r3, (r4, 0x7)
+    4db8:	1013      	lrw      	r0, 0x200000b4	// 4e04 <Debounce_Task+0x60>
+    4dba:	4378      	lsli      	r3, r3, 24
+    4dbc:	9020      	ld.w      	r1, (r0, 0x0)
+    4dbe:	6cc8      	or      	r3, r2
+    4dc0:	604e      	subu      	r1, r3
+    4dc2:	3909      	cmphsi      	r1, 10
+    4dc4:	0c17      	bf      	0x4df2	// 4df2 <Debounce_Task+0x4e>
+		g_read.read_tick = SysTick_1ms;
+    4dc6:	9060      	ld.w      	r3, (r0, 0x0)
+    4dc8:	4b48      	lsri      	r2, r3, 8
+    4dca:	a464      	st.b      	r3, (r4, 0x4)
+    4dcc:	a445      	st.b      	r2, (r4, 0x5)
+    4dce:	4b50      	lsri      	r2, r3, 16
+    4dd0:	4b78      	lsri      	r3, r3, 24
+    4dd2:	a467      	st.b      	r3, (r4, 0x7)
+		g_read.read_state = READ_LED_IN;
+    4dd4:	310c      	movi      	r1, 12
+    4dd6:	106d      	lrw      	r3, 0x2000004c	// 4e08 <Debounce_Task+0x64>
+    4dd8:	9300      	ld.w      	r0, (r3, 0x0)
+		g_read.read_tick = SysTick_1ms;
+    4dda:	a446      	st.b      	r2, (r4, 0x6)
+		g_read.read_state = READ_LED_IN;
+    4ddc:	e3fff2cc 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+		if (g_read.read_state == g_read.last_state) {
+    4de0:	8442      	ld.b      	r2, (r4, 0x2)
+    4de2:	640a      	cmpne      	r2, r0
+		g_read.read_state = READ_LED_IN;
+    4de4:	a401      	st.b      	r0, (r4, 0x1)
+		if (g_read.read_state == g_read.last_state) {
+    4de6:	0809      	bt      	0x4df8	// 4df8 <Debounce_Task+0x54>
+			if (g_read.read_count < debounce_count) {
+    4de8:	8460      	ld.b      	r3, (r4, 0x0)
+    4dea:	3b02      	cmphsi      	r3, 3
+    4dec:	0804      	bt      	0x4df4	// 4df4 <Debounce_Task+0x50>
+				g_read.read_count++;
+    4dee:	2300      	addi      	r3, 1
+    4df0:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4df2:	1491      	pop      	r4, r15
+				g_read.Led_state = g_read.read_state;
+    4df4:	a443      	st.b      	r2, (r4, 0x3)
+    4df6:	07fe      	br      	0x4df2	// 4df2 <Debounce_Task+0x4e>
+			g_read.read_count=0;
+    4df8:	3300      	movi      	r3, 0
+    4dfa:	a460      	st.b      	r3, (r4, 0x0)
+			g_read.last_state = g_read.read_state;
+    4dfc:	a402      	st.b      	r0, (r4, 0x2)
+}
+    4dfe:	07fa      	br      	0x4df2	// 4df2 <Debounce_Task+0x4e>
+    4e00:	20000444 	.long	0x20000444
+    4e04:	200000b4 	.long	0x200000b4
+    4e08:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+00004e0c <LogicCtrl_Task>:
+{
+    4e0c:	14d2      	push      	r4-r5, r15
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 1))
+    4e0e:	107e      	lrw      	r3, 0x2000041b	// 4e84 <LogicCtrl_Task+0x78>
+    4e10:	8347      	ld.b      	r2, (r3, 0x7)
+    4e12:	3a41      	cmpnei      	r2, 1
+    4e14:	6d0f      	mov      	r4, r3
+    4e16:	081f      	bt      	0x4e54	// 4e54 <LogicCtrl_Task+0x48>
+    4e18:	10bc      	lrw      	r5, 0x20000048	// 4e88 <LogicCtrl_Task+0x7c>
+    4e1a:	3100      	movi      	r1, 0
+    4e1c:	9500      	ld.w      	r0, (r5, 0x0)
+    4e1e:	e3fff2b3 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e22:	3841      	cmpnei      	r0, 1
+    4e24:	0818      	bt      	0x4e54	// 4e54 <LogicCtrl_Task+0x48>
+		CTRL_CARD_IN;
+    4e26:	9500      	ld.w      	r0, (r5, 0x0)
+    4e28:	3100      	movi      	r1, 0
+    4e2a:	e3fff296 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4e2e:	9500      	ld.w      	r0, (r5, 0x0)
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4e30:	3100      	movi      	r1, 0
+    4e32:	e3fff2a9 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e36:	6c83      	mov      	r2, r0
+    4e38:	1035      	lrw      	r1, 0x602c	// 4e8c <LogicCtrl_Task+0x80>
+    4e3a:	3000      	movi      	r0, 0
+    4e3c:	e3fffbc2 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+	if(g_read.Led_state == 0x00)
+    4e40:	1074      	lrw      	r3, 0x20000444	// 4e90 <LogicCtrl_Task+0x84>
+    4e42:	8363      	ld.b      	r3, (r3, 0x3)
+    4e44:	3b40      	cmpnei      	r3, 0
+    4e46:	0817      	bt      	0x4e74	// 4e74 <LogicCtrl_Task+0x68>
+        GPT0->CMPA = 2000;
+    4e48:	1073      	lrw      	r3, 0x20000024	// 4e94 <LogicCtrl_Task+0x88>
+    4e4a:	9340      	ld.w      	r2, (r3, 0x0)
+    4e4c:	33fa      	movi      	r3, 250
+    4e4e:	4363      	lsli      	r3, r3, 3
+    4e50:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    4e52:	1492      	pop      	r4-r5, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 0))
+    4e54:	8467      	ld.b      	r3, (r4, 0x7)
+    4e56:	3b40      	cmpnei      	r3, 0
+    4e58:	0bf4      	bt      	0x4e40	// 4e40 <LogicCtrl_Task+0x34>
+    4e5a:	108c      	lrw      	r4, 0x20000048	// 4e88 <LogicCtrl_Task+0x7c>
+    4e5c:	3100      	movi      	r1, 0
+    4e5e:	9400      	ld.w      	r0, (r4, 0x0)
+    4e60:	e3fff292 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e64:	3840      	cmpnei      	r0, 0
+    4e66:	0bed      	bt      	0x4e40	// 4e40 <LogicCtrl_Task+0x34>
+		CTRL_CARD_OUT;
+    4e68:	9400      	ld.w      	r0, (r4, 0x0)
+    4e6a:	3100      	movi      	r1, 0
+    4e6c:	e3fff271 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4e70:	9400      	ld.w      	r0, (r4, 0x0)
+    4e72:	07df      	br      	0x4e30	// 4e30 <LogicCtrl_Task+0x24>
+	else if(g_read.Led_state == 0x01)
+    4e74:	3b41      	cmpnei      	r3, 1
+    4e76:	0bee      	bt      	0x4e52	// 4e52 <LogicCtrl_Task+0x46>
+        GPT0->CMPA = 0;
+    4e78:	1067      	lrw      	r3, 0x20000024	// 4e94 <LogicCtrl_Task+0x88>
+    4e7a:	3200      	movi      	r2, 0
+    4e7c:	9360      	ld.w      	r3, (r3, 0x0)
+    4e7e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4e80:	07e9      	br      	0x4e52	// 4e52 <LogicCtrl_Task+0x46>
+    4e82:	0000      	bkpt
+    4e84:	2000041b 	.long	0x2000041b
+    4e88:	20000048 	.long	0x20000048
+    4e8c:	0000602c 	.long	0x0000602c
+    4e90:	20000444 	.long	0x20000444
+    4e94:	20000024 	.long	0x20000024
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00004e98 <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    4e98:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOA0,RLY_OUT_PIN,Output);			
+    4e9a:	1097      	lrw      	r4, 0x2000004c	// 4ef4 <LogicCtrl_NoRF_Init+0x5c>
+    4e9c:	3200      	movi      	r2, 0
+    4e9e:	9400      	ld.w      	r0, (r4, 0x0)
+    4ea0:	3100      	movi      	r1, 0
+    4ea2:	e3fff1d5 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_RLY_OFF;
+    4ea6:	9400      	ld.w      	r0, (r4, 0x0)
+    4ea8:	3100      	movi      	r1, 0
+    4eaa:	e3fff252 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    4eae:	3209      	movi      	r2, 9
+    4eb0:	3100      	movi      	r1, 0
+    4eb2:	1012      	lrw      	r0, 0x2000047c	// 4ef8 <LogicCtrl_NoRF_Init+0x60>
+    4eb4:	e3ffe5b4 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    4eb8:	9400      	ld.w      	r0, (r4, 0x0)
+    4eba:	3201      	movi      	r2, 1
+    4ebc:	3101      	movi      	r1, 1
+    4ebe:	e3fff1c7 	bsr      	0x324c	// 324c <GPIO_Init>
+	
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4ec2:	3200      	movi      	r2, 0
+    4ec4:	9400      	ld.w      	r0, (r4, 0x0)
+    4ec6:	310c      	movi      	r1, 12
+    4ec8:	e3fff1c2 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4ecc:	9400      	ld.w      	r0, (r4, 0x0)
+    4ece:	310c      	movi      	r1, 12
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4ed0:	108b      	lrw      	r4, 0x2000044c	// 4efc <LogicCtrl_NoRF_Init+0x64>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4ed2:	e3fff242 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4ed6:	3301      	movi      	r3, 1
+    4ed8:	6c13      	mov      	r0, r4
+    4eda:	3200      	movi      	r2, 0
+    4edc:	1029      	lrw      	r1, 0x52a0	// 4f00 <LogicCtrl_NoRF_Init+0x68>
+    4ede:	e000010f 	bsr      	0x50fc	// 50fc <button_init>
+	
+//	button_attach(&KEY1, LONG_PRESS_START, KEY1_LONG_PRESS_START_Handler);
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    4ee2:	1049      	lrw      	r2, 0x4cd4	// 4f04 <LogicCtrl_NoRF_Init+0x6c>
+    4ee4:	3107      	movi      	r1, 7
+    4ee6:	6c13      	mov      	r0, r4
+    4ee8:	e0000127 	bsr      	0x5136	// 5136 <button_attach>
+	button_start(&KEY1);
+    4eec:	6c13      	mov      	r0, r4
+    4eee:	e00001b9 	bsr      	0x5260	// 5260 <button_start>
+}
+    4ef2:	1491      	pop      	r4, r15
+    4ef4:	2000004c 	.long	0x2000004c
+    4ef8:	2000047c 	.long	0x2000047c
+    4efc:	2000044c 	.long	0x2000044c
+    4f00:	000052a0 	.long	0x000052a0
+    4f04:	00004cd4 	.long	0x00004cd4
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+00004f08 <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    4f08:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+	
+	if(SysTick_1ms - test_tick > 5)
+    4f0a:	11ab      	lrw      	r5, 0x200000b4	// 4fb4 <LogicCtrl_NoRF_Task+0xac>
+    4f0c:	118b      	lrw      	r4, 0x200002e0	// 4fb8 <LogicCtrl_NoRF_Task+0xb0>
+    4f0e:	9560      	ld.w      	r3, (r5, 0x0)
+    4f10:	9441      	ld.w      	r2, (r4, 0x4)
+    4f12:	60ca      	subu      	r3, r2
+    4f14:	3b05      	cmphsi      	r3, 6
+    4f16:	0c05      	bf      	0x4f20	// 4f20 <LogicCtrl_NoRF_Task+0x18>
+	{
+		test_tick = SysTick_1ms;
+    4f18:	9560      	ld.w      	r3, (r5, 0x0)
+    4f1a:	b461      	st.w      	r3, (r4, 0x4)
+		button_ticks();
+    4f1c:	e00001b4 	bsr      	0x5284	// 5284 <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    4f20:	11c7      	lrw      	r6, 0x2000041b	// 4fbc <LogicCtrl_NoRF_Task+0xb4>
+    4f22:	8667      	ld.b      	r3, (r6, 0x7)
+    4f24:	3b41      	cmpnei      	r3, 1
+    4f26:	0833      	bt      	0x4f8c	// 4f8c <LogicCtrl_NoRF_Task+0x84>
+    4f28:	e3fffecc 	bsr      	0x4cc0	// 4cc0 <RLY_Light_Ctrl.part.0>
+	{
+		RLY_Light_Ctrl(1);
+		LED_STATE = 1;
+    4f2c:	3301      	movi      	r3, 1
+    4f2e:	a460      	st.b      	r3, (r4, 0x0)
+		card_tick = SysTick_1ms;
+    4f30:	9560      	ld.w      	r3, (r5, 0x0)
+    4f32:	b462      	st.w      	r3, (r4, 0x8)
+		dm_in.DM_State = 0x00;
+    4f34:	3200      	movi      	r2, 0
+    4f36:	1163      	lrw      	r3, 0x2000047c	// 4fc0 <LogicCtrl_NoRF_Task+0xb8>
+    4f38:	a340      	st.b      	r2, (r3, 0x0)
+		LED_STATE =2;
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card OUT RLY OFF");
+	}
+	
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4f3a:	8667      	ld.b      	r3, (r6, 0x7)
+    4f3c:	3b40      	cmpnei      	r3, 0
+    4f3e:	0826      	bt      	0x4f8a	// 4f8a <LogicCtrl_NoRF_Task+0x82>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    4f40:	1160      	lrw      	r3, 0x2000047c	// 4fc0 <LogicCtrl_NoRF_Task+0xb8>
+    4f42:	8340      	ld.b      	r2, (r3, 0x0)
+    4f44:	3a42      	cmpnei      	r2, 2
+    4f46:	0822      	bt      	0x4f8a	// 4f8a <LogicCtrl_NoRF_Task+0x82>
+    4f48:	8322      	ld.b      	r1, (r3, 0x2)
+    4f4a:	8341      	ld.b      	r2, (r3, 0x1)
+    4f4c:	4128      	lsli      	r1, r1, 8
+    4f4e:	6c48      	or      	r1, r2
+    4f50:	8343      	ld.b      	r2, (r3, 0x3)
+    4f52:	4250      	lsli      	r2, r2, 16
+    4f54:	6c48      	or      	r1, r2
+    4f56:	8344      	ld.b      	r2, (r3, 0x4)
+    4f58:	4258      	lsli      	r2, r2, 24
+    4f5a:	6c84      	or      	r2, r1
+    4f5c:	9500      	ld.w      	r0, (r5, 0x0)
+    4f5e:	600a      	subu      	r0, r2
+    4f60:	1059      	lrw      	r2, 0x752f	// 4fc4 <LogicCtrl_NoRF_Task+0xbc>
+    4f62:	6408      	cmphs      	r2, r0
+    4f64:	0813      	bt      	0x4f8a	// 4f8a <LogicCtrl_NoRF_Task+0x82>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    4f66:	9540      	ld.w      	r2, (r5, 0x0)
+    4f68:	5b22      	addi      	r1, r3, 1
+    4f6a:	a341      	st.b      	r2, (r3, 0x1)
+    4f6c:	4a68      	lsri      	r3, r2, 8
+    4f6e:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    4f70:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    4f72:	4a70      	lsri      	r3, r2, 16
+    4f74:	4a58      	lsri      	r2, r2, 24
+    4f76:	a162      	st.b      	r3, (r1, 0x2)
+    4f78:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    4f7a:	e3fffee5 	bsr      	0x4d44	// 4d44 <RLY_Light_Ctrl>
+			LED_STATE = 3;
+    4f7e:	3303      	movi      	r3, 3
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    4f80:	1032      	lrw      	r1, 0x6051	// 4fc8 <LogicCtrl_NoRF_Task+0xc0>
+    4f82:	3000      	movi      	r0, 0
+			LED_STATE = 3;
+    4f84:	a460      	st.b      	r3, (r4, 0x0)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    4f86:	e3fffb1d 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+	}
+}
+    4f8a:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= 40000))
+    4f8c:	3b40      	cmpnei      	r3, 0
+    4f8e:	0bd6      	bt      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+    4f90:	106c      	lrw      	r3, 0x2000047c	// 4fc0 <LogicCtrl_NoRF_Task+0xb8>
+    4f92:	8360      	ld.b      	r3, (r3, 0x0)
+    4f94:	3b40      	cmpnei      	r3, 0
+    4f96:	0bd2      	bt      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+    4f98:	9442      	ld.w      	r2, (r4, 0x8)
+    4f9a:	9560      	ld.w      	r3, (r5, 0x0)
+    4f9c:	60ca      	subu      	r3, r2
+    4f9e:	104c      	lrw      	r2, 0x9c3f	// 4fcc <LogicCtrl_NoRF_Task+0xc4>
+    4fa0:	64c8      	cmphs      	r2, r3
+    4fa2:	0bcc      	bt      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+		card_tick = SysTick_1ms;
+    4fa4:	9560      	ld.w      	r3, (r5, 0x0)
+		RLY_Light_Ctrl(0);
+    4fa6:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    4fa8:	b462      	st.w      	r3, (r4, 0x8)
+		RLY_Light_Ctrl(0);
+    4faa:	e3fffecd 	bsr      	0x4d44	// 4d44 <RLY_Light_Ctrl>
+		LED_STATE =2;
+    4fae:	3302      	movi      	r3, 2
+    4fb0:	a460      	st.b      	r3, (r4, 0x0)
+    4fb2:	07c4      	br      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+    4fb4:	200000b4 	.long	0x200000b4
+    4fb8:	200002e0 	.long	0x200002e0
+    4fbc:	2000041b 	.long	0x2000041b
+    4fc0:	2000047c 	.long	0x2000047c
+    4fc4:	0000752f 	.long	0x0000752f
+    4fc8:	00006051 	.long	0x00006051
+    4fcc:	00009c3f 	.long	0x00009c3f
+
+Disassembly of section .text.BackLight_Task:
+
+00004fd0 <BackLight_Task>:
+
+
+void BackLight_Task(void){
+	if (LED_STATE == 1) {
+    4fd0:	106b      	lrw      	r3, 0x200002e0	// 4ffc <BackLight_Task+0x2c>
+    4fd2:	8360      	ld.b      	r3, (r3, 0x0)
+    4fd4:	3b41      	cmpnei      	r3, 1
+    4fd6:	0806      	bt      	0x4fe2	// 4fe2 <BackLight_Task+0x12>
+        GPT0->CMPA = 0;
+    4fd8:	106a      	lrw      	r3, 0x20000024	// 5000 <BackLight_Task+0x30>
+    4fda:	3200      	movi      	r2, 0
+    4fdc:	9360      	ld.w      	r3, (r3, 0x0)
+    4fde:	b34b      	st.w      	r2, (r3, 0x2c)
+	}else if (LED_STATE == 3) {
+		Ctrl_Backlight(1);
+	}else if (LED_STATE == 4) {
+		Ctrl_Backlight(0);
+	}
+}
+    4fe0:	0408      	br      	0x4ff0	// 4ff0 <BackLight_Task+0x20>
+	}else if (LED_STATE == 2) {
+    4fe2:	3b42      	cmpnei      	r3, 2
+    4fe4:	0807      	bt      	0x4ff2	// 4ff2 <BackLight_Task+0x22>
+        GPT0->CMPA = 2000;
+    4fe6:	1067      	lrw      	r3, 0x20000024	// 5000 <BackLight_Task+0x30>
+    4fe8:	9340      	ld.w      	r2, (r3, 0x0)
+    4fea:	33fa      	movi      	r3, 250
+    4fec:	4363      	lsli      	r3, r3, 3
+    4fee:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    4ff0:	783c      	jmp      	r15
+	}else if (LED_STATE == 3) {
+    4ff2:	3b43      	cmpnei      	r3, 3
+    4ff4:	0ff9      	bf      	0x4fe6	// 4fe6 <BackLight_Task+0x16>
+	}else if (LED_STATE == 4) {
+    4ff6:	3b44      	cmpnei      	r3, 4
+    4ff8:	0bfc      	bt      	0x4ff0	// 4ff0 <BackLight_Task+0x20>
+    4ffa:	07ef      	br      	0x4fd8	// 4fd8 <BackLight_Task+0x8>
+    4ffc:	200002e0 	.long	0x200002e0
+    5000:	20000024 	.long	0x20000024
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+00005004 <Detect_WIFI_Task>:
+
+void Detect_WIFI_Task(void){
+    5004:	14d1      	push      	r4, r15
+
+	if (finish_flag == 1) return;
+    5006:	107c      	lrw      	r3, 0x200000a2	// 5074 <Detect_WIFI_Task+0x70>
+    5008:	8340      	ld.b      	r2, (r3, 0x0)
+    500a:	3a41      	cmpnei      	r2, 1
+    500c:	0c1c      	bf      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+	
+	if (detect_count <10) {
+    500e:	109b      	lrw      	r4, 0x200000a8	// 5078 <Detect_WIFI_Task+0x74>
+    5010:	8440      	ld.b      	r2, (r4, 0x0)
+    5012:	3a09      	cmphsi      	r2, 10
+    5014:	081c      	bt      	0x504c	// 504c <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    5016:	103a      	lrw      	r1, 0x200000b4	// 507c <Detect_WIFI_Task+0x78>
+    5018:	105a      	lrw      	r2, 0x200000a4	// 5080 <Detect_WIFI_Task+0x7c>
+    501a:	9160      	ld.w      	r3, (r1, 0x0)
+    501c:	9200      	ld.w      	r0, (r2, 0x0)
+    501e:	60c2      	subu      	r3, r0
+    5020:	3b09      	cmphsi      	r3, 10
+    5022:	0c11      	bf      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    5024:	9160      	ld.w      	r3, (r1, 0x0)
+    5026:	b260      	st.w      	r3, (r2, 0x0)
+			
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    5028:	3102      	movi      	r1, 2
+    502a:	1077      	lrw      	r3, 0x20000048	// 5084 <Detect_WIFI_Task+0x80>
+    502c:	9300      	ld.w      	r0, (r3, 0x0)
+    502e:	e3fff1a3 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    5032:	1076      	lrw      	r3, 0x200000a0	// 5088 <Detect_WIFI_Task+0x84>
+    5034:	a300      	st.b      	r0, (r3, 0x0)
+			
+			if (last_state != rf_exist) {
+    5036:	1076      	lrw      	r3, 0x200000a1	// 508c <Detect_WIFI_Task+0x88>
+    5038:	8340      	ld.b      	r2, (r3, 0x0)
+    503a:	640a      	cmpne      	r2, r0
+    503c:	0c05      	bf      	0x5046	// 5046 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    503e:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    5040:	3300      	movi      	r3, 0
+			}else {
+				detect_count++;
+    5042:	a460      	st.b      	r3, (r4, 0x0)
+		{
+			LogicCtrl_Init();   
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+		}
+	}
+}
+    5044:	1491      	pop      	r4, r15
+				detect_count++;
+    5046:	8460      	ld.b      	r3, (r4, 0x0)
+    5048:	2300      	addi      	r3, 1
+    504a:	07fc      	br      	0x5042	// 5042 <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    504c:	3201      	movi      	r2, 1
+    504e:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    5050:	106e      	lrw      	r3, 0x200000a0	// 5088 <Detect_WIFI_Task+0x84>
+    5052:	8360      	ld.b      	r3, (r3, 0x0)
+    5054:	3b41      	cmpnei      	r3, 1
+    5056:	0808      	bt      	0x5066	// 5066 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    5058:	e3ffff20 	bsr      	0x4e98	// 4e98 <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    505c:	102d      	lrw      	r1, 0x6062	// 5090 <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    505e:	3000      	movi      	r0, 0
+    5060:	e3fffab0 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+    5064:	07f0      	br      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    5066:	3b40      	cmpnei      	r3, 0
+    5068:	0bee      	bt      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    506a:	e3fffe7d 	bsr      	0x4d64	// 4d64 <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    506e:	102a      	lrw      	r1, 0x6064	// 5094 <Detect_WIFI_Task+0x90>
+    5070:	07f7      	br      	0x505e	// 505e <Detect_WIFI_Task+0x5a>
+    5072:	0000      	bkpt
+    5074:	200000a2 	.long	0x200000a2
+    5078:	200000a8 	.long	0x200000a8
+    507c:	200000b4 	.long	0x200000b4
+    5080:	200000a4 	.long	0x200000a4
+    5084:	20000048 	.long	0x20000048
+    5088:	200000a0 	.long	0x200000a0
+    508c:	200000a1 	.long	0x200000a1
+    5090:	00006062 	.long	0x00006062
+    5094:	00006064 	.long	0x00006064
+
+Disassembly of section .text.DM_Led_Task:
+
+00005098 <DM_Led_Task>:
+
+void DM_Led_Task(void){
+    5098:	14d1      	push      	r4, r15
+	if (dm_in.DM_State == 0x02) {
+    509a:	1075      	lrw      	r3, 0x2000047c	// 50ec <DM_Led_Task+0x54>
+    509c:	8340      	ld.b      	r2, (r3, 0x0)
+    509e:	3a42      	cmpnei      	r2, 2
+    50a0:	0820      	bt      	0x50e0	// 50e0 <DM_Led_Task+0x48>
+		if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) {
+    50a2:	8326      	ld.b      	r1, (r3, 0x6)
+    50a4:	8345      	ld.b      	r2, (r3, 0x5)
+    50a6:	4128      	lsli      	r1, r1, 8
+    50a8:	6c48      	or      	r1, r2
+    50aa:	8347      	ld.b      	r2, (r3, 0x7)
+    50ac:	4250      	lsli      	r2, r2, 16
+    50ae:	6c48      	or      	r1, r2
+    50b0:	8348      	ld.b      	r2, (r3, 0x8)
+    50b2:	1090      	lrw      	r4, 0x200000b4	// 50f0 <DM_Led_Task+0x58>
+    50b4:	4258      	lsli      	r2, r2, 24
+    50b6:	6c84      	or      	r2, r1
+    50b8:	9400      	ld.w      	r0, (r4, 0x0)
+    50ba:	600a      	subu      	r0, r2
+    50bc:	104e      	lrw      	r2, 0x1f3	// 50f4 <DM_Led_Task+0x5c>
+    50be:	6408      	cmphs      	r2, r0
+    50c0:	080f      	bt      	0x50de	// 50de <DM_Led_Task+0x46>
+			dm_in.DM_Led_Tick = SysTick_1ms;
+    50c2:	9440      	ld.w      	r2, (r4, 0x0)
+    50c4:	5b32      	addi      	r1, r3, 5
+    50c6:	a345      	st.b      	r2, (r3, 0x5)
+    50c8:	4a68      	lsri      	r3, r2, 8
+    50ca:	a161      	st.b      	r3, (r1, 0x1)
+    50cc:	4a70      	lsri      	r3, r2, 16
+    50ce:	a162      	st.b      	r3, (r1, 0x2)
+    50d0:	4a58      	lsri      	r2, r2, 24
+			GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+    50d2:	106a      	lrw      	r3, 0x2000004c	// 50f8 <DM_Led_Task+0x60>
+    50d4:	9300      	ld.w      	r0, (r3, 0x0)
+			dm_in.DM_Led_Tick = SysTick_1ms;
+    50d6:	a143      	st.b      	r2, (r1, 0x3)
+			GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+    50d8:	310c      	movi      	r1, 12
+    50da:	e3fff142 	bsr      	0x335e	// 335e <GPIO_Reverse>
+	}else {
+		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "dm close");
+	}
+
+    50de:	1491      	pop      	r4, r15
+		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    50e0:	1066      	lrw      	r3, 0x2000004c	// 50f8 <DM_Led_Task+0x60>
+    50e2:	310c      	movi      	r1, 12
+    50e4:	9300      	ld.w      	r0, (r3, 0x0)
+    50e6:	e3fff138 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    50ea:	07fa      	br      	0x50de	// 50de <DM_Led_Task+0x46>
+    50ec:	2000047c 	.long	0x2000047c
+    50f0:	200000b4 	.long	0x200000b4
+    50f4:	000001f3 	.long	0x000001f3
+    50f8:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.button_init:
+
+000050fc <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    50fc:	14d4      	push      	r4-r7, r15
+    50fe:	6dc7      	mov      	r7, r1
+    5100:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    5102:	3100      	movi      	r1, 0
+    5104:	3230      	movi      	r2, 48
+{
+    5106:	6d03      	mov      	r4, r0
+    5108:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    510a:	e3ffe489 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    510e:	3300      	movi      	r3, 0
+    5110:	2b6f      	subi      	r3, 112
+    5112:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    5114:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    5116:	6c17      	mov      	r0, r5
+    5118:	7bdd      	jsr      	r7
+    511a:	8443      	ld.b      	r2, (r4, 0x3)
+    511c:	337f      	movi      	r3, 127
+    511e:	688c      	and      	r2, r3
+    5120:	4007      	lsli      	r0, r0, 7
+    5122:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    5124:	3201      	movi      	r2, 1
+    5126:	6988      	and      	r6, r2
+    5128:	7480      	zextb      	r2, r0
+    512a:	46c6      	lsli      	r6, r6, 6
+    512c:	3a86      	bclri      	r2, 6
+    512e:	6c98      	or      	r2, r6
+    5130:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    5132:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    5134:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+00005136 <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    5136:	2102      	addi      	r1, 3
+    5138:	4122      	lsli      	r1, r1, 2
+    513a:	6040      	addu      	r1, r0
+    513c:	b140      	st.w      	r2, (r1, 0x0)
+}
+    513e:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00005140 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    5140:	14d3      	push      	r4-r6, r15
+    5142:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    5144:	9462      	ld.w      	r3, (r4, 0x8)
+    5146:	8004      	ld.b      	r0, (r0, 0x4)
+    5148:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    514a:	8463      	ld.b      	r3, (r4, 0x3)
+    514c:	433d      	lsli      	r1, r3, 29
+    514e:	493d      	lsri      	r1, r1, 29
+    5150:	3940      	cmpnei      	r1, 0
+    5152:	0c04      	bf      	0x515a	// 515a <button_handler+0x1a>
+    5154:	8c40      	ld.h      	r2, (r4, 0x0)
+    5156:	2200      	addi      	r2, 1
+    5158:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    515a:	4b47      	lsri      	r2, r3, 7
+    515c:	640a      	cmpne      	r2, r0
+    515e:	0c21      	bf      	0x51a0	// 51a0 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    5160:	435a      	lsli      	r2, r3, 26
+    5162:	4a5d      	lsri      	r2, r2, 29
+    5164:	3507      	movi      	r5, 7
+    5166:	2200      	addi      	r2, 1
+    5168:	6894      	and      	r2, r5
+    516a:	7488      	zextb      	r2, r2
+    516c:	6948      	and      	r5, r2
+    516e:	45c3      	lsli      	r6, r5, 3
+    5170:	3538      	movi      	r5, 56
+    5172:	68d5      	andn      	r3, r5
+    5174:	6d8c      	or      	r6, r3
+    5176:	3a02      	cmphsi      	r2, 3
+    5178:	a4c3      	st.b      	r6, (r4, 0x3)
+    517a:	0c09      	bf      	0x518c	// 518c <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    517c:	4067      	lsli      	r3, r0, 7
+    517e:	327f      	movi      	r2, 127
+    5180:	8403      	ld.b      	r0, (r4, 0x3)
+    5182:	6808      	and      	r0, r2
+    5184:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    5186:	7400      	zextb      	r0, r0
+    5188:	6815      	andn      	r0, r5
+    518a:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    518c:	3941      	cmpnei      	r1, 1
+    518e:	0c2f      	bf      	0x51ec	// 51ec <button_handler+0xac>
+    5190:	3940      	cmpnei      	r1, 0
+    5192:	0c0b      	bf      	0x51a8	// 51a8 <button_handler+0x68>
+    5194:	3945      	cmpnei      	r1, 5
+    5196:	0c53      	bf      	0x523c	// 523c <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    5198:	8463      	ld.b      	r3, (r4, 0x3)
+    519a:	3207      	movi      	r2, 7
+    519c:	68c9      	andn      	r3, r2
+    519e:	0420      	br      	0x51de	// 51de <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    51a0:	3238      	movi      	r2, 56
+    51a2:	68c9      	andn      	r3, r2
+    51a4:	a463      	st.b      	r3, (r4, 0x3)
+    51a6:	07f3      	br      	0x518c	// 518c <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    51a8:	8463      	ld.b      	r3, (r4, 0x3)
+    51aa:	4359      	lsli      	r2, r3, 25
+    51ac:	4a5f      	lsri      	r2, r2, 31
+    51ae:	4b67      	lsri      	r3, r3, 7
+    51b0:	648e      	cmpne      	r3, r2
+    51b2:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    51b4:	320f      	movi      	r2, 15
+    51b6:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    51b8:	0815      	bt      	0x51e2	// 51e2 <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    51ba:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    51bc:	9463      	ld.w      	r3, (r4, 0xc)
+    51be:	3b40      	cmpnei      	r3, 0
+    51c0:	0c03      	bf      	0x51c6	// 51c6 <button_handler+0x86>
+    51c2:	6c13      	mov      	r0, r4
+    51c4:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    51c6:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    51c8:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    51ca:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    51cc:	330f      	movi      	r3, 15
+    51ce:	688d      	andn      	r2, r3
+    51d0:	3101      	movi      	r1, 1
+    51d2:	6c84      	or      	r2, r1
+    51d4:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    51d6:	8463      	ld.b      	r3, (r4, 0x3)
+    51d8:	3207      	movi      	r2, 7
+    51da:	68c9      	andn      	r3, r2
+    51dc:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    51de:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    51e0:	0405      	br      	0x51ea	// 51ea <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    51e2:	3200      	movi      	r2, 0
+    51e4:	2a6f      	subi      	r2, 112
+    51e6:	6cc8      	or      	r3, r2
+    51e8:	a462      	st.b      	r3, (r4, 0x2)
+}
+    51ea:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    51ec:	8463      	ld.b      	r3, (r4, 0x3)
+    51ee:	4359      	lsli      	r2, r3, 25
+    51f0:	4a5f      	lsri      	r2, r2, 31
+    51f2:	4b67      	lsri      	r3, r3, 7
+    51f4:	648e      	cmpne      	r3, r2
+    51f6:	0c0e      	bf      	0x5212	// 5212 <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    51f8:	8462      	ld.b      	r3, (r4, 0x2)
+    51fa:	320f      	movi      	r2, 15
+    51fc:	68c8      	and      	r3, r2
+    51fe:	3ba4      	bseti      	r3, 4
+    5200:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    5202:	9464      	ld.w      	r3, (r4, 0x10)
+    5204:	3b40      	cmpnei      	r3, 0
+    5206:	0c03      	bf      	0x520c	// 520c <button_handler+0xcc>
+    5208:	6c13      	mov      	r0, r4
+    520a:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    520c:	3300      	movi      	r3, 0
+    520e:	ac60      	st.h      	r3, (r4, 0x0)
+    5210:	07c4      	br      	0x5198	// 5198 <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    5212:	8c40      	ld.h      	r2, (r4, 0x0)
+    5214:	33c8      	movi      	r3, 200
+    5216:	648c      	cmphs      	r3, r2
+    5218:	0be9      	bt      	0x51ea	// 51ea <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    521a:	8462      	ld.b      	r3, (r4, 0x2)
+    521c:	320f      	movi      	r2, 15
+    521e:	68c8      	and      	r3, r2
+    5220:	3ba4      	bseti      	r3, 4
+    5222:	3ba6      	bseti      	r3, 6
+    5224:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    5226:	9468      	ld.w      	r3, (r4, 0x20)
+    5228:	3b40      	cmpnei      	r3, 0
+    522a:	0c03      	bf      	0x5230	// 5230 <button_handler+0xf0>
+    522c:	6c13      	mov      	r0, r4
+    522e:	7bcd      	jsr      	r3
+			handle->state = 5;
+    5230:	8463      	ld.b      	r3, (r4, 0x3)
+    5232:	3207      	movi      	r2, 7
+    5234:	68c9      	andn      	r3, r2
+    5236:	3ba0      	bseti      	r3, 0
+    5238:	3ba2      	bseti      	r3, 2
+    523a:	07d2      	br      	0x51de	// 51de <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    523c:	8463      	ld.b      	r3, (r4, 0x3)
+    523e:	4359      	lsli      	r2, r3, 25
+    5240:	4a5f      	lsri      	r2, r2, 31
+    5242:	4b67      	lsri      	r3, r3, 7
+    5244:	648e      	cmpne      	r3, r2
+    5246:	0fd2      	bf      	0x51ea	// 51ea <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    5248:	8462      	ld.b      	r3, (r4, 0x2)
+    524a:	320f      	movi      	r2, 15
+    524c:	68c8      	and      	r3, r2
+    524e:	3270      	movi      	r2, 112
+    5250:	6cc8      	or      	r3, r2
+    5252:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    5254:	946a      	ld.w      	r3, (r4, 0x28)
+    5256:	3b40      	cmpnei      	r3, 0
+    5258:	0fa0      	bf      	0x5198	// 5198 <button_handler+0x58>
+    525a:	6c13      	mov      	r0, r4
+    525c:	7bcd      	jsr      	r3
+    525e:	079d      	br      	0x5198	// 5198 <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00005260 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    5260:	1068      	lrw      	r3, 0x200002ec	// 5280 <button_start+0x20>
+    5262:	9320      	ld.w      	r1, (r3, 0x0)
+    5264:	6c87      	mov      	r2, r1
+	while(target) {
+    5266:	3a40      	cmpnei      	r2, 0
+    5268:	0805      	bt      	0x5272	// 5272 <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    526a:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    526c:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    526e:	3000      	movi      	r0, 0
+}
+    5270:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    5272:	640a      	cmpne      	r2, r0
+    5274:	0c03      	bf      	0x527a	// 527a <button_start+0x1a>
+		target = target->next;
+    5276:	924b      	ld.w      	r2, (r2, 0x2c)
+    5278:	07f7      	br      	0x5266	// 5266 <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    527a:	3000      	movi      	r0, 0
+    527c:	2800      	subi      	r0, 1
+    527e:	07f9      	br      	0x5270	// 5270 <button_start+0x10>
+    5280:	200002ec 	.long	0x200002ec
+
+Disassembly of section .text.button_ticks:
+
+00005284 <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    5284:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    5286:	1066      	lrw      	r3, 0x200002ec	// 529c <button_ticks+0x18>
+    5288:	9380      	ld.w      	r4, (r3, 0x0)
+    528a:	3c40      	cmpnei      	r4, 0
+    528c:	0802      	bt      	0x5290	// 5290 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    528e:	1491      	pop      	r4, r15
+		button_handler(target);
+    5290:	6c13      	mov      	r0, r4
+    5292:	e3ffff57 	bsr      	0x5140	// 5140 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    5296:	948b      	ld.w      	r4, (r4, 0x2c)
+    5298:	07f9      	br      	0x528a	// 528a <button_ticks+0x6>
+    529a:	0000      	bkpt
+    529c:	200002ec 	.long	0x200002ec
+
+Disassembly of section .text.read_button_GPIO:
+
+000052a0 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    52a0:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    52a2:	1064      	lrw      	r3, 0x2000004c	// 52b0 <read_button_GPIO+0x10>
+{
+    52a4:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    52a6:	9300      	ld.w      	r0, (r3, 0x0)
+    52a8:	e3fff066 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+	return state;
+    52ac:	1490      	pop      	r15
+    52ae:	0000      	bkpt
+    52b0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+000052b4 <TK_Sampling_prog>:
+    52b4:	14c4      	push      	r4-r7
+    52b6:	1072      	lrw      	r3, 0x20000054	// 52fc <TK_Sampling_prog+0x48>
+    52b8:	1012      	lrw      	r0, 0x2000072e	// 5300 <TK_Sampling_prog+0x4c>
+    52ba:	1093      	lrw      	r4, 0x2000059f	// 5304 <TK_Sampling_prog+0x50>
+    52bc:	6d83      	mov      	r6, r0
+    52be:	93a0      	ld.w      	r5, (r3, 0x0)
+    52c0:	3300      	movi      	r3, 0
+    52c2:	4342      	lsli      	r2, r3, 2
+    52c4:	6094      	addu      	r2, r5
+    52c6:	9220      	ld.w      	r1, (r2, 0x0)
+    52c8:	4341      	lsli      	r2, r3, 1
+    52ca:	6080      	addu      	r2, r0
+    52cc:	7445      	zexth      	r1, r1
+    52ce:	aa20      	st.h      	r1, (r2, 0x0)
+    52d0:	8440      	ld.b      	r2, (r4, 0x0)
+    52d2:	3a41      	cmpnei      	r2, 1
+    52d4:	080f      	bt      	0x52f2	// 52f2 <TK_Sampling_prog+0x3e>
+    52d6:	3300      	movi      	r3, 0
+    52d8:	10ec      	lrw      	r7, 0x20000488	// 5308 <TK_Sampling_prog+0x54>
+    52da:	4341      	lsli      	r2, r3, 1
+    52dc:	5e28      	addu      	r1, r6, r2
+    52de:	8920      	ld.h      	r1, (r1, 0x0)
+    52e0:	2300      	addi      	r3, 1
+    52e2:	7445      	zexth      	r1, r1
+    52e4:	609c      	addu      	r2, r7
+    52e6:	3b51      	cmpnei      	r3, 17
+    52e8:	aa20      	st.h      	r1, (r2, 0x0)
+    52ea:	0bf8      	bt      	0x52da	// 52da <TK_Sampling_prog+0x26>
+    52ec:	3300      	movi      	r3, 0
+    52ee:	a460      	st.b      	r3, (r4, 0x0)
+    52f0:	3311      	movi      	r3, 17
+    52f2:	2300      	addi      	r3, 1
+    52f4:	74cc      	zextb      	r3, r3
+    52f6:	3b10      	cmphsi      	r3, 17
+    52f8:	0fe5      	bf      	0x52c2	// 52c2 <TK_Sampling_prog+0xe>
+    52fa:	1484      	pop      	r4-r7
+    52fc:	20000054 	.long	0x20000054
+    5300:	2000072e 	.long	0x2000072e
+    5304:	2000059f 	.long	0x2000059f
+    5308:	20000488 	.long	0x20000488
+
+Disassembly of section .text.TKEYIntHandler:
+
+0000530c <TKEYIntHandler>:
+    530c:	1460      	nie
+    530e:	1462      	ipush
+    5310:	14d1      	push      	r4, r15
+    5312:	109e      	lrw      	r4, 0x2000006c	// 5388 <TKEYIntHandler+0x7c>
+    5314:	9460      	ld.w      	r3, (r4, 0x0)
+    5316:	3b40      	cmpnei      	r3, 0
+    5318:	080b      	bt      	0x532e	// 532e <TKEYIntHandler+0x22>
+    531a:	3301      	movi      	r3, 1
+    531c:	b460      	st.w      	r3, (r4, 0x0)
+    531e:	107c      	lrw      	r3, 0x2000051c	// 538c <TKEYIntHandler+0x80>
+    5320:	8360      	ld.b      	r3, (r3, 0x0)
+    5322:	3b41      	cmpnei      	r3, 1
+    5324:	0805      	bt      	0x532e	// 532e <TKEYIntHandler+0x22>
+    5326:	e3ffffc7 	bsr      	0x52b4	// 52b4 <TK_Sampling_prog>
+    532a:	3301      	movi      	r3, 1
+    532c:	a464      	st.b      	r3, (r4, 0x4)
+    532e:	1079      	lrw      	r3, 0x20000058	// 5390 <TKEYIntHandler+0x84>
+    5330:	3101      	movi      	r1, 1
+    5332:	9360      	ld.w      	r3, (r3, 0x0)
+    5334:	934a      	ld.w      	r2, (r3, 0x28)
+    5336:	6884      	and      	r2, r1
+    5338:	3a40      	cmpnei      	r2, 0
+    533a:	0c02      	bf      	0x533e	// 533e <TKEYIntHandler+0x32>
+    533c:	b32c      	st.w      	r1, (r3, 0x30)
+    533e:	934a      	ld.w      	r2, (r3, 0x28)
+    5340:	3102      	movi      	r1, 2
+    5342:	6884      	and      	r2, r1
+    5344:	3a40      	cmpnei      	r2, 0
+    5346:	0c02      	bf      	0x534a	// 534a <TKEYIntHandler+0x3e>
+    5348:	b32c      	st.w      	r1, (r3, 0x30)
+    534a:	934a      	ld.w      	r2, (r3, 0x28)
+    534c:	3104      	movi      	r1, 4
+    534e:	6884      	and      	r2, r1
+    5350:	3a40      	cmpnei      	r2, 0
+    5352:	0c02      	bf      	0x5356	// 5356 <TKEYIntHandler+0x4a>
+    5354:	b32c      	st.w      	r1, (r3, 0x30)
+    5356:	934a      	ld.w      	r2, (r3, 0x28)
+    5358:	3108      	movi      	r1, 8
+    535a:	6884      	and      	r2, r1
+    535c:	3a40      	cmpnei      	r2, 0
+    535e:	0c02      	bf      	0x5362	// 5362 <TKEYIntHandler+0x56>
+    5360:	b32c      	st.w      	r1, (r3, 0x30)
+    5362:	934a      	ld.w      	r2, (r3, 0x28)
+    5364:	3110      	movi      	r1, 16
+    5366:	6884      	and      	r2, r1
+    5368:	3a40      	cmpnei      	r2, 0
+    536a:	0c02      	bf      	0x536e	// 536e <TKEYIntHandler+0x62>
+    536c:	b32c      	st.w      	r1, (r3, 0x30)
+    536e:	934a      	ld.w      	r2, (r3, 0x28)
+    5370:	3120      	movi      	r1, 32
+    5372:	6884      	and      	r2, r1
+    5374:	3a40      	cmpnei      	r2, 0
+    5376:	0c02      	bf      	0x537a	// 537a <TKEYIntHandler+0x6e>
+    5378:	b32c      	st.w      	r1, (r3, 0x30)
+    537a:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    537e:	9880      	ld.w      	r4, (r14, 0x0)
+    5380:	1402      	addi      	r14, r14, 8
+    5382:	1463      	ipop
+    5384:	1461      	nir
+    5386:	0000      	bkpt
+    5388:	2000006c 	.long	0x2000006c
+    538c:	2000051c 	.long	0x2000051c
+    5390:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+00005394 <get_key_number>:
+    5394:	14c2      	push      	r4-r5
+    5396:	3200      	movi      	r2, 0
+    5398:	3000      	movi      	r0, 0
+    539a:	1088      	lrw      	r4, 0x200005bc	// 53b8 <get_key_number+0x24>
+    539c:	3501      	movi      	r5, 1
+    539e:	3120      	movi      	r1, 32
+    53a0:	9460      	ld.w      	r3, (r4, 0x0)
+    53a2:	70c9      	lsr      	r3, r2
+    53a4:	68d4      	and      	r3, r5
+    53a6:	3b40      	cmpnei      	r3, 0
+    53a8:	0c02      	bf      	0x53ac	// 53ac <get_key_number+0x18>
+    53aa:	2000      	addi      	r0, 1
+    53ac:	2200      	addi      	r2, 1
+    53ae:	644a      	cmpne      	r2, r1
+    53b0:	0bf8      	bt      	0x53a0	// 53a0 <get_key_number+0xc>
+    53b2:	7400      	zextb      	r0, r0
+    53b4:	1482      	pop      	r4-r5
+    53b6:	0000      	bkpt
+    53b8:	200005bc 	.long	0x200005bc
+
+Disassembly of section .text.TK_Scan_Start:
+
+000053bc <TK_Scan_Start>:
+    53bc:	1046      	lrw      	r2, 0x2000006c	// 53d4 <TK_Scan_Start+0x18>
+    53be:	8264      	ld.b      	r3, (r2, 0x4)
+    53c0:	74cc      	zextb      	r3, r3
+    53c2:	3b41      	cmpnei      	r3, 1
+    53c4:	0807      	bt      	0x53d2	// 53d2 <TK_Scan_Start+0x16>
+    53c6:	1025      	lrw      	r1, 0x20000058	// 53d8 <TK_Scan_Start+0x1c>
+    53c8:	9120      	ld.w      	r1, (r1, 0x0)
+    53ca:	b162      	st.w      	r3, (r1, 0x8)
+    53cc:	3300      	movi      	r3, 0
+    53ce:	b260      	st.w      	r3, (r2, 0x0)
+    53d0:	a264      	st.b      	r3, (r2, 0x4)
+    53d2:	783c      	jmp      	r15
+    53d4:	2000006c 	.long	0x2000006c
+    53d8:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000053dc <TK_Keymap_prog>:
+    53dc:	14d4      	push      	r4-r7, r15
+    53de:	1425      	subi      	r14, r14, 20
+    53e0:	1271      	lrw      	r3, 0x2000031c	// 5524 <TK_Keymap_prog+0x148>
+    53e2:	8360      	ld.b      	r3, (r3, 0x0)
+    53e4:	b860      	st.w      	r3, (r14, 0x0)
+    53e6:	3400      	movi      	r4, 0
+    53e8:	1270      	lrw      	r3, 0x200002f0	// 5528 <TK_Keymap_prog+0x14c>
+    53ea:	8360      	ld.b      	r3, (r3, 0x0)
+    53ec:	b861      	st.w      	r3, (r14, 0x4)
+    53ee:	12f0      	lrw      	r7, 0x20000532	// 552c <TK_Keymap_prog+0x150>
+    53f0:	1270      	lrw      	r3, 0x200002f9	// 5530 <TK_Keymap_prog+0x154>
+    53f2:	83a0      	ld.b      	r5, (r3, 0x0)
+    53f4:	1270      	lrw      	r3, 0x200002f8	// 5534 <TK_Keymap_prog+0x158>
+    53f6:	8360      	ld.b      	r3, (r3, 0x0)
+    53f8:	b862      	st.w      	r3, (r14, 0x8)
+    53fa:	6d9f      	mov      	r6, r7
+    53fc:	126f      	lrw      	r3, 0x2000072e	// 5538 <TK_Keymap_prog+0x15c>
+    53fe:	b863      	st.w      	r3, (r14, 0xc)
+    5400:	4461      	lsli      	r3, r4, 1
+    5402:	9843      	ld.w      	r2, (r14, 0xc)
+    5404:	608c      	addu      	r2, r3
+    5406:	122e      	lrw      	r1, 0x20000488	// 553c <TK_Keymap_prog+0x160>
+    5408:	604c      	addu      	r1, r3
+    540a:	8a40      	ld.h      	r2, (r2, 0x0)
+    540c:	8920      	ld.h      	r1, (r1, 0x0)
+    540e:	6086      	subu      	r2, r1
+    5410:	748b      	sexth      	r2, r2
+    5412:	5f2c      	addu      	r1, r7, r3
+    5414:	a940      	st.h      	r2, (r1, 0x0)
+    5416:	8940      	ld.h      	r2, (r1, 0x0)
+    5418:	748b      	sexth      	r2, r2
+    541a:	3adf      	btsti      	r2, 31
+    541c:	1249      	lrw      	r2, 0x200006ea	// 5540 <TK_Keymap_prog+0x164>
+    541e:	608c      	addu      	r2, r3
+    5420:	0c37      	bf      	0x548e	// 548e <TK_Keymap_prog+0xb2>
+    5422:	3100      	movi      	r1, 0
+    5424:	aa20      	st.h      	r1, (r2, 0x0)
+    5426:	9840      	ld.w      	r2, (r14, 0x0)
+    5428:	3a01      	cmphsi      	r2, 2
+    542a:	0c6d      	bf      	0x5504	// 5504 <TK_Keymap_prog+0x128>
+    542c:	4461      	lsli      	r3, r4, 1
+    542e:	5e2c      	addu      	r1, r6, r3
+    5430:	1205      	lrw      	r0, 0x2000034a	// 5544 <TK_Keymap_prog+0x168>
+    5432:	8940      	ld.h      	r2, (r1, 0x0)
+    5434:	60c0      	addu      	r3, r0
+    5436:	748b      	sexth      	r2, r2
+    5438:	8b60      	ld.h      	r3, (r3, 0x0)
+    543a:	648d      	cmplt      	r3, r2
+    543c:	9840      	ld.w      	r2, (r14, 0x0)
+    543e:	7cc8      	mult      	r3, r2
+    5440:	0c2a      	bf      	0x5494	// 5494 <TK_Keymap_prog+0xb8>
+    5442:	8940      	ld.h      	r2, (r1, 0x0)
+    5444:	748b      	sexth      	r2, r2
+    5446:	64c9      	cmplt      	r2, r3
+    5448:	0c26      	bf      	0x5494	// 5494 <TK_Keymap_prog+0xb8>
+    544a:	1240      	lrw      	r2, 0x20000520	// 5548 <TK_Keymap_prog+0x16c>
+    544c:	6090      	addu      	r2, r4
+    544e:	8260      	ld.b      	r3, (r2, 0x0)
+    5450:	2300      	addi      	r3, 1
+    5452:	74cc      	zextb      	r3, r3
+    5454:	a260      	st.b      	r3, (r2, 0x0)
+    5456:	3100      	movi      	r1, 0
+    5458:	117d      	lrw      	r3, 0x20000506	// 554c <TK_Keymap_prog+0x170>
+    545a:	60d0      	addu      	r3, r4
+    545c:	a320      	st.b      	r1, (r3, 0x0)
+    545e:	117d      	lrw      	r3, 0x200005e2	// 5550 <TK_Keymap_prog+0x174>
+    5460:	60d0      	addu      	r3, r4
+    5462:	a320      	st.b      	r1, (r3, 0x0)
+    5464:	117c      	lrw      	r3, 0x2000065c	// 5554 <TK_Keymap_prog+0x178>
+    5466:	60d0      	addu      	r3, r4
+    5468:	a320      	st.b      	r1, (r3, 0x0)
+    546a:	8260      	ld.b      	r3, (r2, 0x0)
+    546c:	9821      	ld.w      	r1, (r14, 0x4)
+    546e:	64c4      	cmphs      	r1, r3
+    5470:	081f      	bt      	0x54ae	// 54ae <TK_Keymap_prog+0xd2>
+    5472:	3d40      	cmpnei      	r5, 0
+    5474:	0852      	bt      	0x5518	// 5518 <TK_Keymap_prog+0x13c>
+    5476:	1139      	lrw      	r1, 0x20000518	// 5558 <TK_Keymap_prog+0x17c>
+    5478:	9160      	ld.w      	r3, (r1, 0x0)
+    547a:	3b40      	cmpnei      	r3, 0
+    547c:	0806      	bt      	0x5488	// 5488 <TK_Keymap_prog+0xac>
+    547e:	9100      	ld.w      	r0, (r1, 0x0)
+    5480:	3301      	movi      	r3, 1
+    5482:	70d0      	lsl      	r3, r4
+    5484:	6cc0      	or      	r3, r0
+    5486:	b160      	st.w      	r3, (r1, 0x0)
+    5488:	3300      	movi      	r3, 0
+    548a:	a260      	st.b      	r3, (r2, 0x0)
+    548c:	0411      	br      	0x54ae	// 54ae <TK_Keymap_prog+0xd2>
+    548e:	8920      	ld.h      	r1, (r1, 0x0)
+    5490:	7445      	zexth      	r1, r1
+    5492:	07c9      	br      	0x5424	// 5424 <TK_Keymap_prog+0x48>
+    5494:	4441      	lsli      	r2, r4, 1
+    5496:	6098      	addu      	r2, r6
+    5498:	8a40      	ld.h      	r2, (r2, 0x0)
+    549a:	748b      	sexth      	r2, r2
+    549c:	648d      	cmplt      	r3, r2
+    549e:	0c08      	bf      	0x54ae	// 54ae <TK_Keymap_prog+0xd2>
+    54a0:	3300      	movi      	r3, 0
+    54a2:	114e      	lrw      	r2, 0x20000518	// 5558 <TK_Keymap_prog+0x17c>
+    54a4:	2b01      	subi      	r3, 2
+    54a6:	9220      	ld.w      	r1, (r2, 0x0)
+    54a8:	70d3      	rotl      	r3, r4
+    54aa:	68c4      	and      	r3, r1
+    54ac:	b260      	st.w      	r3, (r2, 0x0)
+    54ae:	4441      	lsli      	r2, r4, 1
+    54b0:	5e68      	addu      	r3, r6, r2
+    54b2:	8b60      	ld.h      	r3, (r3, 0x0)
+    54b4:	74cf      	sexth      	r3, r3
+    54b6:	b864      	st.w      	r3, (r14, 0x10)
+    54b8:	3105      	movi      	r1, 5
+    54ba:	1163      	lrw      	r3, 0x2000034a	// 5544 <TK_Keymap_prog+0x168>
+    54bc:	608c      	addu      	r2, r3
+    54be:	8a00      	ld.h      	r0, (r2, 0x0)
+    54c0:	4002      	lsli      	r0, r0, 2
+    54c2:	e3fff795 	bsr      	0x43ec	// 43ec <__divsi3>
+    54c6:	9864      	ld.w      	r3, (r14, 0x10)
+    54c8:	640d      	cmplt      	r3, r0
+    54ca:	0c18      	bf      	0x54fa	// 54fa <TK_Keymap_prog+0x11e>
+    54cc:	1140      	lrw      	r2, 0x20000506	// 554c <TK_Keymap_prog+0x170>
+    54ce:	6090      	addu      	r2, r4
+    54d0:	8260      	ld.b      	r3, (r2, 0x0)
+    54d2:	2300      	addi      	r3, 1
+    54d4:	74cc      	zextb      	r3, r3
+    54d6:	a260      	st.b      	r3, (r2, 0x0)
+    54d8:	3100      	movi      	r1, 0
+    54da:	107c      	lrw      	r3, 0x20000520	// 5548 <TK_Keymap_prog+0x16c>
+    54dc:	60d0      	addu      	r3, r4
+    54de:	a320      	st.b      	r1, (r3, 0x0)
+    54e0:	8260      	ld.b      	r3, (r2, 0x0)
+    54e2:	9822      	ld.w      	r1, (r14, 0x8)
+    54e4:	64c4      	cmphs      	r1, r3
+    54e6:	080a      	bt      	0x54fa	// 54fa <TK_Keymap_prog+0x11e>
+    54e8:	3300      	movi      	r3, 0
+    54ea:	103c      	lrw      	r1, 0x20000518	// 5558 <TK_Keymap_prog+0x17c>
+    54ec:	2b01      	subi      	r3, 2
+    54ee:	9100      	ld.w      	r0, (r1, 0x0)
+    54f0:	70d3      	rotl      	r3, r4
+    54f2:	68c0      	and      	r3, r0
+    54f4:	b160      	st.w      	r3, (r1, 0x0)
+    54f6:	3300      	movi      	r3, 0
+    54f8:	a260      	st.b      	r3, (r2, 0x0)
+    54fa:	2400      	addi      	r4, 1
+    54fc:	3c51      	cmpnei      	r4, 17
+    54fe:	0b81      	bt      	0x5400	// 5400 <TK_Keymap_prog+0x24>
+    5500:	1405      	addi      	r14, r14, 20
+    5502:	1494      	pop      	r4-r7, r15
+    5504:	60d8      	addu      	r3, r6
+    5506:	4441      	lsli      	r2, r4, 1
+    5508:	102f      	lrw      	r1, 0x2000034a	// 5544 <TK_Keymap_prog+0x168>
+    550a:	8b60      	ld.h      	r3, (r3, 0x0)
+    550c:	6084      	addu      	r2, r1
+    550e:	74cf      	sexth      	r3, r3
+    5510:	8a40      	ld.h      	r2, (r2, 0x0)
+    5512:	64c9      	cmplt      	r2, r3
+    5514:	0fcd      	bf      	0x54ae	// 54ae <TK_Keymap_prog+0xd2>
+    5516:	079a      	br      	0x544a	// 544a <TK_Keymap_prog+0x6e>
+    5518:	3d41      	cmpnei      	r5, 1
+    551a:	0bb7      	bt      	0x5488	// 5488 <TK_Keymap_prog+0xac>
+    551c:	102f      	lrw      	r1, 0x20000518	// 5558 <TK_Keymap_prog+0x17c>
+    551e:	6cd7      	mov      	r3, r5
+    5520:	9100      	ld.w      	r0, (r1, 0x0)
+    5522:	07b0      	br      	0x5482	// 5482 <TK_Keymap_prog+0xa6>
+    5524:	2000031c 	.long	0x2000031c
+    5528:	200002f0 	.long	0x200002f0
+    552c:	20000532 	.long	0x20000532
+    5530:	200002f9 	.long	0x200002f9
+    5534:	200002f8 	.long	0x200002f8
+    5538:	2000072e 	.long	0x2000072e
+    553c:	20000488 	.long	0x20000488
+    5540:	200006ea 	.long	0x200006ea
+    5544:	2000034a 	.long	0x2000034a
+    5548:	20000520 	.long	0x20000520
+    554c:	20000506 	.long	0x20000506
+    5550:	200005e2 	.long	0x200005e2
+    5554:	2000065c 	.long	0x2000065c
+    5558:	20000518 	.long	0x20000518
+
+Disassembly of section .text.TK_overflow_predict:
+
+0000555c <TK_overflow_predict>:
+    555c:	14d4      	push      	r4-r7, r15
+    555e:	1421      	subi      	r14, r14, 4
+    5560:	11d9      	lrw      	r6, 0x2000006c	// 5644 <TK_overflow_predict+0xe8>
+    5562:	8665      	ld.b      	r3, (r6, 0x5)
+    5564:	3b41      	cmpnei      	r3, 1
+    5566:	085f      	bt      	0x5624	// 5624 <TK_overflow_predict+0xc8>
+    5568:	1158      	lrw      	r2, 0x20000638	// 5648 <TK_overflow_predict+0xec>
+    556a:	8260      	ld.b      	r3, (r2, 0x0)
+    556c:	2300      	addi      	r3, 1
+    556e:	74cc      	zextb      	r3, r3
+    5570:	a260      	st.b      	r3, (r2, 0x0)
+    5572:	8260      	ld.b      	r3, (r2, 0x0)
+    5574:	1136      	lrw      	r1, 0x2000031d	// 564c <TK_overflow_predict+0xf0>
+    5576:	8120      	ld.b      	r1, (r1, 0x0)
+    5578:	64c4      	cmphs      	r1, r3
+    557a:	0855      	bt      	0x5624	// 5624 <TK_overflow_predict+0xc8>
+    557c:	3300      	movi      	r3, 0
+    557e:	a260      	st.b      	r3, (r2, 0x0)
+    5580:	3500      	movi      	r5, 0
+    5582:	11f4      	lrw      	r7, 0x20000320	// 5650 <TK_overflow_predict+0xf4>
+    5584:	2605      	addi      	r6, 6
+    5586:	9760      	ld.w      	r3, (r7, 0x0)
+    5588:	70d5      	lsr      	r3, r5
+    558a:	3201      	movi      	r2, 1
+    558c:	68c8      	and      	r3, r2
+    558e:	3b40      	cmpnei      	r3, 0
+    5590:	0c34      	bf      	0x55f8	// 55f8 <TK_overflow_predict+0x9c>
+    5592:	4581      	lsli      	r4, r5, 1
+    5594:	5e70      	addu      	r3, r6, r4
+    5596:	8b00      	ld.h      	r0, (r3, 0x0)
+    5598:	e3ffe004 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    559c:	6cc7      	mov      	r3, r1
+    559e:	3180      	movi      	r1, 128
+    55a0:	6c83      	mov      	r2, r0
+    55a2:	4137      	lsli      	r1, r1, 23
+    55a4:	3000      	movi      	r0, 0
+    55a6:	e3ffd607 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    55aa:	116b      	lrw      	r3, 0x20000326	// 5654 <TK_overflow_predict+0xf8>
+    55ac:	60d0      	addu      	r3, r4
+    55ae:	8b60      	ld.h      	r3, (r3, 0x0)
+    55b0:	4364      	lsli      	r3, r3, 4
+    55b2:	230e      	addi      	r3, 15
+    55b4:	b860      	st.w      	r3, (r14, 0x0)
+    55b6:	e3ffdbad 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    55ba:	9860      	ld.w      	r3, (r14, 0x0)
+    55bc:	7cc0      	mult      	r3, r0
+    55be:	1147      	lrw      	r2, 0x200006c8	// 5658 <TK_overflow_predict+0xfc>
+    55c0:	740d      	zexth      	r0, r3
+    55c2:	6090      	addu      	r2, r4
+    55c4:	1166      	lrw      	r3, 0x2000072e	// 565c <TK_overflow_predict+0x100>
+    55c6:	60d0      	addu      	r3, r4
+    55c8:	aa00      	st.h      	r0, (r2, 0x0)
+    55ca:	8b60      	ld.h      	r3, (r3, 0x0)
+    55cc:	8a00      	ld.h      	r0, (r2, 0x0)
+    55ce:	7401      	zexth      	r0, r0
+    55d0:	325f      	movi      	r2, 95
+    55d2:	74cd      	zexth      	r3, r3
+    55d4:	7c08      	mult      	r0, r2
+    55d6:	3164      	movi      	r1, 100
+    55d8:	b860      	st.w      	r3, (r14, 0x0)
+    55da:	e3fff709 	bsr      	0x43ec	// 43ec <__divsi3>
+    55de:	9860      	ld.w      	r3, (r14, 0x0)
+    55e0:	64c1      	cmplt      	r0, r3
+    55e2:	0c0b      	bf      	0x55f8	// 55f8 <TK_overflow_predict+0x9c>
+    55e4:	107f      	lrw      	r3, 0x200002fa	// 5660 <TK_overflow_predict+0x104>
+    55e6:	610c      	addu      	r4, r3
+    55e8:	8c60      	ld.h      	r3, (r4, 0x0)
+    55ea:	3b06      	cmphsi      	r3, 7
+    55ec:	0806      	bt      	0x55f8	// 55f8 <TK_overflow_predict+0x9c>
+    55ee:	2300      	addi      	r3, 1
+    55f0:	ac60      	st.h      	r3, (r4, 0x0)
+    55f2:	3201      	movi      	r2, 1
+    55f4:	107c      	lrw      	r3, 0x2000058d	// 5664 <TK_overflow_predict+0x108>
+    55f6:	a340      	st.b      	r2, (r3, 0x0)
+    55f8:	2500      	addi      	r5, 1
+    55fa:	3d51      	cmpnei      	r5, 17
+    55fc:	0bc5      	bt      	0x5586	// 5586 <TK_overflow_predict+0x2a>
+    55fe:	107a      	lrw      	r3, 0x2000058d	// 5664 <TK_overflow_predict+0x108>
+    5600:	8340      	ld.b      	r2, (r3, 0x0)
+    5602:	3a41      	cmpnei      	r2, 1
+    5604:	0810      	bt      	0x5624	// 5624 <TK_overflow_predict+0xc8>
+    5606:	3200      	movi      	r2, 0
+    5608:	a340      	st.b      	r2, (r3, 0x0)
+    560a:	3200      	movi      	r2, 0
+    560c:	1077      	lrw      	r3, 0x20000058	// 5668 <TK_overflow_predict+0x10c>
+    560e:	1018      	lrw      	r0, 0x2000065b	// 566c <TK_overflow_predict+0x110>
+    5610:	10b8      	lrw      	r5, 0x20000694	// 5670 <TK_overflow_predict+0x114>
+    5612:	10d4      	lrw      	r6, 0x200002fa	// 5660 <TK_overflow_predict+0x104>
+    5614:	9360      	ld.w      	r3, (r3, 0x0)
+    5616:	b342      	st.w      	r2, (r3, 0x8)
+    5618:	1077      	lrw      	r3, 0x20000054	// 5674 <TK_overflow_predict+0x118>
+    561a:	9380      	ld.w      	r4, (r3, 0x0)
+    561c:	3300      	movi      	r3, 0
+    561e:	8040      	ld.b      	r2, (r0, 0x0)
+    5620:	648c      	cmphs      	r3, r2
+    5622:	0c03      	bf      	0x5628	// 5628 <TK_overflow_predict+0xcc>
+    5624:	1401      	addi      	r14, r14, 4
+    5626:	1494      	pop      	r4-r7, r15
+    5628:	5d4c      	addu      	r2, r5, r3
+    562a:	8240      	ld.b      	r2, (r2, 0x0)
+    562c:	4241      	lsli      	r2, r2, 1
+    562e:	4322      	lsli      	r1, r3, 2
+    5630:	6098      	addu      	r2, r6
+    5632:	6050      	addu      	r1, r4
+    5634:	8a40      	ld.h      	r2, (r2, 0x0)
+    5636:	91f2      	ld.w      	r7, (r1, 0x48)
+    5638:	4254      	lsli      	r2, r2, 20
+    563a:	6c9c      	or      	r2, r7
+    563c:	2300      	addi      	r3, 1
+    563e:	b152      	st.w      	r2, (r1, 0x48)
+    5640:	74cc      	zextb      	r3, r3
+    5642:	07ee      	br      	0x561e	// 561e <TK_overflow_predict+0xc2>
+    5644:	2000006c 	.long	0x2000006c
+    5648:	20000638 	.long	0x20000638
+    564c:	2000031d 	.long	0x2000031d
+    5650:	20000320 	.long	0x20000320
+    5654:	20000326 	.long	0x20000326
+    5658:	200006c8 	.long	0x200006c8
+    565c:	2000072e 	.long	0x2000072e
+    5660:	200002fa 	.long	0x200002fa
+    5664:	2000058d 	.long	0x2000058d
+    5668:	20000058 	.long	0x20000058
+    566c:	2000065b 	.long	0x2000065b
+    5670:	20000694 	.long	0x20000694
+    5674:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00005678 <TK_Baseline_tracking>:
+    5678:	14c4      	push      	r4-r7
+    567a:	1422      	subi      	r14, r14, 8
+    567c:	1348      	lrw      	r2, 0x200005ba	// 581c <TK_Baseline_tracking+0x1a4>
+    567e:	8260      	ld.b      	r3, (r2, 0x0)
+    5680:	2300      	addi      	r3, 1
+    5682:	74cc      	zextb      	r3, r3
+    5684:	a260      	st.b      	r3, (r2, 0x0)
+    5686:	8260      	ld.b      	r3, (r2, 0x0)
+    5688:	1326      	lrw      	r1, 0x2000031d	// 5820 <TK_Baseline_tracking+0x1a8>
+    568a:	8120      	ld.b      	r1, (r1, 0x0)
+    568c:	644c      	cmphs      	r3, r1
+    568e:	0cad      	bf      	0x57e8	// 57e8 <TK_Baseline_tracking+0x170>
+    5690:	3300      	movi      	r3, 0
+    5692:	a260      	st.b      	r3, (r2, 0x0)
+    5694:	1364      	lrw      	r3, 0x20000518	// 5824 <TK_Baseline_tracking+0x1ac>
+    5696:	9360      	ld.w      	r3, (r3, 0x0)
+    5698:	3b40      	cmpnei      	r3, 0
+    569a:	08a7      	bt      	0x57e8	// 57e8 <TK_Baseline_tracking+0x170>
+    569c:	1323      	lrw      	r1, 0x20000532	// 5828 <TK_Baseline_tracking+0x1b0>
+    569e:	6dc7      	mov      	r7, r1
+    56a0:	b820      	st.w      	r1, (r14, 0x0)
+    56a2:	3200      	movi      	r2, 0
+    56a4:	1362      	lrw      	r3, 0x2000034a	// 582c <TK_Baseline_tracking+0x1b4>
+    56a6:	1323      	lrw      	r1, 0x20000488	// 5830 <TK_Baseline_tracking+0x1b8>
+    56a8:	4201      	lsli      	r0, r2, 1
+    56aa:	9880      	ld.w      	r4, (r14, 0x0)
+    56ac:	6100      	addu      	r4, r0
+    56ae:	8c80      	ld.h      	r4, (r4, 0x0)
+    56b0:	7513      	sexth      	r4, r4
+    56b2:	3cdf      	btsti      	r4, 31
+    56b4:	0c27      	bf      	0x5702	// 5702 <TK_Baseline_tracking+0x8a>
+    56b6:	13a0      	lrw      	r5, 0x2000072e	// 5834 <TK_Baseline_tracking+0x1bc>
+    56b8:	5980      	addu      	r4, r1, r0
+    56ba:	6014      	addu      	r0, r5
+    56bc:	b881      	st.w      	r4, (r14, 0x4)
+    56be:	8c80      	ld.h      	r4, (r4, 0x0)
+    56c0:	88c0      	ld.h      	r6, (r0, 0x0)
+    56c2:	7511      	zexth      	r4, r4
+    56c4:	7599      	zexth      	r6, r6
+    56c6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    56c8:	611a      	subu      	r4, r6
+    56ca:	6551      	cmplt      	r4, r5
+    56cc:	081b      	bt      	0x5702	// 5702 <TK_Baseline_tracking+0x8a>
+    56ce:	9881      	ld.w      	r4, (r14, 0x4)
+    56d0:	8c80      	ld.h      	r4, (r4, 0x0)
+    56d2:	8800      	ld.h      	r0, (r0, 0x0)
+    56d4:	7511      	zexth      	r4, r4
+    56d6:	7401      	zexth      	r0, r0
+    56d8:	5c01      	subu      	r0, r4, r0
+    56da:	4581      	lsli      	r4, r5, 1
+    56dc:	6150      	addu      	r5, r4
+    56de:	6541      	cmplt      	r0, r5
+    56e0:	0c11      	bf      	0x5702	// 5702 <TK_Baseline_tracking+0x8a>
+    56e2:	1296      	lrw      	r4, 0x2000065c	// 5838 <TK_Baseline_tracking+0x1c0>
+    56e4:	6108      	addu      	r4, r2
+    56e6:	8400      	ld.b      	r0, (r4, 0x0)
+    56e8:	2000      	addi      	r0, 1
+    56ea:	7400      	zextb      	r0, r0
+    56ec:	a400      	st.b      	r0, (r4, 0x0)
+    56ee:	1214      	lrw      	r0, 0x2000008c	// 583c <TK_Baseline_tracking+0x1c4>
+    56f0:	84a0      	ld.b      	r5, (r4, 0x0)
+    56f2:	8008      	ld.b      	r0, (r0, 0x8)
+    56f4:	6540      	cmphs      	r0, r5
+    56f6:	0806      	bt      	0x5702	// 5702 <TK_Baseline_tracking+0x8a>
+    56f8:	1212      	lrw      	r0, 0x2000059f	// 5840 <TK_Baseline_tracking+0x1c8>
+    56fa:	3501      	movi      	r5, 1
+    56fc:	a0a0      	st.b      	r5, (r0, 0x0)
+    56fe:	3000      	movi      	r0, 0
+    5700:	a400      	st.b      	r0, (r4, 0x0)
+    5702:	4201      	lsli      	r0, r2, 1
+    5704:	5f80      	addu      	r4, r7, r0
+    5706:	8c80      	ld.h      	r4, (r4, 0x0)
+    5708:	7513      	sexth      	r4, r4
+    570a:	3c20      	cmplti      	r4, 1
+    570c:	0870      	bt      	0x57ec	// 57ec <TK_Baseline_tracking+0x174>
+    570e:	128a      	lrw      	r4, 0x2000072e	// 5834 <TK_Baseline_tracking+0x1bc>
+    5710:	6100      	addu      	r4, r0
+    5712:	59a0      	addu      	r5, r1, r0
+    5714:	8c80      	ld.h      	r4, (r4, 0x0)
+    5716:	8da0      	ld.h      	r5, (r5, 0x0)
+    5718:	7555      	zexth      	r5, r5
+    571a:	7511      	zexth      	r4, r4
+    571c:	6116      	subu      	r4, r5
+    571e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    5720:	45a2      	lsli      	r5, r5, 2
+    5722:	6551      	cmplt      	r4, r5
+    5724:	0864      	bt      	0x57ec	// 57ec <TK_Baseline_tracking+0x174>
+    5726:	1288      	lrw      	r4, 0x200005e2	// 5844 <TK_Baseline_tracking+0x1cc>
+    5728:	6108      	addu      	r4, r2
+    572a:	84a0      	ld.b      	r5, (r4, 0x0)
+    572c:	2500      	addi      	r5, 1
+    572e:	7554      	zextb      	r5, r5
+    5730:	a4a0      	st.b      	r5, (r4, 0x0)
+    5732:	12a3      	lrw      	r5, 0x2000008c	// 583c <TK_Baseline_tracking+0x1c4>
+    5734:	84c0      	ld.b      	r6, (r4, 0x0)
+    5736:	85a9      	ld.b      	r5, (r5, 0x9)
+    5738:	6594      	cmphs      	r5, r6
+    573a:	0806      	bt      	0x5746	// 5746 <TK_Baseline_tracking+0xce>
+    573c:	12a1      	lrw      	r5, 0x2000059f	// 5840 <TK_Baseline_tracking+0x1c8>
+    573e:	3601      	movi      	r6, 1
+    5740:	a5c0      	st.b      	r6, (r5, 0x0)
+    5742:	3500      	movi      	r5, 0
+    5744:	a4a0      	st.b      	r5, (r4, 0x0)
+    5746:	5f80      	addu      	r4, r7, r0
+    5748:	8c80      	ld.h      	r4, (r4, 0x0)
+    574a:	7513      	sexth      	r4, r4
+    574c:	3cdf      	btsti      	r4, 31
+    574e:	0c10      	bf      	0x576e	// 576e <TK_Baseline_tracking+0xf6>
+    5750:	11d9      	lrw      	r6, 0x2000072e	// 5834 <TK_Baseline_tracking+0x1bc>
+    5752:	59a0      	addu      	r5, r1, r0
+    5754:	6180      	addu      	r6, r0
+    5756:	8d80      	ld.h      	r4, (r5, 0x0)
+    5758:	8ec0      	ld.h      	r6, (r6, 0x0)
+    575a:	7599      	zexth      	r6, r6
+    575c:	7511      	zexth      	r4, r4
+    575e:	611a      	subu      	r4, r6
+    5760:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5762:	6591      	cmplt      	r4, r6
+    5764:	0c05      	bf      	0x576e	// 576e <TK_Baseline_tracking+0xf6>
+    5766:	8d80      	ld.h      	r4, (r5, 0x0)
+    5768:	2c00      	subi      	r4, 1
+    576a:	7511      	zexth      	r4, r4
+    576c:	ad80      	st.h      	r4, (r5, 0x0)
+    576e:	5f80      	addu      	r4, r7, r0
+    5770:	8c80      	ld.h      	r4, (r4, 0x0)
+    5772:	7513      	sexth      	r4, r4
+    5774:	3cdf      	btsti      	r4, 31
+    5776:	0c11      	bf      	0x5798	// 5798 <TK_Baseline_tracking+0x120>
+    5778:	11cf      	lrw      	r6, 0x2000072e	// 5834 <TK_Baseline_tracking+0x1bc>
+    577a:	59a0      	addu      	r5, r1, r0
+    577c:	6180      	addu      	r6, r0
+    577e:	8d80      	ld.h      	r4, (r5, 0x0)
+    5780:	8ec0      	ld.h      	r6, (r6, 0x0)
+    5782:	7599      	zexth      	r6, r6
+    5784:	7511      	zexth      	r4, r4
+    5786:	611a      	subu      	r4, r6
+    5788:	8bc0      	ld.h      	r6, (r3, 0x0)
+    578a:	4ec1      	lsri      	r6, r6, 1
+    578c:	6591      	cmplt      	r4, r6
+    578e:	0805      	bt      	0x5798	// 5798 <TK_Baseline_tracking+0x120>
+    5790:	8d80      	ld.h      	r4, (r5, 0x0)
+    5792:	2c01      	subi      	r4, 2
+    5794:	7511      	zexth      	r4, r4
+    5796:	ad80      	st.h      	r4, (r5, 0x0)
+    5798:	5fa0      	addu      	r5, r7, r0
+    579a:	8d80      	ld.h      	r4, (r5, 0x0)
+    579c:	7513      	sexth      	r4, r4
+    579e:	3c20      	cmplti      	r4, 1
+    57a0:	080c      	bt      	0x57b8	// 57b8 <TK_Baseline_tracking+0x140>
+    57a2:	8da0      	ld.h      	r5, (r5, 0x0)
+    57a4:	8b80      	ld.h      	r4, (r3, 0x0)
+    57a6:	7557      	sexth      	r5, r5
+    57a8:	4c81      	lsri      	r4, r4, 1
+    57aa:	6515      	cmplt      	r5, r4
+    57ac:	0c06      	bf      	0x57b8	// 57b8 <TK_Baseline_tracking+0x140>
+    57ae:	59a0      	addu      	r5, r1, r0
+    57b0:	8d80      	ld.h      	r4, (r5, 0x0)
+    57b2:	2400      	addi      	r4, 1
+    57b4:	7511      	zexth      	r4, r4
+    57b6:	ad80      	st.h      	r4, (r5, 0x0)
+    57b8:	5fa0      	addu      	r5, r7, r0
+    57ba:	8d80      	ld.h      	r4, (r5, 0x0)
+    57bc:	7513      	sexth      	r4, r4
+    57be:	3c20      	cmplti      	r4, 1
+    57c0:	0810      	bt      	0x57e0	// 57e0 <TK_Baseline_tracking+0x168>
+    57c2:	8dc0      	ld.h      	r6, (r5, 0x0)
+    57c4:	759b      	sexth      	r6, r6
+    57c6:	8b80      	ld.h      	r4, (r3, 0x0)
+    57c8:	6519      	cmplt      	r6, r4
+    57ca:	0c0b      	bf      	0x57e0	// 57e0 <TK_Baseline_tracking+0x168>
+    57cc:	8da0      	ld.h      	r5, (r5, 0x0)
+    57ce:	7557      	sexth      	r5, r5
+    57d0:	4c81      	lsri      	r4, r4, 1
+    57d2:	6515      	cmplt      	r5, r4
+    57d4:	0806      	bt      	0x57e0	// 57e0 <TK_Baseline_tracking+0x168>
+    57d6:	6004      	addu      	r0, r1
+    57d8:	8880      	ld.h      	r4, (r0, 0x0)
+    57da:	2401      	addi      	r4, 2
+    57dc:	7511      	zexth      	r4, r4
+    57de:	a880      	st.h      	r4, (r0, 0x0)
+    57e0:	2200      	addi      	r2, 1
+    57e2:	3a51      	cmpnei      	r2, 17
+    57e4:	2301      	addi      	r3, 2
+    57e6:	0b61      	bt      	0x56a8	// 56a8 <TK_Baseline_tracking+0x30>
+    57e8:	1402      	addi      	r14, r14, 8
+    57ea:	1484      	pop      	r4-r7
+    57ec:	5f80      	addu      	r4, r7, r0
+    57ee:	8c80      	ld.h      	r4, (r4, 0x0)
+    57f0:	7513      	sexth      	r4, r4
+    57f2:	3cdf      	btsti      	r4, 31
+    57f4:	0fa9      	bf      	0x5746	// 5746 <TK_Baseline_tracking+0xce>
+    57f6:	10b0      	lrw      	r5, 0x2000072e	// 5834 <TK_Baseline_tracking+0x1bc>
+    57f8:	5980      	addu      	r4, r1, r0
+    57fa:	6140      	addu      	r5, r0
+    57fc:	8c80      	ld.h      	r4, (r4, 0x0)
+    57fe:	8da0      	ld.h      	r5, (r5, 0x0)
+    5800:	7555      	zexth      	r5, r5
+    5802:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5804:	7511      	zexth      	r4, r4
+    5806:	6116      	subu      	r4, r5
+    5808:	46a1      	lsli      	r5, r6, 1
+    580a:	6158      	addu      	r5, r6
+    580c:	6551      	cmplt      	r4, r5
+    580e:	0b9c      	bt      	0x5746	// 5746 <TK_Baseline_tracking+0xce>
+    5810:	108c      	lrw      	r4, 0x2000059f	// 5840 <TK_Baseline_tracking+0x1c8>
+    5812:	3501      	movi      	r5, 1
+    5814:	a4a0      	st.b      	r5, (r4, 0x0)
+    5816:	6c03      	mov      	r0, r0
+    5818:	0797      	br      	0x5746	// 5746 <TK_Baseline_tracking+0xce>
+    581a:	0000      	bkpt
+    581c:	200005ba 	.long	0x200005ba
+    5820:	2000031d 	.long	0x2000031d
+    5824:	20000518 	.long	0x20000518
+    5828:	20000532 	.long	0x20000532
+    582c:	2000034a 	.long	0x2000034a
+    5830:	20000488 	.long	0x20000488
+    5834:	2000072e 	.long	0x2000072e
+    5838:	2000065c 	.long	0x2000065c
+    583c:	2000008c 	.long	0x2000008c
+    5840:	2000059f 	.long	0x2000059f
+    5844:	200005e2 	.long	0x200005e2
+
+Disassembly of section .text.TK_result_prog:
+
+00005848 <TK_result_prog>:
+    5848:	14d2      	push      	r4-r5, r15
+    584a:	1050      	lrw      	r2, 0x20000518	// 5888 <TK_result_prog+0x40>
+    584c:	1090      	lrw      	r4, 0x200005bc	// 588c <TK_result_prog+0x44>
+    584e:	9260      	ld.w      	r3, (r2, 0x0)
+    5850:	3b40      	cmpnei      	r3, 0
+    5852:	0c02      	bf      	0x5856	// 5856 <TK_result_prog+0xe>
+    5854:	9260      	ld.w      	r3, (r2, 0x0)
+    5856:	b460      	st.w      	r3, (r4, 0x0)
+    5858:	9460      	ld.w      	r3, (r4, 0x0)
+    585a:	3b40      	cmpnei      	r3, 0
+    585c:	10ad      	lrw      	r5, 0x20000690	// 5890 <TK_result_prog+0x48>
+    585e:	0c11      	bf      	0x5880	// 5880 <TK_result_prog+0x38>
+    5860:	9440      	ld.w      	r2, (r4, 0x0)
+    5862:	9560      	ld.w      	r3, (r5, 0x0)
+    5864:	64ca      	cmpne      	r2, r3
+    5866:	0c03      	bf      	0x586c	// 586c <TK_result_prog+0x24>
+    5868:	9460      	ld.w      	r3, (r4, 0x0)
+    586a:	b560      	st.w      	r3, (r5, 0x0)
+    586c:	e3fffd94 	bsr      	0x5394	// 5394 <get_key_number>
+    5870:	1069      	lrw      	r3, 0x20000324	// 5894 <TK_result_prog+0x4c>
+    5872:	8360      	ld.b      	r3, (r3, 0x0)
+    5874:	640c      	cmphs      	r3, r0
+    5876:	0804      	bt      	0x587e	// 587e <TK_result_prog+0x36>
+    5878:	3300      	movi      	r3, 0
+    587a:	b460      	st.w      	r3, (r4, 0x0)
+    587c:	b560      	st.w      	r3, (r5, 0x0)
+    587e:	1492      	pop      	r4-r5, r15
+    5880:	1046      	lrw      	r2, 0x200005b4	// 5898 <TK_result_prog+0x50>
+    5882:	b560      	st.w      	r3, (r5, 0x0)
+    5884:	b260      	st.w      	r3, (r2, 0x0)
+    5886:	07fc      	br      	0x587e	// 587e <TK_result_prog+0x36>
+    5888:	20000518 	.long	0x20000518
+    588c:	200005bc 	.long	0x200005bc
+    5890:	20000690 	.long	0x20000690
+    5894:	20000324 	.long	0x20000324
+    5898:	200005b4 	.long	0x200005b4
+
+Disassembly of section .text.CORETHandler:
+
+0000589c <CORETHandler>:
+    589c:	1460      	nie
+    589e:	1462      	ipush
+    58a0:	14d1      	push      	r4, r15
+    58a2:	1077      	lrw      	r3, 0x20000064	// 58fc <CORETHandler+0x60>
+    58a4:	3400      	movi      	r4, 0
+    58a6:	9360      	ld.w      	r3, (r3, 0x0)
+    58a8:	b386      	st.w      	r4, (r3, 0x18)
+    58aa:	1076      	lrw      	r3, 0x2000051c	// 5900 <CORETHandler+0x64>
+    58ac:	8360      	ld.b      	r3, (r3, 0x0)
+    58ae:	3b41      	cmpnei      	r3, 1
+    58b0:	0820      	bt      	0x58f0	// 58f0 <CORETHandler+0x54>
+    58b2:	e3fffd85 	bsr      	0x53bc	// 53bc <TK_Scan_Start>
+    58b6:	e3fffd93 	bsr      	0x53dc	// 53dc <TK_Keymap_prog>
+    58ba:	e3fffe51 	bsr      	0x555c	// 555c <TK_overflow_predict>
+    58be:	e3fffedd 	bsr      	0x5678	// 5678 <TK_Baseline_tracking>
+    58c2:	e3ffffc3 	bsr      	0x5848	// 5848 <TK_result_prog>
+    58c6:	1070      	lrw      	r3, 0x200005bc	// 5904 <CORETHandler+0x68>
+    58c8:	9360      	ld.w      	r3, (r3, 0x0)
+    58ca:	3b40      	cmpnei      	r3, 0
+    58cc:	0c12      	bf      	0x58f0	// 58f0 <CORETHandler+0x54>
+    58ce:	106f      	lrw      	r3, 0x200002f4	// 5908 <CORETHandler+0x6c>
+    58d0:	9340      	ld.w      	r2, (r3, 0x0)
+    58d2:	3a40      	cmpnei      	r2, 0
+    58d4:	0c0e      	bf      	0x58f0	// 58f0 <CORETHandler+0x54>
+    58d6:	106e      	lrw      	r3, 0x200005b4	// 590c <CORETHandler+0x70>
+    58d8:	3064      	movi      	r0, 100
+    58da:	9320      	ld.w      	r1, (r3, 0x0)
+    58dc:	2100      	addi      	r1, 1
+    58de:	b320      	st.w      	r1, (r3, 0x0)
+    58e0:	9320      	ld.w      	r1, (r3, 0x0)
+    58e2:	7c80      	mult      	r2, r0
+    58e4:	6448      	cmphs      	r2, r1
+    58e6:	0805      	bt      	0x58f0	// 58f0 <CORETHandler+0x54>
+    58e8:	104a      	lrw      	r2, 0x2000059f	// 5910 <CORETHandler+0x74>
+    58ea:	3101      	movi      	r1, 1
+    58ec:	a220      	st.b      	r1, (r2, 0x0)
+    58ee:	b380      	st.w      	r4, (r3, 0x0)
+    58f0:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    58f4:	9880      	ld.w      	r4, (r14, 0x0)
+    58f6:	1402      	addi      	r14, r14, 8
+    58f8:	1463      	ipop
+    58fa:	1461      	nir
+    58fc:	20000064 	.long	0x20000064
+    5900:	2000051c 	.long	0x2000051c
+    5904:	200005bc 	.long	0x200005bc
+    5908:	200002f4 	.long	0x200002f4
+    590c:	200005b4 	.long	0x200005b4
+    5910:	2000059f 	.long	0x2000059f
+
+Disassembly of section .text.std_clk_calib:
+
+00005914 <std_clk_calib>:
+    5914:	14d4      	push      	r4-r7, r15
+    5916:	142d      	subi      	r14, r14, 52
+    5918:	3201      	movi      	r2, 1
+    591a:	03ce      	lrw      	r6, 0x2000005c	// 5b5c <std_clk_calib+0x248>
+    591c:	6cc3      	mov      	r3, r0
+    591e:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    5922:	9640      	ld.w      	r2, (r6, 0x0)
+    5924:	9247      	ld.w      	r2, (r2, 0x1c)
+    5926:	7488      	zextb      	r2, r2
+    5928:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    592c:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5930:	3a40      	cmpnei      	r2, 0
+    5932:	0c08      	bf      	0x5942	// 5942 <std_clk_calib+0x2e>
+    5934:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5938:	3a42      	cmpnei      	r2, 2
+    593a:	0c04      	bf      	0x5942	// 5942 <std_clk_calib+0x2e>
+    593c:	3000      	movi      	r0, 0
+    593e:	140d      	addi      	r14, r14, 52
+    5940:	1494      	pop      	r4-r7, r15
+    5942:	0397      	lrw      	r4, 0x2000000c	// 5b60 <std_clk_calib+0x24c>
+    5944:	3209      	movi      	r2, 9
+    5946:	9400      	ld.w      	r0, (r4, 0x0)
+    5948:	3b40      	cmpnei      	r3, 0
+    594a:	b041      	st.w      	r2, (r0, 0x4)
+    594c:	0857      	bt      	0x59fa	// 59fa <std_clk_calib+0xe6>
+    594e:	3307      	movi      	r3, 7
+    5950:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5954:	037b      	lrw      	r3, 0x2dc6c00	// 5b64 <std_clk_calib+0x250>
+    5956:	b863      	st.w      	r3, (r14, 0xc)
+    5958:	3380      	movi      	r3, 128
+    595a:	4362      	lsli      	r3, r3, 2
+    595c:	b867      	st.w      	r3, (r14, 0x1c)
+    595e:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    5962:	74cc      	zextb      	r3, r3
+    5964:	b062      	st.w      	r3, (r0, 0x8)
+    5966:	037e      	lrw      	r3, 0xffff	// 5b68 <std_clk_calib+0x254>
+    5968:	b063      	st.w      	r3, (r0, 0xc)
+    596a:	3201      	movi      	r2, 1
+    596c:	3101      	movi      	r1, 1
+    596e:	03bf      	lrw      	r5, 0x20000014	// 5b6c <std_clk_calib+0x258>
+    5970:	e3ffed60 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+    5974:	95e0      	ld.w      	r7, (r5, 0x0)
+    5976:	137f      	lrw      	r3, 0xbe9c0005	// 5b70 <std_clk_calib+0x25c>
+    5978:	b760      	st.w      	r3, (r7, 0x0)
+    597a:	135f      	lrw      	r2, 0x30010	// 5b74 <std_clk_calib+0x260>
+    597c:	3300      	movi      	r3, 0
+    597e:	b762      	st.w      	r3, (r7, 0x8)
+    5980:	b743      	st.w      	r2, (r7, 0xc)
+    5982:	32d8      	movi      	r2, 216
+    5984:	b745      	st.w      	r2, (r7, 0x14)
+    5986:	974f      	ld.w      	r2, (r7, 0x3c)
+    5988:	3aa2      	bseti      	r2, 2
+    598a:	b74f      	st.w      	r2, (r7, 0x3c)
+    598c:	9803      	ld.w      	r0, (r14, 0xc)
+    598e:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    5992:	327d      	movi      	r2, 125
+    5994:	2100      	addi      	r1, 1
+    5996:	7c48      	mult      	r1, r2
+    5998:	b861      	st.w      	r3, (r14, 0x4)
+    599a:	e3fff53b 	bsr      	0x4410	// 4410 <__udivsi3>
+    599e:	b804      	st.w      	r0, (r14, 0x10)
+    59a0:	32fa      	movi      	r2, 250
+    59a2:	9824      	ld.w      	r1, (r14, 0x10)
+    59a4:	4242      	lsli      	r2, r2, 2
+    59a6:	6448      	cmphs      	r2, r1
+    59a8:	0bca      	bt      	0x593c	// 593c <std_clk_calib+0x28>
+    59aa:	9844      	ld.w      	r2, (r14, 0x10)
+    59ac:	3178      	movi      	r1, 120
+    59ae:	9804      	ld.w      	r0, (r14, 0x10)
+    59b0:	b840      	st.w      	r2, (r14, 0x0)
+    59b2:	e3fff52f 	bsr      	0x4410	// 4410 <__udivsi3>
+    59b6:	9840      	ld.w      	r2, (r14, 0x0)
+    59b8:	6082      	subu      	r2, r0
+    59ba:	b845      	st.w      	r2, (r14, 0x14)
+    59bc:	9804      	ld.w      	r0, (r14, 0x10)
+    59be:	3178      	movi      	r1, 120
+    59c0:	9844      	ld.w      	r2, (r14, 0x10)
+    59c2:	b840      	st.w      	r2, (r14, 0x0)
+    59c4:	e3fff526 	bsr      	0x4410	// 4410 <__udivsi3>
+    59c8:	9840      	ld.w      	r2, (r14, 0x0)
+    59ca:	6008      	addu      	r0, r2
+    59cc:	b806      	st.w      	r0, (r14, 0x18)
+    59ce:	c0807020 	psrclr      	ie
+    59d2:	9640      	ld.w      	r2, (r6, 0x0)
+    59d4:	9254      	ld.w      	r2, (r2, 0x50)
+    59d6:	b848      	st.w      	r2, (r14, 0x20)
+    59d8:	9861      	ld.w      	r3, (r14, 0x4)
+    59da:	9440      	ld.w      	r2, (r4, 0x0)
+    59dc:	b260      	st.w      	r3, (r2, 0x0)
+    59de:	b761      	st.w      	r3, (r7, 0x4)
+    59e0:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    59e4:	3b40      	cmpnei      	r3, 0
+    59e6:	083e      	bt      	0x5a62	// 5a62 <std_clk_calib+0x14e>
+    59e8:	e3ffecd6 	bsr      	0x3394	// 3394 <LPT_Soft_Reset>
+    59ec:	9400      	ld.w      	r0, (r4, 0x0)
+    59ee:	e3ffecf7 	bsr      	0x33dc	// 33dc <BT_Soft_Reset>
+    59f2:	c1807420 	psrset      	ee, ie
+    59f6:	3001      	movi      	r0, 1
+    59f8:	07a3      	br      	0x593e	// 593e <std_clk_calib+0x2a>
+    59fa:	3b41      	cmpnei      	r3, 1
+    59fc:	0806      	bt      	0x5a08	// 5a08 <std_clk_calib+0xf4>
+    59fe:	3303      	movi      	r3, 3
+    5a00:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a04:	127d      	lrw      	r3, 0x16e3600	// 5b78 <std_clk_calib+0x264>
+    5a06:	07a8      	br      	0x5956	// 5956 <std_clk_calib+0x42>
+    5a08:	3b42      	cmpnei      	r3, 2
+    5a0a:	0806      	bt      	0x5a16	// 5a16 <std_clk_calib+0x102>
+    5a0c:	3301      	movi      	r3, 1
+    5a0e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a12:	127b      	lrw      	r3, 0xb71b00	// 5b7c <std_clk_calib+0x268>
+    5a14:	07a1      	br      	0x5956	// 5956 <std_clk_calib+0x42>
+    5a16:	3b43      	cmpnei      	r3, 3
+    5a18:	0806      	bt      	0x5a24	// 5a24 <std_clk_calib+0x110>
+    5a1a:	3300      	movi      	r3, 0
+    5a1c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a20:	1278      	lrw      	r3, 0x5b8d80	// 5b80 <std_clk_calib+0x26c>
+    5a22:	079a      	br      	0x5956	// 5956 <std_clk_calib+0x42>
+    5a24:	3b44      	cmpnei      	r3, 4
+    5a26:	0809      	bt      	0x5a38	// 5a38 <std_clk_calib+0x124>
+    5a28:	3300      	movi      	r3, 0
+    5a2a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a2e:	1276      	lrw      	r3, 0x54c720	// 5b84 <std_clk_calib+0x270>
+    5a30:	b863      	st.w      	r3, (r14, 0xc)
+    5a32:	3380      	movi      	r3, 128
+    5a34:	4369      	lsli      	r3, r3, 9
+    5a36:	0793      	br      	0x595c	// 595c <std_clk_calib+0x48>
+    5a38:	3b45      	cmpnei      	r3, 5
+    5a3a:	0806      	bt      	0x5a46	// 5a46 <std_clk_calib+0x132>
+    5a3c:	3300      	movi      	r3, 0
+    5a3e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a42:	1272      	lrw      	r3, 0x3ffed0	// 5b88 <std_clk_calib+0x274>
+    5a44:	07f6      	br      	0x5a30	// 5a30 <std_clk_calib+0x11c>
+    5a46:	3b46      	cmpnei      	r3, 6
+    5a48:	0806      	bt      	0x5a54	// 5a54 <std_clk_calib+0x140>
+    5a4a:	3300      	movi      	r3, 0
+    5a4c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a50:	126f      	lrw      	r3, 0x1fff68	// 5b8c <std_clk_calib+0x278>
+    5a52:	07ef      	br      	0x5a30	// 5a30 <std_clk_calib+0x11c>
+    5a54:	3b47      	cmpnei      	r3, 7
+    5a56:	0b84      	bt      	0x595e	// 595e <std_clk_calib+0x4a>
+    5a58:	3300      	movi      	r3, 0
+    5a5a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a5e:	126d      	lrw      	r3, 0x1ffb8	// 5b90 <std_clk_calib+0x27c>
+    5a60:	07e8      	br      	0x5a30	// 5a30 <std_clk_calib+0x11c>
+    5a62:	9560      	ld.w      	r3, (r5, 0x0)
+    5a64:	3101      	movi      	r1, 1
+    5a66:	9440      	ld.w      	r2, (r4, 0x0)
+    5a68:	b321      	st.w      	r1, (r3, 0x4)
+    5a6a:	b220      	st.w      	r1, (r2, 0x0)
+    5a6c:	3100      	movi      	r1, 0
+    5a6e:	b327      	st.w      	r1, (r3, 0x1c)
+    5a70:	3004      	movi      	r0, 4
+    5a72:	b225      	st.w      	r1, (r2, 0x14)
+    5a74:	932e      	ld.w      	r1, (r3, 0x38)
+    5a76:	6840      	and      	r1, r0
+    5a78:	3940      	cmpnei      	r1, 0
+    5a7a:	0ffd      	bf      	0x5a74	// 5a74 <std_clk_calib+0x160>
+    5a7c:	9225      	ld.w      	r1, (r2, 0x14)
+    5a7e:	b82a      	st.w      	r1, (r14, 0x28)
+    5a80:	3100      	movi      	r1, 0
+    5a82:	b310      	st.w      	r0, (r3, 0x40)
+    5a84:	b327      	st.w      	r1, (r3, 0x1c)
+    5a86:	3004      	movi      	r0, 4
+    5a88:	b225      	st.w      	r1, (r2, 0x14)
+    5a8a:	932e      	ld.w      	r1, (r3, 0x38)
+    5a8c:	6840      	and      	r1, r0
+    5a8e:	3940      	cmpnei      	r1, 0
+    5a90:	0ffd      	bf      	0x5a8a	// 5a8a <std_clk_calib+0x176>
+    5a92:	9225      	ld.w      	r1, (r2, 0x14)
+    5a94:	b82b      	st.w      	r1, (r14, 0x2c)
+    5a96:	3100      	movi      	r1, 0
+    5a98:	b310      	st.w      	r0, (r3, 0x40)
+    5a9a:	b327      	st.w      	r1, (r3, 0x1c)
+    5a9c:	3004      	movi      	r0, 4
+    5a9e:	b225      	st.w      	r1, (r2, 0x14)
+    5aa0:	932e      	ld.w      	r1, (r3, 0x38)
+    5aa2:	6840      	and      	r1, r0
+    5aa4:	3940      	cmpnei      	r1, 0
+    5aa6:	0ffd      	bf      	0x5aa0	// 5aa0 <std_clk_calib+0x18c>
+    5aa8:	9225      	ld.w      	r1, (r2, 0x14)
+    5aaa:	b82c      	st.w      	r1, (r14, 0x30)
+    5aac:	b310      	st.w      	r0, (r3, 0x40)
+    5aae:	982b      	ld.w      	r1, (r14, 0x2c)
+    5ab0:	980c      	ld.w      	r0, (r14, 0x30)
+    5ab2:	6040      	addu      	r1, r0
+    5ab4:	b829      	st.w      	r1, (r14, 0x24)
+    5ab6:	9829      	ld.w      	r1, (r14, 0x24)
+    5ab8:	4921      	lsri      	r1, r1, 1
+    5aba:	b829      	st.w      	r1, (r14, 0x24)
+    5abc:	3100      	movi      	r1, 0
+    5abe:	b321      	st.w      	r1, (r3, 0x4)
+    5ac0:	b220      	st.w      	r1, (r2, 0x0)
+    5ac2:	b327      	st.w      	r1, (r3, 0x1c)
+    5ac4:	b225      	st.w      	r1, (r2, 0x14)
+    5ac6:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    5aca:	3b42      	cmpnei      	r3, 2
+    5acc:	9849      	ld.w      	r2, (r14, 0x24)
+    5ace:	082c      	bt      	0x5b26	// 5b26 <std_clk_calib+0x212>
+    5ad0:	1171      	lrw      	r3, 0x7ff	// 5b94 <std_clk_calib+0x280>
+    5ad2:	648c      	cmphs      	r3, r2
+    5ad4:	0c03      	bf      	0x5ada	// 5ada <std_clk_calib+0x1c6>
+    5ad6:	3300      	movi      	r3, 0
+    5ad8:	040f      	br      	0x5af6	// 5af6 <std_clk_calib+0x1e2>
+    5ada:	9849      	ld.w      	r2, (r14, 0x24)
+    5adc:	9866      	ld.w      	r3, (r14, 0x18)
+    5ade:	648c      	cmphs      	r3, r2
+    5ae0:	080e      	bt      	0x5afc	// 5afc <std_clk_calib+0x1e8>
+    5ae2:	9868      	ld.w      	r3, (r14, 0x20)
+    5ae4:	9847      	ld.w      	r2, (r14, 0x1c)
+    5ae6:	60ca      	subu      	r3, r2
+    5ae8:	b868      	st.w      	r3, (r14, 0x20)
+    5aea:	32fe      	movi      	r2, 254
+    5aec:	9868      	ld.w      	r3, (r14, 0x20)
+    5aee:	4248      	lsli      	r2, r2, 8
+    5af0:	68c8      	and      	r3, r2
+    5af2:	3b40      	cmpnei      	r3, 0
+    5af4:	0812      	bt      	0x5b18	// 5b18 <std_clk_calib+0x204>
+    5af6:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5afa:	0721      	br      	0x593c	// 593c <std_clk_calib+0x28>
+    5afc:	9849      	ld.w      	r2, (r14, 0x24)
+    5afe:	9865      	ld.w      	r3, (r14, 0x14)
+    5b00:	64c8      	cmphs      	r2, r3
+    5b02:	0829      	bt      	0x5b54	// 5b54 <std_clk_calib+0x240>
+    5b04:	9868      	ld.w      	r3, (r14, 0x20)
+    5b06:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b08:	60c8      	addu      	r3, r2
+    5b0a:	b868      	st.w      	r3, (r14, 0x20)
+    5b0c:	33fe      	movi      	r3, 254
+    5b0e:	9848      	ld.w      	r2, (r14, 0x20)
+    5b10:	4368      	lsli      	r3, r3, 8
+    5b12:	688c      	and      	r2, r3
+    5b14:	64ca      	cmpne      	r2, r3
+    5b16:	0fe0      	bf      	0x5ad6	// 5ad6 <std_clk_calib+0x1c2>
+    5b18:	9660      	ld.w      	r3, (r6, 0x0)
+    5b1a:	9848      	ld.w      	r2, (r14, 0x20)
+    5b1c:	b354      	st.w      	r2, (r3, 0x50)
+    5b1e:	3001      	movi      	r0, 1
+    5b20:	e3ffeeba 	bsr      	0x3894	// 3894 <delay_nms>
+    5b24:	075e      	br      	0x59e0	// 59e0 <std_clk_calib+0xcc>
+    5b26:	9866      	ld.w      	r3, (r14, 0x18)
+    5b28:	648c      	cmphs      	r3, r2
+    5b2a:	0809      	bt      	0x5b3c	// 5b3c <std_clk_calib+0x228>
+    5b2c:	9868      	ld.w      	r3, (r14, 0x20)
+    5b2e:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b30:	60ca      	subu      	r3, r2
+    5b32:	b868      	st.w      	r3, (r14, 0x20)
+    5b34:	32ff      	movi      	r2, 255
+    5b36:	9868      	ld.w      	r3, (r14, 0x20)
+    5b38:	4250      	lsli      	r2, r2, 16
+    5b3a:	07db      	br      	0x5af0	// 5af0 <std_clk_calib+0x1dc>
+    5b3c:	9849      	ld.w      	r2, (r14, 0x24)
+    5b3e:	9865      	ld.w      	r3, (r14, 0x14)
+    5b40:	64c8      	cmphs      	r2, r3
+    5b42:	0809      	bt      	0x5b54	// 5b54 <std_clk_calib+0x240>
+    5b44:	9868      	ld.w      	r3, (r14, 0x20)
+    5b46:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b48:	60c8      	addu      	r3, r2
+    5b4a:	b868      	st.w      	r3, (r14, 0x20)
+    5b4c:	33ff      	movi      	r3, 255
+    5b4e:	9848      	ld.w      	r2, (r14, 0x20)
+    5b50:	4370      	lsli      	r3, r3, 16
+    5b52:	07e0      	br      	0x5b12	// 5b12 <std_clk_calib+0x1fe>
+    5b54:	3300      	movi      	r3, 0
+    5b56:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5b5a:	07e2      	br      	0x5b1e	// 5b1e <std_clk_calib+0x20a>
+    5b5c:	2000005c 	.long	0x2000005c
+    5b60:	2000000c 	.long	0x2000000c
+    5b64:	02dc6c00 	.long	0x02dc6c00
+    5b68:	0000ffff 	.long	0x0000ffff
+    5b6c:	20000014 	.long	0x20000014
+    5b70:	be9c0005 	.long	0xbe9c0005
+    5b74:	00030010 	.long	0x00030010
+    5b78:	016e3600 	.long	0x016e3600
+    5b7c:	00b71b00 	.long	0x00b71b00
+    5b80:	005b8d80 	.long	0x005b8d80
+    5b84:	0054c720 	.long	0x0054c720
+    5b88:	003ffed0 	.long	0x003ffed0
+    5b8c:	001fff68 	.long	0x001fff68
+    5b90:	0001ffb8 	.long	0x0001ffb8
+    5b94:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/RF_T1F_CR_V01_20240513.map b/Source/Lst/RF_T1F_CR_V01_20240513.map
new file mode 100644
index 0000000..e56c813
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20240513.map
@@ -0,0 +1,2427 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          327020 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         164
+  Section header string table index: 161
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 002f12 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00002f14 003f14 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00002f4c 003f4c 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00002fc0 003fc0 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        0000300c 00400c 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        0000303c 00403c 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        000030c4 0040c4 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        000030ec 0040ec 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00003128 004128 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        0000313c 00413c 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00003154 004154 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00003174 004174 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00003190 004190 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        000031ac 0041ac 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        000031ec 0041ec 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        000031f8 0041f8 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        0000321c 00421c 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        0000324c 00424c 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        0000332c 00432c 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00003340 004340 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        0000334e 00434e 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00003356 004356 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        0000335e 00435e 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00003374 004374 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00003384 004384 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00003394 004394 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        000033a8 0043a8 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        000033b8 0043b8 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        000033d4 0043d4 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        000033dc 0043dc 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        000033e6 0043e6 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        000033fe 0043fe 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        0000342a 00442a 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00003430 004430 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00003444 004444 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00003454 004454 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        000034f4 0044f4 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00003508 004508 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        0000354c 00454c 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        00003560 004560 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00003614 004614 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00003624 004624 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00003634 004634 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        00003650 004650 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        00003668 004668 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        00003680 004680 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        00003698 004698 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000036b4 0046b4 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        000036d0 0046d0 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000037bc 0047bc 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        000037cc 0047cc 000010 00  AX  0   0  4
+  [52] .text.UARTTransmi PROGBITS        000037dc 0047dc 00001e 00  AX  0   0  2
+  [53] .text.EPT_Stop    PROGBITS        000037fc 0047fc 000028 00  AX  0   0  4
+  [54] .text.startup.mai PROGBITS        00003824 004824 000070 00  AX  0   0  4
+  [55] .text.delay_nms   PROGBITS        00003894 004894 00002c 00  AX  0   0  2
+  [56] .text.GPT0_CONFIG PROGBITS        000038c0 0048c0 000094 00  AX  0   0  4
+  [57] .text.BT_CONFIG   PROGBITS        00003954 004954 000060 00  AX  0   0  4
+  [58] .text.SYSCON_CONF PROGBITS        000039b4 0049b4 000062 00  AX  0   0  2
+  [59] .text.APT32F102_i PROGBITS        00003a18 004a18 000050 00  AX  0   0  4
+  [60] .text.SYSCONIntHa PROGBITS        00003a68 004a68 0000f0 00  AX  0   0  4
+  [61] .text.IFCIntHandl PROGBITS        00003b58 004b58 000068 00  AX  0   0  4
+  [62] .text.ADCIntHandl PROGBITS        00003bc0 004bc0 000068 00  AX  0   0  4
+  [63] .text.EPT0IntHand PROGBITS        00003c28 004c28 0001ac 00  AX  0   0  4
+  [64] .text.WWDTHandler PROGBITS        00003dd4 004dd4 000034 00  AX  0   0  4
+  [65] .text.GPT0IntHand PROGBITS        00003e08 004e08 000080 00  AX  0   0  4
+  [66] .text.RTCIntHandl PROGBITS        00003e88 004e88 000070 00  AX  0   0  4
+  [67] .text.UART0IntHan PROGBITS        00003ef8 004ef8 00003c 00  AX  0   0  4
+  [68] .text.UART1IntHan PROGBITS        00003f34 004f34 00003c 00  AX  0   0  4
+  [69] .text.UART2IntHan PROGBITS        00003f70 004f70 000094 00  AX  0   0  4
+  [70] .text.SPI0IntHand PROGBITS        00004004 005004 0000e8 00  AX  0   0  4
+  [71] .text.SIO0IntHand PROGBITS        000040ec 0050ec 000054 00  AX  0   0  4
+  [72] .text.EXI0IntHand PROGBITS        00004140 005140 000030 00  AX  0   0  4
+  [73] .text.EXI1IntHand PROGBITS        00004170 005170 000030 00  AX  0   0  4
+  [74] .text.EXI2to3IntH PROGBITS        000041a0 0051a0 000048 00  AX  0   0  4
+  [75] .text.EXI4to9IntH PROGBITS        000041e8 0051e8 00005c 00  AX  0   0  4
+  [76] .text.EXI10to15In PROGBITS        00004244 005244 000060 00  AX  0   0  4
+  [77] .text.LPTIntHandl PROGBITS        000042a4 0052a4 000034 00  AX  0   0  4
+  [78] .text.BT0IntHandl PROGBITS        000042d8 0052d8 00004c 00  AX  0   0  4
+  [79] .text.BT1IntHandl PROGBITS        00004324 005324 000064 00  AX  0   0  4
+  [80] .text.PriviledgeV PROGBITS        00004388 005388 000002 00  AX  0   0  2
+  [81] .text.PendTrapHan PROGBITS        0000438a 00538a 000008 00  AX  0   0  2
+  [82] .text.Trap3Handle PROGBITS        00004392 005392 000008 00  AX  0   0  2
+  [83] .text.Trap2Handle PROGBITS        0000439a 00539a 000008 00  AX  0   0  2
+  [84] .text.Trap1Handle PROGBITS        000043a2 0053a2 000008 00  AX  0   0  2
+  [85] .text.Trap0Handle PROGBITS        000043aa 0053aa 000008 00  AX  0   0  2
+  [86] .text.UnrecExecpH PROGBITS        000043b2 0053b2 000008 00  AX  0   0  2
+  [87] .text.BreakPointH PROGBITS        000043ba 0053ba 000008 00  AX  0   0  2
+  [88] .text.AccessErrHa PROGBITS        000043c2 0053c2 000008 00  AX  0   0  2
+  [89] .text.IllegalInst PROGBITS        000043ca 0053ca 000008 00  AX  0   0  2
+  [90] .text.MisalignedH PROGBITS        000043d2 0053d2 000008 00  AX  0   0  2
+  [91] .text.CNTAIntHand PROGBITS        000043da 0053da 000008 00  AX  0   0  2
+  [92] .text.I2CIntHandl PROGBITS        000043e2 0053e2 000008 00  AX  0   0  2
+  [93] .text.__divsi3    PROGBITS        000043ec 0053ec 000024 00  AX  0   0  4
+  [94] .text.__udivsi3   PROGBITS        00004410 005410 000024 00  AX  0   0  4
+  [95] .text.__modsi3    PROGBITS        00004434 005434 000024 00  AX  0   0  4
+  [96] .text.__umodsi3   PROGBITS        00004458 005458 000024 00  AX  0   0  4
+  [97] .text.CK_CPU_EnAl PROGBITS        0000447c 00547c 000006 00  AX  0   0  2
+  [98] .text.UARTx_Init  PROGBITS        00004484 005484 0000d8 00  AX  0   0  4
+  [99] .text.UART2_RecvI PROGBITS        0000455c 00555c 000064 00  AX  0   0  4
+  [100] .text.Dbg_Println PROGBITS        000045c0 0055c0 000098 00  AX  0   0  4
+  [101] .text.RC522_Delay PROGBITS        00004658 005658 000012 00  AX  0   0  2
+  [102] .text.RC522_ReadW PROGBITS        0000466c 00566c 000054 00  AX  0   0  4
+  [103] .text.RC522_ReadR PROGBITS        000046c0 0056c0 000038 00  AX  0   0  4
+  [104] .text.RC522_Write PROGBITS        000046f8 0056f8 000030 00  AX  0   0  4
+  [105] .text.RC522_PcdRe PROGBITS        00004728 005728 00004c 00  AX  0   0  2
+  [106] .text.RC522_SetBi PROGBITS        00004774 005774 000018 00  AX  0   0  2
+  [107] .text.RC522_PcdAn PROGBITS        0000478c 00578c 00001a 00  AX  0   0  2
+  [108] .text.RC522_Clear PROGBITS        000047a6 0057a6 000016 00  AX  0   0  2
+  [109] .text.RC522_PcdAn PROGBITS        000047bc 0057bc 00000c 00  AX  0   0  2
+  [110] .text.RC522_Calul PROGBITS        000047c8 0057c8 000066 00  AX  0   0  2
+  [111] .text.M500PcdConf PROGBITS        0000482e 00582e 000052 00  AX  0   0  2
+  [112] .text.RC522_Init  PROGBITS        00004880 005880 0000a0 00  AX  0   0  4
+  [113] .text.RC522_PcdCo PROGBITS        00004920 005920 00013a 00  AX  0   0  2
+  [114] .text.RC522_PcdSe PROGBITS        00004a5a 005a5a 00006a 00  AX  0   0  2
+  [115] .text.RC522_PcdAu PROGBITS        00004ac4 005ac4 000058 00  AX  0   0  2
+  [116] .text.RC522_PcdRe PROGBITS        00004b1c 005b1c 000054 00  AX  0   0  2
+  [117] .text.RC522_PcdAn PROGBITS        00004b70 005b70 000074 00  AX  0   0  2
+  [118] .text.Card_Read_T PROGBITS        00004be4 005be4 0000dc 00  AX  0   0  4
+  [119] .text.RLY_Light_C PROGBITS        00004cc0 005cc0 000014 00  AX  0   0  4
+  [120] .text.KEY1_LONG_P PROGBITS        00004cd4 005cd4 000070 00  AX  0   0  4
+  [121] .text.RLY_Light_C PROGBITS        00004d44 005d44 000020 00  AX  0   0  4
+  [122] .text.LogicCtrl_I PROGBITS        00004d64 005d64 000040 00  AX  0   0  4
+  [123] .text.Debounce_Ta PROGBITS        00004da4 005da4 000068 00  AX  0   0  4
+  [124] .text.LogicCtrl_T PROGBITS        00004e0c 005e0c 00008c 00  AX  0   0  4
+  [125] .text.LogicCtrl_N PROGBITS        00004e98 005e98 000070 00  AX  0   0  4
+  [126] .text.LogicCtrl_N PROGBITS        00004f08 005f08 0000c8 00  AX  0   0  4
+  [127] .text.BackLight_T PROGBITS        00004fd0 005fd0 000034 00  AX  0   0  4
+  [128] .text.Detect_WIFI PROGBITS        00005004 006004 000094 00  AX  0   0  4
+  [129] .text.DM_Led_Task PROGBITS        00005098 006098 000064 00  AX  0   0  4
+  [130] .text.button_init PROGBITS        000050fc 0060fc 00003a 00  AX  0   0  2
+  [131] .text.button_atta PROGBITS        00005136 006136 00000a 00  AX  0   0  2
+  [132] .text.button_hand PROGBITS        00005140 006140 000120 00  AX  0   0  2
+  [133] .text.button_star PROGBITS        00005260 006260 000024 00  AX  0   0  4
+  [134] .text.button_tick PROGBITS        00005284 006284 00001c 00  AX  0   0  4
+  [135] .text.read_button PROGBITS        000052a0 0062a0 000014 00  AX  0   0  4
+  [136] .text.TK_Sampling PROGBITS        000052b4 0062b4 000058 00  AX  0   0  4
+  [137] .text.TKEYIntHand PROGBITS        0000530c 00630c 000088 00  AX  0   0  4
+  [138] .text.get_key_num PROGBITS        00005394 006394 000028 00  AX  0   0  4
+  [139] .text.TK_Scan_Sta PROGBITS        000053bc 0063bc 000020 00  AX  0   0  4
+  [140] .text.TK_Keymap_p PROGBITS        000053dc 0063dc 000180 00  AX  0   0  4
+  [141] .text.TK_overflow PROGBITS        0000555c 00655c 00011c 00  AX  0   0  4
+  [142] .text.TK_Baseline PROGBITS        00005678 006678 0001d0 00  AX  0   0  4
+  [143] .text.TK_result_p PROGBITS        00005848 006848 000054 00  AX  0   0  4
+  [144] .text.CORETHandle PROGBITS        0000589c 00689c 000078 00  AX  0   0  4
+  [145] .text.std_clk_cal PROGBITS        00005914 006914 000284 00  AX  0   0  4
+  [146] .RomCode          PROGBITS        00005b98 0080a0 000000 00   W  0   0  1
+  [147] .rodata           PROGBITS        00005b98 006b98 000c80 00   A  0   0  4
+  [148] .data             PROGBITS        20000000 008000 0000a0 00  WA  0   0  4
+  [149] .bss              NOBITS          200000a0 0080a0 0006b8 00  WA  0   0  4
+  [150] .csky.attributes  CSKY_ATTRIBUTES 00000000 0080a0 000022 00      0   0  1
+  [151] .comment          PROGBITS        00000000 0080c2 000042 01  MS  0   0  1
+  [152] .csky_stack_size  PROGBITS        00000000 008110 0008dc 00      0   0 16
+  [153] .debug_line       PROGBITS        00000000 0089ec 0039b9 00      0   0  1
+  [154] .debug_info       PROGBITS        00000000 00c3a5 02be2a 00      0   0  1
+  [155] .debug_abbrev     PROGBITS        00000000 0381cf 00288b 00      0   0  1
+  [156] .debug_aranges    PROGBITS        00000000 03aa60 000cc8 00      0   0  8
+  [157] .debug_ranges     PROGBITS        00000000 03b728 000bf8 00      0   0  1
+  [158] .debug_str        PROGBITS        00000000 03c320 00884b 01  MS  0   0  1
+  [159] .debug_frame      PROGBITS        00000000 044b6c 001e1c 00      0   0  4
+  [160] .debug_loc        PROGBITS        00000000 046988 002f28 00      0   0  1
+  [161] .shstrtab         STRTAB          00000000 04f026 000d45 00      0   0  1
+  [162] .symtab           SYMTAB          00000000 0498b0 004220 10     163 728  4
+  [163] .strtab           STRTAB          00000000 04dad0 001556 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x06818 0x06818 R E 0x1000
+  LOAD           0x008000 0x20000000 0x00006818 0x000a0 0x00758 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__modsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_CalulateCRC .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdSelect .text.RC522_PcdAuthState .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.RLY_Light_Ctrl.part.0 .text.KEY1_LONG_PRESS_RELEASE_Handler .text.RLY_Light_Ctrl .text.LogicCtrl_Init .text.Debounce_Task .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.BackLight_Task .text.Detect_WIFI_Task .text.DM_Led_Task .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl.part.0) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Debounce_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__modsi3) for __modsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) for RC522_CalulateCRC
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) for RC522_PcdSelect
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) for RC522_PcdAuthState
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Debounce_Task) for Debounce_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.BackLight_Task) for BackLight_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) for DM_Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	__dtostr.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	__dtostr.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	__dtostr.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	__dtostr.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	__dtostr.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_eq_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_lt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_eq_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_lt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to snprintf_required.o(.text) for __cskyvprintfsnprintf
+	snprintf_required.o(.text) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	vsnprintf_required.o(.text) refers to memcpy_fast.o(.text) for memcpy
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to memcpy_fast.o(.text) for memcpy
+	vsnprintf_required.o(.text) refers to __v2_printfDFHLlMOPpSSsWp.o(.text) for __v2_printf
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _udivdi3.o(.text) for __udivdi3
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _umoddi3.o(.text) for __umoddi3
+	__dtostr.o(.text) refers to __dtostr.o(.text) for __GI___dtostr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to __dtostr.o(.text) for __dtostr
+	__dtostr.o(.text) refers to __isnan.o(.text) for __isnan
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strlen_fast.o(.text) for strlen
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strcpy_fast.o(.text) for strcpy
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strchr.o(.text) for strchr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strerror.o(.text) for strerror
+	__dtostr.o(.text) refers to __isinf.o(.text) for __isinf
+	__dtostr.o(.text) refers to _eq_df.o(.text) for __eqdf2
+	__dtostr.o(.text) refers to _lt_df.o(.text) for __ltdf2
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (487 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2894 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3088 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3405 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3150 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4118 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3521 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3637 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4837 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4945 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7594 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
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+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
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+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2843 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
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+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
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+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
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+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text.test_task(Obj/SYSTEM_rc522.o), (36 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
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+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
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+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
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+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
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+	Removing .bss(_fixunsdfsi.o), (0 bytes).
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+	Removing .bss(_addsub_df.o), (0 bytes).
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+	Removing .bss(_div_df.o), (0 bytes).
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+	Removing .bss(_si_to_df.o), (0 bytes).
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+	Removing .bss(_df_to_si.o), (0 bytes).
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+	Removing .bss(_usi_to_df.o), (0 bytes).
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+	Removing .data(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
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+	Removing .bss(_udivdi3.o), (0 bytes).
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+	Removing .text(stdinit.o), (0 bytes).
+	Removing .data(stdinit.o), (96 bytes).
+	Removing .bss(stdinit.o), (0 bytes).
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+	Removing .csky.attributes(stdinit.o), (32 bytes).
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+	Removing .bss(strcpy_fast.o), (0 bytes).
+	Removing .data(strchr.o), (0 bytes).
+	Removing .bss(strchr.o), (0 bytes).
+	Removing .data(strerror.o), (0 bytes).
+	Removing .bss(strerror.o), (0 bytes).
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+	Removing .data(_eq_df.o), (0 bytes).
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+	Removing .data(_lt_df.o), (0 bytes).
+	Removing .bss(_lt_df.o), (0 bytes).
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+
+======================================================================
+
+Image Symbol Table 
+
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+	$d                                 0x00004d24               0  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	$d                                 0x00004d44               0  .text.RLY_Light_Ctrl
+	$t                                 0x00004d44               0  .text.RLY_Light_Ctrl
+	$d                                 0x00004d60               0  .text.RLY_Light_Ctrl
+	$d                                 0x00004d64               0  .text.LogicCtrl_Init
+	$t                                 0x00004d64               0  .text.LogicCtrl_Init
+	$d                                 0x00004d98               0  .text.LogicCtrl_Init
+	$d                                 0x00004da4               0  .text.Debounce_Task
+	$t                                 0x00004da4               0  .text.Debounce_Task
+	$d                                 0x00004e00               0  .text.Debounce_Task
+	$d                                 0x00004e0c               0  .text.LogicCtrl_Task
+	$t                                 0x00004e0c               0  .text.LogicCtrl_Task
+	$d                                 0x00004e84               0  .text.LogicCtrl_Task
+	$d                                 0x00004e98               0  .text.LogicCtrl_NoRF_Init
+	$t                                 0x00004e98               0  .text.LogicCtrl_NoRF_Init
+	$d                                 0x00004ef4               0  .text.LogicCtrl_NoRF_Init
+	$d                                 0x00004f08               0  .text.LogicCtrl_NoRF_Task
+	$t                                 0x00004f08               0  .text.LogicCtrl_NoRF_Task
+	$d                                 0x00004fb4               0  .text.LogicCtrl_NoRF_Task
+	$d                                 0x00004fd0               0  .text.BackLight_Task
+	$t                                 0x00004fd0               0  .text.BackLight_Task
+	$d                                 0x00004ffc               0  .text.BackLight_Task
+	$d                                 0x00005004               0  .text.Detect_WIFI_Task
+	$t                                 0x00005004               0  .text.Detect_WIFI_Task
+	$d                                 0x00005074               0  .text.Detect_WIFI_Task
+	$d                                 0x00005098               0  .text.DM_Led_Task
+	$t                                 0x00005098               0  .text.DM_Led_Task
+	$d                                 0x000050ec               0  .text.DM_Led_Task
+	$d                                 0x000050fc               0  .text.button_init
+	$t                                 0x000050fc               0  .text.button_init
+	$d                                 0x00005136               0  .text.button_attach
+	$t                                 0x00005136               0  .text.button_attach
+	$d                                 0x00005140               0  .text.button_handler
+	$t                                 0x00005140               0  .text.button_handler
+	$d                                 0x00005260               0  .text.button_start
+	$t                                 0x00005260               0  .text.button_start
+	$d                                 0x00005280               0  .text.button_start
+	$d                                 0x00005284               0  .text.button_ticks
+	$t                                 0x00005284               0  .text.button_ticks
+	$d                                 0x0000529c               0  .text.button_ticks
+	$d                                 0x000052a0               0  .text.read_button_GPIO
+	$t                                 0x000052a0               0  .text.read_button_GPIO
+	$d                                 0x000052b0               0  .text.read_button_GPIO
+	$d                                 0x000052b4               0  .text.TK_Sampling_prog
+	$t                                 0x000052b4               0  .text.TK_Sampling_prog
+	$d                                 0x000052fc               0  .text.TK_Sampling_prog
+	$d                                 0x0000530c               0  .text.TKEYIntHandler
+	$t                                 0x0000530c               0  .text.TKEYIntHandler
+	$d                                 0x00005388               0  .text.TKEYIntHandler
+	$d                                 0x00005394               0  .text.get_key_number
+	$t                                 0x00005394               0  .text.get_key_number
+	$d                                 0x000053b8               0  .text.get_key_number
+	$d                                 0x000053bc               0  .text.TK_Scan_Start
+	$t                                 0x000053bc               0  .text.TK_Scan_Start
+	$d                                 0x000053d4               0  .text.TK_Scan_Start
+	$d                                 0x000053dc               0  .text.TK_Keymap_prog
+	$t                                 0x000053dc               0  .text.TK_Keymap_prog
+	$d                                 0x00005524               0  .text.TK_Keymap_prog
+	$d                                 0x0000555c               0  .text.TK_overflow_predict
+	$t                                 0x0000555c               0  .text.TK_overflow_predict
+	$d                                 0x00005644               0  .text.TK_overflow_predict
+	$d                                 0x00005678               0  .text.TK_Baseline_tracking
+	$t                                 0x00005678               0  .text.TK_Baseline_tracking
+	$d                                 0x0000581c               0  .text.TK_Baseline_tracking
+	$d                                 0x00005848               0  .text.TK_result_prog
+	$t                                 0x00005848               0  .text.TK_result_prog
+	$d                                 0x00005888               0  .text.TK_result_prog
+	$d                                 0x0000589c               0  .text.CORETHandler
+	$t                                 0x0000589c               0  .text.CORETHandler
+	$d                                 0x000058fc               0  .text.CORETHandler
+	$d                                 0x00005914               0  .text.std_clk_calib
+	$t                                 0x00005914               0  .text.std_clk_calib
+	$d                                 0x00005b5c               0  .text.std_clk_calib
+	bp                                 0x00005b98      O       16  .rodata
+	dp_l                               0x00005ba8      O       16  .rodata
+	dp_h                               0x00005bb8      O       16  .rodata
+	blanks.1847                        0x00005cdc      O       16  .rodata
+	zeroes.1848                        0x00005cec      O       16  .rodata
+	CSWTCH.1                           0x00005cfc      O      576  .rodata
+	NUM.6031                           0x200000ac      O        1  .bss
+	test_tick.5953                     0x200002e4      O        4  .bss
+	card_tick.5952                     0x200002e8      O        4  .bss
+	head_handle                        0x200002ec      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
+	__fixunsdfsi                       0x00000d10      F       56  .text
+	__adddf3                           0x0000101c      F       46  .text
+	__subdf3                           0x0000104c      F       54  .text
+	__muldf3                           0x00001084      F      564  .text
+	__divdf3                           0x000012b8      F      340  .text
+	__gtdf2                            0x0000140c      F       60  .text
+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__cskyvprintfsnprintf              0x00001964      F       32  .text
+	__cskyvprintfvsnprintf             0x000019c2      F       90  .text
+	__memset_fast                      0x00001a1c    w F      136  .text
+	memset                             0x00001a1c    w F      136  .text
+	__memcpy_fast                      0x00001aa4    w F      100  .text
+	memcpy                             0x00001aa4    w F      100  .text
+	__v2_printf                        0x00001b3c      F     1828  .text
+	__v2_printf$DFHLlMOPpSSsWp         0x00001b3c      F     1828  .text
+	__udivdi3                          0x00002260      F      940  .text
+	__umoddi3                          0x0000260c      F      928  .text
+	__GI___dtostr                      0x000029d2      F      826  .text
+	__dtostr                           0x000029d2      F      826  .text
+	__isnan                            0x00002d0c      F       44  .text
+	__strlen_fast                      0x00002d38    w F       82  .text
+	strlen                             0x00002d38    w F       82  .text
+	__strcpy_fast                      0x00002d8c    w F      176  .text
+	strcpy                             0x00002d8c    w F      176  .text
+	__GI_strchr                        0x00002e3c      F       18  .text
+	strchr                             0x00002e3c    w F       18  .text
+	__GI_strerror                      0x00002e50      F       28  .text
+	strerror                           0x00002e50      F       28  .text
+	__isinf                            0x00002e6c      F       48  .text
+	__eqdf2                            0x00002e9c      F       58  .text
+	__ltdf2                            0x00002ed8      F       58  .text
+	__main                             0x00002f14      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00002fc0      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x0000300c      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x0000303c      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x000030c4      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x000030ec      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00003128      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x0000313c      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00003154      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00003174      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00003190      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x000031ac      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x000031ec      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x000031f8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x0000321c      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x0000324c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x0000332c      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00003340      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x0000334e      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00003356      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x0000335e      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x00003374      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00003384      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00003394      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x000033a8      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x000033b8      F       28  .text.BT_DeInit
+	BT_Start                           0x000033d4      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x000033dc      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000033e6      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000033fe      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x0000342a      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00003430      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00003444      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00003454      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000034f4      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00003508      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x0000354c      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x00003560      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00003614      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00003624      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00003634      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x00003650      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00003668      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x00003680      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x00003698      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000036b4      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x000036d0      F      236  .text.UART_IO_Init
+	UARTInit                           0x000037bc      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x000037cc      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x000037dc      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000037fc      F       40  .text.EPT_Stop
+	main                               0x00003824      F      112  .text.startup.main
+	delay_nms                          0x00003894      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000038c0      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x00003954      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000039b4      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00003a18      F       80  .text.APT32F102_init
+	SYSCONIntHandler                   0x00003a68      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00003b58      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00003bc0      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00003c28      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00003dd4      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00003e08      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00003e88      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00003ef8      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00003f34      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00003f70      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x00004004      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x000040ec      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00004140      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00004170      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x000041a0      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x000041e8      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00004244      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x000042a4      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x000042d8      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00004324      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00004388      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x0000438a      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x00004392      F        8  .text.Trap3Handler
+	Trap2Handler                       0x0000439a      F        8  .text.Trap2Handler
+	Trap1Handler                       0x000043a2      F        8  .text.Trap1Handler
+	Trap0Handler                       0x000043aa      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x000043b2      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x000043ba      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x000043c2      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x000043ca      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x000043d2      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x000043da      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x000043e2      F        8  .text.I2CIntHandler
+	__divsi3                           0x000043ec      F       36  .text.__divsi3
+	__udivsi3                          0x00004410      F       36  .text.__udivsi3
+	__modsi3                           0x00004434      F       36  .text.__modsi3
+	__umodsi3                          0x00004458      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x0000447c      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x00004484      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x0000455c      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x000045c0      F      152  .text.Dbg_Println
+	RC522_Delay                        0x00004658      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x0000466c      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x000046c0      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x000046f8      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00004728      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x00004774      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x0000478c      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000047a6      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x000047bc      F       12  .text.RC522_PcdAntennaOff
+	RC522_CalulateCRC                  0x000047c8      F      102  .text.RC522_CalulateCRC
+	RC522_Init                         0x00004880      F      160  .text.RC522_Init
+	RC522_PcdComMF522                  0x00004920      F      314  .text.RC522_PcdComMF522
+	RC522_PcdSelect                    0x00004a5a      F      106  .text.RC522_PcdSelect
+	RC522_PcdAuthState                 0x00004ac4      F       88  .text.RC522_PcdAuthState
+	RC522_PcdRequest                   0x00004b1c      F       84  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00004b70      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x00004be4      F      220  .text.Card_Read_TasK
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00004cd4      F      112  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	RLY_Light_Ctrl                     0x00004d44      F       32  .text.RLY_Light_Ctrl
+	LogicCtrl_Init                     0x00004d64      F       64  .text.LogicCtrl_Init
+	Debounce_Task                      0x00004da4      F      104  .text.Debounce_Task
+	LogicCtrl_Task                     0x00004e0c      F      140  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00004e98      F      112  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x00004f08      F      200  .text.LogicCtrl_NoRF_Task
+	BackLight_Task                     0x00004fd0      F       52  .text.BackLight_Task
+	Detect_WIFI_Task                   0x00005004      F      148  .text.Detect_WIFI_Task
+	DM_Led_Task                        0x00005098      F      100  .text.DM_Led_Task
+	button_init                        0x000050fc      F       58  .text.button_init
+	button_attach                      0x00005136      F       10  .text.button_attach
+	button_handler                     0x00005140      F      288  .text.button_handler
+	button_start                       0x00005260      F       36  .text.button_start
+	button_ticks                       0x00005284      F       28  .text.button_ticks
+	read_button_GPIO                   0x000052a0      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x000052b4      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x0000530c      F      136  .text.TKEYIntHandler
+	get_key_number                     0x00005394      F       40  .text.get_key_number
+	TK_Scan_Start                      0x000053bc      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000053dc      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x0000555c      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00005678      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x00005848      F       84  .text.TK_result_prog
+	CORETHandler                       0x0000589c      F      120  .text.CORETHandler
+	std_clk_calib                      0x00005914      F      644  .text.std_clk_calib
+	__thenan_df                        0x00005bc8      O       20  .rodata
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+	s_tkey                             0x2000006c      O        4  .data
+	samp_setover_f                     0x20000070      O        1  .data
+	tk_overflow_en                     0x20000071      O        1  .data
+	tk_div                             0x20000072      O       34  .data
+	neg_build_bounce                   0x20000094      O        1  .data
+	pos_build_bounce                   0x20000095      O        1  .data
+	tk_scan_para0                      0x20000098      O        4  .data
+	scan_step_temp                     0x2000009c      O        1  .data
+	_end_data                          0x200000a0               0  .data
+	_bss_start                         0x200000a0               0  .bss
+	rf_exist                           0x200000a0      O        1  .bss
+	last_state                         0x200000a1      O        1  .bss
+	finish_flag                        0x200000a2      O        1  .bss
+	detect_tick                        0x200000a4      O        4  .bss
+	detect_count                       0x200000a8      O        1  .bss
+	test_state                         0x200000a9      O        1  .bss
+	SysTick_100us                      0x200000b0      O        4  .bss
+	SysTick_1ms                        0x200000b4      O        4  .bss
+	RS485_Comming                      0x200000b8      O        4  .bss
+	RS485_Comm_Flag                    0x200000bc      O        4  .bss
+	RS485_Comm_Start                   0x200000c0      O        4  .bss
+	RS485_Comm_End                     0x200000c4      O        4  .bss
+	SysTick_Now                        0x200000c8      O        4  .bss
+	SysTick_Last                       0x200000cc      O        4  .bss
+	SysTick_Diff                       0x200000d0      O        4  .bss
+	Dbg_Buffer                         0x200000d4      O      512  .bss
+	scan_tick                          0x200002d4      O        4  .bss
+	test_count                         0x200002d8      O        2  .bss
+	test_tick                          0x200002dc      O        4  .bss
+	LED_STATE                          0x200002e0      O        1  .bss
+	Press_debounce_data                0x200002f0      O        1  .bss
+	TK_Lowpower_mode                   0x200002f1      O        1  .bss
+	TK_Lowpower_level                  0x200002f2      O        1  .bss
+	TK_longpress_time                  0x200002f4      O        4  .bss
+	Release_debounce_data              0x200002f8      O        1  .bss
+	Key_mode                           0x200002f9      O        1  .bss
+	TK_icon                            0x200002fa      O       34  .bss
+	MultiTimes_Filter                  0x2000031c      O        1  .bss
+	Base_Speed                         0x2000031d      O        1  .bss
+	TK_IO_ENABLE                       0x20000320      O        4  .bss
+	Valid_Key_Num                      0x20000324      O        1  .bss
+	TK_senprd                          0x20000326      O       34  .bss
+	TK_Wakeup_level                    0x20000348      O        1  .bss
+	TK_Triggerlevel                    0x2000034a      O       34  .bss
+	TK_EC_LEVEL                        0x2000036c      O        2  .bss
+	TK_FVR_LEVEL                       0x2000036e      O        2  .bss
+	TK_BaseCnt                         0x20000370      O        4  .bss
+	TK_PSEL_MODE                       0x20000374      O        2  .bss
+	R_CMPB_BUF                         0x20000378      O        4  .bss
+	R_CMPA_BUF                         0x2000037c      O        4  .bss
+	R_SIORX_buf                        0x20000380      O       40  .bss
+	g_uart                             0x200003a8      O      115  .bss
+	CardInfo                           0x2000041b      O       40  .bss
+	g_read                             0x20000444      O        8  .bss
+	KEY1                               0x2000044c      O       48  .bss
+	dm_in                              0x2000047c      O        9  .bss
+	baseline_data0                     0x20000488      O       34  .bss
+	TK_Postive_build2                  0x200004aa      O       17  .bss
+	Key_Map1                           0x200004bc      O        4  .bss
+	offset_data2_abs                   0x200004c0      O       34  .bss
+	scan_f                             0x200004e2      O        1  .bss
+	offset_data1_abs                   0x200004e4      O       34  .bss
+	Release_debounce0                  0x20000506      O       17  .bss
+	Key_Map0                           0x20000518      O        4  .bss
+	bsae_over_f                        0x2000051c      O        1  .bss
+	scan_cnt                           0x2000051e      O        2  .bss
+	Press_debounce0                    0x20000520      O       17  .bss
+	offset_data0                       0x20000532      O       34  .bss
+	sampling_data1                     0x20000554      O       34  .bss
+	Key_Map2                           0x20000578      O        4  .bss
+	Release_debounce1                  0x2000057c      O       17  .bss
+	tk_overflow_f                      0x2000058d      O        1  .bss
+	TK_Negtive_build2                  0x2000058e      O       17  .bss
+	base_update_f                      0x2000059f      O        1  .bss
+	TK_Postive_build1                  0x200005a0      O       17  .bss
+	time_cnt                           0x200005b4      O        4  .bss
+	lpt_scan_pend_cnt                  0x200005b8      O        2  .bss
+	TK_track_cnt                       0x200005ba      O        1  .bss
+	Key_Map                            0x200005bc      O        4  .bss
+	baseline_data1                     0x200005c0      O       34  .bss
+	TK_Postive_build0                  0x200005e2      O       17  .bss
+	sampling_data2                     0x200005f4      O       34  .bss
+	offset_data1                       0x20000616      O       34  .bss
+	TK_ovrdect_cnt                     0x20000638      O        1  .bss
+	Press_debounce2                    0x20000639      O       17  .bss
+	TK_Negtive_build1                  0x2000064a      O       17  .bss
+	tk_num                             0x2000065b      O        1  .bss
+	TK_Negtive_build0                  0x2000065c      O       17  .bss
+	Press_debounce1                    0x2000066d      O       17  .bss
+	Release_debounce2                  0x2000067e      O       17  .bss
+	r_Key_Map_Temp                     0x20000690      O        4  .bss
+	tk_seque                           0x20000694      O       17  .bss
+	scan_step                          0x200006a5      O        1  .bss
+	baseline_data2                     0x200006a6      O       34  .bss
+	tk_sampling_max                    0x200006c8      O       34  .bss
+	offset_data0_abs                   0x200006ea      O       34  .bss
+	offset_data2                       0x2000070c      O       34  .bss
+	sampling_data0                     0x2000072e      O       34  .bss
+	errno                              0x20000750      O        4  .bss
+	__malloc_lock                      0x20000754      O        4  .bss
+	_ebss                              0x20000758               0  .bss
+	_end                               0x20000758               0  .bss
+	end                                0x20000758               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00006818, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1012  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1020  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1026  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1033  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1044  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1049  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1056  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1063  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1070  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1077  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1084  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1091  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1098  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1105  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1119  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1126  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1133  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1139  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1146  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1153  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000020   Code   RO       1174  .text          	snprintf_required.o
+    0x00001984   0x00000098   Code   RO       1181  .text          	vsnprintf_required.o
+    0x00001a1c   0x00000088   Code   RO       1188  .text          	memset_fast.o
+    0x00001aa4   0x00000064   Code   RO       1193  .text          	memcpy_fast.o
+    0x00001b08   0x00000758   Code   RO       1351  .text          	__v2_printfDFHLlMOPpSSsWp.o
+    0x00002260   0x000003ac   Code   RO       1410  .text          	_udivdi3.o
+    0x0000260c   0x000003a0   Code   RO       1417  .text          	_umoddi3.o
+    0x000029ac   0x00000360   Code   RO       1438  .text          	__dtostr.o
+    0x00002d0c   0x0000002c   Code   RO       1446  .text          	__isnan.o
+    0x00002d38   0x00000052   Code   RO       1458  .text          	strlen_fast.o
+    0x00002d8a   0x00000002   PAD
+    0x00002d8c   0x000000b0   Code   RO       1463  .text          	strcpy_fast.o
+    0x00002e3c   0x00000012   Code   RO       1468  .text          	strchr.o
+    0x00002e4e   0x00000002   PAD
+    0x00002e50   0x0000001c   Code   RO       1473  .text          	strerror.o
+    0x00002e6c   0x00000030   Code   RO       1481  .text          	__isinf.o
+    0x00002e9c   0x0000003a   Code   RO       1487  .text          	_eq_df.o
+    0x00002ed6   0x00000002   PAD
+    0x00002ed8   0x0000003a   Code   RO       1494  .text          	_lt_df.o
+    0x00002f14   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00002f4c   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00002fc0   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x0000300c   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x0000303c   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x000030c4   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x000030ec   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00003128   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x0000313c   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003154   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003174   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00003190   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031ac   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x000031ec   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031f8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000321c   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000324c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x0000332c   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00003340   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x0000334e   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00003356   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x0000335e   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00003374   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00003384   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00003394   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x000033a8   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x000033b8   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x000033d4   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x000033dc   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x000033e6   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000033fe   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x0000342a   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00003430   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00003444   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00003454   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x000034f4   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003508   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000354c   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003560   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003614   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x00003624   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00003634   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x00003650   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003668   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003680   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003698   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036b4   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036d0   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000037bc   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x000037cc   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x000037dc   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x000037fc   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x00003824   0x00000070   Code   RO        690  .text.startup.main	Obj/main.o
+    0x00003894   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000038c0   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x00003954   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x000039b4   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00003a18   0x00000050   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00003a68   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00003b58   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x00003bc0   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00003c28   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003dd4   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00003e08   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003e88   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00003ef8   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00003f34   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00003f70   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00004004   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x000040ec   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00004140   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00004170   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x000041a0   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x000041e8   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00004244   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x000042a4   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x000042d8   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00004324   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00004388   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x0000438a   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x00004392   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x0000439a   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x000043a2   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x000043aa   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x000043b2   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x000043ba   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x000043c2   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x000043ca   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x000043d2   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x000043da   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x000043e2   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x000043ec   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00004410   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x00004434   0x00000024   Code   RO        787  .text.__modsi3 	Obj/drivers_apt32f102.o
+    0x00004458   0x00000024   Code   RO        788  .text.__umodsi3	Obj/drivers_apt32f102.o
+    0x0000447c   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00004484   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x0000455c   0x00000064   Code   RO        822  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x000045c0   0x00000098   Code   RO        827  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00004658   0x00000012   Code   RO        848  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x0000466c   0x00000054   Code   RO        849  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x000046c0   0x00000038   Code   RO        850  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x000046f8   0x00000030   Code   RO        851  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00004728   0x0000004c   Code   RO        852  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x00004774   0x00000018   Code   RO        853  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x0000478c   0x0000001a   Code   RO        854  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000047a6   0x00000016   Code   RO        855  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x000047bc   0x0000000c   Code   RO        856  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x000047c8   0x00000066   Code   RO        858  .text.RC522_CalulateCRC	Obj/SYSTEM_rc522.o
+    0x0000482e   0x00000052   Code   RO        859  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x00004880   0x000000a0   Code   RO        861  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x00004920   0x0000013a   Code   RO        862  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x00004a5a   0x0000006a   Code   RO        864  .text.RC522_PcdSelect	Obj/SYSTEM_rc522.o
+    0x00004ac4   0x00000058   Code   RO        865  .text.RC522_PcdAuthState	Obj/SYSTEM_rc522.o
+    0x00004b1c   0x00000054   Code   RO        868  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x00004b70   0x00000074   Code   RO        869  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x00004be4   0x000000dc   Code   RO        870  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x00004cc0   0x00000014   Code   RO        889  .text.RLY_Light_Ctrl.part.0	Obj/SYSTEM_logic_ctrl.o
+    0x00004cd4   0x00000070   Code   RO        890  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x00004d44   0x00000020   Code   RO        892  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x00004d64   0x00000040   Code   RO        893  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004da4   0x00000068   Code   RO        894  .text.Debounce_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004e0c   0x0000008c   Code   RO        895  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004e98   0x00000070   Code   RO        897  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004f08   0x000000c8   Code   RO        898  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004fd0   0x00000034   Code   RO        899  .text.BackLight_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00005004   0x00000094   Code   RO        900  .text.Detect_WIFI_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00005098   0x00000064   Code   RO        901  .text.DM_Led_Task	Obj/SYSTEM_logic_ctrl.o
+    0x000050fc   0x0000003a   Code   RO        919  .text.button_init	Obj/SYSTEM_button.o
+    0x00005136   0x0000000a   Code   RO        920  .text.button_attach	Obj/SYSTEM_button.o
+    0x00005140   0x00000120   Code   RO        922  .text.button_handler	Obj/SYSTEM_button.o
+    0x00005260   0x00000024   Code   RO        923  .text.button_start	Obj/SYSTEM_button.o
+    0x00005284   0x0000001c   Code   RO        925  .text.button_ticks	Obj/SYSTEM_button.o
+    0x000052a0   0x00000014   Code   RO        926  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x000052b4   0x00000058   Code   RO        958  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000530c   0x00000088   Code   RO        962  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005394   0x00000028   Code   RO        963  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053bc   0x00000020   Code   RO        965  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053dc   0x00000180   Code   RO        966  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000555c   0x0000011c   Code   RO        967  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005678   0x000001d0   Code   RO        968  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005848   0x00000054   Code   RO        969  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000589c   0x00000078   Code   RO        970  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005914   0x00000284   Code   RO        992  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00005b98   0x00000030   Data   RO       1015  .rodata        	pow.o
+    0x00005bc8   0x00000014   Data   RO       1115  .rodata        	_thenan_df.o
+    0x00005bdc   0x00000100   Data   RO       1163  .rodata        	_clz.o
+    0x00005cdc   0x00000020   Data   RO       1354  .rodata        	__v2_printfDFHLlMOPpSSsWp.o
+    0x00005cfc   0x00000240   Data   RO       1476  .rodata        	strerror.o
+    0x00005f3c   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x00005f47   0x0000003e   Data   RO        831  .rodata.str1.1 	Obj/SYSTEM_uart.o
+    0x00005f85   0x0000007a   Data   RO        872  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x00005fff   0x00000068   Data   RO        902  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+    0x00006067   0x00000022   Data   RO       1355  .rodata.str1.1 	__v2_printfDFHLlMOPpSSsWp.o
+    0x00006089   0x00000008   Data   RO       1441  .rodata.str1.1 	__dtostr.o
+    0x00006091   0x00000787   Data   RO       1477  .rodata.str1.1 	strerror.o
+
+    Region RAM (Base: 0x20000000, Size: 0x00000758, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000004   Data   RW        819  .data          	Obj/SYSTEM_uart.o
+    0x2000006c   0x00000031   Data   RW        949  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x2000009d   0x00000003   PAD
+    0x200000a0   0x0000000a   Zero   RW        689  .bss           	Obj/main.o
+    0x200000aa   0x00000002   PAD
+    0x200000ac   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000b8   0x0000021c   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200002d4   0x0000000c   Zero   RW        847  .bss           	Obj/SYSTEM_rc522.o
+    0x200002e0   0x0000000c   Zero   RW        888  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200002ec   0x00000004   Zero   RW        918  .bss           	Obj/SYSTEM_button.o
+    0x200002f0   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000376   0x00000002   PAD
+    0x20000378   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x200003a8   0x00000073   Zero   RW        844  COMMON         	Obj/SYSTEM_uart.o
+    0x2000041b   0x00000028   Zero   RW        885  COMMON         	Obj/SYSTEM_rc522.o
+    0x20000443   0x00000001   PAD
+    0x20000444   0x00000041   Zero   RW        915  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x20000485   0x00000003   PAD
+    0x20000488   0x000002c8   Zero   RW        988  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000750   0x00000008   Zero   RW       1431  COMMON         	minilibc_init.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        269   Obj/arch_crt0.o
+         56          0          0          0        803   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
+        328          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        426          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+        112         11          0        144      10893   Obj/main.o
+        466          0          0          0      16102   Obj/mcu_initial.o
+       2434          0          0         60      14237   Obj/mcu_interrupt.o
+        144          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        468         62          4        655      13052   Obj/SYSTEM_uart.o
+       1638        122          0         52      15956   Obj/SYSTEM_rc522.o
+       1084        104          0         77      12190   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11515   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       9544        299        108        992     240903   Object Totals
+         10          0          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16339   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16339   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+        940          0          0          0          0   _udivdi3.o
+        928          0          0          0          0   _umoddi3.o
+	------------------------------------------------------------
+       5040        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         32          0          0          0          0   snprintf_required.o
+        152          0          0          0          0   vsnprintf_required.o
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+       1880         66          0          0          0   __v2_printfDFHLlMOPpSSsWp.o
+          0          0          0          8          0   minilibc_init.o
+          0          0          0          0          0   critical.o
+        864          8          0          0          0   __dtostr.o
+         44          0          0          0          0   __isnan.o
+          0          0          0          0          0   stdinit.o
+         82          0          0          0          0   strlen_fast.o
+        176          0          0          0          0   strcpy_fast.o
+         18          0          0          0          0   strchr.o
+         28       2503          0          0          0   strerror.o
+         48          0          0          0          0   __isinf.o
+	------------------------------------------------------------
+       3560       2577          0          8          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         58          0          0          0          0   _eq_df.o
+         58          0          0          0          0   _lt_df.o
+	------------------------------------------------------------
+        116          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      23434       3200        160       1720     265917   Grand Totals
+      23434       3200        160       1720     265917   Elf Image Totals
+      23434       3200        160          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				26634 (  26.01kB)
+Total	RW	Size (RW Data + ZI Data)			1880 (  1.84kB)
+Total	ROM	Size (Code + RO Data + RW Data)		26794 (  26.17kB)
+
+======================================================================
diff --git a/Source/Lst/RF_T1F_CR_V01_20241011.asm b/Source/Lst/RF_T1F_CR_V01_20241011.asm
new file mode 100644
index 0000000..5c5afb5
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20241011.asm
@@ -0,0 +1,13803 @@
+
+.//Obj/RF_T1F_CR_V01_20241011.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	000043d2 	.long	0x000043d2
+       8:	000043c2 	.long	0x000043c2
+       c:	00000184 	.long	0x00000184
+      10:	000043ca 	.long	0x000043ca
+      14:	00004388 	.long	0x00004388
+      18:	00000184 	.long	0x00000184
+      1c:	000043ba 	.long	0x000043ba
+      20:	000043b2 	.long	0x000043b2
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	000043aa 	.long	0x000043aa
+      44:	000043a2 	.long	0x000043a2
+      48:	0000439a 	.long	0x0000439a
+      4c:	00004392 	.long	0x00004392
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	0000438a 	.long	0x0000438a
+      80:	0000588c 	.long	0x0000588c
+      84:	00003a68 	.long	0x00003a68
+      88:	00003b58 	.long	0x00003b58
+      8c:	00003bc0 	.long	0x00003bc0
+      90:	00003c28 	.long	0x00003c28
+      94:	00000184 	.long	0x00000184
+      98:	00003dd4 	.long	0x00003dd4
+      9c:	00004140 	.long	0x00004140
+      a0:	00004170 	.long	0x00004170
+      a4:	00003e08 	.long	0x00003e08
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00003e88 	.long	0x00003e88
+      b4:	00003ef8 	.long	0x00003ef8
+      b8:	00003f34 	.long	0x00003f34
+      bc:	00003f70 	.long	0x00003f70
+      c0:	00000184 	.long	0x00000184
+      c4:	000043e2 	.long	0x000043e2
+      c8:	00000184 	.long	0x00000184
+      cc:	00004004 	.long	0x00004004
+      d0:	000040ec 	.long	0x000040ec
+      d4:	000041a0 	.long	0x000041a0
+      d8:	000041e8 	.long	0x000041e8
+      dc:	00004244 	.long	0x00004244
+      e0:	000043da 	.long	0x000043da
+      e4:	000052fc 	.long	0x000052fc
+      e8:	000042a4 	.long	0x000042a4
+      ec:	00000184 	.long	0x00000184
+      f0:	000042d8 	.long	0x000042d8
+      f4:	00004324 	.long	0x00004324
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x2f14	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x3824	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00002f14 	.long	0x00002f14
+     198:	00000160 	.long	0x00000160
+     19c:	00003824 	.long	0x00003824
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x5b88	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00005b88 	.long	0x00005b88
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x5b88	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x5b88	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00005b88 	.long	0x00005b88
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x5bb8	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00005bb8 	.long	0x00005bb8
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x5bb8	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00005bb8 	.long	0x00005bb8
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x5bb8	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00005bb8 	.long	0x00005bb8
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x5bcc	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	00005bcc 	.long	0x00005bcc
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__cskyvprintfsnprintf>:
+    1964:	1422      	subi      	r14, r14, 8
+    1966:	b861      	st.w      	r3, (r14, 0x4)
+    1968:	b840      	st.w      	r2, (r14, 0x0)
+    196a:	14d0      	push      	r15
+    196c:	1421      	subi      	r14, r14, 4
+    196e:	9862      	ld.w      	r3, (r14, 0x8)
+    1970:	b860      	st.w      	r3, (r14, 0x0)
+    1972:	9840      	ld.w      	r2, (r14, 0x0)
+    1974:	1b03      	addi      	r3, r14, 12
+    1976:	e0000026 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+    197a:	1401      	addi      	r14, r14, 4
+    197c:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    1980:	1403      	addi      	r14, r14, 12
+    1982:	783c      	jmp      	r15
+
+00001984 <swrite>:
+    1984:	14d3      	push      	r4-r6, r15
+    1986:	6d4b      	mov      	r5, r2
+    1988:	9582      	ld.w      	r4, (r5, 0x8)
+    198a:	9241      	ld.w      	r2, (r2, 0x4)
+    198c:	610a      	subu      	r4, r2
+    198e:	3c40      	cmpnei      	r4, 0
+    1990:	6d87      	mov      	r6, r1
+    1992:	0c16      	bf      	0x19be	// 19be <swrite+0x3a>
+    1994:	6504      	cmphs      	r1, r4
+    1996:	0802      	bt      	0x199a	// 199a <swrite+0x16>
+    1998:	6d07      	mov      	r4, r1
+    199a:	9560      	ld.w      	r3, (r5, 0x0)
+    199c:	3b40      	cmpnei      	r3, 0
+    199e:	0c0d      	bf      	0x19b8	// 19b8 <swrite+0x34>
+    19a0:	60c8      	addu      	r3, r2
+    19a2:	6c43      	mov      	r1, r0
+    19a4:	6c93      	mov      	r2, r4
+    19a6:	6c0f      	mov      	r0, r3
+    19a8:	e000007e 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    19ac:	9500      	ld.w      	r0, (r5, 0x0)
+    19ae:	9521      	ld.w      	r1, (r5, 0x4)
+    19b0:	6010      	addu      	r0, r4
+    19b2:	6004      	addu      	r0, r1
+    19b4:	3200      	movi      	r2, 0
+    19b6:	a040      	st.b      	r2, (r0, 0x0)
+    19b8:	9561      	ld.w      	r3, (r5, 0x4)
+    19ba:	610c      	addu      	r4, r3
+    19bc:	b581      	st.w      	r4, (r5, 0x4)
+    19be:	6c1b      	mov      	r0, r6
+    19c0:	1493      	pop      	r4-r6, r15
+
+000019c2 <__cskyvprintfvsnprintf>:
+    19c2:	14d3      	push      	r4-r6, r15
+    19c4:	1425      	subi      	r14, r14, 20
+    19c6:	6d07      	mov      	r4, r1
+    19c8:	6d43      	mov      	r5, r0
+    19ca:	6c4b      	mov      	r1, r2
+    19cc:	1802      	addi      	r0, r14, 8
+    19ce:	3200      	movi      	r2, 0
+    19d0:	3c40      	cmpnei      	r4, 0
+    19d2:	b0a0      	st.w      	r5, (r0, 0x0)
+    19d4:	b041      	st.w      	r2, (r0, 0x4)
+    19d6:	0c1c      	bf      	0x1a0e	// 1a0e <__cskyvprintfvsnprintf+0x4c>
+    19d8:	5cc3      	subi      	r6, r4, 1
+    19da:	b0c2      	st.w      	r6, (r0, 0x8)
+    19dc:	b800      	st.w      	r0, (r14, 0x0)
+    19de:	6c8f      	mov      	r2, r3
+    19e0:	100e      	lrw      	r0, 0x1984	// 1a18 <__cskyvprintfvsnprintf+0x56>
+    19e2:	b801      	st.w      	r0, (r14, 0x4)
+    19e4:	6c3b      	mov      	r0, r14
+    19e6:	e00000ab 	bsr      	0x1b3c	// 1b3c <__v2_printf>
+    19ea:	3d40      	cmpnei      	r5, 0
+    19ec:	0c0f      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19ee:	3c40      	cmpnei      	r4, 0
+    19f0:	0c0d      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f2:	38df      	btsti      	r0, 31
+    19f4:	080b      	bt      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f6:	3300      	movi      	r3, 0
+    19f8:	2b00      	subi      	r3, 1
+    19fa:	64d2      	cmpne      	r4, r3
+    19fc:	0c0b      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    19fe:	6500      	cmphs      	r0, r4
+    1a00:	0c09      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    1a02:	6114      	addu      	r4, r5
+    1a04:	2c00      	subi      	r4, 1
+    1a06:	3100      	movi      	r1, 0
+    1a08:	a420      	st.b      	r1, (r4, 0x0)
+    1a0a:	1405      	addi      	r14, r14, 20
+    1a0c:	1493      	pop      	r4-r6, r15
+    1a0e:	3600      	movi      	r6, 0
+    1a10:	07e5      	br      	0x19da	// 19da <__cskyvprintfvsnprintf+0x18>
+    1a12:	5d80      	addu      	r4, r5, r0
+    1a14:	07f9      	br      	0x1a06	// 1a06 <__cskyvprintfvsnprintf+0x44>
+    1a16:	0000      	bkpt
+    1a18:	00001984 	.long	0x00001984
+
+00001a1c <__memset_fast>:
+    1a1c:	14c3      	push      	r4-r6
+    1a1e:	7444      	zextb      	r1, r1
+    1a20:	3a40      	cmpnei      	r2, 0
+    1a22:	0c1f      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a24:	6d43      	mov      	r5, r0
+    1a26:	6d03      	mov      	r4, r0
+    1a28:	3603      	movi      	r6, 3
+    1a2a:	6918      	and      	r4, r6
+    1a2c:	3c40      	cmpnei      	r4, 0
+    1a2e:	0c1a      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a30:	a520      	st.b      	r1, (r5, 0x0)
+    1a32:	2a00      	subi      	r2, 1
+    1a34:	3a40      	cmpnei      	r2, 0
+    1a36:	0c15      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a38:	2500      	addi      	r5, 1
+    1a3a:	6d17      	mov      	r4, r5
+    1a3c:	3603      	movi      	r6, 3
+    1a3e:	6918      	and      	r4, r6
+    1a40:	3c40      	cmpnei      	r4, 0
+    1a42:	0c10      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a44:	a520      	st.b      	r1, (r5, 0x0)
+    1a46:	2a00      	subi      	r2, 1
+    1a48:	3a40      	cmpnei      	r2, 0
+    1a4a:	0c0b      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a4c:	2500      	addi      	r5, 1
+    1a4e:	6d17      	mov      	r4, r5
+    1a50:	3603      	movi      	r6, 3
+    1a52:	6918      	and      	r4, r6
+    1a54:	3c40      	cmpnei      	r4, 0
+    1a56:	0c06      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a58:	a520      	st.b      	r1, (r5, 0x0)
+    1a5a:	2a00      	subi      	r2, 1
+    1a5c:	2500      	addi      	r5, 1
+    1a5e:	0402      	br      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a60:	1483      	pop      	r4-r6
+    1a62:	4168      	lsli      	r3, r1, 8
+    1a64:	6c4c      	or      	r1, r3
+    1a66:	4170      	lsli      	r3, r1, 16
+    1a68:	6c4c      	or      	r1, r3
+    1a6a:	3a2f      	cmplti      	r2, 16
+    1a6c:	0809      	bt      	0x1a7e	// 1a7e <__memset_fast+0x62>
+    1a6e:	b520      	st.w      	r1, (r5, 0x0)
+    1a70:	b521      	st.w      	r1, (r5, 0x4)
+    1a72:	b522      	st.w      	r1, (r5, 0x8)
+    1a74:	b523      	st.w      	r1, (r5, 0xc)
+    1a76:	2a0f      	subi      	r2, 16
+    1a78:	250f      	addi      	r5, 16
+    1a7a:	3a2f      	cmplti      	r2, 16
+    1a7c:	0ff9      	bf      	0x1a6e	// 1a6e <__memset_fast+0x52>
+    1a7e:	3a23      	cmplti      	r2, 4
+    1a80:	0806      	bt      	0x1a8c	// 1a8c <__memset_fast+0x70>
+    1a82:	2a03      	subi      	r2, 4
+    1a84:	b520      	st.w      	r1, (r5, 0x0)
+    1a86:	2503      	addi      	r5, 4
+    1a88:	3a23      	cmplti      	r2, 4
+    1a8a:	0ffc      	bf      	0x1a82	// 1a82 <__memset_fast+0x66>
+    1a8c:	3a40      	cmpnei      	r2, 0
+    1a8e:	0fe9      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a90:	2a00      	subi      	r2, 1
+    1a92:	a520      	st.b      	r1, (r5, 0x0)
+    1a94:	3a40      	cmpnei      	r2, 0
+    1a96:	0fe5      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a98:	2a00      	subi      	r2, 1
+    1a9a:	a521      	st.b      	r1, (r5, 0x1)
+    1a9c:	3a40      	cmpnei      	r2, 0
+    1a9e:	0fe1      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1aa0:	a522      	st.b      	r1, (r5, 0x2)
+    1aa2:	1483      	pop      	r4-r6
+
+00001aa4 <__memcpy_fast>:
+    1aa4:	14c3      	push      	r4-r6
+    1aa6:	6d83      	mov      	r6, r0
+    1aa8:	6d07      	mov      	r4, r1
+    1aaa:	6d18      	or      	r4, r6
+    1aac:	3303      	movi      	r3, 3
+    1aae:	690c      	and      	r4, r3
+    1ab0:	3c40      	cmpnei      	r4, 0
+    1ab2:	0c0b      	bf      	0x1ac8	// 1ac8 <__memcpy_fast+0x24>
+    1ab4:	3a40      	cmpnei      	r2, 0
+    1ab6:	0c08      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1ab8:	8160      	ld.b      	r3, (r1, 0x0)
+    1aba:	2100      	addi      	r1, 1
+    1abc:	2a00      	subi      	r2, 1
+    1abe:	a660      	st.b      	r3, (r6, 0x0)
+    1ac0:	2600      	addi      	r6, 1
+    1ac2:	3a40      	cmpnei      	r2, 0
+    1ac4:	0bfa      	bt      	0x1ab8	// 1ab8 <__memcpy_fast+0x14>
+    1ac6:	1483      	pop      	r4-r6
+    1ac8:	3a2f      	cmplti      	r2, 16
+    1aca:	080e      	bt      	0x1ae6	// 1ae6 <__memcpy_fast+0x42>
+    1acc:	91a0      	ld.w      	r5, (r1, 0x0)
+    1ace:	9161      	ld.w      	r3, (r1, 0x4)
+    1ad0:	9182      	ld.w      	r4, (r1, 0x8)
+    1ad2:	b6a0      	st.w      	r5, (r6, 0x0)
+    1ad4:	91a3      	ld.w      	r5, (r1, 0xc)
+    1ad6:	b661      	st.w      	r3, (r6, 0x4)
+    1ad8:	b682      	st.w      	r4, (r6, 0x8)
+    1ada:	b6a3      	st.w      	r5, (r6, 0xc)
+    1adc:	2a0f      	subi      	r2, 16
+    1ade:	210f      	addi      	r1, 16
+    1ae0:	260f      	addi      	r6, 16
+    1ae2:	3a2f      	cmplti      	r2, 16
+    1ae4:	0ff4      	bf      	0x1acc	// 1acc <__memcpy_fast+0x28>
+    1ae6:	3a23      	cmplti      	r2, 4
+    1ae8:	0808      	bt      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+    1aea:	9160      	ld.w      	r3, (r1, 0x0)
+    1aec:	2a03      	subi      	r2, 4
+    1aee:	2103      	addi      	r1, 4
+    1af0:	b660      	st.w      	r3, (r6, 0x0)
+    1af2:	2603      	addi      	r6, 4
+    1af4:	3a23      	cmplti      	r2, 4
+    1af6:	0ffa      	bf      	0x1aea	// 1aea <__memcpy_fast+0x46>
+    1af8:	3a40      	cmpnei      	r2, 0
+    1afa:	0fe6      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1afc:	8160      	ld.b      	r3, (r1, 0x0)
+    1afe:	2100      	addi      	r1, 1
+    1b00:	2a00      	subi      	r2, 1
+    1b02:	a660      	st.b      	r3, (r6, 0x0)
+    1b04:	2600      	addi      	r6, 1
+    1b06:	07f9      	br      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+
+00001b08 <PAD.1851>:
+    1b08:	14d4      	push      	r4-r7, r15
+    1b0a:	3820      	cmplti      	r0, 1
+    1b0c:	6d03      	mov      	r4, r0
+    1b0e:	6d47      	mov      	r5, r1
+    1b10:	6df7      	mov      	r7, r13
+    1b12:	080d      	bt      	0x1b2c	// 1b2c <PAD.1851+0x24>
+    1b14:	6d83      	mov      	r6, r0
+    1b16:	3e30      	cmplti      	r6, 17
+    1b18:	9700      	ld.w      	r0, (r7, 0x0)
+    1b1a:	0c0a      	bf      	0x1b2e	// 1b2e <PAD.1851+0x26>
+    1b1c:	5c63      	subi      	r3, r4, 1
+    1b1e:	4b24      	lsri      	r1, r3, 4
+    1b20:	4164      	lsli      	r3, r1, 4
+    1b22:	9040      	ld.w      	r2, (r0, 0x0)
+    1b24:	5c2d      	subu      	r1, r4, r3
+    1b26:	9081      	ld.w      	r4, (r0, 0x4)
+    1b28:	6c17      	mov      	r0, r5
+    1b2a:	7bd1      	jsr      	r4
+    1b2c:	1494      	pop      	r4-r7, r15
+    1b2e:	9040      	ld.w      	r2, (r0, 0x0)
+    1b30:	9061      	ld.w      	r3, (r0, 0x4)
+    1b32:	3110      	movi      	r1, 16
+    1b34:	6c17      	mov      	r0, r5
+    1b36:	7bcd      	jsr      	r3
+    1b38:	2e0f      	subi      	r6, 16
+    1b3a:	07ee      	br      	0x1b16	// 1b16 <PAD.1851+0xe>
+
+00001b3c <__v2_printf>:
+    1b3c:	14d4      	push      	r4-r7, r15
+    1b3e:	143c      	subi      	r14, r14, 112
+    1b40:	b826      	st.w      	r1, (r14, 0x18)
+    1b42:	1912      	addi      	r1, r14, 72
+    1b44:	1b21      	addi      	r3, r14, 132
+    1b46:	b810      	st.w      	r0, (r14, 0x40)
+    1b48:	2100      	addi      	r1, 1
+    1b4a:	3000      	movi      	r0, 0
+    1b4c:	6d4b      	mov      	r5, r2
+    1b4e:	b871      	st.w      	r3, (r14, 0x44)
+    1b50:	b80a      	st.w      	r0, (r14, 0x28)
+    1b52:	b809      	st.w      	r0, (r14, 0x24)
+    1b54:	b82d      	st.w      	r1, (r14, 0x34)
+    1b56:	9886      	ld.w      	r4, (r14, 0x18)
+    1b58:	3325      	movi      	r3, 37
+    1b5a:	84c0      	ld.b      	r6, (r4, 0x0)
+    1b5c:	3e40      	cmpnei      	r6, 0
+    1b5e:	0c03      	bf      	0x1b64	// 1b64 <__v2_printf+0x28>
+    1b60:	64da      	cmpne      	r6, r3
+    1b62:	0845      	bt      	0x1bec	// 1bec <__v2_printf+0xb0>
+    1b64:	9846      	ld.w      	r2, (r14, 0x18)
+    1b66:	5cc9      	subu      	r6, r4, r2
+    1b68:	3e40      	cmpnei      	r6, 0
+    1b6a:	0c0a      	bf      	0x1b7e	// 1b7e <__v2_printf+0x42>
+    1b6c:	9870      	ld.w      	r3, (r14, 0x40)
+    1b6e:	9340      	ld.w      	r2, (r3, 0x0)
+    1b70:	6c5b      	mov      	r1, r6
+    1b72:	9361      	ld.w      	r3, (r3, 0x4)
+    1b74:	9806      	ld.w      	r0, (r14, 0x18)
+    1b76:	7bcd      	jsr      	r3
+    1b78:	9809      	ld.w      	r0, (r14, 0x24)
+    1b7a:	6018      	addu      	r0, r6
+    1b7c:	b809      	st.w      	r0, (r14, 0x24)
+    1b7e:	8420      	ld.b      	r1, (r4, 0x0)
+    1b80:	3940      	cmpnei      	r1, 0
+    1b82:	0803      	bt      	0x1b88	// 1b88 <__v2_printf+0x4c>
+    1b84:	e8000367 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1b88:	3637      	movi      	r6, 55
+    1b8a:	1a01      	addi      	r2, r14, 4
+    1b8c:	3700      	movi      	r7, 0
+    1b8e:	6188      	addu      	r6, r2
+    1b90:	a6e0      	st.b      	r7, (r6, 0x0)
+    1b92:	3300      	movi      	r3, 0
+    1b94:	3600      	movi      	r6, 0
+    1b96:	2400      	addi      	r4, 1
+    1b98:	3000      	movi      	r0, 0
+    1b9a:	3100      	movi      	r1, 0
+    1b9c:	2e00      	subi      	r6, 1
+    1b9e:	b867      	st.w      	r3, (r14, 0x1c)
+    1ba0:	3700      	movi      	r7, 0
+    1ba2:	5c42      	addi      	r2, r4, 1
+    1ba4:	b846      	st.w      	r2, (r14, 0x18)
+    1ba6:	8480      	ld.b      	r4, (r4, 0x0)
+    1ba8:	3364      	movi      	r3, 100
+    1baa:	64d2      	cmpne      	r4, r3
+    1bac:	0d90      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1bae:	650d      	cmplt      	r3, r4
+    1bb0:	084e      	bt      	0x1c4c	// 1c4c <__v2_printf+0x110>
+    1bb2:	322e      	movi      	r2, 46
+    1bb4:	6492      	cmpne      	r4, r2
+    1bb6:	0d41      	bf      	0x1e38	// 1e38 <__v2_printf+0x2fc>
+    1bb8:	6509      	cmplt      	r2, r4
+    1bba:	0829      	bt      	0x1c0c	// 1c0c <__v2_printf+0xd0>
+    1bbc:	332a      	movi      	r3, 42
+    1bbe:	64d2      	cmpne      	r4, r3
+    1bc0:	0d31      	bf      	0x1e22	// 1e22 <__v2_printf+0x2e6>
+    1bc2:	650d      	cmplt      	r3, r4
+    1bc4:	081c      	bt      	0x1bfc	// 1bfc <__v2_printf+0xc0>
+    1bc6:	3220      	movi      	r2, 32
+    1bc8:	6492      	cmpne      	r4, r2
+    1bca:	0d25      	bf      	0x1e14	// 1e14 <__v2_printf+0x2d8>
+    1bcc:	3323      	movi      	r3, 35
+    1bce:	64d2      	cmpne      	r4, r3
+    1bd0:	0d27      	bf      	0x1e1e	// 1e1e <__v2_printf+0x2e2>
+    1bd2:	3c40      	cmpnei      	r4, 0
+    1bd4:	0803      	bt      	0x1bda	// 1bda <__v2_printf+0x9e>
+    1bd6:	e800033e 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1bda:	1e12      	addi      	r6, r14, 72
+    1bdc:	3037      	movi      	r0, 55
+    1bde:	1a01      	addi      	r2, r14, 4
+    1be0:	a680      	st.b      	r4, (r6, 0x0)
+    1be2:	6008      	addu      	r0, r2
+    1be4:	3400      	movi      	r4, 0
+    1be6:	a080      	st.b      	r4, (r0, 0x0)
+    1be8:	b8a5      	st.w      	r5, (r14, 0x14)
+    1bea:	042c      	br      	0x1c42	// 1c42 <__v2_printf+0x106>
+    1bec:	2400      	addi      	r4, 1
+    1bee:	07b6      	br      	0x1b5a	// 1b5a <__v2_printf+0x1e>
+    1bf0:	3001      	movi      	r0, 1
+    1bf2:	312b      	movi      	r1, 43
+    1bf4:	9886      	ld.w      	r4, (r14, 0x18)
+    1bf6:	07d6      	br      	0x1ba2	// 1ba2 <__v2_printf+0x66>
+    1bf8:	6d4f      	mov      	r5, r3
+    1bfa:	07fd      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1bfc:	322b      	movi      	r2, 43
+    1bfe:	6492      	cmpne      	r4, r2
+    1c00:	0ff8      	bf      	0x1bf0	// 1bf0 <__v2_printf+0xb4>
+    1c02:	332d      	movi      	r3, 45
+    1c04:	64d2      	cmpne      	r4, r3
+    1c06:	0be6      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c08:	3fa2      	bseti      	r7, 2
+    1c0a:	07f5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c0c:	3339      	movi      	r3, 57
+    1c0e:	650d      	cmplt      	r3, r4
+    1c10:	0809      	bt      	0x1c22	// 1c22 <__v2_printf+0xe6>
+    1c12:	3231      	movi      	r2, 49
+    1c14:	6491      	cmplt      	r4, r2
+    1c16:	0d34      	bf      	0x1e7e	// 1e7e <__v2_printf+0x342>
+    1c18:	3330      	movi      	r3, 48
+    1c1a:	64d2      	cmpne      	r4, r3
+    1c1c:	0bdb      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c1e:	3fa7      	bseti      	r7, 7
+    1c20:	07ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c22:	3258      	movi      	r2, 88
+    1c24:	6492      	cmpne      	r4, r2
+    1c26:	0cd3      	bf      	0x1dcc	// 1dcc <__v2_printf+0x290>
+    1c28:	3063      	movi      	r0, 99
+    1c2a:	6412      	cmpne      	r4, r0
+    1c2c:	0bd3      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c2e:	3337      	movi      	r3, 55
+    1c30:	1a01      	addi      	r2, r14, 4
+    1c32:	5d2e      	addi      	r1, r5, 4
+    1c34:	85c0      	ld.b      	r6, (r5, 0x0)
+    1c36:	3400      	movi      	r4, 0
+    1c38:	1d12      	addi      	r5, r14, 72
+    1c3a:	60c8      	addu      	r3, r2
+    1c3c:	b825      	st.w      	r1, (r14, 0x14)
+    1c3e:	a5c0      	st.b      	r6, (r5, 0x0)
+    1c40:	a380      	st.b      	r4, (r3, 0x0)
+    1c42:	3601      	movi      	r6, 1
+    1c44:	3500      	movi      	r5, 0
+    1c46:	1c12      	addi      	r4, r14, 72
+    1c48:	e8000295 	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1c4c:	336d      	movi      	r3, 109
+    1c4e:	64d2      	cmpne      	r4, r3
+    1c50:	0d2d      	bf      	0x1eaa	// 1eaa <__v2_printf+0x36e>
+    1c52:	650d      	cmplt      	r3, r4
+    1c54:	0883      	bt      	0x1d5a	// 1d5a <__v2_printf+0x21e>
+    1c56:	3268      	movi      	r2, 104
+    1c58:	6492      	cmpne      	r4, r2
+    1c5a:	0d24      	bf      	0x1ea2	// 1ea2 <__v2_printf+0x366>
+    1c5c:	6509      	cmplt      	r2, r4
+    1c5e:	086f      	bt      	0x1d3c	// 1d3c <__v2_printf+0x200>
+    1c60:	3366      	movi      	r3, 102
+    1c62:	64d1      	cmplt      	r4, r3
+    1c64:	0bb7      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c66:	3840      	cmpnei      	r0, 0
+    1c68:	0c05      	bf      	0x1c72	// 1c72 <__v2_printf+0x136>
+    1c6a:	3037      	movi      	r0, 55
+    1c6c:	1a01      	addi      	r2, r14, 4
+    1c6e:	6008      	addu      	r0, r2
+    1c70:	a020      	st.b      	r1, (r0, 0x0)
+    1c72:	5d3e      	addi      	r1, r5, 8
+    1c74:	b825      	st.w      	r1, (r14, 0x14)
+    1c76:	9500      	ld.w      	r0, (r5, 0x0)
+    1c78:	9521      	ld.w      	r1, (r5, 0x4)
+    1c7a:	98a7      	ld.w      	r5, (r14, 0x1c)
+    1c7c:	3d40      	cmpnei      	r5, 0
+    1c7e:	0803      	bt      	0x1c84	// 1c84 <__v2_printf+0x148>
+    1c80:	3301      	movi      	r3, 1
+    1c82:	b867      	st.w      	r3, (r14, 0x1c)
+    1c84:	3200      	movi      	r2, 0
+    1c86:	2a00      	subi      	r2, 1
+    1c88:	649a      	cmpne      	r6, r2
+    1c8a:	0d58      	bf      	0x1f3a	// 1f3a <__v2_printf+0x3fe>
+    1c8c:	6d5b      	mov      	r5, r6
+    1c8e:	9867      	ld.w      	r3, (r14, 0x1c)
+    1c90:	b860      	st.w      	r3, (r14, 0x0)
+    1c92:	b8a1      	st.w      	r5, (r14, 0x4)
+    1c94:	3328      	movi      	r3, 40
+    1c96:	1a12      	addi      	r2, r14, 72
+    1c98:	e000069d 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    1c9c:	3100      	movi      	r1, 0
+    1c9e:	2900      	subi      	r1, 1
+    1ca0:	645a      	cmpne      	r6, r1
+    1ca2:	b808      	st.w      	r0, (r14, 0x20)
+    1ca4:	0c1a      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1ca6:	312e      	movi      	r1, 46
+    1ca8:	980d      	ld.w      	r0, (r14, 0x34)
+    1caa:	e00008c9 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cae:	3840      	cmpnei      	r0, 0
+    1cb0:	98c8      	ld.w      	r6, (r14, 0x20)
+    1cb2:	0d48      	bf      	0x1f42	// 1f42 <__v2_printf+0x406>
+    1cb4:	3d40      	cmpnei      	r5, 0
+    1cb6:	0805      	bt      	0x1cc0	// 1cc0 <__v2_printf+0x184>
+    1cb8:	3101      	movi      	r1, 1
+    1cba:	685c      	and      	r1, r7
+    1cbc:	3940      	cmpnei      	r1, 0
+    1cbe:	0d40      	bf      	0x1f3e	// 1f3e <__v2_printf+0x402>
+    1cc0:	58c2      	addi      	r6, r0, 1
+    1cc2:	2500      	addi      	r5, 1
+    1cc4:	5d59      	subu      	r2, r5, r6
+    1cc6:	6080      	addu      	r2, r0
+    1cc8:	3a20      	cmplti      	r2, 1
+    1cca:	0805      	bt      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1ccc:	2600      	addi      	r6, 1
+    1cce:	8660      	ld.b      	r3, (r6, 0x0)
+    1cd0:	3b40      	cmpnei      	r3, 0
+    1cd2:	0bf9      	bt      	0x1cc4	// 1cc4 <__v2_printf+0x188>
+    1cd4:	3500      	movi      	r5, 0
+    1cd6:	a6a0      	st.b      	r5, (r6, 0x0)
+    1cd8:	3067      	movi      	r0, 103
+    1cda:	6412      	cmpne      	r4, r0
+    1cdc:	0822      	bt      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cde:	312e      	movi      	r1, 46
+    1ce0:	1812      	addi      	r0, r14, 72
+    1ce2:	e00008ad 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1ce6:	3840      	cmpnei      	r0, 0
+    1ce8:	6d03      	mov      	r4, r0
+    1cea:	0c1b      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cec:	3165      	movi      	r1, 101
+    1cee:	e00008a7 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cf2:	6c43      	mov      	r1, r0
+    1cf4:	84c0      	ld.b      	r6, (r4, 0x0)
+    1cf6:	3e40      	cmpnei      	r6, 0
+    1cf8:	0930      	bt      	0x1f58	// 1f58 <__v2_printf+0x41c>
+    1cfa:	3940      	cmpnei      	r1, 0
+    1cfc:	0c02      	bf      	0x1d00	// 1d00 <__v2_printf+0x1c4>
+    1cfe:	6d07      	mov      	r4, r1
+    1d00:	3630      	movi      	r6, 48
+    1d02:	5c63      	subi      	r3, r4, 1
+    1d04:	8340      	ld.b      	r2, (r3, 0x0)
+    1d06:	658a      	cmpne      	r2, r6
+    1d08:	0d2a      	bf      	0x1f5c	// 1f5c <__v2_printf+0x420>
+    1d0a:	352e      	movi      	r5, 46
+    1d0c:	654a      	cmpne      	r2, r5
+    1d0e:	0802      	bt      	0x1d12	// 1d12 <__v2_printf+0x1d6>
+    1d10:	6d0f      	mov      	r4, r3
+    1d12:	3000      	movi      	r0, 0
+    1d14:	3940      	cmpnei      	r1, 0
+    1d16:	a400      	st.b      	r0, (r4, 0x0)
+    1d18:	0c04      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1d1a:	6c13      	mov      	r0, r4
+    1d1c:	e0000838 	bsr      	0x2d8c	// 2d8c <__strcpy_fast>
+    1d20:	1912      	addi      	r1, r14, 72
+    1d22:	81c0      	ld.b      	r6, (r1, 0x0)
+    1d24:	332d      	movi      	r3, 45
+    1d26:	64da      	cmpne      	r6, r3
+    1d28:	0c02      	bf      	0x1d2c	// 1d2c <__v2_printf+0x1f0>
+    1d2a:	05ef      	br      	0x2108	// 2108 <__v2_printf+0x5cc>
+    1d2c:	3437      	movi      	r4, 55
+    1d2e:	1801      	addi      	r0, r14, 4
+    1d30:	352d      	movi      	r5, 45
+    1d32:	6100      	addu      	r4, r0
+    1d34:	a4a0      	st.b      	r5, (r4, 0x0)
+    1d36:	1912      	addi      	r1, r14, 72
+    1d38:	5982      	addi      	r4, r1, 1
+    1d3a:	05ec      	br      	0x2112	// 2112 <__v2_printf+0x5d6>
+    1d3c:	3369      	movi      	r3, 105
+    1d3e:	64d2      	cmpne      	r4, r3
+    1d40:	0cc6      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1d42:	326c      	movi      	r2, 108
+    1d44:	6492      	cmpne      	r4, r2
+    1d46:	0b46      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d48:	9866      	ld.w      	r3, (r14, 0x18)
+    1d4a:	8340      	ld.b      	r2, (r3, 0x0)
+    1d4c:	650a      	cmpne      	r2, r4
+    1d4e:	08ac      	bt      	0x1ea6	// 1ea6 <__v2_printf+0x36a>
+    1d50:	9886      	ld.w      	r4, (r14, 0x18)
+    1d52:	2400      	addi      	r4, 1
+    1d54:	b886      	st.w      	r4, (r14, 0x18)
+    1d56:	3fa5      	bseti      	r7, 5
+    1d58:	074e      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1d5a:	3371      	movi      	r3, 113
+    1d5c:	64d2      	cmpne      	r4, r3
+    1d5e:	0ffc      	bf      	0x1d56	// 1d56 <__v2_printf+0x21a>
+    1d60:	650d      	cmplt      	r3, r4
+    1d62:	081a      	bt      	0x1d96	// 1d96 <__v2_printf+0x25a>
+    1d64:	306f      	movi      	r0, 111
+    1d66:	6412      	cmpne      	r4, r0
+    1d68:	0cfc      	bf      	0x1f60	// 1f60 <__v2_printf+0x424>
+    1d6a:	3170      	movi      	r1, 112
+    1d6c:	6452      	cmpne      	r4, r1
+    1d6e:	0b32      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d70:	5d4e      	addi      	r2, r5, 4
+    1d72:	3400      	movi      	r4, 0
+    1d74:	95a0      	ld.w      	r5, (r5, 0x0)
+    1d76:	b845      	st.w      	r2, (r14, 0x14)
+    1d78:	1901      	addi      	r1, r14, 4
+    1d7a:	3239      	movi      	r2, 57
+    1d7c:	b8a3      	st.w      	r5, (r14, 0xc)
+    1d7e:	b884      	st.w      	r4, (r14, 0x10)
+    1d80:	3330      	movi      	r3, 48
+    1d82:	180f      	addi      	r0, r14, 60
+    1d84:	3578      	movi      	r5, 120
+    1d86:	6084      	addu      	r2, r1
+    1d88:	0195      	lrw      	r4, 0x6068	// 20b0 <__v2_printf+0x574>
+    1d8a:	3fa1      	bseti      	r7, 1
+    1d8c:	a060      	st.b      	r3, (r0, 0x0)
+    1d8e:	a2a0      	st.b      	r5, (r2, 0x0)
+    1d90:	b88a      	st.w      	r4, (r14, 0x28)
+    1d92:	3402      	movi      	r4, 2
+    1d94:	04f1      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1d96:	3275      	movi      	r2, 117
+    1d98:	6492      	cmpne      	r4, r2
+    1d9a:	0d28      	bf      	0x1fea	// 1fea <__v2_printf+0x4ae>
+    1d9c:	3378      	movi      	r3, 120
+    1d9e:	64d2      	cmpne      	r4, r3
+    1da0:	0d44      	bf      	0x2028	// 2028 <__v2_printf+0x4ec>
+    1da2:	3173      	movi      	r1, 115
+    1da4:	6452      	cmpne      	r4, r1
+    1da6:	0b16      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1da8:	3200      	movi      	r2, 0
+    1daa:	3037      	movi      	r0, 55
+    1dac:	1901      	addi      	r1, r14, 4
+    1dae:	2a00      	subi      	r2, 1
+    1db0:	5d6e      	addi      	r3, r5, 4
+    1db2:	9580      	ld.w      	r4, (r5, 0x0)
+    1db4:	6004      	addu      	r0, r1
+    1db6:	3500      	movi      	r5, 0
+    1db8:	649a      	cmpne      	r6, r2
+    1dba:	b865      	st.w      	r3, (r14, 0x14)
+    1dbc:	a0a0      	st.b      	r5, (r0, 0x0)
+    1dbe:	090b      	bt      	0x1fd4	// 1fd4 <__v2_printf+0x498>
+    1dc0:	6cd3      	mov      	r3, r4
+    1dc2:	83c0      	ld.b      	r6, (r3, 0x0)
+    1dc4:	3e40      	cmpnei      	r6, 0
+    1dc6:	0910      	bt      	0x1fe6	// 1fe6 <__v2_printf+0x4aa>
+    1dc8:	5bd1      	subu      	r6, r3, r4
+    1dca:	047f      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1dcc:	3840      	cmpnei      	r0, 0
+    1dce:	0c05      	bf      	0x1dd8	// 1dd8 <__v2_printf+0x29c>
+    1dd0:	3037      	movi      	r0, 55
+    1dd2:	1b01      	addi      	r3, r14, 4
+    1dd4:	600c      	addu      	r0, r3
+    1dd6:	a020      	st.b      	r1, (r0, 0x0)
+    1dd8:	0228      	lrw      	r1, 0x6057	// 20b4 <__v2_printf+0x578>
+    1dda:	3020      	movi      	r0, 32
+    1ddc:	681c      	and      	r0, r7
+    1dde:	3840      	cmpnei      	r0, 0
+    1de0:	b82a      	st.w      	r1, (r14, 0x28)
+    1de2:	0d2b      	bf      	0x2038	// 2038 <__v2_printf+0x4fc>
+    1de4:	5d5e      	addi      	r2, r5, 8
+    1de6:	b845      	st.w      	r2, (r14, 0x14)
+    1de8:	9520      	ld.w      	r1, (r5, 0x0)
+    1dea:	9541      	ld.w      	r2, (r5, 0x4)
+    1dec:	b823      	st.w      	r1, (r14, 0xc)
+    1dee:	b844      	st.w      	r2, (r14, 0x10)
+    1df0:	3001      	movi      	r0, 1
+    1df2:	681c      	and      	r0, r7
+    1df4:	3840      	cmpnei      	r0, 0
+    1df6:	0fce      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1df8:	98a3      	ld.w      	r5, (r14, 0xc)
+    1dfa:	9864      	ld.w      	r3, (r14, 0x10)
+    1dfc:	6d4c      	or      	r5, r3
+    1dfe:	3d40      	cmpnei      	r5, 0
+    1e00:	0fc9      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e02:	3039      	movi      	r0, 57
+    1e04:	1d01      	addi      	r5, r14, 4
+    1e06:	3130      	movi      	r1, 48
+    1e08:	1a0f      	addi      	r2, r14, 60
+    1e0a:	6014      	addu      	r0, r5
+    1e0c:	a220      	st.b      	r1, (r2, 0x0)
+    1e0e:	a080      	st.b      	r4, (r0, 0x0)
+    1e10:	3fa1      	bseti      	r7, 1
+    1e12:	07c0      	br      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e14:	3940      	cmpnei      	r1, 0
+    1e16:	0aef      	bt      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e18:	3001      	movi      	r0, 1
+    1e1a:	3120      	movi      	r1, 32
+    1e1c:	06ec      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e1e:	3fa0      	bseti      	r7, 0
+    1e20:	06ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e22:	9580      	ld.w      	r4, (r5, 0x0)
+    1e24:	3cdf      	btsti      	r4, 31
+    1e26:	5d6e      	addi      	r3, r5, 4
+    1e28:	b887      	st.w      	r4, (r14, 0x1c)
+    1e2a:	0ee7      	bf      	0x1bf8	// 1bf8 <__v2_printf+0xbc>
+    1e2c:	9847      	ld.w      	r2, (r14, 0x1c)
+    1e2e:	3500      	movi      	r5, 0
+    1e30:	614a      	subu      	r5, r2
+    1e32:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1e34:	6d4f      	mov      	r5, r3
+    1e36:	06e9      	br      	0x1c08	// 1c08 <__v2_printf+0xcc>
+    1e38:	98c6      	ld.w      	r6, (r14, 0x18)
+    1e3a:	8680      	ld.b      	r4, (r6, 0x0)
+    1e3c:	322a      	movi      	r2, 42
+    1e3e:	9866      	ld.w      	r3, (r14, 0x18)
+    1e40:	6492      	cmpne      	r4, r2
+    1e42:	2300      	addi      	r3, 1
+    1e44:	0c0b      	bf      	0x1e5a	// 1e5a <__v2_printf+0x31e>
+    1e46:	b865      	st.w      	r3, (r14, 0x14)
+    1e48:	3600      	movi      	r6, 0
+    1e4a:	3300      	movi      	r3, 0
+    1e4c:	2b2f      	subi      	r3, 48
+    1e4e:	60d0      	addu      	r3, r4
+    1e50:	3b09      	cmphsi      	r3, 10
+    1e52:	9845      	ld.w      	r2, (r14, 0x14)
+    1e54:	0c0c      	bf      	0x1e6c	// 1e6c <__v2_printf+0x330>
+    1e56:	b846      	st.w      	r2, (r14, 0x18)
+    1e58:	06a8      	br      	0x1ba8	// 1ba8 <__v2_printf+0x6c>
+    1e5a:	95c0      	ld.w      	r6, (r5, 0x0)
+    1e5c:	3edf      	btsti      	r6, 31
+    1e5e:	5d8e      	addi      	r4, r5, 4
+    1e60:	0c03      	bf      	0x1e66	// 1e66 <__v2_printf+0x32a>
+    1e62:	3600      	movi      	r6, 0
+    1e64:	2e00      	subi      	r6, 1
+    1e66:	6d53      	mov      	r5, r4
+    1e68:	b866      	st.w      	r3, (r14, 0x18)
+    1e6a:	06c5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e6c:	340a      	movi      	r4, 10
+    1e6e:	7d18      	mult      	r4, r6
+    1e70:	9845      	ld.w      	r2, (r14, 0x14)
+    1e72:	6d8f      	mov      	r6, r3
+    1e74:	6190      	addu      	r6, r4
+    1e76:	8280      	ld.b      	r4, (r2, 0x0)
+    1e78:	2200      	addi      	r2, 1
+    1e7a:	b845      	st.w      	r2, (r14, 0x14)
+    1e7c:	07e7      	br      	0x1e4a	// 1e4a <__v2_printf+0x30e>
+    1e7e:	3200      	movi      	r2, 0
+    1e80:	b847      	st.w      	r2, (r14, 0x1c)
+    1e82:	9867      	ld.w      	r3, (r14, 0x1c)
+    1e84:	320a      	movi      	r2, 10
+    1e86:	7cc8      	mult      	r3, r2
+    1e88:	2c2f      	subi      	r4, 48
+    1e8a:	610c      	addu      	r4, r3
+    1e8c:	b887      	st.w      	r4, (r14, 0x1c)
+    1e8e:	3300      	movi      	r3, 0
+    1e90:	9886      	ld.w      	r4, (r14, 0x18)
+    1e92:	5c42      	addi      	r2, r4, 1
+    1e94:	2b2f      	subi      	r3, 48
+    1e96:	8480      	ld.b      	r4, (r4, 0x0)
+    1e98:	60d0      	addu      	r3, r4
+    1e9a:	3b09      	cmphsi      	r3, 10
+    1e9c:	b846      	st.w      	r2, (r14, 0x18)
+    1e9e:	0ff2      	bf      	0x1e82	// 1e82 <__v2_printf+0x346>
+    1ea0:	07db      	br      	0x1e56	// 1e56 <__v2_printf+0x31a>
+    1ea2:	3fa6      	bseti      	r7, 6
+    1ea4:	06a8      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1ea6:	3fa4      	bseti      	r7, 4
+    1ea8:	06a6      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1eaa:	3840      	cmpnei      	r0, 0
+    1eac:	0c05      	bf      	0x1eb6	// 1eb6 <__v2_printf+0x37a>
+    1eae:	3637      	movi      	r6, 55
+    1eb0:	1b01      	addi      	r3, r14, 4
+    1eb2:	618c      	addu      	r6, r3
+    1eb4:	a620      	st.b      	r1, (r6, 0x0)
+    1eb6:	033e      	lrw      	r1, 0x20000750	// 20b8 <__v2_printf+0x57c>
+    1eb8:	9100      	ld.w      	r0, (r1, 0x0)
+    1eba:	e00007cb 	bsr      	0x2e50	// 2e50 <__GI_strerror>
+    1ebe:	6d03      	mov      	r4, r0
+    1ec0:	e000073c 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    1ec4:	6d83      	mov      	r6, r0
+    1ec6:	b8a5      	st.w      	r5, (r14, 0x14)
+    1ec8:	3500      	movi      	r5, 0
+    1eca:	0554      	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1ecc:	3840      	cmpnei      	r0, 0
+    1ece:	0c05      	bf      	0x1ed8	// 1ed8 <__v2_printf+0x39c>
+    1ed0:	3037      	movi      	r0, 55
+    1ed2:	1a01      	addi      	r2, r14, 4
+    1ed4:	6008      	addu      	r0, r2
+    1ed6:	a020      	st.b      	r1, (r0, 0x0)
+    1ed8:	3420      	movi      	r4, 32
+    1eda:	691c      	and      	r4, r7
+    1edc:	3c40      	cmpnei      	r4, 0
+    1ede:	0c1a      	bf      	0x1f12	// 1f12 <__v2_printf+0x3d6>
+    1ee0:	5d7e      	addi      	r3, r5, 8
+    1ee2:	9520      	ld.w      	r1, (r5, 0x0)
+    1ee4:	9541      	ld.w      	r2, (r5, 0x4)
+    1ee6:	b865      	st.w      	r3, (r14, 0x14)
+    1ee8:	b823      	st.w      	r1, (r14, 0xc)
+    1eea:	b844      	st.w      	r2, (r14, 0x10)
+    1eec:	9804      	ld.w      	r0, (r14, 0x10)
+    1eee:	38df      	btsti      	r0, 31
+    1ef0:	0c0f      	bf      	0x1f0e	// 1f0e <__v2_printf+0x3d2>
+    1ef2:	9883      	ld.w      	r4, (r14, 0xc)
+    1ef4:	98a4      	ld.w      	r5, (r14, 0x10)
+    1ef6:	3200      	movi      	r2, 0
+    1ef8:	3300      	movi      	r3, 0
+    1efa:	6488      	cmphs      	r2, r2
+    1efc:	6093      	subc      	r2, r4
+    1efe:	60d7      	subc      	r3, r5
+    1f00:	b843      	st.w      	r2, (r14, 0xc)
+    1f02:	b864      	st.w      	r3, (r14, 0x10)
+    1f04:	3237      	movi      	r2, 55
+    1f06:	1b01      	addi      	r3, r14, 4
+    1f08:	352d      	movi      	r5, 45
+    1f0a:	608c      	addu      	r2, r3
+    1f0c:	a2a0      	st.b      	r5, (r2, 0x0)
+    1f0e:	3401      	movi      	r4, 1
+    1f10:	0438      	br      	0x1f80	// 1f80 <__v2_printf+0x444>
+    1f12:	3310      	movi      	r3, 16
+    1f14:	68dc      	and      	r3, r7
+    1f16:	3b40      	cmpnei      	r3, 0
+    1f18:	0c08      	bf      	0x1f28	// 1f28 <__v2_printf+0x3ec>
+    1f1a:	5d4e      	addi      	r2, r5, 4
+    1f1c:	b845      	st.w      	r2, (r14, 0x14)
+    1f1e:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f20:	559f      	asri      	r4, r5, 31
+    1f22:	b8a3      	st.w      	r5, (r14, 0xc)
+    1f24:	b884      	st.w      	r4, (r14, 0x10)
+    1f26:	07e3      	br      	0x1eec	// 1eec <__v2_printf+0x3b0>
+    1f28:	3140      	movi      	r1, 64
+    1f2a:	685c      	and      	r1, r7
+    1f2c:	5d0e      	addi      	r0, r5, 4
+    1f2e:	3940      	cmpnei      	r1, 0
+    1f30:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f32:	b805      	st.w      	r0, (r14, 0x14)
+    1f34:	0ff6      	bf      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f36:	7557      	sexth      	r5, r5
+    1f38:	07f4      	br      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f3a:	3506      	movi      	r5, 6
+    1f3c:	06a9      	br      	0x1c8e	// 1c8e <__v2_printf+0x152>
+    1f3e:	6d83      	mov      	r6, r0
+    1f40:	06ca      	br      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1f42:	3201      	movi      	r2, 1
+    1f44:	689c      	and      	r2, r7
+    1f46:	3a40      	cmpnei      	r2, 0
+    1f48:	0ec8      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f4a:	1d12      	addi      	r5, r14, 72
+    1f4c:	6158      	addu      	r5, r6
+    1f4e:	332e      	movi      	r3, 46
+    1f50:	3000      	movi      	r0, 0
+    1f52:	a560      	st.b      	r3, (r5, 0x0)
+    1f54:	a501      	st.b      	r0, (r5, 0x1)
+    1f56:	06c1      	br      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f58:	2400      	addi      	r4, 1
+    1f5a:	06cd      	br      	0x1cf4	// 1cf4 <__v2_printf+0x1b8>
+    1f5c:	6d0f      	mov      	r4, r3
+    1f5e:	06d2      	br      	0x1d02	// 1d02 <__v2_printf+0x1c6>
+    1f60:	3320      	movi      	r3, 32
+    1f62:	68dc      	and      	r3, r7
+    1f64:	3b40      	cmpnei      	r3, 0
+    1f66:	0c24      	bf      	0x1fae	// 1fae <__v2_printf+0x472>
+    1f68:	5d7e      	addi      	r3, r5, 8
+    1f6a:	9500      	ld.w      	r0, (r5, 0x0)
+    1f6c:	9521      	ld.w      	r1, (r5, 0x4)
+    1f6e:	b865      	st.w      	r3, (r14, 0x14)
+    1f70:	b803      	st.w      	r0, (r14, 0xc)
+    1f72:	b824      	st.w      	r1, (r14, 0x10)
+    1f74:	3400      	movi      	r4, 0
+    1f76:	3537      	movi      	r5, 55
+    1f78:	1801      	addi      	r0, r14, 4
+    1f7a:	3200      	movi      	r2, 0
+    1f7c:	6140      	addu      	r5, r0
+    1f7e:	a540      	st.b      	r2, (r5, 0x0)
+    1f80:	3100      	movi      	r1, 0
+    1f82:	2900      	subi      	r1, 1
+    1f84:	9803      	ld.w      	r0, (r14, 0xc)
+    1f86:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f88:	645a      	cmpne      	r6, r1
+    1f8a:	6c14      	or      	r0, r5
+    1f8c:	0cc8      	bf      	0x211c	// 211c <__v2_printf+0x5e0>
+    1f8e:	6c9f      	mov      	r2, r7
+    1f90:	3a87      	bclri      	r2, 7
+    1f92:	3840      	cmpnei      	r0, 0
+    1f94:	b848      	st.w      	r2, (r14, 0x20)
+    1f96:	08c6      	bt      	0x2122	// 2122 <__v2_printf+0x5e6>
+    1f98:	3e40      	cmpnei      	r6, 0
+    1f9a:	0cac      	bf      	0x20f2	// 20f2 <__v2_printf+0x5b6>
+    1f9c:	3c41      	cmpnei      	r4, 1
+    1f9e:	0c68      	bf      	0x206e	// 206e <__v2_printf+0x532>
+    1fa0:	3c42      	cmpnei      	r4, 2
+    1fa2:	0c8d      	bf      	0x20bc	// 20bc <__v2_printf+0x580>
+    1fa4:	3300      	movi      	r3, 0
+    1fa6:	3400      	movi      	r4, 0
+    1fa8:	b863      	st.w      	r3, (r14, 0xc)
+    1faa:	b884      	st.w      	r4, (r14, 0x10)
+    1fac:	04bf      	br      	0x212a	// 212a <__v2_printf+0x5ee>
+    1fae:	3010      	movi      	r0, 16
+    1fb0:	681c      	and      	r0, r7
+    1fb2:	3840      	cmpnei      	r0, 0
+    1fb4:	0c05      	bf      	0x1fbe	// 1fbe <__v2_printf+0x482>
+    1fb6:	5d8e      	addi      	r4, r5, 4
+    1fb8:	b885      	st.w      	r4, (r14, 0x14)
+    1fba:	95a0      	ld.w      	r5, (r5, 0x0)
+    1fbc:	0408      	br      	0x1fcc	// 1fcc <__v2_printf+0x490>
+    1fbe:	3240      	movi      	r2, 64
+    1fc0:	689c      	and      	r2, r7
+    1fc2:	5d2e      	addi      	r1, r5, 4
+    1fc4:	3a40      	cmpnei      	r2, 0
+    1fc6:	b825      	st.w      	r1, (r14, 0x14)
+    1fc8:	0ff9      	bf      	0x1fba	// 1fba <__v2_printf+0x47e>
+    1fca:	8da0      	ld.h      	r5, (r5, 0x0)
+    1fcc:	3400      	movi      	r4, 0
+    1fce:	b8a3      	st.w      	r5, (r14, 0xc)
+    1fd0:	b884      	st.w      	r4, (r14, 0x10)
+    1fd2:	07d2      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1fd4:	5cb8      	addu      	r5, r4, r6
+    1fd6:	6cd3      	mov      	r3, r4
+    1fd8:	654e      	cmpne      	r3, r5
+    1fda:	0f77      	bf      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1fdc:	8300      	ld.b      	r0, (r3, 0x0)
+    1fde:	3840      	cmpnei      	r0, 0
+    1fe0:	0ef4      	bf      	0x1dc8	// 1dc8 <__v2_printf+0x28c>
+    1fe2:	2300      	addi      	r3, 1
+    1fe4:	07fa      	br      	0x1fd8	// 1fd8 <__v2_printf+0x49c>
+    1fe6:	2300      	addi      	r3, 1
+    1fe8:	06ed      	br      	0x1dc2	// 1dc2 <__v2_printf+0x286>
+    1fea:	3420      	movi      	r4, 32
+    1fec:	691c      	and      	r4, r7
+    1fee:	3c40      	cmpnei      	r4, 0
+    1ff0:	0c09      	bf      	0x2002	// 2002 <__v2_printf+0x4c6>
+    1ff2:	5d7e      	addi      	r3, r5, 8
+    1ff4:	9520      	ld.w      	r1, (r5, 0x0)
+    1ff6:	9541      	ld.w      	r2, (r5, 0x4)
+    1ff8:	b865      	st.w      	r3, (r14, 0x14)
+    1ffa:	b823      	st.w      	r1, (r14, 0xc)
+    1ffc:	b844      	st.w      	r2, (r14, 0x10)
+    1ffe:	3401      	movi      	r4, 1
+    2000:	07bb      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    2002:	3310      	movi      	r3, 16
+    2004:	68dc      	and      	r3, r7
+    2006:	3b40      	cmpnei      	r3, 0
+    2008:	0c05      	bf      	0x2012	// 2012 <__v2_printf+0x4d6>
+    200a:	5d0e      	addi      	r0, r5, 4
+    200c:	b805      	st.w      	r0, (r14, 0x14)
+    200e:	95a0      	ld.w      	r5, (r5, 0x0)
+    2010:	0408      	br      	0x2020	// 2020 <__v2_printf+0x4e4>
+    2012:	3140      	movi      	r1, 64
+    2014:	685c      	and      	r1, r7
+    2016:	5d4e      	addi      	r2, r5, 4
+    2018:	3940      	cmpnei      	r1, 0
+    201a:	b845      	st.w      	r2, (r14, 0x14)
+    201c:	0ff9      	bf      	0x200e	// 200e <__v2_printf+0x4d2>
+    201e:	8da0      	ld.h      	r5, (r5, 0x0)
+    2020:	3400      	movi      	r4, 0
+    2022:	b8a3      	st.w      	r5, (r14, 0xc)
+    2024:	b884      	st.w      	r4, (r14, 0x10)
+    2026:	07ec      	br      	0x1ffe	// 1ffe <__v2_printf+0x4c2>
+    2028:	3840      	cmpnei      	r0, 0
+    202a:	0c05      	bf      	0x2034	// 2034 <__v2_printf+0x4f8>
+    202c:	3337      	movi      	r3, 55
+    202e:	1a01      	addi      	r2, r14, 4
+    2030:	60c8      	addu      	r3, r2
+    2032:	a320      	st.b      	r1, (r3, 0x0)
+    2034:	103f      	lrw      	r1, 0x6068	// 20b0 <__v2_printf+0x574>
+    2036:	06d2      	br      	0x1dda	// 1dda <__v2_printf+0x29e>
+    2038:	3310      	movi      	r3, 16
+    203a:	68dc      	and      	r3, r7
+    203c:	3b40      	cmpnei      	r3, 0
+    203e:	0c05      	bf      	0x2048	// 2048 <__v2_printf+0x50c>
+    2040:	5d0e      	addi      	r0, r5, 4
+    2042:	b805      	st.w      	r0, (r14, 0x14)
+    2044:	95a0      	ld.w      	r5, (r5, 0x0)
+    2046:	0408      	br      	0x2056	// 2056 <__v2_printf+0x51a>
+    2048:	3240      	movi      	r2, 64
+    204a:	689c      	and      	r2, r7
+    204c:	5d2e      	addi      	r1, r5, 4
+    204e:	3a40      	cmpnei      	r2, 0
+    2050:	b825      	st.w      	r1, (r14, 0x14)
+    2052:	0ff9      	bf      	0x2044	// 2044 <__v2_printf+0x508>
+    2054:	8da0      	ld.h      	r5, (r5, 0x0)
+    2056:	3300      	movi      	r3, 0
+    2058:	b8a3      	st.w      	r5, (r14, 0xc)
+    205a:	b864      	st.w      	r3, (r14, 0x10)
+    205c:	06ca      	br      	0x1df0	// 1df0 <__v2_printf+0x2b4>
+    205e:	6cd3      	mov      	r3, r4
+    2060:	0467      	br      	0x212e	// 212e <__v2_printf+0x5f2>
+    2062:	9884      	ld.w      	r4, (r14, 0x10)
+    2064:	3c40      	cmpnei      	r4, 0
+    2066:	080b      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    2068:	9843      	ld.w      	r2, (r14, 0xc)
+    206a:	3a09      	cmphsi      	r2, 10
+    206c:	0808      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    206e:	9883      	ld.w      	r4, (r14, 0xc)
+    2070:	242f      	addi      	r4, 48
+    2072:	1f1a      	addi      	r7, r14, 104
+    2074:	a787      	st.b      	r4, (r7, 0x7)
+    2076:	1c12      	addi      	r4, r14, 72
+    2078:	2426      	addi      	r4, 39
+    207a:	0478      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    207c:	1c1c      	addi      	r4, r14, 112
+    207e:	3530      	movi      	r5, 48
+    2080:	320a      	movi      	r2, 10
+    2082:	3300      	movi      	r3, 0
+    2084:	9803      	ld.w      	r0, (r14, 0xc)
+    2086:	9824      	ld.w      	r1, (r14, 0x10)
+    2088:	e00002c2 	bsr      	0x260c	// 260c <__umoddi3>
+    208c:	6014      	addu      	r0, r5
+    208e:	2c00      	subi      	r4, 1
+    2090:	a400      	st.b      	r0, (r4, 0x0)
+    2092:	320a      	movi      	r2, 10
+    2094:	9803      	ld.w      	r0, (r14, 0xc)
+    2096:	9824      	ld.w      	r1, (r14, 0x10)
+    2098:	3300      	movi      	r3, 0
+    209a:	e00000e3 	bsr      	0x2260	// 2260 <__udivdi3>
+    209e:	b803      	st.w      	r0, (r14, 0xc)
+    20a0:	b824      	st.w      	r1, (r14, 0x10)
+    20a2:	9823      	ld.w      	r1, (r14, 0xc)
+    20a4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20a6:	6c5c      	or      	r1, r7
+    20a8:	3940      	cmpnei      	r1, 0
+    20aa:	0beb      	bt      	0x2080	// 2080 <__v2_printf+0x544>
+    20ac:	045f      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20ae:	0000      	bkpt
+    20b0:	00006068 	.long	0x00006068
+    20b4:	00006057 	.long	0x00006057
+    20b8:	20000750 	.long	0x20000750
+    20bc:	3300      	movi      	r3, 0
+    20be:	3400      	movi      	r4, 0
+    20c0:	b863      	st.w      	r3, (r14, 0xc)
+    20c2:	b884      	st.w      	r4, (r14, 0x10)
+    20c4:	1c1c      	addi      	r4, r14, 112
+    20c6:	320f      	movi      	r2, 15
+    20c8:	9803      	ld.w      	r0, (r14, 0xc)
+    20ca:	982a      	ld.w      	r1, (r14, 0x28)
+    20cc:	6808      	and      	r0, r2
+    20ce:	6004      	addu      	r0, r1
+    20d0:	80a0      	ld.b      	r5, (r0, 0x0)
+    20d2:	2c00      	subi      	r4, 1
+    20d4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20d6:	a4a0      	st.b      	r5, (r4, 0x0)
+    20d8:	98a4      	ld.w      	r5, (r14, 0x10)
+    20da:	9863      	ld.w      	r3, (r14, 0xc)
+    20dc:	471c      	lsli      	r0, r7, 28
+    20de:	4de4      	lsri      	r7, r5, 4
+    20e0:	4b24      	lsri      	r1, r3, 4
+    20e2:	b8e4      	st.w      	r7, (r14, 0x10)
+    20e4:	6c04      	or      	r0, r1
+    20e6:	9864      	ld.w      	r3, (r14, 0x10)
+    20e8:	b803      	st.w      	r0, (r14, 0xc)
+    20ea:	6c0c      	or      	r0, r3
+    20ec:	3840      	cmpnei      	r0, 0
+    20ee:	0bed      	bt      	0x20c8	// 20c8 <__v2_printf+0x58c>
+    20f0:	043d      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20f2:	3c40      	cmpnei      	r4, 0
+    20f4:	0808      	bt      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20f6:	3301      	movi      	r3, 1
+    20f8:	68dc      	and      	r3, r7
+    20fa:	3b40      	cmpnei      	r3, 0
+    20fc:	0c04      	bf      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20fe:	1f1a      	addi      	r7, r14, 104
+    2100:	3430      	movi      	r4, 48
+    2102:	07b9      	br      	0x2074	// 2074 <__v2_printf+0x538>
+    2104:	1c1c      	addi      	r4, r14, 112
+    2106:	0432      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    2108:	322b      	movi      	r2, 43
+    210a:	649a      	cmpne      	r6, r2
+    210c:	0802      	bt      	0x2110	// 2110 <__v2_printf+0x5d4>
+    210e:	0614      	br      	0x1d36	// 1d36 <__v2_printf+0x1fa>
+    2110:	1c12      	addi      	r4, r14, 72
+    2112:	6c13      	mov      	r0, r4
+    2114:	e0000612 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    2118:	6d83      	mov      	r6, r0
+    211a:	06d7      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    211c:	3840      	cmpnei      	r0, 0
+    211e:	b8e8      	st.w      	r7, (r14, 0x20)
+    2120:	0f3e      	bf      	0x1f9c	// 1f9c <__v2_printf+0x460>
+    2122:	3c41      	cmpnei      	r4, 1
+    2124:	0f9f      	bf      	0x2062	// 2062 <__v2_printf+0x526>
+    2126:	3c42      	cmpnei      	r4, 2
+    2128:	0fce      	bf      	0x20c4	// 20c4 <__v2_printf+0x588>
+    212a:	1b1c      	addi      	r3, r14, 112
+    212c:	3707      	movi      	r7, 7
+    212e:	9823      	ld.w      	r1, (r14, 0xc)
+    2130:	685c      	and      	r1, r7
+    2132:	212f      	addi      	r1, 48
+    2134:	9804      	ld.w      	r0, (r14, 0x10)
+    2136:	7484      	zextb      	r2, r1
+    2138:	9823      	ld.w      	r1, (r14, 0xc)
+    213a:	40bd      	lsli      	r5, r0, 29
+    213c:	4903      	lsri      	r0, r1, 3
+    213e:	9824      	ld.w      	r1, (r14, 0x10)
+    2140:	4923      	lsri      	r1, r1, 3
+    2142:	b824      	st.w      	r1, (r14, 0x10)
+    2144:	6d40      	or      	r5, r0
+    2146:	9804      	ld.w      	r0, (r14, 0x10)
+    2148:	b8a3      	st.w      	r5, (r14, 0xc)
+    214a:	6d40      	or      	r5, r0
+    214c:	5b83      	subi      	r4, r3, 1
+    214e:	3d40      	cmpnei      	r5, 0
+    2150:	a440      	st.b      	r2, (r4, 0x0)
+    2152:	0b86      	bt      	0x205e	// 205e <__v2_printf+0x522>
+    2154:	3701      	movi      	r7, 1
+    2156:	9828      	ld.w      	r1, (r14, 0x20)
+    2158:	69c4      	and      	r7, r1
+    215a:	3f40      	cmpnei      	r7, 0
+    215c:	0c07      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    215e:	3530      	movi      	r5, 48
+    2160:	654a      	cmpne      	r2, r5
+    2162:	0c04      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    2164:	5b87      	subi      	r4, r3, 2
+    2166:	3330      	movi      	r3, 48
+    2168:	a460      	st.b      	r3, (r4, 0x0)
+    216a:	6d5b      	mov      	r5, r6
+    216c:	1e1c      	addi      	r6, r14, 112
+    216e:	6192      	subu      	r6, r4
+    2170:	98e8      	ld.w      	r7, (r14, 0x20)
+    2172:	6595      	cmplt      	r5, r6
+    2174:	b8a8      	st.w      	r5, (r14, 0x20)
+    2176:	0c02      	bf      	0x217a	// 217a <__v2_printf+0x63e>
+    2178:	b8c8      	st.w      	r6, (r14, 0x20)
+    217a:	3037      	movi      	r0, 55
+    217c:	1b01      	addi      	r3, r14, 4
+    217e:	600c      	addu      	r0, r3
+    2180:	8040      	ld.b      	r2, (r0, 0x0)
+    2182:	3a40      	cmpnei      	r2, 0
+    2184:	0c04      	bf      	0x218c	// 218c <__v2_printf+0x650>
+    2186:	9828      	ld.w      	r1, (r14, 0x20)
+    2188:	2100      	addi      	r1, 1
+    218a:	b828      	st.w      	r1, (r14, 0x20)
+    218c:	3002      	movi      	r0, 2
+    218e:	681c      	and      	r0, r7
+    2190:	3840      	cmpnei      	r0, 0
+    2192:	b80b      	st.w      	r0, (r14, 0x2c)
+    2194:	0c04      	bf      	0x219c	// 219c <__v2_printf+0x660>
+    2196:	9868      	ld.w      	r3, (r14, 0x20)
+    2198:	2301      	addi      	r3, 2
+    219a:	b868      	st.w      	r3, (r14, 0x20)
+    219c:	3284      	movi      	r2, 132
+    219e:	689c      	and      	r2, r7
+    21a0:	3a40      	cmpnei      	r2, 0
+    21a2:	b84c      	st.w      	r2, (r14, 0x30)
+    21a4:	080b      	bt      	0x21ba	// 21ba <__v2_printf+0x67e>
+    21a6:	3310      	movi      	r3, 16
+    21a8:	1a0c      	addi      	r2, r14, 48
+    21aa:	9827      	ld.w      	r1, (r14, 0x1c)
+    21ac:	9808      	ld.w      	r0, (r14, 0x20)
+    21ae:	60c8      	addu      	r3, r2
+    21b0:	5901      	subu      	r0, r1, r0
+    21b2:	6f4f      	mov      	r13, r3
+    21b4:	1129      	lrw      	r1, 0x5ccc	// 2258 <__v2_printf+0x71c>
+    21b6:	e3fffca9 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    21ba:	3137      	movi      	r1, 55
+    21bc:	1801      	addi      	r0, r14, 4
+    21be:	6040      	addu      	r1, r0
+    21c0:	8160      	ld.b      	r3, (r1, 0x0)
+    21c2:	3b40      	cmpnei      	r3, 0
+    21c4:	0c0b      	bf      	0x21da	// 21da <__v2_printf+0x69e>
+    21c6:	9830      	ld.w      	r1, (r14, 0x40)
+    21c8:	9101      	ld.w      	r0, (r1, 0x4)
+    21ca:	b802      	st.w      	r0, (r14, 0x8)
+    21cc:	1b0c      	addi      	r3, r14, 48
+    21ce:	300b      	movi      	r0, 11
+    21d0:	9140      	ld.w      	r2, (r1, 0x0)
+    21d2:	600c      	addu      	r0, r3
+    21d4:	3101      	movi      	r1, 1
+    21d6:	9862      	ld.w      	r3, (r14, 0x8)
+    21d8:	7bcd      	jsr      	r3
+    21da:	984b      	ld.w      	r2, (r14, 0x2c)
+    21dc:	3a40      	cmpnei      	r2, 0
+    21de:	0c07      	bf      	0x21ec	// 21ec <__v2_printf+0x6b0>
+    21e0:	9830      	ld.w      	r1, (r14, 0x40)
+    21e2:	9140      	ld.w      	r2, (r1, 0x0)
+    21e4:	9161      	ld.w      	r3, (r1, 0x4)
+    21e6:	180f      	addi      	r0, r14, 60
+    21e8:	3102      	movi      	r1, 2
+    21ea:	7bcd      	jsr      	r3
+    21ec:	3080      	movi      	r0, 128
+    21ee:	984c      	ld.w      	r2, (r14, 0x30)
+    21f0:	640a      	cmpne      	r2, r0
+    21f2:	080b      	bt      	0x2208	// 2208 <__v2_printf+0x6cc>
+    21f4:	9827      	ld.w      	r1, (r14, 0x1c)
+    21f6:	9868      	ld.w      	r3, (r14, 0x20)
+    21f8:	590d      	subu      	r0, r1, r3
+    21fa:	1a0c      	addi      	r2, r14, 48
+    21fc:	3110      	movi      	r1, 16
+    21fe:	6048      	addu      	r1, r2
+    2200:	6f47      	mov      	r13, r1
+    2202:	1037      	lrw      	r1, 0x5cdc	// 225c <__v2_printf+0x720>
+    2204:	e3fffc82 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    2208:	5d19      	subu      	r0, r5, r6
+    220a:	1b0c      	addi      	r3, r14, 48
+    220c:	3510      	movi      	r5, 16
+    220e:	614c      	addu      	r5, r3
+    2210:	6f57      	mov      	r13, r5
+    2212:	6d77      	mov      	r5, r13
+    2214:	1032      	lrw      	r1, 0x5cdc	// 225c <__v2_printf+0x720>
+    2216:	e3fffc79 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    221a:	9500      	ld.w      	r0, (r5, 0x0)
+    221c:	9040      	ld.w      	r2, (r0, 0x0)
+    221e:	9061      	ld.w      	r3, (r0, 0x4)
+    2220:	6c13      	mov      	r0, r4
+    2222:	3404      	movi      	r4, 4
+    2224:	6c5b      	mov      	r1, r6
+    2226:	691c      	and      	r4, r7
+    2228:	7bcd      	jsr      	r3
+    222a:	3c40      	cmpnei      	r4, 0
+    222c:	0c08      	bf      	0x223c	// 223c <__v2_printf+0x700>
+    222e:	9828      	ld.w      	r1, (r14, 0x20)
+    2230:	98c7      	ld.w      	r6, (r14, 0x1c)
+    2232:	5e05      	subu      	r0, r6, r1
+    2234:	6f57      	mov      	r13, r5
+    2236:	1029      	lrw      	r1, 0x5ccc	// 2258 <__v2_printf+0x71c>
+    2238:	e3fffc68 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    223c:	98a7      	ld.w      	r5, (r14, 0x1c)
+    223e:	9848      	ld.w      	r2, (r14, 0x20)
+    2240:	6495      	cmplt      	r5, r2
+    2242:	0c02      	bf      	0x2246	// 2246 <__v2_printf+0x70a>
+    2244:	6d4b      	mov      	r5, r2
+    2246:	9809      	ld.w      	r0, (r14, 0x24)
+    2248:	6014      	addu      	r0, r5
+    224a:	b809      	st.w      	r0, (r14, 0x24)
+    224c:	98a5      	ld.w      	r5, (r14, 0x14)
+    224e:	e800fc84 	br      	0x1b56	// 1b56 <__v2_printf+0x1a>
+    2252:	9809      	ld.w      	r0, (r14, 0x24)
+    2254:	141c      	addi      	r14, r14, 112
+    2256:	1494      	pop      	r4-r7, r15
+    2258:	00005ccc 	.long	0x00005ccc
+    225c:	00005cdc 	.long	0x00005cdc
+
+00002260 <__udivdi3>:
+    2260:	14d4      	push      	r4-r7, r15
+    2262:	1426      	subi      	r14, r14, 24
+    2264:	6dc7      	mov      	r7, r1
+    2266:	3b40      	cmpnei      	r3, 0
+    2268:	6d03      	mov      	r4, r0
+    226a:	6c4f      	mov      	r1, r3
+    226c:	6d8b      	mov      	r6, r2
+    226e:	b800      	st.w      	r0, (r14, 0x0)
+    2270:	6d5f      	mov      	r5, r7
+    2272:	085b      	bt      	0x2328	// 2328 <__udivdi3+0xc8>
+    2274:	649c      	cmphs      	r7, r2
+    2276:	0874      	bt      	0x235e	// 235e <__udivdi3+0xfe>
+    2278:	003d      	lrw      	r1, 0xffff	// 2600 <__udivdi3+0x3a0>
+    227a:	6484      	cmphs      	r1, r2
+    227c:	0cdc      	bf      	0x2434	// 2434 <__udivdi3+0x1d4>
+    227e:	31ff      	movi      	r1, 255
+    2280:	6484      	cmphs      	r1, r2
+    2282:	0802      	bt      	0x2286	// 2286 <__udivdi3+0x26>
+    2284:	3308      	movi      	r3, 8
+    2286:	6c4b      	mov      	r1, r2
+    2288:	704d      	lsr      	r1, r3
+    228a:	0100      	lrw      	r0, 0x5bcc	// 2604 <__udivdi3+0x3a4>
+    228c:	6040      	addu      	r1, r0
+    228e:	8120      	ld.b      	r1, (r1, 0x0)
+    2290:	60c4      	addu      	r3, r1
+    2292:	3120      	movi      	r1, 32
+    2294:	604e      	subu      	r1, r3
+    2296:	3940      	cmpnei      	r1, 0
+    2298:	0c09      	bf      	0x22aa	// 22aa <__udivdi3+0x4a>
+    229a:	6d53      	mov      	r5, r4
+    229c:	7084      	lsl      	r2, r1
+    229e:	71c4      	lsl      	r7, r1
+    22a0:	714d      	lsr      	r5, r3
+    22a2:	7104      	lsl      	r4, r1
+    22a4:	6d8b      	mov      	r6, r2
+    22a6:	6d5c      	or      	r5, r7
+    22a8:	b880      	st.w      	r4, (r14, 0x0)
+    22aa:	4e90      	lsri      	r4, r6, 16
+    22ac:	6c53      	mov      	r1, r4
+    22ae:	6c17      	mov      	r0, r5
+    22b0:	e00010d4 	bsr      	0x4458	// 4458 <__umodsi3>
+    22b4:	b801      	st.w      	r0, (r14, 0x4)
+    22b6:	6c53      	mov      	r1, r4
+    22b8:	6c17      	mov      	r0, r5
+    22ba:	e00010ab 	bsr      	0x4410	// 4410 <__udivsi3>
+    22be:	75d9      	zexth      	r7, r6
+    22c0:	9861      	ld.w      	r3, (r14, 0x4)
+    22c2:	9820      	ld.w      	r1, (r14, 0x0)
+    22c4:	6c9f      	mov      	r2, r7
+    22c6:	4370      	lsli      	r3, r3, 16
+    22c8:	4930      	lsri      	r1, r1, 16
+    22ca:	7c80      	mult      	r2, r0
+    22cc:	6cc4      	or      	r3, r1
+    22ce:	648c      	cmphs      	r3, r2
+    22d0:	6d43      	mov      	r5, r0
+    22d2:	0808      	bt      	0x22e2	// 22e2 <__udivdi3+0x82>
+    22d4:	60d8      	addu      	r3, r6
+    22d6:	658c      	cmphs      	r3, r6
+    22d8:	5823      	subi      	r1, r0, 1
+    22da:	0c03      	bf      	0x22e0	// 22e0 <__udivdi3+0x80>
+    22dc:	648c      	cmphs      	r3, r2
+    22de:	0d8e      	bf      	0x25fa	// 25fa <__udivdi3+0x39a>
+    22e0:	6d47      	mov      	r5, r1
+    22e2:	60ca      	subu      	r3, r2
+    22e4:	6c53      	mov      	r1, r4
+    22e6:	6c0f      	mov      	r0, r3
+    22e8:	b862      	st.w      	r3, (r14, 0x8)
+    22ea:	e00010b7 	bsr      	0x4458	// 4458 <__umodsi3>
+    22ee:	9862      	ld.w      	r3, (r14, 0x8)
+    22f0:	b801      	st.w      	r0, (r14, 0x4)
+    22f2:	6c53      	mov      	r1, r4
+    22f4:	6c0f      	mov      	r0, r3
+    22f6:	e000108d 	bsr      	0x4410	// 4410 <__udivsi3>
+    22fa:	9841      	ld.w      	r2, (r14, 0x4)
+    22fc:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2300:	4250      	lsli      	r2, r2, 16
+    2302:	74cd      	zexth      	r3, r3
+    2304:	7dc0      	mult      	r7, r0
+    2306:	6c8c      	or      	r2, r3
+    2308:	65c8      	cmphs      	r2, r7
+    230a:	6d03      	mov      	r4, r0
+    230c:	0808      	bt      	0x231c	// 231c <__udivdi3+0xbc>
+    230e:	6098      	addu      	r2, r6
+    2310:	6588      	cmphs      	r2, r6
+    2312:	5863      	subi      	r3, r0, 1
+    2314:	0d4d      	bf      	0x25ae	// 25ae <__udivdi3+0x34e>
+    2316:	65c8      	cmphs      	r2, r7
+    2318:	094b      	bt      	0x25ae	// 25ae <__udivdi3+0x34e>
+    231a:	2c01      	subi      	r4, 2
+    231c:	4510      	lsli      	r0, r5, 16
+    231e:	3700      	movi      	r7, 0
+    2320:	6c10      	or      	r0, r4
+    2322:	6c5f      	mov      	r1, r7
+    2324:	1406      	addi      	r14, r14, 24
+    2326:	1494      	pop      	r4-r7, r15
+    2328:	64dc      	cmphs      	r7, r3
+    232a:	0c76      	bf      	0x2416	// 2416 <__udivdi3+0x1b6>
+    232c:	026a      	lrw      	r3, 0xffff	// 2600 <__udivdi3+0x3a0>
+    232e:	644c      	cmphs      	r3, r1
+    2330:	0878      	bt      	0x2420	// 2420 <__udivdi3+0x1c0>
+    2332:	0269      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2334:	644c      	cmphs      	r3, r1
+    2336:	0d48      	bf      	0x25c6	// 25c6 <__udivdi3+0x366>
+    2338:	3610      	movi      	r6, 16
+    233a:	6cc7      	mov      	r3, r1
+    233c:	70d9      	lsr      	r3, r6
+    233e:	020d      	lrw      	r0, 0x5bcc	// 2604 <__udivdi3+0x3a4>
+    2340:	60c0      	addu      	r3, r0
+    2342:	8360      	ld.b      	r3, (r3, 0x0)
+    2344:	618c      	addu      	r6, r3
+    2346:	3020      	movi      	r0, 32
+    2348:	5879      	subu      	r3, r0, r6
+    234a:	3b40      	cmpnei      	r3, 0
+    234c:	b860      	st.w      	r3, (r14, 0x0)
+    234e:	0878      	bt      	0x243e	// 243e <__udivdi3+0x1de>
+    2350:	65c4      	cmphs      	r1, r7
+    2352:	0d40      	bf      	0x25d2	// 25d2 <__udivdi3+0x372>
+    2354:	6490      	cmphs      	r4, r2
+    2356:	6c0f      	mov      	r0, r3
+    2358:	600d      	addc      	r0, r3
+    235a:	3700      	movi      	r7, 0
+    235c:	045f      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    235e:	3a40      	cmpnei      	r2, 0
+    2360:	0808      	bt      	0x2370	// 2370 <__udivdi3+0x110>
+    2362:	3100      	movi      	r1, 0
+    2364:	3001      	movi      	r0, 1
+    2366:	b861      	st.w      	r3, (r14, 0x4)
+    2368:	e0001054 	bsr      	0x4410	// 4410 <__udivsi3>
+    236c:	6d83      	mov      	r6, r0
+    236e:	9861      	ld.w      	r3, (r14, 0x4)
+    2370:	025b      	lrw      	r2, 0xffff	// 2600 <__udivdi3+0x3a0>
+    2372:	6588      	cmphs      	r2, r6
+    2374:	085b      	bt      	0x242a	// 242a <__udivdi3+0x1ca>
+    2376:	027a      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2378:	658c      	cmphs      	r3, r6
+    237a:	0d28      	bf      	0x25ca	// 25ca <__udivdi3+0x36a>
+    237c:	3310      	movi      	r3, 16
+    237e:	6c9b      	mov      	r2, r6
+    2380:	023e      	lrw      	r1, 0x5bcc	// 2604 <__udivdi3+0x3a4>
+    2382:	708d      	lsr      	r2, r3
+    2384:	6084      	addu      	r2, r1
+    2386:	8240      	ld.b      	r2, (r2, 0x0)
+    2388:	5a2c      	addu      	r1, r2, r3
+    238a:	3220      	movi      	r2, 32
+    238c:	6086      	subu      	r2, r1
+    238e:	3a40      	cmpnei      	r2, 0
+    2390:	08c0      	bt      	0x2510	// 2510 <__udivdi3+0x2b0>
+    2392:	74d9      	zexth      	r3, r6
+    2394:	5f99      	subu      	r4, r7, r6
+    2396:	4eb0      	lsri      	r5, r6, 16
+    2398:	b861      	st.w      	r3, (r14, 0x4)
+    239a:	3701      	movi      	r7, 1
+    239c:	6c57      	mov      	r1, r5
+    239e:	6c13      	mov      	r0, r4
+    23a0:	e000105c 	bsr      	0x4458	// 4458 <__umodsi3>
+    23a4:	b802      	st.w      	r0, (r14, 0x8)
+    23a6:	6c57      	mov      	r1, r5
+    23a8:	6c13      	mov      	r0, r4
+    23aa:	e0001033 	bsr      	0x4410	// 4410 <__udivsi3>
+    23ae:	9862      	ld.w      	r3, (r14, 0x8)
+    23b0:	4330      	lsli      	r1, r3, 16
+    23b2:	9860      	ld.w      	r3, (r14, 0x0)
+    23b4:	9841      	ld.w      	r2, (r14, 0x4)
+    23b6:	4b70      	lsri      	r3, r3, 16
+    23b8:	7c80      	mult      	r2, r0
+    23ba:	6cc4      	or      	r3, r1
+    23bc:	648c      	cmphs      	r3, r2
+    23be:	6d03      	mov      	r4, r0
+    23c0:	0808      	bt      	0x23d0	// 23d0 <__udivdi3+0x170>
+    23c2:	60d8      	addu      	r3, r6
+    23c4:	658c      	cmphs      	r3, r6
+    23c6:	5823      	subi      	r1, r0, 1
+    23c8:	0c03      	bf      	0x23ce	// 23ce <__udivdi3+0x16e>
+    23ca:	648c      	cmphs      	r3, r2
+    23cc:	0d14      	bf      	0x25f4	// 25f4 <__udivdi3+0x394>
+    23ce:	6d07      	mov      	r4, r1
+    23d0:	60ca      	subu      	r3, r2
+    23d2:	6c57      	mov      	r1, r5
+    23d4:	6c0f      	mov      	r0, r3
+    23d6:	b863      	st.w      	r3, (r14, 0xc)
+    23d8:	e0001040 	bsr      	0x4458	// 4458 <__umodsi3>
+    23dc:	9863      	ld.w      	r3, (r14, 0xc)
+    23de:	6c57      	mov      	r1, r5
+    23e0:	b802      	st.w      	r0, (r14, 0x8)
+    23e2:	6c0f      	mov      	r0, r3
+    23e4:	e0001016 	bsr      	0x4410	// 4410 <__udivsi3>
+    23e8:	9842      	ld.w      	r2, (r14, 0x8)
+    23ea:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    23ee:	9821      	ld.w      	r1, (r14, 0x4)
+    23f0:	4250      	lsli      	r2, r2, 16
+    23f2:	74cd      	zexth      	r3, r3
+    23f4:	7c40      	mult      	r1, r0
+    23f6:	6cc8      	or      	r3, r2
+    23f8:	644c      	cmphs      	r3, r1
+    23fa:	6d43      	mov      	r5, r0
+    23fc:	0808      	bt      	0x240c	// 240c <__udivdi3+0x1ac>
+    23fe:	60d8      	addu      	r3, r6
+    2400:	658c      	cmphs      	r3, r6
+    2402:	5843      	subi      	r2, r0, 1
+    2404:	0cd3      	bf      	0x25aa	// 25aa <__udivdi3+0x34a>
+    2406:	644c      	cmphs      	r3, r1
+    2408:	08d1      	bt      	0x25aa	// 25aa <__udivdi3+0x34a>
+    240a:	2d01      	subi      	r5, 2
+    240c:	4410      	lsli      	r0, r4, 16
+    240e:	6c14      	or      	r0, r5
+    2410:	6c5f      	mov      	r1, r7
+    2412:	1406      	addi      	r14, r14, 24
+    2414:	1494      	pop      	r4-r7, r15
+    2416:	3700      	movi      	r7, 0
+    2418:	3000      	movi      	r0, 0
+    241a:	6c5f      	mov      	r1, r7
+    241c:	1406      	addi      	r14, r14, 24
+    241e:	1494      	pop      	r4-r7, r15
+    2420:	33ff      	movi      	r3, 255
+    2422:	644c      	cmphs      	r3, r1
+    2424:	6583      	mvcv      	r6
+    2426:	46c3      	lsli      	r6, r6, 3
+    2428:	0789      	br      	0x233a	// 233a <__udivdi3+0xda>
+    242a:	32ff      	movi      	r2, 255
+    242c:	6588      	cmphs      	r2, r6
+    242e:	0ba8      	bt      	0x237e	// 237e <__udivdi3+0x11e>
+    2430:	3308      	movi      	r3, 8
+    2432:	07a6      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    2434:	1375      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2436:	648c      	cmphs      	r3, r2
+    2438:	0ccb      	bf      	0x25ce	// 25ce <__udivdi3+0x36e>
+    243a:	3310      	movi      	r3, 16
+    243c:	0725      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    243e:	9800      	ld.w      	r0, (r14, 0x0)
+    2440:	6ccb      	mov      	r3, r2
+    2442:	6d4b      	mov      	r5, r2
+    2444:	7040      	lsl      	r1, r0
+    2446:	7140      	lsl      	r5, r0
+    2448:	70d9      	lsr      	r3, r6
+    244a:	6cc4      	or      	r3, r1
+    244c:	b8a3      	st.w      	r5, (r14, 0xc)
+    244e:	6d53      	mov      	r5, r4
+    2450:	6c4f      	mov      	r1, r3
+    2452:	7159      	lsr      	r5, r6
+    2454:	6cdf      	mov      	r3, r7
+    2456:	71c0      	lsl      	r7, r0
+    2458:	6d5c      	or      	r5, r7
+    245a:	70d9      	lsr      	r3, r6
+    245c:	b8a1      	st.w      	r5, (r14, 0x4)
+    245e:	49b0      	lsri      	r5, r1, 16
+    2460:	b822      	st.w      	r1, (r14, 0x8)
+    2462:	75c5      	zexth      	r7, r1
+    2464:	6c0f      	mov      	r0, r3
+    2466:	6c57      	mov      	r1, r5
+    2468:	b864      	st.w      	r3, (r14, 0x10)
+    246a:	e0000ff7 	bsr      	0x4458	// 4458 <__umodsi3>
+    246e:	9864      	ld.w      	r3, (r14, 0x10)
+    2470:	6d83      	mov      	r6, r0
+    2472:	6c57      	mov      	r1, r5
+    2474:	6c0f      	mov      	r0, r3
+    2476:	e0000fcd 	bsr      	0x4410	// 4410 <__udivsi3>
+    247a:	6c5f      	mov      	r1, r7
+    247c:	7c40      	mult      	r1, r0
+    247e:	6c87      	mov      	r2, r1
+    2480:	4630      	lsli      	r1, r6, 16
+    2482:	98c1      	ld.w      	r6, (r14, 0x4)
+    2484:	4ed0      	lsri      	r6, r6, 16
+    2486:	6d84      	or      	r6, r1
+    2488:	6498      	cmphs      	r6, r2
+    248a:	6cc3      	mov      	r3, r0
+    248c:	0807      	bt      	0x249a	// 249a <__udivdi3+0x23a>
+    248e:	5823      	subi      	r1, r0, 1
+    2490:	9802      	ld.w      	r0, (r14, 0x8)
+    2492:	6180      	addu      	r6, r0
+    2494:	6418      	cmphs      	r6, r0
+    2496:	08a6      	bt      	0x25e2	// 25e2 <__udivdi3+0x382>
+    2498:	6cc7      	mov      	r3, r1
+    249a:	618a      	subu      	r6, r2
+    249c:	6c57      	mov      	r1, r5
+    249e:	6c1b      	mov      	r0, r6
+    24a0:	b865      	st.w      	r3, (r14, 0x14)
+    24a2:	e0000fdb 	bsr      	0x4458	// 4458 <__umodsi3>
+    24a6:	b804      	st.w      	r0, (r14, 0x10)
+    24a8:	6c57      	mov      	r1, r5
+    24aa:	6c1b      	mov      	r0, r6
+    24ac:	e0000fb2 	bsr      	0x4410	// 4410 <__udivsi3>
+    24b0:	9864      	ld.w      	r3, (r14, 0x10)
+    24b2:	6c9f      	mov      	r2, r7
+    24b4:	43f0      	lsli      	r7, r3, 16
+    24b6:	d86e1002 	ld.h      	r3, (r14, 0x4)
+    24ba:	744d      	zexth      	r1, r3
+    24bc:	7c80      	mult      	r2, r0
+    24be:	6dc4      	or      	r7, r1
+    24c0:	649c      	cmphs      	r7, r2
+    24c2:	9865      	ld.w      	r3, (r14, 0x14)
+    24c4:	0807      	bt      	0x24d2	// 24d2 <__udivdi3+0x272>
+    24c6:	98a2      	ld.w      	r5, (r14, 0x8)
+    24c8:	61d4      	addu      	r7, r5
+    24ca:	655c      	cmphs      	r7, r5
+    24cc:	5823      	subi      	r1, r0, 1
+    24ce:	0885      	bt      	0x25d8	// 25d8 <__udivdi3+0x378>
+    24d0:	6c07      	mov      	r0, r1
+    24d2:	4370      	lsli      	r3, r3, 16
+    24d4:	6c0c      	or      	r0, r3
+    24d6:	74c1      	zexth      	r3, r0
+    24d8:	61ca      	subu      	r7, r2
+    24da:	9843      	ld.w      	r2, (r14, 0xc)
+    24dc:	7549      	zexth      	r5, r2
+    24de:	4830      	lsri      	r1, r0, 16
+    24e0:	4a50      	lsri      	r2, r2, 16
+    24e2:	6d8f      	mov      	r6, r3
+    24e4:	7d94      	mult      	r6, r5
+    24e6:	7cc8      	mult      	r3, r2
+    24e8:	7d44      	mult      	r5, r1
+    24ea:	60d4      	addu      	r3, r5
+    24ec:	7c48      	mult      	r1, r2
+    24ee:	4e50      	lsri      	r2, r6, 16
+    24f0:	60c8      	addu      	r3, r2
+    24f2:	654c      	cmphs      	r3, r5
+    24f4:	0804      	bt      	0x24fc	// 24fc <__udivdi3+0x29c>
+    24f6:	3280      	movi      	r2, 128
+    24f8:	4249      	lsli      	r2, r2, 9
+    24fa:	6048      	addu      	r1, r2
+    24fc:	4b50      	lsri      	r2, r3, 16
+    24fe:	6048      	addu      	r1, r2
+    2500:	645c      	cmphs      	r7, r1
+    2502:	0c5f      	bf      	0x25c0	// 25c0 <__udivdi3+0x360>
+    2504:	645e      	cmpne      	r7, r1
+    2506:	0c56      	bf      	0x25b2	// 25b2 <__udivdi3+0x352>
+    2508:	3700      	movi      	r7, 0
+    250a:	6c5f      	mov      	r1, r7
+    250c:	1406      	addi      	r14, r14, 24
+    250e:	1494      	pop      	r4-r7, r15
+    2510:	6d53      	mov      	r5, r4
+    2512:	6cdf      	mov      	r3, r7
+    2514:	7145      	lsr      	r5, r1
+    2516:	71c8      	lsl      	r7, r2
+    2518:	7188      	lsl      	r6, r2
+    251a:	6d5c      	or      	r5, r7
+    251c:	70c5      	lsr      	r3, r1
+    251e:	6dd7      	mov      	r7, r5
+    2520:	b8a3      	st.w      	r5, (r14, 0xc)
+    2522:	4eb0      	lsri      	r5, r6, 16
+    2524:	7108      	lsl      	r4, r2
+    2526:	6c57      	mov      	r1, r5
+    2528:	7499      	zexth      	r2, r6
+    252a:	6c0f      	mov      	r0, r3
+    252c:	b841      	st.w      	r2, (r14, 0x4)
+    252e:	b880      	st.w      	r4, (r14, 0x0)
+    2530:	b862      	st.w      	r3, (r14, 0x8)
+    2532:	e0000f93 	bsr      	0x4458	// 4458 <__umodsi3>
+    2536:	9862      	ld.w      	r3, (r14, 0x8)
+    2538:	6d03      	mov      	r4, r0
+    253a:	6c57      	mov      	r1, r5
+    253c:	6c0f      	mov      	r0, r3
+    253e:	e0000f69 	bsr      	0x4410	// 4410 <__udivsi3>
+    2542:	6cc3      	mov      	r3, r0
+    2544:	7499      	zexth      	r2, r6
+    2546:	7cc8      	mult      	r3, r2
+    2548:	4450      	lsli      	r2, r4, 16
+    254a:	4f90      	lsri      	r4, r7, 16
+    254c:	6d08      	or      	r4, r2
+    254e:	64d0      	cmphs      	r4, r3
+    2550:	6c43      	mov      	r1, r0
+    2552:	b802      	st.w      	r0, (r14, 0x8)
+    2554:	080b      	bt      	0x256a	// 256a <__udivdi3+0x30a>
+    2556:	6118      	addu      	r4, r6
+    2558:	6c87      	mov      	r2, r1
+    255a:	6590      	cmphs      	r4, r6
+    255c:	2a00      	subi      	r2, 1
+    255e:	0c49      	bf      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2560:	64d0      	cmphs      	r4, r3
+    2562:	0847      	bt      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2564:	2a00      	subi      	r2, 1
+    2566:	b842      	st.w      	r2, (r14, 0x8)
+    2568:	6118      	addu      	r4, r6
+    256a:	610e      	subu      	r4, r3
+    256c:	6c57      	mov      	r1, r5
+    256e:	6c13      	mov      	r0, r4
+    2570:	e0000f74 	bsr      	0x4458	// 4458 <__umodsi3>
+    2574:	6dc3      	mov      	r7, r0
+    2576:	6c57      	mov      	r1, r5
+    2578:	6c13      	mov      	r0, r4
+    257a:	e0000f4b 	bsr      	0x4410	// 4410 <__udivsi3>
+    257e:	d84e1006 	ld.h      	r2, (r14, 0xc)
+    2582:	74d9      	zexth      	r3, r6
+    2584:	47f0      	lsli      	r7, r7, 16
+    2586:	7509      	zexth      	r4, r2
+    2588:	7cc0      	mult      	r3, r0
+    258a:	6dd0      	or      	r7, r4
+    258c:	64dc      	cmphs      	r7, r3
+    258e:	0809      	bt      	0x25a0	// 25a0 <__udivdi3+0x340>
+    2590:	61d8      	addu      	r7, r6
+    2592:	659c      	cmphs      	r7, r6
+    2594:	5843      	subi      	r2, r0, 1
+    2596:	0c2b      	bf      	0x25ec	// 25ec <__udivdi3+0x38c>
+    2598:	64dc      	cmphs      	r7, r3
+    259a:	0829      	bt      	0x25ec	// 25ec <__udivdi3+0x38c>
+    259c:	2801      	subi      	r0, 2
+    259e:	61d8      	addu      	r7, r6
+    25a0:	5f8d      	subu      	r4, r7, r3
+    25a2:	9862      	ld.w      	r3, (r14, 0x8)
+    25a4:	43f0      	lsli      	r7, r3, 16
+    25a6:	6dc0      	or      	r7, r0
+    25a8:	06fa      	br      	0x239c	// 239c <__udivdi3+0x13c>
+    25aa:	6d4b      	mov      	r5, r2
+    25ac:	0730      	br      	0x240c	// 240c <__udivdi3+0x1ac>
+    25ae:	6d0f      	mov      	r4, r3
+    25b0:	06b6      	br      	0x231c	// 231c <__udivdi3+0xbc>
+    25b2:	9840      	ld.w      	r2, (r14, 0x0)
+    25b4:	4370      	lsli      	r3, r3, 16
+    25b6:	7599      	zexth      	r6, r6
+    25b8:	7108      	lsl      	r4, r2
+    25ba:	60d8      	addu      	r3, r6
+    25bc:	64d0      	cmphs      	r4, r3
+    25be:	0ba5      	bt      	0x2508	// 2508 <__udivdi3+0x2a8>
+    25c0:	2800      	subi      	r0, 1
+    25c2:	3700      	movi      	r7, 0
+    25c4:	07a3      	br      	0x250a	// 250a <__udivdi3+0x2aa>
+    25c6:	3618      	movi      	r6, 24
+    25c8:	06b9      	br      	0x233a	// 233a <__udivdi3+0xda>
+    25ca:	3318      	movi      	r3, 24
+    25cc:	06d9      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    25ce:	3318      	movi      	r3, 24
+    25d0:	065b      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    25d2:	3700      	movi      	r7, 0
+    25d4:	3001      	movi      	r0, 1
+    25d6:	0722      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    25d8:	649c      	cmphs      	r7, r2
+    25da:	0b7b      	bt      	0x24d0	// 24d0 <__udivdi3+0x270>
+    25dc:	2801      	subi      	r0, 2
+    25de:	61d4      	addu      	r7, r5
+    25e0:	0779      	br      	0x24d2	// 24d2 <__udivdi3+0x272>
+    25e2:	6498      	cmphs      	r6, r2
+    25e4:	0b5a      	bt      	0x2498	// 2498 <__udivdi3+0x238>
+    25e6:	2b01      	subi      	r3, 2
+    25e8:	6180      	addu      	r6, r0
+    25ea:	0758      	br      	0x249a	// 249a <__udivdi3+0x23a>
+    25ec:	6c0b      	mov      	r0, r2
+    25ee:	07d9      	br      	0x25a0	// 25a0 <__udivdi3+0x340>
+    25f0:	b842      	st.w      	r2, (r14, 0x8)
+    25f2:	07bc      	br      	0x256a	// 256a <__udivdi3+0x30a>
+    25f4:	2c01      	subi      	r4, 2
+    25f6:	60d8      	addu      	r3, r6
+    25f8:	06ec      	br      	0x23d0	// 23d0 <__udivdi3+0x170>
+    25fa:	2d01      	subi      	r5, 2
+    25fc:	60d8      	addu      	r3, r6
+    25fe:	0672      	br      	0x22e2	// 22e2 <__udivdi3+0x82>
+    2600:	0000ffff 	.long	0x0000ffff
+    2604:	00005bcc 	.long	0x00005bcc
+    2608:	00ffffff 	.long	0x00ffffff
+
+0000260c <__umoddi3>:
+    260c:	14d4      	push      	r4-r7, r15
+    260e:	1427      	subi      	r14, r14, 28
+    2610:	6d07      	mov      	r4, r1
+    2612:	6c4f      	mov      	r1, r3
+    2614:	6d43      	mov      	r5, r0
+    2616:	3940      	cmpnei      	r1, 0
+    2618:	6dcf      	mov      	r7, r3
+    261a:	6c0b      	mov      	r0, r2
+    261c:	b8a0      	st.w      	r5, (r14, 0x0)
+    261e:	6cd3      	mov      	r3, r4
+    2620:	085a      	bt      	0x26d4	// 26d4 <__umoddi3+0xc8>
+    2622:	6490      	cmphs      	r4, r2
+    2624:	0877      	bt      	0x2712	// 2712 <__umoddi3+0x106>
+    2626:	0120      	lrw      	r1, 0xffff	// 29a0 <__umoddi3+0x394>
+    2628:	6484      	cmphs      	r1, r2
+    262a:	0cd2      	bf      	0x27ce	// 27ce <__umoddi3+0x1c2>
+    262c:	31ff      	movi      	r1, 255
+    262e:	6484      	cmphs      	r1, r2
+    2630:	0802      	bt      	0x2634	// 2634 <__umoddi3+0x28>
+    2632:	3708      	movi      	r7, 8
+    2634:	6c43      	mov      	r1, r0
+    2636:	705d      	lsr      	r1, r7
+    2638:	01c4      	lrw      	r6, 0x5bcc	// 29a4 <__umoddi3+0x398>
+    263a:	6058      	addu      	r1, r6
+    263c:	8120      	ld.b      	r1, (r1, 0x0)
+    263e:	61c4      	addu      	r7, r1
+    2640:	3120      	movi      	r1, 32
+    2642:	605e      	subu      	r1, r7
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	b821      	st.w      	r1, (r14, 0x4)
+    2648:	0c09      	bf      	0x265a	// 265a <__umoddi3+0x4e>
+    264a:	6cd7      	mov      	r3, r5
+    264c:	6c83      	mov      	r2, r0
+    264e:	7104      	lsl      	r4, r1
+    2650:	70dd      	lsr      	r3, r7
+    2652:	7144      	lsl      	r5, r1
+    2654:	7084      	lsl      	r2, r1
+    2656:	6cd0      	or      	r3, r4
+    2658:	b8a0      	st.w      	r5, (r14, 0x0)
+    265a:	4a90      	lsri      	r4, r2, 16
+    265c:	6c53      	mov      	r1, r4
+    265e:	6c0f      	mov      	r0, r3
+    2660:	75c9      	zexth      	r7, r2
+    2662:	b843      	st.w      	r2, (r14, 0xc)
+    2664:	b862      	st.w      	r3, (r14, 0x8)
+    2666:	e0000ef9 	bsr      	0x4458	// 4458 <__umodsi3>
+    266a:	9862      	ld.w      	r3, (r14, 0x8)
+    266c:	6d43      	mov      	r5, r0
+    266e:	6c53      	mov      	r1, r4
+    2670:	6c0f      	mov      	r0, r3
+    2672:	e0000ecf 	bsr      	0x4410	// 4410 <__udivsi3>
+    2676:	9840      	ld.w      	r2, (r14, 0x0)
+    2678:	4570      	lsli      	r3, r5, 16
+    267a:	4ab0      	lsri      	r5, r2, 16
+    267c:	7c1c      	mult      	r0, r7
+    267e:	6cd4      	or      	r3, r5
+    2680:	640c      	cmphs      	r3, r0
+    2682:	9843      	ld.w      	r2, (r14, 0xc)
+    2684:	0806      	bt      	0x2690	// 2690 <__umoddi3+0x84>
+    2686:	60c8      	addu      	r3, r2
+    2688:	648c      	cmphs      	r3, r2
+    268a:	0c03      	bf      	0x2690	// 2690 <__umoddi3+0x84>
+    268c:	640c      	cmphs      	r3, r0
+    268e:	0d7d      	bf      	0x2988	// 2988 <__umoddi3+0x37c>
+    2690:	60c2      	subu      	r3, r0
+    2692:	6c53      	mov      	r1, r4
+    2694:	6c0f      	mov      	r0, r3
+    2696:	b843      	st.w      	r2, (r14, 0xc)
+    2698:	b862      	st.w      	r3, (r14, 0x8)
+    269a:	e0000edf 	bsr      	0x4458	// 4458 <__umodsi3>
+    269e:	9862      	ld.w      	r3, (r14, 0x8)
+    26a0:	6d43      	mov      	r5, r0
+    26a2:	6c53      	mov      	r1, r4
+    26a4:	6c0f      	mov      	r0, r3
+    26a6:	e0000eb5 	bsr      	0x4410	// 4410 <__udivsi3>
+    26aa:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    26ae:	7dc0      	mult      	r7, r0
+    26b0:	45b0      	lsli      	r5, r5, 16
+    26b2:	740d      	zexth      	r0, r3
+    26b4:	6d40      	or      	r5, r0
+    26b6:	65d4      	cmphs      	r5, r7
+    26b8:	0807      	bt      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26ba:	9843      	ld.w      	r2, (r14, 0xc)
+    26bc:	6148      	addu      	r5, r2
+    26be:	6494      	cmphs      	r5, r2
+    26c0:	0c03      	bf      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26c2:	65d4      	cmphs      	r5, r7
+    26c4:	0d5e      	bf      	0x2980	// 2980 <__umoddi3+0x374>
+    26c6:	615e      	subu      	r5, r7
+    26c8:	6c17      	mov      	r0, r5
+    26ca:	9861      	ld.w      	r3, (r14, 0x4)
+    26cc:	700d      	lsr      	r0, r3
+    26ce:	3100      	movi      	r1, 0
+    26d0:	1407      	addi      	r14, r14, 28
+    26d2:	1494      	pop      	r4-r7, r15
+    26d4:	6450      	cmphs      	r4, r1
+    26d6:	0c6e      	bf      	0x27b2	// 27b2 <__umoddi3+0x1a6>
+    26d8:	024d      	lrw      	r2, 0xffff	// 29a0 <__umoddi3+0x394>
+    26da:	6448      	cmphs      	r2, r1
+    26dc:	086f      	bt      	0x27ba	// 27ba <__umoddi3+0x1ae>
+    26de:	024c      	lrw      	r2, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    26e0:	6448      	cmphs      	r2, r1
+    26e2:	0d3f      	bf      	0x2960	// 2960 <__umoddi3+0x354>
+    26e4:	3610      	movi      	r6, 16
+    26e6:	6c87      	mov      	r2, r1
+    26e8:	7099      	lsr      	r2, r6
+    26ea:	02f0      	lrw      	r7, 0x5bcc	// 29a4 <__umoddi3+0x398>
+    26ec:	609c      	addu      	r2, r7
+    26ee:	8240      	ld.b      	r2, (r2, 0x0)
+    26f0:	6188      	addu      	r6, r2
+    26f2:	3720      	movi      	r7, 32
+    26f4:	61da      	subu      	r7, r6
+    26f6:	3f40      	cmpnei      	r7, 0
+    26f8:	0870      	bt      	0x27d8	// 27d8 <__umoddi3+0x1cc>
+    26fa:	6504      	cmphs      	r1, r4
+    26fc:	0c03      	bf      	0x2702	// 2702 <__umoddi3+0xf6>
+    26fe:	6414      	cmphs      	r5, r0
+    2700:	0d46      	bf      	0x298c	// 298c <__umoddi3+0x380>
+    2702:	5d01      	subu      	r0, r5, r0
+    2704:	6414      	cmphs      	r5, r0
+    2706:	6106      	subu      	r4, r1
+    2708:	6483      	mvcv      	r2
+    270a:	5c69      	subu      	r3, r4, r2
+    270c:	6c4f      	mov      	r1, r3
+    270e:	1407      	addi      	r14, r14, 28
+    2710:	1494      	pop      	r4-r7, r15
+    2712:	3a40      	cmpnei      	r2, 0
+    2714:	0806      	bt      	0x2720	// 2720 <__umoddi3+0x114>
+    2716:	3100      	movi      	r1, 0
+    2718:	3001      	movi      	r0, 1
+    271a:	e0000e7b 	bsr      	0x4410	// 4410 <__udivsi3>
+    271e:	6c83      	mov      	r2, r0
+    2720:	027f      	lrw      	r3, 0xffff	// 29a0 <__umoddi3+0x394>
+    2722:	648c      	cmphs      	r3, r2
+    2724:	0850      	bt      	0x27c4	// 27c4 <__umoddi3+0x1b8>
+    2726:	027e      	lrw      	r3, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    2728:	648c      	cmphs      	r3, r2
+    272a:	0d1d      	bf      	0x2964	// 2964 <__umoddi3+0x358>
+    272c:	3710      	movi      	r7, 16
+    272e:	6ccb      	mov      	r3, r2
+    2730:	70dd      	lsr      	r3, r7
+    2732:	0322      	lrw      	r1, 0x5bcc	// 29a4 <__umoddi3+0x398>
+    2734:	60c4      	addu      	r3, r1
+    2736:	8360      	ld.b      	r3, (r3, 0x0)
+    2738:	61cc      	addu      	r7, r3
+    273a:	3320      	movi      	r3, 32
+    273c:	60de      	subu      	r3, r7
+    273e:	3b40      	cmpnei      	r3, 0
+    2740:	b861      	st.w      	r3, (r14, 0x4)
+    2742:	08c2      	bt      	0x28c6	// 28c6 <__umoddi3+0x2ba>
+    2744:	74c9      	zexth      	r3, r2
+    2746:	610a      	subu      	r4, r2
+    2748:	4af0      	lsri      	r7, r2, 16
+    274a:	6d8f      	mov      	r6, r3
+    274c:	6c5f      	mov      	r1, r7
+    274e:	6c13      	mov      	r0, r4
+    2750:	b842      	st.w      	r2, (r14, 0x8)
+    2752:	e0000e83 	bsr      	0x4458	// 4458 <__umodsi3>
+    2756:	6d43      	mov      	r5, r0
+    2758:	6c5f      	mov      	r1, r7
+    275a:	6c13      	mov      	r0, r4
+    275c:	e0000e5a 	bsr      	0x4410	// 4410 <__udivsi3>
+    2760:	9860      	ld.w      	r3, (r14, 0x0)
+    2762:	4590      	lsli      	r4, r5, 16
+    2764:	4bb0      	lsri      	r5, r3, 16
+    2766:	7c18      	mult      	r0, r6
+    2768:	6d14      	or      	r4, r5
+    276a:	6410      	cmphs      	r4, r0
+    276c:	9842      	ld.w      	r2, (r14, 0x8)
+    276e:	0806      	bt      	0x277a	// 277a <__umoddi3+0x16e>
+    2770:	6108      	addu      	r4, r2
+    2772:	6490      	cmphs      	r4, r2
+    2774:	0c03      	bf      	0x277a	// 277a <__umoddi3+0x16e>
+    2776:	6410      	cmphs      	r4, r0
+    2778:	0d06      	bf      	0x2984	// 2984 <__umoddi3+0x378>
+    277a:	6102      	subu      	r4, r0
+    277c:	6c5f      	mov      	r1, r7
+    277e:	6c13      	mov      	r0, r4
+    2780:	b842      	st.w      	r2, (r14, 0x8)
+    2782:	e0000e6b 	bsr      	0x4458	// 4458 <__umodsi3>
+    2786:	6d43      	mov      	r5, r0
+    2788:	6c5f      	mov      	r1, r7
+    278a:	6c13      	mov      	r0, r4
+    278c:	e0000e42 	bsr      	0x4410	// 4410 <__udivsi3>
+    2790:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2794:	7c18      	mult      	r0, r6
+    2796:	45b0      	lsli      	r5, r5, 16
+    2798:	758d      	zexth      	r6, r3
+    279a:	6d58      	or      	r5, r6
+    279c:	6414      	cmphs      	r5, r0
+    279e:	0808      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a0:	9842      	ld.w      	r2, (r14, 0x8)
+    27a2:	6148      	addu      	r5, r2
+    27a4:	6494      	cmphs      	r5, r2
+    27a6:	0c04      	bf      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a8:	6414      	cmphs      	r5, r0
+    27aa:	0802      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27ac:	6148      	addu      	r5, r2
+    27ae:	6142      	subu      	r5, r0
+    27b0:	078c      	br      	0x26c8	// 26c8 <__umoddi3+0xbc>
+    27b2:	6c17      	mov      	r0, r5
+    27b4:	6c53      	mov      	r1, r4
+    27b6:	1407      	addi      	r14, r14, 28
+    27b8:	1494      	pop      	r4-r7, r15
+    27ba:	32ff      	movi      	r2, 255
+    27bc:	6448      	cmphs      	r2, r1
+    27be:	6583      	mvcv      	r6
+    27c0:	46c3      	lsli      	r6, r6, 3
+    27c2:	0792      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    27c4:	33ff      	movi      	r3, 255
+    27c6:	648c      	cmphs      	r3, r2
+    27c8:	0bb3      	bt      	0x272e	// 272e <__umoddi3+0x122>
+    27ca:	3708      	movi      	r7, 8
+    27cc:	07b1      	br      	0x272e	// 272e <__umoddi3+0x122>
+    27ce:	1337      	lrw      	r1, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    27d0:	6484      	cmphs      	r1, r2
+    27d2:	0ccb      	bf      	0x2968	// 2968 <__umoddi3+0x35c>
+    27d4:	3710      	movi      	r7, 16
+    27d6:	072f      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    27d8:	6cc3      	mov      	r3, r0
+    27da:	705c      	lsl      	r1, r7
+    27dc:	70d9      	lsr      	r3, r6
+    27de:	6cc4      	or      	r3, r1
+    27e0:	6c57      	mov      	r1, r5
+    27e2:	6c93      	mov      	r2, r4
+    27e4:	7059      	lsr      	r1, r6
+    27e6:	711c      	lsl      	r4, r7
+    27e8:	7099      	lsr      	r2, r6
+    27ea:	6c50      	or      	r1, r4
+    27ec:	701c      	lsl      	r0, r7
+    27ee:	4b90      	lsri      	r4, r3, 16
+    27f0:	715c      	lsl      	r5, r7
+    27f2:	b803      	st.w      	r0, (r14, 0xc)
+    27f4:	b820      	st.w      	r1, (r14, 0x0)
+    27f6:	b8a4      	st.w      	r5, (r14, 0x10)
+    27f8:	6c53      	mov      	r1, r4
+    27fa:	754d      	zexth      	r5, r3
+    27fc:	6c0b      	mov      	r0, r2
+    27fe:	b862      	st.w      	r3, (r14, 0x8)
+    2800:	b8a1      	st.w      	r5, (r14, 0x4)
+    2802:	b846      	st.w      	r2, (r14, 0x18)
+    2804:	e0000e2a 	bsr      	0x4458	// 4458 <__umodsi3>
+    2808:	9846      	ld.w      	r2, (r14, 0x18)
+    280a:	b805      	st.w      	r0, (r14, 0x14)
+    280c:	6c53      	mov      	r1, r4
+    280e:	6c0b      	mov      	r0, r2
+    2810:	e0000e00 	bsr      	0x4410	// 4410 <__udivsi3>
+    2814:	9841      	ld.w      	r2, (r14, 0x4)
+    2816:	7c80      	mult      	r2, r0
+    2818:	9865      	ld.w      	r3, (r14, 0x14)
+    281a:	6d43      	mov      	r5, r0
+    281c:	9800      	ld.w      	r0, (r14, 0x0)
+    281e:	4330      	lsli      	r1, r3, 16
+    2820:	4870      	lsri      	r3, r0, 16
+    2822:	6cc4      	or      	r3, r1
+    2824:	648c      	cmphs      	r3, r2
+    2826:	0807      	bt      	0x2834	// 2834 <__umoddi3+0x228>
+    2828:	9802      	ld.w      	r0, (r14, 0x8)
+    282a:	60c0      	addu      	r3, r0
+    282c:	640c      	cmphs      	r3, r0
+    282e:	5d23      	subi      	r1, r5, 1
+    2830:	08a3      	bt      	0x2976	// 2976 <__umoddi3+0x36a>
+    2832:	6d47      	mov      	r5, r1
+    2834:	60ca      	subu      	r3, r2
+    2836:	6c53      	mov      	r1, r4
+    2838:	6c0f      	mov      	r0, r3
+    283a:	b866      	st.w      	r3, (r14, 0x18)
+    283c:	e0000e0e 	bsr      	0x4458	// 4458 <__umodsi3>
+    2840:	9866      	ld.w      	r3, (r14, 0x18)
+    2842:	6c53      	mov      	r1, r4
+    2844:	b805      	st.w      	r0, (r14, 0x14)
+    2846:	6c0f      	mov      	r0, r3
+    2848:	e0000de4 	bsr      	0x4410	// 4410 <__udivsi3>
+    284c:	9845      	ld.w      	r2, (r14, 0x14)
+    284e:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2852:	9821      	ld.w      	r1, (r14, 0x4)
+    2854:	4250      	lsli      	r2, r2, 16
+    2856:	750d      	zexth      	r4, r3
+    2858:	7c40      	mult      	r1, r0
+    285a:	6c90      	or      	r2, r4
+    285c:	6448      	cmphs      	r2, r1
+    285e:	0807      	bt      	0x286c	// 286c <__umoddi3+0x260>
+    2860:	9882      	ld.w      	r4, (r14, 0x8)
+    2862:	6090      	addu      	r2, r4
+    2864:	6508      	cmphs      	r2, r4
+    2866:	5863      	subi      	r3, r0, 1
+    2868:	0882      	bt      	0x296c	// 296c <__umoddi3+0x360>
+    286a:	6c0f      	mov      	r0, r3
+    286c:	45b0      	lsli      	r5, r5, 16
+    286e:	6d40      	or      	r5, r0
+    2870:	74d5      	zexth      	r3, r5
+    2872:	9803      	ld.w      	r0, (r14, 0xc)
+    2874:	4db0      	lsri      	r5, r5, 16
+    2876:	6d0f      	mov      	r4, r3
+    2878:	6086      	subu      	r2, r1
+    287a:	7441      	zexth      	r1, r0
+    287c:	4810      	lsri      	r0, r0, 16
+    287e:	7d04      	mult      	r4, r1
+    2880:	7cc0      	mult      	r3, r0
+    2882:	7c54      	mult      	r1, r5
+    2884:	60c4      	addu      	r3, r1
+    2886:	7d40      	mult      	r5, r0
+    2888:	4c10      	lsri      	r0, r4, 16
+    288a:	60c0      	addu      	r3, r0
+    288c:	644c      	cmphs      	r3, r1
+    288e:	0804      	bt      	0x2896	// 2896 <__umoddi3+0x28a>
+    2890:	3180      	movi      	r1, 128
+    2892:	4129      	lsli      	r1, r1, 9
+    2894:	6144      	addu      	r5, r1
+    2896:	4b30      	lsri      	r1, r3, 16
+    2898:	6144      	addu      	r5, r1
+    289a:	4370      	lsli      	r3, r3, 16
+    289c:	7511      	zexth      	r4, r4
+    289e:	6548      	cmphs      	r2, r5
+    28a0:	60d0      	addu      	r3, r4
+    28a2:	0c56      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    28a4:	654a      	cmpne      	r2, r5
+    28a6:	0c76      	bf      	0x2992	// 2992 <__umoddi3+0x386>
+    28a8:	5a35      	subu      	r1, r2, r5
+    28aa:	6c0f      	mov      	r0, r3
+    28ac:	9864      	ld.w      	r3, (r14, 0x10)
+    28ae:	5b01      	subu      	r0, r3, r0
+    28b0:	640c      	cmphs      	r3, r0
+    28b2:	64c3      	mvcv      	r3
+    28b4:	598d      	subu      	r4, r1, r3
+    28b6:	6d53      	mov      	r5, r4
+    28b8:	7158      	lsl      	r5, r6
+    28ba:	701d      	lsr      	r0, r7
+    28bc:	6c53      	mov      	r1, r4
+    28be:	6c14      	or      	r0, r5
+    28c0:	705d      	lsr      	r1, r7
+    28c2:	1407      	addi      	r14, r14, 28
+    28c4:	1494      	pop      	r4-r7, r15
+    28c6:	9801      	ld.w      	r0, (r14, 0x4)
+    28c8:	6c57      	mov      	r1, r5
+    28ca:	6cd3      	mov      	r3, r4
+    28cc:	705d      	lsr      	r1, r7
+    28ce:	7100      	lsl      	r4, r0
+    28d0:	7080      	lsl      	r2, r0
+    28d2:	6c50      	or      	r1, r4
+    28d4:	70dd      	lsr      	r3, r7
+    28d6:	6d07      	mov      	r4, r1
+    28d8:	4af0      	lsri      	r7, r2, 16
+    28da:	b822      	st.w      	r1, (r14, 0x8)
+    28dc:	7449      	zexth      	r1, r2
+    28de:	7140      	lsl      	r5, r0
+    28e0:	6d87      	mov      	r6, r1
+    28e2:	6c0f      	mov      	r0, r3
+    28e4:	6c5f      	mov      	r1, r7
+    28e6:	b844      	st.w      	r2, (r14, 0x10)
+    28e8:	b8a0      	st.w      	r5, (r14, 0x0)
+    28ea:	b863      	st.w      	r3, (r14, 0xc)
+    28ec:	e0000db6 	bsr      	0x4458	// 4458 <__umodsi3>
+    28f0:	9863      	ld.w      	r3, (r14, 0xc)
+    28f2:	6d43      	mov      	r5, r0
+    28f4:	6c5f      	mov      	r1, r7
+    28f6:	6c0f      	mov      	r0, r3
+    28f8:	e0000d8c 	bsr      	0x4410	// 4410 <__udivsi3>
+    28fc:	45b0      	lsli      	r5, r5, 16
+    28fe:	4c70      	lsri      	r3, r4, 16
+    2900:	7c18      	mult      	r0, r6
+    2902:	6d4c      	or      	r5, r3
+    2904:	6414      	cmphs      	r5, r0
+    2906:	9844      	ld.w      	r2, (r14, 0x10)
+    2908:	0807      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    290a:	6148      	addu      	r5, r2
+    290c:	6494      	cmphs      	r5, r2
+    290e:	0c04      	bf      	0x2916	// 2916 <__umoddi3+0x30a>
+    2910:	6414      	cmphs      	r5, r0
+    2912:	0802      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    2914:	6148      	addu      	r5, r2
+    2916:	6142      	subu      	r5, r0
+    2918:	6c5f      	mov      	r1, r7
+    291a:	6c17      	mov      	r0, r5
+    291c:	b843      	st.w      	r2, (r14, 0xc)
+    291e:	e0000d9d 	bsr      	0x4458	// 4458 <__umodsi3>
+    2922:	6d03      	mov      	r4, r0
+    2924:	6c5f      	mov      	r1, r7
+    2926:	6c17      	mov      	r0, r5
+    2928:	e0000d74 	bsr      	0x4410	// 4410 <__udivsi3>
+    292c:	d86e1004 	ld.h      	r3, (r14, 0x8)
+    2930:	4490      	lsli      	r4, r4, 16
+    2932:	744d      	zexth      	r1, r3
+    2934:	7c18      	mult      	r0, r6
+    2936:	6d04      	or      	r4, r1
+    2938:	6410      	cmphs      	r4, r0
+    293a:	9843      	ld.w      	r2, (r14, 0xc)
+    293c:	0807      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    293e:	6108      	addu      	r4, r2
+    2940:	6490      	cmphs      	r4, r2
+    2942:	0c04      	bf      	0x294a	// 294a <__umoddi3+0x33e>
+    2944:	6410      	cmphs      	r4, r0
+    2946:	0802      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    2948:	6108      	addu      	r4, r2
+    294a:	6102      	subu      	r4, r0
+    294c:	0700      	br      	0x274c	// 274c <__umoddi3+0x140>
+    294e:	9823      	ld.w      	r1, (r14, 0xc)
+    2950:	5b05      	subu      	r0, r3, r1
+    2952:	640c      	cmphs      	r3, r0
+    2954:	9822      	ld.w      	r1, (r14, 0x8)
+    2956:	6146      	subu      	r5, r1
+    2958:	64c3      	mvcv      	r3
+    295a:	614e      	subu      	r5, r3
+    295c:	5a35      	subu      	r1, r2, r5
+    295e:	07a7      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    2960:	3618      	movi      	r6, 24
+    2962:	06c2      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    2964:	3718      	movi      	r7, 24
+    2966:	06e4      	br      	0x272e	// 272e <__umoddi3+0x122>
+    2968:	3718      	movi      	r7, 24
+    296a:	0665      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    296c:	6448      	cmphs      	r2, r1
+    296e:	0b7e      	bt      	0x286a	// 286a <__umoddi3+0x25e>
+    2970:	2801      	subi      	r0, 2
+    2972:	6090      	addu      	r2, r4
+    2974:	077c      	br      	0x286c	// 286c <__umoddi3+0x260>
+    2976:	648c      	cmphs      	r3, r2
+    2978:	0b5d      	bt      	0x2832	// 2832 <__umoddi3+0x226>
+    297a:	2d01      	subi      	r5, 2
+    297c:	60c0      	addu      	r3, r0
+    297e:	075b      	br      	0x2834	// 2834 <__umoddi3+0x228>
+    2980:	6148      	addu      	r5, r2
+    2982:	06a2      	br      	0x26c6	// 26c6 <__umoddi3+0xba>
+    2984:	6108      	addu      	r4, r2
+    2986:	06fa      	br      	0x277a	// 277a <__umoddi3+0x16e>
+    2988:	60c8      	addu      	r3, r2
+    298a:	0683      	br      	0x2690	// 2690 <__umoddi3+0x84>
+    298c:	6c17      	mov      	r0, r5
+    298e:	6c4f      	mov      	r1, r3
+    2990:	06bf      	br      	0x270e	// 270e <__umoddi3+0x102>
+    2992:	9824      	ld.w      	r1, (r14, 0x10)
+    2994:	64c4      	cmphs      	r1, r3
+    2996:	0fdc      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    2998:	6c0f      	mov      	r0, r3
+    299a:	3100      	movi      	r1, 0
+    299c:	0788      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    299e:	0000      	bkpt
+    29a0:	0000ffff 	.long	0x0000ffff
+    29a4:	00005bcc 	.long	0x00005bcc
+    29a8:	00ffffff 	.long	0x00ffffff
+
+000029ac <copystring>:
+    29ac:	14c2      	push      	r4-r5
+    29ae:	3300      	movi      	r3, 0
+    29b0:	644d      	cmplt      	r3, r1
+    29b2:	0803      	bt      	0x29b8	// 29b8 <copystring+0xc>
+    29b4:	6c0f      	mov      	r0, r3
+    29b6:	1482      	pop      	r4-r5
+    29b8:	5aac      	addu      	r5, r2, r3
+    29ba:	588c      	addu      	r4, r0, r3
+    29bc:	2300      	addi      	r3, 1
+    29be:	85a0      	ld.b      	r5, (r5, 0x0)
+    29c0:	3b43      	cmpnei      	r3, 3
+    29c2:	a4a0      	st.b      	r5, (r4, 0x0)
+    29c4:	0bf6      	bt      	0x29b0	// 29b0 <copystring+0x4>
+    29c6:	3923      	cmplti      	r1, 4
+    29c8:	0bf6      	bt      	0x29b4	// 29b4 <copystring+0x8>
+    29ca:	3300      	movi      	r3, 0
+    29cc:	a063      	st.b      	r3, (r0, 0x3)
+    29ce:	3304      	movi      	r3, 4
+    29d0:	07f2      	br      	0x29b4	// 29b4 <copystring+0x8>
+
+000029d2 <__GI___dtostr>:
+    29d2:	14d4      	push      	r4-r7, r15
+    29d4:	142c      	subi      	r14, r14, 48
+    29d6:	6d8f      	mov      	r6, r3
+    29d8:	9871      	ld.w      	r3, (r14, 0x44)
+    29da:	b80a      	st.w      	r0, (r14, 0x28)
+    29dc:	b824      	st.w      	r1, (r14, 0x10)
+    29de:	b842      	st.w      	r2, (r14, 0x8)
+    29e0:	b86b      	st.w      	r3, (r14, 0x2c)
+    29e2:	98f2      	ld.w      	r7, (r14, 0x48)
+    29e4:	e0000244 	bsr      	0x2e6c	// 2e6c <__isinf>
+    29e8:	3840      	cmpnei      	r0, 0
+    29ea:	0c0a      	bf      	0x29fe	// 29fe <__GI___dtostr+0x2c>
+    29ec:	0244      	lrw      	r2, 0x6079	// 2cd8 <__GI___dtostr+0x306>
+    29ee:	6c5b      	mov      	r1, r6
+    29f0:	9802      	ld.w      	r0, (r14, 0x8)
+    29f2:	e3ffffdd 	bsr      	0x29ac	// 29ac <copystring>
+    29f6:	b809      	st.w      	r0, (r14, 0x24)
+    29f8:	9809      	ld.w      	r0, (r14, 0x24)
+    29fa:	140c      	addi      	r14, r14, 48
+    29fc:	1494      	pop      	r4-r7, r15
+    29fe:	980a      	ld.w      	r0, (r14, 0x28)
+    2a00:	9824      	ld.w      	r1, (r14, 0x10)
+    2a02:	e0000185 	bsr      	0x2d0c	// 2d0c <__isnan>
+    2a06:	3840      	cmpnei      	r0, 0
+    2a08:	b809      	st.w      	r0, (r14, 0x24)
+    2a0a:	0c03      	bf      	0x2a10	// 2a10 <__GI___dtostr+0x3e>
+    2a0c:	024b      	lrw      	r2, 0x607d	// 2cdc <__GI___dtostr+0x30a>
+    2a0e:	07f0      	br      	0x29ee	// 29ee <__GI___dtostr+0x1c>
+    2a10:	3200      	movi      	r2, 0
+    2a12:	3300      	movi      	r3, 0
+    2a14:	980a      	ld.w      	r0, (r14, 0x28)
+    2a16:	9824      	ld.w      	r1, (r14, 0x10)
+    2a18:	e0000242 	bsr      	0x2e9c	// 2e9c <__eqdf2>
+    2a1c:	3840      	cmpnei      	r0, 0
+    2a1e:	082d      	bt      	0x2a78	// 2a78 <__GI___dtostr+0xa6>
+    2a20:	3f40      	cmpnei      	r7, 0
+    2a22:	0d57      	bf      	0x2cd0	// 2cd0 <__GI___dtostr+0x2fe>
+    2a24:	5fa6      	addi      	r5, r7, 2
+    2a26:	6558      	cmphs      	r6, r5
+    2a28:	0d56      	bf      	0x2cd4	// 2cd4 <__GI___dtostr+0x302>
+    2a2a:	3d40      	cmpnei      	r5, 0
+    2a2c:	0c0b      	bf      	0x2a42	// 2a42 <__GI___dtostr+0x70>
+    2a2e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a30:	39df      	btsti      	r1, 31
+    2a32:	0c1a      	bf      	0x2a66	// 2a66 <__GI___dtostr+0x94>
+    2a34:	9802      	ld.w      	r0, (r14, 0x8)
+    2a36:	322d      	movi      	r2, 45
+    2a38:	a040      	st.b      	r2, (r0, 0x0)
+    2a3a:	5d02      	addi      	r0, r5, 1
+    2a3c:	3501      	movi      	r5, 1
+    2a3e:	6414      	cmphs      	r5, r0
+    2a40:	0c16      	bf      	0x2a6c	// 2a6c <__GI___dtostr+0x9a>
+    2a42:	9882      	ld.w      	r4, (r14, 0x8)
+    2a44:	8420      	ld.b      	r1, (r4, 0x0)
+    2a46:	3330      	movi      	r3, 48
+    2a48:	64c6      	cmpne      	r1, r3
+    2a4a:	3000      	movi      	r0, 0
+    2a4c:	6001      	addc      	r0, r0
+    2a4e:	9842      	ld.w      	r2, (r14, 0x8)
+    2a50:	9822      	ld.w      	r1, (r14, 0x8)
+    2a52:	6008      	addu      	r0, r2
+    2a54:	342e      	movi      	r4, 46
+    2a56:	6054      	addu      	r1, r5
+    2a58:	3300      	movi      	r3, 0
+    2a5a:	a081      	st.b      	r4, (r0, 0x1)
+    2a5c:	b8a9      	st.w      	r5, (r14, 0x24)
+    2a5e:	a160      	st.b      	r3, (r1, 0x0)
+    2a60:	07cc      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2a62:	3501      	movi      	r5, 1
+    2a64:	07e5      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2a66:	6c17      	mov      	r0, r5
+    2a68:	3500      	movi      	r5, 0
+    2a6a:	07ea      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a6c:	9842      	ld.w      	r2, (r14, 0x8)
+    2a6e:	6094      	addu      	r2, r5
+    2a70:	3430      	movi      	r4, 48
+    2a72:	a280      	st.b      	r4, (r2, 0x0)
+    2a74:	2500      	addi      	r5, 1
+    2a76:	07e4      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a78:	3200      	movi      	r2, 0
+    2a7a:	3300      	movi      	r3, 0
+    2a7c:	980a      	ld.w      	r0, (r14, 0x28)
+    2a7e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a80:	e000022c 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2a84:	38df      	btsti      	r0, 31
+    2a86:	0c8e      	bf      	0x2ba2	// 2ba2 <__GI___dtostr+0x1d0>
+    2a88:	3180      	movi      	r1, 128
+    2a8a:	98a2      	ld.w      	r5, (r14, 0x8)
+    2a8c:	9884      	ld.w      	r4, (r14, 0x10)
+    2a8e:	4158      	lsli      	r2, r1, 24
+    2a90:	332d      	movi      	r3, 45
+    2a92:	a560      	st.b      	r3, (r5, 0x0)
+    2a94:	6108      	addu      	r4, r2
+    2a96:	2e00      	subi      	r6, 1
+    2a98:	2500      	addi      	r5, 1
+    2a9a:	3000      	movi      	r0, 0
+    2a9c:	032e      	lrw      	r1, 0x3fe00000	// 2ce0 <__GI___dtostr+0x30e>
+    2a9e:	3300      	movi      	r3, 0
+    2aa0:	b865      	st.w      	r3, (r14, 0x14)
+    2aa2:	9845      	ld.w      	r2, (r14, 0x14)
+    2aa4:	65ca      	cmpne      	r2, r7
+    2aa6:	0881      	bt      	0x2ba8	// 2ba8 <__GI___dtostr+0x1d6>
+    2aa8:	6c83      	mov      	r2, r0
+    2aaa:	6cc7      	mov      	r3, r1
+    2aac:	980a      	ld.w      	r0, (r14, 0x28)
+    2aae:	6c53      	mov      	r1, r4
+    2ab0:	e3fff2b6 	bsr      	0x101c	// 101c <__adddf3>
+    2ab4:	3200      	movi      	r2, 0
+    2ab6:	0373      	lrw      	r3, 0x3ff00000	// 2ce4 <__GI___dtostr+0x312>
+    2ab8:	b806      	st.w      	r0, (r14, 0x18)
+    2aba:	b827      	st.w      	r1, (r14, 0x1c)
+    2abc:	e000020e 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2ac0:	38df      	btsti      	r0, 31
+    2ac2:	0c05      	bf      	0x2acc	// 2acc <__GI___dtostr+0xfa>
+    2ac4:	3430      	movi      	r4, 48
+    2ac6:	a580      	st.b      	r4, (r5, 0x0)
+    2ac8:	2e00      	subi      	r6, 1
+    2aca:	2500      	addi      	r5, 1
+    2acc:	9804      	ld.w      	r0, (r14, 0x10)
+    2ace:	4021      	lsli      	r1, r0, 1
+    2ad0:	0379      	lrw      	r3, 0xfffffc01	// 2ce8 <__GI___dtostr+0x316>
+    2ad2:	4915      	lsri      	r0, r1, 21
+    2ad4:	600c      	addu      	r0, r3
+    2ad6:	e3fff4f5 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2ada:	035a      	lrw      	r2, 0x509f79ff	// 2cec <__GI___dtostr+0x31a>
+    2adc:	037a      	lrw      	r3, 0x3fd34413	// 2cf0 <__GI___dtostr+0x31e>
+    2ade:	e3fff2d3 	bsr      	0x1084	// 1084 <__muldf3>
+    2ae2:	e3fff527 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2ae6:	5842      	addi      	r2, r0, 1
+    2ae8:	3a20      	cmplti      	r2, 1
+    2aea:	b848      	st.w      	r2, (r14, 0x20)
+    2aec:	08e7      	bt      	0x2cba	// 2cba <__GI___dtostr+0x2e8>
+    2aee:	033d      	lrw      	r1, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2af0:	6dcb      	mov      	r7, r2
+    2af2:	3400      	movi      	r4, 0
+    2af4:	b823      	st.w      	r1, (r14, 0xc)
+    2af6:	3f0a      	cmphsi      	r7, 11
+    2af8:	085f      	bt      	0x2bb6	// 2bb6 <__GI___dtostr+0x1e4>
+    2afa:	3f41      	cmpnei      	r7, 1
+    2afc:	0868      	bt      	0x2bcc	// 2bcc <__GI___dtostr+0x1fa>
+    2afe:	135f      	lrw      	r2, 0xcccccccd	// 2cf8 <__GI___dtostr+0x326>
+    2b00:	137f      	lrw      	r3, 0x3feccccc	// 2cfc <__GI___dtostr+0x32a>
+    2b02:	6c13      	mov      	r0, r4
+    2b04:	9823      	ld.w      	r1, (r14, 0xc)
+    2b06:	e3fff483 	bsr      	0x140c	// 140c <__gtdf2>
+    2b0a:	3820      	cmplti      	r0, 1
+    2b0c:	0c6a      	bf      	0x2be0	// 2be0 <__GI___dtostr+0x20e>
+    2b0e:	9862      	ld.w      	r3, (r14, 0x8)
+    2b10:	64d6      	cmpne      	r5, r3
+    2b12:	0807      	bt      	0x2b20	// 2b20 <__GI___dtostr+0x14e>
+    2b14:	3e40      	cmpnei      	r6, 0
+    2b16:	0f71      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b18:	3230      	movi      	r2, 48
+    2b1a:	a540      	st.b      	r2, (r5, 0x0)
+    2b1c:	2e00      	subi      	r6, 1
+    2b1e:	2500      	addi      	r5, 1
+    2b20:	9805      	ld.w      	r0, (r14, 0x14)
+    2b22:	3840      	cmpnei      	r0, 0
+    2b24:	08cf      	bt      	0x2cc2	// 2cc2 <__GI___dtostr+0x2f0>
+    2b26:	9822      	ld.w      	r1, (r14, 0x8)
+    2b28:	5d65      	subu      	r3, r5, r1
+    2b2a:	2300      	addi      	r3, 1
+    2b2c:	984b      	ld.w      	r2, (r14, 0x2c)
+    2b2e:	648c      	cmphs      	r3, r2
+    2b30:	08a5      	bt      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b32:	3e40      	cmpnei      	r6, 0
+    2b34:	0f62      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b36:	372e      	movi      	r7, 46
+    2b38:	a5e0      	st.b      	r7, (r5, 0x0)
+    2b3a:	980b      	ld.w      	r0, (r14, 0x2c)
+    2b3c:	5de2      	addi      	r7, r5, 1
+    2b3e:	9822      	ld.w      	r1, (r14, 0x8)
+    2b40:	2000      	addi      	r0, 1
+    2b42:	5f65      	subu      	r3, r7, r1
+    2b44:	584d      	subu      	r2, r0, r3
+    2b46:	2e00      	subi      	r6, 1
+    2b48:	b845      	st.w      	r2, (r14, 0x14)
+    2b4a:	9805      	ld.w      	r0, (r14, 0x14)
+    2b4c:	6418      	cmphs      	r6, r0
+    2b4e:	0f55      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b50:	6d43      	mov      	r5, r0
+    2b52:	615c      	addu      	r5, r7
+    2b54:	36ff      	movi      	r6, 255
+    2b56:	655e      	cmpne      	r7, r5
+    2b58:	0c91      	bf      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b5a:	6c93      	mov      	r2, r4
+    2b5c:	9863      	ld.w      	r3, (r14, 0xc)
+    2b5e:	9806      	ld.w      	r0, (r14, 0x18)
+    2b60:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b62:	e3fff3ab 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b66:	e3fff4e5 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2b6a:	3130      	movi      	r1, 48
+    2b6c:	6040      	addu      	r1, r0
+    2b6e:	a720      	st.b      	r1, (r7, 0x0)
+    2b70:	6818      	and      	r0, r6
+    2b72:	e3fff4a7 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2b76:	6c93      	mov      	r2, r4
+    2b78:	9863      	ld.w      	r3, (r14, 0xc)
+    2b7a:	e3fff285 	bsr      	0x1084	// 1084 <__muldf3>
+    2b7e:	6c83      	mov      	r2, r0
+    2b80:	6cc7      	mov      	r3, r1
+    2b82:	9806      	ld.w      	r0, (r14, 0x18)
+    2b84:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b86:	e3fff263 	bsr      	0x104c	// 104c <__subdf3>
+    2b8a:	b806      	st.w      	r0, (r14, 0x18)
+    2b8c:	b827      	st.w      	r1, (r14, 0x1c)
+    2b8e:	6c13      	mov      	r0, r4
+    2b90:	9823      	ld.w      	r1, (r14, 0xc)
+    2b92:	3200      	movi      	r2, 0
+    2b94:	1278      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2b96:	e3fff391 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b9a:	2700      	addi      	r7, 1
+    2b9c:	6d03      	mov      	r4, r0
+    2b9e:	b823      	st.w      	r1, (r14, 0xc)
+    2ba0:	07db      	br      	0x2b56	// 2b56 <__GI___dtostr+0x184>
+    2ba2:	98a2      	ld.w      	r5, (r14, 0x8)
+    2ba4:	9884      	ld.w      	r4, (r14, 0x10)
+    2ba6:	077a      	br      	0x2a9a	// 2a9a <__GI___dtostr+0xc8>
+    2ba8:	1276      	lrw      	r3, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2baa:	1257      	lrw      	r2, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2bac:	e3fff26c 	bsr      	0x1084	// 1084 <__muldf3>
+    2bb0:	9865      	ld.w      	r3, (r14, 0x14)
+    2bb2:	2300      	addi      	r3, 1
+    2bb4:	0776      	br      	0x2aa0	// 2aa0 <__GI___dtostr+0xce>
+    2bb6:	3080      	movi      	r0, 128
+    2bb8:	4056      	lsli      	r2, r0, 22
+    2bba:	9823      	ld.w      	r1, (r14, 0xc)
+    2bbc:	6c13      	mov      	r0, r4
+    2bbe:	1273      	lrw      	r3, 0x4202a05f	// 2d08 <__GI___dtostr+0x336>
+    2bc0:	e3fff262 	bsr      	0x1084	// 1084 <__muldf3>
+    2bc4:	6d03      	mov      	r4, r0
+    2bc6:	b823      	st.w      	r1, (r14, 0xc)
+    2bc8:	2f09      	subi      	r7, 10
+    2bca:	0796      	br      	0x2af6	// 2af6 <__GI___dtostr+0x124>
+    2bcc:	6c13      	mov      	r0, r4
+    2bce:	9823      	ld.w      	r1, (r14, 0xc)
+    2bd0:	3200      	movi      	r2, 0
+    2bd2:	1269      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2bd4:	e3fff258 	bsr      	0x1084	// 1084 <__muldf3>
+    2bd8:	6d03      	mov      	r4, r0
+    2bda:	b823      	st.w      	r1, (r14, 0xc)
+    2bdc:	2f00      	subi      	r7, 1
+    2bde:	078e      	br      	0x2afa	// 2afa <__GI___dtostr+0x128>
+    2be0:	9863      	ld.w      	r3, (r14, 0xc)
+    2be2:	6c93      	mov      	r2, r4
+    2be4:	9806      	ld.w      	r0, (r14, 0x18)
+    2be6:	9827      	ld.w      	r1, (r14, 0x1c)
+    2be8:	e3fff368 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2bec:	e3fff4a2 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2bf0:	3f40      	cmpnei      	r7, 0
+    2bf2:	74c0      	zextb      	r3, r0
+    2bf4:	0c03      	bf      	0x2bfa	// 2bfa <__GI___dtostr+0x228>
+    2bf6:	3b40      	cmpnei      	r3, 0
+    2bf8:	0c58      	bf      	0x2ca8	// 2ca8 <__GI___dtostr+0x2d6>
+    2bfa:	232f      	addi      	r3, 48
+    2bfc:	3e40      	cmpnei      	r6, 0
+    2bfe:	a560      	st.b      	r3, (r5, 0x0)
+    2c00:	2500      	addi      	r5, 1
+    2c02:	0842      	bt      	0x2c86	// 2c86 <__GI___dtostr+0x2b4>
+    2c04:	6c93      	mov      	r2, r4
+    2c06:	9863      	ld.w      	r3, (r14, 0xc)
+    2c08:	980a      	ld.w      	r0, (r14, 0x28)
+    2c0a:	9824      	ld.w      	r1, (r14, 0x10)
+    2c0c:	e3fff356 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2c10:	9845      	ld.w      	r2, (r14, 0x14)
+    2c12:	988b      	ld.w      	r4, (r14, 0x2c)
+    2c14:	b841      	st.w      	r2, (r14, 0x4)
+    2c16:	b880      	st.w      	r4, (r14, 0x0)
+    2c18:	3300      	movi      	r3, 0
+    2c1a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c1c:	e3fffedb 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    2c20:	3840      	cmpnei      	r0, 0
+    2c22:	0eeb      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c24:	5dc0      	addu      	r6, r5, r0
+    2c26:	37fa      	movi      	r7, 250
+    2c28:	3565      	movi      	r5, 101
+    2c2a:	6c02      	nor      	r0, r0
+    2c2c:	a6a0      	st.b      	r5, (r6, 0x0)
+    2c2e:	6d03      	mov      	r4, r0
+    2c30:	5ea2      	addi      	r5, r6, 1
+    2c32:	3101      	movi      	r1, 1
+    2c34:	3604      	movi      	r6, 4
+    2c36:	47e2      	lsli      	r7, r7, 2
+    2c38:	9808      	ld.w      	r0, (r14, 0x20)
+    2c3a:	65c1      	cmplt      	r0, r7
+    2c3c:	0c03      	bf      	0x2c42	// 2c42 <__GI___dtostr+0x270>
+    2c3e:	3940      	cmpnei      	r1, 0
+    2c40:	0811      	bt      	0x2c62	// 2c62 <__GI___dtostr+0x290>
+    2c42:	3c40      	cmpnei      	r4, 0
+    2c44:	0c08      	bf      	0x2c54	// 2c54 <__GI___dtostr+0x282>
+    2c46:	6c5f      	mov      	r1, r7
+    2c48:	9808      	ld.w      	r0, (r14, 0x20)
+    2c4a:	e0000bd1 	bsr      	0x43ec	// 43ec <__divsi3>
+    2c4e:	202f      	addi      	r0, 48
+    2c50:	a500      	st.b      	r0, (r5, 0x0)
+    2c52:	2500      	addi      	r5, 1
+    2c54:	6c5f      	mov      	r1, r7
+    2c56:	9808      	ld.w      	r0, (r14, 0x20)
+    2c58:	e0000bee 	bsr      	0x4434	// 4434 <__modsi3>
+    2c5c:	2c00      	subi      	r4, 1
+    2c5e:	b808      	st.w      	r0, (r14, 0x20)
+    2c60:	3100      	movi      	r1, 0
+    2c62:	b823      	st.w      	r1, (r14, 0xc)
+    2c64:	6c1f      	mov      	r0, r7
+    2c66:	310a      	movi      	r1, 10
+    2c68:	2e00      	subi      	r6, 1
+    2c6a:	e0000bc1 	bsr      	0x43ec	// 43ec <__divsi3>
+    2c6e:	3e40      	cmpnei      	r6, 0
+    2c70:	6dc3      	mov      	r7, r0
+    2c72:	9823      	ld.w      	r1, (r14, 0xc)
+    2c74:	0be2      	bt      	0x2c38	// 2c38 <__GI___dtostr+0x266>
+    2c76:	3c40      	cmpnei      	r4, 0
+    2c78:	0ec0      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c7a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c7c:	3300      	movi      	r3, 0
+    2c7e:	5d89      	subu      	r4, r5, r2
+    2c80:	a560      	st.b      	r3, (r5, 0x0)
+    2c82:	b889      	st.w      	r4, (r14, 0x24)
+    2c84:	06ba      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c86:	7400      	zextb      	r0, r0
+    2c88:	e3fff41c 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2c8c:	6c93      	mov      	r2, r4
+    2c8e:	9863      	ld.w      	r3, (r14, 0xc)
+    2c90:	e3fff1fa 	bsr      	0x1084	// 1084 <__muldf3>
+    2c94:	6c83      	mov      	r2, r0
+    2c96:	6cc7      	mov      	r3, r1
+    2c98:	9806      	ld.w      	r0, (r14, 0x18)
+    2c9a:	9827      	ld.w      	r1, (r14, 0x1c)
+    2c9c:	e3fff1d8 	bsr      	0x104c	// 104c <__subdf3>
+    2ca0:	b806      	st.w      	r0, (r14, 0x18)
+    2ca2:	b827      	st.w      	r1, (r14, 0x1c)
+    2ca4:	2e00      	subi      	r6, 1
+    2ca6:	3700      	movi      	r7, 0
+    2ca8:	6c13      	mov      	r0, r4
+    2caa:	9823      	ld.w      	r1, (r14, 0xc)
+    2cac:	3200      	movi      	r2, 0
+    2cae:	1072      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2cb0:	e3fff304 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2cb4:	6d03      	mov      	r4, r0
+    2cb6:	b823      	st.w      	r1, (r14, 0xc)
+    2cb8:	0723      	br      	0x2afe	// 2afe <__GI___dtostr+0x12c>
+    2cba:	1012      	lrw      	r0, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2cbc:	1092      	lrw      	r4, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2cbe:	b803      	st.w      	r0, (r14, 0xc)
+    2cc0:	0727      	br      	0x2b0e	// 2b0e <__GI___dtostr+0x13c>
+    2cc2:	3e40      	cmpnei      	r6, 0
+    2cc4:	0e9a      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2cc6:	372e      	movi      	r7, 46
+    2cc8:	a5e0      	st.b      	r7, (r5, 0x0)
+    2cca:	2e00      	subi      	r6, 1
+    2ccc:	5de2      	addi      	r7, r5, 1
+    2cce:	073e      	br      	0x2b4a	// 2b4a <__GI___dtostr+0x178>
+    2cd0:	3e40      	cmpnei      	r6, 0
+    2cd2:	0ac8      	bt      	0x2a62	// 2a62 <__GI___dtostr+0x90>
+    2cd4:	3508      	movi      	r5, 8
+    2cd6:	06ac      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2cd8:	00006079 	.long	0x00006079
+    2cdc:	0000607d 	.long	0x0000607d
+    2ce0:	3fe00000 	.long	0x3fe00000
+    2ce4:	3ff00000 	.long	0x3ff00000
+    2ce8:	fffffc01 	.long	0xfffffc01
+    2cec:	509f79ff 	.long	0x509f79ff
+    2cf0:	3fd34413 	.long	0x3fd34413
+    2cf4:	40240000 	.long	0x40240000
+    2cf8:	cccccccd 	.long	0xcccccccd
+    2cfc:	3feccccc 	.long	0x3feccccc
+    2d00:	3fb99999 	.long	0x3fb99999
+    2d04:	9999999a 	.long	0x9999999a
+    2d08:	4202a05f 	.long	0x4202a05f
+
+00002d0c <__isnan>:
+    2d0c:	416c      	lsli      	r3, r1, 12
+    2d0e:	4b4c      	lsri      	r2, r3, 12
+    2d10:	6c08      	or      	r0, r2
+    2d12:	3840      	cmpnei      	r0, 0
+    2d14:	0c0e      	bf      	0x2d30	// 2d30 <__isnan+0x24>
+    2d16:	1008      	lrw      	r0, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d18:	6840      	and      	r1, r0
+    2d1a:	6cc7      	mov      	r3, r1
+    2d1c:	3000      	movi      	r0, 0
+    2d1e:	1026      	lrw      	r1, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d20:	3200      	movi      	r2, 0
+    2d22:	6c81      	xor      	r2, r0
+    2d24:	6cc5      	xor      	r3, r1
+    2d26:	6c8c      	or      	r2, r3
+    2d28:	3a40      	cmpnei      	r2, 0
+    2d2a:	6443      	mvcv      	r1
+    2d2c:	7404      	zextb      	r0, r1
+    2d2e:	783c      	jmp      	r15
+    2d30:	3000      	movi      	r0, 0
+    2d32:	07fe      	br      	0x2d2e	// 2d2e <__isnan+0x22>
+    2d34:	7ff00000 	.long	0x7ff00000
+
+00002d38 <__strlen_fast>:
+    2d38:	6c43      	mov      	r1, r0
+    2d3a:	3203      	movi      	r2, 3
+    2d3c:	6808      	and      	r0, r2
+    2d3e:	3840      	cmpnei      	r0, 0
+    2d40:	0c08      	bf      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d42:	3000      	movi      	r0, 0
+    2d44:	8140      	ld.b      	r2, (r1, 0x0)
+    2d46:	3a40      	cmpnei      	r2, 0
+    2d48:	0c20      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d4a:	2100      	addi      	r1, 1
+    2d4c:	2000      	addi      	r0, 1
+    2d4e:	07fb      	br      	0x2d44	// 2d44 <__strlen_fast+0xc>
+    2d50:	9140      	ld.w      	r2, (r1, 0x0)
+    2d52:	680b      	tstnbz      	r2
+    2d54:	0c04      	bf      	0x2d5c	// 2d5c <__strlen_fast+0x24>
+    2d56:	2103      	addi      	r1, 4
+    2d58:	2003      	addi      	r0, 4
+    2d5a:	07fb      	br      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d5c:	31ff      	movi      	r1, 255
+    2d5e:	6ccb      	mov      	r3, r2
+    2d60:	68c4      	and      	r3, r1
+    2d62:	3b40      	cmpnei      	r3, 0
+    2d64:	0c12      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d66:	2000      	addi      	r0, 1
+    2d68:	3110      	movi      	r1, 16
+    2d6a:	6ccb      	mov      	r3, r2
+    2d6c:	70c4      	lsl      	r3, r1
+    2d6e:	3118      	movi      	r1, 24
+    2d70:	70c5      	lsr      	r3, r1
+    2d72:	3b40      	cmpnei      	r3, 0
+    2d74:	0c0a      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d76:	2000      	addi      	r0, 1
+    2d78:	3108      	movi      	r1, 8
+    2d7a:	6ccb      	mov      	r3, r2
+    2d7c:	70c4      	lsl      	r3, r1
+    2d7e:	3118      	movi      	r1, 24
+    2d80:	70c5      	lsr      	r3, r1
+    2d82:	3b40      	cmpnei      	r3, 0
+    2d84:	0c02      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d86:	2000      	addi      	r0, 1
+    2d88:	783c      	jmp      	r15
+	...
+
+00002d8c <__strcpy_fast>:
+    2d8c:	14c1      	push      	r4
+    2d8e:	6d03      	mov      	r4, r0
+    2d90:	6c87      	mov      	r2, r1
+    2d92:	6c90      	or      	r2, r4
+    2d94:	3303      	movi      	r3, 3
+    2d96:	688c      	and      	r2, r3
+    2d98:	3a40      	cmpnei      	r2, 0
+    2d9a:	0c08      	bf      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2d9c:	8160      	ld.b      	r3, (r1, 0x0)
+    2d9e:	a460      	st.b      	r3, (r4, 0x0)
+    2da0:	2100      	addi      	r1, 1
+    2da2:	2400      	addi      	r4, 1
+    2da4:	3b40      	cmpnei      	r3, 0
+    2da6:	0bfb      	bt      	0x2d9c	// 2d9c <__strcpy_fast+0x10>
+    2da8:	1481      	pop      	r4
+    2daa:	9160      	ld.w      	r3, (r1, 0x0)
+    2dac:	680f      	tstnbz      	r3
+    2dae:	0c2e      	bf      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2db0:	b460      	st.w      	r3, (r4, 0x0)
+    2db2:	9161      	ld.w      	r3, (r1, 0x4)
+    2db4:	680f      	tstnbz      	r3
+    2db6:	0c1d      	bf      	0x2df0	// 2df0 <__strcpy_fast+0x64>
+    2db8:	b461      	st.w      	r3, (r4, 0x4)
+    2dba:	9162      	ld.w      	r3, (r1, 0x8)
+    2dbc:	680f      	tstnbz      	r3
+    2dbe:	0c1b      	bf      	0x2df4	// 2df4 <__strcpy_fast+0x68>
+    2dc0:	b462      	st.w      	r3, (r4, 0x8)
+    2dc2:	9163      	ld.w      	r3, (r1, 0xc)
+    2dc4:	680f      	tstnbz      	r3
+    2dc6:	0c19      	bf      	0x2df8	// 2df8 <__strcpy_fast+0x6c>
+    2dc8:	b463      	st.w      	r3, (r4, 0xc)
+    2dca:	9164      	ld.w      	r3, (r1, 0x10)
+    2dcc:	680f      	tstnbz      	r3
+    2dce:	0c17      	bf      	0x2dfc	// 2dfc <__strcpy_fast+0x70>
+    2dd0:	b464      	st.w      	r3, (r4, 0x10)
+    2dd2:	9165      	ld.w      	r3, (r1, 0x14)
+    2dd4:	680f      	tstnbz      	r3
+    2dd6:	0c15      	bf      	0x2e00	// 2e00 <__strcpy_fast+0x74>
+    2dd8:	b465      	st.w      	r3, (r4, 0x14)
+    2dda:	9166      	ld.w      	r3, (r1, 0x18)
+    2ddc:	680f      	tstnbz      	r3
+    2dde:	0c13      	bf      	0x2e04	// 2e04 <__strcpy_fast+0x78>
+    2de0:	b466      	st.w      	r3, (r4, 0x18)
+    2de2:	9167      	ld.w      	r3, (r1, 0x1c)
+    2de4:	680f      	tstnbz      	r3
+    2de6:	0c11      	bf      	0x2e08	// 2e08 <__strcpy_fast+0x7c>
+    2de8:	b467      	st.w      	r3, (r4, 0x1c)
+    2dea:	241f      	addi      	r4, 32
+    2dec:	211f      	addi      	r1, 32
+    2dee:	07de      	br      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2df0:	2403      	addi      	r4, 4
+    2df2:	040c      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df4:	2407      	addi      	r4, 8
+    2df6:	040a      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df8:	240b      	addi      	r4, 12
+    2dfa:	0408      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2dfc:	240f      	addi      	r4, 16
+    2dfe:	0406      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e00:	2413      	addi      	r4, 20
+    2e02:	0404      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e04:	2417      	addi      	r4, 24
+    2e06:	0402      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e08:	241b      	addi      	r4, 28
+    2e0a:	3118      	movi      	r1, 24
+    2e0c:	6c8f      	mov      	r2, r3
+    2e0e:	7084      	lsl      	r2, r1
+    2e10:	7085      	lsr      	r2, r1
+    2e12:	a440      	st.b      	r2, (r4, 0x0)
+    2e14:	3a40      	cmpnei      	r2, 0
+    2e16:	0c12      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e18:	3110      	movi      	r1, 16
+    2e1a:	6c8f      	mov      	r2, r3
+    2e1c:	7084      	lsl      	r2, r1
+    2e1e:	3118      	movi      	r1, 24
+    2e20:	7085      	lsr      	r2, r1
+    2e22:	a441      	st.b      	r2, (r4, 0x1)
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0c0a      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e28:	3108      	movi      	r1, 8
+    2e2a:	6c8f      	mov      	r2, r3
+    2e2c:	7084      	lsl      	r2, r1
+    2e2e:	3118      	movi      	r1, 24
+    2e30:	7085      	lsr      	r2, r1
+    2e32:	a442      	st.b      	r2, (r4, 0x2)
+    2e34:	3a40      	cmpnei      	r2, 0
+    2e36:	0c02      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e38:	b460      	st.w      	r3, (r4, 0x0)
+    2e3a:	1481      	pop      	r4
+
+00002e3c <__GI_strchr>:
+    2e3c:	8040      	ld.b      	r2, (r0, 0x0)
+    2e3e:	644a      	cmpne      	r2, r1
+    2e40:	0c06      	bf      	0x2e4c	// 2e4c <__GI_strchr+0x10>
+    2e42:	3a40      	cmpnei      	r2, 0
+    2e44:	0c03      	bf      	0x2e4a	// 2e4a <__GI_strchr+0xe>
+    2e46:	2000      	addi      	r0, 1
+    2e48:	07fa      	br      	0x2e3c	// 2e3c <__GI_strchr>
+    2e4a:	6c0b      	mov      	r0, r2
+    2e4c:	783c      	jmp      	r15
+	...
+
+00002e50 <__GI_strerror>:
+    2e50:	338f      	movi      	r3, 143
+    2e52:	640c      	cmphs      	r3, r0
+    2e54:	0c06      	bf      	0x2e60	// 2e60 <__GI_strerror+0x10>
+    2e56:	4002      	lsli      	r0, r0, 2
+    2e58:	1023      	lrw      	r1, 0x5cec	// 2e64 <__GI_strerror+0x14>
+    2e5a:	6004      	addu      	r0, r1
+    2e5c:	9000      	ld.w      	r0, (r0, 0x0)
+    2e5e:	783c      	jmp      	r15
+    2e60:	1002      	lrw      	r0, 0x5f53	// 2e68 <__GI_strerror+0x18>
+    2e62:	07fe      	br      	0x2e5e	// 2e5e <__GI_strerror+0xe>
+    2e64:	00005cec 	.long	0x00005cec
+    2e68:	00005f53 	.long	0x00005f53
+
+00002e6c <__isinf>:
+    2e6c:	3840      	cmpnei      	r0, 0
+    2e6e:	6c83      	mov      	r2, r0
+    2e70:	6cc7      	mov      	r3, r1
+    2e72:	0804      	bt      	0x2e7a	// 2e7a <__isinf+0xe>
+    2e74:	1028      	lrw      	r1, 0x7ff00000	// 2e94 <__isinf+0x28>
+    2e76:	644e      	cmpne      	r3, r1
+    2e78:	0c0b      	bf      	0x2e8e	// 2e8e <__isinf+0x22>
+    2e7a:	3000      	movi      	r0, 0
+    2e7c:	1027      	lrw      	r1, 0xfff00000	// 2e98 <__isinf+0x2c>
+    2e7e:	6c81      	xor      	r2, r0
+    2e80:	6cc5      	xor      	r3, r1
+    2e82:	6c8c      	or      	r2, r3
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	64c3      	mvcv      	r3
+    2e88:	3000      	movi      	r0, 0
+    2e8a:	600e      	subu      	r0, r3
+    2e8c:	783c      	jmp      	r15
+    2e8e:	3001      	movi      	r0, 1
+    2e90:	07fe      	br      	0x2e8c	// 2e8c <__isinf+0x20>
+    2e92:	0000      	bkpt
+    2e94:	7ff00000 	.long	0x7ff00000
+    2e98:	fff00000 	.long	0xfff00000
+
+00002e9c <__eqdf2>:
+    2e9c:	14d0      	push      	r15
+    2e9e:	142e      	subi      	r14, r14, 56
+    2ea0:	b800      	st.w      	r0, (r14, 0x0)
+    2ea2:	b821      	st.w      	r1, (r14, 0x4)
+    2ea4:	6c3b      	mov      	r0, r14
+    2ea6:	1904      	addi      	r1, r14, 16
+    2ea8:	b863      	st.w      	r3, (r14, 0xc)
+    2eaa:	b842      	st.w      	r2, (r14, 0x8)
+    2eac:	e3fff4b4 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb0:	1909      	addi      	r1, r14, 36
+    2eb2:	1802      	addi      	r0, r14, 8
+    2eb4:	e3fff4b0 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb8:	9864      	ld.w      	r3, (r14, 0x10)
+    2eba:	3b01      	cmphsi      	r3, 2
+    2ebc:	0c0a      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ebe:	9869      	ld.w      	r3, (r14, 0x24)
+    2ec0:	3b01      	cmphsi      	r3, 2
+    2ec2:	0c07      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ec4:	1909      	addi      	r1, r14, 36
+    2ec6:	1804      	addi      	r0, r14, 16
+    2ec8:	e3fff508 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2ecc:	140e      	addi      	r14, r14, 56
+    2ece:	1490      	pop      	r15
+    2ed0:	3001      	movi      	r0, 1
+    2ed2:	140e      	addi      	r14, r14, 56
+    2ed4:	1490      	pop      	r15
+	...
+
+00002ed8 <__ltdf2>:
+    2ed8:	14d0      	push      	r15
+    2eda:	142e      	subi      	r14, r14, 56
+    2edc:	b800      	st.w      	r0, (r14, 0x0)
+    2ede:	b821      	st.w      	r1, (r14, 0x4)
+    2ee0:	6c3b      	mov      	r0, r14
+    2ee2:	1904      	addi      	r1, r14, 16
+    2ee4:	b863      	st.w      	r3, (r14, 0xc)
+    2ee6:	b842      	st.w      	r2, (r14, 0x8)
+    2ee8:	e3fff496 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eec:	1909      	addi      	r1, r14, 36
+    2eee:	1802      	addi      	r0, r14, 8
+    2ef0:	e3fff492 	bsr      	0x1814	// 1814 <__unpack_d>
+    2ef4:	9864      	ld.w      	r3, (r14, 0x10)
+    2ef6:	3b01      	cmphsi      	r3, 2
+    2ef8:	0c0a      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2efa:	9869      	ld.w      	r3, (r14, 0x24)
+    2efc:	3b01      	cmphsi      	r3, 2
+    2efe:	0c07      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2f00:	1909      	addi      	r1, r14, 36
+    2f02:	1804      	addi      	r0, r14, 16
+    2f04:	e3fff4ea 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2f08:	140e      	addi      	r14, r14, 56
+    2f0a:	1490      	pop      	r15
+    2f0c:	3001      	movi      	r0, 1
+    2f0e:	140e      	addi      	r14, r14, 56
+    2f10:	1490      	pop      	r15
+
+Disassembly of section .text.__main:
+
+00002f14 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    2f14:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    2f16:	1009      	lrw      	r0, 0x20000000	// 2f38 <__main+0x24>
+    2f18:	1029      	lrw      	r1, 0x6808	// 2f3c <__main+0x28>
+    2f1a:	6442      	cmpne      	r0, r1
+    2f1c:	0c05      	bf      	0x2f26	// 2f26 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    2f1e:	1049      	lrw      	r2, 0x200000a0	// 2f40 <__main+0x2c>
+    2f20:	6082      	subu      	r2, r0
+    2f22:	e3fff5c1 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    2f26:	1048      	lrw      	r2, 0x20000758	// 2f44 <__main+0x30>
+    2f28:	1008      	lrw      	r0, 0x200000a0	// 2f48 <__main+0x34>
+    2f2a:	640a      	cmpne      	r2, r0
+    2f2c:	0c05      	bf      	0x2f36	// 2f36 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    2f2e:	6082      	subu      	r2, r0
+    2f30:	3100      	movi      	r1, 0
+    2f32:	e3fff575 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+  }
+
+	
+}
+    2f36:	1490      	pop      	r15
+    2f38:	20000000 	.long	0x20000000
+    2f3c:	00006808 	.long	0x00006808
+    2f40:	200000a0 	.long	0x200000a0
+    2f44:	20000758 	.long	0x20000758
+    2f48:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00002f4c <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    2f4c:	3848      	cmpnei      	r0, 8
+    2f4e:	080a      	bt      	0x2f62	// 2f62 <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    2f50:	107a      	lrw      	r3, 0x2000004c	// 2fb8 <SYSCON_General_CMD.part.0+0x6c>
+    2f52:	32ff      	movi      	r2, 255
+    2f54:	9320      	ld.w      	r1, (r3, 0x0)
+    2f56:	9160      	ld.w      	r3, (r1, 0x0)
+    2f58:	424c      	lsli      	r2, r2, 12
+    2f5a:	68c9      	andn      	r3, r2
+    2f5c:	3bae      	bseti      	r3, 14
+    2f5e:	3bb2      	bseti      	r3, 18
+    2f60:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    2f62:	1077      	lrw      	r3, 0x2000005c	// 2fbc <SYSCON_General_CMD.part.0+0x70>
+    2f64:	9360      	ld.w      	r3, (r3, 0x0)
+    2f66:	9341      	ld.w      	r2, (r3, 0x4)
+    2f68:	6c80      	or      	r2, r0
+    2f6a:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    2f6c:	9343      	ld.w      	r2, (r3, 0xc)
+    2f6e:	6880      	and      	r2, r0
+    2f70:	3a40      	cmpnei      	r2, 0
+    2f72:	0ffd      	bf      	0x2f6c	// 2f6c <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    2f74:	3842      	cmpnei      	r0, 2
+    2f76:	0807      	bt      	0x2f84	// 2f84 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    2f78:	3102      	movi      	r1, 2
+    2f7a:	9344      	ld.w      	r2, (r3, 0x10)
+    2f7c:	6884      	and      	r2, r1
+    2f7e:	3a40      	cmpnei      	r2, 0
+    2f80:	0ffd      	bf      	0x2f7a	// 2f7a <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    2f82:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    2f84:	3802      	cmphsi      	r0, 3
+    2f86:	0809      	bt      	0x2f98	// 2f98 <SYSCON_General_CMD.part.0+0x4c>
+    2f88:	3841      	cmpnei      	r0, 1
+    2f8a:	0bfc      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    2f8c:	3101      	movi      	r1, 1
+    2f8e:	9344      	ld.w      	r2, (r3, 0x10)
+    2f90:	6884      	and      	r2, r1
+    2f92:	3a40      	cmpnei      	r2, 0
+    2f94:	0ffd      	bf      	0x2f8e	// 2f8e <SYSCON_General_CMD.part.0+0x42>
+    2f96:	07f6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2f98:	3848      	cmpnei      	r0, 8
+    2f9a:	0807      	bt      	0x2fa8	// 2fa8 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	9344      	ld.w      	r2, (r3, 0x10)
+    2fa0:	6884      	and      	r2, r1
+    2fa2:	3a40      	cmpnei      	r2, 0
+    2fa4:	0ffd      	bf      	0x2f9e	// 2f9e <SYSCON_General_CMD.part.0+0x52>
+    2fa6:	07ee      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2fa8:	3850      	cmpnei      	r0, 16
+    2faa:	0bec      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    2fac:	3110      	movi      	r1, 16
+    2fae:	9344      	ld.w      	r2, (r3, 0x10)
+    2fb0:	6884      	and      	r2, r1
+    2fb2:	3a40      	cmpnei      	r2, 0
+    2fb4:	0ffd      	bf      	0x2fae	// 2fae <SYSCON_General_CMD.part.0+0x62>
+    2fb6:	07e6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+    2fb8:	2000004c 	.long	0x2000004c
+    2fbc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00002fc0 <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    2fc0:	106c      	lrw      	r3, 0x2000005c	// 2ff0 <SYSCON_RST_VALUE+0x30>
+    2fc2:	104d      	lrw      	r2, 0xffff	// 2ff4 <SYSCON_RST_VALUE+0x34>
+    2fc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2fc6:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    2fc8:	104c      	lrw      	r2, 0xffffff	// 2ff8 <SYSCON_RST_VALUE+0x38>
+    2fca:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    2fcc:	104c      	lrw      	r2, 0xd22d0000	// 2ffc <SYSCON_RST_VALUE+0x3c>
+    2fce:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    2fd0:	104c      	lrw      	r2, 0x70ff3bff	// 3000 <SYSCON_RST_VALUE+0x40>
+    2fd2:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    2fd4:	320a      	movi      	r2, 10
+    2fd6:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fd8:	102b      	lrw      	r1, 0x70c	// 3004 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    2fda:	237f      	addi      	r3, 128
+    2fdc:	3200      	movi      	r2, 0
+    2fde:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    2fe0:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fe2:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    2fe4:	1029      	lrw      	r1, 0x3fe	// 3008 <SYSCON_RST_VALUE+0x48>
+    2fe6:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    2fe8:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    2fea:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    2fec:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    2fee:	783c      	jmp      	r15
+    2ff0:	2000005c 	.long	0x2000005c
+    2ff4:	0000ffff 	.long	0x0000ffff
+    2ff8:	00ffffff 	.long	0x00ffffff
+    2ffc:	d22d0000 	.long	0xd22d0000
+    3000:	70ff3bff 	.long	0x70ff3bff
+    3004:	0000070c 	.long	0x0000070c
+    3008:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+0000300c <SYSCON_General_CMD>:
+{
+    300c:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    300e:	3840      	cmpnei      	r0, 0
+    3010:	0c05      	bf      	0x301a	// 301a <SYSCON_General_CMD+0xe>
+    3012:	6c07      	mov      	r0, r1
+    3014:	e3ffff9c 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+}
+    3018:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    301a:	1068      	lrw      	r3, 0x2000005c	// 3038 <SYSCON_General_CMD+0x2c>
+    301c:	9360      	ld.w      	r3, (r3, 0x0)
+    301e:	9342      	ld.w      	r2, (r3, 0x8)
+    3020:	6c84      	or      	r2, r1
+    3022:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    3024:	9343      	ld.w      	r2, (r3, 0xc)
+    3026:	6884      	and      	r2, r1
+    3028:	3a40      	cmpnei      	r2, 0
+    302a:	0bfd      	bt      	0x3024	// 3024 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    302c:	237f      	addi      	r3, 128
+    302e:	9301      	ld.w      	r0, (r3, 0x4)
+    3030:	6c40      	or      	r1, r0
+    3032:	b321      	st.w      	r1, (r3, 0x4)
+}
+    3034:	07f2      	br      	0x3018	// 3018 <SYSCON_General_CMD+0xc>
+    3036:	0000      	bkpt
+    3038:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+0000303c <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    303c:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    303e:	3b48      	cmpnei      	r3, 8
+    3040:	0828      	bt      	0x3090	// 3090 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    3042:	109d      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3044:	3501      	movi      	r5, 1
+    3046:	9480      	ld.w      	r4, (r4, 0x0)
+    3048:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    304a:	3504      	movi      	r5, 4
+    304c:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    304e:	5b83      	subi      	r4, r3, 1
+    3050:	3c01      	cmphsi      	r4, 2
+    3052:	0c2b      	bf      	0x30a8	// 30a8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    3054:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    3056:	3c04      	cmphsi      	r4, 5
+    3058:	0c03      	bf      	0x305e	// 305e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    305a:	3b4b      	cmpnei      	r3, 11
+    305c:	0807      	bt      	0x306a	// 306a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    305e:	1076      	lrw      	r3, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3060:	3401      	movi      	r4, 1
+    3062:	9360      	ld.w      	r3, (r3, 0x0)
+    3064:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    3066:	3400      	movi      	r4, 0
+    3068:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    306a:	1094      	lrw      	r4, 0xd22d0000	// 30b8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    306c:	6c10      	or      	r0, r4
+    306e:	1074      	lrw      	r3, 0x2000005c	// 30bc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    3070:	6c40      	or      	r1, r0
+    3072:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3074:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    3076:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3078:	4001      	lsli      	r0, r0, 1
+    307a:	9324      	ld.w      	r1, (r3, 0x10)
+    307c:	6840      	and      	r1, r0
+    307e:	3940      	cmpnei      	r1, 0
+    3080:	0ffd      	bf      	0x307a	// 307a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    3082:	1030      	lrw      	r1, 0xc33c0000	// 30c0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    3084:	6c48      	or      	r1, r2
+    3086:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    3088:	9328      	ld.w      	r1, (r3, 0x20)
+    308a:	644a      	cmpne      	r2, r1
+    308c:	0bfe      	bt      	0x3088	// 3088 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    308e:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    3090:	3b40      	cmpnei      	r3, 0
+    3092:	0c03      	bf      	0x3098	// 3098 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    3094:	3b49      	cmpnei      	r3, 9
+    3096:	0807      	bt      	0x30a4	// 30a4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    3098:	1087      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    309a:	3501      	movi      	r5, 1
+    309c:	9480      	ld.w      	r4, (r4, 0x0)
+    309e:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    30a0:	3502      	movi      	r5, 2
+    30a2:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    30a4:	3b4a      	cmpnei      	r3, 10
+    30a6:	0bd4      	bt      	0x304e	// 304e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    30a8:	1083      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    30aa:	3501      	movi      	r5, 1
+    30ac:	9480      	ld.w      	r4, (r4, 0x0)
+    30ae:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    30b0:	b4a5      	st.w      	r5, (r4, 0x14)
+    30b2:	07d1      	br      	0x3054	// 3054 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    30b4:	20000060 	.long	0x20000060
+    30b8:	d22d0000 	.long	0xd22d0000
+    30bc:	2000005c 	.long	0x2000005c
+    30c0:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+000030c4 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    30c4:	14d1      	push      	r4, r15
+    30c6:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    30c8:	3110      	movi      	r1, 16
+    30ca:	3000      	movi      	r0, 0
+    30cc:	e3ffffa0 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    30d0:	1066      	lrw      	r3, 0x2000005c	// 30e8 <SYSCON_HFOSC_SELECTE+0x24>
+    30d2:	9360      	ld.w      	r3, (r3, 0x0)
+    30d4:	9319      	ld.w      	r0, (r3, 0x64)
+    30d6:	3884      	bclri      	r0, 4
+    30d8:	3885      	bclri      	r0, 5
+    30da:	6c10      	or      	r0, r4
+    30dc:	b319      	st.w      	r0, (r3, 0x64)
+    30de:	3010      	movi      	r0, 16
+    30e0:	e3ffff36 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    30e4:	1491      	pop      	r4, r15
+    30e6:	0000      	bkpt
+    30e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+000030ec <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    30ec:	106c      	lrw      	r3, 0x2000005c	// 311c <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    30ee:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f0:	9360      	ld.w      	r3, (r3, 0x0)
+    30f2:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    30f4:	0c0a      	bf      	0x3108	// 3108 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f6:	104b      	lrw      	r2, 0x78870000	// 3120 <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30f8:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30fa:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30fc:	4125      	lsli      	r1, r1, 5
+    30fe:	934d      	ld.w      	r2, (r3, 0x34)
+    3100:	6884      	and      	r2, r1
+    3102:	3a40      	cmpnei      	r2, 0
+    3104:	0ffd      	bf      	0x30fe	// 30fe <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    3106:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    3108:	1047      	lrw      	r2, 0x788755aa	// 3124 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310a:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    310c:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310e:	4125      	lsli      	r1, r1, 5
+    3110:	934d      	ld.w      	r2, (r3, 0x34)
+    3112:	6884      	and      	r2, r1
+    3114:	3a40      	cmpnei      	r2, 0
+    3116:	0bfd      	bt      	0x3110	// 3110 <SYSCON_WDT_CMD+0x24>
+    3118:	07f7      	br      	0x3106	// 3106 <SYSCON_WDT_CMD+0x1a>
+    311a:	0000      	bkpt
+    311c:	2000005c 	.long	0x2000005c
+    3120:	78870000 	.long	0x78870000
+    3124:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00003128 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    3128:	1064      	lrw      	r3, 0x2000005c	// 3138 <SYSCON_IWDCNT_Reload+0x10>
+    312a:	32b4      	movi      	r2, 180
+    312c:	9360      	ld.w      	r3, (r3, 0x0)
+    312e:	237f      	addi      	r3, 128
+    3130:	4257      	lsli      	r2, r2, 23
+    3132:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    3134:	783c      	jmp      	r15
+    3136:	0000      	bkpt
+    3138:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+0000313c <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    313c:	1044      	lrw      	r2, 0x87780000	// 314c <SYSCON_IWDCNT_Config+0x10>
+    313e:	1065      	lrw      	r3, 0x2000005c	// 3150 <SYSCON_IWDCNT_Config+0x14>
+    3140:	6c48      	or      	r1, r2
+    3142:	9360      	ld.w      	r3, (r3, 0x0)
+    3144:	6c04      	or      	r0, r1
+    3146:	237f      	addi      	r3, 128
+    3148:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    314a:	783c      	jmp      	r15
+    314c:	87780000 	.long	0x87780000
+    3150:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00003154 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    3154:	14c3      	push      	r4-r6
+    3156:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    3158:	10c5      	lrw      	r6, 0xb44b0000	// 316c <SYSCON_LVD_Config+0x18>
+    315a:	6d18      	or      	r4, r6
+    315c:	6cd0      	or      	r3, r4
+    315e:	6c8c      	or      	r2, r3
+    3160:	6c48      	or      	r1, r2
+    3162:	10a4      	lrw      	r5, 0x2000005c	// 3170 <SYSCON_LVD_Config+0x1c>
+    3164:	6c04      	or      	r0, r1
+    3166:	95a0      	ld.w      	r5, (r5, 0x0)
+    3168:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    316a:	1483      	pop      	r4-r6
+    316c:	b44b0000 	.long	0xb44b0000
+    3170:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00003174 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    3174:	1066      	lrw      	r3, 0x2000005c	// 318c <LVD_Int_Enable+0x18>
+    3176:	3180      	movi      	r1, 128
+    3178:	9360      	ld.w      	r3, (r3, 0x0)
+    317a:	3280      	movi      	r2, 128
+    317c:	604c      	addu      	r1, r3
+    317e:	4244      	lsli      	r2, r2, 4
+    3180:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    3182:	935d      	ld.w      	r2, (r3, 0x74)
+    3184:	3aab      	bseti      	r2, 11
+    3186:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    3188:	783c      	jmp      	r15
+    318a:	0000      	bkpt
+    318c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00003190 <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    3190:	1066      	lrw      	r3, 0x2000005c	// 31a8 <IWDT_Int_Enable+0x18>
+    3192:	3180      	movi      	r1, 128
+    3194:	9360      	ld.w      	r3, (r3, 0x0)
+    3196:	3280      	movi      	r2, 128
+    3198:	604c      	addu      	r1, r3
+    319a:	4241      	lsli      	r2, r2, 1
+    319c:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    319e:	935d      	ld.w      	r2, (r3, 0x74)
+    31a0:	3aa8      	bseti      	r2, 8
+    31a2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    31a4:	783c      	jmp      	r15
+    31a6:	0000      	bkpt
+    31a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+000031ac <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    31ac:	3a40      	cmpnei      	r2, 0
+    31ae:	0c04      	bf      	0x31b6	// 31b6 <EXTI_trigger_CMD+0xa>
+    31b0:	3a41      	cmpnei      	r2, 1
+    31b2:	0c0e      	bf      	0x31ce	// 31ce <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    31b4:	783c      	jmp      	r15
+    31b6:	106d      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31b8:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    31ba:	9360      	ld.w      	r3, (r3, 0x0)
+    31bc:	237f      	addi      	r3, 128
+    31be:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    31c0:	0c04      	bf      	0x31c8	// 31c8 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    31c2:	6c48      	or      	r1, r2
+    31c4:	b325      	st.w      	r1, (r3, 0x14)
+    31c6:	07f7      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    31c8:	6885      	andn      	r2, r1
+    31ca:	b345      	st.w      	r2, (r3, 0x14)
+    31cc:	07f4      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31ce:	1067      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31d0:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    31d2:	9360      	ld.w      	r3, (r3, 0x0)
+    31d4:	237f      	addi      	r3, 128
+    31d6:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    31d8:	0c04      	bf      	0x31e0	// 31e0 <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    31da:	6c48      	or      	r1, r2
+    31dc:	b326      	st.w      	r1, (r3, 0x18)
+    31de:	07eb      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    31e0:	6885      	andn      	r2, r1
+    31e2:	b346      	st.w      	r2, (r3, 0x18)
+}
+    31e4:	07e8      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31e6:	0000      	bkpt
+    31e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+000031ec <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    31ec:	3202      	movi      	r2, 2
+    31ee:	1062      	lrw      	r3, 0xe000e100	// 31f4 <SYSCON_Int_Enable+0x8>
+    31f0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    31f2:	783c      	jmp      	r15
+    31f4:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+000031f8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31f8:	1066      	lrw      	r3, 0xe000e400	// 3210 <SYSCON_INT_Priority+0x18>
+    31fa:	1047      	lrw      	r2, 0xc0c0c0c0	// 3214 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    31fc:	1027      	lrw      	r1, 0xc0c000c0	// 3218 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31fe:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    3200:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    3202:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    3204:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    3206:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    3208:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    320a:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    320c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    320e:	783c      	jmp      	r15
+    3210:	e000e400 	.long	0xe000e400
+    3214:	c0c0c0c0 	.long	0xc0c0c0c0
+    3218:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+0000321c <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    321c:	14c1      	push      	r4
+    321e:	4862      	lsri      	r3, r0, 2
+    3220:	4342      	lsli      	r2, r3, 2
+    3222:	106a      	lrw      	r3, 0x20000064	// 3248 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    3224:	3403      	movi      	r4, 3
+    3226:	9360      	ld.w      	r3, (r3, 0x0)
+    3228:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    322a:	3280      	movi      	r2, 128
+    322c:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    322e:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    3230:	60c8      	addu      	r3, r2
+    3232:	4003      	lsli      	r0, r0, 3
+    3234:	34ff      	movi      	r4, 255
+    3236:	9340      	ld.w      	r2, (r3, 0x0)
+    3238:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    323c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323e:	7040      	lsl      	r1, r0
+    3240:	6c48      	or      	r1, r2
+    3242:	b320      	st.w      	r1, (r3, 0x0)
+}
+    3244:	1481      	pop      	r4
+    3246:	0000      	bkpt
+    3248:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+0000324c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    324c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    324e:	3907      	cmphsi      	r1, 8
+{
+    3250:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    3252:	0830      	bt      	0x32b2	// 32b2 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    3254:	5903      	subi      	r0, r1, 1
+    3256:	3806      	cmphsi      	r0, 7
+    3258:	0827      	bt      	0x32a6	// 32a6 <GPIO_Init+0x5a>
+    325a:	e3ffed51 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    325e:	1004      	.short	0x1004
+    3260:	1d1a1613 	.long	0x1d1a1613
+    3264:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    3266:	3300      	movi      	r3, 0
+    3268:	3104      	movi      	r1, 4
+    326a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    326c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    326e:	9440      	ld.w      	r2, (r4, 0x0)
+    3270:	68c8      	and      	r3, r2
+        if (Dir)
+    3272:	0c1e      	bf      	0x32ae	// 32ae <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    3274:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    3276:	7084      	lsl      	r2, r1
+    3278:	6cc8      	or      	r3, r2
+    327a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    327c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    327e:	3108      	movi      	r1, 8
+    3280:	1166      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    3282:	07f5      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    3284:	310c      	movi      	r1, 12
+    3286:	1166      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    3288:	07f2      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    328a:	3110      	movi      	r1, 16
+    328c:	1165      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    328e:	2b00      	subi      	r3, 1
+    3290:	07ee      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    3292:	3114      	movi      	r1, 20
+    3294:	1164      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    3296:	07fc      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    3298:	33f1      	movi      	r3, 241
+    329a:	3118      	movi      	r1, 24
+    329c:	4378      	lsli      	r3, r3, 24
+    329e:	07f8      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    32a0:	311c      	movi      	r1, 28
+    32a2:	1162      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    32a4:	07e4      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    32a6:	3300      	movi      	r3, 0
+    32a8:	3100      	movi      	r1, 0
+    32aa:	2b0f      	subi      	r3, 16
+    32ac:	07e0      	br      	0x326c	// 326c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    32ae:	3202      	movi      	r2, 2
+    32b0:	07e3      	br      	0x3276	// 3276 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    32b2:	390f      	cmphsi      	r1, 16
+    32b4:	0be4      	bt      	0x327c	// 327c <GPIO_Init+0x30>
+        switch (PinNum)
+    32b6:	2908      	subi      	r1, 9
+    32b8:	3906      	cmphsi      	r1, 7
+    32ba:	6c07      	mov      	r0, r1
+    32bc:	0827      	bt      	0x330a	// 330a <GPIO_Init+0xbe>
+    32be:	e3ffed1f 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    32c2:	1004      	.short	0x1004
+    32c4:	1d1a1613 	.long	0x1d1a1613
+    32c8:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    32ca:	3300      	movi      	r3, 0
+    32cc:	3104      	movi      	r1, 4
+    32ce:	2bf0      	subi      	r3, 241
+      if (Dir)
+    32d0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d2:	9441      	ld.w      	r2, (r4, 0x4)
+    32d4:	68c8      	and      	r3, r2
+      if (Dir)
+    32d6:	0c1e      	bf      	0x3312	// 3312 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    32da:	7084      	lsl      	r2, r1
+    32dc:	6cc8      	or      	r3, r2
+    32de:	b461      	st.w      	r3, (r4, 0x4)
+}
+    32e0:	07ce      	br      	0x327c	// 327c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    32e2:	3108      	movi      	r1, 8
+    32e4:	106d      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    32e6:	07f5      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    32e8:	310c      	movi      	r1, 12
+    32ea:	106d      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    32ec:	07f2      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    32ee:	3110      	movi      	r1, 16
+    32f0:	106c      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32f2:	2b00      	subi      	r3, 1
+    32f4:	07ee      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    32f6:	3114      	movi      	r1, 20
+    32f8:	106b      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    32fa:	07fc      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32fc:	33f1      	movi      	r3, 241
+    32fe:	3118      	movi      	r1, 24
+    3300:	4378      	lsli      	r3, r3, 24
+    3302:	07f8      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    3304:	311c      	movi      	r1, 28
+    3306:	1069      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    3308:	07e4      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    330a:	3300      	movi      	r3, 0
+    330c:	3100      	movi      	r1, 0
+    330e:	2b0f      	subi      	r3, 16
+    3310:	07e0      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    3312:	3202      	movi      	r2, 2
+    3314:	07e3      	br      	0x32da	// 32da <GPIO_Init+0x8e>
+    3316:	0000      	bkpt
+    3318:	fffff0ff 	.long	0xfffff0ff
+    331c:	ffff0fff 	.long	0xffff0fff
+    3320:	fff10000 	.long	0xfff10000
+    3324:	ff100000 	.long	0xff100000
+    3328:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+0000332c <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    332c:	4121      	lsli      	r1, r1, 1
+    332e:	3203      	movi      	r2, 3
+    3330:	9068      	ld.w      	r3, (r0, 0x20)
+    3332:	7084      	lsl      	r2, r1
+    3334:	68c9      	andn      	r3, r2
+    3336:	3201      	movi      	r2, 1
+    3338:	7084      	lsl      	r2, r1
+    333a:	6cc8      	or      	r3, r2
+    333c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    333e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00003340 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    3340:	4121      	lsli      	r1, r1, 1
+    3342:	3301      	movi      	r3, 1
+    3344:	9049      	ld.w      	r2, (r0, 0x24)
+    3346:	70c4      	lsl      	r3, r1
+    3348:	6cc8      	or      	r3, r2
+    334a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    334c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+0000334e <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    334e:	3301      	movi      	r3, 1
+    3350:	70c4      	lsl      	r3, r1
+    3352:	b063      	st.w      	r3, (r0, 0xc)
+}
+    3354:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00003356 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    3356:	3301      	movi      	r3, 1
+    3358:	70c4      	lsl      	r3, r1
+    335a:	b064      	st.w      	r3, (r0, 0x10)
+}
+    335c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+0000335e <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    335e:	9045      	ld.w      	r2, (r0, 0x14)
+    3360:	3301      	movi      	r3, 1
+    3362:	7085      	lsr      	r2, r1
+    3364:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    3366:	3a40      	cmpnei      	r2, 0
+    3368:	70c4      	lsl      	r3, r1
+    336a:	0c03      	bf      	0x3370	// 3370 <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    336c:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    336e:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    3370:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    3372:	07fe      	br      	0x336e	// 336e <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00003374 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    3374:	3301      	movi      	r3, 1
+    3376:	9046      	ld.w      	r2, (r0, 0x18)
+    3378:	70c4      	lsl      	r3, r1
+    337a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    337c:	64ca      	cmpne      	r2, r3
+    337e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3380:	7400      	zextb      	r0, r0
+}
+    3382:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00003384 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    3384:	3301      	movi      	r3, 1
+    3386:	9045      	ld.w      	r2, (r0, 0x14)
+    3388:	70c4      	lsl      	r3, r1
+    338a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    338c:	64ca      	cmpne      	r2, r3
+    338e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3390:	7400      	zextb      	r0, r0
+}
+    3392:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00003394 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    3394:	1064      	lrw      	r3, 0x20000014	// 33a4 <LPT_Soft_Reset+0x10>
+    3396:	9340      	ld.w      	r2, (r3, 0x0)
+    3398:	9261      	ld.w      	r3, (r2, 0x4)
+    339a:	3bac      	bseti      	r3, 12
+    339c:	3bae      	bseti      	r3, 14
+    339e:	b261      	st.w      	r3, (r2, 0x4)
+}
+    33a0:	783c      	jmp      	r15
+    33a2:	0000      	bkpt
+    33a4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+000033a8 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    33a8:	1063      	lrw      	r3, 0x20000010	// 33b4 <WWDT_CNT_Load+0xc>
+    33aa:	9360      	ld.w      	r3, (r3, 0x0)
+    33ac:	9340      	ld.w      	r2, (r3, 0x0)
+    33ae:	6c08      	or      	r0, r2
+    33b0:	b300      	st.w      	r0, (r3, 0x0)
+}
+    33b2:	783c      	jmp      	r15
+    33b4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+000033b8 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    33b8:	3300      	movi      	r3, 0
+    33ba:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    33bc:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    33be:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    33c0:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    33c2:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    33c4:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    33c6:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    33c8:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    33ca:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    33cc:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    33ce:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    33d0:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    33d2:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000033d4 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    33d4:	9060      	ld.w      	r3, (r0, 0x0)
+    33d6:	3ba0      	bseti      	r3, 0
+    33d8:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33da:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000033dc <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    33dc:	9060      	ld.w      	r3, (r0, 0x0)
+    33de:	3bac      	bseti      	r3, 12
+    33e0:	3bae      	bseti      	r3, 14
+    33e2:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33e4:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000033e6 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    33e6:	14c3      	push      	r4-r6
+    33e8:	98a4      	ld.w      	r5, (r14, 0x10)
+    33ea:	6d97      	mov      	r6, r5
+    33ec:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    33ee:	6d18      	or      	r4, r6
+    33f0:	6cd0      	or      	r3, r4
+    33f2:	90a1      	ld.w      	r5, (r0, 0x4)
+    33f4:	6c4c      	or      	r1, r3
+    33f6:	6c54      	or      	r1, r5
+    33f8:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    33fa:	b042      	st.w      	r2, (r0, 0x8)
+}
+    33fc:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000033fe <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    33fe:	14c4      	push      	r4-r7
+    3400:	1421      	subi      	r14, r14, 4
+    3402:	9885      	ld.w      	r4, (r14, 0x14)
+    3404:	6dd3      	mov      	r7, r4
+    3406:	9886      	ld.w      	r4, (r14, 0x18)
+    3408:	b880      	st.w      	r4, (r14, 0x0)
+    340a:	9887      	ld.w      	r4, (r14, 0x1c)
+    340c:	6d93      	mov      	r6, r4
+    340e:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    3410:	6d58      	or      	r5, r6
+    3412:	98c0      	ld.w      	r6, (r14, 0x0)
+    3414:	6d58      	or      	r5, r6
+    3416:	6d5c      	or      	r5, r7
+    3418:	6cd4      	or      	r3, r5
+    341a:	6c8c      	or      	r2, r3
+    341c:	9081      	ld.w      	r4, (r0, 0x4)
+    341e:	6c48      	or      	r1, r2
+    3420:	6d04      	or      	r4, r1
+    3422:	6d9f      	mov      	r6, r7
+    3424:	b081      	st.w      	r4, (r0, 0x4)
+}
+    3426:	1401      	addi      	r14, r14, 4
+    3428:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+0000342a <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    342a:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    342c:	b044      	st.w      	r2, (r0, 0x10)
+}
+    342e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00003430 <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    3430:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3432:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    3434:	0c04      	bf      	0x343c	// 343c <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3436:	6c8c      	or      	r2, r3
+    3438:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    343a:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    343c:	68c9      	andn      	r3, r2
+    343e:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    3440:	07fd      	br      	0x343a	// 343a <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00003444 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    3444:	3380      	movi      	r3, 128
+    3446:	4376      	lsli      	r3, r3, 22
+    3448:	1042      	lrw      	r2, 0xe000e100	// 3450 <BT1_INT_ENABLE+0xc>
+    344a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    344c:	783c      	jmp      	r15
+    344e:	0000      	bkpt
+    3450:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00003454 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    3454:	3840      	cmpnei      	r0, 0
+    3456:	080a      	bt      	0x346a	// 346a <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    3458:	1165      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    345a:	31f0      	movi      	r1, 240
+    345c:	9340      	ld.w      	r2, (r3, 0x0)
+    345e:	9260      	ld.w      	r3, (r2, 0x0)
+    3460:	68c5      	andn      	r3, r1
+    3462:	3ba4      	bseti      	r3, 4
+    3464:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    3466:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    3468:	040b      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    346a:	3841      	cmpnei      	r0, 1
+    346c:	080a      	bt      	0x3480	// 3480 <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    346e:	1161      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3470:	31f0      	movi      	r1, 240
+    3472:	9340      	ld.w      	r2, (r3, 0x0)
+    3474:	9261      	ld.w      	r3, (r2, 0x4)
+    3476:	68c5      	andn      	r3, r1
+    3478:	3ba4      	bseti      	r3, 4
+    347a:	3ba6      	bseti      	r3, 6
+    347c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    347e:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    3480:	3842      	cmpnei      	r0, 2
+    3482:	080b      	bt      	0x3498	// 3498 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    3484:	107b      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3486:	32f0      	movi      	r2, 240
+    3488:	9320      	ld.w      	r1, (r3, 0x0)
+    348a:	9161      	ld.w      	r3, (r1, 0x4)
+    348c:	4244      	lsli      	r2, r2, 4
+    348e:	68c9      	andn      	r3, r2
+    3490:	3ba9      	bseti      	r3, 9
+    3492:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    3494:	b161      	st.w      	r3, (r1, 0x4)
+    3496:	07f4      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    3498:	3843      	cmpnei      	r0, 3
+    349a:	080b      	bt      	0x34b0	// 34b0 <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    349c:	1075      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    349e:	32f0      	movi      	r2, 240
+    34a0:	9320      	ld.w      	r1, (r3, 0x0)
+    34a2:	4244      	lsli      	r2, r2, 4
+    34a4:	9161      	ld.w      	r3, (r1, 0x4)
+    34a6:	68c9      	andn      	r3, r2
+    34a8:	32e0      	movi      	r2, 224
+    34aa:	4243      	lsli      	r2, r2, 3
+    34ac:	6cc8      	or      	r3, r2
+    34ae:	07f3      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    34b0:	3844      	cmpnei      	r0, 4
+    34b2:	080a      	bt      	0x34c6	// 34c6 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    34b4:	106f      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    34b6:	32f0      	movi      	r2, 240
+    34b8:	9320      	ld.w      	r1, (r3, 0x0)
+    34ba:	9161      	ld.w      	r3, (r1, 0x4)
+    34bc:	4248      	lsli      	r2, r2, 8
+    34be:	68c9      	andn      	r3, r2
+    34c0:	3bad      	bseti      	r3, 13
+    34c2:	3bae      	bseti      	r3, 14
+    34c4:	07e8      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    34c6:	3845      	cmpnei      	r0, 5
+    34c8:	0808      	bt      	0x34d8	// 34d8 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    34ca:	1069      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34cc:	310f      	movi      	r1, 15
+    34ce:	9340      	ld.w      	r2, (r3, 0x0)
+    34d0:	9260      	ld.w      	r3, (r2, 0x0)
+    34d2:	68c5      	andn      	r3, r1
+    34d4:	3ba2      	bseti      	r3, 2
+    34d6:	07c8      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    34d8:	3846      	cmpnei      	r0, 6
+    34da:	0bd2      	bt      	0x347e	// 347e <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    34dc:	1064      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34de:	31f0      	movi      	r1, 240
+    34e0:	9340      	ld.w      	r2, (r3, 0x0)
+    34e2:	9260      	ld.w      	r3, (r2, 0x0)
+    34e4:	68c5      	andn      	r3, r1
+    34e6:	3ba5      	bseti      	r3, 5
+    34e8:	3ba6      	bseti      	r3, 6
+    34ea:	07be      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+    34ec:	20000048 	.long	0x20000048
+    34f0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000034f4 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    34f4:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    34f6:	6c48      	or      	r1, r2
+    34f8:	1083      	lrw      	r4, 0x20000024	// 3504 <GPT_Configure+0x10>
+    34fa:	6c04      	or      	r0, r1
+    34fc:	9480      	ld.w      	r4, (r4, 0x0)
+    34fe:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    3500:	b462      	st.w      	r3, (r4, 0x8)
+}
+    3502:	1481      	pop      	r4
+    3504:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00003508 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    3508:	14c4      	push      	r4-r7
+    350a:	1423      	subi      	r14, r14, 12
+    350c:	9887      	ld.w      	r4, (r14, 0x1c)
+    350e:	6dd3      	mov      	r7, r4
+    3510:	9888      	ld.w      	r4, (r14, 0x20)
+    3512:	b880      	st.w      	r4, (r14, 0x0)
+    3514:	9889      	ld.w      	r4, (r14, 0x24)
+    3516:	b881      	st.w      	r4, (r14, 0x4)
+    3518:	988a      	ld.w      	r4, (r14, 0x28)
+    351a:	b882      	st.w      	r4, (r14, 0x8)
+    351c:	988b      	ld.w      	r4, (r14, 0x2c)
+    351e:	6d93      	mov      	r6, r4
+    3520:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    3522:	3cb2      	bseti      	r4, 18
+    3524:	6d18      	or      	r4, r6
+    3526:	98c2      	ld.w      	r6, (r14, 0x8)
+    3528:	6d18      	or      	r4, r6
+    352a:	98c1      	ld.w      	r6, (r14, 0x4)
+    352c:	6d18      	or      	r4, r6
+    352e:	98c0      	ld.w      	r6, (r14, 0x0)
+    3530:	6d18      	or      	r4, r6
+    3532:	6d1c      	or      	r4, r7
+    3534:	6cd0      	or      	r3, r4
+    3536:	6c8c      	or      	r2, r3
+    3538:	6c48      	or      	r1, r2
+    353a:	10a4      	lrw      	r5, 0x20000024	// 3548 <GPT_WaveCtrl_Configure+0x40>
+    353c:	6c04      	or      	r0, r1
+    353e:	95a0      	ld.w      	r5, (r5, 0x0)
+    3540:	6d9f      	mov      	r6, r7
+    3542:	b503      	st.w      	r0, (r5, 0xc)
+}
+    3544:	1403      	addi      	r14, r14, 12
+    3546:	1484      	pop      	r4-r7
+    3548:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+0000354c <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    354c:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    354e:	6c8c      	or      	r2, r3
+    3550:	6c48      	or      	r1, r2
+    3552:	1083      	lrw      	r4, 0x20000024	// 355c <GPT_WaveLoad_Configure+0x10>
+    3554:	6c04      	or      	r0, r1
+    3556:	9480      	ld.w      	r4, (r4, 0x0)
+    3558:	b411      	st.w      	r0, (r4, 0x44)
+}
+    355a:	1481      	pop      	r4
+    355c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+00003560 <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    3560:	14c4      	push      	r4-r7
+    3562:	1425      	subi      	r14, r14, 20
+    3564:	1c09      	addi      	r4, r14, 36
+    3566:	8480      	ld.b      	r4, (r4, 0x0)
+    3568:	b880      	st.w      	r4, (r14, 0x0)
+    356a:	1c0a      	addi      	r4, r14, 40
+    356c:	8480      	ld.b      	r4, (r4, 0x0)
+    356e:	b881      	st.w      	r4, (r14, 0x4)
+    3570:	1c0b      	addi      	r4, r14, 44
+    3572:	8480      	ld.b      	r4, (r4, 0x0)
+    3574:	b882      	st.w      	r4, (r14, 0x8)
+    3576:	1c0c      	addi      	r4, r14, 48
+    3578:	8480      	ld.b      	r4, (r4, 0x0)
+    357a:	b883      	st.w      	r4, (r14, 0xc)
+    357c:	1c0d      	addi      	r4, r14, 52
+    357e:	8480      	ld.b      	r4, (r4, 0x0)
+    3580:	1e10      	addi      	r6, r14, 64
+    3582:	b884      	st.w      	r4, (r14, 0x10)
+    3584:	1d0f      	addi      	r5, r14, 60
+    3586:	1c0e      	addi      	r4, r14, 56
+    3588:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    358a:	3840      	cmpnei      	r0, 0
+{
+    358c:	1e11      	addi      	r6, r14, 68
+    358e:	8480      	ld.b      	r4, (r4, 0x0)
+    3590:	85a0      	ld.b      	r5, (r5, 0x0)
+    3592:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    3594:	081f      	bt      	0x35d2	// 35d2 <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    3596:	47f0      	lsli      	r7, r7, 16
+    3598:	46d2      	lsli      	r6, r6, 18
+    359a:	45ae      	lsli      	r5, r5, 14
+    359c:	6dd8      	or      	r7, r6
+    359e:	6dd4      	or      	r7, r5
+    35a0:	448c      	lsli      	r4, r4, 12
+    35a2:	6dd0      	or      	r7, r4
+    35a4:	9884      	ld.w      	r4, (r14, 0x10)
+    35a6:	448a      	lsli      	r4, r4, 10
+    35a8:	6dd0      	or      	r7, r4
+    35aa:	9883      	ld.w      	r4, (r14, 0xc)
+    35ac:	4488      	lsli      	r4, r4, 8
+    35ae:	98a2      	ld.w      	r5, (r14, 0x8)
+    35b0:	6d1c      	or      	r4, r7
+    35b2:	45e6      	lsli      	r7, r5, 6
+    35b4:	6d1c      	or      	r4, r7
+    35b6:	6c90      	or      	r2, r4
+    35b8:	6cc8      	or      	r3, r2
+    35ba:	9841      	ld.w      	r2, (r14, 0x4)
+    35bc:	4244      	lsli      	r2, r2, 4
+    35be:	6cc8      	or      	r3, r2
+    35c0:	6c4c      	or      	r1, r3
+    35c2:	9860      	ld.w      	r3, (r14, 0x0)
+    35c4:	4362      	lsli      	r3, r3, 2
+    35c6:	1013      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    35c8:	6c4c      	or      	r1, r3
+    35ca:	9000      	ld.w      	r0, (r0, 0x0)
+    35cc:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    35ce:	1405      	addi      	r14, r14, 20
+    35d0:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    35d2:	3841      	cmpnei      	r0, 1
+    35d4:	0bfd      	bt      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    35d6:	47f0      	lsli      	r7, r7, 16
+    35d8:	46d2      	lsli      	r6, r6, 18
+    35da:	45ae      	lsli      	r5, r5, 14
+    35dc:	6dd8      	or      	r7, r6
+    35de:	6dd4      	or      	r7, r5
+    35e0:	448c      	lsli      	r4, r4, 12
+    35e2:	6dd0      	or      	r7, r4
+    35e4:	9884      	ld.w      	r4, (r14, 0x10)
+    35e6:	448a      	lsli      	r4, r4, 10
+    35e8:	6dd0      	or      	r7, r4
+    35ea:	9883      	ld.w      	r4, (r14, 0xc)
+    35ec:	4488      	lsli      	r4, r4, 8
+    35ee:	98a2      	ld.w      	r5, (r14, 0x8)
+    35f0:	6d1c      	or      	r4, r7
+    35f2:	45e6      	lsli      	r7, r5, 6
+    35f4:	6d1c      	or      	r4, r7
+    35f6:	6c90      	or      	r2, r4
+    35f8:	6cc8      	or      	r3, r2
+    35fa:	9841      	ld.w      	r2, (r14, 0x4)
+    35fc:	4244      	lsli      	r2, r2, 4
+    35fe:	6cc8      	or      	r3, r2
+    3600:	6c4c      	or      	r1, r3
+    3602:	9860      	ld.w      	r3, (r14, 0x0)
+    3604:	4362      	lsli      	r3, r3, 2
+    3606:	1003      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    3608:	6c4c      	or      	r1, r3
+    360a:	9000      	ld.w      	r0, (r0, 0x0)
+    360c:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    360e:	07e0      	br      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+    3610:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00003614 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    3614:	1063      	lrw      	r3, 0x20000024	// 3620 <GPT_Start+0xc>
+    3616:	9340      	ld.w      	r2, (r3, 0x0)
+    3618:	9261      	ld.w      	r3, (r2, 0x4)
+    361a:	3ba0      	bseti      	r3, 0
+    361c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    361e:	783c      	jmp      	r15
+    3620:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00003624 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    3624:	1063      	lrw      	r3, 0x20000024	// 3630 <GPT_Period_CMP_Write+0xc>
+    3626:	9360      	ld.w      	r3, (r3, 0x0)
+    3628:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    362a:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    362c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    362e:	783c      	jmp      	r15
+    3630:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00003634 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    3634:	1066      	lrw      	r3, 0x20000024	// 364c <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    3636:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3638:	9360      	ld.w      	r3, (r3, 0x0)
+    363a:	237f      	addi      	r3, 128
+    363c:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    363e:	0c04      	bf      	0x3646	// 3646 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3640:	6c48      	or      	r1, r2
+    3642:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    3644:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    3646:	6885      	andn      	r2, r1
+    3648:	b356      	st.w      	r2, (r3, 0x58)
+}
+    364a:	07fd      	br      	0x3644	// 3644 <GPT_ConfigInterrupt_CMD+0x10>
+    364c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+00003650 <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    3650:	1065      	lrw      	r3, 0x20000040	// 3664 <UART0_DeInit+0x14>
+    3652:	3200      	movi      	r2, 0
+    3654:	9360      	ld.w      	r3, (r3, 0x0)
+    3656:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    3658:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    365a:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    365c:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    365e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3660:	783c      	jmp      	r15
+    3662:	0000      	bkpt
+    3664:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00003668 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    3668:	1065      	lrw      	r3, 0x2000003c	// 367c <UART1_DeInit+0x14>
+    366a:	3200      	movi      	r2, 0
+    366c:	9360      	ld.w      	r3, (r3, 0x0)
+    366e:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    3670:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    3672:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    3674:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    3676:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3678:	783c      	jmp      	r15
+    367a:	0000      	bkpt
+    367c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+00003680 <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    3680:	1065      	lrw      	r3, 0x20000038	// 3694 <UART2_DeInit+0x14>
+    3682:	3200      	movi      	r2, 0
+    3684:	9360      	ld.w      	r3, (r3, 0x0)
+    3686:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    3688:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    368a:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    368c:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    368e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3690:	783c      	jmp      	r15
+    3692:	0000      	bkpt
+    3694:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+00003698 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    3698:	1065      	lrw      	r3, 0x20000040	// 36ac <UART0_Int_Enable+0x14>
+    369a:	320f      	movi      	r2, 15
+    369c:	9360      	ld.w      	r3, (r3, 0x0)
+    369e:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36a0:	3380      	movi      	r3, 128
+    36a2:	4366      	lsli      	r3, r3, 6
+    36a4:	1043      	lrw      	r2, 0xe000e100	// 36b0 <UART0_Int_Enable+0x18>
+    36a6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36a8:	783c      	jmp      	r15
+    36aa:	0000      	bkpt
+    36ac:	20000040 	.long	0x20000040
+    36b0:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000036b4 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    36b4:	1065      	lrw      	r3, 0x20000038	// 36c8 <UART2_Int_Enable+0x14>
+    36b6:	320f      	movi      	r2, 15
+    36b8:	9360      	ld.w      	r3, (r3, 0x0)
+    36ba:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36bc:	3380      	movi      	r3, 128
+    36be:	4368      	lsli      	r3, r3, 8
+    36c0:	1043      	lrw      	r2, 0xe000e100	// 36cc <UART2_Int_Enable+0x18>
+    36c2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36c4:	783c      	jmp      	r15
+    36c6:	0000      	bkpt
+    36c8:	20000038 	.long	0x20000038
+    36cc:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+000036d0 <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    36d0:	3840      	cmpnei      	r0, 0
+    36d2:	0821      	bt      	0x3714	// 3714 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    36d4:	3940      	cmpnei      	r1, 0
+    36d6:	080a      	bt      	0x36ea	// 36ea <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    36d8:	1177      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36da:	31ff      	movi      	r1, 255
+    36dc:	9340      	ld.w      	r2, (r3, 0x0)
+    36de:	9260      	ld.w      	r3, (r2, 0x0)
+    36e0:	68c5      	andn      	r3, r1
+    36e2:	3ba2      	bseti      	r3, 2
+    36e4:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    36e6:	b260      	st.w      	r3, (r2, 0x0)
+    36e8:	0415      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    36ea:	3941      	cmpnei      	r1, 1
+    36ec:	0813      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    36ee:	1172      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36f0:	31f0      	movi      	r1, 240
+    36f2:	9340      	ld.w      	r2, (r3, 0x0)
+    36f4:	9260      	ld.w      	r3, (r2, 0x0)
+    36f6:	4130      	lsli      	r1, r1, 16
+    36f8:	68c5      	andn      	r3, r1
+    36fa:	31e0      	movi      	r1, 224
+    36fc:	412f      	lsli      	r1, r1, 15
+    36fe:	6cc4      	or      	r3, r1
+    3700:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    3702:	31f0      	movi      	r1, 240
+    3704:	9261      	ld.w      	r3, (r2, 0x4)
+    3706:	412c      	lsli      	r1, r1, 12
+    3708:	68c5      	andn      	r3, r1
+    370a:	31e0      	movi      	r1, 224
+    370c:	412b      	lsli      	r1, r1, 11
+    370e:	6cc4      	or      	r3, r1
+    3710:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    3712:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    3714:	3841      	cmpnei      	r0, 1
+    3716:	082d      	bt      	0x3770	// 3770 <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    3718:	3940      	cmpnei      	r1, 0
+    371a:	0814      	bt      	0x3742	// 3742 <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    371c:	1167      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    371e:	310f      	movi      	r1, 15
+    3720:	9340      	ld.w      	r2, (r3, 0x0)
+    3722:	9260      	ld.w      	r3, (r2, 0x0)
+    3724:	68c5      	andn      	r3, r1
+    3726:	3107      	movi      	r1, 7
+    3728:	6cc4      	or      	r3, r1
+    372a:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    372c:	32f0      	movi      	r2, 240
+    372e:	1162      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3730:	4250      	lsli      	r2, r2, 16
+    3732:	9320      	ld.w      	r1, (r3, 0x0)
+    3734:	9161      	ld.w      	r3, (r1, 0x4)
+    3736:	68c9      	andn      	r3, r2
+    3738:	32e0      	movi      	r2, 224
+    373a:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    373c:	6cc8      	or      	r3, r2
+    373e:	b161      	st.w      	r3, (r1, 0x4)
+    3740:	07e9      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    3742:	3941      	cmpnei      	r1, 1
+    3744:	080c      	bt      	0x375c	// 375c <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    3746:	107c      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3748:	32ff      	movi      	r2, 255
+    374a:	9320      	ld.w      	r1, (r3, 0x0)
+    374c:	424c      	lsli      	r2, r2, 12
+    374e:	9160      	ld.w      	r3, (r1, 0x0)
+    3750:	68c9      	andn      	r3, r2
+    3752:	32ee      	movi      	r2, 238
+    3754:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    3756:	6cc8      	or      	r3, r2
+    3758:	b160      	st.w      	r3, (r1, 0x0)
+}
+    375a:	07dc      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    375c:	3942      	cmpnei      	r1, 2
+    375e:	0bda      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    3760:	1075      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3762:	32ee      	movi      	r2, 238
+    3764:	9320      	ld.w      	r1, (r3, 0x0)
+    3766:	9161      	ld.w      	r3, (r1, 0x4)
+    3768:	4368      	lsli      	r3, r3, 8
+    376a:	4b68      	lsri      	r3, r3, 8
+    376c:	4257      	lsli      	r2, r2, 23
+    376e:	07e7      	br      	0x373c	// 373c <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    3770:	3842      	cmpnei      	r0, 2
+    3772:	0bd0      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    3774:	3940      	cmpnei      	r1, 0
+    3776:	0809      	bt      	0x3788	// 3788 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    3778:	106f      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    377a:	31ff      	movi      	r1, 255
+    377c:	9340      	ld.w      	r2, (r3, 0x0)
+    377e:	9260      	ld.w      	r3, (r2, 0x0)
+    3780:	68c5      	andn      	r3, r1
+    3782:	3177      	movi      	r1, 119
+    3784:	6cc4      	or      	r3, r1
+    3786:	07b0      	br      	0x36e6	// 36e6 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    3788:	3941      	cmpnei      	r1, 1
+    378a:	0809      	bt      	0x379c	// 379c <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    378c:	106a      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    378e:	32ee      	movi      	r2, 238
+    3790:	9320      	ld.w      	r1, (r3, 0x0)
+    3792:	9160      	ld.w      	r3, (r1, 0x0)
+    3794:	4368      	lsli      	r3, r3, 8
+    3796:	4b68      	lsri      	r3, r3, 8
+    3798:	4257      	lsli      	r2, r2, 23
+    379a:	07de      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    379c:	3942      	cmpnei      	r1, 2
+    379e:	0bba      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    37a0:	1066      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    37a2:	32ff      	movi      	r2, 255
+    37a4:	9320      	ld.w      	r1, (r3, 0x0)
+    37a6:	4250      	lsli      	r2, r2, 16
+    37a8:	9160      	ld.w      	r3, (r1, 0x0)
+    37aa:	68c9      	andn      	r3, r2
+    37ac:	32cc      	movi      	r2, 204
+    37ae:	424f      	lsli      	r2, r2, 15
+    37b0:	07d3      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+    37b2:	0000      	bkpt
+    37b4:	2000004c 	.long	0x2000004c
+    37b8:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000037bc <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    37bc:	1063      	lrw      	r3, 0x80003	// 37c8 <UARTInit+0xc>
+    37be:	6c8c      	or      	r2, r3
+    37c0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37c2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37c4:	783c      	jmp      	r15
+    37c6:	0000      	bkpt
+    37c8:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+000037cc <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    37cc:	1063      	lrw      	r3, 0x8000f	// 37d8 <UARTInitRxTxIntEn+0xc>
+    37ce:	6c8c      	or      	r2, r3
+    37d0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37d2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37d4:	783c      	jmp      	r15
+    37d6:	0000      	bkpt
+    37d8:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+000037dc <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    37dc:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37de:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    37e0:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37e2:	5b85      	subu      	r4, r3, r1
+    37e4:	6490      	cmphs      	r4, r2
+    37e6:	0c02      	bf      	0x37ea	// 37ea <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    37e8:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    37ea:	8380      	ld.b      	r4, (r3, 0x0)
+    37ec:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    37ee:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    37f0:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    37f2:	3c40      	cmpnei      	r4, 0
+    37f4:	0bfd      	bt      	0x37ee	// 37ee <UARTTransmit+0x12>
+    37f6:	2300      	addi      	r3, 1
+    37f8:	07f5      	br      	0x37e2	// 37e2 <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000037fc <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    37fc:	1068      	lrw      	r3, 0x20000020	// 381c <EPT_Stop+0x20>
+    37fe:	3280      	movi      	r2, 128
+    3800:	9360      	ld.w      	r3, (r3, 0x0)
+    3802:	608c      	addu      	r2, r3
+    3804:	1027      	lrw      	r1, 0xa55ac73a	// 3820 <EPT_Stop+0x24>
+    3806:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    3808:	9341      	ld.w      	r2, (r3, 0x4)
+    380a:	31fe      	movi      	r1, 254
+    380c:	6884      	and      	r2, r1
+    380e:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    3810:	3101      	movi      	r1, 1
+    3812:	9341      	ld.w      	r2, (r3, 0x4)
+    3814:	6884      	and      	r2, r1
+    3816:	3a40      	cmpnei      	r2, 0
+    3818:	0bfd      	bt      	0x3812	// 3812 <EPT_Stop+0x16>
+}
+    381a:	783c      	jmp      	r15
+    381c:	20000020 	.long	0x20000020
+    3820:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00003824 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    3824:	14d1      	push      	r4, r15
+	
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3826:	1099      	lrw      	r4, 0x20000048	// 3888 <main+0x64>
+    3828:	3201      	movi      	r2, 1
+    382a:	9400      	ld.w      	r0, (r4, 0x0)
+    382c:	3102      	movi      	r1, 2
+    382e:	e3fffd0f 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    3832:	9400      	ld.w      	r0, (r4, 0x0)
+    3834:	3102      	movi      	r1, 2
+    3836:	e3fffd7b 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    383a:	3102      	movi      	r1, 2
+    383c:	9400      	ld.w      	r0, (r4, 0x0)
+    383e:	e3fffd9b 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    3842:	1093      	lrw      	r4, 0x200000a0	// 388c <main+0x68>
+	last_state = rf_exist;
+    3844:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3846:	a400      	st.b      	r0, (r4, 0x0)
+	APT32F102_init();							//102 initial
+    3848:	e00000e8 	bsr      	0x3a18	// 3a18 <APT32F102_init>
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    384c:	1031      	lrw      	r1, 0x5f2c	// 3890 <main+0x6c>
+    384e:	3000      	movi      	r0, 0
+    3850:	e00006b8 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    3854:	e3fffc6a 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+
+		//UART2_TASK();
+		Detect_WIFI_Task();
+    3858:	e0000bd6 	bsr      	0x5004	// 5004 <Detect_WIFI_Task>
+		
+//		Detect_SPI_task();
+		
+		BackLight_Task();
+    385c:	e0000bba 	bsr      	0x4fd0	// 4fd0 <BackLight_Task>
+		
+		if (finish_flag == 1) {
+    3860:	8462      	ld.b      	r3, (r4, 0x2)
+    3862:	3b41      	cmpnei      	r3, 1
+    3864:	0bf8      	bt      	0x3854	// 3854 <main+0x30>
+			Card_Read_TasK();
+    3866:	e00009c3 	bsr      	0x4bec	// 4bec <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    386a:	8460      	ld.b      	r3, (r4, 0x0)
+    386c:	3b41      	cmpnei      	r3, 1
+    386e:	0806      	bt      	0x387a	// 387a <main+0x56>
+			{
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    3870:	e0000b4c 	bsr      	0x4f08	// 4f08 <LogicCtrl_NoRF_Task>
+				DM_Led_Task();
+    3874:	e0000c12 	bsr      	0x5098	// 5098 <DM_Led_Task>
+    3878:	07ee      	br      	0x3854	// 3854 <main+0x30>
+			}
+			else if(rf_exist == 0x00)
+    387a:	3b40      	cmpnei      	r3, 0
+    387c:	0bec      	bt      	0x3854	// 3854 <main+0x30>
+			{
+				Debounce_Task();
+    387e:	e0000a93 	bsr      	0x4da4	// 4da4 <Debounce_Task>
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    3882:	e0000ac5 	bsr      	0x4e0c	// 4e0c <LogicCtrl_Task>
+    3886:	07e7      	br      	0x3854	// 3854 <main+0x30>
+    3888:	20000048 	.long	0x20000048
+    388c:	200000a0 	.long	0x200000a0
+    3890:	00005f2c 	.long	0x00005f2c
+
+Disassembly of section .text.delay_nms:
+
+00003894 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    3894:	14d0      	push      	r15
+    3896:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    3898:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    389a:	3300      	movi      	r3, 0
+    j = 50* t;
+    389c:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    389e:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    38a0:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    38a2:	b860      	st.w      	r3, (r14, 0x0)
+    38a4:	9840      	ld.w      	r2, (r14, 0x0)
+    38a6:	9861      	ld.w      	r3, (r14, 0x4)
+    38a8:	64c8      	cmphs      	r2, r3
+    38aa:	0c03      	bf      	0x38b0	// 38b0 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    38ac:	1403      	addi      	r14, r14, 12
+    38ae:	1490      	pop      	r15
+        k++;
+    38b0:	9862      	ld.w      	r3, (r14, 0x8)
+    38b2:	2300      	addi      	r3, 1
+    38b4:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    38b6:	e3fffc39 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    38ba:	9860      	ld.w      	r3, (r14, 0x0)
+    38bc:	2300      	addi      	r3, 1
+    38be:	07f2      	br      	0x38a2	// 38a2 <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000038c0 <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    38c0:	14d0      	push      	r15
+    38c2:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    38c4:	3000      	movi      	r0, 0
+    38c6:	e3fffdc7 	bsr      	0x3454	// 3454 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    38ca:	3300      	movi      	r3, 0
+    38cc:	3240      	movi      	r2, 64
+    38ce:	3100      	movi      	r1, 0
+    38d0:	3001      	movi      	r0, 1
+    38d2:	e3fffe11 	bsr      	0x34f4	// 34f4 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    38d6:	3300      	movi      	r3, 0
+    38d8:	b865      	st.w      	r3, (r14, 0x14)
+    38da:	b864      	st.w      	r3, (r14, 0x10)
+    38dc:	b863      	st.w      	r3, (r14, 0xc)
+    38de:	b862      	st.w      	r3, (r14, 0x8)
+    38e0:	b861      	st.w      	r3, (r14, 0x4)
+    38e2:	b860      	st.w      	r3, (r14, 0x0)
+    38e4:	3208      	movi      	r2, 8
+    38e6:	3100      	movi      	r1, 0
+    38e8:	3000      	movi      	r0, 0
+    38ea:	e3fffe0f 	bsr      	0x3508	// 3508 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    38ee:	1079      	lrw      	r3, 0x200000a0	// 3950 <GPT0_CONFIG+0x90>
+    38f0:	8360      	ld.b      	r3, (r3, 0x0)
+    38f2:	3b41      	cmpnei      	r3, 1
+    38f4:	0827      	bt      	0x3942	// 3942 <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    38f6:	31fa      	movi      	r1, 250
+    38f8:	4123      	lsli      	r1, r1, 3
+    38fa:	3200      	movi      	r2, 0
+    38fc:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    38fe:	e3fffe93 	bsr      	0x3624	// 3624 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    3902:	3320      	movi      	r3, 32
+    3904:	3204      	movi      	r2, 4
+    3906:	3100      	movi      	r1, 0
+    3908:	3001      	movi      	r0, 1
+    390a:	e3fffe21 	bsr      	0x354c	// 354c <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    390e:	3300      	movi      	r3, 0
+    3910:	3201      	movi      	r2, 1
+    3912:	b868      	st.w      	r3, (r14, 0x20)
+    3914:	b867      	st.w      	r3, (r14, 0x1c)
+    3916:	b866      	st.w      	r3, (r14, 0x18)
+    3918:	b865      	st.w      	r3, (r14, 0x14)
+    391a:	b864      	st.w      	r3, (r14, 0x10)
+    391c:	b863      	st.w      	r3, (r14, 0xc)
+    391e:	b842      	st.w      	r2, (r14, 0x8)
+    3920:	b841      	st.w      	r2, (r14, 0x4)
+    3922:	b860      	st.w      	r3, (r14, 0x0)
+    3924:	3200      	movi      	r2, 0
+    3926:	3302      	movi      	r3, 2
+    3928:	3100      	movi      	r1, 0
+    392a:	3000      	movi      	r0, 0
+    392c:	e3fffe1a 	bsr      	0x3560	// 3560 <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    3930:	e3fffe72 	bsr      	0x3614	// 3614 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    3934:	3180      	movi      	r1, 128
+    3936:	4129      	lsli      	r1, r1, 9
+    3938:	3001      	movi      	r0, 1
+    393a:	e3fffe7d 	bsr      	0x3634	// 3634 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    393e:	1409      	addi      	r14, r14, 36
+    3940:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    3942:	3b40      	cmpnei      	r3, 0
+    3944:	0bdf      	bt      	0x3902	// 3902 <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    3946:	30fa      	movi      	r0, 250
+    3948:	3200      	movi      	r2, 0
+    394a:	3100      	movi      	r1, 0
+    394c:	4003      	lsli      	r0, r0, 3
+    394e:	07d8      	br      	0x38fe	// 38fe <GPT0_CONFIG+0x3e>
+    3950:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.BT_CONFIG:
+
+00003954 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    3954:	14d2      	push      	r4-r5, r15
+    3956:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    3958:	1095      	lrw      	r4, 0x20000008	// 39ac <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    395a:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    395c:	9400      	ld.w      	r0, (r4, 0x0)
+    395e:	e3fffd2d 	bsr      	0x33b8	// 33b8 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    3962:	9400      	ld.w      	r0, (r4, 0x0)
+    3964:	b8a1      	st.w      	r5, (r14, 0x4)
+    3966:	b8a0      	st.w      	r5, (r14, 0x0)
+    3968:	3308      	movi      	r3, 8
+    396a:	3200      	movi      	r2, 0
+    396c:	3101      	movi      	r1, 1
+    396e:	e3fffd3c 	bsr      	0x33e6	// 33e6 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    3972:	3380      	movi      	r3, 128
+    3974:	4363      	lsli      	r3, r3, 3
+    3976:	b861      	st.w      	r3, (r14, 0x4)
+    3978:	9400      	ld.w      	r0, (r4, 0x0)
+    397a:	3300      	movi      	r3, 0
+    397c:	b8a3      	st.w      	r5, (r14, 0xc)
+    397e:	b8a2      	st.w      	r5, (r14, 0x8)
+    3980:	b8a0      	st.w      	r5, (r14, 0x0)
+    3982:	3200      	movi      	r2, 0
+    3984:	3180      	movi      	r1, 128
+    3986:	e3fffd3c 	bsr      	0x33fe	// 33fe <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    398a:	3201      	movi      	r2, 1
+    398c:	1029      	lrw      	r1, 0x12ac	// 39b0 <BT_CONFIG+0x5c>
+    398e:	9400      	ld.w      	r0, (r4, 0x0)
+    3990:	e3fffd4d 	bsr      	0x342a	// 342a <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    3994:	9400      	ld.w      	r0, (r4, 0x0)
+    3996:	e3fffd1f 	bsr      	0x33d4	// 33d4 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    399a:	9400      	ld.w      	r0, (r4, 0x0)
+    399c:	3202      	movi      	r2, 2
+    399e:	3101      	movi      	r1, 1
+    39a0:	e3fffd48 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    39a4:	e3fffd50 	bsr      	0x3444	// 3444 <BT1_INT_ENABLE>
+	
+}
+    39a8:	1404      	addi      	r14, r14, 16
+    39aa:	1492      	pop      	r4-r5, r15
+    39ac:	20000008 	.long	0x20000008
+    39b0:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000039b4 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    39b4:	14d0      	push      	r15
+    39b6:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    39b8:	e3fffb04 	bsr      	0x2fc0	// 2fc0 <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    39bc:	3101      	movi      	r1, 1
+    39be:	3001      	movi      	r0, 1
+    39c0:	e3fffb26 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    39c4:	3000      	movi      	r0, 0
+    39c6:	e3fffb7f 	bsr      	0x30c4	// 30c4 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    39ca:	3180      	movi      	r1, 128
+    39cc:	3308      	movi      	r3, 8
+    39ce:	3200      	movi      	r2, 0
+    39d0:	4121      	lsli      	r1, r1, 1
+    39d2:	3002      	movi      	r0, 2
+    39d4:	e3fffb34 	bsr      	0x303c	// 303c <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    39d8:	3080      	movi      	r0, 128
+    39da:	3118      	movi      	r1, 24
+    39dc:	4002      	lsli      	r0, r0, 2
+    39de:	e3fffbaf 	bsr      	0x313c	// 313c <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    39e2:	3001      	movi      	r0, 1
+    39e4:	e3fffb84 	bsr      	0x30ec	// 30ec <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    39e8:	e3fffba0 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    39ec:	e3fffbd2 	bsr      	0x3190	// 3190 <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    39f0:	3340      	movi      	r3, 64
+    39f2:	b860      	st.w      	r3, (r14, 0x0)
+    39f4:	31c0      	movi      	r1, 192
+    39f6:	3380      	movi      	r3, 128
+    39f8:	4364      	lsli      	r3, r3, 4
+    39fa:	3200      	movi      	r2, 0
+    39fc:	4123      	lsli      	r1, r1, 3
+    39fe:	3000      	movi      	r0, 0
+    3a00:	e3fffbaa 	bsr      	0x3154	// 3154 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    3a04:	e3fffbb8 	bsr      	0x3174	// 3174 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    3a08:	e3fffbf2 	bsr      	0x31ec	// 31ec <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    3a0c:	3000      	movi      	r0, 0
+    3a0e:	e0000f7b 	bsr      	0x5904	// 5904 <std_clk_calib>
+	
+}
+    3a12:	1401      	addi      	r14, r14, 4
+    3a14:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00003a18 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    3a18:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a1a:	1072      	lrw      	r3, 0x2000005c	// 3a60 <APT32F102_init+0x48>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a1c:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a1e:	9340      	ld.w      	r2, (r3, 0x0)
+    3a20:	1071      	lrw      	r3, 0xfffffff	// 3a64 <APT32F102_init+0x4c>
+    3a22:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    3a24:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a26:	926c      	ld.w      	r3, (r2, 0x30)
+    3a28:	68c4      	and      	r3, r1
+    3a2a:	3b40      	cmpnei      	r3, 0
+    3a2c:	0ffd      	bf      	0x3a26	// 3a26 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    3a2e:	e3ffffc3 	bsr      	0x39b4	// 39b4 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    3a32:	e0000525 	bsr      	0x447c	// 447c <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    3a36:	e3fffbe1 	bsr      	0x31f8	// 31f8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    3a3a:	3101      	movi      	r1, 1
+    3a3c:	300f      	movi      	r0, 15
+    3a3e:	e3fffbef 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//	Set_INT_Priority(SIO_IRQ,1);				//SIO优先级最高
+//	
+	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+    3a42:	3102      	movi      	r1, 2
+    3a44:	3019      	movi      	r0, 25
+    3a46:	e3fffbeb 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    3a4a:	e3ffff85 	bsr      	0x3954	// 3954 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    3a4e:	e3ffff39 	bsr      	0x38c0	// 38c0 <GPT0_CONFIG>
+	
+	UARTx_Init(UART_1,NULL);
+    3a52:	3100      	movi      	r1, 0
+    3a54:	3001      	movi      	r0, 1
+    3a56:	e0000517 	bsr      	0x4484	// 4484 <UARTx_Init>
+//	UARTx_Init(UART_2,NULL);
+	
+	RC522_Init();
+    3a5a:	e0000713 	bsr      	0x4880	// 4880 <RC522_Init>
+//	}
+//	else if(rf_exist == 0x00)  //带无线模块初始化
+//	{
+//		LogicCtrl_Init();     
+//	}
+}
+    3a5e:	1490      	pop      	r15
+    3a60:	2000005c 	.long	0x2000005c
+    3a64:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00003a68 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    3a68:	1460      	nie
+    3a6a:	1462      	ipush
+    // ISR content ...
+	nop;
+    3a6c:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    3a6e:	117a      	lrw      	r3, 0x2000005c	// 3b54 <SYSCONIntHandler+0xec>
+    3a70:	3280      	movi      	r2, 128
+    3a72:	9360      	ld.w      	r3, (r3, 0x0)
+    3a74:	60c8      	addu      	r3, r2
+    3a76:	9323      	ld.w      	r1, (r3, 0xc)
+    3a78:	3001      	movi      	r0, 1
+    3a7a:	6840      	and      	r1, r0
+    3a7c:	3940      	cmpnei      	r1, 0
+    3a7e:	0c04      	bf      	0x3a86	// 3a86 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    3a80:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    3a82:	1463      	ipop
+    3a84:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    3a86:	9323      	ld.w      	r1, (r3, 0xc)
+    3a88:	3002      	movi      	r0, 2
+    3a8a:	6840      	and      	r1, r0
+    3a8c:	3940      	cmpnei      	r1, 0
+    3a8e:	0bf9      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    3a90:	9323      	ld.w      	r1, (r3, 0xc)
+    3a92:	3008      	movi      	r0, 8
+    3a94:	6840      	and      	r1, r0
+    3a96:	3940      	cmpnei      	r1, 0
+    3a98:	0bf4      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    3a9a:	9323      	ld.w      	r1, (r3, 0xc)
+    3a9c:	3010      	movi      	r0, 16
+    3a9e:	6840      	and      	r1, r0
+    3aa0:	3940      	cmpnei      	r1, 0
+    3aa2:	0bef      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    3aa4:	9323      	ld.w      	r1, (r3, 0xc)
+    3aa6:	6848      	and      	r1, r2
+    3aa8:	3940      	cmpnei      	r1, 0
+    3aaa:	0c03      	bf      	0x3ab0	// 3ab0 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    3aac:	b341      	st.w      	r2, (r3, 0x4)
+}
+    3aae:	07ea      	br      	0x3a82	// 3a82 <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    3ab0:	3280      	movi      	r2, 128
+    3ab2:	9323      	ld.w      	r1, (r3, 0xc)
+    3ab4:	4241      	lsli      	r2, r2, 1
+    3ab6:	6848      	and      	r1, r2
+    3ab8:	3940      	cmpnei      	r1, 0
+    3aba:	0bf9      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    3abc:	3280      	movi      	r2, 128
+    3abe:	9323      	ld.w      	r1, (r3, 0xc)
+    3ac0:	4242      	lsli      	r2, r2, 2
+    3ac2:	6848      	and      	r1, r2
+    3ac4:	3940      	cmpnei      	r1, 0
+    3ac6:	0bf3      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    3ac8:	3280      	movi      	r2, 128
+    3aca:	9323      	ld.w      	r1, (r3, 0xc)
+    3acc:	4243      	lsli      	r2, r2, 3
+    3ace:	6848      	and      	r1, r2
+    3ad0:	3940      	cmpnei      	r1, 0
+    3ad2:	0bed      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    3ad4:	3280      	movi      	r2, 128
+    3ad6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ad8:	4244      	lsli      	r2, r2, 4
+    3ada:	6848      	and      	r1, r2
+    3adc:	3940      	cmpnei      	r1, 0
+    3ade:	0c03      	bf      	0x3ae4	// 3ae4 <SYSCONIntHandler+0x7c>
+		nop;
+    3ae0:	6c03      	mov      	r0, r0
+    3ae2:	07e5      	br      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    3ae4:	3280      	movi      	r2, 128
+    3ae6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ae8:	4245      	lsli      	r2, r2, 5
+    3aea:	6848      	and      	r1, r2
+    3aec:	3940      	cmpnei      	r1, 0
+    3aee:	0bdf      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    3af0:	3280      	movi      	r2, 128
+    3af2:	9323      	ld.w      	r1, (r3, 0xc)
+    3af4:	4246      	lsli      	r2, r2, 6
+    3af6:	6848      	and      	r1, r2
+    3af8:	3940      	cmpnei      	r1, 0
+    3afa:	0bd9      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    3afc:	3280      	movi      	r2, 128
+    3afe:	9323      	ld.w      	r1, (r3, 0xc)
+    3b00:	4247      	lsli      	r2, r2, 7
+    3b02:	6848      	and      	r1, r2
+    3b04:	3940      	cmpnei      	r1, 0
+    3b06:	0bd3      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    3b08:	3280      	movi      	r2, 128
+    3b0a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b0c:	424b      	lsli      	r2, r2, 11
+    3b0e:	6848      	and      	r1, r2
+    3b10:	3940      	cmpnei      	r1, 0
+    3b12:	0bcd      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    3b14:	3280      	movi      	r2, 128
+    3b16:	9323      	ld.w      	r1, (r3, 0xc)
+    3b18:	424c      	lsli      	r2, r2, 12
+    3b1a:	6848      	and      	r1, r2
+    3b1c:	3940      	cmpnei      	r1, 0
+    3b1e:	0bc7      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    3b20:	3280      	movi      	r2, 128
+    3b22:	9323      	ld.w      	r1, (r3, 0xc)
+    3b24:	424d      	lsli      	r2, r2, 13
+    3b26:	6848      	and      	r1, r2
+    3b28:	3940      	cmpnei      	r1, 0
+    3b2a:	0bc1      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    3b2c:	3280      	movi      	r2, 128
+    3b2e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b30:	424e      	lsli      	r2, r2, 14
+    3b32:	6848      	and      	r1, r2
+    3b34:	3940      	cmpnei      	r1, 0
+    3b36:	0bbb      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    3b38:	3280      	movi      	r2, 128
+    3b3a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b3c:	424f      	lsli      	r2, r2, 15
+    3b3e:	6848      	and      	r1, r2
+    3b40:	3940      	cmpnei      	r1, 0
+    3b42:	0bb5      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    3b44:	3280      	movi      	r2, 128
+    3b46:	9323      	ld.w      	r1, (r3, 0xc)
+    3b48:	4256      	lsli      	r2, r2, 22
+    3b4a:	6848      	and      	r1, r2
+    3b4c:	3940      	cmpnei      	r1, 0
+    3b4e:	0baf      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+    3b50:	0799      	br      	0x3a82	// 3a82 <SYSCONIntHandler+0x1a>
+    3b52:	0000      	bkpt
+    3b54:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00003b58 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    3b58:	1460      	nie
+    3b5a:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    3b5c:	1078      	lrw      	r3, 0x20000060	// 3bbc <IFCIntHandler+0x64>
+    3b5e:	3101      	movi      	r1, 1
+    3b60:	9360      	ld.w      	r3, (r3, 0x0)
+    3b62:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b64:	6884      	and      	r2, r1
+    3b66:	3a40      	cmpnei      	r2, 0
+    3b68:	0c04      	bf      	0x3b70	// 3b70 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    3b6a:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    3b6c:	1463      	ipop
+    3b6e:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    3b70:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b72:	3102      	movi      	r1, 2
+    3b74:	6884      	and      	r2, r1
+    3b76:	3a40      	cmpnei      	r2, 0
+    3b78:	0bf9      	bt      	0x3b6a	// 3b6a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    3b7a:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b7c:	3104      	movi      	r1, 4
+    3b7e:	6884      	and      	r2, r1
+    3b80:	3a40      	cmpnei      	r2, 0
+    3b82:	0bf4      	bt      	0x3b6a	// 3b6a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    3b84:	3280      	movi      	r2, 128
+    3b86:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b88:	4245      	lsli      	r2, r2, 5
+    3b8a:	6848      	and      	r1, r2
+    3b8c:	3940      	cmpnei      	r1, 0
+    3b8e:	0c03      	bf      	0x3b94	// 3b94 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    3b90:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    3b92:	07ed      	br      	0x3b6c	// 3b6c <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    3b94:	3280      	movi      	r2, 128
+    3b96:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b98:	4246      	lsli      	r2, r2, 6
+    3b9a:	6848      	and      	r1, r2
+    3b9c:	3940      	cmpnei      	r1, 0
+    3b9e:	0bf9      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    3ba0:	3280      	movi      	r2, 128
+    3ba2:	932b      	ld.w      	r1, (r3, 0x2c)
+    3ba4:	4247      	lsli      	r2, r2, 7
+    3ba6:	6848      	and      	r1, r2
+    3ba8:	3940      	cmpnei      	r1, 0
+    3baa:	0bf3      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    3bac:	3280      	movi      	r2, 128
+    3bae:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bb0:	4248      	lsli      	r2, r2, 8
+    3bb2:	6848      	and      	r1, r2
+    3bb4:	3940      	cmpnei      	r1, 0
+    3bb6:	0bed      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+    3bb8:	07da      	br      	0x3b6c	// 3b6c <IFCIntHandler+0x14>
+    3bba:	0000      	bkpt
+    3bbc:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00003bc0 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    3bc0:	1460      	nie
+    3bc2:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    3bc4:	1078      	lrw      	r3, 0x20000050	// 3c24 <ADCIntHandler+0x64>
+    3bc6:	3101      	movi      	r1, 1
+    3bc8:	9360      	ld.w      	r3, (r3, 0x0)
+    3bca:	9348      	ld.w      	r2, (r3, 0x20)
+    3bcc:	6884      	and      	r2, r1
+    3bce:	3a40      	cmpnei      	r2, 0
+    3bd0:	0c04      	bf      	0x3bd8	// 3bd8 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    3bd2:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    3bd4:	1463      	ipop
+    3bd6:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    3bd8:	9348      	ld.w      	r2, (r3, 0x20)
+    3bda:	3102      	movi      	r1, 2
+    3bdc:	6884      	and      	r2, r1
+    3bde:	3a40      	cmpnei      	r2, 0
+    3be0:	0bf9      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    3be2:	9348      	ld.w      	r2, (r3, 0x20)
+    3be4:	3104      	movi      	r1, 4
+    3be6:	6884      	and      	r2, r1
+    3be8:	3a40      	cmpnei      	r2, 0
+    3bea:	0bf4      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    3bec:	9348      	ld.w      	r2, (r3, 0x20)
+    3bee:	3110      	movi      	r1, 16
+    3bf0:	6884      	and      	r2, r1
+    3bf2:	3a40      	cmpnei      	r2, 0
+    3bf4:	0bef      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    3bf6:	9348      	ld.w      	r2, (r3, 0x20)
+    3bf8:	3120      	movi      	r1, 32
+    3bfa:	6884      	and      	r2, r1
+    3bfc:	3a40      	cmpnei      	r2, 0
+    3bfe:	0bea      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    3c00:	9348      	ld.w      	r2, (r3, 0x20)
+    3c02:	3140      	movi      	r1, 64
+    3c04:	6884      	and      	r2, r1
+    3c06:	3a40      	cmpnei      	r2, 0
+    3c08:	0be5      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    3c0a:	9348      	ld.w      	r2, (r3, 0x20)
+    3c0c:	3180      	movi      	r1, 128
+    3c0e:	6884      	and      	r2, r1
+    3c10:	3a40      	cmpnei      	r2, 0
+    3c12:	0be0      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    3c14:	3280      	movi      	r2, 128
+    3c16:	9328      	ld.w      	r1, (r3, 0x20)
+    3c18:	4249      	lsli      	r2, r2, 9
+    3c1a:	6848      	and      	r1, r2
+    3c1c:	3940      	cmpnei      	r1, 0
+    3c1e:	0fdb      	bf      	0x3bd4	// 3bd4 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    3c20:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    3c22:	07d9      	br      	0x3bd4	// 3bd4 <ADCIntHandler+0x14>
+    3c24:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00003c28 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    3c28:	1460      	nie
+    3c2a:	1462      	ipush
+    3c2c:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    3c2e:	1387      	lrw      	r4, 0x20000020	// 3dc8 <EPT0IntHandler+0x1a0>
+    3c30:	3280      	movi      	r2, 128
+    3c32:	9460      	ld.w      	r3, (r4, 0x0)
+    3c34:	60c8      	addu      	r3, r2
+    3c36:	9335      	ld.w      	r1, (r3, 0x54)
+    3c38:	3001      	movi      	r0, 1
+    3c3a:	6840      	and      	r1, r0
+    3c3c:	3940      	cmpnei      	r1, 0
+    3c3e:	0c03      	bf      	0x3c44	// 3c44 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    3c40:	b317      	st.w      	r0, (r3, 0x5c)
+    3c42:	0424      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    3c44:	9335      	ld.w      	r1, (r3, 0x54)
+    3c46:	3002      	movi      	r0, 2
+    3c48:	6840      	and      	r1, r0
+    3c4a:	3940      	cmpnei      	r1, 0
+    3c4c:	0bfa      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    3c4e:	9335      	ld.w      	r1, (r3, 0x54)
+    3c50:	3004      	movi      	r0, 4
+    3c52:	6840      	and      	r1, r0
+    3c54:	3940      	cmpnei      	r1, 0
+    3c56:	0bf5      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    3c58:	9335      	ld.w      	r1, (r3, 0x54)
+    3c5a:	3008      	movi      	r0, 8
+    3c5c:	6840      	and      	r1, r0
+    3c5e:	3940      	cmpnei      	r1, 0
+    3c60:	0bf0      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    3c62:	9335      	ld.w      	r1, (r3, 0x54)
+    3c64:	3010      	movi      	r0, 16
+    3c66:	6840      	and      	r1, r0
+    3c68:	3940      	cmpnei      	r1, 0
+    3c6a:	0c1f      	bf      	0x3ca8	// 3ca8 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    3c6c:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    3c6e:	3200      	movi      	r2, 0
+    3c70:	3101      	movi      	r1, 1
+    3c72:	3000      	movi      	r0, 0
+    3c74:	e3fffa9c 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    3c78:	3201      	movi      	r2, 1
+    3c7a:	3101      	movi      	r1, 1
+    3c7c:	3001      	movi      	r0, 1
+    3c7e:	e3fffa97 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    3c82:	9460      	ld.w      	r3, (r4, 0x0)
+    3c84:	934b      	ld.w      	r2, (r3, 0x2c)
+    3c86:	1272      	lrw      	r3, 0x20000374	// 3dcc <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3c88:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    3c8a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c8c:	3280      	movi      	r2, 128
+    3c8e:	60c8      	addu      	r3, r2
+    3c90:	932b      	ld.w      	r1, (r3, 0x2c)
+    3c92:	3001      	movi      	r0, 1
+    3c94:	6840      	and      	r1, r0
+    3c96:	3940      	cmpnei      	r1, 0
+    3c98:	0c61      	bf      	0x3d5a	// 3d5a <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    3c9a:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    3c9c:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3ca0:	9880      	ld.w      	r4, (r14, 0x0)
+    3ca2:	1402      	addi      	r14, r14, 8
+    3ca4:	1463      	ipop
+    3ca6:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    3ca8:	9335      	ld.w      	r1, (r3, 0x54)
+    3caa:	3020      	movi      	r0, 32
+    3cac:	6840      	and      	r1, r0
+    3cae:	3940      	cmpnei      	r1, 0
+    3cb0:	0c10      	bf      	0x3cd0	// 3cd0 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    3cb2:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    3cb4:	3200      	movi      	r2, 0
+    3cb6:	3101      	movi      	r1, 1
+    3cb8:	3001      	movi      	r0, 1
+    3cba:	e3fffa79 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    3cbe:	3201      	movi      	r2, 1
+    3cc0:	3101      	movi      	r1, 1
+    3cc2:	3000      	movi      	r0, 0
+    3cc4:	e3fffa74 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3cc8:	9460      	ld.w      	r3, (r4, 0x0)
+    3cca:	934c      	ld.w      	r2, (r3, 0x30)
+    3ccc:	1261      	lrw      	r3, 0x20000370	// 3dd0 <EPT0IntHandler+0x1a8>
+    3cce:	07dd      	br      	0x3c88	// 3c88 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    3cd0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cd2:	3040      	movi      	r0, 64
+    3cd4:	6840      	and      	r1, r0
+    3cd6:	3940      	cmpnei      	r1, 0
+    3cd8:	0bb4      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    3cda:	9335      	ld.w      	r1, (r3, 0x54)
+    3cdc:	6848      	and      	r1, r2
+    3cde:	3940      	cmpnei      	r1, 0
+    3ce0:	0c03      	bf      	0x3ce6	// 3ce6 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    3ce2:	b357      	st.w      	r2, (r3, 0x5c)
+    3ce4:	07d3      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    3ce6:	3280      	movi      	r2, 128
+    3ce8:	9335      	ld.w      	r1, (r3, 0x54)
+    3cea:	4241      	lsli      	r2, r2, 1
+    3cec:	6848      	and      	r1, r2
+    3cee:	3940      	cmpnei      	r1, 0
+    3cf0:	0bf9      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    3cf2:	3280      	movi      	r2, 128
+    3cf4:	9335      	ld.w      	r1, (r3, 0x54)
+    3cf6:	4242      	lsli      	r2, r2, 2
+    3cf8:	6848      	and      	r1, r2
+    3cfa:	3940      	cmpnei      	r1, 0
+    3cfc:	0bf3      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    3cfe:	3280      	movi      	r2, 128
+    3d00:	9335      	ld.w      	r1, (r3, 0x54)
+    3d02:	4243      	lsli      	r2, r2, 3
+    3d04:	6848      	and      	r1, r2
+    3d06:	3940      	cmpnei      	r1, 0
+    3d08:	0bed      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    3d0a:	3280      	movi      	r2, 128
+    3d0c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d0e:	4244      	lsli      	r2, r2, 4
+    3d10:	6848      	and      	r1, r2
+    3d12:	3940      	cmpnei      	r1, 0
+    3d14:	0be7      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    3d16:	3280      	movi      	r2, 128
+    3d18:	9335      	ld.w      	r1, (r3, 0x54)
+    3d1a:	4245      	lsli      	r2, r2, 5
+    3d1c:	6848      	and      	r1, r2
+    3d1e:	3940      	cmpnei      	r1, 0
+    3d20:	0be1      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    3d22:	3280      	movi      	r2, 128
+    3d24:	9335      	ld.w      	r1, (r3, 0x54)
+    3d26:	4246      	lsli      	r2, r2, 6
+    3d28:	6848      	and      	r1, r2
+    3d2a:	3940      	cmpnei      	r1, 0
+    3d2c:	0bdb      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    3d2e:	3280      	movi      	r2, 128
+    3d30:	9335      	ld.w      	r1, (r3, 0x54)
+    3d32:	4247      	lsli      	r2, r2, 7
+    3d34:	6848      	and      	r1, r2
+    3d36:	3940      	cmpnei      	r1, 0
+    3d38:	0bd5      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    3d3a:	3280      	movi      	r2, 128
+    3d3c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d3e:	4248      	lsli      	r2, r2, 8
+    3d40:	6848      	and      	r1, r2
+    3d42:	3940      	cmpnei      	r1, 0
+    3d44:	0bcf      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    3d46:	3280      	movi      	r2, 128
+    3d48:	9335      	ld.w      	r1, (r3, 0x54)
+    3d4a:	4249      	lsli      	r2, r2, 9
+    3d4c:	6848      	and      	r1, r2
+    3d4e:	3940      	cmpnei      	r1, 0
+    3d50:	0f9d      	bf      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    3d52:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    3d54:	e3fffd54 	bsr      	0x37fc	// 37fc <EPT_Stop>
+    3d58:	0799      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    3d5a:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d5c:	3002      	movi      	r0, 2
+    3d5e:	6840      	and      	r1, r0
+    3d60:	3940      	cmpnei      	r1, 0
+    3d62:	0b9c      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    3d64:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d66:	3004      	movi      	r0, 4
+    3d68:	6840      	and      	r1, r0
+    3d6a:	3940      	cmpnei      	r1, 0
+    3d6c:	0b97      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    3d6e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d70:	3008      	movi      	r0, 8
+    3d72:	6840      	and      	r1, r0
+    3d74:	3940      	cmpnei      	r1, 0
+    3d76:	0b92      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    3d78:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d7a:	3010      	movi      	r0, 16
+    3d7c:	6840      	and      	r1, r0
+    3d7e:	3940      	cmpnei      	r1, 0
+    3d80:	0b8d      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    3d82:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d84:	3020      	movi      	r0, 32
+    3d86:	6840      	and      	r1, r0
+    3d88:	3940      	cmpnei      	r1, 0
+    3d8a:	0b88      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    3d8c:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d8e:	3040      	movi      	r0, 64
+    3d90:	6840      	and      	r1, r0
+    3d92:	3940      	cmpnei      	r1, 0
+    3d94:	0b83      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    3d96:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d98:	6848      	and      	r1, r2
+    3d9a:	3940      	cmpnei      	r1, 0
+    3d9c:	0c03      	bf      	0x3da2	// 3da2 <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    3d9e:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    3da0:	077e      	br      	0x3c9c	// 3c9c <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    3da2:	3280      	movi      	r2, 128
+    3da4:	932b      	ld.w      	r1, (r3, 0x2c)
+    3da6:	4241      	lsli      	r2, r2, 1
+    3da8:	6848      	and      	r1, r2
+    3daa:	3940      	cmpnei      	r1, 0
+    3dac:	0bf9      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    3dae:	3280      	movi      	r2, 128
+    3db0:	932b      	ld.w      	r1, (r3, 0x2c)
+    3db2:	4242      	lsli      	r2, r2, 2
+    3db4:	6848      	and      	r1, r2
+    3db6:	3940      	cmpnei      	r1, 0
+    3db8:	0bf3      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    3dba:	3280      	movi      	r2, 128
+    3dbc:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dbe:	4243      	lsli      	r2, r2, 3
+    3dc0:	6848      	and      	r1, r2
+    3dc2:	3940      	cmpnei      	r1, 0
+    3dc4:	0bed      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+    3dc6:	076b      	br      	0x3c9c	// 3c9c <EPT0IntHandler+0x74>
+    3dc8:	20000020 	.long	0x20000020
+    3dcc:	20000374 	.long	0x20000374
+    3dd0:	20000370 	.long	0x20000370
+
+Disassembly of section .text.WWDTHandler:
+
+00003dd4 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    3dd4:	1460      	nie
+    3dd6:	1462      	ipush
+    3dd8:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    3dda:	10ab      	lrw      	r5, 0x20000010	// 3e04 <WWDTHandler+0x30>
+    3ddc:	3401      	movi      	r4, 1
+    3dde:	9560      	ld.w      	r3, (r5, 0x0)
+    3de0:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    3de2:	30ff      	movi      	r0, 255
+    3de4:	e3fffae2 	bsr      	0x33a8	// 33a8 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    3de8:	9540      	ld.w      	r2, (r5, 0x0)
+    3dea:	9263      	ld.w      	r3, (r2, 0xc)
+    3dec:	68d0      	and      	r3, r4
+    3dee:	3b40      	cmpnei      	r3, 0
+    3df0:	0c02      	bf      	0x3df4	// 3df4 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    3df2:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    3df4:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    3df8:	98a1      	ld.w      	r5, (r14, 0x4)
+    3dfa:	9880      	ld.w      	r4, (r14, 0x0)
+    3dfc:	1403      	addi      	r14, r14, 12
+    3dfe:	1463      	ipop
+    3e00:	1461      	nir
+    3e02:	0000      	bkpt
+    3e04:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00003e08 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    3e08:	1460      	nie
+    3e0a:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    3e0c:	107e      	lrw      	r3, 0x20000024	// 3e84 <GPT0IntHandler+0x7c>
+    3e0e:	3101      	movi      	r1, 1
+    3e10:	9360      	ld.w      	r3, (r3, 0x0)
+    3e12:	237f      	addi      	r3, 128
+    3e14:	9355      	ld.w      	r2, (r3, 0x54)
+    3e16:	6884      	and      	r2, r1
+    3e18:	3a40      	cmpnei      	r2, 0
+    3e1a:	0c04      	bf      	0x3e22	// 3e22 <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    3e1c:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    3e1e:	1463      	ipop
+    3e20:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    3e22:	9355      	ld.w      	r2, (r3, 0x54)
+    3e24:	3102      	movi      	r1, 2
+    3e26:	6884      	and      	r2, r1
+    3e28:	3a40      	cmpnei      	r2, 0
+    3e2a:	0bf9      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    3e2c:	9355      	ld.w      	r2, (r3, 0x54)
+    3e2e:	3110      	movi      	r1, 16
+    3e30:	6884      	and      	r2, r1
+    3e32:	3a40      	cmpnei      	r2, 0
+    3e34:	0bf4      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    3e36:	9355      	ld.w      	r2, (r3, 0x54)
+    3e38:	3120      	movi      	r1, 32
+    3e3a:	6884      	and      	r2, r1
+    3e3c:	3a40      	cmpnei      	r2, 0
+    3e3e:	0bef      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    3e40:	3280      	movi      	r2, 128
+    3e42:	9335      	ld.w      	r1, (r3, 0x54)
+    3e44:	4241      	lsli      	r2, r2, 1
+    3e46:	6848      	and      	r1, r2
+    3e48:	3940      	cmpnei      	r1, 0
+    3e4a:	0c03      	bf      	0x3e50	// 3e50 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    3e4c:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    3e4e:	07e8      	br      	0x3e1e	// 3e1e <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    3e50:	3280      	movi      	r2, 128
+    3e52:	9335      	ld.w      	r1, (r3, 0x54)
+    3e54:	4242      	lsli      	r2, r2, 2
+    3e56:	6848      	and      	r1, r2
+    3e58:	3940      	cmpnei      	r1, 0
+    3e5a:	0bf9      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    3e5c:	3280      	movi      	r2, 128
+    3e5e:	9335      	ld.w      	r1, (r3, 0x54)
+    3e60:	4243      	lsli      	r2, r2, 3
+    3e62:	6848      	and      	r1, r2
+    3e64:	3940      	cmpnei      	r1, 0
+    3e66:	0bf3      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    3e68:	3280      	movi      	r2, 128
+    3e6a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e6c:	4244      	lsli      	r2, r2, 4
+    3e6e:	6848      	and      	r1, r2
+    3e70:	3940      	cmpnei      	r1, 0
+    3e72:	0bed      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    3e74:	3280      	movi      	r2, 128
+    3e76:	9335      	ld.w      	r1, (r3, 0x54)
+    3e78:	4249      	lsli      	r2, r2, 9
+    3e7a:	6848      	and      	r1, r2
+    3e7c:	3940      	cmpnei      	r1, 0
+    3e7e:	0be7      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+    3e80:	07cf      	br      	0x3e1e	// 3e1e <GPT0IntHandler+0x16>
+    3e82:	0000      	bkpt
+    3e84:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00003e88 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    3e88:	1460      	nie
+    3e8a:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    3e8c:	1079      	lrw      	r3, 0x20000018	// 3ef0 <RTCIntHandler+0x68>
+    3e8e:	3101      	movi      	r1, 1
+    3e90:	9360      	ld.w      	r3, (r3, 0x0)
+    3e92:	934a      	ld.w      	r2, (r3, 0x28)
+    3e94:	6884      	and      	r2, r1
+    3e96:	3a40      	cmpnei      	r2, 0
+    3e98:	0c14      	bf      	0x3ec0	// 3ec0 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    3e9a:	1057      	lrw      	r2, 0xca53	// 3ef4 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    3e9c:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    3e9e:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    3ea0:	9342      	ld.w      	r2, (r3, 0x8)
+    3ea2:	6c84      	or      	r2, r1
+    3ea4:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    3ea6:	3280      	movi      	r2, 128
+    3ea8:	424d      	lsli      	r2, r2, 13
+    3eaa:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    3eac:	3102      	movi      	r1, 2
+    3eae:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb0:	6884      	and      	r2, r1
+    3eb2:	3a40      	cmpnei      	r2, 0
+    3eb4:	0bfd      	bt      	0x3eae	// 3eae <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    3eb6:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb8:	3a80      	bclri      	r2, 0
+    3eba:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    3ebc:	1463      	ipop
+    3ebe:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    3ec0:	934a      	ld.w      	r2, (r3, 0x28)
+    3ec2:	3102      	movi      	r1, 2
+    3ec4:	6884      	and      	r2, r1
+    3ec6:	3a40      	cmpnei      	r2, 0
+    3ec8:	0c03      	bf      	0x3ece	// 3ece <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    3eca:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    3ecc:	07f8      	br      	0x3ebc	// 3ebc <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    3ece:	934a      	ld.w      	r2, (r3, 0x28)
+    3ed0:	3104      	movi      	r1, 4
+    3ed2:	6884      	and      	r2, r1
+    3ed4:	3a40      	cmpnei      	r2, 0
+    3ed6:	0bfa      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    3ed8:	934a      	ld.w      	r2, (r3, 0x28)
+    3eda:	3108      	movi      	r1, 8
+    3edc:	6884      	and      	r2, r1
+    3ede:	3a40      	cmpnei      	r2, 0
+    3ee0:	0bf5      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    3ee2:	934a      	ld.w      	r2, (r3, 0x28)
+    3ee4:	3110      	movi      	r1, 16
+    3ee6:	6884      	and      	r2, r1
+    3ee8:	3a40      	cmpnei      	r2, 0
+    3eea:	0bf0      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+    3eec:	07e8      	br      	0x3ebc	// 3ebc <RTCIntHandler+0x34>
+    3eee:	0000      	bkpt
+    3ef0:	20000018 	.long	0x20000018
+    3ef4:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00003ef8 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    3ef8:	1460      	nie
+    3efa:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3efc:	106d      	lrw      	r3, 0x20000040	// 3f30 <UART0IntHandler+0x38>
+    3efe:	3102      	movi      	r1, 2
+    3f00:	9360      	ld.w      	r3, (r3, 0x0)
+    3f02:	9343      	ld.w      	r2, (r3, 0xc)
+    3f04:	6884      	and      	r2, r1
+    3f06:	3a40      	cmpnei      	r2, 0
+    3f08:	0c03      	bf      	0x3f0e	// 3f0e <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    3f0a:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f0c:	0410      	br      	0x3f2c	// 3f2c <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f0e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f10:	3101      	movi      	r1, 1
+    3f12:	6884      	and      	r2, r1
+    3f14:	3a40      	cmpnei      	r2, 0
+    3f16:	0bfa      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f18:	9343      	ld.w      	r2, (r3, 0xc)
+    3f1a:	3108      	movi      	r1, 8
+    3f1c:	6884      	and      	r2, r1
+    3f1e:	3a40      	cmpnei      	r2, 0
+    3f20:	0bf5      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f22:	9343      	ld.w      	r2, (r3, 0xc)
+    3f24:	3104      	movi      	r1, 4
+    3f26:	6884      	and      	r2, r1
+    3f28:	3a40      	cmpnei      	r2, 0
+    3f2a:	0bf0      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+}
+    3f2c:	1463      	ipop
+    3f2e:	1461      	nir
+    3f30:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00003f34 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    3f34:	1460      	nie
+    3f36:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f38:	106d      	lrw      	r3, 0x2000003c	// 3f6c <UART1IntHandler+0x38>
+    3f3a:	3102      	movi      	r1, 2
+    3f3c:	9360      	ld.w      	r3, (r3, 0x0)
+    3f3e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f40:	6884      	and      	r2, r1
+    3f42:	3a40      	cmpnei      	r2, 0
+    3f44:	0c03      	bf      	0x3f4a	// 3f4a <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    3f46:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f48:	0410      	br      	0x3f68	// 3f68 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f4a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f4c:	3101      	movi      	r1, 1
+    3f4e:	6884      	and      	r2, r1
+    3f50:	3a40      	cmpnei      	r2, 0
+    3f52:	0bfa      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f54:	9343      	ld.w      	r2, (r3, 0xc)
+    3f56:	3108      	movi      	r1, 8
+    3f58:	6884      	and      	r2, r1
+    3f5a:	3a40      	cmpnei      	r2, 0
+    3f5c:	0bf5      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f5e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f60:	3104      	movi      	r1, 4
+    3f62:	6884      	and      	r2, r1
+    3f64:	3a40      	cmpnei      	r2, 0
+    3f66:	0bf0      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+}
+    3f68:	1463      	ipop
+    3f6a:	1461      	nir
+    3f6c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00003f70 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    3f70:	1460      	nie
+    3f72:	1462      	ipush
+    3f74:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f76:	107f      	lrw      	r3, 0x20000038	// 3ff0 <UART2IntHandler+0x80>
+    3f78:	3102      	movi      	r1, 2
+    3f7a:	9360      	ld.w      	r3, (r3, 0x0)
+    3f7c:	9343      	ld.w      	r2, (r3, 0xc)
+    3f7e:	6884      	and      	r2, r1
+    3f80:	3a40      	cmpnei      	r2, 0
+    3f82:	0c0b      	bf      	0x3f98	// 3f98 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    3f84:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    3f86:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    3f88:	7400      	zextb      	r0, r0
+    3f8a:	e00002e9 	bsr      	0x455c	// 455c <UART2_RecvINT_Processing>
+		//GPIO_Write_Low(GPIOB0,3);
+		
+		//GPIO_Reverse(GPIOB0,3);
+	}
+	
+}
+    3f8e:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3f92:	1401      	addi      	r14, r14, 4
+    3f94:	1463      	ipop
+    3f96:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f98:	9323      	ld.w      	r1, (r3, 0xc)
+    3f9a:	3201      	movi      	r2, 1
+    3f9c:	6848      	and      	r1, r2
+    3f9e:	3940      	cmpnei      	r1, 0
+    3fa0:	0c0d      	bf      	0x3fba	// 3fba <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    3fa2:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    3fa4:	1074      	lrw      	r3, 0x200000b8	// 3ff4 <UART2IntHandler+0x84>
+    3fa6:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fa8:	1074      	lrw      	r3, 0x200000bc	// 3ff8 <UART2IntHandler+0x88>
+    3faa:	9360      	ld.w      	r3, (r3, 0x0)
+    3fac:	3b41      	cmpnei      	r3, 1
+    3fae:	0bf0      	bt      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    3fb0:	1053      	lrw      	r2, 0x200000c0	// 3ffc <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    3fb2:	9260      	ld.w      	r3, (r2, 0x0)
+    3fb4:	2300      	addi      	r3, 1
+    3fb6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    3fb8:	07eb      	br      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3fba:	9343      	ld.w      	r2, (r3, 0xc)
+    3fbc:	3108      	movi      	r1, 8
+    3fbe:	6884      	and      	r2, r1
+    3fc0:	3a40      	cmpnei      	r2, 0
+    3fc2:	0c03      	bf      	0x3fc8	// 3fc8 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    3fc4:	b323      	st.w      	r1, (r3, 0xc)
+    3fc6:	07e4      	br      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3fc8:	9343      	ld.w      	r2, (r3, 0xc)
+    3fca:	3104      	movi      	r1, 4
+    3fcc:	6884      	and      	r2, r1
+    3fce:	3a40      	cmpnei      	r2, 0
+    3fd0:	0bfa      	bt      	0x3fc4	// 3fc4 <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    3fd2:	3180      	movi      	r1, 128
+    3fd4:	9303      	ld.w      	r0, (r3, 0xc)
+    3fd6:	412c      	lsli      	r1, r1, 12
+    3fd8:	6804      	and      	r0, r1
+    3fda:	3840      	cmpnei      	r0, 0
+    3fdc:	0fd9      	bf      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    3fde:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    3fe0:	1065      	lrw      	r3, 0x200000b8	// 3ff4 <UART2IntHandler+0x84>
+    3fe2:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fe4:	1065      	lrw      	r3, 0x200000bc	// 3ff8 <UART2IntHandler+0x88>
+    3fe6:	9360      	ld.w      	r3, (r3, 0x0)
+    3fe8:	3b41      	cmpnei      	r3, 1
+    3fea:	0bd2      	bt      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    3fec:	1045      	lrw      	r2, 0x200000c4	// 4000 <UART2IntHandler+0x90>
+    3fee:	07e2      	br      	0x3fb2	// 3fb2 <UART2IntHandler+0x42>
+    3ff0:	20000038 	.long	0x20000038
+    3ff4:	200000b8 	.long	0x200000b8
+    3ff8:	200000bc 	.long	0x200000bc
+    3ffc:	200000c0 	.long	0x200000c0
+    4000:	200000c4 	.long	0x200000c4
+
+Disassembly of section .text.SPI0IntHandler:
+
+00004004 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    4004:	1460      	nie
+    4006:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    4008:	1178      	lrw      	r3, 0x20000034	// 40e8 <SPI0IntHandler+0xe4>
+    400a:	3101      	movi      	r1, 1
+    400c:	9360      	ld.w      	r3, (r3, 0x0)
+    400e:	9347      	ld.w      	r2, (r3, 0x1c)
+    4010:	6884      	and      	r2, r1
+    4012:	3a40      	cmpnei      	r2, 0
+    4014:	0c03      	bf      	0x401a	// 401a <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    4016:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    4018:	0407      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    401a:	9347      	ld.w      	r2, (r3, 0x1c)
+    401c:	3002      	movi      	r0, 2
+    401e:	6880      	and      	r2, r0
+    4020:	3a40      	cmpnei      	r2, 0
+    4022:	0c04      	bf      	0x402a	// 402a <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    4024:	b308      	st.w      	r0, (r3, 0x20)
+}
+    4026:	1463      	ipop
+    4028:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    402a:	9347      	ld.w      	r2, (r3, 0x1c)
+    402c:	3004      	movi      	r0, 4
+    402e:	6880      	and      	r2, r0
+    4030:	3a40      	cmpnei      	r2, 0
+    4032:	0c55      	bf      	0x40dc	// 40dc <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    4034:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    4036:	9302      	ld.w      	r0, (r3, 0x8)
+    4038:	32aa      	movi      	r2, 170
+    403a:	6482      	cmpne      	r0, r2
+    403c:	083e      	bt      	0x40b8	// 40b8 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    403e:	3102      	movi      	r1, 2
+    4040:	9343      	ld.w      	r2, (r3, 0xc)
+    4042:	6884      	and      	r2, r1
+    4044:	3a40      	cmpnei      	r2, 0
+    4046:	0ffd      	bf      	0x4040	// 4040 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    4048:	3211      	movi      	r2, 17
+    404a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    404c:	3110      	movi      	r1, 16
+    404e:	9343      	ld.w      	r2, (r3, 0xc)
+    4050:	6884      	and      	r2, r1
+    4052:	3a40      	cmpnei      	r2, 0
+    4054:	0bfd      	bt      	0x404e	// 404e <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4056:	3102      	movi      	r1, 2
+    4058:	9343      	ld.w      	r2, (r3, 0xc)
+    405a:	6884      	and      	r2, r1
+    405c:	3a40      	cmpnei      	r2, 0
+    405e:	0ffd      	bf      	0x4058	// 4058 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    4060:	3212      	movi      	r2, 18
+    4062:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4064:	3110      	movi      	r1, 16
+    4066:	9343      	ld.w      	r2, (r3, 0xc)
+    4068:	6884      	and      	r2, r1
+    406a:	3a40      	cmpnei      	r2, 0
+    406c:	0bfd      	bt      	0x4066	// 4066 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    406e:	3102      	movi      	r1, 2
+    4070:	9343      	ld.w      	r2, (r3, 0xc)
+    4072:	6884      	and      	r2, r1
+    4074:	3a40      	cmpnei      	r2, 0
+    4076:	0ffd      	bf      	0x4070	// 4070 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    4078:	3213      	movi      	r2, 19
+    407a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    407c:	3110      	movi      	r1, 16
+    407e:	9343      	ld.w      	r2, (r3, 0xc)
+    4080:	6884      	and      	r2, r1
+    4082:	3a40      	cmpnei      	r2, 0
+    4084:	0bfd      	bt      	0x407e	// 407e <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4086:	3102      	movi      	r1, 2
+    4088:	9343      	ld.w      	r2, (r3, 0xc)
+    408a:	6884      	and      	r2, r1
+    408c:	3a40      	cmpnei      	r2, 0
+    408e:	0ffd      	bf      	0x4088	// 4088 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    4090:	3214      	movi      	r2, 20
+    4092:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4094:	3110      	movi      	r1, 16
+    4096:	9343      	ld.w      	r2, (r3, 0xc)
+    4098:	6884      	and      	r2, r1
+    409a:	3a40      	cmpnei      	r2, 0
+    409c:	0bfd      	bt      	0x4096	// 4096 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    409e:	3102      	movi      	r1, 2
+    40a0:	9343      	ld.w      	r2, (r3, 0xc)
+    40a2:	6884      	and      	r2, r1
+    40a4:	3a40      	cmpnei      	r2, 0
+    40a6:	0ffd      	bf      	0x40a0	// 40a0 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    40a8:	3215      	movi      	r2, 21
+    40aa:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    40ac:	3110      	movi      	r1, 16
+    40ae:	9343      	ld.w      	r2, (r3, 0xc)
+    40b0:	6884      	and      	r2, r1
+    40b2:	3a40      	cmpnei      	r2, 0
+    40b4:	0bfd      	bt      	0x40ae	// 40ae <SPI0IntHandler+0xaa>
+    40b6:	07b8      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    40b8:	9343      	ld.w      	r2, (r3, 0xc)
+    40ba:	6884      	and      	r2, r1
+    40bc:	3a40      	cmpnei      	r2, 0
+    40be:	0bb4      	bt      	0x4026	// 4026 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    40c0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40c2:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    40c4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40c6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40c8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ca:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40cc:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ce:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40d2:	9343      	ld.w      	r2, (r3, 0xc)
+    40d4:	6884      	and      	r2, r1
+    40d6:	3a40      	cmpnei      	r2, 0
+    40d8:	0bfd      	bt      	0x40d2	// 40d2 <SPI0IntHandler+0xce>
+    40da:	07a6      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    40dc:	9347      	ld.w      	r2, (r3, 0x1c)
+    40de:	3108      	movi      	r1, 8
+    40e0:	6884      	and      	r2, r1
+    40e2:	3a40      	cmpnei      	r2, 0
+    40e4:	0b99      	bt      	0x4016	// 4016 <SPI0IntHandler+0x12>
+    40e6:	07a0      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+    40e8:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+000040ec <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    40ec:	1460      	nie
+    40ee:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    40f0:	1073      	lrw      	r3, 0x2000002c	// 413c <SIO0IntHandler+0x50>
+    40f2:	3104      	movi      	r1, 4
+    40f4:	9360      	ld.w      	r3, (r3, 0x0)
+    40f6:	9349      	ld.w      	r2, (r3, 0x24)
+    40f8:	6884      	and      	r2, r1
+    40fa:	3a40      	cmpnei      	r2, 0
+    40fc:	0c02      	bf      	0x4100	// 4100 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    40fe:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    4100:	9349      	ld.w      	r2, (r3, 0x24)
+    4102:	3101      	movi      	r1, 1
+    4104:	6884      	and      	r2, r1
+    4106:	3a40      	cmpnei      	r2, 0
+    4108:	0c02      	bf      	0x410c	// 410c <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    410a:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    410c:	9349      	ld.w      	r2, (r3, 0x24)
+    410e:	3102      	movi      	r1, 2
+    4110:	6884      	and      	r2, r1
+    4112:	3a40      	cmpnei      	r2, 0
+    4114:	0c03      	bf      	0x411a	// 411a <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    4116:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    4118:	0410      	br      	0x4138	// 4138 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    411a:	9349      	ld.w      	r2, (r3, 0x24)
+    411c:	3108      	movi      	r1, 8
+    411e:	6884      	and      	r2, r1
+    4120:	3a40      	cmpnei      	r2, 0
+    4122:	0bfa      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    4124:	9349      	ld.w      	r2, (r3, 0x24)
+    4126:	3110      	movi      	r1, 16
+    4128:	6884      	and      	r2, r1
+    412a:	3a40      	cmpnei      	r2, 0
+    412c:	0bf5      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    412e:	9349      	ld.w      	r2, (r3, 0x24)
+    4130:	3120      	movi      	r1, 32
+    4132:	6884      	and      	r2, r1
+    4134:	3a40      	cmpnei      	r2, 0
+    4136:	0bf0      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+}
+    4138:	1463      	ipop
+    413a:	1461      	nir
+    413c:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00004140 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    4140:	1460      	nie
+    4142:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    4144:	106a      	lrw      	r3, 0x2000005c	// 416c <EXI0IntHandler+0x2c>
+    4146:	3101      	movi      	r1, 1
+    4148:	9360      	ld.w      	r3, (r3, 0x0)
+    414a:	237f      	addi      	r3, 128
+    414c:	934c      	ld.w      	r2, (r3, 0x30)
+    414e:	6884      	and      	r2, r1
+    4150:	3a40      	cmpnei      	r2, 0
+    4152:	0c04      	bf      	0x415a	// 415a <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    4154:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    4156:	1463      	ipop
+    4158:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    415a:	3280      	movi      	r2, 128
+    415c:	932c      	ld.w      	r1, (r3, 0x30)
+    415e:	4249      	lsli      	r2, r2, 9
+    4160:	6848      	and      	r1, r2
+    4162:	3940      	cmpnei      	r1, 0
+    4164:	0ff9      	bf      	0x4156	// 4156 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    4166:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4168:	07f7      	br      	0x4156	// 4156 <EXI0IntHandler+0x16>
+    416a:	0000      	bkpt
+    416c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00004170 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    4170:	1460      	nie
+    4172:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    4174:	106a      	lrw      	r3, 0x2000005c	// 419c <EXI1IntHandler+0x2c>
+    4176:	3102      	movi      	r1, 2
+    4178:	9360      	ld.w      	r3, (r3, 0x0)
+    417a:	237f      	addi      	r3, 128
+    417c:	934c      	ld.w      	r2, (r3, 0x30)
+    417e:	6884      	and      	r2, r1
+    4180:	3a40      	cmpnei      	r2, 0
+    4182:	0c04      	bf      	0x418a	// 418a <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    4184:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    4186:	1463      	ipop
+    4188:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    418a:	3280      	movi      	r2, 128
+    418c:	932c      	ld.w      	r1, (r3, 0x30)
+    418e:	424a      	lsli      	r2, r2, 10
+    4190:	6848      	and      	r1, r2
+    4192:	3940      	cmpnei      	r1, 0
+    4194:	0ff9      	bf      	0x4186	// 4186 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    4196:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4198:	07f7      	br      	0x4186	// 4186 <EXI1IntHandler+0x16>
+    419a:	0000      	bkpt
+    419c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+000041a0 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    41a0:	1460      	nie
+    41a2:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    41a4:	1070      	lrw      	r3, 0x2000005c	// 41e4 <EXI2to3IntHandler+0x44>
+    41a6:	3104      	movi      	r1, 4
+    41a8:	9360      	ld.w      	r3, (r3, 0x0)
+    41aa:	237f      	addi      	r3, 128
+    41ac:	934c      	ld.w      	r2, (r3, 0x30)
+    41ae:	6884      	and      	r2, r1
+    41b0:	3a40      	cmpnei      	r2, 0
+    41b2:	0c04      	bf      	0x41ba	// 41ba <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    41b4:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    41b6:	1463      	ipop
+    41b8:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    41ba:	934c      	ld.w      	r2, (r3, 0x30)
+    41bc:	3108      	movi      	r1, 8
+    41be:	6884      	and      	r2, r1
+    41c0:	3a40      	cmpnei      	r2, 0
+    41c2:	0bf9      	bt      	0x41b4	// 41b4 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    41c4:	3280      	movi      	r2, 128
+    41c6:	932c      	ld.w      	r1, (r3, 0x30)
+    41c8:	424b      	lsli      	r2, r2, 11
+    41ca:	6848      	and      	r1, r2
+    41cc:	3940      	cmpnei      	r1, 0
+    41ce:	0c03      	bf      	0x41d4	// 41d4 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    41d0:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41d2:	07f2      	br      	0x41b6	// 41b6 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    41d4:	3280      	movi      	r2, 128
+    41d6:	932c      	ld.w      	r1, (r3, 0x30)
+    41d8:	424c      	lsli      	r2, r2, 12
+    41da:	6848      	and      	r1, r2
+    41dc:	3940      	cmpnei      	r1, 0
+    41de:	0bf9      	bt      	0x41d0	// 41d0 <EXI2to3IntHandler+0x30>
+    41e0:	07eb      	br      	0x41b6	// 41b6 <EXI2to3IntHandler+0x16>
+    41e2:	0000      	bkpt
+    41e4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+000041e8 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    41e8:	1460      	nie
+    41ea:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    41ec:	1075      	lrw      	r3, 0x2000005c	// 4240 <EXI4to9IntHandler+0x58>
+    41ee:	3280      	movi      	r2, 128
+    41f0:	9360      	ld.w      	r3, (r3, 0x0)
+    41f2:	60c8      	addu      	r3, r2
+    41f4:	932c      	ld.w      	r1, (r3, 0x30)
+    41f6:	3010      	movi      	r0, 16
+    41f8:	6840      	and      	r1, r0
+    41fa:	3940      	cmpnei      	r1, 0
+    41fc:	0c04      	bf      	0x4204	// 4204 <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    41fe:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    4200:	1463      	ipop
+    4202:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    4204:	932c      	ld.w      	r1, (r3, 0x30)
+    4206:	3020      	movi      	r0, 32
+    4208:	6840      	and      	r1, r0
+    420a:	3940      	cmpnei      	r1, 0
+    420c:	0bf9      	bt      	0x41fe	// 41fe <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    420e:	932c      	ld.w      	r1, (r3, 0x30)
+    4210:	3040      	movi      	r0, 64
+    4212:	6840      	and      	r1, r0
+    4214:	3940      	cmpnei      	r1, 0
+    4216:	0bf4      	bt      	0x41fe	// 41fe <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    4218:	932c      	ld.w      	r1, (r3, 0x30)
+    421a:	6848      	and      	r1, r2
+    421c:	3940      	cmpnei      	r1, 0
+    421e:	0c03      	bf      	0x4224	// 4224 <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    4220:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4222:	07ef      	br      	0x4200	// 4200 <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    4224:	3280      	movi      	r2, 128
+    4226:	932c      	ld.w      	r1, (r3, 0x30)
+    4228:	4241      	lsli      	r2, r2, 1
+    422a:	6848      	and      	r1, r2
+    422c:	3940      	cmpnei      	r1, 0
+    422e:	0bf9      	bt      	0x4220	// 4220 <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    4230:	3280      	movi      	r2, 128
+    4232:	932c      	ld.w      	r1, (r3, 0x30)
+    4234:	4242      	lsli      	r2, r2, 2
+    4236:	6848      	and      	r1, r2
+    4238:	3940      	cmpnei      	r1, 0
+    423a:	0bf3      	bt      	0x4220	// 4220 <EXI4to9IntHandler+0x38>
+    423c:	07e2      	br      	0x4200	// 4200 <EXI4to9IntHandler+0x18>
+    423e:	0000      	bkpt
+    4240:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00004244 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    4244:	1460      	nie
+    4246:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    4248:	1076      	lrw      	r3, 0x2000005c	// 42a0 <EXI10to15IntHandler+0x5c>
+    424a:	3280      	movi      	r2, 128
+    424c:	9360      	ld.w      	r3, (r3, 0x0)
+    424e:	237f      	addi      	r3, 128
+    4250:	932c      	ld.w      	r1, (r3, 0x30)
+    4252:	4243      	lsli      	r2, r2, 3
+    4254:	6848      	and      	r1, r2
+    4256:	3940      	cmpnei      	r1, 0
+    4258:	0c03      	bf      	0x425e	// 425e <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    425a:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    425c:	041f      	br      	0x429a	// 429a <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    425e:	3280      	movi      	r2, 128
+    4260:	932c      	ld.w      	r1, (r3, 0x30)
+    4262:	4244      	lsli      	r2, r2, 4
+    4264:	6848      	and      	r1, r2
+    4266:	3940      	cmpnei      	r1, 0
+    4268:	0bf9      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    426a:	3280      	movi      	r2, 128
+    426c:	932c      	ld.w      	r1, (r3, 0x30)
+    426e:	4245      	lsli      	r2, r2, 5
+    4270:	6848      	and      	r1, r2
+    4272:	3940      	cmpnei      	r1, 0
+    4274:	0bf3      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    4276:	3280      	movi      	r2, 128
+    4278:	932c      	ld.w      	r1, (r3, 0x30)
+    427a:	4246      	lsli      	r2, r2, 6
+    427c:	6848      	and      	r1, r2
+    427e:	3940      	cmpnei      	r1, 0
+    4280:	0bed      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    4282:	3280      	movi      	r2, 128
+    4284:	932c      	ld.w      	r1, (r3, 0x30)
+    4286:	4247      	lsli      	r2, r2, 7
+    4288:	6848      	and      	r1, r2
+    428a:	3940      	cmpnei      	r1, 0
+    428c:	0be7      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    428e:	3280      	movi      	r2, 128
+    4290:	932c      	ld.w      	r1, (r3, 0x30)
+    4292:	4248      	lsli      	r2, r2, 8
+    4294:	6848      	and      	r1, r2
+    4296:	3940      	cmpnei      	r1, 0
+    4298:	0be1      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+}
+    429a:	1463      	ipop
+    429c:	1461      	nir
+    429e:	0000      	bkpt
+    42a0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+000042a4 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    42a4:	1460      	nie
+    42a6:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    42a8:	106b      	lrw      	r3, 0x20000014	// 42d4 <LPTIntHandler+0x30>
+    42aa:	3101      	movi      	r1, 1
+    42ac:	9360      	ld.w      	r3, (r3, 0x0)
+    42ae:	934e      	ld.w      	r2, (r3, 0x38)
+    42b0:	6884      	and      	r2, r1
+    42b2:	3a40      	cmpnei      	r2, 0
+    42b4:	0c03      	bf      	0x42ba	// 42ba <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    42b6:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    42b8:	040b      	br      	0x42ce	// 42ce <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    42ba:	934e      	ld.w      	r2, (r3, 0x38)
+    42bc:	3102      	movi      	r1, 2
+    42be:	6884      	and      	r2, r1
+    42c0:	3a40      	cmpnei      	r2, 0
+    42c2:	0bfa      	bt      	0x42b6	// 42b6 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    42c4:	934e      	ld.w      	r2, (r3, 0x38)
+    42c6:	3104      	movi      	r1, 4
+    42c8:	6884      	and      	r2, r1
+    42ca:	3a40      	cmpnei      	r2, 0
+    42cc:	0bf5      	bt      	0x42b6	// 42b6 <LPTIntHandler+0x12>
+}
+    42ce:	1463      	ipop
+    42d0:	1461      	nir
+    42d2:	0000      	bkpt
+    42d4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+000042d8 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    42d8:	1460      	nie
+    42da:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    42dc:	1071      	lrw      	r3, 0x2000000c	// 4320 <BT0IntHandler+0x48>
+    42de:	3101      	movi      	r1, 1
+    42e0:	9360      	ld.w      	r3, (r3, 0x0)
+    42e2:	934c      	ld.w      	r2, (r3, 0x30)
+    42e4:	6884      	and      	r2, r1
+    42e6:	3a40      	cmpnei      	r2, 0
+    42e8:	0c0a      	bf      	0x42fc	// 42fc <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    42ea:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    42ec:	9341      	ld.w      	r2, (r3, 0x4)
+    42ee:	3a86      	bclri      	r2, 6
+    42f0:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    42f2:	9340      	ld.w      	r2, (r3, 0x0)
+    42f4:	3200      	movi      	r2, 0
+    42f6:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    42f8:	1463      	ipop
+    42fa:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    42fc:	934c      	ld.w      	r2, (r3, 0x30)
+    42fe:	3102      	movi      	r1, 2
+    4300:	6884      	and      	r2, r1
+    4302:	3a40      	cmpnei      	r2, 0
+    4304:	0c03      	bf      	0x430a	// 430a <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    4306:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    4308:	07f8      	br      	0x42f8	// 42f8 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    430a:	934c      	ld.w      	r2, (r3, 0x30)
+    430c:	3104      	movi      	r1, 4
+    430e:	6884      	and      	r2, r1
+    4310:	3a40      	cmpnei      	r2, 0
+    4312:	0bfa      	bt      	0x4306	// 4306 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    4314:	934c      	ld.w      	r2, (r3, 0x30)
+    4316:	3108      	movi      	r1, 8
+    4318:	6884      	and      	r2, r1
+    431a:	3a40      	cmpnei      	r2, 0
+    431c:	0bf5      	bt      	0x4306	// 4306 <BT0IntHandler+0x2e>
+    431e:	07ed      	br      	0x42f8	// 42f8 <BT0IntHandler+0x20>
+    4320:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00004324 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    4324:	1460      	nie
+    4326:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    4328:	1076      	lrw      	r3, 0x20000008	// 4380 <BT1IntHandler+0x5c>
+    432a:	3101      	movi      	r1, 1
+    432c:	9360      	ld.w      	r3, (r3, 0x0)
+    432e:	934c      	ld.w      	r2, (r3, 0x30)
+    4330:	6884      	and      	r2, r1
+    4332:	3a40      	cmpnei      	r2, 0
+    4334:	0c03      	bf      	0x433a	// 433a <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    4336:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    4338:	0416      	br      	0x4364	// 4364 <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    433a:	934c      	ld.w      	r2, (r3, 0x30)
+    433c:	3102      	movi      	r1, 2
+    433e:	6884      	and      	r2, r1
+    4340:	3a40      	cmpnei      	r2, 0
+    4342:	0c13      	bf      	0x4368	// 4368 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    4344:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    4346:	1070      	lrw      	r3, 0x200000ac	// 4384 <BT1IntHandler+0x60>
+    4348:	8340      	ld.b      	r2, (r3, 0x0)
+    434a:	2200      	addi      	r2, 1
+    434c:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    434e:	9321      	ld.w      	r1, (r3, 0x4)
+    4350:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    4352:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    4354:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    4356:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    4358:	0c06      	bf      	0x4364	// 4364 <BT1IntHandler+0x40>
+			NUM = 0;
+    435a:	3200      	movi      	r2, 0
+    435c:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    435e:	9342      	ld.w      	r2, (r3, 0x8)
+    4360:	2200      	addi      	r2, 1
+    4362:	b342      	st.w      	r2, (r3, 0x8)
+}
+    4364:	1463      	ipop
+    4366:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    4368:	934c      	ld.w      	r2, (r3, 0x30)
+    436a:	3104      	movi      	r1, 4
+    436c:	6884      	and      	r2, r1
+    436e:	3a40      	cmpnei      	r2, 0
+    4370:	0be3      	bt      	0x4336	// 4336 <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    4372:	934c      	ld.w      	r2, (r3, 0x30)
+    4374:	3108      	movi      	r1, 8
+    4376:	6884      	and      	r2, r1
+    4378:	3a40      	cmpnei      	r2, 0
+    437a:	0bde      	bt      	0x4336	// 4336 <BT1IntHandler+0x12>
+    437c:	07f4      	br      	0x4364	// 4364 <BT1IntHandler+0x40>
+    437e:	0000      	bkpt
+    4380:	20000008 	.long	0x20000008
+    4384:	200000ac 	.long	0x200000ac
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00004388 <PriviledgeVioHandler>:
+    4388:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+0000438a <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    438a:	1460      	nie
+    438c:	1462      	ipush
+    // ISR content ...
+
+}
+    438e:	1463      	ipop
+    4390:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+00004392 <Trap3Handler>:
+    4392:	1460      	nie
+    4394:	1462      	ipush
+    4396:	1463      	ipop
+    4398:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+0000439a <Trap2Handler>:
+    439a:	1460      	nie
+    439c:	1462      	ipush
+    439e:	1463      	ipop
+    43a0:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+000043a2 <Trap1Handler>:
+    43a2:	1460      	nie
+    43a4:	1462      	ipush
+    43a6:	1463      	ipop
+    43a8:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+000043aa <Trap0Handler>:
+    43aa:	1460      	nie
+    43ac:	1462      	ipush
+    43ae:	1463      	ipop
+    43b0:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+000043b2 <UnrecExecpHandler>:
+    43b2:	1460      	nie
+    43b4:	1462      	ipush
+    43b6:	1463      	ipop
+    43b8:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+000043ba <BreakPointHandler>:
+    43ba:	1460      	nie
+    43bc:	1462      	ipush
+    43be:	1463      	ipop
+    43c0:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+000043c2 <AccessErrHandler>:
+    43c2:	1460      	nie
+    43c4:	1462      	ipush
+    43c6:	1463      	ipop
+    43c8:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+000043ca <IllegalInstrHandler>:
+    43ca:	1460      	nie
+    43cc:	1462      	ipush
+    43ce:	1463      	ipop
+    43d0:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+000043d2 <MisalignedHandler>:
+    43d2:	1460      	nie
+    43d4:	1462      	ipush
+    43d6:	1463      	ipop
+    43d8:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+000043da <CNTAIntHandler>:
+    43da:	1460      	nie
+    43dc:	1462      	ipush
+    43de:	1463      	ipop
+    43e0:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+000043e2 <I2CIntHandler>:
+    43e2:	1460      	nie
+    43e4:	1462      	ipush
+    43e6:	1463      	ipop
+    43e8:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000043ec <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    43ec:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    43ee:	c0006023 	mfcr      	r3, cr<0, 0>
+    43f2:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    43f6:	1046      	lrw      	r2, 0x20000000	// 440c <__divsi3+0x20>
+    43f8:	3400      	movi      	r4, 0
+    43fa:	9240      	ld.w      	r2, (r2, 0x0)
+    43fc:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    43fe:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4400:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4402:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4404:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    4408:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    440a:	1481      	pop      	r4
+    440c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00004410 <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    4410:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4412:	c0006023 	mfcr      	r3, cr<0, 0>
+    4416:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    441a:	1046      	lrw      	r2, 0x20000000	// 4430 <__udivsi3+0x20>
+    441c:	3401      	movi      	r4, 1
+    441e:	9240      	ld.w      	r2, (r2, 0x0)
+    4420:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4422:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4424:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4426:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4428:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    442c:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    442e:	1481      	pop      	r4
+    4430:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__modsi3:
+
+00004434 <__modsi3>:
+
+int __modsi3 ( int a,  int b)
+{   
+    4434:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4436:	c0006023 	mfcr      	r3, cr<0, 0>
+    443a:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 0;
+    443e:	1046      	lrw      	r2, 0x20000000	// 4454 <__modsi3+0x20>
+    4440:	3400      	movi      	r4, 0
+    4442:	9240      	ld.w      	r2, (r2, 0x0)
+    4444:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4446:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4448:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    444a:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    444c:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4450:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    4452:	1481      	pop      	r4
+    4454:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+00004458 <__umodsi3>:
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    4458:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    445a:	c0006023 	mfcr      	r3, cr<0, 0>
+    445e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    4462:	1046      	lrw      	r2, 0x20000000	// 4478 <__umodsi3+0x20>
+    4464:	3401      	movi      	r4, 1
+    4466:	9240      	ld.w      	r2, (r2, 0x0)
+    4468:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    446a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    446c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    446e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4470:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4474:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    4476:	1481      	pop      	r4
+    4478:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+0000447c <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    447c:	c1807420 	psrset      	ee, ie
+}
+    4480:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00004484 <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4484:	14d1      	push      	r4, r15
+	switch(uart_id){
+    4486:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4488:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    448a:	0c1a      	bf      	0x44be	// 44be <UARTx_Init+0x3a>
+    448c:	3840      	cmpnei      	r0, 0
+    448e:	0c04      	bf      	0x4496	// 4496 <UARTx_Init+0x12>
+    4490:	3842      	cmpnei      	r0, 2
+    4492:	0c2a      	bf      	0x44e6	// 44e6 <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    4494:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    4496:	e3fff8dd 	bsr      	0x3650	// 3650 <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    449a:	118a      	lrw      	r4, 0x20000040	// 4540 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    449c:	3100      	movi      	r1, 0
+    449e:	3000      	movi      	r0, 0
+    44a0:	e3fff918 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44a4:	9400      	ld.w      	r0, (r4, 0x0)
+    44a6:	3200      	movi      	r2, 0
+    44a8:	1127      	lrw      	r1, 0x2710	// 4544 <UARTx_Init+0xc0>
+    44aa:	e3fff989 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    44ae:	9400      	ld.w      	r0, (r4, 0x0)
+    44b0:	3200      	movi      	r2, 0
+    44b2:	1125      	lrw      	r1, 0x2710	// 4544 <UARTx_Init+0xc0>
+    44b4:	e3fff98c 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    44b8:	e3fff8f0 	bsr      	0x3698	// 3698 <UART0_Int_Enable>
+			break;
+    44bc:	07ec      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    44be:	e3fff8d5 	bsr      	0x3668	// 3668 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44c2:	3102      	movi      	r1, 2
+    44c4:	3001      	movi      	r0, 1
+    44c6:	e3fff905 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    44ca:	1180      	lrw      	r4, 0x2000003c	// 4548 <UARTx_Init+0xc4>
+    44cc:	31d0      	movi      	r1, 208
+    44ce:	9400      	ld.w      	r0, (r4, 0x0)
+    44d0:	3200      	movi      	r2, 0
+    44d2:	4121      	lsli      	r1, r1, 1
+    44d4:	e3fff974 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44d8:	31d0      	movi      	r1, 208
+    44da:	9400      	ld.w      	r0, (r4, 0x0)
+    44dc:	3200      	movi      	r2, 0
+    44de:	4121      	lsli      	r1, r1, 1
+    44e0:	e3fff976 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			break;
+    44e4:	07d8      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    44e6:	e3fff8cd 	bsr      	0x3680	// 3680 <UART2_DeInit>
+			UART_IO_Init(IO_UART2,0);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44ea:	3100      	movi      	r1, 0
+    44ec:	3002      	movi      	r0, 2
+    44ee:	e3fff8f1 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44f2:	1077      	lrw      	r3, 0x20000038	// 454c <UARTx_Init+0xc8>
+    44f4:	31d0      	movi      	r1, 208
+    44f6:	9300      	ld.w      	r0, (r3, 0x0)
+    44f8:	3200      	movi      	r2, 0
+    44fa:	4121      	lsli      	r1, r1, 1
+    44fc:	e3fff968 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    4500:	e3fff8da 	bsr      	0x36b4	// 36b4 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    4504:	3273      	movi      	r2, 115
+    4506:	3100      	movi      	r1, 0
+    4508:	1012      	lrw      	r0, 0x200003a0	// 4550 <UARTx_Init+0xcc>
+    450a:	e3ffea89 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    450e:	1072      	lrw      	r3, 0x20000407	// 4554 <UARTx_Init+0xd0>
+    4510:	3203      	movi      	r2, 3
+    4512:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    4514:	4c48      	lsri      	r2, r4, 8
+    4516:	a388      	st.b      	r4, (r3, 0x8)
+    4518:	a349      	st.b      	r2, (r3, 0x9)
+    451a:	4c50      	lsri      	r2, r4, 16
+    451c:	4c98      	lsri      	r4, r4, 24
+    451e:	a38b      	st.b      	r4, (r3, 0xb)
+    4520:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    4522:	3103      	movi      	r1, 3
+    4524:	108d      	lrw      	r4, 0x20000048	// 4558 <UARTx_Init+0xd4>
+    4526:	3200      	movi      	r2, 0
+    4528:	9400      	ld.w      	r0, (r4, 0x0)
+    452a:	e3fff691 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    452e:	9400      	ld.w      	r0, (r4, 0x0)
+    4530:	3103      	movi      	r1, 3
+    4532:	e3fff707 	bsr      	0x3340	// 3340 <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    4536:	9400      	ld.w      	r0, (r4, 0x0)
+    4538:	3103      	movi      	r1, 3
+    453a:	e3fff70e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    453e:	07ab      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+    4540:	20000040 	.long	0x20000040
+    4544:	00002710 	.long	0x00002710
+    4548:	2000003c 	.long	0x2000003c
+    454c:	20000038 	.long	0x20000038
+    4550:	200003a0 	.long	0x200003a0
+    4554:	20000407 	.long	0x20000407
+    4558:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+0000455c <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    455c:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    455e:	1075      	lrw      	r3, 0x20000400	// 45b0 <UART2_RecvINT_Processing+0x54>
+    4560:	8346      	ld.b      	r2, (r3, 0x6)
+    4562:	8325      	ld.b      	r1, (r3, 0x5)
+    4564:	4248      	lsli      	r2, r2, 8
+    4566:	6c84      	or      	r2, r1
+    4568:	3162      	movi      	r1, 98
+    456a:	10b3      	lrw      	r5, 0x200003a0	// 45b4 <UART2_RecvINT_Processing+0x58>
+    456c:	3440      	movi      	r4, 64
+    456e:	6485      	cmplt      	r1, r2
+    4570:	6114      	addu      	r4, r5
+    4572:	0c06      	bf      	0x457e	// 457e <UART2_RecvINT_Processing+0x22>
+    4574:	3225      	movi      	r2, 37
+    4576:	6090      	addu      	r2, r4
+    4578:	3100      	movi      	r1, 0
+    457a:	a220      	st.b      	r1, (r2, 0x0)
+    457c:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    457e:	8346      	ld.b      	r2, (r3, 0x6)
+    4580:	8325      	ld.b      	r1, (r3, 0x5)
+    4582:	4248      	lsli      	r2, r2, 8
+    4584:	6c84      	or      	r2, r1
+    4586:	5a22      	addi      	r1, r2, 1
+    4588:	6094      	addu      	r2, r5
+    458a:	a200      	st.b      	r0, (r2, 0x0)
+    458c:	2424      	addi      	r4, 37
+    458e:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4590:	104a      	lrw      	r2, 0x200000b4	// 45b8 <UART2_RecvINT_Processing+0x5c>
+    4592:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    4594:	a420      	st.b      	r1, (r4, 0x0)
+    4596:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4598:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    459a:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    459c:	1028      	lrw      	r1, 0x2000040b	// 45bc <UART2_RecvINT_Processing+0x60>
+    459e:	a140      	st.b      	r2, (r1, 0x0)
+    45a0:	a101      	st.b      	r0, (r1, 0x1)
+    45a2:	4a10      	lsri      	r0, r2, 16
+    45a4:	4a58      	lsri      	r2, r2, 24
+    45a6:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    45a8:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45aa:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    45ac:	a344      	st.b      	r2, (r3, 0x4)
+}
+    45ae:	1482      	pop      	r4-r5
+    45b0:	20000400 	.long	0x20000400
+    45b4:	200003a0 	.long	0x200003a0
+    45b8:	200000b4 	.long	0x200000b4
+    45bc:	2000040b 	.long	0x2000040b
+
+Disassembly of section .text.Dbg_Println:
+
+000045c0 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    45c0:	1423      	subi      	r14, r14, 12
+    45c2:	b862      	st.w      	r3, (r14, 0x8)
+    45c4:	b841      	st.w      	r2, (r14, 0x4)
+    45c6:	b820      	st.w      	r1, (r14, 0x0)
+    45c8:	14d2      	push      	r4-r5, r15
+    45ca:	1422      	subi      	r14, r14, 8
+    45cc:	9865      	ld.w      	r3, (r14, 0x14)
+    45ce:	b861      	st.w      	r3, (r14, 0x4)
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+    45d0:	3301      	movi      	r3, 1
+    45d2:	105c      	lrw      	r2, 0x20000068	// 4640 <Dbg_Println+0x80>
+    45d4:	70c0      	lsl      	r3, r0
+    45d6:	9240      	ld.w      	r2, (r2, 0x0)
+    45d8:	68c8      	and      	r3, r2
+    45da:	3b40      	cmpnei      	r3, 0
+    45dc:	0c2b      	bf      	0x4632	// 4632 <Dbg_Println+0x72>
+        SysTick_Now = SysTick_1ms;
+    45de:	109a      	lrw      	r4, 0x200000b8	// 4644 <Dbg_Println+0x84>
+    45e0:	107a      	lrw      	r3, 0x200000b4	// 4648 <Dbg_Println+0x88>
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45e2:	9445      	ld.w      	r2, (r4, 0x14)
+        SysTick_Now = SysTick_1ms;
+    45e4:	9360      	ld.w      	r3, (r3, 0x0)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45e6:	5b49      	subu      	r2, r3, r2
+        SysTick_Now = SysTick_1ms;
+    45e8:	b464      	st.w      	r3, (r4, 0x10)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ea:	b446      	st.w      	r2, (r4, 0x18)
+        SysTick_Last = SysTick_Now;
+    45ec:	b465      	st.w      	r3, (r4, 0x14)
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+    45ee:	3180      	movi      	r1, 128
+    45f0:	301c      	movi      	r0, 28
+    45f2:	b840      	st.w      	r2, (r14, 0x0)
+    45f4:	4122      	lsli      	r1, r1, 2
+    45f6:	1056      	lrw      	r2, 0x5f43	// 464c <Dbg_Println+0x8c>
+    45f8:	6010      	addu      	r0, r4
+    45fa:	e3ffe9b5 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    45fe:	10b5      	lrw      	r5, 0x2000003c	// 4650 <Dbg_Println+0x90>
+    4600:	311c      	movi      	r1, 28
+    4602:	7481      	zexth      	r2, r0
+    4604:	6050      	addu      	r1, r4
+    4606:	9500      	ld.w      	r0, (r5, 0x0)
+    4608:	e3fff8ea 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+    460c:	3180      	movi      	r1, 128
+    460e:	301c      	movi      	r0, 28
+    4610:	1b06      	addi      	r3, r14, 24
+    4612:	9841      	ld.w      	r2, (r14, 0x4)
+    4614:	4122      	lsli      	r1, r1, 2
+    4616:	6010      	addu      	r0, r4
+    4618:	e3ffe9d5 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+    461c:	6c53      	mov      	r1, r4
+    461e:	7481      	zexth      	r2, r0
+    4620:	211b      	addi      	r1, 28
+    4622:	9500      	ld.w      	r0, (r5, 0x0)
+    4624:	e3fff8dc 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		DBG_Printf("\r\n",2);
+    4628:	9500      	ld.w      	r0, (r5, 0x0)
+    462a:	3202      	movi      	r2, 2
+    462c:	102a      	lrw      	r1, 0x5f51	// 4654 <Dbg_Println+0x94>
+    462e:	e3fff8d7 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		
+    }
+
+#endif	
+}
+    4632:	1402      	addi      	r14, r14, 8
+    4634:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    4638:	98a1      	ld.w      	r5, (r14, 0x4)
+    463a:	9880      	ld.w      	r4, (r14, 0x0)
+    463c:	1406      	addi      	r14, r14, 24
+    463e:	783c      	jmp      	r15
+    4640:	20000068 	.long	0x20000068
+    4644:	200000b8 	.long	0x200000b8
+    4648:	200000b4 	.long	0x200000b4
+    464c:	00005f43 	.long	0x00005f43
+    4650:	2000003c 	.long	0x2000003c
+    4654:	00005f51 	.long	0x00005f51
+
+Disassembly of section .text.RC522_Delay:
+
+00004658 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    4658:	3300      	movi      	r3, 0
+    465a:	640e      	cmpne      	r3, r0
+    465c:	0802      	bt      	0x4660	// 4660 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    465e:	783c      	jmp      	r15
+        nop;
+    4660:	6c03      	mov      	r0, r0
+        nop;
+    4662:	6c03      	mov      	r0, r0
+        nop;
+    4664:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    4666:	2300      	addi      	r3, 1
+    4668:	07f9      	br      	0x465a	// 465a <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+0000466c <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    466c:	14d4      	push      	r4-r7, r15
+    466e:	6d83      	mov      	r6, r0
+    4670:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    4672:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    4674:	10f2      	lrw      	r7, 0x2000004c	// 46bc <RC522_ReadWriteOneByte+0x50>
+    4676:	3109      	movi      	r1, 9
+    4678:	9700      	ld.w      	r0, (r7, 0x0)
+    467a:	e3fff66e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    467e:	74da      	sextb      	r3, r6
+    4680:	3bdf      	btsti      	r3, 31
+    4682:	310a      	movi      	r1, 10
+    4684:	9700      	ld.w      	r0, (r7, 0x0)
+    4686:	0c18      	bf      	0x46b6	// 46b6 <RC522_ReadWriteOneByte+0x4a>
+    4688:	e3fff663 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    468c:	3109      	movi      	r1, 9
+    468e:	9700      	ld.w      	r0, (r7, 0x0)
+    4690:	e3fff65f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    4694:	310b      	movi      	r1, 11
+    4696:	9700      	ld.w      	r0, (r7, 0x0)
+    4698:	e3fff66e 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+        tx_data<<=1;
+    469c:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    469e:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a0:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    46a2:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    46a4:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a6:	0c02      	bf      	0x46aa	// 46aa <RC522_ReadWriteOneByte+0x3e>
+    46a8:	3ca0      	bseti      	r4, 0
+    46aa:	2d00      	subi      	r5, 1
+    46ac:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    46ae:	3d40      	cmpnei      	r5, 0
+    46b0:	0be3      	bt      	0x4676	// 4676 <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    46b2:	6c13      	mov      	r0, r4
+    46b4:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    46b6:	e3fff650 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    46ba:	07e9      	br      	0x468c	// 468c <RC522_ReadWriteOneByte+0x20>
+    46bc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+000046c0 <RC522_ReadRawRC>:
+{
+    46c0:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    46c2:	10ad      	lrw      	r5, 0x20000048	// 46f4 <RC522_ReadRawRC+0x34>
+    46c4:	3105      	movi      	r1, 5
+{
+    46c6:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    46c8:	9500      	ld.w      	r0, (r5, 0x0)
+    46ca:	e3fff646 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    46ce:	4401      	lsli      	r0, r4, 1
+    46d0:	347e      	movi      	r4, 126
+    46d2:	6810      	and      	r0, r4
+    46d4:	3400      	movi      	r4, 0
+    46d6:	2c7f      	subi      	r4, 128
+    46d8:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    46da:	7400      	zextb      	r0, r0
+    46dc:	e3ffffc8 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    46e0:	3000      	movi      	r0, 0
+    46e2:	e3ffffc5 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    46e6:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    46e8:	3105      	movi      	r1, 5
+    46ea:	9500      	ld.w      	r0, (r5, 0x0)
+    46ec:	e3fff631 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    46f0:	6c13      	mov      	r0, r4
+    46f2:	1492      	pop      	r4-r5, r15
+    46f4:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+000046f8 <RC522_WriteRawRC>:
+{
+    46f8:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    46fa:	10ab      	lrw      	r5, 0x20000048	// 4724 <RC522_WriteRawRC+0x2c>
+{
+    46fc:	6d87      	mov      	r6, r1
+    46fe:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    4700:	3105      	movi      	r1, 5
+    4702:	9500      	ld.w      	r0, (r5, 0x0)
+    4704:	e3fff629 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    4708:	4481      	lsli      	r4, r4, 1
+    470a:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    470c:	6810      	and      	r0, r4
+    470e:	e3ffffaf 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    4712:	6c1b      	mov      	r0, r6
+    4714:	e3ffffac 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    4718:	9500      	ld.w      	r0, (r5, 0x0)
+    471a:	3105      	movi      	r1, 5
+    471c:	e3fff619 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4720:	1493      	pop      	r4-r6, r15
+    4722:	0000      	bkpt
+    4724:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_PcdReset:
+
+00004728 <RC522_PcdReset>:
+{
+    4728:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    472a:	310f      	movi      	r1, 15
+    472c:	3001      	movi      	r0, 1
+    472e:	e3ffffe5 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    4732:	310f      	movi      	r1, 15
+    4734:	3001      	movi      	r0, 1
+    4736:	e3ffffe1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    473a:	300a      	movi      	r0, 10
+    473c:	e3ffff8e 	bsr      	0x4658	// 4658 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    4740:	313d      	movi      	r1, 61
+    4742:	3011      	movi      	r0, 17
+    4744:	e3ffffda 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    4748:	311e      	movi      	r1, 30
+    474a:	302d      	movi      	r0, 45
+    474c:	e3ffffd6 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    4750:	3100      	movi      	r1, 0
+    4752:	302c      	movi      	r0, 44
+    4754:	e3ffffd2 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    4758:	318d      	movi      	r1, 141
+    475a:	302a      	movi      	r0, 42
+    475c:	e3ffffce 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    4760:	313e      	movi      	r1, 62
+    4762:	302b      	movi      	r0, 43
+    4764:	e3ffffca 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    4768:	3140      	movi      	r1, 64
+    476a:	3015      	movi      	r0, 21
+    476c:	e3ffffc6 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    4770:	3000      	movi      	r0, 0
+    4772:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+00004774 <RC522_SetBitMask>:
+{
+    4774:	14d2      	push      	r4-r5, r15
+    4776:	6d47      	mov      	r5, r1
+    4778:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    477a:	e3ffffa3 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    477e:	6c43      	mov      	r1, r0
+    4780:	6c54      	or      	r1, r5
+    4782:	7444      	zextb      	r1, r1
+    4784:	6c13      	mov      	r0, r4
+    4786:	e3ffffb9 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    478a:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+0000478c <RC522_PcdAntennaOn>:
+{
+    478c:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    478e:	3014      	movi      	r0, 20
+    4790:	e3ffff98 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    4794:	3303      	movi      	r3, 3
+    4796:	680c      	and      	r0, r3
+    4798:	3840      	cmpnei      	r0, 0
+    479a:	0805      	bt      	0x47a4	// 47a4 <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    479c:	3103      	movi      	r1, 3
+    479e:	3014      	movi      	r0, 20
+    47a0:	e3ffffea 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+}
+    47a4:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000047a6 <RC522_ClearBitMask>:
+{
+    47a6:	14d2      	push      	r4-r5, r15
+    47a8:	6d47      	mov      	r5, r1
+    47aa:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    47ac:	e3ffff8a 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    47b0:	6815      	andn      	r0, r5
+    47b2:	7440      	zextb      	r1, r0
+    47b4:	6c13      	mov      	r0, r4
+    47b6:	e3ffffa1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    47ba:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+000047bc <RC522_PcdAntennaOff>:
+{
+    47bc:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    47be:	3103      	movi      	r1, 3
+    47c0:	3014      	movi      	r0, 20
+    47c2:	e3fffff2 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+}
+    47c6:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_CalulateCRC:
+
+000047c8 <RC522_CalulateCRC>:
+{
+    47c8:	14d3      	push      	r4-r6, r15
+    47ca:	6d03      	mov      	r4, r0
+    47cc:	6d87      	mov      	r6, r1
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    47ce:	3005      	movi      	r0, 5
+    47d0:	3104      	movi      	r1, 4
+{
+    47d2:	6d4b      	mov      	r5, r2
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    47d4:	e3ffffe9 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    47d8:	3100      	movi      	r1, 0
+    47da:	3001      	movi      	r0, 1
+    47dc:	e3ffff8e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80); //清FIFO指针
+    47e0:	3180      	movi      	r1, 128
+    47e2:	300a      	movi      	r0, 10
+    47e4:	e3ffffc8 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    47e8:	6190      	addu      	r6, r4
+    for(i=0;i<len;i++)
+    47ea:	6592      	cmpne      	r4, r6
+    47ec:	081b      	bt      	0x4822	// 4822 <RC522_CalulateCRC+0x5a>
+        RC522_WriteRawRC(CommandReg,PCD_CALCCRC);   //等待CRC计算完成
+    47ee:	3103      	movi      	r1, 3
+    47f0:	3001      	movi      	r0, 1
+    47f2:	e3ffff83 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    47f6:	34ff      	movi      	r4, 255
+    47f8:	2c00      	subi      	r4, 1
+        n=RC522_ReadRawRC(DivIrqReg);
+    47fa:	3005      	movi      	r0, 5
+    47fc:	7510      	zextb      	r4, r4
+    47fe:	e3ffff61 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    while((i!=0)&&!(n&0x04));//CRCIrq = 1
+    4802:	3c40      	cmpnei      	r4, 0
+    4804:	0c06      	bf      	0x4810	// 4810 <RC522_CalulateCRC+0x48>
+    4806:	3304      	movi      	r3, 4
+    4808:	680c      	and      	r0, r3
+    480a:	7400      	zextb      	r0, r0
+    480c:	3840      	cmpnei      	r0, 0
+    480e:	0ff5      	bf      	0x47f8	// 47f8 <RC522_CalulateCRC+0x30>
+    pOut[0]=RC522_ReadRawRC(CRCResultRegL);
+    4810:	3022      	movi      	r0, 34
+    4812:	e3ffff57 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4816:	a500      	st.b      	r0, (r5, 0x0)
+    pOut[1]=RC522_ReadRawRC(CRCResultRegM);
+    4818:	3021      	movi      	r0, 33
+    481a:	e3ffff53 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    481e:	a501      	st.b      	r0, (r5, 0x1)
+}
+    4820:	1493      	pop      	r4-r6, r15
+            RC522_WriteRawRC(FIFODataReg,*(pIn +i));  //开始RCR计算
+    4822:	8420      	ld.b      	r1, (r4, 0x0)
+    4824:	3009      	movi      	r0, 9
+    4826:	e3ffff69 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    482a:	2400      	addi      	r4, 1
+    482c:	07df      	br      	0x47ea	// 47ea <RC522_CalulateCRC+0x22>
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+0000482e <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    482e:	14d0      	push      	r15
+        RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    4830:	3108      	movi      	r1, 8
+    4832:	3008      	movi      	r0, 8
+    4834:	e3ffffb9 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+        RC522_WriteRawRC(ModeReg,0x3D);          //3F//CRC初始值0x6363
+    4838:	313d      	movi      	r1, 61
+    483a:	3011      	movi      	r0, 17
+    483c:	e3ffff5e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RxSelReg,0x86);         //84
+    4840:	3186      	movi      	r1, 134
+    4842:	3017      	movi      	r0, 23
+    4844:	e3ffff5a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RFCfgReg,0x7F);         //4F  //调整卡的感应距离//RxGain = 48dB调节卡感应距离
+    4848:	317f      	movi      	r1, 127
+    484a:	3026      	movi      	r0, 38
+    484c:	e3ffff56 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegL,30);        //tmoLength);// TReloadVal = 'h6a =tmoLength(dec)
+    4850:	311e      	movi      	r1, 30
+    4852:	302d      	movi      	r0, 45
+    4854:	e3ffff52 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegH,0);
+    4858:	3100      	movi      	r1, 0
+    485a:	302c      	movi      	r0, 44
+    485c:	e3ffff4e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TModeReg,0x8D);
+    4860:	318d      	movi      	r1, 141
+    4862:	302a      	movi      	r0, 42
+    4864:	e3ffff4a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TPrescalerReg,0x3E);
+    4868:	313e      	movi      	r1, 62
+    486a:	302b      	movi      	r0, 43
+    486c:	e3ffff46 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+        RC522_Delay(1000);
+    4870:	30fa      	movi      	r0, 250
+    4872:	4002      	lsli      	r0, r0, 2
+    4874:	e3fffef2 	bsr      	0x4658	// 4658 <RC522_Delay>
+        RC522_PcdAntennaOn();      //开启天线
+    4878:	e3ffff8a 	bsr      	0x478c	// 478c <RC522_PcdAntennaOn>
+}
+    487c:	3000      	movi      	r0, 0
+    487e:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+00004880 <RC522_Init>:
+{
+    4880:	14d1      	push      	r4, r15
+	nop;
+    4882:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    4884:	1183      	lrw      	r4, 0x2000004c	// 4910 <RC522_Init+0x90>
+    4886:	3200      	movi      	r2, 0
+    4888:	9400      	ld.w      	r0, (r4, 0x0)
+    488a:	3109      	movi      	r1, 9
+    488c:	e3fff4e0 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    4890:	3200      	movi      	r2, 0
+    4892:	9400      	ld.w      	r0, (r4, 0x0)
+    4894:	310a      	movi      	r1, 10
+    4896:	e3fff4db 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    489a:	9400      	ld.w      	r0, (r4, 0x0)
+    489c:	310b      	movi      	r1, 11
+    489e:	e3fff547 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    48a2:	9400      	ld.w      	r0, (r4, 0x0)
+    48a4:	3201      	movi      	r2, 1
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    48a6:	109c      	lrw      	r4, 0x20000048	// 4914 <RC522_Init+0x94>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    48a8:	310b      	movi      	r1, 11
+    48aa:	e3fff4d1 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    48ae:	9400      	ld.w      	r0, (r4, 0x0)
+    48b0:	3200      	movi      	r2, 0
+    48b2:	3105      	movi      	r1, 5
+    48b4:	e3fff4cc 	bsr      	0x324c	// 324c <GPIO_Init>
+    GPIO_Init(GPIOB0,4,Output);			//RST
+    48b8:	9400      	ld.w      	r0, (r4, 0x0)
+    48ba:	3200      	movi      	r2, 0
+    48bc:	3104      	movi      	r1, 4
+    48be:	e3fff4c7 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOB0,3,Intput);			//IRQ
+    48c2:	3201      	movi      	r2, 1
+    48c4:	9400      	ld.w      	r0, (r4, 0x0)
+    48c6:	3103      	movi      	r1, 3
+    48c8:	e3fff4c2 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_High(GPIOB0,5);
+    48cc:	9400      	ld.w      	r0, (r4, 0x0)
+    48ce:	3105      	movi      	r1, 5
+    48d0:	e3fff53f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    GPIO_Write_High(GPIOB0,4);
+    48d4:	3104      	movi      	r1, 4
+    48d6:	9400      	ld.w      	r0, (r4, 0x0)
+    48d8:	e3fff53b 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    48dc:	e3ffff26 	bsr      	0x4728	// 4728 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    48e0:	e3ffff6e 	bsr      	0x47bc	// 47bc <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    48e4:	3002      	movi      	r0, 2
+    48e6:	e3fffeb9 	bsr      	0x4658	// 4658 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    48ea:	e3ffff51 	bsr      	0x478c	// 478c <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    48ee:	108b      	lrw      	r4, 0x20000414	// 4918 <RC522_Init+0x98>
+    48f0:	e3ffff9f 	bsr      	0x482e	// 482e <M500PcdConfigISOType.part.1>
+    48f4:	3230      	movi      	r2, 48
+    48f6:	3100      	movi      	r1, 0
+    48f8:	6c13      	mov      	r0, r4
+    48fa:	e3ffe891 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    48fe:	3318      	movi      	r3, 24
+    4900:	a468      	st.b      	r3, (r4, 0x8)
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    4902:	3360      	movi      	r3, 96
+    4904:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    4906:	3300      	movi      	r3, 0
+    4908:	2b00      	subi      	r3, 1
+    490a:	b468      	st.w      	r3, (r4, 0x20)
+    490c:	ac72      	st.h      	r3, (r4, 0x24)
+}
+    490e:	1491      	pop      	r4, r15
+    4910:	2000004c 	.long	0x2000004c
+    4914:	20000048 	.long	0x20000048
+    4918:	20000414 	.long	0x20000414
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+0000491c <RC522_PcdComMF522>:
+{
+    491c:	14d4      	push      	r4-r7, r15
+    491e:	1424      	subi      	r14, r14, 16
+    4920:	b861      	st.w      	r3, (r14, 0x4)
+    switch (Command) {
+    4922:	384c      	cmpnei      	r0, 12
+{
+    4924:	9869      	ld.w      	r3, (r14, 0x24)
+    4926:	6d43      	mov      	r5, r0
+    4928:	6dc7      	mov      	r7, r1
+    492a:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    492c:	0c4c      	bf      	0x49c4	// 49c4 <RC522_PcdComMF522+0xa8>
+    492e:	384e      	cmpnei      	r0, 14
+    4930:	0c4d      	bf      	0x49ca	// 49ca <RC522_PcdComMF522+0xae>
+    U8_T waitFor=0x00;
+    4932:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    4934:	3400      	movi      	r4, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    4936:	6c53      	mov      	r1, r4
+    4938:	39a7      	bseti      	r1, 7
+    493a:	3002      	movi      	r0, 2
+    493c:	b842      	st.w      	r2, (r14, 0x8)
+    493e:	e3fffedd 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    4942:	3180      	movi      	r1, 128
+    4944:	3004      	movi      	r0, 4
+    4946:	e3ffff30 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    494a:	3100      	movi      	r1, 0
+    494c:	3001      	movi      	r0, 1
+    494e:	e3fffed5 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    4952:	3180      	movi      	r1, 128
+    4954:	300a      	movi      	r0, 10
+    4956:	e3ffff0f 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    495a:	9842      	ld.w      	r2, (r14, 0x8)
+    495c:	6cdf      	mov      	r3, r7
+    495e:	7489      	zexth      	r2, r2
+    4960:	3700      	movi      	r7, 0
+    4962:	649c      	cmphs      	r7, r2
+    4964:	0c36      	bf      	0x49d0	// 49d0 <RC522_PcdComMF522+0xb4>
+	RC522_WriteRawRC(CommandReg,Command);
+    4966:	6c57      	mov      	r1, r5
+    4968:	3001      	movi      	r0, 1
+    496a:	e3fffec7 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    496e:	3d4c      	cmpnei      	r5, 12
+    4970:	0805      	bt      	0x497a	// 497a <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    4972:	3180      	movi      	r1, 128
+    4974:	300d      	movi      	r0, 13
+    4976:	e3fffeff 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    497a:	33fa      	movi      	r3, 250
+    497c:	4363      	lsli      	r3, r3, 3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    497e:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4980:	3004      	movi      	r0, 4
+    4982:	b862      	st.w      	r3, (r14, 0x8)
+    4984:	e3fffe9e 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+		i--;
+    4988:	9862      	ld.w      	r3, (r14, 0x8)
+    498a:	2b00      	subi      	r3, 1
+    498c:	74cd      	zexth      	r3, r3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    498e:	3b40      	cmpnei      	r3, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4990:	6dc3      	mov      	r7, r0
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4992:	0c05      	bf      	0x499c	// 499c <RC522_PcdComMF522+0x80>
+    4994:	6c83      	mov      	r2, r0
+    4996:	6898      	and      	r2, r6
+    4998:	3a40      	cmpnei      	r2, 0
+    499a:	0ff3      	bf      	0x4980	// 4980 <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    499c:	3180      	movi      	r1, 128
+    499e:	300d      	movi      	r0, 13
+    49a0:	b862      	st.w      	r3, (r14, 0x8)
+    49a2:	e3ffff02 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+	if(i!=0)
+    49a6:	9862      	ld.w      	r3, (r14, 0x8)
+    49a8:	3b40      	cmpnei      	r3, 0
+    49aa:	081f      	bt      	0x49e8	// 49e8 <RC522_PcdComMF522+0xcc>
+    char stats=MI_ERR;
+    49ac:	3702      	movi      	r7, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    49ae:	3180      	movi      	r1, 128
+    49b0:	300c      	movi      	r0, 12
+    49b2:	e3fffee1 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    49b6:	3100      	movi      	r1, 0
+    49b8:	3001      	movi      	r0, 1
+    49ba:	e3fffe9f 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    49be:	6c1f      	mov      	r0, r7
+    49c0:	1404      	addi      	r14, r14, 16
+    49c2:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    49c4:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    49c6:	3477      	movi      	r4, 119
+        break;
+    49c8:	07b7      	br      	0x4936	// 4936 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    49ca:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    49cc:	3412      	movi      	r4, 18
+    49ce:	07b4      	br      	0x4936	// 4936 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49d0:	8320      	ld.b      	r1, (r3, 0x0)
+    49d2:	3009      	movi      	r0, 9
+    49d4:	b843      	st.w      	r2, (r14, 0xc)
+    49d6:	b862      	st.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    49d8:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49da:	e3fffe8f 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    49de:	9862      	ld.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    49e0:	75dd      	zexth      	r7, r7
+    49e2:	2300      	addi      	r3, 1
+    49e4:	9843      	ld.w      	r2, (r14, 0xc)
+    49e6:	07be      	br      	0x4962	// 4962 <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    49e8:	3006      	movi      	r0, 6
+    49ea:	e3fffe6b 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    49ee:	331b      	movi      	r3, 27
+    49f0:	680c      	and      	r0, r3
+    49f2:	3840      	cmpnei      	r0, 0
+    49f4:	0bdc      	bt      	0x49ac	// 49ac <RC522_PcdComMF522+0x90>
+            stats=MI_OK;
+    49f6:	3301      	movi      	r3, 1
+    49f8:	690c      	and      	r4, r3
+            if(Command==PCD_TRANSCEIVE)
+    49fa:	3d4c      	cmpnei      	r5, 12
+            stats=MI_OK;
+    49fc:	69d0      	and      	r7, r4
+            if(Command==PCD_TRANSCEIVE)
+    49fe:	0bd8      	bt      	0x49ae	// 49ae <RC522_PcdComMF522+0x92>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    4a00:	300a      	movi      	r0, 10
+    4a02:	e3fffe5f 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4a06:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4a08:	300c      	movi      	r0, 12
+    4a0a:	e3fffe5b 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4a0e:	3307      	movi      	r3, 7
+    4a10:	680c      	and      	r0, r3
+                if(lastBits)
+    4a12:	3840      	cmpnei      	r0, 0
+    4a14:	0c1b      	bf      	0x4a4a	// 4a4a <RC522_PcdComMF522+0x12e>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    4a16:	5c63      	subi      	r3, r4, 1
+    4a18:	4363      	lsli      	r3, r3, 3
+    4a1a:	600c      	addu      	r0, r3
+    4a1c:	9860      	ld.w      	r3, (r14, 0x0)
+    4a1e:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    4a20:	3c40      	cmpnei      	r4, 0
+    4a22:	0c18      	bf      	0x4a52	// 4a52 <RC522_PcdComMF522+0x136>
+    4a24:	6cd3      	mov      	r3, r4
+    4a26:	7510      	zextb      	r4, r4
+    4a28:	3c12      	cmphsi      	r4, 19
+    4a2a:	0c02      	bf      	0x4a2e	// 4a2e <RC522_PcdComMF522+0x112>
+    4a2c:	3312      	movi      	r3, 18
+    4a2e:	74cc      	zextb      	r3, r3
+    4a30:	98c1      	ld.w      	r6, (r14, 0x4)
+                for(i=0; i<n; i++)
+    4a32:	3500      	movi      	r5, 0
+    4a34:	750d      	zexth      	r4, r3
+    4a36:	6514      	cmphs      	r5, r4
+    4a38:	0bbb      	bt      	0x49ae	// 49ae <RC522_PcdComMF522+0x92>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a3a:	3009      	movi      	r0, 9
+    4a3c:	e3fffe42 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    4a40:	2500      	addi      	r5, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a42:	a600      	st.b      	r0, (r6, 0x0)
+                for(i=0; i<n; i++)
+    4a44:	7555      	zexth      	r5, r5
+    4a46:	2600      	addi      	r6, 1
+    4a48:	07f7      	br      	0x4a36	// 4a36 <RC522_PcdComMF522+0x11a>
+                    *pOutLenBit=n*8;
+    4a4a:	4463      	lsli      	r3, r4, 3
+    4a4c:	9840      	ld.w      	r2, (r14, 0x0)
+    4a4e:	a260      	st.b      	r3, (r2, 0x0)
+    4a50:	07e8      	br      	0x4a20	// 4a20 <RC522_PcdComMF522+0x104>
+                if(n==0)n=1;
+    4a52:	3301      	movi      	r3, 1
+    4a54:	07ee      	br      	0x4a30	// 4a30 <RC522_PcdComMF522+0x114>
+
+Disassembly of section .text.RC522_PcdSelect:
+
+00004a56 <RC522_PcdSelect>:
+{
+    4a56:	14d1      	push      	r4, r15
+    4a58:	1427      	subi      	r14, r14, 28
+    ucComMF522Buf[0]=PICC_ANTICOLL1;
+    4a5a:	3300      	movi      	r3, 0
+    4a5c:	2b6c      	subi      	r3, 109
+    4a5e:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x70;
+    4a62:	3370      	movi      	r3, 112
+    4a64:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    ucComMF522Buf[6]=0;
+    4a68:	3300      	movi      	r3, 0
+    4a6a:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    4a6e:	1a02      	addi      	r2, r14, 8
+    4a70:	582e      	addi      	r1, r0, 4
+        ucComMF522Buf[i+2]=*(pSnr+i);
+    4a72:	8060      	ld.b      	r3, (r0, 0x0)
+    4a74:	a262      	st.b      	r3, (r2, 0x2)
+        ucComMF522Buf[6]^=*(pSnr+i);
+    4a76:	d88e000e 	ld.b      	r4, (r14, 0xe)
+    4a7a:	2000      	addi      	r0, 1
+    4a7c:	6cd1      	xor      	r3, r4
+    for(i=0;i<4;i++)
+    4a7e:	6442      	cmpne      	r0, r1
+        ucComMF522Buf[6]^=*(pSnr+i);
+    4a80:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    4a84:	2200      	addi      	r2, 1
+    for(i=0;i<4;i++)
+    4a86:	0bf6      	bt      	0x4a72	// 4a72 <RC522_PcdSelect+0x1c>
+    RC522_CalulateCRC(ucComMF522Buf,7,&ucComMF522Buf[7]); //用MF522计算CRC16函数，校验数据
+    4a88:	1b02      	addi      	r3, r14, 8
+    4a8a:	5b5a      	addi      	r2, r3, 7
+    4a8c:	6c0f      	mov      	r0, r3
+    4a8e:	3107      	movi      	r1, 7
+    4a90:	e3fffe9c 	bsr      	0x47c8	// 47c8 <RC522_CalulateCRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    4a94:	3407      	movi      	r4, 7
+    RC522_ClearBitMask(Status2Reg,0x08);                    //清RC522寄存器位
+    4a96:	3108      	movi      	r1, 8
+    4a98:	3008      	movi      	r0, 8
+    4a9a:	e3fffe86 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    4a9e:	6138      	addu      	r4, r14
+    4aa0:	1b02      	addi      	r3, r14, 8
+    4aa2:	b880      	st.w      	r4, (r14, 0x0)
+    4aa4:	3209      	movi      	r2, 9
+    4aa6:	6c4f      	mov      	r1, r3
+    4aa8:	300c      	movi      	r0, 12
+    4aaa:	e3ffff39 	bsr      	0x491c	// 491c <RC522_PcdComMF522>
+    if((stats==MI_OK)&&(unLen==0x18))stats=MI_OK;
+    4aae:	3840      	cmpnei      	r0, 0
+    4ab0:	0806      	bt      	0x4abc	// 4abc <RC522_PcdSelect+0x66>
+    4ab2:	8460      	ld.b      	r3, (r4, 0x0)
+    4ab4:	3b58      	cmpnei      	r3, 24
+    4ab6:	0803      	bt      	0x4abc	// 4abc <RC522_PcdSelect+0x66>
+}
+    4ab8:	1407      	addi      	r14, r14, 28
+    4aba:	1491      	pop      	r4, r15
+    else stats=MI_ERR;
+    4abc:	3002      	movi      	r0, 2
+    4abe:	07fd      	br      	0x4ab8	// 4ab8 <RC522_PcdSelect+0x62>
+
+Disassembly of section .text.RC522_PcdAuthState:
+
+00004ac0 <RC522_PcdAuthState>:
+{
+    4ac0:	14d2      	push      	r4-r5, r15
+    4ac2:	1427      	subi      	r14, r14, 28
+    4ac4:	6d0f      	mov      	r4, r3
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    4ac6:	1b02      	addi      	r3, r14, 8
+{
+    4ac8:	6d47      	mov      	r5, r1
+    ucComMF522Buf[0]=auth_mode;
+    4aca:	dc0e0008 	st.b      	r0, (r14, 0x8)
+{
+    4ace:	6c4b      	mov      	r1, r2
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    4ad0:	5b06      	addi      	r0, r3, 2
+    4ad2:	3206      	movi      	r2, 6
+    ucComMF522Buf[1]=addr;
+    4ad4:	dcae0009 	st.b      	r5, (r14, 0x9)
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    4ad8:	e3ffe7e6 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    memcpy(&ucComMF522Buf[8],pSnr,4);
+    4adc:	1b02      	addi      	r3, r14, 8
+    4ade:	6c53      	mov      	r1, r4
+    4ae0:	5b1e      	addi      	r0, r3, 8
+    4ae2:	3204      	movi      	r2, 4
+    4ae4:	e3ffe7e0 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    4ae8:	3307      	movi      	r3, 7
+    4aea:	60f8      	addu      	r3, r14
+    4aec:	b860      	st.w      	r3, (r14, 0x0)
+    4aee:	1b02      	addi      	r3, r14, 8
+    4af0:	320c      	movi      	r2, 12
+    4af2:	6c4f      	mov      	r1, r3
+    4af4:	300e      	movi      	r0, 14
+    4af6:	e3ffff13 	bsr      	0x491c	// 491c <RC522_PcdComMF522>
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    4afa:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    4afc:	6d03      	mov      	r4, r0
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    4afe:	0809      	bt      	0x4b10	// 4b10 <RC522_PcdAuthState+0x50>
+    4b00:	3008      	movi      	r0, 8
+    4b02:	e3fffddf 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    4b06:	3308      	movi      	r3, 8
+    4b08:	680c      	and      	r0, r3
+    4b0a:	7400      	zextb      	r0, r0
+    4b0c:	3840      	cmpnei      	r0, 0
+    4b0e:	0802      	bt      	0x4b12	// 4b12 <RC522_PcdAuthState+0x52>
+    4b10:	3402      	movi      	r4, 2
+}
+    4b12:	6c13      	mov      	r0, r4
+    4b14:	1407      	addi      	r14, r14, 28
+    4b16:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00004b18 <RC522_PcdRequest>:
+{
+    4b18:	14d2      	push      	r4-r5, r15
+    4b1a:	1427      	subi      	r14, r14, 28
+    4b1c:	6d43      	mov      	r5, r0
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4b1e:	3212      	movi      	r2, 18
+{
+    4b20:	6d07      	mov      	r4, r1
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4b22:	1802      	addi      	r0, r14, 8
+    4b24:	3100      	movi      	r1, 0
+    4b26:	e3ffe77b 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    4b2a:	3108      	movi      	r1, 8
+    4b2c:	3008      	movi      	r0, 8
+    4b2e:	e3fffe3c 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    4b32:	3107      	movi      	r1, 7
+    4b34:	300d      	movi      	r0, 13
+    4b36:	e3fffde1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    4b3a:	3103      	movi      	r1, 3
+    4b3c:	3014      	movi      	r0, 20
+    4b3e:	e3fffe1b 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    4b42:	dcae0008 	st.b      	r5, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4b46:	3507      	movi      	r5, 7
+    4b48:	1b02      	addi      	r3, r14, 8
+    4b4a:	6178      	addu      	r5, r14
+    4b4c:	b8a0      	st.w      	r5, (r14, 0x0)
+    4b4e:	3201      	movi      	r2, 1
+    4b50:	6c4f      	mov      	r1, r3
+    4b52:	300c      	movi      	r0, 12
+    4b54:	e3fffee4 	bsr      	0x491c	// 491c <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    4b58:	3840      	cmpnei      	r0, 0
+    4b5a:	080c      	bt      	0x4b72	// 4b72 <RC522_PcdRequest+0x5a>
+    4b5c:	8560      	ld.b      	r3, (r5, 0x0)
+    4b5e:	3b50      	cmpnei      	r3, 16
+    4b60:	0809      	bt      	0x4b72	// 4b72 <RC522_PcdRequest+0x5a>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    4b62:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4b66:	a460      	st.b      	r3, (r4, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    4b68:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4b6c:	a461      	st.b      	r3, (r4, 0x1)
+}
+    4b6e:	1407      	addi      	r14, r14, 28
+    4b70:	1492      	pop      	r4-r5, r15
+        stats = MI_ERR;
+    4b72:	3002      	movi      	r0, 2
+    4b74:	07fd      	br      	0x4b6e	// 4b6e <RC522_PcdRequest+0x56>
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00004b76 <RC522_PcdAnticoll>:
+{
+    4b76:	14d2      	push      	r4-r5, r15
+    4b78:	1427      	subi      	r14, r14, 28
+    4b7a:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    4b7c:	3108      	movi      	r1, 8
+    4b7e:	3008      	movi      	r0, 8
+    4b80:	e3fffe13 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    4b84:	3100      	movi      	r1, 0
+    4b86:	300d      	movi      	r0, 13
+    4b88:	e3fffdb8 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    4b8c:	3180      	movi      	r1, 128
+    4b8e:	300e      	movi      	r0, 14
+    4b90:	e3fffe0b 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    4b94:	3300      	movi      	r3, 0
+    4b96:	2b6c      	subi      	r3, 109
+    4b98:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    4b9c:	3320      	movi      	r3, 32
+    4b9e:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4ba2:	3307      	movi      	r3, 7
+    4ba4:	60f8      	addu      	r3, r14
+    4ba6:	b860      	st.w      	r3, (r14, 0x0)
+    4ba8:	1b02      	addi      	r3, r14, 8
+    4baa:	3202      	movi      	r2, 2
+    4bac:	6c4f      	mov      	r1, r3
+    4bae:	300c      	movi      	r0, 12
+    4bb0:	e3fffeb6 	bsr      	0x491c	// 491c <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    4bb4:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4bb6:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    4bb8:	0812      	bt      	0x4bdc	// 4bdc <RC522_PcdAnticoll+0x66>
+    4bba:	3300      	movi      	r3, 0
+    4bbc:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    4bbe:	1902      	addi      	r1, r14, 8
+    4bc0:	604c      	addu      	r1, r3
+    4bc2:	8120      	ld.b      	r1, (r1, 0x0)
+    4bc4:	5d0c      	addu      	r0, r5, r3
+    4bc6:	2300      	addi      	r3, 1
+    4bc8:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    4bca:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    4bcc:	6c49      	xor      	r1, r2
+    4bce:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    4bd0:	0bf7      	bt      	0x4bbe	// 4bbe <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    4bd2:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    4bd6:	644e      	cmpne      	r3, r1
+    4bd8:	0c02      	bf      	0x4bdc	// 4bdc <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    4bda:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    4bdc:	3180      	movi      	r1, 128
+    4bde:	300e      	movi      	r0, 14
+    4be0:	e3fffdca 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+}
+    4be4:	6c13      	mov      	r0, r4
+    4be6:	1407      	addi      	r14, r14, 28
+    4be8:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+00004bec <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    4bec:	14d2      	push      	r4-r5, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    4bee:	112b      	lrw      	r1, 0x200000b4	// 4c98 <Card_Read_TasK+0xac>
+    4bf0:	114b      	lrw      	r2, 0x200002d4	// 4c9c <Card_Read_TasK+0xb0>
+    4bf2:	118c      	lrw      	r4, 0x20000414	// 4ca0 <Card_Read_TasK+0xb4>
+    4bf4:	9200      	ld.w      	r0, (r2, 0x0)
+    4bf6:	9160      	ld.w      	r3, (r1, 0x0)
+    4bf8:	60c2      	subu      	r3, r0
+    4bfa:	3063      	movi      	r0, 99
+    4bfc:	64c0      	cmphs      	r0, r3
+    4bfe:	082c      	bt      	0x4c56	// 4c56 <Card_Read_TasK+0x6a>
+        scan_tick = SysTick_1ms;
+    4c00:	9160      	ld.w      	r3, (r1, 0x0)
+		
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read");
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4c02:	3119      	movi      	r1, 25
+    4c04:	6050      	addu      	r1, r4
+    4c06:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    4c08:	b260      	st.w      	r3, (r2, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4c0a:	e3ffff87 	bsr      	0x4b18	// 4b18 <RC522_PcdRequest>
+    4c0e:	3520      	movi      	r5, 32
+    4c10:	3840      	cmpnei      	r0, 0
+    4c12:	6150      	addu      	r5, r4
+    4c14:	0836      	bt      	0x4c80	// 4c80 <Card_Read_TasK+0x94>
+            CardInfo.FailNum = 0x00;
+    4c16:	3300      	movi      	r3, 0
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    4c18:	1123      	lrw      	r1, 0x5f75	// 4ca4 <Card_Read_TasK+0xb8>
+            CardInfo.FailNum = 0x00;
+    4c1a:	a566      	st.b      	r3, (r5, 0x6)
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    4c1c:	e3fffcd2 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4c20:	301b      	movi      	r0, 27
+    4c22:	6010      	addu      	r0, r4
+    4c24:	e3ffffa9 	bsr      	0x4b76	// 4b76 <RC522_PcdAnticoll>
+    4c28:	3840      	cmpnei      	r0, 0
+    4c2a:	0829      	bt      	0x4c7c	// 4c7c <Card_Read_TasK+0x90>
+                //选定要进行操作的卡片
+                if(RC522_PcdSelect(CardInfo.SN)==MI_OK){
+    4c2c:	301b      	movi      	r0, 27
+    4c2e:	6010      	addu      	r0, r4
+    4c30:	e3ffff13 	bsr      	0x4a56	// 4a56 <RC522_PcdSelect>
+    4c34:	3840      	cmpnei      	r0, 0
+    4c36:	0821      	bt      	0x4c78	// 4c78 <Card_Read_TasK+0x8c>
+                    //验证卡片密码
+                    if(RC522_PcdAuthState(CardInfo.CardKeyType, CardInfo.BlockLoc, CardInfo.CardKey, CardInfo.SN)==MI_OK){
+    4c38:	331b      	movi      	r3, 27
+    4c3a:	8428      	ld.b      	r1, (r4, 0x8)
+    4c3c:	841f      	ld.b      	r0, (r4, 0x1f)
+    4c3e:	60d0      	addu      	r3, r4
+    4c40:	6c97      	mov      	r2, r5
+    4c42:	e3ffff3f 	bsr      	0x4ac0	// 4ac0 <RC522_PcdAuthState>
+    4c46:	3840      	cmpnei      	r0, 0
+    4c48:	0813      	bt      	0x4c6e	// 4c6e <Card_Read_TasK+0x82>
+                        //读取指定块的数据
+//                        if(RC522_PcdRead(CardInfo.BlockLoc, CardInfo.CradDataBuf)==MI_OK)
+						{
+
+                            Dbg_Println(DBG_BIT_SYS_STATUS, "Card Block %d",CardInfo.BlockLoc);
+    4c4a:	8448      	ld.b      	r2, (r4, 0x8)
+    4c4c:	1037      	lrw      	r1, 0x5f85	// 4ca8 <Card_Read_TasK+0xbc>
+    4c4e:	e3fffcb9 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+                            //Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "Card Data",CardInfo.CradDataBuf,BLOCK_HAVE_BYTE);
+							
+							CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    4c52:	3301      	movi      	r3, 1
+    4c54:	a467      	st.b      	r3, (r4, 0x7)
+                CardInfo.FailNum++;
+            }
+        }
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    4c56:	8467      	ld.b      	r3, (r4, 0x7)
+    4c58:	8446      	ld.b      	r2, (r4, 0x6)
+    4c5a:	64ca      	cmpne      	r2, r3
+    4c5c:	0c08      	bf      	0x4c6c	// 4c6c <Card_Read_TasK+0x80>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4c5e:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    4c60:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4c62:	0805      	bt      	0x4c6c	// 4c6c <Card_Read_TasK+0x80>
+            
+			Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+    4c64:	1032      	lrw      	r1, 0x5fd7	// 4cac <Card_Read_TasK+0xc0>
+    4c66:	3000      	movi      	r0, 0
+    4c68:	e3fffcac 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+        }
+    }
+
+
+}
+    4c6c:	1492      	pop      	r4-r5, r15
+                        Dbg_Println(DBG_BIT_SYS_STATUS, "Card Key Error");
+    4c6e:	1031      	lrw      	r1, 0x5f93	// 4cb0 <Card_Read_TasK+0xc4>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4c70:	3000      	movi      	r0, 0
+    4c72:	e3fffca7 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+    4c76:	07f0      	br      	0x4c56	// 4c56 <Card_Read_TasK+0x6a>
+                    Dbg_Println(DBG_BIT_SYS_STATUS, "Card Select Error");
+    4c78:	102f      	lrw      	r1, 0x5fa2	// 4cb4 <Card_Read_TasK+0xc8>
+    4c7a:	07fb      	br      	0x4c70	// 4c70 <Card_Read_TasK+0x84>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4c7c:	102f      	lrw      	r1, 0x5fb4	// 4cb8 <Card_Read_TasK+0xcc>
+    4c7e:	07f9      	br      	0x4c70	// 4c70 <Card_Read_TasK+0x84>
+            if(CardInfo.FailNum >= 5){
+    4c80:	8566      	ld.b      	r3, (r5, 0x6)
+    4c82:	3b04      	cmphsi      	r3, 5
+    4c84:	0c07      	bf      	0x4c92	// 4c92 <Card_Read_TasK+0xa6>
+                CardInfo.FailNum = 0;
+    4c86:	3300      	movi      	r3, 0
+    4c88:	a566      	st.b      	r3, (r5, 0x6)
+				CardInfo.SuccNum = 0;
+    4c8a:	a567      	st.b      	r3, (r5, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    4c8c:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_FAILD");
+    4c8e:	102c      	lrw      	r1, 0x5fc6	// 4cbc <Card_Read_TasK+0xd0>
+    4c90:	07f0      	br      	0x4c70	// 4c70 <Card_Read_TasK+0x84>
+                CardInfo.FailNum++;
+    4c92:	2300      	addi      	r3, 1
+    4c94:	a566      	st.b      	r3, (r5, 0x6)
+    4c96:	07e0      	br      	0x4c56	// 4c56 <Card_Read_TasK+0x6a>
+    4c98:	200000b4 	.long	0x200000b4
+    4c9c:	200002d4 	.long	0x200002d4
+    4ca0:	20000414 	.long	0x20000414
+    4ca4:	00005f75 	.long	0x00005f75
+    4ca8:	00005f85 	.long	0x00005f85
+    4cac:	00005fd7 	.long	0x00005fd7
+    4cb0:	00005f93 	.long	0x00005f93
+    4cb4:	00005fa2 	.long	0x00005fa2
+    4cb8:	00005fb4 	.long	0x00005fb4
+    4cbc:	00005fc6 	.long	0x00005fc6
+
+Disassembly of section .text.RLY_Light_Ctrl.part.0:
+
+00004cc0 <RLY_Light_Ctrl.part.0>:
+	}
+}
+
+
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+    4cc0:	14d0      	push      	r15
+{
+	if(state == 0x01)
+	{
+		CTRL_RLY_ON;
+    4cc2:	1064      	lrw      	r3, 0x2000004c	// 4cd0 <RLY_Light_Ctrl.part.0+0x10>
+    4cc4:	3100      	movi      	r1, 0
+    4cc6:	9300      	ld.w      	r0, (r3, 0x0)
+    4cc8:	e3fff347 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	else if(state == 0x00)
+	{
+		CTRL_RLY_OFF;
+//		Ctrl_Backlight(1);
+	}
+}
+    4ccc:	1490      	pop      	r15
+    4cce:	0000      	bkpt
+    4cd0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00004cd4 <KEY1_LONG_PRESS_RELEASE_Handler>:
+
+
+U8_T LED_STATE = 0;
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    4cd4:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    4cd6:	1034      	lrw      	r1, 0x5fef	// 4d24 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    4cd8:	3000      	movi      	r0, 0
+    4cda:	e3fffc73 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4cde:	1073      	lrw      	r3, 0x20000414	// 4d28 <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    4ce0:	8367      	ld.b      	r3, (r3, 0x7)
+    4ce2:	3b40      	cmpnei      	r3, 0
+    4ce4:	1092      	lrw      	r4, 0x2000047c	// 4d2c <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    4ce6:	081b      	bt      	0x4d1c	// 4d1c <KEY1_LONG_PRESS_RELEASE_Handler+0x48>
+	{
+		if(READ_RLY_STATE != 0x00)
+    4ce8:	1072      	lrw      	r3, 0x2000004c	// 4d30 <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    4cea:	3100      	movi      	r1, 0
+    4cec:	9300      	ld.w      	r0, (r3, 0x0)
+    4cee:	e3fff34b 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4cf2:	3840      	cmpnei      	r0, 0
+    4cf4:	0c0a      	bf      	0x4d08	// 4d08 <KEY1_LONG_PRESS_RELEASE_Handler+0x34>
+    4cf6:	e3ffffe5 	bsr      	0x4cc0	// 4cc0 <RLY_Light_Ctrl.part.0>
+		{
+			RLY_Light_Ctrl(1);
+			LED_STATE = 4;
+    4cfa:	106f      	lrw      	r3, 0x200002d8	// 4d34 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    4cfc:	3204      	movi      	r2, 4
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4cfe:	102f      	lrw      	r1, 0x600a	// 4d38 <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    4d00:	3000      	movi      	r0, 0
+			LED_STATE = 4;
+    4d02:	a340      	st.b      	r2, (r3, 0x0)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4d04:	e3fffc5e 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    4d08:	106d      	lrw      	r3, 0x200000b4	// 4d3c <KEY1_LONG_PRESS_RELEASE_Handler+0x68>
+    4d0a:	104e      	lrw      	r2, 0x2000047d	// 4d40 <KEY1_LONG_PRESS_RELEASE_Handler+0x6c>
+    4d0c:	9360      	ld.w      	r3, (r3, 0x0)
+    4d0e:	4b28      	lsri      	r1, r3, 8
+    4d10:	a461      	st.b      	r3, (r4, 0x1)
+    4d12:	a221      	st.b      	r1, (r2, 0x1)
+    4d14:	4b30      	lsri      	r1, r3, 16
+    4d16:	4b78      	lsri      	r3, r3, 24
+    4d18:	a222      	st.b      	r1, (r2, 0x2)
+    4d1a:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    4d1c:	3302      	movi      	r3, 2
+    4d1e:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4d20:	1491      	pop      	r4, r15
+    4d22:	0000      	bkpt
+    4d24:	00005fef 	.long	0x00005fef
+    4d28:	20000414 	.long	0x20000414
+    4d2c:	2000047c 	.long	0x2000047c
+    4d30:	2000004c 	.long	0x2000004c
+    4d34:	200002d8 	.long	0x200002d8
+    4d38:	0000600a 	.long	0x0000600a
+    4d3c:	200000b4 	.long	0x200000b4
+    4d40:	2000047d 	.long	0x2000047d
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00004d44 <RLY_Light_Ctrl>:
+{
+    4d44:	14d0      	push      	r15
+	if(state == 0x01)
+    4d46:	3841      	cmpnei      	r0, 1
+    4d48:	0804      	bt      	0x4d50	// 4d50 <RLY_Light_Ctrl+0xc>
+    4d4a:	e3ffffbb 	bsr      	0x4cc0	// 4cc0 <RLY_Light_Ctrl.part.0>
+}
+    4d4e:	1490      	pop      	r15
+	else if(state == 0x00)
+    4d50:	3840      	cmpnei      	r0, 0
+    4d52:	0bfe      	bt      	0x4d4e	// 4d4e <RLY_Light_Ctrl+0xa>
+		CTRL_RLY_OFF;
+    4d54:	1063      	lrw      	r3, 0x2000004c	// 4d60 <RLY_Light_Ctrl+0x1c>
+    4d56:	3100      	movi      	r1, 0
+    4d58:	9300      	ld.w      	r0, (r3, 0x0)
+    4d5a:	e3fff2fa 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4d5e:	07f8      	br      	0x4d4e	// 4d4e <RLY_Light_Ctrl+0xa>
+    4d60:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Init:
+
+00004d64 <LogicCtrl_Init>:
+{
+    4d64:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    4d66:	108d      	lrw      	r4, 0x20000048	// 4d98 <LogicCtrl_Init+0x34>
+    4d68:	3200      	movi      	r2, 0
+    4d6a:	9400      	ld.w      	r0, (r4, 0x0)
+    4d6c:	3100      	movi      	r1, 0
+    4d6e:	e3fff26f 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_CARD_OUT;
+    4d72:	9400      	ld.w      	r0, (r4, 0x0)
+    4d74:	3100      	movi      	r1, 0
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    4d76:	108a      	lrw      	r4, 0x2000004c	// 4d9c <LogicCtrl_Init+0x38>
+	CTRL_CARD_OUT;
+    4d78:	e3fff2eb 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    4d7c:	3201      	movi      	r2, 1
+    4d7e:	9400      	ld.w      	r0, (r4, 0x0)
+    4d80:	310c      	movi      	r1, 12
+    4d82:	e3fff265 	bsr      	0x324c	// 324c <GPIO_Init>
+	g_read.Led_state = READ_LED_IN;
+    4d86:	9400      	ld.w      	r0, (r4, 0x0)
+    4d88:	310c      	movi      	r1, 12
+    4d8a:	e3fff2f5 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    4d8e:	1065      	lrw      	r3, 0x20000444	// 4da0 <LogicCtrl_Init+0x3c>
+	g_read.last_state = g_read.Led_state;
+    4d90:	a302      	st.b      	r0, (r3, 0x2)
+	g_read.Led_state = READ_LED_IN;
+    4d92:	a303      	st.b      	r0, (r3, 0x3)
+}
+    4d94:	1491      	pop      	r4, r15
+    4d96:	0000      	bkpt
+    4d98:	20000048 	.long	0x20000048
+    4d9c:	2000004c 	.long	0x2000004c
+    4da0:	20000444 	.long	0x20000444
+
+Disassembly of section .text.Debounce_Task:
+
+00004da4 <Debounce_Task>:
+void Debounce_Task(void){
+    4da4:	14d1      	push      	r4, r15
+	if (SysTick_1ms - g_read.read_tick >= 10) {
+    4da6:	1097      	lrw      	r4, 0x20000444	// 4e00 <Debounce_Task+0x5c>
+    4da8:	8445      	ld.b      	r2, (r4, 0x5)
+    4daa:	8464      	ld.b      	r3, (r4, 0x4)
+    4dac:	4248      	lsli      	r2, r2, 8
+    4dae:	6c8c      	or      	r2, r3
+    4db0:	8466      	ld.b      	r3, (r4, 0x6)
+    4db2:	4370      	lsli      	r3, r3, 16
+    4db4:	6c8c      	or      	r2, r3
+    4db6:	8467      	ld.b      	r3, (r4, 0x7)
+    4db8:	1013      	lrw      	r0, 0x200000b4	// 4e04 <Debounce_Task+0x60>
+    4dba:	4378      	lsli      	r3, r3, 24
+    4dbc:	9020      	ld.w      	r1, (r0, 0x0)
+    4dbe:	6cc8      	or      	r3, r2
+    4dc0:	604e      	subu      	r1, r3
+    4dc2:	3909      	cmphsi      	r1, 10
+    4dc4:	0c17      	bf      	0x4df2	// 4df2 <Debounce_Task+0x4e>
+		g_read.read_tick = SysTick_1ms;
+    4dc6:	9060      	ld.w      	r3, (r0, 0x0)
+    4dc8:	4b48      	lsri      	r2, r3, 8
+    4dca:	a464      	st.b      	r3, (r4, 0x4)
+    4dcc:	a445      	st.b      	r2, (r4, 0x5)
+    4dce:	4b50      	lsri      	r2, r3, 16
+    4dd0:	4b78      	lsri      	r3, r3, 24
+    4dd2:	a467      	st.b      	r3, (r4, 0x7)
+		g_read.read_state = READ_LED_IN;
+    4dd4:	310c      	movi      	r1, 12
+    4dd6:	106d      	lrw      	r3, 0x2000004c	// 4e08 <Debounce_Task+0x64>
+    4dd8:	9300      	ld.w      	r0, (r3, 0x0)
+		g_read.read_tick = SysTick_1ms;
+    4dda:	a446      	st.b      	r2, (r4, 0x6)
+		g_read.read_state = READ_LED_IN;
+    4ddc:	e3fff2cc 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+		if (g_read.read_state == g_read.last_state) {
+    4de0:	8442      	ld.b      	r2, (r4, 0x2)
+    4de2:	640a      	cmpne      	r2, r0
+		g_read.read_state = READ_LED_IN;
+    4de4:	a401      	st.b      	r0, (r4, 0x1)
+		if (g_read.read_state == g_read.last_state) {
+    4de6:	0809      	bt      	0x4df8	// 4df8 <Debounce_Task+0x54>
+			if (g_read.read_count < debounce_count) {
+    4de8:	8460      	ld.b      	r3, (r4, 0x0)
+    4dea:	3b02      	cmphsi      	r3, 3
+    4dec:	0804      	bt      	0x4df4	// 4df4 <Debounce_Task+0x50>
+				g_read.read_count++;
+    4dee:	2300      	addi      	r3, 1
+    4df0:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4df2:	1491      	pop      	r4, r15
+				g_read.Led_state = g_read.read_state;
+    4df4:	a443      	st.b      	r2, (r4, 0x3)
+    4df6:	07fe      	br      	0x4df2	// 4df2 <Debounce_Task+0x4e>
+			g_read.read_count=0;
+    4df8:	3300      	movi      	r3, 0
+    4dfa:	a460      	st.b      	r3, (r4, 0x0)
+			g_read.last_state = g_read.read_state;
+    4dfc:	a402      	st.b      	r0, (r4, 0x2)
+}
+    4dfe:	07fa      	br      	0x4df2	// 4df2 <Debounce_Task+0x4e>
+    4e00:	20000444 	.long	0x20000444
+    4e04:	200000b4 	.long	0x200000b4
+    4e08:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+00004e0c <LogicCtrl_Task>:
+{
+    4e0c:	14d2      	push      	r4-r5, r15
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 1))
+    4e0e:	107e      	lrw      	r3, 0x20000414	// 4e84 <LogicCtrl_Task+0x78>
+    4e10:	8347      	ld.b      	r2, (r3, 0x7)
+    4e12:	3a41      	cmpnei      	r2, 1
+    4e14:	6d0f      	mov      	r4, r3
+    4e16:	081f      	bt      	0x4e54	// 4e54 <LogicCtrl_Task+0x48>
+    4e18:	10bc      	lrw      	r5, 0x20000048	// 4e88 <LogicCtrl_Task+0x7c>
+    4e1a:	3100      	movi      	r1, 0
+    4e1c:	9500      	ld.w      	r0, (r5, 0x0)
+    4e1e:	e3fff2b3 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e22:	3841      	cmpnei      	r0, 1
+    4e24:	0818      	bt      	0x4e54	// 4e54 <LogicCtrl_Task+0x48>
+		CTRL_CARD_IN;
+    4e26:	9500      	ld.w      	r0, (r5, 0x0)
+    4e28:	3100      	movi      	r1, 0
+    4e2a:	e3fff296 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4e2e:	9500      	ld.w      	r0, (r5, 0x0)
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4e30:	3100      	movi      	r1, 0
+    4e32:	e3fff2a9 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e36:	6c83      	mov      	r2, r0
+    4e38:	1035      	lrw      	r1, 0x601c	// 4e8c <LogicCtrl_Task+0x80>
+    4e3a:	3000      	movi      	r0, 0
+    4e3c:	e3fffbc2 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+	if(g_read.Led_state == 0x00)
+    4e40:	1074      	lrw      	r3, 0x20000444	// 4e90 <LogicCtrl_Task+0x84>
+    4e42:	8363      	ld.b      	r3, (r3, 0x3)
+    4e44:	3b40      	cmpnei      	r3, 0
+    4e46:	0817      	bt      	0x4e74	// 4e74 <LogicCtrl_Task+0x68>
+        GPT0->CMPA = 2000;
+    4e48:	1073      	lrw      	r3, 0x20000024	// 4e94 <LogicCtrl_Task+0x88>
+    4e4a:	9340      	ld.w      	r2, (r3, 0x0)
+    4e4c:	33fa      	movi      	r3, 250
+    4e4e:	4363      	lsli      	r3, r3, 3
+    4e50:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    4e52:	1492      	pop      	r4-r5, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 0))
+    4e54:	8467      	ld.b      	r3, (r4, 0x7)
+    4e56:	3b40      	cmpnei      	r3, 0
+    4e58:	0bf4      	bt      	0x4e40	// 4e40 <LogicCtrl_Task+0x34>
+    4e5a:	108c      	lrw      	r4, 0x20000048	// 4e88 <LogicCtrl_Task+0x7c>
+    4e5c:	3100      	movi      	r1, 0
+    4e5e:	9400      	ld.w      	r0, (r4, 0x0)
+    4e60:	e3fff292 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e64:	3840      	cmpnei      	r0, 0
+    4e66:	0bed      	bt      	0x4e40	// 4e40 <LogicCtrl_Task+0x34>
+		CTRL_CARD_OUT;
+    4e68:	9400      	ld.w      	r0, (r4, 0x0)
+    4e6a:	3100      	movi      	r1, 0
+    4e6c:	e3fff271 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4e70:	9400      	ld.w      	r0, (r4, 0x0)
+    4e72:	07df      	br      	0x4e30	// 4e30 <LogicCtrl_Task+0x24>
+	else if(g_read.Led_state == 0x01)
+    4e74:	3b41      	cmpnei      	r3, 1
+    4e76:	0bee      	bt      	0x4e52	// 4e52 <LogicCtrl_Task+0x46>
+        GPT0->CMPA = 0;
+    4e78:	1067      	lrw      	r3, 0x20000024	// 4e94 <LogicCtrl_Task+0x88>
+    4e7a:	3200      	movi      	r2, 0
+    4e7c:	9360      	ld.w      	r3, (r3, 0x0)
+    4e7e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4e80:	07e9      	br      	0x4e52	// 4e52 <LogicCtrl_Task+0x46>
+    4e82:	0000      	bkpt
+    4e84:	20000414 	.long	0x20000414
+    4e88:	20000048 	.long	0x20000048
+    4e8c:	0000601c 	.long	0x0000601c
+    4e90:	20000444 	.long	0x20000444
+    4e94:	20000024 	.long	0x20000024
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00004e98 <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    4e98:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOA0,RLY_OUT_PIN,Output);			
+    4e9a:	1097      	lrw      	r4, 0x2000004c	// 4ef4 <LogicCtrl_NoRF_Init+0x5c>
+    4e9c:	3200      	movi      	r2, 0
+    4e9e:	9400      	ld.w      	r0, (r4, 0x0)
+    4ea0:	3100      	movi      	r1, 0
+    4ea2:	e3fff1d5 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_RLY_OFF;
+    4ea6:	9400      	ld.w      	r0, (r4, 0x0)
+    4ea8:	3100      	movi      	r1, 0
+    4eaa:	e3fff252 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    4eae:	3209      	movi      	r2, 9
+    4eb0:	3100      	movi      	r1, 0
+    4eb2:	1012      	lrw      	r0, 0x2000047c	// 4ef8 <LogicCtrl_NoRF_Init+0x60>
+    4eb4:	e3ffe5b4 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    4eb8:	9400      	ld.w      	r0, (r4, 0x0)
+    4eba:	3201      	movi      	r2, 1
+    4ebc:	3101      	movi      	r1, 1
+    4ebe:	e3fff1c7 	bsr      	0x324c	// 324c <GPIO_Init>
+	
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4ec2:	3200      	movi      	r2, 0
+    4ec4:	9400      	ld.w      	r0, (r4, 0x0)
+    4ec6:	310c      	movi      	r1, 12
+    4ec8:	e3fff1c2 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4ecc:	9400      	ld.w      	r0, (r4, 0x0)
+    4ece:	310c      	movi      	r1, 12
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4ed0:	108b      	lrw      	r4, 0x2000044c	// 4efc <LogicCtrl_NoRF_Init+0x64>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4ed2:	e3fff242 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4ed6:	3301      	movi      	r3, 1
+    4ed8:	6c13      	mov      	r0, r4
+    4eda:	3200      	movi      	r2, 0
+    4edc:	1029      	lrw      	r1, 0x5290	// 4f00 <LogicCtrl_NoRF_Init+0x68>
+    4ede:	e0000107 	bsr      	0x50ec	// 50ec <button_init>
+	
+//	button_attach(&KEY1, LONG_PRESS_START, KEY1_LONG_PRESS_START_Handler);
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    4ee2:	1049      	lrw      	r2, 0x4cd4	// 4f04 <LogicCtrl_NoRF_Init+0x6c>
+    4ee4:	3107      	movi      	r1, 7
+    4ee6:	6c13      	mov      	r0, r4
+    4ee8:	e000011f 	bsr      	0x5126	// 5126 <button_attach>
+	button_start(&KEY1);
+    4eec:	6c13      	mov      	r0, r4
+    4eee:	e00001b1 	bsr      	0x5250	// 5250 <button_start>
+}
+    4ef2:	1491      	pop      	r4, r15
+    4ef4:	2000004c 	.long	0x2000004c
+    4ef8:	2000047c 	.long	0x2000047c
+    4efc:	2000044c 	.long	0x2000044c
+    4f00:	00005290 	.long	0x00005290
+    4f04:	00004cd4 	.long	0x00004cd4
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+00004f08 <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    4f08:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+	
+	if(SysTick_1ms - test_tick > 5)
+    4f0a:	11ab      	lrw      	r5, 0x200000b4	// 4fb4 <LogicCtrl_NoRF_Task+0xac>
+    4f0c:	118b      	lrw      	r4, 0x200002d8	// 4fb8 <LogicCtrl_NoRF_Task+0xb0>
+    4f0e:	9560      	ld.w      	r3, (r5, 0x0)
+    4f10:	9441      	ld.w      	r2, (r4, 0x4)
+    4f12:	60ca      	subu      	r3, r2
+    4f14:	3b05      	cmphsi      	r3, 6
+    4f16:	0c05      	bf      	0x4f20	// 4f20 <LogicCtrl_NoRF_Task+0x18>
+	{
+		test_tick = SysTick_1ms;
+    4f18:	9560      	ld.w      	r3, (r5, 0x0)
+    4f1a:	b461      	st.w      	r3, (r4, 0x4)
+		button_ticks();
+    4f1c:	e00001ac 	bsr      	0x5274	// 5274 <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    4f20:	11c7      	lrw      	r6, 0x20000414	// 4fbc <LogicCtrl_NoRF_Task+0xb4>
+    4f22:	8667      	ld.b      	r3, (r6, 0x7)
+    4f24:	3b41      	cmpnei      	r3, 1
+    4f26:	0833      	bt      	0x4f8c	// 4f8c <LogicCtrl_NoRF_Task+0x84>
+    4f28:	e3fffecc 	bsr      	0x4cc0	// 4cc0 <RLY_Light_Ctrl.part.0>
+	{
+		RLY_Light_Ctrl(1);
+		LED_STATE = 1;
+    4f2c:	3301      	movi      	r3, 1
+    4f2e:	a460      	st.b      	r3, (r4, 0x0)
+		card_tick = SysTick_1ms;
+    4f30:	9560      	ld.w      	r3, (r5, 0x0)
+    4f32:	b462      	st.w      	r3, (r4, 0x8)
+		dm_in.DM_State = 0x00;
+    4f34:	3200      	movi      	r2, 0
+    4f36:	1163      	lrw      	r3, 0x2000047c	// 4fc0 <LogicCtrl_NoRF_Task+0xb8>
+    4f38:	a340      	st.b      	r2, (r3, 0x0)
+		LED_STATE =2;
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card OUT RLY OFF");
+	}
+	
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4f3a:	8667      	ld.b      	r3, (r6, 0x7)
+    4f3c:	3b40      	cmpnei      	r3, 0
+    4f3e:	0826      	bt      	0x4f8a	// 4f8a <LogicCtrl_NoRF_Task+0x82>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    4f40:	1160      	lrw      	r3, 0x2000047c	// 4fc0 <LogicCtrl_NoRF_Task+0xb8>
+    4f42:	8340      	ld.b      	r2, (r3, 0x0)
+    4f44:	3a42      	cmpnei      	r2, 2
+    4f46:	0822      	bt      	0x4f8a	// 4f8a <LogicCtrl_NoRF_Task+0x82>
+    4f48:	8322      	ld.b      	r1, (r3, 0x2)
+    4f4a:	8341      	ld.b      	r2, (r3, 0x1)
+    4f4c:	4128      	lsli      	r1, r1, 8
+    4f4e:	6c48      	or      	r1, r2
+    4f50:	8343      	ld.b      	r2, (r3, 0x3)
+    4f52:	4250      	lsli      	r2, r2, 16
+    4f54:	6c48      	or      	r1, r2
+    4f56:	8344      	ld.b      	r2, (r3, 0x4)
+    4f58:	4258      	lsli      	r2, r2, 24
+    4f5a:	6c84      	or      	r2, r1
+    4f5c:	9500      	ld.w      	r0, (r5, 0x0)
+    4f5e:	600a      	subu      	r0, r2
+    4f60:	1059      	lrw      	r2, 0x752f	// 4fc4 <LogicCtrl_NoRF_Task+0xbc>
+    4f62:	6408      	cmphs      	r2, r0
+    4f64:	0813      	bt      	0x4f8a	// 4f8a <LogicCtrl_NoRF_Task+0x82>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    4f66:	9540      	ld.w      	r2, (r5, 0x0)
+    4f68:	5b22      	addi      	r1, r3, 1
+    4f6a:	a341      	st.b      	r2, (r3, 0x1)
+    4f6c:	4a68      	lsri      	r3, r2, 8
+    4f6e:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    4f70:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    4f72:	4a70      	lsri      	r3, r2, 16
+    4f74:	4a58      	lsri      	r2, r2, 24
+    4f76:	a162      	st.b      	r3, (r1, 0x2)
+    4f78:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    4f7a:	e3fffee5 	bsr      	0x4d44	// 4d44 <RLY_Light_Ctrl>
+			LED_STATE = 3;
+    4f7e:	3303      	movi      	r3, 3
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    4f80:	1032      	lrw      	r1, 0x6041	// 4fc8 <LogicCtrl_NoRF_Task+0xc0>
+    4f82:	3000      	movi      	r0, 0
+			LED_STATE = 3;
+    4f84:	a460      	st.b      	r3, (r4, 0x0)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    4f86:	e3fffb1d 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+	}
+}
+    4f8a:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= 40000))
+    4f8c:	3b40      	cmpnei      	r3, 0
+    4f8e:	0bd6      	bt      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+    4f90:	106c      	lrw      	r3, 0x2000047c	// 4fc0 <LogicCtrl_NoRF_Task+0xb8>
+    4f92:	8360      	ld.b      	r3, (r3, 0x0)
+    4f94:	3b40      	cmpnei      	r3, 0
+    4f96:	0bd2      	bt      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+    4f98:	9442      	ld.w      	r2, (r4, 0x8)
+    4f9a:	9560      	ld.w      	r3, (r5, 0x0)
+    4f9c:	60ca      	subu      	r3, r2
+    4f9e:	104c      	lrw      	r2, 0x9c3f	// 4fcc <LogicCtrl_NoRF_Task+0xc4>
+    4fa0:	64c8      	cmphs      	r2, r3
+    4fa2:	0bcc      	bt      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+		card_tick = SysTick_1ms;
+    4fa4:	9560      	ld.w      	r3, (r5, 0x0)
+		RLY_Light_Ctrl(0);
+    4fa6:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    4fa8:	b462      	st.w      	r3, (r4, 0x8)
+		RLY_Light_Ctrl(0);
+    4faa:	e3fffecd 	bsr      	0x4d44	// 4d44 <RLY_Light_Ctrl>
+		LED_STATE =2;
+    4fae:	3302      	movi      	r3, 2
+    4fb0:	a460      	st.b      	r3, (r4, 0x0)
+    4fb2:	07c4      	br      	0x4f3a	// 4f3a <LogicCtrl_NoRF_Task+0x32>
+    4fb4:	200000b4 	.long	0x200000b4
+    4fb8:	200002d8 	.long	0x200002d8
+    4fbc:	20000414 	.long	0x20000414
+    4fc0:	2000047c 	.long	0x2000047c
+    4fc4:	0000752f 	.long	0x0000752f
+    4fc8:	00006041 	.long	0x00006041
+    4fcc:	00009c3f 	.long	0x00009c3f
+
+Disassembly of section .text.BackLight_Task:
+
+00004fd0 <BackLight_Task>:
+
+
+void BackLight_Task(void){
+	//无RF模块的背光灯控制
+	if (LED_STATE == 1) {
+    4fd0:	106b      	lrw      	r3, 0x200002d8	// 4ffc <BackLight_Task+0x2c>
+    4fd2:	8360      	ld.b      	r3, (r3, 0x0)
+    4fd4:	3b41      	cmpnei      	r3, 1
+    4fd6:	0806      	bt      	0x4fe2	// 4fe2 <BackLight_Task+0x12>
+        GPT0->CMPA = 0;
+    4fd8:	106a      	lrw      	r3, 0x20000024	// 5000 <BackLight_Task+0x30>
+    4fda:	3200      	movi      	r2, 0
+    4fdc:	9360      	ld.w      	r3, (r3, 0x0)
+    4fde:	b34b      	st.w      	r2, (r3, 0x2c)
+//	else if(g_read.Led_state == 0x01)
+//	{
+//		Ctrl_Backlight(0);     //关背光
+////		Dbg_Println(DBG_BIT_SYS_STATUS, "LogicCtrl_Task Backlight OFF");
+//	}
+}
+    4fe0:	0408      	br      	0x4ff0	// 4ff0 <BackLight_Task+0x20>
+	}else if (LED_STATE == 2) {
+    4fe2:	3b42      	cmpnei      	r3, 2
+    4fe4:	0807      	bt      	0x4ff2	// 4ff2 <BackLight_Task+0x22>
+        GPT0->CMPA = 2000;
+    4fe6:	1067      	lrw      	r3, 0x20000024	// 5000 <BackLight_Task+0x30>
+    4fe8:	9340      	ld.w      	r2, (r3, 0x0)
+    4fea:	33fa      	movi      	r3, 250
+    4fec:	4363      	lsli      	r3, r3, 3
+    4fee:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    4ff0:	783c      	jmp      	r15
+	}else if (LED_STATE == 3) {
+    4ff2:	3b43      	cmpnei      	r3, 3
+    4ff4:	0ff9      	bf      	0x4fe6	// 4fe6 <BackLight_Task+0x16>
+	}else if (LED_STATE == 4) {
+    4ff6:	3b44      	cmpnei      	r3, 4
+    4ff8:	0bfc      	bt      	0x4ff0	// 4ff0 <BackLight_Task+0x20>
+    4ffa:	07ef      	br      	0x4fd8	// 4fd8 <BackLight_Task+0x8>
+    4ffc:	200002d8 	.long	0x200002d8
+    5000:	20000024 	.long	0x20000024
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+00005004 <Detect_WIFI_Task>:
+
+void Detect_WIFI_Task(void){
+    5004:	14d1      	push      	r4, r15
+
+	if (finish_flag == 1) return;
+    5006:	107c      	lrw      	r3, 0x200000a2	// 5074 <Detect_WIFI_Task+0x70>
+    5008:	8340      	ld.b      	r2, (r3, 0x0)
+    500a:	3a41      	cmpnei      	r2, 1
+    500c:	0c1c      	bf      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+	
+	if (detect_count <10) {
+    500e:	109b      	lrw      	r4, 0x200000a8	// 5078 <Detect_WIFI_Task+0x74>
+    5010:	8440      	ld.b      	r2, (r4, 0x0)
+    5012:	3a09      	cmphsi      	r2, 10
+    5014:	081c      	bt      	0x504c	// 504c <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    5016:	103a      	lrw      	r1, 0x200000b4	// 507c <Detect_WIFI_Task+0x78>
+    5018:	105a      	lrw      	r2, 0x200000a4	// 5080 <Detect_WIFI_Task+0x7c>
+    501a:	9160      	ld.w      	r3, (r1, 0x0)
+    501c:	9200      	ld.w      	r0, (r2, 0x0)
+    501e:	60c2      	subu      	r3, r0
+    5020:	3b09      	cmphsi      	r3, 10
+    5022:	0c11      	bf      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    5024:	9160      	ld.w      	r3, (r1, 0x0)
+    5026:	b260      	st.w      	r3, (r2, 0x0)
+			
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    5028:	3102      	movi      	r1, 2
+    502a:	1077      	lrw      	r3, 0x20000048	// 5084 <Detect_WIFI_Task+0x80>
+    502c:	9300      	ld.w      	r0, (r3, 0x0)
+    502e:	e3fff1a3 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    5032:	1076      	lrw      	r3, 0x200000a0	// 5088 <Detect_WIFI_Task+0x84>
+    5034:	a300      	st.b      	r0, (r3, 0x0)
+			
+			if (last_state != rf_exist) {
+    5036:	1076      	lrw      	r3, 0x200000a1	// 508c <Detect_WIFI_Task+0x88>
+    5038:	8340      	ld.b      	r2, (r3, 0x0)
+    503a:	640a      	cmpne      	r2, r0
+    503c:	0c05      	bf      	0x5046	// 5046 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    503e:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    5040:	3300      	movi      	r3, 0
+			}else {
+				detect_count++;
+    5042:	a460      	st.b      	r3, (r4, 0x0)
+		{
+			LogicCtrl_Init();   
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+		}
+	}
+}
+    5044:	1491      	pop      	r4, r15
+				detect_count++;
+    5046:	8460      	ld.b      	r3, (r4, 0x0)
+    5048:	2300      	addi      	r3, 1
+    504a:	07fc      	br      	0x5042	// 5042 <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    504c:	3201      	movi      	r2, 1
+    504e:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    5050:	106e      	lrw      	r3, 0x200000a0	// 5088 <Detect_WIFI_Task+0x84>
+    5052:	8360      	ld.b      	r3, (r3, 0x0)
+    5054:	3b41      	cmpnei      	r3, 1
+    5056:	0808      	bt      	0x5066	// 5066 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    5058:	e3ffff20 	bsr      	0x4e98	// 4e98 <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    505c:	102d      	lrw      	r1, 0x6052	// 5090 <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    505e:	3000      	movi      	r0, 0
+    5060:	e3fffab0 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+    5064:	07f0      	br      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    5066:	3b40      	cmpnei      	r3, 0
+    5068:	0bee      	bt      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    506a:	e3fffe7d 	bsr      	0x4d64	// 4d64 <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    506e:	102a      	lrw      	r1, 0x6054	// 5094 <Detect_WIFI_Task+0x90>
+    5070:	07f7      	br      	0x505e	// 505e <Detect_WIFI_Task+0x5a>
+    5072:	0000      	bkpt
+    5074:	200000a2 	.long	0x200000a2
+    5078:	200000a8 	.long	0x200000a8
+    507c:	200000b4 	.long	0x200000b4
+    5080:	200000a4 	.long	0x200000a4
+    5084:	20000048 	.long	0x20000048
+    5088:	200000a0 	.long	0x200000a0
+    508c:	200000a1 	.long	0x200000a1
+    5090:	00006052 	.long	0x00006052
+    5094:	00006054 	.long	0x00006054
+
+Disassembly of section .text.DM_Led_Task:
+
+00005098 <DM_Led_Task>:
+
+void DM_Led_Task(void){
+    5098:	14d1      	push      	r4, r15
+//	if (dm_in.DM_State == 0x02) {      	//门磁开
+		if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) {
+    509a:	1051      	lrw      	r2, 0x2000047c	// 50dc <DM_Led_Task+0x44>
+    509c:	8226      	ld.b      	r1, (r2, 0x6)
+    509e:	8265      	ld.b      	r3, (r2, 0x5)
+    50a0:	4128      	lsli      	r1, r1, 8
+    50a2:	6c4c      	or      	r1, r3
+    50a4:	8267      	ld.b      	r3, (r2, 0x7)
+    50a6:	4370      	lsli      	r3, r3, 16
+    50a8:	6c4c      	or      	r1, r3
+    50aa:	8268      	ld.b      	r3, (r2, 0x8)
+    50ac:	108d      	lrw      	r4, 0x200000b4	// 50e0 <DM_Led_Task+0x48>
+    50ae:	4378      	lsli      	r3, r3, 24
+    50b0:	6cc4      	or      	r3, r1
+    50b2:	9400      	ld.w      	r0, (r4, 0x0)
+    50b4:	600e      	subu      	r0, r3
+    50b6:	106c      	lrw      	r3, 0x1f3	// 50e4 <DM_Led_Task+0x4c>
+    50b8:	640c      	cmphs      	r3, r0
+    50ba:	080f      	bt      	0x50d8	// 50d8 <DM_Led_Task+0x40>
+			dm_in.DM_Led_Tick = SysTick_1ms;
+    50bc:	9460      	ld.w      	r3, (r4, 0x0)
+    50be:	5a32      	addi      	r1, r2, 5
+    50c0:	a265      	st.b      	r3, (r2, 0x5)
+    50c2:	4b48      	lsri      	r2, r3, 8
+    50c4:	a141      	st.b      	r2, (r1, 0x1)
+    50c6:	4b50      	lsri      	r2, r3, 16
+    50c8:	4b78      	lsri      	r3, r3, 24
+    50ca:	a163      	st.b      	r3, (r1, 0x3)
+    50cc:	a142      	st.b      	r2, (r1, 0x2)
+			GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+    50ce:	310c      	movi      	r1, 12
+    50d0:	1066      	lrw      	r3, 0x2000004c	// 50e8 <DM_Led_Task+0x50>
+    50d2:	9300      	ld.w      	r0, (r3, 0x0)
+    50d4:	e3fff145 	bsr      	0x335e	// 335e <GPIO_Reverse>
+		}
+//	}else {
+//		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+//	}
+
+    50d8:	1491      	pop      	r4, r15
+    50da:	0000      	bkpt
+    50dc:	2000047c 	.long	0x2000047c
+    50e0:	200000b4 	.long	0x200000b4
+    50e4:	000001f3 	.long	0x000001f3
+    50e8:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.button_init:
+
+000050ec <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    50ec:	14d4      	push      	r4-r7, r15
+    50ee:	6dc7      	mov      	r7, r1
+    50f0:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    50f2:	3100      	movi      	r1, 0
+    50f4:	3230      	movi      	r2, 48
+{
+    50f6:	6d03      	mov      	r4, r0
+    50f8:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    50fa:	e3ffe491 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    50fe:	3300      	movi      	r3, 0
+    5100:	2b6f      	subi      	r3, 112
+    5102:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    5104:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    5106:	6c17      	mov      	r0, r5
+    5108:	7bdd      	jsr      	r7
+    510a:	8443      	ld.b      	r2, (r4, 0x3)
+    510c:	337f      	movi      	r3, 127
+    510e:	688c      	and      	r2, r3
+    5110:	4007      	lsli      	r0, r0, 7
+    5112:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    5114:	3201      	movi      	r2, 1
+    5116:	6988      	and      	r6, r2
+    5118:	7480      	zextb      	r2, r0
+    511a:	46c6      	lsli      	r6, r6, 6
+    511c:	3a86      	bclri      	r2, 6
+    511e:	6c98      	or      	r2, r6
+    5120:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    5122:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    5124:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+00005126 <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    5126:	2102      	addi      	r1, 3
+    5128:	4122      	lsli      	r1, r1, 2
+    512a:	6040      	addu      	r1, r0
+    512c:	b140      	st.w      	r2, (r1, 0x0)
+}
+    512e:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00005130 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    5130:	14d3      	push      	r4-r6, r15
+    5132:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    5134:	9462      	ld.w      	r3, (r4, 0x8)
+    5136:	8004      	ld.b      	r0, (r0, 0x4)
+    5138:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    513a:	8463      	ld.b      	r3, (r4, 0x3)
+    513c:	433d      	lsli      	r1, r3, 29
+    513e:	493d      	lsri      	r1, r1, 29
+    5140:	3940      	cmpnei      	r1, 0
+    5142:	0c04      	bf      	0x514a	// 514a <button_handler+0x1a>
+    5144:	8c40      	ld.h      	r2, (r4, 0x0)
+    5146:	2200      	addi      	r2, 1
+    5148:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    514a:	4b47      	lsri      	r2, r3, 7
+    514c:	640a      	cmpne      	r2, r0
+    514e:	0c21      	bf      	0x5190	// 5190 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    5150:	435a      	lsli      	r2, r3, 26
+    5152:	4a5d      	lsri      	r2, r2, 29
+    5154:	3507      	movi      	r5, 7
+    5156:	2200      	addi      	r2, 1
+    5158:	6894      	and      	r2, r5
+    515a:	7488      	zextb      	r2, r2
+    515c:	6948      	and      	r5, r2
+    515e:	45c3      	lsli      	r6, r5, 3
+    5160:	3538      	movi      	r5, 56
+    5162:	68d5      	andn      	r3, r5
+    5164:	6d8c      	or      	r6, r3
+    5166:	3a02      	cmphsi      	r2, 3
+    5168:	a4c3      	st.b      	r6, (r4, 0x3)
+    516a:	0c09      	bf      	0x517c	// 517c <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    516c:	4067      	lsli      	r3, r0, 7
+    516e:	327f      	movi      	r2, 127
+    5170:	8403      	ld.b      	r0, (r4, 0x3)
+    5172:	6808      	and      	r0, r2
+    5174:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    5176:	7400      	zextb      	r0, r0
+    5178:	6815      	andn      	r0, r5
+    517a:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    517c:	3941      	cmpnei      	r1, 1
+    517e:	0c2f      	bf      	0x51dc	// 51dc <button_handler+0xac>
+    5180:	3940      	cmpnei      	r1, 0
+    5182:	0c0b      	bf      	0x5198	// 5198 <button_handler+0x68>
+    5184:	3945      	cmpnei      	r1, 5
+    5186:	0c53      	bf      	0x522c	// 522c <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    5188:	8463      	ld.b      	r3, (r4, 0x3)
+    518a:	3207      	movi      	r2, 7
+    518c:	68c9      	andn      	r3, r2
+    518e:	0420      	br      	0x51ce	// 51ce <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    5190:	3238      	movi      	r2, 56
+    5192:	68c9      	andn      	r3, r2
+    5194:	a463      	st.b      	r3, (r4, 0x3)
+    5196:	07f3      	br      	0x517c	// 517c <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    5198:	8463      	ld.b      	r3, (r4, 0x3)
+    519a:	4359      	lsli      	r2, r3, 25
+    519c:	4a5f      	lsri      	r2, r2, 31
+    519e:	4b67      	lsri      	r3, r3, 7
+    51a0:	648e      	cmpne      	r3, r2
+    51a2:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    51a4:	320f      	movi      	r2, 15
+    51a6:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    51a8:	0815      	bt      	0x51d2	// 51d2 <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    51aa:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    51ac:	9463      	ld.w      	r3, (r4, 0xc)
+    51ae:	3b40      	cmpnei      	r3, 0
+    51b0:	0c03      	bf      	0x51b6	// 51b6 <button_handler+0x86>
+    51b2:	6c13      	mov      	r0, r4
+    51b4:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    51b6:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    51b8:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    51ba:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    51bc:	330f      	movi      	r3, 15
+    51be:	688d      	andn      	r2, r3
+    51c0:	3101      	movi      	r1, 1
+    51c2:	6c84      	or      	r2, r1
+    51c4:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    51c6:	8463      	ld.b      	r3, (r4, 0x3)
+    51c8:	3207      	movi      	r2, 7
+    51ca:	68c9      	andn      	r3, r2
+    51cc:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    51ce:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    51d0:	0405      	br      	0x51da	// 51da <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    51d2:	3200      	movi      	r2, 0
+    51d4:	2a6f      	subi      	r2, 112
+    51d6:	6cc8      	or      	r3, r2
+    51d8:	a462      	st.b      	r3, (r4, 0x2)
+}
+    51da:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    51dc:	8463      	ld.b      	r3, (r4, 0x3)
+    51de:	4359      	lsli      	r2, r3, 25
+    51e0:	4a5f      	lsri      	r2, r2, 31
+    51e2:	4b67      	lsri      	r3, r3, 7
+    51e4:	648e      	cmpne      	r3, r2
+    51e6:	0c0e      	bf      	0x5202	// 5202 <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    51e8:	8462      	ld.b      	r3, (r4, 0x2)
+    51ea:	320f      	movi      	r2, 15
+    51ec:	68c8      	and      	r3, r2
+    51ee:	3ba4      	bseti      	r3, 4
+    51f0:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    51f2:	9464      	ld.w      	r3, (r4, 0x10)
+    51f4:	3b40      	cmpnei      	r3, 0
+    51f6:	0c03      	bf      	0x51fc	// 51fc <button_handler+0xcc>
+    51f8:	6c13      	mov      	r0, r4
+    51fa:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    51fc:	3300      	movi      	r3, 0
+    51fe:	ac60      	st.h      	r3, (r4, 0x0)
+    5200:	07c4      	br      	0x5188	// 5188 <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    5202:	8c40      	ld.h      	r2, (r4, 0x0)
+    5204:	33c8      	movi      	r3, 200
+    5206:	648c      	cmphs      	r3, r2
+    5208:	0be9      	bt      	0x51da	// 51da <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    520a:	8462      	ld.b      	r3, (r4, 0x2)
+    520c:	320f      	movi      	r2, 15
+    520e:	68c8      	and      	r3, r2
+    5210:	3ba4      	bseti      	r3, 4
+    5212:	3ba6      	bseti      	r3, 6
+    5214:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    5216:	9468      	ld.w      	r3, (r4, 0x20)
+    5218:	3b40      	cmpnei      	r3, 0
+    521a:	0c03      	bf      	0x5220	// 5220 <button_handler+0xf0>
+    521c:	6c13      	mov      	r0, r4
+    521e:	7bcd      	jsr      	r3
+			handle->state = 5;
+    5220:	8463      	ld.b      	r3, (r4, 0x3)
+    5222:	3207      	movi      	r2, 7
+    5224:	68c9      	andn      	r3, r2
+    5226:	3ba0      	bseti      	r3, 0
+    5228:	3ba2      	bseti      	r3, 2
+    522a:	07d2      	br      	0x51ce	// 51ce <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    522c:	8463      	ld.b      	r3, (r4, 0x3)
+    522e:	4359      	lsli      	r2, r3, 25
+    5230:	4a5f      	lsri      	r2, r2, 31
+    5232:	4b67      	lsri      	r3, r3, 7
+    5234:	648e      	cmpne      	r3, r2
+    5236:	0fd2      	bf      	0x51da	// 51da <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    5238:	8462      	ld.b      	r3, (r4, 0x2)
+    523a:	320f      	movi      	r2, 15
+    523c:	68c8      	and      	r3, r2
+    523e:	3270      	movi      	r2, 112
+    5240:	6cc8      	or      	r3, r2
+    5242:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    5244:	946a      	ld.w      	r3, (r4, 0x28)
+    5246:	3b40      	cmpnei      	r3, 0
+    5248:	0fa0      	bf      	0x5188	// 5188 <button_handler+0x58>
+    524a:	6c13      	mov      	r0, r4
+    524c:	7bcd      	jsr      	r3
+    524e:	079d      	br      	0x5188	// 5188 <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00005250 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    5250:	1068      	lrw      	r3, 0x200002e4	// 5270 <button_start+0x20>
+    5252:	9320      	ld.w      	r1, (r3, 0x0)
+    5254:	6c87      	mov      	r2, r1
+	while(target) {
+    5256:	3a40      	cmpnei      	r2, 0
+    5258:	0805      	bt      	0x5262	// 5262 <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    525a:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    525c:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    525e:	3000      	movi      	r0, 0
+}
+    5260:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    5262:	640a      	cmpne      	r2, r0
+    5264:	0c03      	bf      	0x526a	// 526a <button_start+0x1a>
+		target = target->next;
+    5266:	924b      	ld.w      	r2, (r2, 0x2c)
+    5268:	07f7      	br      	0x5256	// 5256 <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    526a:	3000      	movi      	r0, 0
+    526c:	2800      	subi      	r0, 1
+    526e:	07f9      	br      	0x5260	// 5260 <button_start+0x10>
+    5270:	200002e4 	.long	0x200002e4
+
+Disassembly of section .text.button_ticks:
+
+00005274 <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    5274:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    5276:	1066      	lrw      	r3, 0x200002e4	// 528c <button_ticks+0x18>
+    5278:	9380      	ld.w      	r4, (r3, 0x0)
+    527a:	3c40      	cmpnei      	r4, 0
+    527c:	0802      	bt      	0x5280	// 5280 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    527e:	1491      	pop      	r4, r15
+		button_handler(target);
+    5280:	6c13      	mov      	r0, r4
+    5282:	e3ffff57 	bsr      	0x5130	// 5130 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    5286:	948b      	ld.w      	r4, (r4, 0x2c)
+    5288:	07f9      	br      	0x527a	// 527a <button_ticks+0x6>
+    528a:	0000      	bkpt
+    528c:	200002e4 	.long	0x200002e4
+
+Disassembly of section .text.read_button_GPIO:
+
+00005290 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    5290:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    5292:	1064      	lrw      	r3, 0x2000004c	// 52a0 <read_button_GPIO+0x10>
+{
+    5294:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    5296:	9300      	ld.w      	r0, (r3, 0x0)
+    5298:	e3fff06e 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+	return state;
+    529c:	1490      	pop      	r15
+    529e:	0000      	bkpt
+    52a0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+000052a4 <TK_Sampling_prog>:
+    52a4:	14c4      	push      	r4-r7
+    52a6:	1072      	lrw      	r3, 0x20000054	// 52ec <TK_Sampling_prog+0x48>
+    52a8:	1012      	lrw      	r0, 0x2000072e	// 52f0 <TK_Sampling_prog+0x4c>
+    52aa:	1093      	lrw      	r4, 0x2000059f	// 52f4 <TK_Sampling_prog+0x50>
+    52ac:	6d83      	mov      	r6, r0
+    52ae:	93a0      	ld.w      	r5, (r3, 0x0)
+    52b0:	3300      	movi      	r3, 0
+    52b2:	4342      	lsli      	r2, r3, 2
+    52b4:	6094      	addu      	r2, r5
+    52b6:	9220      	ld.w      	r1, (r2, 0x0)
+    52b8:	4341      	lsli      	r2, r3, 1
+    52ba:	6080      	addu      	r2, r0
+    52bc:	7445      	zexth      	r1, r1
+    52be:	aa20      	st.h      	r1, (r2, 0x0)
+    52c0:	8440      	ld.b      	r2, (r4, 0x0)
+    52c2:	3a41      	cmpnei      	r2, 1
+    52c4:	080f      	bt      	0x52e2	// 52e2 <TK_Sampling_prog+0x3e>
+    52c6:	3300      	movi      	r3, 0
+    52c8:	10ec      	lrw      	r7, 0x20000488	// 52f8 <TK_Sampling_prog+0x54>
+    52ca:	4341      	lsli      	r2, r3, 1
+    52cc:	5e28      	addu      	r1, r6, r2
+    52ce:	8920      	ld.h      	r1, (r1, 0x0)
+    52d0:	2300      	addi      	r3, 1
+    52d2:	7445      	zexth      	r1, r1
+    52d4:	609c      	addu      	r2, r7
+    52d6:	3b51      	cmpnei      	r3, 17
+    52d8:	aa20      	st.h      	r1, (r2, 0x0)
+    52da:	0bf8      	bt      	0x52ca	// 52ca <TK_Sampling_prog+0x26>
+    52dc:	3300      	movi      	r3, 0
+    52de:	a460      	st.b      	r3, (r4, 0x0)
+    52e0:	3311      	movi      	r3, 17
+    52e2:	2300      	addi      	r3, 1
+    52e4:	74cc      	zextb      	r3, r3
+    52e6:	3b10      	cmphsi      	r3, 17
+    52e8:	0fe5      	bf      	0x52b2	// 52b2 <TK_Sampling_prog+0xe>
+    52ea:	1484      	pop      	r4-r7
+    52ec:	20000054 	.long	0x20000054
+    52f0:	2000072e 	.long	0x2000072e
+    52f4:	2000059f 	.long	0x2000059f
+    52f8:	20000488 	.long	0x20000488
+
+Disassembly of section .text.TKEYIntHandler:
+
+000052fc <TKEYIntHandler>:
+    52fc:	1460      	nie
+    52fe:	1462      	ipush
+    5300:	14d1      	push      	r4, r15
+    5302:	109e      	lrw      	r4, 0x2000006c	// 5378 <TKEYIntHandler+0x7c>
+    5304:	9460      	ld.w      	r3, (r4, 0x0)
+    5306:	3b40      	cmpnei      	r3, 0
+    5308:	080b      	bt      	0x531e	// 531e <TKEYIntHandler+0x22>
+    530a:	3301      	movi      	r3, 1
+    530c:	b460      	st.w      	r3, (r4, 0x0)
+    530e:	107c      	lrw      	r3, 0x2000051c	// 537c <TKEYIntHandler+0x80>
+    5310:	8360      	ld.b      	r3, (r3, 0x0)
+    5312:	3b41      	cmpnei      	r3, 1
+    5314:	0805      	bt      	0x531e	// 531e <TKEYIntHandler+0x22>
+    5316:	e3ffffc7 	bsr      	0x52a4	// 52a4 <TK_Sampling_prog>
+    531a:	3301      	movi      	r3, 1
+    531c:	a464      	st.b      	r3, (r4, 0x4)
+    531e:	1079      	lrw      	r3, 0x20000058	// 5380 <TKEYIntHandler+0x84>
+    5320:	3101      	movi      	r1, 1
+    5322:	9360      	ld.w      	r3, (r3, 0x0)
+    5324:	934a      	ld.w      	r2, (r3, 0x28)
+    5326:	6884      	and      	r2, r1
+    5328:	3a40      	cmpnei      	r2, 0
+    532a:	0c02      	bf      	0x532e	// 532e <TKEYIntHandler+0x32>
+    532c:	b32c      	st.w      	r1, (r3, 0x30)
+    532e:	934a      	ld.w      	r2, (r3, 0x28)
+    5330:	3102      	movi      	r1, 2
+    5332:	6884      	and      	r2, r1
+    5334:	3a40      	cmpnei      	r2, 0
+    5336:	0c02      	bf      	0x533a	// 533a <TKEYIntHandler+0x3e>
+    5338:	b32c      	st.w      	r1, (r3, 0x30)
+    533a:	934a      	ld.w      	r2, (r3, 0x28)
+    533c:	3104      	movi      	r1, 4
+    533e:	6884      	and      	r2, r1
+    5340:	3a40      	cmpnei      	r2, 0
+    5342:	0c02      	bf      	0x5346	// 5346 <TKEYIntHandler+0x4a>
+    5344:	b32c      	st.w      	r1, (r3, 0x30)
+    5346:	934a      	ld.w      	r2, (r3, 0x28)
+    5348:	3108      	movi      	r1, 8
+    534a:	6884      	and      	r2, r1
+    534c:	3a40      	cmpnei      	r2, 0
+    534e:	0c02      	bf      	0x5352	// 5352 <TKEYIntHandler+0x56>
+    5350:	b32c      	st.w      	r1, (r3, 0x30)
+    5352:	934a      	ld.w      	r2, (r3, 0x28)
+    5354:	3110      	movi      	r1, 16
+    5356:	6884      	and      	r2, r1
+    5358:	3a40      	cmpnei      	r2, 0
+    535a:	0c02      	bf      	0x535e	// 535e <TKEYIntHandler+0x62>
+    535c:	b32c      	st.w      	r1, (r3, 0x30)
+    535e:	934a      	ld.w      	r2, (r3, 0x28)
+    5360:	3120      	movi      	r1, 32
+    5362:	6884      	and      	r2, r1
+    5364:	3a40      	cmpnei      	r2, 0
+    5366:	0c02      	bf      	0x536a	// 536a <TKEYIntHandler+0x6e>
+    5368:	b32c      	st.w      	r1, (r3, 0x30)
+    536a:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    536e:	9880      	ld.w      	r4, (r14, 0x0)
+    5370:	1402      	addi      	r14, r14, 8
+    5372:	1463      	ipop
+    5374:	1461      	nir
+    5376:	0000      	bkpt
+    5378:	2000006c 	.long	0x2000006c
+    537c:	2000051c 	.long	0x2000051c
+    5380:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+00005384 <get_key_number>:
+    5384:	14c2      	push      	r4-r5
+    5386:	3200      	movi      	r2, 0
+    5388:	3000      	movi      	r0, 0
+    538a:	1088      	lrw      	r4, 0x200005bc	// 53a8 <get_key_number+0x24>
+    538c:	3501      	movi      	r5, 1
+    538e:	3120      	movi      	r1, 32
+    5390:	9460      	ld.w      	r3, (r4, 0x0)
+    5392:	70c9      	lsr      	r3, r2
+    5394:	68d4      	and      	r3, r5
+    5396:	3b40      	cmpnei      	r3, 0
+    5398:	0c02      	bf      	0x539c	// 539c <get_key_number+0x18>
+    539a:	2000      	addi      	r0, 1
+    539c:	2200      	addi      	r2, 1
+    539e:	644a      	cmpne      	r2, r1
+    53a0:	0bf8      	bt      	0x5390	// 5390 <get_key_number+0xc>
+    53a2:	7400      	zextb      	r0, r0
+    53a4:	1482      	pop      	r4-r5
+    53a6:	0000      	bkpt
+    53a8:	200005bc 	.long	0x200005bc
+
+Disassembly of section .text.TK_Scan_Start:
+
+000053ac <TK_Scan_Start>:
+    53ac:	1046      	lrw      	r2, 0x2000006c	// 53c4 <TK_Scan_Start+0x18>
+    53ae:	8264      	ld.b      	r3, (r2, 0x4)
+    53b0:	74cc      	zextb      	r3, r3
+    53b2:	3b41      	cmpnei      	r3, 1
+    53b4:	0807      	bt      	0x53c2	// 53c2 <TK_Scan_Start+0x16>
+    53b6:	1025      	lrw      	r1, 0x20000058	// 53c8 <TK_Scan_Start+0x1c>
+    53b8:	9120      	ld.w      	r1, (r1, 0x0)
+    53ba:	b162      	st.w      	r3, (r1, 0x8)
+    53bc:	3300      	movi      	r3, 0
+    53be:	b260      	st.w      	r3, (r2, 0x0)
+    53c0:	a264      	st.b      	r3, (r2, 0x4)
+    53c2:	783c      	jmp      	r15
+    53c4:	2000006c 	.long	0x2000006c
+    53c8:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000053cc <TK_Keymap_prog>:
+    53cc:	14d4      	push      	r4-r7, r15
+    53ce:	1425      	subi      	r14, r14, 20
+    53d0:	1271      	lrw      	r3, 0x20000314	// 5514 <TK_Keymap_prog+0x148>
+    53d2:	8360      	ld.b      	r3, (r3, 0x0)
+    53d4:	b860      	st.w      	r3, (r14, 0x0)
+    53d6:	3400      	movi      	r4, 0
+    53d8:	1270      	lrw      	r3, 0x200002e8	// 5518 <TK_Keymap_prog+0x14c>
+    53da:	8360      	ld.b      	r3, (r3, 0x0)
+    53dc:	b861      	st.w      	r3, (r14, 0x4)
+    53de:	12f0      	lrw      	r7, 0x20000532	// 551c <TK_Keymap_prog+0x150>
+    53e0:	1270      	lrw      	r3, 0x200002f1	// 5520 <TK_Keymap_prog+0x154>
+    53e2:	83a0      	ld.b      	r5, (r3, 0x0)
+    53e4:	1270      	lrw      	r3, 0x200002f0	// 5524 <TK_Keymap_prog+0x158>
+    53e6:	8360      	ld.b      	r3, (r3, 0x0)
+    53e8:	b862      	st.w      	r3, (r14, 0x8)
+    53ea:	6d9f      	mov      	r6, r7
+    53ec:	126f      	lrw      	r3, 0x2000072e	// 5528 <TK_Keymap_prog+0x15c>
+    53ee:	b863      	st.w      	r3, (r14, 0xc)
+    53f0:	4461      	lsli      	r3, r4, 1
+    53f2:	9843      	ld.w      	r2, (r14, 0xc)
+    53f4:	608c      	addu      	r2, r3
+    53f6:	122e      	lrw      	r1, 0x20000488	// 552c <TK_Keymap_prog+0x160>
+    53f8:	604c      	addu      	r1, r3
+    53fa:	8a40      	ld.h      	r2, (r2, 0x0)
+    53fc:	8920      	ld.h      	r1, (r1, 0x0)
+    53fe:	6086      	subu      	r2, r1
+    5400:	748b      	sexth      	r2, r2
+    5402:	5f2c      	addu      	r1, r7, r3
+    5404:	a940      	st.h      	r2, (r1, 0x0)
+    5406:	8940      	ld.h      	r2, (r1, 0x0)
+    5408:	748b      	sexth      	r2, r2
+    540a:	3adf      	btsti      	r2, 31
+    540c:	1249      	lrw      	r2, 0x200006ea	// 5530 <TK_Keymap_prog+0x164>
+    540e:	608c      	addu      	r2, r3
+    5410:	0c37      	bf      	0x547e	// 547e <TK_Keymap_prog+0xb2>
+    5412:	3100      	movi      	r1, 0
+    5414:	aa20      	st.h      	r1, (r2, 0x0)
+    5416:	9840      	ld.w      	r2, (r14, 0x0)
+    5418:	3a01      	cmphsi      	r2, 2
+    541a:	0c6d      	bf      	0x54f4	// 54f4 <TK_Keymap_prog+0x128>
+    541c:	4461      	lsli      	r3, r4, 1
+    541e:	5e2c      	addu      	r1, r6, r3
+    5420:	1205      	lrw      	r0, 0x20000342	// 5534 <TK_Keymap_prog+0x168>
+    5422:	8940      	ld.h      	r2, (r1, 0x0)
+    5424:	60c0      	addu      	r3, r0
+    5426:	748b      	sexth      	r2, r2
+    5428:	8b60      	ld.h      	r3, (r3, 0x0)
+    542a:	648d      	cmplt      	r3, r2
+    542c:	9840      	ld.w      	r2, (r14, 0x0)
+    542e:	7cc8      	mult      	r3, r2
+    5430:	0c2a      	bf      	0x5484	// 5484 <TK_Keymap_prog+0xb8>
+    5432:	8940      	ld.h      	r2, (r1, 0x0)
+    5434:	748b      	sexth      	r2, r2
+    5436:	64c9      	cmplt      	r2, r3
+    5438:	0c26      	bf      	0x5484	// 5484 <TK_Keymap_prog+0xb8>
+    543a:	1240      	lrw      	r2, 0x20000520	// 5538 <TK_Keymap_prog+0x16c>
+    543c:	6090      	addu      	r2, r4
+    543e:	8260      	ld.b      	r3, (r2, 0x0)
+    5440:	2300      	addi      	r3, 1
+    5442:	74cc      	zextb      	r3, r3
+    5444:	a260      	st.b      	r3, (r2, 0x0)
+    5446:	3100      	movi      	r1, 0
+    5448:	117d      	lrw      	r3, 0x20000506	// 553c <TK_Keymap_prog+0x170>
+    544a:	60d0      	addu      	r3, r4
+    544c:	a320      	st.b      	r1, (r3, 0x0)
+    544e:	117d      	lrw      	r3, 0x200005e2	// 5540 <TK_Keymap_prog+0x174>
+    5450:	60d0      	addu      	r3, r4
+    5452:	a320      	st.b      	r1, (r3, 0x0)
+    5454:	117c      	lrw      	r3, 0x2000065c	// 5544 <TK_Keymap_prog+0x178>
+    5456:	60d0      	addu      	r3, r4
+    5458:	a320      	st.b      	r1, (r3, 0x0)
+    545a:	8260      	ld.b      	r3, (r2, 0x0)
+    545c:	9821      	ld.w      	r1, (r14, 0x4)
+    545e:	64c4      	cmphs      	r1, r3
+    5460:	081f      	bt      	0x549e	// 549e <TK_Keymap_prog+0xd2>
+    5462:	3d40      	cmpnei      	r5, 0
+    5464:	0852      	bt      	0x5508	// 5508 <TK_Keymap_prog+0x13c>
+    5466:	1139      	lrw      	r1, 0x20000518	// 5548 <TK_Keymap_prog+0x17c>
+    5468:	9160      	ld.w      	r3, (r1, 0x0)
+    546a:	3b40      	cmpnei      	r3, 0
+    546c:	0806      	bt      	0x5478	// 5478 <TK_Keymap_prog+0xac>
+    546e:	9100      	ld.w      	r0, (r1, 0x0)
+    5470:	3301      	movi      	r3, 1
+    5472:	70d0      	lsl      	r3, r4
+    5474:	6cc0      	or      	r3, r0
+    5476:	b160      	st.w      	r3, (r1, 0x0)
+    5478:	3300      	movi      	r3, 0
+    547a:	a260      	st.b      	r3, (r2, 0x0)
+    547c:	0411      	br      	0x549e	// 549e <TK_Keymap_prog+0xd2>
+    547e:	8920      	ld.h      	r1, (r1, 0x0)
+    5480:	7445      	zexth      	r1, r1
+    5482:	07c9      	br      	0x5414	// 5414 <TK_Keymap_prog+0x48>
+    5484:	4441      	lsli      	r2, r4, 1
+    5486:	6098      	addu      	r2, r6
+    5488:	8a40      	ld.h      	r2, (r2, 0x0)
+    548a:	748b      	sexth      	r2, r2
+    548c:	648d      	cmplt      	r3, r2
+    548e:	0c08      	bf      	0x549e	// 549e <TK_Keymap_prog+0xd2>
+    5490:	3300      	movi      	r3, 0
+    5492:	114e      	lrw      	r2, 0x20000518	// 5548 <TK_Keymap_prog+0x17c>
+    5494:	2b01      	subi      	r3, 2
+    5496:	9220      	ld.w      	r1, (r2, 0x0)
+    5498:	70d3      	rotl      	r3, r4
+    549a:	68c4      	and      	r3, r1
+    549c:	b260      	st.w      	r3, (r2, 0x0)
+    549e:	4441      	lsli      	r2, r4, 1
+    54a0:	5e68      	addu      	r3, r6, r2
+    54a2:	8b60      	ld.h      	r3, (r3, 0x0)
+    54a4:	74cf      	sexth      	r3, r3
+    54a6:	b864      	st.w      	r3, (r14, 0x10)
+    54a8:	3105      	movi      	r1, 5
+    54aa:	1163      	lrw      	r3, 0x20000342	// 5534 <TK_Keymap_prog+0x168>
+    54ac:	608c      	addu      	r2, r3
+    54ae:	8a00      	ld.h      	r0, (r2, 0x0)
+    54b0:	4002      	lsli      	r0, r0, 2
+    54b2:	e3fff79d 	bsr      	0x43ec	// 43ec <__divsi3>
+    54b6:	9864      	ld.w      	r3, (r14, 0x10)
+    54b8:	640d      	cmplt      	r3, r0
+    54ba:	0c18      	bf      	0x54ea	// 54ea <TK_Keymap_prog+0x11e>
+    54bc:	1140      	lrw      	r2, 0x20000506	// 553c <TK_Keymap_prog+0x170>
+    54be:	6090      	addu      	r2, r4
+    54c0:	8260      	ld.b      	r3, (r2, 0x0)
+    54c2:	2300      	addi      	r3, 1
+    54c4:	74cc      	zextb      	r3, r3
+    54c6:	a260      	st.b      	r3, (r2, 0x0)
+    54c8:	3100      	movi      	r1, 0
+    54ca:	107c      	lrw      	r3, 0x20000520	// 5538 <TK_Keymap_prog+0x16c>
+    54cc:	60d0      	addu      	r3, r4
+    54ce:	a320      	st.b      	r1, (r3, 0x0)
+    54d0:	8260      	ld.b      	r3, (r2, 0x0)
+    54d2:	9822      	ld.w      	r1, (r14, 0x8)
+    54d4:	64c4      	cmphs      	r1, r3
+    54d6:	080a      	bt      	0x54ea	// 54ea <TK_Keymap_prog+0x11e>
+    54d8:	3300      	movi      	r3, 0
+    54da:	103c      	lrw      	r1, 0x20000518	// 5548 <TK_Keymap_prog+0x17c>
+    54dc:	2b01      	subi      	r3, 2
+    54de:	9100      	ld.w      	r0, (r1, 0x0)
+    54e0:	70d3      	rotl      	r3, r4
+    54e2:	68c0      	and      	r3, r0
+    54e4:	b160      	st.w      	r3, (r1, 0x0)
+    54e6:	3300      	movi      	r3, 0
+    54e8:	a260      	st.b      	r3, (r2, 0x0)
+    54ea:	2400      	addi      	r4, 1
+    54ec:	3c51      	cmpnei      	r4, 17
+    54ee:	0b81      	bt      	0x53f0	// 53f0 <TK_Keymap_prog+0x24>
+    54f0:	1405      	addi      	r14, r14, 20
+    54f2:	1494      	pop      	r4-r7, r15
+    54f4:	60d8      	addu      	r3, r6
+    54f6:	4441      	lsli      	r2, r4, 1
+    54f8:	102f      	lrw      	r1, 0x20000342	// 5534 <TK_Keymap_prog+0x168>
+    54fa:	8b60      	ld.h      	r3, (r3, 0x0)
+    54fc:	6084      	addu      	r2, r1
+    54fe:	74cf      	sexth      	r3, r3
+    5500:	8a40      	ld.h      	r2, (r2, 0x0)
+    5502:	64c9      	cmplt      	r2, r3
+    5504:	0fcd      	bf      	0x549e	// 549e <TK_Keymap_prog+0xd2>
+    5506:	079a      	br      	0x543a	// 543a <TK_Keymap_prog+0x6e>
+    5508:	3d41      	cmpnei      	r5, 1
+    550a:	0bb7      	bt      	0x5478	// 5478 <TK_Keymap_prog+0xac>
+    550c:	102f      	lrw      	r1, 0x20000518	// 5548 <TK_Keymap_prog+0x17c>
+    550e:	6cd7      	mov      	r3, r5
+    5510:	9100      	ld.w      	r0, (r1, 0x0)
+    5512:	07b0      	br      	0x5472	// 5472 <TK_Keymap_prog+0xa6>
+    5514:	20000314 	.long	0x20000314
+    5518:	200002e8 	.long	0x200002e8
+    551c:	20000532 	.long	0x20000532
+    5520:	200002f1 	.long	0x200002f1
+    5524:	200002f0 	.long	0x200002f0
+    5528:	2000072e 	.long	0x2000072e
+    552c:	20000488 	.long	0x20000488
+    5530:	200006ea 	.long	0x200006ea
+    5534:	20000342 	.long	0x20000342
+    5538:	20000520 	.long	0x20000520
+    553c:	20000506 	.long	0x20000506
+    5540:	200005e2 	.long	0x200005e2
+    5544:	2000065c 	.long	0x2000065c
+    5548:	20000518 	.long	0x20000518
+
+Disassembly of section .text.TK_overflow_predict:
+
+0000554c <TK_overflow_predict>:
+    554c:	14d4      	push      	r4-r7, r15
+    554e:	1421      	subi      	r14, r14, 4
+    5550:	11d9      	lrw      	r6, 0x2000006c	// 5634 <TK_overflow_predict+0xe8>
+    5552:	8665      	ld.b      	r3, (r6, 0x5)
+    5554:	3b41      	cmpnei      	r3, 1
+    5556:	085f      	bt      	0x5614	// 5614 <TK_overflow_predict+0xc8>
+    5558:	1158      	lrw      	r2, 0x20000638	// 5638 <TK_overflow_predict+0xec>
+    555a:	8260      	ld.b      	r3, (r2, 0x0)
+    555c:	2300      	addi      	r3, 1
+    555e:	74cc      	zextb      	r3, r3
+    5560:	a260      	st.b      	r3, (r2, 0x0)
+    5562:	8260      	ld.b      	r3, (r2, 0x0)
+    5564:	1136      	lrw      	r1, 0x20000315	// 563c <TK_overflow_predict+0xf0>
+    5566:	8120      	ld.b      	r1, (r1, 0x0)
+    5568:	64c4      	cmphs      	r1, r3
+    556a:	0855      	bt      	0x5614	// 5614 <TK_overflow_predict+0xc8>
+    556c:	3300      	movi      	r3, 0
+    556e:	a260      	st.b      	r3, (r2, 0x0)
+    5570:	3500      	movi      	r5, 0
+    5572:	11f4      	lrw      	r7, 0x20000318	// 5640 <TK_overflow_predict+0xf4>
+    5574:	2605      	addi      	r6, 6
+    5576:	9760      	ld.w      	r3, (r7, 0x0)
+    5578:	70d5      	lsr      	r3, r5
+    557a:	3201      	movi      	r2, 1
+    557c:	68c8      	and      	r3, r2
+    557e:	3b40      	cmpnei      	r3, 0
+    5580:	0c34      	bf      	0x55e8	// 55e8 <TK_overflow_predict+0x9c>
+    5582:	4581      	lsli      	r4, r5, 1
+    5584:	5e70      	addu      	r3, r6, r4
+    5586:	8b00      	ld.h      	r0, (r3, 0x0)
+    5588:	e3ffe00c 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    558c:	6cc7      	mov      	r3, r1
+    558e:	3180      	movi      	r1, 128
+    5590:	6c83      	mov      	r2, r0
+    5592:	4137      	lsli      	r1, r1, 23
+    5594:	3000      	movi      	r0, 0
+    5596:	e3ffd60f 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    559a:	116b      	lrw      	r3, 0x2000031e	// 5644 <TK_overflow_predict+0xf8>
+    559c:	60d0      	addu      	r3, r4
+    559e:	8b60      	ld.h      	r3, (r3, 0x0)
+    55a0:	4364      	lsli      	r3, r3, 4
+    55a2:	230e      	addi      	r3, 15
+    55a4:	b860      	st.w      	r3, (r14, 0x0)
+    55a6:	e3ffdbb5 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    55aa:	9860      	ld.w      	r3, (r14, 0x0)
+    55ac:	7cc0      	mult      	r3, r0
+    55ae:	1147      	lrw      	r2, 0x200006c8	// 5648 <TK_overflow_predict+0xfc>
+    55b0:	740d      	zexth      	r0, r3
+    55b2:	6090      	addu      	r2, r4
+    55b4:	1166      	lrw      	r3, 0x2000072e	// 564c <TK_overflow_predict+0x100>
+    55b6:	60d0      	addu      	r3, r4
+    55b8:	aa00      	st.h      	r0, (r2, 0x0)
+    55ba:	8b60      	ld.h      	r3, (r3, 0x0)
+    55bc:	8a00      	ld.h      	r0, (r2, 0x0)
+    55be:	7401      	zexth      	r0, r0
+    55c0:	325f      	movi      	r2, 95
+    55c2:	74cd      	zexth      	r3, r3
+    55c4:	7c08      	mult      	r0, r2
+    55c6:	3164      	movi      	r1, 100
+    55c8:	b860      	st.w      	r3, (r14, 0x0)
+    55ca:	e3fff711 	bsr      	0x43ec	// 43ec <__divsi3>
+    55ce:	9860      	ld.w      	r3, (r14, 0x0)
+    55d0:	64c1      	cmplt      	r0, r3
+    55d2:	0c0b      	bf      	0x55e8	// 55e8 <TK_overflow_predict+0x9c>
+    55d4:	107f      	lrw      	r3, 0x200002f2	// 5650 <TK_overflow_predict+0x104>
+    55d6:	610c      	addu      	r4, r3
+    55d8:	8c60      	ld.h      	r3, (r4, 0x0)
+    55da:	3b06      	cmphsi      	r3, 7
+    55dc:	0806      	bt      	0x55e8	// 55e8 <TK_overflow_predict+0x9c>
+    55de:	2300      	addi      	r3, 1
+    55e0:	ac60      	st.h      	r3, (r4, 0x0)
+    55e2:	3201      	movi      	r2, 1
+    55e4:	107c      	lrw      	r3, 0x2000058d	// 5654 <TK_overflow_predict+0x108>
+    55e6:	a340      	st.b      	r2, (r3, 0x0)
+    55e8:	2500      	addi      	r5, 1
+    55ea:	3d51      	cmpnei      	r5, 17
+    55ec:	0bc5      	bt      	0x5576	// 5576 <TK_overflow_predict+0x2a>
+    55ee:	107a      	lrw      	r3, 0x2000058d	// 5654 <TK_overflow_predict+0x108>
+    55f0:	8340      	ld.b      	r2, (r3, 0x0)
+    55f2:	3a41      	cmpnei      	r2, 1
+    55f4:	0810      	bt      	0x5614	// 5614 <TK_overflow_predict+0xc8>
+    55f6:	3200      	movi      	r2, 0
+    55f8:	a340      	st.b      	r2, (r3, 0x0)
+    55fa:	3200      	movi      	r2, 0
+    55fc:	1077      	lrw      	r3, 0x20000058	// 5658 <TK_overflow_predict+0x10c>
+    55fe:	1018      	lrw      	r0, 0x2000065b	// 565c <TK_overflow_predict+0x110>
+    5600:	10b8      	lrw      	r5, 0x20000694	// 5660 <TK_overflow_predict+0x114>
+    5602:	10d4      	lrw      	r6, 0x200002f2	// 5650 <TK_overflow_predict+0x104>
+    5604:	9360      	ld.w      	r3, (r3, 0x0)
+    5606:	b342      	st.w      	r2, (r3, 0x8)
+    5608:	1077      	lrw      	r3, 0x20000054	// 5664 <TK_overflow_predict+0x118>
+    560a:	9380      	ld.w      	r4, (r3, 0x0)
+    560c:	3300      	movi      	r3, 0
+    560e:	8040      	ld.b      	r2, (r0, 0x0)
+    5610:	648c      	cmphs      	r3, r2
+    5612:	0c03      	bf      	0x5618	// 5618 <TK_overflow_predict+0xcc>
+    5614:	1401      	addi      	r14, r14, 4
+    5616:	1494      	pop      	r4-r7, r15
+    5618:	5d4c      	addu      	r2, r5, r3
+    561a:	8240      	ld.b      	r2, (r2, 0x0)
+    561c:	4241      	lsli      	r2, r2, 1
+    561e:	4322      	lsli      	r1, r3, 2
+    5620:	6098      	addu      	r2, r6
+    5622:	6050      	addu      	r1, r4
+    5624:	8a40      	ld.h      	r2, (r2, 0x0)
+    5626:	91f2      	ld.w      	r7, (r1, 0x48)
+    5628:	4254      	lsli      	r2, r2, 20
+    562a:	6c9c      	or      	r2, r7
+    562c:	2300      	addi      	r3, 1
+    562e:	b152      	st.w      	r2, (r1, 0x48)
+    5630:	74cc      	zextb      	r3, r3
+    5632:	07ee      	br      	0x560e	// 560e <TK_overflow_predict+0xc2>
+    5634:	2000006c 	.long	0x2000006c
+    5638:	20000638 	.long	0x20000638
+    563c:	20000315 	.long	0x20000315
+    5640:	20000318 	.long	0x20000318
+    5644:	2000031e 	.long	0x2000031e
+    5648:	200006c8 	.long	0x200006c8
+    564c:	2000072e 	.long	0x2000072e
+    5650:	200002f2 	.long	0x200002f2
+    5654:	2000058d 	.long	0x2000058d
+    5658:	20000058 	.long	0x20000058
+    565c:	2000065b 	.long	0x2000065b
+    5660:	20000694 	.long	0x20000694
+    5664:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00005668 <TK_Baseline_tracking>:
+    5668:	14c4      	push      	r4-r7
+    566a:	1422      	subi      	r14, r14, 8
+    566c:	1348      	lrw      	r2, 0x200005ba	// 580c <TK_Baseline_tracking+0x1a4>
+    566e:	8260      	ld.b      	r3, (r2, 0x0)
+    5670:	2300      	addi      	r3, 1
+    5672:	74cc      	zextb      	r3, r3
+    5674:	a260      	st.b      	r3, (r2, 0x0)
+    5676:	8260      	ld.b      	r3, (r2, 0x0)
+    5678:	1326      	lrw      	r1, 0x20000315	// 5810 <TK_Baseline_tracking+0x1a8>
+    567a:	8120      	ld.b      	r1, (r1, 0x0)
+    567c:	644c      	cmphs      	r3, r1
+    567e:	0cad      	bf      	0x57d8	// 57d8 <TK_Baseline_tracking+0x170>
+    5680:	3300      	movi      	r3, 0
+    5682:	a260      	st.b      	r3, (r2, 0x0)
+    5684:	1364      	lrw      	r3, 0x20000518	// 5814 <TK_Baseline_tracking+0x1ac>
+    5686:	9360      	ld.w      	r3, (r3, 0x0)
+    5688:	3b40      	cmpnei      	r3, 0
+    568a:	08a7      	bt      	0x57d8	// 57d8 <TK_Baseline_tracking+0x170>
+    568c:	1323      	lrw      	r1, 0x20000532	// 5818 <TK_Baseline_tracking+0x1b0>
+    568e:	6dc7      	mov      	r7, r1
+    5690:	b820      	st.w      	r1, (r14, 0x0)
+    5692:	3200      	movi      	r2, 0
+    5694:	1362      	lrw      	r3, 0x20000342	// 581c <TK_Baseline_tracking+0x1b4>
+    5696:	1323      	lrw      	r1, 0x20000488	// 5820 <TK_Baseline_tracking+0x1b8>
+    5698:	4201      	lsli      	r0, r2, 1
+    569a:	9880      	ld.w      	r4, (r14, 0x0)
+    569c:	6100      	addu      	r4, r0
+    569e:	8c80      	ld.h      	r4, (r4, 0x0)
+    56a0:	7513      	sexth      	r4, r4
+    56a2:	3cdf      	btsti      	r4, 31
+    56a4:	0c27      	bf      	0x56f2	// 56f2 <TK_Baseline_tracking+0x8a>
+    56a6:	13a0      	lrw      	r5, 0x2000072e	// 5824 <TK_Baseline_tracking+0x1bc>
+    56a8:	5980      	addu      	r4, r1, r0
+    56aa:	6014      	addu      	r0, r5
+    56ac:	b881      	st.w      	r4, (r14, 0x4)
+    56ae:	8c80      	ld.h      	r4, (r4, 0x0)
+    56b0:	88c0      	ld.h      	r6, (r0, 0x0)
+    56b2:	7511      	zexth      	r4, r4
+    56b4:	7599      	zexth      	r6, r6
+    56b6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    56b8:	611a      	subu      	r4, r6
+    56ba:	6551      	cmplt      	r4, r5
+    56bc:	081b      	bt      	0x56f2	// 56f2 <TK_Baseline_tracking+0x8a>
+    56be:	9881      	ld.w      	r4, (r14, 0x4)
+    56c0:	8c80      	ld.h      	r4, (r4, 0x0)
+    56c2:	8800      	ld.h      	r0, (r0, 0x0)
+    56c4:	7511      	zexth      	r4, r4
+    56c6:	7401      	zexth      	r0, r0
+    56c8:	5c01      	subu      	r0, r4, r0
+    56ca:	4581      	lsli      	r4, r5, 1
+    56cc:	6150      	addu      	r5, r4
+    56ce:	6541      	cmplt      	r0, r5
+    56d0:	0c11      	bf      	0x56f2	// 56f2 <TK_Baseline_tracking+0x8a>
+    56d2:	1296      	lrw      	r4, 0x2000065c	// 5828 <TK_Baseline_tracking+0x1c0>
+    56d4:	6108      	addu      	r4, r2
+    56d6:	8400      	ld.b      	r0, (r4, 0x0)
+    56d8:	2000      	addi      	r0, 1
+    56da:	7400      	zextb      	r0, r0
+    56dc:	a400      	st.b      	r0, (r4, 0x0)
+    56de:	1214      	lrw      	r0, 0x2000008c	// 582c <TK_Baseline_tracking+0x1c4>
+    56e0:	84a0      	ld.b      	r5, (r4, 0x0)
+    56e2:	8008      	ld.b      	r0, (r0, 0x8)
+    56e4:	6540      	cmphs      	r0, r5
+    56e6:	0806      	bt      	0x56f2	// 56f2 <TK_Baseline_tracking+0x8a>
+    56e8:	1212      	lrw      	r0, 0x2000059f	// 5830 <TK_Baseline_tracking+0x1c8>
+    56ea:	3501      	movi      	r5, 1
+    56ec:	a0a0      	st.b      	r5, (r0, 0x0)
+    56ee:	3000      	movi      	r0, 0
+    56f0:	a400      	st.b      	r0, (r4, 0x0)
+    56f2:	4201      	lsli      	r0, r2, 1
+    56f4:	5f80      	addu      	r4, r7, r0
+    56f6:	8c80      	ld.h      	r4, (r4, 0x0)
+    56f8:	7513      	sexth      	r4, r4
+    56fa:	3c20      	cmplti      	r4, 1
+    56fc:	0870      	bt      	0x57dc	// 57dc <TK_Baseline_tracking+0x174>
+    56fe:	128a      	lrw      	r4, 0x2000072e	// 5824 <TK_Baseline_tracking+0x1bc>
+    5700:	6100      	addu      	r4, r0
+    5702:	59a0      	addu      	r5, r1, r0
+    5704:	8c80      	ld.h      	r4, (r4, 0x0)
+    5706:	8da0      	ld.h      	r5, (r5, 0x0)
+    5708:	7555      	zexth      	r5, r5
+    570a:	7511      	zexth      	r4, r4
+    570c:	6116      	subu      	r4, r5
+    570e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    5710:	45a2      	lsli      	r5, r5, 2
+    5712:	6551      	cmplt      	r4, r5
+    5714:	0864      	bt      	0x57dc	// 57dc <TK_Baseline_tracking+0x174>
+    5716:	1288      	lrw      	r4, 0x200005e2	// 5834 <TK_Baseline_tracking+0x1cc>
+    5718:	6108      	addu      	r4, r2
+    571a:	84a0      	ld.b      	r5, (r4, 0x0)
+    571c:	2500      	addi      	r5, 1
+    571e:	7554      	zextb      	r5, r5
+    5720:	a4a0      	st.b      	r5, (r4, 0x0)
+    5722:	12a3      	lrw      	r5, 0x2000008c	// 582c <TK_Baseline_tracking+0x1c4>
+    5724:	84c0      	ld.b      	r6, (r4, 0x0)
+    5726:	85a9      	ld.b      	r5, (r5, 0x9)
+    5728:	6594      	cmphs      	r5, r6
+    572a:	0806      	bt      	0x5736	// 5736 <TK_Baseline_tracking+0xce>
+    572c:	12a1      	lrw      	r5, 0x2000059f	// 5830 <TK_Baseline_tracking+0x1c8>
+    572e:	3601      	movi      	r6, 1
+    5730:	a5c0      	st.b      	r6, (r5, 0x0)
+    5732:	3500      	movi      	r5, 0
+    5734:	a4a0      	st.b      	r5, (r4, 0x0)
+    5736:	5f80      	addu      	r4, r7, r0
+    5738:	8c80      	ld.h      	r4, (r4, 0x0)
+    573a:	7513      	sexth      	r4, r4
+    573c:	3cdf      	btsti      	r4, 31
+    573e:	0c10      	bf      	0x575e	// 575e <TK_Baseline_tracking+0xf6>
+    5740:	11d9      	lrw      	r6, 0x2000072e	// 5824 <TK_Baseline_tracking+0x1bc>
+    5742:	59a0      	addu      	r5, r1, r0
+    5744:	6180      	addu      	r6, r0
+    5746:	8d80      	ld.h      	r4, (r5, 0x0)
+    5748:	8ec0      	ld.h      	r6, (r6, 0x0)
+    574a:	7599      	zexth      	r6, r6
+    574c:	7511      	zexth      	r4, r4
+    574e:	611a      	subu      	r4, r6
+    5750:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5752:	6591      	cmplt      	r4, r6
+    5754:	0c05      	bf      	0x575e	// 575e <TK_Baseline_tracking+0xf6>
+    5756:	8d80      	ld.h      	r4, (r5, 0x0)
+    5758:	2c00      	subi      	r4, 1
+    575a:	7511      	zexth      	r4, r4
+    575c:	ad80      	st.h      	r4, (r5, 0x0)
+    575e:	5f80      	addu      	r4, r7, r0
+    5760:	8c80      	ld.h      	r4, (r4, 0x0)
+    5762:	7513      	sexth      	r4, r4
+    5764:	3cdf      	btsti      	r4, 31
+    5766:	0c11      	bf      	0x5788	// 5788 <TK_Baseline_tracking+0x120>
+    5768:	11cf      	lrw      	r6, 0x2000072e	// 5824 <TK_Baseline_tracking+0x1bc>
+    576a:	59a0      	addu      	r5, r1, r0
+    576c:	6180      	addu      	r6, r0
+    576e:	8d80      	ld.h      	r4, (r5, 0x0)
+    5770:	8ec0      	ld.h      	r6, (r6, 0x0)
+    5772:	7599      	zexth      	r6, r6
+    5774:	7511      	zexth      	r4, r4
+    5776:	611a      	subu      	r4, r6
+    5778:	8bc0      	ld.h      	r6, (r3, 0x0)
+    577a:	4ec1      	lsri      	r6, r6, 1
+    577c:	6591      	cmplt      	r4, r6
+    577e:	0805      	bt      	0x5788	// 5788 <TK_Baseline_tracking+0x120>
+    5780:	8d80      	ld.h      	r4, (r5, 0x0)
+    5782:	2c01      	subi      	r4, 2
+    5784:	7511      	zexth      	r4, r4
+    5786:	ad80      	st.h      	r4, (r5, 0x0)
+    5788:	5fa0      	addu      	r5, r7, r0
+    578a:	8d80      	ld.h      	r4, (r5, 0x0)
+    578c:	7513      	sexth      	r4, r4
+    578e:	3c20      	cmplti      	r4, 1
+    5790:	080c      	bt      	0x57a8	// 57a8 <TK_Baseline_tracking+0x140>
+    5792:	8da0      	ld.h      	r5, (r5, 0x0)
+    5794:	8b80      	ld.h      	r4, (r3, 0x0)
+    5796:	7557      	sexth      	r5, r5
+    5798:	4c81      	lsri      	r4, r4, 1
+    579a:	6515      	cmplt      	r5, r4
+    579c:	0c06      	bf      	0x57a8	// 57a8 <TK_Baseline_tracking+0x140>
+    579e:	59a0      	addu      	r5, r1, r0
+    57a0:	8d80      	ld.h      	r4, (r5, 0x0)
+    57a2:	2400      	addi      	r4, 1
+    57a4:	7511      	zexth      	r4, r4
+    57a6:	ad80      	st.h      	r4, (r5, 0x0)
+    57a8:	5fa0      	addu      	r5, r7, r0
+    57aa:	8d80      	ld.h      	r4, (r5, 0x0)
+    57ac:	7513      	sexth      	r4, r4
+    57ae:	3c20      	cmplti      	r4, 1
+    57b0:	0810      	bt      	0x57d0	// 57d0 <TK_Baseline_tracking+0x168>
+    57b2:	8dc0      	ld.h      	r6, (r5, 0x0)
+    57b4:	759b      	sexth      	r6, r6
+    57b6:	8b80      	ld.h      	r4, (r3, 0x0)
+    57b8:	6519      	cmplt      	r6, r4
+    57ba:	0c0b      	bf      	0x57d0	// 57d0 <TK_Baseline_tracking+0x168>
+    57bc:	8da0      	ld.h      	r5, (r5, 0x0)
+    57be:	7557      	sexth      	r5, r5
+    57c0:	4c81      	lsri      	r4, r4, 1
+    57c2:	6515      	cmplt      	r5, r4
+    57c4:	0806      	bt      	0x57d0	// 57d0 <TK_Baseline_tracking+0x168>
+    57c6:	6004      	addu      	r0, r1
+    57c8:	8880      	ld.h      	r4, (r0, 0x0)
+    57ca:	2401      	addi      	r4, 2
+    57cc:	7511      	zexth      	r4, r4
+    57ce:	a880      	st.h      	r4, (r0, 0x0)
+    57d0:	2200      	addi      	r2, 1
+    57d2:	3a51      	cmpnei      	r2, 17
+    57d4:	2301      	addi      	r3, 2
+    57d6:	0b61      	bt      	0x5698	// 5698 <TK_Baseline_tracking+0x30>
+    57d8:	1402      	addi      	r14, r14, 8
+    57da:	1484      	pop      	r4-r7
+    57dc:	5f80      	addu      	r4, r7, r0
+    57de:	8c80      	ld.h      	r4, (r4, 0x0)
+    57e0:	7513      	sexth      	r4, r4
+    57e2:	3cdf      	btsti      	r4, 31
+    57e4:	0fa9      	bf      	0x5736	// 5736 <TK_Baseline_tracking+0xce>
+    57e6:	10b0      	lrw      	r5, 0x2000072e	// 5824 <TK_Baseline_tracking+0x1bc>
+    57e8:	5980      	addu      	r4, r1, r0
+    57ea:	6140      	addu      	r5, r0
+    57ec:	8c80      	ld.h      	r4, (r4, 0x0)
+    57ee:	8da0      	ld.h      	r5, (r5, 0x0)
+    57f0:	7555      	zexth      	r5, r5
+    57f2:	8bc0      	ld.h      	r6, (r3, 0x0)
+    57f4:	7511      	zexth      	r4, r4
+    57f6:	6116      	subu      	r4, r5
+    57f8:	46a1      	lsli      	r5, r6, 1
+    57fa:	6158      	addu      	r5, r6
+    57fc:	6551      	cmplt      	r4, r5
+    57fe:	0b9c      	bt      	0x5736	// 5736 <TK_Baseline_tracking+0xce>
+    5800:	108c      	lrw      	r4, 0x2000059f	// 5830 <TK_Baseline_tracking+0x1c8>
+    5802:	3501      	movi      	r5, 1
+    5804:	a4a0      	st.b      	r5, (r4, 0x0)
+    5806:	6c03      	mov      	r0, r0
+    5808:	0797      	br      	0x5736	// 5736 <TK_Baseline_tracking+0xce>
+    580a:	0000      	bkpt
+    580c:	200005ba 	.long	0x200005ba
+    5810:	20000315 	.long	0x20000315
+    5814:	20000518 	.long	0x20000518
+    5818:	20000532 	.long	0x20000532
+    581c:	20000342 	.long	0x20000342
+    5820:	20000488 	.long	0x20000488
+    5824:	2000072e 	.long	0x2000072e
+    5828:	2000065c 	.long	0x2000065c
+    582c:	2000008c 	.long	0x2000008c
+    5830:	2000059f 	.long	0x2000059f
+    5834:	200005e2 	.long	0x200005e2
+
+Disassembly of section .text.TK_result_prog:
+
+00005838 <TK_result_prog>:
+    5838:	14d2      	push      	r4-r5, r15
+    583a:	1050      	lrw      	r2, 0x20000518	// 5878 <TK_result_prog+0x40>
+    583c:	1090      	lrw      	r4, 0x200005bc	// 587c <TK_result_prog+0x44>
+    583e:	9260      	ld.w      	r3, (r2, 0x0)
+    5840:	3b40      	cmpnei      	r3, 0
+    5842:	0c02      	bf      	0x5846	// 5846 <TK_result_prog+0xe>
+    5844:	9260      	ld.w      	r3, (r2, 0x0)
+    5846:	b460      	st.w      	r3, (r4, 0x0)
+    5848:	9460      	ld.w      	r3, (r4, 0x0)
+    584a:	3b40      	cmpnei      	r3, 0
+    584c:	10ad      	lrw      	r5, 0x20000690	// 5880 <TK_result_prog+0x48>
+    584e:	0c11      	bf      	0x5870	// 5870 <TK_result_prog+0x38>
+    5850:	9440      	ld.w      	r2, (r4, 0x0)
+    5852:	9560      	ld.w      	r3, (r5, 0x0)
+    5854:	64ca      	cmpne      	r2, r3
+    5856:	0c03      	bf      	0x585c	// 585c <TK_result_prog+0x24>
+    5858:	9460      	ld.w      	r3, (r4, 0x0)
+    585a:	b560      	st.w      	r3, (r5, 0x0)
+    585c:	e3fffd94 	bsr      	0x5384	// 5384 <get_key_number>
+    5860:	1069      	lrw      	r3, 0x2000031c	// 5884 <TK_result_prog+0x4c>
+    5862:	8360      	ld.b      	r3, (r3, 0x0)
+    5864:	640c      	cmphs      	r3, r0
+    5866:	0804      	bt      	0x586e	// 586e <TK_result_prog+0x36>
+    5868:	3300      	movi      	r3, 0
+    586a:	b460      	st.w      	r3, (r4, 0x0)
+    586c:	b560      	st.w      	r3, (r5, 0x0)
+    586e:	1492      	pop      	r4-r5, r15
+    5870:	1046      	lrw      	r2, 0x200005b4	// 5888 <TK_result_prog+0x50>
+    5872:	b560      	st.w      	r3, (r5, 0x0)
+    5874:	b260      	st.w      	r3, (r2, 0x0)
+    5876:	07fc      	br      	0x586e	// 586e <TK_result_prog+0x36>
+    5878:	20000518 	.long	0x20000518
+    587c:	200005bc 	.long	0x200005bc
+    5880:	20000690 	.long	0x20000690
+    5884:	2000031c 	.long	0x2000031c
+    5888:	200005b4 	.long	0x200005b4
+
+Disassembly of section .text.CORETHandler:
+
+0000588c <CORETHandler>:
+    588c:	1460      	nie
+    588e:	1462      	ipush
+    5890:	14d1      	push      	r4, r15
+    5892:	1077      	lrw      	r3, 0x20000064	// 58ec <CORETHandler+0x60>
+    5894:	3400      	movi      	r4, 0
+    5896:	9360      	ld.w      	r3, (r3, 0x0)
+    5898:	b386      	st.w      	r4, (r3, 0x18)
+    589a:	1076      	lrw      	r3, 0x2000051c	// 58f0 <CORETHandler+0x64>
+    589c:	8360      	ld.b      	r3, (r3, 0x0)
+    589e:	3b41      	cmpnei      	r3, 1
+    58a0:	0820      	bt      	0x58e0	// 58e0 <CORETHandler+0x54>
+    58a2:	e3fffd85 	bsr      	0x53ac	// 53ac <TK_Scan_Start>
+    58a6:	e3fffd93 	bsr      	0x53cc	// 53cc <TK_Keymap_prog>
+    58aa:	e3fffe51 	bsr      	0x554c	// 554c <TK_overflow_predict>
+    58ae:	e3fffedd 	bsr      	0x5668	// 5668 <TK_Baseline_tracking>
+    58b2:	e3ffffc3 	bsr      	0x5838	// 5838 <TK_result_prog>
+    58b6:	1070      	lrw      	r3, 0x200005bc	// 58f4 <CORETHandler+0x68>
+    58b8:	9360      	ld.w      	r3, (r3, 0x0)
+    58ba:	3b40      	cmpnei      	r3, 0
+    58bc:	0c12      	bf      	0x58e0	// 58e0 <CORETHandler+0x54>
+    58be:	106f      	lrw      	r3, 0x200002ec	// 58f8 <CORETHandler+0x6c>
+    58c0:	9340      	ld.w      	r2, (r3, 0x0)
+    58c2:	3a40      	cmpnei      	r2, 0
+    58c4:	0c0e      	bf      	0x58e0	// 58e0 <CORETHandler+0x54>
+    58c6:	106e      	lrw      	r3, 0x200005b4	// 58fc <CORETHandler+0x70>
+    58c8:	3064      	movi      	r0, 100
+    58ca:	9320      	ld.w      	r1, (r3, 0x0)
+    58cc:	2100      	addi      	r1, 1
+    58ce:	b320      	st.w      	r1, (r3, 0x0)
+    58d0:	9320      	ld.w      	r1, (r3, 0x0)
+    58d2:	7c80      	mult      	r2, r0
+    58d4:	6448      	cmphs      	r2, r1
+    58d6:	0805      	bt      	0x58e0	// 58e0 <CORETHandler+0x54>
+    58d8:	104a      	lrw      	r2, 0x2000059f	// 5900 <CORETHandler+0x74>
+    58da:	3101      	movi      	r1, 1
+    58dc:	a220      	st.b      	r1, (r2, 0x0)
+    58de:	b380      	st.w      	r4, (r3, 0x0)
+    58e0:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    58e4:	9880      	ld.w      	r4, (r14, 0x0)
+    58e6:	1402      	addi      	r14, r14, 8
+    58e8:	1463      	ipop
+    58ea:	1461      	nir
+    58ec:	20000064 	.long	0x20000064
+    58f0:	2000051c 	.long	0x2000051c
+    58f4:	200005bc 	.long	0x200005bc
+    58f8:	200002ec 	.long	0x200002ec
+    58fc:	200005b4 	.long	0x200005b4
+    5900:	2000059f 	.long	0x2000059f
+
+Disassembly of section .text.std_clk_calib:
+
+00005904 <std_clk_calib>:
+    5904:	14d4      	push      	r4-r7, r15
+    5906:	142d      	subi      	r14, r14, 52
+    5908:	3201      	movi      	r2, 1
+    590a:	03ce      	lrw      	r6, 0x2000005c	// 5b4c <std_clk_calib+0x248>
+    590c:	6cc3      	mov      	r3, r0
+    590e:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    5912:	9640      	ld.w      	r2, (r6, 0x0)
+    5914:	9247      	ld.w      	r2, (r2, 0x1c)
+    5916:	7488      	zextb      	r2, r2
+    5918:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    591c:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5920:	3a40      	cmpnei      	r2, 0
+    5922:	0c08      	bf      	0x5932	// 5932 <std_clk_calib+0x2e>
+    5924:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5928:	3a42      	cmpnei      	r2, 2
+    592a:	0c04      	bf      	0x5932	// 5932 <std_clk_calib+0x2e>
+    592c:	3000      	movi      	r0, 0
+    592e:	140d      	addi      	r14, r14, 52
+    5930:	1494      	pop      	r4-r7, r15
+    5932:	0397      	lrw      	r4, 0x2000000c	// 5b50 <std_clk_calib+0x24c>
+    5934:	3209      	movi      	r2, 9
+    5936:	9400      	ld.w      	r0, (r4, 0x0)
+    5938:	3b40      	cmpnei      	r3, 0
+    593a:	b041      	st.w      	r2, (r0, 0x4)
+    593c:	0857      	bt      	0x59ea	// 59ea <std_clk_calib+0xe6>
+    593e:	3307      	movi      	r3, 7
+    5940:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5944:	037b      	lrw      	r3, 0x2dc6c00	// 5b54 <std_clk_calib+0x250>
+    5946:	b863      	st.w      	r3, (r14, 0xc)
+    5948:	3380      	movi      	r3, 128
+    594a:	4362      	lsli      	r3, r3, 2
+    594c:	b867      	st.w      	r3, (r14, 0x1c)
+    594e:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    5952:	74cc      	zextb      	r3, r3
+    5954:	b062      	st.w      	r3, (r0, 0x8)
+    5956:	037e      	lrw      	r3, 0xffff	// 5b58 <std_clk_calib+0x254>
+    5958:	b063      	st.w      	r3, (r0, 0xc)
+    595a:	3201      	movi      	r2, 1
+    595c:	3101      	movi      	r1, 1
+    595e:	03bf      	lrw      	r5, 0x20000014	// 5b5c <std_clk_calib+0x258>
+    5960:	e3ffed68 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+    5964:	95e0      	ld.w      	r7, (r5, 0x0)
+    5966:	137f      	lrw      	r3, 0xbe9c0005	// 5b60 <std_clk_calib+0x25c>
+    5968:	b760      	st.w      	r3, (r7, 0x0)
+    596a:	135f      	lrw      	r2, 0x30010	// 5b64 <std_clk_calib+0x260>
+    596c:	3300      	movi      	r3, 0
+    596e:	b762      	st.w      	r3, (r7, 0x8)
+    5970:	b743      	st.w      	r2, (r7, 0xc)
+    5972:	32d8      	movi      	r2, 216
+    5974:	b745      	st.w      	r2, (r7, 0x14)
+    5976:	974f      	ld.w      	r2, (r7, 0x3c)
+    5978:	3aa2      	bseti      	r2, 2
+    597a:	b74f      	st.w      	r2, (r7, 0x3c)
+    597c:	9803      	ld.w      	r0, (r14, 0xc)
+    597e:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    5982:	327d      	movi      	r2, 125
+    5984:	2100      	addi      	r1, 1
+    5986:	7c48      	mult      	r1, r2
+    5988:	b861      	st.w      	r3, (r14, 0x4)
+    598a:	e3fff543 	bsr      	0x4410	// 4410 <__udivsi3>
+    598e:	b804      	st.w      	r0, (r14, 0x10)
+    5990:	32fa      	movi      	r2, 250
+    5992:	9824      	ld.w      	r1, (r14, 0x10)
+    5994:	4242      	lsli      	r2, r2, 2
+    5996:	6448      	cmphs      	r2, r1
+    5998:	0bca      	bt      	0x592c	// 592c <std_clk_calib+0x28>
+    599a:	9844      	ld.w      	r2, (r14, 0x10)
+    599c:	3178      	movi      	r1, 120
+    599e:	9804      	ld.w      	r0, (r14, 0x10)
+    59a0:	b840      	st.w      	r2, (r14, 0x0)
+    59a2:	e3fff537 	bsr      	0x4410	// 4410 <__udivsi3>
+    59a6:	9840      	ld.w      	r2, (r14, 0x0)
+    59a8:	6082      	subu      	r2, r0
+    59aa:	b845      	st.w      	r2, (r14, 0x14)
+    59ac:	9804      	ld.w      	r0, (r14, 0x10)
+    59ae:	3178      	movi      	r1, 120
+    59b0:	9844      	ld.w      	r2, (r14, 0x10)
+    59b2:	b840      	st.w      	r2, (r14, 0x0)
+    59b4:	e3fff52e 	bsr      	0x4410	// 4410 <__udivsi3>
+    59b8:	9840      	ld.w      	r2, (r14, 0x0)
+    59ba:	6008      	addu      	r0, r2
+    59bc:	b806      	st.w      	r0, (r14, 0x18)
+    59be:	c0807020 	psrclr      	ie
+    59c2:	9640      	ld.w      	r2, (r6, 0x0)
+    59c4:	9254      	ld.w      	r2, (r2, 0x50)
+    59c6:	b848      	st.w      	r2, (r14, 0x20)
+    59c8:	9861      	ld.w      	r3, (r14, 0x4)
+    59ca:	9440      	ld.w      	r2, (r4, 0x0)
+    59cc:	b260      	st.w      	r3, (r2, 0x0)
+    59ce:	b761      	st.w      	r3, (r7, 0x4)
+    59d0:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    59d4:	3b40      	cmpnei      	r3, 0
+    59d6:	083e      	bt      	0x5a52	// 5a52 <std_clk_calib+0x14e>
+    59d8:	e3ffecde 	bsr      	0x3394	// 3394 <LPT_Soft_Reset>
+    59dc:	9400      	ld.w      	r0, (r4, 0x0)
+    59de:	e3ffecff 	bsr      	0x33dc	// 33dc <BT_Soft_Reset>
+    59e2:	c1807420 	psrset      	ee, ie
+    59e6:	3001      	movi      	r0, 1
+    59e8:	07a3      	br      	0x592e	// 592e <std_clk_calib+0x2a>
+    59ea:	3b41      	cmpnei      	r3, 1
+    59ec:	0806      	bt      	0x59f8	// 59f8 <std_clk_calib+0xf4>
+    59ee:	3303      	movi      	r3, 3
+    59f0:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    59f4:	127d      	lrw      	r3, 0x16e3600	// 5b68 <std_clk_calib+0x264>
+    59f6:	07a8      	br      	0x5946	// 5946 <std_clk_calib+0x42>
+    59f8:	3b42      	cmpnei      	r3, 2
+    59fa:	0806      	bt      	0x5a06	// 5a06 <std_clk_calib+0x102>
+    59fc:	3301      	movi      	r3, 1
+    59fe:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a02:	127b      	lrw      	r3, 0xb71b00	// 5b6c <std_clk_calib+0x268>
+    5a04:	07a1      	br      	0x5946	// 5946 <std_clk_calib+0x42>
+    5a06:	3b43      	cmpnei      	r3, 3
+    5a08:	0806      	bt      	0x5a14	// 5a14 <std_clk_calib+0x110>
+    5a0a:	3300      	movi      	r3, 0
+    5a0c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a10:	1278      	lrw      	r3, 0x5b8d80	// 5b70 <std_clk_calib+0x26c>
+    5a12:	079a      	br      	0x5946	// 5946 <std_clk_calib+0x42>
+    5a14:	3b44      	cmpnei      	r3, 4
+    5a16:	0809      	bt      	0x5a28	// 5a28 <std_clk_calib+0x124>
+    5a18:	3300      	movi      	r3, 0
+    5a1a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a1e:	1276      	lrw      	r3, 0x54c720	// 5b74 <std_clk_calib+0x270>
+    5a20:	b863      	st.w      	r3, (r14, 0xc)
+    5a22:	3380      	movi      	r3, 128
+    5a24:	4369      	lsli      	r3, r3, 9
+    5a26:	0793      	br      	0x594c	// 594c <std_clk_calib+0x48>
+    5a28:	3b45      	cmpnei      	r3, 5
+    5a2a:	0806      	bt      	0x5a36	// 5a36 <std_clk_calib+0x132>
+    5a2c:	3300      	movi      	r3, 0
+    5a2e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a32:	1272      	lrw      	r3, 0x3ffed0	// 5b78 <std_clk_calib+0x274>
+    5a34:	07f6      	br      	0x5a20	// 5a20 <std_clk_calib+0x11c>
+    5a36:	3b46      	cmpnei      	r3, 6
+    5a38:	0806      	bt      	0x5a44	// 5a44 <std_clk_calib+0x140>
+    5a3a:	3300      	movi      	r3, 0
+    5a3c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a40:	126f      	lrw      	r3, 0x1fff68	// 5b7c <std_clk_calib+0x278>
+    5a42:	07ef      	br      	0x5a20	// 5a20 <std_clk_calib+0x11c>
+    5a44:	3b47      	cmpnei      	r3, 7
+    5a46:	0b84      	bt      	0x594e	// 594e <std_clk_calib+0x4a>
+    5a48:	3300      	movi      	r3, 0
+    5a4a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a4e:	126d      	lrw      	r3, 0x1ffb8	// 5b80 <std_clk_calib+0x27c>
+    5a50:	07e8      	br      	0x5a20	// 5a20 <std_clk_calib+0x11c>
+    5a52:	9560      	ld.w      	r3, (r5, 0x0)
+    5a54:	3101      	movi      	r1, 1
+    5a56:	9440      	ld.w      	r2, (r4, 0x0)
+    5a58:	b321      	st.w      	r1, (r3, 0x4)
+    5a5a:	b220      	st.w      	r1, (r2, 0x0)
+    5a5c:	3100      	movi      	r1, 0
+    5a5e:	b327      	st.w      	r1, (r3, 0x1c)
+    5a60:	3004      	movi      	r0, 4
+    5a62:	b225      	st.w      	r1, (r2, 0x14)
+    5a64:	932e      	ld.w      	r1, (r3, 0x38)
+    5a66:	6840      	and      	r1, r0
+    5a68:	3940      	cmpnei      	r1, 0
+    5a6a:	0ffd      	bf      	0x5a64	// 5a64 <std_clk_calib+0x160>
+    5a6c:	9225      	ld.w      	r1, (r2, 0x14)
+    5a6e:	b82a      	st.w      	r1, (r14, 0x28)
+    5a70:	3100      	movi      	r1, 0
+    5a72:	b310      	st.w      	r0, (r3, 0x40)
+    5a74:	b327      	st.w      	r1, (r3, 0x1c)
+    5a76:	3004      	movi      	r0, 4
+    5a78:	b225      	st.w      	r1, (r2, 0x14)
+    5a7a:	932e      	ld.w      	r1, (r3, 0x38)
+    5a7c:	6840      	and      	r1, r0
+    5a7e:	3940      	cmpnei      	r1, 0
+    5a80:	0ffd      	bf      	0x5a7a	// 5a7a <std_clk_calib+0x176>
+    5a82:	9225      	ld.w      	r1, (r2, 0x14)
+    5a84:	b82b      	st.w      	r1, (r14, 0x2c)
+    5a86:	3100      	movi      	r1, 0
+    5a88:	b310      	st.w      	r0, (r3, 0x40)
+    5a8a:	b327      	st.w      	r1, (r3, 0x1c)
+    5a8c:	3004      	movi      	r0, 4
+    5a8e:	b225      	st.w      	r1, (r2, 0x14)
+    5a90:	932e      	ld.w      	r1, (r3, 0x38)
+    5a92:	6840      	and      	r1, r0
+    5a94:	3940      	cmpnei      	r1, 0
+    5a96:	0ffd      	bf      	0x5a90	// 5a90 <std_clk_calib+0x18c>
+    5a98:	9225      	ld.w      	r1, (r2, 0x14)
+    5a9a:	b82c      	st.w      	r1, (r14, 0x30)
+    5a9c:	b310      	st.w      	r0, (r3, 0x40)
+    5a9e:	982b      	ld.w      	r1, (r14, 0x2c)
+    5aa0:	980c      	ld.w      	r0, (r14, 0x30)
+    5aa2:	6040      	addu      	r1, r0
+    5aa4:	b829      	st.w      	r1, (r14, 0x24)
+    5aa6:	9829      	ld.w      	r1, (r14, 0x24)
+    5aa8:	4921      	lsri      	r1, r1, 1
+    5aaa:	b829      	st.w      	r1, (r14, 0x24)
+    5aac:	3100      	movi      	r1, 0
+    5aae:	b321      	st.w      	r1, (r3, 0x4)
+    5ab0:	b220      	st.w      	r1, (r2, 0x0)
+    5ab2:	b327      	st.w      	r1, (r3, 0x1c)
+    5ab4:	b225      	st.w      	r1, (r2, 0x14)
+    5ab6:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    5aba:	3b42      	cmpnei      	r3, 2
+    5abc:	9849      	ld.w      	r2, (r14, 0x24)
+    5abe:	082c      	bt      	0x5b16	// 5b16 <std_clk_calib+0x212>
+    5ac0:	1171      	lrw      	r3, 0x7ff	// 5b84 <std_clk_calib+0x280>
+    5ac2:	648c      	cmphs      	r3, r2
+    5ac4:	0c03      	bf      	0x5aca	// 5aca <std_clk_calib+0x1c6>
+    5ac6:	3300      	movi      	r3, 0
+    5ac8:	040f      	br      	0x5ae6	// 5ae6 <std_clk_calib+0x1e2>
+    5aca:	9849      	ld.w      	r2, (r14, 0x24)
+    5acc:	9866      	ld.w      	r3, (r14, 0x18)
+    5ace:	648c      	cmphs      	r3, r2
+    5ad0:	080e      	bt      	0x5aec	// 5aec <std_clk_calib+0x1e8>
+    5ad2:	9868      	ld.w      	r3, (r14, 0x20)
+    5ad4:	9847      	ld.w      	r2, (r14, 0x1c)
+    5ad6:	60ca      	subu      	r3, r2
+    5ad8:	b868      	st.w      	r3, (r14, 0x20)
+    5ada:	32fe      	movi      	r2, 254
+    5adc:	9868      	ld.w      	r3, (r14, 0x20)
+    5ade:	4248      	lsli      	r2, r2, 8
+    5ae0:	68c8      	and      	r3, r2
+    5ae2:	3b40      	cmpnei      	r3, 0
+    5ae4:	0812      	bt      	0x5b08	// 5b08 <std_clk_calib+0x204>
+    5ae6:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5aea:	0721      	br      	0x592c	// 592c <std_clk_calib+0x28>
+    5aec:	9849      	ld.w      	r2, (r14, 0x24)
+    5aee:	9865      	ld.w      	r3, (r14, 0x14)
+    5af0:	64c8      	cmphs      	r2, r3
+    5af2:	0829      	bt      	0x5b44	// 5b44 <std_clk_calib+0x240>
+    5af4:	9868      	ld.w      	r3, (r14, 0x20)
+    5af6:	9847      	ld.w      	r2, (r14, 0x1c)
+    5af8:	60c8      	addu      	r3, r2
+    5afa:	b868      	st.w      	r3, (r14, 0x20)
+    5afc:	33fe      	movi      	r3, 254
+    5afe:	9848      	ld.w      	r2, (r14, 0x20)
+    5b00:	4368      	lsli      	r3, r3, 8
+    5b02:	688c      	and      	r2, r3
+    5b04:	64ca      	cmpne      	r2, r3
+    5b06:	0fe0      	bf      	0x5ac6	// 5ac6 <std_clk_calib+0x1c2>
+    5b08:	9660      	ld.w      	r3, (r6, 0x0)
+    5b0a:	9848      	ld.w      	r2, (r14, 0x20)
+    5b0c:	b354      	st.w      	r2, (r3, 0x50)
+    5b0e:	3001      	movi      	r0, 1
+    5b10:	e3ffeec2 	bsr      	0x3894	// 3894 <delay_nms>
+    5b14:	075e      	br      	0x59d0	// 59d0 <std_clk_calib+0xcc>
+    5b16:	9866      	ld.w      	r3, (r14, 0x18)
+    5b18:	648c      	cmphs      	r3, r2
+    5b1a:	0809      	bt      	0x5b2c	// 5b2c <std_clk_calib+0x228>
+    5b1c:	9868      	ld.w      	r3, (r14, 0x20)
+    5b1e:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b20:	60ca      	subu      	r3, r2
+    5b22:	b868      	st.w      	r3, (r14, 0x20)
+    5b24:	32ff      	movi      	r2, 255
+    5b26:	9868      	ld.w      	r3, (r14, 0x20)
+    5b28:	4250      	lsli      	r2, r2, 16
+    5b2a:	07db      	br      	0x5ae0	// 5ae0 <std_clk_calib+0x1dc>
+    5b2c:	9849      	ld.w      	r2, (r14, 0x24)
+    5b2e:	9865      	ld.w      	r3, (r14, 0x14)
+    5b30:	64c8      	cmphs      	r2, r3
+    5b32:	0809      	bt      	0x5b44	// 5b44 <std_clk_calib+0x240>
+    5b34:	9868      	ld.w      	r3, (r14, 0x20)
+    5b36:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b38:	60c8      	addu      	r3, r2
+    5b3a:	b868      	st.w      	r3, (r14, 0x20)
+    5b3c:	33ff      	movi      	r3, 255
+    5b3e:	9848      	ld.w      	r2, (r14, 0x20)
+    5b40:	4370      	lsli      	r3, r3, 16
+    5b42:	07e0      	br      	0x5b02	// 5b02 <std_clk_calib+0x1fe>
+    5b44:	3300      	movi      	r3, 0
+    5b46:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5b4a:	07e2      	br      	0x5b0e	// 5b0e <std_clk_calib+0x20a>
+    5b4c:	2000005c 	.long	0x2000005c
+    5b50:	2000000c 	.long	0x2000000c
+    5b54:	02dc6c00 	.long	0x02dc6c00
+    5b58:	0000ffff 	.long	0x0000ffff
+    5b5c:	20000014 	.long	0x20000014
+    5b60:	be9c0005 	.long	0xbe9c0005
+    5b64:	00030010 	.long	0x00030010
+    5b68:	016e3600 	.long	0x016e3600
+    5b6c:	00b71b00 	.long	0x00b71b00
+    5b70:	005b8d80 	.long	0x005b8d80
+    5b74:	0054c720 	.long	0x0054c720
+    5b78:	003ffed0 	.long	0x003ffed0
+    5b7c:	001fff68 	.long	0x001fff68
+    5b80:	0001ffb8 	.long	0x0001ffb8
+    5b84:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/RF_T1F_CR_V01_20241011.map b/Source/Lst/RF_T1F_CR_V01_20241011.map
new file mode 100644
index 0000000..ec0aaf6
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20241011.map
@@ -0,0 +1,2425 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          327120 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         164
+  Section header string table index: 161
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 002f12 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00002f14 003f14 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00002f4c 003f4c 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00002fc0 003fc0 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        0000300c 00400c 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        0000303c 00403c 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        000030c4 0040c4 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        000030ec 0040ec 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00003128 004128 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        0000313c 00413c 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00003154 004154 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00003174 004174 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00003190 004190 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        000031ac 0041ac 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        000031ec 0041ec 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        000031f8 0041f8 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        0000321c 00421c 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        0000324c 00424c 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        0000332c 00432c 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00003340 004340 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        0000334e 00434e 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00003356 004356 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        0000335e 00435e 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00003374 004374 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00003384 004384 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00003394 004394 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        000033a8 0043a8 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        000033b8 0043b8 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        000033d4 0043d4 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        000033dc 0043dc 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        000033e6 0043e6 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        000033fe 0043fe 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        0000342a 00442a 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00003430 004430 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00003444 004444 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00003454 004454 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        000034f4 0044f4 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00003508 004508 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        0000354c 00454c 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        00003560 004560 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00003614 004614 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00003624 004624 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00003634 004634 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        00003650 004650 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        00003668 004668 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        00003680 004680 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        00003698 004698 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000036b4 0046b4 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        000036d0 0046d0 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000037bc 0047bc 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        000037cc 0047cc 000010 00  AX  0   0  4
+  [52] .text.UARTTransmi PROGBITS        000037dc 0047dc 00001e 00  AX  0   0  2
+  [53] .text.EPT_Stop    PROGBITS        000037fc 0047fc 000028 00  AX  0   0  4
+  [54] .text.startup.mai PROGBITS        00003824 004824 000070 00  AX  0   0  4
+  [55] .text.delay_nms   PROGBITS        00003894 004894 00002c 00  AX  0   0  2
+  [56] .text.GPT0_CONFIG PROGBITS        000038c0 0048c0 000094 00  AX  0   0  4
+  [57] .text.BT_CONFIG   PROGBITS        00003954 004954 000060 00  AX  0   0  4
+  [58] .text.SYSCON_CONF PROGBITS        000039b4 0049b4 000062 00  AX  0   0  2
+  [59] .text.APT32F102_i PROGBITS        00003a18 004a18 000050 00  AX  0   0  4
+  [60] .text.SYSCONIntHa PROGBITS        00003a68 004a68 0000f0 00  AX  0   0  4
+  [61] .text.IFCIntHandl PROGBITS        00003b58 004b58 000068 00  AX  0   0  4
+  [62] .text.ADCIntHandl PROGBITS        00003bc0 004bc0 000068 00  AX  0   0  4
+  [63] .text.EPT0IntHand PROGBITS        00003c28 004c28 0001ac 00  AX  0   0  4
+  [64] .text.WWDTHandler PROGBITS        00003dd4 004dd4 000034 00  AX  0   0  4
+  [65] .text.GPT0IntHand PROGBITS        00003e08 004e08 000080 00  AX  0   0  4
+  [66] .text.RTCIntHandl PROGBITS        00003e88 004e88 000070 00  AX  0   0  4
+  [67] .text.UART0IntHan PROGBITS        00003ef8 004ef8 00003c 00  AX  0   0  4
+  [68] .text.UART1IntHan PROGBITS        00003f34 004f34 00003c 00  AX  0   0  4
+  [69] .text.UART2IntHan PROGBITS        00003f70 004f70 000094 00  AX  0   0  4
+  [70] .text.SPI0IntHand PROGBITS        00004004 005004 0000e8 00  AX  0   0  4
+  [71] .text.SIO0IntHand PROGBITS        000040ec 0050ec 000054 00  AX  0   0  4
+  [72] .text.EXI0IntHand PROGBITS        00004140 005140 000030 00  AX  0   0  4
+  [73] .text.EXI1IntHand PROGBITS        00004170 005170 000030 00  AX  0   0  4
+  [74] .text.EXI2to3IntH PROGBITS        000041a0 0051a0 000048 00  AX  0   0  4
+  [75] .text.EXI4to9IntH PROGBITS        000041e8 0051e8 00005c 00  AX  0   0  4
+  [76] .text.EXI10to15In PROGBITS        00004244 005244 000060 00  AX  0   0  4
+  [77] .text.LPTIntHandl PROGBITS        000042a4 0052a4 000034 00  AX  0   0  4
+  [78] .text.BT0IntHandl PROGBITS        000042d8 0052d8 00004c 00  AX  0   0  4
+  [79] .text.BT1IntHandl PROGBITS        00004324 005324 000064 00  AX  0   0  4
+  [80] .text.PriviledgeV PROGBITS        00004388 005388 000002 00  AX  0   0  2
+  [81] .text.PendTrapHan PROGBITS        0000438a 00538a 000008 00  AX  0   0  2
+  [82] .text.Trap3Handle PROGBITS        00004392 005392 000008 00  AX  0   0  2
+  [83] .text.Trap2Handle PROGBITS        0000439a 00539a 000008 00  AX  0   0  2
+  [84] .text.Trap1Handle PROGBITS        000043a2 0053a2 000008 00  AX  0   0  2
+  [85] .text.Trap0Handle PROGBITS        000043aa 0053aa 000008 00  AX  0   0  2
+  [86] .text.UnrecExecpH PROGBITS        000043b2 0053b2 000008 00  AX  0   0  2
+  [87] .text.BreakPointH PROGBITS        000043ba 0053ba 000008 00  AX  0   0  2
+  [88] .text.AccessErrHa PROGBITS        000043c2 0053c2 000008 00  AX  0   0  2
+  [89] .text.IllegalInst PROGBITS        000043ca 0053ca 000008 00  AX  0   0  2
+  [90] .text.MisalignedH PROGBITS        000043d2 0053d2 000008 00  AX  0   0  2
+  [91] .text.CNTAIntHand PROGBITS        000043da 0053da 000008 00  AX  0   0  2
+  [92] .text.I2CIntHandl PROGBITS        000043e2 0053e2 000008 00  AX  0   0  2
+  [93] .text.__divsi3    PROGBITS        000043ec 0053ec 000024 00  AX  0   0  4
+  [94] .text.__udivsi3   PROGBITS        00004410 005410 000024 00  AX  0   0  4
+  [95] .text.__modsi3    PROGBITS        00004434 005434 000024 00  AX  0   0  4
+  [96] .text.__umodsi3   PROGBITS        00004458 005458 000024 00  AX  0   0  4
+  [97] .text.CK_CPU_EnAl PROGBITS        0000447c 00547c 000006 00  AX  0   0  2
+  [98] .text.UARTx_Init  PROGBITS        00004484 005484 0000d8 00  AX  0   0  4
+  [99] .text.UART2_RecvI PROGBITS        0000455c 00555c 000064 00  AX  0   0  4
+  [100] .text.Dbg_Println PROGBITS        000045c0 0055c0 000098 00  AX  0   0  4
+  [101] .text.RC522_Delay PROGBITS        00004658 005658 000012 00  AX  0   0  2
+  [102] .text.RC522_ReadW PROGBITS        0000466c 00566c 000054 00  AX  0   0  4
+  [103] .text.RC522_ReadR PROGBITS        000046c0 0056c0 000038 00  AX  0   0  4
+  [104] .text.RC522_Write PROGBITS        000046f8 0056f8 000030 00  AX  0   0  4
+  [105] .text.RC522_PcdRe PROGBITS        00004728 005728 00004c 00  AX  0   0  2
+  [106] .text.RC522_SetBi PROGBITS        00004774 005774 000018 00  AX  0   0  2
+  [107] .text.RC522_PcdAn PROGBITS        0000478c 00578c 00001a 00  AX  0   0  2
+  [108] .text.RC522_Clear PROGBITS        000047a6 0057a6 000016 00  AX  0   0  2
+  [109] .text.RC522_PcdAn PROGBITS        000047bc 0057bc 00000c 00  AX  0   0  2
+  [110] .text.RC522_Calul PROGBITS        000047c8 0057c8 000066 00  AX  0   0  2
+  [111] .text.M500PcdConf PROGBITS        0000482e 00582e 000052 00  AX  0   0  2
+  [112] .text.RC522_Init  PROGBITS        00004880 005880 00009c 00  AX  0   0  4
+  [113] .text.RC522_PcdCo PROGBITS        0000491c 00591c 00013a 00  AX  0   0  2
+  [114] .text.RC522_PcdSe PROGBITS        00004a56 005a56 00006a 00  AX  0   0  2
+  [115] .text.RC522_PcdAu PROGBITS        00004ac0 005ac0 000058 00  AX  0   0  2
+  [116] .text.RC522_PcdRe PROGBITS        00004b18 005b18 00005e 00  AX  0   0  2
+  [117] .text.RC522_PcdAn PROGBITS        00004b76 005b76 000074 00  AX  0   0  2
+  [118] .text.Card_Read_T PROGBITS        00004bec 005bec 0000d4 00  AX  0   0  4
+  [119] .text.RLY_Light_C PROGBITS        00004cc0 005cc0 000014 00  AX  0   0  4
+  [120] .text.KEY1_LONG_P PROGBITS        00004cd4 005cd4 000070 00  AX  0   0  4
+  [121] .text.RLY_Light_C PROGBITS        00004d44 005d44 000020 00  AX  0   0  4
+  [122] .text.LogicCtrl_I PROGBITS        00004d64 005d64 000040 00  AX  0   0  4
+  [123] .text.Debounce_Ta PROGBITS        00004da4 005da4 000068 00  AX  0   0  4
+  [124] .text.LogicCtrl_T PROGBITS        00004e0c 005e0c 00008c 00  AX  0   0  4
+  [125] .text.LogicCtrl_N PROGBITS        00004e98 005e98 000070 00  AX  0   0  4
+  [126] .text.LogicCtrl_N PROGBITS        00004f08 005f08 0000c8 00  AX  0   0  4
+  [127] .text.BackLight_T PROGBITS        00004fd0 005fd0 000034 00  AX  0   0  4
+  [128] .text.Detect_WIFI PROGBITS        00005004 006004 000094 00  AX  0   0  4
+  [129] .text.DM_Led_Task PROGBITS        00005098 006098 000054 00  AX  0   0  4
+  [130] .text.button_init PROGBITS        000050ec 0060ec 00003a 00  AX  0   0  2
+  [131] .text.button_atta PROGBITS        00005126 006126 00000a 00  AX  0   0  2
+  [132] .text.button_hand PROGBITS        00005130 006130 000120 00  AX  0   0  2
+  [133] .text.button_star PROGBITS        00005250 006250 000024 00  AX  0   0  4
+  [134] .text.button_tick PROGBITS        00005274 006274 00001c 00  AX  0   0  4
+  [135] .text.read_button PROGBITS        00005290 006290 000014 00  AX  0   0  4
+  [136] .text.TK_Sampling PROGBITS        000052a4 0062a4 000058 00  AX  0   0  4
+  [137] .text.TKEYIntHand PROGBITS        000052fc 0062fc 000088 00  AX  0   0  4
+  [138] .text.get_key_num PROGBITS        00005384 006384 000028 00  AX  0   0  4
+  [139] .text.TK_Scan_Sta PROGBITS        000053ac 0063ac 000020 00  AX  0   0  4
+  [140] .text.TK_Keymap_p PROGBITS        000053cc 0063cc 000180 00  AX  0   0  4
+  [141] .text.TK_overflow PROGBITS        0000554c 00654c 00011c 00  AX  0   0  4
+  [142] .text.TK_Baseline PROGBITS        00005668 006668 0001d0 00  AX  0   0  4
+  [143] .text.TK_result_p PROGBITS        00005838 006838 000054 00  AX  0   0  4
+  [144] .text.CORETHandle PROGBITS        0000588c 00688c 000078 00  AX  0   0  4
+  [145] .text.std_clk_cal PROGBITS        00005904 006904 000284 00  AX  0   0  4
+  [146] .RomCode          PROGBITS        00005b88 0080a0 000000 00   W  0   0  1
+  [147] .rodata           PROGBITS        00005b88 006b88 000c80 00   A  0   0  4
+  [148] .data             PROGBITS        20000000 008000 0000a0 00  WA  0   0  4
+  [149] .bss              NOBITS          200000a0 0080a0 0006b8 00  WA  0   0  4
+  [150] .csky.attributes  CSKY_ATTRIBUTES 00000000 0080a0 000022 00      0   0  1
+  [151] .comment          PROGBITS        00000000 0080c2 000042 01  MS  0   0  1
+  [152] .csky_stack_size  PROGBITS        00000000 008110 0008dc 00      0   0 16
+  [153] .debug_line       PROGBITS        00000000 0089ec 0039b8 00      0   0  1
+  [154] .debug_info       PROGBITS        00000000 00c3a4 02beac 00      0   0  1
+  [155] .debug_abbrev     PROGBITS        00000000 038250 00288b 00      0   0  1
+  [156] .debug_aranges    PROGBITS        00000000 03aae0 000cc8 00      0   0  8
+  [157] .debug_ranges     PROGBITS        00000000 03b7a8 000bf8 00      0   0  1
+  [158] .debug_str        PROGBITS        00000000 03c3a0 008862 01  MS  0   0  1
+  [159] .debug_frame      PROGBITS        00000000 044c04 001e1c 00      0   0  4
+  [160] .debug_loc        PROGBITS        00000000 046a20 002f28 00      0   0  1
+  [161] .shstrtab         STRTAB          00000000 04f089 000d45 00      0   0  1
+  [162] .symtab           SYMTAB          00000000 049948 004200 10     163 728  4
+  [163] .strtab           STRTAB          00000000 04db48 001541 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x06808 0x06808 R E 0x1000
+  LOAD           0x008000 0x20000000 0x00006808 0x000a0 0x00758 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__modsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_CalulateCRC .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdSelect .text.RC522_PcdAuthState .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.RLY_Light_Ctrl.part.0 .text.KEY1_LONG_PRESS_RELEASE_Handler .text.RLY_Light_Ctrl .text.LogicCtrl_Init .text.Debounce_Task .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.BackLight_Task .text.Detect_WIFI_Task .text.DM_Led_Task .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl.part.0) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Debounce_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__modsi3) for __modsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) for RC522_CalulateCRC
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) for RC522_PcdSelect
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) for RC522_PcdAuthState
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Debounce_Task) for Debounce_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.BackLight_Task) for BackLight_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) for DM_Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	__dtostr.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	__dtostr.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	__dtostr.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	__dtostr.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	__dtostr.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_eq_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_lt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_eq_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_lt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to snprintf_required.o(.text) for __cskyvprintfsnprintf
+	snprintf_required.o(.text) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	vsnprintf_required.o(.text) refers to memcpy_fast.o(.text) for memcpy
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to memcpy_fast.o(.text) for memcpy
+	vsnprintf_required.o(.text) refers to __v2_printfDFHLlMOPpSSsWp.o(.text) for __v2_printf
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _udivdi3.o(.text) for __udivdi3
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _umoddi3.o(.text) for __umoddi3
+	__dtostr.o(.text) refers to __dtostr.o(.text) for __GI___dtostr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to __dtostr.o(.text) for __dtostr
+	__dtostr.o(.text) refers to __isnan.o(.text) for __isnan
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strlen_fast.o(.text) for strlen
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strcpy_fast.o(.text) for strcpy
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strchr.o(.text) for strchr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strerror.o(.text) for strerror
+	__dtostr.o(.text) refers to __isinf.o(.text) for __isinf
+	__dtostr.o(.text) refers to _eq_df.o(.text) for __eqdf2
+	__dtostr.o(.text) refers to _lt_df.o(.text) for __ltdf2
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (487 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2894 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3088 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3405 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
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+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3150 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
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+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
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+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4118 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3521 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3637 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4837 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4945 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7594 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2843 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text.CK_CPU_DisAllNormalIrq(Obj/drivers_apt32f102_ck801.o), (6 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .text.UART1_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (136 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (140 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (156 bytes).
+	Removing .text.UART1_TASK(Obj/SYSTEM_uart.o), (188 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (188 bytes).
+	Removing .text(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .text.RC522_Reset(Obj/SYSTEM_rc522.o), (22 bytes).
+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text.Detect_SPI_task(Obj/SYSTEM_rc522.o), (64 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .text.get_button_event(Obj/SYSTEM_button.o), (6 bytes).
+	Removing .text.button_stop(Obj/SYSTEM_button.o), (32 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (108 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(snprintf_required.o), (0 bytes).
+	Removing .bss(snprintf_required.o), (0 bytes).
+	Removing .data(vsnprintf_required.o), (0 bytes).
+	Removing .bss(vsnprintf_required.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+	Removing .data(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
+	Removing .bss(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
+	Removing .data(_udivdi3.o), (0 bytes).
+	Removing .bss(_udivdi3.o), (0 bytes).
+	Removing .data(_umoddi3.o), (0 bytes).
+	Removing .bss(_umoddi3.o), (0 bytes).
+	Removing .text(minilibc_init.o), (60 bytes).
+	Removing .data(minilibc_init.o), (0 bytes).
+	Removing .bss(minilibc_init.o), (0 bytes).
+	Removing .text(critical.o), (16 bytes).
+	Removing .data(critical.o), (0 bytes).
+	Removing .bss(critical.o), (0 bytes).
+	Removing .comment(critical.o), (67 bytes).
+	Removing .csky.attributes(critical.o), (32 bytes).
+	Removing .data(__dtostr.o), (0 bytes).
+	Removing .bss(__dtostr.o), (0 bytes).
+	Removing .data(__isnan.o), (0 bytes).
+	Removing .bss(__isnan.o), (0 bytes).
+	Removing .text(stdinit.o), (0 bytes).
+	Removing .data(stdinit.o), (96 bytes).
+	Removing .bss(stdinit.o), (0 bytes).
+	Removing .comment(stdinit.o), (67 bytes).
+	Removing .csky.attributes(stdinit.o), (32 bytes).
+	Removing .data(strlen_fast.o), (0 bytes).
+	Removing .bss(strlen_fast.o), (0 bytes).
+	Removing .data(strcpy_fast.o), (0 bytes).
+	Removing .bss(strcpy_fast.o), (0 bytes).
+	Removing .data(strchr.o), (0 bytes).
+	Removing .bss(strchr.o), (0 bytes).
+	Removing .data(strerror.o), (0 bytes).
+	Removing .bss(strerror.o), (0 bytes).
+	Removing .data(__isinf.o), (0 bytes).
+	Removing .bss(__isinf.o), (0 bytes).
+	Removing .data(_eq_df.o), (0 bytes).
+	Removing .bss(_eq_df.o), (0 bytes).
+	Removing .data(_lt_df.o), (0 bytes).
+	Removing .bss(_lt_df.o), (0 bytes).
+
+652 unused seciton(s) (total 179913 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
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+	card_tick.5954                     0x200002e0      O        4  .bss
+	head_handle                        0x200002e4      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
+	__fixunsdfsi                       0x00000d10      F       56  .text
+	__adddf3                           0x0000101c      F       46  .text
+	__subdf3                           0x0000104c      F       54  .text
+	__muldf3                           0x00001084      F      564  .text
+	__divdf3                           0x000012b8      F      340  .text
+	__gtdf2                            0x0000140c      F       60  .text
+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__cskyvprintfsnprintf              0x00001964      F       32  .text
+	__cskyvprintfvsnprintf             0x000019c2      F       90  .text
+	__memset_fast                      0x00001a1c    w F      136  .text
+	memset                             0x00001a1c    w F      136  .text
+	__memcpy_fast                      0x00001aa4    w F      100  .text
+	memcpy                             0x00001aa4    w F      100  .text
+	__v2_printf                        0x00001b3c      F     1828  .text
+	__v2_printf$DFHLlMOPpSSsWp         0x00001b3c      F     1828  .text
+	__udivdi3                          0x00002260      F      940  .text
+	__umoddi3                          0x0000260c      F      928  .text
+	__GI___dtostr                      0x000029d2      F      826  .text
+	__dtostr                           0x000029d2      F      826  .text
+	__isnan                            0x00002d0c      F       44  .text
+	__strlen_fast                      0x00002d38    w F       82  .text
+	strlen                             0x00002d38    w F       82  .text
+	__strcpy_fast                      0x00002d8c    w F      176  .text
+	strcpy                             0x00002d8c    w F      176  .text
+	__GI_strchr                        0x00002e3c      F       18  .text
+	strchr                             0x00002e3c    w F       18  .text
+	__GI_strerror                      0x00002e50      F       28  .text
+	strerror                           0x00002e50      F       28  .text
+	__isinf                            0x00002e6c      F       48  .text
+	__eqdf2                            0x00002e9c      F       58  .text
+	__ltdf2                            0x00002ed8      F       58  .text
+	__main                             0x00002f14      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00002fc0      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x0000300c      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x0000303c      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x000030c4      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x000030ec      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00003128      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x0000313c      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00003154      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00003174      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00003190      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x000031ac      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x000031ec      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x000031f8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x0000321c      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x0000324c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x0000332c      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00003340      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x0000334e      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00003356      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x0000335e      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x00003374      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00003384      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00003394      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x000033a8      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x000033b8      F       28  .text.BT_DeInit
+	BT_Start                           0x000033d4      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x000033dc      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000033e6      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000033fe      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x0000342a      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00003430      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00003444      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00003454      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000034f4      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00003508      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x0000354c      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x00003560      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00003614      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00003624      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00003634      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x00003650      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00003668      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x00003680      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x00003698      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000036b4      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x000036d0      F      236  .text.UART_IO_Init
+	UARTInit                           0x000037bc      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x000037cc      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x000037dc      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000037fc      F       40  .text.EPT_Stop
+	main                               0x00003824      F      112  .text.startup.main
+	delay_nms                          0x00003894      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000038c0      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x00003954      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000039b4      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00003a18      F       80  .text.APT32F102_init
+	SYSCONIntHandler                   0x00003a68      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00003b58      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00003bc0      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00003c28      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00003dd4      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00003e08      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00003e88      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00003ef8      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00003f34      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00003f70      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x00004004      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x000040ec      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00004140      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00004170      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x000041a0      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x000041e8      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00004244      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x000042a4      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x000042d8      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00004324      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00004388      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x0000438a      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x00004392      F        8  .text.Trap3Handler
+	Trap2Handler                       0x0000439a      F        8  .text.Trap2Handler
+	Trap1Handler                       0x000043a2      F        8  .text.Trap1Handler
+	Trap0Handler                       0x000043aa      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x000043b2      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x000043ba      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x000043c2      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x000043ca      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x000043d2      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x000043da      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x000043e2      F        8  .text.I2CIntHandler
+	__divsi3                           0x000043ec      F       36  .text.__divsi3
+	__udivsi3                          0x00004410      F       36  .text.__udivsi3
+	__modsi3                           0x00004434      F       36  .text.__modsi3
+	__umodsi3                          0x00004458      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x0000447c      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x00004484      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x0000455c      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x000045c0      F      152  .text.Dbg_Println
+	RC522_Delay                        0x00004658      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x0000466c      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x000046c0      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x000046f8      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00004728      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x00004774      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x0000478c      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000047a6      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x000047bc      F       12  .text.RC522_PcdAntennaOff
+	RC522_CalulateCRC                  0x000047c8      F      102  .text.RC522_CalulateCRC
+	RC522_Init                         0x00004880      F      156  .text.RC522_Init
+	RC522_PcdComMF522                  0x0000491c      F      314  .text.RC522_PcdComMF522
+	RC522_PcdSelect                    0x00004a56      F      106  .text.RC522_PcdSelect
+	RC522_PcdAuthState                 0x00004ac0      F       88  .text.RC522_PcdAuthState
+	RC522_PcdRequest                   0x00004b18      F       94  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00004b76      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x00004bec      F      212  .text.Card_Read_TasK
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00004cd4      F      112  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	RLY_Light_Ctrl                     0x00004d44      F       32  .text.RLY_Light_Ctrl
+	LogicCtrl_Init                     0x00004d64      F       64  .text.LogicCtrl_Init
+	Debounce_Task                      0x00004da4      F      104  .text.Debounce_Task
+	LogicCtrl_Task                     0x00004e0c      F      140  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00004e98      F      112  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x00004f08      F      200  .text.LogicCtrl_NoRF_Task
+	BackLight_Task                     0x00004fd0      F       52  .text.BackLight_Task
+	Detect_WIFI_Task                   0x00005004      F      148  .text.Detect_WIFI_Task
+	DM_Led_Task                        0x00005098      F       84  .text.DM_Led_Task
+	button_init                        0x000050ec      F       58  .text.button_init
+	button_attach                      0x00005126      F       10  .text.button_attach
+	button_handler                     0x00005130      F      288  .text.button_handler
+	button_start                       0x00005250      F       36  .text.button_start
+	button_ticks                       0x00005274      F       28  .text.button_ticks
+	read_button_GPIO                   0x00005290      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x000052a4      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x000052fc      F      136  .text.TKEYIntHandler
+	get_key_number                     0x00005384      F       40  .text.get_key_number
+	TK_Scan_Start                      0x000053ac      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000053cc      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x0000554c      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00005668      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x00005838      F       84  .text.TK_result_prog
+	CORETHandler                       0x0000588c      F      120  .text.CORETHandler
+	std_clk_calib                      0x00005904      F      644  .text.std_clk_calib
+	__thenan_df                        0x00005bb8      O       20  .rodata
+	__clz_tab                          0x00005bcc      O      256  .rodata
+	_end_rodata                        0x00006808               0  .rodata
+	HWD                                0x20000000      O        4  .data
+	_start_data                        0x20000000               0  .data
+	CRC                                0x20000004      O        4  .data
+	BT1                                0x20000008      O        4  .data
+	BT0                                0x2000000c      O        4  .data
+	WWDT                               0x20000010      O        4  .data
+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
+	EPT0                               0x20000020      O        4  .data
+	GPT0                               0x20000024      O        4  .data
+	CA0                                0x20000028      O        4  .data
+	SIO0                               0x2000002c      O        4  .data
+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	Dbg_Switch                         0x20000068      O        4  .data
+	s_tkey                             0x2000006c      O        4  .data
+	samp_setover_f                     0x20000070      O        1  .data
+	tk_overflow_en                     0x20000071      O        1  .data
+	tk_div                             0x20000072      O       34  .data
+	neg_build_bounce                   0x20000094      O        1  .data
+	pos_build_bounce                   0x20000095      O        1  .data
+	tk_scan_para0                      0x20000098      O        4  .data
+	scan_step_temp                     0x2000009c      O        1  .data
+	_end_data                          0x200000a0               0  .data
+	_bss_start                         0x200000a0               0  .bss
+	rf_exist                           0x200000a0      O        1  .bss
+	last_state                         0x200000a1      O        1  .bss
+	finish_flag                        0x200000a2      O        1  .bss
+	detect_tick                        0x200000a4      O        4  .bss
+	detect_count                       0x200000a8      O        1  .bss
+	test_state                         0x200000a9      O        1  .bss
+	SysTick_100us                      0x200000b0      O        4  .bss
+	SysTick_1ms                        0x200000b4      O        4  .bss
+	RS485_Comming                      0x200000b8      O        4  .bss
+	RS485_Comm_Flag                    0x200000bc      O        4  .bss
+	RS485_Comm_Start                   0x200000c0      O        4  .bss
+	RS485_Comm_End                     0x200000c4      O        4  .bss
+	SysTick_Now                        0x200000c8      O        4  .bss
+	SysTick_Last                       0x200000cc      O        4  .bss
+	SysTick_Diff                       0x200000d0      O        4  .bss
+	Dbg_Buffer                         0x200000d4      O      512  .bss
+	scan_tick                          0x200002d4      O        4  .bss
+	LED_STATE                          0x200002d8      O        1  .bss
+	Press_debounce_data                0x200002e8      O        1  .bss
+	TK_Lowpower_mode                   0x200002e9      O        1  .bss
+	TK_Lowpower_level                  0x200002ea      O        1  .bss
+	TK_longpress_time                  0x200002ec      O        4  .bss
+	Release_debounce_data              0x200002f0      O        1  .bss
+	Key_mode                           0x200002f1      O        1  .bss
+	TK_icon                            0x200002f2      O       34  .bss
+	MultiTimes_Filter                  0x20000314      O        1  .bss
+	Base_Speed                         0x20000315      O        1  .bss
+	TK_IO_ENABLE                       0x20000318      O        4  .bss
+	Valid_Key_Num                      0x2000031c      O        1  .bss
+	TK_senprd                          0x2000031e      O       34  .bss
+	TK_Wakeup_level                    0x20000340      O        1  .bss
+	TK_Triggerlevel                    0x20000342      O       34  .bss
+	TK_EC_LEVEL                        0x20000364      O        2  .bss
+	TK_FVR_LEVEL                       0x20000366      O        2  .bss
+	TK_BaseCnt                         0x20000368      O        4  .bss
+	TK_PSEL_MODE                       0x2000036c      O        2  .bss
+	R_CMPB_BUF                         0x20000370      O        4  .bss
+	R_CMPA_BUF                         0x20000374      O        4  .bss
+	R_SIORX_buf                        0x20000378      O       40  .bss
+	g_uart                             0x200003a0      O      115  .bss
+	CardInfo                           0x20000414      O       48  .bss
+	g_read                             0x20000444      O        8  .bss
+	KEY1                               0x2000044c      O       48  .bss
+	dm_in                              0x2000047c      O        9  .bss
+	baseline_data0                     0x20000488      O       34  .bss
+	TK_Postive_build2                  0x200004aa      O       17  .bss
+	Key_Map1                           0x200004bc      O        4  .bss
+	offset_data2_abs                   0x200004c0      O       34  .bss
+	scan_f                             0x200004e2      O        1  .bss
+	offset_data1_abs                   0x200004e4      O       34  .bss
+	Release_debounce0                  0x20000506      O       17  .bss
+	Key_Map0                           0x20000518      O        4  .bss
+	bsae_over_f                        0x2000051c      O        1  .bss
+	scan_cnt                           0x2000051e      O        2  .bss
+	Press_debounce0                    0x20000520      O       17  .bss
+	offset_data0                       0x20000532      O       34  .bss
+	sampling_data1                     0x20000554      O       34  .bss
+	Key_Map2                           0x20000578      O        4  .bss
+	Release_debounce1                  0x2000057c      O       17  .bss
+	tk_overflow_f                      0x2000058d      O        1  .bss
+	TK_Negtive_build2                  0x2000058e      O       17  .bss
+	base_update_f                      0x2000059f      O        1  .bss
+	TK_Postive_build1                  0x200005a0      O       17  .bss
+	time_cnt                           0x200005b4      O        4  .bss
+	lpt_scan_pend_cnt                  0x200005b8      O        2  .bss
+	TK_track_cnt                       0x200005ba      O        1  .bss
+	Key_Map                            0x200005bc      O        4  .bss
+	baseline_data1                     0x200005c0      O       34  .bss
+	TK_Postive_build0                  0x200005e2      O       17  .bss
+	sampling_data2                     0x200005f4      O       34  .bss
+	offset_data1                       0x20000616      O       34  .bss
+	TK_ovrdect_cnt                     0x20000638      O        1  .bss
+	Press_debounce2                    0x20000639      O       17  .bss
+	TK_Negtive_build1                  0x2000064a      O       17  .bss
+	tk_num                             0x2000065b      O        1  .bss
+	TK_Negtive_build0                  0x2000065c      O       17  .bss
+	Press_debounce1                    0x2000066d      O       17  .bss
+	Release_debounce2                  0x2000067e      O       17  .bss
+	r_Key_Map_Temp                     0x20000690      O        4  .bss
+	tk_seque                           0x20000694      O       17  .bss
+	scan_step                          0x200006a5      O        1  .bss
+	baseline_data2                     0x200006a6      O       34  .bss
+	tk_sampling_max                    0x200006c8      O       34  .bss
+	offset_data0_abs                   0x200006ea      O       34  .bss
+	offset_data2                       0x2000070c      O       34  .bss
+	sampling_data0                     0x2000072e      O       34  .bss
+	errno                              0x20000750      O        4  .bss
+	__malloc_lock                      0x20000754      O        4  .bss
+	_ebss                              0x20000758               0  .bss
+	_end                               0x20000758               0  .bss
+	end                                0x20000758               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00006808, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1012  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1020  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1026  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1033  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1044  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1049  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1056  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1063  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1070  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1077  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1084  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1091  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1098  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1105  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1119  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1126  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1133  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1139  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1146  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1153  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000020   Code   RO       1174  .text          	snprintf_required.o
+    0x00001984   0x00000098   Code   RO       1181  .text          	vsnprintf_required.o
+    0x00001a1c   0x00000088   Code   RO       1188  .text          	memset_fast.o
+    0x00001aa4   0x00000064   Code   RO       1193  .text          	memcpy_fast.o
+    0x00001b08   0x00000758   Code   RO       1351  .text          	__v2_printfDFHLlMOPpSSsWp.o
+    0x00002260   0x000003ac   Code   RO       1410  .text          	_udivdi3.o
+    0x0000260c   0x000003a0   Code   RO       1417  .text          	_umoddi3.o
+    0x000029ac   0x00000360   Code   RO       1438  .text          	__dtostr.o
+    0x00002d0c   0x0000002c   Code   RO       1446  .text          	__isnan.o
+    0x00002d38   0x00000052   Code   RO       1458  .text          	strlen_fast.o
+    0x00002d8a   0x00000002   PAD
+    0x00002d8c   0x000000b0   Code   RO       1463  .text          	strcpy_fast.o
+    0x00002e3c   0x00000012   Code   RO       1468  .text          	strchr.o
+    0x00002e4e   0x00000002   PAD
+    0x00002e50   0x0000001c   Code   RO       1473  .text          	strerror.o
+    0x00002e6c   0x00000030   Code   RO       1481  .text          	__isinf.o
+    0x00002e9c   0x0000003a   Code   RO       1487  .text          	_eq_df.o
+    0x00002ed6   0x00000002   PAD
+    0x00002ed8   0x0000003a   Code   RO       1494  .text          	_lt_df.o
+    0x00002f14   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00002f4c   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00002fc0   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x0000300c   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x0000303c   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x000030c4   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x000030ec   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00003128   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x0000313c   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003154   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003174   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00003190   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031ac   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x000031ec   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031f8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000321c   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000324c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x0000332c   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00003340   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x0000334e   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00003356   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x0000335e   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00003374   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00003384   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00003394   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x000033a8   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x000033b8   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x000033d4   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x000033dc   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x000033e6   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000033fe   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x0000342a   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00003430   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00003444   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00003454   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x000034f4   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003508   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000354c   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003560   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003614   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x00003624   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00003634   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x00003650   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003668   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003680   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003698   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036b4   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036d0   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000037bc   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x000037cc   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x000037dc   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x000037fc   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x00003824   0x00000070   Code   RO        690  .text.startup.main	Obj/main.o
+    0x00003894   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000038c0   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x00003954   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x000039b4   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00003a18   0x00000050   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00003a68   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00003b58   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x00003bc0   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00003c28   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003dd4   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00003e08   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003e88   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00003ef8   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00003f34   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00003f70   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00004004   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x000040ec   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00004140   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00004170   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x000041a0   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x000041e8   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00004244   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x000042a4   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x000042d8   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00004324   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00004388   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x0000438a   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x00004392   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x0000439a   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x000043a2   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x000043aa   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x000043b2   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x000043ba   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x000043c2   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x000043ca   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x000043d2   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x000043da   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x000043e2   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x000043ec   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00004410   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x00004434   0x00000024   Code   RO        787  .text.__modsi3 	Obj/drivers_apt32f102.o
+    0x00004458   0x00000024   Code   RO        788  .text.__umodsi3	Obj/drivers_apt32f102.o
+    0x0000447c   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00004484   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x0000455c   0x00000064   Code   RO        822  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x000045c0   0x00000098   Code   RO        827  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00004658   0x00000012   Code   RO        848  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x0000466c   0x00000054   Code   RO        849  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x000046c0   0x00000038   Code   RO        850  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x000046f8   0x00000030   Code   RO        851  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00004728   0x0000004c   Code   RO        852  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x00004774   0x00000018   Code   RO        853  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x0000478c   0x0000001a   Code   RO        854  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000047a6   0x00000016   Code   RO        855  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x000047bc   0x0000000c   Code   RO        856  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x000047c8   0x00000066   Code   RO        858  .text.RC522_CalulateCRC	Obj/SYSTEM_rc522.o
+    0x0000482e   0x00000052   Code   RO        859  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x00004880   0x0000009c   Code   RO        861  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x0000491c   0x0000013a   Code   RO        862  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x00004a56   0x0000006a   Code   RO        864  .text.RC522_PcdSelect	Obj/SYSTEM_rc522.o
+    0x00004ac0   0x00000058   Code   RO        865  .text.RC522_PcdAuthState	Obj/SYSTEM_rc522.o
+    0x00004b18   0x0000005e   Code   RO        868  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x00004b76   0x00000074   Code   RO        869  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x00004bec   0x000000d4   Code   RO        870  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x00004cc0   0x00000014   Code   RO        889  .text.RLY_Light_Ctrl.part.0	Obj/SYSTEM_logic_ctrl.o
+    0x00004cd4   0x00000070   Code   RO        890  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x00004d44   0x00000020   Code   RO        892  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x00004d64   0x00000040   Code   RO        893  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004da4   0x00000068   Code   RO        894  .text.Debounce_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004e0c   0x0000008c   Code   RO        895  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004e98   0x00000070   Code   RO        897  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004f08   0x000000c8   Code   RO        898  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004fd0   0x00000034   Code   RO        899  .text.BackLight_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00005004   0x00000094   Code   RO        900  .text.Detect_WIFI_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00005098   0x00000054   Code   RO        901  .text.DM_Led_Task	Obj/SYSTEM_logic_ctrl.o
+    0x000050ec   0x0000003a   Code   RO        919  .text.button_init	Obj/SYSTEM_button.o
+    0x00005126   0x0000000a   Code   RO        920  .text.button_attach	Obj/SYSTEM_button.o
+    0x00005130   0x00000120   Code   RO        922  .text.button_handler	Obj/SYSTEM_button.o
+    0x00005250   0x00000024   Code   RO        923  .text.button_start	Obj/SYSTEM_button.o
+    0x00005274   0x0000001c   Code   RO        925  .text.button_ticks	Obj/SYSTEM_button.o
+    0x00005290   0x00000014   Code   RO        926  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x000052a4   0x00000058   Code   RO        958  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x000052fc   0x00000088   Code   RO        962  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005384   0x00000028   Code   RO        963  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053ac   0x00000020   Code   RO        965  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053cc   0x00000180   Code   RO        966  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000554c   0x0000011c   Code   RO        967  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005668   0x000001d0   Code   RO        968  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005838   0x00000054   Code   RO        969  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000588c   0x00000078   Code   RO        970  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005904   0x00000284   Code   RO        992  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00005b88   0x00000030   Data   RO       1015  .rodata        	pow.o
+    0x00005bb8   0x00000014   Data   RO       1115  .rodata        	_thenan_df.o
+    0x00005bcc   0x00000100   Data   RO       1163  .rodata        	_clz.o
+    0x00005ccc   0x00000020   Data   RO       1354  .rodata        	__v2_printfDFHLlMOPpSSsWp.o
+    0x00005cec   0x00000240   Data   RO       1476  .rodata        	strerror.o
+    0x00005f2c   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x00005f37   0x0000003e   Data   RO        831  .rodata.str1.1 	Obj/SYSTEM_uart.o
+    0x00005f75   0x0000007a   Data   RO        872  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x00005fef   0x00000068   Data   RO        902  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+    0x00006057   0x00000022   Data   RO       1355  .rodata.str1.1 	__v2_printfDFHLlMOPpSSsWp.o
+    0x00006079   0x00000008   Data   RO       1441  .rodata.str1.1 	__dtostr.o
+    0x00006081   0x00000787   Data   RO       1477  .rodata.str1.1 	strerror.o
+
+    Region RAM (Base: 0x20000000, Size: 0x00000758, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000004   Data   RW        819  .data          	Obj/SYSTEM_uart.o
+    0x2000006c   0x00000031   Data   RW        949  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x2000009d   0x00000003   PAD
+    0x200000a0   0x0000000a   Zero   RW        689  .bss           	Obj/main.o
+    0x200000aa   0x00000002   PAD
+    0x200000ac   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000b8   0x0000021c   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200002d4   0x00000004   Zero   RW        847  .bss           	Obj/SYSTEM_rc522.o
+    0x200002d8   0x0000000c   Zero   RW        888  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200002e4   0x00000004   Zero   RW        918  .bss           	Obj/SYSTEM_button.o
+    0x200002e8   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x2000036e   0x00000002   PAD
+    0x20000370   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x200003a0   0x00000073   Zero   RW        844  COMMON         	Obj/SYSTEM_uart.o
+    0x20000413   0x00000001   PAD
+    0x20000414   0x00000030   Zero   RW        885  COMMON         	Obj/SYSTEM_rc522.o
+    0x20000444   0x00000041   Zero   RW        915  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x20000485   0x00000003   PAD
+    0x20000488   0x000002c8   Zero   RW        988  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000750   0x00000008   Zero   RW       1431  COMMON         	minilibc_init.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        269   Obj/arch_crt0.o
+         56          0          0          0        803   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
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+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+        112         11          0        144      10945   Obj/main.o
+        466          0          0          0      16126   Obj/mcu_initial.o
+       2434          0          0         60      14261   Obj/mcu_interrupt.o
+        144          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        468         62          4        655      13076   Obj/SYSTEM_uart.o
+       1636        122          0         52      15928   Obj/SYSTEM_rc522.o
+       1068        104          0         77      12222   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11539   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       9526        299        108        992     241055   Object Totals
+         10          0          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16339   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16339   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
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+        940          0          0          0          0   _udivdi3.o
+        928          0          0          0          0   _umoddi3.o
+	------------------------------------------------------------
+       5040        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
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+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+       1880         66          0          0          0   __v2_printfDFHLlMOPpSSsWp.o
+          0          0          0          8          0   minilibc_init.o
+          0          0          0          0          0   critical.o
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+         44          0          0          0          0   __isnan.o
+          0          0          0          0          0   stdinit.o
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+         18          0          0          0          0   strchr.o
+         28       2503          0          0          0   strerror.o
+         48          0          0          0          0   __isinf.o
+	------------------------------------------------------------
+       3560       2577          0          8          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         58          0          0          0          0   _eq_df.o
+         58          0          0          0          0   _lt_df.o
+	------------------------------------------------------------
+        116          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      23416       3200        160       1720     266069   Grand Totals
+      23416       3200        160       1720     266069   Elf Image Totals
+      23416       3200        160          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				26616 (  25.99kB)
+Total	RW	Size (RW Data + ZI Data)			1880 (  1.84kB)
+Total	ROM	Size (Code + RO Data + RW Data)		26776 (  26.15kB)
+
+======================================================================
diff --git a/Source/Lst/RF_T1F_CR_V01_20241012.asm b/Source/Lst/RF_T1F_CR_V01_20241012.asm
new file mode 100644
index 0000000..1892f8f
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20241012.asm
@@ -0,0 +1,11115 @@
+
+.//Obj/RF_T1F_CR_V01_20241012.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	00002eee 	.long	0x00002eee
+       8:	00002ede 	.long	0x00002ede
+       c:	00000184 	.long	0x00000184
+      10:	00002ee6 	.long	0x00002ee6
+      14:	00002ea4 	.long	0x00002ea4
+      18:	00000184 	.long	0x00000184
+      1c:	00002ed6 	.long	0x00002ed6
+      20:	00002ece 	.long	0x00002ece
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	00002ec6 	.long	0x00002ec6
+      44:	00002ebe 	.long	0x00002ebe
+      48:	00002eb6 	.long	0x00002eb6
+      4c:	00002eae 	.long	0x00002eae
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00002ea6 	.long	0x00002ea6
+      80:	0000434c 	.long	0x0000434c
+      84:	00002584 	.long	0x00002584
+      88:	00002674 	.long	0x00002674
+      8c:	000026dc 	.long	0x000026dc
+      90:	00002744 	.long	0x00002744
+      94:	00000184 	.long	0x00000184
+      98:	000028f0 	.long	0x000028f0
+      9c:	00002c5c 	.long	0x00002c5c
+      a0:	00002c8c 	.long	0x00002c8c
+      a4:	00002924 	.long	0x00002924
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	000029a4 	.long	0x000029a4
+      b4:	00002a14 	.long	0x00002a14
+      b8:	00002a50 	.long	0x00002a50
+      bc:	00002a8c 	.long	0x00002a8c
+      c0:	00000184 	.long	0x00000184
+      c4:	00002efe 	.long	0x00002efe
+      c8:	00000184 	.long	0x00000184
+      cc:	00002b20 	.long	0x00002b20
+      d0:	00002c08 	.long	0x00002c08
+      d4:	00002cbc 	.long	0x00002cbc
+      d8:	00002d04 	.long	0x00002d04
+      dc:	00002d60 	.long	0x00002d60
+      e0:	00002ef6 	.long	0x00002ef6
+      e4:	00003dbc 	.long	0x00003dbc
+      e8:	00002dc0 	.long	0x00002dc0
+      ec:	00000184 	.long	0x00000184
+      f0:	00002df4 	.long	0x00002df4
+      f4:	00002e40 	.long	0x00002e40
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x1a50	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x2340	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00001a50 	.long	0x00001a50
+     198:	00000160 	.long	0x00000160
+     19c:	00002340 	.long	0x00002340
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x4648	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00004648 	.long	0x00004648
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x4648	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x4648	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00004648 	.long	0x00004648
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x4678	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00004678 	.long	0x00004678
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x4678	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00004678 	.long	0x00004678
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x4678	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00004678 	.long	0x00004678
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x468c	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	0000468c 	.long	0x0000468c
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__memset_fast>:
+    1964:	14c3      	push      	r4-r6
+    1966:	7444      	zextb      	r1, r1
+    1968:	3a40      	cmpnei      	r2, 0
+    196a:	0c1f      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    196c:	6d43      	mov      	r5, r0
+    196e:	6d03      	mov      	r4, r0
+    1970:	3603      	movi      	r6, 3
+    1972:	6918      	and      	r4, r6
+    1974:	3c40      	cmpnei      	r4, 0
+    1976:	0c1a      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    1978:	a520      	st.b      	r1, (r5, 0x0)
+    197a:	2a00      	subi      	r2, 1
+    197c:	3a40      	cmpnei      	r2, 0
+    197e:	0c15      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1980:	2500      	addi      	r5, 1
+    1982:	6d17      	mov      	r4, r5
+    1984:	3603      	movi      	r6, 3
+    1986:	6918      	and      	r4, r6
+    1988:	3c40      	cmpnei      	r4, 0
+    198a:	0c10      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    198c:	a520      	st.b      	r1, (r5, 0x0)
+    198e:	2a00      	subi      	r2, 1
+    1990:	3a40      	cmpnei      	r2, 0
+    1992:	0c0b      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1994:	2500      	addi      	r5, 1
+    1996:	6d17      	mov      	r4, r5
+    1998:	3603      	movi      	r6, 3
+    199a:	6918      	and      	r4, r6
+    199c:	3c40      	cmpnei      	r4, 0
+    199e:	0c06      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a0:	a520      	st.b      	r1, (r5, 0x0)
+    19a2:	2a00      	subi      	r2, 1
+    19a4:	2500      	addi      	r5, 1
+    19a6:	0402      	br      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a8:	1483      	pop      	r4-r6
+    19aa:	4168      	lsli      	r3, r1, 8
+    19ac:	6c4c      	or      	r1, r3
+    19ae:	4170      	lsli      	r3, r1, 16
+    19b0:	6c4c      	or      	r1, r3
+    19b2:	3a2f      	cmplti      	r2, 16
+    19b4:	0809      	bt      	0x19c6	// 19c6 <__memset_fast+0x62>
+    19b6:	b520      	st.w      	r1, (r5, 0x0)
+    19b8:	b521      	st.w      	r1, (r5, 0x4)
+    19ba:	b522      	st.w      	r1, (r5, 0x8)
+    19bc:	b523      	st.w      	r1, (r5, 0xc)
+    19be:	2a0f      	subi      	r2, 16
+    19c0:	250f      	addi      	r5, 16
+    19c2:	3a2f      	cmplti      	r2, 16
+    19c4:	0ff9      	bf      	0x19b6	// 19b6 <__memset_fast+0x52>
+    19c6:	3a23      	cmplti      	r2, 4
+    19c8:	0806      	bt      	0x19d4	// 19d4 <__memset_fast+0x70>
+    19ca:	2a03      	subi      	r2, 4
+    19cc:	b520      	st.w      	r1, (r5, 0x0)
+    19ce:	2503      	addi      	r5, 4
+    19d0:	3a23      	cmplti      	r2, 4
+    19d2:	0ffc      	bf      	0x19ca	// 19ca <__memset_fast+0x66>
+    19d4:	3a40      	cmpnei      	r2, 0
+    19d6:	0fe9      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19d8:	2a00      	subi      	r2, 1
+    19da:	a520      	st.b      	r1, (r5, 0x0)
+    19dc:	3a40      	cmpnei      	r2, 0
+    19de:	0fe5      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e0:	2a00      	subi      	r2, 1
+    19e2:	a521      	st.b      	r1, (r5, 0x1)
+    19e4:	3a40      	cmpnei      	r2, 0
+    19e6:	0fe1      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e8:	a522      	st.b      	r1, (r5, 0x2)
+    19ea:	1483      	pop      	r4-r6
+
+000019ec <__memcpy_fast>:
+    19ec:	14c3      	push      	r4-r6
+    19ee:	6d83      	mov      	r6, r0
+    19f0:	6d07      	mov      	r4, r1
+    19f2:	6d18      	or      	r4, r6
+    19f4:	3303      	movi      	r3, 3
+    19f6:	690c      	and      	r4, r3
+    19f8:	3c40      	cmpnei      	r4, 0
+    19fa:	0c0b      	bf      	0x1a10	// 1a10 <__memcpy_fast+0x24>
+    19fc:	3a40      	cmpnei      	r2, 0
+    19fe:	0c08      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a00:	8160      	ld.b      	r3, (r1, 0x0)
+    1a02:	2100      	addi      	r1, 1
+    1a04:	2a00      	subi      	r2, 1
+    1a06:	a660      	st.b      	r3, (r6, 0x0)
+    1a08:	2600      	addi      	r6, 1
+    1a0a:	3a40      	cmpnei      	r2, 0
+    1a0c:	0bfa      	bt      	0x1a00	// 1a00 <__memcpy_fast+0x14>
+    1a0e:	1483      	pop      	r4-r6
+    1a10:	3a2f      	cmplti      	r2, 16
+    1a12:	080e      	bt      	0x1a2e	// 1a2e <__memcpy_fast+0x42>
+    1a14:	91a0      	ld.w      	r5, (r1, 0x0)
+    1a16:	9161      	ld.w      	r3, (r1, 0x4)
+    1a18:	9182      	ld.w      	r4, (r1, 0x8)
+    1a1a:	b6a0      	st.w      	r5, (r6, 0x0)
+    1a1c:	91a3      	ld.w      	r5, (r1, 0xc)
+    1a1e:	b661      	st.w      	r3, (r6, 0x4)
+    1a20:	b682      	st.w      	r4, (r6, 0x8)
+    1a22:	b6a3      	st.w      	r5, (r6, 0xc)
+    1a24:	2a0f      	subi      	r2, 16
+    1a26:	210f      	addi      	r1, 16
+    1a28:	260f      	addi      	r6, 16
+    1a2a:	3a2f      	cmplti      	r2, 16
+    1a2c:	0ff4      	bf      	0x1a14	// 1a14 <__memcpy_fast+0x28>
+    1a2e:	3a23      	cmplti      	r2, 4
+    1a30:	0808      	bt      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+    1a32:	9160      	ld.w      	r3, (r1, 0x0)
+    1a34:	2a03      	subi      	r2, 4
+    1a36:	2103      	addi      	r1, 4
+    1a38:	b660      	st.w      	r3, (r6, 0x0)
+    1a3a:	2603      	addi      	r6, 4
+    1a3c:	3a23      	cmplti      	r2, 4
+    1a3e:	0ffa      	bf      	0x1a32	// 1a32 <__memcpy_fast+0x46>
+    1a40:	3a40      	cmpnei      	r2, 0
+    1a42:	0fe6      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a44:	8160      	ld.b      	r3, (r1, 0x0)
+    1a46:	2100      	addi      	r1, 1
+    1a48:	2a00      	subi      	r2, 1
+    1a4a:	a660      	st.b      	r3, (r6, 0x0)
+    1a4c:	2600      	addi      	r6, 1
+    1a4e:	07f9      	br      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+
+Disassembly of section .text.__main:
+
+00001a50 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    1a50:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    1a52:	1009      	lrw      	r0, 0x20000000	// 1a74 <__main+0x24>
+    1a54:	1029      	lrw      	r1, 0x487c	// 1a78 <__main+0x28>
+    1a56:	6442      	cmpne      	r0, r1
+    1a58:	0c05      	bf      	0x1a62	// 1a62 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    1a5a:	1049      	lrw      	r2, 0x2000009c	// 1a7c <__main+0x2c>
+    1a5c:	6082      	subu      	r2, r0
+    1a5e:	e3ffffc7 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    1a62:	1048      	lrw      	r2, 0x20000540	// 1a80 <__main+0x30>
+    1a64:	1008      	lrw      	r0, 0x2000009c	// 1a84 <__main+0x34>
+    1a66:	640a      	cmpne      	r2, r0
+    1a68:	0c05      	bf      	0x1a72	// 1a72 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    1a6a:	6082      	subu      	r2, r0
+    1a6c:	3100      	movi      	r1, 0
+    1a6e:	e3ffff7b 	bsr      	0x1964	// 1964 <__memset_fast>
+  }
+
+	
+}
+    1a72:	1490      	pop      	r15
+    1a74:	20000000 	.long	0x20000000
+    1a78:	0000487c 	.long	0x0000487c
+    1a7c:	2000009c 	.long	0x2000009c
+    1a80:	20000540 	.long	0x20000540
+    1a84:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00001a88 <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    1a88:	3848      	cmpnei      	r0, 8
+    1a8a:	080a      	bt      	0x1a9e	// 1a9e <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    1a8c:	107a      	lrw      	r3, 0x2000004c	// 1af4 <SYSCON_General_CMD.part.0+0x6c>
+    1a8e:	32ff      	movi      	r2, 255
+    1a90:	9320      	ld.w      	r1, (r3, 0x0)
+    1a92:	9160      	ld.w      	r3, (r1, 0x0)
+    1a94:	424c      	lsli      	r2, r2, 12
+    1a96:	68c9      	andn      	r3, r2
+    1a98:	3bae      	bseti      	r3, 14
+    1a9a:	3bb2      	bseti      	r3, 18
+    1a9c:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    1a9e:	1077      	lrw      	r3, 0x2000005c	// 1af8 <SYSCON_General_CMD.part.0+0x70>
+    1aa0:	9360      	ld.w      	r3, (r3, 0x0)
+    1aa2:	9341      	ld.w      	r2, (r3, 0x4)
+    1aa4:	6c80      	or      	r2, r0
+    1aa6:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    1aa8:	9343      	ld.w      	r2, (r3, 0xc)
+    1aaa:	6880      	and      	r2, r0
+    1aac:	3a40      	cmpnei      	r2, 0
+    1aae:	0ffd      	bf      	0x1aa8	// 1aa8 <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    1ab0:	3842      	cmpnei      	r0, 2
+    1ab2:	0807      	bt      	0x1ac0	// 1ac0 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    1ab4:	3102      	movi      	r1, 2
+    1ab6:	9344      	ld.w      	r2, (r3, 0x10)
+    1ab8:	6884      	and      	r2, r1
+    1aba:	3a40      	cmpnei      	r2, 0
+    1abc:	0ffd      	bf      	0x1ab6	// 1ab6 <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    1abe:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    1ac0:	3802      	cmphsi      	r0, 3
+    1ac2:	0809      	bt      	0x1ad4	// 1ad4 <SYSCON_General_CMD.part.0+0x4c>
+    1ac4:	3841      	cmpnei      	r0, 1
+    1ac6:	0bfc      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    1ac8:	3101      	movi      	r1, 1
+    1aca:	9344      	ld.w      	r2, (r3, 0x10)
+    1acc:	6884      	and      	r2, r1
+    1ace:	3a40      	cmpnei      	r2, 0
+    1ad0:	0ffd      	bf      	0x1aca	// 1aca <SYSCON_General_CMD.part.0+0x42>
+    1ad2:	07f6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ad4:	3848      	cmpnei      	r0, 8
+    1ad6:	0807      	bt      	0x1ae4	// 1ae4 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    1ad8:	3108      	movi      	r1, 8
+    1ada:	9344      	ld.w      	r2, (r3, 0x10)
+    1adc:	6884      	and      	r2, r1
+    1ade:	3a40      	cmpnei      	r2, 0
+    1ae0:	0ffd      	bf      	0x1ada	// 1ada <SYSCON_General_CMD.part.0+0x52>
+    1ae2:	07ee      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ae4:	3850      	cmpnei      	r0, 16
+    1ae6:	0bec      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    1ae8:	3110      	movi      	r1, 16
+    1aea:	9344      	ld.w      	r2, (r3, 0x10)
+    1aec:	6884      	and      	r2, r1
+    1aee:	3a40      	cmpnei      	r2, 0
+    1af0:	0ffd      	bf      	0x1aea	// 1aea <SYSCON_General_CMD.part.0+0x62>
+    1af2:	07e6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+    1af4:	2000004c 	.long	0x2000004c
+    1af8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00001afc <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    1afc:	106c      	lrw      	r3, 0x2000005c	// 1b2c <SYSCON_RST_VALUE+0x30>
+    1afe:	104d      	lrw      	r2, 0xffff	// 1b30 <SYSCON_RST_VALUE+0x34>
+    1b00:	9360      	ld.w      	r3, (r3, 0x0)
+    1b02:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    1b04:	104c      	lrw      	r2, 0xffffff	// 1b34 <SYSCON_RST_VALUE+0x38>
+    1b06:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    1b08:	104c      	lrw      	r2, 0xd22d0000	// 1b38 <SYSCON_RST_VALUE+0x3c>
+    1b0a:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    1b0c:	104c      	lrw      	r2, 0x70ff3bff	// 1b3c <SYSCON_RST_VALUE+0x40>
+    1b0e:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    1b10:	320a      	movi      	r2, 10
+    1b12:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b14:	102b      	lrw      	r1, 0x70c	// 1b40 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    1b16:	237f      	addi      	r3, 128
+    1b18:	3200      	movi      	r2, 0
+    1b1a:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    1b1c:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b1e:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    1b20:	1029      	lrw      	r1, 0x3fe	// 1b44 <SYSCON_RST_VALUE+0x48>
+    1b22:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    1b24:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    1b26:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    1b28:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    1b2a:	783c      	jmp      	r15
+    1b2c:	2000005c 	.long	0x2000005c
+    1b30:	0000ffff 	.long	0x0000ffff
+    1b34:	00ffffff 	.long	0x00ffffff
+    1b38:	d22d0000 	.long	0xd22d0000
+    1b3c:	70ff3bff 	.long	0x70ff3bff
+    1b40:	0000070c 	.long	0x0000070c
+    1b44:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+00001b48 <SYSCON_General_CMD>:
+{
+    1b48:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    1b4a:	3840      	cmpnei      	r0, 0
+    1b4c:	0c05      	bf      	0x1b56	// 1b56 <SYSCON_General_CMD+0xe>
+    1b4e:	6c07      	mov      	r0, r1
+    1b50:	e3ffff9c 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+}
+    1b54:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    1b56:	1068      	lrw      	r3, 0x2000005c	// 1b74 <SYSCON_General_CMD+0x2c>
+    1b58:	9360      	ld.w      	r3, (r3, 0x0)
+    1b5a:	9342      	ld.w      	r2, (r3, 0x8)
+    1b5c:	6c84      	or      	r2, r1
+    1b5e:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    1b60:	9343      	ld.w      	r2, (r3, 0xc)
+    1b62:	6884      	and      	r2, r1
+    1b64:	3a40      	cmpnei      	r2, 0
+    1b66:	0bfd      	bt      	0x1b60	// 1b60 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    1b68:	237f      	addi      	r3, 128
+    1b6a:	9301      	ld.w      	r0, (r3, 0x4)
+    1b6c:	6c40      	or      	r1, r0
+    1b6e:	b321      	st.w      	r1, (r3, 0x4)
+}
+    1b70:	07f2      	br      	0x1b54	// 1b54 <SYSCON_General_CMD+0xc>
+    1b72:	0000      	bkpt
+    1b74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+00001b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    1b78:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    1b7a:	3b48      	cmpnei      	r3, 8
+    1b7c:	0828      	bt      	0x1bcc	// 1bcc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b7e:	109d      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b80:	3501      	movi      	r5, 1
+    1b82:	9480      	ld.w      	r4, (r4, 0x0)
+    1b84:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    1b86:	3504      	movi      	r5, 4
+    1b88:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1b8a:	5b83      	subi      	r4, r3, 1
+    1b8c:	3c01      	cmphsi      	r4, 2
+    1b8e:	0c2b      	bf      	0x1be4	// 1be4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b90:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    1b92:	3c04      	cmphsi      	r4, 5
+    1b94:	0c03      	bf      	0x1b9a	// 1b9a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b96:	3b4b      	cmpnei      	r3, 11
+    1b98:	0807      	bt      	0x1ba6	// 1ba6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b9a:	1076      	lrw      	r3, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b9c:	3401      	movi      	r4, 1
+    1b9e:	9360      	ld.w      	r3, (r3, 0x0)
+    1ba0:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    1ba2:	3400      	movi      	r4, 0
+    1ba4:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1ba6:	1094      	lrw      	r4, 0xd22d0000	// 1bf4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    1ba8:	6c10      	or      	r0, r4
+    1baa:	1074      	lrw      	r3, 0x2000005c	// 1bf8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    1bac:	6c40      	or      	r1, r0
+    1bae:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb0:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1bb2:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb4:	4001      	lsli      	r0, r0, 1
+    1bb6:	9324      	ld.w      	r1, (r3, 0x10)
+    1bb8:	6840      	and      	r1, r0
+    1bba:	3940      	cmpnei      	r1, 0
+    1bbc:	0ffd      	bf      	0x1bb6	// 1bb6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    1bbe:	1030      	lrw      	r1, 0xc33c0000	// 1bfc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    1bc0:	6c48      	or      	r1, r2
+    1bc2:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    1bc4:	9328      	ld.w      	r1, (r3, 0x20)
+    1bc6:	644a      	cmpne      	r2, r1
+    1bc8:	0bfe      	bt      	0x1bc4	// 1bc4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    1bca:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    1bcc:	3b40      	cmpnei      	r3, 0
+    1bce:	0c03      	bf      	0x1bd4	// 1bd4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    1bd0:	3b49      	cmpnei      	r3, 9
+    1bd2:	0807      	bt      	0x1be0	// 1be0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    1bd4:	1087      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bd6:	3501      	movi      	r5, 1
+    1bd8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bda:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    1bdc:	3502      	movi      	r5, 2
+    1bde:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1be0:	3b4a      	cmpnei      	r3, 10
+    1be2:	0bd4      	bt      	0x1b8a	// 1b8a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    1be4:	1083      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1be6:	3501      	movi      	r5, 1
+    1be8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bea:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    1bec:	b4a5      	st.w      	r5, (r4, 0x14)
+    1bee:	07d1      	br      	0x1b90	// 1b90 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    1bf0:	20000060 	.long	0x20000060
+    1bf4:	d22d0000 	.long	0xd22d0000
+    1bf8:	2000005c 	.long	0x2000005c
+    1bfc:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+00001c00 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    1c00:	14d1      	push      	r4, r15
+    1c02:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    1c04:	3110      	movi      	r1, 16
+    1c06:	3000      	movi      	r0, 0
+    1c08:	e3ffffa0 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    1c0c:	1066      	lrw      	r3, 0x2000005c	// 1c24 <SYSCON_HFOSC_SELECTE+0x24>
+    1c0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c10:	9319      	ld.w      	r0, (r3, 0x64)
+    1c12:	3884      	bclri      	r0, 4
+    1c14:	3885      	bclri      	r0, 5
+    1c16:	6c10      	or      	r0, r4
+    1c18:	b319      	st.w      	r0, (r3, 0x64)
+    1c1a:	3010      	movi      	r0, 16
+    1c1c:	e3ffff36 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    1c20:	1491      	pop      	r4, r15
+    1c22:	0000      	bkpt
+    1c24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+00001c28 <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    1c28:	106c      	lrw      	r3, 0x2000005c	// 1c58 <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    1c2a:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c2c:	9360      	ld.w      	r3, (r3, 0x0)
+    1c2e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1c30:	0c0a      	bf      	0x1c44	// 1c44 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c32:	104b      	lrw      	r2, 0x78870000	// 1c5c <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c34:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c36:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c38:	4125      	lsli      	r1, r1, 5
+    1c3a:	934d      	ld.w      	r2, (r3, 0x34)
+    1c3c:	6884      	and      	r2, r1
+    1c3e:	3a40      	cmpnei      	r2, 0
+    1c40:	0ffd      	bf      	0x1c3a	// 1c3a <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    1c42:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c44:	1047      	lrw      	r2, 0x788755aa	// 1c60 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c46:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c48:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c4a:	4125      	lsli      	r1, r1, 5
+    1c4c:	934d      	ld.w      	r2, (r3, 0x34)
+    1c4e:	6884      	and      	r2, r1
+    1c50:	3a40      	cmpnei      	r2, 0
+    1c52:	0bfd      	bt      	0x1c4c	// 1c4c <SYSCON_WDT_CMD+0x24>
+    1c54:	07f7      	br      	0x1c42	// 1c42 <SYSCON_WDT_CMD+0x1a>
+    1c56:	0000      	bkpt
+    1c58:	2000005c 	.long	0x2000005c
+    1c5c:	78870000 	.long	0x78870000
+    1c60:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00001c64 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    1c64:	1064      	lrw      	r3, 0x2000005c	// 1c74 <SYSCON_IWDCNT_Reload+0x10>
+    1c66:	32b4      	movi      	r2, 180
+    1c68:	9360      	ld.w      	r3, (r3, 0x0)
+    1c6a:	237f      	addi      	r3, 128
+    1c6c:	4257      	lsli      	r2, r2, 23
+    1c6e:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    1c70:	783c      	jmp      	r15
+    1c72:	0000      	bkpt
+    1c74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+00001c78 <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    1c78:	1044      	lrw      	r2, 0x87780000	// 1c88 <SYSCON_IWDCNT_Config+0x10>
+    1c7a:	1065      	lrw      	r3, 0x2000005c	// 1c8c <SYSCON_IWDCNT_Config+0x14>
+    1c7c:	6c48      	or      	r1, r2
+    1c7e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c80:	6c04      	or      	r0, r1
+    1c82:	237f      	addi      	r3, 128
+    1c84:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    1c86:	783c      	jmp      	r15
+    1c88:	87780000 	.long	0x87780000
+    1c8c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00001c90 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    1c90:	14c3      	push      	r4-r6
+    1c92:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    1c94:	10c5      	lrw      	r6, 0xb44b0000	// 1ca8 <SYSCON_LVD_Config+0x18>
+    1c96:	6d18      	or      	r4, r6
+    1c98:	6cd0      	or      	r3, r4
+    1c9a:	6c8c      	or      	r2, r3
+    1c9c:	6c48      	or      	r1, r2
+    1c9e:	10a4      	lrw      	r5, 0x2000005c	// 1cac <SYSCON_LVD_Config+0x1c>
+    1ca0:	6c04      	or      	r0, r1
+    1ca2:	95a0      	ld.w      	r5, (r5, 0x0)
+    1ca4:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    1ca6:	1483      	pop      	r4-r6
+    1ca8:	b44b0000 	.long	0xb44b0000
+    1cac:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00001cb0 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    1cb0:	1066      	lrw      	r3, 0x2000005c	// 1cc8 <LVD_Int_Enable+0x18>
+    1cb2:	3180      	movi      	r1, 128
+    1cb4:	9360      	ld.w      	r3, (r3, 0x0)
+    1cb6:	3280      	movi      	r2, 128
+    1cb8:	604c      	addu      	r1, r3
+    1cba:	4244      	lsli      	r2, r2, 4
+    1cbc:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    1cbe:	935d      	ld.w      	r2, (r3, 0x74)
+    1cc0:	3aab      	bseti      	r2, 11
+    1cc2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1cc4:	783c      	jmp      	r15
+    1cc6:	0000      	bkpt
+    1cc8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00001ccc <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    1ccc:	1066      	lrw      	r3, 0x2000005c	// 1ce4 <IWDT_Int_Enable+0x18>
+    1cce:	3180      	movi      	r1, 128
+    1cd0:	9360      	ld.w      	r3, (r3, 0x0)
+    1cd2:	3280      	movi      	r2, 128
+    1cd4:	604c      	addu      	r1, r3
+    1cd6:	4241      	lsli      	r2, r2, 1
+    1cd8:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    1cda:	935d      	ld.w      	r2, (r3, 0x74)
+    1cdc:	3aa8      	bseti      	r2, 8
+    1cde:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1ce0:	783c      	jmp      	r15
+    1ce2:	0000      	bkpt
+    1ce4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+00001ce8 <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    1ce8:	3a40      	cmpnei      	r2, 0
+    1cea:	0c04      	bf      	0x1cf2	// 1cf2 <EXTI_trigger_CMD+0xa>
+    1cec:	3a41      	cmpnei      	r2, 1
+    1cee:	0c0e      	bf      	0x1d0a	// 1d0a <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    1cf0:	783c      	jmp      	r15
+    1cf2:	106d      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1cf4:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    1cf6:	9360      	ld.w      	r3, (r3, 0x0)
+    1cf8:	237f      	addi      	r3, 128
+    1cfa:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    1cfc:	0c04      	bf      	0x1d04	// 1d04 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    1cfe:	6c48      	or      	r1, r2
+    1d00:	b325      	st.w      	r1, (r3, 0x14)
+    1d02:	07f7      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    1d04:	6885      	andn      	r2, r1
+    1d06:	b345      	st.w      	r2, (r3, 0x14)
+    1d08:	07f4      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d0a:	1067      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d0c:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    1d0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1d10:	237f      	addi      	r3, 128
+    1d12:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    1d14:	0c04      	bf      	0x1d1c	// 1d1c <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    1d16:	6c48      	or      	r1, r2
+    1d18:	b326      	st.w      	r1, (r3, 0x18)
+    1d1a:	07eb      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    1d1c:	6885      	andn      	r2, r1
+    1d1e:	b346      	st.w      	r2, (r3, 0x18)
+}
+    1d20:	07e8      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d22:	0000      	bkpt
+    1d24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+00001d28 <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    1d28:	3202      	movi      	r2, 2
+    1d2a:	1062      	lrw      	r3, 0xe000e100	// 1d30 <SYSCON_Int_Enable+0x8>
+    1d2c:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1d2e:	783c      	jmp      	r15
+    1d30:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+00001d34 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d34:	1066      	lrw      	r3, 0xe000e400	// 1d4c <SYSCON_INT_Priority+0x18>
+    1d36:	1047      	lrw      	r2, 0xc0c0c0c0	// 1d50 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d38:	1027      	lrw      	r1, 0xc0c000c0	// 1d54 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d3a:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    1d3c:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    1d3e:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    1d40:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    1d42:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    1d44:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d46:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    1d48:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    1d4a:	783c      	jmp      	r15
+    1d4c:	e000e400 	.long	0xe000e400
+    1d50:	c0c0c0c0 	.long	0xc0c0c0c0
+    1d54:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+00001d58 <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    1d58:	14c1      	push      	r4
+    1d5a:	4862      	lsri      	r3, r0, 2
+    1d5c:	4342      	lsli      	r2, r3, 2
+    1d5e:	106a      	lrw      	r3, 0x20000064	// 1d84 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    1d60:	3403      	movi      	r4, 3
+    1d62:	9360      	ld.w      	r3, (r3, 0x0)
+    1d64:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d66:	3280      	movi      	r2, 128
+    1d68:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    1d6a:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d6c:	60c8      	addu      	r3, r2
+    1d6e:	4003      	lsli      	r0, r0, 3
+    1d70:	34ff      	movi      	r4, 255
+    1d72:	9340      	ld.w      	r2, (r3, 0x0)
+    1d74:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1d76:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d78:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1d7a:	7040      	lsl      	r1, r0
+    1d7c:	6c48      	or      	r1, r2
+    1d7e:	b320      	st.w      	r1, (r3, 0x0)
+}
+    1d80:	1481      	pop      	r4
+    1d82:	0000      	bkpt
+    1d84:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+00001d88 <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    1d88:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    1d8a:	3907      	cmphsi      	r1, 8
+{
+    1d8c:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    1d8e:	0830      	bt      	0x1dee	// 1dee <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    1d90:	5903      	subi      	r0, r1, 1
+    1d92:	3806      	cmphsi      	r0, 7
+    1d94:	0827      	bt      	0x1de2	// 1de2 <GPIO_Init+0x5a>
+    1d96:	e3fff7b3 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1d9a:	1004      	.short	0x1004
+    1d9c:	1d1a1613 	.long	0x1d1a1613
+    1da0:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1da2:	3300      	movi      	r3, 0
+    1da4:	3104      	movi      	r1, 4
+    1da6:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    1da8:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1daa:	9440      	ld.w      	r2, (r4, 0x0)
+    1dac:	68c8      	and      	r3, r2
+        if (Dir)
+    1dae:	0c1e      	bf      	0x1dea	// 1dea <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1db0:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1db2:	7084      	lsl      	r2, r1
+    1db4:	6cc8      	or      	r3, r2
+    1db6:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    1db8:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1dba:	3108      	movi      	r1, 8
+    1dbc:	1166      	lrw      	r3, 0xfffff0ff	// 1e54 <GPIO_Init+0xcc>
+    1dbe:	07f5      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1dc0:	310c      	movi      	r1, 12
+    1dc2:	1166      	lrw      	r3, 0xffff0fff	// 1e58 <GPIO_Init+0xd0>
+    1dc4:	07f2      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1dc6:	3110      	movi      	r1, 16
+    1dc8:	1165      	lrw      	r3, 0xfff10000	// 1e5c <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1dca:	2b00      	subi      	r3, 1
+    1dcc:	07ee      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1dce:	3114      	movi      	r1, 20
+    1dd0:	1164      	lrw      	r3, 0xff100000	// 1e60 <GPIO_Init+0xd8>
+    1dd2:	07fc      	br      	0x1dca	// 1dca <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1dd4:	33f1      	movi      	r3, 241
+    1dd6:	3118      	movi      	r1, 24
+    1dd8:	4378      	lsli      	r3, r3, 24
+    1dda:	07f8      	br      	0x1dca	// 1dca <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1ddc:	311c      	movi      	r1, 28
+    1dde:	1162      	lrw      	r3, 0xfffffff	// 1e64 <GPIO_Init+0xdc>
+    1de0:	07e4      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1de2:	3300      	movi      	r3, 0
+    1de4:	3100      	movi      	r1, 0
+    1de6:	2b0f      	subi      	r3, 16
+    1de8:	07e0      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1dea:	3202      	movi      	r2, 2
+    1dec:	07e3      	br      	0x1db2	// 1db2 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    1dee:	390f      	cmphsi      	r1, 16
+    1df0:	0be4      	bt      	0x1db8	// 1db8 <GPIO_Init+0x30>
+        switch (PinNum)
+    1df2:	2908      	subi      	r1, 9
+    1df4:	3906      	cmphsi      	r1, 7
+    1df6:	6c07      	mov      	r0, r1
+    1df8:	0827      	bt      	0x1e46	// 1e46 <GPIO_Init+0xbe>
+    1dfa:	e3fff781 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1dfe:	1004      	.short	0x1004
+    1e00:	1d1a1613 	.long	0x1d1a1613
+    1e04:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e06:	3300      	movi      	r3, 0
+    1e08:	3104      	movi      	r1, 4
+    1e0a:	2bf0      	subi      	r3, 241
+      if (Dir)
+    1e0c:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e0e:	9441      	ld.w      	r2, (r4, 0x4)
+    1e10:	68c8      	and      	r3, r2
+      if (Dir)
+    1e12:	0c1e      	bf      	0x1e4e	// 1e4e <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e14:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e16:	7084      	lsl      	r2, r1
+    1e18:	6cc8      	or      	r3, r2
+    1e1a:	b461      	st.w      	r3, (r4, 0x4)
+}
+    1e1c:	07ce      	br      	0x1db8	// 1db8 <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e1e:	3108      	movi      	r1, 8
+    1e20:	106d      	lrw      	r3, 0xfffff0ff	// 1e54 <GPIO_Init+0xcc>
+    1e22:	07f5      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e24:	310c      	movi      	r1, 12
+    1e26:	106d      	lrw      	r3, 0xffff0fff	// 1e58 <GPIO_Init+0xd0>
+    1e28:	07f2      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e2a:	3110      	movi      	r1, 16
+    1e2c:	106c      	lrw      	r3, 0xfff10000	// 1e5c <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e2e:	2b00      	subi      	r3, 1
+    1e30:	07ee      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e32:	3114      	movi      	r1, 20
+    1e34:	106b      	lrw      	r3, 0xff100000	// 1e60 <GPIO_Init+0xd8>
+    1e36:	07fc      	br      	0x1e2e	// 1e2e <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e38:	33f1      	movi      	r3, 241
+    1e3a:	3118      	movi      	r1, 24
+    1e3c:	4378      	lsli      	r3, r3, 24
+    1e3e:	07f8      	br      	0x1e2e	// 1e2e <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e40:	311c      	movi      	r1, 28
+    1e42:	1069      	lrw      	r3, 0xfffffff	// 1e64 <GPIO_Init+0xdc>
+    1e44:	07e4      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e46:	3300      	movi      	r3, 0
+    1e48:	3100      	movi      	r1, 0
+    1e4a:	2b0f      	subi      	r3, 16
+    1e4c:	07e0      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e4e:	3202      	movi      	r2, 2
+    1e50:	07e3      	br      	0x1e16	// 1e16 <GPIO_Init+0x8e>
+    1e52:	0000      	bkpt
+    1e54:	fffff0ff 	.long	0xfffff0ff
+    1e58:	ffff0fff 	.long	0xffff0fff
+    1e5c:	fff10000 	.long	0xfff10000
+    1e60:	ff100000 	.long	0xff100000
+    1e64:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+00001e68 <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    1e68:	4121      	lsli      	r1, r1, 1
+    1e6a:	3203      	movi      	r2, 3
+    1e6c:	9068      	ld.w      	r3, (r0, 0x20)
+    1e6e:	7084      	lsl      	r2, r1
+    1e70:	68c9      	andn      	r3, r2
+    1e72:	3201      	movi      	r2, 1
+    1e74:	7084      	lsl      	r2, r1
+    1e76:	6cc8      	or      	r3, r2
+    1e78:	b068      	st.w      	r3, (r0, 0x20)
+}
+    1e7a:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00001e7c <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    1e7c:	4121      	lsli      	r1, r1, 1
+    1e7e:	3301      	movi      	r3, 1
+    1e80:	9049      	ld.w      	r2, (r0, 0x24)
+    1e82:	70c4      	lsl      	r3, r1
+    1e84:	6cc8      	or      	r3, r2
+    1e86:	b069      	st.w      	r3, (r0, 0x24)
+}
+    1e88:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+00001e8a <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    1e8a:	3301      	movi      	r3, 1
+    1e8c:	70c4      	lsl      	r3, r1
+    1e8e:	b063      	st.w      	r3, (r0, 0xc)
+}
+    1e90:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00001e92 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    1e92:	3301      	movi      	r3, 1
+    1e94:	70c4      	lsl      	r3, r1
+    1e96:	b064      	st.w      	r3, (r0, 0x10)
+}
+    1e98:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+00001e9a <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    1e9a:	9045      	ld.w      	r2, (r0, 0x14)
+    1e9c:	3301      	movi      	r3, 1
+    1e9e:	7085      	lsr      	r2, r1
+    1ea0:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    1ea2:	3a40      	cmpnei      	r2, 0
+    1ea4:	70c4      	lsl      	r3, r1
+    1ea6:	0c03      	bf      	0x1eac	// 1eac <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    1ea8:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    1eaa:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    1eac:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    1eae:	07fe      	br      	0x1eaa	// 1eaa <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00001eb0 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    1eb0:	3301      	movi      	r3, 1
+    1eb2:	9046      	ld.w      	r2, (r0, 0x18)
+    1eb4:	70c4      	lsl      	r3, r1
+    1eb6:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    1eb8:	64ca      	cmpne      	r2, r3
+    1eba:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    1ebc:	7400      	zextb      	r0, r0
+}
+    1ebe:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00001ec0 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    1ec0:	3301      	movi      	r3, 1
+    1ec2:	9045      	ld.w      	r2, (r0, 0x14)
+    1ec4:	70c4      	lsl      	r3, r1
+    1ec6:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    1ec8:	64ca      	cmpne      	r2, r3
+    1eca:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    1ecc:	7400      	zextb      	r0, r0
+}
+    1ece:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00001ed0 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    1ed0:	1064      	lrw      	r3, 0x20000014	// 1ee0 <LPT_Soft_Reset+0x10>
+    1ed2:	9340      	ld.w      	r2, (r3, 0x0)
+    1ed4:	9261      	ld.w      	r3, (r2, 0x4)
+    1ed6:	3bac      	bseti      	r3, 12
+    1ed8:	3bae      	bseti      	r3, 14
+    1eda:	b261      	st.w      	r3, (r2, 0x4)
+}
+    1edc:	783c      	jmp      	r15
+    1ede:	0000      	bkpt
+    1ee0:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+00001ee4 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    1ee4:	1063      	lrw      	r3, 0x20000010	// 1ef0 <WWDT_CNT_Load+0xc>
+    1ee6:	9360      	ld.w      	r3, (r3, 0x0)
+    1ee8:	9340      	ld.w      	r2, (r3, 0x0)
+    1eea:	6c08      	or      	r0, r2
+    1eec:	b300      	st.w      	r0, (r3, 0x0)
+}
+    1eee:	783c      	jmp      	r15
+    1ef0:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+00001ef4 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    1ef4:	3300      	movi      	r3, 0
+    1ef6:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    1ef8:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    1efa:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    1efc:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    1efe:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    1f00:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    1f02:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    1f04:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    1f06:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    1f08:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    1f0a:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    1f0c:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    1f0e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+00001f10 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    1f10:	9060      	ld.w      	r3, (r0, 0x0)
+    1f12:	3ba0      	bseti      	r3, 0
+    1f14:	b060      	st.w      	r3, (r0, 0x0)
+}
+    1f16:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+00001f18 <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    1f18:	9060      	ld.w      	r3, (r0, 0x0)
+    1f1a:	3bac      	bseti      	r3, 12
+    1f1c:	3bae      	bseti      	r3, 14
+    1f1e:	b060      	st.w      	r3, (r0, 0x0)
+}
+    1f20:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+00001f22 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    1f22:	14c3      	push      	r4-r6
+    1f24:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f26:	6d97      	mov      	r6, r5
+    1f28:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    1f2a:	6d18      	or      	r4, r6
+    1f2c:	6cd0      	or      	r3, r4
+    1f2e:	90a1      	ld.w      	r5, (r0, 0x4)
+    1f30:	6c4c      	or      	r1, r3
+    1f32:	6c54      	or      	r1, r5
+    1f34:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    1f36:	b042      	st.w      	r2, (r0, 0x8)
+}
+    1f38:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+00001f3a <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    1f3a:	14c4      	push      	r4-r7
+    1f3c:	1421      	subi      	r14, r14, 4
+    1f3e:	9885      	ld.w      	r4, (r14, 0x14)
+    1f40:	6dd3      	mov      	r7, r4
+    1f42:	9886      	ld.w      	r4, (r14, 0x18)
+    1f44:	b880      	st.w      	r4, (r14, 0x0)
+    1f46:	9887      	ld.w      	r4, (r14, 0x1c)
+    1f48:	6d93      	mov      	r6, r4
+    1f4a:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    1f4c:	6d58      	or      	r5, r6
+    1f4e:	98c0      	ld.w      	r6, (r14, 0x0)
+    1f50:	6d58      	or      	r5, r6
+    1f52:	6d5c      	or      	r5, r7
+    1f54:	6cd4      	or      	r3, r5
+    1f56:	6c8c      	or      	r2, r3
+    1f58:	9081      	ld.w      	r4, (r0, 0x4)
+    1f5a:	6c48      	or      	r1, r2
+    1f5c:	6d04      	or      	r4, r1
+    1f5e:	6d9f      	mov      	r6, r7
+    1f60:	b081      	st.w      	r4, (r0, 0x4)
+}
+    1f62:	1401      	addi      	r14, r14, 4
+    1f64:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+00001f66 <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    1f66:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    1f68:	b044      	st.w      	r2, (r0, 0x10)
+}
+    1f6a:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00001f6c <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    1f6c:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    1f6e:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    1f70:	0c04      	bf      	0x1f78	// 1f78 <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    1f72:	6c8c      	or      	r2, r3
+    1f74:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    1f76:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    1f78:	68c9      	andn      	r3, r2
+    1f7a:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    1f7c:	07fd      	br      	0x1f76	// 1f76 <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00001f80 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    1f80:	3380      	movi      	r3, 128
+    1f82:	4376      	lsli      	r3, r3, 22
+    1f84:	1042      	lrw      	r2, 0xe000e100	// 1f8c <BT1_INT_ENABLE+0xc>
+    1f86:	b260      	st.w      	r3, (r2, 0x0)
+}
+    1f88:	783c      	jmp      	r15
+    1f8a:	0000      	bkpt
+    1f8c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00001f90 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    1f90:	3840      	cmpnei      	r0, 0
+    1f92:	080a      	bt      	0x1fa6	// 1fa6 <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    1f94:	1165      	lrw      	r3, 0x20000048	// 2028 <GPT_IO_Init+0x98>
+    1f96:	31f0      	movi      	r1, 240
+    1f98:	9340      	ld.w      	r2, (r3, 0x0)
+    1f9a:	9260      	ld.w      	r3, (r2, 0x0)
+    1f9c:	68c5      	andn      	r3, r1
+    1f9e:	3ba4      	bseti      	r3, 4
+    1fa0:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    1fa2:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    1fa4:	040b      	br      	0x1fba	// 1fba <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    1fa6:	3841      	cmpnei      	r0, 1
+    1fa8:	080a      	bt      	0x1fbc	// 1fbc <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    1faa:	1161      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1fac:	31f0      	movi      	r1, 240
+    1fae:	9340      	ld.w      	r2, (r3, 0x0)
+    1fb0:	9261      	ld.w      	r3, (r2, 0x4)
+    1fb2:	68c5      	andn      	r3, r1
+    1fb4:	3ba4      	bseti      	r3, 4
+    1fb6:	3ba6      	bseti      	r3, 6
+    1fb8:	b261      	st.w      	r3, (r2, 0x4)
+}
+    1fba:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    1fbc:	3842      	cmpnei      	r0, 2
+    1fbe:	080b      	bt      	0x1fd4	// 1fd4 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    1fc0:	107b      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1fc2:	32f0      	movi      	r2, 240
+    1fc4:	9320      	ld.w      	r1, (r3, 0x0)
+    1fc6:	9161      	ld.w      	r3, (r1, 0x4)
+    1fc8:	4244      	lsli      	r2, r2, 4
+    1fca:	68c9      	andn      	r3, r2
+    1fcc:	3ba9      	bseti      	r3, 9
+    1fce:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    1fd0:	b161      	st.w      	r3, (r1, 0x4)
+    1fd2:	07f4      	br      	0x1fba	// 1fba <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    1fd4:	3843      	cmpnei      	r0, 3
+    1fd6:	080b      	bt      	0x1fec	// 1fec <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    1fd8:	1075      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1fda:	32f0      	movi      	r2, 240
+    1fdc:	9320      	ld.w      	r1, (r3, 0x0)
+    1fde:	4244      	lsli      	r2, r2, 4
+    1fe0:	9161      	ld.w      	r3, (r1, 0x4)
+    1fe2:	68c9      	andn      	r3, r2
+    1fe4:	32e0      	movi      	r2, 224
+    1fe6:	4243      	lsli      	r2, r2, 3
+    1fe8:	6cc8      	or      	r3, r2
+    1fea:	07f3      	br      	0x1fd0	// 1fd0 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    1fec:	3844      	cmpnei      	r0, 4
+    1fee:	080a      	bt      	0x2002	// 2002 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    1ff0:	106f      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1ff2:	32f0      	movi      	r2, 240
+    1ff4:	9320      	ld.w      	r1, (r3, 0x0)
+    1ff6:	9161      	ld.w      	r3, (r1, 0x4)
+    1ff8:	4248      	lsli      	r2, r2, 8
+    1ffa:	68c9      	andn      	r3, r2
+    1ffc:	3bad      	bseti      	r3, 13
+    1ffe:	3bae      	bseti      	r3, 14
+    2000:	07e8      	br      	0x1fd0	// 1fd0 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    2002:	3845      	cmpnei      	r0, 5
+    2004:	0808      	bt      	0x2014	// 2014 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    2006:	1069      	lrw      	r3, 0x20000048	// 2028 <GPT_IO_Init+0x98>
+    2008:	310f      	movi      	r1, 15
+    200a:	9340      	ld.w      	r2, (r3, 0x0)
+    200c:	9260      	ld.w      	r3, (r2, 0x0)
+    200e:	68c5      	andn      	r3, r1
+    2010:	3ba2      	bseti      	r3, 2
+    2012:	07c8      	br      	0x1fa2	// 1fa2 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    2014:	3846      	cmpnei      	r0, 6
+    2016:	0bd2      	bt      	0x1fba	// 1fba <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    2018:	1064      	lrw      	r3, 0x20000048	// 2028 <GPT_IO_Init+0x98>
+    201a:	31f0      	movi      	r1, 240
+    201c:	9340      	ld.w      	r2, (r3, 0x0)
+    201e:	9260      	ld.w      	r3, (r2, 0x0)
+    2020:	68c5      	andn      	r3, r1
+    2022:	3ba5      	bseti      	r3, 5
+    2024:	3ba6      	bseti      	r3, 6
+    2026:	07be      	br      	0x1fa2	// 1fa2 <GPT_IO_Init+0x12>
+    2028:	20000048 	.long	0x20000048
+    202c:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+00002030 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    2030:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    2032:	6c48      	or      	r1, r2
+    2034:	1083      	lrw      	r4, 0x20000024	// 2040 <GPT_Configure+0x10>
+    2036:	6c04      	or      	r0, r1
+    2038:	9480      	ld.w      	r4, (r4, 0x0)
+    203a:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    203c:	b462      	st.w      	r3, (r4, 0x8)
+}
+    203e:	1481      	pop      	r4
+    2040:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00002044 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    2044:	14c4      	push      	r4-r7
+    2046:	1423      	subi      	r14, r14, 12
+    2048:	9887      	ld.w      	r4, (r14, 0x1c)
+    204a:	6dd3      	mov      	r7, r4
+    204c:	9888      	ld.w      	r4, (r14, 0x20)
+    204e:	b880      	st.w      	r4, (r14, 0x0)
+    2050:	9889      	ld.w      	r4, (r14, 0x24)
+    2052:	b881      	st.w      	r4, (r14, 0x4)
+    2054:	988a      	ld.w      	r4, (r14, 0x28)
+    2056:	b882      	st.w      	r4, (r14, 0x8)
+    2058:	988b      	ld.w      	r4, (r14, 0x2c)
+    205a:	6d93      	mov      	r6, r4
+    205c:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    205e:	3cb2      	bseti      	r4, 18
+    2060:	6d18      	or      	r4, r6
+    2062:	98c2      	ld.w      	r6, (r14, 0x8)
+    2064:	6d18      	or      	r4, r6
+    2066:	98c1      	ld.w      	r6, (r14, 0x4)
+    2068:	6d18      	or      	r4, r6
+    206a:	98c0      	ld.w      	r6, (r14, 0x0)
+    206c:	6d18      	or      	r4, r6
+    206e:	6d1c      	or      	r4, r7
+    2070:	6cd0      	or      	r3, r4
+    2072:	6c8c      	or      	r2, r3
+    2074:	6c48      	or      	r1, r2
+    2076:	10a4      	lrw      	r5, 0x20000024	// 2084 <GPT_WaveCtrl_Configure+0x40>
+    2078:	6c04      	or      	r0, r1
+    207a:	95a0      	ld.w      	r5, (r5, 0x0)
+    207c:	6d9f      	mov      	r6, r7
+    207e:	b503      	st.w      	r0, (r5, 0xc)
+}
+    2080:	1403      	addi      	r14, r14, 12
+    2082:	1484      	pop      	r4-r7
+    2084:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+00002088 <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    2088:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    208a:	6c8c      	or      	r2, r3
+    208c:	6c48      	or      	r1, r2
+    208e:	1083      	lrw      	r4, 0x20000024	// 2098 <GPT_WaveLoad_Configure+0x10>
+    2090:	6c04      	or      	r0, r1
+    2092:	9480      	ld.w      	r4, (r4, 0x0)
+    2094:	b411      	st.w      	r0, (r4, 0x44)
+}
+    2096:	1481      	pop      	r4
+    2098:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+0000209c <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    209c:	14c4      	push      	r4-r7
+    209e:	1425      	subi      	r14, r14, 20
+    20a0:	1c09      	addi      	r4, r14, 36
+    20a2:	8480      	ld.b      	r4, (r4, 0x0)
+    20a4:	b880      	st.w      	r4, (r14, 0x0)
+    20a6:	1c0a      	addi      	r4, r14, 40
+    20a8:	8480      	ld.b      	r4, (r4, 0x0)
+    20aa:	b881      	st.w      	r4, (r14, 0x4)
+    20ac:	1c0b      	addi      	r4, r14, 44
+    20ae:	8480      	ld.b      	r4, (r4, 0x0)
+    20b0:	b882      	st.w      	r4, (r14, 0x8)
+    20b2:	1c0c      	addi      	r4, r14, 48
+    20b4:	8480      	ld.b      	r4, (r4, 0x0)
+    20b6:	b883      	st.w      	r4, (r14, 0xc)
+    20b8:	1c0d      	addi      	r4, r14, 52
+    20ba:	8480      	ld.b      	r4, (r4, 0x0)
+    20bc:	1e10      	addi      	r6, r14, 64
+    20be:	b884      	st.w      	r4, (r14, 0x10)
+    20c0:	1d0f      	addi      	r5, r14, 60
+    20c2:	1c0e      	addi      	r4, r14, 56
+    20c4:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    20c6:	3840      	cmpnei      	r0, 0
+{
+    20c8:	1e11      	addi      	r6, r14, 68
+    20ca:	8480      	ld.b      	r4, (r4, 0x0)
+    20cc:	85a0      	ld.b      	r5, (r5, 0x0)
+    20ce:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    20d0:	081f      	bt      	0x210e	// 210e <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    20d2:	47f0      	lsli      	r7, r7, 16
+    20d4:	46d2      	lsli      	r6, r6, 18
+    20d6:	45ae      	lsli      	r5, r5, 14
+    20d8:	6dd8      	or      	r7, r6
+    20da:	6dd4      	or      	r7, r5
+    20dc:	448c      	lsli      	r4, r4, 12
+    20de:	6dd0      	or      	r7, r4
+    20e0:	9884      	ld.w      	r4, (r14, 0x10)
+    20e2:	448a      	lsli      	r4, r4, 10
+    20e4:	6dd0      	or      	r7, r4
+    20e6:	9883      	ld.w      	r4, (r14, 0xc)
+    20e8:	4488      	lsli      	r4, r4, 8
+    20ea:	98a2      	ld.w      	r5, (r14, 0x8)
+    20ec:	6d1c      	or      	r4, r7
+    20ee:	45e6      	lsli      	r7, r5, 6
+    20f0:	6d1c      	or      	r4, r7
+    20f2:	6c90      	or      	r2, r4
+    20f4:	6cc8      	or      	r3, r2
+    20f6:	9841      	ld.w      	r2, (r14, 0x4)
+    20f8:	4244      	lsli      	r2, r2, 4
+    20fa:	6cc8      	or      	r3, r2
+    20fc:	6c4c      	or      	r1, r3
+    20fe:	9860      	ld.w      	r3, (r14, 0x0)
+    2100:	4362      	lsli      	r3, r3, 2
+    2102:	1013      	lrw      	r0, 0x20000024	// 214c <GPT_WaveOut_Configure+0xb0>
+    2104:	6c4c      	or      	r1, r3
+    2106:	9000      	ld.w      	r0, (r0, 0x0)
+    2108:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    210a:	1405      	addi      	r14, r14, 20
+    210c:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    210e:	3841      	cmpnei      	r0, 1
+    2110:	0bfd      	bt      	0x210a	// 210a <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    2112:	47f0      	lsli      	r7, r7, 16
+    2114:	46d2      	lsli      	r6, r6, 18
+    2116:	45ae      	lsli      	r5, r5, 14
+    2118:	6dd8      	or      	r7, r6
+    211a:	6dd4      	or      	r7, r5
+    211c:	448c      	lsli      	r4, r4, 12
+    211e:	6dd0      	or      	r7, r4
+    2120:	9884      	ld.w      	r4, (r14, 0x10)
+    2122:	448a      	lsli      	r4, r4, 10
+    2124:	6dd0      	or      	r7, r4
+    2126:	9883      	ld.w      	r4, (r14, 0xc)
+    2128:	4488      	lsli      	r4, r4, 8
+    212a:	98a2      	ld.w      	r5, (r14, 0x8)
+    212c:	6d1c      	or      	r4, r7
+    212e:	45e6      	lsli      	r7, r5, 6
+    2130:	6d1c      	or      	r4, r7
+    2132:	6c90      	or      	r2, r4
+    2134:	6cc8      	or      	r3, r2
+    2136:	9841      	ld.w      	r2, (r14, 0x4)
+    2138:	4244      	lsli      	r2, r2, 4
+    213a:	6cc8      	or      	r3, r2
+    213c:	6c4c      	or      	r1, r3
+    213e:	9860      	ld.w      	r3, (r14, 0x0)
+    2140:	4362      	lsli      	r3, r3, 2
+    2142:	1003      	lrw      	r0, 0x20000024	// 214c <GPT_WaveOut_Configure+0xb0>
+    2144:	6c4c      	or      	r1, r3
+    2146:	9000      	ld.w      	r0, (r0, 0x0)
+    2148:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    214a:	07e0      	br      	0x210a	// 210a <GPT_WaveOut_Configure+0x6e>
+    214c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00002150 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    2150:	1063      	lrw      	r3, 0x20000024	// 215c <GPT_Start+0xc>
+    2152:	9340      	ld.w      	r2, (r3, 0x0)
+    2154:	9261      	ld.w      	r3, (r2, 0x4)
+    2156:	3ba0      	bseti      	r3, 0
+    2158:	b261      	st.w      	r3, (r2, 0x4)
+}
+    215a:	783c      	jmp      	r15
+    215c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00002160 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    2160:	1063      	lrw      	r3, 0x20000024	// 216c <GPT_Period_CMP_Write+0xc>
+    2162:	9360      	ld.w      	r3, (r3, 0x0)
+    2164:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    2166:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    2168:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    216a:	783c      	jmp      	r15
+    216c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00002170 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    2170:	1066      	lrw      	r3, 0x20000024	// 2188 <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    2172:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    2174:	9360      	ld.w      	r3, (r3, 0x0)
+    2176:	237f      	addi      	r3, 128
+    2178:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    217a:	0c04      	bf      	0x2182	// 2182 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    217c:	6c48      	or      	r1, r2
+    217e:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    2180:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    2182:	6885      	andn      	r2, r1
+    2184:	b356      	st.w      	r2, (r3, 0x58)
+}
+    2186:	07fd      	br      	0x2180	// 2180 <GPT_ConfigInterrupt_CMD+0x10>
+    2188:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+0000218c <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    218c:	1065      	lrw      	r3, 0x20000040	// 21a0 <UART0_DeInit+0x14>
+    218e:	3200      	movi      	r2, 0
+    2190:	9360      	ld.w      	r3, (r3, 0x0)
+    2192:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    2194:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    2196:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    2198:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    219a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    219c:	783c      	jmp      	r15
+    219e:	0000      	bkpt
+    21a0:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+000021a4 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    21a4:	1065      	lrw      	r3, 0x2000003c	// 21b8 <UART1_DeInit+0x14>
+    21a6:	3200      	movi      	r2, 0
+    21a8:	9360      	ld.w      	r3, (r3, 0x0)
+    21aa:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    21ac:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    21ae:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    21b0:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    21b2:	b344      	st.w      	r2, (r3, 0x10)
+}
+    21b4:	783c      	jmp      	r15
+    21b6:	0000      	bkpt
+    21b8:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+000021bc <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    21bc:	1065      	lrw      	r3, 0x20000038	// 21d0 <UART2_DeInit+0x14>
+    21be:	3200      	movi      	r2, 0
+    21c0:	9360      	ld.w      	r3, (r3, 0x0)
+    21c2:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    21c4:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    21c6:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    21c8:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    21ca:	b344      	st.w      	r2, (r3, 0x10)
+}
+    21cc:	783c      	jmp      	r15
+    21ce:	0000      	bkpt
+    21d0:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+000021d4 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    21d4:	1065      	lrw      	r3, 0x20000040	// 21e8 <UART0_Int_Enable+0x14>
+    21d6:	320f      	movi      	r2, 15
+    21d8:	9360      	ld.w      	r3, (r3, 0x0)
+    21da:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    21dc:	3380      	movi      	r3, 128
+    21de:	4366      	lsli      	r3, r3, 6
+    21e0:	1043      	lrw      	r2, 0xe000e100	// 21ec <UART0_Int_Enable+0x18>
+    21e2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    21e4:	783c      	jmp      	r15
+    21e6:	0000      	bkpt
+    21e8:	20000040 	.long	0x20000040
+    21ec:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000021f0 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    21f0:	1065      	lrw      	r3, 0x20000038	// 2204 <UART2_Int_Enable+0x14>
+    21f2:	320f      	movi      	r2, 15
+    21f4:	9360      	ld.w      	r3, (r3, 0x0)
+    21f6:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    21f8:	3380      	movi      	r3, 128
+    21fa:	4368      	lsli      	r3, r3, 8
+    21fc:	1043      	lrw      	r2, 0xe000e100	// 2208 <UART2_Int_Enable+0x18>
+    21fe:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2200:	783c      	jmp      	r15
+    2202:	0000      	bkpt
+    2204:	20000038 	.long	0x20000038
+    2208:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+0000220c <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    220c:	3840      	cmpnei      	r0, 0
+    220e:	0821      	bt      	0x2250	// 2250 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    2210:	3940      	cmpnei      	r1, 0
+    2212:	080a      	bt      	0x2226	// 2226 <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    2214:	1177      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    2216:	31ff      	movi      	r1, 255
+    2218:	9340      	ld.w      	r2, (r3, 0x0)
+    221a:	9260      	ld.w      	r3, (r2, 0x0)
+    221c:	68c5      	andn      	r3, r1
+    221e:	3ba2      	bseti      	r3, 2
+    2220:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    2222:	b260      	st.w      	r3, (r2, 0x0)
+    2224:	0415      	br      	0x224e	// 224e <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    2226:	3941      	cmpnei      	r1, 1
+    2228:	0813      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    222a:	1172      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    222c:	31f0      	movi      	r1, 240
+    222e:	9340      	ld.w      	r2, (r3, 0x0)
+    2230:	9260      	ld.w      	r3, (r2, 0x0)
+    2232:	4130      	lsli      	r1, r1, 16
+    2234:	68c5      	andn      	r3, r1
+    2236:	31e0      	movi      	r1, 224
+    2238:	412f      	lsli      	r1, r1, 15
+    223a:	6cc4      	or      	r3, r1
+    223c:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    223e:	31f0      	movi      	r1, 240
+    2240:	9261      	ld.w      	r3, (r2, 0x4)
+    2242:	412c      	lsli      	r1, r1, 12
+    2244:	68c5      	andn      	r3, r1
+    2246:	31e0      	movi      	r1, 224
+    2248:	412b      	lsli      	r1, r1, 11
+    224a:	6cc4      	or      	r3, r1
+    224c:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    224e:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    2250:	3841      	cmpnei      	r0, 1
+    2252:	082d      	bt      	0x22ac	// 22ac <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    2254:	3940      	cmpnei      	r1, 0
+    2256:	0814      	bt      	0x227e	// 227e <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    2258:	1167      	lrw      	r3, 0x20000048	// 22f4 <UART_IO_Init+0xe8>
+    225a:	310f      	movi      	r1, 15
+    225c:	9340      	ld.w      	r2, (r3, 0x0)
+    225e:	9260      	ld.w      	r3, (r2, 0x0)
+    2260:	68c5      	andn      	r3, r1
+    2262:	3107      	movi      	r1, 7
+    2264:	6cc4      	or      	r3, r1
+    2266:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    2268:	32f0      	movi      	r2, 240
+    226a:	1162      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    226c:	4250      	lsli      	r2, r2, 16
+    226e:	9320      	ld.w      	r1, (r3, 0x0)
+    2270:	9161      	ld.w      	r3, (r1, 0x4)
+    2272:	68c9      	andn      	r3, r2
+    2274:	32e0      	movi      	r2, 224
+    2276:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    2278:	6cc8      	or      	r3, r2
+    227a:	b161      	st.w      	r3, (r1, 0x4)
+    227c:	07e9      	br      	0x224e	// 224e <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    227e:	3941      	cmpnei      	r1, 1
+    2280:	080c      	bt      	0x2298	// 2298 <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    2282:	107c      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    2284:	32ff      	movi      	r2, 255
+    2286:	9320      	ld.w      	r1, (r3, 0x0)
+    2288:	424c      	lsli      	r2, r2, 12
+    228a:	9160      	ld.w      	r3, (r1, 0x0)
+    228c:	68c9      	andn      	r3, r2
+    228e:	32ee      	movi      	r2, 238
+    2290:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    2292:	6cc8      	or      	r3, r2
+    2294:	b160      	st.w      	r3, (r1, 0x0)
+}
+    2296:	07dc      	br      	0x224e	// 224e <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    2298:	3942      	cmpnei      	r1, 2
+    229a:	0bda      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    229c:	1075      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    229e:	32ee      	movi      	r2, 238
+    22a0:	9320      	ld.w      	r1, (r3, 0x0)
+    22a2:	9161      	ld.w      	r3, (r1, 0x4)
+    22a4:	4368      	lsli      	r3, r3, 8
+    22a6:	4b68      	lsri      	r3, r3, 8
+    22a8:	4257      	lsli      	r2, r2, 23
+    22aa:	07e7      	br      	0x2278	// 2278 <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    22ac:	3842      	cmpnei      	r0, 2
+    22ae:	0bd0      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    22b0:	3940      	cmpnei      	r1, 0
+    22b2:	0809      	bt      	0x22c4	// 22c4 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    22b4:	106f      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    22b6:	31ff      	movi      	r1, 255
+    22b8:	9340      	ld.w      	r2, (r3, 0x0)
+    22ba:	9260      	ld.w      	r3, (r2, 0x0)
+    22bc:	68c5      	andn      	r3, r1
+    22be:	3177      	movi      	r1, 119
+    22c0:	6cc4      	or      	r3, r1
+    22c2:	07b0      	br      	0x2222	// 2222 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    22c4:	3941      	cmpnei      	r1, 1
+    22c6:	0809      	bt      	0x22d8	// 22d8 <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    22c8:	106a      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    22ca:	32ee      	movi      	r2, 238
+    22cc:	9320      	ld.w      	r1, (r3, 0x0)
+    22ce:	9160      	ld.w      	r3, (r1, 0x0)
+    22d0:	4368      	lsli      	r3, r3, 8
+    22d2:	4b68      	lsri      	r3, r3, 8
+    22d4:	4257      	lsli      	r2, r2, 23
+    22d6:	07de      	br      	0x2292	// 2292 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    22d8:	3942      	cmpnei      	r1, 2
+    22da:	0bba      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    22dc:	1066      	lrw      	r3, 0x20000048	// 22f4 <UART_IO_Init+0xe8>
+    22de:	32ff      	movi      	r2, 255
+    22e0:	9320      	ld.w      	r1, (r3, 0x0)
+    22e2:	4250      	lsli      	r2, r2, 16
+    22e4:	9160      	ld.w      	r3, (r1, 0x0)
+    22e6:	68c9      	andn      	r3, r2
+    22e8:	32cc      	movi      	r2, 204
+    22ea:	424f      	lsli      	r2, r2, 15
+    22ec:	07d3      	br      	0x2292	// 2292 <UART_IO_Init+0x86>
+    22ee:	0000      	bkpt
+    22f0:	2000004c 	.long	0x2000004c
+    22f4:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000022f8 <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    22f8:	1063      	lrw      	r3, 0x80003	// 2304 <UARTInit+0xc>
+    22fa:	6c8c      	or      	r2, r3
+    22fc:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    22fe:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2300:	783c      	jmp      	r15
+    2302:	0000      	bkpt
+    2304:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+00002308 <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    2308:	1063      	lrw      	r3, 0x8000f	// 2314 <UARTInitRxTxIntEn+0xc>
+    230a:	6c8c      	or      	r2, r3
+    230c:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    230e:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2310:	783c      	jmp      	r15
+    2312:	0000      	bkpt
+    2314:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.EPT_Stop:
+
+00002318 <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    2318:	1068      	lrw      	r3, 0x20000020	// 2338 <EPT_Stop+0x20>
+    231a:	3280      	movi      	r2, 128
+    231c:	9360      	ld.w      	r3, (r3, 0x0)
+    231e:	608c      	addu      	r2, r3
+    2320:	1027      	lrw      	r1, 0xa55ac73a	// 233c <EPT_Stop+0x24>
+    2322:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    2324:	9341      	ld.w      	r2, (r3, 0x4)
+    2326:	31fe      	movi      	r1, 254
+    2328:	6884      	and      	r2, r1
+    232a:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    232c:	3101      	movi      	r1, 1
+    232e:	9341      	ld.w      	r2, (r3, 0x4)
+    2330:	6884      	and      	r2, r1
+    2332:	3a40      	cmpnei      	r2, 0
+    2334:	0bfd      	bt      	0x232e	// 232e <EPT_Stop+0x16>
+}
+    2336:	783c      	jmp      	r15
+    2338:	20000020 	.long	0x20000020
+    233c:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00002340 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    2340:	14d1      	push      	r4, r15
+	
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    2342:	1099      	lrw      	r4, 0x20000048	// 23a4 <main+0x64>
+    2344:	3201      	movi      	r2, 1
+    2346:	9400      	ld.w      	r0, (r4, 0x0)
+    2348:	3102      	movi      	r1, 2
+    234a:	e3fffd1f 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    234e:	9400      	ld.w      	r0, (r4, 0x0)
+    2350:	3102      	movi      	r1, 2
+    2352:	e3fffd8b 	bsr      	0x1e68	// 1e68 <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    2356:	3102      	movi      	r1, 2
+    2358:	9400      	ld.w      	r0, (r4, 0x0)
+    235a:	e3fffdab 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+    235e:	1093      	lrw      	r4, 0x2000009c	// 23a8 <main+0x68>
+	last_state = rf_exist;
+    2360:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    2362:	a400      	st.b      	r0, (r4, 0x0)
+	APT32F102_init();							//102 initial
+    2364:	e00000e8 	bsr      	0x2534	// 2534 <APT32F102_init>
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    2368:	1031      	lrw      	r1, 0x478c	// 23ac <main+0x6c>
+    236a:	3000      	movi      	r0, 0
+    236c:	e0000694 	bsr      	0x3094	// 3094 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    2370:	e3fffc7a 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+
+		//UART2_TASK();
+		Detect_WIFI_Task();
+    2374:	e0000ba0 	bsr      	0x3ab4	// 3ab4 <Detect_WIFI_Task>
+		
+		Detect_SPI_task();
+    2378:	e00009e8 	bsr      	0x3748	// 3748 <Detect_SPI_task>
+		
+//		BackLight_Task();
+		
+		
+		if (finish_flag == 1) {
+    237c:	8462      	ld.b      	r3, (r4, 0x2)
+    237e:	3b41      	cmpnei      	r3, 1
+    2380:	0bf8      	bt      	0x2370	// 2370 <main+0x30>
+			Card_Read_TasK();
+    2382:	e0000979 	bsr      	0x3674	// 3674 <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    2386:	8460      	ld.b      	r3, (r4, 0x0)
+    2388:	3b41      	cmpnei      	r3, 1
+    238a:	0806      	bt      	0x2396	// 2396 <main+0x56>
+			{
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    238c:	e0000b30 	bsr      	0x39ec	// 39ec <LogicCtrl_NoRF_Task>
+				DM_Led_Task();
+    2390:	e0000bdc 	bsr      	0x3b48	// 3b48 <DM_Led_Task>
+    2394:	07ee      	br      	0x2370	// 2370 <main+0x30>
+			}
+			else if(rf_exist == 0x00)
+    2396:	3b40      	cmpnei      	r3, 0
+    2398:	0bec      	bt      	0x2370	// 2370 <main+0x30>
+			{
+				Debounce_Task();
+    239a:	e0000a77 	bsr      	0x3888	// 3888 <Debounce_Task>
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    239e:	e0000aa9 	bsr      	0x38f0	// 38f0 <LogicCtrl_Task>
+    23a2:	07e7      	br      	0x2370	// 2370 <main+0x30>
+    23a4:	20000048 	.long	0x20000048
+    23a8:	2000009c 	.long	0x2000009c
+    23ac:	0000478c 	.long	0x0000478c
+
+Disassembly of section .text.delay_nms:
+
+000023b0 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    23b0:	14d0      	push      	r15
+    23b2:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    23b4:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    23b6:	3300      	movi      	r3, 0
+    j = 50* t;
+    23b8:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    23ba:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    23bc:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    23be:	b860      	st.w      	r3, (r14, 0x0)
+    23c0:	9840      	ld.w      	r2, (r14, 0x0)
+    23c2:	9861      	ld.w      	r3, (r14, 0x4)
+    23c4:	64c8      	cmphs      	r2, r3
+    23c6:	0c03      	bf      	0x23cc	// 23cc <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    23c8:	1403      	addi      	r14, r14, 12
+    23ca:	1490      	pop      	r15
+        k++;
+    23cc:	9862      	ld.w      	r3, (r14, 0x8)
+    23ce:	2300      	addi      	r3, 1
+    23d0:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    23d2:	e3fffc49 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    23d6:	9860      	ld.w      	r3, (r14, 0x0)
+    23d8:	2300      	addi      	r3, 1
+    23da:	07f2      	br      	0x23be	// 23be <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000023dc <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    23dc:	14d0      	push      	r15
+    23de:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    23e0:	3000      	movi      	r0, 0
+    23e2:	e3fffdd7 	bsr      	0x1f90	// 1f90 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    23e6:	3300      	movi      	r3, 0
+    23e8:	3240      	movi      	r2, 64
+    23ea:	3100      	movi      	r1, 0
+    23ec:	3001      	movi      	r0, 1
+    23ee:	e3fffe21 	bsr      	0x2030	// 2030 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    23f2:	3300      	movi      	r3, 0
+    23f4:	b865      	st.w      	r3, (r14, 0x14)
+    23f6:	b864      	st.w      	r3, (r14, 0x10)
+    23f8:	b863      	st.w      	r3, (r14, 0xc)
+    23fa:	b862      	st.w      	r3, (r14, 0x8)
+    23fc:	b861      	st.w      	r3, (r14, 0x4)
+    23fe:	b860      	st.w      	r3, (r14, 0x0)
+    2400:	3208      	movi      	r2, 8
+    2402:	3100      	movi      	r1, 0
+    2404:	3000      	movi      	r0, 0
+    2406:	e3fffe1f 	bsr      	0x2044	// 2044 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    240a:	1079      	lrw      	r3, 0x2000009c	// 246c <GPT0_CONFIG+0x90>
+    240c:	8360      	ld.b      	r3, (r3, 0x0)
+    240e:	3b41      	cmpnei      	r3, 1
+    2410:	0827      	bt      	0x245e	// 245e <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    2412:	31fa      	movi      	r1, 250
+    2414:	4123      	lsli      	r1, r1, 3
+    2416:	3200      	movi      	r2, 0
+    2418:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    241a:	e3fffea3 	bsr      	0x2160	// 2160 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    241e:	3320      	movi      	r3, 32
+    2420:	3204      	movi      	r2, 4
+    2422:	3100      	movi      	r1, 0
+    2424:	3001      	movi      	r0, 1
+    2426:	e3fffe31 	bsr      	0x2088	// 2088 <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    242a:	3300      	movi      	r3, 0
+    242c:	3201      	movi      	r2, 1
+    242e:	b868      	st.w      	r3, (r14, 0x20)
+    2430:	b867      	st.w      	r3, (r14, 0x1c)
+    2432:	b866      	st.w      	r3, (r14, 0x18)
+    2434:	b865      	st.w      	r3, (r14, 0x14)
+    2436:	b864      	st.w      	r3, (r14, 0x10)
+    2438:	b863      	st.w      	r3, (r14, 0xc)
+    243a:	b842      	st.w      	r2, (r14, 0x8)
+    243c:	b841      	st.w      	r2, (r14, 0x4)
+    243e:	b860      	st.w      	r3, (r14, 0x0)
+    2440:	3200      	movi      	r2, 0
+    2442:	3302      	movi      	r3, 2
+    2444:	3100      	movi      	r1, 0
+    2446:	3000      	movi      	r0, 0
+    2448:	e3fffe2a 	bsr      	0x209c	// 209c <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    244c:	e3fffe82 	bsr      	0x2150	// 2150 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    2450:	3180      	movi      	r1, 128
+    2452:	4129      	lsli      	r1, r1, 9
+    2454:	3001      	movi      	r0, 1
+    2456:	e3fffe8d 	bsr      	0x2170	// 2170 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    245a:	1409      	addi      	r14, r14, 36
+    245c:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    245e:	3b40      	cmpnei      	r3, 0
+    2460:	0bdf      	bt      	0x241e	// 241e <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    2462:	30fa      	movi      	r0, 250
+    2464:	3200      	movi      	r2, 0
+    2466:	3100      	movi      	r1, 0
+    2468:	4003      	lsli      	r0, r0, 3
+    246a:	07d8      	br      	0x241a	// 241a <GPT0_CONFIG+0x3e>
+    246c:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.BT_CONFIG:
+
+00002470 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    2470:	14d2      	push      	r4-r5, r15
+    2472:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    2474:	1095      	lrw      	r4, 0x20000008	// 24c8 <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    2476:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    2478:	9400      	ld.w      	r0, (r4, 0x0)
+    247a:	e3fffd3d 	bsr      	0x1ef4	// 1ef4 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    247e:	9400      	ld.w      	r0, (r4, 0x0)
+    2480:	b8a1      	st.w      	r5, (r14, 0x4)
+    2482:	b8a0      	st.w      	r5, (r14, 0x0)
+    2484:	3308      	movi      	r3, 8
+    2486:	3200      	movi      	r2, 0
+    2488:	3101      	movi      	r1, 1
+    248a:	e3fffd4c 	bsr      	0x1f22	// 1f22 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    248e:	3380      	movi      	r3, 128
+    2490:	4363      	lsli      	r3, r3, 3
+    2492:	b861      	st.w      	r3, (r14, 0x4)
+    2494:	9400      	ld.w      	r0, (r4, 0x0)
+    2496:	3300      	movi      	r3, 0
+    2498:	b8a3      	st.w      	r5, (r14, 0xc)
+    249a:	b8a2      	st.w      	r5, (r14, 0x8)
+    249c:	b8a0      	st.w      	r5, (r14, 0x0)
+    249e:	3200      	movi      	r2, 0
+    24a0:	3180      	movi      	r1, 128
+    24a2:	e3fffd4c 	bsr      	0x1f3a	// 1f3a <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    24a6:	3201      	movi      	r2, 1
+    24a8:	1029      	lrw      	r1, 0x12ac	// 24cc <BT_CONFIG+0x5c>
+    24aa:	9400      	ld.w      	r0, (r4, 0x0)
+    24ac:	e3fffd5d 	bsr      	0x1f66	// 1f66 <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    24b0:	9400      	ld.w      	r0, (r4, 0x0)
+    24b2:	e3fffd2f 	bsr      	0x1f10	// 1f10 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    24b6:	9400      	ld.w      	r0, (r4, 0x0)
+    24b8:	3202      	movi      	r2, 2
+    24ba:	3101      	movi      	r1, 1
+    24bc:	e3fffd58 	bsr      	0x1f6c	// 1f6c <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    24c0:	e3fffd60 	bsr      	0x1f80	// 1f80 <BT1_INT_ENABLE>
+	
+}
+    24c4:	1404      	addi      	r14, r14, 16
+    24c6:	1492      	pop      	r4-r5, r15
+    24c8:	20000008 	.long	0x20000008
+    24cc:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000024d0 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    24d0:	14d0      	push      	r15
+    24d2:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    24d4:	e3fffb14 	bsr      	0x1afc	// 1afc <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    24d8:	3101      	movi      	r1, 1
+    24da:	3001      	movi      	r0, 1
+    24dc:	e3fffb36 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    24e0:	3000      	movi      	r0, 0
+    24e2:	e3fffb8f 	bsr      	0x1c00	// 1c00 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    24e6:	3180      	movi      	r1, 128
+    24e8:	3308      	movi      	r3, 8
+    24ea:	3200      	movi      	r2, 0
+    24ec:	4121      	lsli      	r1, r1, 1
+    24ee:	3002      	movi      	r0, 2
+    24f0:	e3fffb44 	bsr      	0x1b78	// 1b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    24f4:	3080      	movi      	r0, 128
+    24f6:	3118      	movi      	r1, 24
+    24f8:	4002      	lsli      	r0, r0, 2
+    24fa:	e3fffbbf 	bsr      	0x1c78	// 1c78 <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    24fe:	3001      	movi      	r0, 1
+    2500:	e3fffb94 	bsr      	0x1c28	// 1c28 <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    2504:	e3fffbb0 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    2508:	e3fffbe2 	bsr      	0x1ccc	// 1ccc <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    250c:	3340      	movi      	r3, 64
+    250e:	b860      	st.w      	r3, (r14, 0x0)
+    2510:	31c0      	movi      	r1, 192
+    2512:	3380      	movi      	r3, 128
+    2514:	4364      	lsli      	r3, r3, 4
+    2516:	3200      	movi      	r2, 0
+    2518:	4123      	lsli      	r1, r1, 3
+    251a:	3000      	movi      	r0, 0
+    251c:	e3fffbba 	bsr      	0x1c90	// 1c90 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    2520:	e3fffbc8 	bsr      	0x1cb0	// 1cb0 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    2524:	e3fffc02 	bsr      	0x1d28	// 1d28 <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    2528:	3000      	movi      	r0, 0
+    252a:	e0000f4d 	bsr      	0x43c4	// 43c4 <std_clk_calib>
+	
+}
+    252e:	1401      	addi      	r14, r14, 4
+    2530:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00002534 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    2534:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    2536:	1072      	lrw      	r3, 0x2000005c	// 257c <APT32F102_init+0x48>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    2538:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    253a:	9340      	ld.w      	r2, (r3, 0x0)
+    253c:	1071      	lrw      	r3, 0xfffffff	// 2580 <APT32F102_init+0x4c>
+    253e:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    2540:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    2542:	926c      	ld.w      	r3, (r2, 0x30)
+    2544:	68c4      	and      	r3, r1
+    2546:	3b40      	cmpnei      	r3, 0
+    2548:	0ffd      	bf      	0x2542	// 2542 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    254a:	e3ffffc3 	bsr      	0x24d0	// 24d0 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    254e:	e0000501 	bsr      	0x2f50	// 2f50 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    2552:	e3fffbf1 	bsr      	0x1d34	// 1d34 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    2556:	3101      	movi      	r1, 1
+    2558:	300f      	movi      	r0, 15
+    255a:	e3fffbff 	bsr      	0x1d58	// 1d58 <Set_INT_Priority>
+//	Set_INT_Priority(SIO_IRQ,1);				//SIO优先级最高
+//	
+	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+    255e:	3102      	movi      	r1, 2
+    2560:	3019      	movi      	r0, 25
+    2562:	e3fffbfb 	bsr      	0x1d58	// 1d58 <Set_INT_Priority>
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    2566:	e3ffff85 	bsr      	0x2470	// 2470 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    256a:	e3ffff39 	bsr      	0x23dc	// 23dc <GPT0_CONFIG>
+	
+	UARTx_Init(UART_1,NULL);
+    256e:	3100      	movi      	r1, 0
+    2570:	3001      	movi      	r0, 1
+    2572:	e00004f3 	bsr      	0x2f58	// 2f58 <UARTx_Init>
+//	UARTx_Init(UART_2,NULL);
+	
+	RC522_Init();
+    2576:	e00006b5 	bsr      	0x32e0	// 32e0 <RC522_Init>
+//	}
+//	else if(rf_exist == 0x00)  //带无线模块初始化
+//	{
+//		LogicCtrl_Init();     
+//	}
+}
+    257a:	1490      	pop      	r15
+    257c:	2000005c 	.long	0x2000005c
+    2580:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00002584 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    2584:	1460      	nie
+    2586:	1462      	ipush
+    // ISR content ...
+	nop;
+    2588:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    258a:	117a      	lrw      	r3, 0x2000005c	// 2670 <SYSCONIntHandler+0xec>
+    258c:	3280      	movi      	r2, 128
+    258e:	9360      	ld.w      	r3, (r3, 0x0)
+    2590:	60c8      	addu      	r3, r2
+    2592:	9323      	ld.w      	r1, (r3, 0xc)
+    2594:	3001      	movi      	r0, 1
+    2596:	6840      	and      	r1, r0
+    2598:	3940      	cmpnei      	r1, 0
+    259a:	0c04      	bf      	0x25a2	// 25a2 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    259c:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    259e:	1463      	ipop
+    25a0:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    25a2:	9323      	ld.w      	r1, (r3, 0xc)
+    25a4:	3002      	movi      	r0, 2
+    25a6:	6840      	and      	r1, r0
+    25a8:	3940      	cmpnei      	r1, 0
+    25aa:	0bf9      	bt      	0x259c	// 259c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    25ac:	9323      	ld.w      	r1, (r3, 0xc)
+    25ae:	3008      	movi      	r0, 8
+    25b0:	6840      	and      	r1, r0
+    25b2:	3940      	cmpnei      	r1, 0
+    25b4:	0bf4      	bt      	0x259c	// 259c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    25b6:	9323      	ld.w      	r1, (r3, 0xc)
+    25b8:	3010      	movi      	r0, 16
+    25ba:	6840      	and      	r1, r0
+    25bc:	3940      	cmpnei      	r1, 0
+    25be:	0bef      	bt      	0x259c	// 259c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    25c0:	9323      	ld.w      	r1, (r3, 0xc)
+    25c2:	6848      	and      	r1, r2
+    25c4:	3940      	cmpnei      	r1, 0
+    25c6:	0c03      	bf      	0x25cc	// 25cc <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    25c8:	b341      	st.w      	r2, (r3, 0x4)
+}
+    25ca:	07ea      	br      	0x259e	// 259e <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    25cc:	3280      	movi      	r2, 128
+    25ce:	9323      	ld.w      	r1, (r3, 0xc)
+    25d0:	4241      	lsli      	r2, r2, 1
+    25d2:	6848      	and      	r1, r2
+    25d4:	3940      	cmpnei      	r1, 0
+    25d6:	0bf9      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    25d8:	3280      	movi      	r2, 128
+    25da:	9323      	ld.w      	r1, (r3, 0xc)
+    25dc:	4242      	lsli      	r2, r2, 2
+    25de:	6848      	and      	r1, r2
+    25e0:	3940      	cmpnei      	r1, 0
+    25e2:	0bf3      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    25e4:	3280      	movi      	r2, 128
+    25e6:	9323      	ld.w      	r1, (r3, 0xc)
+    25e8:	4243      	lsli      	r2, r2, 3
+    25ea:	6848      	and      	r1, r2
+    25ec:	3940      	cmpnei      	r1, 0
+    25ee:	0bed      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    25f0:	3280      	movi      	r2, 128
+    25f2:	9323      	ld.w      	r1, (r3, 0xc)
+    25f4:	4244      	lsli      	r2, r2, 4
+    25f6:	6848      	and      	r1, r2
+    25f8:	3940      	cmpnei      	r1, 0
+    25fa:	0c03      	bf      	0x2600	// 2600 <SYSCONIntHandler+0x7c>
+		nop;
+    25fc:	6c03      	mov      	r0, r0
+    25fe:	07e5      	br      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    2600:	3280      	movi      	r2, 128
+    2602:	9323      	ld.w      	r1, (r3, 0xc)
+    2604:	4245      	lsli      	r2, r2, 5
+    2606:	6848      	and      	r1, r2
+    2608:	3940      	cmpnei      	r1, 0
+    260a:	0bdf      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    260c:	3280      	movi      	r2, 128
+    260e:	9323      	ld.w      	r1, (r3, 0xc)
+    2610:	4246      	lsli      	r2, r2, 6
+    2612:	6848      	and      	r1, r2
+    2614:	3940      	cmpnei      	r1, 0
+    2616:	0bd9      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    2618:	3280      	movi      	r2, 128
+    261a:	9323      	ld.w      	r1, (r3, 0xc)
+    261c:	4247      	lsli      	r2, r2, 7
+    261e:	6848      	and      	r1, r2
+    2620:	3940      	cmpnei      	r1, 0
+    2622:	0bd3      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    2624:	3280      	movi      	r2, 128
+    2626:	9323      	ld.w      	r1, (r3, 0xc)
+    2628:	424b      	lsli      	r2, r2, 11
+    262a:	6848      	and      	r1, r2
+    262c:	3940      	cmpnei      	r1, 0
+    262e:	0bcd      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    2630:	3280      	movi      	r2, 128
+    2632:	9323      	ld.w      	r1, (r3, 0xc)
+    2634:	424c      	lsli      	r2, r2, 12
+    2636:	6848      	and      	r1, r2
+    2638:	3940      	cmpnei      	r1, 0
+    263a:	0bc7      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    263c:	3280      	movi      	r2, 128
+    263e:	9323      	ld.w      	r1, (r3, 0xc)
+    2640:	424d      	lsli      	r2, r2, 13
+    2642:	6848      	and      	r1, r2
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	0bc1      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    2648:	3280      	movi      	r2, 128
+    264a:	9323      	ld.w      	r1, (r3, 0xc)
+    264c:	424e      	lsli      	r2, r2, 14
+    264e:	6848      	and      	r1, r2
+    2650:	3940      	cmpnei      	r1, 0
+    2652:	0bbb      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    2654:	3280      	movi      	r2, 128
+    2656:	9323      	ld.w      	r1, (r3, 0xc)
+    2658:	424f      	lsli      	r2, r2, 15
+    265a:	6848      	and      	r1, r2
+    265c:	3940      	cmpnei      	r1, 0
+    265e:	0bb5      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    2660:	3280      	movi      	r2, 128
+    2662:	9323      	ld.w      	r1, (r3, 0xc)
+    2664:	4256      	lsli      	r2, r2, 22
+    2666:	6848      	and      	r1, r2
+    2668:	3940      	cmpnei      	r1, 0
+    266a:	0baf      	bt      	0x25c8	// 25c8 <SYSCONIntHandler+0x44>
+    266c:	0799      	br      	0x259e	// 259e <SYSCONIntHandler+0x1a>
+    266e:	0000      	bkpt
+    2670:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00002674 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    2674:	1460      	nie
+    2676:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    2678:	1078      	lrw      	r3, 0x20000060	// 26d8 <IFCIntHandler+0x64>
+    267a:	3101      	movi      	r1, 1
+    267c:	9360      	ld.w      	r3, (r3, 0x0)
+    267e:	934b      	ld.w      	r2, (r3, 0x2c)
+    2680:	6884      	and      	r2, r1
+    2682:	3a40      	cmpnei      	r2, 0
+    2684:	0c04      	bf      	0x268c	// 268c <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    2686:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    2688:	1463      	ipop
+    268a:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    268c:	934b      	ld.w      	r2, (r3, 0x2c)
+    268e:	3102      	movi      	r1, 2
+    2690:	6884      	and      	r2, r1
+    2692:	3a40      	cmpnei      	r2, 0
+    2694:	0bf9      	bt      	0x2686	// 2686 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    2696:	934b      	ld.w      	r2, (r3, 0x2c)
+    2698:	3104      	movi      	r1, 4
+    269a:	6884      	and      	r2, r1
+    269c:	3a40      	cmpnei      	r2, 0
+    269e:	0bf4      	bt      	0x2686	// 2686 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    26a0:	3280      	movi      	r2, 128
+    26a2:	932b      	ld.w      	r1, (r3, 0x2c)
+    26a4:	4245      	lsli      	r2, r2, 5
+    26a6:	6848      	and      	r1, r2
+    26a8:	3940      	cmpnei      	r1, 0
+    26aa:	0c03      	bf      	0x26b0	// 26b0 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    26ac:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    26ae:	07ed      	br      	0x2688	// 2688 <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    26b0:	3280      	movi      	r2, 128
+    26b2:	932b      	ld.w      	r1, (r3, 0x2c)
+    26b4:	4246      	lsli      	r2, r2, 6
+    26b6:	6848      	and      	r1, r2
+    26b8:	3940      	cmpnei      	r1, 0
+    26ba:	0bf9      	bt      	0x26ac	// 26ac <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    26bc:	3280      	movi      	r2, 128
+    26be:	932b      	ld.w      	r1, (r3, 0x2c)
+    26c0:	4247      	lsli      	r2, r2, 7
+    26c2:	6848      	and      	r1, r2
+    26c4:	3940      	cmpnei      	r1, 0
+    26c6:	0bf3      	bt      	0x26ac	// 26ac <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    26c8:	3280      	movi      	r2, 128
+    26ca:	932b      	ld.w      	r1, (r3, 0x2c)
+    26cc:	4248      	lsli      	r2, r2, 8
+    26ce:	6848      	and      	r1, r2
+    26d0:	3940      	cmpnei      	r1, 0
+    26d2:	0bed      	bt      	0x26ac	// 26ac <IFCIntHandler+0x38>
+    26d4:	07da      	br      	0x2688	// 2688 <IFCIntHandler+0x14>
+    26d6:	0000      	bkpt
+    26d8:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+000026dc <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    26dc:	1460      	nie
+    26de:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    26e0:	1078      	lrw      	r3, 0x20000050	// 2740 <ADCIntHandler+0x64>
+    26e2:	3101      	movi      	r1, 1
+    26e4:	9360      	ld.w      	r3, (r3, 0x0)
+    26e6:	9348      	ld.w      	r2, (r3, 0x20)
+    26e8:	6884      	and      	r2, r1
+    26ea:	3a40      	cmpnei      	r2, 0
+    26ec:	0c04      	bf      	0x26f4	// 26f4 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    26ee:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    26f0:	1463      	ipop
+    26f2:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    26f4:	9348      	ld.w      	r2, (r3, 0x20)
+    26f6:	3102      	movi      	r1, 2
+    26f8:	6884      	and      	r2, r1
+    26fa:	3a40      	cmpnei      	r2, 0
+    26fc:	0bf9      	bt      	0x26ee	// 26ee <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    26fe:	9348      	ld.w      	r2, (r3, 0x20)
+    2700:	3104      	movi      	r1, 4
+    2702:	6884      	and      	r2, r1
+    2704:	3a40      	cmpnei      	r2, 0
+    2706:	0bf4      	bt      	0x26ee	// 26ee <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    2708:	9348      	ld.w      	r2, (r3, 0x20)
+    270a:	3110      	movi      	r1, 16
+    270c:	6884      	and      	r2, r1
+    270e:	3a40      	cmpnei      	r2, 0
+    2710:	0bef      	bt      	0x26ee	// 26ee <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    2712:	9348      	ld.w      	r2, (r3, 0x20)
+    2714:	3120      	movi      	r1, 32
+    2716:	6884      	and      	r2, r1
+    2718:	3a40      	cmpnei      	r2, 0
+    271a:	0bea      	bt      	0x26ee	// 26ee <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    271c:	9348      	ld.w      	r2, (r3, 0x20)
+    271e:	3140      	movi      	r1, 64
+    2720:	6884      	and      	r2, r1
+    2722:	3a40      	cmpnei      	r2, 0
+    2724:	0be5      	bt      	0x26ee	// 26ee <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    2726:	9348      	ld.w      	r2, (r3, 0x20)
+    2728:	3180      	movi      	r1, 128
+    272a:	6884      	and      	r2, r1
+    272c:	3a40      	cmpnei      	r2, 0
+    272e:	0be0      	bt      	0x26ee	// 26ee <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    2730:	3280      	movi      	r2, 128
+    2732:	9328      	ld.w      	r1, (r3, 0x20)
+    2734:	4249      	lsli      	r2, r2, 9
+    2736:	6848      	and      	r1, r2
+    2738:	3940      	cmpnei      	r1, 0
+    273a:	0fdb      	bf      	0x26f0	// 26f0 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    273c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    273e:	07d9      	br      	0x26f0	// 26f0 <ADCIntHandler+0x14>
+    2740:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00002744 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    2744:	1460      	nie
+    2746:	1462      	ipush
+    2748:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    274a:	1387      	lrw      	r4, 0x20000020	// 28e4 <EPT0IntHandler+0x1a0>
+    274c:	3280      	movi      	r2, 128
+    274e:	9460      	ld.w      	r3, (r4, 0x0)
+    2750:	60c8      	addu      	r3, r2
+    2752:	9335      	ld.w      	r1, (r3, 0x54)
+    2754:	3001      	movi      	r0, 1
+    2756:	6840      	and      	r1, r0
+    2758:	3940      	cmpnei      	r1, 0
+    275a:	0c03      	bf      	0x2760	// 2760 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    275c:	b317      	st.w      	r0, (r3, 0x5c)
+    275e:	0424      	br      	0x27a6	// 27a6 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    2760:	9335      	ld.w      	r1, (r3, 0x54)
+    2762:	3002      	movi      	r0, 2
+    2764:	6840      	and      	r1, r0
+    2766:	3940      	cmpnei      	r1, 0
+    2768:	0bfa      	bt      	0x275c	// 275c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    276a:	9335      	ld.w      	r1, (r3, 0x54)
+    276c:	3004      	movi      	r0, 4
+    276e:	6840      	and      	r1, r0
+    2770:	3940      	cmpnei      	r1, 0
+    2772:	0bf5      	bt      	0x275c	// 275c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    2774:	9335      	ld.w      	r1, (r3, 0x54)
+    2776:	3008      	movi      	r0, 8
+    2778:	6840      	and      	r1, r0
+    277a:	3940      	cmpnei      	r1, 0
+    277c:	0bf0      	bt      	0x275c	// 275c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    277e:	9335      	ld.w      	r1, (r3, 0x54)
+    2780:	3010      	movi      	r0, 16
+    2782:	6840      	and      	r1, r0
+    2784:	3940      	cmpnei      	r1, 0
+    2786:	0c1f      	bf      	0x27c4	// 27c4 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    2788:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    278a:	3200      	movi      	r2, 0
+    278c:	3101      	movi      	r1, 1
+    278e:	3000      	movi      	r0, 0
+    2790:	e3fffaac 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    2794:	3201      	movi      	r2, 1
+    2796:	3101      	movi      	r1, 1
+    2798:	3001      	movi      	r0, 1
+    279a:	e3fffaa7 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    279e:	9460      	ld.w      	r3, (r4, 0x0)
+    27a0:	934b      	ld.w      	r2, (r3, 0x2c)
+    27a2:	1272      	lrw      	r3, 0x20000164	// 28e8 <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    27a4:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    27a6:	9460      	ld.w      	r3, (r4, 0x0)
+    27a8:	3280      	movi      	r2, 128
+    27aa:	60c8      	addu      	r3, r2
+    27ac:	932b      	ld.w      	r1, (r3, 0x2c)
+    27ae:	3001      	movi      	r0, 1
+    27b0:	6840      	and      	r1, r0
+    27b2:	3940      	cmpnei      	r1, 0
+    27b4:	0c61      	bf      	0x2876	// 2876 <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    27b6:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    27b8:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    27bc:	9880      	ld.w      	r4, (r14, 0x0)
+    27be:	1402      	addi      	r14, r14, 8
+    27c0:	1463      	ipop
+    27c2:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    27c4:	9335      	ld.w      	r1, (r3, 0x54)
+    27c6:	3020      	movi      	r0, 32
+    27c8:	6840      	and      	r1, r0
+    27ca:	3940      	cmpnei      	r1, 0
+    27cc:	0c10      	bf      	0x27ec	// 27ec <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    27ce:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    27d0:	3200      	movi      	r2, 0
+    27d2:	3101      	movi      	r1, 1
+    27d4:	3001      	movi      	r0, 1
+    27d6:	e3fffa89 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    27da:	3201      	movi      	r2, 1
+    27dc:	3101      	movi      	r1, 1
+    27de:	3000      	movi      	r0, 0
+    27e0:	e3fffa84 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    27e4:	9460      	ld.w      	r3, (r4, 0x0)
+    27e6:	934c      	ld.w      	r2, (r3, 0x30)
+    27e8:	1261      	lrw      	r3, 0x20000160	// 28ec <EPT0IntHandler+0x1a8>
+    27ea:	07dd      	br      	0x27a4	// 27a4 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    27ec:	9335      	ld.w      	r1, (r3, 0x54)
+    27ee:	3040      	movi      	r0, 64
+    27f0:	6840      	and      	r1, r0
+    27f2:	3940      	cmpnei      	r1, 0
+    27f4:	0bb4      	bt      	0x275c	// 275c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    27f6:	9335      	ld.w      	r1, (r3, 0x54)
+    27f8:	6848      	and      	r1, r2
+    27fa:	3940      	cmpnei      	r1, 0
+    27fc:	0c03      	bf      	0x2802	// 2802 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    27fe:	b357      	st.w      	r2, (r3, 0x5c)
+    2800:	07d3      	br      	0x27a6	// 27a6 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    2802:	3280      	movi      	r2, 128
+    2804:	9335      	ld.w      	r1, (r3, 0x54)
+    2806:	4241      	lsli      	r2, r2, 1
+    2808:	6848      	and      	r1, r2
+    280a:	3940      	cmpnei      	r1, 0
+    280c:	0bf9      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    280e:	3280      	movi      	r2, 128
+    2810:	9335      	ld.w      	r1, (r3, 0x54)
+    2812:	4242      	lsli      	r2, r2, 2
+    2814:	6848      	and      	r1, r2
+    2816:	3940      	cmpnei      	r1, 0
+    2818:	0bf3      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    281a:	3280      	movi      	r2, 128
+    281c:	9335      	ld.w      	r1, (r3, 0x54)
+    281e:	4243      	lsli      	r2, r2, 3
+    2820:	6848      	and      	r1, r2
+    2822:	3940      	cmpnei      	r1, 0
+    2824:	0bed      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    2826:	3280      	movi      	r2, 128
+    2828:	9335      	ld.w      	r1, (r3, 0x54)
+    282a:	4244      	lsli      	r2, r2, 4
+    282c:	6848      	and      	r1, r2
+    282e:	3940      	cmpnei      	r1, 0
+    2830:	0be7      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    2832:	3280      	movi      	r2, 128
+    2834:	9335      	ld.w      	r1, (r3, 0x54)
+    2836:	4245      	lsli      	r2, r2, 5
+    2838:	6848      	and      	r1, r2
+    283a:	3940      	cmpnei      	r1, 0
+    283c:	0be1      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    283e:	3280      	movi      	r2, 128
+    2840:	9335      	ld.w      	r1, (r3, 0x54)
+    2842:	4246      	lsli      	r2, r2, 6
+    2844:	6848      	and      	r1, r2
+    2846:	3940      	cmpnei      	r1, 0
+    2848:	0bdb      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    284a:	3280      	movi      	r2, 128
+    284c:	9335      	ld.w      	r1, (r3, 0x54)
+    284e:	4247      	lsli      	r2, r2, 7
+    2850:	6848      	and      	r1, r2
+    2852:	3940      	cmpnei      	r1, 0
+    2854:	0bd5      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    2856:	3280      	movi      	r2, 128
+    2858:	9335      	ld.w      	r1, (r3, 0x54)
+    285a:	4248      	lsli      	r2, r2, 8
+    285c:	6848      	and      	r1, r2
+    285e:	3940      	cmpnei      	r1, 0
+    2860:	0bcf      	bt      	0x27fe	// 27fe <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    2862:	3280      	movi      	r2, 128
+    2864:	9335      	ld.w      	r1, (r3, 0x54)
+    2866:	4249      	lsli      	r2, r2, 9
+    2868:	6848      	and      	r1, r2
+    286a:	3940      	cmpnei      	r1, 0
+    286c:	0f9d      	bf      	0x27a6	// 27a6 <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    286e:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    2870:	e3fffd54 	bsr      	0x2318	// 2318 <EPT_Stop>
+    2874:	0799      	br      	0x27a6	// 27a6 <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    2876:	932b      	ld.w      	r1, (r3, 0x2c)
+    2878:	3002      	movi      	r0, 2
+    287a:	6840      	and      	r1, r0
+    287c:	3940      	cmpnei      	r1, 0
+    287e:	0b9c      	bt      	0x27b6	// 27b6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    2880:	932b      	ld.w      	r1, (r3, 0x2c)
+    2882:	3004      	movi      	r0, 4
+    2884:	6840      	and      	r1, r0
+    2886:	3940      	cmpnei      	r1, 0
+    2888:	0b97      	bt      	0x27b6	// 27b6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    288a:	932b      	ld.w      	r1, (r3, 0x2c)
+    288c:	3008      	movi      	r0, 8
+    288e:	6840      	and      	r1, r0
+    2890:	3940      	cmpnei      	r1, 0
+    2892:	0b92      	bt      	0x27b6	// 27b6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    2894:	932b      	ld.w      	r1, (r3, 0x2c)
+    2896:	3010      	movi      	r0, 16
+    2898:	6840      	and      	r1, r0
+    289a:	3940      	cmpnei      	r1, 0
+    289c:	0b8d      	bt      	0x27b6	// 27b6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    289e:	932b      	ld.w      	r1, (r3, 0x2c)
+    28a0:	3020      	movi      	r0, 32
+    28a2:	6840      	and      	r1, r0
+    28a4:	3940      	cmpnei      	r1, 0
+    28a6:	0b88      	bt      	0x27b6	// 27b6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    28a8:	932b      	ld.w      	r1, (r3, 0x2c)
+    28aa:	3040      	movi      	r0, 64
+    28ac:	6840      	and      	r1, r0
+    28ae:	3940      	cmpnei      	r1, 0
+    28b0:	0b83      	bt      	0x27b6	// 27b6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    28b2:	932b      	ld.w      	r1, (r3, 0x2c)
+    28b4:	6848      	and      	r1, r2
+    28b6:	3940      	cmpnei      	r1, 0
+    28b8:	0c03      	bf      	0x28be	// 28be <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    28ba:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    28bc:	077e      	br      	0x27b8	// 27b8 <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    28be:	3280      	movi      	r2, 128
+    28c0:	932b      	ld.w      	r1, (r3, 0x2c)
+    28c2:	4241      	lsli      	r2, r2, 1
+    28c4:	6848      	and      	r1, r2
+    28c6:	3940      	cmpnei      	r1, 0
+    28c8:	0bf9      	bt      	0x28ba	// 28ba <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    28ca:	3280      	movi      	r2, 128
+    28cc:	932b      	ld.w      	r1, (r3, 0x2c)
+    28ce:	4242      	lsli      	r2, r2, 2
+    28d0:	6848      	and      	r1, r2
+    28d2:	3940      	cmpnei      	r1, 0
+    28d4:	0bf3      	bt      	0x28ba	// 28ba <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    28d6:	3280      	movi      	r2, 128
+    28d8:	932b      	ld.w      	r1, (r3, 0x2c)
+    28da:	4243      	lsli      	r2, r2, 3
+    28dc:	6848      	and      	r1, r2
+    28de:	3940      	cmpnei      	r1, 0
+    28e0:	0bed      	bt      	0x28ba	// 28ba <EPT0IntHandler+0x176>
+    28e2:	076b      	br      	0x27b8	// 27b8 <EPT0IntHandler+0x74>
+    28e4:	20000020 	.long	0x20000020
+    28e8:	20000164 	.long	0x20000164
+    28ec:	20000160 	.long	0x20000160
+
+Disassembly of section .text.WWDTHandler:
+
+000028f0 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    28f0:	1460      	nie
+    28f2:	1462      	ipush
+    28f4:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    28f6:	10ab      	lrw      	r5, 0x20000010	// 2920 <WWDTHandler+0x30>
+    28f8:	3401      	movi      	r4, 1
+    28fa:	9560      	ld.w      	r3, (r5, 0x0)
+    28fc:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    28fe:	30ff      	movi      	r0, 255
+    2900:	e3fffaf2 	bsr      	0x1ee4	// 1ee4 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    2904:	9540      	ld.w      	r2, (r5, 0x0)
+    2906:	9263      	ld.w      	r3, (r2, 0xc)
+    2908:	68d0      	and      	r3, r4
+    290a:	3b40      	cmpnei      	r3, 0
+    290c:	0c02      	bf      	0x2910	// 2910 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    290e:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    2910:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    2914:	98a1      	ld.w      	r5, (r14, 0x4)
+    2916:	9880      	ld.w      	r4, (r14, 0x0)
+    2918:	1403      	addi      	r14, r14, 12
+    291a:	1463      	ipop
+    291c:	1461      	nir
+    291e:	0000      	bkpt
+    2920:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00002924 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    2924:	1460      	nie
+    2926:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    2928:	107e      	lrw      	r3, 0x20000024	// 29a0 <GPT0IntHandler+0x7c>
+    292a:	3101      	movi      	r1, 1
+    292c:	9360      	ld.w      	r3, (r3, 0x0)
+    292e:	237f      	addi      	r3, 128
+    2930:	9355      	ld.w      	r2, (r3, 0x54)
+    2932:	6884      	and      	r2, r1
+    2934:	3a40      	cmpnei      	r2, 0
+    2936:	0c04      	bf      	0x293e	// 293e <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    2938:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    293a:	1463      	ipop
+    293c:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    293e:	9355      	ld.w      	r2, (r3, 0x54)
+    2940:	3102      	movi      	r1, 2
+    2942:	6884      	and      	r2, r1
+    2944:	3a40      	cmpnei      	r2, 0
+    2946:	0bf9      	bt      	0x2938	// 2938 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    2948:	9355      	ld.w      	r2, (r3, 0x54)
+    294a:	3110      	movi      	r1, 16
+    294c:	6884      	and      	r2, r1
+    294e:	3a40      	cmpnei      	r2, 0
+    2950:	0bf4      	bt      	0x2938	// 2938 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    2952:	9355      	ld.w      	r2, (r3, 0x54)
+    2954:	3120      	movi      	r1, 32
+    2956:	6884      	and      	r2, r1
+    2958:	3a40      	cmpnei      	r2, 0
+    295a:	0bef      	bt      	0x2938	// 2938 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    295c:	3280      	movi      	r2, 128
+    295e:	9335      	ld.w      	r1, (r3, 0x54)
+    2960:	4241      	lsli      	r2, r2, 1
+    2962:	6848      	and      	r1, r2
+    2964:	3940      	cmpnei      	r1, 0
+    2966:	0c03      	bf      	0x296c	// 296c <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    2968:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    296a:	07e8      	br      	0x293a	// 293a <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    296c:	3280      	movi      	r2, 128
+    296e:	9335      	ld.w      	r1, (r3, 0x54)
+    2970:	4242      	lsli      	r2, r2, 2
+    2972:	6848      	and      	r1, r2
+    2974:	3940      	cmpnei      	r1, 0
+    2976:	0bf9      	bt      	0x2968	// 2968 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    2978:	3280      	movi      	r2, 128
+    297a:	9335      	ld.w      	r1, (r3, 0x54)
+    297c:	4243      	lsli      	r2, r2, 3
+    297e:	6848      	and      	r1, r2
+    2980:	3940      	cmpnei      	r1, 0
+    2982:	0bf3      	bt      	0x2968	// 2968 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    2984:	3280      	movi      	r2, 128
+    2986:	9335      	ld.w      	r1, (r3, 0x54)
+    2988:	4244      	lsli      	r2, r2, 4
+    298a:	6848      	and      	r1, r2
+    298c:	3940      	cmpnei      	r1, 0
+    298e:	0bed      	bt      	0x2968	// 2968 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    2990:	3280      	movi      	r2, 128
+    2992:	9335      	ld.w      	r1, (r3, 0x54)
+    2994:	4249      	lsli      	r2, r2, 9
+    2996:	6848      	and      	r1, r2
+    2998:	3940      	cmpnei      	r1, 0
+    299a:	0be7      	bt      	0x2968	// 2968 <GPT0IntHandler+0x44>
+    299c:	07cf      	br      	0x293a	// 293a <GPT0IntHandler+0x16>
+    299e:	0000      	bkpt
+    29a0:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+000029a4 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    29a4:	1460      	nie
+    29a6:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    29a8:	1079      	lrw      	r3, 0x20000018	// 2a0c <RTCIntHandler+0x68>
+    29aa:	3101      	movi      	r1, 1
+    29ac:	9360      	ld.w      	r3, (r3, 0x0)
+    29ae:	934a      	ld.w      	r2, (r3, 0x28)
+    29b0:	6884      	and      	r2, r1
+    29b2:	3a40      	cmpnei      	r2, 0
+    29b4:	0c14      	bf      	0x29dc	// 29dc <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    29b6:	1057      	lrw      	r2, 0xca53	// 2a10 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    29b8:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    29ba:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    29bc:	9342      	ld.w      	r2, (r3, 0x8)
+    29be:	6c84      	or      	r2, r1
+    29c0:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    29c2:	3280      	movi      	r2, 128
+    29c4:	424d      	lsli      	r2, r2, 13
+    29c6:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    29c8:	3102      	movi      	r1, 2
+    29ca:	9342      	ld.w      	r2, (r3, 0x8)
+    29cc:	6884      	and      	r2, r1
+    29ce:	3a40      	cmpnei      	r2, 0
+    29d0:	0bfd      	bt      	0x29ca	// 29ca <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    29d2:	9342      	ld.w      	r2, (r3, 0x8)
+    29d4:	3a80      	bclri      	r2, 0
+    29d6:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    29d8:	1463      	ipop
+    29da:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    29dc:	934a      	ld.w      	r2, (r3, 0x28)
+    29de:	3102      	movi      	r1, 2
+    29e0:	6884      	and      	r2, r1
+    29e2:	3a40      	cmpnei      	r2, 0
+    29e4:	0c03      	bf      	0x29ea	// 29ea <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    29e6:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    29e8:	07f8      	br      	0x29d8	// 29d8 <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    29ea:	934a      	ld.w      	r2, (r3, 0x28)
+    29ec:	3104      	movi      	r1, 4
+    29ee:	6884      	and      	r2, r1
+    29f0:	3a40      	cmpnei      	r2, 0
+    29f2:	0bfa      	bt      	0x29e6	// 29e6 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    29f4:	934a      	ld.w      	r2, (r3, 0x28)
+    29f6:	3108      	movi      	r1, 8
+    29f8:	6884      	and      	r2, r1
+    29fa:	3a40      	cmpnei      	r2, 0
+    29fc:	0bf5      	bt      	0x29e6	// 29e6 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    29fe:	934a      	ld.w      	r2, (r3, 0x28)
+    2a00:	3110      	movi      	r1, 16
+    2a02:	6884      	and      	r2, r1
+    2a04:	3a40      	cmpnei      	r2, 0
+    2a06:	0bf0      	bt      	0x29e6	// 29e6 <RTCIntHandler+0x42>
+    2a08:	07e8      	br      	0x29d8	// 29d8 <RTCIntHandler+0x34>
+    2a0a:	0000      	bkpt
+    2a0c:	20000018 	.long	0x20000018
+    2a10:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00002a14 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    2a14:	1460      	nie
+    2a16:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a18:	106d      	lrw      	r3, 0x20000040	// 2a4c <UART0IntHandler+0x38>
+    2a1a:	3102      	movi      	r1, 2
+    2a1c:	9360      	ld.w      	r3, (r3, 0x0)
+    2a1e:	9343      	ld.w      	r2, (r3, 0xc)
+    2a20:	6884      	and      	r2, r1
+    2a22:	3a40      	cmpnei      	r2, 0
+    2a24:	0c03      	bf      	0x2a2a	// 2a2a <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    2a26:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2a28:	0410      	br      	0x2a48	// 2a48 <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2a2a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a2c:	3101      	movi      	r1, 1
+    2a2e:	6884      	and      	r2, r1
+    2a30:	3a40      	cmpnei      	r2, 0
+    2a32:	0bfa      	bt      	0x2a26	// 2a26 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2a34:	9343      	ld.w      	r2, (r3, 0xc)
+    2a36:	3108      	movi      	r1, 8
+    2a38:	6884      	and      	r2, r1
+    2a3a:	3a40      	cmpnei      	r2, 0
+    2a3c:	0bf5      	bt      	0x2a26	// 2a26 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2a3e:	9343      	ld.w      	r2, (r3, 0xc)
+    2a40:	3104      	movi      	r1, 4
+    2a42:	6884      	and      	r2, r1
+    2a44:	3a40      	cmpnei      	r2, 0
+    2a46:	0bf0      	bt      	0x2a26	// 2a26 <UART0IntHandler+0x12>
+}
+    2a48:	1463      	ipop
+    2a4a:	1461      	nir
+    2a4c:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00002a50 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    2a50:	1460      	nie
+    2a52:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a54:	106d      	lrw      	r3, 0x2000003c	// 2a88 <UART1IntHandler+0x38>
+    2a56:	3102      	movi      	r1, 2
+    2a58:	9360      	ld.w      	r3, (r3, 0x0)
+    2a5a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a5c:	6884      	and      	r2, r1
+    2a5e:	3a40      	cmpnei      	r2, 0
+    2a60:	0c03      	bf      	0x2a66	// 2a66 <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    2a62:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2a64:	0410      	br      	0x2a84	// 2a84 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2a66:	9343      	ld.w      	r2, (r3, 0xc)
+    2a68:	3101      	movi      	r1, 1
+    2a6a:	6884      	and      	r2, r1
+    2a6c:	3a40      	cmpnei      	r2, 0
+    2a6e:	0bfa      	bt      	0x2a62	// 2a62 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2a70:	9343      	ld.w      	r2, (r3, 0xc)
+    2a72:	3108      	movi      	r1, 8
+    2a74:	6884      	and      	r2, r1
+    2a76:	3a40      	cmpnei      	r2, 0
+    2a78:	0bf5      	bt      	0x2a62	// 2a62 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2a7a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a7c:	3104      	movi      	r1, 4
+    2a7e:	6884      	and      	r2, r1
+    2a80:	3a40      	cmpnei      	r2, 0
+    2a82:	0bf0      	bt      	0x2a62	// 2a62 <UART1IntHandler+0x12>
+}
+    2a84:	1463      	ipop
+    2a86:	1461      	nir
+    2a88:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00002a8c <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    2a8c:	1460      	nie
+    2a8e:	1462      	ipush
+    2a90:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a92:	107f      	lrw      	r3, 0x20000038	// 2b0c <UART2IntHandler+0x80>
+    2a94:	3102      	movi      	r1, 2
+    2a96:	9360      	ld.w      	r3, (r3, 0x0)
+    2a98:	9343      	ld.w      	r2, (r3, 0xc)
+    2a9a:	6884      	and      	r2, r1
+    2a9c:	3a40      	cmpnei      	r2, 0
+    2a9e:	0c0b      	bf      	0x2ab4	// 2ab4 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    2aa0:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    2aa2:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    2aa4:	7400      	zextb      	r0, r0
+    2aa6:	e00002c5 	bsr      	0x3030	// 3030 <UART2_RecvINT_Processing>
+		//GPIO_Write_Low(GPIOB0,3);
+		
+		//GPIO_Reverse(GPIOB0,3);
+	}
+	
+}
+    2aaa:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2aae:	1401      	addi      	r14, r14, 4
+    2ab0:	1463      	ipop
+    2ab2:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2ab4:	9323      	ld.w      	r1, (r3, 0xc)
+    2ab6:	3201      	movi      	r2, 1
+    2ab8:	6848      	and      	r1, r2
+    2aba:	3940      	cmpnei      	r1, 0
+    2abc:	0c0d      	bf      	0x2ad6	// 2ad6 <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    2abe:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    2ac0:	1074      	lrw      	r3, 0x200000b4	// 2b10 <UART2IntHandler+0x84>
+    2ac2:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2ac4:	1074      	lrw      	r3, 0x200000b8	// 2b14 <UART2IntHandler+0x88>
+    2ac6:	9360      	ld.w      	r3, (r3, 0x0)
+    2ac8:	3b41      	cmpnei      	r3, 1
+    2aca:	0bf0      	bt      	0x2aaa	// 2aaa <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    2acc:	1053      	lrw      	r2, 0x200000bc	// 2b18 <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    2ace:	9260      	ld.w      	r3, (r2, 0x0)
+    2ad0:	2300      	addi      	r3, 1
+    2ad2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2ad4:	07eb      	br      	0x2aaa	// 2aaa <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2ad6:	9343      	ld.w      	r2, (r3, 0xc)
+    2ad8:	3108      	movi      	r1, 8
+    2ada:	6884      	and      	r2, r1
+    2adc:	3a40      	cmpnei      	r2, 0
+    2ade:	0c03      	bf      	0x2ae4	// 2ae4 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    2ae0:	b323      	st.w      	r1, (r3, 0xc)
+    2ae2:	07e4      	br      	0x2aaa	// 2aaa <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2ae4:	9343      	ld.w      	r2, (r3, 0xc)
+    2ae6:	3104      	movi      	r1, 4
+    2ae8:	6884      	and      	r2, r1
+    2aea:	3a40      	cmpnei      	r2, 0
+    2aec:	0bfa      	bt      	0x2ae0	// 2ae0 <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2aee:	3180      	movi      	r1, 128
+    2af0:	9303      	ld.w      	r0, (r3, 0xc)
+    2af2:	412c      	lsli      	r1, r1, 12
+    2af4:	6804      	and      	r0, r1
+    2af6:	3840      	cmpnei      	r0, 0
+    2af8:	0fd9      	bf      	0x2aaa	// 2aaa <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    2afa:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    2afc:	1065      	lrw      	r3, 0x200000b4	// 2b10 <UART2IntHandler+0x84>
+    2afe:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2b00:	1065      	lrw      	r3, 0x200000b8	// 2b14 <UART2IntHandler+0x88>
+    2b02:	9360      	ld.w      	r3, (r3, 0x0)
+    2b04:	3b41      	cmpnei      	r3, 1
+    2b06:	0bd2      	bt      	0x2aaa	// 2aaa <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    2b08:	1045      	lrw      	r2, 0x200000c0	// 2b1c <UART2IntHandler+0x90>
+    2b0a:	07e2      	br      	0x2ace	// 2ace <UART2IntHandler+0x42>
+    2b0c:	20000038 	.long	0x20000038
+    2b10:	200000b4 	.long	0x200000b4
+    2b14:	200000b8 	.long	0x200000b8
+    2b18:	200000bc 	.long	0x200000bc
+    2b1c:	200000c0 	.long	0x200000c0
+
+Disassembly of section .text.SPI0IntHandler:
+
+00002b20 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    2b20:	1460      	nie
+    2b22:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    2b24:	1178      	lrw      	r3, 0x20000034	// 2c04 <SPI0IntHandler+0xe4>
+    2b26:	3101      	movi      	r1, 1
+    2b28:	9360      	ld.w      	r3, (r3, 0x0)
+    2b2a:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b2c:	6884      	and      	r2, r1
+    2b2e:	3a40      	cmpnei      	r2, 0
+    2b30:	0c03      	bf      	0x2b36	// 2b36 <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    2b32:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    2b34:	0407      	br      	0x2b42	// 2b42 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    2b36:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b38:	3002      	movi      	r0, 2
+    2b3a:	6880      	and      	r2, r0
+    2b3c:	3a40      	cmpnei      	r2, 0
+    2b3e:	0c04      	bf      	0x2b46	// 2b46 <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    2b40:	b308      	st.w      	r0, (r3, 0x20)
+}
+    2b42:	1463      	ipop
+    2b44:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    2b46:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b48:	3004      	movi      	r0, 4
+    2b4a:	6880      	and      	r2, r0
+    2b4c:	3a40      	cmpnei      	r2, 0
+    2b4e:	0c55      	bf      	0x2bf8	// 2bf8 <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    2b50:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    2b52:	9302      	ld.w      	r0, (r3, 0x8)
+    2b54:	32aa      	movi      	r2, 170
+    2b56:	6482      	cmpne      	r0, r2
+    2b58:	083e      	bt      	0x2bd4	// 2bd4 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b5a:	3102      	movi      	r1, 2
+    2b5c:	9343      	ld.w      	r2, (r3, 0xc)
+    2b5e:	6884      	and      	r2, r1
+    2b60:	3a40      	cmpnei      	r2, 0
+    2b62:	0ffd      	bf      	0x2b5c	// 2b5c <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    2b64:	3211      	movi      	r2, 17
+    2b66:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b68:	3110      	movi      	r1, 16
+    2b6a:	9343      	ld.w      	r2, (r3, 0xc)
+    2b6c:	6884      	and      	r2, r1
+    2b6e:	3a40      	cmpnei      	r2, 0
+    2b70:	0bfd      	bt      	0x2b6a	// 2b6a <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b72:	3102      	movi      	r1, 2
+    2b74:	9343      	ld.w      	r2, (r3, 0xc)
+    2b76:	6884      	and      	r2, r1
+    2b78:	3a40      	cmpnei      	r2, 0
+    2b7a:	0ffd      	bf      	0x2b74	// 2b74 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    2b7c:	3212      	movi      	r2, 18
+    2b7e:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b80:	3110      	movi      	r1, 16
+    2b82:	9343      	ld.w      	r2, (r3, 0xc)
+    2b84:	6884      	and      	r2, r1
+    2b86:	3a40      	cmpnei      	r2, 0
+    2b88:	0bfd      	bt      	0x2b82	// 2b82 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b8a:	3102      	movi      	r1, 2
+    2b8c:	9343      	ld.w      	r2, (r3, 0xc)
+    2b8e:	6884      	and      	r2, r1
+    2b90:	3a40      	cmpnei      	r2, 0
+    2b92:	0ffd      	bf      	0x2b8c	// 2b8c <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    2b94:	3213      	movi      	r2, 19
+    2b96:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b98:	3110      	movi      	r1, 16
+    2b9a:	9343      	ld.w      	r2, (r3, 0xc)
+    2b9c:	6884      	and      	r2, r1
+    2b9e:	3a40      	cmpnei      	r2, 0
+    2ba0:	0bfd      	bt      	0x2b9a	// 2b9a <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2ba2:	3102      	movi      	r1, 2
+    2ba4:	9343      	ld.w      	r2, (r3, 0xc)
+    2ba6:	6884      	and      	r2, r1
+    2ba8:	3a40      	cmpnei      	r2, 0
+    2baa:	0ffd      	bf      	0x2ba4	// 2ba4 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    2bac:	3214      	movi      	r2, 20
+    2bae:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2bb0:	3110      	movi      	r1, 16
+    2bb2:	9343      	ld.w      	r2, (r3, 0xc)
+    2bb4:	6884      	and      	r2, r1
+    2bb6:	3a40      	cmpnei      	r2, 0
+    2bb8:	0bfd      	bt      	0x2bb2	// 2bb2 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2bba:	3102      	movi      	r1, 2
+    2bbc:	9343      	ld.w      	r2, (r3, 0xc)
+    2bbe:	6884      	and      	r2, r1
+    2bc0:	3a40      	cmpnei      	r2, 0
+    2bc2:	0ffd      	bf      	0x2bbc	// 2bbc <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    2bc4:	3215      	movi      	r2, 21
+    2bc6:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2bc8:	3110      	movi      	r1, 16
+    2bca:	9343      	ld.w      	r2, (r3, 0xc)
+    2bcc:	6884      	and      	r2, r1
+    2bce:	3a40      	cmpnei      	r2, 0
+    2bd0:	0bfd      	bt      	0x2bca	// 2bca <SPI0IntHandler+0xaa>
+    2bd2:	07b8      	br      	0x2b42	// 2b42 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    2bd4:	9343      	ld.w      	r2, (r3, 0xc)
+    2bd6:	6884      	and      	r2, r1
+    2bd8:	3a40      	cmpnei      	r2, 0
+    2bda:	0bb4      	bt      	0x2b42	// 2b42 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    2bdc:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2bde:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    2be0:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2be2:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2be4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2be6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2be8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bea:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2bec:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2bee:	9343      	ld.w      	r2, (r3, 0xc)
+    2bf0:	6884      	and      	r2, r1
+    2bf2:	3a40      	cmpnei      	r2, 0
+    2bf4:	0bfd      	bt      	0x2bee	// 2bee <SPI0IntHandler+0xce>
+    2bf6:	07a6      	br      	0x2b42	// 2b42 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    2bf8:	9347      	ld.w      	r2, (r3, 0x1c)
+    2bfa:	3108      	movi      	r1, 8
+    2bfc:	6884      	and      	r2, r1
+    2bfe:	3a40      	cmpnei      	r2, 0
+    2c00:	0b99      	bt      	0x2b32	// 2b32 <SPI0IntHandler+0x12>
+    2c02:	07a0      	br      	0x2b42	// 2b42 <SPI0IntHandler+0x22>
+    2c04:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+00002c08 <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    2c08:	1460      	nie
+    2c0a:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    2c0c:	1073      	lrw      	r3, 0x2000002c	// 2c58 <SIO0IntHandler+0x50>
+    2c0e:	3104      	movi      	r1, 4
+    2c10:	9360      	ld.w      	r3, (r3, 0x0)
+    2c12:	9349      	ld.w      	r2, (r3, 0x24)
+    2c14:	6884      	and      	r2, r1
+    2c16:	3a40      	cmpnei      	r2, 0
+    2c18:	0c02      	bf      	0x2c1c	// 2c1c <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    2c1a:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    2c1c:	9349      	ld.w      	r2, (r3, 0x24)
+    2c1e:	3101      	movi      	r1, 1
+    2c20:	6884      	and      	r2, r1
+    2c22:	3a40      	cmpnei      	r2, 0
+    2c24:	0c02      	bf      	0x2c28	// 2c28 <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    2c26:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    2c28:	9349      	ld.w      	r2, (r3, 0x24)
+    2c2a:	3102      	movi      	r1, 2
+    2c2c:	6884      	and      	r2, r1
+    2c2e:	3a40      	cmpnei      	r2, 0
+    2c30:	0c03      	bf      	0x2c36	// 2c36 <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    2c32:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    2c34:	0410      	br      	0x2c54	// 2c54 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    2c36:	9349      	ld.w      	r2, (r3, 0x24)
+    2c38:	3108      	movi      	r1, 8
+    2c3a:	6884      	and      	r2, r1
+    2c3c:	3a40      	cmpnei      	r2, 0
+    2c3e:	0bfa      	bt      	0x2c32	// 2c32 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    2c40:	9349      	ld.w      	r2, (r3, 0x24)
+    2c42:	3110      	movi      	r1, 16
+    2c44:	6884      	and      	r2, r1
+    2c46:	3a40      	cmpnei      	r2, 0
+    2c48:	0bf5      	bt      	0x2c32	// 2c32 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    2c4a:	9349      	ld.w      	r2, (r3, 0x24)
+    2c4c:	3120      	movi      	r1, 32
+    2c4e:	6884      	and      	r2, r1
+    2c50:	3a40      	cmpnei      	r2, 0
+    2c52:	0bf0      	bt      	0x2c32	// 2c32 <SIO0IntHandler+0x2a>
+}
+    2c54:	1463      	ipop
+    2c56:	1461      	nir
+    2c58:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00002c5c <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    2c5c:	1460      	nie
+    2c5e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    2c60:	106a      	lrw      	r3, 0x2000005c	// 2c88 <EXI0IntHandler+0x2c>
+    2c62:	3101      	movi      	r1, 1
+    2c64:	9360      	ld.w      	r3, (r3, 0x0)
+    2c66:	237f      	addi      	r3, 128
+    2c68:	934c      	ld.w      	r2, (r3, 0x30)
+    2c6a:	6884      	and      	r2, r1
+    2c6c:	3a40      	cmpnei      	r2, 0
+    2c6e:	0c04      	bf      	0x2c76	// 2c76 <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    2c70:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    2c72:	1463      	ipop
+    2c74:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    2c76:	3280      	movi      	r2, 128
+    2c78:	932c      	ld.w      	r1, (r3, 0x30)
+    2c7a:	4249      	lsli      	r2, r2, 9
+    2c7c:	6848      	and      	r1, r2
+    2c7e:	3940      	cmpnei      	r1, 0
+    2c80:	0ff9      	bf      	0x2c72	// 2c72 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    2c82:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2c84:	07f7      	br      	0x2c72	// 2c72 <EXI0IntHandler+0x16>
+    2c86:	0000      	bkpt
+    2c88:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00002c8c <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    2c8c:	1460      	nie
+    2c8e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    2c90:	106a      	lrw      	r3, 0x2000005c	// 2cb8 <EXI1IntHandler+0x2c>
+    2c92:	3102      	movi      	r1, 2
+    2c94:	9360      	ld.w      	r3, (r3, 0x0)
+    2c96:	237f      	addi      	r3, 128
+    2c98:	934c      	ld.w      	r2, (r3, 0x30)
+    2c9a:	6884      	and      	r2, r1
+    2c9c:	3a40      	cmpnei      	r2, 0
+    2c9e:	0c04      	bf      	0x2ca6	// 2ca6 <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    2ca0:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    2ca2:	1463      	ipop
+    2ca4:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    2ca6:	3280      	movi      	r2, 128
+    2ca8:	932c      	ld.w      	r1, (r3, 0x30)
+    2caa:	424a      	lsli      	r2, r2, 10
+    2cac:	6848      	and      	r1, r2
+    2cae:	3940      	cmpnei      	r1, 0
+    2cb0:	0ff9      	bf      	0x2ca2	// 2ca2 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    2cb2:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2cb4:	07f7      	br      	0x2ca2	// 2ca2 <EXI1IntHandler+0x16>
+    2cb6:	0000      	bkpt
+    2cb8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+00002cbc <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    2cbc:	1460      	nie
+    2cbe:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    2cc0:	1070      	lrw      	r3, 0x2000005c	// 2d00 <EXI2to3IntHandler+0x44>
+    2cc2:	3104      	movi      	r1, 4
+    2cc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2cc6:	237f      	addi      	r3, 128
+    2cc8:	934c      	ld.w      	r2, (r3, 0x30)
+    2cca:	6884      	and      	r2, r1
+    2ccc:	3a40      	cmpnei      	r2, 0
+    2cce:	0c04      	bf      	0x2cd6	// 2cd6 <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    2cd0:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    2cd2:	1463      	ipop
+    2cd4:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    2cd6:	934c      	ld.w      	r2, (r3, 0x30)
+    2cd8:	3108      	movi      	r1, 8
+    2cda:	6884      	and      	r2, r1
+    2cdc:	3a40      	cmpnei      	r2, 0
+    2cde:	0bf9      	bt      	0x2cd0	// 2cd0 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    2ce0:	3280      	movi      	r2, 128
+    2ce2:	932c      	ld.w      	r1, (r3, 0x30)
+    2ce4:	424b      	lsli      	r2, r2, 11
+    2ce6:	6848      	and      	r1, r2
+    2ce8:	3940      	cmpnei      	r1, 0
+    2cea:	0c03      	bf      	0x2cf0	// 2cf0 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    2cec:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2cee:	07f2      	br      	0x2cd2	// 2cd2 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    2cf0:	3280      	movi      	r2, 128
+    2cf2:	932c      	ld.w      	r1, (r3, 0x30)
+    2cf4:	424c      	lsli      	r2, r2, 12
+    2cf6:	6848      	and      	r1, r2
+    2cf8:	3940      	cmpnei      	r1, 0
+    2cfa:	0bf9      	bt      	0x2cec	// 2cec <EXI2to3IntHandler+0x30>
+    2cfc:	07eb      	br      	0x2cd2	// 2cd2 <EXI2to3IntHandler+0x16>
+    2cfe:	0000      	bkpt
+    2d00:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+00002d04 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    2d04:	1460      	nie
+    2d06:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    2d08:	1075      	lrw      	r3, 0x2000005c	// 2d5c <EXI4to9IntHandler+0x58>
+    2d0a:	3280      	movi      	r2, 128
+    2d0c:	9360      	ld.w      	r3, (r3, 0x0)
+    2d0e:	60c8      	addu      	r3, r2
+    2d10:	932c      	ld.w      	r1, (r3, 0x30)
+    2d12:	3010      	movi      	r0, 16
+    2d14:	6840      	and      	r1, r0
+    2d16:	3940      	cmpnei      	r1, 0
+    2d18:	0c04      	bf      	0x2d20	// 2d20 <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    2d1a:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    2d1c:	1463      	ipop
+    2d1e:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    2d20:	932c      	ld.w      	r1, (r3, 0x30)
+    2d22:	3020      	movi      	r0, 32
+    2d24:	6840      	and      	r1, r0
+    2d26:	3940      	cmpnei      	r1, 0
+    2d28:	0bf9      	bt      	0x2d1a	// 2d1a <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    2d2a:	932c      	ld.w      	r1, (r3, 0x30)
+    2d2c:	3040      	movi      	r0, 64
+    2d2e:	6840      	and      	r1, r0
+    2d30:	3940      	cmpnei      	r1, 0
+    2d32:	0bf4      	bt      	0x2d1a	// 2d1a <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    2d34:	932c      	ld.w      	r1, (r3, 0x30)
+    2d36:	6848      	and      	r1, r2
+    2d38:	3940      	cmpnei      	r1, 0
+    2d3a:	0c03      	bf      	0x2d40	// 2d40 <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    2d3c:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2d3e:	07ef      	br      	0x2d1c	// 2d1c <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    2d40:	3280      	movi      	r2, 128
+    2d42:	932c      	ld.w      	r1, (r3, 0x30)
+    2d44:	4241      	lsli      	r2, r2, 1
+    2d46:	6848      	and      	r1, r2
+    2d48:	3940      	cmpnei      	r1, 0
+    2d4a:	0bf9      	bt      	0x2d3c	// 2d3c <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    2d4c:	3280      	movi      	r2, 128
+    2d4e:	932c      	ld.w      	r1, (r3, 0x30)
+    2d50:	4242      	lsli      	r2, r2, 2
+    2d52:	6848      	and      	r1, r2
+    2d54:	3940      	cmpnei      	r1, 0
+    2d56:	0bf3      	bt      	0x2d3c	// 2d3c <EXI4to9IntHandler+0x38>
+    2d58:	07e2      	br      	0x2d1c	// 2d1c <EXI4to9IntHandler+0x18>
+    2d5a:	0000      	bkpt
+    2d5c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00002d60 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    2d60:	1460      	nie
+    2d62:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    2d64:	1076      	lrw      	r3, 0x2000005c	// 2dbc <EXI10to15IntHandler+0x5c>
+    2d66:	3280      	movi      	r2, 128
+    2d68:	9360      	ld.w      	r3, (r3, 0x0)
+    2d6a:	237f      	addi      	r3, 128
+    2d6c:	932c      	ld.w      	r1, (r3, 0x30)
+    2d6e:	4243      	lsli      	r2, r2, 3
+    2d70:	6848      	and      	r1, r2
+    2d72:	3940      	cmpnei      	r1, 0
+    2d74:	0c03      	bf      	0x2d7a	// 2d7a <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    2d76:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    2d78:	041f      	br      	0x2db6	// 2db6 <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    2d7a:	3280      	movi      	r2, 128
+    2d7c:	932c      	ld.w      	r1, (r3, 0x30)
+    2d7e:	4244      	lsli      	r2, r2, 4
+    2d80:	6848      	and      	r1, r2
+    2d82:	3940      	cmpnei      	r1, 0
+    2d84:	0bf9      	bt      	0x2d76	// 2d76 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    2d86:	3280      	movi      	r2, 128
+    2d88:	932c      	ld.w      	r1, (r3, 0x30)
+    2d8a:	4245      	lsli      	r2, r2, 5
+    2d8c:	6848      	and      	r1, r2
+    2d8e:	3940      	cmpnei      	r1, 0
+    2d90:	0bf3      	bt      	0x2d76	// 2d76 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    2d92:	3280      	movi      	r2, 128
+    2d94:	932c      	ld.w      	r1, (r3, 0x30)
+    2d96:	4246      	lsli      	r2, r2, 6
+    2d98:	6848      	and      	r1, r2
+    2d9a:	3940      	cmpnei      	r1, 0
+    2d9c:	0bed      	bt      	0x2d76	// 2d76 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    2d9e:	3280      	movi      	r2, 128
+    2da0:	932c      	ld.w      	r1, (r3, 0x30)
+    2da2:	4247      	lsli      	r2, r2, 7
+    2da4:	6848      	and      	r1, r2
+    2da6:	3940      	cmpnei      	r1, 0
+    2da8:	0be7      	bt      	0x2d76	// 2d76 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    2daa:	3280      	movi      	r2, 128
+    2dac:	932c      	ld.w      	r1, (r3, 0x30)
+    2dae:	4248      	lsli      	r2, r2, 8
+    2db0:	6848      	and      	r1, r2
+    2db2:	3940      	cmpnei      	r1, 0
+    2db4:	0be1      	bt      	0x2d76	// 2d76 <EXI10to15IntHandler+0x16>
+}
+    2db6:	1463      	ipop
+    2db8:	1461      	nir
+    2dba:	0000      	bkpt
+    2dbc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+00002dc0 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    2dc0:	1460      	nie
+    2dc2:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    2dc4:	106b      	lrw      	r3, 0x20000014	// 2df0 <LPTIntHandler+0x30>
+    2dc6:	3101      	movi      	r1, 1
+    2dc8:	9360      	ld.w      	r3, (r3, 0x0)
+    2dca:	934e      	ld.w      	r2, (r3, 0x38)
+    2dcc:	6884      	and      	r2, r1
+    2dce:	3a40      	cmpnei      	r2, 0
+    2dd0:	0c03      	bf      	0x2dd6	// 2dd6 <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    2dd2:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    2dd4:	040b      	br      	0x2dea	// 2dea <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    2dd6:	934e      	ld.w      	r2, (r3, 0x38)
+    2dd8:	3102      	movi      	r1, 2
+    2dda:	6884      	and      	r2, r1
+    2ddc:	3a40      	cmpnei      	r2, 0
+    2dde:	0bfa      	bt      	0x2dd2	// 2dd2 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    2de0:	934e      	ld.w      	r2, (r3, 0x38)
+    2de2:	3104      	movi      	r1, 4
+    2de4:	6884      	and      	r2, r1
+    2de6:	3a40      	cmpnei      	r2, 0
+    2de8:	0bf5      	bt      	0x2dd2	// 2dd2 <LPTIntHandler+0x12>
+}
+    2dea:	1463      	ipop
+    2dec:	1461      	nir
+    2dee:	0000      	bkpt
+    2df0:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+00002df4 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    2df4:	1460      	nie
+    2df6:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    2df8:	1071      	lrw      	r3, 0x2000000c	// 2e3c <BT0IntHandler+0x48>
+    2dfa:	3101      	movi      	r1, 1
+    2dfc:	9360      	ld.w      	r3, (r3, 0x0)
+    2dfe:	934c      	ld.w      	r2, (r3, 0x30)
+    2e00:	6884      	and      	r2, r1
+    2e02:	3a40      	cmpnei      	r2, 0
+    2e04:	0c0a      	bf      	0x2e18	// 2e18 <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    2e06:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    2e08:	9341      	ld.w      	r2, (r3, 0x4)
+    2e0a:	3a86      	bclri      	r2, 6
+    2e0c:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    2e0e:	9340      	ld.w      	r2, (r3, 0x0)
+    2e10:	3200      	movi      	r2, 0
+    2e12:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    2e14:	1463      	ipop
+    2e16:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    2e18:	934c      	ld.w      	r2, (r3, 0x30)
+    2e1a:	3102      	movi      	r1, 2
+    2e1c:	6884      	and      	r2, r1
+    2e1e:	3a40      	cmpnei      	r2, 0
+    2e20:	0c03      	bf      	0x2e26	// 2e26 <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    2e22:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    2e24:	07f8      	br      	0x2e14	// 2e14 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    2e26:	934c      	ld.w      	r2, (r3, 0x30)
+    2e28:	3104      	movi      	r1, 4
+    2e2a:	6884      	and      	r2, r1
+    2e2c:	3a40      	cmpnei      	r2, 0
+    2e2e:	0bfa      	bt      	0x2e22	// 2e22 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    2e30:	934c      	ld.w      	r2, (r3, 0x30)
+    2e32:	3108      	movi      	r1, 8
+    2e34:	6884      	and      	r2, r1
+    2e36:	3a40      	cmpnei      	r2, 0
+    2e38:	0bf5      	bt      	0x2e22	// 2e22 <BT0IntHandler+0x2e>
+    2e3a:	07ed      	br      	0x2e14	// 2e14 <BT0IntHandler+0x20>
+    2e3c:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00002e40 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    2e40:	1460      	nie
+    2e42:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    2e44:	1076      	lrw      	r3, 0x20000008	// 2e9c <BT1IntHandler+0x5c>
+    2e46:	3101      	movi      	r1, 1
+    2e48:	9360      	ld.w      	r3, (r3, 0x0)
+    2e4a:	934c      	ld.w      	r2, (r3, 0x30)
+    2e4c:	6884      	and      	r2, r1
+    2e4e:	3a40      	cmpnei      	r2, 0
+    2e50:	0c03      	bf      	0x2e56	// 2e56 <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    2e52:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    2e54:	0416      	br      	0x2e80	// 2e80 <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    2e56:	934c      	ld.w      	r2, (r3, 0x30)
+    2e58:	3102      	movi      	r1, 2
+    2e5a:	6884      	and      	r2, r1
+    2e5c:	3a40      	cmpnei      	r2, 0
+    2e5e:	0c13      	bf      	0x2e84	// 2e84 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    2e60:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    2e62:	1070      	lrw      	r3, 0x200000a8	// 2ea0 <BT1IntHandler+0x60>
+    2e64:	8340      	ld.b      	r2, (r3, 0x0)
+    2e66:	2200      	addi      	r2, 1
+    2e68:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    2e6a:	9321      	ld.w      	r1, (r3, 0x4)
+    2e6c:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    2e6e:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    2e70:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    2e72:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    2e74:	0c06      	bf      	0x2e80	// 2e80 <BT1IntHandler+0x40>
+			NUM = 0;
+    2e76:	3200      	movi      	r2, 0
+    2e78:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    2e7a:	9342      	ld.w      	r2, (r3, 0x8)
+    2e7c:	2200      	addi      	r2, 1
+    2e7e:	b342      	st.w      	r2, (r3, 0x8)
+}
+    2e80:	1463      	ipop
+    2e82:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    2e84:	934c      	ld.w      	r2, (r3, 0x30)
+    2e86:	3104      	movi      	r1, 4
+    2e88:	6884      	and      	r2, r1
+    2e8a:	3a40      	cmpnei      	r2, 0
+    2e8c:	0be3      	bt      	0x2e52	// 2e52 <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    2e8e:	934c      	ld.w      	r2, (r3, 0x30)
+    2e90:	3108      	movi      	r1, 8
+    2e92:	6884      	and      	r2, r1
+    2e94:	3a40      	cmpnei      	r2, 0
+    2e96:	0bde      	bt      	0x2e52	// 2e52 <BT1IntHandler+0x12>
+    2e98:	07f4      	br      	0x2e80	// 2e80 <BT1IntHandler+0x40>
+    2e9a:	0000      	bkpt
+    2e9c:	20000008 	.long	0x20000008
+    2ea0:	200000a8 	.long	0x200000a8
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00002ea4 <PriviledgeVioHandler>:
+    2ea4:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00002ea6 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    2ea6:	1460      	nie
+    2ea8:	1462      	ipush
+    // ISR content ...
+
+}
+    2eaa:	1463      	ipop
+    2eac:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+00002eae <Trap3Handler>:
+    2eae:	1460      	nie
+    2eb0:	1462      	ipush
+    2eb2:	1463      	ipop
+    2eb4:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+00002eb6 <Trap2Handler>:
+    2eb6:	1460      	nie
+    2eb8:	1462      	ipush
+    2eba:	1463      	ipop
+    2ebc:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+00002ebe <Trap1Handler>:
+    2ebe:	1460      	nie
+    2ec0:	1462      	ipush
+    2ec2:	1463      	ipop
+    2ec4:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+00002ec6 <Trap0Handler>:
+    2ec6:	1460      	nie
+    2ec8:	1462      	ipush
+    2eca:	1463      	ipop
+    2ecc:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+00002ece <UnrecExecpHandler>:
+    2ece:	1460      	nie
+    2ed0:	1462      	ipush
+    2ed2:	1463      	ipop
+    2ed4:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+00002ed6 <BreakPointHandler>:
+    2ed6:	1460      	nie
+    2ed8:	1462      	ipush
+    2eda:	1463      	ipop
+    2edc:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+00002ede <AccessErrHandler>:
+    2ede:	1460      	nie
+    2ee0:	1462      	ipush
+    2ee2:	1463      	ipop
+    2ee4:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+00002ee6 <IllegalInstrHandler>:
+    2ee6:	1460      	nie
+    2ee8:	1462      	ipush
+    2eea:	1463      	ipop
+    2eec:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+00002eee <MisalignedHandler>:
+    2eee:	1460      	nie
+    2ef0:	1462      	ipush
+    2ef2:	1463      	ipop
+    2ef4:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+00002ef6 <CNTAIntHandler>:
+    2ef6:	1460      	nie
+    2ef8:	1462      	ipush
+    2efa:	1463      	ipop
+    2efc:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+00002efe <I2CIntHandler>:
+    2efe:	1460      	nie
+    2f00:	1462      	ipush
+    2f02:	1463      	ipop
+    2f04:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+00002f08 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    2f08:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    2f0a:	c0006023 	mfcr      	r3, cr<0, 0>
+    2f0e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    2f12:	1046      	lrw      	r2, 0x20000000	// 2f28 <__divsi3+0x20>
+    2f14:	3400      	movi      	r4, 0
+    2f16:	9240      	ld.w      	r2, (r2, 0x0)
+    2f18:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    2f1a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    2f1c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    2f1e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    2f20:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    2f24:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    2f26:	1481      	pop      	r4
+    2f28:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00002f2c <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    2f2c:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    2f2e:	c0006023 	mfcr      	r3, cr<0, 0>
+    2f32:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    2f36:	1046      	lrw      	r2, 0x20000000	// 2f4c <__udivsi3+0x20>
+    2f38:	3401      	movi      	r4, 1
+    2f3a:	9240      	ld.w      	r2, (r2, 0x0)
+    2f3c:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    2f3e:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    2f40:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    2f42:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    2f44:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    2f48:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    2f4a:	1481      	pop      	r4
+    2f4c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00002f50 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    2f50:	c1807420 	psrset      	ee, ie
+}
+    2f54:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00002f58 <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    2f58:	14d1      	push      	r4, r15
+	switch(uart_id){
+    2f5a:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    2f5c:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    2f5e:	0c1a      	bf      	0x2f92	// 2f92 <UARTx_Init+0x3a>
+    2f60:	3840      	cmpnei      	r0, 0
+    2f62:	0c04      	bf      	0x2f6a	// 2f6a <UARTx_Init+0x12>
+    2f64:	3842      	cmpnei      	r0, 2
+    2f66:	0c2a      	bf      	0x2fba	// 2fba <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    2f68:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    2f6a:	e3fff911 	bsr      	0x218c	// 218c <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    2f6e:	118a      	lrw      	r4, 0x20000040	// 3014 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    2f70:	3100      	movi      	r1, 0
+    2f72:	3000      	movi      	r0, 0
+    2f74:	e3fff94c 	bsr      	0x220c	// 220c <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    2f78:	9400      	ld.w      	r0, (r4, 0x0)
+    2f7a:	3200      	movi      	r2, 0
+    2f7c:	1127      	lrw      	r1, 0x2710	// 3018 <UARTx_Init+0xc0>
+    2f7e:	e3fff9bd 	bsr      	0x22f8	// 22f8 <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    2f82:	9400      	ld.w      	r0, (r4, 0x0)
+    2f84:	3200      	movi      	r2, 0
+    2f86:	1125      	lrw      	r1, 0x2710	// 3018 <UARTx_Init+0xc0>
+    2f88:	e3fff9c0 	bsr      	0x2308	// 2308 <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    2f8c:	e3fff924 	bsr      	0x21d4	// 21d4 <UART0_Int_Enable>
+			break;
+    2f90:	07ec      	br      	0x2f68	// 2f68 <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    2f92:	e3fff909 	bsr      	0x21a4	// 21a4 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    2f96:	3102      	movi      	r1, 2
+    2f98:	3001      	movi      	r0, 1
+    2f9a:	e3fff939 	bsr      	0x220c	// 220c <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    2f9e:	1180      	lrw      	r4, 0x2000003c	// 301c <UARTx_Init+0xc4>
+    2fa0:	31d0      	movi      	r1, 208
+    2fa2:	9400      	ld.w      	r0, (r4, 0x0)
+    2fa4:	3200      	movi      	r2, 0
+    2fa6:	4121      	lsli      	r1, r1, 1
+    2fa8:	e3fff9a8 	bsr      	0x22f8	// 22f8 <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    2fac:	31d0      	movi      	r1, 208
+    2fae:	9400      	ld.w      	r0, (r4, 0x0)
+    2fb0:	3200      	movi      	r2, 0
+    2fb2:	4121      	lsli      	r1, r1, 1
+    2fb4:	e3fff9aa 	bsr      	0x2308	// 2308 <UARTInitRxTxIntEn>
+			break;
+    2fb8:	07d8      	br      	0x2f68	// 2f68 <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    2fba:	e3fff901 	bsr      	0x21bc	// 21bc <UART2_DeInit>
+			UART_IO_Init(IO_UART2,0);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    2fbe:	3100      	movi      	r1, 0
+    2fc0:	3002      	movi      	r0, 2
+    2fc2:	e3fff925 	bsr      	0x220c	// 220c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    2fc6:	1077      	lrw      	r3, 0x20000038	// 3020 <UARTx_Init+0xc8>
+    2fc8:	31d0      	movi      	r1, 208
+    2fca:	9300      	ld.w      	r0, (r3, 0x0)
+    2fcc:	3200      	movi      	r2, 0
+    2fce:	4121      	lsli      	r1, r1, 1
+    2fd0:	e3fff99c 	bsr      	0x2308	// 2308 <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    2fd4:	e3fff90e 	bsr      	0x21f0	// 21f0 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    2fd8:	3273      	movi      	r2, 115
+    2fda:	3100      	movi      	r1, 0
+    2fdc:	1012      	lrw      	r0, 0x20000190	// 3024 <UARTx_Init+0xcc>
+    2fde:	e3fff4c3 	bsr      	0x1964	// 1964 <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    2fe2:	1072      	lrw      	r3, 0x200001f7	// 3028 <UARTx_Init+0xd0>
+    2fe4:	3203      	movi      	r2, 3
+    2fe6:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    2fe8:	4c48      	lsri      	r2, r4, 8
+    2fea:	a388      	st.b      	r4, (r3, 0x8)
+    2fec:	a349      	st.b      	r2, (r3, 0x9)
+    2fee:	4c50      	lsri      	r2, r4, 16
+    2ff0:	4c98      	lsri      	r4, r4, 24
+    2ff2:	a38b      	st.b      	r4, (r3, 0xb)
+    2ff4:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    2ff6:	3103      	movi      	r1, 3
+    2ff8:	108d      	lrw      	r4, 0x20000048	// 302c <UARTx_Init+0xd4>
+    2ffa:	3200      	movi      	r2, 0
+    2ffc:	9400      	ld.w      	r0, (r4, 0x0)
+    2ffe:	e3fff6c5 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    3002:	9400      	ld.w      	r0, (r4, 0x0)
+    3004:	3103      	movi      	r1, 3
+    3006:	e3fff73b 	bsr      	0x1e7c	// 1e7c <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    300a:	9400      	ld.w      	r0, (r4, 0x0)
+    300c:	3103      	movi      	r1, 3
+    300e:	e3fff742 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+}
+    3012:	07ab      	br      	0x2f68	// 2f68 <UARTx_Init+0x10>
+    3014:	20000040 	.long	0x20000040
+    3018:	00002710 	.long	0x00002710
+    301c:	2000003c 	.long	0x2000003c
+    3020:	20000038 	.long	0x20000038
+    3024:	20000190 	.long	0x20000190
+    3028:	200001f7 	.long	0x200001f7
+    302c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+00003030 <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    3030:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    3032:	1075      	lrw      	r3, 0x200001f0	// 3084 <UART2_RecvINT_Processing+0x54>
+    3034:	8346      	ld.b      	r2, (r3, 0x6)
+    3036:	8325      	ld.b      	r1, (r3, 0x5)
+    3038:	4248      	lsli      	r2, r2, 8
+    303a:	6c84      	or      	r2, r1
+    303c:	3162      	movi      	r1, 98
+    303e:	10b3      	lrw      	r5, 0x20000190	// 3088 <UART2_RecvINT_Processing+0x58>
+    3040:	3440      	movi      	r4, 64
+    3042:	6485      	cmplt      	r1, r2
+    3044:	6114      	addu      	r4, r5
+    3046:	0c06      	bf      	0x3052	// 3052 <UART2_RecvINT_Processing+0x22>
+    3048:	3225      	movi      	r2, 37
+    304a:	6090      	addu      	r2, r4
+    304c:	3100      	movi      	r1, 0
+    304e:	a220      	st.b      	r1, (r2, 0x0)
+    3050:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    3052:	8346      	ld.b      	r2, (r3, 0x6)
+    3054:	8325      	ld.b      	r1, (r3, 0x5)
+    3056:	4248      	lsli      	r2, r2, 8
+    3058:	6c84      	or      	r2, r1
+    305a:	5a22      	addi      	r1, r2, 1
+    305c:	6094      	addu      	r2, r5
+    305e:	a200      	st.b      	r0, (r2, 0x0)
+    3060:	2424      	addi      	r4, 37
+    3062:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    3064:	104a      	lrw      	r2, 0x200000b0	// 308c <UART2_RecvINT_Processing+0x5c>
+    3066:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    3068:	a420      	st.b      	r1, (r4, 0x0)
+    306a:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    306c:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    306e:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    3070:	1028      	lrw      	r1, 0x200001fb	// 3090 <UART2_RecvINT_Processing+0x60>
+    3072:	a140      	st.b      	r2, (r1, 0x0)
+    3074:	a101      	st.b      	r0, (r1, 0x1)
+    3076:	4a10      	lsri      	r0, r2, 16
+    3078:	4a58      	lsri      	r2, r2, 24
+    307a:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    307c:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    307e:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    3080:	a344      	st.b      	r2, (r3, 0x4)
+}
+    3082:	1482      	pop      	r4-r5
+    3084:	200001f0 	.long	0x200001f0
+    3088:	20000190 	.long	0x20000190
+    308c:	200000b0 	.long	0x200000b0
+    3090:	200001fb 	.long	0x200001fb
+
+Disassembly of section .text.Dbg_Println:
+
+00003094 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    3094:	1423      	subi      	r14, r14, 12
+    3096:	b862      	st.w      	r3, (r14, 0x8)
+    3098:	b841      	st.w      	r2, (r14, 0x4)
+    309a:	b820      	st.w      	r1, (r14, 0x0)
+		
+		
+    }
+
+#endif	
+}
+    309c:	1403      	addi      	r14, r14, 12
+    309e:	783c      	jmp      	r15
+
+Disassembly of section .text.RC522_Delay:
+
+000030a0 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    30a0:	3300      	movi      	r3, 0
+    30a2:	640e      	cmpne      	r3, r0
+    30a4:	0802      	bt      	0x30a8	// 30a8 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    30a6:	783c      	jmp      	r15
+        nop;
+    30a8:	6c03      	mov      	r0, r0
+        nop;
+    30aa:	6c03      	mov      	r0, r0
+        nop;
+    30ac:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    30ae:	2300      	addi      	r3, 1
+    30b0:	07f9      	br      	0x30a2	// 30a2 <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+000030b4 <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    30b4:	14d4      	push      	r4-r7, r15
+    30b6:	6d83      	mov      	r6, r0
+    30b8:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    30ba:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    30bc:	10f2      	lrw      	r7, 0x2000004c	// 3104 <RC522_ReadWriteOneByte+0x50>
+    30be:	3109      	movi      	r1, 9
+    30c0:	9700      	ld.w      	r0, (r7, 0x0)
+    30c2:	e3fff6e8 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    30c6:	74da      	sextb      	r3, r6
+    30c8:	3bdf      	btsti      	r3, 31
+    30ca:	310a      	movi      	r1, 10
+    30cc:	9700      	ld.w      	r0, (r7, 0x0)
+    30ce:	0c18      	bf      	0x30fe	// 30fe <RC522_ReadWriteOneByte+0x4a>
+    30d0:	e3fff6dd 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    30d4:	3109      	movi      	r1, 9
+    30d6:	9700      	ld.w      	r0, (r7, 0x0)
+    30d8:	e3fff6d9 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    30dc:	310b      	movi      	r1, 11
+    30de:	9700      	ld.w      	r0, (r7, 0x0)
+    30e0:	e3fff6e8 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+        tx_data<<=1;
+    30e4:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    30e6:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    30e8:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    30ea:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    30ec:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    30ee:	0c02      	bf      	0x30f2	// 30f2 <RC522_ReadWriteOneByte+0x3e>
+    30f0:	3ca0      	bseti      	r4, 0
+    30f2:	2d00      	subi      	r5, 1
+    30f4:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    30f6:	3d40      	cmpnei      	r5, 0
+    30f8:	0be3      	bt      	0x30be	// 30be <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    30fa:	6c13      	mov      	r0, r4
+    30fc:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    30fe:	e3fff6ca 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    3102:	07e9      	br      	0x30d4	// 30d4 <RC522_ReadWriteOneByte+0x20>
+    3104:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+00003108 <RC522_ReadRawRC>:
+{
+    3108:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    310a:	10ad      	lrw      	r5, 0x20000048	// 313c <RC522_ReadRawRC+0x34>
+    310c:	3105      	movi      	r1, 5
+{
+    310e:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    3110:	9500      	ld.w      	r0, (r5, 0x0)
+    3112:	e3fff6c0 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    3116:	4401      	lsli      	r0, r4, 1
+    3118:	347e      	movi      	r4, 126
+    311a:	6810      	and      	r0, r4
+    311c:	3400      	movi      	r4, 0
+    311e:	2c7f      	subi      	r4, 128
+    3120:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    3122:	7400      	zextb      	r0, r0
+    3124:	e3ffffc8 	bsr      	0x30b4	// 30b4 <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    3128:	3000      	movi      	r0, 0
+    312a:	e3ffffc5 	bsr      	0x30b4	// 30b4 <RC522_ReadWriteOneByte>
+    312e:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    3130:	3105      	movi      	r1, 5
+    3132:	9500      	ld.w      	r0, (r5, 0x0)
+    3134:	e3fff6ab 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+}
+    3138:	6c13      	mov      	r0, r4
+    313a:	1492      	pop      	r4-r5, r15
+    313c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+00003140 <RC522_WriteRawRC>:
+{
+    3140:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    3142:	10ab      	lrw      	r5, 0x20000048	// 316c <RC522_WriteRawRC+0x2c>
+{
+    3144:	6d87      	mov      	r6, r1
+    3146:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    3148:	3105      	movi      	r1, 5
+    314a:	9500      	ld.w      	r0, (r5, 0x0)
+    314c:	e3fff6a3 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    3150:	4481      	lsli      	r4, r4, 1
+    3152:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    3154:	6810      	and      	r0, r4
+    3156:	e3ffffaf 	bsr      	0x30b4	// 30b4 <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    315a:	6c1b      	mov      	r0, r6
+    315c:	e3ffffac 	bsr      	0x30b4	// 30b4 <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    3160:	9500      	ld.w      	r0, (r5, 0x0)
+    3162:	3105      	movi      	r1, 5
+    3164:	e3fff693 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+}
+    3168:	1493      	pop      	r4-r6, r15
+    316a:	0000      	bkpt
+    316c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_PcdReset:
+
+00003170 <RC522_PcdReset>:
+{
+    3170:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    3172:	310f      	movi      	r1, 15
+    3174:	3001      	movi      	r0, 1
+    3176:	e3ffffe5 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    317a:	310f      	movi      	r1, 15
+    317c:	3001      	movi      	r0, 1
+    317e:	e3ffffe1 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    3182:	300a      	movi      	r0, 10
+    3184:	e3ffff8e 	bsr      	0x30a0	// 30a0 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    3188:	313d      	movi      	r1, 61
+    318a:	3011      	movi      	r0, 17
+    318c:	e3ffffda 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    3190:	311e      	movi      	r1, 30
+    3192:	302d      	movi      	r0, 45
+    3194:	e3ffffd6 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    3198:	3100      	movi      	r1, 0
+    319a:	302c      	movi      	r0, 44
+    319c:	e3ffffd2 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    31a0:	318d      	movi      	r1, 141
+    31a2:	302a      	movi      	r0, 42
+    31a4:	e3ffffce 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    31a8:	313e      	movi      	r1, 62
+    31aa:	302b      	movi      	r0, 43
+    31ac:	e3ffffca 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    31b0:	3140      	movi      	r1, 64
+    31b2:	3015      	movi      	r0, 21
+    31b4:	e3ffffc6 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+}
+    31b8:	3000      	movi      	r0, 0
+    31ba:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+000031bc <RC522_SetBitMask>:
+{
+    31bc:	14d2      	push      	r4-r5, r15
+    31be:	6d47      	mov      	r5, r1
+    31c0:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    31c2:	e3ffffa3 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    31c6:	6c43      	mov      	r1, r0
+    31c8:	6c54      	or      	r1, r5
+    31ca:	7444      	zextb      	r1, r1
+    31cc:	6c13      	mov      	r0, r4
+    31ce:	e3ffffb9 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+}
+    31d2:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+000031d4 <RC522_PcdAntennaOn>:
+{
+    31d4:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    31d6:	3014      	movi      	r0, 20
+    31d8:	e3ffff98 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    31dc:	3303      	movi      	r3, 3
+    31de:	680c      	and      	r0, r3
+    31e0:	3840      	cmpnei      	r0, 0
+    31e2:	0805      	bt      	0x31ec	// 31ec <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    31e4:	3103      	movi      	r1, 3
+    31e6:	3014      	movi      	r0, 20
+    31e8:	e3ffffea 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+}
+    31ec:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000031ee <RC522_ClearBitMask>:
+{
+    31ee:	14d2      	push      	r4-r5, r15
+    31f0:	6d47      	mov      	r5, r1
+    31f2:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    31f4:	e3ffff8a 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    31f8:	6815      	andn      	r0, r5
+    31fa:	7440      	zextb      	r1, r0
+    31fc:	6c13      	mov      	r0, r4
+    31fe:	e3ffffa1 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+}
+    3202:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+00003204 <RC522_PcdAntennaOff>:
+{
+    3204:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    3206:	3103      	movi      	r1, 3
+    3208:	3014      	movi      	r0, 20
+    320a:	e3fffff2 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+}
+    320e:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Reset:
+
+00003210 <RC522_Reset>:
+void RC522_Reset(void){
+    3210:	14d0      	push      	r15
+  RC522_PcdReset();                //复位RC522
+    3212:	e3ffffaf 	bsr      	0x3170	// 3170 <RC522_PcdReset>
+  RC522_PcdAntennaOff();    //关闭天线
+    3216:	e3fffff7 	bsr      	0x3204	// 3204 <RC522_PcdAntennaOff>
+  RC522_Delay(2);         //延时2毫秒
+    321a:	3002      	movi      	r0, 2
+    321c:	e3ffff42 	bsr      	0x30a0	// 30a0 <RC522_Delay>
+  RC522_PcdAntennaOn();     //开启天线
+    3220:	e3ffffda 	bsr      	0x31d4	// 31d4 <RC522_PcdAntennaOn>
+}
+    3224:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_CalulateCRC:
+
+00003226 <RC522_CalulateCRC>:
+{
+    3226:	14d3      	push      	r4-r6, r15
+    3228:	6d03      	mov      	r4, r0
+    322a:	6d87      	mov      	r6, r1
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    322c:	3005      	movi      	r0, 5
+    322e:	3104      	movi      	r1, 4
+{
+    3230:	6d4b      	mov      	r5, r2
+    RC522_ClearBitMask(DivIrqReg,0x04);  //CRCIrq = 0
+    3232:	e3ffffde 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    3236:	3100      	movi      	r1, 0
+    3238:	3001      	movi      	r0, 1
+    323a:	e3ffff83 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80); //清FIFO指针
+    323e:	3180      	movi      	r1, 128
+    3240:	300a      	movi      	r0, 10
+    3242:	e3ffffbd 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+    3246:	6190      	addu      	r6, r4
+    for(i=0;i<len;i++)
+    3248:	6592      	cmpne      	r4, r6
+    324a:	081b      	bt      	0x3280	// 3280 <RC522_CalulateCRC+0x5a>
+        RC522_WriteRawRC(CommandReg,PCD_CALCCRC);   //等待CRC计算完成
+    324c:	3103      	movi      	r1, 3
+    324e:	3001      	movi      	r0, 1
+    3250:	e3ffff78 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    3254:	34ff      	movi      	r4, 255
+    3256:	2c00      	subi      	r4, 1
+        n=RC522_ReadRawRC(DivIrqReg);
+    3258:	3005      	movi      	r0, 5
+    325a:	7510      	zextb      	r4, r4
+    325c:	e3ffff56 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    while((i!=0)&&!(n&0x04));//CRCIrq = 1
+    3260:	3c40      	cmpnei      	r4, 0
+    3262:	0c06      	bf      	0x326e	// 326e <RC522_CalulateCRC+0x48>
+    3264:	3304      	movi      	r3, 4
+    3266:	680c      	and      	r0, r3
+    3268:	7400      	zextb      	r0, r0
+    326a:	3840      	cmpnei      	r0, 0
+    326c:	0ff5      	bf      	0x3256	// 3256 <RC522_CalulateCRC+0x30>
+    pOut[0]=RC522_ReadRawRC(CRCResultRegL);
+    326e:	3022      	movi      	r0, 34
+    3270:	e3ffff4c 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    3274:	a500      	st.b      	r0, (r5, 0x0)
+    pOut[1]=RC522_ReadRawRC(CRCResultRegM);
+    3276:	3021      	movi      	r0, 33
+    3278:	e3ffff48 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    327c:	a501      	st.b      	r0, (r5, 0x1)
+}
+    327e:	1493      	pop      	r4-r6, r15
+            RC522_WriteRawRC(FIFODataReg,*(pIn +i));  //开始RCR计算
+    3280:	8420      	ld.b      	r1, (r4, 0x0)
+    3282:	3009      	movi      	r0, 9
+    3284:	e3ffff5e 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    3288:	2400      	addi      	r4, 1
+    328a:	07df      	br      	0x3248	// 3248 <RC522_CalulateCRC+0x22>
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+0000328c <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    328c:	14d0      	push      	r15
+        RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    328e:	3108      	movi      	r1, 8
+    3290:	3008      	movi      	r0, 8
+    3292:	e3ffffae 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+        RC522_WriteRawRC(ModeReg,0x3D);          //3F//CRC初始值0x6363
+    3296:	313d      	movi      	r1, 61
+    3298:	3011      	movi      	r0, 17
+    329a:	e3ffff53 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RxSelReg,0x86);         //84
+    329e:	3186      	movi      	r1, 134
+    32a0:	3017      	movi      	r0, 23
+    32a2:	e3ffff4f 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_WriteRawRC(RFCfgReg,0x7F);         //4F  //调整卡的感应距离//RxGain = 48dB调节卡感应距离
+    32a6:	317f      	movi      	r1, 127
+    32a8:	3026      	movi      	r0, 38
+    32aa:	e3ffff4b 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegL,30);        //tmoLength);// TReloadVal = 'h6a =tmoLength(dec)
+    32ae:	311e      	movi      	r1, 30
+    32b0:	302d      	movi      	r0, 45
+    32b2:	e3ffff47 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TReloadRegH,0);
+    32b6:	3100      	movi      	r1, 0
+    32b8:	302c      	movi      	r0, 44
+    32ba:	e3ffff43 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TModeReg,0x8D);
+    32be:	318d      	movi      	r1, 141
+    32c0:	302a      	movi      	r0, 42
+    32c2:	e3ffff3f 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_WriteRawRC(TPrescalerReg,0x3E);
+    32c6:	313e      	movi      	r1, 62
+    32c8:	302b      	movi      	r0, 43
+    32ca:	e3ffff3b 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+        RC522_Delay(1000);
+    32ce:	30fa      	movi      	r0, 250
+    32d0:	4002      	lsli      	r0, r0, 2
+    32d2:	e3fffee7 	bsr      	0x30a0	// 30a0 <RC522_Delay>
+        RC522_PcdAntennaOn();      //开启天线
+    32d6:	e3ffff7f 	bsr      	0x31d4	// 31d4 <RC522_PcdAntennaOn>
+}
+    32da:	3000      	movi      	r0, 0
+    32dc:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+000032e0 <RC522_Init>:
+{
+    32e0:	14d1      	push      	r4, r15
+	nop;
+    32e2:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    32e4:	1183      	lrw      	r4, 0x2000004c	// 3370 <RC522_Init+0x90>
+    32e6:	3200      	movi      	r2, 0
+    32e8:	9400      	ld.w      	r0, (r4, 0x0)
+    32ea:	3109      	movi      	r1, 9
+    32ec:	e3fff54e 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    32f0:	3200      	movi      	r2, 0
+    32f2:	9400      	ld.w      	r0, (r4, 0x0)
+    32f4:	310a      	movi      	r1, 10
+    32f6:	e3fff549 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    32fa:	9400      	ld.w      	r0, (r4, 0x0)
+    32fc:	310b      	movi      	r1, 11
+    32fe:	e3fff5b5 	bsr      	0x1e68	// 1e68 <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    3302:	9400      	ld.w      	r0, (r4, 0x0)
+    3304:	3201      	movi      	r2, 1
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    3306:	109c      	lrw      	r4, 0x20000048	// 3374 <RC522_Init+0x94>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    3308:	310b      	movi      	r1, 11
+    330a:	e3fff53f 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    330e:	9400      	ld.w      	r0, (r4, 0x0)
+    3310:	3200      	movi      	r2, 0
+    3312:	3105      	movi      	r1, 5
+    3314:	e3fff53a 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+    GPIO_Init(GPIOB0,4,Output);			//RST
+    3318:	9400      	ld.w      	r0, (r4, 0x0)
+    331a:	3200      	movi      	r2, 0
+    331c:	3104      	movi      	r1, 4
+    331e:	e3fff535 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOB0,3,Intput);			//IRQ
+    3322:	3201      	movi      	r2, 1
+    3324:	9400      	ld.w      	r0, (r4, 0x0)
+    3326:	3103      	movi      	r1, 3
+    3328:	e3fff530 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_High(GPIOB0,5);
+    332c:	9400      	ld.w      	r0, (r4, 0x0)
+    332e:	3105      	movi      	r1, 5
+    3330:	e3fff5ad 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    GPIO_Write_High(GPIOB0,4);
+    3334:	3104      	movi      	r1, 4
+    3336:	9400      	ld.w      	r0, (r4, 0x0)
+    3338:	e3fff5a9 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    333c:	e3ffff1a 	bsr      	0x3170	// 3170 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    3340:	e3ffff62 	bsr      	0x3204	// 3204 <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    3344:	3002      	movi      	r0, 2
+    3346:	e3fffead 	bsr      	0x30a0	// 30a0 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    334a:	e3ffff45 	bsr      	0x31d4	// 31d4 <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    334e:	108b      	lrw      	r4, 0x20000204	// 3378 <RC522_Init+0x98>
+    3350:	e3ffff9e 	bsr      	0x328c	// 328c <M500PcdConfigISOType.part.1>
+    3354:	3230      	movi      	r2, 48
+    3356:	3100      	movi      	r1, 0
+    3358:	6c13      	mov      	r0, r4
+    335a:	e3fff305 	bsr      	0x1964	// 1964 <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    335e:	3318      	movi      	r3, 24
+    3360:	a468      	st.b      	r3, (r4, 0x8)
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    3362:	3360      	movi      	r3, 96
+    3364:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    3366:	3300      	movi      	r3, 0
+    3368:	2b00      	subi      	r3, 1
+    336a:	b468      	st.w      	r3, (r4, 0x20)
+    336c:	ac72      	st.h      	r3, (r4, 0x24)
+}
+    336e:	1491      	pop      	r4, r15
+    3370:	2000004c 	.long	0x2000004c
+    3374:	20000048 	.long	0x20000048
+    3378:	20000204 	.long	0x20000204
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+0000337c <RC522_PcdComMF522>:
+{
+    337c:	14d4      	push      	r4-r7, r15
+    337e:	1424      	subi      	r14, r14, 16
+    3380:	b861      	st.w      	r3, (r14, 0x4)
+    switch (Command) {
+    3382:	384c      	cmpnei      	r0, 12
+{
+    3384:	9869      	ld.w      	r3, (r14, 0x24)
+    3386:	6d43      	mov      	r5, r0
+    3388:	6dc7      	mov      	r7, r1
+    338a:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    338c:	0c4c      	bf      	0x3424	// 3424 <RC522_PcdComMF522+0xa8>
+    338e:	384e      	cmpnei      	r0, 14
+    3390:	0c4d      	bf      	0x342a	// 342a <RC522_PcdComMF522+0xae>
+    U8_T waitFor=0x00;
+    3392:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    3394:	3400      	movi      	r4, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    3396:	6c53      	mov      	r1, r4
+    3398:	39a7      	bseti      	r1, 7
+    339a:	3002      	movi      	r0, 2
+    339c:	b842      	st.w      	r2, (r14, 0x8)
+    339e:	e3fffed1 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    33a2:	3180      	movi      	r1, 128
+    33a4:	3004      	movi      	r0, 4
+    33a6:	e3ffff24 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    33aa:	3100      	movi      	r1, 0
+    33ac:	3001      	movi      	r0, 1
+    33ae:	e3fffec9 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    33b2:	3180      	movi      	r1, 128
+    33b4:	300a      	movi      	r0, 10
+    33b6:	e3ffff03 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    33ba:	9842      	ld.w      	r2, (r14, 0x8)
+    33bc:	6cdf      	mov      	r3, r7
+    33be:	7489      	zexth      	r2, r2
+    33c0:	3700      	movi      	r7, 0
+    33c2:	649c      	cmphs      	r7, r2
+    33c4:	0c36      	bf      	0x3430	// 3430 <RC522_PcdComMF522+0xb4>
+	RC522_WriteRawRC(CommandReg,Command);
+    33c6:	6c57      	mov      	r1, r5
+    33c8:	3001      	movi      	r0, 1
+    33ca:	e3fffebb 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    33ce:	3d4c      	cmpnei      	r5, 12
+    33d0:	0805      	bt      	0x33da	// 33da <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    33d2:	3180      	movi      	r1, 128
+    33d4:	300d      	movi      	r0, 13
+    33d6:	e3fffef3 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    33da:	33fa      	movi      	r3, 250
+    33dc:	4363      	lsli      	r3, r3, 3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    33de:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    33e0:	3004      	movi      	r0, 4
+    33e2:	b862      	st.w      	r3, (r14, 0x8)
+    33e4:	e3fffe92 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+		i--;
+    33e8:	9862      	ld.w      	r3, (r14, 0x8)
+    33ea:	2b00      	subi      	r3, 1
+    33ec:	74cd      	zexth      	r3, r3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    33ee:	3b40      	cmpnei      	r3, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    33f0:	6dc3      	mov      	r7, r0
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    33f2:	0c05      	bf      	0x33fc	// 33fc <RC522_PcdComMF522+0x80>
+    33f4:	6c83      	mov      	r2, r0
+    33f6:	6898      	and      	r2, r6
+    33f8:	3a40      	cmpnei      	r2, 0
+    33fa:	0ff3      	bf      	0x33e0	// 33e0 <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    33fc:	3180      	movi      	r1, 128
+    33fe:	300d      	movi      	r0, 13
+    3400:	b862      	st.w      	r3, (r14, 0x8)
+    3402:	e3fffef6 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+	if(i!=0)
+    3406:	9862      	ld.w      	r3, (r14, 0x8)
+    3408:	3b40      	cmpnei      	r3, 0
+    340a:	081f      	bt      	0x3448	// 3448 <RC522_PcdComMF522+0xcc>
+    char stats=MI_ERR;
+    340c:	3702      	movi      	r7, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    340e:	3180      	movi      	r1, 128
+    3410:	300c      	movi      	r0, 12
+    3412:	e3fffed5 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    3416:	3100      	movi      	r1, 0
+    3418:	3001      	movi      	r0, 1
+    341a:	e3fffe93 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+}
+    341e:	6c1f      	mov      	r0, r7
+    3420:	1404      	addi      	r14, r14, 16
+    3422:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    3424:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    3426:	3477      	movi      	r4, 119
+        break;
+    3428:	07b7      	br      	0x3396	// 3396 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    342a:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    342c:	3412      	movi      	r4, 18
+    342e:	07b4      	br      	0x3396	// 3396 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    3430:	8320      	ld.b      	r1, (r3, 0x0)
+    3432:	3009      	movi      	r0, 9
+    3434:	b843      	st.w      	r2, (r14, 0xc)
+    3436:	b862      	st.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    3438:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    343a:	e3fffe83 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    343e:	9862      	ld.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    3440:	75dd      	zexth      	r7, r7
+    3442:	2300      	addi      	r3, 1
+    3444:	9843      	ld.w      	r2, (r14, 0xc)
+    3446:	07be      	br      	0x33c2	// 33c2 <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    3448:	3006      	movi      	r0, 6
+    344a:	e3fffe5f 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    344e:	331b      	movi      	r3, 27
+    3450:	680c      	and      	r0, r3
+    3452:	3840      	cmpnei      	r0, 0
+    3454:	0bdc      	bt      	0x340c	// 340c <RC522_PcdComMF522+0x90>
+            stats=MI_OK;
+    3456:	3301      	movi      	r3, 1
+    3458:	690c      	and      	r4, r3
+            if(Command==PCD_TRANSCEIVE)
+    345a:	3d4c      	cmpnei      	r5, 12
+            stats=MI_OK;
+    345c:	69d0      	and      	r7, r4
+            if(Command==PCD_TRANSCEIVE)
+    345e:	0bd8      	bt      	0x340e	// 340e <RC522_PcdComMF522+0x92>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    3460:	300a      	movi      	r0, 10
+    3462:	e3fffe53 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    3466:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    3468:	300c      	movi      	r0, 12
+    346a:	e3fffe4f 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    346e:	3307      	movi      	r3, 7
+    3470:	680c      	and      	r0, r3
+                if(lastBits)
+    3472:	3840      	cmpnei      	r0, 0
+    3474:	0c1b      	bf      	0x34aa	// 34aa <RC522_PcdComMF522+0x12e>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    3476:	5c63      	subi      	r3, r4, 1
+    3478:	4363      	lsli      	r3, r3, 3
+    347a:	600c      	addu      	r0, r3
+    347c:	9860      	ld.w      	r3, (r14, 0x0)
+    347e:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    3480:	3c40      	cmpnei      	r4, 0
+    3482:	0c18      	bf      	0x34b2	// 34b2 <RC522_PcdComMF522+0x136>
+    3484:	6cd3      	mov      	r3, r4
+    3486:	7510      	zextb      	r4, r4
+    3488:	3c12      	cmphsi      	r4, 19
+    348a:	0c02      	bf      	0x348e	// 348e <RC522_PcdComMF522+0x112>
+    348c:	3312      	movi      	r3, 18
+    348e:	74cc      	zextb      	r3, r3
+    3490:	98c1      	ld.w      	r6, (r14, 0x4)
+                for(i=0; i<n; i++)
+    3492:	3500      	movi      	r5, 0
+    3494:	750d      	zexth      	r4, r3
+    3496:	6514      	cmphs      	r5, r4
+    3498:	0bbb      	bt      	0x340e	// 340e <RC522_PcdComMF522+0x92>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    349a:	3009      	movi      	r0, 9
+    349c:	e3fffe36 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    34a0:	2500      	addi      	r5, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    34a2:	a600      	st.b      	r0, (r6, 0x0)
+                for(i=0; i<n; i++)
+    34a4:	7555      	zexth      	r5, r5
+    34a6:	2600      	addi      	r6, 1
+    34a8:	07f7      	br      	0x3496	// 3496 <RC522_PcdComMF522+0x11a>
+                    *pOutLenBit=n*8;
+    34aa:	4463      	lsli      	r3, r4, 3
+    34ac:	9840      	ld.w      	r2, (r14, 0x0)
+    34ae:	a260      	st.b      	r3, (r2, 0x0)
+    34b0:	07e8      	br      	0x3480	// 3480 <RC522_PcdComMF522+0x104>
+                if(n==0)n=1;
+    34b2:	3301      	movi      	r3, 1
+    34b4:	07ee      	br      	0x3490	// 3490 <RC522_PcdComMF522+0x114>
+
+Disassembly of section .text.RC522_PcdSelect:
+
+000034b6 <RC522_PcdSelect>:
+{
+    34b6:	14d1      	push      	r4, r15
+    34b8:	1427      	subi      	r14, r14, 28
+    ucComMF522Buf[0]=PICC_ANTICOLL1;
+    34ba:	3300      	movi      	r3, 0
+    34bc:	2b6c      	subi      	r3, 109
+    34be:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x70;
+    34c2:	3370      	movi      	r3, 112
+    34c4:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    ucComMF522Buf[6]=0;
+    34c8:	3300      	movi      	r3, 0
+    34ca:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    34ce:	1a02      	addi      	r2, r14, 8
+    34d0:	582e      	addi      	r1, r0, 4
+        ucComMF522Buf[i+2]=*(pSnr+i);
+    34d2:	8060      	ld.b      	r3, (r0, 0x0)
+    34d4:	a262      	st.b      	r3, (r2, 0x2)
+        ucComMF522Buf[6]^=*(pSnr+i);
+    34d6:	d88e000e 	ld.b      	r4, (r14, 0xe)
+    34da:	2000      	addi      	r0, 1
+    34dc:	6cd1      	xor      	r3, r4
+    for(i=0;i<4;i++)
+    34de:	6442      	cmpne      	r0, r1
+        ucComMF522Buf[6]^=*(pSnr+i);
+    34e0:	dc6e000e 	st.b      	r3, (r14, 0xe)
+    34e4:	2200      	addi      	r2, 1
+    for(i=0;i<4;i++)
+    34e6:	0bf6      	bt      	0x34d2	// 34d2 <RC522_PcdSelect+0x1c>
+    RC522_CalulateCRC(ucComMF522Buf,7,&ucComMF522Buf[7]); //用MF522计算CRC16函数，校验数据
+    34e8:	1b02      	addi      	r3, r14, 8
+    34ea:	5b5a      	addi      	r2, r3, 7
+    34ec:	6c0f      	mov      	r0, r3
+    34ee:	3107      	movi      	r1, 7
+    34f0:	e3fffe9b 	bsr      	0x3226	// 3226 <RC522_CalulateCRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    34f4:	3407      	movi      	r4, 7
+    RC522_ClearBitMask(Status2Reg,0x08);                    //清RC522寄存器位
+    34f6:	3108      	movi      	r1, 8
+    34f8:	3008      	movi      	r0, 8
+    34fa:	e3fffe7a 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,9,ucComMF522Buf,&unLen);
+    34fe:	6138      	addu      	r4, r14
+    3500:	1b02      	addi      	r3, r14, 8
+    3502:	b880      	st.w      	r4, (r14, 0x0)
+    3504:	3209      	movi      	r2, 9
+    3506:	6c4f      	mov      	r1, r3
+    3508:	300c      	movi      	r0, 12
+    350a:	e3ffff39 	bsr      	0x337c	// 337c <RC522_PcdComMF522>
+    if((stats==MI_OK)&&(unLen==0x18))stats=MI_OK;
+    350e:	3840      	cmpnei      	r0, 0
+    3510:	0806      	bt      	0x351c	// 351c <RC522_PcdSelect+0x66>
+    3512:	8460      	ld.b      	r3, (r4, 0x0)
+    3514:	3b58      	cmpnei      	r3, 24
+    3516:	0803      	bt      	0x351c	// 351c <RC522_PcdSelect+0x66>
+}
+    3518:	1407      	addi      	r14, r14, 28
+    351a:	1491      	pop      	r4, r15
+    else stats=MI_ERR;
+    351c:	3002      	movi      	r0, 2
+    351e:	07fd      	br      	0x3518	// 3518 <RC522_PcdSelect+0x62>
+
+Disassembly of section .text.RC522_PcdAuthState:
+
+00003520 <RC522_PcdAuthState>:
+{
+    3520:	14d2      	push      	r4-r5, r15
+    3522:	1427      	subi      	r14, r14, 28
+    3524:	6d0f      	mov      	r4, r3
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    3526:	1b02      	addi      	r3, r14, 8
+{
+    3528:	6d47      	mov      	r5, r1
+    ucComMF522Buf[0]=auth_mode;
+    352a:	dc0e0008 	st.b      	r0, (r14, 0x8)
+{
+    352e:	6c4b      	mov      	r1, r2
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    3530:	5b06      	addi      	r0, r3, 2
+    3532:	3206      	movi      	r2, 6
+    ucComMF522Buf[1]=addr;
+    3534:	dcae0009 	st.b      	r5, (r14, 0x9)
+    memcpy(&ucComMF522Buf[2],pKey,6); //拷贝，复制
+    3538:	e3fff25a 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+    memcpy(&ucComMF522Buf[8],pSnr,4);
+    353c:	1b02      	addi      	r3, r14, 8
+    353e:	6c53      	mov      	r1, r4
+    3540:	5b1e      	addi      	r0, r3, 8
+    3542:	3204      	movi      	r2, 4
+    3544:	e3fff254 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    3548:	3307      	movi      	r3, 7
+    354a:	60f8      	addu      	r3, r14
+    354c:	b860      	st.w      	r3, (r14, 0x0)
+    354e:	1b02      	addi      	r3, r14, 8
+    3550:	320c      	movi      	r2, 12
+    3552:	6c4f      	mov      	r1, r3
+    3554:	300e      	movi      	r0, 14
+    3556:	e3ffff13 	bsr      	0x337c	// 337c <RC522_PcdComMF522>
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    355a:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_AUTHENT,ucComMF522Buf,12,ucComMF522Buf,&unLen);
+    355c:	6d03      	mov      	r4, r0
+    if((stats!= MI_OK)||(!(RC522_ReadRawRC(Status2Reg)&0x08)))stats = MI_ERR;
+    355e:	0809      	bt      	0x3570	// 3570 <RC522_PcdAuthState+0x50>
+    3560:	3008      	movi      	r0, 8
+    3562:	e3fffdd3 	bsr      	0x3108	// 3108 <RC522_ReadRawRC>
+    3566:	3308      	movi      	r3, 8
+    3568:	680c      	and      	r0, r3
+    356a:	7400      	zextb      	r0, r0
+    356c:	3840      	cmpnei      	r0, 0
+    356e:	0802      	bt      	0x3572	// 3572 <RC522_PcdAuthState+0x52>
+    3570:	3402      	movi      	r4, 2
+}
+    3572:	6c13      	mov      	r0, r4
+    3574:	1407      	addi      	r14, r14, 28
+    3576:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00003578 <RC522_PcdRequest>:
+{
+    3578:	14d3      	push      	r4-r6, r15
+    357a:	1427      	subi      	r14, r14, 28
+    357c:	6d03      	mov      	r4, r0
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    357e:	3212      	movi      	r2, 18
+{
+    3580:	6d47      	mov      	r5, r1
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    3582:	1802      	addi      	r0, r14, 8
+    3584:	3100      	movi      	r1, 0
+    3586:	e3fff1ef 	bsr      	0x1964	// 1964 <__memset_fast>
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    358a:	3108      	movi      	r1, 8
+    358c:	3008      	movi      	r0, 8
+    358e:	e3fffe30 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    3592:	3107      	movi      	r1, 7
+    3594:	300d      	movi      	r0, 13
+    3596:	e3fffdd5 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    359a:	3607      	movi      	r6, 7
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    359c:	3103      	movi      	r1, 3
+    359e:	3014      	movi      	r0, 20
+    35a0:	e3fffe0e 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    35a4:	61b8      	addu      	r6, r14
+    35a6:	1b02      	addi      	r3, r14, 8
+    35a8:	b8c0      	st.w      	r6, (r14, 0x0)
+    35aa:	3201      	movi      	r2, 1
+    35ac:	6c4f      	mov      	r1, r3
+    35ae:	300c      	movi      	r0, 12
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    35b0:	dc8e0008 	st.b      	r4, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    35b4:	e3fffee4 	bsr      	0x337c	// 337c <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    35b8:	3840      	cmpnei      	r0, 0
+    35ba:	081b      	bt      	0x35f0	// 35f0 <RC522_PcdRequest+0x78>
+    35bc:	8660      	ld.b      	r3, (r6, 0x0)
+    35be:	3b50      	cmpnei      	r3, 16
+    35c0:	0818      	bt      	0x35f0	// 35f0 <RC522_PcdRequest+0x78>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    35c2:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    35c6:	a560      	st.b      	r3, (r5, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    35c8:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    35cc:	a561      	st.b      	r3, (r5, 0x1)
+	if ((ucComMF522Buf[0] == req_code)&&(CardInfo.RC522_Reset_Falg == 0)) {
+    35ce:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    35d2:	650e      	cmpne      	r3, r4
+    35d4:	3220      	movi      	r2, 32
+    35d6:	1069      	lrw      	r3, 0x20000204	// 35f8 <RC522_PcdRequest+0x80>
+    35d8:	608c      	addu      	r2, r3
+    35da:	080d      	bt      	0x35f4	// 35f4 <RC522_PcdRequest+0x7c>
+    35dc:	8228      	ld.b      	r1, (r2, 0x8)
+    35de:	3940      	cmpnei      	r1, 0
+    35e0:	0806      	bt      	0x35ec	// 35ec <RC522_PcdRequest+0x74>
+		CardInfo.RC522_Reset_Falg = 1;
+    35e2:	3101      	movi      	r1, 1
+		CardInfo.RC522_Reset_Falg = 0;
+    35e4:	a228      	st.b      	r1, (r2, 0x8)
+		CardInfo.Reset_Tick = SysTick_1ms;
+    35e6:	1046      	lrw      	r2, 0x200000b0	// 35fc <RC522_PcdRequest+0x84>
+    35e8:	9240      	ld.w      	r2, (r2, 0x0)
+    35ea:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    35ec:	1407      	addi      	r14, r14, 28
+    35ee:	1493      	pop      	r4-r6, r15
+        stats = MI_ERR;
+    35f0:	3002      	movi      	r0, 2
+    35f2:	07ee      	br      	0x35ce	// 35ce <RC522_PcdRequest+0x56>
+		CardInfo.RC522_Reset_Falg = 0;
+    35f4:	3100      	movi      	r1, 0
+    35f6:	07f7      	br      	0x35e4	// 35e4 <RC522_PcdRequest+0x6c>
+    35f8:	20000204 	.long	0x20000204
+    35fc:	200000b0 	.long	0x200000b0
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00003600 <RC522_PcdAnticoll>:
+{
+    3600:	14d2      	push      	r4-r5, r15
+    3602:	1427      	subi      	r14, r14, 28
+    3604:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    3606:	3108      	movi      	r1, 8
+    3608:	3008      	movi      	r0, 8
+    360a:	e3fffdf2 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    360e:	3100      	movi      	r1, 0
+    3610:	300d      	movi      	r0, 13
+    3612:	e3fffd97 	bsr      	0x3140	// 3140 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    3616:	3180      	movi      	r1, 128
+    3618:	300e      	movi      	r0, 14
+    361a:	e3fffdea 	bsr      	0x31ee	// 31ee <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    361e:	3300      	movi      	r3, 0
+    3620:	2b6c      	subi      	r3, 109
+    3622:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    3626:	3320      	movi      	r3, 32
+    3628:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    362c:	3307      	movi      	r3, 7
+    362e:	60f8      	addu      	r3, r14
+    3630:	b860      	st.w      	r3, (r14, 0x0)
+    3632:	1b02      	addi      	r3, r14, 8
+    3634:	3202      	movi      	r2, 2
+    3636:	6c4f      	mov      	r1, r3
+    3638:	300c      	movi      	r0, 12
+    363a:	e3fffea1 	bsr      	0x337c	// 337c <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    363e:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    3640:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    3642:	0812      	bt      	0x3666	// 3666 <RC522_PcdAnticoll+0x66>
+    3644:	3300      	movi      	r3, 0
+    3646:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    3648:	1902      	addi      	r1, r14, 8
+    364a:	604c      	addu      	r1, r3
+    364c:	8120      	ld.b      	r1, (r1, 0x0)
+    364e:	5d0c      	addu      	r0, r5, r3
+    3650:	2300      	addi      	r3, 1
+    3652:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    3654:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    3656:	6c49      	xor      	r1, r2
+    3658:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    365a:	0bf7      	bt      	0x3648	// 3648 <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    365c:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    3660:	644e      	cmpne      	r3, r1
+    3662:	0c02      	bf      	0x3666	// 3666 <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    3664:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    3666:	3180      	movi      	r1, 128
+    3668:	300e      	movi      	r0, 14
+    366a:	e3fffda9 	bsr      	0x31bc	// 31bc <RC522_SetBitMask>
+}
+    366e:	6c13      	mov      	r0, r4
+    3670:	1407      	addi      	r14, r14, 28
+    3672:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+00003674 <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    3674:	14d2      	push      	r4-r5, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    3676:	112b      	lrw      	r1, 0x200000b0	// 3720 <Card_Read_TasK+0xac>
+    3678:	114b      	lrw      	r2, 0x200000c4	// 3724 <Card_Read_TasK+0xb0>
+    367a:	118c      	lrw      	r4, 0x20000204	// 3728 <Card_Read_TasK+0xb4>
+    367c:	9200      	ld.w      	r0, (r2, 0x0)
+    367e:	9160      	ld.w      	r3, (r1, 0x0)
+    3680:	60c2      	subu      	r3, r0
+    3682:	3063      	movi      	r0, 99
+    3684:	64c0      	cmphs      	r0, r3
+    3686:	082c      	bt      	0x36de	// 36de <Card_Read_TasK+0x6a>
+        scan_tick = SysTick_1ms;
+    3688:	9160      	ld.w      	r3, (r1, 0x0)
+		
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read");
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    368a:	3119      	movi      	r1, 25
+    368c:	6050      	addu      	r1, r4
+    368e:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    3690:	b260      	st.w      	r3, (r2, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    3692:	e3ffff73 	bsr      	0x3578	// 3578 <RC522_PcdRequest>
+    3696:	3520      	movi      	r5, 32
+    3698:	3840      	cmpnei      	r0, 0
+    369a:	6150      	addu      	r5, r4
+    369c:	0836      	bt      	0x3708	// 3708 <Card_Read_TasK+0x94>
+            CardInfo.FailNum = 0x00;
+    369e:	3300      	movi      	r3, 0
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    36a0:	1123      	lrw      	r1, 0x4797	// 372c <Card_Read_TasK+0xb8>
+            CardInfo.FailNum = 0x00;
+    36a2:	a566      	st.b      	r3, (r5, 0x6)
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    36a4:	e3fffcf8 	bsr      	0x3094	// 3094 <Dbg_Println>
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    36a8:	301b      	movi      	r0, 27
+    36aa:	6010      	addu      	r0, r4
+    36ac:	e3ffffaa 	bsr      	0x3600	// 3600 <RC522_PcdAnticoll>
+    36b0:	3840      	cmpnei      	r0, 0
+    36b2:	0829      	bt      	0x3704	// 3704 <Card_Read_TasK+0x90>
+                //选定要进行操作的卡片
+                if(RC522_PcdSelect(CardInfo.SN)==MI_OK){
+    36b4:	301b      	movi      	r0, 27
+    36b6:	6010      	addu      	r0, r4
+    36b8:	e3fffeff 	bsr      	0x34b6	// 34b6 <RC522_PcdSelect>
+    36bc:	3840      	cmpnei      	r0, 0
+    36be:	0821      	bt      	0x3700	// 3700 <Card_Read_TasK+0x8c>
+                    //验证卡片密码
+                    if(RC522_PcdAuthState(CardInfo.CardKeyType, CardInfo.BlockLoc, CardInfo.CardKey, CardInfo.SN)==MI_OK){
+    36c0:	331b      	movi      	r3, 27
+    36c2:	8428      	ld.b      	r1, (r4, 0x8)
+    36c4:	841f      	ld.b      	r0, (r4, 0x1f)
+    36c6:	60d0      	addu      	r3, r4
+    36c8:	6c97      	mov      	r2, r5
+    36ca:	e3ffff2b 	bsr      	0x3520	// 3520 <RC522_PcdAuthState>
+    36ce:	3840      	cmpnei      	r0, 0
+    36d0:	0813      	bt      	0x36f6	// 36f6 <Card_Read_TasK+0x82>
+                        //读取指定块的数据
+//                        if(RC522_PcdRead(CardInfo.BlockLoc, CardInfo.CradDataBuf)==MI_OK)
+						{
+
+                            Dbg_Println(DBG_BIT_SYS_STATUS, "Card Block %d",CardInfo.BlockLoc);
+    36d2:	8448      	ld.b      	r2, (r4, 0x8)
+    36d4:	1037      	lrw      	r1, 0x47a7	// 3730 <Card_Read_TasK+0xbc>
+    36d6:	e3fffcdf 	bsr      	0x3094	// 3094 <Dbg_Println>
+
+                            //Dbg_Print_Buff(DBG_BIT_SYS_STATUS, "Card Data",CardInfo.CradDataBuf,BLOCK_HAVE_BYTE);
+							
+							CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    36da:	3301      	movi      	r3, 1
+    36dc:	a467      	st.b      	r3, (r4, 0x7)
+                CardInfo.FailNum++;
+            }
+        }
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    36de:	8467      	ld.b      	r3, (r4, 0x7)
+    36e0:	8446      	ld.b      	r2, (r4, 0x6)
+    36e2:	64ca      	cmpne      	r2, r3
+    36e4:	0c08      	bf      	0x36f4	// 36f4 <Card_Read_TasK+0x80>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    36e6:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    36e8:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    36ea:	0805      	bt      	0x36f4	// 36f4 <Card_Read_TasK+0x80>
+            
+			Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+    36ec:	1032      	lrw      	r1, 0x47f9	// 3734 <Card_Read_TasK+0xc0>
+    36ee:	3000      	movi      	r0, 0
+    36f0:	e3fffcd2 	bsr      	0x3094	// 3094 <Dbg_Println>
+
+        }
+    }
+
+
+}
+    36f4:	1492      	pop      	r4-r5, r15
+                        Dbg_Println(DBG_BIT_SYS_STATUS, "Card Key Error");
+    36f6:	1031      	lrw      	r1, 0x47b5	// 3738 <Card_Read_TasK+0xc4>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    36f8:	3000      	movi      	r0, 0
+    36fa:	e3fffccd 	bsr      	0x3094	// 3094 <Dbg_Println>
+    36fe:	07f0      	br      	0x36de	// 36de <Card_Read_TasK+0x6a>
+                    Dbg_Println(DBG_BIT_SYS_STATUS, "Card Select Error");
+    3700:	102f      	lrw      	r1, 0x47c4	// 373c <Card_Read_TasK+0xc8>
+    3702:	07fb      	br      	0x36f8	// 36f8 <Card_Read_TasK+0x84>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    3704:	102f      	lrw      	r1, 0x47d6	// 3740 <Card_Read_TasK+0xcc>
+    3706:	07f9      	br      	0x36f8	// 36f8 <Card_Read_TasK+0x84>
+            if(CardInfo.FailNum >= 5){
+    3708:	8566      	ld.b      	r3, (r5, 0x6)
+    370a:	3b04      	cmphsi      	r3, 5
+    370c:	0c07      	bf      	0x371a	// 371a <Card_Read_TasK+0xa6>
+                CardInfo.FailNum = 0;
+    370e:	3300      	movi      	r3, 0
+    3710:	a566      	st.b      	r3, (r5, 0x6)
+				CardInfo.SuccNum = 0;
+    3712:	a567      	st.b      	r3, (r5, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    3714:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_FAILD");
+    3716:	102c      	lrw      	r1, 0x47e8	// 3744 <Card_Read_TasK+0xd0>
+    3718:	07f0      	br      	0x36f8	// 36f8 <Card_Read_TasK+0x84>
+                CardInfo.FailNum++;
+    371a:	2300      	addi      	r3, 1
+    371c:	a566      	st.b      	r3, (r5, 0x6)
+    371e:	07e0      	br      	0x36de	// 36de <Card_Read_TasK+0x6a>
+    3720:	200000b0 	.long	0x200000b0
+    3724:	200000c4 	.long	0x200000c4
+    3728:	20000204 	.long	0x20000204
+    372c:	00004797 	.long	0x00004797
+    3730:	000047a7 	.long	0x000047a7
+    3734:	000047f9 	.long	0x000047f9
+    3738:	000047b5 	.long	0x000047b5
+    373c:	000047c4 	.long	0x000047c4
+    3740:	000047d6 	.long	0x000047d6
+    3744:	000047e8 	.long	0x000047e8
+
+Disassembly of section .text.Detect_SPI_task:
+
+00003748 <Detect_SPI_task>:
+
+void Detect_SPI_task(void){
+    3748:	14d0      	push      	r15
+
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    374a:	106c      	lrw      	r3, 0x20000204	// 3778 <Detect_SPI_task+0x30>
+    374c:	3220      	movi      	r2, 32
+    374e:	608c      	addu      	r2, r3
+    3750:	8248      	ld.b      	r2, (r2, 0x8)
+    3752:	3a41      	cmpnei      	r2, 1
+    3754:	0810      	bt      	0x3774	// 3774 <Detect_SPI_task+0x2c>
+		if (SysTick_1ms - CardInfo.Reset_Tick >= 1000) {
+    3756:	102a      	lrw      	r1, 0x200000b0	// 377c <Detect_SPI_task+0x34>
+    3758:	9140      	ld.w      	r2, (r1, 0x0)
+    375a:	930b      	ld.w      	r0, (r3, 0x2c)
+    375c:	6082      	subu      	r2, r0
+    375e:	1009      	lrw      	r0, 0x3e7	// 3780 <Detect_SPI_task+0x38>
+    3760:	6480      	cmphs      	r0, r2
+    3762:	0809      	bt      	0x3774	// 3774 <Detect_SPI_task+0x2c>
+			CardInfo.Reset_Tick = SysTick_1ms;
+    3764:	9140      	ld.w      	r2, (r1, 0x0)
+    3766:	b34b      	st.w      	r2, (r3, 0x2c)
+			RC522_Reset();
+    3768:	e3fffd54 	bsr      	0x3210	// 3210 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "SPI INIT");
+    376c:	1026      	lrw      	r1, 0x4808	// 3784 <Detect_SPI_task+0x3c>
+    376e:	3000      	movi      	r0, 0
+    3770:	e3fffc92 	bsr      	0x3094	// 3094 <Dbg_Println>
+		}
+	}
+
+}
+    3774:	1490      	pop      	r15
+    3776:	0000      	bkpt
+    3778:	20000204 	.long	0x20000204
+    377c:	200000b0 	.long	0x200000b0
+    3780:	000003e7 	.long	0x000003e7
+    3784:	00004808 	.long	0x00004808
+
+Disassembly of section .text.RLY_Light_Ctrl.part.0:
+
+00003788 <RLY_Light_Ctrl.part.0>:
+	}
+}
+
+
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+    3788:	14d0      	push      	r15
+{
+	if(state == 0x01)
+	{
+		CTRL_RLY_ON;
+    378a:	1066      	lrw      	r3, 0x2000004c	// 37a0 <RLY_Light_Ctrl.part.0+0x18>
+    378c:	3100      	movi      	r1, 0
+    378e:	9300      	ld.w      	r0, (r3, 0x0)
+    3790:	e3fff381 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+        GPT0->CMPA = 0;
+    3794:	1064      	lrw      	r3, 0x20000024	// 37a4 <RLY_Light_Ctrl.part.0+0x1c>
+    3796:	3200      	movi      	r2, 0
+    3798:	9360      	ld.w      	r3, (r3, 0x0)
+    379a:	b34b      	st.w      	r2, (r3, 0x2c)
+	else if(state == 0x00)
+	{
+		CTRL_RLY_OFF;
+		Ctrl_Backlight(1);
+	}
+}
+    379c:	1490      	pop      	r15
+    379e:	0000      	bkpt
+    37a0:	2000004c 	.long	0x2000004c
+    37a4:	20000024 	.long	0x20000024
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+000037a8 <KEY1_LONG_PRESS_RELEASE_Handler>:
+
+
+U8_T LED_STATE = 0;
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    37a8:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    37aa:	1034      	lrw      	r1, 0x4811	// 37f8 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    37ac:	3000      	movi      	r0, 0
+    37ae:	e3fffc73 	bsr      	0x3094	// 3094 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    37b2:	1073      	lrw      	r3, 0x20000204	// 37fc <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    37b4:	8367      	ld.b      	r3, (r3, 0x7)
+    37b6:	3b40      	cmpnei      	r3, 0
+    37b8:	1092      	lrw      	r4, 0x2000026c	// 3800 <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    37ba:	081b      	bt      	0x37f0	// 37f0 <KEY1_LONG_PRESS_RELEASE_Handler+0x48>
+	{
+		if(READ_RLY_STATE != 0x00)
+    37bc:	1072      	lrw      	r3, 0x2000004c	// 3804 <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    37be:	3100      	movi      	r1, 0
+    37c0:	9300      	ld.w      	r0, (r3, 0x0)
+    37c2:	e3fff37f 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    37c6:	3840      	cmpnei      	r0, 0
+    37c8:	0c0a      	bf      	0x37dc	// 37dc <KEY1_LONG_PRESS_RELEASE_Handler+0x34>
+    37ca:	e3ffffdf 	bsr      	0x3788	// 3788 <RLY_Light_Ctrl.part.0>
+		{
+			RLY_Light_Ctrl(1);
+			LED_STATE = 4;
+    37ce:	106f      	lrw      	r3, 0x200000c8	// 3808 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    37d0:	3204      	movi      	r2, 4
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    37d2:	102f      	lrw      	r1, 0x482c	// 380c <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    37d4:	3000      	movi      	r0, 0
+			LED_STATE = 4;
+    37d6:	a340      	st.b      	r2, (r3, 0x0)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    37d8:	e3fffc5e 	bsr      	0x3094	// 3094 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    37dc:	106d      	lrw      	r3, 0x200000b0	// 3810 <KEY1_LONG_PRESS_RELEASE_Handler+0x68>
+    37de:	104e      	lrw      	r2, 0x2000026d	// 3814 <KEY1_LONG_PRESS_RELEASE_Handler+0x6c>
+    37e0:	9360      	ld.w      	r3, (r3, 0x0)
+    37e2:	4b28      	lsri      	r1, r3, 8
+    37e4:	a461      	st.b      	r3, (r4, 0x1)
+    37e6:	a221      	st.b      	r1, (r2, 0x1)
+    37e8:	4b30      	lsri      	r1, r3, 16
+    37ea:	4b78      	lsri      	r3, r3, 24
+    37ec:	a222      	st.b      	r1, (r2, 0x2)
+    37ee:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    37f0:	3302      	movi      	r3, 2
+    37f2:	a460      	st.b      	r3, (r4, 0x0)
+}
+    37f4:	1491      	pop      	r4, r15
+    37f6:	0000      	bkpt
+    37f8:	00004811 	.long	0x00004811
+    37fc:	20000204 	.long	0x20000204
+    3800:	2000026c 	.long	0x2000026c
+    3804:	2000004c 	.long	0x2000004c
+    3808:	200000c8 	.long	0x200000c8
+    380c:	0000482c 	.long	0x0000482c
+    3810:	200000b0 	.long	0x200000b0
+    3814:	2000026d 	.long	0x2000026d
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00003818 <RLY_Light_Ctrl>:
+{
+    3818:	14d0      	push      	r15
+	if(state == 0x01)
+    381a:	3841      	cmpnei      	r0, 1
+    381c:	0804      	bt      	0x3824	// 3824 <RLY_Light_Ctrl+0xc>
+    381e:	e3ffffb5 	bsr      	0x3788	// 3788 <RLY_Light_Ctrl.part.0>
+}
+    3822:	1490      	pop      	r15
+	else if(state == 0x00)
+    3824:	3840      	cmpnei      	r0, 0
+    3826:	0bfe      	bt      	0x3822	// 3822 <RLY_Light_Ctrl+0xa>
+		CTRL_RLY_OFF;
+    3828:	1066      	lrw      	r3, 0x2000004c	// 3840 <RLY_Light_Ctrl+0x28>
+    382a:	3100      	movi      	r1, 0
+    382c:	9300      	ld.w      	r0, (r3, 0x0)
+    382e:	e3fff32e 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        GPT0->CMPA = 2000;
+    3832:	1065      	lrw      	r3, 0x20000024	// 3844 <RLY_Light_Ctrl+0x2c>
+    3834:	9340      	ld.w      	r2, (r3, 0x0)
+    3836:	33fa      	movi      	r3, 250
+    3838:	4363      	lsli      	r3, r3, 3
+    383a:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    383c:	07f3      	br      	0x3822	// 3822 <RLY_Light_Ctrl+0xa>
+    383e:	0000      	bkpt
+    3840:	2000004c 	.long	0x2000004c
+    3844:	20000024 	.long	0x20000024
+
+Disassembly of section .text.LogicCtrl_Init:
+
+00003848 <LogicCtrl_Init>:
+{
+    3848:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    384a:	108d      	lrw      	r4, 0x20000048	// 387c <LogicCtrl_Init+0x34>
+    384c:	3200      	movi      	r2, 0
+    384e:	9400      	ld.w      	r0, (r4, 0x0)
+    3850:	3100      	movi      	r1, 0
+    3852:	e3fff29b 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	CTRL_CARD_OUT;
+    3856:	9400      	ld.w      	r0, (r4, 0x0)
+    3858:	3100      	movi      	r1, 0
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    385a:	108a      	lrw      	r4, 0x2000004c	// 3880 <LogicCtrl_Init+0x38>
+	CTRL_CARD_OUT;
+    385c:	e3fff317 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Intput);	        //LED_IN
+    3860:	3201      	movi      	r2, 1
+    3862:	9400      	ld.w      	r0, (r4, 0x0)
+    3864:	310c      	movi      	r1, 12
+    3866:	e3fff291 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	g_read.Led_state = READ_LED_IN;
+    386a:	9400      	ld.w      	r0, (r4, 0x0)
+    386c:	310c      	movi      	r1, 12
+    386e:	e3fff321 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+    3872:	1065      	lrw      	r3, 0x20000234	// 3884 <LogicCtrl_Init+0x3c>
+	g_read.last_state = g_read.Led_state;
+    3874:	a302      	st.b      	r0, (r3, 0x2)
+	g_read.Led_state = READ_LED_IN;
+    3876:	a303      	st.b      	r0, (r3, 0x3)
+}
+    3878:	1491      	pop      	r4, r15
+    387a:	0000      	bkpt
+    387c:	20000048 	.long	0x20000048
+    3880:	2000004c 	.long	0x2000004c
+    3884:	20000234 	.long	0x20000234
+
+Disassembly of section .text.Debounce_Task:
+
+00003888 <Debounce_Task>:
+void Debounce_Task(void){
+    3888:	14d1      	push      	r4, r15
+	if (SysTick_1ms - g_read.read_tick >= 10) {
+    388a:	1097      	lrw      	r4, 0x20000234	// 38e4 <Debounce_Task+0x5c>
+    388c:	8445      	ld.b      	r2, (r4, 0x5)
+    388e:	8464      	ld.b      	r3, (r4, 0x4)
+    3890:	4248      	lsli      	r2, r2, 8
+    3892:	6c8c      	or      	r2, r3
+    3894:	8466      	ld.b      	r3, (r4, 0x6)
+    3896:	4370      	lsli      	r3, r3, 16
+    3898:	6c8c      	or      	r2, r3
+    389a:	8467      	ld.b      	r3, (r4, 0x7)
+    389c:	1013      	lrw      	r0, 0x200000b0	// 38e8 <Debounce_Task+0x60>
+    389e:	4378      	lsli      	r3, r3, 24
+    38a0:	9020      	ld.w      	r1, (r0, 0x0)
+    38a2:	6cc8      	or      	r3, r2
+    38a4:	604e      	subu      	r1, r3
+    38a6:	3909      	cmphsi      	r1, 10
+    38a8:	0c17      	bf      	0x38d6	// 38d6 <Debounce_Task+0x4e>
+		g_read.read_tick = SysTick_1ms;
+    38aa:	9060      	ld.w      	r3, (r0, 0x0)
+    38ac:	4b48      	lsri      	r2, r3, 8
+    38ae:	a464      	st.b      	r3, (r4, 0x4)
+    38b0:	a445      	st.b      	r2, (r4, 0x5)
+    38b2:	4b50      	lsri      	r2, r3, 16
+    38b4:	4b78      	lsri      	r3, r3, 24
+    38b6:	a467      	st.b      	r3, (r4, 0x7)
+		g_read.read_state = READ_LED_IN;
+    38b8:	310c      	movi      	r1, 12
+    38ba:	106d      	lrw      	r3, 0x2000004c	// 38ec <Debounce_Task+0x64>
+    38bc:	9300      	ld.w      	r0, (r3, 0x0)
+		g_read.read_tick = SysTick_1ms;
+    38be:	a446      	st.b      	r2, (r4, 0x6)
+		g_read.read_state = READ_LED_IN;
+    38c0:	e3fff2f8 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+		if (g_read.read_state == g_read.last_state) {
+    38c4:	8442      	ld.b      	r2, (r4, 0x2)
+    38c6:	640a      	cmpne      	r2, r0
+		g_read.read_state = READ_LED_IN;
+    38c8:	a401      	st.b      	r0, (r4, 0x1)
+		if (g_read.read_state == g_read.last_state) {
+    38ca:	0809      	bt      	0x38dc	// 38dc <Debounce_Task+0x54>
+			if (g_read.read_count < debounce_count) {
+    38cc:	8460      	ld.b      	r3, (r4, 0x0)
+    38ce:	3b02      	cmphsi      	r3, 3
+    38d0:	0804      	bt      	0x38d8	// 38d8 <Debounce_Task+0x50>
+				g_read.read_count++;
+    38d2:	2300      	addi      	r3, 1
+    38d4:	a460      	st.b      	r3, (r4, 0x0)
+}
+    38d6:	1491      	pop      	r4, r15
+				g_read.Led_state = g_read.read_state;
+    38d8:	a443      	st.b      	r2, (r4, 0x3)
+    38da:	07fe      	br      	0x38d6	// 38d6 <Debounce_Task+0x4e>
+			g_read.read_count=0;
+    38dc:	3300      	movi      	r3, 0
+    38de:	a460      	st.b      	r3, (r4, 0x0)
+			g_read.last_state = g_read.read_state;
+    38e0:	a402      	st.b      	r0, (r4, 0x2)
+}
+    38e2:	07fa      	br      	0x38d6	// 38d6 <Debounce_Task+0x4e>
+    38e4:	20000234 	.long	0x20000234
+    38e8:	200000b0 	.long	0x200000b0
+    38ec:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+000038f0 <LogicCtrl_Task>:
+{
+    38f0:	14d2      	push      	r4-r5, r15
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 1))
+    38f2:	107e      	lrw      	r3, 0x20000204	// 3968 <LogicCtrl_Task+0x78>
+    38f4:	8347      	ld.b      	r2, (r3, 0x7)
+    38f6:	3a41      	cmpnei      	r2, 1
+    38f8:	6d0f      	mov      	r4, r3
+    38fa:	081f      	bt      	0x3938	// 3938 <LogicCtrl_Task+0x48>
+    38fc:	10bc      	lrw      	r5, 0x20000048	// 396c <LogicCtrl_Task+0x7c>
+    38fe:	3100      	movi      	r1, 0
+    3900:	9500      	ld.w      	r0, (r5, 0x0)
+    3902:	e3fff2df 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    3906:	3841      	cmpnei      	r0, 1
+    3908:	0818      	bt      	0x3938	// 3938 <LogicCtrl_Task+0x48>
+		CTRL_CARD_IN;
+    390a:	9500      	ld.w      	r0, (r5, 0x0)
+    390c:	3100      	movi      	r1, 0
+    390e:	e3fff2c2 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    3912:	9500      	ld.w      	r0, (r5, 0x0)
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    3914:	3100      	movi      	r1, 0
+    3916:	e3fff2d5 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    391a:	6c83      	mov      	r2, r0
+    391c:	1035      	lrw      	r1, 0x483e	// 3970 <LogicCtrl_Task+0x80>
+    391e:	3000      	movi      	r0, 0
+    3920:	e3fffbba 	bsr      	0x3094	// 3094 <Dbg_Println>
+	if(g_read.Led_state == 0x00)
+    3924:	1074      	lrw      	r3, 0x20000234	// 3974 <LogicCtrl_Task+0x84>
+    3926:	8363      	ld.b      	r3, (r3, 0x3)
+    3928:	3b40      	cmpnei      	r3, 0
+    392a:	0817      	bt      	0x3958	// 3958 <LogicCtrl_Task+0x68>
+        GPT0->CMPA = 2000;
+    392c:	1073      	lrw      	r3, 0x20000024	// 3978 <LogicCtrl_Task+0x88>
+    392e:	9340      	ld.w      	r2, (r3, 0x0)
+    3930:	33fa      	movi      	r3, 250
+    3932:	4363      	lsli      	r3, r3, 3
+    3934:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    3936:	1492      	pop      	r4-r5, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 0))
+    3938:	8467      	ld.b      	r3, (r4, 0x7)
+    393a:	3b40      	cmpnei      	r3, 0
+    393c:	0bf4      	bt      	0x3924	// 3924 <LogicCtrl_Task+0x34>
+    393e:	108c      	lrw      	r4, 0x20000048	// 396c <LogicCtrl_Task+0x7c>
+    3940:	3100      	movi      	r1, 0
+    3942:	9400      	ld.w      	r0, (r4, 0x0)
+    3944:	e3fff2be 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    3948:	3840      	cmpnei      	r0, 0
+    394a:	0bed      	bt      	0x3924	// 3924 <LogicCtrl_Task+0x34>
+		CTRL_CARD_OUT;
+    394c:	9400      	ld.w      	r0, (r4, 0x0)
+    394e:	3100      	movi      	r1, 0
+    3950:	e3fff29d 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    3954:	9400      	ld.w      	r0, (r4, 0x0)
+    3956:	07df      	br      	0x3914	// 3914 <LogicCtrl_Task+0x24>
+	else if(g_read.Led_state == 0x01)
+    3958:	3b41      	cmpnei      	r3, 1
+    395a:	0bee      	bt      	0x3936	// 3936 <LogicCtrl_Task+0x46>
+        GPT0->CMPA = 0;
+    395c:	1067      	lrw      	r3, 0x20000024	// 3978 <LogicCtrl_Task+0x88>
+    395e:	3200      	movi      	r2, 0
+    3960:	9360      	ld.w      	r3, (r3, 0x0)
+    3962:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    3964:	07e9      	br      	0x3936	// 3936 <LogicCtrl_Task+0x46>
+    3966:	0000      	bkpt
+    3968:	20000204 	.long	0x20000204
+    396c:	20000048 	.long	0x20000048
+    3970:	0000483e 	.long	0x0000483e
+    3974:	20000234 	.long	0x20000234
+    3978:	20000024 	.long	0x20000024
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+0000397c <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    397c:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOA0,RLY_OUT_PIN,Output);			
+    397e:	1097      	lrw      	r4, 0x2000004c	// 39d8 <LogicCtrl_NoRF_Init+0x5c>
+    3980:	3200      	movi      	r2, 0
+    3982:	9400      	ld.w      	r0, (r4, 0x0)
+    3984:	3100      	movi      	r1, 0
+    3986:	e3fff201 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	CTRL_RLY_OFF;
+    398a:	9400      	ld.w      	r0, (r4, 0x0)
+    398c:	3100      	movi      	r1, 0
+    398e:	e3fff27e 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    3992:	3209      	movi      	r2, 9
+    3994:	3100      	movi      	r1, 0
+    3996:	1012      	lrw      	r0, 0x2000026c	// 39dc <LogicCtrl_NoRF_Init+0x60>
+    3998:	e3ffefe6 	bsr      	0x1964	// 1964 <__memset_fast>
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    399c:	9400      	ld.w      	r0, (r4, 0x0)
+    399e:	3201      	movi      	r2, 1
+    39a0:	3101      	movi      	r1, 1
+    39a2:	e3fff1f3 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    39a6:	3200      	movi      	r2, 0
+    39a8:	9400      	ld.w      	r0, (r4, 0x0)
+    39aa:	310c      	movi      	r1, 12
+    39ac:	e3fff1ee 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    39b0:	9400      	ld.w      	r0, (r4, 0x0)
+    39b2:	310c      	movi      	r1, 12
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    39b4:	108b      	lrw      	r4, 0x2000023c	// 39e0 <LogicCtrl_NoRF_Init+0x64>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    39b6:	e3fff26e 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    39ba:	3301      	movi      	r3, 1
+    39bc:	6c13      	mov      	r0, r4
+    39be:	3200      	movi      	r2, 0
+    39c0:	1029      	lrw      	r1, 0x3d50	// 39e4 <LogicCtrl_NoRF_Init+0x68>
+    39c2:	e00000f5 	bsr      	0x3bac	// 3bac <button_init>
+	
+//	button_attach(&KEY1, LONG_PRESS_START, KEY1_LONG_PRESS_START_Handler);
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    39c6:	1049      	lrw      	r2, 0x37a8	// 39e8 <LogicCtrl_NoRF_Init+0x6c>
+    39c8:	3107      	movi      	r1, 7
+    39ca:	6c13      	mov      	r0, r4
+    39cc:	e000010d 	bsr      	0x3be6	// 3be6 <button_attach>
+	button_start(&KEY1);
+    39d0:	6c13      	mov      	r0, r4
+    39d2:	e000019f 	bsr      	0x3d10	// 3d10 <button_start>
+}
+    39d6:	1491      	pop      	r4, r15
+    39d8:	2000004c 	.long	0x2000004c
+    39dc:	2000026c 	.long	0x2000026c
+    39e0:	2000023c 	.long	0x2000023c
+    39e4:	00003d50 	.long	0x00003d50
+    39e8:	000037a8 	.long	0x000037a8
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+000039ec <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    39ec:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+	
+	if(SysTick_1ms - test_tick > 5)
+    39ee:	11ab      	lrw      	r5, 0x200000b0	// 3a98 <LogicCtrl_NoRF_Task+0xac>
+    39f0:	118b      	lrw      	r4, 0x200000c8	// 3a9c <LogicCtrl_NoRF_Task+0xb0>
+    39f2:	9560      	ld.w      	r3, (r5, 0x0)
+    39f4:	9441      	ld.w      	r2, (r4, 0x4)
+    39f6:	60ca      	subu      	r3, r2
+    39f8:	3b05      	cmphsi      	r3, 6
+    39fa:	0c05      	bf      	0x3a04	// 3a04 <LogicCtrl_NoRF_Task+0x18>
+	{
+		test_tick = SysTick_1ms;
+    39fc:	9560      	ld.w      	r3, (r5, 0x0)
+    39fe:	b461      	st.w      	r3, (r4, 0x4)
+		button_ticks();
+    3a00:	e000019a 	bsr      	0x3d34	// 3d34 <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    3a04:	11c7      	lrw      	r6, 0x20000204	// 3aa0 <LogicCtrl_NoRF_Task+0xb4>
+    3a06:	8667      	ld.b      	r3, (r6, 0x7)
+    3a08:	3b41      	cmpnei      	r3, 1
+    3a0a:	0833      	bt      	0x3a70	// 3a70 <LogicCtrl_NoRF_Task+0x84>
+    3a0c:	e3fffebe 	bsr      	0x3788	// 3788 <RLY_Light_Ctrl.part.0>
+	{
+		RLY_Light_Ctrl(1);
+		LED_STATE = 1;
+    3a10:	3301      	movi      	r3, 1
+    3a12:	a460      	st.b      	r3, (r4, 0x0)
+		card_tick = SysTick_1ms;
+    3a14:	9560      	ld.w      	r3, (r5, 0x0)
+    3a16:	b462      	st.w      	r3, (r4, 0x8)
+		dm_in.DM_State = 0x00;
+    3a18:	3200      	movi      	r2, 0
+    3a1a:	1163      	lrw      	r3, 0x2000026c	// 3aa4 <LogicCtrl_NoRF_Task+0xb8>
+    3a1c:	a340      	st.b      	r2, (r3, 0x0)
+		LED_STATE =2;
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card OUT RLY OFF");
+	}
+	
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    3a1e:	8667      	ld.b      	r3, (r6, 0x7)
+    3a20:	3b40      	cmpnei      	r3, 0
+    3a22:	0826      	bt      	0x3a6e	// 3a6e <LogicCtrl_NoRF_Task+0x82>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    3a24:	1160      	lrw      	r3, 0x2000026c	// 3aa4 <LogicCtrl_NoRF_Task+0xb8>
+    3a26:	8340      	ld.b      	r2, (r3, 0x0)
+    3a28:	3a42      	cmpnei      	r2, 2
+    3a2a:	0822      	bt      	0x3a6e	// 3a6e <LogicCtrl_NoRF_Task+0x82>
+    3a2c:	8322      	ld.b      	r1, (r3, 0x2)
+    3a2e:	8341      	ld.b      	r2, (r3, 0x1)
+    3a30:	4128      	lsli      	r1, r1, 8
+    3a32:	6c48      	or      	r1, r2
+    3a34:	8343      	ld.b      	r2, (r3, 0x3)
+    3a36:	4250      	lsli      	r2, r2, 16
+    3a38:	6c48      	or      	r1, r2
+    3a3a:	8344      	ld.b      	r2, (r3, 0x4)
+    3a3c:	4258      	lsli      	r2, r2, 24
+    3a3e:	6c84      	or      	r2, r1
+    3a40:	9500      	ld.w      	r0, (r5, 0x0)
+    3a42:	600a      	subu      	r0, r2
+    3a44:	1059      	lrw      	r2, 0x752f	// 3aa8 <LogicCtrl_NoRF_Task+0xbc>
+    3a46:	6408      	cmphs      	r2, r0
+    3a48:	0813      	bt      	0x3a6e	// 3a6e <LogicCtrl_NoRF_Task+0x82>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    3a4a:	9540      	ld.w      	r2, (r5, 0x0)
+    3a4c:	5b22      	addi      	r1, r3, 1
+    3a4e:	a341      	st.b      	r2, (r3, 0x1)
+    3a50:	4a68      	lsri      	r3, r2, 8
+    3a52:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    3a54:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    3a56:	4a70      	lsri      	r3, r2, 16
+    3a58:	4a58      	lsri      	r2, r2, 24
+    3a5a:	a162      	st.b      	r3, (r1, 0x2)
+    3a5c:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    3a5e:	e3fffedd 	bsr      	0x3818	// 3818 <RLY_Light_Ctrl>
+			LED_STATE = 3;
+    3a62:	3303      	movi      	r3, 3
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    3a64:	1032      	lrw      	r1, 0x4863	// 3aac <LogicCtrl_NoRF_Task+0xc0>
+    3a66:	3000      	movi      	r0, 0
+			LED_STATE = 3;
+    3a68:	a460      	st.b      	r3, (r4, 0x0)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    3a6a:	e3fffb15 	bsr      	0x3094	// 3094 <Dbg_Println>
+		}
+	}
+}
+    3a6e:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= 40000))
+    3a70:	3b40      	cmpnei      	r3, 0
+    3a72:	0bd6      	bt      	0x3a1e	// 3a1e <LogicCtrl_NoRF_Task+0x32>
+    3a74:	106c      	lrw      	r3, 0x2000026c	// 3aa4 <LogicCtrl_NoRF_Task+0xb8>
+    3a76:	8360      	ld.b      	r3, (r3, 0x0)
+    3a78:	3b40      	cmpnei      	r3, 0
+    3a7a:	0bd2      	bt      	0x3a1e	// 3a1e <LogicCtrl_NoRF_Task+0x32>
+    3a7c:	9442      	ld.w      	r2, (r4, 0x8)
+    3a7e:	9560      	ld.w      	r3, (r5, 0x0)
+    3a80:	60ca      	subu      	r3, r2
+    3a82:	104c      	lrw      	r2, 0x9c3f	// 3ab0 <LogicCtrl_NoRF_Task+0xc4>
+    3a84:	64c8      	cmphs      	r2, r3
+    3a86:	0bcc      	bt      	0x3a1e	// 3a1e <LogicCtrl_NoRF_Task+0x32>
+		card_tick = SysTick_1ms;
+    3a88:	9560      	ld.w      	r3, (r5, 0x0)
+		RLY_Light_Ctrl(0);
+    3a8a:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    3a8c:	b462      	st.w      	r3, (r4, 0x8)
+		RLY_Light_Ctrl(0);
+    3a8e:	e3fffec5 	bsr      	0x3818	// 3818 <RLY_Light_Ctrl>
+		LED_STATE =2;
+    3a92:	3302      	movi      	r3, 2
+    3a94:	a460      	st.b      	r3, (r4, 0x0)
+    3a96:	07c4      	br      	0x3a1e	// 3a1e <LogicCtrl_NoRF_Task+0x32>
+    3a98:	200000b0 	.long	0x200000b0
+    3a9c:	200000c8 	.long	0x200000c8
+    3aa0:	20000204 	.long	0x20000204
+    3aa4:	2000026c 	.long	0x2000026c
+    3aa8:	0000752f 	.long	0x0000752f
+    3aac:	00004863 	.long	0x00004863
+    3ab0:	00009c3f 	.long	0x00009c3f
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+00003ab4 <Detect_WIFI_Task>:
+//		Ctrl_Backlight(0);     //关背光
+////		Dbg_Println(DBG_BIT_SYS_STATUS, "LogicCtrl_Task Backlight OFF");
+//	}
+}
+
+void Detect_WIFI_Task(void){
+    3ab4:	14d1      	push      	r4, r15
+
+	if (finish_flag == 1) return;
+    3ab6:	107c      	lrw      	r3, 0x2000009e	// 3b24 <Detect_WIFI_Task+0x70>
+    3ab8:	8340      	ld.b      	r2, (r3, 0x0)
+    3aba:	3a41      	cmpnei      	r2, 1
+    3abc:	0c1c      	bf      	0x3af4	// 3af4 <Detect_WIFI_Task+0x40>
+	
+	if (detect_count <10) {
+    3abe:	109b      	lrw      	r4, 0x200000a4	// 3b28 <Detect_WIFI_Task+0x74>
+    3ac0:	8440      	ld.b      	r2, (r4, 0x0)
+    3ac2:	3a09      	cmphsi      	r2, 10
+    3ac4:	081c      	bt      	0x3afc	// 3afc <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    3ac6:	103a      	lrw      	r1, 0x200000b0	// 3b2c <Detect_WIFI_Task+0x78>
+    3ac8:	105a      	lrw      	r2, 0x200000a0	// 3b30 <Detect_WIFI_Task+0x7c>
+    3aca:	9160      	ld.w      	r3, (r1, 0x0)
+    3acc:	9200      	ld.w      	r0, (r2, 0x0)
+    3ace:	60c2      	subu      	r3, r0
+    3ad0:	3b09      	cmphsi      	r3, 10
+    3ad2:	0c11      	bf      	0x3af4	// 3af4 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    3ad4:	9160      	ld.w      	r3, (r1, 0x0)
+    3ad6:	b260      	st.w      	r3, (r2, 0x0)
+			
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3ad8:	3102      	movi      	r1, 2
+    3ada:	1077      	lrw      	r3, 0x20000048	// 3b34 <Detect_WIFI_Task+0x80>
+    3adc:	9300      	ld.w      	r0, (r3, 0x0)
+    3ade:	e3fff1e9 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+    3ae2:	1076      	lrw      	r3, 0x2000009c	// 3b38 <Detect_WIFI_Task+0x84>
+    3ae4:	a300      	st.b      	r0, (r3, 0x0)
+			
+			if (last_state != rf_exist) {
+    3ae6:	1076      	lrw      	r3, 0x2000009d	// 3b3c <Detect_WIFI_Task+0x88>
+    3ae8:	8340      	ld.b      	r2, (r3, 0x0)
+    3aea:	640a      	cmpne      	r2, r0
+    3aec:	0c05      	bf      	0x3af6	// 3af6 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    3aee:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    3af0:	3300      	movi      	r3, 0
+			}else {
+				detect_count++;
+    3af2:	a460      	st.b      	r3, (r4, 0x0)
+		{
+			LogicCtrl_Init();   
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+		}
+	}
+}
+    3af4:	1491      	pop      	r4, r15
+				detect_count++;
+    3af6:	8460      	ld.b      	r3, (r4, 0x0)
+    3af8:	2300      	addi      	r3, 1
+    3afa:	07fc      	br      	0x3af2	// 3af2 <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    3afc:	3201      	movi      	r2, 1
+    3afe:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    3b00:	106e      	lrw      	r3, 0x2000009c	// 3b38 <Detect_WIFI_Task+0x84>
+    3b02:	8360      	ld.b      	r3, (r3, 0x0)
+    3b04:	3b41      	cmpnei      	r3, 1
+    3b06:	0808      	bt      	0x3b16	// 3b16 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    3b08:	e3ffff3a 	bsr      	0x397c	// 397c <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    3b0c:	102d      	lrw      	r1, 0x4874	// 3b40 <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    3b0e:	3000      	movi      	r0, 0
+    3b10:	e3fffac2 	bsr      	0x3094	// 3094 <Dbg_Println>
+    3b14:	07f0      	br      	0x3af4	// 3af4 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    3b16:	3b40      	cmpnei      	r3, 0
+    3b18:	0bee      	bt      	0x3af4	// 3af4 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    3b1a:	e3fffe97 	bsr      	0x3848	// 3848 <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    3b1e:	102a      	lrw      	r1, 0x4876	// 3b44 <Detect_WIFI_Task+0x90>
+    3b20:	07f7      	br      	0x3b0e	// 3b0e <Detect_WIFI_Task+0x5a>
+    3b22:	0000      	bkpt
+    3b24:	2000009e 	.long	0x2000009e
+    3b28:	200000a4 	.long	0x200000a4
+    3b2c:	200000b0 	.long	0x200000b0
+    3b30:	200000a0 	.long	0x200000a0
+    3b34:	20000048 	.long	0x20000048
+    3b38:	2000009c 	.long	0x2000009c
+    3b3c:	2000009d 	.long	0x2000009d
+    3b40:	00004874 	.long	0x00004874
+    3b44:	00004876 	.long	0x00004876
+
+Disassembly of section .text.DM_Led_Task:
+
+00003b48 <DM_Led_Task>:
+
+void DM_Led_Task(void){
+    3b48:	14d1      	push      	r4, r15
+//		}
+//	}else {
+//		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+//	}
+
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    3b4a:	1074      	lrw      	r3, 0x20000224	// 3b98 <DM_Led_Task+0x50>
+    3b4c:	8368      	ld.b      	r3, (r3, 0x8)
+    3b4e:	3b41      	cmpnei      	r3, 1
+    3b50:	1073      	lrw      	r3, 0x2000026c	// 3b9c <DM_Led_Task+0x54>
+		if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) {
+    3b52:	8326      	ld.b      	r1, (r3, 0x6)
+    3b54:	8345      	ld.b      	r2, (r3, 0x5)
+    3b56:	4128      	lsli      	r1, r1, 8
+    3b58:	6c48      	or      	r1, r2
+    3b5a:	8347      	ld.b      	r2, (r3, 0x7)
+    3b5c:	4250      	lsli      	r2, r2, 16
+    3b5e:	6c48      	or      	r1, r2
+    3b60:	8348      	ld.b      	r2, (r3, 0x8)
+    3b62:	1010      	lrw      	r0, 0x200000b0	// 3ba0 <DM_Led_Task+0x58>
+    3b64:	4258      	lsli      	r2, r2, 24
+    3b66:	9080      	ld.w      	r4, (r0, 0x0)
+    3b68:	6c84      	or      	r2, r1
+    3b6a:	610a      	subu      	r4, r2
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    3b6c:	0813      	bt      	0x3b92	// 3b92 <DM_Led_Task+0x4a>
+		if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) {
+    3b6e:	3263      	movi      	r2, 99
+			dm_in.DM_Led_Tick = SysTick_1ms;
+			GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+		}
+	}else {
+		if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) {
+    3b70:	6508      	cmphs      	r2, r4
+    3b72:	080f      	bt      	0x3b90	// 3b90 <DM_Led_Task+0x48>
+			dm_in.DM_Led_Tick = SysTick_1ms;
+    3b74:	9040      	ld.w      	r2, (r0, 0x0)
+    3b76:	5b32      	addi      	r1, r3, 5
+    3b78:	a345      	st.b      	r2, (r3, 0x5)
+    3b7a:	4a68      	lsri      	r3, r2, 8
+    3b7c:	a161      	st.b      	r3, (r1, 0x1)
+    3b7e:	4a70      	lsri      	r3, r2, 16
+    3b80:	a162      	st.b      	r3, (r1, 0x2)
+    3b82:	4a58      	lsri      	r2, r2, 24
+			GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+    3b84:	1068      	lrw      	r3, 0x2000004c	// 3ba4 <DM_Led_Task+0x5c>
+    3b86:	9300      	ld.w      	r0, (r3, 0x0)
+			dm_in.DM_Led_Tick = SysTick_1ms;
+    3b88:	a143      	st.b      	r2, (r1, 0x3)
+			GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+    3b8a:	310c      	movi      	r1, 12
+    3b8c:	e3fff187 	bsr      	0x1e9a	// 1e9a <GPIO_Reverse>
+		}
+	}
+    3b90:	1491      	pop      	r4, r15
+		if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) {
+    3b92:	1046      	lrw      	r2, 0x1f3	// 3ba8 <DM_Led_Task+0x60>
+    3b94:	07ee      	br      	0x3b70	// 3b70 <DM_Led_Task+0x28>
+    3b96:	0000      	bkpt
+    3b98:	20000224 	.long	0x20000224
+    3b9c:	2000026c 	.long	0x2000026c
+    3ba0:	200000b0 	.long	0x200000b0
+    3ba4:	2000004c 	.long	0x2000004c
+    3ba8:	000001f3 	.long	0x000001f3
+
+Disassembly of section .text.button_init:
+
+00003bac <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    3bac:	14d4      	push      	r4-r7, r15
+    3bae:	6dc7      	mov      	r7, r1
+    3bb0:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    3bb2:	3100      	movi      	r1, 0
+    3bb4:	3230      	movi      	r2, 48
+{
+    3bb6:	6d03      	mov      	r4, r0
+    3bb8:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    3bba:	e3ffeed5 	bsr      	0x1964	// 1964 <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    3bbe:	3300      	movi      	r3, 0
+    3bc0:	2b6f      	subi      	r3, 112
+    3bc2:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    3bc4:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    3bc6:	6c17      	mov      	r0, r5
+    3bc8:	7bdd      	jsr      	r7
+    3bca:	8443      	ld.b      	r2, (r4, 0x3)
+    3bcc:	337f      	movi      	r3, 127
+    3bce:	688c      	and      	r2, r3
+    3bd0:	4007      	lsli      	r0, r0, 7
+    3bd2:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    3bd4:	3201      	movi      	r2, 1
+    3bd6:	6988      	and      	r6, r2
+    3bd8:	7480      	zextb      	r2, r0
+    3bda:	46c6      	lsli      	r6, r6, 6
+    3bdc:	3a86      	bclri      	r2, 6
+    3bde:	6c98      	or      	r2, r6
+    3be0:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    3be2:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    3be4:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+00003be6 <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    3be6:	2102      	addi      	r1, 3
+    3be8:	4122      	lsli      	r1, r1, 2
+    3bea:	6040      	addu      	r1, r0
+    3bec:	b140      	st.w      	r2, (r1, 0x0)
+}
+    3bee:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00003bf0 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    3bf0:	14d3      	push      	r4-r6, r15
+    3bf2:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    3bf4:	9462      	ld.w      	r3, (r4, 0x8)
+    3bf6:	8004      	ld.b      	r0, (r0, 0x4)
+    3bf8:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    3bfa:	8463      	ld.b      	r3, (r4, 0x3)
+    3bfc:	433d      	lsli      	r1, r3, 29
+    3bfe:	493d      	lsri      	r1, r1, 29
+    3c00:	3940      	cmpnei      	r1, 0
+    3c02:	0c04      	bf      	0x3c0a	// 3c0a <button_handler+0x1a>
+    3c04:	8c40      	ld.h      	r2, (r4, 0x0)
+    3c06:	2200      	addi      	r2, 1
+    3c08:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    3c0a:	4b47      	lsri      	r2, r3, 7
+    3c0c:	640a      	cmpne      	r2, r0
+    3c0e:	0c21      	bf      	0x3c50	// 3c50 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    3c10:	435a      	lsli      	r2, r3, 26
+    3c12:	4a5d      	lsri      	r2, r2, 29
+    3c14:	3507      	movi      	r5, 7
+    3c16:	2200      	addi      	r2, 1
+    3c18:	6894      	and      	r2, r5
+    3c1a:	7488      	zextb      	r2, r2
+    3c1c:	6948      	and      	r5, r2
+    3c1e:	45c3      	lsli      	r6, r5, 3
+    3c20:	3538      	movi      	r5, 56
+    3c22:	68d5      	andn      	r3, r5
+    3c24:	6d8c      	or      	r6, r3
+    3c26:	3a02      	cmphsi      	r2, 3
+    3c28:	a4c3      	st.b      	r6, (r4, 0x3)
+    3c2a:	0c09      	bf      	0x3c3c	// 3c3c <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    3c2c:	4067      	lsli      	r3, r0, 7
+    3c2e:	327f      	movi      	r2, 127
+    3c30:	8403      	ld.b      	r0, (r4, 0x3)
+    3c32:	6808      	and      	r0, r2
+    3c34:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    3c36:	7400      	zextb      	r0, r0
+    3c38:	6815      	andn      	r0, r5
+    3c3a:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    3c3c:	3941      	cmpnei      	r1, 1
+    3c3e:	0c2f      	bf      	0x3c9c	// 3c9c <button_handler+0xac>
+    3c40:	3940      	cmpnei      	r1, 0
+    3c42:	0c0b      	bf      	0x3c58	// 3c58 <button_handler+0x68>
+    3c44:	3945      	cmpnei      	r1, 5
+    3c46:	0c53      	bf      	0x3cec	// 3cec <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    3c48:	8463      	ld.b      	r3, (r4, 0x3)
+    3c4a:	3207      	movi      	r2, 7
+    3c4c:	68c9      	andn      	r3, r2
+    3c4e:	0420      	br      	0x3c8e	// 3c8e <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    3c50:	3238      	movi      	r2, 56
+    3c52:	68c9      	andn      	r3, r2
+    3c54:	a463      	st.b      	r3, (r4, 0x3)
+    3c56:	07f3      	br      	0x3c3c	// 3c3c <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    3c58:	8463      	ld.b      	r3, (r4, 0x3)
+    3c5a:	4359      	lsli      	r2, r3, 25
+    3c5c:	4a5f      	lsri      	r2, r2, 31
+    3c5e:	4b67      	lsri      	r3, r3, 7
+    3c60:	648e      	cmpne      	r3, r2
+    3c62:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    3c64:	320f      	movi      	r2, 15
+    3c66:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    3c68:	0815      	bt      	0x3c92	// 3c92 <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    3c6a:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    3c6c:	9463      	ld.w      	r3, (r4, 0xc)
+    3c6e:	3b40      	cmpnei      	r3, 0
+    3c70:	0c03      	bf      	0x3c76	// 3c76 <button_handler+0x86>
+    3c72:	6c13      	mov      	r0, r4
+    3c74:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    3c76:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    3c78:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    3c7a:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    3c7c:	330f      	movi      	r3, 15
+    3c7e:	688d      	andn      	r2, r3
+    3c80:	3101      	movi      	r1, 1
+    3c82:	6c84      	or      	r2, r1
+    3c84:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    3c86:	8463      	ld.b      	r3, (r4, 0x3)
+    3c88:	3207      	movi      	r2, 7
+    3c8a:	68c9      	andn      	r3, r2
+    3c8c:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    3c8e:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    3c90:	0405      	br      	0x3c9a	// 3c9a <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    3c92:	3200      	movi      	r2, 0
+    3c94:	2a6f      	subi      	r2, 112
+    3c96:	6cc8      	or      	r3, r2
+    3c98:	a462      	st.b      	r3, (r4, 0x2)
+}
+    3c9a:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    3c9c:	8463      	ld.b      	r3, (r4, 0x3)
+    3c9e:	4359      	lsli      	r2, r3, 25
+    3ca0:	4a5f      	lsri      	r2, r2, 31
+    3ca2:	4b67      	lsri      	r3, r3, 7
+    3ca4:	648e      	cmpne      	r3, r2
+    3ca6:	0c0e      	bf      	0x3cc2	// 3cc2 <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    3ca8:	8462      	ld.b      	r3, (r4, 0x2)
+    3caa:	320f      	movi      	r2, 15
+    3cac:	68c8      	and      	r3, r2
+    3cae:	3ba4      	bseti      	r3, 4
+    3cb0:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    3cb2:	9464      	ld.w      	r3, (r4, 0x10)
+    3cb4:	3b40      	cmpnei      	r3, 0
+    3cb6:	0c03      	bf      	0x3cbc	// 3cbc <button_handler+0xcc>
+    3cb8:	6c13      	mov      	r0, r4
+    3cba:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    3cbc:	3300      	movi      	r3, 0
+    3cbe:	ac60      	st.h      	r3, (r4, 0x0)
+    3cc0:	07c4      	br      	0x3c48	// 3c48 <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    3cc2:	8c40      	ld.h      	r2, (r4, 0x0)
+    3cc4:	33c8      	movi      	r3, 200
+    3cc6:	648c      	cmphs      	r3, r2
+    3cc8:	0be9      	bt      	0x3c9a	// 3c9a <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    3cca:	8462      	ld.b      	r3, (r4, 0x2)
+    3ccc:	320f      	movi      	r2, 15
+    3cce:	68c8      	and      	r3, r2
+    3cd0:	3ba4      	bseti      	r3, 4
+    3cd2:	3ba6      	bseti      	r3, 6
+    3cd4:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    3cd6:	9468      	ld.w      	r3, (r4, 0x20)
+    3cd8:	3b40      	cmpnei      	r3, 0
+    3cda:	0c03      	bf      	0x3ce0	// 3ce0 <button_handler+0xf0>
+    3cdc:	6c13      	mov      	r0, r4
+    3cde:	7bcd      	jsr      	r3
+			handle->state = 5;
+    3ce0:	8463      	ld.b      	r3, (r4, 0x3)
+    3ce2:	3207      	movi      	r2, 7
+    3ce4:	68c9      	andn      	r3, r2
+    3ce6:	3ba0      	bseti      	r3, 0
+    3ce8:	3ba2      	bseti      	r3, 2
+    3cea:	07d2      	br      	0x3c8e	// 3c8e <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    3cec:	8463      	ld.b      	r3, (r4, 0x3)
+    3cee:	4359      	lsli      	r2, r3, 25
+    3cf0:	4a5f      	lsri      	r2, r2, 31
+    3cf2:	4b67      	lsri      	r3, r3, 7
+    3cf4:	648e      	cmpne      	r3, r2
+    3cf6:	0fd2      	bf      	0x3c9a	// 3c9a <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    3cf8:	8462      	ld.b      	r3, (r4, 0x2)
+    3cfa:	320f      	movi      	r2, 15
+    3cfc:	68c8      	and      	r3, r2
+    3cfe:	3270      	movi      	r2, 112
+    3d00:	6cc8      	or      	r3, r2
+    3d02:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    3d04:	946a      	ld.w      	r3, (r4, 0x28)
+    3d06:	3b40      	cmpnei      	r3, 0
+    3d08:	0fa0      	bf      	0x3c48	// 3c48 <button_handler+0x58>
+    3d0a:	6c13      	mov      	r0, r4
+    3d0c:	7bcd      	jsr      	r3
+    3d0e:	079d      	br      	0x3c48	// 3c48 <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00003d10 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    3d10:	1068      	lrw      	r3, 0x200000d4	// 3d30 <button_start+0x20>
+    3d12:	9320      	ld.w      	r1, (r3, 0x0)
+    3d14:	6c87      	mov      	r2, r1
+	while(target) {
+    3d16:	3a40      	cmpnei      	r2, 0
+    3d18:	0805      	bt      	0x3d22	// 3d22 <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    3d1a:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    3d1c:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    3d1e:	3000      	movi      	r0, 0
+}
+    3d20:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    3d22:	640a      	cmpne      	r2, r0
+    3d24:	0c03      	bf      	0x3d2a	// 3d2a <button_start+0x1a>
+		target = target->next;
+    3d26:	924b      	ld.w      	r2, (r2, 0x2c)
+    3d28:	07f7      	br      	0x3d16	// 3d16 <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    3d2a:	3000      	movi      	r0, 0
+    3d2c:	2800      	subi      	r0, 1
+    3d2e:	07f9      	br      	0x3d20	// 3d20 <button_start+0x10>
+    3d30:	200000d4 	.long	0x200000d4
+
+Disassembly of section .text.button_ticks:
+
+00003d34 <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    3d34:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    3d36:	1066      	lrw      	r3, 0x200000d4	// 3d4c <button_ticks+0x18>
+    3d38:	9380      	ld.w      	r4, (r3, 0x0)
+    3d3a:	3c40      	cmpnei      	r4, 0
+    3d3c:	0802      	bt      	0x3d40	// 3d40 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    3d3e:	1491      	pop      	r4, r15
+		button_handler(target);
+    3d40:	6c13      	mov      	r0, r4
+    3d42:	e3ffff57 	bsr      	0x3bf0	// 3bf0 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    3d46:	948b      	ld.w      	r4, (r4, 0x2c)
+    3d48:	07f9      	br      	0x3d3a	// 3d3a <button_ticks+0x6>
+    3d4a:	0000      	bkpt
+    3d4c:	200000d4 	.long	0x200000d4
+
+Disassembly of section .text.read_button_GPIO:
+
+00003d50 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    3d50:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    3d52:	1064      	lrw      	r3, 0x2000004c	// 3d60 <read_button_GPIO+0x10>
+{
+    3d54:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    3d56:	9300      	ld.w      	r0, (r3, 0x0)
+    3d58:	e3fff0ac 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+	return state;
+    3d5c:	1490      	pop      	r15
+    3d5e:	0000      	bkpt
+    3d60:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+00003d64 <TK_Sampling_prog>:
+    3d64:	14c4      	push      	r4-r7
+    3d66:	1072      	lrw      	r3, 0x20000054	// 3dac <TK_Sampling_prog+0x48>
+    3d68:	1012      	lrw      	r0, 0x2000051e	// 3db0 <TK_Sampling_prog+0x4c>
+    3d6a:	1093      	lrw      	r4, 0x2000038f	// 3db4 <TK_Sampling_prog+0x50>
+    3d6c:	6d83      	mov      	r6, r0
+    3d6e:	93a0      	ld.w      	r5, (r3, 0x0)
+    3d70:	3300      	movi      	r3, 0
+    3d72:	4342      	lsli      	r2, r3, 2
+    3d74:	6094      	addu      	r2, r5
+    3d76:	9220      	ld.w      	r1, (r2, 0x0)
+    3d78:	4341      	lsli      	r2, r3, 1
+    3d7a:	6080      	addu      	r2, r0
+    3d7c:	7445      	zexth      	r1, r1
+    3d7e:	aa20      	st.h      	r1, (r2, 0x0)
+    3d80:	8440      	ld.b      	r2, (r4, 0x0)
+    3d82:	3a41      	cmpnei      	r2, 1
+    3d84:	080f      	bt      	0x3da2	// 3da2 <TK_Sampling_prog+0x3e>
+    3d86:	3300      	movi      	r3, 0
+    3d88:	10ec      	lrw      	r7, 0x20000278	// 3db8 <TK_Sampling_prog+0x54>
+    3d8a:	4341      	lsli      	r2, r3, 1
+    3d8c:	5e28      	addu      	r1, r6, r2
+    3d8e:	8920      	ld.h      	r1, (r1, 0x0)
+    3d90:	2300      	addi      	r3, 1
+    3d92:	7445      	zexth      	r1, r1
+    3d94:	609c      	addu      	r2, r7
+    3d96:	3b51      	cmpnei      	r3, 17
+    3d98:	aa20      	st.h      	r1, (r2, 0x0)
+    3d9a:	0bf8      	bt      	0x3d8a	// 3d8a <TK_Sampling_prog+0x26>
+    3d9c:	3300      	movi      	r3, 0
+    3d9e:	a460      	st.b      	r3, (r4, 0x0)
+    3da0:	3311      	movi      	r3, 17
+    3da2:	2300      	addi      	r3, 1
+    3da4:	74cc      	zextb      	r3, r3
+    3da6:	3b10      	cmphsi      	r3, 17
+    3da8:	0fe5      	bf      	0x3d72	// 3d72 <TK_Sampling_prog+0xe>
+    3daa:	1484      	pop      	r4-r7
+    3dac:	20000054 	.long	0x20000054
+    3db0:	2000051e 	.long	0x2000051e
+    3db4:	2000038f 	.long	0x2000038f
+    3db8:	20000278 	.long	0x20000278
+
+Disassembly of section .text.TKEYIntHandler:
+
+00003dbc <TKEYIntHandler>:
+    3dbc:	1460      	nie
+    3dbe:	1462      	ipush
+    3dc0:	14d1      	push      	r4, r15
+    3dc2:	109e      	lrw      	r4, 0x20000068	// 3e38 <TKEYIntHandler+0x7c>
+    3dc4:	9460      	ld.w      	r3, (r4, 0x0)
+    3dc6:	3b40      	cmpnei      	r3, 0
+    3dc8:	080b      	bt      	0x3dde	// 3dde <TKEYIntHandler+0x22>
+    3dca:	3301      	movi      	r3, 1
+    3dcc:	b460      	st.w      	r3, (r4, 0x0)
+    3dce:	107c      	lrw      	r3, 0x2000030c	// 3e3c <TKEYIntHandler+0x80>
+    3dd0:	8360      	ld.b      	r3, (r3, 0x0)
+    3dd2:	3b41      	cmpnei      	r3, 1
+    3dd4:	0805      	bt      	0x3dde	// 3dde <TKEYIntHandler+0x22>
+    3dd6:	e3ffffc7 	bsr      	0x3d64	// 3d64 <TK_Sampling_prog>
+    3dda:	3301      	movi      	r3, 1
+    3ddc:	a464      	st.b      	r3, (r4, 0x4)
+    3dde:	1079      	lrw      	r3, 0x20000058	// 3e40 <TKEYIntHandler+0x84>
+    3de0:	3101      	movi      	r1, 1
+    3de2:	9360      	ld.w      	r3, (r3, 0x0)
+    3de4:	934a      	ld.w      	r2, (r3, 0x28)
+    3de6:	6884      	and      	r2, r1
+    3de8:	3a40      	cmpnei      	r2, 0
+    3dea:	0c02      	bf      	0x3dee	// 3dee <TKEYIntHandler+0x32>
+    3dec:	b32c      	st.w      	r1, (r3, 0x30)
+    3dee:	934a      	ld.w      	r2, (r3, 0x28)
+    3df0:	3102      	movi      	r1, 2
+    3df2:	6884      	and      	r2, r1
+    3df4:	3a40      	cmpnei      	r2, 0
+    3df6:	0c02      	bf      	0x3dfa	// 3dfa <TKEYIntHandler+0x3e>
+    3df8:	b32c      	st.w      	r1, (r3, 0x30)
+    3dfa:	934a      	ld.w      	r2, (r3, 0x28)
+    3dfc:	3104      	movi      	r1, 4
+    3dfe:	6884      	and      	r2, r1
+    3e00:	3a40      	cmpnei      	r2, 0
+    3e02:	0c02      	bf      	0x3e06	// 3e06 <TKEYIntHandler+0x4a>
+    3e04:	b32c      	st.w      	r1, (r3, 0x30)
+    3e06:	934a      	ld.w      	r2, (r3, 0x28)
+    3e08:	3108      	movi      	r1, 8
+    3e0a:	6884      	and      	r2, r1
+    3e0c:	3a40      	cmpnei      	r2, 0
+    3e0e:	0c02      	bf      	0x3e12	// 3e12 <TKEYIntHandler+0x56>
+    3e10:	b32c      	st.w      	r1, (r3, 0x30)
+    3e12:	934a      	ld.w      	r2, (r3, 0x28)
+    3e14:	3110      	movi      	r1, 16
+    3e16:	6884      	and      	r2, r1
+    3e18:	3a40      	cmpnei      	r2, 0
+    3e1a:	0c02      	bf      	0x3e1e	// 3e1e <TKEYIntHandler+0x62>
+    3e1c:	b32c      	st.w      	r1, (r3, 0x30)
+    3e1e:	934a      	ld.w      	r2, (r3, 0x28)
+    3e20:	3120      	movi      	r1, 32
+    3e22:	6884      	and      	r2, r1
+    3e24:	3a40      	cmpnei      	r2, 0
+    3e26:	0c02      	bf      	0x3e2a	// 3e2a <TKEYIntHandler+0x6e>
+    3e28:	b32c      	st.w      	r1, (r3, 0x30)
+    3e2a:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3e2e:	9880      	ld.w      	r4, (r14, 0x0)
+    3e30:	1402      	addi      	r14, r14, 8
+    3e32:	1463      	ipop
+    3e34:	1461      	nir
+    3e36:	0000      	bkpt
+    3e38:	20000068 	.long	0x20000068
+    3e3c:	2000030c 	.long	0x2000030c
+    3e40:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+00003e44 <get_key_number>:
+    3e44:	14c2      	push      	r4-r5
+    3e46:	3200      	movi      	r2, 0
+    3e48:	3000      	movi      	r0, 0
+    3e4a:	1088      	lrw      	r4, 0x200003ac	// 3e68 <get_key_number+0x24>
+    3e4c:	3501      	movi      	r5, 1
+    3e4e:	3120      	movi      	r1, 32
+    3e50:	9460      	ld.w      	r3, (r4, 0x0)
+    3e52:	70c9      	lsr      	r3, r2
+    3e54:	68d4      	and      	r3, r5
+    3e56:	3b40      	cmpnei      	r3, 0
+    3e58:	0c02      	bf      	0x3e5c	// 3e5c <get_key_number+0x18>
+    3e5a:	2000      	addi      	r0, 1
+    3e5c:	2200      	addi      	r2, 1
+    3e5e:	644a      	cmpne      	r2, r1
+    3e60:	0bf8      	bt      	0x3e50	// 3e50 <get_key_number+0xc>
+    3e62:	7400      	zextb      	r0, r0
+    3e64:	1482      	pop      	r4-r5
+    3e66:	0000      	bkpt
+    3e68:	200003ac 	.long	0x200003ac
+
+Disassembly of section .text.TK_Scan_Start:
+
+00003e6c <TK_Scan_Start>:
+    3e6c:	1046      	lrw      	r2, 0x20000068	// 3e84 <TK_Scan_Start+0x18>
+    3e6e:	8264      	ld.b      	r3, (r2, 0x4)
+    3e70:	74cc      	zextb      	r3, r3
+    3e72:	3b41      	cmpnei      	r3, 1
+    3e74:	0807      	bt      	0x3e82	// 3e82 <TK_Scan_Start+0x16>
+    3e76:	1025      	lrw      	r1, 0x20000058	// 3e88 <TK_Scan_Start+0x1c>
+    3e78:	9120      	ld.w      	r1, (r1, 0x0)
+    3e7a:	b162      	st.w      	r3, (r1, 0x8)
+    3e7c:	3300      	movi      	r3, 0
+    3e7e:	b260      	st.w      	r3, (r2, 0x0)
+    3e80:	a264      	st.b      	r3, (r2, 0x4)
+    3e82:	783c      	jmp      	r15
+    3e84:	20000068 	.long	0x20000068
+    3e88:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+00003e8c <TK_Keymap_prog>:
+    3e8c:	14d4      	push      	r4-r7, r15
+    3e8e:	1425      	subi      	r14, r14, 20
+    3e90:	1271      	lrw      	r3, 0x20000104	// 3fd4 <TK_Keymap_prog+0x148>
+    3e92:	8360      	ld.b      	r3, (r3, 0x0)
+    3e94:	b860      	st.w      	r3, (r14, 0x0)
+    3e96:	3400      	movi      	r4, 0
+    3e98:	1270      	lrw      	r3, 0x200000d8	// 3fd8 <TK_Keymap_prog+0x14c>
+    3e9a:	8360      	ld.b      	r3, (r3, 0x0)
+    3e9c:	b861      	st.w      	r3, (r14, 0x4)
+    3e9e:	12f0      	lrw      	r7, 0x20000322	// 3fdc <TK_Keymap_prog+0x150>
+    3ea0:	1270      	lrw      	r3, 0x200000e1	// 3fe0 <TK_Keymap_prog+0x154>
+    3ea2:	83a0      	ld.b      	r5, (r3, 0x0)
+    3ea4:	1270      	lrw      	r3, 0x200000e0	// 3fe4 <TK_Keymap_prog+0x158>
+    3ea6:	8360      	ld.b      	r3, (r3, 0x0)
+    3ea8:	b862      	st.w      	r3, (r14, 0x8)
+    3eaa:	6d9f      	mov      	r6, r7
+    3eac:	126f      	lrw      	r3, 0x2000051e	// 3fe8 <TK_Keymap_prog+0x15c>
+    3eae:	b863      	st.w      	r3, (r14, 0xc)
+    3eb0:	4461      	lsli      	r3, r4, 1
+    3eb2:	9843      	ld.w      	r2, (r14, 0xc)
+    3eb4:	608c      	addu      	r2, r3
+    3eb6:	122e      	lrw      	r1, 0x20000278	// 3fec <TK_Keymap_prog+0x160>
+    3eb8:	604c      	addu      	r1, r3
+    3eba:	8a40      	ld.h      	r2, (r2, 0x0)
+    3ebc:	8920      	ld.h      	r1, (r1, 0x0)
+    3ebe:	6086      	subu      	r2, r1
+    3ec0:	748b      	sexth      	r2, r2
+    3ec2:	5f2c      	addu      	r1, r7, r3
+    3ec4:	a940      	st.h      	r2, (r1, 0x0)
+    3ec6:	8940      	ld.h      	r2, (r1, 0x0)
+    3ec8:	748b      	sexth      	r2, r2
+    3eca:	3adf      	btsti      	r2, 31
+    3ecc:	1249      	lrw      	r2, 0x200004da	// 3ff0 <TK_Keymap_prog+0x164>
+    3ece:	608c      	addu      	r2, r3
+    3ed0:	0c37      	bf      	0x3f3e	// 3f3e <TK_Keymap_prog+0xb2>
+    3ed2:	3100      	movi      	r1, 0
+    3ed4:	aa20      	st.h      	r1, (r2, 0x0)
+    3ed6:	9840      	ld.w      	r2, (r14, 0x0)
+    3ed8:	3a01      	cmphsi      	r2, 2
+    3eda:	0c6d      	bf      	0x3fb4	// 3fb4 <TK_Keymap_prog+0x128>
+    3edc:	4461      	lsli      	r3, r4, 1
+    3ede:	5e2c      	addu      	r1, r6, r3
+    3ee0:	1205      	lrw      	r0, 0x20000132	// 3ff4 <TK_Keymap_prog+0x168>
+    3ee2:	8940      	ld.h      	r2, (r1, 0x0)
+    3ee4:	60c0      	addu      	r3, r0
+    3ee6:	748b      	sexth      	r2, r2
+    3ee8:	8b60      	ld.h      	r3, (r3, 0x0)
+    3eea:	648d      	cmplt      	r3, r2
+    3eec:	9840      	ld.w      	r2, (r14, 0x0)
+    3eee:	7cc8      	mult      	r3, r2
+    3ef0:	0c2a      	bf      	0x3f44	// 3f44 <TK_Keymap_prog+0xb8>
+    3ef2:	8940      	ld.h      	r2, (r1, 0x0)
+    3ef4:	748b      	sexth      	r2, r2
+    3ef6:	64c9      	cmplt      	r2, r3
+    3ef8:	0c26      	bf      	0x3f44	// 3f44 <TK_Keymap_prog+0xb8>
+    3efa:	1240      	lrw      	r2, 0x20000310	// 3ff8 <TK_Keymap_prog+0x16c>
+    3efc:	6090      	addu      	r2, r4
+    3efe:	8260      	ld.b      	r3, (r2, 0x0)
+    3f00:	2300      	addi      	r3, 1
+    3f02:	74cc      	zextb      	r3, r3
+    3f04:	a260      	st.b      	r3, (r2, 0x0)
+    3f06:	3100      	movi      	r1, 0
+    3f08:	117d      	lrw      	r3, 0x200002f6	// 3ffc <TK_Keymap_prog+0x170>
+    3f0a:	60d0      	addu      	r3, r4
+    3f0c:	a320      	st.b      	r1, (r3, 0x0)
+    3f0e:	117d      	lrw      	r3, 0x200003d2	// 4000 <TK_Keymap_prog+0x174>
+    3f10:	60d0      	addu      	r3, r4
+    3f12:	a320      	st.b      	r1, (r3, 0x0)
+    3f14:	117c      	lrw      	r3, 0x2000044c	// 4004 <TK_Keymap_prog+0x178>
+    3f16:	60d0      	addu      	r3, r4
+    3f18:	a320      	st.b      	r1, (r3, 0x0)
+    3f1a:	8260      	ld.b      	r3, (r2, 0x0)
+    3f1c:	9821      	ld.w      	r1, (r14, 0x4)
+    3f1e:	64c4      	cmphs      	r1, r3
+    3f20:	081f      	bt      	0x3f5e	// 3f5e <TK_Keymap_prog+0xd2>
+    3f22:	3d40      	cmpnei      	r5, 0
+    3f24:	0852      	bt      	0x3fc8	// 3fc8 <TK_Keymap_prog+0x13c>
+    3f26:	1139      	lrw      	r1, 0x20000308	// 4008 <TK_Keymap_prog+0x17c>
+    3f28:	9160      	ld.w      	r3, (r1, 0x0)
+    3f2a:	3b40      	cmpnei      	r3, 0
+    3f2c:	0806      	bt      	0x3f38	// 3f38 <TK_Keymap_prog+0xac>
+    3f2e:	9100      	ld.w      	r0, (r1, 0x0)
+    3f30:	3301      	movi      	r3, 1
+    3f32:	70d0      	lsl      	r3, r4
+    3f34:	6cc0      	or      	r3, r0
+    3f36:	b160      	st.w      	r3, (r1, 0x0)
+    3f38:	3300      	movi      	r3, 0
+    3f3a:	a260      	st.b      	r3, (r2, 0x0)
+    3f3c:	0411      	br      	0x3f5e	// 3f5e <TK_Keymap_prog+0xd2>
+    3f3e:	8920      	ld.h      	r1, (r1, 0x0)
+    3f40:	7445      	zexth      	r1, r1
+    3f42:	07c9      	br      	0x3ed4	// 3ed4 <TK_Keymap_prog+0x48>
+    3f44:	4441      	lsli      	r2, r4, 1
+    3f46:	6098      	addu      	r2, r6
+    3f48:	8a40      	ld.h      	r2, (r2, 0x0)
+    3f4a:	748b      	sexth      	r2, r2
+    3f4c:	648d      	cmplt      	r3, r2
+    3f4e:	0c08      	bf      	0x3f5e	// 3f5e <TK_Keymap_prog+0xd2>
+    3f50:	3300      	movi      	r3, 0
+    3f52:	114e      	lrw      	r2, 0x20000308	// 4008 <TK_Keymap_prog+0x17c>
+    3f54:	2b01      	subi      	r3, 2
+    3f56:	9220      	ld.w      	r1, (r2, 0x0)
+    3f58:	70d3      	rotl      	r3, r4
+    3f5a:	68c4      	and      	r3, r1
+    3f5c:	b260      	st.w      	r3, (r2, 0x0)
+    3f5e:	4441      	lsli      	r2, r4, 1
+    3f60:	5e68      	addu      	r3, r6, r2
+    3f62:	8b60      	ld.h      	r3, (r3, 0x0)
+    3f64:	74cf      	sexth      	r3, r3
+    3f66:	b864      	st.w      	r3, (r14, 0x10)
+    3f68:	3105      	movi      	r1, 5
+    3f6a:	1163      	lrw      	r3, 0x20000132	// 3ff4 <TK_Keymap_prog+0x168>
+    3f6c:	608c      	addu      	r2, r3
+    3f6e:	8a00      	ld.h      	r0, (r2, 0x0)
+    3f70:	4002      	lsli      	r0, r0, 2
+    3f72:	e3fff7cb 	bsr      	0x2f08	// 2f08 <__divsi3>
+    3f76:	9864      	ld.w      	r3, (r14, 0x10)
+    3f78:	640d      	cmplt      	r3, r0
+    3f7a:	0c18      	bf      	0x3faa	// 3faa <TK_Keymap_prog+0x11e>
+    3f7c:	1140      	lrw      	r2, 0x200002f6	// 3ffc <TK_Keymap_prog+0x170>
+    3f7e:	6090      	addu      	r2, r4
+    3f80:	8260      	ld.b      	r3, (r2, 0x0)
+    3f82:	2300      	addi      	r3, 1
+    3f84:	74cc      	zextb      	r3, r3
+    3f86:	a260      	st.b      	r3, (r2, 0x0)
+    3f88:	3100      	movi      	r1, 0
+    3f8a:	107c      	lrw      	r3, 0x20000310	// 3ff8 <TK_Keymap_prog+0x16c>
+    3f8c:	60d0      	addu      	r3, r4
+    3f8e:	a320      	st.b      	r1, (r3, 0x0)
+    3f90:	8260      	ld.b      	r3, (r2, 0x0)
+    3f92:	9822      	ld.w      	r1, (r14, 0x8)
+    3f94:	64c4      	cmphs      	r1, r3
+    3f96:	080a      	bt      	0x3faa	// 3faa <TK_Keymap_prog+0x11e>
+    3f98:	3300      	movi      	r3, 0
+    3f9a:	103c      	lrw      	r1, 0x20000308	// 4008 <TK_Keymap_prog+0x17c>
+    3f9c:	2b01      	subi      	r3, 2
+    3f9e:	9100      	ld.w      	r0, (r1, 0x0)
+    3fa0:	70d3      	rotl      	r3, r4
+    3fa2:	68c0      	and      	r3, r0
+    3fa4:	b160      	st.w      	r3, (r1, 0x0)
+    3fa6:	3300      	movi      	r3, 0
+    3fa8:	a260      	st.b      	r3, (r2, 0x0)
+    3faa:	2400      	addi      	r4, 1
+    3fac:	3c51      	cmpnei      	r4, 17
+    3fae:	0b81      	bt      	0x3eb0	// 3eb0 <TK_Keymap_prog+0x24>
+    3fb0:	1405      	addi      	r14, r14, 20
+    3fb2:	1494      	pop      	r4-r7, r15
+    3fb4:	60d8      	addu      	r3, r6
+    3fb6:	4441      	lsli      	r2, r4, 1
+    3fb8:	102f      	lrw      	r1, 0x20000132	// 3ff4 <TK_Keymap_prog+0x168>
+    3fba:	8b60      	ld.h      	r3, (r3, 0x0)
+    3fbc:	6084      	addu      	r2, r1
+    3fbe:	74cf      	sexth      	r3, r3
+    3fc0:	8a40      	ld.h      	r2, (r2, 0x0)
+    3fc2:	64c9      	cmplt      	r2, r3
+    3fc4:	0fcd      	bf      	0x3f5e	// 3f5e <TK_Keymap_prog+0xd2>
+    3fc6:	079a      	br      	0x3efa	// 3efa <TK_Keymap_prog+0x6e>
+    3fc8:	3d41      	cmpnei      	r5, 1
+    3fca:	0bb7      	bt      	0x3f38	// 3f38 <TK_Keymap_prog+0xac>
+    3fcc:	102f      	lrw      	r1, 0x20000308	// 4008 <TK_Keymap_prog+0x17c>
+    3fce:	6cd7      	mov      	r3, r5
+    3fd0:	9100      	ld.w      	r0, (r1, 0x0)
+    3fd2:	07b0      	br      	0x3f32	// 3f32 <TK_Keymap_prog+0xa6>
+    3fd4:	20000104 	.long	0x20000104
+    3fd8:	200000d8 	.long	0x200000d8
+    3fdc:	20000322 	.long	0x20000322
+    3fe0:	200000e1 	.long	0x200000e1
+    3fe4:	200000e0 	.long	0x200000e0
+    3fe8:	2000051e 	.long	0x2000051e
+    3fec:	20000278 	.long	0x20000278
+    3ff0:	200004da 	.long	0x200004da
+    3ff4:	20000132 	.long	0x20000132
+    3ff8:	20000310 	.long	0x20000310
+    3ffc:	200002f6 	.long	0x200002f6
+    4000:	200003d2 	.long	0x200003d2
+    4004:	2000044c 	.long	0x2000044c
+    4008:	20000308 	.long	0x20000308
+
+Disassembly of section .text.TK_overflow_predict:
+
+0000400c <TK_overflow_predict>:
+    400c:	14d4      	push      	r4-r7, r15
+    400e:	1421      	subi      	r14, r14, 4
+    4010:	11d9      	lrw      	r6, 0x20000068	// 40f4 <TK_overflow_predict+0xe8>
+    4012:	8665      	ld.b      	r3, (r6, 0x5)
+    4014:	3b41      	cmpnei      	r3, 1
+    4016:	085f      	bt      	0x40d4	// 40d4 <TK_overflow_predict+0xc8>
+    4018:	1158      	lrw      	r2, 0x20000428	// 40f8 <TK_overflow_predict+0xec>
+    401a:	8260      	ld.b      	r3, (r2, 0x0)
+    401c:	2300      	addi      	r3, 1
+    401e:	74cc      	zextb      	r3, r3
+    4020:	a260      	st.b      	r3, (r2, 0x0)
+    4022:	8260      	ld.b      	r3, (r2, 0x0)
+    4024:	1136      	lrw      	r1, 0x20000105	// 40fc <TK_overflow_predict+0xf0>
+    4026:	8120      	ld.b      	r1, (r1, 0x0)
+    4028:	64c4      	cmphs      	r1, r3
+    402a:	0855      	bt      	0x40d4	// 40d4 <TK_overflow_predict+0xc8>
+    402c:	3300      	movi      	r3, 0
+    402e:	a260      	st.b      	r3, (r2, 0x0)
+    4030:	3500      	movi      	r5, 0
+    4032:	11f4      	lrw      	r7, 0x20000108	// 4100 <TK_overflow_predict+0xf4>
+    4034:	2605      	addi      	r6, 6
+    4036:	9760      	ld.w      	r3, (r7, 0x0)
+    4038:	70d5      	lsr      	r3, r5
+    403a:	3201      	movi      	r2, 1
+    403c:	68c8      	and      	r3, r2
+    403e:	3b40      	cmpnei      	r3, 0
+    4040:	0c34      	bf      	0x40a8	// 40a8 <TK_overflow_predict+0x9c>
+    4042:	4581      	lsli      	r4, r5, 1
+    4044:	5e70      	addu      	r3, r6, r4
+    4046:	8b00      	ld.h      	r0, (r3, 0x0)
+    4048:	e3ffeaac 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    404c:	6cc7      	mov      	r3, r1
+    404e:	3180      	movi      	r1, 128
+    4050:	6c83      	mov      	r2, r0
+    4052:	4137      	lsli      	r1, r1, 23
+    4054:	3000      	movi      	r0, 0
+    4056:	e3ffe0af 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    405a:	116b      	lrw      	r3, 0x2000010e	// 4104 <TK_overflow_predict+0xf8>
+    405c:	60d0      	addu      	r3, r4
+    405e:	8b60      	ld.h      	r3, (r3, 0x0)
+    4060:	4364      	lsli      	r3, r3, 4
+    4062:	230e      	addi      	r3, 15
+    4064:	b860      	st.w      	r3, (r14, 0x0)
+    4066:	e3ffe655 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    406a:	9860      	ld.w      	r3, (r14, 0x0)
+    406c:	7cc0      	mult      	r3, r0
+    406e:	1147      	lrw      	r2, 0x200004b8	// 4108 <TK_overflow_predict+0xfc>
+    4070:	740d      	zexth      	r0, r3
+    4072:	6090      	addu      	r2, r4
+    4074:	1166      	lrw      	r3, 0x2000051e	// 410c <TK_overflow_predict+0x100>
+    4076:	60d0      	addu      	r3, r4
+    4078:	aa00      	st.h      	r0, (r2, 0x0)
+    407a:	8b60      	ld.h      	r3, (r3, 0x0)
+    407c:	8a00      	ld.h      	r0, (r2, 0x0)
+    407e:	7401      	zexth      	r0, r0
+    4080:	325f      	movi      	r2, 95
+    4082:	74cd      	zexth      	r3, r3
+    4084:	7c08      	mult      	r0, r2
+    4086:	3164      	movi      	r1, 100
+    4088:	b860      	st.w      	r3, (r14, 0x0)
+    408a:	e3fff73f 	bsr      	0x2f08	// 2f08 <__divsi3>
+    408e:	9860      	ld.w      	r3, (r14, 0x0)
+    4090:	64c1      	cmplt      	r0, r3
+    4092:	0c0b      	bf      	0x40a8	// 40a8 <TK_overflow_predict+0x9c>
+    4094:	107f      	lrw      	r3, 0x200000e2	// 4110 <TK_overflow_predict+0x104>
+    4096:	610c      	addu      	r4, r3
+    4098:	8c60      	ld.h      	r3, (r4, 0x0)
+    409a:	3b06      	cmphsi      	r3, 7
+    409c:	0806      	bt      	0x40a8	// 40a8 <TK_overflow_predict+0x9c>
+    409e:	2300      	addi      	r3, 1
+    40a0:	ac60      	st.h      	r3, (r4, 0x0)
+    40a2:	3201      	movi      	r2, 1
+    40a4:	107c      	lrw      	r3, 0x2000037d	// 4114 <TK_overflow_predict+0x108>
+    40a6:	a340      	st.b      	r2, (r3, 0x0)
+    40a8:	2500      	addi      	r5, 1
+    40aa:	3d51      	cmpnei      	r5, 17
+    40ac:	0bc5      	bt      	0x4036	// 4036 <TK_overflow_predict+0x2a>
+    40ae:	107a      	lrw      	r3, 0x2000037d	// 4114 <TK_overflow_predict+0x108>
+    40b0:	8340      	ld.b      	r2, (r3, 0x0)
+    40b2:	3a41      	cmpnei      	r2, 1
+    40b4:	0810      	bt      	0x40d4	// 40d4 <TK_overflow_predict+0xc8>
+    40b6:	3200      	movi      	r2, 0
+    40b8:	a340      	st.b      	r2, (r3, 0x0)
+    40ba:	3200      	movi      	r2, 0
+    40bc:	1077      	lrw      	r3, 0x20000058	// 4118 <TK_overflow_predict+0x10c>
+    40be:	1018      	lrw      	r0, 0x2000044b	// 411c <TK_overflow_predict+0x110>
+    40c0:	10b8      	lrw      	r5, 0x20000484	// 4120 <TK_overflow_predict+0x114>
+    40c2:	10d4      	lrw      	r6, 0x200000e2	// 4110 <TK_overflow_predict+0x104>
+    40c4:	9360      	ld.w      	r3, (r3, 0x0)
+    40c6:	b342      	st.w      	r2, (r3, 0x8)
+    40c8:	1077      	lrw      	r3, 0x20000054	// 4124 <TK_overflow_predict+0x118>
+    40ca:	9380      	ld.w      	r4, (r3, 0x0)
+    40cc:	3300      	movi      	r3, 0
+    40ce:	8040      	ld.b      	r2, (r0, 0x0)
+    40d0:	648c      	cmphs      	r3, r2
+    40d2:	0c03      	bf      	0x40d8	// 40d8 <TK_overflow_predict+0xcc>
+    40d4:	1401      	addi      	r14, r14, 4
+    40d6:	1494      	pop      	r4-r7, r15
+    40d8:	5d4c      	addu      	r2, r5, r3
+    40da:	8240      	ld.b      	r2, (r2, 0x0)
+    40dc:	4241      	lsli      	r2, r2, 1
+    40de:	4322      	lsli      	r1, r3, 2
+    40e0:	6098      	addu      	r2, r6
+    40e2:	6050      	addu      	r1, r4
+    40e4:	8a40      	ld.h      	r2, (r2, 0x0)
+    40e6:	91f2      	ld.w      	r7, (r1, 0x48)
+    40e8:	4254      	lsli      	r2, r2, 20
+    40ea:	6c9c      	or      	r2, r7
+    40ec:	2300      	addi      	r3, 1
+    40ee:	b152      	st.w      	r2, (r1, 0x48)
+    40f0:	74cc      	zextb      	r3, r3
+    40f2:	07ee      	br      	0x40ce	// 40ce <TK_overflow_predict+0xc2>
+    40f4:	20000068 	.long	0x20000068
+    40f8:	20000428 	.long	0x20000428
+    40fc:	20000105 	.long	0x20000105
+    4100:	20000108 	.long	0x20000108
+    4104:	2000010e 	.long	0x2000010e
+    4108:	200004b8 	.long	0x200004b8
+    410c:	2000051e 	.long	0x2000051e
+    4110:	200000e2 	.long	0x200000e2
+    4114:	2000037d 	.long	0x2000037d
+    4118:	20000058 	.long	0x20000058
+    411c:	2000044b 	.long	0x2000044b
+    4120:	20000484 	.long	0x20000484
+    4124:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00004128 <TK_Baseline_tracking>:
+    4128:	14c4      	push      	r4-r7
+    412a:	1422      	subi      	r14, r14, 8
+    412c:	1348      	lrw      	r2, 0x200003aa	// 42cc <TK_Baseline_tracking+0x1a4>
+    412e:	8260      	ld.b      	r3, (r2, 0x0)
+    4130:	2300      	addi      	r3, 1
+    4132:	74cc      	zextb      	r3, r3
+    4134:	a260      	st.b      	r3, (r2, 0x0)
+    4136:	8260      	ld.b      	r3, (r2, 0x0)
+    4138:	1326      	lrw      	r1, 0x20000105	// 42d0 <TK_Baseline_tracking+0x1a8>
+    413a:	8120      	ld.b      	r1, (r1, 0x0)
+    413c:	644c      	cmphs      	r3, r1
+    413e:	0cad      	bf      	0x4298	// 4298 <TK_Baseline_tracking+0x170>
+    4140:	3300      	movi      	r3, 0
+    4142:	a260      	st.b      	r3, (r2, 0x0)
+    4144:	1364      	lrw      	r3, 0x20000308	// 42d4 <TK_Baseline_tracking+0x1ac>
+    4146:	9360      	ld.w      	r3, (r3, 0x0)
+    4148:	3b40      	cmpnei      	r3, 0
+    414a:	08a7      	bt      	0x4298	// 4298 <TK_Baseline_tracking+0x170>
+    414c:	1323      	lrw      	r1, 0x20000322	// 42d8 <TK_Baseline_tracking+0x1b0>
+    414e:	6dc7      	mov      	r7, r1
+    4150:	b820      	st.w      	r1, (r14, 0x0)
+    4152:	3200      	movi      	r2, 0
+    4154:	1362      	lrw      	r3, 0x20000132	// 42dc <TK_Baseline_tracking+0x1b4>
+    4156:	1323      	lrw      	r1, 0x20000278	// 42e0 <TK_Baseline_tracking+0x1b8>
+    4158:	4201      	lsli      	r0, r2, 1
+    415a:	9880      	ld.w      	r4, (r14, 0x0)
+    415c:	6100      	addu      	r4, r0
+    415e:	8c80      	ld.h      	r4, (r4, 0x0)
+    4160:	7513      	sexth      	r4, r4
+    4162:	3cdf      	btsti      	r4, 31
+    4164:	0c27      	bf      	0x41b2	// 41b2 <TK_Baseline_tracking+0x8a>
+    4166:	13a0      	lrw      	r5, 0x2000051e	// 42e4 <TK_Baseline_tracking+0x1bc>
+    4168:	5980      	addu      	r4, r1, r0
+    416a:	6014      	addu      	r0, r5
+    416c:	b881      	st.w      	r4, (r14, 0x4)
+    416e:	8c80      	ld.h      	r4, (r4, 0x0)
+    4170:	88c0      	ld.h      	r6, (r0, 0x0)
+    4172:	7511      	zexth      	r4, r4
+    4174:	7599      	zexth      	r6, r6
+    4176:	8ba0      	ld.h      	r5, (r3, 0x0)
+    4178:	611a      	subu      	r4, r6
+    417a:	6551      	cmplt      	r4, r5
+    417c:	081b      	bt      	0x41b2	// 41b2 <TK_Baseline_tracking+0x8a>
+    417e:	9881      	ld.w      	r4, (r14, 0x4)
+    4180:	8c80      	ld.h      	r4, (r4, 0x0)
+    4182:	8800      	ld.h      	r0, (r0, 0x0)
+    4184:	7511      	zexth      	r4, r4
+    4186:	7401      	zexth      	r0, r0
+    4188:	5c01      	subu      	r0, r4, r0
+    418a:	4581      	lsli      	r4, r5, 1
+    418c:	6150      	addu      	r5, r4
+    418e:	6541      	cmplt      	r0, r5
+    4190:	0c11      	bf      	0x41b2	// 41b2 <TK_Baseline_tracking+0x8a>
+    4192:	1296      	lrw      	r4, 0x2000044c	// 42e8 <TK_Baseline_tracking+0x1c0>
+    4194:	6108      	addu      	r4, r2
+    4196:	8400      	ld.b      	r0, (r4, 0x0)
+    4198:	2000      	addi      	r0, 1
+    419a:	7400      	zextb      	r0, r0
+    419c:	a400      	st.b      	r0, (r4, 0x0)
+    419e:	1214      	lrw      	r0, 0x20000088	// 42ec <TK_Baseline_tracking+0x1c4>
+    41a0:	84a0      	ld.b      	r5, (r4, 0x0)
+    41a2:	8008      	ld.b      	r0, (r0, 0x8)
+    41a4:	6540      	cmphs      	r0, r5
+    41a6:	0806      	bt      	0x41b2	// 41b2 <TK_Baseline_tracking+0x8a>
+    41a8:	1212      	lrw      	r0, 0x2000038f	// 42f0 <TK_Baseline_tracking+0x1c8>
+    41aa:	3501      	movi      	r5, 1
+    41ac:	a0a0      	st.b      	r5, (r0, 0x0)
+    41ae:	3000      	movi      	r0, 0
+    41b0:	a400      	st.b      	r0, (r4, 0x0)
+    41b2:	4201      	lsli      	r0, r2, 1
+    41b4:	5f80      	addu      	r4, r7, r0
+    41b6:	8c80      	ld.h      	r4, (r4, 0x0)
+    41b8:	7513      	sexth      	r4, r4
+    41ba:	3c20      	cmplti      	r4, 1
+    41bc:	0870      	bt      	0x429c	// 429c <TK_Baseline_tracking+0x174>
+    41be:	128a      	lrw      	r4, 0x2000051e	// 42e4 <TK_Baseline_tracking+0x1bc>
+    41c0:	6100      	addu      	r4, r0
+    41c2:	59a0      	addu      	r5, r1, r0
+    41c4:	8c80      	ld.h      	r4, (r4, 0x0)
+    41c6:	8da0      	ld.h      	r5, (r5, 0x0)
+    41c8:	7555      	zexth      	r5, r5
+    41ca:	7511      	zexth      	r4, r4
+    41cc:	6116      	subu      	r4, r5
+    41ce:	8ba0      	ld.h      	r5, (r3, 0x0)
+    41d0:	45a2      	lsli      	r5, r5, 2
+    41d2:	6551      	cmplt      	r4, r5
+    41d4:	0864      	bt      	0x429c	// 429c <TK_Baseline_tracking+0x174>
+    41d6:	1288      	lrw      	r4, 0x200003d2	// 42f4 <TK_Baseline_tracking+0x1cc>
+    41d8:	6108      	addu      	r4, r2
+    41da:	84a0      	ld.b      	r5, (r4, 0x0)
+    41dc:	2500      	addi      	r5, 1
+    41de:	7554      	zextb      	r5, r5
+    41e0:	a4a0      	st.b      	r5, (r4, 0x0)
+    41e2:	12a3      	lrw      	r5, 0x20000088	// 42ec <TK_Baseline_tracking+0x1c4>
+    41e4:	84c0      	ld.b      	r6, (r4, 0x0)
+    41e6:	85a9      	ld.b      	r5, (r5, 0x9)
+    41e8:	6594      	cmphs      	r5, r6
+    41ea:	0806      	bt      	0x41f6	// 41f6 <TK_Baseline_tracking+0xce>
+    41ec:	12a1      	lrw      	r5, 0x2000038f	// 42f0 <TK_Baseline_tracking+0x1c8>
+    41ee:	3601      	movi      	r6, 1
+    41f0:	a5c0      	st.b      	r6, (r5, 0x0)
+    41f2:	3500      	movi      	r5, 0
+    41f4:	a4a0      	st.b      	r5, (r4, 0x0)
+    41f6:	5f80      	addu      	r4, r7, r0
+    41f8:	8c80      	ld.h      	r4, (r4, 0x0)
+    41fa:	7513      	sexth      	r4, r4
+    41fc:	3cdf      	btsti      	r4, 31
+    41fe:	0c10      	bf      	0x421e	// 421e <TK_Baseline_tracking+0xf6>
+    4200:	11d9      	lrw      	r6, 0x2000051e	// 42e4 <TK_Baseline_tracking+0x1bc>
+    4202:	59a0      	addu      	r5, r1, r0
+    4204:	6180      	addu      	r6, r0
+    4206:	8d80      	ld.h      	r4, (r5, 0x0)
+    4208:	8ec0      	ld.h      	r6, (r6, 0x0)
+    420a:	7599      	zexth      	r6, r6
+    420c:	7511      	zexth      	r4, r4
+    420e:	611a      	subu      	r4, r6
+    4210:	8bc0      	ld.h      	r6, (r3, 0x0)
+    4212:	6591      	cmplt      	r4, r6
+    4214:	0c05      	bf      	0x421e	// 421e <TK_Baseline_tracking+0xf6>
+    4216:	8d80      	ld.h      	r4, (r5, 0x0)
+    4218:	2c00      	subi      	r4, 1
+    421a:	7511      	zexth      	r4, r4
+    421c:	ad80      	st.h      	r4, (r5, 0x0)
+    421e:	5f80      	addu      	r4, r7, r0
+    4220:	8c80      	ld.h      	r4, (r4, 0x0)
+    4222:	7513      	sexth      	r4, r4
+    4224:	3cdf      	btsti      	r4, 31
+    4226:	0c11      	bf      	0x4248	// 4248 <TK_Baseline_tracking+0x120>
+    4228:	11cf      	lrw      	r6, 0x2000051e	// 42e4 <TK_Baseline_tracking+0x1bc>
+    422a:	59a0      	addu      	r5, r1, r0
+    422c:	6180      	addu      	r6, r0
+    422e:	8d80      	ld.h      	r4, (r5, 0x0)
+    4230:	8ec0      	ld.h      	r6, (r6, 0x0)
+    4232:	7599      	zexth      	r6, r6
+    4234:	7511      	zexth      	r4, r4
+    4236:	611a      	subu      	r4, r6
+    4238:	8bc0      	ld.h      	r6, (r3, 0x0)
+    423a:	4ec1      	lsri      	r6, r6, 1
+    423c:	6591      	cmplt      	r4, r6
+    423e:	0805      	bt      	0x4248	// 4248 <TK_Baseline_tracking+0x120>
+    4240:	8d80      	ld.h      	r4, (r5, 0x0)
+    4242:	2c01      	subi      	r4, 2
+    4244:	7511      	zexth      	r4, r4
+    4246:	ad80      	st.h      	r4, (r5, 0x0)
+    4248:	5fa0      	addu      	r5, r7, r0
+    424a:	8d80      	ld.h      	r4, (r5, 0x0)
+    424c:	7513      	sexth      	r4, r4
+    424e:	3c20      	cmplti      	r4, 1
+    4250:	080c      	bt      	0x4268	// 4268 <TK_Baseline_tracking+0x140>
+    4252:	8da0      	ld.h      	r5, (r5, 0x0)
+    4254:	8b80      	ld.h      	r4, (r3, 0x0)
+    4256:	7557      	sexth      	r5, r5
+    4258:	4c81      	lsri      	r4, r4, 1
+    425a:	6515      	cmplt      	r5, r4
+    425c:	0c06      	bf      	0x4268	// 4268 <TK_Baseline_tracking+0x140>
+    425e:	59a0      	addu      	r5, r1, r0
+    4260:	8d80      	ld.h      	r4, (r5, 0x0)
+    4262:	2400      	addi      	r4, 1
+    4264:	7511      	zexth      	r4, r4
+    4266:	ad80      	st.h      	r4, (r5, 0x0)
+    4268:	5fa0      	addu      	r5, r7, r0
+    426a:	8d80      	ld.h      	r4, (r5, 0x0)
+    426c:	7513      	sexth      	r4, r4
+    426e:	3c20      	cmplti      	r4, 1
+    4270:	0810      	bt      	0x4290	// 4290 <TK_Baseline_tracking+0x168>
+    4272:	8dc0      	ld.h      	r6, (r5, 0x0)
+    4274:	759b      	sexth      	r6, r6
+    4276:	8b80      	ld.h      	r4, (r3, 0x0)
+    4278:	6519      	cmplt      	r6, r4
+    427a:	0c0b      	bf      	0x4290	// 4290 <TK_Baseline_tracking+0x168>
+    427c:	8da0      	ld.h      	r5, (r5, 0x0)
+    427e:	7557      	sexth      	r5, r5
+    4280:	4c81      	lsri      	r4, r4, 1
+    4282:	6515      	cmplt      	r5, r4
+    4284:	0806      	bt      	0x4290	// 4290 <TK_Baseline_tracking+0x168>
+    4286:	6004      	addu      	r0, r1
+    4288:	8880      	ld.h      	r4, (r0, 0x0)
+    428a:	2401      	addi      	r4, 2
+    428c:	7511      	zexth      	r4, r4
+    428e:	a880      	st.h      	r4, (r0, 0x0)
+    4290:	2200      	addi      	r2, 1
+    4292:	3a51      	cmpnei      	r2, 17
+    4294:	2301      	addi      	r3, 2
+    4296:	0b61      	bt      	0x4158	// 4158 <TK_Baseline_tracking+0x30>
+    4298:	1402      	addi      	r14, r14, 8
+    429a:	1484      	pop      	r4-r7
+    429c:	5f80      	addu      	r4, r7, r0
+    429e:	8c80      	ld.h      	r4, (r4, 0x0)
+    42a0:	7513      	sexth      	r4, r4
+    42a2:	3cdf      	btsti      	r4, 31
+    42a4:	0fa9      	bf      	0x41f6	// 41f6 <TK_Baseline_tracking+0xce>
+    42a6:	10b0      	lrw      	r5, 0x2000051e	// 42e4 <TK_Baseline_tracking+0x1bc>
+    42a8:	5980      	addu      	r4, r1, r0
+    42aa:	6140      	addu      	r5, r0
+    42ac:	8c80      	ld.h      	r4, (r4, 0x0)
+    42ae:	8da0      	ld.h      	r5, (r5, 0x0)
+    42b0:	7555      	zexth      	r5, r5
+    42b2:	8bc0      	ld.h      	r6, (r3, 0x0)
+    42b4:	7511      	zexth      	r4, r4
+    42b6:	6116      	subu      	r4, r5
+    42b8:	46a1      	lsli      	r5, r6, 1
+    42ba:	6158      	addu      	r5, r6
+    42bc:	6551      	cmplt      	r4, r5
+    42be:	0b9c      	bt      	0x41f6	// 41f6 <TK_Baseline_tracking+0xce>
+    42c0:	108c      	lrw      	r4, 0x2000038f	// 42f0 <TK_Baseline_tracking+0x1c8>
+    42c2:	3501      	movi      	r5, 1
+    42c4:	a4a0      	st.b      	r5, (r4, 0x0)
+    42c6:	6c03      	mov      	r0, r0
+    42c8:	0797      	br      	0x41f6	// 41f6 <TK_Baseline_tracking+0xce>
+    42ca:	0000      	bkpt
+    42cc:	200003aa 	.long	0x200003aa
+    42d0:	20000105 	.long	0x20000105
+    42d4:	20000308 	.long	0x20000308
+    42d8:	20000322 	.long	0x20000322
+    42dc:	20000132 	.long	0x20000132
+    42e0:	20000278 	.long	0x20000278
+    42e4:	2000051e 	.long	0x2000051e
+    42e8:	2000044c 	.long	0x2000044c
+    42ec:	20000088 	.long	0x20000088
+    42f0:	2000038f 	.long	0x2000038f
+    42f4:	200003d2 	.long	0x200003d2
+
+Disassembly of section .text.TK_result_prog:
+
+000042f8 <TK_result_prog>:
+    42f8:	14d2      	push      	r4-r5, r15
+    42fa:	1050      	lrw      	r2, 0x20000308	// 4338 <TK_result_prog+0x40>
+    42fc:	1090      	lrw      	r4, 0x200003ac	// 433c <TK_result_prog+0x44>
+    42fe:	9260      	ld.w      	r3, (r2, 0x0)
+    4300:	3b40      	cmpnei      	r3, 0
+    4302:	0c02      	bf      	0x4306	// 4306 <TK_result_prog+0xe>
+    4304:	9260      	ld.w      	r3, (r2, 0x0)
+    4306:	b460      	st.w      	r3, (r4, 0x0)
+    4308:	9460      	ld.w      	r3, (r4, 0x0)
+    430a:	3b40      	cmpnei      	r3, 0
+    430c:	10ad      	lrw      	r5, 0x20000480	// 4340 <TK_result_prog+0x48>
+    430e:	0c11      	bf      	0x4330	// 4330 <TK_result_prog+0x38>
+    4310:	9440      	ld.w      	r2, (r4, 0x0)
+    4312:	9560      	ld.w      	r3, (r5, 0x0)
+    4314:	64ca      	cmpne      	r2, r3
+    4316:	0c03      	bf      	0x431c	// 431c <TK_result_prog+0x24>
+    4318:	9460      	ld.w      	r3, (r4, 0x0)
+    431a:	b560      	st.w      	r3, (r5, 0x0)
+    431c:	e3fffd94 	bsr      	0x3e44	// 3e44 <get_key_number>
+    4320:	1069      	lrw      	r3, 0x2000010c	// 4344 <TK_result_prog+0x4c>
+    4322:	8360      	ld.b      	r3, (r3, 0x0)
+    4324:	640c      	cmphs      	r3, r0
+    4326:	0804      	bt      	0x432e	// 432e <TK_result_prog+0x36>
+    4328:	3300      	movi      	r3, 0
+    432a:	b460      	st.w      	r3, (r4, 0x0)
+    432c:	b560      	st.w      	r3, (r5, 0x0)
+    432e:	1492      	pop      	r4-r5, r15
+    4330:	1046      	lrw      	r2, 0x200003a4	// 4348 <TK_result_prog+0x50>
+    4332:	b560      	st.w      	r3, (r5, 0x0)
+    4334:	b260      	st.w      	r3, (r2, 0x0)
+    4336:	07fc      	br      	0x432e	// 432e <TK_result_prog+0x36>
+    4338:	20000308 	.long	0x20000308
+    433c:	200003ac 	.long	0x200003ac
+    4340:	20000480 	.long	0x20000480
+    4344:	2000010c 	.long	0x2000010c
+    4348:	200003a4 	.long	0x200003a4
+
+Disassembly of section .text.CORETHandler:
+
+0000434c <CORETHandler>:
+    434c:	1460      	nie
+    434e:	1462      	ipush
+    4350:	14d1      	push      	r4, r15
+    4352:	1077      	lrw      	r3, 0x20000064	// 43ac <CORETHandler+0x60>
+    4354:	3400      	movi      	r4, 0
+    4356:	9360      	ld.w      	r3, (r3, 0x0)
+    4358:	b386      	st.w      	r4, (r3, 0x18)
+    435a:	1076      	lrw      	r3, 0x2000030c	// 43b0 <CORETHandler+0x64>
+    435c:	8360      	ld.b      	r3, (r3, 0x0)
+    435e:	3b41      	cmpnei      	r3, 1
+    4360:	0820      	bt      	0x43a0	// 43a0 <CORETHandler+0x54>
+    4362:	e3fffd85 	bsr      	0x3e6c	// 3e6c <TK_Scan_Start>
+    4366:	e3fffd93 	bsr      	0x3e8c	// 3e8c <TK_Keymap_prog>
+    436a:	e3fffe51 	bsr      	0x400c	// 400c <TK_overflow_predict>
+    436e:	e3fffedd 	bsr      	0x4128	// 4128 <TK_Baseline_tracking>
+    4372:	e3ffffc3 	bsr      	0x42f8	// 42f8 <TK_result_prog>
+    4376:	1070      	lrw      	r3, 0x200003ac	// 43b4 <CORETHandler+0x68>
+    4378:	9360      	ld.w      	r3, (r3, 0x0)
+    437a:	3b40      	cmpnei      	r3, 0
+    437c:	0c12      	bf      	0x43a0	// 43a0 <CORETHandler+0x54>
+    437e:	106f      	lrw      	r3, 0x200000dc	// 43b8 <CORETHandler+0x6c>
+    4380:	9340      	ld.w      	r2, (r3, 0x0)
+    4382:	3a40      	cmpnei      	r2, 0
+    4384:	0c0e      	bf      	0x43a0	// 43a0 <CORETHandler+0x54>
+    4386:	106e      	lrw      	r3, 0x200003a4	// 43bc <CORETHandler+0x70>
+    4388:	3064      	movi      	r0, 100
+    438a:	9320      	ld.w      	r1, (r3, 0x0)
+    438c:	2100      	addi      	r1, 1
+    438e:	b320      	st.w      	r1, (r3, 0x0)
+    4390:	9320      	ld.w      	r1, (r3, 0x0)
+    4392:	7c80      	mult      	r2, r0
+    4394:	6448      	cmphs      	r2, r1
+    4396:	0805      	bt      	0x43a0	// 43a0 <CORETHandler+0x54>
+    4398:	104a      	lrw      	r2, 0x2000038f	// 43c0 <CORETHandler+0x74>
+    439a:	3101      	movi      	r1, 1
+    439c:	a220      	st.b      	r1, (r2, 0x0)
+    439e:	b380      	st.w      	r4, (r3, 0x0)
+    43a0:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    43a4:	9880      	ld.w      	r4, (r14, 0x0)
+    43a6:	1402      	addi      	r14, r14, 8
+    43a8:	1463      	ipop
+    43aa:	1461      	nir
+    43ac:	20000064 	.long	0x20000064
+    43b0:	2000030c 	.long	0x2000030c
+    43b4:	200003ac 	.long	0x200003ac
+    43b8:	200000dc 	.long	0x200000dc
+    43bc:	200003a4 	.long	0x200003a4
+    43c0:	2000038f 	.long	0x2000038f
+
+Disassembly of section .text.std_clk_calib:
+
+000043c4 <std_clk_calib>:
+    43c4:	14d4      	push      	r4-r7, r15
+    43c6:	142d      	subi      	r14, r14, 52
+    43c8:	3201      	movi      	r2, 1
+    43ca:	03ce      	lrw      	r6, 0x2000005c	// 460c <std_clk_calib+0x248>
+    43cc:	6cc3      	mov      	r3, r0
+    43ce:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    43d2:	9640      	ld.w      	r2, (r6, 0x0)
+    43d4:	9247      	ld.w      	r2, (r2, 0x1c)
+    43d6:	7488      	zextb      	r2, r2
+    43d8:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    43dc:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    43e0:	3a40      	cmpnei      	r2, 0
+    43e2:	0c08      	bf      	0x43f2	// 43f2 <std_clk_calib+0x2e>
+    43e4:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    43e8:	3a42      	cmpnei      	r2, 2
+    43ea:	0c04      	bf      	0x43f2	// 43f2 <std_clk_calib+0x2e>
+    43ec:	3000      	movi      	r0, 0
+    43ee:	140d      	addi      	r14, r14, 52
+    43f0:	1494      	pop      	r4-r7, r15
+    43f2:	0397      	lrw      	r4, 0x2000000c	// 4610 <std_clk_calib+0x24c>
+    43f4:	3209      	movi      	r2, 9
+    43f6:	9400      	ld.w      	r0, (r4, 0x0)
+    43f8:	3b40      	cmpnei      	r3, 0
+    43fa:	b041      	st.w      	r2, (r0, 0x4)
+    43fc:	0857      	bt      	0x44aa	// 44aa <std_clk_calib+0xe6>
+    43fe:	3307      	movi      	r3, 7
+    4400:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4404:	037b      	lrw      	r3, 0x2dc6c00	// 4614 <std_clk_calib+0x250>
+    4406:	b863      	st.w      	r3, (r14, 0xc)
+    4408:	3380      	movi      	r3, 128
+    440a:	4362      	lsli      	r3, r3, 2
+    440c:	b867      	st.w      	r3, (r14, 0x1c)
+    440e:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    4412:	74cc      	zextb      	r3, r3
+    4414:	b062      	st.w      	r3, (r0, 0x8)
+    4416:	037e      	lrw      	r3, 0xffff	// 4618 <std_clk_calib+0x254>
+    4418:	b063      	st.w      	r3, (r0, 0xc)
+    441a:	3201      	movi      	r2, 1
+    441c:	3101      	movi      	r1, 1
+    441e:	03bf      	lrw      	r5, 0x20000014	// 461c <std_clk_calib+0x258>
+    4420:	e3ffeda6 	bsr      	0x1f6c	// 1f6c <BT_ConfigInterrupt_CMD>
+    4424:	95e0      	ld.w      	r7, (r5, 0x0)
+    4426:	137f      	lrw      	r3, 0xbe9c0005	// 4620 <std_clk_calib+0x25c>
+    4428:	b760      	st.w      	r3, (r7, 0x0)
+    442a:	135f      	lrw      	r2, 0x30010	// 4624 <std_clk_calib+0x260>
+    442c:	3300      	movi      	r3, 0
+    442e:	b762      	st.w      	r3, (r7, 0x8)
+    4430:	b743      	st.w      	r2, (r7, 0xc)
+    4432:	32d8      	movi      	r2, 216
+    4434:	b745      	st.w      	r2, (r7, 0x14)
+    4436:	974f      	ld.w      	r2, (r7, 0x3c)
+    4438:	3aa2      	bseti      	r2, 2
+    443a:	b74f      	st.w      	r2, (r7, 0x3c)
+    443c:	9803      	ld.w      	r0, (r14, 0xc)
+    443e:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    4442:	327d      	movi      	r2, 125
+    4444:	2100      	addi      	r1, 1
+    4446:	7c48      	mult      	r1, r2
+    4448:	b861      	st.w      	r3, (r14, 0x4)
+    444a:	e3fff571 	bsr      	0x2f2c	// 2f2c <__udivsi3>
+    444e:	b804      	st.w      	r0, (r14, 0x10)
+    4450:	32fa      	movi      	r2, 250
+    4452:	9824      	ld.w      	r1, (r14, 0x10)
+    4454:	4242      	lsli      	r2, r2, 2
+    4456:	6448      	cmphs      	r2, r1
+    4458:	0bca      	bt      	0x43ec	// 43ec <std_clk_calib+0x28>
+    445a:	9844      	ld.w      	r2, (r14, 0x10)
+    445c:	3178      	movi      	r1, 120
+    445e:	9804      	ld.w      	r0, (r14, 0x10)
+    4460:	b840      	st.w      	r2, (r14, 0x0)
+    4462:	e3fff565 	bsr      	0x2f2c	// 2f2c <__udivsi3>
+    4466:	9840      	ld.w      	r2, (r14, 0x0)
+    4468:	6082      	subu      	r2, r0
+    446a:	b845      	st.w      	r2, (r14, 0x14)
+    446c:	9804      	ld.w      	r0, (r14, 0x10)
+    446e:	3178      	movi      	r1, 120
+    4470:	9844      	ld.w      	r2, (r14, 0x10)
+    4472:	b840      	st.w      	r2, (r14, 0x0)
+    4474:	e3fff55c 	bsr      	0x2f2c	// 2f2c <__udivsi3>
+    4478:	9840      	ld.w      	r2, (r14, 0x0)
+    447a:	6008      	addu      	r0, r2
+    447c:	b806      	st.w      	r0, (r14, 0x18)
+    447e:	c0807020 	psrclr      	ie
+    4482:	9640      	ld.w      	r2, (r6, 0x0)
+    4484:	9254      	ld.w      	r2, (r2, 0x50)
+    4486:	b848      	st.w      	r2, (r14, 0x20)
+    4488:	9861      	ld.w      	r3, (r14, 0x4)
+    448a:	9440      	ld.w      	r2, (r4, 0x0)
+    448c:	b260      	st.w      	r3, (r2, 0x0)
+    448e:	b761      	st.w      	r3, (r7, 0x4)
+    4490:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    4494:	3b40      	cmpnei      	r3, 0
+    4496:	083e      	bt      	0x4512	// 4512 <std_clk_calib+0x14e>
+    4498:	e3ffed1c 	bsr      	0x1ed0	// 1ed0 <LPT_Soft_Reset>
+    449c:	9400      	ld.w      	r0, (r4, 0x0)
+    449e:	e3ffed3d 	bsr      	0x1f18	// 1f18 <BT_Soft_Reset>
+    44a2:	c1807420 	psrset      	ee, ie
+    44a6:	3001      	movi      	r0, 1
+    44a8:	07a3      	br      	0x43ee	// 43ee <std_clk_calib+0x2a>
+    44aa:	3b41      	cmpnei      	r3, 1
+    44ac:	0806      	bt      	0x44b8	// 44b8 <std_clk_calib+0xf4>
+    44ae:	3303      	movi      	r3, 3
+    44b0:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    44b4:	127d      	lrw      	r3, 0x16e3600	// 4628 <std_clk_calib+0x264>
+    44b6:	07a8      	br      	0x4406	// 4406 <std_clk_calib+0x42>
+    44b8:	3b42      	cmpnei      	r3, 2
+    44ba:	0806      	bt      	0x44c6	// 44c6 <std_clk_calib+0x102>
+    44bc:	3301      	movi      	r3, 1
+    44be:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    44c2:	127b      	lrw      	r3, 0xb71b00	// 462c <std_clk_calib+0x268>
+    44c4:	07a1      	br      	0x4406	// 4406 <std_clk_calib+0x42>
+    44c6:	3b43      	cmpnei      	r3, 3
+    44c8:	0806      	bt      	0x44d4	// 44d4 <std_clk_calib+0x110>
+    44ca:	3300      	movi      	r3, 0
+    44cc:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    44d0:	1278      	lrw      	r3, 0x5b8d80	// 4630 <std_clk_calib+0x26c>
+    44d2:	079a      	br      	0x4406	// 4406 <std_clk_calib+0x42>
+    44d4:	3b44      	cmpnei      	r3, 4
+    44d6:	0809      	bt      	0x44e8	// 44e8 <std_clk_calib+0x124>
+    44d8:	3300      	movi      	r3, 0
+    44da:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    44de:	1276      	lrw      	r3, 0x54c720	// 4634 <std_clk_calib+0x270>
+    44e0:	b863      	st.w      	r3, (r14, 0xc)
+    44e2:	3380      	movi      	r3, 128
+    44e4:	4369      	lsli      	r3, r3, 9
+    44e6:	0793      	br      	0x440c	// 440c <std_clk_calib+0x48>
+    44e8:	3b45      	cmpnei      	r3, 5
+    44ea:	0806      	bt      	0x44f6	// 44f6 <std_clk_calib+0x132>
+    44ec:	3300      	movi      	r3, 0
+    44ee:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    44f2:	1272      	lrw      	r3, 0x3ffed0	// 4638 <std_clk_calib+0x274>
+    44f4:	07f6      	br      	0x44e0	// 44e0 <std_clk_calib+0x11c>
+    44f6:	3b46      	cmpnei      	r3, 6
+    44f8:	0806      	bt      	0x4504	// 4504 <std_clk_calib+0x140>
+    44fa:	3300      	movi      	r3, 0
+    44fc:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4500:	126f      	lrw      	r3, 0x1fff68	// 463c <std_clk_calib+0x278>
+    4502:	07ef      	br      	0x44e0	// 44e0 <std_clk_calib+0x11c>
+    4504:	3b47      	cmpnei      	r3, 7
+    4506:	0b84      	bt      	0x440e	// 440e <std_clk_calib+0x4a>
+    4508:	3300      	movi      	r3, 0
+    450a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    450e:	126d      	lrw      	r3, 0x1ffb8	// 4640 <std_clk_calib+0x27c>
+    4510:	07e8      	br      	0x44e0	// 44e0 <std_clk_calib+0x11c>
+    4512:	9560      	ld.w      	r3, (r5, 0x0)
+    4514:	3101      	movi      	r1, 1
+    4516:	9440      	ld.w      	r2, (r4, 0x0)
+    4518:	b321      	st.w      	r1, (r3, 0x4)
+    451a:	b220      	st.w      	r1, (r2, 0x0)
+    451c:	3100      	movi      	r1, 0
+    451e:	b327      	st.w      	r1, (r3, 0x1c)
+    4520:	3004      	movi      	r0, 4
+    4522:	b225      	st.w      	r1, (r2, 0x14)
+    4524:	932e      	ld.w      	r1, (r3, 0x38)
+    4526:	6840      	and      	r1, r0
+    4528:	3940      	cmpnei      	r1, 0
+    452a:	0ffd      	bf      	0x4524	// 4524 <std_clk_calib+0x160>
+    452c:	9225      	ld.w      	r1, (r2, 0x14)
+    452e:	b82a      	st.w      	r1, (r14, 0x28)
+    4530:	3100      	movi      	r1, 0
+    4532:	b310      	st.w      	r0, (r3, 0x40)
+    4534:	b327      	st.w      	r1, (r3, 0x1c)
+    4536:	3004      	movi      	r0, 4
+    4538:	b225      	st.w      	r1, (r2, 0x14)
+    453a:	932e      	ld.w      	r1, (r3, 0x38)
+    453c:	6840      	and      	r1, r0
+    453e:	3940      	cmpnei      	r1, 0
+    4540:	0ffd      	bf      	0x453a	// 453a <std_clk_calib+0x176>
+    4542:	9225      	ld.w      	r1, (r2, 0x14)
+    4544:	b82b      	st.w      	r1, (r14, 0x2c)
+    4546:	3100      	movi      	r1, 0
+    4548:	b310      	st.w      	r0, (r3, 0x40)
+    454a:	b327      	st.w      	r1, (r3, 0x1c)
+    454c:	3004      	movi      	r0, 4
+    454e:	b225      	st.w      	r1, (r2, 0x14)
+    4550:	932e      	ld.w      	r1, (r3, 0x38)
+    4552:	6840      	and      	r1, r0
+    4554:	3940      	cmpnei      	r1, 0
+    4556:	0ffd      	bf      	0x4550	// 4550 <std_clk_calib+0x18c>
+    4558:	9225      	ld.w      	r1, (r2, 0x14)
+    455a:	b82c      	st.w      	r1, (r14, 0x30)
+    455c:	b310      	st.w      	r0, (r3, 0x40)
+    455e:	982b      	ld.w      	r1, (r14, 0x2c)
+    4560:	980c      	ld.w      	r0, (r14, 0x30)
+    4562:	6040      	addu      	r1, r0
+    4564:	b829      	st.w      	r1, (r14, 0x24)
+    4566:	9829      	ld.w      	r1, (r14, 0x24)
+    4568:	4921      	lsri      	r1, r1, 1
+    456a:	b829      	st.w      	r1, (r14, 0x24)
+    456c:	3100      	movi      	r1, 0
+    456e:	b321      	st.w      	r1, (r3, 0x4)
+    4570:	b220      	st.w      	r1, (r2, 0x0)
+    4572:	b327      	st.w      	r1, (r3, 0x1c)
+    4574:	b225      	st.w      	r1, (r2, 0x14)
+    4576:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    457a:	3b42      	cmpnei      	r3, 2
+    457c:	9849      	ld.w      	r2, (r14, 0x24)
+    457e:	082c      	bt      	0x45d6	// 45d6 <std_clk_calib+0x212>
+    4580:	1171      	lrw      	r3, 0x7ff	// 4644 <std_clk_calib+0x280>
+    4582:	648c      	cmphs      	r3, r2
+    4584:	0c03      	bf      	0x458a	// 458a <std_clk_calib+0x1c6>
+    4586:	3300      	movi      	r3, 0
+    4588:	040f      	br      	0x45a6	// 45a6 <std_clk_calib+0x1e2>
+    458a:	9849      	ld.w      	r2, (r14, 0x24)
+    458c:	9866      	ld.w      	r3, (r14, 0x18)
+    458e:	648c      	cmphs      	r3, r2
+    4590:	080e      	bt      	0x45ac	// 45ac <std_clk_calib+0x1e8>
+    4592:	9868      	ld.w      	r3, (r14, 0x20)
+    4594:	9847      	ld.w      	r2, (r14, 0x1c)
+    4596:	60ca      	subu      	r3, r2
+    4598:	b868      	st.w      	r3, (r14, 0x20)
+    459a:	32fe      	movi      	r2, 254
+    459c:	9868      	ld.w      	r3, (r14, 0x20)
+    459e:	4248      	lsli      	r2, r2, 8
+    45a0:	68c8      	and      	r3, r2
+    45a2:	3b40      	cmpnei      	r3, 0
+    45a4:	0812      	bt      	0x45c8	// 45c8 <std_clk_calib+0x204>
+    45a6:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    45aa:	0721      	br      	0x43ec	// 43ec <std_clk_calib+0x28>
+    45ac:	9849      	ld.w      	r2, (r14, 0x24)
+    45ae:	9865      	ld.w      	r3, (r14, 0x14)
+    45b0:	64c8      	cmphs      	r2, r3
+    45b2:	0829      	bt      	0x4604	// 4604 <std_clk_calib+0x240>
+    45b4:	9868      	ld.w      	r3, (r14, 0x20)
+    45b6:	9847      	ld.w      	r2, (r14, 0x1c)
+    45b8:	60c8      	addu      	r3, r2
+    45ba:	b868      	st.w      	r3, (r14, 0x20)
+    45bc:	33fe      	movi      	r3, 254
+    45be:	9848      	ld.w      	r2, (r14, 0x20)
+    45c0:	4368      	lsli      	r3, r3, 8
+    45c2:	688c      	and      	r2, r3
+    45c4:	64ca      	cmpne      	r2, r3
+    45c6:	0fe0      	bf      	0x4586	// 4586 <std_clk_calib+0x1c2>
+    45c8:	9660      	ld.w      	r3, (r6, 0x0)
+    45ca:	9848      	ld.w      	r2, (r14, 0x20)
+    45cc:	b354      	st.w      	r2, (r3, 0x50)
+    45ce:	3001      	movi      	r0, 1
+    45d0:	e3ffeef0 	bsr      	0x23b0	// 23b0 <delay_nms>
+    45d4:	075e      	br      	0x4490	// 4490 <std_clk_calib+0xcc>
+    45d6:	9866      	ld.w      	r3, (r14, 0x18)
+    45d8:	648c      	cmphs      	r3, r2
+    45da:	0809      	bt      	0x45ec	// 45ec <std_clk_calib+0x228>
+    45dc:	9868      	ld.w      	r3, (r14, 0x20)
+    45de:	9847      	ld.w      	r2, (r14, 0x1c)
+    45e0:	60ca      	subu      	r3, r2
+    45e2:	b868      	st.w      	r3, (r14, 0x20)
+    45e4:	32ff      	movi      	r2, 255
+    45e6:	9868      	ld.w      	r3, (r14, 0x20)
+    45e8:	4250      	lsli      	r2, r2, 16
+    45ea:	07db      	br      	0x45a0	// 45a0 <std_clk_calib+0x1dc>
+    45ec:	9849      	ld.w      	r2, (r14, 0x24)
+    45ee:	9865      	ld.w      	r3, (r14, 0x14)
+    45f0:	64c8      	cmphs      	r2, r3
+    45f2:	0809      	bt      	0x4604	// 4604 <std_clk_calib+0x240>
+    45f4:	9868      	ld.w      	r3, (r14, 0x20)
+    45f6:	9847      	ld.w      	r2, (r14, 0x1c)
+    45f8:	60c8      	addu      	r3, r2
+    45fa:	b868      	st.w      	r3, (r14, 0x20)
+    45fc:	33ff      	movi      	r3, 255
+    45fe:	9848      	ld.w      	r2, (r14, 0x20)
+    4600:	4370      	lsli      	r3, r3, 16
+    4602:	07e0      	br      	0x45c2	// 45c2 <std_clk_calib+0x1fe>
+    4604:	3300      	movi      	r3, 0
+    4606:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    460a:	07e2      	br      	0x45ce	// 45ce <std_clk_calib+0x20a>
+    460c:	2000005c 	.long	0x2000005c
+    4610:	2000000c 	.long	0x2000000c
+    4614:	02dc6c00 	.long	0x02dc6c00
+    4618:	0000ffff 	.long	0x0000ffff
+    461c:	20000014 	.long	0x20000014
+    4620:	be9c0005 	.long	0xbe9c0005
+    4624:	00030010 	.long	0x00030010
+    4628:	016e3600 	.long	0x016e3600
+    462c:	00b71b00 	.long	0x00b71b00
+    4630:	005b8d80 	.long	0x005b8d80
+    4634:	0054c720 	.long	0x0054c720
+    4638:	003ffed0 	.long	0x003ffed0
+    463c:	001fff68 	.long	0x001fff68
+    4640:	0001ffb8 	.long	0x0001ffb8
+    4644:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/RF_T1F_CR_V01_20241012.map b/Source/Lst/RF_T1F_CR_V01_20241012.map
new file mode 100644
index 0000000..3aac375
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20241012.map
@@ -0,0 +1,2210 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          315648 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         162
+  Section header string table index: 159
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 001a50 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00001a50 002a50 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00001a88 002a88 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00001afc 002afc 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        00001b48 002b48 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        00001b78 002b78 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        00001c00 002c00 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        00001c28 002c28 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00001c64 002c64 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        00001c78 002c78 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00001c90 002c90 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00001cb0 002cb0 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00001ccc 002ccc 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        00001ce8 002ce8 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        00001d28 002d28 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        00001d34 002d34 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        00001d58 002d58 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        00001d88 002d88 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        00001e68 002e68 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00001e7c 002e7c 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        00001e8a 002e8a 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00001e92 002e92 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        00001e9a 002e9a 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00001eb0 002eb0 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00001ec0 002ec0 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00001ed0 002ed0 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        00001ee4 002ee4 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        00001ef4 002ef4 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        00001f10 002f10 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        00001f18 002f18 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        00001f22 002f22 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        00001f3a 002f3a 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        00001f66 002f66 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00001f6c 002f6c 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00001f80 002f80 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00001f90 002f90 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        00002030 003030 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00002044 003044 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        00002088 003088 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        0000209c 00309c 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00002150 003150 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00002160 003160 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00002170 003170 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        0000218c 00318c 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        000021a4 0031a4 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        000021bc 0031bc 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        000021d4 0031d4 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000021f0 0031f0 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        0000220c 00320c 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000022f8 0032f8 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        00002308 003308 000010 00  AX  0   0  4
+  [52] .text.EPT_Stop    PROGBITS        00002318 003318 000028 00  AX  0   0  4
+  [53] .text.startup.mai PROGBITS        00002340 003340 000070 00  AX  0   0  4
+  [54] .text.delay_nms   PROGBITS        000023b0 0033b0 00002c 00  AX  0   0  2
+  [55] .text.GPT0_CONFIG PROGBITS        000023dc 0033dc 000094 00  AX  0   0  4
+  [56] .text.BT_CONFIG   PROGBITS        00002470 003470 000060 00  AX  0   0  4
+  [57] .text.SYSCON_CONF PROGBITS        000024d0 0034d0 000062 00  AX  0   0  2
+  [58] .text.APT32F102_i PROGBITS        00002534 003534 000050 00  AX  0   0  4
+  [59] .text.SYSCONIntHa PROGBITS        00002584 003584 0000f0 00  AX  0   0  4
+  [60] .text.IFCIntHandl PROGBITS        00002674 003674 000068 00  AX  0   0  4
+  [61] .text.ADCIntHandl PROGBITS        000026dc 0036dc 000068 00  AX  0   0  4
+  [62] .text.EPT0IntHand PROGBITS        00002744 003744 0001ac 00  AX  0   0  4
+  [63] .text.WWDTHandler PROGBITS        000028f0 0038f0 000034 00  AX  0   0  4
+  [64] .text.GPT0IntHand PROGBITS        00002924 003924 000080 00  AX  0   0  4
+  [65] .text.RTCIntHandl PROGBITS        000029a4 0039a4 000070 00  AX  0   0  4
+  [66] .text.UART0IntHan PROGBITS        00002a14 003a14 00003c 00  AX  0   0  4
+  [67] .text.UART1IntHan PROGBITS        00002a50 003a50 00003c 00  AX  0   0  4
+  [68] .text.UART2IntHan PROGBITS        00002a8c 003a8c 000094 00  AX  0   0  4
+  [69] .text.SPI0IntHand PROGBITS        00002b20 003b20 0000e8 00  AX  0   0  4
+  [70] .text.SIO0IntHand PROGBITS        00002c08 003c08 000054 00  AX  0   0  4
+  [71] .text.EXI0IntHand PROGBITS        00002c5c 003c5c 000030 00  AX  0   0  4
+  [72] .text.EXI1IntHand PROGBITS        00002c8c 003c8c 000030 00  AX  0   0  4
+  [73] .text.EXI2to3IntH PROGBITS        00002cbc 003cbc 000048 00  AX  0   0  4
+  [74] .text.EXI4to9IntH PROGBITS        00002d04 003d04 00005c 00  AX  0   0  4
+  [75] .text.EXI10to15In PROGBITS        00002d60 003d60 000060 00  AX  0   0  4
+  [76] .text.LPTIntHandl PROGBITS        00002dc0 003dc0 000034 00  AX  0   0  4
+  [77] .text.BT0IntHandl PROGBITS        00002df4 003df4 00004c 00  AX  0   0  4
+  [78] .text.BT1IntHandl PROGBITS        00002e40 003e40 000064 00  AX  0   0  4
+  [79] .text.PriviledgeV PROGBITS        00002ea4 003ea4 000002 00  AX  0   0  2
+  [80] .text.PendTrapHan PROGBITS        00002ea6 003ea6 000008 00  AX  0   0  2
+  [81] .text.Trap3Handle PROGBITS        00002eae 003eae 000008 00  AX  0   0  2
+  [82] .text.Trap2Handle PROGBITS        00002eb6 003eb6 000008 00  AX  0   0  2
+  [83] .text.Trap1Handle PROGBITS        00002ebe 003ebe 000008 00  AX  0   0  2
+  [84] .text.Trap0Handle PROGBITS        00002ec6 003ec6 000008 00  AX  0   0  2
+  [85] .text.UnrecExecpH PROGBITS        00002ece 003ece 000008 00  AX  0   0  2
+  [86] .text.BreakPointH PROGBITS        00002ed6 003ed6 000008 00  AX  0   0  2
+  [87] .text.AccessErrHa PROGBITS        00002ede 003ede 000008 00  AX  0   0  2
+  [88] .text.IllegalInst PROGBITS        00002ee6 003ee6 000008 00  AX  0   0  2
+  [89] .text.MisalignedH PROGBITS        00002eee 003eee 000008 00  AX  0   0  2
+  [90] .text.CNTAIntHand PROGBITS        00002ef6 003ef6 000008 00  AX  0   0  2
+  [91] .text.I2CIntHandl PROGBITS        00002efe 003efe 000008 00  AX  0   0  2
+  [92] .text.__divsi3    PROGBITS        00002f08 003f08 000024 00  AX  0   0  4
+  [93] .text.__udivsi3   PROGBITS        00002f2c 003f2c 000024 00  AX  0   0  4
+  [94] .text.CK_CPU_EnAl PROGBITS        00002f50 003f50 000006 00  AX  0   0  2
+  [95] .text.UARTx_Init  PROGBITS        00002f58 003f58 0000d8 00  AX  0   0  4
+  [96] .text.UART2_RecvI PROGBITS        00003030 004030 000064 00  AX  0   0  4
+  [97] .text.Dbg_Println PROGBITS        00003094 004094 00000c 00  AX  0   0  2
+  [98] .text.RC522_Delay PROGBITS        000030a0 0040a0 000012 00  AX  0   0  2
+  [99] .text.RC522_ReadW PROGBITS        000030b4 0040b4 000054 00  AX  0   0  4
+  [100] .text.RC522_ReadR PROGBITS        00003108 004108 000038 00  AX  0   0  4
+  [101] .text.RC522_Write PROGBITS        00003140 004140 000030 00  AX  0   0  4
+  [102] .text.RC522_PcdRe PROGBITS        00003170 004170 00004c 00  AX  0   0  2
+  [103] .text.RC522_SetBi PROGBITS        000031bc 0041bc 000018 00  AX  0   0  2
+  [104] .text.RC522_PcdAn PROGBITS        000031d4 0041d4 00001a 00  AX  0   0  2
+  [105] .text.RC522_Clear PROGBITS        000031ee 0041ee 000016 00  AX  0   0  2
+  [106] .text.RC522_PcdAn PROGBITS        00003204 004204 00000c 00  AX  0   0  2
+  [107] .text.RC522_Reset PROGBITS        00003210 004210 000016 00  AX  0   0  2
+  [108] .text.RC522_Calul PROGBITS        00003226 004226 000066 00  AX  0   0  2
+  [109] .text.M500PcdConf PROGBITS        0000328c 00428c 000052 00  AX  0   0  2
+  [110] .text.RC522_Init  PROGBITS        000032e0 0042e0 00009c 00  AX  0   0  4
+  [111] .text.RC522_PcdCo PROGBITS        0000337c 00437c 00013a 00  AX  0   0  2
+  [112] .text.RC522_PcdSe PROGBITS        000034b6 0044b6 00006a 00  AX  0   0  2
+  [113] .text.RC522_PcdAu PROGBITS        00003520 004520 000058 00  AX  0   0  2
+  [114] .text.RC522_PcdRe PROGBITS        00003578 004578 000088 00  AX  0   0  4
+  [115] .text.RC522_PcdAn PROGBITS        00003600 004600 000074 00  AX  0   0  2
+  [116] .text.Card_Read_T PROGBITS        00003674 004674 0000d4 00  AX  0   0  4
+  [117] .text.Detect_SPI_ PROGBITS        00003748 004748 000040 00  AX  0   0  4
+  [118] .text.RLY_Light_C PROGBITS        00003788 004788 000020 00  AX  0   0  4
+  [119] .text.KEY1_LONG_P PROGBITS        000037a8 0047a8 000070 00  AX  0   0  4
+  [120] .text.RLY_Light_C PROGBITS        00003818 004818 000030 00  AX  0   0  4
+  [121] .text.LogicCtrl_I PROGBITS        00003848 004848 000040 00  AX  0   0  4
+  [122] .text.Debounce_Ta PROGBITS        00003888 004888 000068 00  AX  0   0  4
+  [123] .text.LogicCtrl_T PROGBITS        000038f0 0048f0 00008c 00  AX  0   0  4
+  [124] .text.LogicCtrl_N PROGBITS        0000397c 00497c 000070 00  AX  0   0  4
+  [125] .text.LogicCtrl_N PROGBITS        000039ec 0049ec 0000c8 00  AX  0   0  4
+  [126] .text.Detect_WIFI PROGBITS        00003ab4 004ab4 000094 00  AX  0   0  4
+  [127] .text.DM_Led_Task PROGBITS        00003b48 004b48 000064 00  AX  0   0  4
+  [128] .text.button_init PROGBITS        00003bac 004bac 00003a 00  AX  0   0  2
+  [129] .text.button_atta PROGBITS        00003be6 004be6 00000a 00  AX  0   0  2
+  [130] .text.button_hand PROGBITS        00003bf0 004bf0 000120 00  AX  0   0  2
+  [131] .text.button_star PROGBITS        00003d10 004d10 000024 00  AX  0   0  4
+  [132] .text.button_tick PROGBITS        00003d34 004d34 00001c 00  AX  0   0  4
+  [133] .text.read_button PROGBITS        00003d50 004d50 000014 00  AX  0   0  4
+  [134] .text.TK_Sampling PROGBITS        00003d64 004d64 000058 00  AX  0   0  4
+  [135] .text.TKEYIntHand PROGBITS        00003dbc 004dbc 000088 00  AX  0   0  4
+  [136] .text.get_key_num PROGBITS        00003e44 004e44 000028 00  AX  0   0  4
+  [137] .text.TK_Scan_Sta PROGBITS        00003e6c 004e6c 000020 00  AX  0   0  4
+  [138] .text.TK_Keymap_p PROGBITS        00003e8c 004e8c 000180 00  AX  0   0  4
+  [139] .text.TK_overflow PROGBITS        0000400c 00500c 00011c 00  AX  0   0  4
+  [140] .text.TK_Baseline PROGBITS        00004128 005128 0001d0 00  AX  0   0  4
+  [141] .text.TK_result_p PROGBITS        000042f8 0052f8 000054 00  AX  0   0  4
+  [142] .text.CORETHandle PROGBITS        0000434c 00534c 000078 00  AX  0   0  4
+  [143] .text.std_clk_cal PROGBITS        000043c4 0053c4 000284 00  AX  0   0  4
+  [144] .RomCode          PROGBITS        00004648 00609c 000000 00   W  0   0  1
+  [145] .rodata           PROGBITS        00004648 005648 000234 00   A  0   0  4
+  [146] .data             PROGBITS        20000000 006000 00009c 00  WA  0   0  4
+  [147] .bss              NOBITS          2000009c 00609c 0004a4 00  WA  0   0  4
+  [148] .csky.attributes  CSKY_ATTRIBUTES 00000000 00609c 000022 00      0   0  1
+  [149] .comment          PROGBITS        00000000 0060be 000042 01  MS  0   0  1
+  [150] .csky_stack_size  PROGBITS        00000000 006100 00080c 00      0   0 16
+  [151] .debug_line       PROGBITS        00000000 00690c 003945 00      0   0  1
+  [152] .debug_info       PROGBITS        00000000 00a251 02bdbe 00      0   0  1
+  [153] .debug_abbrev     PROGBITS        00000000 03600f 00285b 00      0   0  1
+  [154] .debug_aranges    PROGBITS        00000000 038870 000cc8 00      0   0  8
+  [155] .debug_ranges     PROGBITS        00000000 039538 000bc0 00      0   0  1
+  [156] .debug_str        PROGBITS        00000000 03a0f8 008800 01  MS  0   0  1
+  [157] .debug_frame      PROGBITS        00000000 0428f8 001dec 00      0   0  4
+  [158] .debug_loc        PROGBITS        00000000 0446e4 002dc4 00      0   0  1
+  [159] .shstrtab         STRTAB          00000000 04c3d8 000d26 00      0   0  1
+  [160] .symtab           SYMTAB          00000000 0474a8 003c10 10     161 662  4
+  [161] .strtab           STRTAB          00000000 04b0b8 001320 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x0487c 0x0487c R E 0x1000
+  LOAD           0x006000 0x20000000 0x0000487c 0x0009c 0x00540 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_Reset .text.RC522_CalulateCRC .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdSelect .text.RC522_PcdAuthState .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.Detect_SPI_task .text.RLY_Light_Ctrl.part.0 .text.KEY1_LONG_PRESS_RELEASE_Handler .text.RLY_Light_Ctrl .text.LogicCtrl_Init .text.Debounce_Task .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.Detect_WIFI_Task .text.DM_Led_Task .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl.part.0) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Debounce_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_rc522.o(.text.RC522_Reset) for RC522_Reset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_CalulateCRC) for RC522_CalulateCRC
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdSelect) for RC522_PcdSelect
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) for RC522_PcdAuthState
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) for Detect_SPI_task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Debounce_Task) for Debounce_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.DM_Led_Task) for DM_Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAuthState) refers to memcpy_fast.o(.text) for memcpy
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (487 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2894 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
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+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3088 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3405 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3150 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4118 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3521 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTransmit(Obj/FWlib_apt32f102_uart.o), (30 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3637 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4837 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4945 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7594 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2843 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text.__modsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text.__umodsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text.CK_CPU_DisAllNormalIrq(Obj/drivers_apt32f102_ck801.o), (6 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_uart.o), (4 bytes).
+	Removing .text.UART1_TASK(Obj/SYSTEM_uart.o), (148 bytes).
+	Removing .text.UART1_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (148 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (136 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (2 bytes).
+	Removing .text(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text.BackLight_Task(Obj/SYSTEM_logic_ctrl.o), (52 bytes).
+	Removing .text(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .text.get_button_event(Obj/SYSTEM_button.o), (6 bytes).
+	Removing .text.button_stop(Obj/SYSTEM_button.o), (32 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (108 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+
+614 unused seciton(s) (total 179253 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	FWlib_apt32f102_clkcalib.o         0x00000000     df        0  *ABS*
+	FWlib_apt32f102_tkey_c_1_17.o      0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_bt.o           0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_ept.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_gpio.o         0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_gpt.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_lpt.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_syscon.o       0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_uart.o         0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_wwdt.o         0x00000000     df        0  *ABS*
+	Obj/SYSTEM_button.o                0x00000000     df        0  *ABS*
+	Obj/SYSTEM_logic_ctrl.o            0x00000000     df        0  *ABS*
+	Obj/SYSTEM_rc522.o                 0x00000000     df        0  *ABS*
+	Obj/SYSTEM_uart.o                  0x00000000     df        0  *ABS*
+	Obj/arch_crt0.o                    0x00000000     df        0  *ABS*
+	Obj/arch_mem_init.o                0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102.o            0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102_ck801.o      0x00000000     df        0  *ABS*
+	Obj/main.o                         0x00000000     df        0  *ABS*
+	Obj/mcu_initial.o                  0x00000000     df        0  *ABS*
+	Obj/mcu_interrupt.o                0x00000000     df        0  *ABS*
+	_addsub_df.o                       0x00000000     df        0  *ABS*
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+	_csky_case_uqi.o                   0x00000000     df        0  *ABS*
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+	_fixunsdfsi.o                      0x00000000     df        0  *ABS*
+	_fpcmp_parts_df.o                  0x00000000     df        0  *ABS*
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+	_usi_to_df.o                       0x00000000     df        0  *ABS*
+	fabs.o                             0x00000000     df        0  *ABS*
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+	memset_fast.o                      0x00000000     df        0  *ABS*
+	pow.o                              0x00000000     df        0  *ABS*
+	scalbn.o                           0x00000000     df        0  *ABS*
+	sqrt.o                             0x00000000     df        0  *ABS*
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+	head_handle                        0x200000d4      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
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+	pow                                0x000001b4      F     2474  .text
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+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
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+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
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+	__adddf3                           0x0000101c      F       46  .text
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+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
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+	memset                             0x00001964    w F      136  .text
+	__memcpy_fast                      0x000019ec    w F      100  .text
+	memcpy                             0x000019ec    w F      100  .text
+	__main                             0x00001a50      F       56  .text.__main
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+	SYSCON_General_CMD                 0x00001b48      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x00001b78      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x00001c00      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x00001c28      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00001c64      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x00001c78      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00001c90      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00001cb0      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00001ccc      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x00001ce8      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x00001d28      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x00001d34      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x00001d58      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x00001d88      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x00001e68      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00001e7c      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x00001e8a      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00001e92      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x00001e9a      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x00001eb0      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00001ec0      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00001ed0      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x00001ee4      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x00001ef4      F       28  .text.BT_DeInit
+	BT_Start                           0x00001f10      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x00001f18      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x00001f22      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x00001f3a      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x00001f66      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00001f6c      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00001f80      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00001f90      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x00002030      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00002044      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x00002088      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x0000209c      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00002150      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00002160      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00002170      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x0000218c      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x000021a4      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x000021bc      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x000021d4      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000021f0      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x0000220c      F      236  .text.UART_IO_Init
+	UARTInit                           0x000022f8      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x00002308      F       16  .text.UARTInitRxTxIntEn
+	EPT_Stop                           0x00002318      F       40  .text.EPT_Stop
+	main                               0x00002340      F      112  .text.startup.main
+	delay_nms                          0x000023b0      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000023dc      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x00002470      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000024d0      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00002534      F       80  .text.APT32F102_init
+	SYSCONIntHandler                   0x00002584      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00002674      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x000026dc      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00002744      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x000028f0      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00002924      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x000029a4      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00002a14      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00002a50      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00002a8c      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x00002b20      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x00002c08      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00002c5c      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00002c8c      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x00002cbc      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x00002d04      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00002d60      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x00002dc0      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x00002df4      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00002e40      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00002ea4      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00002ea6      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x00002eae      F        8  .text.Trap3Handler
+	Trap2Handler                       0x00002eb6      F        8  .text.Trap2Handler
+	Trap1Handler                       0x00002ebe      F        8  .text.Trap1Handler
+	Trap0Handler                       0x00002ec6      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x00002ece      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x00002ed6      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x00002ede      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x00002ee6      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x00002eee      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x00002ef6      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x00002efe      F        8  .text.I2CIntHandler
+	__divsi3                           0x00002f08      F       36  .text.__divsi3
+	__udivsi3                          0x00002f2c      F       36  .text.__udivsi3
+	CK_CPU_EnAllNormalIrq              0x00002f50      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x00002f58      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x00003030      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x00003094      F       12  .text.Dbg_Println
+	RC522_Delay                        0x000030a0      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x000030b4      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x00003108      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x00003140      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00003170      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x000031bc      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x000031d4      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000031ee      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x00003204      F       12  .text.RC522_PcdAntennaOff
+	RC522_Reset                        0x00003210      F       22  .text.RC522_Reset
+	RC522_CalulateCRC                  0x00003226      F      102  .text.RC522_CalulateCRC
+	RC522_Init                         0x000032e0      F      156  .text.RC522_Init
+	RC522_PcdComMF522                  0x0000337c      F      314  .text.RC522_PcdComMF522
+	RC522_PcdSelect                    0x000034b6      F      106  .text.RC522_PcdSelect
+	RC522_PcdAuthState                 0x00003520      F       88  .text.RC522_PcdAuthState
+	RC522_PcdRequest                   0x00003578      F      136  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00003600      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x00003674      F      212  .text.Card_Read_TasK
+	Detect_SPI_task                    0x00003748      F       64  .text.Detect_SPI_task
+	KEY1_LONG_PRESS_RELEASE_Handler    0x000037a8      F      112  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	RLY_Light_Ctrl                     0x00003818      F       48  .text.RLY_Light_Ctrl
+	LogicCtrl_Init                     0x00003848      F       64  .text.LogicCtrl_Init
+	Debounce_Task                      0x00003888      F      104  .text.Debounce_Task
+	LogicCtrl_Task                     0x000038f0      F      140  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x0000397c      F      112  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x000039ec      F      200  .text.LogicCtrl_NoRF_Task
+	Detect_WIFI_Task                   0x00003ab4      F      148  .text.Detect_WIFI_Task
+	DM_Led_Task                        0x00003b48      F      100  .text.DM_Led_Task
+	button_init                        0x00003bac      F       58  .text.button_init
+	button_attach                      0x00003be6      F       10  .text.button_attach
+	button_handler                     0x00003bf0      F      288  .text.button_handler
+	button_start                       0x00003d10      F       36  .text.button_start
+	button_ticks                       0x00003d34      F       28  .text.button_ticks
+	read_button_GPIO                   0x00003d50      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x00003d64      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x00003dbc      F      136  .text.TKEYIntHandler
+	get_key_number                     0x00003e44      F       40  .text.get_key_number
+	TK_Scan_Start                      0x00003e6c      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x00003e8c      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x0000400c      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00004128      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x000042f8      F       84  .text.TK_result_prog
+	CORETHandler                       0x0000434c      F      120  .text.CORETHandler
+	std_clk_calib                      0x000043c4      F      644  .text.std_clk_calib
+	__thenan_df                        0x00004678      O       20  .rodata
+	__clz_tab                          0x0000468c      O      256  .rodata
+	_end_rodata                        0x0000487c               0  .rodata
+	HWD                                0x20000000      O        4  .data
+	_start_data                        0x20000000               0  .data
+	CRC                                0x20000004      O        4  .data
+	BT1                                0x20000008      O        4  .data
+	BT0                                0x2000000c      O        4  .data
+	WWDT                               0x20000010      O        4  .data
+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
+	EPT0                               0x20000020      O        4  .data
+	GPT0                               0x20000024      O        4  .data
+	CA0                                0x20000028      O        4  .data
+	SIO0                               0x2000002c      O        4  .data
+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	s_tkey                             0x20000068      O        4  .data
+	samp_setover_f                     0x2000006c      O        1  .data
+	tk_overflow_en                     0x2000006d      O        1  .data
+	tk_div                             0x2000006e      O       34  .data
+	neg_build_bounce                   0x20000090      O        1  .data
+	pos_build_bounce                   0x20000091      O        1  .data
+	tk_scan_para0                      0x20000094      O        4  .data
+	scan_step_temp                     0x20000098      O        1  .data
+	_end_data                          0x2000009c               0  .data
+	_bss_start                         0x2000009c               0  .bss
+	rf_exist                           0x2000009c      O        1  .bss
+	last_state                         0x2000009d      O        1  .bss
+	finish_flag                        0x2000009e      O        1  .bss
+	detect_tick                        0x200000a0      O        4  .bss
+	detect_count                       0x200000a4      O        1  .bss
+	test_state                         0x200000a5      O        1  .bss
+	SysTick_100us                      0x200000ac      O        4  .bss
+	SysTick_1ms                        0x200000b0      O        4  .bss
+	RS485_Comming                      0x200000b4      O        4  .bss
+	RS485_Comm_Flag                    0x200000b8      O        4  .bss
+	RS485_Comm_Start                   0x200000bc      O        4  .bss
+	RS485_Comm_End                     0x200000c0      O        4  .bss
+	scan_tick                          0x200000c4      O        4  .bss
+	LED_STATE                          0x200000c8      O        1  .bss
+	Press_debounce_data                0x200000d8      O        1  .bss
+	TK_Lowpower_mode                   0x200000d9      O        1  .bss
+	TK_Lowpower_level                  0x200000da      O        1  .bss
+	TK_longpress_time                  0x200000dc      O        4  .bss
+	Release_debounce_data              0x200000e0      O        1  .bss
+	Key_mode                           0x200000e1      O        1  .bss
+	TK_icon                            0x200000e2      O       34  .bss
+	MultiTimes_Filter                  0x20000104      O        1  .bss
+	Base_Speed                         0x20000105      O        1  .bss
+	TK_IO_ENABLE                       0x20000108      O        4  .bss
+	Valid_Key_Num                      0x2000010c      O        1  .bss
+	TK_senprd                          0x2000010e      O       34  .bss
+	TK_Wakeup_level                    0x20000130      O        1  .bss
+	TK_Triggerlevel                    0x20000132      O       34  .bss
+	TK_EC_LEVEL                        0x20000154      O        2  .bss
+	TK_FVR_LEVEL                       0x20000156      O        2  .bss
+	TK_BaseCnt                         0x20000158      O        4  .bss
+	TK_PSEL_MODE                       0x2000015c      O        2  .bss
+	R_CMPB_BUF                         0x20000160      O        4  .bss
+	R_CMPA_BUF                         0x20000164      O        4  .bss
+	R_SIORX_buf                        0x20000168      O       40  .bss
+	g_uart                             0x20000190      O      115  .bss
+	CardInfo                           0x20000204      O       48  .bss
+	g_read                             0x20000234      O        8  .bss
+	KEY1                               0x2000023c      O       48  .bss
+	dm_in                              0x2000026c      O        9  .bss
+	baseline_data0                     0x20000278      O       34  .bss
+	TK_Postive_build2                  0x2000029a      O       17  .bss
+	Key_Map1                           0x200002ac      O        4  .bss
+	offset_data2_abs                   0x200002b0      O       34  .bss
+	scan_f                             0x200002d2      O        1  .bss
+	offset_data1_abs                   0x200002d4      O       34  .bss
+	Release_debounce0                  0x200002f6      O       17  .bss
+	Key_Map0                           0x20000308      O        4  .bss
+	bsae_over_f                        0x2000030c      O        1  .bss
+	scan_cnt                           0x2000030e      O        2  .bss
+	Press_debounce0                    0x20000310      O       17  .bss
+	offset_data0                       0x20000322      O       34  .bss
+	sampling_data1                     0x20000344      O       34  .bss
+	Key_Map2                           0x20000368      O        4  .bss
+	Release_debounce1                  0x2000036c      O       17  .bss
+	tk_overflow_f                      0x2000037d      O        1  .bss
+	TK_Negtive_build2                  0x2000037e      O       17  .bss
+	base_update_f                      0x2000038f      O        1  .bss
+	TK_Postive_build1                  0x20000390      O       17  .bss
+	time_cnt                           0x200003a4      O        4  .bss
+	lpt_scan_pend_cnt                  0x200003a8      O        2  .bss
+	TK_track_cnt                       0x200003aa      O        1  .bss
+	Key_Map                            0x200003ac      O        4  .bss
+	baseline_data1                     0x200003b0      O       34  .bss
+	TK_Postive_build0                  0x200003d2      O       17  .bss
+	sampling_data2                     0x200003e4      O       34  .bss
+	offset_data1                       0x20000406      O       34  .bss
+	TK_ovrdect_cnt                     0x20000428      O        1  .bss
+	Press_debounce2                    0x20000429      O       17  .bss
+	TK_Negtive_build1                  0x2000043a      O       17  .bss
+	tk_num                             0x2000044b      O        1  .bss
+	TK_Negtive_build0                  0x2000044c      O       17  .bss
+	Press_debounce1                    0x2000045d      O       17  .bss
+	Release_debounce2                  0x2000046e      O       17  .bss
+	r_Key_Map_Temp                     0x20000480      O        4  .bss
+	tk_seque                           0x20000484      O       17  .bss
+	scan_step                          0x20000495      O        1  .bss
+	baseline_data2                     0x20000496      O       34  .bss
+	tk_sampling_max                    0x200004b8      O       34  .bss
+	offset_data0_abs                   0x200004da      O       34  .bss
+	offset_data2                       0x200004fc      O       34  .bss
+	sampling_data0                     0x2000051e      O       34  .bss
+	_ebss                              0x20000540               0  .bss
+	_end                               0x20000540               0  .bss
+	end                                0x20000540               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x0000487c, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1011  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1019  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1025  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1032  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1043  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1048  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1055  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1062  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1069  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1076  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1083  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1090  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1097  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1104  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1118  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1125  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1132  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1138  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1145  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1152  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000088   Code   RO       1173  .text          	memset_fast.o
+    0x000019ec   0x00000064   Code   RO       1178  .text          	memcpy_fast.o
+    0x00001a50   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00001a88   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00001afc   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x00001b48   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001b78   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c00   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x00001c28   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001c64   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x00001c78   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c90   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cb0   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ccc   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ce8   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d28   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d34   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001d58   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001d88   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001e68   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001e7c   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x00001e8a   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00001e92   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x00001e9a   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00001eb0   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00001ec0   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00001ed0   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x00001ee4   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x00001ef4   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x00001f10   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x00001f18   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x00001f22   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x00001f3a   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x00001f66   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00001f6c   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00001f80   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00001f90   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x00002030   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002044   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002088   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000209c   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002150   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x00002160   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00002170   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x0000218c   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021a4   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021bc   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021d4   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000021f0   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x0000220c   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000022f8   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x00002308   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x00002318   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x00002340   0x00000070   Code   RO        690  .text.startup.main	Obj/main.o
+    0x000023b0   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000023dc   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x00002470   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x000024d0   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00002534   0x00000050   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00002584   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00002674   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x000026dc   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00002744   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x000028f0   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00002924   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x000029a4   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00002a14   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00002a50   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00002a8c   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00002b20   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x00002c08   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00002c5c   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00002c8c   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x00002cbc   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x00002d04   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00002d60   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x00002dc0   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x00002df4   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00002e40   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00002ea4   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x00002ea6   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x00002eae   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x00002eb6   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x00002ebe   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x00002ec6   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x00002ece   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x00002ed6   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x00002ede   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x00002ee6   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x00002eee   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x00002ef6   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x00002efe   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x00002f08   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00002f2c   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x00002f50   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00002f58   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x00003030   0x00000064   Code   RO        823  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x00003094   0x0000000c   Code   RO        829  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x000030a0   0x00000012   Code   RO        847  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x000030b4   0x00000054   Code   RO        848  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x00003108   0x00000038   Code   RO        849  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x00003140   0x00000030   Code   RO        850  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00003170   0x0000004c   Code   RO        851  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x000031bc   0x00000018   Code   RO        852  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x000031d4   0x0000001a   Code   RO        853  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000031ee   0x00000016   Code   RO        854  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x00003204   0x0000000c   Code   RO        855  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x00003210   0x00000016   Code   RO        856  .text.RC522_Reset	Obj/SYSTEM_rc522.o
+    0x00003226   0x00000066   Code   RO        857  .text.RC522_CalulateCRC	Obj/SYSTEM_rc522.o
+    0x0000328c   0x00000052   Code   RO        858  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x000032e0   0x0000009c   Code   RO        860  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x0000337c   0x0000013a   Code   RO        861  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x000034b6   0x0000006a   Code   RO        863  .text.RC522_PcdSelect	Obj/SYSTEM_rc522.o
+    0x00003520   0x00000058   Code   RO        864  .text.RC522_PcdAuthState	Obj/SYSTEM_rc522.o
+    0x00003578   0x00000088   Code   RO        867  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x00003600   0x00000074   Code   RO        868  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x00003674   0x000000d4   Code   RO        869  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x00003748   0x00000040   Code   RO        870  .text.Detect_SPI_task	Obj/SYSTEM_rc522.o
+    0x00003788   0x00000020   Code   RO        888  .text.RLY_Light_Ctrl.part.0	Obj/SYSTEM_logic_ctrl.o
+    0x000037a8   0x00000070   Code   RO        889  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x00003818   0x00000030   Code   RO        891  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x00003848   0x00000040   Code   RO        892  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00003888   0x00000068   Code   RO        893  .text.Debounce_Task	Obj/SYSTEM_logic_ctrl.o
+    0x000038f0   0x0000008c   Code   RO        894  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x0000397c   0x00000070   Code   RO        896  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x000039ec   0x000000c8   Code   RO        897  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003ab4   0x00000094   Code   RO        899  .text.Detect_WIFI_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003b48   0x00000064   Code   RO        900  .text.DM_Led_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003bac   0x0000003a   Code   RO        918  .text.button_init	Obj/SYSTEM_button.o
+    0x00003be6   0x0000000a   Code   RO        919  .text.button_attach	Obj/SYSTEM_button.o
+    0x00003bf0   0x00000120   Code   RO        921  .text.button_handler	Obj/SYSTEM_button.o
+    0x00003d10   0x00000024   Code   RO        922  .text.button_start	Obj/SYSTEM_button.o
+    0x00003d34   0x0000001c   Code   RO        924  .text.button_ticks	Obj/SYSTEM_button.o
+    0x00003d50   0x00000014   Code   RO        925  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x00003d64   0x00000058   Code   RO        957  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003dbc   0x00000088   Code   RO        961  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003e44   0x00000028   Code   RO        962  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003e6c   0x00000020   Code   RO        964  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003e8c   0x00000180   Code   RO        965  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000400c   0x0000011c   Code   RO        966  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004128   0x000001d0   Code   RO        967  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x000042f8   0x00000054   Code   RO        968  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000434c   0x00000078   Code   RO        969  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x000043c4   0x00000284   Code   RO        991  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00004648   0x00000030   Data   RO       1014  .rodata        	pow.o
+    0x00004678   0x00000014   Data   RO       1114  .rodata        	_thenan_df.o
+    0x0000468c   0x00000100   Data   RO       1162  .rodata        	_clz.o
+    0x0000478c   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x00004797   0x0000007a   Data   RO        871  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x00004811   0x00000068   Data   RO        901  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+    0x00004879   0x00000003   PAD
+
+    Region RAM (Base: 0x20000000, Size: 0x00000540, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000031   Data   RW        948  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000099   0x00000003   PAD
+    0x2000009c   0x0000000a   Zero   RW        689  .bss           	Obj/main.o
+    0x200000a6   0x00000002   PAD
+    0x200000a8   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000b4   0x00000010   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200000c4   0x00000004   Zero   RW        846  .bss           	Obj/SYSTEM_rc522.o
+    0x200000c8   0x0000000c   Zero   RW        887  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200000d4   0x00000004   Zero   RW        917  .bss           	Obj/SYSTEM_button.o
+    0x200000d8   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x2000015e   0x00000002   PAD
+    0x20000160   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x20000190   0x00000073   Zero   RW        843  COMMON         	Obj/SYSTEM_uart.o
+    0x20000203   0x00000001   PAD
+    0x20000204   0x00000030   Zero   RW        884  COMMON         	Obj/SYSTEM_rc522.o
+    0x20000234   0x00000041   Zero   RW        914  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x20000275   0x00000003   PAD
+    0x20000278   0x000002c8   Zero   RW        987  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        269   Obj/arch_crt0.o
+         56          0          0          0        803   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
+        328          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
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+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
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+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+        112         11          0        144      10945   Obj/main.o
+        466          0          0          0      16126   Obj/mcu_initial.o
+       2434          0          0         60      14261   Obj/mcu_interrupt.o
+         72          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        328          0          0        131      12034   Obj/SYSTEM_uart.o
+       1764        122          0         52      15949   Obj/SYSTEM_rc522.o
+       1060        104          0         77      12284   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11539   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       9404        237        104        468     240096   Object Totals
+          4          3          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16339   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16339   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
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+        112          0          0          0          0   _df_to_si.o
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+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+	------------------------------------------------------------
+       3172        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+	------------------------------------------------------------
+        236          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      17980        564        156       1188     265110   Grand Totals
+      17980        564        156       1188     265110   Elf Image Totals
+      17980        564        156          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				18544 (  18.11kB)
+Total	RW	Size (RW Data + ZI Data)			1344 (  1.31kB)
+Total	ROM	Size (Code + RO Data + RW Data)		18700 (  18.26kB)
+
+======================================================================
diff --git a/Source/Lst/RF_T1F_CR_V01_20241016.asm b/Source/Lst/RF_T1F_CR_V01_20241016.asm
new file mode 100644
index 0000000..a1f822a
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20241016.asm
@@ -0,0 +1,13663 @@
+
+.//Obj/RF_T1F_CR_V01_20241016.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	000043d2 	.long	0x000043d2
+       8:	000043c2 	.long	0x000043c2
+       c:	00000184 	.long	0x00000184
+      10:	000043ca 	.long	0x000043ca
+      14:	00004388 	.long	0x00004388
+      18:	00000184 	.long	0x00000184
+      1c:	000043ba 	.long	0x000043ba
+      20:	000043b2 	.long	0x000043b2
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	000043aa 	.long	0x000043aa
+      44:	000043a2 	.long	0x000043a2
+      48:	0000439a 	.long	0x0000439a
+      4c:	00004392 	.long	0x00004392
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	0000438a 	.long	0x0000438a
+      80:	000057ac 	.long	0x000057ac
+      84:	00003a68 	.long	0x00003a68
+      88:	00003b58 	.long	0x00003b58
+      8c:	00003bc0 	.long	0x00003bc0
+      90:	00003c28 	.long	0x00003c28
+      94:	00000184 	.long	0x00000184
+      98:	00003dd4 	.long	0x00003dd4
+      9c:	00004140 	.long	0x00004140
+      a0:	00004170 	.long	0x00004170
+      a4:	00003e08 	.long	0x00003e08
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00003e88 	.long	0x00003e88
+      b4:	00003ef8 	.long	0x00003ef8
+      b8:	00003f34 	.long	0x00003f34
+      bc:	00003f70 	.long	0x00003f70
+      c0:	00000184 	.long	0x00000184
+      c4:	000043e2 	.long	0x000043e2
+      c8:	00000184 	.long	0x00000184
+      cc:	00004004 	.long	0x00004004
+      d0:	000040ec 	.long	0x000040ec
+      d4:	000041a0 	.long	0x000041a0
+      d8:	000041e8 	.long	0x000041e8
+      dc:	00004244 	.long	0x00004244
+      e0:	000043da 	.long	0x000043da
+      e4:	0000521c 	.long	0x0000521c
+      e8:	000042a4 	.long	0x000042a4
+      ec:	00000184 	.long	0x00000184
+      f0:	000042d8 	.long	0x000042d8
+      f4:	00004324 	.long	0x00004324
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x2f14	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x3824	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00002f14 	.long	0x00002f14
+     198:	00000160 	.long	0x00000160
+     19c:	00003824 	.long	0x00003824
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x5aa8	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00005aa8 	.long	0x00005aa8
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x5aa8	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x5aa8	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00005aa8 	.long	0x00005aa8
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x5ad8	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00005ad8 	.long	0x00005ad8
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x5ad8	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00005ad8 	.long	0x00005ad8
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x5ad8	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00005ad8 	.long	0x00005ad8
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x5aec	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	00005aec 	.long	0x00005aec
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__cskyvprintfsnprintf>:
+    1964:	1422      	subi      	r14, r14, 8
+    1966:	b861      	st.w      	r3, (r14, 0x4)
+    1968:	b840      	st.w      	r2, (r14, 0x0)
+    196a:	14d0      	push      	r15
+    196c:	1421      	subi      	r14, r14, 4
+    196e:	9862      	ld.w      	r3, (r14, 0x8)
+    1970:	b860      	st.w      	r3, (r14, 0x0)
+    1972:	9840      	ld.w      	r2, (r14, 0x0)
+    1974:	1b03      	addi      	r3, r14, 12
+    1976:	e0000026 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+    197a:	1401      	addi      	r14, r14, 4
+    197c:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    1980:	1403      	addi      	r14, r14, 12
+    1982:	783c      	jmp      	r15
+
+00001984 <swrite>:
+    1984:	14d3      	push      	r4-r6, r15
+    1986:	6d4b      	mov      	r5, r2
+    1988:	9582      	ld.w      	r4, (r5, 0x8)
+    198a:	9241      	ld.w      	r2, (r2, 0x4)
+    198c:	610a      	subu      	r4, r2
+    198e:	3c40      	cmpnei      	r4, 0
+    1990:	6d87      	mov      	r6, r1
+    1992:	0c16      	bf      	0x19be	// 19be <swrite+0x3a>
+    1994:	6504      	cmphs      	r1, r4
+    1996:	0802      	bt      	0x199a	// 199a <swrite+0x16>
+    1998:	6d07      	mov      	r4, r1
+    199a:	9560      	ld.w      	r3, (r5, 0x0)
+    199c:	3b40      	cmpnei      	r3, 0
+    199e:	0c0d      	bf      	0x19b8	// 19b8 <swrite+0x34>
+    19a0:	60c8      	addu      	r3, r2
+    19a2:	6c43      	mov      	r1, r0
+    19a4:	6c93      	mov      	r2, r4
+    19a6:	6c0f      	mov      	r0, r3
+    19a8:	e000007e 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    19ac:	9500      	ld.w      	r0, (r5, 0x0)
+    19ae:	9521      	ld.w      	r1, (r5, 0x4)
+    19b0:	6010      	addu      	r0, r4
+    19b2:	6004      	addu      	r0, r1
+    19b4:	3200      	movi      	r2, 0
+    19b6:	a040      	st.b      	r2, (r0, 0x0)
+    19b8:	9561      	ld.w      	r3, (r5, 0x4)
+    19ba:	610c      	addu      	r4, r3
+    19bc:	b581      	st.w      	r4, (r5, 0x4)
+    19be:	6c1b      	mov      	r0, r6
+    19c0:	1493      	pop      	r4-r6, r15
+
+000019c2 <__cskyvprintfvsnprintf>:
+    19c2:	14d3      	push      	r4-r6, r15
+    19c4:	1425      	subi      	r14, r14, 20
+    19c6:	6d07      	mov      	r4, r1
+    19c8:	6d43      	mov      	r5, r0
+    19ca:	6c4b      	mov      	r1, r2
+    19cc:	1802      	addi      	r0, r14, 8
+    19ce:	3200      	movi      	r2, 0
+    19d0:	3c40      	cmpnei      	r4, 0
+    19d2:	b0a0      	st.w      	r5, (r0, 0x0)
+    19d4:	b041      	st.w      	r2, (r0, 0x4)
+    19d6:	0c1c      	bf      	0x1a0e	// 1a0e <__cskyvprintfvsnprintf+0x4c>
+    19d8:	5cc3      	subi      	r6, r4, 1
+    19da:	b0c2      	st.w      	r6, (r0, 0x8)
+    19dc:	b800      	st.w      	r0, (r14, 0x0)
+    19de:	6c8f      	mov      	r2, r3
+    19e0:	100e      	lrw      	r0, 0x1984	// 1a18 <__cskyvprintfvsnprintf+0x56>
+    19e2:	b801      	st.w      	r0, (r14, 0x4)
+    19e4:	6c3b      	mov      	r0, r14
+    19e6:	e00000ab 	bsr      	0x1b3c	// 1b3c <__v2_printf>
+    19ea:	3d40      	cmpnei      	r5, 0
+    19ec:	0c0f      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19ee:	3c40      	cmpnei      	r4, 0
+    19f0:	0c0d      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f2:	38df      	btsti      	r0, 31
+    19f4:	080b      	bt      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f6:	3300      	movi      	r3, 0
+    19f8:	2b00      	subi      	r3, 1
+    19fa:	64d2      	cmpne      	r4, r3
+    19fc:	0c0b      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    19fe:	6500      	cmphs      	r0, r4
+    1a00:	0c09      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    1a02:	6114      	addu      	r4, r5
+    1a04:	2c00      	subi      	r4, 1
+    1a06:	3100      	movi      	r1, 0
+    1a08:	a420      	st.b      	r1, (r4, 0x0)
+    1a0a:	1405      	addi      	r14, r14, 20
+    1a0c:	1493      	pop      	r4-r6, r15
+    1a0e:	3600      	movi      	r6, 0
+    1a10:	07e5      	br      	0x19da	// 19da <__cskyvprintfvsnprintf+0x18>
+    1a12:	5d80      	addu      	r4, r5, r0
+    1a14:	07f9      	br      	0x1a06	// 1a06 <__cskyvprintfvsnprintf+0x44>
+    1a16:	0000      	bkpt
+    1a18:	00001984 	.long	0x00001984
+
+00001a1c <__memset_fast>:
+    1a1c:	14c3      	push      	r4-r6
+    1a1e:	7444      	zextb      	r1, r1
+    1a20:	3a40      	cmpnei      	r2, 0
+    1a22:	0c1f      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a24:	6d43      	mov      	r5, r0
+    1a26:	6d03      	mov      	r4, r0
+    1a28:	3603      	movi      	r6, 3
+    1a2a:	6918      	and      	r4, r6
+    1a2c:	3c40      	cmpnei      	r4, 0
+    1a2e:	0c1a      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a30:	a520      	st.b      	r1, (r5, 0x0)
+    1a32:	2a00      	subi      	r2, 1
+    1a34:	3a40      	cmpnei      	r2, 0
+    1a36:	0c15      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a38:	2500      	addi      	r5, 1
+    1a3a:	6d17      	mov      	r4, r5
+    1a3c:	3603      	movi      	r6, 3
+    1a3e:	6918      	and      	r4, r6
+    1a40:	3c40      	cmpnei      	r4, 0
+    1a42:	0c10      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a44:	a520      	st.b      	r1, (r5, 0x0)
+    1a46:	2a00      	subi      	r2, 1
+    1a48:	3a40      	cmpnei      	r2, 0
+    1a4a:	0c0b      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a4c:	2500      	addi      	r5, 1
+    1a4e:	6d17      	mov      	r4, r5
+    1a50:	3603      	movi      	r6, 3
+    1a52:	6918      	and      	r4, r6
+    1a54:	3c40      	cmpnei      	r4, 0
+    1a56:	0c06      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a58:	a520      	st.b      	r1, (r5, 0x0)
+    1a5a:	2a00      	subi      	r2, 1
+    1a5c:	2500      	addi      	r5, 1
+    1a5e:	0402      	br      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a60:	1483      	pop      	r4-r6
+    1a62:	4168      	lsli      	r3, r1, 8
+    1a64:	6c4c      	or      	r1, r3
+    1a66:	4170      	lsli      	r3, r1, 16
+    1a68:	6c4c      	or      	r1, r3
+    1a6a:	3a2f      	cmplti      	r2, 16
+    1a6c:	0809      	bt      	0x1a7e	// 1a7e <__memset_fast+0x62>
+    1a6e:	b520      	st.w      	r1, (r5, 0x0)
+    1a70:	b521      	st.w      	r1, (r5, 0x4)
+    1a72:	b522      	st.w      	r1, (r5, 0x8)
+    1a74:	b523      	st.w      	r1, (r5, 0xc)
+    1a76:	2a0f      	subi      	r2, 16
+    1a78:	250f      	addi      	r5, 16
+    1a7a:	3a2f      	cmplti      	r2, 16
+    1a7c:	0ff9      	bf      	0x1a6e	// 1a6e <__memset_fast+0x52>
+    1a7e:	3a23      	cmplti      	r2, 4
+    1a80:	0806      	bt      	0x1a8c	// 1a8c <__memset_fast+0x70>
+    1a82:	2a03      	subi      	r2, 4
+    1a84:	b520      	st.w      	r1, (r5, 0x0)
+    1a86:	2503      	addi      	r5, 4
+    1a88:	3a23      	cmplti      	r2, 4
+    1a8a:	0ffc      	bf      	0x1a82	// 1a82 <__memset_fast+0x66>
+    1a8c:	3a40      	cmpnei      	r2, 0
+    1a8e:	0fe9      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a90:	2a00      	subi      	r2, 1
+    1a92:	a520      	st.b      	r1, (r5, 0x0)
+    1a94:	3a40      	cmpnei      	r2, 0
+    1a96:	0fe5      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a98:	2a00      	subi      	r2, 1
+    1a9a:	a521      	st.b      	r1, (r5, 0x1)
+    1a9c:	3a40      	cmpnei      	r2, 0
+    1a9e:	0fe1      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1aa0:	a522      	st.b      	r1, (r5, 0x2)
+    1aa2:	1483      	pop      	r4-r6
+
+00001aa4 <__memcpy_fast>:
+    1aa4:	14c3      	push      	r4-r6
+    1aa6:	6d83      	mov      	r6, r0
+    1aa8:	6d07      	mov      	r4, r1
+    1aaa:	6d18      	or      	r4, r6
+    1aac:	3303      	movi      	r3, 3
+    1aae:	690c      	and      	r4, r3
+    1ab0:	3c40      	cmpnei      	r4, 0
+    1ab2:	0c0b      	bf      	0x1ac8	// 1ac8 <__memcpy_fast+0x24>
+    1ab4:	3a40      	cmpnei      	r2, 0
+    1ab6:	0c08      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1ab8:	8160      	ld.b      	r3, (r1, 0x0)
+    1aba:	2100      	addi      	r1, 1
+    1abc:	2a00      	subi      	r2, 1
+    1abe:	a660      	st.b      	r3, (r6, 0x0)
+    1ac0:	2600      	addi      	r6, 1
+    1ac2:	3a40      	cmpnei      	r2, 0
+    1ac4:	0bfa      	bt      	0x1ab8	// 1ab8 <__memcpy_fast+0x14>
+    1ac6:	1483      	pop      	r4-r6
+    1ac8:	3a2f      	cmplti      	r2, 16
+    1aca:	080e      	bt      	0x1ae6	// 1ae6 <__memcpy_fast+0x42>
+    1acc:	91a0      	ld.w      	r5, (r1, 0x0)
+    1ace:	9161      	ld.w      	r3, (r1, 0x4)
+    1ad0:	9182      	ld.w      	r4, (r1, 0x8)
+    1ad2:	b6a0      	st.w      	r5, (r6, 0x0)
+    1ad4:	91a3      	ld.w      	r5, (r1, 0xc)
+    1ad6:	b661      	st.w      	r3, (r6, 0x4)
+    1ad8:	b682      	st.w      	r4, (r6, 0x8)
+    1ada:	b6a3      	st.w      	r5, (r6, 0xc)
+    1adc:	2a0f      	subi      	r2, 16
+    1ade:	210f      	addi      	r1, 16
+    1ae0:	260f      	addi      	r6, 16
+    1ae2:	3a2f      	cmplti      	r2, 16
+    1ae4:	0ff4      	bf      	0x1acc	// 1acc <__memcpy_fast+0x28>
+    1ae6:	3a23      	cmplti      	r2, 4
+    1ae8:	0808      	bt      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+    1aea:	9160      	ld.w      	r3, (r1, 0x0)
+    1aec:	2a03      	subi      	r2, 4
+    1aee:	2103      	addi      	r1, 4
+    1af0:	b660      	st.w      	r3, (r6, 0x0)
+    1af2:	2603      	addi      	r6, 4
+    1af4:	3a23      	cmplti      	r2, 4
+    1af6:	0ffa      	bf      	0x1aea	// 1aea <__memcpy_fast+0x46>
+    1af8:	3a40      	cmpnei      	r2, 0
+    1afa:	0fe6      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1afc:	8160      	ld.b      	r3, (r1, 0x0)
+    1afe:	2100      	addi      	r1, 1
+    1b00:	2a00      	subi      	r2, 1
+    1b02:	a660      	st.b      	r3, (r6, 0x0)
+    1b04:	2600      	addi      	r6, 1
+    1b06:	07f9      	br      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+
+00001b08 <PAD.1851>:
+    1b08:	14d4      	push      	r4-r7, r15
+    1b0a:	3820      	cmplti      	r0, 1
+    1b0c:	6d03      	mov      	r4, r0
+    1b0e:	6d47      	mov      	r5, r1
+    1b10:	6df7      	mov      	r7, r13
+    1b12:	080d      	bt      	0x1b2c	// 1b2c <PAD.1851+0x24>
+    1b14:	6d83      	mov      	r6, r0
+    1b16:	3e30      	cmplti      	r6, 17
+    1b18:	9700      	ld.w      	r0, (r7, 0x0)
+    1b1a:	0c0a      	bf      	0x1b2e	// 1b2e <PAD.1851+0x26>
+    1b1c:	5c63      	subi      	r3, r4, 1
+    1b1e:	4b24      	lsri      	r1, r3, 4
+    1b20:	4164      	lsli      	r3, r1, 4
+    1b22:	9040      	ld.w      	r2, (r0, 0x0)
+    1b24:	5c2d      	subu      	r1, r4, r3
+    1b26:	9081      	ld.w      	r4, (r0, 0x4)
+    1b28:	6c17      	mov      	r0, r5
+    1b2a:	7bd1      	jsr      	r4
+    1b2c:	1494      	pop      	r4-r7, r15
+    1b2e:	9040      	ld.w      	r2, (r0, 0x0)
+    1b30:	9061      	ld.w      	r3, (r0, 0x4)
+    1b32:	3110      	movi      	r1, 16
+    1b34:	6c17      	mov      	r0, r5
+    1b36:	7bcd      	jsr      	r3
+    1b38:	2e0f      	subi      	r6, 16
+    1b3a:	07ee      	br      	0x1b16	// 1b16 <PAD.1851+0xe>
+
+00001b3c <__v2_printf>:
+    1b3c:	14d4      	push      	r4-r7, r15
+    1b3e:	143c      	subi      	r14, r14, 112
+    1b40:	b826      	st.w      	r1, (r14, 0x18)
+    1b42:	1912      	addi      	r1, r14, 72
+    1b44:	1b21      	addi      	r3, r14, 132
+    1b46:	b810      	st.w      	r0, (r14, 0x40)
+    1b48:	2100      	addi      	r1, 1
+    1b4a:	3000      	movi      	r0, 0
+    1b4c:	6d4b      	mov      	r5, r2
+    1b4e:	b871      	st.w      	r3, (r14, 0x44)
+    1b50:	b80a      	st.w      	r0, (r14, 0x28)
+    1b52:	b809      	st.w      	r0, (r14, 0x24)
+    1b54:	b82d      	st.w      	r1, (r14, 0x34)
+    1b56:	9886      	ld.w      	r4, (r14, 0x18)
+    1b58:	3325      	movi      	r3, 37
+    1b5a:	84c0      	ld.b      	r6, (r4, 0x0)
+    1b5c:	3e40      	cmpnei      	r6, 0
+    1b5e:	0c03      	bf      	0x1b64	// 1b64 <__v2_printf+0x28>
+    1b60:	64da      	cmpne      	r6, r3
+    1b62:	0845      	bt      	0x1bec	// 1bec <__v2_printf+0xb0>
+    1b64:	9846      	ld.w      	r2, (r14, 0x18)
+    1b66:	5cc9      	subu      	r6, r4, r2
+    1b68:	3e40      	cmpnei      	r6, 0
+    1b6a:	0c0a      	bf      	0x1b7e	// 1b7e <__v2_printf+0x42>
+    1b6c:	9870      	ld.w      	r3, (r14, 0x40)
+    1b6e:	9340      	ld.w      	r2, (r3, 0x0)
+    1b70:	6c5b      	mov      	r1, r6
+    1b72:	9361      	ld.w      	r3, (r3, 0x4)
+    1b74:	9806      	ld.w      	r0, (r14, 0x18)
+    1b76:	7bcd      	jsr      	r3
+    1b78:	9809      	ld.w      	r0, (r14, 0x24)
+    1b7a:	6018      	addu      	r0, r6
+    1b7c:	b809      	st.w      	r0, (r14, 0x24)
+    1b7e:	8420      	ld.b      	r1, (r4, 0x0)
+    1b80:	3940      	cmpnei      	r1, 0
+    1b82:	0803      	bt      	0x1b88	// 1b88 <__v2_printf+0x4c>
+    1b84:	e8000367 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1b88:	3637      	movi      	r6, 55
+    1b8a:	1a01      	addi      	r2, r14, 4
+    1b8c:	3700      	movi      	r7, 0
+    1b8e:	6188      	addu      	r6, r2
+    1b90:	a6e0      	st.b      	r7, (r6, 0x0)
+    1b92:	3300      	movi      	r3, 0
+    1b94:	3600      	movi      	r6, 0
+    1b96:	2400      	addi      	r4, 1
+    1b98:	3000      	movi      	r0, 0
+    1b9a:	3100      	movi      	r1, 0
+    1b9c:	2e00      	subi      	r6, 1
+    1b9e:	b867      	st.w      	r3, (r14, 0x1c)
+    1ba0:	3700      	movi      	r7, 0
+    1ba2:	5c42      	addi      	r2, r4, 1
+    1ba4:	b846      	st.w      	r2, (r14, 0x18)
+    1ba6:	8480      	ld.b      	r4, (r4, 0x0)
+    1ba8:	3364      	movi      	r3, 100
+    1baa:	64d2      	cmpne      	r4, r3
+    1bac:	0d90      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1bae:	650d      	cmplt      	r3, r4
+    1bb0:	084e      	bt      	0x1c4c	// 1c4c <__v2_printf+0x110>
+    1bb2:	322e      	movi      	r2, 46
+    1bb4:	6492      	cmpne      	r4, r2
+    1bb6:	0d41      	bf      	0x1e38	// 1e38 <__v2_printf+0x2fc>
+    1bb8:	6509      	cmplt      	r2, r4
+    1bba:	0829      	bt      	0x1c0c	// 1c0c <__v2_printf+0xd0>
+    1bbc:	332a      	movi      	r3, 42
+    1bbe:	64d2      	cmpne      	r4, r3
+    1bc0:	0d31      	bf      	0x1e22	// 1e22 <__v2_printf+0x2e6>
+    1bc2:	650d      	cmplt      	r3, r4
+    1bc4:	081c      	bt      	0x1bfc	// 1bfc <__v2_printf+0xc0>
+    1bc6:	3220      	movi      	r2, 32
+    1bc8:	6492      	cmpne      	r4, r2
+    1bca:	0d25      	bf      	0x1e14	// 1e14 <__v2_printf+0x2d8>
+    1bcc:	3323      	movi      	r3, 35
+    1bce:	64d2      	cmpne      	r4, r3
+    1bd0:	0d27      	bf      	0x1e1e	// 1e1e <__v2_printf+0x2e2>
+    1bd2:	3c40      	cmpnei      	r4, 0
+    1bd4:	0803      	bt      	0x1bda	// 1bda <__v2_printf+0x9e>
+    1bd6:	e800033e 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1bda:	1e12      	addi      	r6, r14, 72
+    1bdc:	3037      	movi      	r0, 55
+    1bde:	1a01      	addi      	r2, r14, 4
+    1be0:	a680      	st.b      	r4, (r6, 0x0)
+    1be2:	6008      	addu      	r0, r2
+    1be4:	3400      	movi      	r4, 0
+    1be6:	a080      	st.b      	r4, (r0, 0x0)
+    1be8:	b8a5      	st.w      	r5, (r14, 0x14)
+    1bea:	042c      	br      	0x1c42	// 1c42 <__v2_printf+0x106>
+    1bec:	2400      	addi      	r4, 1
+    1bee:	07b6      	br      	0x1b5a	// 1b5a <__v2_printf+0x1e>
+    1bf0:	3001      	movi      	r0, 1
+    1bf2:	312b      	movi      	r1, 43
+    1bf4:	9886      	ld.w      	r4, (r14, 0x18)
+    1bf6:	07d6      	br      	0x1ba2	// 1ba2 <__v2_printf+0x66>
+    1bf8:	6d4f      	mov      	r5, r3
+    1bfa:	07fd      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1bfc:	322b      	movi      	r2, 43
+    1bfe:	6492      	cmpne      	r4, r2
+    1c00:	0ff8      	bf      	0x1bf0	// 1bf0 <__v2_printf+0xb4>
+    1c02:	332d      	movi      	r3, 45
+    1c04:	64d2      	cmpne      	r4, r3
+    1c06:	0be6      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c08:	3fa2      	bseti      	r7, 2
+    1c0a:	07f5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c0c:	3339      	movi      	r3, 57
+    1c0e:	650d      	cmplt      	r3, r4
+    1c10:	0809      	bt      	0x1c22	// 1c22 <__v2_printf+0xe6>
+    1c12:	3231      	movi      	r2, 49
+    1c14:	6491      	cmplt      	r4, r2
+    1c16:	0d34      	bf      	0x1e7e	// 1e7e <__v2_printf+0x342>
+    1c18:	3330      	movi      	r3, 48
+    1c1a:	64d2      	cmpne      	r4, r3
+    1c1c:	0bdb      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c1e:	3fa7      	bseti      	r7, 7
+    1c20:	07ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c22:	3258      	movi      	r2, 88
+    1c24:	6492      	cmpne      	r4, r2
+    1c26:	0cd3      	bf      	0x1dcc	// 1dcc <__v2_printf+0x290>
+    1c28:	3063      	movi      	r0, 99
+    1c2a:	6412      	cmpne      	r4, r0
+    1c2c:	0bd3      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c2e:	3337      	movi      	r3, 55
+    1c30:	1a01      	addi      	r2, r14, 4
+    1c32:	5d2e      	addi      	r1, r5, 4
+    1c34:	85c0      	ld.b      	r6, (r5, 0x0)
+    1c36:	3400      	movi      	r4, 0
+    1c38:	1d12      	addi      	r5, r14, 72
+    1c3a:	60c8      	addu      	r3, r2
+    1c3c:	b825      	st.w      	r1, (r14, 0x14)
+    1c3e:	a5c0      	st.b      	r6, (r5, 0x0)
+    1c40:	a380      	st.b      	r4, (r3, 0x0)
+    1c42:	3601      	movi      	r6, 1
+    1c44:	3500      	movi      	r5, 0
+    1c46:	1c12      	addi      	r4, r14, 72
+    1c48:	e8000295 	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1c4c:	336d      	movi      	r3, 109
+    1c4e:	64d2      	cmpne      	r4, r3
+    1c50:	0d2d      	bf      	0x1eaa	// 1eaa <__v2_printf+0x36e>
+    1c52:	650d      	cmplt      	r3, r4
+    1c54:	0883      	bt      	0x1d5a	// 1d5a <__v2_printf+0x21e>
+    1c56:	3268      	movi      	r2, 104
+    1c58:	6492      	cmpne      	r4, r2
+    1c5a:	0d24      	bf      	0x1ea2	// 1ea2 <__v2_printf+0x366>
+    1c5c:	6509      	cmplt      	r2, r4
+    1c5e:	086f      	bt      	0x1d3c	// 1d3c <__v2_printf+0x200>
+    1c60:	3366      	movi      	r3, 102
+    1c62:	64d1      	cmplt      	r4, r3
+    1c64:	0bb7      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c66:	3840      	cmpnei      	r0, 0
+    1c68:	0c05      	bf      	0x1c72	// 1c72 <__v2_printf+0x136>
+    1c6a:	3037      	movi      	r0, 55
+    1c6c:	1a01      	addi      	r2, r14, 4
+    1c6e:	6008      	addu      	r0, r2
+    1c70:	a020      	st.b      	r1, (r0, 0x0)
+    1c72:	5d3e      	addi      	r1, r5, 8
+    1c74:	b825      	st.w      	r1, (r14, 0x14)
+    1c76:	9500      	ld.w      	r0, (r5, 0x0)
+    1c78:	9521      	ld.w      	r1, (r5, 0x4)
+    1c7a:	98a7      	ld.w      	r5, (r14, 0x1c)
+    1c7c:	3d40      	cmpnei      	r5, 0
+    1c7e:	0803      	bt      	0x1c84	// 1c84 <__v2_printf+0x148>
+    1c80:	3301      	movi      	r3, 1
+    1c82:	b867      	st.w      	r3, (r14, 0x1c)
+    1c84:	3200      	movi      	r2, 0
+    1c86:	2a00      	subi      	r2, 1
+    1c88:	649a      	cmpne      	r6, r2
+    1c8a:	0d58      	bf      	0x1f3a	// 1f3a <__v2_printf+0x3fe>
+    1c8c:	6d5b      	mov      	r5, r6
+    1c8e:	9867      	ld.w      	r3, (r14, 0x1c)
+    1c90:	b860      	st.w      	r3, (r14, 0x0)
+    1c92:	b8a1      	st.w      	r5, (r14, 0x4)
+    1c94:	3328      	movi      	r3, 40
+    1c96:	1a12      	addi      	r2, r14, 72
+    1c98:	e000069d 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    1c9c:	3100      	movi      	r1, 0
+    1c9e:	2900      	subi      	r1, 1
+    1ca0:	645a      	cmpne      	r6, r1
+    1ca2:	b808      	st.w      	r0, (r14, 0x20)
+    1ca4:	0c1a      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1ca6:	312e      	movi      	r1, 46
+    1ca8:	980d      	ld.w      	r0, (r14, 0x34)
+    1caa:	e00008c9 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cae:	3840      	cmpnei      	r0, 0
+    1cb0:	98c8      	ld.w      	r6, (r14, 0x20)
+    1cb2:	0d48      	bf      	0x1f42	// 1f42 <__v2_printf+0x406>
+    1cb4:	3d40      	cmpnei      	r5, 0
+    1cb6:	0805      	bt      	0x1cc0	// 1cc0 <__v2_printf+0x184>
+    1cb8:	3101      	movi      	r1, 1
+    1cba:	685c      	and      	r1, r7
+    1cbc:	3940      	cmpnei      	r1, 0
+    1cbe:	0d40      	bf      	0x1f3e	// 1f3e <__v2_printf+0x402>
+    1cc0:	58c2      	addi      	r6, r0, 1
+    1cc2:	2500      	addi      	r5, 1
+    1cc4:	5d59      	subu      	r2, r5, r6
+    1cc6:	6080      	addu      	r2, r0
+    1cc8:	3a20      	cmplti      	r2, 1
+    1cca:	0805      	bt      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1ccc:	2600      	addi      	r6, 1
+    1cce:	8660      	ld.b      	r3, (r6, 0x0)
+    1cd0:	3b40      	cmpnei      	r3, 0
+    1cd2:	0bf9      	bt      	0x1cc4	// 1cc4 <__v2_printf+0x188>
+    1cd4:	3500      	movi      	r5, 0
+    1cd6:	a6a0      	st.b      	r5, (r6, 0x0)
+    1cd8:	3067      	movi      	r0, 103
+    1cda:	6412      	cmpne      	r4, r0
+    1cdc:	0822      	bt      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cde:	312e      	movi      	r1, 46
+    1ce0:	1812      	addi      	r0, r14, 72
+    1ce2:	e00008ad 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1ce6:	3840      	cmpnei      	r0, 0
+    1ce8:	6d03      	mov      	r4, r0
+    1cea:	0c1b      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cec:	3165      	movi      	r1, 101
+    1cee:	e00008a7 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cf2:	6c43      	mov      	r1, r0
+    1cf4:	84c0      	ld.b      	r6, (r4, 0x0)
+    1cf6:	3e40      	cmpnei      	r6, 0
+    1cf8:	0930      	bt      	0x1f58	// 1f58 <__v2_printf+0x41c>
+    1cfa:	3940      	cmpnei      	r1, 0
+    1cfc:	0c02      	bf      	0x1d00	// 1d00 <__v2_printf+0x1c4>
+    1cfe:	6d07      	mov      	r4, r1
+    1d00:	3630      	movi      	r6, 48
+    1d02:	5c63      	subi      	r3, r4, 1
+    1d04:	8340      	ld.b      	r2, (r3, 0x0)
+    1d06:	658a      	cmpne      	r2, r6
+    1d08:	0d2a      	bf      	0x1f5c	// 1f5c <__v2_printf+0x420>
+    1d0a:	352e      	movi      	r5, 46
+    1d0c:	654a      	cmpne      	r2, r5
+    1d0e:	0802      	bt      	0x1d12	// 1d12 <__v2_printf+0x1d6>
+    1d10:	6d0f      	mov      	r4, r3
+    1d12:	3000      	movi      	r0, 0
+    1d14:	3940      	cmpnei      	r1, 0
+    1d16:	a400      	st.b      	r0, (r4, 0x0)
+    1d18:	0c04      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1d1a:	6c13      	mov      	r0, r4
+    1d1c:	e0000838 	bsr      	0x2d8c	// 2d8c <__strcpy_fast>
+    1d20:	1912      	addi      	r1, r14, 72
+    1d22:	81c0      	ld.b      	r6, (r1, 0x0)
+    1d24:	332d      	movi      	r3, 45
+    1d26:	64da      	cmpne      	r6, r3
+    1d28:	0c02      	bf      	0x1d2c	// 1d2c <__v2_printf+0x1f0>
+    1d2a:	05ef      	br      	0x2108	// 2108 <__v2_printf+0x5cc>
+    1d2c:	3437      	movi      	r4, 55
+    1d2e:	1801      	addi      	r0, r14, 4
+    1d30:	352d      	movi      	r5, 45
+    1d32:	6100      	addu      	r4, r0
+    1d34:	a4a0      	st.b      	r5, (r4, 0x0)
+    1d36:	1912      	addi      	r1, r14, 72
+    1d38:	5982      	addi      	r4, r1, 1
+    1d3a:	05ec      	br      	0x2112	// 2112 <__v2_printf+0x5d6>
+    1d3c:	3369      	movi      	r3, 105
+    1d3e:	64d2      	cmpne      	r4, r3
+    1d40:	0cc6      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1d42:	326c      	movi      	r2, 108
+    1d44:	6492      	cmpne      	r4, r2
+    1d46:	0b46      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d48:	9866      	ld.w      	r3, (r14, 0x18)
+    1d4a:	8340      	ld.b      	r2, (r3, 0x0)
+    1d4c:	650a      	cmpne      	r2, r4
+    1d4e:	08ac      	bt      	0x1ea6	// 1ea6 <__v2_printf+0x36a>
+    1d50:	9886      	ld.w      	r4, (r14, 0x18)
+    1d52:	2400      	addi      	r4, 1
+    1d54:	b886      	st.w      	r4, (r14, 0x18)
+    1d56:	3fa5      	bseti      	r7, 5
+    1d58:	074e      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1d5a:	3371      	movi      	r3, 113
+    1d5c:	64d2      	cmpne      	r4, r3
+    1d5e:	0ffc      	bf      	0x1d56	// 1d56 <__v2_printf+0x21a>
+    1d60:	650d      	cmplt      	r3, r4
+    1d62:	081a      	bt      	0x1d96	// 1d96 <__v2_printf+0x25a>
+    1d64:	306f      	movi      	r0, 111
+    1d66:	6412      	cmpne      	r4, r0
+    1d68:	0cfc      	bf      	0x1f60	// 1f60 <__v2_printf+0x424>
+    1d6a:	3170      	movi      	r1, 112
+    1d6c:	6452      	cmpne      	r4, r1
+    1d6e:	0b32      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d70:	5d4e      	addi      	r2, r5, 4
+    1d72:	3400      	movi      	r4, 0
+    1d74:	95a0      	ld.w      	r5, (r5, 0x0)
+    1d76:	b845      	st.w      	r2, (r14, 0x14)
+    1d78:	1901      	addi      	r1, r14, 4
+    1d7a:	3239      	movi      	r2, 57
+    1d7c:	b8a3      	st.w      	r5, (r14, 0xc)
+    1d7e:	b884      	st.w      	r4, (r14, 0x10)
+    1d80:	3330      	movi      	r3, 48
+    1d82:	180f      	addi      	r0, r14, 60
+    1d84:	3578      	movi      	r5, 120
+    1d86:	6084      	addu      	r2, r1
+    1d88:	0195      	lrw      	r4, 0x5f71	// 20b0 <__v2_printf+0x574>
+    1d8a:	3fa1      	bseti      	r7, 1
+    1d8c:	a060      	st.b      	r3, (r0, 0x0)
+    1d8e:	a2a0      	st.b      	r5, (r2, 0x0)
+    1d90:	b88a      	st.w      	r4, (r14, 0x28)
+    1d92:	3402      	movi      	r4, 2
+    1d94:	04f1      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1d96:	3275      	movi      	r2, 117
+    1d98:	6492      	cmpne      	r4, r2
+    1d9a:	0d28      	bf      	0x1fea	// 1fea <__v2_printf+0x4ae>
+    1d9c:	3378      	movi      	r3, 120
+    1d9e:	64d2      	cmpne      	r4, r3
+    1da0:	0d44      	bf      	0x2028	// 2028 <__v2_printf+0x4ec>
+    1da2:	3173      	movi      	r1, 115
+    1da4:	6452      	cmpne      	r4, r1
+    1da6:	0b16      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1da8:	3200      	movi      	r2, 0
+    1daa:	3037      	movi      	r0, 55
+    1dac:	1901      	addi      	r1, r14, 4
+    1dae:	2a00      	subi      	r2, 1
+    1db0:	5d6e      	addi      	r3, r5, 4
+    1db2:	9580      	ld.w      	r4, (r5, 0x0)
+    1db4:	6004      	addu      	r0, r1
+    1db6:	3500      	movi      	r5, 0
+    1db8:	649a      	cmpne      	r6, r2
+    1dba:	b865      	st.w      	r3, (r14, 0x14)
+    1dbc:	a0a0      	st.b      	r5, (r0, 0x0)
+    1dbe:	090b      	bt      	0x1fd4	// 1fd4 <__v2_printf+0x498>
+    1dc0:	6cd3      	mov      	r3, r4
+    1dc2:	83c0      	ld.b      	r6, (r3, 0x0)
+    1dc4:	3e40      	cmpnei      	r6, 0
+    1dc6:	0910      	bt      	0x1fe6	// 1fe6 <__v2_printf+0x4aa>
+    1dc8:	5bd1      	subu      	r6, r3, r4
+    1dca:	047f      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1dcc:	3840      	cmpnei      	r0, 0
+    1dce:	0c05      	bf      	0x1dd8	// 1dd8 <__v2_printf+0x29c>
+    1dd0:	3037      	movi      	r0, 55
+    1dd2:	1b01      	addi      	r3, r14, 4
+    1dd4:	600c      	addu      	r0, r3
+    1dd6:	a020      	st.b      	r1, (r0, 0x0)
+    1dd8:	0228      	lrw      	r1, 0x5f60	// 20b4 <__v2_printf+0x578>
+    1dda:	3020      	movi      	r0, 32
+    1ddc:	681c      	and      	r0, r7
+    1dde:	3840      	cmpnei      	r0, 0
+    1de0:	b82a      	st.w      	r1, (r14, 0x28)
+    1de2:	0d2b      	bf      	0x2038	// 2038 <__v2_printf+0x4fc>
+    1de4:	5d5e      	addi      	r2, r5, 8
+    1de6:	b845      	st.w      	r2, (r14, 0x14)
+    1de8:	9520      	ld.w      	r1, (r5, 0x0)
+    1dea:	9541      	ld.w      	r2, (r5, 0x4)
+    1dec:	b823      	st.w      	r1, (r14, 0xc)
+    1dee:	b844      	st.w      	r2, (r14, 0x10)
+    1df0:	3001      	movi      	r0, 1
+    1df2:	681c      	and      	r0, r7
+    1df4:	3840      	cmpnei      	r0, 0
+    1df6:	0fce      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1df8:	98a3      	ld.w      	r5, (r14, 0xc)
+    1dfa:	9864      	ld.w      	r3, (r14, 0x10)
+    1dfc:	6d4c      	or      	r5, r3
+    1dfe:	3d40      	cmpnei      	r5, 0
+    1e00:	0fc9      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e02:	3039      	movi      	r0, 57
+    1e04:	1d01      	addi      	r5, r14, 4
+    1e06:	3130      	movi      	r1, 48
+    1e08:	1a0f      	addi      	r2, r14, 60
+    1e0a:	6014      	addu      	r0, r5
+    1e0c:	a220      	st.b      	r1, (r2, 0x0)
+    1e0e:	a080      	st.b      	r4, (r0, 0x0)
+    1e10:	3fa1      	bseti      	r7, 1
+    1e12:	07c0      	br      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e14:	3940      	cmpnei      	r1, 0
+    1e16:	0aef      	bt      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e18:	3001      	movi      	r0, 1
+    1e1a:	3120      	movi      	r1, 32
+    1e1c:	06ec      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e1e:	3fa0      	bseti      	r7, 0
+    1e20:	06ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e22:	9580      	ld.w      	r4, (r5, 0x0)
+    1e24:	3cdf      	btsti      	r4, 31
+    1e26:	5d6e      	addi      	r3, r5, 4
+    1e28:	b887      	st.w      	r4, (r14, 0x1c)
+    1e2a:	0ee7      	bf      	0x1bf8	// 1bf8 <__v2_printf+0xbc>
+    1e2c:	9847      	ld.w      	r2, (r14, 0x1c)
+    1e2e:	3500      	movi      	r5, 0
+    1e30:	614a      	subu      	r5, r2
+    1e32:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1e34:	6d4f      	mov      	r5, r3
+    1e36:	06e9      	br      	0x1c08	// 1c08 <__v2_printf+0xcc>
+    1e38:	98c6      	ld.w      	r6, (r14, 0x18)
+    1e3a:	8680      	ld.b      	r4, (r6, 0x0)
+    1e3c:	322a      	movi      	r2, 42
+    1e3e:	9866      	ld.w      	r3, (r14, 0x18)
+    1e40:	6492      	cmpne      	r4, r2
+    1e42:	2300      	addi      	r3, 1
+    1e44:	0c0b      	bf      	0x1e5a	// 1e5a <__v2_printf+0x31e>
+    1e46:	b865      	st.w      	r3, (r14, 0x14)
+    1e48:	3600      	movi      	r6, 0
+    1e4a:	3300      	movi      	r3, 0
+    1e4c:	2b2f      	subi      	r3, 48
+    1e4e:	60d0      	addu      	r3, r4
+    1e50:	3b09      	cmphsi      	r3, 10
+    1e52:	9845      	ld.w      	r2, (r14, 0x14)
+    1e54:	0c0c      	bf      	0x1e6c	// 1e6c <__v2_printf+0x330>
+    1e56:	b846      	st.w      	r2, (r14, 0x18)
+    1e58:	06a8      	br      	0x1ba8	// 1ba8 <__v2_printf+0x6c>
+    1e5a:	95c0      	ld.w      	r6, (r5, 0x0)
+    1e5c:	3edf      	btsti      	r6, 31
+    1e5e:	5d8e      	addi      	r4, r5, 4
+    1e60:	0c03      	bf      	0x1e66	// 1e66 <__v2_printf+0x32a>
+    1e62:	3600      	movi      	r6, 0
+    1e64:	2e00      	subi      	r6, 1
+    1e66:	6d53      	mov      	r5, r4
+    1e68:	b866      	st.w      	r3, (r14, 0x18)
+    1e6a:	06c5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e6c:	340a      	movi      	r4, 10
+    1e6e:	7d18      	mult      	r4, r6
+    1e70:	9845      	ld.w      	r2, (r14, 0x14)
+    1e72:	6d8f      	mov      	r6, r3
+    1e74:	6190      	addu      	r6, r4
+    1e76:	8280      	ld.b      	r4, (r2, 0x0)
+    1e78:	2200      	addi      	r2, 1
+    1e7a:	b845      	st.w      	r2, (r14, 0x14)
+    1e7c:	07e7      	br      	0x1e4a	// 1e4a <__v2_printf+0x30e>
+    1e7e:	3200      	movi      	r2, 0
+    1e80:	b847      	st.w      	r2, (r14, 0x1c)
+    1e82:	9867      	ld.w      	r3, (r14, 0x1c)
+    1e84:	320a      	movi      	r2, 10
+    1e86:	7cc8      	mult      	r3, r2
+    1e88:	2c2f      	subi      	r4, 48
+    1e8a:	610c      	addu      	r4, r3
+    1e8c:	b887      	st.w      	r4, (r14, 0x1c)
+    1e8e:	3300      	movi      	r3, 0
+    1e90:	9886      	ld.w      	r4, (r14, 0x18)
+    1e92:	5c42      	addi      	r2, r4, 1
+    1e94:	2b2f      	subi      	r3, 48
+    1e96:	8480      	ld.b      	r4, (r4, 0x0)
+    1e98:	60d0      	addu      	r3, r4
+    1e9a:	3b09      	cmphsi      	r3, 10
+    1e9c:	b846      	st.w      	r2, (r14, 0x18)
+    1e9e:	0ff2      	bf      	0x1e82	// 1e82 <__v2_printf+0x346>
+    1ea0:	07db      	br      	0x1e56	// 1e56 <__v2_printf+0x31a>
+    1ea2:	3fa6      	bseti      	r7, 6
+    1ea4:	06a8      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1ea6:	3fa4      	bseti      	r7, 4
+    1ea8:	06a6      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1eaa:	3840      	cmpnei      	r0, 0
+    1eac:	0c05      	bf      	0x1eb6	// 1eb6 <__v2_printf+0x37a>
+    1eae:	3637      	movi      	r6, 55
+    1eb0:	1b01      	addi      	r3, r14, 4
+    1eb2:	618c      	addu      	r6, r3
+    1eb4:	a620      	st.b      	r1, (r6, 0x0)
+    1eb6:	033e      	lrw      	r1, 0x20000758	// 20b8 <__v2_printf+0x57c>
+    1eb8:	9100      	ld.w      	r0, (r1, 0x0)
+    1eba:	e00007cb 	bsr      	0x2e50	// 2e50 <__GI_strerror>
+    1ebe:	6d03      	mov      	r4, r0
+    1ec0:	e000073c 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    1ec4:	6d83      	mov      	r6, r0
+    1ec6:	b8a5      	st.w      	r5, (r14, 0x14)
+    1ec8:	3500      	movi      	r5, 0
+    1eca:	0554      	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1ecc:	3840      	cmpnei      	r0, 0
+    1ece:	0c05      	bf      	0x1ed8	// 1ed8 <__v2_printf+0x39c>
+    1ed0:	3037      	movi      	r0, 55
+    1ed2:	1a01      	addi      	r2, r14, 4
+    1ed4:	6008      	addu      	r0, r2
+    1ed6:	a020      	st.b      	r1, (r0, 0x0)
+    1ed8:	3420      	movi      	r4, 32
+    1eda:	691c      	and      	r4, r7
+    1edc:	3c40      	cmpnei      	r4, 0
+    1ede:	0c1a      	bf      	0x1f12	// 1f12 <__v2_printf+0x3d6>
+    1ee0:	5d7e      	addi      	r3, r5, 8
+    1ee2:	9520      	ld.w      	r1, (r5, 0x0)
+    1ee4:	9541      	ld.w      	r2, (r5, 0x4)
+    1ee6:	b865      	st.w      	r3, (r14, 0x14)
+    1ee8:	b823      	st.w      	r1, (r14, 0xc)
+    1eea:	b844      	st.w      	r2, (r14, 0x10)
+    1eec:	9804      	ld.w      	r0, (r14, 0x10)
+    1eee:	38df      	btsti      	r0, 31
+    1ef0:	0c0f      	bf      	0x1f0e	// 1f0e <__v2_printf+0x3d2>
+    1ef2:	9883      	ld.w      	r4, (r14, 0xc)
+    1ef4:	98a4      	ld.w      	r5, (r14, 0x10)
+    1ef6:	3200      	movi      	r2, 0
+    1ef8:	3300      	movi      	r3, 0
+    1efa:	6488      	cmphs      	r2, r2
+    1efc:	6093      	subc      	r2, r4
+    1efe:	60d7      	subc      	r3, r5
+    1f00:	b843      	st.w      	r2, (r14, 0xc)
+    1f02:	b864      	st.w      	r3, (r14, 0x10)
+    1f04:	3237      	movi      	r2, 55
+    1f06:	1b01      	addi      	r3, r14, 4
+    1f08:	352d      	movi      	r5, 45
+    1f0a:	608c      	addu      	r2, r3
+    1f0c:	a2a0      	st.b      	r5, (r2, 0x0)
+    1f0e:	3401      	movi      	r4, 1
+    1f10:	0438      	br      	0x1f80	// 1f80 <__v2_printf+0x444>
+    1f12:	3310      	movi      	r3, 16
+    1f14:	68dc      	and      	r3, r7
+    1f16:	3b40      	cmpnei      	r3, 0
+    1f18:	0c08      	bf      	0x1f28	// 1f28 <__v2_printf+0x3ec>
+    1f1a:	5d4e      	addi      	r2, r5, 4
+    1f1c:	b845      	st.w      	r2, (r14, 0x14)
+    1f1e:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f20:	559f      	asri      	r4, r5, 31
+    1f22:	b8a3      	st.w      	r5, (r14, 0xc)
+    1f24:	b884      	st.w      	r4, (r14, 0x10)
+    1f26:	07e3      	br      	0x1eec	// 1eec <__v2_printf+0x3b0>
+    1f28:	3140      	movi      	r1, 64
+    1f2a:	685c      	and      	r1, r7
+    1f2c:	5d0e      	addi      	r0, r5, 4
+    1f2e:	3940      	cmpnei      	r1, 0
+    1f30:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f32:	b805      	st.w      	r0, (r14, 0x14)
+    1f34:	0ff6      	bf      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f36:	7557      	sexth      	r5, r5
+    1f38:	07f4      	br      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f3a:	3506      	movi      	r5, 6
+    1f3c:	06a9      	br      	0x1c8e	// 1c8e <__v2_printf+0x152>
+    1f3e:	6d83      	mov      	r6, r0
+    1f40:	06ca      	br      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1f42:	3201      	movi      	r2, 1
+    1f44:	689c      	and      	r2, r7
+    1f46:	3a40      	cmpnei      	r2, 0
+    1f48:	0ec8      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f4a:	1d12      	addi      	r5, r14, 72
+    1f4c:	6158      	addu      	r5, r6
+    1f4e:	332e      	movi      	r3, 46
+    1f50:	3000      	movi      	r0, 0
+    1f52:	a560      	st.b      	r3, (r5, 0x0)
+    1f54:	a501      	st.b      	r0, (r5, 0x1)
+    1f56:	06c1      	br      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f58:	2400      	addi      	r4, 1
+    1f5a:	06cd      	br      	0x1cf4	// 1cf4 <__v2_printf+0x1b8>
+    1f5c:	6d0f      	mov      	r4, r3
+    1f5e:	06d2      	br      	0x1d02	// 1d02 <__v2_printf+0x1c6>
+    1f60:	3320      	movi      	r3, 32
+    1f62:	68dc      	and      	r3, r7
+    1f64:	3b40      	cmpnei      	r3, 0
+    1f66:	0c24      	bf      	0x1fae	// 1fae <__v2_printf+0x472>
+    1f68:	5d7e      	addi      	r3, r5, 8
+    1f6a:	9500      	ld.w      	r0, (r5, 0x0)
+    1f6c:	9521      	ld.w      	r1, (r5, 0x4)
+    1f6e:	b865      	st.w      	r3, (r14, 0x14)
+    1f70:	b803      	st.w      	r0, (r14, 0xc)
+    1f72:	b824      	st.w      	r1, (r14, 0x10)
+    1f74:	3400      	movi      	r4, 0
+    1f76:	3537      	movi      	r5, 55
+    1f78:	1801      	addi      	r0, r14, 4
+    1f7a:	3200      	movi      	r2, 0
+    1f7c:	6140      	addu      	r5, r0
+    1f7e:	a540      	st.b      	r2, (r5, 0x0)
+    1f80:	3100      	movi      	r1, 0
+    1f82:	2900      	subi      	r1, 1
+    1f84:	9803      	ld.w      	r0, (r14, 0xc)
+    1f86:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f88:	645a      	cmpne      	r6, r1
+    1f8a:	6c14      	or      	r0, r5
+    1f8c:	0cc8      	bf      	0x211c	// 211c <__v2_printf+0x5e0>
+    1f8e:	6c9f      	mov      	r2, r7
+    1f90:	3a87      	bclri      	r2, 7
+    1f92:	3840      	cmpnei      	r0, 0
+    1f94:	b848      	st.w      	r2, (r14, 0x20)
+    1f96:	08c6      	bt      	0x2122	// 2122 <__v2_printf+0x5e6>
+    1f98:	3e40      	cmpnei      	r6, 0
+    1f9a:	0cac      	bf      	0x20f2	// 20f2 <__v2_printf+0x5b6>
+    1f9c:	3c41      	cmpnei      	r4, 1
+    1f9e:	0c68      	bf      	0x206e	// 206e <__v2_printf+0x532>
+    1fa0:	3c42      	cmpnei      	r4, 2
+    1fa2:	0c8d      	bf      	0x20bc	// 20bc <__v2_printf+0x580>
+    1fa4:	3300      	movi      	r3, 0
+    1fa6:	3400      	movi      	r4, 0
+    1fa8:	b863      	st.w      	r3, (r14, 0xc)
+    1faa:	b884      	st.w      	r4, (r14, 0x10)
+    1fac:	04bf      	br      	0x212a	// 212a <__v2_printf+0x5ee>
+    1fae:	3010      	movi      	r0, 16
+    1fb0:	681c      	and      	r0, r7
+    1fb2:	3840      	cmpnei      	r0, 0
+    1fb4:	0c05      	bf      	0x1fbe	// 1fbe <__v2_printf+0x482>
+    1fb6:	5d8e      	addi      	r4, r5, 4
+    1fb8:	b885      	st.w      	r4, (r14, 0x14)
+    1fba:	95a0      	ld.w      	r5, (r5, 0x0)
+    1fbc:	0408      	br      	0x1fcc	// 1fcc <__v2_printf+0x490>
+    1fbe:	3240      	movi      	r2, 64
+    1fc0:	689c      	and      	r2, r7
+    1fc2:	5d2e      	addi      	r1, r5, 4
+    1fc4:	3a40      	cmpnei      	r2, 0
+    1fc6:	b825      	st.w      	r1, (r14, 0x14)
+    1fc8:	0ff9      	bf      	0x1fba	// 1fba <__v2_printf+0x47e>
+    1fca:	8da0      	ld.h      	r5, (r5, 0x0)
+    1fcc:	3400      	movi      	r4, 0
+    1fce:	b8a3      	st.w      	r5, (r14, 0xc)
+    1fd0:	b884      	st.w      	r4, (r14, 0x10)
+    1fd2:	07d2      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1fd4:	5cb8      	addu      	r5, r4, r6
+    1fd6:	6cd3      	mov      	r3, r4
+    1fd8:	654e      	cmpne      	r3, r5
+    1fda:	0f77      	bf      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1fdc:	8300      	ld.b      	r0, (r3, 0x0)
+    1fde:	3840      	cmpnei      	r0, 0
+    1fe0:	0ef4      	bf      	0x1dc8	// 1dc8 <__v2_printf+0x28c>
+    1fe2:	2300      	addi      	r3, 1
+    1fe4:	07fa      	br      	0x1fd8	// 1fd8 <__v2_printf+0x49c>
+    1fe6:	2300      	addi      	r3, 1
+    1fe8:	06ed      	br      	0x1dc2	// 1dc2 <__v2_printf+0x286>
+    1fea:	3420      	movi      	r4, 32
+    1fec:	691c      	and      	r4, r7
+    1fee:	3c40      	cmpnei      	r4, 0
+    1ff0:	0c09      	bf      	0x2002	// 2002 <__v2_printf+0x4c6>
+    1ff2:	5d7e      	addi      	r3, r5, 8
+    1ff4:	9520      	ld.w      	r1, (r5, 0x0)
+    1ff6:	9541      	ld.w      	r2, (r5, 0x4)
+    1ff8:	b865      	st.w      	r3, (r14, 0x14)
+    1ffa:	b823      	st.w      	r1, (r14, 0xc)
+    1ffc:	b844      	st.w      	r2, (r14, 0x10)
+    1ffe:	3401      	movi      	r4, 1
+    2000:	07bb      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    2002:	3310      	movi      	r3, 16
+    2004:	68dc      	and      	r3, r7
+    2006:	3b40      	cmpnei      	r3, 0
+    2008:	0c05      	bf      	0x2012	// 2012 <__v2_printf+0x4d6>
+    200a:	5d0e      	addi      	r0, r5, 4
+    200c:	b805      	st.w      	r0, (r14, 0x14)
+    200e:	95a0      	ld.w      	r5, (r5, 0x0)
+    2010:	0408      	br      	0x2020	// 2020 <__v2_printf+0x4e4>
+    2012:	3140      	movi      	r1, 64
+    2014:	685c      	and      	r1, r7
+    2016:	5d4e      	addi      	r2, r5, 4
+    2018:	3940      	cmpnei      	r1, 0
+    201a:	b845      	st.w      	r2, (r14, 0x14)
+    201c:	0ff9      	bf      	0x200e	// 200e <__v2_printf+0x4d2>
+    201e:	8da0      	ld.h      	r5, (r5, 0x0)
+    2020:	3400      	movi      	r4, 0
+    2022:	b8a3      	st.w      	r5, (r14, 0xc)
+    2024:	b884      	st.w      	r4, (r14, 0x10)
+    2026:	07ec      	br      	0x1ffe	// 1ffe <__v2_printf+0x4c2>
+    2028:	3840      	cmpnei      	r0, 0
+    202a:	0c05      	bf      	0x2034	// 2034 <__v2_printf+0x4f8>
+    202c:	3337      	movi      	r3, 55
+    202e:	1a01      	addi      	r2, r14, 4
+    2030:	60c8      	addu      	r3, r2
+    2032:	a320      	st.b      	r1, (r3, 0x0)
+    2034:	103f      	lrw      	r1, 0x5f71	// 20b0 <__v2_printf+0x574>
+    2036:	06d2      	br      	0x1dda	// 1dda <__v2_printf+0x29e>
+    2038:	3310      	movi      	r3, 16
+    203a:	68dc      	and      	r3, r7
+    203c:	3b40      	cmpnei      	r3, 0
+    203e:	0c05      	bf      	0x2048	// 2048 <__v2_printf+0x50c>
+    2040:	5d0e      	addi      	r0, r5, 4
+    2042:	b805      	st.w      	r0, (r14, 0x14)
+    2044:	95a0      	ld.w      	r5, (r5, 0x0)
+    2046:	0408      	br      	0x2056	// 2056 <__v2_printf+0x51a>
+    2048:	3240      	movi      	r2, 64
+    204a:	689c      	and      	r2, r7
+    204c:	5d2e      	addi      	r1, r5, 4
+    204e:	3a40      	cmpnei      	r2, 0
+    2050:	b825      	st.w      	r1, (r14, 0x14)
+    2052:	0ff9      	bf      	0x2044	// 2044 <__v2_printf+0x508>
+    2054:	8da0      	ld.h      	r5, (r5, 0x0)
+    2056:	3300      	movi      	r3, 0
+    2058:	b8a3      	st.w      	r5, (r14, 0xc)
+    205a:	b864      	st.w      	r3, (r14, 0x10)
+    205c:	06ca      	br      	0x1df0	// 1df0 <__v2_printf+0x2b4>
+    205e:	6cd3      	mov      	r3, r4
+    2060:	0467      	br      	0x212e	// 212e <__v2_printf+0x5f2>
+    2062:	9884      	ld.w      	r4, (r14, 0x10)
+    2064:	3c40      	cmpnei      	r4, 0
+    2066:	080b      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    2068:	9843      	ld.w      	r2, (r14, 0xc)
+    206a:	3a09      	cmphsi      	r2, 10
+    206c:	0808      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    206e:	9883      	ld.w      	r4, (r14, 0xc)
+    2070:	242f      	addi      	r4, 48
+    2072:	1f1a      	addi      	r7, r14, 104
+    2074:	a787      	st.b      	r4, (r7, 0x7)
+    2076:	1c12      	addi      	r4, r14, 72
+    2078:	2426      	addi      	r4, 39
+    207a:	0478      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    207c:	1c1c      	addi      	r4, r14, 112
+    207e:	3530      	movi      	r5, 48
+    2080:	320a      	movi      	r2, 10
+    2082:	3300      	movi      	r3, 0
+    2084:	9803      	ld.w      	r0, (r14, 0xc)
+    2086:	9824      	ld.w      	r1, (r14, 0x10)
+    2088:	e00002c2 	bsr      	0x260c	// 260c <__umoddi3>
+    208c:	6014      	addu      	r0, r5
+    208e:	2c00      	subi      	r4, 1
+    2090:	a400      	st.b      	r0, (r4, 0x0)
+    2092:	320a      	movi      	r2, 10
+    2094:	9803      	ld.w      	r0, (r14, 0xc)
+    2096:	9824      	ld.w      	r1, (r14, 0x10)
+    2098:	3300      	movi      	r3, 0
+    209a:	e00000e3 	bsr      	0x2260	// 2260 <__udivdi3>
+    209e:	b803      	st.w      	r0, (r14, 0xc)
+    20a0:	b824      	st.w      	r1, (r14, 0x10)
+    20a2:	9823      	ld.w      	r1, (r14, 0xc)
+    20a4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20a6:	6c5c      	or      	r1, r7
+    20a8:	3940      	cmpnei      	r1, 0
+    20aa:	0beb      	bt      	0x2080	// 2080 <__v2_printf+0x544>
+    20ac:	045f      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20ae:	0000      	bkpt
+    20b0:	00005f71 	.long	0x00005f71
+    20b4:	00005f60 	.long	0x00005f60
+    20b8:	20000758 	.long	0x20000758
+    20bc:	3300      	movi      	r3, 0
+    20be:	3400      	movi      	r4, 0
+    20c0:	b863      	st.w      	r3, (r14, 0xc)
+    20c2:	b884      	st.w      	r4, (r14, 0x10)
+    20c4:	1c1c      	addi      	r4, r14, 112
+    20c6:	320f      	movi      	r2, 15
+    20c8:	9803      	ld.w      	r0, (r14, 0xc)
+    20ca:	982a      	ld.w      	r1, (r14, 0x28)
+    20cc:	6808      	and      	r0, r2
+    20ce:	6004      	addu      	r0, r1
+    20d0:	80a0      	ld.b      	r5, (r0, 0x0)
+    20d2:	2c00      	subi      	r4, 1
+    20d4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20d6:	a4a0      	st.b      	r5, (r4, 0x0)
+    20d8:	98a4      	ld.w      	r5, (r14, 0x10)
+    20da:	9863      	ld.w      	r3, (r14, 0xc)
+    20dc:	471c      	lsli      	r0, r7, 28
+    20de:	4de4      	lsri      	r7, r5, 4
+    20e0:	4b24      	lsri      	r1, r3, 4
+    20e2:	b8e4      	st.w      	r7, (r14, 0x10)
+    20e4:	6c04      	or      	r0, r1
+    20e6:	9864      	ld.w      	r3, (r14, 0x10)
+    20e8:	b803      	st.w      	r0, (r14, 0xc)
+    20ea:	6c0c      	or      	r0, r3
+    20ec:	3840      	cmpnei      	r0, 0
+    20ee:	0bed      	bt      	0x20c8	// 20c8 <__v2_printf+0x58c>
+    20f0:	043d      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20f2:	3c40      	cmpnei      	r4, 0
+    20f4:	0808      	bt      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20f6:	3301      	movi      	r3, 1
+    20f8:	68dc      	and      	r3, r7
+    20fa:	3b40      	cmpnei      	r3, 0
+    20fc:	0c04      	bf      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20fe:	1f1a      	addi      	r7, r14, 104
+    2100:	3430      	movi      	r4, 48
+    2102:	07b9      	br      	0x2074	// 2074 <__v2_printf+0x538>
+    2104:	1c1c      	addi      	r4, r14, 112
+    2106:	0432      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    2108:	322b      	movi      	r2, 43
+    210a:	649a      	cmpne      	r6, r2
+    210c:	0802      	bt      	0x2110	// 2110 <__v2_printf+0x5d4>
+    210e:	0614      	br      	0x1d36	// 1d36 <__v2_printf+0x1fa>
+    2110:	1c12      	addi      	r4, r14, 72
+    2112:	6c13      	mov      	r0, r4
+    2114:	e0000612 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    2118:	6d83      	mov      	r6, r0
+    211a:	06d7      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    211c:	3840      	cmpnei      	r0, 0
+    211e:	b8e8      	st.w      	r7, (r14, 0x20)
+    2120:	0f3e      	bf      	0x1f9c	// 1f9c <__v2_printf+0x460>
+    2122:	3c41      	cmpnei      	r4, 1
+    2124:	0f9f      	bf      	0x2062	// 2062 <__v2_printf+0x526>
+    2126:	3c42      	cmpnei      	r4, 2
+    2128:	0fce      	bf      	0x20c4	// 20c4 <__v2_printf+0x588>
+    212a:	1b1c      	addi      	r3, r14, 112
+    212c:	3707      	movi      	r7, 7
+    212e:	9823      	ld.w      	r1, (r14, 0xc)
+    2130:	685c      	and      	r1, r7
+    2132:	212f      	addi      	r1, 48
+    2134:	9804      	ld.w      	r0, (r14, 0x10)
+    2136:	7484      	zextb      	r2, r1
+    2138:	9823      	ld.w      	r1, (r14, 0xc)
+    213a:	40bd      	lsli      	r5, r0, 29
+    213c:	4903      	lsri      	r0, r1, 3
+    213e:	9824      	ld.w      	r1, (r14, 0x10)
+    2140:	4923      	lsri      	r1, r1, 3
+    2142:	b824      	st.w      	r1, (r14, 0x10)
+    2144:	6d40      	or      	r5, r0
+    2146:	9804      	ld.w      	r0, (r14, 0x10)
+    2148:	b8a3      	st.w      	r5, (r14, 0xc)
+    214a:	6d40      	or      	r5, r0
+    214c:	5b83      	subi      	r4, r3, 1
+    214e:	3d40      	cmpnei      	r5, 0
+    2150:	a440      	st.b      	r2, (r4, 0x0)
+    2152:	0b86      	bt      	0x205e	// 205e <__v2_printf+0x522>
+    2154:	3701      	movi      	r7, 1
+    2156:	9828      	ld.w      	r1, (r14, 0x20)
+    2158:	69c4      	and      	r7, r1
+    215a:	3f40      	cmpnei      	r7, 0
+    215c:	0c07      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    215e:	3530      	movi      	r5, 48
+    2160:	654a      	cmpne      	r2, r5
+    2162:	0c04      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    2164:	5b87      	subi      	r4, r3, 2
+    2166:	3330      	movi      	r3, 48
+    2168:	a460      	st.b      	r3, (r4, 0x0)
+    216a:	6d5b      	mov      	r5, r6
+    216c:	1e1c      	addi      	r6, r14, 112
+    216e:	6192      	subu      	r6, r4
+    2170:	98e8      	ld.w      	r7, (r14, 0x20)
+    2172:	6595      	cmplt      	r5, r6
+    2174:	b8a8      	st.w      	r5, (r14, 0x20)
+    2176:	0c02      	bf      	0x217a	// 217a <__v2_printf+0x63e>
+    2178:	b8c8      	st.w      	r6, (r14, 0x20)
+    217a:	3037      	movi      	r0, 55
+    217c:	1b01      	addi      	r3, r14, 4
+    217e:	600c      	addu      	r0, r3
+    2180:	8040      	ld.b      	r2, (r0, 0x0)
+    2182:	3a40      	cmpnei      	r2, 0
+    2184:	0c04      	bf      	0x218c	// 218c <__v2_printf+0x650>
+    2186:	9828      	ld.w      	r1, (r14, 0x20)
+    2188:	2100      	addi      	r1, 1
+    218a:	b828      	st.w      	r1, (r14, 0x20)
+    218c:	3002      	movi      	r0, 2
+    218e:	681c      	and      	r0, r7
+    2190:	3840      	cmpnei      	r0, 0
+    2192:	b80b      	st.w      	r0, (r14, 0x2c)
+    2194:	0c04      	bf      	0x219c	// 219c <__v2_printf+0x660>
+    2196:	9868      	ld.w      	r3, (r14, 0x20)
+    2198:	2301      	addi      	r3, 2
+    219a:	b868      	st.w      	r3, (r14, 0x20)
+    219c:	3284      	movi      	r2, 132
+    219e:	689c      	and      	r2, r7
+    21a0:	3a40      	cmpnei      	r2, 0
+    21a2:	b84c      	st.w      	r2, (r14, 0x30)
+    21a4:	080b      	bt      	0x21ba	// 21ba <__v2_printf+0x67e>
+    21a6:	3310      	movi      	r3, 16
+    21a8:	1a0c      	addi      	r2, r14, 48
+    21aa:	9827      	ld.w      	r1, (r14, 0x1c)
+    21ac:	9808      	ld.w      	r0, (r14, 0x20)
+    21ae:	60c8      	addu      	r3, r2
+    21b0:	5901      	subu      	r0, r1, r0
+    21b2:	6f4f      	mov      	r13, r3
+    21b4:	1129      	lrw      	r1, 0x5bec	// 2258 <__v2_printf+0x71c>
+    21b6:	e3fffca9 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    21ba:	3137      	movi      	r1, 55
+    21bc:	1801      	addi      	r0, r14, 4
+    21be:	6040      	addu      	r1, r0
+    21c0:	8160      	ld.b      	r3, (r1, 0x0)
+    21c2:	3b40      	cmpnei      	r3, 0
+    21c4:	0c0b      	bf      	0x21da	// 21da <__v2_printf+0x69e>
+    21c6:	9830      	ld.w      	r1, (r14, 0x40)
+    21c8:	9101      	ld.w      	r0, (r1, 0x4)
+    21ca:	b802      	st.w      	r0, (r14, 0x8)
+    21cc:	1b0c      	addi      	r3, r14, 48
+    21ce:	300b      	movi      	r0, 11
+    21d0:	9140      	ld.w      	r2, (r1, 0x0)
+    21d2:	600c      	addu      	r0, r3
+    21d4:	3101      	movi      	r1, 1
+    21d6:	9862      	ld.w      	r3, (r14, 0x8)
+    21d8:	7bcd      	jsr      	r3
+    21da:	984b      	ld.w      	r2, (r14, 0x2c)
+    21dc:	3a40      	cmpnei      	r2, 0
+    21de:	0c07      	bf      	0x21ec	// 21ec <__v2_printf+0x6b0>
+    21e0:	9830      	ld.w      	r1, (r14, 0x40)
+    21e2:	9140      	ld.w      	r2, (r1, 0x0)
+    21e4:	9161      	ld.w      	r3, (r1, 0x4)
+    21e6:	180f      	addi      	r0, r14, 60
+    21e8:	3102      	movi      	r1, 2
+    21ea:	7bcd      	jsr      	r3
+    21ec:	3080      	movi      	r0, 128
+    21ee:	984c      	ld.w      	r2, (r14, 0x30)
+    21f0:	640a      	cmpne      	r2, r0
+    21f2:	080b      	bt      	0x2208	// 2208 <__v2_printf+0x6cc>
+    21f4:	9827      	ld.w      	r1, (r14, 0x1c)
+    21f6:	9868      	ld.w      	r3, (r14, 0x20)
+    21f8:	590d      	subu      	r0, r1, r3
+    21fa:	1a0c      	addi      	r2, r14, 48
+    21fc:	3110      	movi      	r1, 16
+    21fe:	6048      	addu      	r1, r2
+    2200:	6f47      	mov      	r13, r1
+    2202:	1037      	lrw      	r1, 0x5bfc	// 225c <__v2_printf+0x720>
+    2204:	e3fffc82 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    2208:	5d19      	subu      	r0, r5, r6
+    220a:	1b0c      	addi      	r3, r14, 48
+    220c:	3510      	movi      	r5, 16
+    220e:	614c      	addu      	r5, r3
+    2210:	6f57      	mov      	r13, r5
+    2212:	6d77      	mov      	r5, r13
+    2214:	1032      	lrw      	r1, 0x5bfc	// 225c <__v2_printf+0x720>
+    2216:	e3fffc79 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    221a:	9500      	ld.w      	r0, (r5, 0x0)
+    221c:	9040      	ld.w      	r2, (r0, 0x0)
+    221e:	9061      	ld.w      	r3, (r0, 0x4)
+    2220:	6c13      	mov      	r0, r4
+    2222:	3404      	movi      	r4, 4
+    2224:	6c5b      	mov      	r1, r6
+    2226:	691c      	and      	r4, r7
+    2228:	7bcd      	jsr      	r3
+    222a:	3c40      	cmpnei      	r4, 0
+    222c:	0c08      	bf      	0x223c	// 223c <__v2_printf+0x700>
+    222e:	9828      	ld.w      	r1, (r14, 0x20)
+    2230:	98c7      	ld.w      	r6, (r14, 0x1c)
+    2232:	5e05      	subu      	r0, r6, r1
+    2234:	6f57      	mov      	r13, r5
+    2236:	1029      	lrw      	r1, 0x5bec	// 2258 <__v2_printf+0x71c>
+    2238:	e3fffc68 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    223c:	98a7      	ld.w      	r5, (r14, 0x1c)
+    223e:	9848      	ld.w      	r2, (r14, 0x20)
+    2240:	6495      	cmplt      	r5, r2
+    2242:	0c02      	bf      	0x2246	// 2246 <__v2_printf+0x70a>
+    2244:	6d4b      	mov      	r5, r2
+    2246:	9809      	ld.w      	r0, (r14, 0x24)
+    2248:	6014      	addu      	r0, r5
+    224a:	b809      	st.w      	r0, (r14, 0x24)
+    224c:	98a5      	ld.w      	r5, (r14, 0x14)
+    224e:	e800fc84 	br      	0x1b56	// 1b56 <__v2_printf+0x1a>
+    2252:	9809      	ld.w      	r0, (r14, 0x24)
+    2254:	141c      	addi      	r14, r14, 112
+    2256:	1494      	pop      	r4-r7, r15
+    2258:	00005bec 	.long	0x00005bec
+    225c:	00005bfc 	.long	0x00005bfc
+
+00002260 <__udivdi3>:
+    2260:	14d4      	push      	r4-r7, r15
+    2262:	1426      	subi      	r14, r14, 24
+    2264:	6dc7      	mov      	r7, r1
+    2266:	3b40      	cmpnei      	r3, 0
+    2268:	6d03      	mov      	r4, r0
+    226a:	6c4f      	mov      	r1, r3
+    226c:	6d8b      	mov      	r6, r2
+    226e:	b800      	st.w      	r0, (r14, 0x0)
+    2270:	6d5f      	mov      	r5, r7
+    2272:	085b      	bt      	0x2328	// 2328 <__udivdi3+0xc8>
+    2274:	649c      	cmphs      	r7, r2
+    2276:	0874      	bt      	0x235e	// 235e <__udivdi3+0xfe>
+    2278:	003d      	lrw      	r1, 0xffff	// 2600 <__udivdi3+0x3a0>
+    227a:	6484      	cmphs      	r1, r2
+    227c:	0cdc      	bf      	0x2434	// 2434 <__udivdi3+0x1d4>
+    227e:	31ff      	movi      	r1, 255
+    2280:	6484      	cmphs      	r1, r2
+    2282:	0802      	bt      	0x2286	// 2286 <__udivdi3+0x26>
+    2284:	3308      	movi      	r3, 8
+    2286:	6c4b      	mov      	r1, r2
+    2288:	704d      	lsr      	r1, r3
+    228a:	0100      	lrw      	r0, 0x5aec	// 2604 <__udivdi3+0x3a4>
+    228c:	6040      	addu      	r1, r0
+    228e:	8120      	ld.b      	r1, (r1, 0x0)
+    2290:	60c4      	addu      	r3, r1
+    2292:	3120      	movi      	r1, 32
+    2294:	604e      	subu      	r1, r3
+    2296:	3940      	cmpnei      	r1, 0
+    2298:	0c09      	bf      	0x22aa	// 22aa <__udivdi3+0x4a>
+    229a:	6d53      	mov      	r5, r4
+    229c:	7084      	lsl      	r2, r1
+    229e:	71c4      	lsl      	r7, r1
+    22a0:	714d      	lsr      	r5, r3
+    22a2:	7104      	lsl      	r4, r1
+    22a4:	6d8b      	mov      	r6, r2
+    22a6:	6d5c      	or      	r5, r7
+    22a8:	b880      	st.w      	r4, (r14, 0x0)
+    22aa:	4e90      	lsri      	r4, r6, 16
+    22ac:	6c53      	mov      	r1, r4
+    22ae:	6c17      	mov      	r0, r5
+    22b0:	e00010d4 	bsr      	0x4458	// 4458 <__umodsi3>
+    22b4:	b801      	st.w      	r0, (r14, 0x4)
+    22b6:	6c53      	mov      	r1, r4
+    22b8:	6c17      	mov      	r0, r5
+    22ba:	e00010ab 	bsr      	0x4410	// 4410 <__udivsi3>
+    22be:	75d9      	zexth      	r7, r6
+    22c0:	9861      	ld.w      	r3, (r14, 0x4)
+    22c2:	9820      	ld.w      	r1, (r14, 0x0)
+    22c4:	6c9f      	mov      	r2, r7
+    22c6:	4370      	lsli      	r3, r3, 16
+    22c8:	4930      	lsri      	r1, r1, 16
+    22ca:	7c80      	mult      	r2, r0
+    22cc:	6cc4      	or      	r3, r1
+    22ce:	648c      	cmphs      	r3, r2
+    22d0:	6d43      	mov      	r5, r0
+    22d2:	0808      	bt      	0x22e2	// 22e2 <__udivdi3+0x82>
+    22d4:	60d8      	addu      	r3, r6
+    22d6:	658c      	cmphs      	r3, r6
+    22d8:	5823      	subi      	r1, r0, 1
+    22da:	0c03      	bf      	0x22e0	// 22e0 <__udivdi3+0x80>
+    22dc:	648c      	cmphs      	r3, r2
+    22de:	0d8e      	bf      	0x25fa	// 25fa <__udivdi3+0x39a>
+    22e0:	6d47      	mov      	r5, r1
+    22e2:	60ca      	subu      	r3, r2
+    22e4:	6c53      	mov      	r1, r4
+    22e6:	6c0f      	mov      	r0, r3
+    22e8:	b862      	st.w      	r3, (r14, 0x8)
+    22ea:	e00010b7 	bsr      	0x4458	// 4458 <__umodsi3>
+    22ee:	9862      	ld.w      	r3, (r14, 0x8)
+    22f0:	b801      	st.w      	r0, (r14, 0x4)
+    22f2:	6c53      	mov      	r1, r4
+    22f4:	6c0f      	mov      	r0, r3
+    22f6:	e000108d 	bsr      	0x4410	// 4410 <__udivsi3>
+    22fa:	9841      	ld.w      	r2, (r14, 0x4)
+    22fc:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2300:	4250      	lsli      	r2, r2, 16
+    2302:	74cd      	zexth      	r3, r3
+    2304:	7dc0      	mult      	r7, r0
+    2306:	6c8c      	or      	r2, r3
+    2308:	65c8      	cmphs      	r2, r7
+    230a:	6d03      	mov      	r4, r0
+    230c:	0808      	bt      	0x231c	// 231c <__udivdi3+0xbc>
+    230e:	6098      	addu      	r2, r6
+    2310:	6588      	cmphs      	r2, r6
+    2312:	5863      	subi      	r3, r0, 1
+    2314:	0d4d      	bf      	0x25ae	// 25ae <__udivdi3+0x34e>
+    2316:	65c8      	cmphs      	r2, r7
+    2318:	094b      	bt      	0x25ae	// 25ae <__udivdi3+0x34e>
+    231a:	2c01      	subi      	r4, 2
+    231c:	4510      	lsli      	r0, r5, 16
+    231e:	3700      	movi      	r7, 0
+    2320:	6c10      	or      	r0, r4
+    2322:	6c5f      	mov      	r1, r7
+    2324:	1406      	addi      	r14, r14, 24
+    2326:	1494      	pop      	r4-r7, r15
+    2328:	64dc      	cmphs      	r7, r3
+    232a:	0c76      	bf      	0x2416	// 2416 <__udivdi3+0x1b6>
+    232c:	026a      	lrw      	r3, 0xffff	// 2600 <__udivdi3+0x3a0>
+    232e:	644c      	cmphs      	r3, r1
+    2330:	0878      	bt      	0x2420	// 2420 <__udivdi3+0x1c0>
+    2332:	0269      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2334:	644c      	cmphs      	r3, r1
+    2336:	0d48      	bf      	0x25c6	// 25c6 <__udivdi3+0x366>
+    2338:	3610      	movi      	r6, 16
+    233a:	6cc7      	mov      	r3, r1
+    233c:	70d9      	lsr      	r3, r6
+    233e:	020d      	lrw      	r0, 0x5aec	// 2604 <__udivdi3+0x3a4>
+    2340:	60c0      	addu      	r3, r0
+    2342:	8360      	ld.b      	r3, (r3, 0x0)
+    2344:	618c      	addu      	r6, r3
+    2346:	3020      	movi      	r0, 32
+    2348:	5879      	subu      	r3, r0, r6
+    234a:	3b40      	cmpnei      	r3, 0
+    234c:	b860      	st.w      	r3, (r14, 0x0)
+    234e:	0878      	bt      	0x243e	// 243e <__udivdi3+0x1de>
+    2350:	65c4      	cmphs      	r1, r7
+    2352:	0d40      	bf      	0x25d2	// 25d2 <__udivdi3+0x372>
+    2354:	6490      	cmphs      	r4, r2
+    2356:	6c0f      	mov      	r0, r3
+    2358:	600d      	addc      	r0, r3
+    235a:	3700      	movi      	r7, 0
+    235c:	045f      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    235e:	3a40      	cmpnei      	r2, 0
+    2360:	0808      	bt      	0x2370	// 2370 <__udivdi3+0x110>
+    2362:	3100      	movi      	r1, 0
+    2364:	3001      	movi      	r0, 1
+    2366:	b861      	st.w      	r3, (r14, 0x4)
+    2368:	e0001054 	bsr      	0x4410	// 4410 <__udivsi3>
+    236c:	6d83      	mov      	r6, r0
+    236e:	9861      	ld.w      	r3, (r14, 0x4)
+    2370:	025b      	lrw      	r2, 0xffff	// 2600 <__udivdi3+0x3a0>
+    2372:	6588      	cmphs      	r2, r6
+    2374:	085b      	bt      	0x242a	// 242a <__udivdi3+0x1ca>
+    2376:	027a      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2378:	658c      	cmphs      	r3, r6
+    237a:	0d28      	bf      	0x25ca	// 25ca <__udivdi3+0x36a>
+    237c:	3310      	movi      	r3, 16
+    237e:	6c9b      	mov      	r2, r6
+    2380:	023e      	lrw      	r1, 0x5aec	// 2604 <__udivdi3+0x3a4>
+    2382:	708d      	lsr      	r2, r3
+    2384:	6084      	addu      	r2, r1
+    2386:	8240      	ld.b      	r2, (r2, 0x0)
+    2388:	5a2c      	addu      	r1, r2, r3
+    238a:	3220      	movi      	r2, 32
+    238c:	6086      	subu      	r2, r1
+    238e:	3a40      	cmpnei      	r2, 0
+    2390:	08c0      	bt      	0x2510	// 2510 <__udivdi3+0x2b0>
+    2392:	74d9      	zexth      	r3, r6
+    2394:	5f99      	subu      	r4, r7, r6
+    2396:	4eb0      	lsri      	r5, r6, 16
+    2398:	b861      	st.w      	r3, (r14, 0x4)
+    239a:	3701      	movi      	r7, 1
+    239c:	6c57      	mov      	r1, r5
+    239e:	6c13      	mov      	r0, r4
+    23a0:	e000105c 	bsr      	0x4458	// 4458 <__umodsi3>
+    23a4:	b802      	st.w      	r0, (r14, 0x8)
+    23a6:	6c57      	mov      	r1, r5
+    23a8:	6c13      	mov      	r0, r4
+    23aa:	e0001033 	bsr      	0x4410	// 4410 <__udivsi3>
+    23ae:	9862      	ld.w      	r3, (r14, 0x8)
+    23b0:	4330      	lsli      	r1, r3, 16
+    23b2:	9860      	ld.w      	r3, (r14, 0x0)
+    23b4:	9841      	ld.w      	r2, (r14, 0x4)
+    23b6:	4b70      	lsri      	r3, r3, 16
+    23b8:	7c80      	mult      	r2, r0
+    23ba:	6cc4      	or      	r3, r1
+    23bc:	648c      	cmphs      	r3, r2
+    23be:	6d03      	mov      	r4, r0
+    23c0:	0808      	bt      	0x23d0	// 23d0 <__udivdi3+0x170>
+    23c2:	60d8      	addu      	r3, r6
+    23c4:	658c      	cmphs      	r3, r6
+    23c6:	5823      	subi      	r1, r0, 1
+    23c8:	0c03      	bf      	0x23ce	// 23ce <__udivdi3+0x16e>
+    23ca:	648c      	cmphs      	r3, r2
+    23cc:	0d14      	bf      	0x25f4	// 25f4 <__udivdi3+0x394>
+    23ce:	6d07      	mov      	r4, r1
+    23d0:	60ca      	subu      	r3, r2
+    23d2:	6c57      	mov      	r1, r5
+    23d4:	6c0f      	mov      	r0, r3
+    23d6:	b863      	st.w      	r3, (r14, 0xc)
+    23d8:	e0001040 	bsr      	0x4458	// 4458 <__umodsi3>
+    23dc:	9863      	ld.w      	r3, (r14, 0xc)
+    23de:	6c57      	mov      	r1, r5
+    23e0:	b802      	st.w      	r0, (r14, 0x8)
+    23e2:	6c0f      	mov      	r0, r3
+    23e4:	e0001016 	bsr      	0x4410	// 4410 <__udivsi3>
+    23e8:	9842      	ld.w      	r2, (r14, 0x8)
+    23ea:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    23ee:	9821      	ld.w      	r1, (r14, 0x4)
+    23f0:	4250      	lsli      	r2, r2, 16
+    23f2:	74cd      	zexth      	r3, r3
+    23f4:	7c40      	mult      	r1, r0
+    23f6:	6cc8      	or      	r3, r2
+    23f8:	644c      	cmphs      	r3, r1
+    23fa:	6d43      	mov      	r5, r0
+    23fc:	0808      	bt      	0x240c	// 240c <__udivdi3+0x1ac>
+    23fe:	60d8      	addu      	r3, r6
+    2400:	658c      	cmphs      	r3, r6
+    2402:	5843      	subi      	r2, r0, 1
+    2404:	0cd3      	bf      	0x25aa	// 25aa <__udivdi3+0x34a>
+    2406:	644c      	cmphs      	r3, r1
+    2408:	08d1      	bt      	0x25aa	// 25aa <__udivdi3+0x34a>
+    240a:	2d01      	subi      	r5, 2
+    240c:	4410      	lsli      	r0, r4, 16
+    240e:	6c14      	or      	r0, r5
+    2410:	6c5f      	mov      	r1, r7
+    2412:	1406      	addi      	r14, r14, 24
+    2414:	1494      	pop      	r4-r7, r15
+    2416:	3700      	movi      	r7, 0
+    2418:	3000      	movi      	r0, 0
+    241a:	6c5f      	mov      	r1, r7
+    241c:	1406      	addi      	r14, r14, 24
+    241e:	1494      	pop      	r4-r7, r15
+    2420:	33ff      	movi      	r3, 255
+    2422:	644c      	cmphs      	r3, r1
+    2424:	6583      	mvcv      	r6
+    2426:	46c3      	lsli      	r6, r6, 3
+    2428:	0789      	br      	0x233a	// 233a <__udivdi3+0xda>
+    242a:	32ff      	movi      	r2, 255
+    242c:	6588      	cmphs      	r2, r6
+    242e:	0ba8      	bt      	0x237e	// 237e <__udivdi3+0x11e>
+    2430:	3308      	movi      	r3, 8
+    2432:	07a6      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    2434:	1375      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2436:	648c      	cmphs      	r3, r2
+    2438:	0ccb      	bf      	0x25ce	// 25ce <__udivdi3+0x36e>
+    243a:	3310      	movi      	r3, 16
+    243c:	0725      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    243e:	9800      	ld.w      	r0, (r14, 0x0)
+    2440:	6ccb      	mov      	r3, r2
+    2442:	6d4b      	mov      	r5, r2
+    2444:	7040      	lsl      	r1, r0
+    2446:	7140      	lsl      	r5, r0
+    2448:	70d9      	lsr      	r3, r6
+    244a:	6cc4      	or      	r3, r1
+    244c:	b8a3      	st.w      	r5, (r14, 0xc)
+    244e:	6d53      	mov      	r5, r4
+    2450:	6c4f      	mov      	r1, r3
+    2452:	7159      	lsr      	r5, r6
+    2454:	6cdf      	mov      	r3, r7
+    2456:	71c0      	lsl      	r7, r0
+    2458:	6d5c      	or      	r5, r7
+    245a:	70d9      	lsr      	r3, r6
+    245c:	b8a1      	st.w      	r5, (r14, 0x4)
+    245e:	49b0      	lsri      	r5, r1, 16
+    2460:	b822      	st.w      	r1, (r14, 0x8)
+    2462:	75c5      	zexth      	r7, r1
+    2464:	6c0f      	mov      	r0, r3
+    2466:	6c57      	mov      	r1, r5
+    2468:	b864      	st.w      	r3, (r14, 0x10)
+    246a:	e0000ff7 	bsr      	0x4458	// 4458 <__umodsi3>
+    246e:	9864      	ld.w      	r3, (r14, 0x10)
+    2470:	6d83      	mov      	r6, r0
+    2472:	6c57      	mov      	r1, r5
+    2474:	6c0f      	mov      	r0, r3
+    2476:	e0000fcd 	bsr      	0x4410	// 4410 <__udivsi3>
+    247a:	6c5f      	mov      	r1, r7
+    247c:	7c40      	mult      	r1, r0
+    247e:	6c87      	mov      	r2, r1
+    2480:	4630      	lsli      	r1, r6, 16
+    2482:	98c1      	ld.w      	r6, (r14, 0x4)
+    2484:	4ed0      	lsri      	r6, r6, 16
+    2486:	6d84      	or      	r6, r1
+    2488:	6498      	cmphs      	r6, r2
+    248a:	6cc3      	mov      	r3, r0
+    248c:	0807      	bt      	0x249a	// 249a <__udivdi3+0x23a>
+    248e:	5823      	subi      	r1, r0, 1
+    2490:	9802      	ld.w      	r0, (r14, 0x8)
+    2492:	6180      	addu      	r6, r0
+    2494:	6418      	cmphs      	r6, r0
+    2496:	08a6      	bt      	0x25e2	// 25e2 <__udivdi3+0x382>
+    2498:	6cc7      	mov      	r3, r1
+    249a:	618a      	subu      	r6, r2
+    249c:	6c57      	mov      	r1, r5
+    249e:	6c1b      	mov      	r0, r6
+    24a0:	b865      	st.w      	r3, (r14, 0x14)
+    24a2:	e0000fdb 	bsr      	0x4458	// 4458 <__umodsi3>
+    24a6:	b804      	st.w      	r0, (r14, 0x10)
+    24a8:	6c57      	mov      	r1, r5
+    24aa:	6c1b      	mov      	r0, r6
+    24ac:	e0000fb2 	bsr      	0x4410	// 4410 <__udivsi3>
+    24b0:	9864      	ld.w      	r3, (r14, 0x10)
+    24b2:	6c9f      	mov      	r2, r7
+    24b4:	43f0      	lsli      	r7, r3, 16
+    24b6:	d86e1002 	ld.h      	r3, (r14, 0x4)
+    24ba:	744d      	zexth      	r1, r3
+    24bc:	7c80      	mult      	r2, r0
+    24be:	6dc4      	or      	r7, r1
+    24c0:	649c      	cmphs      	r7, r2
+    24c2:	9865      	ld.w      	r3, (r14, 0x14)
+    24c4:	0807      	bt      	0x24d2	// 24d2 <__udivdi3+0x272>
+    24c6:	98a2      	ld.w      	r5, (r14, 0x8)
+    24c8:	61d4      	addu      	r7, r5
+    24ca:	655c      	cmphs      	r7, r5
+    24cc:	5823      	subi      	r1, r0, 1
+    24ce:	0885      	bt      	0x25d8	// 25d8 <__udivdi3+0x378>
+    24d0:	6c07      	mov      	r0, r1
+    24d2:	4370      	lsli      	r3, r3, 16
+    24d4:	6c0c      	or      	r0, r3
+    24d6:	74c1      	zexth      	r3, r0
+    24d8:	61ca      	subu      	r7, r2
+    24da:	9843      	ld.w      	r2, (r14, 0xc)
+    24dc:	7549      	zexth      	r5, r2
+    24de:	4830      	lsri      	r1, r0, 16
+    24e0:	4a50      	lsri      	r2, r2, 16
+    24e2:	6d8f      	mov      	r6, r3
+    24e4:	7d94      	mult      	r6, r5
+    24e6:	7cc8      	mult      	r3, r2
+    24e8:	7d44      	mult      	r5, r1
+    24ea:	60d4      	addu      	r3, r5
+    24ec:	7c48      	mult      	r1, r2
+    24ee:	4e50      	lsri      	r2, r6, 16
+    24f0:	60c8      	addu      	r3, r2
+    24f2:	654c      	cmphs      	r3, r5
+    24f4:	0804      	bt      	0x24fc	// 24fc <__udivdi3+0x29c>
+    24f6:	3280      	movi      	r2, 128
+    24f8:	4249      	lsli      	r2, r2, 9
+    24fa:	6048      	addu      	r1, r2
+    24fc:	4b50      	lsri      	r2, r3, 16
+    24fe:	6048      	addu      	r1, r2
+    2500:	645c      	cmphs      	r7, r1
+    2502:	0c5f      	bf      	0x25c0	// 25c0 <__udivdi3+0x360>
+    2504:	645e      	cmpne      	r7, r1
+    2506:	0c56      	bf      	0x25b2	// 25b2 <__udivdi3+0x352>
+    2508:	3700      	movi      	r7, 0
+    250a:	6c5f      	mov      	r1, r7
+    250c:	1406      	addi      	r14, r14, 24
+    250e:	1494      	pop      	r4-r7, r15
+    2510:	6d53      	mov      	r5, r4
+    2512:	6cdf      	mov      	r3, r7
+    2514:	7145      	lsr      	r5, r1
+    2516:	71c8      	lsl      	r7, r2
+    2518:	7188      	lsl      	r6, r2
+    251a:	6d5c      	or      	r5, r7
+    251c:	70c5      	lsr      	r3, r1
+    251e:	6dd7      	mov      	r7, r5
+    2520:	b8a3      	st.w      	r5, (r14, 0xc)
+    2522:	4eb0      	lsri      	r5, r6, 16
+    2524:	7108      	lsl      	r4, r2
+    2526:	6c57      	mov      	r1, r5
+    2528:	7499      	zexth      	r2, r6
+    252a:	6c0f      	mov      	r0, r3
+    252c:	b841      	st.w      	r2, (r14, 0x4)
+    252e:	b880      	st.w      	r4, (r14, 0x0)
+    2530:	b862      	st.w      	r3, (r14, 0x8)
+    2532:	e0000f93 	bsr      	0x4458	// 4458 <__umodsi3>
+    2536:	9862      	ld.w      	r3, (r14, 0x8)
+    2538:	6d03      	mov      	r4, r0
+    253a:	6c57      	mov      	r1, r5
+    253c:	6c0f      	mov      	r0, r3
+    253e:	e0000f69 	bsr      	0x4410	// 4410 <__udivsi3>
+    2542:	6cc3      	mov      	r3, r0
+    2544:	7499      	zexth      	r2, r6
+    2546:	7cc8      	mult      	r3, r2
+    2548:	4450      	lsli      	r2, r4, 16
+    254a:	4f90      	lsri      	r4, r7, 16
+    254c:	6d08      	or      	r4, r2
+    254e:	64d0      	cmphs      	r4, r3
+    2550:	6c43      	mov      	r1, r0
+    2552:	b802      	st.w      	r0, (r14, 0x8)
+    2554:	080b      	bt      	0x256a	// 256a <__udivdi3+0x30a>
+    2556:	6118      	addu      	r4, r6
+    2558:	6c87      	mov      	r2, r1
+    255a:	6590      	cmphs      	r4, r6
+    255c:	2a00      	subi      	r2, 1
+    255e:	0c49      	bf      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2560:	64d0      	cmphs      	r4, r3
+    2562:	0847      	bt      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2564:	2a00      	subi      	r2, 1
+    2566:	b842      	st.w      	r2, (r14, 0x8)
+    2568:	6118      	addu      	r4, r6
+    256a:	610e      	subu      	r4, r3
+    256c:	6c57      	mov      	r1, r5
+    256e:	6c13      	mov      	r0, r4
+    2570:	e0000f74 	bsr      	0x4458	// 4458 <__umodsi3>
+    2574:	6dc3      	mov      	r7, r0
+    2576:	6c57      	mov      	r1, r5
+    2578:	6c13      	mov      	r0, r4
+    257a:	e0000f4b 	bsr      	0x4410	// 4410 <__udivsi3>
+    257e:	d84e1006 	ld.h      	r2, (r14, 0xc)
+    2582:	74d9      	zexth      	r3, r6
+    2584:	47f0      	lsli      	r7, r7, 16
+    2586:	7509      	zexth      	r4, r2
+    2588:	7cc0      	mult      	r3, r0
+    258a:	6dd0      	or      	r7, r4
+    258c:	64dc      	cmphs      	r7, r3
+    258e:	0809      	bt      	0x25a0	// 25a0 <__udivdi3+0x340>
+    2590:	61d8      	addu      	r7, r6
+    2592:	659c      	cmphs      	r7, r6
+    2594:	5843      	subi      	r2, r0, 1
+    2596:	0c2b      	bf      	0x25ec	// 25ec <__udivdi3+0x38c>
+    2598:	64dc      	cmphs      	r7, r3
+    259a:	0829      	bt      	0x25ec	// 25ec <__udivdi3+0x38c>
+    259c:	2801      	subi      	r0, 2
+    259e:	61d8      	addu      	r7, r6
+    25a0:	5f8d      	subu      	r4, r7, r3
+    25a2:	9862      	ld.w      	r3, (r14, 0x8)
+    25a4:	43f0      	lsli      	r7, r3, 16
+    25a6:	6dc0      	or      	r7, r0
+    25a8:	06fa      	br      	0x239c	// 239c <__udivdi3+0x13c>
+    25aa:	6d4b      	mov      	r5, r2
+    25ac:	0730      	br      	0x240c	// 240c <__udivdi3+0x1ac>
+    25ae:	6d0f      	mov      	r4, r3
+    25b0:	06b6      	br      	0x231c	// 231c <__udivdi3+0xbc>
+    25b2:	9840      	ld.w      	r2, (r14, 0x0)
+    25b4:	4370      	lsli      	r3, r3, 16
+    25b6:	7599      	zexth      	r6, r6
+    25b8:	7108      	lsl      	r4, r2
+    25ba:	60d8      	addu      	r3, r6
+    25bc:	64d0      	cmphs      	r4, r3
+    25be:	0ba5      	bt      	0x2508	// 2508 <__udivdi3+0x2a8>
+    25c0:	2800      	subi      	r0, 1
+    25c2:	3700      	movi      	r7, 0
+    25c4:	07a3      	br      	0x250a	// 250a <__udivdi3+0x2aa>
+    25c6:	3618      	movi      	r6, 24
+    25c8:	06b9      	br      	0x233a	// 233a <__udivdi3+0xda>
+    25ca:	3318      	movi      	r3, 24
+    25cc:	06d9      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    25ce:	3318      	movi      	r3, 24
+    25d0:	065b      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    25d2:	3700      	movi      	r7, 0
+    25d4:	3001      	movi      	r0, 1
+    25d6:	0722      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    25d8:	649c      	cmphs      	r7, r2
+    25da:	0b7b      	bt      	0x24d0	// 24d0 <__udivdi3+0x270>
+    25dc:	2801      	subi      	r0, 2
+    25de:	61d4      	addu      	r7, r5
+    25e0:	0779      	br      	0x24d2	// 24d2 <__udivdi3+0x272>
+    25e2:	6498      	cmphs      	r6, r2
+    25e4:	0b5a      	bt      	0x2498	// 2498 <__udivdi3+0x238>
+    25e6:	2b01      	subi      	r3, 2
+    25e8:	6180      	addu      	r6, r0
+    25ea:	0758      	br      	0x249a	// 249a <__udivdi3+0x23a>
+    25ec:	6c0b      	mov      	r0, r2
+    25ee:	07d9      	br      	0x25a0	// 25a0 <__udivdi3+0x340>
+    25f0:	b842      	st.w      	r2, (r14, 0x8)
+    25f2:	07bc      	br      	0x256a	// 256a <__udivdi3+0x30a>
+    25f4:	2c01      	subi      	r4, 2
+    25f6:	60d8      	addu      	r3, r6
+    25f8:	06ec      	br      	0x23d0	// 23d0 <__udivdi3+0x170>
+    25fa:	2d01      	subi      	r5, 2
+    25fc:	60d8      	addu      	r3, r6
+    25fe:	0672      	br      	0x22e2	// 22e2 <__udivdi3+0x82>
+    2600:	0000ffff 	.long	0x0000ffff
+    2604:	00005aec 	.long	0x00005aec
+    2608:	00ffffff 	.long	0x00ffffff
+
+0000260c <__umoddi3>:
+    260c:	14d4      	push      	r4-r7, r15
+    260e:	1427      	subi      	r14, r14, 28
+    2610:	6d07      	mov      	r4, r1
+    2612:	6c4f      	mov      	r1, r3
+    2614:	6d43      	mov      	r5, r0
+    2616:	3940      	cmpnei      	r1, 0
+    2618:	6dcf      	mov      	r7, r3
+    261a:	6c0b      	mov      	r0, r2
+    261c:	b8a0      	st.w      	r5, (r14, 0x0)
+    261e:	6cd3      	mov      	r3, r4
+    2620:	085a      	bt      	0x26d4	// 26d4 <__umoddi3+0xc8>
+    2622:	6490      	cmphs      	r4, r2
+    2624:	0877      	bt      	0x2712	// 2712 <__umoddi3+0x106>
+    2626:	0120      	lrw      	r1, 0xffff	// 29a0 <__umoddi3+0x394>
+    2628:	6484      	cmphs      	r1, r2
+    262a:	0cd2      	bf      	0x27ce	// 27ce <__umoddi3+0x1c2>
+    262c:	31ff      	movi      	r1, 255
+    262e:	6484      	cmphs      	r1, r2
+    2630:	0802      	bt      	0x2634	// 2634 <__umoddi3+0x28>
+    2632:	3708      	movi      	r7, 8
+    2634:	6c43      	mov      	r1, r0
+    2636:	705d      	lsr      	r1, r7
+    2638:	01c4      	lrw      	r6, 0x5aec	// 29a4 <__umoddi3+0x398>
+    263a:	6058      	addu      	r1, r6
+    263c:	8120      	ld.b      	r1, (r1, 0x0)
+    263e:	61c4      	addu      	r7, r1
+    2640:	3120      	movi      	r1, 32
+    2642:	605e      	subu      	r1, r7
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	b821      	st.w      	r1, (r14, 0x4)
+    2648:	0c09      	bf      	0x265a	// 265a <__umoddi3+0x4e>
+    264a:	6cd7      	mov      	r3, r5
+    264c:	6c83      	mov      	r2, r0
+    264e:	7104      	lsl      	r4, r1
+    2650:	70dd      	lsr      	r3, r7
+    2652:	7144      	lsl      	r5, r1
+    2654:	7084      	lsl      	r2, r1
+    2656:	6cd0      	or      	r3, r4
+    2658:	b8a0      	st.w      	r5, (r14, 0x0)
+    265a:	4a90      	lsri      	r4, r2, 16
+    265c:	6c53      	mov      	r1, r4
+    265e:	6c0f      	mov      	r0, r3
+    2660:	75c9      	zexth      	r7, r2
+    2662:	b843      	st.w      	r2, (r14, 0xc)
+    2664:	b862      	st.w      	r3, (r14, 0x8)
+    2666:	e0000ef9 	bsr      	0x4458	// 4458 <__umodsi3>
+    266a:	9862      	ld.w      	r3, (r14, 0x8)
+    266c:	6d43      	mov      	r5, r0
+    266e:	6c53      	mov      	r1, r4
+    2670:	6c0f      	mov      	r0, r3
+    2672:	e0000ecf 	bsr      	0x4410	// 4410 <__udivsi3>
+    2676:	9840      	ld.w      	r2, (r14, 0x0)
+    2678:	4570      	lsli      	r3, r5, 16
+    267a:	4ab0      	lsri      	r5, r2, 16
+    267c:	7c1c      	mult      	r0, r7
+    267e:	6cd4      	or      	r3, r5
+    2680:	640c      	cmphs      	r3, r0
+    2682:	9843      	ld.w      	r2, (r14, 0xc)
+    2684:	0806      	bt      	0x2690	// 2690 <__umoddi3+0x84>
+    2686:	60c8      	addu      	r3, r2
+    2688:	648c      	cmphs      	r3, r2
+    268a:	0c03      	bf      	0x2690	// 2690 <__umoddi3+0x84>
+    268c:	640c      	cmphs      	r3, r0
+    268e:	0d7d      	bf      	0x2988	// 2988 <__umoddi3+0x37c>
+    2690:	60c2      	subu      	r3, r0
+    2692:	6c53      	mov      	r1, r4
+    2694:	6c0f      	mov      	r0, r3
+    2696:	b843      	st.w      	r2, (r14, 0xc)
+    2698:	b862      	st.w      	r3, (r14, 0x8)
+    269a:	e0000edf 	bsr      	0x4458	// 4458 <__umodsi3>
+    269e:	9862      	ld.w      	r3, (r14, 0x8)
+    26a0:	6d43      	mov      	r5, r0
+    26a2:	6c53      	mov      	r1, r4
+    26a4:	6c0f      	mov      	r0, r3
+    26a6:	e0000eb5 	bsr      	0x4410	// 4410 <__udivsi3>
+    26aa:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    26ae:	7dc0      	mult      	r7, r0
+    26b0:	45b0      	lsli      	r5, r5, 16
+    26b2:	740d      	zexth      	r0, r3
+    26b4:	6d40      	or      	r5, r0
+    26b6:	65d4      	cmphs      	r5, r7
+    26b8:	0807      	bt      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26ba:	9843      	ld.w      	r2, (r14, 0xc)
+    26bc:	6148      	addu      	r5, r2
+    26be:	6494      	cmphs      	r5, r2
+    26c0:	0c03      	bf      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26c2:	65d4      	cmphs      	r5, r7
+    26c4:	0d5e      	bf      	0x2980	// 2980 <__umoddi3+0x374>
+    26c6:	615e      	subu      	r5, r7
+    26c8:	6c17      	mov      	r0, r5
+    26ca:	9861      	ld.w      	r3, (r14, 0x4)
+    26cc:	700d      	lsr      	r0, r3
+    26ce:	3100      	movi      	r1, 0
+    26d0:	1407      	addi      	r14, r14, 28
+    26d2:	1494      	pop      	r4-r7, r15
+    26d4:	6450      	cmphs      	r4, r1
+    26d6:	0c6e      	bf      	0x27b2	// 27b2 <__umoddi3+0x1a6>
+    26d8:	024d      	lrw      	r2, 0xffff	// 29a0 <__umoddi3+0x394>
+    26da:	6448      	cmphs      	r2, r1
+    26dc:	086f      	bt      	0x27ba	// 27ba <__umoddi3+0x1ae>
+    26de:	024c      	lrw      	r2, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    26e0:	6448      	cmphs      	r2, r1
+    26e2:	0d3f      	bf      	0x2960	// 2960 <__umoddi3+0x354>
+    26e4:	3610      	movi      	r6, 16
+    26e6:	6c87      	mov      	r2, r1
+    26e8:	7099      	lsr      	r2, r6
+    26ea:	02f0      	lrw      	r7, 0x5aec	// 29a4 <__umoddi3+0x398>
+    26ec:	609c      	addu      	r2, r7
+    26ee:	8240      	ld.b      	r2, (r2, 0x0)
+    26f0:	6188      	addu      	r6, r2
+    26f2:	3720      	movi      	r7, 32
+    26f4:	61da      	subu      	r7, r6
+    26f6:	3f40      	cmpnei      	r7, 0
+    26f8:	0870      	bt      	0x27d8	// 27d8 <__umoddi3+0x1cc>
+    26fa:	6504      	cmphs      	r1, r4
+    26fc:	0c03      	bf      	0x2702	// 2702 <__umoddi3+0xf6>
+    26fe:	6414      	cmphs      	r5, r0
+    2700:	0d46      	bf      	0x298c	// 298c <__umoddi3+0x380>
+    2702:	5d01      	subu      	r0, r5, r0
+    2704:	6414      	cmphs      	r5, r0
+    2706:	6106      	subu      	r4, r1
+    2708:	6483      	mvcv      	r2
+    270a:	5c69      	subu      	r3, r4, r2
+    270c:	6c4f      	mov      	r1, r3
+    270e:	1407      	addi      	r14, r14, 28
+    2710:	1494      	pop      	r4-r7, r15
+    2712:	3a40      	cmpnei      	r2, 0
+    2714:	0806      	bt      	0x2720	// 2720 <__umoddi3+0x114>
+    2716:	3100      	movi      	r1, 0
+    2718:	3001      	movi      	r0, 1
+    271a:	e0000e7b 	bsr      	0x4410	// 4410 <__udivsi3>
+    271e:	6c83      	mov      	r2, r0
+    2720:	027f      	lrw      	r3, 0xffff	// 29a0 <__umoddi3+0x394>
+    2722:	648c      	cmphs      	r3, r2
+    2724:	0850      	bt      	0x27c4	// 27c4 <__umoddi3+0x1b8>
+    2726:	027e      	lrw      	r3, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    2728:	648c      	cmphs      	r3, r2
+    272a:	0d1d      	bf      	0x2964	// 2964 <__umoddi3+0x358>
+    272c:	3710      	movi      	r7, 16
+    272e:	6ccb      	mov      	r3, r2
+    2730:	70dd      	lsr      	r3, r7
+    2732:	0322      	lrw      	r1, 0x5aec	// 29a4 <__umoddi3+0x398>
+    2734:	60c4      	addu      	r3, r1
+    2736:	8360      	ld.b      	r3, (r3, 0x0)
+    2738:	61cc      	addu      	r7, r3
+    273a:	3320      	movi      	r3, 32
+    273c:	60de      	subu      	r3, r7
+    273e:	3b40      	cmpnei      	r3, 0
+    2740:	b861      	st.w      	r3, (r14, 0x4)
+    2742:	08c2      	bt      	0x28c6	// 28c6 <__umoddi3+0x2ba>
+    2744:	74c9      	zexth      	r3, r2
+    2746:	610a      	subu      	r4, r2
+    2748:	4af0      	lsri      	r7, r2, 16
+    274a:	6d8f      	mov      	r6, r3
+    274c:	6c5f      	mov      	r1, r7
+    274e:	6c13      	mov      	r0, r4
+    2750:	b842      	st.w      	r2, (r14, 0x8)
+    2752:	e0000e83 	bsr      	0x4458	// 4458 <__umodsi3>
+    2756:	6d43      	mov      	r5, r0
+    2758:	6c5f      	mov      	r1, r7
+    275a:	6c13      	mov      	r0, r4
+    275c:	e0000e5a 	bsr      	0x4410	// 4410 <__udivsi3>
+    2760:	9860      	ld.w      	r3, (r14, 0x0)
+    2762:	4590      	lsli      	r4, r5, 16
+    2764:	4bb0      	lsri      	r5, r3, 16
+    2766:	7c18      	mult      	r0, r6
+    2768:	6d14      	or      	r4, r5
+    276a:	6410      	cmphs      	r4, r0
+    276c:	9842      	ld.w      	r2, (r14, 0x8)
+    276e:	0806      	bt      	0x277a	// 277a <__umoddi3+0x16e>
+    2770:	6108      	addu      	r4, r2
+    2772:	6490      	cmphs      	r4, r2
+    2774:	0c03      	bf      	0x277a	// 277a <__umoddi3+0x16e>
+    2776:	6410      	cmphs      	r4, r0
+    2778:	0d06      	bf      	0x2984	// 2984 <__umoddi3+0x378>
+    277a:	6102      	subu      	r4, r0
+    277c:	6c5f      	mov      	r1, r7
+    277e:	6c13      	mov      	r0, r4
+    2780:	b842      	st.w      	r2, (r14, 0x8)
+    2782:	e0000e6b 	bsr      	0x4458	// 4458 <__umodsi3>
+    2786:	6d43      	mov      	r5, r0
+    2788:	6c5f      	mov      	r1, r7
+    278a:	6c13      	mov      	r0, r4
+    278c:	e0000e42 	bsr      	0x4410	// 4410 <__udivsi3>
+    2790:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2794:	7c18      	mult      	r0, r6
+    2796:	45b0      	lsli      	r5, r5, 16
+    2798:	758d      	zexth      	r6, r3
+    279a:	6d58      	or      	r5, r6
+    279c:	6414      	cmphs      	r5, r0
+    279e:	0808      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a0:	9842      	ld.w      	r2, (r14, 0x8)
+    27a2:	6148      	addu      	r5, r2
+    27a4:	6494      	cmphs      	r5, r2
+    27a6:	0c04      	bf      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a8:	6414      	cmphs      	r5, r0
+    27aa:	0802      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27ac:	6148      	addu      	r5, r2
+    27ae:	6142      	subu      	r5, r0
+    27b0:	078c      	br      	0x26c8	// 26c8 <__umoddi3+0xbc>
+    27b2:	6c17      	mov      	r0, r5
+    27b4:	6c53      	mov      	r1, r4
+    27b6:	1407      	addi      	r14, r14, 28
+    27b8:	1494      	pop      	r4-r7, r15
+    27ba:	32ff      	movi      	r2, 255
+    27bc:	6448      	cmphs      	r2, r1
+    27be:	6583      	mvcv      	r6
+    27c0:	46c3      	lsli      	r6, r6, 3
+    27c2:	0792      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    27c4:	33ff      	movi      	r3, 255
+    27c6:	648c      	cmphs      	r3, r2
+    27c8:	0bb3      	bt      	0x272e	// 272e <__umoddi3+0x122>
+    27ca:	3708      	movi      	r7, 8
+    27cc:	07b1      	br      	0x272e	// 272e <__umoddi3+0x122>
+    27ce:	1337      	lrw      	r1, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    27d0:	6484      	cmphs      	r1, r2
+    27d2:	0ccb      	bf      	0x2968	// 2968 <__umoddi3+0x35c>
+    27d4:	3710      	movi      	r7, 16
+    27d6:	072f      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    27d8:	6cc3      	mov      	r3, r0
+    27da:	705c      	lsl      	r1, r7
+    27dc:	70d9      	lsr      	r3, r6
+    27de:	6cc4      	or      	r3, r1
+    27e0:	6c57      	mov      	r1, r5
+    27e2:	6c93      	mov      	r2, r4
+    27e4:	7059      	lsr      	r1, r6
+    27e6:	711c      	lsl      	r4, r7
+    27e8:	7099      	lsr      	r2, r6
+    27ea:	6c50      	or      	r1, r4
+    27ec:	701c      	lsl      	r0, r7
+    27ee:	4b90      	lsri      	r4, r3, 16
+    27f0:	715c      	lsl      	r5, r7
+    27f2:	b803      	st.w      	r0, (r14, 0xc)
+    27f4:	b820      	st.w      	r1, (r14, 0x0)
+    27f6:	b8a4      	st.w      	r5, (r14, 0x10)
+    27f8:	6c53      	mov      	r1, r4
+    27fa:	754d      	zexth      	r5, r3
+    27fc:	6c0b      	mov      	r0, r2
+    27fe:	b862      	st.w      	r3, (r14, 0x8)
+    2800:	b8a1      	st.w      	r5, (r14, 0x4)
+    2802:	b846      	st.w      	r2, (r14, 0x18)
+    2804:	e0000e2a 	bsr      	0x4458	// 4458 <__umodsi3>
+    2808:	9846      	ld.w      	r2, (r14, 0x18)
+    280a:	b805      	st.w      	r0, (r14, 0x14)
+    280c:	6c53      	mov      	r1, r4
+    280e:	6c0b      	mov      	r0, r2
+    2810:	e0000e00 	bsr      	0x4410	// 4410 <__udivsi3>
+    2814:	9841      	ld.w      	r2, (r14, 0x4)
+    2816:	7c80      	mult      	r2, r0
+    2818:	9865      	ld.w      	r3, (r14, 0x14)
+    281a:	6d43      	mov      	r5, r0
+    281c:	9800      	ld.w      	r0, (r14, 0x0)
+    281e:	4330      	lsli      	r1, r3, 16
+    2820:	4870      	lsri      	r3, r0, 16
+    2822:	6cc4      	or      	r3, r1
+    2824:	648c      	cmphs      	r3, r2
+    2826:	0807      	bt      	0x2834	// 2834 <__umoddi3+0x228>
+    2828:	9802      	ld.w      	r0, (r14, 0x8)
+    282a:	60c0      	addu      	r3, r0
+    282c:	640c      	cmphs      	r3, r0
+    282e:	5d23      	subi      	r1, r5, 1
+    2830:	08a3      	bt      	0x2976	// 2976 <__umoddi3+0x36a>
+    2832:	6d47      	mov      	r5, r1
+    2834:	60ca      	subu      	r3, r2
+    2836:	6c53      	mov      	r1, r4
+    2838:	6c0f      	mov      	r0, r3
+    283a:	b866      	st.w      	r3, (r14, 0x18)
+    283c:	e0000e0e 	bsr      	0x4458	// 4458 <__umodsi3>
+    2840:	9866      	ld.w      	r3, (r14, 0x18)
+    2842:	6c53      	mov      	r1, r4
+    2844:	b805      	st.w      	r0, (r14, 0x14)
+    2846:	6c0f      	mov      	r0, r3
+    2848:	e0000de4 	bsr      	0x4410	// 4410 <__udivsi3>
+    284c:	9845      	ld.w      	r2, (r14, 0x14)
+    284e:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2852:	9821      	ld.w      	r1, (r14, 0x4)
+    2854:	4250      	lsli      	r2, r2, 16
+    2856:	750d      	zexth      	r4, r3
+    2858:	7c40      	mult      	r1, r0
+    285a:	6c90      	or      	r2, r4
+    285c:	6448      	cmphs      	r2, r1
+    285e:	0807      	bt      	0x286c	// 286c <__umoddi3+0x260>
+    2860:	9882      	ld.w      	r4, (r14, 0x8)
+    2862:	6090      	addu      	r2, r4
+    2864:	6508      	cmphs      	r2, r4
+    2866:	5863      	subi      	r3, r0, 1
+    2868:	0882      	bt      	0x296c	// 296c <__umoddi3+0x360>
+    286a:	6c0f      	mov      	r0, r3
+    286c:	45b0      	lsli      	r5, r5, 16
+    286e:	6d40      	or      	r5, r0
+    2870:	74d5      	zexth      	r3, r5
+    2872:	9803      	ld.w      	r0, (r14, 0xc)
+    2874:	4db0      	lsri      	r5, r5, 16
+    2876:	6d0f      	mov      	r4, r3
+    2878:	6086      	subu      	r2, r1
+    287a:	7441      	zexth      	r1, r0
+    287c:	4810      	lsri      	r0, r0, 16
+    287e:	7d04      	mult      	r4, r1
+    2880:	7cc0      	mult      	r3, r0
+    2882:	7c54      	mult      	r1, r5
+    2884:	60c4      	addu      	r3, r1
+    2886:	7d40      	mult      	r5, r0
+    2888:	4c10      	lsri      	r0, r4, 16
+    288a:	60c0      	addu      	r3, r0
+    288c:	644c      	cmphs      	r3, r1
+    288e:	0804      	bt      	0x2896	// 2896 <__umoddi3+0x28a>
+    2890:	3180      	movi      	r1, 128
+    2892:	4129      	lsli      	r1, r1, 9
+    2894:	6144      	addu      	r5, r1
+    2896:	4b30      	lsri      	r1, r3, 16
+    2898:	6144      	addu      	r5, r1
+    289a:	4370      	lsli      	r3, r3, 16
+    289c:	7511      	zexth      	r4, r4
+    289e:	6548      	cmphs      	r2, r5
+    28a0:	60d0      	addu      	r3, r4
+    28a2:	0c56      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    28a4:	654a      	cmpne      	r2, r5
+    28a6:	0c76      	bf      	0x2992	// 2992 <__umoddi3+0x386>
+    28a8:	5a35      	subu      	r1, r2, r5
+    28aa:	6c0f      	mov      	r0, r3
+    28ac:	9864      	ld.w      	r3, (r14, 0x10)
+    28ae:	5b01      	subu      	r0, r3, r0
+    28b0:	640c      	cmphs      	r3, r0
+    28b2:	64c3      	mvcv      	r3
+    28b4:	598d      	subu      	r4, r1, r3
+    28b6:	6d53      	mov      	r5, r4
+    28b8:	7158      	lsl      	r5, r6
+    28ba:	701d      	lsr      	r0, r7
+    28bc:	6c53      	mov      	r1, r4
+    28be:	6c14      	or      	r0, r5
+    28c0:	705d      	lsr      	r1, r7
+    28c2:	1407      	addi      	r14, r14, 28
+    28c4:	1494      	pop      	r4-r7, r15
+    28c6:	9801      	ld.w      	r0, (r14, 0x4)
+    28c8:	6c57      	mov      	r1, r5
+    28ca:	6cd3      	mov      	r3, r4
+    28cc:	705d      	lsr      	r1, r7
+    28ce:	7100      	lsl      	r4, r0
+    28d0:	7080      	lsl      	r2, r0
+    28d2:	6c50      	or      	r1, r4
+    28d4:	70dd      	lsr      	r3, r7
+    28d6:	6d07      	mov      	r4, r1
+    28d8:	4af0      	lsri      	r7, r2, 16
+    28da:	b822      	st.w      	r1, (r14, 0x8)
+    28dc:	7449      	zexth      	r1, r2
+    28de:	7140      	lsl      	r5, r0
+    28e0:	6d87      	mov      	r6, r1
+    28e2:	6c0f      	mov      	r0, r3
+    28e4:	6c5f      	mov      	r1, r7
+    28e6:	b844      	st.w      	r2, (r14, 0x10)
+    28e8:	b8a0      	st.w      	r5, (r14, 0x0)
+    28ea:	b863      	st.w      	r3, (r14, 0xc)
+    28ec:	e0000db6 	bsr      	0x4458	// 4458 <__umodsi3>
+    28f0:	9863      	ld.w      	r3, (r14, 0xc)
+    28f2:	6d43      	mov      	r5, r0
+    28f4:	6c5f      	mov      	r1, r7
+    28f6:	6c0f      	mov      	r0, r3
+    28f8:	e0000d8c 	bsr      	0x4410	// 4410 <__udivsi3>
+    28fc:	45b0      	lsli      	r5, r5, 16
+    28fe:	4c70      	lsri      	r3, r4, 16
+    2900:	7c18      	mult      	r0, r6
+    2902:	6d4c      	or      	r5, r3
+    2904:	6414      	cmphs      	r5, r0
+    2906:	9844      	ld.w      	r2, (r14, 0x10)
+    2908:	0807      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    290a:	6148      	addu      	r5, r2
+    290c:	6494      	cmphs      	r5, r2
+    290e:	0c04      	bf      	0x2916	// 2916 <__umoddi3+0x30a>
+    2910:	6414      	cmphs      	r5, r0
+    2912:	0802      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    2914:	6148      	addu      	r5, r2
+    2916:	6142      	subu      	r5, r0
+    2918:	6c5f      	mov      	r1, r7
+    291a:	6c17      	mov      	r0, r5
+    291c:	b843      	st.w      	r2, (r14, 0xc)
+    291e:	e0000d9d 	bsr      	0x4458	// 4458 <__umodsi3>
+    2922:	6d03      	mov      	r4, r0
+    2924:	6c5f      	mov      	r1, r7
+    2926:	6c17      	mov      	r0, r5
+    2928:	e0000d74 	bsr      	0x4410	// 4410 <__udivsi3>
+    292c:	d86e1004 	ld.h      	r3, (r14, 0x8)
+    2930:	4490      	lsli      	r4, r4, 16
+    2932:	744d      	zexth      	r1, r3
+    2934:	7c18      	mult      	r0, r6
+    2936:	6d04      	or      	r4, r1
+    2938:	6410      	cmphs      	r4, r0
+    293a:	9843      	ld.w      	r2, (r14, 0xc)
+    293c:	0807      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    293e:	6108      	addu      	r4, r2
+    2940:	6490      	cmphs      	r4, r2
+    2942:	0c04      	bf      	0x294a	// 294a <__umoddi3+0x33e>
+    2944:	6410      	cmphs      	r4, r0
+    2946:	0802      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    2948:	6108      	addu      	r4, r2
+    294a:	6102      	subu      	r4, r0
+    294c:	0700      	br      	0x274c	// 274c <__umoddi3+0x140>
+    294e:	9823      	ld.w      	r1, (r14, 0xc)
+    2950:	5b05      	subu      	r0, r3, r1
+    2952:	640c      	cmphs      	r3, r0
+    2954:	9822      	ld.w      	r1, (r14, 0x8)
+    2956:	6146      	subu      	r5, r1
+    2958:	64c3      	mvcv      	r3
+    295a:	614e      	subu      	r5, r3
+    295c:	5a35      	subu      	r1, r2, r5
+    295e:	07a7      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    2960:	3618      	movi      	r6, 24
+    2962:	06c2      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    2964:	3718      	movi      	r7, 24
+    2966:	06e4      	br      	0x272e	// 272e <__umoddi3+0x122>
+    2968:	3718      	movi      	r7, 24
+    296a:	0665      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    296c:	6448      	cmphs      	r2, r1
+    296e:	0b7e      	bt      	0x286a	// 286a <__umoddi3+0x25e>
+    2970:	2801      	subi      	r0, 2
+    2972:	6090      	addu      	r2, r4
+    2974:	077c      	br      	0x286c	// 286c <__umoddi3+0x260>
+    2976:	648c      	cmphs      	r3, r2
+    2978:	0b5d      	bt      	0x2832	// 2832 <__umoddi3+0x226>
+    297a:	2d01      	subi      	r5, 2
+    297c:	60c0      	addu      	r3, r0
+    297e:	075b      	br      	0x2834	// 2834 <__umoddi3+0x228>
+    2980:	6148      	addu      	r5, r2
+    2982:	06a2      	br      	0x26c6	// 26c6 <__umoddi3+0xba>
+    2984:	6108      	addu      	r4, r2
+    2986:	06fa      	br      	0x277a	// 277a <__umoddi3+0x16e>
+    2988:	60c8      	addu      	r3, r2
+    298a:	0683      	br      	0x2690	// 2690 <__umoddi3+0x84>
+    298c:	6c17      	mov      	r0, r5
+    298e:	6c4f      	mov      	r1, r3
+    2990:	06bf      	br      	0x270e	// 270e <__umoddi3+0x102>
+    2992:	9824      	ld.w      	r1, (r14, 0x10)
+    2994:	64c4      	cmphs      	r1, r3
+    2996:	0fdc      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    2998:	6c0f      	mov      	r0, r3
+    299a:	3100      	movi      	r1, 0
+    299c:	0788      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    299e:	0000      	bkpt
+    29a0:	0000ffff 	.long	0x0000ffff
+    29a4:	00005aec 	.long	0x00005aec
+    29a8:	00ffffff 	.long	0x00ffffff
+
+000029ac <copystring>:
+    29ac:	14c2      	push      	r4-r5
+    29ae:	3300      	movi      	r3, 0
+    29b0:	644d      	cmplt      	r3, r1
+    29b2:	0803      	bt      	0x29b8	// 29b8 <copystring+0xc>
+    29b4:	6c0f      	mov      	r0, r3
+    29b6:	1482      	pop      	r4-r5
+    29b8:	5aac      	addu      	r5, r2, r3
+    29ba:	588c      	addu      	r4, r0, r3
+    29bc:	2300      	addi      	r3, 1
+    29be:	85a0      	ld.b      	r5, (r5, 0x0)
+    29c0:	3b43      	cmpnei      	r3, 3
+    29c2:	a4a0      	st.b      	r5, (r4, 0x0)
+    29c4:	0bf6      	bt      	0x29b0	// 29b0 <copystring+0x4>
+    29c6:	3923      	cmplti      	r1, 4
+    29c8:	0bf6      	bt      	0x29b4	// 29b4 <copystring+0x8>
+    29ca:	3300      	movi      	r3, 0
+    29cc:	a063      	st.b      	r3, (r0, 0x3)
+    29ce:	3304      	movi      	r3, 4
+    29d0:	07f2      	br      	0x29b4	// 29b4 <copystring+0x8>
+
+000029d2 <__GI___dtostr>:
+    29d2:	14d4      	push      	r4-r7, r15
+    29d4:	142c      	subi      	r14, r14, 48
+    29d6:	6d8f      	mov      	r6, r3
+    29d8:	9871      	ld.w      	r3, (r14, 0x44)
+    29da:	b80a      	st.w      	r0, (r14, 0x28)
+    29dc:	b824      	st.w      	r1, (r14, 0x10)
+    29de:	b842      	st.w      	r2, (r14, 0x8)
+    29e0:	b86b      	st.w      	r3, (r14, 0x2c)
+    29e2:	98f2      	ld.w      	r7, (r14, 0x48)
+    29e4:	e0000244 	bsr      	0x2e6c	// 2e6c <__isinf>
+    29e8:	3840      	cmpnei      	r0, 0
+    29ea:	0c0a      	bf      	0x29fe	// 29fe <__GI___dtostr+0x2c>
+    29ec:	0244      	lrw      	r2, 0x5f82	// 2cd8 <__GI___dtostr+0x306>
+    29ee:	6c5b      	mov      	r1, r6
+    29f0:	9802      	ld.w      	r0, (r14, 0x8)
+    29f2:	e3ffffdd 	bsr      	0x29ac	// 29ac <copystring>
+    29f6:	b809      	st.w      	r0, (r14, 0x24)
+    29f8:	9809      	ld.w      	r0, (r14, 0x24)
+    29fa:	140c      	addi      	r14, r14, 48
+    29fc:	1494      	pop      	r4-r7, r15
+    29fe:	980a      	ld.w      	r0, (r14, 0x28)
+    2a00:	9824      	ld.w      	r1, (r14, 0x10)
+    2a02:	e0000185 	bsr      	0x2d0c	// 2d0c <__isnan>
+    2a06:	3840      	cmpnei      	r0, 0
+    2a08:	b809      	st.w      	r0, (r14, 0x24)
+    2a0a:	0c03      	bf      	0x2a10	// 2a10 <__GI___dtostr+0x3e>
+    2a0c:	024b      	lrw      	r2, 0x5f86	// 2cdc <__GI___dtostr+0x30a>
+    2a0e:	07f0      	br      	0x29ee	// 29ee <__GI___dtostr+0x1c>
+    2a10:	3200      	movi      	r2, 0
+    2a12:	3300      	movi      	r3, 0
+    2a14:	980a      	ld.w      	r0, (r14, 0x28)
+    2a16:	9824      	ld.w      	r1, (r14, 0x10)
+    2a18:	e0000242 	bsr      	0x2e9c	// 2e9c <__eqdf2>
+    2a1c:	3840      	cmpnei      	r0, 0
+    2a1e:	082d      	bt      	0x2a78	// 2a78 <__GI___dtostr+0xa6>
+    2a20:	3f40      	cmpnei      	r7, 0
+    2a22:	0d57      	bf      	0x2cd0	// 2cd0 <__GI___dtostr+0x2fe>
+    2a24:	5fa6      	addi      	r5, r7, 2
+    2a26:	6558      	cmphs      	r6, r5
+    2a28:	0d56      	bf      	0x2cd4	// 2cd4 <__GI___dtostr+0x302>
+    2a2a:	3d40      	cmpnei      	r5, 0
+    2a2c:	0c0b      	bf      	0x2a42	// 2a42 <__GI___dtostr+0x70>
+    2a2e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a30:	39df      	btsti      	r1, 31
+    2a32:	0c1a      	bf      	0x2a66	// 2a66 <__GI___dtostr+0x94>
+    2a34:	9802      	ld.w      	r0, (r14, 0x8)
+    2a36:	322d      	movi      	r2, 45
+    2a38:	a040      	st.b      	r2, (r0, 0x0)
+    2a3a:	5d02      	addi      	r0, r5, 1
+    2a3c:	3501      	movi      	r5, 1
+    2a3e:	6414      	cmphs      	r5, r0
+    2a40:	0c16      	bf      	0x2a6c	// 2a6c <__GI___dtostr+0x9a>
+    2a42:	9882      	ld.w      	r4, (r14, 0x8)
+    2a44:	8420      	ld.b      	r1, (r4, 0x0)
+    2a46:	3330      	movi      	r3, 48
+    2a48:	64c6      	cmpne      	r1, r3
+    2a4a:	3000      	movi      	r0, 0
+    2a4c:	6001      	addc      	r0, r0
+    2a4e:	9842      	ld.w      	r2, (r14, 0x8)
+    2a50:	9822      	ld.w      	r1, (r14, 0x8)
+    2a52:	6008      	addu      	r0, r2
+    2a54:	342e      	movi      	r4, 46
+    2a56:	6054      	addu      	r1, r5
+    2a58:	3300      	movi      	r3, 0
+    2a5a:	a081      	st.b      	r4, (r0, 0x1)
+    2a5c:	b8a9      	st.w      	r5, (r14, 0x24)
+    2a5e:	a160      	st.b      	r3, (r1, 0x0)
+    2a60:	07cc      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2a62:	3501      	movi      	r5, 1
+    2a64:	07e5      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2a66:	6c17      	mov      	r0, r5
+    2a68:	3500      	movi      	r5, 0
+    2a6a:	07ea      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a6c:	9842      	ld.w      	r2, (r14, 0x8)
+    2a6e:	6094      	addu      	r2, r5
+    2a70:	3430      	movi      	r4, 48
+    2a72:	a280      	st.b      	r4, (r2, 0x0)
+    2a74:	2500      	addi      	r5, 1
+    2a76:	07e4      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a78:	3200      	movi      	r2, 0
+    2a7a:	3300      	movi      	r3, 0
+    2a7c:	980a      	ld.w      	r0, (r14, 0x28)
+    2a7e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a80:	e000022c 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2a84:	38df      	btsti      	r0, 31
+    2a86:	0c8e      	bf      	0x2ba2	// 2ba2 <__GI___dtostr+0x1d0>
+    2a88:	3180      	movi      	r1, 128
+    2a8a:	98a2      	ld.w      	r5, (r14, 0x8)
+    2a8c:	9884      	ld.w      	r4, (r14, 0x10)
+    2a8e:	4158      	lsli      	r2, r1, 24
+    2a90:	332d      	movi      	r3, 45
+    2a92:	a560      	st.b      	r3, (r5, 0x0)
+    2a94:	6108      	addu      	r4, r2
+    2a96:	2e00      	subi      	r6, 1
+    2a98:	2500      	addi      	r5, 1
+    2a9a:	3000      	movi      	r0, 0
+    2a9c:	032e      	lrw      	r1, 0x3fe00000	// 2ce0 <__GI___dtostr+0x30e>
+    2a9e:	3300      	movi      	r3, 0
+    2aa0:	b865      	st.w      	r3, (r14, 0x14)
+    2aa2:	9845      	ld.w      	r2, (r14, 0x14)
+    2aa4:	65ca      	cmpne      	r2, r7
+    2aa6:	0881      	bt      	0x2ba8	// 2ba8 <__GI___dtostr+0x1d6>
+    2aa8:	6c83      	mov      	r2, r0
+    2aaa:	6cc7      	mov      	r3, r1
+    2aac:	980a      	ld.w      	r0, (r14, 0x28)
+    2aae:	6c53      	mov      	r1, r4
+    2ab0:	e3fff2b6 	bsr      	0x101c	// 101c <__adddf3>
+    2ab4:	3200      	movi      	r2, 0
+    2ab6:	0373      	lrw      	r3, 0x3ff00000	// 2ce4 <__GI___dtostr+0x312>
+    2ab8:	b806      	st.w      	r0, (r14, 0x18)
+    2aba:	b827      	st.w      	r1, (r14, 0x1c)
+    2abc:	e000020e 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2ac0:	38df      	btsti      	r0, 31
+    2ac2:	0c05      	bf      	0x2acc	// 2acc <__GI___dtostr+0xfa>
+    2ac4:	3430      	movi      	r4, 48
+    2ac6:	a580      	st.b      	r4, (r5, 0x0)
+    2ac8:	2e00      	subi      	r6, 1
+    2aca:	2500      	addi      	r5, 1
+    2acc:	9804      	ld.w      	r0, (r14, 0x10)
+    2ace:	4021      	lsli      	r1, r0, 1
+    2ad0:	0379      	lrw      	r3, 0xfffffc01	// 2ce8 <__GI___dtostr+0x316>
+    2ad2:	4915      	lsri      	r0, r1, 21
+    2ad4:	600c      	addu      	r0, r3
+    2ad6:	e3fff4f5 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2ada:	035a      	lrw      	r2, 0x509f79ff	// 2cec <__GI___dtostr+0x31a>
+    2adc:	037a      	lrw      	r3, 0x3fd34413	// 2cf0 <__GI___dtostr+0x31e>
+    2ade:	e3fff2d3 	bsr      	0x1084	// 1084 <__muldf3>
+    2ae2:	e3fff527 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2ae6:	5842      	addi      	r2, r0, 1
+    2ae8:	3a20      	cmplti      	r2, 1
+    2aea:	b848      	st.w      	r2, (r14, 0x20)
+    2aec:	08e7      	bt      	0x2cba	// 2cba <__GI___dtostr+0x2e8>
+    2aee:	033d      	lrw      	r1, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2af0:	6dcb      	mov      	r7, r2
+    2af2:	3400      	movi      	r4, 0
+    2af4:	b823      	st.w      	r1, (r14, 0xc)
+    2af6:	3f0a      	cmphsi      	r7, 11
+    2af8:	085f      	bt      	0x2bb6	// 2bb6 <__GI___dtostr+0x1e4>
+    2afa:	3f41      	cmpnei      	r7, 1
+    2afc:	0868      	bt      	0x2bcc	// 2bcc <__GI___dtostr+0x1fa>
+    2afe:	135f      	lrw      	r2, 0xcccccccd	// 2cf8 <__GI___dtostr+0x326>
+    2b00:	137f      	lrw      	r3, 0x3feccccc	// 2cfc <__GI___dtostr+0x32a>
+    2b02:	6c13      	mov      	r0, r4
+    2b04:	9823      	ld.w      	r1, (r14, 0xc)
+    2b06:	e3fff483 	bsr      	0x140c	// 140c <__gtdf2>
+    2b0a:	3820      	cmplti      	r0, 1
+    2b0c:	0c6a      	bf      	0x2be0	// 2be0 <__GI___dtostr+0x20e>
+    2b0e:	9862      	ld.w      	r3, (r14, 0x8)
+    2b10:	64d6      	cmpne      	r5, r3
+    2b12:	0807      	bt      	0x2b20	// 2b20 <__GI___dtostr+0x14e>
+    2b14:	3e40      	cmpnei      	r6, 0
+    2b16:	0f71      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b18:	3230      	movi      	r2, 48
+    2b1a:	a540      	st.b      	r2, (r5, 0x0)
+    2b1c:	2e00      	subi      	r6, 1
+    2b1e:	2500      	addi      	r5, 1
+    2b20:	9805      	ld.w      	r0, (r14, 0x14)
+    2b22:	3840      	cmpnei      	r0, 0
+    2b24:	08cf      	bt      	0x2cc2	// 2cc2 <__GI___dtostr+0x2f0>
+    2b26:	9822      	ld.w      	r1, (r14, 0x8)
+    2b28:	5d65      	subu      	r3, r5, r1
+    2b2a:	2300      	addi      	r3, 1
+    2b2c:	984b      	ld.w      	r2, (r14, 0x2c)
+    2b2e:	648c      	cmphs      	r3, r2
+    2b30:	08a5      	bt      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b32:	3e40      	cmpnei      	r6, 0
+    2b34:	0f62      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b36:	372e      	movi      	r7, 46
+    2b38:	a5e0      	st.b      	r7, (r5, 0x0)
+    2b3a:	980b      	ld.w      	r0, (r14, 0x2c)
+    2b3c:	5de2      	addi      	r7, r5, 1
+    2b3e:	9822      	ld.w      	r1, (r14, 0x8)
+    2b40:	2000      	addi      	r0, 1
+    2b42:	5f65      	subu      	r3, r7, r1
+    2b44:	584d      	subu      	r2, r0, r3
+    2b46:	2e00      	subi      	r6, 1
+    2b48:	b845      	st.w      	r2, (r14, 0x14)
+    2b4a:	9805      	ld.w      	r0, (r14, 0x14)
+    2b4c:	6418      	cmphs      	r6, r0
+    2b4e:	0f55      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b50:	6d43      	mov      	r5, r0
+    2b52:	615c      	addu      	r5, r7
+    2b54:	36ff      	movi      	r6, 255
+    2b56:	655e      	cmpne      	r7, r5
+    2b58:	0c91      	bf      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b5a:	6c93      	mov      	r2, r4
+    2b5c:	9863      	ld.w      	r3, (r14, 0xc)
+    2b5e:	9806      	ld.w      	r0, (r14, 0x18)
+    2b60:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b62:	e3fff3ab 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b66:	e3fff4e5 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2b6a:	3130      	movi      	r1, 48
+    2b6c:	6040      	addu      	r1, r0
+    2b6e:	a720      	st.b      	r1, (r7, 0x0)
+    2b70:	6818      	and      	r0, r6
+    2b72:	e3fff4a7 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2b76:	6c93      	mov      	r2, r4
+    2b78:	9863      	ld.w      	r3, (r14, 0xc)
+    2b7a:	e3fff285 	bsr      	0x1084	// 1084 <__muldf3>
+    2b7e:	6c83      	mov      	r2, r0
+    2b80:	6cc7      	mov      	r3, r1
+    2b82:	9806      	ld.w      	r0, (r14, 0x18)
+    2b84:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b86:	e3fff263 	bsr      	0x104c	// 104c <__subdf3>
+    2b8a:	b806      	st.w      	r0, (r14, 0x18)
+    2b8c:	b827      	st.w      	r1, (r14, 0x1c)
+    2b8e:	6c13      	mov      	r0, r4
+    2b90:	9823      	ld.w      	r1, (r14, 0xc)
+    2b92:	3200      	movi      	r2, 0
+    2b94:	1278      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2b96:	e3fff391 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b9a:	2700      	addi      	r7, 1
+    2b9c:	6d03      	mov      	r4, r0
+    2b9e:	b823      	st.w      	r1, (r14, 0xc)
+    2ba0:	07db      	br      	0x2b56	// 2b56 <__GI___dtostr+0x184>
+    2ba2:	98a2      	ld.w      	r5, (r14, 0x8)
+    2ba4:	9884      	ld.w      	r4, (r14, 0x10)
+    2ba6:	077a      	br      	0x2a9a	// 2a9a <__GI___dtostr+0xc8>
+    2ba8:	1276      	lrw      	r3, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2baa:	1257      	lrw      	r2, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2bac:	e3fff26c 	bsr      	0x1084	// 1084 <__muldf3>
+    2bb0:	9865      	ld.w      	r3, (r14, 0x14)
+    2bb2:	2300      	addi      	r3, 1
+    2bb4:	0776      	br      	0x2aa0	// 2aa0 <__GI___dtostr+0xce>
+    2bb6:	3080      	movi      	r0, 128
+    2bb8:	4056      	lsli      	r2, r0, 22
+    2bba:	9823      	ld.w      	r1, (r14, 0xc)
+    2bbc:	6c13      	mov      	r0, r4
+    2bbe:	1273      	lrw      	r3, 0x4202a05f	// 2d08 <__GI___dtostr+0x336>
+    2bc0:	e3fff262 	bsr      	0x1084	// 1084 <__muldf3>
+    2bc4:	6d03      	mov      	r4, r0
+    2bc6:	b823      	st.w      	r1, (r14, 0xc)
+    2bc8:	2f09      	subi      	r7, 10
+    2bca:	0796      	br      	0x2af6	// 2af6 <__GI___dtostr+0x124>
+    2bcc:	6c13      	mov      	r0, r4
+    2bce:	9823      	ld.w      	r1, (r14, 0xc)
+    2bd0:	3200      	movi      	r2, 0
+    2bd2:	1269      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2bd4:	e3fff258 	bsr      	0x1084	// 1084 <__muldf3>
+    2bd8:	6d03      	mov      	r4, r0
+    2bda:	b823      	st.w      	r1, (r14, 0xc)
+    2bdc:	2f00      	subi      	r7, 1
+    2bde:	078e      	br      	0x2afa	// 2afa <__GI___dtostr+0x128>
+    2be0:	9863      	ld.w      	r3, (r14, 0xc)
+    2be2:	6c93      	mov      	r2, r4
+    2be4:	9806      	ld.w      	r0, (r14, 0x18)
+    2be6:	9827      	ld.w      	r1, (r14, 0x1c)
+    2be8:	e3fff368 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2bec:	e3fff4a2 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2bf0:	3f40      	cmpnei      	r7, 0
+    2bf2:	74c0      	zextb      	r3, r0
+    2bf4:	0c03      	bf      	0x2bfa	// 2bfa <__GI___dtostr+0x228>
+    2bf6:	3b40      	cmpnei      	r3, 0
+    2bf8:	0c58      	bf      	0x2ca8	// 2ca8 <__GI___dtostr+0x2d6>
+    2bfa:	232f      	addi      	r3, 48
+    2bfc:	3e40      	cmpnei      	r6, 0
+    2bfe:	a560      	st.b      	r3, (r5, 0x0)
+    2c00:	2500      	addi      	r5, 1
+    2c02:	0842      	bt      	0x2c86	// 2c86 <__GI___dtostr+0x2b4>
+    2c04:	6c93      	mov      	r2, r4
+    2c06:	9863      	ld.w      	r3, (r14, 0xc)
+    2c08:	980a      	ld.w      	r0, (r14, 0x28)
+    2c0a:	9824      	ld.w      	r1, (r14, 0x10)
+    2c0c:	e3fff356 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2c10:	9845      	ld.w      	r2, (r14, 0x14)
+    2c12:	988b      	ld.w      	r4, (r14, 0x2c)
+    2c14:	b841      	st.w      	r2, (r14, 0x4)
+    2c16:	b880      	st.w      	r4, (r14, 0x0)
+    2c18:	3300      	movi      	r3, 0
+    2c1a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c1c:	e3fffedb 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    2c20:	3840      	cmpnei      	r0, 0
+    2c22:	0eeb      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c24:	5dc0      	addu      	r6, r5, r0
+    2c26:	37fa      	movi      	r7, 250
+    2c28:	3565      	movi      	r5, 101
+    2c2a:	6c02      	nor      	r0, r0
+    2c2c:	a6a0      	st.b      	r5, (r6, 0x0)
+    2c2e:	6d03      	mov      	r4, r0
+    2c30:	5ea2      	addi      	r5, r6, 1
+    2c32:	3101      	movi      	r1, 1
+    2c34:	3604      	movi      	r6, 4
+    2c36:	47e2      	lsli      	r7, r7, 2
+    2c38:	9808      	ld.w      	r0, (r14, 0x20)
+    2c3a:	65c1      	cmplt      	r0, r7
+    2c3c:	0c03      	bf      	0x2c42	// 2c42 <__GI___dtostr+0x270>
+    2c3e:	3940      	cmpnei      	r1, 0
+    2c40:	0811      	bt      	0x2c62	// 2c62 <__GI___dtostr+0x290>
+    2c42:	3c40      	cmpnei      	r4, 0
+    2c44:	0c08      	bf      	0x2c54	// 2c54 <__GI___dtostr+0x282>
+    2c46:	6c5f      	mov      	r1, r7
+    2c48:	9808      	ld.w      	r0, (r14, 0x20)
+    2c4a:	e0000bd1 	bsr      	0x43ec	// 43ec <__divsi3>
+    2c4e:	202f      	addi      	r0, 48
+    2c50:	a500      	st.b      	r0, (r5, 0x0)
+    2c52:	2500      	addi      	r5, 1
+    2c54:	6c5f      	mov      	r1, r7
+    2c56:	9808      	ld.w      	r0, (r14, 0x20)
+    2c58:	e0000bee 	bsr      	0x4434	// 4434 <__modsi3>
+    2c5c:	2c00      	subi      	r4, 1
+    2c5e:	b808      	st.w      	r0, (r14, 0x20)
+    2c60:	3100      	movi      	r1, 0
+    2c62:	b823      	st.w      	r1, (r14, 0xc)
+    2c64:	6c1f      	mov      	r0, r7
+    2c66:	310a      	movi      	r1, 10
+    2c68:	2e00      	subi      	r6, 1
+    2c6a:	e0000bc1 	bsr      	0x43ec	// 43ec <__divsi3>
+    2c6e:	3e40      	cmpnei      	r6, 0
+    2c70:	6dc3      	mov      	r7, r0
+    2c72:	9823      	ld.w      	r1, (r14, 0xc)
+    2c74:	0be2      	bt      	0x2c38	// 2c38 <__GI___dtostr+0x266>
+    2c76:	3c40      	cmpnei      	r4, 0
+    2c78:	0ec0      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c7a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c7c:	3300      	movi      	r3, 0
+    2c7e:	5d89      	subu      	r4, r5, r2
+    2c80:	a560      	st.b      	r3, (r5, 0x0)
+    2c82:	b889      	st.w      	r4, (r14, 0x24)
+    2c84:	06ba      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c86:	7400      	zextb      	r0, r0
+    2c88:	e3fff41c 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2c8c:	6c93      	mov      	r2, r4
+    2c8e:	9863      	ld.w      	r3, (r14, 0xc)
+    2c90:	e3fff1fa 	bsr      	0x1084	// 1084 <__muldf3>
+    2c94:	6c83      	mov      	r2, r0
+    2c96:	6cc7      	mov      	r3, r1
+    2c98:	9806      	ld.w      	r0, (r14, 0x18)
+    2c9a:	9827      	ld.w      	r1, (r14, 0x1c)
+    2c9c:	e3fff1d8 	bsr      	0x104c	// 104c <__subdf3>
+    2ca0:	b806      	st.w      	r0, (r14, 0x18)
+    2ca2:	b827      	st.w      	r1, (r14, 0x1c)
+    2ca4:	2e00      	subi      	r6, 1
+    2ca6:	3700      	movi      	r7, 0
+    2ca8:	6c13      	mov      	r0, r4
+    2caa:	9823      	ld.w      	r1, (r14, 0xc)
+    2cac:	3200      	movi      	r2, 0
+    2cae:	1072      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2cb0:	e3fff304 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2cb4:	6d03      	mov      	r4, r0
+    2cb6:	b823      	st.w      	r1, (r14, 0xc)
+    2cb8:	0723      	br      	0x2afe	// 2afe <__GI___dtostr+0x12c>
+    2cba:	1012      	lrw      	r0, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2cbc:	1092      	lrw      	r4, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2cbe:	b803      	st.w      	r0, (r14, 0xc)
+    2cc0:	0727      	br      	0x2b0e	// 2b0e <__GI___dtostr+0x13c>
+    2cc2:	3e40      	cmpnei      	r6, 0
+    2cc4:	0e9a      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2cc6:	372e      	movi      	r7, 46
+    2cc8:	a5e0      	st.b      	r7, (r5, 0x0)
+    2cca:	2e00      	subi      	r6, 1
+    2ccc:	5de2      	addi      	r7, r5, 1
+    2cce:	073e      	br      	0x2b4a	// 2b4a <__GI___dtostr+0x178>
+    2cd0:	3e40      	cmpnei      	r6, 0
+    2cd2:	0ac8      	bt      	0x2a62	// 2a62 <__GI___dtostr+0x90>
+    2cd4:	3508      	movi      	r5, 8
+    2cd6:	06ac      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2cd8:	00005f82 	.long	0x00005f82
+    2cdc:	00005f86 	.long	0x00005f86
+    2ce0:	3fe00000 	.long	0x3fe00000
+    2ce4:	3ff00000 	.long	0x3ff00000
+    2ce8:	fffffc01 	.long	0xfffffc01
+    2cec:	509f79ff 	.long	0x509f79ff
+    2cf0:	3fd34413 	.long	0x3fd34413
+    2cf4:	40240000 	.long	0x40240000
+    2cf8:	cccccccd 	.long	0xcccccccd
+    2cfc:	3feccccc 	.long	0x3feccccc
+    2d00:	3fb99999 	.long	0x3fb99999
+    2d04:	9999999a 	.long	0x9999999a
+    2d08:	4202a05f 	.long	0x4202a05f
+
+00002d0c <__isnan>:
+    2d0c:	416c      	lsli      	r3, r1, 12
+    2d0e:	4b4c      	lsri      	r2, r3, 12
+    2d10:	6c08      	or      	r0, r2
+    2d12:	3840      	cmpnei      	r0, 0
+    2d14:	0c0e      	bf      	0x2d30	// 2d30 <__isnan+0x24>
+    2d16:	1008      	lrw      	r0, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d18:	6840      	and      	r1, r0
+    2d1a:	6cc7      	mov      	r3, r1
+    2d1c:	3000      	movi      	r0, 0
+    2d1e:	1026      	lrw      	r1, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d20:	3200      	movi      	r2, 0
+    2d22:	6c81      	xor      	r2, r0
+    2d24:	6cc5      	xor      	r3, r1
+    2d26:	6c8c      	or      	r2, r3
+    2d28:	3a40      	cmpnei      	r2, 0
+    2d2a:	6443      	mvcv      	r1
+    2d2c:	7404      	zextb      	r0, r1
+    2d2e:	783c      	jmp      	r15
+    2d30:	3000      	movi      	r0, 0
+    2d32:	07fe      	br      	0x2d2e	// 2d2e <__isnan+0x22>
+    2d34:	7ff00000 	.long	0x7ff00000
+
+00002d38 <__strlen_fast>:
+    2d38:	6c43      	mov      	r1, r0
+    2d3a:	3203      	movi      	r2, 3
+    2d3c:	6808      	and      	r0, r2
+    2d3e:	3840      	cmpnei      	r0, 0
+    2d40:	0c08      	bf      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d42:	3000      	movi      	r0, 0
+    2d44:	8140      	ld.b      	r2, (r1, 0x0)
+    2d46:	3a40      	cmpnei      	r2, 0
+    2d48:	0c20      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d4a:	2100      	addi      	r1, 1
+    2d4c:	2000      	addi      	r0, 1
+    2d4e:	07fb      	br      	0x2d44	// 2d44 <__strlen_fast+0xc>
+    2d50:	9140      	ld.w      	r2, (r1, 0x0)
+    2d52:	680b      	tstnbz      	r2
+    2d54:	0c04      	bf      	0x2d5c	// 2d5c <__strlen_fast+0x24>
+    2d56:	2103      	addi      	r1, 4
+    2d58:	2003      	addi      	r0, 4
+    2d5a:	07fb      	br      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d5c:	31ff      	movi      	r1, 255
+    2d5e:	6ccb      	mov      	r3, r2
+    2d60:	68c4      	and      	r3, r1
+    2d62:	3b40      	cmpnei      	r3, 0
+    2d64:	0c12      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d66:	2000      	addi      	r0, 1
+    2d68:	3110      	movi      	r1, 16
+    2d6a:	6ccb      	mov      	r3, r2
+    2d6c:	70c4      	lsl      	r3, r1
+    2d6e:	3118      	movi      	r1, 24
+    2d70:	70c5      	lsr      	r3, r1
+    2d72:	3b40      	cmpnei      	r3, 0
+    2d74:	0c0a      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d76:	2000      	addi      	r0, 1
+    2d78:	3108      	movi      	r1, 8
+    2d7a:	6ccb      	mov      	r3, r2
+    2d7c:	70c4      	lsl      	r3, r1
+    2d7e:	3118      	movi      	r1, 24
+    2d80:	70c5      	lsr      	r3, r1
+    2d82:	3b40      	cmpnei      	r3, 0
+    2d84:	0c02      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d86:	2000      	addi      	r0, 1
+    2d88:	783c      	jmp      	r15
+	...
+
+00002d8c <__strcpy_fast>:
+    2d8c:	14c1      	push      	r4
+    2d8e:	6d03      	mov      	r4, r0
+    2d90:	6c87      	mov      	r2, r1
+    2d92:	6c90      	or      	r2, r4
+    2d94:	3303      	movi      	r3, 3
+    2d96:	688c      	and      	r2, r3
+    2d98:	3a40      	cmpnei      	r2, 0
+    2d9a:	0c08      	bf      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2d9c:	8160      	ld.b      	r3, (r1, 0x0)
+    2d9e:	a460      	st.b      	r3, (r4, 0x0)
+    2da0:	2100      	addi      	r1, 1
+    2da2:	2400      	addi      	r4, 1
+    2da4:	3b40      	cmpnei      	r3, 0
+    2da6:	0bfb      	bt      	0x2d9c	// 2d9c <__strcpy_fast+0x10>
+    2da8:	1481      	pop      	r4
+    2daa:	9160      	ld.w      	r3, (r1, 0x0)
+    2dac:	680f      	tstnbz      	r3
+    2dae:	0c2e      	bf      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2db0:	b460      	st.w      	r3, (r4, 0x0)
+    2db2:	9161      	ld.w      	r3, (r1, 0x4)
+    2db4:	680f      	tstnbz      	r3
+    2db6:	0c1d      	bf      	0x2df0	// 2df0 <__strcpy_fast+0x64>
+    2db8:	b461      	st.w      	r3, (r4, 0x4)
+    2dba:	9162      	ld.w      	r3, (r1, 0x8)
+    2dbc:	680f      	tstnbz      	r3
+    2dbe:	0c1b      	bf      	0x2df4	// 2df4 <__strcpy_fast+0x68>
+    2dc0:	b462      	st.w      	r3, (r4, 0x8)
+    2dc2:	9163      	ld.w      	r3, (r1, 0xc)
+    2dc4:	680f      	tstnbz      	r3
+    2dc6:	0c19      	bf      	0x2df8	// 2df8 <__strcpy_fast+0x6c>
+    2dc8:	b463      	st.w      	r3, (r4, 0xc)
+    2dca:	9164      	ld.w      	r3, (r1, 0x10)
+    2dcc:	680f      	tstnbz      	r3
+    2dce:	0c17      	bf      	0x2dfc	// 2dfc <__strcpy_fast+0x70>
+    2dd0:	b464      	st.w      	r3, (r4, 0x10)
+    2dd2:	9165      	ld.w      	r3, (r1, 0x14)
+    2dd4:	680f      	tstnbz      	r3
+    2dd6:	0c15      	bf      	0x2e00	// 2e00 <__strcpy_fast+0x74>
+    2dd8:	b465      	st.w      	r3, (r4, 0x14)
+    2dda:	9166      	ld.w      	r3, (r1, 0x18)
+    2ddc:	680f      	tstnbz      	r3
+    2dde:	0c13      	bf      	0x2e04	// 2e04 <__strcpy_fast+0x78>
+    2de0:	b466      	st.w      	r3, (r4, 0x18)
+    2de2:	9167      	ld.w      	r3, (r1, 0x1c)
+    2de4:	680f      	tstnbz      	r3
+    2de6:	0c11      	bf      	0x2e08	// 2e08 <__strcpy_fast+0x7c>
+    2de8:	b467      	st.w      	r3, (r4, 0x1c)
+    2dea:	241f      	addi      	r4, 32
+    2dec:	211f      	addi      	r1, 32
+    2dee:	07de      	br      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2df0:	2403      	addi      	r4, 4
+    2df2:	040c      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df4:	2407      	addi      	r4, 8
+    2df6:	040a      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df8:	240b      	addi      	r4, 12
+    2dfa:	0408      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2dfc:	240f      	addi      	r4, 16
+    2dfe:	0406      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e00:	2413      	addi      	r4, 20
+    2e02:	0404      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e04:	2417      	addi      	r4, 24
+    2e06:	0402      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e08:	241b      	addi      	r4, 28
+    2e0a:	3118      	movi      	r1, 24
+    2e0c:	6c8f      	mov      	r2, r3
+    2e0e:	7084      	lsl      	r2, r1
+    2e10:	7085      	lsr      	r2, r1
+    2e12:	a440      	st.b      	r2, (r4, 0x0)
+    2e14:	3a40      	cmpnei      	r2, 0
+    2e16:	0c12      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e18:	3110      	movi      	r1, 16
+    2e1a:	6c8f      	mov      	r2, r3
+    2e1c:	7084      	lsl      	r2, r1
+    2e1e:	3118      	movi      	r1, 24
+    2e20:	7085      	lsr      	r2, r1
+    2e22:	a441      	st.b      	r2, (r4, 0x1)
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0c0a      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e28:	3108      	movi      	r1, 8
+    2e2a:	6c8f      	mov      	r2, r3
+    2e2c:	7084      	lsl      	r2, r1
+    2e2e:	3118      	movi      	r1, 24
+    2e30:	7085      	lsr      	r2, r1
+    2e32:	a442      	st.b      	r2, (r4, 0x2)
+    2e34:	3a40      	cmpnei      	r2, 0
+    2e36:	0c02      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e38:	b460      	st.w      	r3, (r4, 0x0)
+    2e3a:	1481      	pop      	r4
+
+00002e3c <__GI_strchr>:
+    2e3c:	8040      	ld.b      	r2, (r0, 0x0)
+    2e3e:	644a      	cmpne      	r2, r1
+    2e40:	0c06      	bf      	0x2e4c	// 2e4c <__GI_strchr+0x10>
+    2e42:	3a40      	cmpnei      	r2, 0
+    2e44:	0c03      	bf      	0x2e4a	// 2e4a <__GI_strchr+0xe>
+    2e46:	2000      	addi      	r0, 1
+    2e48:	07fa      	br      	0x2e3c	// 2e3c <__GI_strchr>
+    2e4a:	6c0b      	mov      	r0, r2
+    2e4c:	783c      	jmp      	r15
+	...
+
+00002e50 <__GI_strerror>:
+    2e50:	338f      	movi      	r3, 143
+    2e52:	640c      	cmphs      	r3, r0
+    2e54:	0c06      	bf      	0x2e60	// 2e60 <__GI_strerror+0x10>
+    2e56:	4002      	lsli      	r0, r0, 2
+    2e58:	1023      	lrw      	r1, 0x5c0c	// 2e64 <__GI_strerror+0x14>
+    2e5a:	6004      	addu      	r0, r1
+    2e5c:	9000      	ld.w      	r0, (r0, 0x0)
+    2e5e:	783c      	jmp      	r15
+    2e60:	1002      	lrw      	r0, 0x5e73	// 2e68 <__GI_strerror+0x18>
+    2e62:	07fe      	br      	0x2e5e	// 2e5e <__GI_strerror+0xe>
+    2e64:	00005c0c 	.long	0x00005c0c
+    2e68:	00005e73 	.long	0x00005e73
+
+00002e6c <__isinf>:
+    2e6c:	3840      	cmpnei      	r0, 0
+    2e6e:	6c83      	mov      	r2, r0
+    2e70:	6cc7      	mov      	r3, r1
+    2e72:	0804      	bt      	0x2e7a	// 2e7a <__isinf+0xe>
+    2e74:	1028      	lrw      	r1, 0x7ff00000	// 2e94 <__isinf+0x28>
+    2e76:	644e      	cmpne      	r3, r1
+    2e78:	0c0b      	bf      	0x2e8e	// 2e8e <__isinf+0x22>
+    2e7a:	3000      	movi      	r0, 0
+    2e7c:	1027      	lrw      	r1, 0xfff00000	// 2e98 <__isinf+0x2c>
+    2e7e:	6c81      	xor      	r2, r0
+    2e80:	6cc5      	xor      	r3, r1
+    2e82:	6c8c      	or      	r2, r3
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	64c3      	mvcv      	r3
+    2e88:	3000      	movi      	r0, 0
+    2e8a:	600e      	subu      	r0, r3
+    2e8c:	783c      	jmp      	r15
+    2e8e:	3001      	movi      	r0, 1
+    2e90:	07fe      	br      	0x2e8c	// 2e8c <__isinf+0x20>
+    2e92:	0000      	bkpt
+    2e94:	7ff00000 	.long	0x7ff00000
+    2e98:	fff00000 	.long	0xfff00000
+
+00002e9c <__eqdf2>:
+    2e9c:	14d0      	push      	r15
+    2e9e:	142e      	subi      	r14, r14, 56
+    2ea0:	b800      	st.w      	r0, (r14, 0x0)
+    2ea2:	b821      	st.w      	r1, (r14, 0x4)
+    2ea4:	6c3b      	mov      	r0, r14
+    2ea6:	1904      	addi      	r1, r14, 16
+    2ea8:	b863      	st.w      	r3, (r14, 0xc)
+    2eaa:	b842      	st.w      	r2, (r14, 0x8)
+    2eac:	e3fff4b4 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb0:	1909      	addi      	r1, r14, 36
+    2eb2:	1802      	addi      	r0, r14, 8
+    2eb4:	e3fff4b0 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb8:	9864      	ld.w      	r3, (r14, 0x10)
+    2eba:	3b01      	cmphsi      	r3, 2
+    2ebc:	0c0a      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ebe:	9869      	ld.w      	r3, (r14, 0x24)
+    2ec0:	3b01      	cmphsi      	r3, 2
+    2ec2:	0c07      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ec4:	1909      	addi      	r1, r14, 36
+    2ec6:	1804      	addi      	r0, r14, 16
+    2ec8:	e3fff508 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2ecc:	140e      	addi      	r14, r14, 56
+    2ece:	1490      	pop      	r15
+    2ed0:	3001      	movi      	r0, 1
+    2ed2:	140e      	addi      	r14, r14, 56
+    2ed4:	1490      	pop      	r15
+	...
+
+00002ed8 <__ltdf2>:
+    2ed8:	14d0      	push      	r15
+    2eda:	142e      	subi      	r14, r14, 56
+    2edc:	b800      	st.w      	r0, (r14, 0x0)
+    2ede:	b821      	st.w      	r1, (r14, 0x4)
+    2ee0:	6c3b      	mov      	r0, r14
+    2ee2:	1904      	addi      	r1, r14, 16
+    2ee4:	b863      	st.w      	r3, (r14, 0xc)
+    2ee6:	b842      	st.w      	r2, (r14, 0x8)
+    2ee8:	e3fff496 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eec:	1909      	addi      	r1, r14, 36
+    2eee:	1802      	addi      	r0, r14, 8
+    2ef0:	e3fff492 	bsr      	0x1814	// 1814 <__unpack_d>
+    2ef4:	9864      	ld.w      	r3, (r14, 0x10)
+    2ef6:	3b01      	cmphsi      	r3, 2
+    2ef8:	0c0a      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2efa:	9869      	ld.w      	r3, (r14, 0x24)
+    2efc:	3b01      	cmphsi      	r3, 2
+    2efe:	0c07      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2f00:	1909      	addi      	r1, r14, 36
+    2f02:	1804      	addi      	r0, r14, 16
+    2f04:	e3fff4ea 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2f08:	140e      	addi      	r14, r14, 56
+    2f0a:	1490      	pop      	r15
+    2f0c:	3001      	movi      	r0, 1
+    2f0e:	140e      	addi      	r14, r14, 56
+    2f10:	1490      	pop      	r15
+
+Disassembly of section .text.__main:
+
+00002f14 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    2f14:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    2f16:	1009      	lrw      	r0, 0x20000000	// 2f38 <__main+0x24>
+    2f18:	1029      	lrw      	r1, 0x6714	// 2f3c <__main+0x28>
+    2f1a:	6442      	cmpne      	r0, r1
+    2f1c:	0c05      	bf      	0x2f26	// 2f26 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    2f1e:	1049      	lrw      	r2, 0x200000a0	// 2f40 <__main+0x2c>
+    2f20:	6082      	subu      	r2, r0
+    2f22:	e3fff5c1 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    2f26:	1048      	lrw      	r2, 0x20000760	// 2f44 <__main+0x30>
+    2f28:	1008      	lrw      	r0, 0x200000a0	// 2f48 <__main+0x34>
+    2f2a:	640a      	cmpne      	r2, r0
+    2f2c:	0c05      	bf      	0x2f36	// 2f36 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    2f2e:	6082      	subu      	r2, r0
+    2f30:	3100      	movi      	r1, 0
+    2f32:	e3fff575 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+  }
+
+	
+}
+    2f36:	1490      	pop      	r15
+    2f38:	20000000 	.long	0x20000000
+    2f3c:	00006714 	.long	0x00006714
+    2f40:	200000a0 	.long	0x200000a0
+    2f44:	20000760 	.long	0x20000760
+    2f48:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00002f4c <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    2f4c:	3848      	cmpnei      	r0, 8
+    2f4e:	080a      	bt      	0x2f62	// 2f62 <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    2f50:	107a      	lrw      	r3, 0x2000004c	// 2fb8 <SYSCON_General_CMD.part.0+0x6c>
+    2f52:	32ff      	movi      	r2, 255
+    2f54:	9320      	ld.w      	r1, (r3, 0x0)
+    2f56:	9160      	ld.w      	r3, (r1, 0x0)
+    2f58:	424c      	lsli      	r2, r2, 12
+    2f5a:	68c9      	andn      	r3, r2
+    2f5c:	3bae      	bseti      	r3, 14
+    2f5e:	3bb2      	bseti      	r3, 18
+    2f60:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    2f62:	1077      	lrw      	r3, 0x2000005c	// 2fbc <SYSCON_General_CMD.part.0+0x70>
+    2f64:	9360      	ld.w      	r3, (r3, 0x0)
+    2f66:	9341      	ld.w      	r2, (r3, 0x4)
+    2f68:	6c80      	or      	r2, r0
+    2f6a:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    2f6c:	9343      	ld.w      	r2, (r3, 0xc)
+    2f6e:	6880      	and      	r2, r0
+    2f70:	3a40      	cmpnei      	r2, 0
+    2f72:	0ffd      	bf      	0x2f6c	// 2f6c <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    2f74:	3842      	cmpnei      	r0, 2
+    2f76:	0807      	bt      	0x2f84	// 2f84 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    2f78:	3102      	movi      	r1, 2
+    2f7a:	9344      	ld.w      	r2, (r3, 0x10)
+    2f7c:	6884      	and      	r2, r1
+    2f7e:	3a40      	cmpnei      	r2, 0
+    2f80:	0ffd      	bf      	0x2f7a	// 2f7a <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    2f82:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    2f84:	3802      	cmphsi      	r0, 3
+    2f86:	0809      	bt      	0x2f98	// 2f98 <SYSCON_General_CMD.part.0+0x4c>
+    2f88:	3841      	cmpnei      	r0, 1
+    2f8a:	0bfc      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    2f8c:	3101      	movi      	r1, 1
+    2f8e:	9344      	ld.w      	r2, (r3, 0x10)
+    2f90:	6884      	and      	r2, r1
+    2f92:	3a40      	cmpnei      	r2, 0
+    2f94:	0ffd      	bf      	0x2f8e	// 2f8e <SYSCON_General_CMD.part.0+0x42>
+    2f96:	07f6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2f98:	3848      	cmpnei      	r0, 8
+    2f9a:	0807      	bt      	0x2fa8	// 2fa8 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	9344      	ld.w      	r2, (r3, 0x10)
+    2fa0:	6884      	and      	r2, r1
+    2fa2:	3a40      	cmpnei      	r2, 0
+    2fa4:	0ffd      	bf      	0x2f9e	// 2f9e <SYSCON_General_CMD.part.0+0x52>
+    2fa6:	07ee      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2fa8:	3850      	cmpnei      	r0, 16
+    2faa:	0bec      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    2fac:	3110      	movi      	r1, 16
+    2fae:	9344      	ld.w      	r2, (r3, 0x10)
+    2fb0:	6884      	and      	r2, r1
+    2fb2:	3a40      	cmpnei      	r2, 0
+    2fb4:	0ffd      	bf      	0x2fae	// 2fae <SYSCON_General_CMD.part.0+0x62>
+    2fb6:	07e6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+    2fb8:	2000004c 	.long	0x2000004c
+    2fbc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00002fc0 <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    2fc0:	106c      	lrw      	r3, 0x2000005c	// 2ff0 <SYSCON_RST_VALUE+0x30>
+    2fc2:	104d      	lrw      	r2, 0xffff	// 2ff4 <SYSCON_RST_VALUE+0x34>
+    2fc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2fc6:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    2fc8:	104c      	lrw      	r2, 0xffffff	// 2ff8 <SYSCON_RST_VALUE+0x38>
+    2fca:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    2fcc:	104c      	lrw      	r2, 0xd22d0000	// 2ffc <SYSCON_RST_VALUE+0x3c>
+    2fce:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    2fd0:	104c      	lrw      	r2, 0x70ff3bff	// 3000 <SYSCON_RST_VALUE+0x40>
+    2fd2:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    2fd4:	320a      	movi      	r2, 10
+    2fd6:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fd8:	102b      	lrw      	r1, 0x70c	// 3004 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    2fda:	237f      	addi      	r3, 128
+    2fdc:	3200      	movi      	r2, 0
+    2fde:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    2fe0:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fe2:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    2fe4:	1029      	lrw      	r1, 0x3fe	// 3008 <SYSCON_RST_VALUE+0x48>
+    2fe6:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    2fe8:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    2fea:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    2fec:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    2fee:	783c      	jmp      	r15
+    2ff0:	2000005c 	.long	0x2000005c
+    2ff4:	0000ffff 	.long	0x0000ffff
+    2ff8:	00ffffff 	.long	0x00ffffff
+    2ffc:	d22d0000 	.long	0xd22d0000
+    3000:	70ff3bff 	.long	0x70ff3bff
+    3004:	0000070c 	.long	0x0000070c
+    3008:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+0000300c <SYSCON_General_CMD>:
+{
+    300c:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    300e:	3840      	cmpnei      	r0, 0
+    3010:	0c05      	bf      	0x301a	// 301a <SYSCON_General_CMD+0xe>
+    3012:	6c07      	mov      	r0, r1
+    3014:	e3ffff9c 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+}
+    3018:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    301a:	1068      	lrw      	r3, 0x2000005c	// 3038 <SYSCON_General_CMD+0x2c>
+    301c:	9360      	ld.w      	r3, (r3, 0x0)
+    301e:	9342      	ld.w      	r2, (r3, 0x8)
+    3020:	6c84      	or      	r2, r1
+    3022:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    3024:	9343      	ld.w      	r2, (r3, 0xc)
+    3026:	6884      	and      	r2, r1
+    3028:	3a40      	cmpnei      	r2, 0
+    302a:	0bfd      	bt      	0x3024	// 3024 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    302c:	237f      	addi      	r3, 128
+    302e:	9301      	ld.w      	r0, (r3, 0x4)
+    3030:	6c40      	or      	r1, r0
+    3032:	b321      	st.w      	r1, (r3, 0x4)
+}
+    3034:	07f2      	br      	0x3018	// 3018 <SYSCON_General_CMD+0xc>
+    3036:	0000      	bkpt
+    3038:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+0000303c <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    303c:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    303e:	3b48      	cmpnei      	r3, 8
+    3040:	0828      	bt      	0x3090	// 3090 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    3042:	109d      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3044:	3501      	movi      	r5, 1
+    3046:	9480      	ld.w      	r4, (r4, 0x0)
+    3048:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    304a:	3504      	movi      	r5, 4
+    304c:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    304e:	5b83      	subi      	r4, r3, 1
+    3050:	3c01      	cmphsi      	r4, 2
+    3052:	0c2b      	bf      	0x30a8	// 30a8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    3054:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    3056:	3c04      	cmphsi      	r4, 5
+    3058:	0c03      	bf      	0x305e	// 305e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    305a:	3b4b      	cmpnei      	r3, 11
+    305c:	0807      	bt      	0x306a	// 306a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    305e:	1076      	lrw      	r3, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3060:	3401      	movi      	r4, 1
+    3062:	9360      	ld.w      	r3, (r3, 0x0)
+    3064:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    3066:	3400      	movi      	r4, 0
+    3068:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    306a:	1094      	lrw      	r4, 0xd22d0000	// 30b8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    306c:	6c10      	or      	r0, r4
+    306e:	1074      	lrw      	r3, 0x2000005c	// 30bc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    3070:	6c40      	or      	r1, r0
+    3072:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3074:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    3076:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3078:	4001      	lsli      	r0, r0, 1
+    307a:	9324      	ld.w      	r1, (r3, 0x10)
+    307c:	6840      	and      	r1, r0
+    307e:	3940      	cmpnei      	r1, 0
+    3080:	0ffd      	bf      	0x307a	// 307a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    3082:	1030      	lrw      	r1, 0xc33c0000	// 30c0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    3084:	6c48      	or      	r1, r2
+    3086:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    3088:	9328      	ld.w      	r1, (r3, 0x20)
+    308a:	644a      	cmpne      	r2, r1
+    308c:	0bfe      	bt      	0x3088	// 3088 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    308e:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    3090:	3b40      	cmpnei      	r3, 0
+    3092:	0c03      	bf      	0x3098	// 3098 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    3094:	3b49      	cmpnei      	r3, 9
+    3096:	0807      	bt      	0x30a4	// 30a4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    3098:	1087      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    309a:	3501      	movi      	r5, 1
+    309c:	9480      	ld.w      	r4, (r4, 0x0)
+    309e:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    30a0:	3502      	movi      	r5, 2
+    30a2:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    30a4:	3b4a      	cmpnei      	r3, 10
+    30a6:	0bd4      	bt      	0x304e	// 304e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    30a8:	1083      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    30aa:	3501      	movi      	r5, 1
+    30ac:	9480      	ld.w      	r4, (r4, 0x0)
+    30ae:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    30b0:	b4a5      	st.w      	r5, (r4, 0x14)
+    30b2:	07d1      	br      	0x3054	// 3054 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    30b4:	20000060 	.long	0x20000060
+    30b8:	d22d0000 	.long	0xd22d0000
+    30bc:	2000005c 	.long	0x2000005c
+    30c0:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+000030c4 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    30c4:	14d1      	push      	r4, r15
+    30c6:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    30c8:	3110      	movi      	r1, 16
+    30ca:	3000      	movi      	r0, 0
+    30cc:	e3ffffa0 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    30d0:	1066      	lrw      	r3, 0x2000005c	// 30e8 <SYSCON_HFOSC_SELECTE+0x24>
+    30d2:	9360      	ld.w      	r3, (r3, 0x0)
+    30d4:	9319      	ld.w      	r0, (r3, 0x64)
+    30d6:	3884      	bclri      	r0, 4
+    30d8:	3885      	bclri      	r0, 5
+    30da:	6c10      	or      	r0, r4
+    30dc:	b319      	st.w      	r0, (r3, 0x64)
+    30de:	3010      	movi      	r0, 16
+    30e0:	e3ffff36 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    30e4:	1491      	pop      	r4, r15
+    30e6:	0000      	bkpt
+    30e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+000030ec <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    30ec:	106c      	lrw      	r3, 0x2000005c	// 311c <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    30ee:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f0:	9360      	ld.w      	r3, (r3, 0x0)
+    30f2:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    30f4:	0c0a      	bf      	0x3108	// 3108 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f6:	104b      	lrw      	r2, 0x78870000	// 3120 <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30f8:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30fa:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30fc:	4125      	lsli      	r1, r1, 5
+    30fe:	934d      	ld.w      	r2, (r3, 0x34)
+    3100:	6884      	and      	r2, r1
+    3102:	3a40      	cmpnei      	r2, 0
+    3104:	0ffd      	bf      	0x30fe	// 30fe <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    3106:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    3108:	1047      	lrw      	r2, 0x788755aa	// 3124 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310a:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    310c:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310e:	4125      	lsli      	r1, r1, 5
+    3110:	934d      	ld.w      	r2, (r3, 0x34)
+    3112:	6884      	and      	r2, r1
+    3114:	3a40      	cmpnei      	r2, 0
+    3116:	0bfd      	bt      	0x3110	// 3110 <SYSCON_WDT_CMD+0x24>
+    3118:	07f7      	br      	0x3106	// 3106 <SYSCON_WDT_CMD+0x1a>
+    311a:	0000      	bkpt
+    311c:	2000005c 	.long	0x2000005c
+    3120:	78870000 	.long	0x78870000
+    3124:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00003128 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    3128:	1064      	lrw      	r3, 0x2000005c	// 3138 <SYSCON_IWDCNT_Reload+0x10>
+    312a:	32b4      	movi      	r2, 180
+    312c:	9360      	ld.w      	r3, (r3, 0x0)
+    312e:	237f      	addi      	r3, 128
+    3130:	4257      	lsli      	r2, r2, 23
+    3132:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    3134:	783c      	jmp      	r15
+    3136:	0000      	bkpt
+    3138:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+0000313c <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    313c:	1044      	lrw      	r2, 0x87780000	// 314c <SYSCON_IWDCNT_Config+0x10>
+    313e:	1065      	lrw      	r3, 0x2000005c	// 3150 <SYSCON_IWDCNT_Config+0x14>
+    3140:	6c48      	or      	r1, r2
+    3142:	9360      	ld.w      	r3, (r3, 0x0)
+    3144:	6c04      	or      	r0, r1
+    3146:	237f      	addi      	r3, 128
+    3148:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    314a:	783c      	jmp      	r15
+    314c:	87780000 	.long	0x87780000
+    3150:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00003154 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    3154:	14c3      	push      	r4-r6
+    3156:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    3158:	10c5      	lrw      	r6, 0xb44b0000	// 316c <SYSCON_LVD_Config+0x18>
+    315a:	6d18      	or      	r4, r6
+    315c:	6cd0      	or      	r3, r4
+    315e:	6c8c      	or      	r2, r3
+    3160:	6c48      	or      	r1, r2
+    3162:	10a4      	lrw      	r5, 0x2000005c	// 3170 <SYSCON_LVD_Config+0x1c>
+    3164:	6c04      	or      	r0, r1
+    3166:	95a0      	ld.w      	r5, (r5, 0x0)
+    3168:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    316a:	1483      	pop      	r4-r6
+    316c:	b44b0000 	.long	0xb44b0000
+    3170:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00003174 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    3174:	1066      	lrw      	r3, 0x2000005c	// 318c <LVD_Int_Enable+0x18>
+    3176:	3180      	movi      	r1, 128
+    3178:	9360      	ld.w      	r3, (r3, 0x0)
+    317a:	3280      	movi      	r2, 128
+    317c:	604c      	addu      	r1, r3
+    317e:	4244      	lsli      	r2, r2, 4
+    3180:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    3182:	935d      	ld.w      	r2, (r3, 0x74)
+    3184:	3aab      	bseti      	r2, 11
+    3186:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    3188:	783c      	jmp      	r15
+    318a:	0000      	bkpt
+    318c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00003190 <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    3190:	1066      	lrw      	r3, 0x2000005c	// 31a8 <IWDT_Int_Enable+0x18>
+    3192:	3180      	movi      	r1, 128
+    3194:	9360      	ld.w      	r3, (r3, 0x0)
+    3196:	3280      	movi      	r2, 128
+    3198:	604c      	addu      	r1, r3
+    319a:	4241      	lsli      	r2, r2, 1
+    319c:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    319e:	935d      	ld.w      	r2, (r3, 0x74)
+    31a0:	3aa8      	bseti      	r2, 8
+    31a2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    31a4:	783c      	jmp      	r15
+    31a6:	0000      	bkpt
+    31a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+000031ac <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    31ac:	3a40      	cmpnei      	r2, 0
+    31ae:	0c04      	bf      	0x31b6	// 31b6 <EXTI_trigger_CMD+0xa>
+    31b0:	3a41      	cmpnei      	r2, 1
+    31b2:	0c0e      	bf      	0x31ce	// 31ce <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    31b4:	783c      	jmp      	r15
+    31b6:	106d      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31b8:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    31ba:	9360      	ld.w      	r3, (r3, 0x0)
+    31bc:	237f      	addi      	r3, 128
+    31be:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    31c0:	0c04      	bf      	0x31c8	// 31c8 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    31c2:	6c48      	or      	r1, r2
+    31c4:	b325      	st.w      	r1, (r3, 0x14)
+    31c6:	07f7      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    31c8:	6885      	andn      	r2, r1
+    31ca:	b345      	st.w      	r2, (r3, 0x14)
+    31cc:	07f4      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31ce:	1067      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31d0:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    31d2:	9360      	ld.w      	r3, (r3, 0x0)
+    31d4:	237f      	addi      	r3, 128
+    31d6:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    31d8:	0c04      	bf      	0x31e0	// 31e0 <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    31da:	6c48      	or      	r1, r2
+    31dc:	b326      	st.w      	r1, (r3, 0x18)
+    31de:	07eb      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    31e0:	6885      	andn      	r2, r1
+    31e2:	b346      	st.w      	r2, (r3, 0x18)
+}
+    31e4:	07e8      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31e6:	0000      	bkpt
+    31e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+000031ec <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    31ec:	3202      	movi      	r2, 2
+    31ee:	1062      	lrw      	r3, 0xe000e100	// 31f4 <SYSCON_Int_Enable+0x8>
+    31f0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    31f2:	783c      	jmp      	r15
+    31f4:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+000031f8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31f8:	1066      	lrw      	r3, 0xe000e400	// 3210 <SYSCON_INT_Priority+0x18>
+    31fa:	1047      	lrw      	r2, 0xc0c0c0c0	// 3214 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    31fc:	1027      	lrw      	r1, 0xc0c000c0	// 3218 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31fe:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    3200:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    3202:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    3204:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    3206:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    3208:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    320a:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    320c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    320e:	783c      	jmp      	r15
+    3210:	e000e400 	.long	0xe000e400
+    3214:	c0c0c0c0 	.long	0xc0c0c0c0
+    3218:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+0000321c <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    321c:	14c1      	push      	r4
+    321e:	4862      	lsri      	r3, r0, 2
+    3220:	4342      	lsli      	r2, r3, 2
+    3222:	106a      	lrw      	r3, 0x20000064	// 3248 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    3224:	3403      	movi      	r4, 3
+    3226:	9360      	ld.w      	r3, (r3, 0x0)
+    3228:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    322a:	3280      	movi      	r2, 128
+    322c:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    322e:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    3230:	60c8      	addu      	r3, r2
+    3232:	4003      	lsli      	r0, r0, 3
+    3234:	34ff      	movi      	r4, 255
+    3236:	9340      	ld.w      	r2, (r3, 0x0)
+    3238:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    323c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323e:	7040      	lsl      	r1, r0
+    3240:	6c48      	or      	r1, r2
+    3242:	b320      	st.w      	r1, (r3, 0x0)
+}
+    3244:	1481      	pop      	r4
+    3246:	0000      	bkpt
+    3248:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+0000324c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    324c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    324e:	3907      	cmphsi      	r1, 8
+{
+    3250:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    3252:	0830      	bt      	0x32b2	// 32b2 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    3254:	5903      	subi      	r0, r1, 1
+    3256:	3806      	cmphsi      	r0, 7
+    3258:	0827      	bt      	0x32a6	// 32a6 <GPIO_Init+0x5a>
+    325a:	e3ffed51 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    325e:	1004      	.short	0x1004
+    3260:	1d1a1613 	.long	0x1d1a1613
+    3264:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    3266:	3300      	movi      	r3, 0
+    3268:	3104      	movi      	r1, 4
+    326a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    326c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    326e:	9440      	ld.w      	r2, (r4, 0x0)
+    3270:	68c8      	and      	r3, r2
+        if (Dir)
+    3272:	0c1e      	bf      	0x32ae	// 32ae <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    3274:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    3276:	7084      	lsl      	r2, r1
+    3278:	6cc8      	or      	r3, r2
+    327a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    327c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    327e:	3108      	movi      	r1, 8
+    3280:	1166      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    3282:	07f5      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    3284:	310c      	movi      	r1, 12
+    3286:	1166      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    3288:	07f2      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    328a:	3110      	movi      	r1, 16
+    328c:	1165      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    328e:	2b00      	subi      	r3, 1
+    3290:	07ee      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    3292:	3114      	movi      	r1, 20
+    3294:	1164      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    3296:	07fc      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    3298:	33f1      	movi      	r3, 241
+    329a:	3118      	movi      	r1, 24
+    329c:	4378      	lsli      	r3, r3, 24
+    329e:	07f8      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    32a0:	311c      	movi      	r1, 28
+    32a2:	1162      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    32a4:	07e4      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    32a6:	3300      	movi      	r3, 0
+    32a8:	3100      	movi      	r1, 0
+    32aa:	2b0f      	subi      	r3, 16
+    32ac:	07e0      	br      	0x326c	// 326c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    32ae:	3202      	movi      	r2, 2
+    32b0:	07e3      	br      	0x3276	// 3276 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    32b2:	390f      	cmphsi      	r1, 16
+    32b4:	0be4      	bt      	0x327c	// 327c <GPIO_Init+0x30>
+        switch (PinNum)
+    32b6:	2908      	subi      	r1, 9
+    32b8:	3906      	cmphsi      	r1, 7
+    32ba:	6c07      	mov      	r0, r1
+    32bc:	0827      	bt      	0x330a	// 330a <GPIO_Init+0xbe>
+    32be:	e3ffed1f 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    32c2:	1004      	.short	0x1004
+    32c4:	1d1a1613 	.long	0x1d1a1613
+    32c8:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    32ca:	3300      	movi      	r3, 0
+    32cc:	3104      	movi      	r1, 4
+    32ce:	2bf0      	subi      	r3, 241
+      if (Dir)
+    32d0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d2:	9441      	ld.w      	r2, (r4, 0x4)
+    32d4:	68c8      	and      	r3, r2
+      if (Dir)
+    32d6:	0c1e      	bf      	0x3312	// 3312 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    32da:	7084      	lsl      	r2, r1
+    32dc:	6cc8      	or      	r3, r2
+    32de:	b461      	st.w      	r3, (r4, 0x4)
+}
+    32e0:	07ce      	br      	0x327c	// 327c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    32e2:	3108      	movi      	r1, 8
+    32e4:	106d      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    32e6:	07f5      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    32e8:	310c      	movi      	r1, 12
+    32ea:	106d      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    32ec:	07f2      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    32ee:	3110      	movi      	r1, 16
+    32f0:	106c      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32f2:	2b00      	subi      	r3, 1
+    32f4:	07ee      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    32f6:	3114      	movi      	r1, 20
+    32f8:	106b      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    32fa:	07fc      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32fc:	33f1      	movi      	r3, 241
+    32fe:	3118      	movi      	r1, 24
+    3300:	4378      	lsli      	r3, r3, 24
+    3302:	07f8      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    3304:	311c      	movi      	r1, 28
+    3306:	1069      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    3308:	07e4      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    330a:	3300      	movi      	r3, 0
+    330c:	3100      	movi      	r1, 0
+    330e:	2b0f      	subi      	r3, 16
+    3310:	07e0      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    3312:	3202      	movi      	r2, 2
+    3314:	07e3      	br      	0x32da	// 32da <GPIO_Init+0x8e>
+    3316:	0000      	bkpt
+    3318:	fffff0ff 	.long	0xfffff0ff
+    331c:	ffff0fff 	.long	0xffff0fff
+    3320:	fff10000 	.long	0xfff10000
+    3324:	ff100000 	.long	0xff100000
+    3328:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+0000332c <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    332c:	4121      	lsli      	r1, r1, 1
+    332e:	3203      	movi      	r2, 3
+    3330:	9068      	ld.w      	r3, (r0, 0x20)
+    3332:	7084      	lsl      	r2, r1
+    3334:	68c9      	andn      	r3, r2
+    3336:	3201      	movi      	r2, 1
+    3338:	7084      	lsl      	r2, r1
+    333a:	6cc8      	or      	r3, r2
+    333c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    333e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00003340 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    3340:	4121      	lsli      	r1, r1, 1
+    3342:	3301      	movi      	r3, 1
+    3344:	9049      	ld.w      	r2, (r0, 0x24)
+    3346:	70c4      	lsl      	r3, r1
+    3348:	6cc8      	or      	r3, r2
+    334a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    334c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+0000334e <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    334e:	3301      	movi      	r3, 1
+    3350:	70c4      	lsl      	r3, r1
+    3352:	b063      	st.w      	r3, (r0, 0xc)
+}
+    3354:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00003356 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    3356:	3301      	movi      	r3, 1
+    3358:	70c4      	lsl      	r3, r1
+    335a:	b064      	st.w      	r3, (r0, 0x10)
+}
+    335c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+0000335e <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    335e:	9045      	ld.w      	r2, (r0, 0x14)
+    3360:	3301      	movi      	r3, 1
+    3362:	7085      	lsr      	r2, r1
+    3364:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    3366:	3a40      	cmpnei      	r2, 0
+    3368:	70c4      	lsl      	r3, r1
+    336a:	0c03      	bf      	0x3370	// 3370 <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    336c:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    336e:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    3370:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    3372:	07fe      	br      	0x336e	// 336e <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00003374 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    3374:	3301      	movi      	r3, 1
+    3376:	9046      	ld.w      	r2, (r0, 0x18)
+    3378:	70c4      	lsl      	r3, r1
+    337a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    337c:	64ca      	cmpne      	r2, r3
+    337e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3380:	7400      	zextb      	r0, r0
+}
+    3382:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00003384 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    3384:	3301      	movi      	r3, 1
+    3386:	9045      	ld.w      	r2, (r0, 0x14)
+    3388:	70c4      	lsl      	r3, r1
+    338a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    338c:	64ca      	cmpne      	r2, r3
+    338e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3390:	7400      	zextb      	r0, r0
+}
+    3392:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00003394 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    3394:	1064      	lrw      	r3, 0x20000014	// 33a4 <LPT_Soft_Reset+0x10>
+    3396:	9340      	ld.w      	r2, (r3, 0x0)
+    3398:	9261      	ld.w      	r3, (r2, 0x4)
+    339a:	3bac      	bseti      	r3, 12
+    339c:	3bae      	bseti      	r3, 14
+    339e:	b261      	st.w      	r3, (r2, 0x4)
+}
+    33a0:	783c      	jmp      	r15
+    33a2:	0000      	bkpt
+    33a4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+000033a8 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    33a8:	1063      	lrw      	r3, 0x20000010	// 33b4 <WWDT_CNT_Load+0xc>
+    33aa:	9360      	ld.w      	r3, (r3, 0x0)
+    33ac:	9340      	ld.w      	r2, (r3, 0x0)
+    33ae:	6c08      	or      	r0, r2
+    33b0:	b300      	st.w      	r0, (r3, 0x0)
+}
+    33b2:	783c      	jmp      	r15
+    33b4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+000033b8 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    33b8:	3300      	movi      	r3, 0
+    33ba:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    33bc:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    33be:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    33c0:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    33c2:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    33c4:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    33c6:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    33c8:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    33ca:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    33cc:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    33ce:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    33d0:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    33d2:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000033d4 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    33d4:	9060      	ld.w      	r3, (r0, 0x0)
+    33d6:	3ba0      	bseti      	r3, 0
+    33d8:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33da:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000033dc <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    33dc:	9060      	ld.w      	r3, (r0, 0x0)
+    33de:	3bac      	bseti      	r3, 12
+    33e0:	3bae      	bseti      	r3, 14
+    33e2:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33e4:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000033e6 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    33e6:	14c3      	push      	r4-r6
+    33e8:	98a4      	ld.w      	r5, (r14, 0x10)
+    33ea:	6d97      	mov      	r6, r5
+    33ec:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    33ee:	6d18      	or      	r4, r6
+    33f0:	6cd0      	or      	r3, r4
+    33f2:	90a1      	ld.w      	r5, (r0, 0x4)
+    33f4:	6c4c      	or      	r1, r3
+    33f6:	6c54      	or      	r1, r5
+    33f8:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    33fa:	b042      	st.w      	r2, (r0, 0x8)
+}
+    33fc:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000033fe <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    33fe:	14c4      	push      	r4-r7
+    3400:	1421      	subi      	r14, r14, 4
+    3402:	9885      	ld.w      	r4, (r14, 0x14)
+    3404:	6dd3      	mov      	r7, r4
+    3406:	9886      	ld.w      	r4, (r14, 0x18)
+    3408:	b880      	st.w      	r4, (r14, 0x0)
+    340a:	9887      	ld.w      	r4, (r14, 0x1c)
+    340c:	6d93      	mov      	r6, r4
+    340e:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    3410:	6d58      	or      	r5, r6
+    3412:	98c0      	ld.w      	r6, (r14, 0x0)
+    3414:	6d58      	or      	r5, r6
+    3416:	6d5c      	or      	r5, r7
+    3418:	6cd4      	or      	r3, r5
+    341a:	6c8c      	or      	r2, r3
+    341c:	9081      	ld.w      	r4, (r0, 0x4)
+    341e:	6c48      	or      	r1, r2
+    3420:	6d04      	or      	r4, r1
+    3422:	6d9f      	mov      	r6, r7
+    3424:	b081      	st.w      	r4, (r0, 0x4)
+}
+    3426:	1401      	addi      	r14, r14, 4
+    3428:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+0000342a <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    342a:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    342c:	b044      	st.w      	r2, (r0, 0x10)
+}
+    342e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00003430 <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    3430:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3432:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    3434:	0c04      	bf      	0x343c	// 343c <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3436:	6c8c      	or      	r2, r3
+    3438:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    343a:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    343c:	68c9      	andn      	r3, r2
+    343e:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    3440:	07fd      	br      	0x343a	// 343a <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00003444 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    3444:	3380      	movi      	r3, 128
+    3446:	4376      	lsli      	r3, r3, 22
+    3448:	1042      	lrw      	r2, 0xe000e100	// 3450 <BT1_INT_ENABLE+0xc>
+    344a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    344c:	783c      	jmp      	r15
+    344e:	0000      	bkpt
+    3450:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00003454 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    3454:	3840      	cmpnei      	r0, 0
+    3456:	080a      	bt      	0x346a	// 346a <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    3458:	1165      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    345a:	31f0      	movi      	r1, 240
+    345c:	9340      	ld.w      	r2, (r3, 0x0)
+    345e:	9260      	ld.w      	r3, (r2, 0x0)
+    3460:	68c5      	andn      	r3, r1
+    3462:	3ba4      	bseti      	r3, 4
+    3464:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    3466:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    3468:	040b      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    346a:	3841      	cmpnei      	r0, 1
+    346c:	080a      	bt      	0x3480	// 3480 <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    346e:	1161      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3470:	31f0      	movi      	r1, 240
+    3472:	9340      	ld.w      	r2, (r3, 0x0)
+    3474:	9261      	ld.w      	r3, (r2, 0x4)
+    3476:	68c5      	andn      	r3, r1
+    3478:	3ba4      	bseti      	r3, 4
+    347a:	3ba6      	bseti      	r3, 6
+    347c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    347e:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    3480:	3842      	cmpnei      	r0, 2
+    3482:	080b      	bt      	0x3498	// 3498 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    3484:	107b      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3486:	32f0      	movi      	r2, 240
+    3488:	9320      	ld.w      	r1, (r3, 0x0)
+    348a:	9161      	ld.w      	r3, (r1, 0x4)
+    348c:	4244      	lsli      	r2, r2, 4
+    348e:	68c9      	andn      	r3, r2
+    3490:	3ba9      	bseti      	r3, 9
+    3492:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    3494:	b161      	st.w      	r3, (r1, 0x4)
+    3496:	07f4      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    3498:	3843      	cmpnei      	r0, 3
+    349a:	080b      	bt      	0x34b0	// 34b0 <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    349c:	1075      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    349e:	32f0      	movi      	r2, 240
+    34a0:	9320      	ld.w      	r1, (r3, 0x0)
+    34a2:	4244      	lsli      	r2, r2, 4
+    34a4:	9161      	ld.w      	r3, (r1, 0x4)
+    34a6:	68c9      	andn      	r3, r2
+    34a8:	32e0      	movi      	r2, 224
+    34aa:	4243      	lsli      	r2, r2, 3
+    34ac:	6cc8      	or      	r3, r2
+    34ae:	07f3      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    34b0:	3844      	cmpnei      	r0, 4
+    34b2:	080a      	bt      	0x34c6	// 34c6 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    34b4:	106f      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    34b6:	32f0      	movi      	r2, 240
+    34b8:	9320      	ld.w      	r1, (r3, 0x0)
+    34ba:	9161      	ld.w      	r3, (r1, 0x4)
+    34bc:	4248      	lsli      	r2, r2, 8
+    34be:	68c9      	andn      	r3, r2
+    34c0:	3bad      	bseti      	r3, 13
+    34c2:	3bae      	bseti      	r3, 14
+    34c4:	07e8      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    34c6:	3845      	cmpnei      	r0, 5
+    34c8:	0808      	bt      	0x34d8	// 34d8 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    34ca:	1069      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34cc:	310f      	movi      	r1, 15
+    34ce:	9340      	ld.w      	r2, (r3, 0x0)
+    34d0:	9260      	ld.w      	r3, (r2, 0x0)
+    34d2:	68c5      	andn      	r3, r1
+    34d4:	3ba2      	bseti      	r3, 2
+    34d6:	07c8      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    34d8:	3846      	cmpnei      	r0, 6
+    34da:	0bd2      	bt      	0x347e	// 347e <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    34dc:	1064      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34de:	31f0      	movi      	r1, 240
+    34e0:	9340      	ld.w      	r2, (r3, 0x0)
+    34e2:	9260      	ld.w      	r3, (r2, 0x0)
+    34e4:	68c5      	andn      	r3, r1
+    34e6:	3ba5      	bseti      	r3, 5
+    34e8:	3ba6      	bseti      	r3, 6
+    34ea:	07be      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+    34ec:	20000048 	.long	0x20000048
+    34f0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000034f4 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    34f4:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    34f6:	6c48      	or      	r1, r2
+    34f8:	1083      	lrw      	r4, 0x20000024	// 3504 <GPT_Configure+0x10>
+    34fa:	6c04      	or      	r0, r1
+    34fc:	9480      	ld.w      	r4, (r4, 0x0)
+    34fe:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    3500:	b462      	st.w      	r3, (r4, 0x8)
+}
+    3502:	1481      	pop      	r4
+    3504:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00003508 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    3508:	14c4      	push      	r4-r7
+    350a:	1423      	subi      	r14, r14, 12
+    350c:	9887      	ld.w      	r4, (r14, 0x1c)
+    350e:	6dd3      	mov      	r7, r4
+    3510:	9888      	ld.w      	r4, (r14, 0x20)
+    3512:	b880      	st.w      	r4, (r14, 0x0)
+    3514:	9889      	ld.w      	r4, (r14, 0x24)
+    3516:	b881      	st.w      	r4, (r14, 0x4)
+    3518:	988a      	ld.w      	r4, (r14, 0x28)
+    351a:	b882      	st.w      	r4, (r14, 0x8)
+    351c:	988b      	ld.w      	r4, (r14, 0x2c)
+    351e:	6d93      	mov      	r6, r4
+    3520:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    3522:	3cb2      	bseti      	r4, 18
+    3524:	6d18      	or      	r4, r6
+    3526:	98c2      	ld.w      	r6, (r14, 0x8)
+    3528:	6d18      	or      	r4, r6
+    352a:	98c1      	ld.w      	r6, (r14, 0x4)
+    352c:	6d18      	or      	r4, r6
+    352e:	98c0      	ld.w      	r6, (r14, 0x0)
+    3530:	6d18      	or      	r4, r6
+    3532:	6d1c      	or      	r4, r7
+    3534:	6cd0      	or      	r3, r4
+    3536:	6c8c      	or      	r2, r3
+    3538:	6c48      	or      	r1, r2
+    353a:	10a4      	lrw      	r5, 0x20000024	// 3548 <GPT_WaveCtrl_Configure+0x40>
+    353c:	6c04      	or      	r0, r1
+    353e:	95a0      	ld.w      	r5, (r5, 0x0)
+    3540:	6d9f      	mov      	r6, r7
+    3542:	b503      	st.w      	r0, (r5, 0xc)
+}
+    3544:	1403      	addi      	r14, r14, 12
+    3546:	1484      	pop      	r4-r7
+    3548:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+0000354c <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    354c:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    354e:	6c8c      	or      	r2, r3
+    3550:	6c48      	or      	r1, r2
+    3552:	1083      	lrw      	r4, 0x20000024	// 355c <GPT_WaveLoad_Configure+0x10>
+    3554:	6c04      	or      	r0, r1
+    3556:	9480      	ld.w      	r4, (r4, 0x0)
+    3558:	b411      	st.w      	r0, (r4, 0x44)
+}
+    355a:	1481      	pop      	r4
+    355c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+00003560 <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    3560:	14c4      	push      	r4-r7
+    3562:	1425      	subi      	r14, r14, 20
+    3564:	1c09      	addi      	r4, r14, 36
+    3566:	8480      	ld.b      	r4, (r4, 0x0)
+    3568:	b880      	st.w      	r4, (r14, 0x0)
+    356a:	1c0a      	addi      	r4, r14, 40
+    356c:	8480      	ld.b      	r4, (r4, 0x0)
+    356e:	b881      	st.w      	r4, (r14, 0x4)
+    3570:	1c0b      	addi      	r4, r14, 44
+    3572:	8480      	ld.b      	r4, (r4, 0x0)
+    3574:	b882      	st.w      	r4, (r14, 0x8)
+    3576:	1c0c      	addi      	r4, r14, 48
+    3578:	8480      	ld.b      	r4, (r4, 0x0)
+    357a:	b883      	st.w      	r4, (r14, 0xc)
+    357c:	1c0d      	addi      	r4, r14, 52
+    357e:	8480      	ld.b      	r4, (r4, 0x0)
+    3580:	1e10      	addi      	r6, r14, 64
+    3582:	b884      	st.w      	r4, (r14, 0x10)
+    3584:	1d0f      	addi      	r5, r14, 60
+    3586:	1c0e      	addi      	r4, r14, 56
+    3588:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    358a:	3840      	cmpnei      	r0, 0
+{
+    358c:	1e11      	addi      	r6, r14, 68
+    358e:	8480      	ld.b      	r4, (r4, 0x0)
+    3590:	85a0      	ld.b      	r5, (r5, 0x0)
+    3592:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    3594:	081f      	bt      	0x35d2	// 35d2 <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    3596:	47f0      	lsli      	r7, r7, 16
+    3598:	46d2      	lsli      	r6, r6, 18
+    359a:	45ae      	lsli      	r5, r5, 14
+    359c:	6dd8      	or      	r7, r6
+    359e:	6dd4      	or      	r7, r5
+    35a0:	448c      	lsli      	r4, r4, 12
+    35a2:	6dd0      	or      	r7, r4
+    35a4:	9884      	ld.w      	r4, (r14, 0x10)
+    35a6:	448a      	lsli      	r4, r4, 10
+    35a8:	6dd0      	or      	r7, r4
+    35aa:	9883      	ld.w      	r4, (r14, 0xc)
+    35ac:	4488      	lsli      	r4, r4, 8
+    35ae:	98a2      	ld.w      	r5, (r14, 0x8)
+    35b0:	6d1c      	or      	r4, r7
+    35b2:	45e6      	lsli      	r7, r5, 6
+    35b4:	6d1c      	or      	r4, r7
+    35b6:	6c90      	or      	r2, r4
+    35b8:	6cc8      	or      	r3, r2
+    35ba:	9841      	ld.w      	r2, (r14, 0x4)
+    35bc:	4244      	lsli      	r2, r2, 4
+    35be:	6cc8      	or      	r3, r2
+    35c0:	6c4c      	or      	r1, r3
+    35c2:	9860      	ld.w      	r3, (r14, 0x0)
+    35c4:	4362      	lsli      	r3, r3, 2
+    35c6:	1013      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    35c8:	6c4c      	or      	r1, r3
+    35ca:	9000      	ld.w      	r0, (r0, 0x0)
+    35cc:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    35ce:	1405      	addi      	r14, r14, 20
+    35d0:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    35d2:	3841      	cmpnei      	r0, 1
+    35d4:	0bfd      	bt      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    35d6:	47f0      	lsli      	r7, r7, 16
+    35d8:	46d2      	lsli      	r6, r6, 18
+    35da:	45ae      	lsli      	r5, r5, 14
+    35dc:	6dd8      	or      	r7, r6
+    35de:	6dd4      	or      	r7, r5
+    35e0:	448c      	lsli      	r4, r4, 12
+    35e2:	6dd0      	or      	r7, r4
+    35e4:	9884      	ld.w      	r4, (r14, 0x10)
+    35e6:	448a      	lsli      	r4, r4, 10
+    35e8:	6dd0      	or      	r7, r4
+    35ea:	9883      	ld.w      	r4, (r14, 0xc)
+    35ec:	4488      	lsli      	r4, r4, 8
+    35ee:	98a2      	ld.w      	r5, (r14, 0x8)
+    35f0:	6d1c      	or      	r4, r7
+    35f2:	45e6      	lsli      	r7, r5, 6
+    35f4:	6d1c      	or      	r4, r7
+    35f6:	6c90      	or      	r2, r4
+    35f8:	6cc8      	or      	r3, r2
+    35fa:	9841      	ld.w      	r2, (r14, 0x4)
+    35fc:	4244      	lsli      	r2, r2, 4
+    35fe:	6cc8      	or      	r3, r2
+    3600:	6c4c      	or      	r1, r3
+    3602:	9860      	ld.w      	r3, (r14, 0x0)
+    3604:	4362      	lsli      	r3, r3, 2
+    3606:	1003      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    3608:	6c4c      	or      	r1, r3
+    360a:	9000      	ld.w      	r0, (r0, 0x0)
+    360c:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    360e:	07e0      	br      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+    3610:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00003614 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    3614:	1063      	lrw      	r3, 0x20000024	// 3620 <GPT_Start+0xc>
+    3616:	9340      	ld.w      	r2, (r3, 0x0)
+    3618:	9261      	ld.w      	r3, (r2, 0x4)
+    361a:	3ba0      	bseti      	r3, 0
+    361c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    361e:	783c      	jmp      	r15
+    3620:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00003624 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    3624:	1063      	lrw      	r3, 0x20000024	// 3630 <GPT_Period_CMP_Write+0xc>
+    3626:	9360      	ld.w      	r3, (r3, 0x0)
+    3628:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    362a:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    362c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    362e:	783c      	jmp      	r15
+    3630:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00003634 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    3634:	1066      	lrw      	r3, 0x20000024	// 364c <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    3636:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3638:	9360      	ld.w      	r3, (r3, 0x0)
+    363a:	237f      	addi      	r3, 128
+    363c:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    363e:	0c04      	bf      	0x3646	// 3646 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3640:	6c48      	or      	r1, r2
+    3642:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    3644:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    3646:	6885      	andn      	r2, r1
+    3648:	b356      	st.w      	r2, (r3, 0x58)
+}
+    364a:	07fd      	br      	0x3644	// 3644 <GPT_ConfigInterrupt_CMD+0x10>
+    364c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+00003650 <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    3650:	1065      	lrw      	r3, 0x20000040	// 3664 <UART0_DeInit+0x14>
+    3652:	3200      	movi      	r2, 0
+    3654:	9360      	ld.w      	r3, (r3, 0x0)
+    3656:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    3658:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    365a:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    365c:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    365e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3660:	783c      	jmp      	r15
+    3662:	0000      	bkpt
+    3664:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00003668 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    3668:	1065      	lrw      	r3, 0x2000003c	// 367c <UART1_DeInit+0x14>
+    366a:	3200      	movi      	r2, 0
+    366c:	9360      	ld.w      	r3, (r3, 0x0)
+    366e:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    3670:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    3672:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    3674:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    3676:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3678:	783c      	jmp      	r15
+    367a:	0000      	bkpt
+    367c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+00003680 <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    3680:	1065      	lrw      	r3, 0x20000038	// 3694 <UART2_DeInit+0x14>
+    3682:	3200      	movi      	r2, 0
+    3684:	9360      	ld.w      	r3, (r3, 0x0)
+    3686:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    3688:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    368a:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    368c:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    368e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3690:	783c      	jmp      	r15
+    3692:	0000      	bkpt
+    3694:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+00003698 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    3698:	1065      	lrw      	r3, 0x20000040	// 36ac <UART0_Int_Enable+0x14>
+    369a:	320f      	movi      	r2, 15
+    369c:	9360      	ld.w      	r3, (r3, 0x0)
+    369e:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36a0:	3380      	movi      	r3, 128
+    36a2:	4366      	lsli      	r3, r3, 6
+    36a4:	1043      	lrw      	r2, 0xe000e100	// 36b0 <UART0_Int_Enable+0x18>
+    36a6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36a8:	783c      	jmp      	r15
+    36aa:	0000      	bkpt
+    36ac:	20000040 	.long	0x20000040
+    36b0:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000036b4 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    36b4:	1065      	lrw      	r3, 0x20000038	// 36c8 <UART2_Int_Enable+0x14>
+    36b6:	320f      	movi      	r2, 15
+    36b8:	9360      	ld.w      	r3, (r3, 0x0)
+    36ba:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36bc:	3380      	movi      	r3, 128
+    36be:	4368      	lsli      	r3, r3, 8
+    36c0:	1043      	lrw      	r2, 0xe000e100	// 36cc <UART2_Int_Enable+0x18>
+    36c2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36c4:	783c      	jmp      	r15
+    36c6:	0000      	bkpt
+    36c8:	20000038 	.long	0x20000038
+    36cc:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+000036d0 <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    36d0:	3840      	cmpnei      	r0, 0
+    36d2:	0821      	bt      	0x3714	// 3714 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    36d4:	3940      	cmpnei      	r1, 0
+    36d6:	080a      	bt      	0x36ea	// 36ea <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    36d8:	1177      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36da:	31ff      	movi      	r1, 255
+    36dc:	9340      	ld.w      	r2, (r3, 0x0)
+    36de:	9260      	ld.w      	r3, (r2, 0x0)
+    36e0:	68c5      	andn      	r3, r1
+    36e2:	3ba2      	bseti      	r3, 2
+    36e4:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    36e6:	b260      	st.w      	r3, (r2, 0x0)
+    36e8:	0415      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    36ea:	3941      	cmpnei      	r1, 1
+    36ec:	0813      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    36ee:	1172      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36f0:	31f0      	movi      	r1, 240
+    36f2:	9340      	ld.w      	r2, (r3, 0x0)
+    36f4:	9260      	ld.w      	r3, (r2, 0x0)
+    36f6:	4130      	lsli      	r1, r1, 16
+    36f8:	68c5      	andn      	r3, r1
+    36fa:	31e0      	movi      	r1, 224
+    36fc:	412f      	lsli      	r1, r1, 15
+    36fe:	6cc4      	or      	r3, r1
+    3700:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    3702:	31f0      	movi      	r1, 240
+    3704:	9261      	ld.w      	r3, (r2, 0x4)
+    3706:	412c      	lsli      	r1, r1, 12
+    3708:	68c5      	andn      	r3, r1
+    370a:	31e0      	movi      	r1, 224
+    370c:	412b      	lsli      	r1, r1, 11
+    370e:	6cc4      	or      	r3, r1
+    3710:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    3712:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    3714:	3841      	cmpnei      	r0, 1
+    3716:	082d      	bt      	0x3770	// 3770 <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    3718:	3940      	cmpnei      	r1, 0
+    371a:	0814      	bt      	0x3742	// 3742 <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    371c:	1167      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    371e:	310f      	movi      	r1, 15
+    3720:	9340      	ld.w      	r2, (r3, 0x0)
+    3722:	9260      	ld.w      	r3, (r2, 0x0)
+    3724:	68c5      	andn      	r3, r1
+    3726:	3107      	movi      	r1, 7
+    3728:	6cc4      	or      	r3, r1
+    372a:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    372c:	32f0      	movi      	r2, 240
+    372e:	1162      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3730:	4250      	lsli      	r2, r2, 16
+    3732:	9320      	ld.w      	r1, (r3, 0x0)
+    3734:	9161      	ld.w      	r3, (r1, 0x4)
+    3736:	68c9      	andn      	r3, r2
+    3738:	32e0      	movi      	r2, 224
+    373a:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    373c:	6cc8      	or      	r3, r2
+    373e:	b161      	st.w      	r3, (r1, 0x4)
+    3740:	07e9      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    3742:	3941      	cmpnei      	r1, 1
+    3744:	080c      	bt      	0x375c	// 375c <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    3746:	107c      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3748:	32ff      	movi      	r2, 255
+    374a:	9320      	ld.w      	r1, (r3, 0x0)
+    374c:	424c      	lsli      	r2, r2, 12
+    374e:	9160      	ld.w      	r3, (r1, 0x0)
+    3750:	68c9      	andn      	r3, r2
+    3752:	32ee      	movi      	r2, 238
+    3754:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    3756:	6cc8      	or      	r3, r2
+    3758:	b160      	st.w      	r3, (r1, 0x0)
+}
+    375a:	07dc      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    375c:	3942      	cmpnei      	r1, 2
+    375e:	0bda      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    3760:	1075      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3762:	32ee      	movi      	r2, 238
+    3764:	9320      	ld.w      	r1, (r3, 0x0)
+    3766:	9161      	ld.w      	r3, (r1, 0x4)
+    3768:	4368      	lsli      	r3, r3, 8
+    376a:	4b68      	lsri      	r3, r3, 8
+    376c:	4257      	lsli      	r2, r2, 23
+    376e:	07e7      	br      	0x373c	// 373c <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    3770:	3842      	cmpnei      	r0, 2
+    3772:	0bd0      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    3774:	3940      	cmpnei      	r1, 0
+    3776:	0809      	bt      	0x3788	// 3788 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    3778:	106f      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    377a:	31ff      	movi      	r1, 255
+    377c:	9340      	ld.w      	r2, (r3, 0x0)
+    377e:	9260      	ld.w      	r3, (r2, 0x0)
+    3780:	68c5      	andn      	r3, r1
+    3782:	3177      	movi      	r1, 119
+    3784:	6cc4      	or      	r3, r1
+    3786:	07b0      	br      	0x36e6	// 36e6 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    3788:	3941      	cmpnei      	r1, 1
+    378a:	0809      	bt      	0x379c	// 379c <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    378c:	106a      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    378e:	32ee      	movi      	r2, 238
+    3790:	9320      	ld.w      	r1, (r3, 0x0)
+    3792:	9160      	ld.w      	r3, (r1, 0x0)
+    3794:	4368      	lsli      	r3, r3, 8
+    3796:	4b68      	lsri      	r3, r3, 8
+    3798:	4257      	lsli      	r2, r2, 23
+    379a:	07de      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    379c:	3942      	cmpnei      	r1, 2
+    379e:	0bba      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    37a0:	1066      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    37a2:	32ff      	movi      	r2, 255
+    37a4:	9320      	ld.w      	r1, (r3, 0x0)
+    37a6:	4250      	lsli      	r2, r2, 16
+    37a8:	9160      	ld.w      	r3, (r1, 0x0)
+    37aa:	68c9      	andn      	r3, r2
+    37ac:	32cc      	movi      	r2, 204
+    37ae:	424f      	lsli      	r2, r2, 15
+    37b0:	07d3      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+    37b2:	0000      	bkpt
+    37b4:	2000004c 	.long	0x2000004c
+    37b8:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000037bc <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    37bc:	1063      	lrw      	r3, 0x80003	// 37c8 <UARTInit+0xc>
+    37be:	6c8c      	or      	r2, r3
+    37c0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37c2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37c4:	783c      	jmp      	r15
+    37c6:	0000      	bkpt
+    37c8:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+000037cc <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    37cc:	1063      	lrw      	r3, 0x8000f	// 37d8 <UARTInitRxTxIntEn+0xc>
+    37ce:	6c8c      	or      	r2, r3
+    37d0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37d2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37d4:	783c      	jmp      	r15
+    37d6:	0000      	bkpt
+    37d8:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+000037dc <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    37dc:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37de:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    37e0:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37e2:	5b85      	subu      	r4, r3, r1
+    37e4:	6490      	cmphs      	r4, r2
+    37e6:	0c02      	bf      	0x37ea	// 37ea <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    37e8:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    37ea:	8380      	ld.b      	r4, (r3, 0x0)
+    37ec:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    37ee:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    37f0:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    37f2:	3c40      	cmpnei      	r4, 0
+    37f4:	0bfd      	bt      	0x37ee	// 37ee <UARTTransmit+0x12>
+    37f6:	2300      	addi      	r3, 1
+    37f8:	07f5      	br      	0x37e2	// 37e2 <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000037fc <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    37fc:	1068      	lrw      	r3, 0x20000020	// 381c <EPT_Stop+0x20>
+    37fe:	3280      	movi      	r2, 128
+    3800:	9360      	ld.w      	r3, (r3, 0x0)
+    3802:	608c      	addu      	r2, r3
+    3804:	1027      	lrw      	r1, 0xa55ac73a	// 3820 <EPT_Stop+0x24>
+    3806:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    3808:	9341      	ld.w      	r2, (r3, 0x4)
+    380a:	31fe      	movi      	r1, 254
+    380c:	6884      	and      	r2, r1
+    380e:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    3810:	3101      	movi      	r1, 1
+    3812:	9341      	ld.w      	r2, (r3, 0x4)
+    3814:	6884      	and      	r2, r1
+    3816:	3a40      	cmpnei      	r2, 0
+    3818:	0bfd      	bt      	0x3812	// 3812 <EPT_Stop+0x16>
+}
+    381a:	783c      	jmp      	r15
+    381c:	20000020 	.long	0x20000020
+    3820:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00003824 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    3824:	14d1      	push      	r4, r15
+	
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3826:	1099      	lrw      	r4, 0x20000048	// 3888 <main+0x64>
+    3828:	3201      	movi      	r2, 1
+    382a:	9400      	ld.w      	r0, (r4, 0x0)
+    382c:	3102      	movi      	r1, 2
+    382e:	e3fffd0f 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    3832:	9400      	ld.w      	r0, (r4, 0x0)
+    3834:	3102      	movi      	r1, 2
+    3836:	e3fffd7b 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    383a:	3102      	movi      	r1, 2
+    383c:	9400      	ld.w      	r0, (r4, 0x0)
+    383e:	e3fffd9b 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    3842:	1093      	lrw      	r4, 0x200000a0	// 388c <main+0x68>
+	last_state = rf_exist;
+    3844:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3846:	a400      	st.b      	r0, (r4, 0x0)
+	APT32F102_init();							//102 initial
+    3848:	e00000e8 	bsr      	0x3a18	// 3a18 <APT32F102_init>
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    384c:	1031      	lrw      	r1, 0x5e4c	// 3890 <main+0x6c>
+    384e:	3000      	movi      	r0, 0
+    3850:	e00006b8 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    3854:	e3fffc6a 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+
+		//UART2_TASK();
+		Detect_WIFI_Task();
+    3858:	e0000b54 	bsr      	0x4f00	// 4f00 <Detect_WIFI_Task>
+		
+		Detect_SPI_task();
+    385c:	e00009c0 	bsr      	0x4bdc	// 4bdc <Detect_SPI_task>
+		
+		BackLight_Task();
+    3860:	e0000b3e 	bsr      	0x4edc	// 4edc <BackLight_Task>
+		
+		Led_Task();
+    3864:	e0000b98 	bsr      	0x4f94	// 4f94 <Led_Task>
+		
+		if (finish_flag == 1) {
+    3868:	8462      	ld.b      	r3, (r4, 0x2)
+    386a:	3b41      	cmpnei      	r3, 1
+    386c:	0bf4      	bt      	0x3854	// 3854 <main+0x30>
+			Card_Read_TasK();
+    386e:	e0000961 	bsr      	0x4b30	// 4b30 <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    3872:	8460      	ld.b      	r3, (r4, 0x0)
+    3874:	3b41      	cmpnei      	r3, 1
+    3876:	0804      	bt      	0x387e	// 387e <main+0x5a>
+			{
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    3878:	e0000ad2 	bsr      	0x4e1c	// 4e1c <LogicCtrl_NoRF_Task>
+    387c:	07ec      	br      	0x3854	// 3854 <main+0x30>
+			}
+			else if(rf_exist == 0x00)
+    387e:	3b40      	cmpnei      	r3, 0
+    3880:	0bea      	bt      	0x3854	// 3854 <main+0x30>
+			{
+//				Debounce_Task();
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    3882:	e0000a59 	bsr      	0x4d34	// 4d34 <LogicCtrl_Task>
+    3886:	07e7      	br      	0x3854	// 3854 <main+0x30>
+    3888:	20000048 	.long	0x20000048
+    388c:	200000a0 	.long	0x200000a0
+    3890:	00005e4c 	.long	0x00005e4c
+
+Disassembly of section .text.delay_nms:
+
+00003894 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    3894:	14d0      	push      	r15
+    3896:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    3898:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    389a:	3300      	movi      	r3, 0
+    j = 50* t;
+    389c:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    389e:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    38a0:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    38a2:	b860      	st.w      	r3, (r14, 0x0)
+    38a4:	9840      	ld.w      	r2, (r14, 0x0)
+    38a6:	9861      	ld.w      	r3, (r14, 0x4)
+    38a8:	64c8      	cmphs      	r2, r3
+    38aa:	0c03      	bf      	0x38b0	// 38b0 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    38ac:	1403      	addi      	r14, r14, 12
+    38ae:	1490      	pop      	r15
+        k++;
+    38b0:	9862      	ld.w      	r3, (r14, 0x8)
+    38b2:	2300      	addi      	r3, 1
+    38b4:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    38b6:	e3fffc39 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    38ba:	9860      	ld.w      	r3, (r14, 0x0)
+    38bc:	2300      	addi      	r3, 1
+    38be:	07f2      	br      	0x38a2	// 38a2 <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000038c0 <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    38c0:	14d0      	push      	r15
+    38c2:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    38c4:	3000      	movi      	r0, 0
+    38c6:	e3fffdc7 	bsr      	0x3454	// 3454 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    38ca:	3300      	movi      	r3, 0
+    38cc:	3240      	movi      	r2, 64
+    38ce:	3100      	movi      	r1, 0
+    38d0:	3001      	movi      	r0, 1
+    38d2:	e3fffe11 	bsr      	0x34f4	// 34f4 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    38d6:	3300      	movi      	r3, 0
+    38d8:	b865      	st.w      	r3, (r14, 0x14)
+    38da:	b864      	st.w      	r3, (r14, 0x10)
+    38dc:	b863      	st.w      	r3, (r14, 0xc)
+    38de:	b862      	st.w      	r3, (r14, 0x8)
+    38e0:	b861      	st.w      	r3, (r14, 0x4)
+    38e2:	b860      	st.w      	r3, (r14, 0x0)
+    38e4:	3208      	movi      	r2, 8
+    38e6:	3100      	movi      	r1, 0
+    38e8:	3000      	movi      	r0, 0
+    38ea:	e3fffe0f 	bsr      	0x3508	// 3508 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    38ee:	1079      	lrw      	r3, 0x200000a0	// 3950 <GPT0_CONFIG+0x90>
+    38f0:	8360      	ld.b      	r3, (r3, 0x0)
+    38f2:	3b41      	cmpnei      	r3, 1
+    38f4:	0827      	bt      	0x3942	// 3942 <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    38f6:	31fa      	movi      	r1, 250
+    38f8:	4123      	lsli      	r1, r1, 3
+    38fa:	3200      	movi      	r2, 0
+    38fc:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    38fe:	e3fffe93 	bsr      	0x3624	// 3624 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    3902:	3320      	movi      	r3, 32
+    3904:	3204      	movi      	r2, 4
+    3906:	3100      	movi      	r1, 0
+    3908:	3001      	movi      	r0, 1
+    390a:	e3fffe21 	bsr      	0x354c	// 354c <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    390e:	3300      	movi      	r3, 0
+    3910:	3201      	movi      	r2, 1
+    3912:	b868      	st.w      	r3, (r14, 0x20)
+    3914:	b867      	st.w      	r3, (r14, 0x1c)
+    3916:	b866      	st.w      	r3, (r14, 0x18)
+    3918:	b865      	st.w      	r3, (r14, 0x14)
+    391a:	b864      	st.w      	r3, (r14, 0x10)
+    391c:	b863      	st.w      	r3, (r14, 0xc)
+    391e:	b842      	st.w      	r2, (r14, 0x8)
+    3920:	b841      	st.w      	r2, (r14, 0x4)
+    3922:	b860      	st.w      	r3, (r14, 0x0)
+    3924:	3200      	movi      	r2, 0
+    3926:	3302      	movi      	r3, 2
+    3928:	3100      	movi      	r1, 0
+    392a:	3000      	movi      	r0, 0
+    392c:	e3fffe1a 	bsr      	0x3560	// 3560 <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    3930:	e3fffe72 	bsr      	0x3614	// 3614 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    3934:	3180      	movi      	r1, 128
+    3936:	4129      	lsli      	r1, r1, 9
+    3938:	3001      	movi      	r0, 1
+    393a:	e3fffe7d 	bsr      	0x3634	// 3634 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    393e:	1409      	addi      	r14, r14, 36
+    3940:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    3942:	3b40      	cmpnei      	r3, 0
+    3944:	0bdf      	bt      	0x3902	// 3902 <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    3946:	30fa      	movi      	r0, 250
+    3948:	3200      	movi      	r2, 0
+    394a:	3100      	movi      	r1, 0
+    394c:	4003      	lsli      	r0, r0, 3
+    394e:	07d8      	br      	0x38fe	// 38fe <GPT0_CONFIG+0x3e>
+    3950:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.BT_CONFIG:
+
+00003954 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    3954:	14d2      	push      	r4-r5, r15
+    3956:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    3958:	1095      	lrw      	r4, 0x20000008	// 39ac <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    395a:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    395c:	9400      	ld.w      	r0, (r4, 0x0)
+    395e:	e3fffd2d 	bsr      	0x33b8	// 33b8 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    3962:	9400      	ld.w      	r0, (r4, 0x0)
+    3964:	b8a1      	st.w      	r5, (r14, 0x4)
+    3966:	b8a0      	st.w      	r5, (r14, 0x0)
+    3968:	3308      	movi      	r3, 8
+    396a:	3200      	movi      	r2, 0
+    396c:	3101      	movi      	r1, 1
+    396e:	e3fffd3c 	bsr      	0x33e6	// 33e6 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    3972:	3380      	movi      	r3, 128
+    3974:	4363      	lsli      	r3, r3, 3
+    3976:	b861      	st.w      	r3, (r14, 0x4)
+    3978:	9400      	ld.w      	r0, (r4, 0x0)
+    397a:	3300      	movi      	r3, 0
+    397c:	b8a3      	st.w      	r5, (r14, 0xc)
+    397e:	b8a2      	st.w      	r5, (r14, 0x8)
+    3980:	b8a0      	st.w      	r5, (r14, 0x0)
+    3982:	3200      	movi      	r2, 0
+    3984:	3180      	movi      	r1, 128
+    3986:	e3fffd3c 	bsr      	0x33fe	// 33fe <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    398a:	3201      	movi      	r2, 1
+    398c:	1029      	lrw      	r1, 0x12ac	// 39b0 <BT_CONFIG+0x5c>
+    398e:	9400      	ld.w      	r0, (r4, 0x0)
+    3990:	e3fffd4d 	bsr      	0x342a	// 342a <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    3994:	9400      	ld.w      	r0, (r4, 0x0)
+    3996:	e3fffd1f 	bsr      	0x33d4	// 33d4 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    399a:	9400      	ld.w      	r0, (r4, 0x0)
+    399c:	3202      	movi      	r2, 2
+    399e:	3101      	movi      	r1, 1
+    39a0:	e3fffd48 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    39a4:	e3fffd50 	bsr      	0x3444	// 3444 <BT1_INT_ENABLE>
+	
+}
+    39a8:	1404      	addi      	r14, r14, 16
+    39aa:	1492      	pop      	r4-r5, r15
+    39ac:	20000008 	.long	0x20000008
+    39b0:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000039b4 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    39b4:	14d0      	push      	r15
+    39b6:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    39b8:	e3fffb04 	bsr      	0x2fc0	// 2fc0 <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    39bc:	3101      	movi      	r1, 1
+    39be:	3001      	movi      	r0, 1
+    39c0:	e3fffb26 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    39c4:	3000      	movi      	r0, 0
+    39c6:	e3fffb7f 	bsr      	0x30c4	// 30c4 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    39ca:	3180      	movi      	r1, 128
+    39cc:	3308      	movi      	r3, 8
+    39ce:	3200      	movi      	r2, 0
+    39d0:	4121      	lsli      	r1, r1, 1
+    39d2:	3002      	movi      	r0, 2
+    39d4:	e3fffb34 	bsr      	0x303c	// 303c <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    39d8:	3080      	movi      	r0, 128
+    39da:	3118      	movi      	r1, 24
+    39dc:	4002      	lsli      	r0, r0, 2
+    39de:	e3fffbaf 	bsr      	0x313c	// 313c <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    39e2:	3001      	movi      	r0, 1
+    39e4:	e3fffb84 	bsr      	0x30ec	// 30ec <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    39e8:	e3fffba0 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    39ec:	e3fffbd2 	bsr      	0x3190	// 3190 <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    39f0:	3340      	movi      	r3, 64
+    39f2:	b860      	st.w      	r3, (r14, 0x0)
+    39f4:	31c0      	movi      	r1, 192
+    39f6:	3380      	movi      	r3, 128
+    39f8:	4364      	lsli      	r3, r3, 4
+    39fa:	3200      	movi      	r2, 0
+    39fc:	4123      	lsli      	r1, r1, 3
+    39fe:	3000      	movi      	r0, 0
+    3a00:	e3fffbaa 	bsr      	0x3154	// 3154 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    3a04:	e3fffbb8 	bsr      	0x3174	// 3174 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    3a08:	e3fffbf2 	bsr      	0x31ec	// 31ec <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    3a0c:	3000      	movi      	r0, 0
+    3a0e:	e0000f0b 	bsr      	0x5824	// 5824 <std_clk_calib>
+	
+}
+    3a12:	1401      	addi      	r14, r14, 4
+    3a14:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00003a18 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    3a18:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a1a:	1072      	lrw      	r3, 0x2000005c	// 3a60 <APT32F102_init+0x48>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a1c:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a1e:	9340      	ld.w      	r2, (r3, 0x0)
+    3a20:	1071      	lrw      	r3, 0xfffffff	// 3a64 <APT32F102_init+0x4c>
+    3a22:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    3a24:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a26:	926c      	ld.w      	r3, (r2, 0x30)
+    3a28:	68c4      	and      	r3, r1
+    3a2a:	3b40      	cmpnei      	r3, 0
+    3a2c:	0ffd      	bf      	0x3a26	// 3a26 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    3a2e:	e3ffffc3 	bsr      	0x39b4	// 39b4 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    3a32:	e0000525 	bsr      	0x447c	// 447c <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    3a36:	e3fffbe1 	bsr      	0x31f8	// 31f8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    3a3a:	3101      	movi      	r1, 1
+    3a3c:	300f      	movi      	r0, 15
+    3a3e:	e3fffbef 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//	Set_INT_Priority(SIO_IRQ,1);				//SIO优先级最高
+//	
+	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+    3a42:	3102      	movi      	r1, 2
+    3a44:	3019      	movi      	r0, 25
+    3a46:	e3fffbeb 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    3a4a:	e3ffff85 	bsr      	0x3954	// 3954 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    3a4e:	e3ffff39 	bsr      	0x38c0	// 38c0 <GPT0_CONFIG>
+	
+	UARTx_Init(UART_1,NULL);
+    3a52:	3100      	movi      	r1, 0
+    3a54:	3001      	movi      	r0, 1
+    3a56:	e0000517 	bsr      	0x4484	// 4484 <UARTx_Init>
+//	UARTx_Init(UART_2,NULL);
+	
+	RC522_Init();
+    3a5a:	e0000701 	bsr      	0x485c	// 485c <RC522_Init>
+//	}
+//	else if(rf_exist == 0x00)  //带无线模块初始化
+//	{
+//		LogicCtrl_Init();     
+//	}
+}
+    3a5e:	1490      	pop      	r15
+    3a60:	2000005c 	.long	0x2000005c
+    3a64:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00003a68 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    3a68:	1460      	nie
+    3a6a:	1462      	ipush
+    // ISR content ...
+	nop;
+    3a6c:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    3a6e:	117a      	lrw      	r3, 0x2000005c	// 3b54 <SYSCONIntHandler+0xec>
+    3a70:	3280      	movi      	r2, 128
+    3a72:	9360      	ld.w      	r3, (r3, 0x0)
+    3a74:	60c8      	addu      	r3, r2
+    3a76:	9323      	ld.w      	r1, (r3, 0xc)
+    3a78:	3001      	movi      	r0, 1
+    3a7a:	6840      	and      	r1, r0
+    3a7c:	3940      	cmpnei      	r1, 0
+    3a7e:	0c04      	bf      	0x3a86	// 3a86 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    3a80:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    3a82:	1463      	ipop
+    3a84:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    3a86:	9323      	ld.w      	r1, (r3, 0xc)
+    3a88:	3002      	movi      	r0, 2
+    3a8a:	6840      	and      	r1, r0
+    3a8c:	3940      	cmpnei      	r1, 0
+    3a8e:	0bf9      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    3a90:	9323      	ld.w      	r1, (r3, 0xc)
+    3a92:	3008      	movi      	r0, 8
+    3a94:	6840      	and      	r1, r0
+    3a96:	3940      	cmpnei      	r1, 0
+    3a98:	0bf4      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    3a9a:	9323      	ld.w      	r1, (r3, 0xc)
+    3a9c:	3010      	movi      	r0, 16
+    3a9e:	6840      	and      	r1, r0
+    3aa0:	3940      	cmpnei      	r1, 0
+    3aa2:	0bef      	bt      	0x3a80	// 3a80 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    3aa4:	9323      	ld.w      	r1, (r3, 0xc)
+    3aa6:	6848      	and      	r1, r2
+    3aa8:	3940      	cmpnei      	r1, 0
+    3aaa:	0c03      	bf      	0x3ab0	// 3ab0 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    3aac:	b341      	st.w      	r2, (r3, 0x4)
+}
+    3aae:	07ea      	br      	0x3a82	// 3a82 <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    3ab0:	3280      	movi      	r2, 128
+    3ab2:	9323      	ld.w      	r1, (r3, 0xc)
+    3ab4:	4241      	lsli      	r2, r2, 1
+    3ab6:	6848      	and      	r1, r2
+    3ab8:	3940      	cmpnei      	r1, 0
+    3aba:	0bf9      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    3abc:	3280      	movi      	r2, 128
+    3abe:	9323      	ld.w      	r1, (r3, 0xc)
+    3ac0:	4242      	lsli      	r2, r2, 2
+    3ac2:	6848      	and      	r1, r2
+    3ac4:	3940      	cmpnei      	r1, 0
+    3ac6:	0bf3      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    3ac8:	3280      	movi      	r2, 128
+    3aca:	9323      	ld.w      	r1, (r3, 0xc)
+    3acc:	4243      	lsli      	r2, r2, 3
+    3ace:	6848      	and      	r1, r2
+    3ad0:	3940      	cmpnei      	r1, 0
+    3ad2:	0bed      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    3ad4:	3280      	movi      	r2, 128
+    3ad6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ad8:	4244      	lsli      	r2, r2, 4
+    3ada:	6848      	and      	r1, r2
+    3adc:	3940      	cmpnei      	r1, 0
+    3ade:	0c03      	bf      	0x3ae4	// 3ae4 <SYSCONIntHandler+0x7c>
+		nop;
+    3ae0:	6c03      	mov      	r0, r0
+    3ae2:	07e5      	br      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    3ae4:	3280      	movi      	r2, 128
+    3ae6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ae8:	4245      	lsli      	r2, r2, 5
+    3aea:	6848      	and      	r1, r2
+    3aec:	3940      	cmpnei      	r1, 0
+    3aee:	0bdf      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    3af0:	3280      	movi      	r2, 128
+    3af2:	9323      	ld.w      	r1, (r3, 0xc)
+    3af4:	4246      	lsli      	r2, r2, 6
+    3af6:	6848      	and      	r1, r2
+    3af8:	3940      	cmpnei      	r1, 0
+    3afa:	0bd9      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    3afc:	3280      	movi      	r2, 128
+    3afe:	9323      	ld.w      	r1, (r3, 0xc)
+    3b00:	4247      	lsli      	r2, r2, 7
+    3b02:	6848      	and      	r1, r2
+    3b04:	3940      	cmpnei      	r1, 0
+    3b06:	0bd3      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    3b08:	3280      	movi      	r2, 128
+    3b0a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b0c:	424b      	lsli      	r2, r2, 11
+    3b0e:	6848      	and      	r1, r2
+    3b10:	3940      	cmpnei      	r1, 0
+    3b12:	0bcd      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    3b14:	3280      	movi      	r2, 128
+    3b16:	9323      	ld.w      	r1, (r3, 0xc)
+    3b18:	424c      	lsli      	r2, r2, 12
+    3b1a:	6848      	and      	r1, r2
+    3b1c:	3940      	cmpnei      	r1, 0
+    3b1e:	0bc7      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    3b20:	3280      	movi      	r2, 128
+    3b22:	9323      	ld.w      	r1, (r3, 0xc)
+    3b24:	424d      	lsli      	r2, r2, 13
+    3b26:	6848      	and      	r1, r2
+    3b28:	3940      	cmpnei      	r1, 0
+    3b2a:	0bc1      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    3b2c:	3280      	movi      	r2, 128
+    3b2e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b30:	424e      	lsli      	r2, r2, 14
+    3b32:	6848      	and      	r1, r2
+    3b34:	3940      	cmpnei      	r1, 0
+    3b36:	0bbb      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    3b38:	3280      	movi      	r2, 128
+    3b3a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b3c:	424f      	lsli      	r2, r2, 15
+    3b3e:	6848      	and      	r1, r2
+    3b40:	3940      	cmpnei      	r1, 0
+    3b42:	0bb5      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    3b44:	3280      	movi      	r2, 128
+    3b46:	9323      	ld.w      	r1, (r3, 0xc)
+    3b48:	4256      	lsli      	r2, r2, 22
+    3b4a:	6848      	and      	r1, r2
+    3b4c:	3940      	cmpnei      	r1, 0
+    3b4e:	0baf      	bt      	0x3aac	// 3aac <SYSCONIntHandler+0x44>
+    3b50:	0799      	br      	0x3a82	// 3a82 <SYSCONIntHandler+0x1a>
+    3b52:	0000      	bkpt
+    3b54:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00003b58 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    3b58:	1460      	nie
+    3b5a:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    3b5c:	1078      	lrw      	r3, 0x20000060	// 3bbc <IFCIntHandler+0x64>
+    3b5e:	3101      	movi      	r1, 1
+    3b60:	9360      	ld.w      	r3, (r3, 0x0)
+    3b62:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b64:	6884      	and      	r2, r1
+    3b66:	3a40      	cmpnei      	r2, 0
+    3b68:	0c04      	bf      	0x3b70	// 3b70 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    3b6a:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    3b6c:	1463      	ipop
+    3b6e:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    3b70:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b72:	3102      	movi      	r1, 2
+    3b74:	6884      	and      	r2, r1
+    3b76:	3a40      	cmpnei      	r2, 0
+    3b78:	0bf9      	bt      	0x3b6a	// 3b6a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    3b7a:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b7c:	3104      	movi      	r1, 4
+    3b7e:	6884      	and      	r2, r1
+    3b80:	3a40      	cmpnei      	r2, 0
+    3b82:	0bf4      	bt      	0x3b6a	// 3b6a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    3b84:	3280      	movi      	r2, 128
+    3b86:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b88:	4245      	lsli      	r2, r2, 5
+    3b8a:	6848      	and      	r1, r2
+    3b8c:	3940      	cmpnei      	r1, 0
+    3b8e:	0c03      	bf      	0x3b94	// 3b94 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    3b90:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    3b92:	07ed      	br      	0x3b6c	// 3b6c <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    3b94:	3280      	movi      	r2, 128
+    3b96:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b98:	4246      	lsli      	r2, r2, 6
+    3b9a:	6848      	and      	r1, r2
+    3b9c:	3940      	cmpnei      	r1, 0
+    3b9e:	0bf9      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    3ba0:	3280      	movi      	r2, 128
+    3ba2:	932b      	ld.w      	r1, (r3, 0x2c)
+    3ba4:	4247      	lsli      	r2, r2, 7
+    3ba6:	6848      	and      	r1, r2
+    3ba8:	3940      	cmpnei      	r1, 0
+    3baa:	0bf3      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    3bac:	3280      	movi      	r2, 128
+    3bae:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bb0:	4248      	lsli      	r2, r2, 8
+    3bb2:	6848      	and      	r1, r2
+    3bb4:	3940      	cmpnei      	r1, 0
+    3bb6:	0bed      	bt      	0x3b90	// 3b90 <IFCIntHandler+0x38>
+    3bb8:	07da      	br      	0x3b6c	// 3b6c <IFCIntHandler+0x14>
+    3bba:	0000      	bkpt
+    3bbc:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00003bc0 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    3bc0:	1460      	nie
+    3bc2:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    3bc4:	1078      	lrw      	r3, 0x20000050	// 3c24 <ADCIntHandler+0x64>
+    3bc6:	3101      	movi      	r1, 1
+    3bc8:	9360      	ld.w      	r3, (r3, 0x0)
+    3bca:	9348      	ld.w      	r2, (r3, 0x20)
+    3bcc:	6884      	and      	r2, r1
+    3bce:	3a40      	cmpnei      	r2, 0
+    3bd0:	0c04      	bf      	0x3bd8	// 3bd8 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    3bd2:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    3bd4:	1463      	ipop
+    3bd6:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    3bd8:	9348      	ld.w      	r2, (r3, 0x20)
+    3bda:	3102      	movi      	r1, 2
+    3bdc:	6884      	and      	r2, r1
+    3bde:	3a40      	cmpnei      	r2, 0
+    3be0:	0bf9      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    3be2:	9348      	ld.w      	r2, (r3, 0x20)
+    3be4:	3104      	movi      	r1, 4
+    3be6:	6884      	and      	r2, r1
+    3be8:	3a40      	cmpnei      	r2, 0
+    3bea:	0bf4      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    3bec:	9348      	ld.w      	r2, (r3, 0x20)
+    3bee:	3110      	movi      	r1, 16
+    3bf0:	6884      	and      	r2, r1
+    3bf2:	3a40      	cmpnei      	r2, 0
+    3bf4:	0bef      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    3bf6:	9348      	ld.w      	r2, (r3, 0x20)
+    3bf8:	3120      	movi      	r1, 32
+    3bfa:	6884      	and      	r2, r1
+    3bfc:	3a40      	cmpnei      	r2, 0
+    3bfe:	0bea      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    3c00:	9348      	ld.w      	r2, (r3, 0x20)
+    3c02:	3140      	movi      	r1, 64
+    3c04:	6884      	and      	r2, r1
+    3c06:	3a40      	cmpnei      	r2, 0
+    3c08:	0be5      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    3c0a:	9348      	ld.w      	r2, (r3, 0x20)
+    3c0c:	3180      	movi      	r1, 128
+    3c0e:	6884      	and      	r2, r1
+    3c10:	3a40      	cmpnei      	r2, 0
+    3c12:	0be0      	bt      	0x3bd2	// 3bd2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    3c14:	3280      	movi      	r2, 128
+    3c16:	9328      	ld.w      	r1, (r3, 0x20)
+    3c18:	4249      	lsli      	r2, r2, 9
+    3c1a:	6848      	and      	r1, r2
+    3c1c:	3940      	cmpnei      	r1, 0
+    3c1e:	0fdb      	bf      	0x3bd4	// 3bd4 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    3c20:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    3c22:	07d9      	br      	0x3bd4	// 3bd4 <ADCIntHandler+0x14>
+    3c24:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00003c28 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    3c28:	1460      	nie
+    3c2a:	1462      	ipush
+    3c2c:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    3c2e:	1387      	lrw      	r4, 0x20000020	// 3dc8 <EPT0IntHandler+0x1a0>
+    3c30:	3280      	movi      	r2, 128
+    3c32:	9460      	ld.w      	r3, (r4, 0x0)
+    3c34:	60c8      	addu      	r3, r2
+    3c36:	9335      	ld.w      	r1, (r3, 0x54)
+    3c38:	3001      	movi      	r0, 1
+    3c3a:	6840      	and      	r1, r0
+    3c3c:	3940      	cmpnei      	r1, 0
+    3c3e:	0c03      	bf      	0x3c44	// 3c44 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    3c40:	b317      	st.w      	r0, (r3, 0x5c)
+    3c42:	0424      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    3c44:	9335      	ld.w      	r1, (r3, 0x54)
+    3c46:	3002      	movi      	r0, 2
+    3c48:	6840      	and      	r1, r0
+    3c4a:	3940      	cmpnei      	r1, 0
+    3c4c:	0bfa      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    3c4e:	9335      	ld.w      	r1, (r3, 0x54)
+    3c50:	3004      	movi      	r0, 4
+    3c52:	6840      	and      	r1, r0
+    3c54:	3940      	cmpnei      	r1, 0
+    3c56:	0bf5      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    3c58:	9335      	ld.w      	r1, (r3, 0x54)
+    3c5a:	3008      	movi      	r0, 8
+    3c5c:	6840      	and      	r1, r0
+    3c5e:	3940      	cmpnei      	r1, 0
+    3c60:	0bf0      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    3c62:	9335      	ld.w      	r1, (r3, 0x54)
+    3c64:	3010      	movi      	r0, 16
+    3c66:	6840      	and      	r1, r0
+    3c68:	3940      	cmpnei      	r1, 0
+    3c6a:	0c1f      	bf      	0x3ca8	// 3ca8 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    3c6c:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    3c6e:	3200      	movi      	r2, 0
+    3c70:	3101      	movi      	r1, 1
+    3c72:	3000      	movi      	r0, 0
+    3c74:	e3fffa9c 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    3c78:	3201      	movi      	r2, 1
+    3c7a:	3101      	movi      	r1, 1
+    3c7c:	3001      	movi      	r0, 1
+    3c7e:	e3fffa97 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    3c82:	9460      	ld.w      	r3, (r4, 0x0)
+    3c84:	934b      	ld.w      	r2, (r3, 0x2c)
+    3c86:	1272      	lrw      	r3, 0x20000378	// 3dcc <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3c88:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    3c8a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c8c:	3280      	movi      	r2, 128
+    3c8e:	60c8      	addu      	r3, r2
+    3c90:	932b      	ld.w      	r1, (r3, 0x2c)
+    3c92:	3001      	movi      	r0, 1
+    3c94:	6840      	and      	r1, r0
+    3c96:	3940      	cmpnei      	r1, 0
+    3c98:	0c61      	bf      	0x3d5a	// 3d5a <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    3c9a:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    3c9c:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3ca0:	9880      	ld.w      	r4, (r14, 0x0)
+    3ca2:	1402      	addi      	r14, r14, 8
+    3ca4:	1463      	ipop
+    3ca6:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    3ca8:	9335      	ld.w      	r1, (r3, 0x54)
+    3caa:	3020      	movi      	r0, 32
+    3cac:	6840      	and      	r1, r0
+    3cae:	3940      	cmpnei      	r1, 0
+    3cb0:	0c10      	bf      	0x3cd0	// 3cd0 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    3cb2:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    3cb4:	3200      	movi      	r2, 0
+    3cb6:	3101      	movi      	r1, 1
+    3cb8:	3001      	movi      	r0, 1
+    3cba:	e3fffa79 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    3cbe:	3201      	movi      	r2, 1
+    3cc0:	3101      	movi      	r1, 1
+    3cc2:	3000      	movi      	r0, 0
+    3cc4:	e3fffa74 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3cc8:	9460      	ld.w      	r3, (r4, 0x0)
+    3cca:	934c      	ld.w      	r2, (r3, 0x30)
+    3ccc:	1261      	lrw      	r3, 0x20000374	// 3dd0 <EPT0IntHandler+0x1a8>
+    3cce:	07dd      	br      	0x3c88	// 3c88 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    3cd0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cd2:	3040      	movi      	r0, 64
+    3cd4:	6840      	and      	r1, r0
+    3cd6:	3940      	cmpnei      	r1, 0
+    3cd8:	0bb4      	bt      	0x3c40	// 3c40 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    3cda:	9335      	ld.w      	r1, (r3, 0x54)
+    3cdc:	6848      	and      	r1, r2
+    3cde:	3940      	cmpnei      	r1, 0
+    3ce0:	0c03      	bf      	0x3ce6	// 3ce6 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    3ce2:	b357      	st.w      	r2, (r3, 0x5c)
+    3ce4:	07d3      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    3ce6:	3280      	movi      	r2, 128
+    3ce8:	9335      	ld.w      	r1, (r3, 0x54)
+    3cea:	4241      	lsli      	r2, r2, 1
+    3cec:	6848      	and      	r1, r2
+    3cee:	3940      	cmpnei      	r1, 0
+    3cf0:	0bf9      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    3cf2:	3280      	movi      	r2, 128
+    3cf4:	9335      	ld.w      	r1, (r3, 0x54)
+    3cf6:	4242      	lsli      	r2, r2, 2
+    3cf8:	6848      	and      	r1, r2
+    3cfa:	3940      	cmpnei      	r1, 0
+    3cfc:	0bf3      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    3cfe:	3280      	movi      	r2, 128
+    3d00:	9335      	ld.w      	r1, (r3, 0x54)
+    3d02:	4243      	lsli      	r2, r2, 3
+    3d04:	6848      	and      	r1, r2
+    3d06:	3940      	cmpnei      	r1, 0
+    3d08:	0bed      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    3d0a:	3280      	movi      	r2, 128
+    3d0c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d0e:	4244      	lsli      	r2, r2, 4
+    3d10:	6848      	and      	r1, r2
+    3d12:	3940      	cmpnei      	r1, 0
+    3d14:	0be7      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    3d16:	3280      	movi      	r2, 128
+    3d18:	9335      	ld.w      	r1, (r3, 0x54)
+    3d1a:	4245      	lsli      	r2, r2, 5
+    3d1c:	6848      	and      	r1, r2
+    3d1e:	3940      	cmpnei      	r1, 0
+    3d20:	0be1      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    3d22:	3280      	movi      	r2, 128
+    3d24:	9335      	ld.w      	r1, (r3, 0x54)
+    3d26:	4246      	lsli      	r2, r2, 6
+    3d28:	6848      	and      	r1, r2
+    3d2a:	3940      	cmpnei      	r1, 0
+    3d2c:	0bdb      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    3d2e:	3280      	movi      	r2, 128
+    3d30:	9335      	ld.w      	r1, (r3, 0x54)
+    3d32:	4247      	lsli      	r2, r2, 7
+    3d34:	6848      	and      	r1, r2
+    3d36:	3940      	cmpnei      	r1, 0
+    3d38:	0bd5      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    3d3a:	3280      	movi      	r2, 128
+    3d3c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d3e:	4248      	lsli      	r2, r2, 8
+    3d40:	6848      	and      	r1, r2
+    3d42:	3940      	cmpnei      	r1, 0
+    3d44:	0bcf      	bt      	0x3ce2	// 3ce2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    3d46:	3280      	movi      	r2, 128
+    3d48:	9335      	ld.w      	r1, (r3, 0x54)
+    3d4a:	4249      	lsli      	r2, r2, 9
+    3d4c:	6848      	and      	r1, r2
+    3d4e:	3940      	cmpnei      	r1, 0
+    3d50:	0f9d      	bf      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    3d52:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    3d54:	e3fffd54 	bsr      	0x37fc	// 37fc <EPT_Stop>
+    3d58:	0799      	br      	0x3c8a	// 3c8a <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    3d5a:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d5c:	3002      	movi      	r0, 2
+    3d5e:	6840      	and      	r1, r0
+    3d60:	3940      	cmpnei      	r1, 0
+    3d62:	0b9c      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    3d64:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d66:	3004      	movi      	r0, 4
+    3d68:	6840      	and      	r1, r0
+    3d6a:	3940      	cmpnei      	r1, 0
+    3d6c:	0b97      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    3d6e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d70:	3008      	movi      	r0, 8
+    3d72:	6840      	and      	r1, r0
+    3d74:	3940      	cmpnei      	r1, 0
+    3d76:	0b92      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    3d78:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d7a:	3010      	movi      	r0, 16
+    3d7c:	6840      	and      	r1, r0
+    3d7e:	3940      	cmpnei      	r1, 0
+    3d80:	0b8d      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    3d82:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d84:	3020      	movi      	r0, 32
+    3d86:	6840      	and      	r1, r0
+    3d88:	3940      	cmpnei      	r1, 0
+    3d8a:	0b88      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    3d8c:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d8e:	3040      	movi      	r0, 64
+    3d90:	6840      	and      	r1, r0
+    3d92:	3940      	cmpnei      	r1, 0
+    3d94:	0b83      	bt      	0x3c9a	// 3c9a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    3d96:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d98:	6848      	and      	r1, r2
+    3d9a:	3940      	cmpnei      	r1, 0
+    3d9c:	0c03      	bf      	0x3da2	// 3da2 <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    3d9e:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    3da0:	077e      	br      	0x3c9c	// 3c9c <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    3da2:	3280      	movi      	r2, 128
+    3da4:	932b      	ld.w      	r1, (r3, 0x2c)
+    3da6:	4241      	lsli      	r2, r2, 1
+    3da8:	6848      	and      	r1, r2
+    3daa:	3940      	cmpnei      	r1, 0
+    3dac:	0bf9      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    3dae:	3280      	movi      	r2, 128
+    3db0:	932b      	ld.w      	r1, (r3, 0x2c)
+    3db2:	4242      	lsli      	r2, r2, 2
+    3db4:	6848      	and      	r1, r2
+    3db6:	3940      	cmpnei      	r1, 0
+    3db8:	0bf3      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    3dba:	3280      	movi      	r2, 128
+    3dbc:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dbe:	4243      	lsli      	r2, r2, 3
+    3dc0:	6848      	and      	r1, r2
+    3dc2:	3940      	cmpnei      	r1, 0
+    3dc4:	0bed      	bt      	0x3d9e	// 3d9e <EPT0IntHandler+0x176>
+    3dc6:	076b      	br      	0x3c9c	// 3c9c <EPT0IntHandler+0x74>
+    3dc8:	20000020 	.long	0x20000020
+    3dcc:	20000378 	.long	0x20000378
+    3dd0:	20000374 	.long	0x20000374
+
+Disassembly of section .text.WWDTHandler:
+
+00003dd4 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    3dd4:	1460      	nie
+    3dd6:	1462      	ipush
+    3dd8:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    3dda:	10ab      	lrw      	r5, 0x20000010	// 3e04 <WWDTHandler+0x30>
+    3ddc:	3401      	movi      	r4, 1
+    3dde:	9560      	ld.w      	r3, (r5, 0x0)
+    3de0:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    3de2:	30ff      	movi      	r0, 255
+    3de4:	e3fffae2 	bsr      	0x33a8	// 33a8 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    3de8:	9540      	ld.w      	r2, (r5, 0x0)
+    3dea:	9263      	ld.w      	r3, (r2, 0xc)
+    3dec:	68d0      	and      	r3, r4
+    3dee:	3b40      	cmpnei      	r3, 0
+    3df0:	0c02      	bf      	0x3df4	// 3df4 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    3df2:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    3df4:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    3df8:	98a1      	ld.w      	r5, (r14, 0x4)
+    3dfa:	9880      	ld.w      	r4, (r14, 0x0)
+    3dfc:	1403      	addi      	r14, r14, 12
+    3dfe:	1463      	ipop
+    3e00:	1461      	nir
+    3e02:	0000      	bkpt
+    3e04:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00003e08 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    3e08:	1460      	nie
+    3e0a:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    3e0c:	107e      	lrw      	r3, 0x20000024	// 3e84 <GPT0IntHandler+0x7c>
+    3e0e:	3101      	movi      	r1, 1
+    3e10:	9360      	ld.w      	r3, (r3, 0x0)
+    3e12:	237f      	addi      	r3, 128
+    3e14:	9355      	ld.w      	r2, (r3, 0x54)
+    3e16:	6884      	and      	r2, r1
+    3e18:	3a40      	cmpnei      	r2, 0
+    3e1a:	0c04      	bf      	0x3e22	// 3e22 <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    3e1c:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    3e1e:	1463      	ipop
+    3e20:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    3e22:	9355      	ld.w      	r2, (r3, 0x54)
+    3e24:	3102      	movi      	r1, 2
+    3e26:	6884      	and      	r2, r1
+    3e28:	3a40      	cmpnei      	r2, 0
+    3e2a:	0bf9      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    3e2c:	9355      	ld.w      	r2, (r3, 0x54)
+    3e2e:	3110      	movi      	r1, 16
+    3e30:	6884      	and      	r2, r1
+    3e32:	3a40      	cmpnei      	r2, 0
+    3e34:	0bf4      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    3e36:	9355      	ld.w      	r2, (r3, 0x54)
+    3e38:	3120      	movi      	r1, 32
+    3e3a:	6884      	and      	r2, r1
+    3e3c:	3a40      	cmpnei      	r2, 0
+    3e3e:	0bef      	bt      	0x3e1c	// 3e1c <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    3e40:	3280      	movi      	r2, 128
+    3e42:	9335      	ld.w      	r1, (r3, 0x54)
+    3e44:	4241      	lsli      	r2, r2, 1
+    3e46:	6848      	and      	r1, r2
+    3e48:	3940      	cmpnei      	r1, 0
+    3e4a:	0c03      	bf      	0x3e50	// 3e50 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    3e4c:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    3e4e:	07e8      	br      	0x3e1e	// 3e1e <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    3e50:	3280      	movi      	r2, 128
+    3e52:	9335      	ld.w      	r1, (r3, 0x54)
+    3e54:	4242      	lsli      	r2, r2, 2
+    3e56:	6848      	and      	r1, r2
+    3e58:	3940      	cmpnei      	r1, 0
+    3e5a:	0bf9      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    3e5c:	3280      	movi      	r2, 128
+    3e5e:	9335      	ld.w      	r1, (r3, 0x54)
+    3e60:	4243      	lsli      	r2, r2, 3
+    3e62:	6848      	and      	r1, r2
+    3e64:	3940      	cmpnei      	r1, 0
+    3e66:	0bf3      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    3e68:	3280      	movi      	r2, 128
+    3e6a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e6c:	4244      	lsli      	r2, r2, 4
+    3e6e:	6848      	and      	r1, r2
+    3e70:	3940      	cmpnei      	r1, 0
+    3e72:	0bed      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    3e74:	3280      	movi      	r2, 128
+    3e76:	9335      	ld.w      	r1, (r3, 0x54)
+    3e78:	4249      	lsli      	r2, r2, 9
+    3e7a:	6848      	and      	r1, r2
+    3e7c:	3940      	cmpnei      	r1, 0
+    3e7e:	0be7      	bt      	0x3e4c	// 3e4c <GPT0IntHandler+0x44>
+    3e80:	07cf      	br      	0x3e1e	// 3e1e <GPT0IntHandler+0x16>
+    3e82:	0000      	bkpt
+    3e84:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00003e88 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    3e88:	1460      	nie
+    3e8a:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    3e8c:	1079      	lrw      	r3, 0x20000018	// 3ef0 <RTCIntHandler+0x68>
+    3e8e:	3101      	movi      	r1, 1
+    3e90:	9360      	ld.w      	r3, (r3, 0x0)
+    3e92:	934a      	ld.w      	r2, (r3, 0x28)
+    3e94:	6884      	and      	r2, r1
+    3e96:	3a40      	cmpnei      	r2, 0
+    3e98:	0c14      	bf      	0x3ec0	// 3ec0 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    3e9a:	1057      	lrw      	r2, 0xca53	// 3ef4 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    3e9c:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    3e9e:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    3ea0:	9342      	ld.w      	r2, (r3, 0x8)
+    3ea2:	6c84      	or      	r2, r1
+    3ea4:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    3ea6:	3280      	movi      	r2, 128
+    3ea8:	424d      	lsli      	r2, r2, 13
+    3eaa:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    3eac:	3102      	movi      	r1, 2
+    3eae:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb0:	6884      	and      	r2, r1
+    3eb2:	3a40      	cmpnei      	r2, 0
+    3eb4:	0bfd      	bt      	0x3eae	// 3eae <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    3eb6:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb8:	3a80      	bclri      	r2, 0
+    3eba:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    3ebc:	1463      	ipop
+    3ebe:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    3ec0:	934a      	ld.w      	r2, (r3, 0x28)
+    3ec2:	3102      	movi      	r1, 2
+    3ec4:	6884      	and      	r2, r1
+    3ec6:	3a40      	cmpnei      	r2, 0
+    3ec8:	0c03      	bf      	0x3ece	// 3ece <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    3eca:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    3ecc:	07f8      	br      	0x3ebc	// 3ebc <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    3ece:	934a      	ld.w      	r2, (r3, 0x28)
+    3ed0:	3104      	movi      	r1, 4
+    3ed2:	6884      	and      	r2, r1
+    3ed4:	3a40      	cmpnei      	r2, 0
+    3ed6:	0bfa      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    3ed8:	934a      	ld.w      	r2, (r3, 0x28)
+    3eda:	3108      	movi      	r1, 8
+    3edc:	6884      	and      	r2, r1
+    3ede:	3a40      	cmpnei      	r2, 0
+    3ee0:	0bf5      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    3ee2:	934a      	ld.w      	r2, (r3, 0x28)
+    3ee4:	3110      	movi      	r1, 16
+    3ee6:	6884      	and      	r2, r1
+    3ee8:	3a40      	cmpnei      	r2, 0
+    3eea:	0bf0      	bt      	0x3eca	// 3eca <RTCIntHandler+0x42>
+    3eec:	07e8      	br      	0x3ebc	// 3ebc <RTCIntHandler+0x34>
+    3eee:	0000      	bkpt
+    3ef0:	20000018 	.long	0x20000018
+    3ef4:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00003ef8 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    3ef8:	1460      	nie
+    3efa:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3efc:	106d      	lrw      	r3, 0x20000040	// 3f30 <UART0IntHandler+0x38>
+    3efe:	3102      	movi      	r1, 2
+    3f00:	9360      	ld.w      	r3, (r3, 0x0)
+    3f02:	9343      	ld.w      	r2, (r3, 0xc)
+    3f04:	6884      	and      	r2, r1
+    3f06:	3a40      	cmpnei      	r2, 0
+    3f08:	0c03      	bf      	0x3f0e	// 3f0e <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    3f0a:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f0c:	0410      	br      	0x3f2c	// 3f2c <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f0e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f10:	3101      	movi      	r1, 1
+    3f12:	6884      	and      	r2, r1
+    3f14:	3a40      	cmpnei      	r2, 0
+    3f16:	0bfa      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f18:	9343      	ld.w      	r2, (r3, 0xc)
+    3f1a:	3108      	movi      	r1, 8
+    3f1c:	6884      	and      	r2, r1
+    3f1e:	3a40      	cmpnei      	r2, 0
+    3f20:	0bf5      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f22:	9343      	ld.w      	r2, (r3, 0xc)
+    3f24:	3104      	movi      	r1, 4
+    3f26:	6884      	and      	r2, r1
+    3f28:	3a40      	cmpnei      	r2, 0
+    3f2a:	0bf0      	bt      	0x3f0a	// 3f0a <UART0IntHandler+0x12>
+}
+    3f2c:	1463      	ipop
+    3f2e:	1461      	nir
+    3f30:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00003f34 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    3f34:	1460      	nie
+    3f36:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f38:	106d      	lrw      	r3, 0x2000003c	// 3f6c <UART1IntHandler+0x38>
+    3f3a:	3102      	movi      	r1, 2
+    3f3c:	9360      	ld.w      	r3, (r3, 0x0)
+    3f3e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f40:	6884      	and      	r2, r1
+    3f42:	3a40      	cmpnei      	r2, 0
+    3f44:	0c03      	bf      	0x3f4a	// 3f4a <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    3f46:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f48:	0410      	br      	0x3f68	// 3f68 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f4a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f4c:	3101      	movi      	r1, 1
+    3f4e:	6884      	and      	r2, r1
+    3f50:	3a40      	cmpnei      	r2, 0
+    3f52:	0bfa      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f54:	9343      	ld.w      	r2, (r3, 0xc)
+    3f56:	3108      	movi      	r1, 8
+    3f58:	6884      	and      	r2, r1
+    3f5a:	3a40      	cmpnei      	r2, 0
+    3f5c:	0bf5      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f5e:	9343      	ld.w      	r2, (r3, 0xc)
+    3f60:	3104      	movi      	r1, 4
+    3f62:	6884      	and      	r2, r1
+    3f64:	3a40      	cmpnei      	r2, 0
+    3f66:	0bf0      	bt      	0x3f46	// 3f46 <UART1IntHandler+0x12>
+}
+    3f68:	1463      	ipop
+    3f6a:	1461      	nir
+    3f6c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00003f70 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    3f70:	1460      	nie
+    3f72:	1462      	ipush
+    3f74:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f76:	107f      	lrw      	r3, 0x20000038	// 3ff0 <UART2IntHandler+0x80>
+    3f78:	3102      	movi      	r1, 2
+    3f7a:	9360      	ld.w      	r3, (r3, 0x0)
+    3f7c:	9343      	ld.w      	r2, (r3, 0xc)
+    3f7e:	6884      	and      	r2, r1
+    3f80:	3a40      	cmpnei      	r2, 0
+    3f82:	0c0b      	bf      	0x3f98	// 3f98 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    3f84:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    3f86:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    3f88:	7400      	zextb      	r0, r0
+    3f8a:	e00002e9 	bsr      	0x455c	// 455c <UART2_RecvINT_Processing>
+		//GPIO_Write_Low(GPIOB0,3);
+		
+		//GPIO_Reverse(GPIOB0,3);
+	}
+	
+}
+    3f8e:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3f92:	1401      	addi      	r14, r14, 4
+    3f94:	1463      	ipop
+    3f96:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f98:	9323      	ld.w      	r1, (r3, 0xc)
+    3f9a:	3201      	movi      	r2, 1
+    3f9c:	6848      	and      	r1, r2
+    3f9e:	3940      	cmpnei      	r1, 0
+    3fa0:	0c0d      	bf      	0x3fba	// 3fba <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    3fa2:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    3fa4:	1074      	lrw      	r3, 0x200000bc	// 3ff4 <UART2IntHandler+0x84>
+    3fa6:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fa8:	1074      	lrw      	r3, 0x200000c0	// 3ff8 <UART2IntHandler+0x88>
+    3faa:	9360      	ld.w      	r3, (r3, 0x0)
+    3fac:	3b41      	cmpnei      	r3, 1
+    3fae:	0bf0      	bt      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    3fb0:	1053      	lrw      	r2, 0x200000c4	// 3ffc <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    3fb2:	9260      	ld.w      	r3, (r2, 0x0)
+    3fb4:	2300      	addi      	r3, 1
+    3fb6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    3fb8:	07eb      	br      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3fba:	9343      	ld.w      	r2, (r3, 0xc)
+    3fbc:	3108      	movi      	r1, 8
+    3fbe:	6884      	and      	r2, r1
+    3fc0:	3a40      	cmpnei      	r2, 0
+    3fc2:	0c03      	bf      	0x3fc8	// 3fc8 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    3fc4:	b323      	st.w      	r1, (r3, 0xc)
+    3fc6:	07e4      	br      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3fc8:	9343      	ld.w      	r2, (r3, 0xc)
+    3fca:	3104      	movi      	r1, 4
+    3fcc:	6884      	and      	r2, r1
+    3fce:	3a40      	cmpnei      	r2, 0
+    3fd0:	0bfa      	bt      	0x3fc4	// 3fc4 <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    3fd2:	3180      	movi      	r1, 128
+    3fd4:	9303      	ld.w      	r0, (r3, 0xc)
+    3fd6:	412c      	lsli      	r1, r1, 12
+    3fd8:	6804      	and      	r0, r1
+    3fda:	3840      	cmpnei      	r0, 0
+    3fdc:	0fd9      	bf      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    3fde:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    3fe0:	1065      	lrw      	r3, 0x200000bc	// 3ff4 <UART2IntHandler+0x84>
+    3fe2:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fe4:	1065      	lrw      	r3, 0x200000c0	// 3ff8 <UART2IntHandler+0x88>
+    3fe6:	9360      	ld.w      	r3, (r3, 0x0)
+    3fe8:	3b41      	cmpnei      	r3, 1
+    3fea:	0bd2      	bt      	0x3f8e	// 3f8e <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    3fec:	1045      	lrw      	r2, 0x200000c8	// 4000 <UART2IntHandler+0x90>
+    3fee:	07e2      	br      	0x3fb2	// 3fb2 <UART2IntHandler+0x42>
+    3ff0:	20000038 	.long	0x20000038
+    3ff4:	200000bc 	.long	0x200000bc
+    3ff8:	200000c0 	.long	0x200000c0
+    3ffc:	200000c4 	.long	0x200000c4
+    4000:	200000c8 	.long	0x200000c8
+
+Disassembly of section .text.SPI0IntHandler:
+
+00004004 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    4004:	1460      	nie
+    4006:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    4008:	1178      	lrw      	r3, 0x20000034	// 40e8 <SPI0IntHandler+0xe4>
+    400a:	3101      	movi      	r1, 1
+    400c:	9360      	ld.w      	r3, (r3, 0x0)
+    400e:	9347      	ld.w      	r2, (r3, 0x1c)
+    4010:	6884      	and      	r2, r1
+    4012:	3a40      	cmpnei      	r2, 0
+    4014:	0c03      	bf      	0x401a	// 401a <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    4016:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    4018:	0407      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    401a:	9347      	ld.w      	r2, (r3, 0x1c)
+    401c:	3002      	movi      	r0, 2
+    401e:	6880      	and      	r2, r0
+    4020:	3a40      	cmpnei      	r2, 0
+    4022:	0c04      	bf      	0x402a	// 402a <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    4024:	b308      	st.w      	r0, (r3, 0x20)
+}
+    4026:	1463      	ipop
+    4028:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    402a:	9347      	ld.w      	r2, (r3, 0x1c)
+    402c:	3004      	movi      	r0, 4
+    402e:	6880      	and      	r2, r0
+    4030:	3a40      	cmpnei      	r2, 0
+    4032:	0c55      	bf      	0x40dc	// 40dc <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    4034:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    4036:	9302      	ld.w      	r0, (r3, 0x8)
+    4038:	32aa      	movi      	r2, 170
+    403a:	6482      	cmpne      	r0, r2
+    403c:	083e      	bt      	0x40b8	// 40b8 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    403e:	3102      	movi      	r1, 2
+    4040:	9343      	ld.w      	r2, (r3, 0xc)
+    4042:	6884      	and      	r2, r1
+    4044:	3a40      	cmpnei      	r2, 0
+    4046:	0ffd      	bf      	0x4040	// 4040 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    4048:	3211      	movi      	r2, 17
+    404a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    404c:	3110      	movi      	r1, 16
+    404e:	9343      	ld.w      	r2, (r3, 0xc)
+    4050:	6884      	and      	r2, r1
+    4052:	3a40      	cmpnei      	r2, 0
+    4054:	0bfd      	bt      	0x404e	// 404e <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4056:	3102      	movi      	r1, 2
+    4058:	9343      	ld.w      	r2, (r3, 0xc)
+    405a:	6884      	and      	r2, r1
+    405c:	3a40      	cmpnei      	r2, 0
+    405e:	0ffd      	bf      	0x4058	// 4058 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    4060:	3212      	movi      	r2, 18
+    4062:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4064:	3110      	movi      	r1, 16
+    4066:	9343      	ld.w      	r2, (r3, 0xc)
+    4068:	6884      	and      	r2, r1
+    406a:	3a40      	cmpnei      	r2, 0
+    406c:	0bfd      	bt      	0x4066	// 4066 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    406e:	3102      	movi      	r1, 2
+    4070:	9343      	ld.w      	r2, (r3, 0xc)
+    4072:	6884      	and      	r2, r1
+    4074:	3a40      	cmpnei      	r2, 0
+    4076:	0ffd      	bf      	0x4070	// 4070 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    4078:	3213      	movi      	r2, 19
+    407a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    407c:	3110      	movi      	r1, 16
+    407e:	9343      	ld.w      	r2, (r3, 0xc)
+    4080:	6884      	and      	r2, r1
+    4082:	3a40      	cmpnei      	r2, 0
+    4084:	0bfd      	bt      	0x407e	// 407e <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4086:	3102      	movi      	r1, 2
+    4088:	9343      	ld.w      	r2, (r3, 0xc)
+    408a:	6884      	and      	r2, r1
+    408c:	3a40      	cmpnei      	r2, 0
+    408e:	0ffd      	bf      	0x4088	// 4088 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    4090:	3214      	movi      	r2, 20
+    4092:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4094:	3110      	movi      	r1, 16
+    4096:	9343      	ld.w      	r2, (r3, 0xc)
+    4098:	6884      	and      	r2, r1
+    409a:	3a40      	cmpnei      	r2, 0
+    409c:	0bfd      	bt      	0x4096	// 4096 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    409e:	3102      	movi      	r1, 2
+    40a0:	9343      	ld.w      	r2, (r3, 0xc)
+    40a2:	6884      	and      	r2, r1
+    40a4:	3a40      	cmpnei      	r2, 0
+    40a6:	0ffd      	bf      	0x40a0	// 40a0 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    40a8:	3215      	movi      	r2, 21
+    40aa:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    40ac:	3110      	movi      	r1, 16
+    40ae:	9343      	ld.w      	r2, (r3, 0xc)
+    40b0:	6884      	and      	r2, r1
+    40b2:	3a40      	cmpnei      	r2, 0
+    40b4:	0bfd      	bt      	0x40ae	// 40ae <SPI0IntHandler+0xaa>
+    40b6:	07b8      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    40b8:	9343      	ld.w      	r2, (r3, 0xc)
+    40ba:	6884      	and      	r2, r1
+    40bc:	3a40      	cmpnei      	r2, 0
+    40be:	0bb4      	bt      	0x4026	// 4026 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    40c0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40c2:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    40c4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40c6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40c8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ca:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40cc:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ce:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40d2:	9343      	ld.w      	r2, (r3, 0xc)
+    40d4:	6884      	and      	r2, r1
+    40d6:	3a40      	cmpnei      	r2, 0
+    40d8:	0bfd      	bt      	0x40d2	// 40d2 <SPI0IntHandler+0xce>
+    40da:	07a6      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    40dc:	9347      	ld.w      	r2, (r3, 0x1c)
+    40de:	3108      	movi      	r1, 8
+    40e0:	6884      	and      	r2, r1
+    40e2:	3a40      	cmpnei      	r2, 0
+    40e4:	0b99      	bt      	0x4016	// 4016 <SPI0IntHandler+0x12>
+    40e6:	07a0      	br      	0x4026	// 4026 <SPI0IntHandler+0x22>
+    40e8:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+000040ec <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    40ec:	1460      	nie
+    40ee:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    40f0:	1073      	lrw      	r3, 0x2000002c	// 413c <SIO0IntHandler+0x50>
+    40f2:	3104      	movi      	r1, 4
+    40f4:	9360      	ld.w      	r3, (r3, 0x0)
+    40f6:	9349      	ld.w      	r2, (r3, 0x24)
+    40f8:	6884      	and      	r2, r1
+    40fa:	3a40      	cmpnei      	r2, 0
+    40fc:	0c02      	bf      	0x4100	// 4100 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    40fe:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    4100:	9349      	ld.w      	r2, (r3, 0x24)
+    4102:	3101      	movi      	r1, 1
+    4104:	6884      	and      	r2, r1
+    4106:	3a40      	cmpnei      	r2, 0
+    4108:	0c02      	bf      	0x410c	// 410c <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    410a:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    410c:	9349      	ld.w      	r2, (r3, 0x24)
+    410e:	3102      	movi      	r1, 2
+    4110:	6884      	and      	r2, r1
+    4112:	3a40      	cmpnei      	r2, 0
+    4114:	0c03      	bf      	0x411a	// 411a <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    4116:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    4118:	0410      	br      	0x4138	// 4138 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    411a:	9349      	ld.w      	r2, (r3, 0x24)
+    411c:	3108      	movi      	r1, 8
+    411e:	6884      	and      	r2, r1
+    4120:	3a40      	cmpnei      	r2, 0
+    4122:	0bfa      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    4124:	9349      	ld.w      	r2, (r3, 0x24)
+    4126:	3110      	movi      	r1, 16
+    4128:	6884      	and      	r2, r1
+    412a:	3a40      	cmpnei      	r2, 0
+    412c:	0bf5      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    412e:	9349      	ld.w      	r2, (r3, 0x24)
+    4130:	3120      	movi      	r1, 32
+    4132:	6884      	and      	r2, r1
+    4134:	3a40      	cmpnei      	r2, 0
+    4136:	0bf0      	bt      	0x4116	// 4116 <SIO0IntHandler+0x2a>
+}
+    4138:	1463      	ipop
+    413a:	1461      	nir
+    413c:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00004140 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    4140:	1460      	nie
+    4142:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    4144:	106a      	lrw      	r3, 0x2000005c	// 416c <EXI0IntHandler+0x2c>
+    4146:	3101      	movi      	r1, 1
+    4148:	9360      	ld.w      	r3, (r3, 0x0)
+    414a:	237f      	addi      	r3, 128
+    414c:	934c      	ld.w      	r2, (r3, 0x30)
+    414e:	6884      	and      	r2, r1
+    4150:	3a40      	cmpnei      	r2, 0
+    4152:	0c04      	bf      	0x415a	// 415a <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    4154:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    4156:	1463      	ipop
+    4158:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    415a:	3280      	movi      	r2, 128
+    415c:	932c      	ld.w      	r1, (r3, 0x30)
+    415e:	4249      	lsli      	r2, r2, 9
+    4160:	6848      	and      	r1, r2
+    4162:	3940      	cmpnei      	r1, 0
+    4164:	0ff9      	bf      	0x4156	// 4156 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    4166:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4168:	07f7      	br      	0x4156	// 4156 <EXI0IntHandler+0x16>
+    416a:	0000      	bkpt
+    416c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00004170 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    4170:	1460      	nie
+    4172:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    4174:	106a      	lrw      	r3, 0x2000005c	// 419c <EXI1IntHandler+0x2c>
+    4176:	3102      	movi      	r1, 2
+    4178:	9360      	ld.w      	r3, (r3, 0x0)
+    417a:	237f      	addi      	r3, 128
+    417c:	934c      	ld.w      	r2, (r3, 0x30)
+    417e:	6884      	and      	r2, r1
+    4180:	3a40      	cmpnei      	r2, 0
+    4182:	0c04      	bf      	0x418a	// 418a <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    4184:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    4186:	1463      	ipop
+    4188:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    418a:	3280      	movi      	r2, 128
+    418c:	932c      	ld.w      	r1, (r3, 0x30)
+    418e:	424a      	lsli      	r2, r2, 10
+    4190:	6848      	and      	r1, r2
+    4192:	3940      	cmpnei      	r1, 0
+    4194:	0ff9      	bf      	0x4186	// 4186 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    4196:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4198:	07f7      	br      	0x4186	// 4186 <EXI1IntHandler+0x16>
+    419a:	0000      	bkpt
+    419c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+000041a0 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    41a0:	1460      	nie
+    41a2:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    41a4:	1070      	lrw      	r3, 0x2000005c	// 41e4 <EXI2to3IntHandler+0x44>
+    41a6:	3104      	movi      	r1, 4
+    41a8:	9360      	ld.w      	r3, (r3, 0x0)
+    41aa:	237f      	addi      	r3, 128
+    41ac:	934c      	ld.w      	r2, (r3, 0x30)
+    41ae:	6884      	and      	r2, r1
+    41b0:	3a40      	cmpnei      	r2, 0
+    41b2:	0c04      	bf      	0x41ba	// 41ba <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    41b4:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    41b6:	1463      	ipop
+    41b8:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    41ba:	934c      	ld.w      	r2, (r3, 0x30)
+    41bc:	3108      	movi      	r1, 8
+    41be:	6884      	and      	r2, r1
+    41c0:	3a40      	cmpnei      	r2, 0
+    41c2:	0bf9      	bt      	0x41b4	// 41b4 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    41c4:	3280      	movi      	r2, 128
+    41c6:	932c      	ld.w      	r1, (r3, 0x30)
+    41c8:	424b      	lsli      	r2, r2, 11
+    41ca:	6848      	and      	r1, r2
+    41cc:	3940      	cmpnei      	r1, 0
+    41ce:	0c03      	bf      	0x41d4	// 41d4 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    41d0:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41d2:	07f2      	br      	0x41b6	// 41b6 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    41d4:	3280      	movi      	r2, 128
+    41d6:	932c      	ld.w      	r1, (r3, 0x30)
+    41d8:	424c      	lsli      	r2, r2, 12
+    41da:	6848      	and      	r1, r2
+    41dc:	3940      	cmpnei      	r1, 0
+    41de:	0bf9      	bt      	0x41d0	// 41d0 <EXI2to3IntHandler+0x30>
+    41e0:	07eb      	br      	0x41b6	// 41b6 <EXI2to3IntHandler+0x16>
+    41e2:	0000      	bkpt
+    41e4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+000041e8 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    41e8:	1460      	nie
+    41ea:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    41ec:	1075      	lrw      	r3, 0x2000005c	// 4240 <EXI4to9IntHandler+0x58>
+    41ee:	3280      	movi      	r2, 128
+    41f0:	9360      	ld.w      	r3, (r3, 0x0)
+    41f2:	60c8      	addu      	r3, r2
+    41f4:	932c      	ld.w      	r1, (r3, 0x30)
+    41f6:	3010      	movi      	r0, 16
+    41f8:	6840      	and      	r1, r0
+    41fa:	3940      	cmpnei      	r1, 0
+    41fc:	0c04      	bf      	0x4204	// 4204 <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    41fe:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    4200:	1463      	ipop
+    4202:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    4204:	932c      	ld.w      	r1, (r3, 0x30)
+    4206:	3020      	movi      	r0, 32
+    4208:	6840      	and      	r1, r0
+    420a:	3940      	cmpnei      	r1, 0
+    420c:	0bf9      	bt      	0x41fe	// 41fe <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    420e:	932c      	ld.w      	r1, (r3, 0x30)
+    4210:	3040      	movi      	r0, 64
+    4212:	6840      	and      	r1, r0
+    4214:	3940      	cmpnei      	r1, 0
+    4216:	0bf4      	bt      	0x41fe	// 41fe <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    4218:	932c      	ld.w      	r1, (r3, 0x30)
+    421a:	6848      	and      	r1, r2
+    421c:	3940      	cmpnei      	r1, 0
+    421e:	0c03      	bf      	0x4224	// 4224 <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    4220:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4222:	07ef      	br      	0x4200	// 4200 <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    4224:	3280      	movi      	r2, 128
+    4226:	932c      	ld.w      	r1, (r3, 0x30)
+    4228:	4241      	lsli      	r2, r2, 1
+    422a:	6848      	and      	r1, r2
+    422c:	3940      	cmpnei      	r1, 0
+    422e:	0bf9      	bt      	0x4220	// 4220 <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    4230:	3280      	movi      	r2, 128
+    4232:	932c      	ld.w      	r1, (r3, 0x30)
+    4234:	4242      	lsli      	r2, r2, 2
+    4236:	6848      	and      	r1, r2
+    4238:	3940      	cmpnei      	r1, 0
+    423a:	0bf3      	bt      	0x4220	// 4220 <EXI4to9IntHandler+0x38>
+    423c:	07e2      	br      	0x4200	// 4200 <EXI4to9IntHandler+0x18>
+    423e:	0000      	bkpt
+    4240:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00004244 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    4244:	1460      	nie
+    4246:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    4248:	1076      	lrw      	r3, 0x2000005c	// 42a0 <EXI10to15IntHandler+0x5c>
+    424a:	3280      	movi      	r2, 128
+    424c:	9360      	ld.w      	r3, (r3, 0x0)
+    424e:	237f      	addi      	r3, 128
+    4250:	932c      	ld.w      	r1, (r3, 0x30)
+    4252:	4243      	lsli      	r2, r2, 3
+    4254:	6848      	and      	r1, r2
+    4256:	3940      	cmpnei      	r1, 0
+    4258:	0c03      	bf      	0x425e	// 425e <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    425a:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    425c:	041f      	br      	0x429a	// 429a <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    425e:	3280      	movi      	r2, 128
+    4260:	932c      	ld.w      	r1, (r3, 0x30)
+    4262:	4244      	lsli      	r2, r2, 4
+    4264:	6848      	and      	r1, r2
+    4266:	3940      	cmpnei      	r1, 0
+    4268:	0bf9      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    426a:	3280      	movi      	r2, 128
+    426c:	932c      	ld.w      	r1, (r3, 0x30)
+    426e:	4245      	lsli      	r2, r2, 5
+    4270:	6848      	and      	r1, r2
+    4272:	3940      	cmpnei      	r1, 0
+    4274:	0bf3      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    4276:	3280      	movi      	r2, 128
+    4278:	932c      	ld.w      	r1, (r3, 0x30)
+    427a:	4246      	lsli      	r2, r2, 6
+    427c:	6848      	and      	r1, r2
+    427e:	3940      	cmpnei      	r1, 0
+    4280:	0bed      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    4282:	3280      	movi      	r2, 128
+    4284:	932c      	ld.w      	r1, (r3, 0x30)
+    4286:	4247      	lsli      	r2, r2, 7
+    4288:	6848      	and      	r1, r2
+    428a:	3940      	cmpnei      	r1, 0
+    428c:	0be7      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    428e:	3280      	movi      	r2, 128
+    4290:	932c      	ld.w      	r1, (r3, 0x30)
+    4292:	4248      	lsli      	r2, r2, 8
+    4294:	6848      	and      	r1, r2
+    4296:	3940      	cmpnei      	r1, 0
+    4298:	0be1      	bt      	0x425a	// 425a <EXI10to15IntHandler+0x16>
+}
+    429a:	1463      	ipop
+    429c:	1461      	nir
+    429e:	0000      	bkpt
+    42a0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+000042a4 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    42a4:	1460      	nie
+    42a6:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    42a8:	106b      	lrw      	r3, 0x20000014	// 42d4 <LPTIntHandler+0x30>
+    42aa:	3101      	movi      	r1, 1
+    42ac:	9360      	ld.w      	r3, (r3, 0x0)
+    42ae:	934e      	ld.w      	r2, (r3, 0x38)
+    42b0:	6884      	and      	r2, r1
+    42b2:	3a40      	cmpnei      	r2, 0
+    42b4:	0c03      	bf      	0x42ba	// 42ba <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    42b6:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    42b8:	040b      	br      	0x42ce	// 42ce <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    42ba:	934e      	ld.w      	r2, (r3, 0x38)
+    42bc:	3102      	movi      	r1, 2
+    42be:	6884      	and      	r2, r1
+    42c0:	3a40      	cmpnei      	r2, 0
+    42c2:	0bfa      	bt      	0x42b6	// 42b6 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    42c4:	934e      	ld.w      	r2, (r3, 0x38)
+    42c6:	3104      	movi      	r1, 4
+    42c8:	6884      	and      	r2, r1
+    42ca:	3a40      	cmpnei      	r2, 0
+    42cc:	0bf5      	bt      	0x42b6	// 42b6 <LPTIntHandler+0x12>
+}
+    42ce:	1463      	ipop
+    42d0:	1461      	nir
+    42d2:	0000      	bkpt
+    42d4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+000042d8 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    42d8:	1460      	nie
+    42da:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    42dc:	1071      	lrw      	r3, 0x2000000c	// 4320 <BT0IntHandler+0x48>
+    42de:	3101      	movi      	r1, 1
+    42e0:	9360      	ld.w      	r3, (r3, 0x0)
+    42e2:	934c      	ld.w      	r2, (r3, 0x30)
+    42e4:	6884      	and      	r2, r1
+    42e6:	3a40      	cmpnei      	r2, 0
+    42e8:	0c0a      	bf      	0x42fc	// 42fc <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    42ea:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    42ec:	9341      	ld.w      	r2, (r3, 0x4)
+    42ee:	3a86      	bclri      	r2, 6
+    42f0:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    42f2:	9340      	ld.w      	r2, (r3, 0x0)
+    42f4:	3200      	movi      	r2, 0
+    42f6:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    42f8:	1463      	ipop
+    42fa:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    42fc:	934c      	ld.w      	r2, (r3, 0x30)
+    42fe:	3102      	movi      	r1, 2
+    4300:	6884      	and      	r2, r1
+    4302:	3a40      	cmpnei      	r2, 0
+    4304:	0c03      	bf      	0x430a	// 430a <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    4306:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    4308:	07f8      	br      	0x42f8	// 42f8 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    430a:	934c      	ld.w      	r2, (r3, 0x30)
+    430c:	3104      	movi      	r1, 4
+    430e:	6884      	and      	r2, r1
+    4310:	3a40      	cmpnei      	r2, 0
+    4312:	0bfa      	bt      	0x4306	// 4306 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    4314:	934c      	ld.w      	r2, (r3, 0x30)
+    4316:	3108      	movi      	r1, 8
+    4318:	6884      	and      	r2, r1
+    431a:	3a40      	cmpnei      	r2, 0
+    431c:	0bf5      	bt      	0x4306	// 4306 <BT0IntHandler+0x2e>
+    431e:	07ed      	br      	0x42f8	// 42f8 <BT0IntHandler+0x20>
+    4320:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00004324 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    4324:	1460      	nie
+    4326:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    4328:	1076      	lrw      	r3, 0x20000008	// 4380 <BT1IntHandler+0x5c>
+    432a:	3101      	movi      	r1, 1
+    432c:	9360      	ld.w      	r3, (r3, 0x0)
+    432e:	934c      	ld.w      	r2, (r3, 0x30)
+    4330:	6884      	and      	r2, r1
+    4332:	3a40      	cmpnei      	r2, 0
+    4334:	0c03      	bf      	0x433a	// 433a <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    4336:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    4338:	0416      	br      	0x4364	// 4364 <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    433a:	934c      	ld.w      	r2, (r3, 0x30)
+    433c:	3102      	movi      	r1, 2
+    433e:	6884      	and      	r2, r1
+    4340:	3a40      	cmpnei      	r2, 0
+    4342:	0c13      	bf      	0x4368	// 4368 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    4344:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    4346:	1070      	lrw      	r3, 0x200000b0	// 4384 <BT1IntHandler+0x60>
+    4348:	8340      	ld.b      	r2, (r3, 0x0)
+    434a:	2200      	addi      	r2, 1
+    434c:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    434e:	9321      	ld.w      	r1, (r3, 0x4)
+    4350:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    4352:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    4354:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    4356:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    4358:	0c06      	bf      	0x4364	// 4364 <BT1IntHandler+0x40>
+			NUM = 0;
+    435a:	3200      	movi      	r2, 0
+    435c:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    435e:	9342      	ld.w      	r2, (r3, 0x8)
+    4360:	2200      	addi      	r2, 1
+    4362:	b342      	st.w      	r2, (r3, 0x8)
+}
+    4364:	1463      	ipop
+    4366:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    4368:	934c      	ld.w      	r2, (r3, 0x30)
+    436a:	3104      	movi      	r1, 4
+    436c:	6884      	and      	r2, r1
+    436e:	3a40      	cmpnei      	r2, 0
+    4370:	0be3      	bt      	0x4336	// 4336 <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    4372:	934c      	ld.w      	r2, (r3, 0x30)
+    4374:	3108      	movi      	r1, 8
+    4376:	6884      	and      	r2, r1
+    4378:	3a40      	cmpnei      	r2, 0
+    437a:	0bde      	bt      	0x4336	// 4336 <BT1IntHandler+0x12>
+    437c:	07f4      	br      	0x4364	// 4364 <BT1IntHandler+0x40>
+    437e:	0000      	bkpt
+    4380:	20000008 	.long	0x20000008
+    4384:	200000b0 	.long	0x200000b0
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00004388 <PriviledgeVioHandler>:
+    4388:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+0000438a <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    438a:	1460      	nie
+    438c:	1462      	ipush
+    // ISR content ...
+
+}
+    438e:	1463      	ipop
+    4390:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+00004392 <Trap3Handler>:
+    4392:	1460      	nie
+    4394:	1462      	ipush
+    4396:	1463      	ipop
+    4398:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+0000439a <Trap2Handler>:
+    439a:	1460      	nie
+    439c:	1462      	ipush
+    439e:	1463      	ipop
+    43a0:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+000043a2 <Trap1Handler>:
+    43a2:	1460      	nie
+    43a4:	1462      	ipush
+    43a6:	1463      	ipop
+    43a8:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+000043aa <Trap0Handler>:
+    43aa:	1460      	nie
+    43ac:	1462      	ipush
+    43ae:	1463      	ipop
+    43b0:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+000043b2 <UnrecExecpHandler>:
+    43b2:	1460      	nie
+    43b4:	1462      	ipush
+    43b6:	1463      	ipop
+    43b8:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+000043ba <BreakPointHandler>:
+    43ba:	1460      	nie
+    43bc:	1462      	ipush
+    43be:	1463      	ipop
+    43c0:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+000043c2 <AccessErrHandler>:
+    43c2:	1460      	nie
+    43c4:	1462      	ipush
+    43c6:	1463      	ipop
+    43c8:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+000043ca <IllegalInstrHandler>:
+    43ca:	1460      	nie
+    43cc:	1462      	ipush
+    43ce:	1463      	ipop
+    43d0:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+000043d2 <MisalignedHandler>:
+    43d2:	1460      	nie
+    43d4:	1462      	ipush
+    43d6:	1463      	ipop
+    43d8:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+000043da <CNTAIntHandler>:
+    43da:	1460      	nie
+    43dc:	1462      	ipush
+    43de:	1463      	ipop
+    43e0:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+000043e2 <I2CIntHandler>:
+    43e2:	1460      	nie
+    43e4:	1462      	ipush
+    43e6:	1463      	ipop
+    43e8:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000043ec <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    43ec:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    43ee:	c0006023 	mfcr      	r3, cr<0, 0>
+    43f2:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    43f6:	1046      	lrw      	r2, 0x20000000	// 440c <__divsi3+0x20>
+    43f8:	3400      	movi      	r4, 0
+    43fa:	9240      	ld.w      	r2, (r2, 0x0)
+    43fc:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    43fe:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4400:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4402:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4404:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    4408:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    440a:	1481      	pop      	r4
+    440c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00004410 <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    4410:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4412:	c0006023 	mfcr      	r3, cr<0, 0>
+    4416:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    441a:	1046      	lrw      	r2, 0x20000000	// 4430 <__udivsi3+0x20>
+    441c:	3401      	movi      	r4, 1
+    441e:	9240      	ld.w      	r2, (r2, 0x0)
+    4420:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4422:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4424:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4426:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4428:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    442c:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    442e:	1481      	pop      	r4
+    4430:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__modsi3:
+
+00004434 <__modsi3>:
+
+int __modsi3 ( int a,  int b)
+{   
+    4434:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4436:	c0006023 	mfcr      	r3, cr<0, 0>
+    443a:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 0;
+    443e:	1046      	lrw      	r2, 0x20000000	// 4454 <__modsi3+0x20>
+    4440:	3400      	movi      	r4, 0
+    4442:	9240      	ld.w      	r2, (r2, 0x0)
+    4444:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4446:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4448:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    444a:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    444c:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4450:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    4452:	1481      	pop      	r4
+    4454:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+00004458 <__umodsi3>:
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    4458:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    445a:	c0006023 	mfcr      	r3, cr<0, 0>
+    445e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    4462:	1046      	lrw      	r2, 0x20000000	// 4478 <__umodsi3+0x20>
+    4464:	3401      	movi      	r4, 1
+    4466:	9240      	ld.w      	r2, (r2, 0x0)
+    4468:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    446a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    446c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    446e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4470:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4474:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    4476:	1481      	pop      	r4
+    4478:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+0000447c <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    447c:	c1807420 	psrset      	ee, ie
+}
+    4480:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00004484 <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4484:	14d1      	push      	r4, r15
+	switch(uart_id){
+    4486:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4488:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    448a:	0c1a      	bf      	0x44be	// 44be <UARTx_Init+0x3a>
+    448c:	3840      	cmpnei      	r0, 0
+    448e:	0c04      	bf      	0x4496	// 4496 <UARTx_Init+0x12>
+    4490:	3842      	cmpnei      	r0, 2
+    4492:	0c2a      	bf      	0x44e6	// 44e6 <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    4494:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    4496:	e3fff8dd 	bsr      	0x3650	// 3650 <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    449a:	118a      	lrw      	r4, 0x20000040	// 4540 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    449c:	3100      	movi      	r1, 0
+    449e:	3000      	movi      	r0, 0
+    44a0:	e3fff918 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44a4:	9400      	ld.w      	r0, (r4, 0x0)
+    44a6:	3200      	movi      	r2, 0
+    44a8:	1127      	lrw      	r1, 0x2710	// 4544 <UARTx_Init+0xc0>
+    44aa:	e3fff989 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    44ae:	9400      	ld.w      	r0, (r4, 0x0)
+    44b0:	3200      	movi      	r2, 0
+    44b2:	1125      	lrw      	r1, 0x2710	// 4544 <UARTx_Init+0xc0>
+    44b4:	e3fff98c 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    44b8:	e3fff8f0 	bsr      	0x3698	// 3698 <UART0_Int_Enable>
+			break;
+    44bc:	07ec      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    44be:	e3fff8d5 	bsr      	0x3668	// 3668 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44c2:	3102      	movi      	r1, 2
+    44c4:	3001      	movi      	r0, 1
+    44c6:	e3fff905 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    44ca:	1180      	lrw      	r4, 0x2000003c	// 4548 <UARTx_Init+0xc4>
+    44cc:	31d0      	movi      	r1, 208
+    44ce:	9400      	ld.w      	r0, (r4, 0x0)
+    44d0:	3200      	movi      	r2, 0
+    44d2:	4121      	lsli      	r1, r1, 1
+    44d4:	e3fff974 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44d8:	31d0      	movi      	r1, 208
+    44da:	9400      	ld.w      	r0, (r4, 0x0)
+    44dc:	3200      	movi      	r2, 0
+    44de:	4121      	lsli      	r1, r1, 1
+    44e0:	e3fff976 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			break;
+    44e4:	07d8      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    44e6:	e3fff8cd 	bsr      	0x3680	// 3680 <UART2_DeInit>
+			UART_IO_Init(IO_UART2,0);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44ea:	3100      	movi      	r1, 0
+    44ec:	3002      	movi      	r0, 2
+    44ee:	e3fff8f1 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44f2:	1077      	lrw      	r3, 0x20000038	// 454c <UARTx_Init+0xc8>
+    44f4:	31d0      	movi      	r1, 208
+    44f6:	9300      	ld.w      	r0, (r3, 0x0)
+    44f8:	3200      	movi      	r2, 0
+    44fa:	4121      	lsli      	r1, r1, 1
+    44fc:	e3fff968 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    4500:	e3fff8da 	bsr      	0x36b4	// 36b4 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    4504:	3273      	movi      	r2, 115
+    4506:	3100      	movi      	r1, 0
+    4508:	1012      	lrw      	r0, 0x200003a4	// 4550 <UARTx_Init+0xcc>
+    450a:	e3ffea89 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    450e:	1072      	lrw      	r3, 0x2000040b	// 4554 <UARTx_Init+0xd0>
+    4510:	3203      	movi      	r2, 3
+    4512:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    4514:	4c48      	lsri      	r2, r4, 8
+    4516:	a388      	st.b      	r4, (r3, 0x8)
+    4518:	a349      	st.b      	r2, (r3, 0x9)
+    451a:	4c50      	lsri      	r2, r4, 16
+    451c:	4c98      	lsri      	r4, r4, 24
+    451e:	a38b      	st.b      	r4, (r3, 0xb)
+    4520:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    4522:	3103      	movi      	r1, 3
+    4524:	108d      	lrw      	r4, 0x20000048	// 4558 <UARTx_Init+0xd4>
+    4526:	3200      	movi      	r2, 0
+    4528:	9400      	ld.w      	r0, (r4, 0x0)
+    452a:	e3fff691 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    452e:	9400      	ld.w      	r0, (r4, 0x0)
+    4530:	3103      	movi      	r1, 3
+    4532:	e3fff707 	bsr      	0x3340	// 3340 <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    4536:	9400      	ld.w      	r0, (r4, 0x0)
+    4538:	3103      	movi      	r1, 3
+    453a:	e3fff70e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    453e:	07ab      	br      	0x4494	// 4494 <UARTx_Init+0x10>
+    4540:	20000040 	.long	0x20000040
+    4544:	00002710 	.long	0x00002710
+    4548:	2000003c 	.long	0x2000003c
+    454c:	20000038 	.long	0x20000038
+    4550:	200003a4 	.long	0x200003a4
+    4554:	2000040b 	.long	0x2000040b
+    4558:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+0000455c <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    455c:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    455e:	1075      	lrw      	r3, 0x20000404	// 45b0 <UART2_RecvINT_Processing+0x54>
+    4560:	8346      	ld.b      	r2, (r3, 0x6)
+    4562:	8325      	ld.b      	r1, (r3, 0x5)
+    4564:	4248      	lsli      	r2, r2, 8
+    4566:	6c84      	or      	r2, r1
+    4568:	3162      	movi      	r1, 98
+    456a:	10b3      	lrw      	r5, 0x200003a4	// 45b4 <UART2_RecvINT_Processing+0x58>
+    456c:	3440      	movi      	r4, 64
+    456e:	6485      	cmplt      	r1, r2
+    4570:	6114      	addu      	r4, r5
+    4572:	0c06      	bf      	0x457e	// 457e <UART2_RecvINT_Processing+0x22>
+    4574:	3225      	movi      	r2, 37
+    4576:	6090      	addu      	r2, r4
+    4578:	3100      	movi      	r1, 0
+    457a:	a220      	st.b      	r1, (r2, 0x0)
+    457c:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    457e:	8346      	ld.b      	r2, (r3, 0x6)
+    4580:	8325      	ld.b      	r1, (r3, 0x5)
+    4582:	4248      	lsli      	r2, r2, 8
+    4584:	6c84      	or      	r2, r1
+    4586:	5a22      	addi      	r1, r2, 1
+    4588:	6094      	addu      	r2, r5
+    458a:	a200      	st.b      	r0, (r2, 0x0)
+    458c:	2424      	addi      	r4, 37
+    458e:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4590:	104a      	lrw      	r2, 0x200000b8	// 45b8 <UART2_RecvINT_Processing+0x5c>
+    4592:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    4594:	a420      	st.b      	r1, (r4, 0x0)
+    4596:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4598:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    459a:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    459c:	1028      	lrw      	r1, 0x2000040f	// 45bc <UART2_RecvINT_Processing+0x60>
+    459e:	a140      	st.b      	r2, (r1, 0x0)
+    45a0:	a101      	st.b      	r0, (r1, 0x1)
+    45a2:	4a10      	lsri      	r0, r2, 16
+    45a4:	4a58      	lsri      	r2, r2, 24
+    45a6:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    45a8:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45aa:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    45ac:	a344      	st.b      	r2, (r3, 0x4)
+}
+    45ae:	1482      	pop      	r4-r5
+    45b0:	20000404 	.long	0x20000404
+    45b4:	200003a4 	.long	0x200003a4
+    45b8:	200000b8 	.long	0x200000b8
+    45bc:	2000040f 	.long	0x2000040f
+
+Disassembly of section .text.Dbg_Println:
+
+000045c0 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    45c0:	1423      	subi      	r14, r14, 12
+    45c2:	b862      	st.w      	r3, (r14, 0x8)
+    45c4:	b841      	st.w      	r2, (r14, 0x4)
+    45c6:	b820      	st.w      	r1, (r14, 0x0)
+    45c8:	14d2      	push      	r4-r5, r15
+    45ca:	1422      	subi      	r14, r14, 8
+    45cc:	9865      	ld.w      	r3, (r14, 0x14)
+    45ce:	b861      	st.w      	r3, (r14, 0x4)
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+    45d0:	3301      	movi      	r3, 1
+    45d2:	105c      	lrw      	r2, 0x20000068	// 4640 <Dbg_Println+0x80>
+    45d4:	70c0      	lsl      	r3, r0
+    45d6:	9240      	ld.w      	r2, (r2, 0x0)
+    45d8:	68c8      	and      	r3, r2
+    45da:	3b40      	cmpnei      	r3, 0
+    45dc:	0c2b      	bf      	0x4632	// 4632 <Dbg_Println+0x72>
+        SysTick_Now = SysTick_1ms;
+    45de:	109a      	lrw      	r4, 0x200000bc	// 4644 <Dbg_Println+0x84>
+    45e0:	107a      	lrw      	r3, 0x200000b8	// 4648 <Dbg_Println+0x88>
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45e2:	9445      	ld.w      	r2, (r4, 0x14)
+        SysTick_Now = SysTick_1ms;
+    45e4:	9360      	ld.w      	r3, (r3, 0x0)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45e6:	5b49      	subu      	r2, r3, r2
+        SysTick_Now = SysTick_1ms;
+    45e8:	b464      	st.w      	r3, (r4, 0x10)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ea:	b446      	st.w      	r2, (r4, 0x18)
+        SysTick_Last = SysTick_Now;
+    45ec:	b465      	st.w      	r3, (r4, 0x14)
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+    45ee:	3180      	movi      	r1, 128
+    45f0:	301c      	movi      	r0, 28
+    45f2:	b840      	st.w      	r2, (r14, 0x0)
+    45f4:	4122      	lsli      	r1, r1, 2
+    45f6:	1056      	lrw      	r2, 0x5e63	// 464c <Dbg_Println+0x8c>
+    45f8:	6010      	addu      	r0, r4
+    45fa:	e3ffe9b5 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    45fe:	10b5      	lrw      	r5, 0x2000003c	// 4650 <Dbg_Println+0x90>
+    4600:	311c      	movi      	r1, 28
+    4602:	7481      	zexth      	r2, r0
+    4604:	6050      	addu      	r1, r4
+    4606:	9500      	ld.w      	r0, (r5, 0x0)
+    4608:	e3fff8ea 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+    460c:	3180      	movi      	r1, 128
+    460e:	301c      	movi      	r0, 28
+    4610:	1b06      	addi      	r3, r14, 24
+    4612:	9841      	ld.w      	r2, (r14, 0x4)
+    4614:	4122      	lsli      	r1, r1, 2
+    4616:	6010      	addu      	r0, r4
+    4618:	e3ffe9d5 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+    461c:	6c53      	mov      	r1, r4
+    461e:	7481      	zexth      	r2, r0
+    4620:	211b      	addi      	r1, 28
+    4622:	9500      	ld.w      	r0, (r5, 0x0)
+    4624:	e3fff8dc 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		DBG_Printf("\r\n",2);
+    4628:	9500      	ld.w      	r0, (r5, 0x0)
+    462a:	3202      	movi      	r2, 2
+    462c:	102a      	lrw      	r1, 0x5e71	// 4654 <Dbg_Println+0x94>
+    462e:	e3fff8d7 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		
+    }
+
+#endif	
+}
+    4632:	1402      	addi      	r14, r14, 8
+    4634:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    4638:	98a1      	ld.w      	r5, (r14, 0x4)
+    463a:	9880      	ld.w      	r4, (r14, 0x0)
+    463c:	1406      	addi      	r14, r14, 24
+    463e:	783c      	jmp      	r15
+    4640:	20000068 	.long	0x20000068
+    4644:	200000bc 	.long	0x200000bc
+    4648:	200000b8 	.long	0x200000b8
+    464c:	00005e63 	.long	0x00005e63
+    4650:	2000003c 	.long	0x2000003c
+    4654:	00005e71 	.long	0x00005e71
+
+Disassembly of section .text.RC522_Delay:
+
+00004658 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    4658:	3300      	movi      	r3, 0
+    465a:	640e      	cmpne      	r3, r0
+    465c:	0802      	bt      	0x4660	// 4660 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    465e:	783c      	jmp      	r15
+        nop;
+    4660:	6c03      	mov      	r0, r0
+        nop;
+    4662:	6c03      	mov      	r0, r0
+        nop;
+    4664:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    4666:	2300      	addi      	r3, 1
+    4668:	07f9      	br      	0x465a	// 465a <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+0000466c <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    466c:	14d4      	push      	r4-r7, r15
+    466e:	6d83      	mov      	r6, r0
+    4670:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    4672:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    4674:	10f2      	lrw      	r7, 0x2000004c	// 46bc <RC522_ReadWriteOneByte+0x50>
+    4676:	3109      	movi      	r1, 9
+    4678:	9700      	ld.w      	r0, (r7, 0x0)
+    467a:	e3fff66e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    467e:	74da      	sextb      	r3, r6
+    4680:	3bdf      	btsti      	r3, 31
+    4682:	310a      	movi      	r1, 10
+    4684:	9700      	ld.w      	r0, (r7, 0x0)
+    4686:	0c18      	bf      	0x46b6	// 46b6 <RC522_ReadWriteOneByte+0x4a>
+    4688:	e3fff663 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    468c:	3109      	movi      	r1, 9
+    468e:	9700      	ld.w      	r0, (r7, 0x0)
+    4690:	e3fff65f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    4694:	310b      	movi      	r1, 11
+    4696:	9700      	ld.w      	r0, (r7, 0x0)
+    4698:	e3fff66e 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+        tx_data<<=1;
+    469c:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    469e:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a0:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    46a2:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    46a4:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a6:	0c02      	bf      	0x46aa	// 46aa <RC522_ReadWriteOneByte+0x3e>
+    46a8:	3ca0      	bseti      	r4, 0
+    46aa:	2d00      	subi      	r5, 1
+    46ac:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    46ae:	3d40      	cmpnei      	r5, 0
+    46b0:	0be3      	bt      	0x4676	// 4676 <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    46b2:	6c13      	mov      	r0, r4
+    46b4:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    46b6:	e3fff650 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    46ba:	07e9      	br      	0x468c	// 468c <RC522_ReadWriteOneByte+0x20>
+    46bc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+000046c0 <RC522_ReadRawRC>:
+{
+    46c0:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    46c2:	10ad      	lrw      	r5, 0x20000048	// 46f4 <RC522_ReadRawRC+0x34>
+    46c4:	3105      	movi      	r1, 5
+{
+    46c6:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    46c8:	9500      	ld.w      	r0, (r5, 0x0)
+    46ca:	e3fff646 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    46ce:	4401      	lsli      	r0, r4, 1
+    46d0:	347e      	movi      	r4, 126
+    46d2:	6810      	and      	r0, r4
+    46d4:	3400      	movi      	r4, 0
+    46d6:	2c7f      	subi      	r4, 128
+    46d8:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    46da:	7400      	zextb      	r0, r0
+    46dc:	e3ffffc8 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    46e0:	3000      	movi      	r0, 0
+    46e2:	e3ffffc5 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    46e6:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    46e8:	3105      	movi      	r1, 5
+    46ea:	9500      	ld.w      	r0, (r5, 0x0)
+    46ec:	e3fff631 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    46f0:	6c13      	mov      	r0, r4
+    46f2:	1492      	pop      	r4-r5, r15
+    46f4:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+000046f8 <RC522_WriteRawRC>:
+{
+    46f8:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    46fa:	10ab      	lrw      	r5, 0x20000048	// 4724 <RC522_WriteRawRC+0x2c>
+{
+    46fc:	6d87      	mov      	r6, r1
+    46fe:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    4700:	3105      	movi      	r1, 5
+    4702:	9500      	ld.w      	r0, (r5, 0x0)
+    4704:	e3fff629 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    4708:	4481      	lsli      	r4, r4, 1
+    470a:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    470c:	6810      	and      	r0, r4
+    470e:	e3ffffaf 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    4712:	6c1b      	mov      	r0, r6
+    4714:	e3ffffac 	bsr      	0x466c	// 466c <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    4718:	9500      	ld.w      	r0, (r5, 0x0)
+    471a:	3105      	movi      	r1, 5
+    471c:	e3fff619 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4720:	1493      	pop      	r4-r6, r15
+    4722:	0000      	bkpt
+    4724:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RC522_PcdReset:
+
+00004728 <RC522_PcdReset>:
+{
+    4728:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    472a:	310f      	movi      	r1, 15
+    472c:	3001      	movi      	r0, 1
+    472e:	e3ffffe5 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    4732:	310f      	movi      	r1, 15
+    4734:	3001      	movi      	r0, 1
+    4736:	e3ffffe1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    473a:	300a      	movi      	r0, 10
+    473c:	e3ffff8e 	bsr      	0x4658	// 4658 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    4740:	313d      	movi      	r1, 61
+    4742:	3011      	movi      	r0, 17
+    4744:	e3ffffda 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    4748:	311e      	movi      	r1, 30
+    474a:	302d      	movi      	r0, 45
+    474c:	e3ffffd6 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    4750:	3100      	movi      	r1, 0
+    4752:	302c      	movi      	r0, 44
+    4754:	e3ffffd2 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    4758:	318d      	movi      	r1, 141
+    475a:	302a      	movi      	r0, 42
+    475c:	e3ffffce 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    4760:	313e      	movi      	r1, 62
+    4762:	302b      	movi      	r0, 43
+    4764:	e3ffffca 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    4768:	3140      	movi      	r1, 64
+    476a:	3015      	movi      	r0, 21
+    476c:	e3ffffc6 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    4770:	3000      	movi      	r0, 0
+    4772:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+00004774 <RC522_SetBitMask>:
+{
+    4774:	14d2      	push      	r4-r5, r15
+    4776:	6d47      	mov      	r5, r1
+    4778:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    477a:	e3ffffa3 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    477e:	6c43      	mov      	r1, r0
+    4780:	6c54      	or      	r1, r5
+    4782:	7444      	zextb      	r1, r1
+    4784:	6c13      	mov      	r0, r4
+    4786:	e3ffffb9 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    478a:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+0000478c <RC522_PcdAntennaOn>:
+{
+    478c:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    478e:	3014      	movi      	r0, 20
+    4790:	e3ffff98 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    4794:	3303      	movi      	r3, 3
+    4796:	680c      	and      	r0, r3
+    4798:	3840      	cmpnei      	r0, 0
+    479a:	0805      	bt      	0x47a4	// 47a4 <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    479c:	3103      	movi      	r1, 3
+    479e:	3014      	movi      	r0, 20
+    47a0:	e3ffffea 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+}
+    47a4:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000047a6 <RC522_ClearBitMask>:
+{
+    47a6:	14d2      	push      	r4-r5, r15
+    47a8:	6d47      	mov      	r5, r1
+    47aa:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    47ac:	e3ffff8a 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    47b0:	6815      	andn      	r0, r5
+    47b2:	7440      	zextb      	r1, r0
+    47b4:	6c13      	mov      	r0, r4
+    47b6:	e3ffffa1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    47ba:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+000047bc <RC522_PcdAntennaOff>:
+{
+    47bc:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    47be:	3103      	movi      	r1, 3
+    47c0:	3014      	movi      	r0, 20
+    47c2:	e3fffff2 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+}
+    47c6:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Reset:
+
+000047c8 <RC522_Reset>:
+void RC522_Reset(void){
+    47c8:	14d0      	push      	r15
+  RC522_PcdReset();                //复位RC522
+    47ca:	e3ffffaf 	bsr      	0x4728	// 4728 <RC522_PcdReset>
+  RC522_PcdAntennaOff();    //关闭天线
+    47ce:	e3fffff7 	bsr      	0x47bc	// 47bc <RC522_PcdAntennaOff>
+  RC522_Delay(2);         //延时2毫秒
+    47d2:	3002      	movi      	r0, 2
+    47d4:	e3ffff42 	bsr      	0x4658	// 4658 <RC522_Delay>
+  RC522_PcdAntennaOn();     //开启天线
+    47d8:	e3ffffda 	bsr      	0x478c	// 478c <RC522_PcdAntennaOn>
+}
+    47dc:	1490      	pop      	r15
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+000047de <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    47de:	14d0      	push      	r15
+		RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    47e0:	3108      	movi      	r1, 8
+    47e2:	3008      	movi      	r0, 8
+    47e4:	e3ffffe1 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+		RC522_SetBitMask(ComIEnReg,BIT7);
+    47e8:	3180      	movi      	r1, 128
+    47ea:	3002      	movi      	r0, 2
+    47ec:	e3ffffc4 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+		RC522_WriteRawRC(ModeReg,0x3D);
+    47f0:	313d      	movi      	r1, 61
+    47f2:	3011      	movi      	r0, 17
+    47f4:	e3ffff82 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxModeReg,0x00);     //设定数据发送传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    47f8:	3100      	movi      	r1, 0
+    47fa:	3012      	movi      	r0, 18
+    47fc:	e3ffff7e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxModeReg,0x00);     //设定数据接收传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    4800:	3100      	movi      	r1, 0
+    4802:	3013      	movi      	r0, 19
+    4804:	e3ffff7a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModWidthReg,MODWIDTH);    //调制宽度为reset值
+    4808:	3126      	movi      	r1, 38
+    480a:	3024      	movi      	r0, 36
+    480c:	e3ffff76 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModeReg,0x3D);      //3D--CRC预设值为6363
+    4810:	313d      	movi      	r1, 61
+    4812:	3011      	movi      	r0, 17
+    4814:	e3ffff72 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxThresholdReg,(MINLEVEL_A<<4) | COLLLEVEL_A);  //选择位译码器的阈值
+    4818:	3164      	movi      	r1, 100
+    481a:	3018      	movi      	r0, 24
+    481c:	e3ffff6e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RFCfgReg,0x7F);   // 接收增益
+    4820:	317f      	movi      	r1, 127
+    4822:	3026      	movi      	r0, 38
+    4824:	e3ffff6a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxAutoReg,0x40);  //100%ASK传送
+    4828:	3140      	movi      	r1, 64
+    482a:	3015      	movi      	r0, 21
+    482c:	e3ffff66 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ControlReg,0x10);  //接收的最后一个字节所有比特有效
+    4830:	3110      	movi      	r1, 16
+    4832:	300c      	movi      	r0, 12
+    4834:	e3ffff62 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegL,0x64);    //16bit定时器重载值（低位）
+    4838:	3164      	movi      	r1, 100
+    483a:	302d      	movi      	r0, 45
+    483c:	e3ffff5e 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegH,0);     //16bit定时器重载值（高位）
+    4840:	3100      	movi      	r1, 0
+    4842:	302c      	movi      	r0, 44
+    4844:	e3ffff5a 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TModeReg,0x8D);     //预分频器开启自动定时器，向下计数，预分频与TPrescalerReg一起决定12bit
+    4848:	318d      	movi      	r1, 141
+    484a:	302a      	movi      	r0, 42
+    484c:	e3ffff56 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TPrescalerReg,0x3e);  //12bit  1101 0011 1110    定时器频率2KHz*//*
+    4850:	313e      	movi      	r1, 62
+    4852:	302b      	movi      	r0, 43
+    4854:	e3ffff52 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    4858:	3000      	movi      	r0, 0
+    485a:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+0000485c <RC522_Init>:
+{
+    485c:	14d1      	push      	r4, r15
+	nop;
+    485e:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    4860:	1183      	lrw      	r4, 0x2000004c	// 48ec <RC522_Init+0x90>
+    4862:	3200      	movi      	r2, 0
+    4864:	9400      	ld.w      	r0, (r4, 0x0)
+    4866:	3109      	movi      	r1, 9
+    4868:	e3fff4f2 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    486c:	3200      	movi      	r2, 0
+    486e:	9400      	ld.w      	r0, (r4, 0x0)
+    4870:	310a      	movi      	r1, 10
+    4872:	e3fff4ed 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    4876:	9400      	ld.w      	r0, (r4, 0x0)
+    4878:	310b      	movi      	r1, 11
+    487a:	e3fff559 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    487e:	9400      	ld.w      	r0, (r4, 0x0)
+    4880:	3201      	movi      	r2, 1
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    4882:	109c      	lrw      	r4, 0x20000048	// 48f0 <RC522_Init+0x94>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    4884:	310b      	movi      	r1, 11
+    4886:	e3fff4e3 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOB0,5,Output);			//CS
+    488a:	9400      	ld.w      	r0, (r4, 0x0)
+    488c:	3200      	movi      	r2, 0
+    488e:	3105      	movi      	r1, 5
+    4890:	e3fff4de 	bsr      	0x324c	// 324c <GPIO_Init>
+    GPIO_Init(GPIOB0,4,Output);			//RST
+    4894:	9400      	ld.w      	r0, (r4, 0x0)
+    4896:	3200      	movi      	r2, 0
+    4898:	3104      	movi      	r1, 4
+    489a:	e3fff4d9 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOB0,3,Intput);			//IRQ
+    489e:	3201      	movi      	r2, 1
+    48a0:	9400      	ld.w      	r0, (r4, 0x0)
+    48a2:	3103      	movi      	r1, 3
+    48a4:	e3fff4d4 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_High(GPIOB0,5);
+    48a8:	9400      	ld.w      	r0, (r4, 0x0)
+    48aa:	3105      	movi      	r1, 5
+    48ac:	e3fff551 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    GPIO_Write_High(GPIOB0,4);
+    48b0:	3104      	movi      	r1, 4
+    48b2:	9400      	ld.w      	r0, (r4, 0x0)
+    48b4:	e3fff54d 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    48b8:	e3ffff38 	bsr      	0x4728	// 4728 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    48bc:	e3ffff80 	bsr      	0x47bc	// 47bc <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    48c0:	3002      	movi      	r0, 2
+    48c2:	e3fffecb 	bsr      	0x4658	// 4658 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    48c6:	e3ffff63 	bsr      	0x478c	// 478c <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    48ca:	108b      	lrw      	r4, 0x20000418	// 48f4 <RC522_Init+0x98>
+    48cc:	e3ffff89 	bsr      	0x47de	// 47de <M500PcdConfigISOType.part.1>
+    48d0:	3234      	movi      	r2, 52
+    48d2:	3100      	movi      	r1, 0
+    48d4:	6c13      	mov      	r0, r4
+    48d6:	e3ffe8a3 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    48da:	3318      	movi      	r3, 24
+    48dc:	a468      	st.b      	r3, (r4, 0x8)
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    48de:	3360      	movi      	r3, 96
+    48e0:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    48e2:	3300      	movi      	r3, 0
+    48e4:	2b00      	subi      	r3, 1
+    48e6:	b468      	st.w      	r3, (r4, 0x20)
+    48e8:	ac72      	st.h      	r3, (r4, 0x24)
+}
+    48ea:	1491      	pop      	r4, r15
+    48ec:	2000004c 	.long	0x2000004c
+    48f0:	20000048 	.long	0x20000048
+    48f4:	20000418 	.long	0x20000418
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+000048f8 <RC522_PcdComMF522>:
+{
+    48f8:	14d4      	push      	r4-r7, r15
+    48fa:	1424      	subi      	r14, r14, 16
+    48fc:	b861      	st.w      	r3, (r14, 0x4)
+    switch (Command) {
+    48fe:	384c      	cmpnei      	r0, 12
+{
+    4900:	9869      	ld.w      	r3, (r14, 0x24)
+    4902:	6d43      	mov      	r5, r0
+    4904:	6dc7      	mov      	r7, r1
+    4906:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    4908:	0c4c      	bf      	0x49a0	// 49a0 <RC522_PcdComMF522+0xa8>
+    490a:	384e      	cmpnei      	r0, 14
+    490c:	0c4d      	bf      	0x49a6	// 49a6 <RC522_PcdComMF522+0xae>
+    U8_T waitFor=0x00;
+    490e:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    4910:	3400      	movi      	r4, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    4912:	6c53      	mov      	r1, r4
+    4914:	39a7      	bseti      	r1, 7
+    4916:	3002      	movi      	r0, 2
+    4918:	b842      	st.w      	r2, (r14, 0x8)
+    491a:	e3fffeef 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    491e:	3180      	movi      	r1, 128
+    4920:	3004      	movi      	r0, 4
+    4922:	e3ffff42 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    4926:	3100      	movi      	r1, 0
+    4928:	3001      	movi      	r0, 1
+    492a:	e3fffee7 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    492e:	3180      	movi      	r1, 128
+    4930:	300a      	movi      	r0, 10
+    4932:	e3ffff21 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    4936:	9842      	ld.w      	r2, (r14, 0x8)
+    4938:	6cdf      	mov      	r3, r7
+    493a:	7489      	zexth      	r2, r2
+    493c:	3700      	movi      	r7, 0
+    493e:	649c      	cmphs      	r7, r2
+    4940:	0c36      	bf      	0x49ac	// 49ac <RC522_PcdComMF522+0xb4>
+	RC522_WriteRawRC(CommandReg,Command);
+    4942:	6c57      	mov      	r1, r5
+    4944:	3001      	movi      	r0, 1
+    4946:	e3fffed9 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    494a:	3d4c      	cmpnei      	r5, 12
+    494c:	0805      	bt      	0x4956	// 4956 <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    494e:	3180      	movi      	r1, 128
+    4950:	300d      	movi      	r0, 13
+    4952:	e3ffff11 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    4956:	33fa      	movi      	r3, 250
+    4958:	4363      	lsli      	r3, r3, 3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    495a:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    495c:	3004      	movi      	r0, 4
+    495e:	b862      	st.w      	r3, (r14, 0x8)
+    4960:	e3fffeb0 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+		i--;
+    4964:	9862      	ld.w      	r3, (r14, 0x8)
+    4966:	2b00      	subi      	r3, 1
+    4968:	74cd      	zexth      	r3, r3
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    496a:	3b40      	cmpnei      	r3, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    496c:	6dc3      	mov      	r7, r0
+	while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    496e:	0c05      	bf      	0x4978	// 4978 <RC522_PcdComMF522+0x80>
+    4970:	6c83      	mov      	r2, r0
+    4972:	6898      	and      	r2, r6
+    4974:	3a40      	cmpnei      	r2, 0
+    4976:	0ff3      	bf      	0x495c	// 495c <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    4978:	3180      	movi      	r1, 128
+    497a:	300d      	movi      	r0, 13
+    497c:	b862      	st.w      	r3, (r14, 0x8)
+    497e:	e3ffff14 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+	if(i!=0)
+    4982:	9862      	ld.w      	r3, (r14, 0x8)
+    4984:	3b40      	cmpnei      	r3, 0
+    4986:	081f      	bt      	0x49c4	// 49c4 <RC522_PcdComMF522+0xcc>
+    char stats=MI_ERR;
+    4988:	3702      	movi      	r7, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    498a:	3180      	movi      	r1, 128
+    498c:	300c      	movi      	r0, 12
+    498e:	e3fffef3 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    4992:	3100      	movi      	r1, 0
+    4994:	3001      	movi      	r0, 1
+    4996:	e3fffeb1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+}
+    499a:	6c1f      	mov      	r0, r7
+    499c:	1404      	addi      	r14, r14, 16
+    499e:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    49a0:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    49a2:	3477      	movi      	r4, 119
+        break;
+    49a4:	07b7      	br      	0x4912	// 4912 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    49a6:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    49a8:	3412      	movi      	r4, 18
+    49aa:	07b4      	br      	0x4912	// 4912 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49ac:	8320      	ld.b      	r1, (r3, 0x0)
+    49ae:	3009      	movi      	r0, 9
+    49b0:	b843      	st.w      	r2, (r14, 0xc)
+    49b2:	b862      	st.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    49b4:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49b6:	e3fffea1 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    49ba:	9862      	ld.w      	r3, (r14, 0x8)
+    for(i=0;i<InLenByte;i++)
+    49bc:	75dd      	zexth      	r7, r7
+    49be:	2300      	addi      	r3, 1
+    49c0:	9843      	ld.w      	r2, (r14, 0xc)
+    49c2:	07be      	br      	0x493e	// 493e <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    49c4:	3006      	movi      	r0, 6
+    49c6:	e3fffe7d 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    49ca:	331b      	movi      	r3, 27
+    49cc:	680c      	and      	r0, r3
+    49ce:	3840      	cmpnei      	r0, 0
+    49d0:	0bdc      	bt      	0x4988	// 4988 <RC522_PcdComMF522+0x90>
+            stats=MI_OK;
+    49d2:	3301      	movi      	r3, 1
+    49d4:	690c      	and      	r4, r3
+            if(Command==PCD_TRANSCEIVE)
+    49d6:	3d4c      	cmpnei      	r5, 12
+            stats=MI_OK;
+    49d8:	69d0      	and      	r7, r4
+            if(Command==PCD_TRANSCEIVE)
+    49da:	0bd8      	bt      	0x498a	// 498a <RC522_PcdComMF522+0x92>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    49dc:	300a      	movi      	r0, 10
+    49de:	e3fffe71 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    49e2:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    49e4:	300c      	movi      	r0, 12
+    49e6:	e3fffe6d 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+    49ea:	3307      	movi      	r3, 7
+    49ec:	680c      	and      	r0, r3
+                if(lastBits)
+    49ee:	3840      	cmpnei      	r0, 0
+    49f0:	0c1b      	bf      	0x4a26	// 4a26 <RC522_PcdComMF522+0x12e>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    49f2:	5c63      	subi      	r3, r4, 1
+    49f4:	4363      	lsli      	r3, r3, 3
+    49f6:	600c      	addu      	r0, r3
+    49f8:	9860      	ld.w      	r3, (r14, 0x0)
+    49fa:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    49fc:	3c40      	cmpnei      	r4, 0
+    49fe:	0c18      	bf      	0x4a2e	// 4a2e <RC522_PcdComMF522+0x136>
+    4a00:	6cd3      	mov      	r3, r4
+    4a02:	7510      	zextb      	r4, r4
+    4a04:	3c12      	cmphsi      	r4, 19
+    4a06:	0c02      	bf      	0x4a0a	// 4a0a <RC522_PcdComMF522+0x112>
+    4a08:	3312      	movi      	r3, 18
+    4a0a:	74cc      	zextb      	r3, r3
+    4a0c:	98c1      	ld.w      	r6, (r14, 0x4)
+                for(i=0; i<n; i++)
+    4a0e:	3500      	movi      	r5, 0
+    4a10:	750d      	zexth      	r4, r3
+    4a12:	6514      	cmphs      	r5, r4
+    4a14:	0bbb      	bt      	0x498a	// 498a <RC522_PcdComMF522+0x92>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a16:	3009      	movi      	r0, 9
+    4a18:	e3fffe54 	bsr      	0x46c0	// 46c0 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    4a1c:	2500      	addi      	r5, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a1e:	a600      	st.b      	r0, (r6, 0x0)
+                for(i=0; i<n; i++)
+    4a20:	7555      	zexth      	r5, r5
+    4a22:	2600      	addi      	r6, 1
+    4a24:	07f7      	br      	0x4a12	// 4a12 <RC522_PcdComMF522+0x11a>
+                    *pOutLenBit=n*8;
+    4a26:	4463      	lsli      	r3, r4, 3
+    4a28:	9840      	ld.w      	r2, (r14, 0x0)
+    4a2a:	a260      	st.b      	r3, (r2, 0x0)
+    4a2c:	07e8      	br      	0x49fc	// 49fc <RC522_PcdComMF522+0x104>
+                if(n==0)n=1;
+    4a2e:	3301      	movi      	r3, 1
+    4a30:	07ee      	br      	0x4a0c	// 4a0c <RC522_PcdComMF522+0x114>
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00004a34 <RC522_PcdRequest>:
+{
+    4a34:	14d3      	push      	r4-r6, r15
+    4a36:	1427      	subi      	r14, r14, 28
+    4a38:	6d03      	mov      	r4, r0
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4a3a:	3212      	movi      	r2, 18
+{
+    4a3c:	6d47      	mov      	r5, r1
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4a3e:	1802      	addi      	r0, r14, 8
+    4a40:	3100      	movi      	r1, 0
+    4a42:	e3ffe7ed 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    4a46:	3108      	movi      	r1, 8
+    4a48:	3008      	movi      	r0, 8
+    4a4a:	e3fffeae 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    4a4e:	3107      	movi      	r1, 7
+    4a50:	300d      	movi      	r0, 13
+    4a52:	e3fffe53 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4a56:	3607      	movi      	r6, 7
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    4a58:	3103      	movi      	r1, 3
+    4a5a:	3014      	movi      	r0, 20
+    4a5c:	e3fffe8c 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4a60:	61b8      	addu      	r6, r14
+    4a62:	1b02      	addi      	r3, r14, 8
+    4a64:	b8c0      	st.w      	r6, (r14, 0x0)
+    4a66:	3201      	movi      	r2, 1
+    4a68:	6c4f      	mov      	r1, r3
+    4a6a:	300c      	movi      	r0, 12
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    4a6c:	dc8e0008 	st.b      	r4, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4a70:	e3ffff44 	bsr      	0x48f8	// 48f8 <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    4a74:	3840      	cmpnei      	r0, 0
+    4a76:	081b      	bt      	0x4aac	// 4aac <RC522_PcdRequest+0x78>
+    4a78:	8660      	ld.b      	r3, (r6, 0x0)
+    4a7a:	3b50      	cmpnei      	r3, 16
+    4a7c:	0818      	bt      	0x4aac	// 4aac <RC522_PcdRequest+0x78>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    4a7e:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4a82:	a560      	st.b      	r3, (r5, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    4a84:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4a88:	a561      	st.b      	r3, (r5, 0x1)
+		if ((ucComMF522Buf[0] == req_code)&&(CardInfo.RC522_Reset_Falg == 0)) {
+    4a8a:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4a8e:	650e      	cmpne      	r3, r4
+    4a90:	3220      	movi      	r2, 32
+    4a92:	1069      	lrw      	r3, 0x20000418	// 4ab4 <RC522_PcdRequest+0x80>
+    4a94:	608c      	addu      	r2, r3
+    4a96:	080d      	bt      	0x4ab0	// 4ab0 <RC522_PcdRequest+0x7c>
+    4a98:	8228      	ld.b      	r1, (r2, 0x8)
+    4a9a:	3940      	cmpnei      	r1, 0
+    4a9c:	0806      	bt      	0x4aa8	// 4aa8 <RC522_PcdRequest+0x74>
+			CardInfo.RC522_Reset_Falg = 1;
+    4a9e:	3101      	movi      	r1, 1
+			CardInfo.RC522_Reset_Falg = 0;
+    4aa0:	a228      	st.b      	r1, (r2, 0x8)
+			CardInfo.Reset_Tick = SysTick_1ms;
+    4aa2:	1046      	lrw      	r2, 0x200000b8	// 4ab8 <RC522_PcdRequest+0x84>
+    4aa4:	9240      	ld.w      	r2, (r2, 0x0)
+    4aa6:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4aa8:	1407      	addi      	r14, r14, 28
+    4aaa:	1493      	pop      	r4-r6, r15
+        stats = MI_ERR;
+    4aac:	3002      	movi      	r0, 2
+    4aae:	07ee      	br      	0x4a8a	// 4a8a <RC522_PcdRequest+0x56>
+			CardInfo.RC522_Reset_Falg = 0;
+    4ab0:	3100      	movi      	r1, 0
+    4ab2:	07f7      	br      	0x4aa0	// 4aa0 <RC522_PcdRequest+0x6c>
+    4ab4:	20000418 	.long	0x20000418
+    4ab8:	200000b8 	.long	0x200000b8
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00004abc <RC522_PcdAnticoll>:
+{
+    4abc:	14d2      	push      	r4-r5, r15
+    4abe:	1427      	subi      	r14, r14, 28
+    4ac0:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    4ac2:	3108      	movi      	r1, 8
+    4ac4:	3008      	movi      	r0, 8
+    4ac6:	e3fffe70 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    4aca:	3100      	movi      	r1, 0
+    4acc:	300d      	movi      	r0, 13
+    4ace:	e3fffe15 	bsr      	0x46f8	// 46f8 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    4ad2:	3180      	movi      	r1, 128
+    4ad4:	300e      	movi      	r0, 14
+    4ad6:	e3fffe68 	bsr      	0x47a6	// 47a6 <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    4ada:	3300      	movi      	r3, 0
+    4adc:	2b6c      	subi      	r3, 109
+    4ade:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    4ae2:	3320      	movi      	r3, 32
+    4ae4:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4ae8:	3307      	movi      	r3, 7
+    4aea:	60f8      	addu      	r3, r14
+    4aec:	b860      	st.w      	r3, (r14, 0x0)
+    4aee:	1b02      	addi      	r3, r14, 8
+    4af0:	3202      	movi      	r2, 2
+    4af2:	6c4f      	mov      	r1, r3
+    4af4:	300c      	movi      	r0, 12
+    4af6:	e3ffff01 	bsr      	0x48f8	// 48f8 <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    4afa:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4afc:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    4afe:	0812      	bt      	0x4b22	// 4b22 <RC522_PcdAnticoll+0x66>
+    4b00:	3300      	movi      	r3, 0
+    4b02:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    4b04:	1902      	addi      	r1, r14, 8
+    4b06:	604c      	addu      	r1, r3
+    4b08:	8120      	ld.b      	r1, (r1, 0x0)
+    4b0a:	5d0c      	addu      	r0, r5, r3
+    4b0c:	2300      	addi      	r3, 1
+    4b0e:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    4b10:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    4b12:	6c49      	xor      	r1, r2
+    4b14:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    4b16:	0bf7      	bt      	0x4b04	// 4b04 <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    4b18:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    4b1c:	644e      	cmpne      	r3, r1
+    4b1e:	0c02      	bf      	0x4b22	// 4b22 <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    4b20:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    4b22:	3180      	movi      	r1, 128
+    4b24:	300e      	movi      	r0, 14
+    4b26:	e3fffe27 	bsr      	0x4774	// 4774 <RC522_SetBitMask>
+}
+    4b2a:	6c13      	mov      	r0, r4
+    4b2c:	1407      	addi      	r14, r14, 28
+    4b2e:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+00004b30 <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    4b30:	14d2      	push      	r4-r5, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    4b32:	11a3      	lrw      	r5, 0x200000b8	// 4bbc <Card_Read_TasK+0x8c>
+    4b34:	1143      	lrw      	r2, 0x200002d8	// 4bc0 <Card_Read_TasK+0x90>
+    4b36:	1184      	lrw      	r4, 0x20000418	// 4bc4 <Card_Read_TasK+0x94>
+    4b38:	9220      	ld.w      	r1, (r2, 0x0)
+    4b3a:	9560      	ld.w      	r3, (r5, 0x0)
+    4b3c:	60c6      	subu      	r3, r1
+    4b3e:	3163      	movi      	r1, 99
+    4b40:	64c4      	cmphs      	r1, r3
+    4b42:	0819      	bt      	0x4b74	// 4b74 <Card_Read_TasK+0x44>
+        scan_tick = SysTick_1ms;
+		
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read");
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4b44:	3119      	movi      	r1, 25
+        scan_tick = SysTick_1ms;
+    4b46:	9560      	ld.w      	r3, (r5, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4b48:	6050      	addu      	r1, r4
+    4b4a:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    4b4c:	b260      	st.w      	r3, (r2, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4b4e:	e3ffff73 	bsr      	0x4a34	// 4a34 <RC522_PcdRequest>
+    4b52:	3840      	cmpnei      	r0, 0
+    4b54:	3320      	movi      	r3, 32
+    4b56:	60d0      	addu      	r3, r4
+    4b58:	081f      	bt      	0x4b96	// 4b96 <Card_Read_TasK+0x66>
+            CardInfo.FailNum = 0x00;
+    4b5a:	3200      	movi      	r2, 0
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    4b5c:	103b      	lrw      	r1, 0x5e95	// 4bc8 <Card_Read_TasK+0x98>
+            CardInfo.FailNum = 0x00;
+    4b5e:	a346      	st.b      	r2, (r3, 0x6)
+            Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_SUCC");
+    4b60:	e3fffd30 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+			
+//			if(CardInfo.SuccNum >= 5)    //消抖
+			
+			
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4b64:	301b      	movi      	r0, 27
+    4b66:	6010      	addu      	r0, r4
+    4b68:	e3ffffaa 	bsr      	0x4abc	// 4abc <RC522_PcdAnticoll>
+    4b6c:	3840      	cmpnei      	r0, 0
+    4b6e:	080f      	bt      	0x4b8c	// 4b8c <Card_Read_TasK+0x5c>
+				
+				
+				CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    4b70:	3301      	movi      	r3, 1
+    4b72:	a467      	st.b      	r3, (r4, 0x7)
+            }
+        }
+		
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    4b74:	8467      	ld.b      	r3, (r4, 0x7)
+    4b76:	8446      	ld.b      	r2, (r4, 0x6)
+    4b78:	64ca      	cmpne      	r2, r3
+    4b7a:	0c08      	bf      	0x4b8a	// 4b8a <Card_Read_TasK+0x5a>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4b7c:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    4b7e:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4b80:	0818      	bt      	0x4bb0	// 4bb0 <Card_Read_TasK+0x80>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+    4b82:	1033      	lrw      	r1, 0x5ec8	// 4bcc <Card_Read_TasK+0x9c>
+    4b84:	3000      	movi      	r0, 0
+    4b86:	e3fffd1d 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+			CardInfo.reset_tick = SysTick_1ms;
+        }
+    }
+
+
+}
+    4b8a:	1492      	pop      	r4-r5, r15
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4b8c:	1031      	lrw      	r1, 0x5ea5	// 4bd0 <Card_Read_TasK+0xa0>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_FAILD");
+    4b8e:	3000      	movi      	r0, 0
+    4b90:	e3fffd18 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+    4b94:	07f0      	br      	0x4b74	// 4b74 <Card_Read_TasK+0x44>
+            if(CardInfo.FailNum >= 5)
+    4b96:	8346      	ld.b      	r2, (r3, 0x6)
+    4b98:	3a04      	cmphsi      	r2, 5
+    4b9a:	0c08      	bf      	0x4baa	// 4baa <Card_Read_TasK+0x7a>
+                CardInfo.FailNum = 0;
+    4b9c:	3200      	movi      	r2, 0
+    4b9e:	a346      	st.b      	r2, (r3, 0x6)
+				CardInfo.SuccNum = 0;
+    4ba0:	a347      	st.b      	r2, (r3, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    4ba2:	3300      	movi      	r3, 0
+    4ba4:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "BLOCK_READ_FAILD");
+    4ba6:	102c      	lrw      	r1, 0x5eb7	// 4bd4 <Card_Read_TasK+0xa4>
+    4ba8:	07f3      	br      	0x4b8e	// 4b8e <Card_Read_TasK+0x5e>
+                CardInfo.FailNum++;
+    4baa:	2200      	addi      	r2, 1
+    4bac:	a346      	st.b      	r2, (r3, 0x6)
+    4bae:	07e3      	br      	0x4b74	// 4b74 <Card_Read_TasK+0x44>
+            SysTick_1ms = Card_Tick;
+    4bb0:	106a      	lrw      	r3, 0x200000a4	// 4bd8 <Card_Read_TasK+0xa8>
+    4bb2:	9360      	ld.w      	r3, (r3, 0x0)
+    4bb4:	b560      	st.w      	r3, (r5, 0x0)
+			CardInfo.reset_tick = SysTick_1ms;
+    4bb6:	9560      	ld.w      	r3, (r5, 0x0)
+    4bb8:	b46c      	st.w      	r3, (r4, 0x30)
+}
+    4bba:	07e8      	br      	0x4b8a	// 4b8a <Card_Read_TasK+0x5a>
+    4bbc:	200000b8 	.long	0x200000b8
+    4bc0:	200002d8 	.long	0x200002d8
+    4bc4:	20000418 	.long	0x20000418
+    4bc8:	00005e95 	.long	0x00005e95
+    4bcc:	00005ec8 	.long	0x00005ec8
+    4bd0:	00005ea5 	.long	0x00005ea5
+    4bd4:	00005eb7 	.long	0x00005eb7
+    4bd8:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.Detect_SPI_task:
+
+00004bdc <Detect_SPI_task>:
+
+void Detect_SPI_task(void){
+    4bdc:	14d1      	push      	r4, r15
+
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    4bde:	1095      	lrw      	r4, 0x20000418	// 4c30 <Detect_SPI_task+0x54>
+    4be0:	3320      	movi      	r3, 32
+    4be2:	60d0      	addu      	r3, r4
+    4be4:	8368      	ld.b      	r3, (r3, 0x8)
+    4be6:	3b41      	cmpnei      	r3, 1
+    4be8:	0810      	bt      	0x4c08	// 4c08 <Detect_SPI_task+0x2c>
+		if (SysTick_1ms - CardInfo.Reset_Tick >= 1000) {
+    4bea:	1053      	lrw      	r2, 0x200000b8	// 4c34 <Detect_SPI_task+0x58>
+    4bec:	9260      	ld.w      	r3, (r2, 0x0)
+    4bee:	942b      	ld.w      	r1, (r4, 0x2c)
+    4bf0:	60c6      	subu      	r3, r1
+    4bf2:	1032      	lrw      	r1, 0x3e7	// 4c38 <Detect_SPI_task+0x5c>
+    4bf4:	64c4      	cmphs      	r1, r3
+    4bf6:	0809      	bt      	0x4c08	// 4c08 <Detect_SPI_task+0x2c>
+			CardInfo.Reset_Tick = SysTick_1ms;
+    4bf8:	9260      	ld.w      	r3, (r2, 0x0)
+    4bfa:	b46b      	st.w      	r3, (r4, 0x2c)
+			RC522_Reset();
+    4bfc:	e3fffde6 	bsr      	0x47c8	// 47c8 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "SPI INIT");
+    4c00:	102f      	lrw      	r1, 0x5ed7	// 4c3c <Detect_SPI_task+0x60>
+    4c02:	3000      	movi      	r0, 0
+    4c04:	e3fffcde 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+	}
+	
+	//每10s读不到卡便复位并初始化rc522
+	if((CardInfo.BlockSucc == BLOCK_READ_FAILD)&&(SysTick_1ms - CardInfo.reset_tick>= 10000)) {
+    4c08:	8467      	ld.b      	r3, (r4, 0x7)
+    4c0a:	3b40      	cmpnei      	r3, 0
+    4c0c:	0810      	bt      	0x4c2c	// 4c2c <Detect_SPI_task+0x50>
+    4c0e:	104a      	lrw      	r2, 0x200000b8	// 4c34 <Detect_SPI_task+0x58>
+    4c10:	9260      	ld.w      	r3, (r2, 0x0)
+    4c12:	942c      	ld.w      	r1, (r4, 0x30)
+    4c14:	60c6      	subu      	r3, r1
+    4c16:	102b      	lrw      	r1, 0x270f	// 4c40 <Detect_SPI_task+0x64>
+    4c18:	64c4      	cmphs      	r1, r3
+    4c1a:	0809      	bt      	0x4c2c	// 4c2c <Detect_SPI_task+0x50>
+		CardInfo.reset_tick = SysTick_1ms;
+    4c1c:	9260      	ld.w      	r3, (r2, 0x0)
+    4c1e:	b46c      	st.w      	r3, (r4, 0x30)
+		RC522_Reset();
+    4c20:	e3fffdd4 	bsr      	0x47c8	// 47c8 <RC522_Reset>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "not read for 10 seconds");
+    4c24:	1028      	lrw      	r1, 0x5ee0	// 4c44 <Detect_SPI_task+0x68>
+    4c26:	3000      	movi      	r0, 0
+    4c28:	e3fffccc 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+	}
+
+}
+    4c2c:	1491      	pop      	r4, r15
+    4c2e:	0000      	bkpt
+    4c30:	20000418 	.long	0x20000418
+    4c34:	200000b8 	.long	0x200000b8
+    4c38:	000003e7 	.long	0x000003e7
+    4c3c:	00005ed7 	.long	0x00005ed7
+    4c40:	0000270f 	.long	0x0000270f
+    4c44:	00005ee0 	.long	0x00005ee0
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00004c48 <RLY_Light_Ctrl>:
+}
+
+volatile U32_T Tim_Flag = 0;
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+{
+    4c48:	14d0      	push      	r15
+	if(state == 0x01)
+    4c4a:	3841      	cmpnei      	r0, 1
+    4c4c:	0807      	bt      	0x4c5a	// 4c5a <RLY_Light_Ctrl+0x12>
+	{
+//		CTRL_RLY_ON;
+		GPIO_Write_High(GPIOA0,13);
+    4c4e:	106e      	lrw      	r3, 0x2000004c	// 4c84 <RLY_Light_Ctrl+0x3c>
+    4c50:	310d      	movi      	r1, 13
+    4c52:	9300      	ld.w      	r0, (r3, 0x0)
+    4c54:	e3fff37d 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		else{
+			GPIO_Write_Low(GPIOA0,13);
+		}
+//		CTRL_RLY_OFF;
+	}
+}
+    4c58:	1490      	pop      	r15
+	else if(state == 0x00){
+    4c5a:	3840      	cmpnei      	r0, 0
+    4c5c:	0bfe      	bt      	0x4c58	// 4c58 <RLY_Light_Ctrl+0x10>
+		if(CardInfo.CTR_PLYFlag == 1)
+    4c5e:	106b      	lrw      	r3, 0x20000418	// 4c88 <RLY_Light_Ctrl+0x40>
+    4c60:	8360      	ld.b      	r3, (r3, 0x0)
+    4c62:	3b41      	cmpnei      	r3, 1
+    4c64:	0809      	bt      	0x4c76	// 4c76 <RLY_Light_Ctrl+0x2e>
+			if(SysTick_1ms - Tim_Flag >= CTR_State_Tick)
+    4c66:	106a      	lrw      	r3, 0x200000b8	// 4c8c <RLY_Light_Ctrl+0x44>
+    4c68:	104a      	lrw      	r2, 0x200002dc	// 4c90 <RLY_Light_Ctrl+0x48>
+    4c6a:	9360      	ld.w      	r3, (r3, 0x0)
+    4c6c:	9240      	ld.w      	r2, (r2, 0x0)
+    4c6e:	60ca      	subu      	r3, r2
+    4c70:	1049      	lrw      	r2, 0x752f	// 4c94 <RLY_Light_Ctrl+0x4c>
+    4c72:	64c8      	cmphs      	r2, r3
+    4c74:	0bf2      	bt      	0x4c58	// 4c58 <RLY_Light_Ctrl+0x10>
+				GPIO_Write_Low(GPIOA0,13);
+    4c76:	1064      	lrw      	r3, 0x2000004c	// 4c84 <RLY_Light_Ctrl+0x3c>
+    4c78:	310d      	movi      	r1, 13
+    4c7a:	9300      	ld.w      	r0, (r3, 0x0)
+    4c7c:	e3fff36d 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    4c80:	07ec      	br      	0x4c58	// 4c58 <RLY_Light_Ctrl+0x10>
+    4c82:	0000      	bkpt
+    4c84:	2000004c 	.long	0x2000004c
+    4c88:	20000418 	.long	0x20000418
+    4c8c:	200000b8 	.long	0x200000b8
+    4c90:	200002dc 	.long	0x200002dc
+    4c94:	0000752f 	.long	0x0000752f
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00004c98 <KEY1_LONG_PRESS_RELEASE_Handler>:
+}
+
+
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    4c98:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    4c9a:	1033      	lrw      	r1, 0x5ef8	// 4ce4 <KEY1_LONG_PRESS_RELEASE_Handler+0x4c>
+    4c9c:	3000      	movi      	r0, 0
+    4c9e:	e3fffc91 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4ca2:	1072      	lrw      	r3, 0x20000418	// 4ce8 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    4ca4:	8367      	ld.b      	r3, (r3, 0x7)
+    4ca6:	3b40      	cmpnei      	r3, 0
+    4ca8:	1091      	lrw      	r4, 0x20000484	// 4cec <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    4caa:	0819      	bt      	0x4cdc	// 4cdc <KEY1_LONG_PRESS_RELEASE_Handler+0x44>
+	{
+		if(READ_RLY_STATE != 0x00)
+    4cac:	1071      	lrw      	r3, 0x2000004c	// 4cf0 <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    4cae:	3100      	movi      	r1, 0
+    4cb0:	9300      	ld.w      	r0, (r3, 0x0)
+    4cb2:	e3fff369 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4cb6:	3840      	cmpnei      	r0, 0
+    4cb8:	0c08      	bf      	0x4cc8	// 4cc8 <KEY1_LONG_PRESS_RELEASE_Handler+0x30>
+		{
+			RLY_Light_Ctrl(1);
+    4cba:	3001      	movi      	r0, 1
+    4cbc:	e3ffffc6 	bsr      	0x4c48	// 4c48 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4cc0:	102d      	lrw      	r1, 0x5f13	// 4cf4 <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    4cc2:	3000      	movi      	r0, 0
+    4cc4:	e3fffc7e 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    4cc8:	106c      	lrw      	r3, 0x200000b8	// 4cf8 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    4cca:	104d      	lrw      	r2, 0x20000485	// 4cfc <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    4ccc:	9360      	ld.w      	r3, (r3, 0x0)
+    4cce:	4b28      	lsri      	r1, r3, 8
+    4cd0:	a461      	st.b      	r3, (r4, 0x1)
+    4cd2:	a221      	st.b      	r1, (r2, 0x1)
+    4cd4:	4b30      	lsri      	r1, r3, 16
+    4cd6:	4b78      	lsri      	r3, r3, 24
+    4cd8:	a222      	st.b      	r1, (r2, 0x2)
+    4cda:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    4cdc:	3302      	movi      	r3, 2
+    4cde:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4ce0:	1491      	pop      	r4, r15
+    4ce2:	0000      	bkpt
+    4ce4:	00005ef8 	.long	0x00005ef8
+    4ce8:	20000418 	.long	0x20000418
+    4cec:	20000484 	.long	0x20000484
+    4cf0:	2000004c 	.long	0x2000004c
+    4cf4:	00005f13 	.long	0x00005f13
+    4cf8:	200000b8 	.long	0x200000b8
+    4cfc:	20000485 	.long	0x20000485
+
+Disassembly of section .text.LogicCtrl_Init:
+
+00004d00 <LogicCtrl_Init>:
+{
+    4d00:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    4d02:	108b      	lrw      	r4, 0x20000048	// 4d2c <LogicCtrl_Init+0x2c>
+    4d04:	3200      	movi      	r2, 0
+    4d06:	9400      	ld.w      	r0, (r4, 0x0)
+    4d08:	3100      	movi      	r1, 0
+    4d0a:	e3fff2a1 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_CARD_OUT;
+    4d0e:	9400      	ld.w      	r0, (r4, 0x0)
+    4d10:	3100      	movi      	r1, 0
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4d12:	1088      	lrw      	r4, 0x2000004c	// 4d30 <LogicCtrl_Init+0x30>
+	CTRL_CARD_OUT;
+    4d14:	e3fff321 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4d18:	3200      	movi      	r2, 0
+    4d1a:	9400      	ld.w      	r0, (r4, 0x0)
+    4d1c:	310c      	movi      	r1, 12
+    4d1e:	e3fff297 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4d22:	9400      	ld.w      	r0, (r4, 0x0)
+    4d24:	310c      	movi      	r1, 12
+    4d26:	e3fff318 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    4d2a:	1491      	pop      	r4, r15
+    4d2c:	20000048 	.long	0x20000048
+    4d30:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+00004d34 <LogicCtrl_Task>:
+{
+    4d34:	14d2      	push      	r4-r5, r15
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 0))
+    4d36:	1076      	lrw      	r3, 0x20000418	// 4d8c <LogicCtrl_Task+0x58>
+    4d38:	8347      	ld.b      	r2, (r3, 0x7)
+    4d3a:	3a41      	cmpnei      	r2, 1
+    4d3c:	6d0f      	mov      	r4, r3
+    4d3e:	0816      	bt      	0x4d6a	// 4d6a <LogicCtrl_Task+0x36>
+    4d40:	10b4      	lrw      	r5, 0x20000048	// 4d90 <LogicCtrl_Task+0x5c>
+    4d42:	3100      	movi      	r1, 0
+    4d44:	9500      	ld.w      	r0, (r5, 0x0)
+    4d46:	e3fff31f 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4d4a:	3840      	cmpnei      	r0, 0
+    4d4c:	080f      	bt      	0x4d6a	// 4d6a <LogicCtrl_Task+0x36>
+		CTRL_CARD_IN;
+    4d4e:	9500      	ld.w      	r0, (r5, 0x0)
+    4d50:	3100      	movi      	r1, 0
+    4d52:	e3fff2fe 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4d56:	9500      	ld.w      	r0, (r5, 0x0)
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4d58:	3100      	movi      	r1, 0
+    4d5a:	e3fff315 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4d5e:	6c83      	mov      	r2, r0
+    4d60:	102d      	lrw      	r1, 0x5f25	// 4d94 <LogicCtrl_Task+0x60>
+    4d62:	3000      	movi      	r0, 0
+    4d64:	e3fffc2e 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+}
+    4d68:	1492      	pop      	r4-r5, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 1))
+    4d6a:	8467      	ld.b      	r3, (r4, 0x7)
+    4d6c:	3b40      	cmpnei      	r3, 0
+    4d6e:	0bfd      	bt      	0x4d68	// 4d68 <LogicCtrl_Task+0x34>
+    4d70:	1088      	lrw      	r4, 0x20000048	// 4d90 <LogicCtrl_Task+0x5c>
+    4d72:	3100      	movi      	r1, 0
+    4d74:	9400      	ld.w      	r0, (r4, 0x0)
+    4d76:	e3fff307 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4d7a:	3841      	cmpnei      	r0, 1
+    4d7c:	0bf6      	bt      	0x4d68	// 4d68 <LogicCtrl_Task+0x34>
+		CTRL_CARD_OUT;
+    4d7e:	9400      	ld.w      	r0, (r4, 0x0)
+    4d80:	3100      	movi      	r1, 0
+    4d82:	e3fff2ea 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card Pin State:%d",READ_CARD_STATE);
+    4d86:	9400      	ld.w      	r0, (r4, 0x0)
+    4d88:	07e8      	br      	0x4d58	// 4d58 <LogicCtrl_Task+0x24>
+    4d8a:	0000      	bkpt
+    4d8c:	20000418 	.long	0x20000418
+    4d90:	20000048 	.long	0x20000048
+    4d94:	00005f25 	.long	0x00005f25
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00004d98 <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    4d98:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOA0,RLY_OUT_PIN,Output);			
+    4d9a:	109c      	lrw      	r4, 0x2000004c	// 4e08 <LogicCtrl_NoRF_Init+0x70>
+    4d9c:	3200      	movi      	r2, 0
+    4d9e:	9400      	ld.w      	r0, (r4, 0x0)
+    4da0:	3100      	movi      	r1, 0
+    4da2:	e3fff255 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_RLY_OFF;
+    4da6:	9400      	ld.w      	r0, (r4, 0x0)
+    4da8:	3100      	movi      	r1, 0
+    4daa:	e3fff2d2 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    4dae:	3209      	movi      	r2, 9
+    4db0:	3100      	movi      	r1, 0
+    4db2:	1017      	lrw      	r0, 0x20000484	// 4e0c <LogicCtrl_NoRF_Init+0x74>
+    4db4:	e3ffe634 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    4db8:	9400      	ld.w      	r0, (r4, 0x0)
+    4dba:	3201      	movi      	r2, 1
+    4dbc:	3101      	movi      	r1, 1
+    4dbe:	e3fff247 	bsr      	0x324c	// 324c <GPIO_Init>
+	
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4dc2:	3200      	movi      	r2, 0
+    4dc4:	9400      	ld.w      	r0, (r4, 0x0)
+    4dc6:	310c      	movi      	r1, 12
+    4dc8:	e3fff242 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4dcc:	9400      	ld.w      	r0, (r4, 0x0)
+    4dce:	310c      	movi      	r1, 12
+    4dd0:	e3fff2c3 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	
+	
+	GPIO_Init(GPIOA0,13,Output);			//继电器，
+    4dd4:	3200      	movi      	r2, 0
+    4dd6:	9400      	ld.w      	r0, (r4, 0x0)
+    4dd8:	310d      	movi      	r1, 13
+    4dda:	e3fff239 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,13);			//初始拉低断开，插卡拉高打开
+    4dde:	9400      	ld.w      	r0, (r4, 0x0)
+    4de0:	310d      	movi      	r1, 13
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4de2:	108c      	lrw      	r4, 0x20000454	// 4e10 <LogicCtrl_NoRF_Init+0x78>
+	GPIO_Write_Low(GPIOA0,13);			//初始拉低断开，插卡拉高打开
+    4de4:	e3fff2b9 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4de8:	3301      	movi      	r3, 1
+    4dea:	6c13      	mov      	r0, r4
+    4dec:	3200      	movi      	r2, 0
+    4dee:	102a      	lrw      	r1, 0x51b0	// 4e14 <LogicCtrl_NoRF_Init+0x7c>
+    4df0:	e000010e 	bsr      	0x500c	// 500c <button_init>
+	
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    4df4:	1049      	lrw      	r2, 0x4c98	// 4e18 <LogicCtrl_NoRF_Init+0x80>
+    4df6:	3107      	movi      	r1, 7
+    4df8:	6c13      	mov      	r0, r4
+    4dfa:	e0000126 	bsr      	0x5046	// 5046 <button_attach>
+	button_start(&KEY1);
+    4dfe:	6c13      	mov      	r0, r4
+    4e00:	e00001b8 	bsr      	0x5170	// 5170 <button_start>
+}
+    4e04:	1491      	pop      	r4, r15
+    4e06:	0000      	bkpt
+    4e08:	2000004c 	.long	0x2000004c
+    4e0c:	20000484 	.long	0x20000484
+    4e10:	20000454 	.long	0x20000454
+    4e14:	000051b0 	.long	0x000051b0
+    4e18:	00004c98 	.long	0x00004c98
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+00004e1c <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    4e1c:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    4e1e:	3301      	movi      	r3, 1
+    4e20:	11c9      	lrw      	r6, 0x20000418	// 4ec4 <LogicCtrl_NoRF_Task+0xa8>
+	
+	if(SysTick_1ms - test_tick > 5)
+    4e22:	118a      	lrw      	r4, 0x200000b8	// 4ec8 <LogicCtrl_NoRF_Task+0xac>
+    4e24:	11aa      	lrw      	r5, 0x200002dc	// 4ecc <LogicCtrl_NoRF_Task+0xb0>
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    4e26:	a660      	st.b      	r3, (r6, 0x0)
+	if(SysTick_1ms - test_tick > 5)
+    4e28:	9541      	ld.w      	r2, (r5, 0x4)
+    4e2a:	9460      	ld.w      	r3, (r4, 0x0)
+    4e2c:	60ca      	subu      	r3, r2
+    4e2e:	3b05      	cmphsi      	r3, 6
+    4e30:	0c05      	bf      	0x4e3a	// 4e3a <LogicCtrl_NoRF_Task+0x1e>
+	{
+		test_tick = SysTick_1ms;
+    4e32:	9460      	ld.w      	r3, (r4, 0x0)
+    4e34:	b561      	st.w      	r3, (r5, 0x4)
+		button_ticks();
+    4e36:	e00001af 	bsr      	0x5194	// 5194 <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    4e3a:	8667      	ld.b      	r3, (r6, 0x7)
+    4e3c:	3b41      	cmpnei      	r3, 1
+    4e3e:	0830      	bt      	0x4e9e	// 4e9e <LogicCtrl_NoRF_Task+0x82>
+	{
+		RLY_Light_Ctrl(1);
+    4e40:	3001      	movi      	r0, 1
+    4e42:	e3ffff03 	bsr      	0x4c48	// 4c48 <RLY_Light_Ctrl>
+		card_tick = SysTick_1ms;
+    4e46:	9460      	ld.w      	r3, (r4, 0x0)
+    4e48:	b562      	st.w      	r3, (r5, 0x8)
+		dm_in.DM_State = 0x00;
+    4e4a:	3200      	movi      	r2, 0
+    4e4c:	1161      	lrw      	r3, 0x20000484	// 4ed0 <LogicCtrl_NoRF_Task+0xb4>
+    4e4e:	a340      	st.b      	r2, (r3, 0x0)
+		card_tick = SysTick_1ms;
+		RLY_Light_Ctrl(0);
+		 
+	}
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4e50:	8667      	ld.b      	r3, (r6, 0x7)
+    4e52:	3b40      	cmpnei      	r3, 0
+    4e54:	0824      	bt      	0x4e9c	// 4e9c <LogicCtrl_NoRF_Task+0x80>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    4e56:	107f      	lrw      	r3, 0x20000484	// 4ed0 <LogicCtrl_NoRF_Task+0xb4>
+    4e58:	8340      	ld.b      	r2, (r3, 0x0)
+    4e5a:	3a42      	cmpnei      	r2, 2
+    4e5c:	0820      	bt      	0x4e9c	// 4e9c <LogicCtrl_NoRF_Task+0x80>
+    4e5e:	8322      	ld.b      	r1, (r3, 0x2)
+    4e60:	8341      	ld.b      	r2, (r3, 0x1)
+    4e62:	4128      	lsli      	r1, r1, 8
+    4e64:	6c48      	or      	r1, r2
+    4e66:	8343      	ld.b      	r2, (r3, 0x3)
+    4e68:	4250      	lsli      	r2, r2, 16
+    4e6a:	6c48      	or      	r1, r2
+    4e6c:	8344      	ld.b      	r2, (r3, 0x4)
+    4e6e:	4258      	lsli      	r2, r2, 24
+    4e70:	6c84      	or      	r2, r1
+    4e72:	9400      	ld.w      	r0, (r4, 0x0)
+    4e74:	600a      	subu      	r0, r2
+    4e76:	1058      	lrw      	r2, 0x752f	// 4ed4 <LogicCtrl_NoRF_Task+0xb8>
+    4e78:	6408      	cmphs      	r2, r0
+    4e7a:	0811      	bt      	0x4e9c	// 4e9c <LogicCtrl_NoRF_Task+0x80>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    4e7c:	9440      	ld.w      	r2, (r4, 0x0)
+    4e7e:	5b22      	addi      	r1, r3, 1
+    4e80:	a341      	st.b      	r2, (r3, 0x1)
+    4e82:	4a68      	lsri      	r3, r2, 8
+    4e84:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    4e86:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    4e88:	4a70      	lsri      	r3, r2, 16
+    4e8a:	4a58      	lsri      	r2, r2, 24
+    4e8c:	a162      	st.b      	r3, (r1, 0x2)
+    4e8e:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    4e90:	e3fffedc 	bsr      	0x4c48	// 4c48 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    4e94:	1031      	lrw      	r1, 0x5f4a	// 4ed8 <LogicCtrl_NoRF_Task+0xbc>
+    4e96:	3000      	movi      	r0, 0
+    4e98:	e3fffb94 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+		}
+	}
+}
+    4e9c:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= CTR_State_Tick))
+    4e9e:	3b40      	cmpnei      	r3, 0
+    4ea0:	0bd8      	bt      	0x4e50	// 4e50 <LogicCtrl_NoRF_Task+0x34>
+    4ea2:	106c      	lrw      	r3, 0x20000484	// 4ed0 <LogicCtrl_NoRF_Task+0xb4>
+    4ea4:	8360      	ld.b      	r3, (r3, 0x0)
+    4ea6:	3b40      	cmpnei      	r3, 0
+    4ea8:	0bd4      	bt      	0x4e50	// 4e50 <LogicCtrl_NoRF_Task+0x34>
+    4eaa:	9542      	ld.w      	r2, (r5, 0x8)
+    4eac:	9460      	ld.w      	r3, (r4, 0x0)
+    4eae:	60ca      	subu      	r3, r2
+    4eb0:	1049      	lrw      	r2, 0x752f	// 4ed4 <LogicCtrl_NoRF_Task+0xb8>
+    4eb2:	64c8      	cmphs      	r2, r3
+    4eb4:	0bce      	bt      	0x4e50	// 4e50 <LogicCtrl_NoRF_Task+0x34>
+		card_tick = SysTick_1ms;
+    4eb6:	9460      	ld.w      	r3, (r4, 0x0)
+		RLY_Light_Ctrl(0);
+    4eb8:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    4eba:	b562      	st.w      	r3, (r5, 0x8)
+		RLY_Light_Ctrl(0);
+    4ebc:	e3fffec6 	bsr      	0x4c48	// 4c48 <RLY_Light_Ctrl>
+    4ec0:	07c8      	br      	0x4e50	// 4e50 <LogicCtrl_NoRF_Task+0x34>
+    4ec2:	0000      	bkpt
+    4ec4:	20000418 	.long	0x20000418
+    4ec8:	200000b8 	.long	0x200000b8
+    4ecc:	200002dc 	.long	0x200002dc
+    4ed0:	20000484 	.long	0x20000484
+    4ed4:	0000752f 	.long	0x0000752f
+    4ed8:	00005f4a 	.long	0x00005f4a
+
+Disassembly of section .text.BackLight_Task:
+
+00004edc <BackLight_Task>:
+
+void BackLight_Task(void){
+	if (CardInfo.BlockSucc == BLOCK_READ_SUCC) 
+    4edc:	1067      	lrw      	r3, 0x20000418	// 4ef8 <BackLight_Task+0x1c>
+    4ede:	8367      	ld.b      	r3, (r3, 0x7)
+    4ee0:	3b41      	cmpnei      	r3, 1
+    4ee2:	1067      	lrw      	r3, 0x20000024	// 4efc <BackLight_Task+0x20>
+    4ee4:	0805      	bt      	0x4eee	// 4eee <BackLight_Task+0x12>
+        GPT0->CMPA = 0;
+    4ee6:	9360      	ld.w      	r3, (r3, 0x0)
+    4ee8:	3200      	movi      	r2, 0
+    4eea:	b34b      	st.w      	r2, (r3, 0x2c)
+		
+	}else 
+	{
+		Ctrl_Backlight(1);//开背光
+	}
+}
+    4eec:	783c      	jmp      	r15
+        GPT0->CMPA = 2000;
+    4eee:	9340      	ld.w      	r2, (r3, 0x0)
+    4ef0:	33fa      	movi      	r3, 250
+    4ef2:	4363      	lsli      	r3, r3, 3
+    4ef4:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    4ef6:	07fb      	br      	0x4eec	// 4eec <BackLight_Task+0x10>
+    4ef8:	20000418 	.long	0x20000418
+    4efc:	20000024 	.long	0x20000024
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+00004f00 <Detect_WIFI_Task>:
+//检测有无WIFI模组，判断10次，每次间隔10ms
+void Detect_WIFI_Task(void){
+    4f00:	14d1      	push      	r4, r15
+
+	if (finish_flag == 1) return;
+    4f02:	107c      	lrw      	r3, 0x200000a2	// 4f70 <Detect_WIFI_Task+0x70>
+    4f04:	8340      	ld.b      	r2, (r3, 0x0)
+    4f06:	3a41      	cmpnei      	r2, 1
+    4f08:	0c1c      	bf      	0x4f40	// 4f40 <Detect_WIFI_Task+0x40>
+	
+	if (detect_count <10) {
+    4f0a:	109b      	lrw      	r4, 0x200000ac	// 4f74 <Detect_WIFI_Task+0x74>
+    4f0c:	8440      	ld.b      	r2, (r4, 0x0)
+    4f0e:	3a09      	cmphsi      	r2, 10
+    4f10:	081c      	bt      	0x4f48	// 4f48 <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    4f12:	103a      	lrw      	r1, 0x200000b8	// 4f78 <Detect_WIFI_Task+0x78>
+    4f14:	105a      	lrw      	r2, 0x200000a8	// 4f7c <Detect_WIFI_Task+0x7c>
+    4f16:	9160      	ld.w      	r3, (r1, 0x0)
+    4f18:	9200      	ld.w      	r0, (r2, 0x0)
+    4f1a:	60c2      	subu      	r3, r0
+    4f1c:	3b09      	cmphsi      	r3, 10
+    4f1e:	0c11      	bf      	0x4f40	// 4f40 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    4f20:	9160      	ld.w      	r3, (r1, 0x0)
+    4f22:	b260      	st.w      	r3, (r2, 0x0)
+			
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    4f24:	3102      	movi      	r1, 2
+    4f26:	1077      	lrw      	r3, 0x20000048	// 4f80 <Detect_WIFI_Task+0x80>
+    4f28:	9300      	ld.w      	r0, (r3, 0x0)
+    4f2a:	e3fff225 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    4f2e:	1076      	lrw      	r3, 0x200000a0	// 4f84 <Detect_WIFI_Task+0x84>
+    4f30:	a300      	st.b      	r0, (r3, 0x0)
+			
+			if (last_state != rf_exist) {
+    4f32:	1076      	lrw      	r3, 0x200000a1	// 4f88 <Detect_WIFI_Task+0x88>
+    4f34:	8340      	ld.b      	r2, (r3, 0x0)
+    4f36:	640a      	cmpne      	r2, r0
+    4f38:	0c05      	bf      	0x4f42	// 4f42 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    4f3a:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    4f3c:	3300      	movi      	r3, 0
+			}else {
+				detect_count++;
+    4f3e:	a460      	st.b      	r3, (r4, 0x0)
+		{
+			LogicCtrl_Init();   
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+		}
+	}
+}
+    4f40:	1491      	pop      	r4, r15
+				detect_count++;
+    4f42:	8460      	ld.b      	r3, (r4, 0x0)
+    4f44:	2300      	addi      	r3, 1
+    4f46:	07fc      	br      	0x4f3e	// 4f3e <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    4f48:	3201      	movi      	r2, 1
+    4f4a:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    4f4c:	106e      	lrw      	r3, 0x200000a0	// 4f84 <Detect_WIFI_Task+0x84>
+    4f4e:	8360      	ld.b      	r3, (r3, 0x0)
+    4f50:	3b41      	cmpnei      	r3, 1
+    4f52:	0808      	bt      	0x4f62	// 4f62 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    4f54:	e3ffff22 	bsr      	0x4d98	// 4d98 <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    4f58:	102d      	lrw      	r1, 0x5f5b	// 4f8c <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    4f5a:	3000      	movi      	r0, 0
+    4f5c:	e3fffb32 	bsr      	0x45c0	// 45c0 <Dbg_Println>
+    4f60:	07f0      	br      	0x4f40	// 4f40 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    4f62:	3b40      	cmpnei      	r3, 0
+    4f64:	0bee      	bt      	0x4f40	// 4f40 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    4f66:	e3fffecd 	bsr      	0x4d00	// 4d00 <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    4f6a:	102a      	lrw      	r1, 0x5f5d	// 4f90 <Detect_WIFI_Task+0x90>
+    4f6c:	07f7      	br      	0x4f5a	// 4f5a <Detect_WIFI_Task+0x5a>
+    4f6e:	0000      	bkpt
+    4f70:	200000a2 	.long	0x200000a2
+    4f74:	200000ac 	.long	0x200000ac
+    4f78:	200000b8 	.long	0x200000b8
+    4f7c:	200000a8 	.long	0x200000a8
+    4f80:	20000048 	.long	0x20000048
+    4f84:	200000a0 	.long	0x200000a0
+    4f88:	200000a1 	.long	0x200000a1
+    4f8c:	00005f5b 	.long	0x00005f5b
+    4f90:	00005f5d 	.long	0x00005f5d
+
+Disassembly of section .text.Led_Task:
+
+00004f94 <Led_Task>:
+	
+}
+
+
+
+void Led_Task(void){
+    4f94:	14d1      	push      	r4, r15
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    4f96:	1079      	lrw      	r3, 0x20000418	// 4ff8 <Led_Task+0x64>
+    4f98:	8347      	ld.b      	r2, (r3, 0x7)
+    4f9a:	3a41      	cmpnei      	r2, 1
+    4f9c:	0807      	bt      	0x4faa	// 4faa <Led_Task+0x16>
+	{
+		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4f9e:	1078      	lrw      	r3, 0x2000004c	// 4ffc <Led_Task+0x68>
+    4fa0:	310c      	movi      	r1, 12
+    4fa2:	9300      	ld.w      	r0, (r3, 0x0)
+    4fa4:	e3fff1d9 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+				dm_in.DM_Led_Tick = SysTick_1ms;
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+			}
+		}
+	}
+}
+    4fa8:	1491      	pop      	r4, r15
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    4faa:	231f      	addi      	r3, 32
+    4fac:	8368      	ld.b      	r3, (r3, 0x8)
+    4fae:	3b41      	cmpnei      	r3, 1
+    4fb0:	1074      	lrw      	r3, 0x20000484	// 5000 <Led_Task+0x6c>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    4fb2:	8326      	ld.b      	r1, (r3, 0x6)
+    4fb4:	8345      	ld.b      	r2, (r3, 0x5)
+    4fb6:	4128      	lsli      	r1, r1, 8
+    4fb8:	6c48      	or      	r1, r2
+    4fba:	8347      	ld.b      	r2, (r3, 0x7)
+    4fbc:	4250      	lsli      	r2, r2, 16
+    4fbe:	6c48      	or      	r1, r2
+    4fc0:	8348      	ld.b      	r2, (r3, 0x8)
+    4fc2:	1011      	lrw      	r0, 0x200000b8	// 5004 <Led_Task+0x70>
+    4fc4:	4258      	lsli      	r2, r2, 24
+    4fc6:	9080      	ld.w      	r4, (r0, 0x0)
+    4fc8:	6c84      	or      	r2, r1
+    4fca:	610a      	subu      	r4, r2
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    4fcc:	0813      	bt      	0x4ff2	// 4ff2 <Led_Task+0x5e>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    4fce:	3263      	movi      	r2, 99
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    4fd0:	6508      	cmphs      	r2, r4
+    4fd2:	0beb      	bt      	0x4fa8	// 4fa8 <Led_Task+0x14>
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    4fd4:	9040      	ld.w      	r2, (r0, 0x0)
+    4fd6:	5b32      	addi      	r1, r3, 5
+    4fd8:	a345      	st.b      	r2, (r3, 0x5)
+    4fda:	4a68      	lsri      	r3, r2, 8
+    4fdc:	a161      	st.b      	r3, (r1, 0x1)
+    4fde:	4a70      	lsri      	r3, r2, 16
+    4fe0:	a162      	st.b      	r3, (r1, 0x2)
+    4fe2:	4a58      	lsri      	r2, r2, 24
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    4fe4:	1066      	lrw      	r3, 0x2000004c	// 4ffc <Led_Task+0x68>
+    4fe6:	9300      	ld.w      	r0, (r3, 0x0)
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    4fe8:	a143      	st.b      	r2, (r1, 0x3)
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    4fea:	310c      	movi      	r1, 12
+    4fec:	e3fff1b9 	bsr      	0x335e	// 335e <GPIO_Reverse>
+}
+    4ff0:	07dc      	br      	0x4fa8	// 4fa8 <Led_Task+0x14>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    4ff2:	1046      	lrw      	r2, 0x1f3	// 5008 <Led_Task+0x74>
+    4ff4:	07ee      	br      	0x4fd0	// 4fd0 <Led_Task+0x3c>
+    4ff6:	0000      	bkpt
+    4ff8:	20000418 	.long	0x20000418
+    4ffc:	2000004c 	.long	0x2000004c
+    5000:	20000484 	.long	0x20000484
+    5004:	200000b8 	.long	0x200000b8
+    5008:	000001f3 	.long	0x000001f3
+
+Disassembly of section .text.button_init:
+
+0000500c <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    500c:	14d4      	push      	r4-r7, r15
+    500e:	6dc7      	mov      	r7, r1
+    5010:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    5012:	3100      	movi      	r1, 0
+    5014:	3230      	movi      	r2, 48
+{
+    5016:	6d03      	mov      	r4, r0
+    5018:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    501a:	e3ffe501 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    501e:	3300      	movi      	r3, 0
+    5020:	2b6f      	subi      	r3, 112
+    5022:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    5024:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    5026:	6c17      	mov      	r0, r5
+    5028:	7bdd      	jsr      	r7
+    502a:	8443      	ld.b      	r2, (r4, 0x3)
+    502c:	337f      	movi      	r3, 127
+    502e:	688c      	and      	r2, r3
+    5030:	4007      	lsli      	r0, r0, 7
+    5032:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    5034:	3201      	movi      	r2, 1
+    5036:	6988      	and      	r6, r2
+    5038:	7480      	zextb      	r2, r0
+    503a:	46c6      	lsli      	r6, r6, 6
+    503c:	3a86      	bclri      	r2, 6
+    503e:	6c98      	or      	r2, r6
+    5040:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    5042:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    5044:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+00005046 <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    5046:	2102      	addi      	r1, 3
+    5048:	4122      	lsli      	r1, r1, 2
+    504a:	6040      	addu      	r1, r0
+    504c:	b140      	st.w      	r2, (r1, 0x0)
+}
+    504e:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00005050 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    5050:	14d3      	push      	r4-r6, r15
+    5052:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    5054:	9462      	ld.w      	r3, (r4, 0x8)
+    5056:	8004      	ld.b      	r0, (r0, 0x4)
+    5058:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    505a:	8463      	ld.b      	r3, (r4, 0x3)
+    505c:	433d      	lsli      	r1, r3, 29
+    505e:	493d      	lsri      	r1, r1, 29
+    5060:	3940      	cmpnei      	r1, 0
+    5062:	0c04      	bf      	0x506a	// 506a <button_handler+0x1a>
+    5064:	8c40      	ld.h      	r2, (r4, 0x0)
+    5066:	2200      	addi      	r2, 1
+    5068:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    506a:	4b47      	lsri      	r2, r3, 7
+    506c:	640a      	cmpne      	r2, r0
+    506e:	0c21      	bf      	0x50b0	// 50b0 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    5070:	435a      	lsli      	r2, r3, 26
+    5072:	4a5d      	lsri      	r2, r2, 29
+    5074:	3507      	movi      	r5, 7
+    5076:	2200      	addi      	r2, 1
+    5078:	6894      	and      	r2, r5
+    507a:	7488      	zextb      	r2, r2
+    507c:	6948      	and      	r5, r2
+    507e:	45c3      	lsli      	r6, r5, 3
+    5080:	3538      	movi      	r5, 56
+    5082:	68d5      	andn      	r3, r5
+    5084:	6d8c      	or      	r6, r3
+    5086:	3a02      	cmphsi      	r2, 3
+    5088:	a4c3      	st.b      	r6, (r4, 0x3)
+    508a:	0c09      	bf      	0x509c	// 509c <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    508c:	4067      	lsli      	r3, r0, 7
+    508e:	327f      	movi      	r2, 127
+    5090:	8403      	ld.b      	r0, (r4, 0x3)
+    5092:	6808      	and      	r0, r2
+    5094:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    5096:	7400      	zextb      	r0, r0
+    5098:	6815      	andn      	r0, r5
+    509a:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    509c:	3941      	cmpnei      	r1, 1
+    509e:	0c2f      	bf      	0x50fc	// 50fc <button_handler+0xac>
+    50a0:	3940      	cmpnei      	r1, 0
+    50a2:	0c0b      	bf      	0x50b8	// 50b8 <button_handler+0x68>
+    50a4:	3945      	cmpnei      	r1, 5
+    50a6:	0c53      	bf      	0x514c	// 514c <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    50a8:	8463      	ld.b      	r3, (r4, 0x3)
+    50aa:	3207      	movi      	r2, 7
+    50ac:	68c9      	andn      	r3, r2
+    50ae:	0420      	br      	0x50ee	// 50ee <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    50b0:	3238      	movi      	r2, 56
+    50b2:	68c9      	andn      	r3, r2
+    50b4:	a463      	st.b      	r3, (r4, 0x3)
+    50b6:	07f3      	br      	0x509c	// 509c <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    50b8:	8463      	ld.b      	r3, (r4, 0x3)
+    50ba:	4359      	lsli      	r2, r3, 25
+    50bc:	4a5f      	lsri      	r2, r2, 31
+    50be:	4b67      	lsri      	r3, r3, 7
+    50c0:	648e      	cmpne      	r3, r2
+    50c2:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    50c4:	320f      	movi      	r2, 15
+    50c6:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    50c8:	0815      	bt      	0x50f2	// 50f2 <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    50ca:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    50cc:	9463      	ld.w      	r3, (r4, 0xc)
+    50ce:	3b40      	cmpnei      	r3, 0
+    50d0:	0c03      	bf      	0x50d6	// 50d6 <button_handler+0x86>
+    50d2:	6c13      	mov      	r0, r4
+    50d4:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    50d6:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    50d8:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    50da:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    50dc:	330f      	movi      	r3, 15
+    50de:	688d      	andn      	r2, r3
+    50e0:	3101      	movi      	r1, 1
+    50e2:	6c84      	or      	r2, r1
+    50e4:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    50e6:	8463      	ld.b      	r3, (r4, 0x3)
+    50e8:	3207      	movi      	r2, 7
+    50ea:	68c9      	andn      	r3, r2
+    50ec:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    50ee:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    50f0:	0405      	br      	0x50fa	// 50fa <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    50f2:	3200      	movi      	r2, 0
+    50f4:	2a6f      	subi      	r2, 112
+    50f6:	6cc8      	or      	r3, r2
+    50f8:	a462      	st.b      	r3, (r4, 0x2)
+}
+    50fa:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    50fc:	8463      	ld.b      	r3, (r4, 0x3)
+    50fe:	4359      	lsli      	r2, r3, 25
+    5100:	4a5f      	lsri      	r2, r2, 31
+    5102:	4b67      	lsri      	r3, r3, 7
+    5104:	648e      	cmpne      	r3, r2
+    5106:	0c0e      	bf      	0x5122	// 5122 <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    5108:	8462      	ld.b      	r3, (r4, 0x2)
+    510a:	320f      	movi      	r2, 15
+    510c:	68c8      	and      	r3, r2
+    510e:	3ba4      	bseti      	r3, 4
+    5110:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    5112:	9464      	ld.w      	r3, (r4, 0x10)
+    5114:	3b40      	cmpnei      	r3, 0
+    5116:	0c03      	bf      	0x511c	// 511c <button_handler+0xcc>
+    5118:	6c13      	mov      	r0, r4
+    511a:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    511c:	3300      	movi      	r3, 0
+    511e:	ac60      	st.h      	r3, (r4, 0x0)
+    5120:	07c4      	br      	0x50a8	// 50a8 <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    5122:	8c40      	ld.h      	r2, (r4, 0x0)
+    5124:	33c8      	movi      	r3, 200
+    5126:	648c      	cmphs      	r3, r2
+    5128:	0be9      	bt      	0x50fa	// 50fa <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    512a:	8462      	ld.b      	r3, (r4, 0x2)
+    512c:	320f      	movi      	r2, 15
+    512e:	68c8      	and      	r3, r2
+    5130:	3ba4      	bseti      	r3, 4
+    5132:	3ba6      	bseti      	r3, 6
+    5134:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    5136:	9468      	ld.w      	r3, (r4, 0x20)
+    5138:	3b40      	cmpnei      	r3, 0
+    513a:	0c03      	bf      	0x5140	// 5140 <button_handler+0xf0>
+    513c:	6c13      	mov      	r0, r4
+    513e:	7bcd      	jsr      	r3
+			handle->state = 5;
+    5140:	8463      	ld.b      	r3, (r4, 0x3)
+    5142:	3207      	movi      	r2, 7
+    5144:	68c9      	andn      	r3, r2
+    5146:	3ba0      	bseti      	r3, 0
+    5148:	3ba2      	bseti      	r3, 2
+    514a:	07d2      	br      	0x50ee	// 50ee <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    514c:	8463      	ld.b      	r3, (r4, 0x3)
+    514e:	4359      	lsli      	r2, r3, 25
+    5150:	4a5f      	lsri      	r2, r2, 31
+    5152:	4b67      	lsri      	r3, r3, 7
+    5154:	648e      	cmpne      	r3, r2
+    5156:	0fd2      	bf      	0x50fa	// 50fa <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    5158:	8462      	ld.b      	r3, (r4, 0x2)
+    515a:	320f      	movi      	r2, 15
+    515c:	68c8      	and      	r3, r2
+    515e:	3270      	movi      	r2, 112
+    5160:	6cc8      	or      	r3, r2
+    5162:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    5164:	946a      	ld.w      	r3, (r4, 0x28)
+    5166:	3b40      	cmpnei      	r3, 0
+    5168:	0fa0      	bf      	0x50a8	// 50a8 <button_handler+0x58>
+    516a:	6c13      	mov      	r0, r4
+    516c:	7bcd      	jsr      	r3
+    516e:	079d      	br      	0x50a8	// 50a8 <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00005170 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    5170:	1068      	lrw      	r3, 0x200002e8	// 5190 <button_start+0x20>
+    5172:	9320      	ld.w      	r1, (r3, 0x0)
+    5174:	6c87      	mov      	r2, r1
+	while(target) {
+    5176:	3a40      	cmpnei      	r2, 0
+    5178:	0805      	bt      	0x5182	// 5182 <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    517a:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    517c:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    517e:	3000      	movi      	r0, 0
+}
+    5180:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    5182:	640a      	cmpne      	r2, r0
+    5184:	0c03      	bf      	0x518a	// 518a <button_start+0x1a>
+		target = target->next;
+    5186:	924b      	ld.w      	r2, (r2, 0x2c)
+    5188:	07f7      	br      	0x5176	// 5176 <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    518a:	3000      	movi      	r0, 0
+    518c:	2800      	subi      	r0, 1
+    518e:	07f9      	br      	0x5180	// 5180 <button_start+0x10>
+    5190:	200002e8 	.long	0x200002e8
+
+Disassembly of section .text.button_ticks:
+
+00005194 <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    5194:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    5196:	1066      	lrw      	r3, 0x200002e8	// 51ac <button_ticks+0x18>
+    5198:	9380      	ld.w      	r4, (r3, 0x0)
+    519a:	3c40      	cmpnei      	r4, 0
+    519c:	0802      	bt      	0x51a0	// 51a0 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    519e:	1491      	pop      	r4, r15
+		button_handler(target);
+    51a0:	6c13      	mov      	r0, r4
+    51a2:	e3ffff57 	bsr      	0x5050	// 5050 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    51a6:	948b      	ld.w      	r4, (r4, 0x2c)
+    51a8:	07f9      	br      	0x519a	// 519a <button_ticks+0x6>
+    51aa:	0000      	bkpt
+    51ac:	200002e8 	.long	0x200002e8
+
+Disassembly of section .text.read_button_GPIO:
+
+000051b0 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    51b0:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    51b2:	1064      	lrw      	r3, 0x2000004c	// 51c0 <read_button_GPIO+0x10>
+{
+    51b4:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    51b6:	9300      	ld.w      	r0, (r3, 0x0)
+    51b8:	e3fff0de 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+	return state;
+    51bc:	1490      	pop      	r15
+    51be:	0000      	bkpt
+    51c0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+000051c4 <TK_Sampling_prog>:
+    51c4:	14c4      	push      	r4-r7
+    51c6:	1072      	lrw      	r3, 0x20000054	// 520c <TK_Sampling_prog+0x48>
+    51c8:	1012      	lrw      	r0, 0x20000736	// 5210 <TK_Sampling_prog+0x4c>
+    51ca:	1093      	lrw      	r4, 0x200005a7	// 5214 <TK_Sampling_prog+0x50>
+    51cc:	6d83      	mov      	r6, r0
+    51ce:	93a0      	ld.w      	r5, (r3, 0x0)
+    51d0:	3300      	movi      	r3, 0
+    51d2:	4342      	lsli      	r2, r3, 2
+    51d4:	6094      	addu      	r2, r5
+    51d6:	9220      	ld.w      	r1, (r2, 0x0)
+    51d8:	4341      	lsli      	r2, r3, 1
+    51da:	6080      	addu      	r2, r0
+    51dc:	7445      	zexth      	r1, r1
+    51de:	aa20      	st.h      	r1, (r2, 0x0)
+    51e0:	8440      	ld.b      	r2, (r4, 0x0)
+    51e2:	3a41      	cmpnei      	r2, 1
+    51e4:	080f      	bt      	0x5202	// 5202 <TK_Sampling_prog+0x3e>
+    51e6:	3300      	movi      	r3, 0
+    51e8:	10ec      	lrw      	r7, 0x20000490	// 5218 <TK_Sampling_prog+0x54>
+    51ea:	4341      	lsli      	r2, r3, 1
+    51ec:	5e28      	addu      	r1, r6, r2
+    51ee:	8920      	ld.h      	r1, (r1, 0x0)
+    51f0:	2300      	addi      	r3, 1
+    51f2:	7445      	zexth      	r1, r1
+    51f4:	609c      	addu      	r2, r7
+    51f6:	3b51      	cmpnei      	r3, 17
+    51f8:	aa20      	st.h      	r1, (r2, 0x0)
+    51fa:	0bf8      	bt      	0x51ea	// 51ea <TK_Sampling_prog+0x26>
+    51fc:	3300      	movi      	r3, 0
+    51fe:	a460      	st.b      	r3, (r4, 0x0)
+    5200:	3311      	movi      	r3, 17
+    5202:	2300      	addi      	r3, 1
+    5204:	74cc      	zextb      	r3, r3
+    5206:	3b10      	cmphsi      	r3, 17
+    5208:	0fe5      	bf      	0x51d2	// 51d2 <TK_Sampling_prog+0xe>
+    520a:	1484      	pop      	r4-r7
+    520c:	20000054 	.long	0x20000054
+    5210:	20000736 	.long	0x20000736
+    5214:	200005a7 	.long	0x200005a7
+    5218:	20000490 	.long	0x20000490
+
+Disassembly of section .text.TKEYIntHandler:
+
+0000521c <TKEYIntHandler>:
+    521c:	1460      	nie
+    521e:	1462      	ipush
+    5220:	14d1      	push      	r4, r15
+    5222:	109e      	lrw      	r4, 0x2000006c	// 5298 <TKEYIntHandler+0x7c>
+    5224:	9460      	ld.w      	r3, (r4, 0x0)
+    5226:	3b40      	cmpnei      	r3, 0
+    5228:	080b      	bt      	0x523e	// 523e <TKEYIntHandler+0x22>
+    522a:	3301      	movi      	r3, 1
+    522c:	b460      	st.w      	r3, (r4, 0x0)
+    522e:	107c      	lrw      	r3, 0x20000524	// 529c <TKEYIntHandler+0x80>
+    5230:	8360      	ld.b      	r3, (r3, 0x0)
+    5232:	3b41      	cmpnei      	r3, 1
+    5234:	0805      	bt      	0x523e	// 523e <TKEYIntHandler+0x22>
+    5236:	e3ffffc7 	bsr      	0x51c4	// 51c4 <TK_Sampling_prog>
+    523a:	3301      	movi      	r3, 1
+    523c:	a464      	st.b      	r3, (r4, 0x4)
+    523e:	1079      	lrw      	r3, 0x20000058	// 52a0 <TKEYIntHandler+0x84>
+    5240:	3101      	movi      	r1, 1
+    5242:	9360      	ld.w      	r3, (r3, 0x0)
+    5244:	934a      	ld.w      	r2, (r3, 0x28)
+    5246:	6884      	and      	r2, r1
+    5248:	3a40      	cmpnei      	r2, 0
+    524a:	0c02      	bf      	0x524e	// 524e <TKEYIntHandler+0x32>
+    524c:	b32c      	st.w      	r1, (r3, 0x30)
+    524e:	934a      	ld.w      	r2, (r3, 0x28)
+    5250:	3102      	movi      	r1, 2
+    5252:	6884      	and      	r2, r1
+    5254:	3a40      	cmpnei      	r2, 0
+    5256:	0c02      	bf      	0x525a	// 525a <TKEYIntHandler+0x3e>
+    5258:	b32c      	st.w      	r1, (r3, 0x30)
+    525a:	934a      	ld.w      	r2, (r3, 0x28)
+    525c:	3104      	movi      	r1, 4
+    525e:	6884      	and      	r2, r1
+    5260:	3a40      	cmpnei      	r2, 0
+    5262:	0c02      	bf      	0x5266	// 5266 <TKEYIntHandler+0x4a>
+    5264:	b32c      	st.w      	r1, (r3, 0x30)
+    5266:	934a      	ld.w      	r2, (r3, 0x28)
+    5268:	3108      	movi      	r1, 8
+    526a:	6884      	and      	r2, r1
+    526c:	3a40      	cmpnei      	r2, 0
+    526e:	0c02      	bf      	0x5272	// 5272 <TKEYIntHandler+0x56>
+    5270:	b32c      	st.w      	r1, (r3, 0x30)
+    5272:	934a      	ld.w      	r2, (r3, 0x28)
+    5274:	3110      	movi      	r1, 16
+    5276:	6884      	and      	r2, r1
+    5278:	3a40      	cmpnei      	r2, 0
+    527a:	0c02      	bf      	0x527e	// 527e <TKEYIntHandler+0x62>
+    527c:	b32c      	st.w      	r1, (r3, 0x30)
+    527e:	934a      	ld.w      	r2, (r3, 0x28)
+    5280:	3120      	movi      	r1, 32
+    5282:	6884      	and      	r2, r1
+    5284:	3a40      	cmpnei      	r2, 0
+    5286:	0c02      	bf      	0x528a	// 528a <TKEYIntHandler+0x6e>
+    5288:	b32c      	st.w      	r1, (r3, 0x30)
+    528a:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    528e:	9880      	ld.w      	r4, (r14, 0x0)
+    5290:	1402      	addi      	r14, r14, 8
+    5292:	1463      	ipop
+    5294:	1461      	nir
+    5296:	0000      	bkpt
+    5298:	2000006c 	.long	0x2000006c
+    529c:	20000524 	.long	0x20000524
+    52a0:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+000052a4 <get_key_number>:
+    52a4:	14c2      	push      	r4-r5
+    52a6:	3200      	movi      	r2, 0
+    52a8:	3000      	movi      	r0, 0
+    52aa:	1088      	lrw      	r4, 0x200005c4	// 52c8 <get_key_number+0x24>
+    52ac:	3501      	movi      	r5, 1
+    52ae:	3120      	movi      	r1, 32
+    52b0:	9460      	ld.w      	r3, (r4, 0x0)
+    52b2:	70c9      	lsr      	r3, r2
+    52b4:	68d4      	and      	r3, r5
+    52b6:	3b40      	cmpnei      	r3, 0
+    52b8:	0c02      	bf      	0x52bc	// 52bc <get_key_number+0x18>
+    52ba:	2000      	addi      	r0, 1
+    52bc:	2200      	addi      	r2, 1
+    52be:	644a      	cmpne      	r2, r1
+    52c0:	0bf8      	bt      	0x52b0	// 52b0 <get_key_number+0xc>
+    52c2:	7400      	zextb      	r0, r0
+    52c4:	1482      	pop      	r4-r5
+    52c6:	0000      	bkpt
+    52c8:	200005c4 	.long	0x200005c4
+
+Disassembly of section .text.TK_Scan_Start:
+
+000052cc <TK_Scan_Start>:
+    52cc:	1046      	lrw      	r2, 0x2000006c	// 52e4 <TK_Scan_Start+0x18>
+    52ce:	8264      	ld.b      	r3, (r2, 0x4)
+    52d0:	74cc      	zextb      	r3, r3
+    52d2:	3b41      	cmpnei      	r3, 1
+    52d4:	0807      	bt      	0x52e2	// 52e2 <TK_Scan_Start+0x16>
+    52d6:	1025      	lrw      	r1, 0x20000058	// 52e8 <TK_Scan_Start+0x1c>
+    52d8:	9120      	ld.w      	r1, (r1, 0x0)
+    52da:	b162      	st.w      	r3, (r1, 0x8)
+    52dc:	3300      	movi      	r3, 0
+    52de:	b260      	st.w      	r3, (r2, 0x0)
+    52e0:	a264      	st.b      	r3, (r2, 0x4)
+    52e2:	783c      	jmp      	r15
+    52e4:	2000006c 	.long	0x2000006c
+    52e8:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000052ec <TK_Keymap_prog>:
+    52ec:	14d4      	push      	r4-r7, r15
+    52ee:	1425      	subi      	r14, r14, 20
+    52f0:	1271      	lrw      	r3, 0x20000318	// 5434 <TK_Keymap_prog+0x148>
+    52f2:	8360      	ld.b      	r3, (r3, 0x0)
+    52f4:	b860      	st.w      	r3, (r14, 0x0)
+    52f6:	3400      	movi      	r4, 0
+    52f8:	1270      	lrw      	r3, 0x200002ec	// 5438 <TK_Keymap_prog+0x14c>
+    52fa:	8360      	ld.b      	r3, (r3, 0x0)
+    52fc:	b861      	st.w      	r3, (r14, 0x4)
+    52fe:	12f0      	lrw      	r7, 0x2000053a	// 543c <TK_Keymap_prog+0x150>
+    5300:	1270      	lrw      	r3, 0x200002f5	// 5440 <TK_Keymap_prog+0x154>
+    5302:	83a0      	ld.b      	r5, (r3, 0x0)
+    5304:	1270      	lrw      	r3, 0x200002f4	// 5444 <TK_Keymap_prog+0x158>
+    5306:	8360      	ld.b      	r3, (r3, 0x0)
+    5308:	b862      	st.w      	r3, (r14, 0x8)
+    530a:	6d9f      	mov      	r6, r7
+    530c:	126f      	lrw      	r3, 0x20000736	// 5448 <TK_Keymap_prog+0x15c>
+    530e:	b863      	st.w      	r3, (r14, 0xc)
+    5310:	4461      	lsli      	r3, r4, 1
+    5312:	9843      	ld.w      	r2, (r14, 0xc)
+    5314:	608c      	addu      	r2, r3
+    5316:	122e      	lrw      	r1, 0x20000490	// 544c <TK_Keymap_prog+0x160>
+    5318:	604c      	addu      	r1, r3
+    531a:	8a40      	ld.h      	r2, (r2, 0x0)
+    531c:	8920      	ld.h      	r1, (r1, 0x0)
+    531e:	6086      	subu      	r2, r1
+    5320:	748b      	sexth      	r2, r2
+    5322:	5f2c      	addu      	r1, r7, r3
+    5324:	a940      	st.h      	r2, (r1, 0x0)
+    5326:	8940      	ld.h      	r2, (r1, 0x0)
+    5328:	748b      	sexth      	r2, r2
+    532a:	3adf      	btsti      	r2, 31
+    532c:	1249      	lrw      	r2, 0x200006f2	// 5450 <TK_Keymap_prog+0x164>
+    532e:	608c      	addu      	r2, r3
+    5330:	0c37      	bf      	0x539e	// 539e <TK_Keymap_prog+0xb2>
+    5332:	3100      	movi      	r1, 0
+    5334:	aa20      	st.h      	r1, (r2, 0x0)
+    5336:	9840      	ld.w      	r2, (r14, 0x0)
+    5338:	3a01      	cmphsi      	r2, 2
+    533a:	0c6d      	bf      	0x5414	// 5414 <TK_Keymap_prog+0x128>
+    533c:	4461      	lsli      	r3, r4, 1
+    533e:	5e2c      	addu      	r1, r6, r3
+    5340:	1205      	lrw      	r0, 0x20000346	// 5454 <TK_Keymap_prog+0x168>
+    5342:	8940      	ld.h      	r2, (r1, 0x0)
+    5344:	60c0      	addu      	r3, r0
+    5346:	748b      	sexth      	r2, r2
+    5348:	8b60      	ld.h      	r3, (r3, 0x0)
+    534a:	648d      	cmplt      	r3, r2
+    534c:	9840      	ld.w      	r2, (r14, 0x0)
+    534e:	7cc8      	mult      	r3, r2
+    5350:	0c2a      	bf      	0x53a4	// 53a4 <TK_Keymap_prog+0xb8>
+    5352:	8940      	ld.h      	r2, (r1, 0x0)
+    5354:	748b      	sexth      	r2, r2
+    5356:	64c9      	cmplt      	r2, r3
+    5358:	0c26      	bf      	0x53a4	// 53a4 <TK_Keymap_prog+0xb8>
+    535a:	1240      	lrw      	r2, 0x20000528	// 5458 <TK_Keymap_prog+0x16c>
+    535c:	6090      	addu      	r2, r4
+    535e:	8260      	ld.b      	r3, (r2, 0x0)
+    5360:	2300      	addi      	r3, 1
+    5362:	74cc      	zextb      	r3, r3
+    5364:	a260      	st.b      	r3, (r2, 0x0)
+    5366:	3100      	movi      	r1, 0
+    5368:	117d      	lrw      	r3, 0x2000050e	// 545c <TK_Keymap_prog+0x170>
+    536a:	60d0      	addu      	r3, r4
+    536c:	a320      	st.b      	r1, (r3, 0x0)
+    536e:	117d      	lrw      	r3, 0x200005ea	// 5460 <TK_Keymap_prog+0x174>
+    5370:	60d0      	addu      	r3, r4
+    5372:	a320      	st.b      	r1, (r3, 0x0)
+    5374:	117c      	lrw      	r3, 0x20000664	// 5464 <TK_Keymap_prog+0x178>
+    5376:	60d0      	addu      	r3, r4
+    5378:	a320      	st.b      	r1, (r3, 0x0)
+    537a:	8260      	ld.b      	r3, (r2, 0x0)
+    537c:	9821      	ld.w      	r1, (r14, 0x4)
+    537e:	64c4      	cmphs      	r1, r3
+    5380:	081f      	bt      	0x53be	// 53be <TK_Keymap_prog+0xd2>
+    5382:	3d40      	cmpnei      	r5, 0
+    5384:	0852      	bt      	0x5428	// 5428 <TK_Keymap_prog+0x13c>
+    5386:	1139      	lrw      	r1, 0x20000520	// 5468 <TK_Keymap_prog+0x17c>
+    5388:	9160      	ld.w      	r3, (r1, 0x0)
+    538a:	3b40      	cmpnei      	r3, 0
+    538c:	0806      	bt      	0x5398	// 5398 <TK_Keymap_prog+0xac>
+    538e:	9100      	ld.w      	r0, (r1, 0x0)
+    5390:	3301      	movi      	r3, 1
+    5392:	70d0      	lsl      	r3, r4
+    5394:	6cc0      	or      	r3, r0
+    5396:	b160      	st.w      	r3, (r1, 0x0)
+    5398:	3300      	movi      	r3, 0
+    539a:	a260      	st.b      	r3, (r2, 0x0)
+    539c:	0411      	br      	0x53be	// 53be <TK_Keymap_prog+0xd2>
+    539e:	8920      	ld.h      	r1, (r1, 0x0)
+    53a0:	7445      	zexth      	r1, r1
+    53a2:	07c9      	br      	0x5334	// 5334 <TK_Keymap_prog+0x48>
+    53a4:	4441      	lsli      	r2, r4, 1
+    53a6:	6098      	addu      	r2, r6
+    53a8:	8a40      	ld.h      	r2, (r2, 0x0)
+    53aa:	748b      	sexth      	r2, r2
+    53ac:	648d      	cmplt      	r3, r2
+    53ae:	0c08      	bf      	0x53be	// 53be <TK_Keymap_prog+0xd2>
+    53b0:	3300      	movi      	r3, 0
+    53b2:	114e      	lrw      	r2, 0x20000520	// 5468 <TK_Keymap_prog+0x17c>
+    53b4:	2b01      	subi      	r3, 2
+    53b6:	9220      	ld.w      	r1, (r2, 0x0)
+    53b8:	70d3      	rotl      	r3, r4
+    53ba:	68c4      	and      	r3, r1
+    53bc:	b260      	st.w      	r3, (r2, 0x0)
+    53be:	4441      	lsli      	r2, r4, 1
+    53c0:	5e68      	addu      	r3, r6, r2
+    53c2:	8b60      	ld.h      	r3, (r3, 0x0)
+    53c4:	74cf      	sexth      	r3, r3
+    53c6:	b864      	st.w      	r3, (r14, 0x10)
+    53c8:	3105      	movi      	r1, 5
+    53ca:	1163      	lrw      	r3, 0x20000346	// 5454 <TK_Keymap_prog+0x168>
+    53cc:	608c      	addu      	r2, r3
+    53ce:	8a00      	ld.h      	r0, (r2, 0x0)
+    53d0:	4002      	lsli      	r0, r0, 2
+    53d2:	e3fff80d 	bsr      	0x43ec	// 43ec <__divsi3>
+    53d6:	9864      	ld.w      	r3, (r14, 0x10)
+    53d8:	640d      	cmplt      	r3, r0
+    53da:	0c18      	bf      	0x540a	// 540a <TK_Keymap_prog+0x11e>
+    53dc:	1140      	lrw      	r2, 0x2000050e	// 545c <TK_Keymap_prog+0x170>
+    53de:	6090      	addu      	r2, r4
+    53e0:	8260      	ld.b      	r3, (r2, 0x0)
+    53e2:	2300      	addi      	r3, 1
+    53e4:	74cc      	zextb      	r3, r3
+    53e6:	a260      	st.b      	r3, (r2, 0x0)
+    53e8:	3100      	movi      	r1, 0
+    53ea:	107c      	lrw      	r3, 0x20000528	// 5458 <TK_Keymap_prog+0x16c>
+    53ec:	60d0      	addu      	r3, r4
+    53ee:	a320      	st.b      	r1, (r3, 0x0)
+    53f0:	8260      	ld.b      	r3, (r2, 0x0)
+    53f2:	9822      	ld.w      	r1, (r14, 0x8)
+    53f4:	64c4      	cmphs      	r1, r3
+    53f6:	080a      	bt      	0x540a	// 540a <TK_Keymap_prog+0x11e>
+    53f8:	3300      	movi      	r3, 0
+    53fa:	103c      	lrw      	r1, 0x20000520	// 5468 <TK_Keymap_prog+0x17c>
+    53fc:	2b01      	subi      	r3, 2
+    53fe:	9100      	ld.w      	r0, (r1, 0x0)
+    5400:	70d3      	rotl      	r3, r4
+    5402:	68c0      	and      	r3, r0
+    5404:	b160      	st.w      	r3, (r1, 0x0)
+    5406:	3300      	movi      	r3, 0
+    5408:	a260      	st.b      	r3, (r2, 0x0)
+    540a:	2400      	addi      	r4, 1
+    540c:	3c51      	cmpnei      	r4, 17
+    540e:	0b81      	bt      	0x5310	// 5310 <TK_Keymap_prog+0x24>
+    5410:	1405      	addi      	r14, r14, 20
+    5412:	1494      	pop      	r4-r7, r15
+    5414:	60d8      	addu      	r3, r6
+    5416:	4441      	lsli      	r2, r4, 1
+    5418:	102f      	lrw      	r1, 0x20000346	// 5454 <TK_Keymap_prog+0x168>
+    541a:	8b60      	ld.h      	r3, (r3, 0x0)
+    541c:	6084      	addu      	r2, r1
+    541e:	74cf      	sexth      	r3, r3
+    5420:	8a40      	ld.h      	r2, (r2, 0x0)
+    5422:	64c9      	cmplt      	r2, r3
+    5424:	0fcd      	bf      	0x53be	// 53be <TK_Keymap_prog+0xd2>
+    5426:	079a      	br      	0x535a	// 535a <TK_Keymap_prog+0x6e>
+    5428:	3d41      	cmpnei      	r5, 1
+    542a:	0bb7      	bt      	0x5398	// 5398 <TK_Keymap_prog+0xac>
+    542c:	102f      	lrw      	r1, 0x20000520	// 5468 <TK_Keymap_prog+0x17c>
+    542e:	6cd7      	mov      	r3, r5
+    5430:	9100      	ld.w      	r0, (r1, 0x0)
+    5432:	07b0      	br      	0x5392	// 5392 <TK_Keymap_prog+0xa6>
+    5434:	20000318 	.long	0x20000318
+    5438:	200002ec 	.long	0x200002ec
+    543c:	2000053a 	.long	0x2000053a
+    5440:	200002f5 	.long	0x200002f5
+    5444:	200002f4 	.long	0x200002f4
+    5448:	20000736 	.long	0x20000736
+    544c:	20000490 	.long	0x20000490
+    5450:	200006f2 	.long	0x200006f2
+    5454:	20000346 	.long	0x20000346
+    5458:	20000528 	.long	0x20000528
+    545c:	2000050e 	.long	0x2000050e
+    5460:	200005ea 	.long	0x200005ea
+    5464:	20000664 	.long	0x20000664
+    5468:	20000520 	.long	0x20000520
+
+Disassembly of section .text.TK_overflow_predict:
+
+0000546c <TK_overflow_predict>:
+    546c:	14d4      	push      	r4-r7, r15
+    546e:	1421      	subi      	r14, r14, 4
+    5470:	11d9      	lrw      	r6, 0x2000006c	// 5554 <TK_overflow_predict+0xe8>
+    5472:	8665      	ld.b      	r3, (r6, 0x5)
+    5474:	3b41      	cmpnei      	r3, 1
+    5476:	085f      	bt      	0x5534	// 5534 <TK_overflow_predict+0xc8>
+    5478:	1158      	lrw      	r2, 0x20000640	// 5558 <TK_overflow_predict+0xec>
+    547a:	8260      	ld.b      	r3, (r2, 0x0)
+    547c:	2300      	addi      	r3, 1
+    547e:	74cc      	zextb      	r3, r3
+    5480:	a260      	st.b      	r3, (r2, 0x0)
+    5482:	8260      	ld.b      	r3, (r2, 0x0)
+    5484:	1136      	lrw      	r1, 0x20000319	// 555c <TK_overflow_predict+0xf0>
+    5486:	8120      	ld.b      	r1, (r1, 0x0)
+    5488:	64c4      	cmphs      	r1, r3
+    548a:	0855      	bt      	0x5534	// 5534 <TK_overflow_predict+0xc8>
+    548c:	3300      	movi      	r3, 0
+    548e:	a260      	st.b      	r3, (r2, 0x0)
+    5490:	3500      	movi      	r5, 0
+    5492:	11f4      	lrw      	r7, 0x2000031c	// 5560 <TK_overflow_predict+0xf4>
+    5494:	2605      	addi      	r6, 6
+    5496:	9760      	ld.w      	r3, (r7, 0x0)
+    5498:	70d5      	lsr      	r3, r5
+    549a:	3201      	movi      	r2, 1
+    549c:	68c8      	and      	r3, r2
+    549e:	3b40      	cmpnei      	r3, 0
+    54a0:	0c34      	bf      	0x5508	// 5508 <TK_overflow_predict+0x9c>
+    54a2:	4581      	lsli      	r4, r5, 1
+    54a4:	5e70      	addu      	r3, r6, r4
+    54a6:	8b00      	ld.h      	r0, (r3, 0x0)
+    54a8:	e3ffe07c 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    54ac:	6cc7      	mov      	r3, r1
+    54ae:	3180      	movi      	r1, 128
+    54b0:	6c83      	mov      	r2, r0
+    54b2:	4137      	lsli      	r1, r1, 23
+    54b4:	3000      	movi      	r0, 0
+    54b6:	e3ffd67f 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    54ba:	116b      	lrw      	r3, 0x20000322	// 5564 <TK_overflow_predict+0xf8>
+    54bc:	60d0      	addu      	r3, r4
+    54be:	8b60      	ld.h      	r3, (r3, 0x0)
+    54c0:	4364      	lsli      	r3, r3, 4
+    54c2:	230e      	addi      	r3, 15
+    54c4:	b860      	st.w      	r3, (r14, 0x0)
+    54c6:	e3ffdc25 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    54ca:	9860      	ld.w      	r3, (r14, 0x0)
+    54cc:	7cc0      	mult      	r3, r0
+    54ce:	1147      	lrw      	r2, 0x200006d0	// 5568 <TK_overflow_predict+0xfc>
+    54d0:	740d      	zexth      	r0, r3
+    54d2:	6090      	addu      	r2, r4
+    54d4:	1166      	lrw      	r3, 0x20000736	// 556c <TK_overflow_predict+0x100>
+    54d6:	60d0      	addu      	r3, r4
+    54d8:	aa00      	st.h      	r0, (r2, 0x0)
+    54da:	8b60      	ld.h      	r3, (r3, 0x0)
+    54dc:	8a00      	ld.h      	r0, (r2, 0x0)
+    54de:	7401      	zexth      	r0, r0
+    54e0:	325f      	movi      	r2, 95
+    54e2:	74cd      	zexth      	r3, r3
+    54e4:	7c08      	mult      	r0, r2
+    54e6:	3164      	movi      	r1, 100
+    54e8:	b860      	st.w      	r3, (r14, 0x0)
+    54ea:	e3fff781 	bsr      	0x43ec	// 43ec <__divsi3>
+    54ee:	9860      	ld.w      	r3, (r14, 0x0)
+    54f0:	64c1      	cmplt      	r0, r3
+    54f2:	0c0b      	bf      	0x5508	// 5508 <TK_overflow_predict+0x9c>
+    54f4:	107f      	lrw      	r3, 0x200002f6	// 5570 <TK_overflow_predict+0x104>
+    54f6:	610c      	addu      	r4, r3
+    54f8:	8c60      	ld.h      	r3, (r4, 0x0)
+    54fa:	3b06      	cmphsi      	r3, 7
+    54fc:	0806      	bt      	0x5508	// 5508 <TK_overflow_predict+0x9c>
+    54fe:	2300      	addi      	r3, 1
+    5500:	ac60      	st.h      	r3, (r4, 0x0)
+    5502:	3201      	movi      	r2, 1
+    5504:	107c      	lrw      	r3, 0x20000595	// 5574 <TK_overflow_predict+0x108>
+    5506:	a340      	st.b      	r2, (r3, 0x0)
+    5508:	2500      	addi      	r5, 1
+    550a:	3d51      	cmpnei      	r5, 17
+    550c:	0bc5      	bt      	0x5496	// 5496 <TK_overflow_predict+0x2a>
+    550e:	107a      	lrw      	r3, 0x20000595	// 5574 <TK_overflow_predict+0x108>
+    5510:	8340      	ld.b      	r2, (r3, 0x0)
+    5512:	3a41      	cmpnei      	r2, 1
+    5514:	0810      	bt      	0x5534	// 5534 <TK_overflow_predict+0xc8>
+    5516:	3200      	movi      	r2, 0
+    5518:	a340      	st.b      	r2, (r3, 0x0)
+    551a:	3200      	movi      	r2, 0
+    551c:	1077      	lrw      	r3, 0x20000058	// 5578 <TK_overflow_predict+0x10c>
+    551e:	1018      	lrw      	r0, 0x20000663	// 557c <TK_overflow_predict+0x110>
+    5520:	10b8      	lrw      	r5, 0x2000069c	// 5580 <TK_overflow_predict+0x114>
+    5522:	10d4      	lrw      	r6, 0x200002f6	// 5570 <TK_overflow_predict+0x104>
+    5524:	9360      	ld.w      	r3, (r3, 0x0)
+    5526:	b342      	st.w      	r2, (r3, 0x8)
+    5528:	1077      	lrw      	r3, 0x20000054	// 5584 <TK_overflow_predict+0x118>
+    552a:	9380      	ld.w      	r4, (r3, 0x0)
+    552c:	3300      	movi      	r3, 0
+    552e:	8040      	ld.b      	r2, (r0, 0x0)
+    5530:	648c      	cmphs      	r3, r2
+    5532:	0c03      	bf      	0x5538	// 5538 <TK_overflow_predict+0xcc>
+    5534:	1401      	addi      	r14, r14, 4
+    5536:	1494      	pop      	r4-r7, r15
+    5538:	5d4c      	addu      	r2, r5, r3
+    553a:	8240      	ld.b      	r2, (r2, 0x0)
+    553c:	4241      	lsli      	r2, r2, 1
+    553e:	4322      	lsli      	r1, r3, 2
+    5540:	6098      	addu      	r2, r6
+    5542:	6050      	addu      	r1, r4
+    5544:	8a40      	ld.h      	r2, (r2, 0x0)
+    5546:	91f2      	ld.w      	r7, (r1, 0x48)
+    5548:	4254      	lsli      	r2, r2, 20
+    554a:	6c9c      	or      	r2, r7
+    554c:	2300      	addi      	r3, 1
+    554e:	b152      	st.w      	r2, (r1, 0x48)
+    5550:	74cc      	zextb      	r3, r3
+    5552:	07ee      	br      	0x552e	// 552e <TK_overflow_predict+0xc2>
+    5554:	2000006c 	.long	0x2000006c
+    5558:	20000640 	.long	0x20000640
+    555c:	20000319 	.long	0x20000319
+    5560:	2000031c 	.long	0x2000031c
+    5564:	20000322 	.long	0x20000322
+    5568:	200006d0 	.long	0x200006d0
+    556c:	20000736 	.long	0x20000736
+    5570:	200002f6 	.long	0x200002f6
+    5574:	20000595 	.long	0x20000595
+    5578:	20000058 	.long	0x20000058
+    557c:	20000663 	.long	0x20000663
+    5580:	2000069c 	.long	0x2000069c
+    5584:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00005588 <TK_Baseline_tracking>:
+    5588:	14c4      	push      	r4-r7
+    558a:	1422      	subi      	r14, r14, 8
+    558c:	1348      	lrw      	r2, 0x200005c2	// 572c <TK_Baseline_tracking+0x1a4>
+    558e:	8260      	ld.b      	r3, (r2, 0x0)
+    5590:	2300      	addi      	r3, 1
+    5592:	74cc      	zextb      	r3, r3
+    5594:	a260      	st.b      	r3, (r2, 0x0)
+    5596:	8260      	ld.b      	r3, (r2, 0x0)
+    5598:	1326      	lrw      	r1, 0x20000319	// 5730 <TK_Baseline_tracking+0x1a8>
+    559a:	8120      	ld.b      	r1, (r1, 0x0)
+    559c:	644c      	cmphs      	r3, r1
+    559e:	0cad      	bf      	0x56f8	// 56f8 <TK_Baseline_tracking+0x170>
+    55a0:	3300      	movi      	r3, 0
+    55a2:	a260      	st.b      	r3, (r2, 0x0)
+    55a4:	1364      	lrw      	r3, 0x20000520	// 5734 <TK_Baseline_tracking+0x1ac>
+    55a6:	9360      	ld.w      	r3, (r3, 0x0)
+    55a8:	3b40      	cmpnei      	r3, 0
+    55aa:	08a7      	bt      	0x56f8	// 56f8 <TK_Baseline_tracking+0x170>
+    55ac:	1323      	lrw      	r1, 0x2000053a	// 5738 <TK_Baseline_tracking+0x1b0>
+    55ae:	6dc7      	mov      	r7, r1
+    55b0:	b820      	st.w      	r1, (r14, 0x0)
+    55b2:	3200      	movi      	r2, 0
+    55b4:	1362      	lrw      	r3, 0x20000346	// 573c <TK_Baseline_tracking+0x1b4>
+    55b6:	1323      	lrw      	r1, 0x20000490	// 5740 <TK_Baseline_tracking+0x1b8>
+    55b8:	4201      	lsli      	r0, r2, 1
+    55ba:	9880      	ld.w      	r4, (r14, 0x0)
+    55bc:	6100      	addu      	r4, r0
+    55be:	8c80      	ld.h      	r4, (r4, 0x0)
+    55c0:	7513      	sexth      	r4, r4
+    55c2:	3cdf      	btsti      	r4, 31
+    55c4:	0c27      	bf      	0x5612	// 5612 <TK_Baseline_tracking+0x8a>
+    55c6:	13a0      	lrw      	r5, 0x20000736	// 5744 <TK_Baseline_tracking+0x1bc>
+    55c8:	5980      	addu      	r4, r1, r0
+    55ca:	6014      	addu      	r0, r5
+    55cc:	b881      	st.w      	r4, (r14, 0x4)
+    55ce:	8c80      	ld.h      	r4, (r4, 0x0)
+    55d0:	88c0      	ld.h      	r6, (r0, 0x0)
+    55d2:	7511      	zexth      	r4, r4
+    55d4:	7599      	zexth      	r6, r6
+    55d6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    55d8:	611a      	subu      	r4, r6
+    55da:	6551      	cmplt      	r4, r5
+    55dc:	081b      	bt      	0x5612	// 5612 <TK_Baseline_tracking+0x8a>
+    55de:	9881      	ld.w      	r4, (r14, 0x4)
+    55e0:	8c80      	ld.h      	r4, (r4, 0x0)
+    55e2:	8800      	ld.h      	r0, (r0, 0x0)
+    55e4:	7511      	zexth      	r4, r4
+    55e6:	7401      	zexth      	r0, r0
+    55e8:	5c01      	subu      	r0, r4, r0
+    55ea:	4581      	lsli      	r4, r5, 1
+    55ec:	6150      	addu      	r5, r4
+    55ee:	6541      	cmplt      	r0, r5
+    55f0:	0c11      	bf      	0x5612	// 5612 <TK_Baseline_tracking+0x8a>
+    55f2:	1296      	lrw      	r4, 0x20000664	// 5748 <TK_Baseline_tracking+0x1c0>
+    55f4:	6108      	addu      	r4, r2
+    55f6:	8400      	ld.b      	r0, (r4, 0x0)
+    55f8:	2000      	addi      	r0, 1
+    55fa:	7400      	zextb      	r0, r0
+    55fc:	a400      	st.b      	r0, (r4, 0x0)
+    55fe:	1214      	lrw      	r0, 0x2000008c	// 574c <TK_Baseline_tracking+0x1c4>
+    5600:	84a0      	ld.b      	r5, (r4, 0x0)
+    5602:	8008      	ld.b      	r0, (r0, 0x8)
+    5604:	6540      	cmphs      	r0, r5
+    5606:	0806      	bt      	0x5612	// 5612 <TK_Baseline_tracking+0x8a>
+    5608:	1212      	lrw      	r0, 0x200005a7	// 5750 <TK_Baseline_tracking+0x1c8>
+    560a:	3501      	movi      	r5, 1
+    560c:	a0a0      	st.b      	r5, (r0, 0x0)
+    560e:	3000      	movi      	r0, 0
+    5610:	a400      	st.b      	r0, (r4, 0x0)
+    5612:	4201      	lsli      	r0, r2, 1
+    5614:	5f80      	addu      	r4, r7, r0
+    5616:	8c80      	ld.h      	r4, (r4, 0x0)
+    5618:	7513      	sexth      	r4, r4
+    561a:	3c20      	cmplti      	r4, 1
+    561c:	0870      	bt      	0x56fc	// 56fc <TK_Baseline_tracking+0x174>
+    561e:	128a      	lrw      	r4, 0x20000736	// 5744 <TK_Baseline_tracking+0x1bc>
+    5620:	6100      	addu      	r4, r0
+    5622:	59a0      	addu      	r5, r1, r0
+    5624:	8c80      	ld.h      	r4, (r4, 0x0)
+    5626:	8da0      	ld.h      	r5, (r5, 0x0)
+    5628:	7555      	zexth      	r5, r5
+    562a:	7511      	zexth      	r4, r4
+    562c:	6116      	subu      	r4, r5
+    562e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    5630:	45a2      	lsli      	r5, r5, 2
+    5632:	6551      	cmplt      	r4, r5
+    5634:	0864      	bt      	0x56fc	// 56fc <TK_Baseline_tracking+0x174>
+    5636:	1288      	lrw      	r4, 0x200005ea	// 5754 <TK_Baseline_tracking+0x1cc>
+    5638:	6108      	addu      	r4, r2
+    563a:	84a0      	ld.b      	r5, (r4, 0x0)
+    563c:	2500      	addi      	r5, 1
+    563e:	7554      	zextb      	r5, r5
+    5640:	a4a0      	st.b      	r5, (r4, 0x0)
+    5642:	12a3      	lrw      	r5, 0x2000008c	// 574c <TK_Baseline_tracking+0x1c4>
+    5644:	84c0      	ld.b      	r6, (r4, 0x0)
+    5646:	85a9      	ld.b      	r5, (r5, 0x9)
+    5648:	6594      	cmphs      	r5, r6
+    564a:	0806      	bt      	0x5656	// 5656 <TK_Baseline_tracking+0xce>
+    564c:	12a1      	lrw      	r5, 0x200005a7	// 5750 <TK_Baseline_tracking+0x1c8>
+    564e:	3601      	movi      	r6, 1
+    5650:	a5c0      	st.b      	r6, (r5, 0x0)
+    5652:	3500      	movi      	r5, 0
+    5654:	a4a0      	st.b      	r5, (r4, 0x0)
+    5656:	5f80      	addu      	r4, r7, r0
+    5658:	8c80      	ld.h      	r4, (r4, 0x0)
+    565a:	7513      	sexth      	r4, r4
+    565c:	3cdf      	btsti      	r4, 31
+    565e:	0c10      	bf      	0x567e	// 567e <TK_Baseline_tracking+0xf6>
+    5660:	11d9      	lrw      	r6, 0x20000736	// 5744 <TK_Baseline_tracking+0x1bc>
+    5662:	59a0      	addu      	r5, r1, r0
+    5664:	6180      	addu      	r6, r0
+    5666:	8d80      	ld.h      	r4, (r5, 0x0)
+    5668:	8ec0      	ld.h      	r6, (r6, 0x0)
+    566a:	7599      	zexth      	r6, r6
+    566c:	7511      	zexth      	r4, r4
+    566e:	611a      	subu      	r4, r6
+    5670:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5672:	6591      	cmplt      	r4, r6
+    5674:	0c05      	bf      	0x567e	// 567e <TK_Baseline_tracking+0xf6>
+    5676:	8d80      	ld.h      	r4, (r5, 0x0)
+    5678:	2c00      	subi      	r4, 1
+    567a:	7511      	zexth      	r4, r4
+    567c:	ad80      	st.h      	r4, (r5, 0x0)
+    567e:	5f80      	addu      	r4, r7, r0
+    5680:	8c80      	ld.h      	r4, (r4, 0x0)
+    5682:	7513      	sexth      	r4, r4
+    5684:	3cdf      	btsti      	r4, 31
+    5686:	0c11      	bf      	0x56a8	// 56a8 <TK_Baseline_tracking+0x120>
+    5688:	11cf      	lrw      	r6, 0x20000736	// 5744 <TK_Baseline_tracking+0x1bc>
+    568a:	59a0      	addu      	r5, r1, r0
+    568c:	6180      	addu      	r6, r0
+    568e:	8d80      	ld.h      	r4, (r5, 0x0)
+    5690:	8ec0      	ld.h      	r6, (r6, 0x0)
+    5692:	7599      	zexth      	r6, r6
+    5694:	7511      	zexth      	r4, r4
+    5696:	611a      	subu      	r4, r6
+    5698:	8bc0      	ld.h      	r6, (r3, 0x0)
+    569a:	4ec1      	lsri      	r6, r6, 1
+    569c:	6591      	cmplt      	r4, r6
+    569e:	0805      	bt      	0x56a8	// 56a8 <TK_Baseline_tracking+0x120>
+    56a0:	8d80      	ld.h      	r4, (r5, 0x0)
+    56a2:	2c01      	subi      	r4, 2
+    56a4:	7511      	zexth      	r4, r4
+    56a6:	ad80      	st.h      	r4, (r5, 0x0)
+    56a8:	5fa0      	addu      	r5, r7, r0
+    56aa:	8d80      	ld.h      	r4, (r5, 0x0)
+    56ac:	7513      	sexth      	r4, r4
+    56ae:	3c20      	cmplti      	r4, 1
+    56b0:	080c      	bt      	0x56c8	// 56c8 <TK_Baseline_tracking+0x140>
+    56b2:	8da0      	ld.h      	r5, (r5, 0x0)
+    56b4:	8b80      	ld.h      	r4, (r3, 0x0)
+    56b6:	7557      	sexth      	r5, r5
+    56b8:	4c81      	lsri      	r4, r4, 1
+    56ba:	6515      	cmplt      	r5, r4
+    56bc:	0c06      	bf      	0x56c8	// 56c8 <TK_Baseline_tracking+0x140>
+    56be:	59a0      	addu      	r5, r1, r0
+    56c0:	8d80      	ld.h      	r4, (r5, 0x0)
+    56c2:	2400      	addi      	r4, 1
+    56c4:	7511      	zexth      	r4, r4
+    56c6:	ad80      	st.h      	r4, (r5, 0x0)
+    56c8:	5fa0      	addu      	r5, r7, r0
+    56ca:	8d80      	ld.h      	r4, (r5, 0x0)
+    56cc:	7513      	sexth      	r4, r4
+    56ce:	3c20      	cmplti      	r4, 1
+    56d0:	0810      	bt      	0x56f0	// 56f0 <TK_Baseline_tracking+0x168>
+    56d2:	8dc0      	ld.h      	r6, (r5, 0x0)
+    56d4:	759b      	sexth      	r6, r6
+    56d6:	8b80      	ld.h      	r4, (r3, 0x0)
+    56d8:	6519      	cmplt      	r6, r4
+    56da:	0c0b      	bf      	0x56f0	// 56f0 <TK_Baseline_tracking+0x168>
+    56dc:	8da0      	ld.h      	r5, (r5, 0x0)
+    56de:	7557      	sexth      	r5, r5
+    56e0:	4c81      	lsri      	r4, r4, 1
+    56e2:	6515      	cmplt      	r5, r4
+    56e4:	0806      	bt      	0x56f0	// 56f0 <TK_Baseline_tracking+0x168>
+    56e6:	6004      	addu      	r0, r1
+    56e8:	8880      	ld.h      	r4, (r0, 0x0)
+    56ea:	2401      	addi      	r4, 2
+    56ec:	7511      	zexth      	r4, r4
+    56ee:	a880      	st.h      	r4, (r0, 0x0)
+    56f0:	2200      	addi      	r2, 1
+    56f2:	3a51      	cmpnei      	r2, 17
+    56f4:	2301      	addi      	r3, 2
+    56f6:	0b61      	bt      	0x55b8	// 55b8 <TK_Baseline_tracking+0x30>
+    56f8:	1402      	addi      	r14, r14, 8
+    56fa:	1484      	pop      	r4-r7
+    56fc:	5f80      	addu      	r4, r7, r0
+    56fe:	8c80      	ld.h      	r4, (r4, 0x0)
+    5700:	7513      	sexth      	r4, r4
+    5702:	3cdf      	btsti      	r4, 31
+    5704:	0fa9      	bf      	0x5656	// 5656 <TK_Baseline_tracking+0xce>
+    5706:	10b0      	lrw      	r5, 0x20000736	// 5744 <TK_Baseline_tracking+0x1bc>
+    5708:	5980      	addu      	r4, r1, r0
+    570a:	6140      	addu      	r5, r0
+    570c:	8c80      	ld.h      	r4, (r4, 0x0)
+    570e:	8da0      	ld.h      	r5, (r5, 0x0)
+    5710:	7555      	zexth      	r5, r5
+    5712:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5714:	7511      	zexth      	r4, r4
+    5716:	6116      	subu      	r4, r5
+    5718:	46a1      	lsli      	r5, r6, 1
+    571a:	6158      	addu      	r5, r6
+    571c:	6551      	cmplt      	r4, r5
+    571e:	0b9c      	bt      	0x5656	// 5656 <TK_Baseline_tracking+0xce>
+    5720:	108c      	lrw      	r4, 0x200005a7	// 5750 <TK_Baseline_tracking+0x1c8>
+    5722:	3501      	movi      	r5, 1
+    5724:	a4a0      	st.b      	r5, (r4, 0x0)
+    5726:	6c03      	mov      	r0, r0
+    5728:	0797      	br      	0x5656	// 5656 <TK_Baseline_tracking+0xce>
+    572a:	0000      	bkpt
+    572c:	200005c2 	.long	0x200005c2
+    5730:	20000319 	.long	0x20000319
+    5734:	20000520 	.long	0x20000520
+    5738:	2000053a 	.long	0x2000053a
+    573c:	20000346 	.long	0x20000346
+    5740:	20000490 	.long	0x20000490
+    5744:	20000736 	.long	0x20000736
+    5748:	20000664 	.long	0x20000664
+    574c:	2000008c 	.long	0x2000008c
+    5750:	200005a7 	.long	0x200005a7
+    5754:	200005ea 	.long	0x200005ea
+
+Disassembly of section .text.TK_result_prog:
+
+00005758 <TK_result_prog>:
+    5758:	14d2      	push      	r4-r5, r15
+    575a:	1050      	lrw      	r2, 0x20000520	// 5798 <TK_result_prog+0x40>
+    575c:	1090      	lrw      	r4, 0x200005c4	// 579c <TK_result_prog+0x44>
+    575e:	9260      	ld.w      	r3, (r2, 0x0)
+    5760:	3b40      	cmpnei      	r3, 0
+    5762:	0c02      	bf      	0x5766	// 5766 <TK_result_prog+0xe>
+    5764:	9260      	ld.w      	r3, (r2, 0x0)
+    5766:	b460      	st.w      	r3, (r4, 0x0)
+    5768:	9460      	ld.w      	r3, (r4, 0x0)
+    576a:	3b40      	cmpnei      	r3, 0
+    576c:	10ad      	lrw      	r5, 0x20000698	// 57a0 <TK_result_prog+0x48>
+    576e:	0c11      	bf      	0x5790	// 5790 <TK_result_prog+0x38>
+    5770:	9440      	ld.w      	r2, (r4, 0x0)
+    5772:	9560      	ld.w      	r3, (r5, 0x0)
+    5774:	64ca      	cmpne      	r2, r3
+    5776:	0c03      	bf      	0x577c	// 577c <TK_result_prog+0x24>
+    5778:	9460      	ld.w      	r3, (r4, 0x0)
+    577a:	b560      	st.w      	r3, (r5, 0x0)
+    577c:	e3fffd94 	bsr      	0x52a4	// 52a4 <get_key_number>
+    5780:	1069      	lrw      	r3, 0x20000320	// 57a4 <TK_result_prog+0x4c>
+    5782:	8360      	ld.b      	r3, (r3, 0x0)
+    5784:	640c      	cmphs      	r3, r0
+    5786:	0804      	bt      	0x578e	// 578e <TK_result_prog+0x36>
+    5788:	3300      	movi      	r3, 0
+    578a:	b460      	st.w      	r3, (r4, 0x0)
+    578c:	b560      	st.w      	r3, (r5, 0x0)
+    578e:	1492      	pop      	r4-r5, r15
+    5790:	1046      	lrw      	r2, 0x200005bc	// 57a8 <TK_result_prog+0x50>
+    5792:	b560      	st.w      	r3, (r5, 0x0)
+    5794:	b260      	st.w      	r3, (r2, 0x0)
+    5796:	07fc      	br      	0x578e	// 578e <TK_result_prog+0x36>
+    5798:	20000520 	.long	0x20000520
+    579c:	200005c4 	.long	0x200005c4
+    57a0:	20000698 	.long	0x20000698
+    57a4:	20000320 	.long	0x20000320
+    57a8:	200005bc 	.long	0x200005bc
+
+Disassembly of section .text.CORETHandler:
+
+000057ac <CORETHandler>:
+    57ac:	1460      	nie
+    57ae:	1462      	ipush
+    57b0:	14d1      	push      	r4, r15
+    57b2:	1077      	lrw      	r3, 0x20000064	// 580c <CORETHandler+0x60>
+    57b4:	3400      	movi      	r4, 0
+    57b6:	9360      	ld.w      	r3, (r3, 0x0)
+    57b8:	b386      	st.w      	r4, (r3, 0x18)
+    57ba:	1076      	lrw      	r3, 0x20000524	// 5810 <CORETHandler+0x64>
+    57bc:	8360      	ld.b      	r3, (r3, 0x0)
+    57be:	3b41      	cmpnei      	r3, 1
+    57c0:	0820      	bt      	0x5800	// 5800 <CORETHandler+0x54>
+    57c2:	e3fffd85 	bsr      	0x52cc	// 52cc <TK_Scan_Start>
+    57c6:	e3fffd93 	bsr      	0x52ec	// 52ec <TK_Keymap_prog>
+    57ca:	e3fffe51 	bsr      	0x546c	// 546c <TK_overflow_predict>
+    57ce:	e3fffedd 	bsr      	0x5588	// 5588 <TK_Baseline_tracking>
+    57d2:	e3ffffc3 	bsr      	0x5758	// 5758 <TK_result_prog>
+    57d6:	1070      	lrw      	r3, 0x200005c4	// 5814 <CORETHandler+0x68>
+    57d8:	9360      	ld.w      	r3, (r3, 0x0)
+    57da:	3b40      	cmpnei      	r3, 0
+    57dc:	0c12      	bf      	0x5800	// 5800 <CORETHandler+0x54>
+    57de:	106f      	lrw      	r3, 0x200002f0	// 5818 <CORETHandler+0x6c>
+    57e0:	9340      	ld.w      	r2, (r3, 0x0)
+    57e2:	3a40      	cmpnei      	r2, 0
+    57e4:	0c0e      	bf      	0x5800	// 5800 <CORETHandler+0x54>
+    57e6:	106e      	lrw      	r3, 0x200005bc	// 581c <CORETHandler+0x70>
+    57e8:	3064      	movi      	r0, 100
+    57ea:	9320      	ld.w      	r1, (r3, 0x0)
+    57ec:	2100      	addi      	r1, 1
+    57ee:	b320      	st.w      	r1, (r3, 0x0)
+    57f0:	9320      	ld.w      	r1, (r3, 0x0)
+    57f2:	7c80      	mult      	r2, r0
+    57f4:	6448      	cmphs      	r2, r1
+    57f6:	0805      	bt      	0x5800	// 5800 <CORETHandler+0x54>
+    57f8:	104a      	lrw      	r2, 0x200005a7	// 5820 <CORETHandler+0x74>
+    57fa:	3101      	movi      	r1, 1
+    57fc:	a220      	st.b      	r1, (r2, 0x0)
+    57fe:	b380      	st.w      	r4, (r3, 0x0)
+    5800:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    5804:	9880      	ld.w      	r4, (r14, 0x0)
+    5806:	1402      	addi      	r14, r14, 8
+    5808:	1463      	ipop
+    580a:	1461      	nir
+    580c:	20000064 	.long	0x20000064
+    5810:	20000524 	.long	0x20000524
+    5814:	200005c4 	.long	0x200005c4
+    5818:	200002f0 	.long	0x200002f0
+    581c:	200005bc 	.long	0x200005bc
+    5820:	200005a7 	.long	0x200005a7
+
+Disassembly of section .text.std_clk_calib:
+
+00005824 <std_clk_calib>:
+    5824:	14d4      	push      	r4-r7, r15
+    5826:	142d      	subi      	r14, r14, 52
+    5828:	3201      	movi      	r2, 1
+    582a:	03ce      	lrw      	r6, 0x2000005c	// 5a6c <std_clk_calib+0x248>
+    582c:	6cc3      	mov      	r3, r0
+    582e:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    5832:	9640      	ld.w      	r2, (r6, 0x0)
+    5834:	9247      	ld.w      	r2, (r2, 0x1c)
+    5836:	7488      	zextb      	r2, r2
+    5838:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    583c:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5840:	3a40      	cmpnei      	r2, 0
+    5842:	0c08      	bf      	0x5852	// 5852 <std_clk_calib+0x2e>
+    5844:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5848:	3a42      	cmpnei      	r2, 2
+    584a:	0c04      	bf      	0x5852	// 5852 <std_clk_calib+0x2e>
+    584c:	3000      	movi      	r0, 0
+    584e:	140d      	addi      	r14, r14, 52
+    5850:	1494      	pop      	r4-r7, r15
+    5852:	0397      	lrw      	r4, 0x2000000c	// 5a70 <std_clk_calib+0x24c>
+    5854:	3209      	movi      	r2, 9
+    5856:	9400      	ld.w      	r0, (r4, 0x0)
+    5858:	3b40      	cmpnei      	r3, 0
+    585a:	b041      	st.w      	r2, (r0, 0x4)
+    585c:	0857      	bt      	0x590a	// 590a <std_clk_calib+0xe6>
+    585e:	3307      	movi      	r3, 7
+    5860:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5864:	037b      	lrw      	r3, 0x2dc6c00	// 5a74 <std_clk_calib+0x250>
+    5866:	b863      	st.w      	r3, (r14, 0xc)
+    5868:	3380      	movi      	r3, 128
+    586a:	4362      	lsli      	r3, r3, 2
+    586c:	b867      	st.w      	r3, (r14, 0x1c)
+    586e:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    5872:	74cc      	zextb      	r3, r3
+    5874:	b062      	st.w      	r3, (r0, 0x8)
+    5876:	037e      	lrw      	r3, 0xffff	// 5a78 <std_clk_calib+0x254>
+    5878:	b063      	st.w      	r3, (r0, 0xc)
+    587a:	3201      	movi      	r2, 1
+    587c:	3101      	movi      	r1, 1
+    587e:	03bf      	lrw      	r5, 0x20000014	// 5a7c <std_clk_calib+0x258>
+    5880:	e3ffedd8 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+    5884:	95e0      	ld.w      	r7, (r5, 0x0)
+    5886:	137f      	lrw      	r3, 0xbe9c0005	// 5a80 <std_clk_calib+0x25c>
+    5888:	b760      	st.w      	r3, (r7, 0x0)
+    588a:	135f      	lrw      	r2, 0x30010	// 5a84 <std_clk_calib+0x260>
+    588c:	3300      	movi      	r3, 0
+    588e:	b762      	st.w      	r3, (r7, 0x8)
+    5890:	b743      	st.w      	r2, (r7, 0xc)
+    5892:	32d8      	movi      	r2, 216
+    5894:	b745      	st.w      	r2, (r7, 0x14)
+    5896:	974f      	ld.w      	r2, (r7, 0x3c)
+    5898:	3aa2      	bseti      	r2, 2
+    589a:	b74f      	st.w      	r2, (r7, 0x3c)
+    589c:	9803      	ld.w      	r0, (r14, 0xc)
+    589e:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    58a2:	327d      	movi      	r2, 125
+    58a4:	2100      	addi      	r1, 1
+    58a6:	7c48      	mult      	r1, r2
+    58a8:	b861      	st.w      	r3, (r14, 0x4)
+    58aa:	e3fff5b3 	bsr      	0x4410	// 4410 <__udivsi3>
+    58ae:	b804      	st.w      	r0, (r14, 0x10)
+    58b0:	32fa      	movi      	r2, 250
+    58b2:	9824      	ld.w      	r1, (r14, 0x10)
+    58b4:	4242      	lsli      	r2, r2, 2
+    58b6:	6448      	cmphs      	r2, r1
+    58b8:	0bca      	bt      	0x584c	// 584c <std_clk_calib+0x28>
+    58ba:	9844      	ld.w      	r2, (r14, 0x10)
+    58bc:	3178      	movi      	r1, 120
+    58be:	9804      	ld.w      	r0, (r14, 0x10)
+    58c0:	b840      	st.w      	r2, (r14, 0x0)
+    58c2:	e3fff5a7 	bsr      	0x4410	// 4410 <__udivsi3>
+    58c6:	9840      	ld.w      	r2, (r14, 0x0)
+    58c8:	6082      	subu      	r2, r0
+    58ca:	b845      	st.w      	r2, (r14, 0x14)
+    58cc:	9804      	ld.w      	r0, (r14, 0x10)
+    58ce:	3178      	movi      	r1, 120
+    58d0:	9844      	ld.w      	r2, (r14, 0x10)
+    58d2:	b840      	st.w      	r2, (r14, 0x0)
+    58d4:	e3fff59e 	bsr      	0x4410	// 4410 <__udivsi3>
+    58d8:	9840      	ld.w      	r2, (r14, 0x0)
+    58da:	6008      	addu      	r0, r2
+    58dc:	b806      	st.w      	r0, (r14, 0x18)
+    58de:	c0807020 	psrclr      	ie
+    58e2:	9640      	ld.w      	r2, (r6, 0x0)
+    58e4:	9254      	ld.w      	r2, (r2, 0x50)
+    58e6:	b848      	st.w      	r2, (r14, 0x20)
+    58e8:	9861      	ld.w      	r3, (r14, 0x4)
+    58ea:	9440      	ld.w      	r2, (r4, 0x0)
+    58ec:	b260      	st.w      	r3, (r2, 0x0)
+    58ee:	b761      	st.w      	r3, (r7, 0x4)
+    58f0:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    58f4:	3b40      	cmpnei      	r3, 0
+    58f6:	083e      	bt      	0x5972	// 5972 <std_clk_calib+0x14e>
+    58f8:	e3ffed4e 	bsr      	0x3394	// 3394 <LPT_Soft_Reset>
+    58fc:	9400      	ld.w      	r0, (r4, 0x0)
+    58fe:	e3ffed6f 	bsr      	0x33dc	// 33dc <BT_Soft_Reset>
+    5902:	c1807420 	psrset      	ee, ie
+    5906:	3001      	movi      	r0, 1
+    5908:	07a3      	br      	0x584e	// 584e <std_clk_calib+0x2a>
+    590a:	3b41      	cmpnei      	r3, 1
+    590c:	0806      	bt      	0x5918	// 5918 <std_clk_calib+0xf4>
+    590e:	3303      	movi      	r3, 3
+    5910:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5914:	127d      	lrw      	r3, 0x16e3600	// 5a88 <std_clk_calib+0x264>
+    5916:	07a8      	br      	0x5866	// 5866 <std_clk_calib+0x42>
+    5918:	3b42      	cmpnei      	r3, 2
+    591a:	0806      	bt      	0x5926	// 5926 <std_clk_calib+0x102>
+    591c:	3301      	movi      	r3, 1
+    591e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5922:	127b      	lrw      	r3, 0xb71b00	// 5a8c <std_clk_calib+0x268>
+    5924:	07a1      	br      	0x5866	// 5866 <std_clk_calib+0x42>
+    5926:	3b43      	cmpnei      	r3, 3
+    5928:	0806      	bt      	0x5934	// 5934 <std_clk_calib+0x110>
+    592a:	3300      	movi      	r3, 0
+    592c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5930:	1278      	lrw      	r3, 0x5b8d80	// 5a90 <std_clk_calib+0x26c>
+    5932:	079a      	br      	0x5866	// 5866 <std_clk_calib+0x42>
+    5934:	3b44      	cmpnei      	r3, 4
+    5936:	0809      	bt      	0x5948	// 5948 <std_clk_calib+0x124>
+    5938:	3300      	movi      	r3, 0
+    593a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    593e:	1276      	lrw      	r3, 0x54c720	// 5a94 <std_clk_calib+0x270>
+    5940:	b863      	st.w      	r3, (r14, 0xc)
+    5942:	3380      	movi      	r3, 128
+    5944:	4369      	lsli      	r3, r3, 9
+    5946:	0793      	br      	0x586c	// 586c <std_clk_calib+0x48>
+    5948:	3b45      	cmpnei      	r3, 5
+    594a:	0806      	bt      	0x5956	// 5956 <std_clk_calib+0x132>
+    594c:	3300      	movi      	r3, 0
+    594e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5952:	1272      	lrw      	r3, 0x3ffed0	// 5a98 <std_clk_calib+0x274>
+    5954:	07f6      	br      	0x5940	// 5940 <std_clk_calib+0x11c>
+    5956:	3b46      	cmpnei      	r3, 6
+    5958:	0806      	bt      	0x5964	// 5964 <std_clk_calib+0x140>
+    595a:	3300      	movi      	r3, 0
+    595c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5960:	126f      	lrw      	r3, 0x1fff68	// 5a9c <std_clk_calib+0x278>
+    5962:	07ef      	br      	0x5940	// 5940 <std_clk_calib+0x11c>
+    5964:	3b47      	cmpnei      	r3, 7
+    5966:	0b84      	bt      	0x586e	// 586e <std_clk_calib+0x4a>
+    5968:	3300      	movi      	r3, 0
+    596a:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    596e:	126d      	lrw      	r3, 0x1ffb8	// 5aa0 <std_clk_calib+0x27c>
+    5970:	07e8      	br      	0x5940	// 5940 <std_clk_calib+0x11c>
+    5972:	9560      	ld.w      	r3, (r5, 0x0)
+    5974:	3101      	movi      	r1, 1
+    5976:	9440      	ld.w      	r2, (r4, 0x0)
+    5978:	b321      	st.w      	r1, (r3, 0x4)
+    597a:	b220      	st.w      	r1, (r2, 0x0)
+    597c:	3100      	movi      	r1, 0
+    597e:	b327      	st.w      	r1, (r3, 0x1c)
+    5980:	3004      	movi      	r0, 4
+    5982:	b225      	st.w      	r1, (r2, 0x14)
+    5984:	932e      	ld.w      	r1, (r3, 0x38)
+    5986:	6840      	and      	r1, r0
+    5988:	3940      	cmpnei      	r1, 0
+    598a:	0ffd      	bf      	0x5984	// 5984 <std_clk_calib+0x160>
+    598c:	9225      	ld.w      	r1, (r2, 0x14)
+    598e:	b82a      	st.w      	r1, (r14, 0x28)
+    5990:	3100      	movi      	r1, 0
+    5992:	b310      	st.w      	r0, (r3, 0x40)
+    5994:	b327      	st.w      	r1, (r3, 0x1c)
+    5996:	3004      	movi      	r0, 4
+    5998:	b225      	st.w      	r1, (r2, 0x14)
+    599a:	932e      	ld.w      	r1, (r3, 0x38)
+    599c:	6840      	and      	r1, r0
+    599e:	3940      	cmpnei      	r1, 0
+    59a0:	0ffd      	bf      	0x599a	// 599a <std_clk_calib+0x176>
+    59a2:	9225      	ld.w      	r1, (r2, 0x14)
+    59a4:	b82b      	st.w      	r1, (r14, 0x2c)
+    59a6:	3100      	movi      	r1, 0
+    59a8:	b310      	st.w      	r0, (r3, 0x40)
+    59aa:	b327      	st.w      	r1, (r3, 0x1c)
+    59ac:	3004      	movi      	r0, 4
+    59ae:	b225      	st.w      	r1, (r2, 0x14)
+    59b0:	932e      	ld.w      	r1, (r3, 0x38)
+    59b2:	6840      	and      	r1, r0
+    59b4:	3940      	cmpnei      	r1, 0
+    59b6:	0ffd      	bf      	0x59b0	// 59b0 <std_clk_calib+0x18c>
+    59b8:	9225      	ld.w      	r1, (r2, 0x14)
+    59ba:	b82c      	st.w      	r1, (r14, 0x30)
+    59bc:	b310      	st.w      	r0, (r3, 0x40)
+    59be:	982b      	ld.w      	r1, (r14, 0x2c)
+    59c0:	980c      	ld.w      	r0, (r14, 0x30)
+    59c2:	6040      	addu      	r1, r0
+    59c4:	b829      	st.w      	r1, (r14, 0x24)
+    59c6:	9829      	ld.w      	r1, (r14, 0x24)
+    59c8:	4921      	lsri      	r1, r1, 1
+    59ca:	b829      	st.w      	r1, (r14, 0x24)
+    59cc:	3100      	movi      	r1, 0
+    59ce:	b321      	st.w      	r1, (r3, 0x4)
+    59d0:	b220      	st.w      	r1, (r2, 0x0)
+    59d2:	b327      	st.w      	r1, (r3, 0x1c)
+    59d4:	b225      	st.w      	r1, (r2, 0x14)
+    59d6:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    59da:	3b42      	cmpnei      	r3, 2
+    59dc:	9849      	ld.w      	r2, (r14, 0x24)
+    59de:	082c      	bt      	0x5a36	// 5a36 <std_clk_calib+0x212>
+    59e0:	1171      	lrw      	r3, 0x7ff	// 5aa4 <std_clk_calib+0x280>
+    59e2:	648c      	cmphs      	r3, r2
+    59e4:	0c03      	bf      	0x59ea	// 59ea <std_clk_calib+0x1c6>
+    59e6:	3300      	movi      	r3, 0
+    59e8:	040f      	br      	0x5a06	// 5a06 <std_clk_calib+0x1e2>
+    59ea:	9849      	ld.w      	r2, (r14, 0x24)
+    59ec:	9866      	ld.w      	r3, (r14, 0x18)
+    59ee:	648c      	cmphs      	r3, r2
+    59f0:	080e      	bt      	0x5a0c	// 5a0c <std_clk_calib+0x1e8>
+    59f2:	9868      	ld.w      	r3, (r14, 0x20)
+    59f4:	9847      	ld.w      	r2, (r14, 0x1c)
+    59f6:	60ca      	subu      	r3, r2
+    59f8:	b868      	st.w      	r3, (r14, 0x20)
+    59fa:	32fe      	movi      	r2, 254
+    59fc:	9868      	ld.w      	r3, (r14, 0x20)
+    59fe:	4248      	lsli      	r2, r2, 8
+    5a00:	68c8      	and      	r3, r2
+    5a02:	3b40      	cmpnei      	r3, 0
+    5a04:	0812      	bt      	0x5a28	// 5a28 <std_clk_calib+0x204>
+    5a06:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5a0a:	0721      	br      	0x584c	// 584c <std_clk_calib+0x28>
+    5a0c:	9849      	ld.w      	r2, (r14, 0x24)
+    5a0e:	9865      	ld.w      	r3, (r14, 0x14)
+    5a10:	64c8      	cmphs      	r2, r3
+    5a12:	0829      	bt      	0x5a64	// 5a64 <std_clk_calib+0x240>
+    5a14:	9868      	ld.w      	r3, (r14, 0x20)
+    5a16:	9847      	ld.w      	r2, (r14, 0x1c)
+    5a18:	60c8      	addu      	r3, r2
+    5a1a:	b868      	st.w      	r3, (r14, 0x20)
+    5a1c:	33fe      	movi      	r3, 254
+    5a1e:	9848      	ld.w      	r2, (r14, 0x20)
+    5a20:	4368      	lsli      	r3, r3, 8
+    5a22:	688c      	and      	r2, r3
+    5a24:	64ca      	cmpne      	r2, r3
+    5a26:	0fe0      	bf      	0x59e6	// 59e6 <std_clk_calib+0x1c2>
+    5a28:	9660      	ld.w      	r3, (r6, 0x0)
+    5a2a:	9848      	ld.w      	r2, (r14, 0x20)
+    5a2c:	b354      	st.w      	r2, (r3, 0x50)
+    5a2e:	3001      	movi      	r0, 1
+    5a30:	e3ffef32 	bsr      	0x3894	// 3894 <delay_nms>
+    5a34:	075e      	br      	0x58f0	// 58f0 <std_clk_calib+0xcc>
+    5a36:	9866      	ld.w      	r3, (r14, 0x18)
+    5a38:	648c      	cmphs      	r3, r2
+    5a3a:	0809      	bt      	0x5a4c	// 5a4c <std_clk_calib+0x228>
+    5a3c:	9868      	ld.w      	r3, (r14, 0x20)
+    5a3e:	9847      	ld.w      	r2, (r14, 0x1c)
+    5a40:	60ca      	subu      	r3, r2
+    5a42:	b868      	st.w      	r3, (r14, 0x20)
+    5a44:	32ff      	movi      	r2, 255
+    5a46:	9868      	ld.w      	r3, (r14, 0x20)
+    5a48:	4250      	lsli      	r2, r2, 16
+    5a4a:	07db      	br      	0x5a00	// 5a00 <std_clk_calib+0x1dc>
+    5a4c:	9849      	ld.w      	r2, (r14, 0x24)
+    5a4e:	9865      	ld.w      	r3, (r14, 0x14)
+    5a50:	64c8      	cmphs      	r2, r3
+    5a52:	0809      	bt      	0x5a64	// 5a64 <std_clk_calib+0x240>
+    5a54:	9868      	ld.w      	r3, (r14, 0x20)
+    5a56:	9847      	ld.w      	r2, (r14, 0x1c)
+    5a58:	60c8      	addu      	r3, r2
+    5a5a:	b868      	st.w      	r3, (r14, 0x20)
+    5a5c:	33ff      	movi      	r3, 255
+    5a5e:	9848      	ld.w      	r2, (r14, 0x20)
+    5a60:	4370      	lsli      	r3, r3, 16
+    5a62:	07e0      	br      	0x5a22	// 5a22 <std_clk_calib+0x1fe>
+    5a64:	3300      	movi      	r3, 0
+    5a66:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5a6a:	07e2      	br      	0x5a2e	// 5a2e <std_clk_calib+0x20a>
+    5a6c:	2000005c 	.long	0x2000005c
+    5a70:	2000000c 	.long	0x2000000c
+    5a74:	02dc6c00 	.long	0x02dc6c00
+    5a78:	0000ffff 	.long	0x0000ffff
+    5a7c:	20000014 	.long	0x20000014
+    5a80:	be9c0005 	.long	0xbe9c0005
+    5a84:	00030010 	.long	0x00030010
+    5a88:	016e3600 	.long	0x016e3600
+    5a8c:	00b71b00 	.long	0x00b71b00
+    5a90:	005b8d80 	.long	0x005b8d80
+    5a94:	0054c720 	.long	0x0054c720
+    5a98:	003ffed0 	.long	0x003ffed0
+    5a9c:	001fff68 	.long	0x001fff68
+    5aa0:	0001ffb8 	.long	0x0001ffb8
+    5aa4:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/RF_T1F_CR_V01_20241016.map b/Source/Lst/RF_T1F_CR_V01_20241016.map
new file mode 100644
index 0000000..05ae38e
--- /dev/null
+++ b/Source/Lst/RF_T1F_CR_V01_20241016.map
@@ -0,0 +1,2408 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          327040 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         161
+  Section header string table index: 158
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 002f12 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00002f14 003f14 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00002f4c 003f4c 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00002fc0 003fc0 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        0000300c 00400c 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        0000303c 00403c 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        000030c4 0040c4 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        000030ec 0040ec 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00003128 004128 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        0000313c 00413c 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00003154 004154 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00003174 004174 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00003190 004190 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        000031ac 0041ac 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        000031ec 0041ec 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        000031f8 0041f8 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        0000321c 00421c 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        0000324c 00424c 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        0000332c 00432c 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00003340 004340 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        0000334e 00434e 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00003356 004356 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        0000335e 00435e 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00003374 004374 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00003384 004384 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00003394 004394 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        000033a8 0043a8 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        000033b8 0043b8 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        000033d4 0043d4 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        000033dc 0043dc 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        000033e6 0043e6 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        000033fe 0043fe 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        0000342a 00442a 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00003430 004430 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00003444 004444 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00003454 004454 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        000034f4 0044f4 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00003508 004508 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        0000354c 00454c 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        00003560 004560 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00003614 004614 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00003624 004624 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00003634 004634 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        00003650 004650 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        00003668 004668 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        00003680 004680 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        00003698 004698 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000036b4 0046b4 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        000036d0 0046d0 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000037bc 0047bc 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        000037cc 0047cc 000010 00  AX  0   0  4
+  [52] .text.UARTTransmi PROGBITS        000037dc 0047dc 00001e 00  AX  0   0  2
+  [53] .text.EPT_Stop    PROGBITS        000037fc 0047fc 000028 00  AX  0   0  4
+  [54] .text.startup.mai PROGBITS        00003824 004824 000070 00  AX  0   0  4
+  [55] .text.delay_nms   PROGBITS        00003894 004894 00002c 00  AX  0   0  2
+  [56] .text.GPT0_CONFIG PROGBITS        000038c0 0048c0 000094 00  AX  0   0  4
+  [57] .text.BT_CONFIG   PROGBITS        00003954 004954 000060 00  AX  0   0  4
+  [58] .text.SYSCON_CONF PROGBITS        000039b4 0049b4 000062 00  AX  0   0  2
+  [59] .text.APT32F102_i PROGBITS        00003a18 004a18 000050 00  AX  0   0  4
+  [60] .text.SYSCONIntHa PROGBITS        00003a68 004a68 0000f0 00  AX  0   0  4
+  [61] .text.IFCIntHandl PROGBITS        00003b58 004b58 000068 00  AX  0   0  4
+  [62] .text.ADCIntHandl PROGBITS        00003bc0 004bc0 000068 00  AX  0   0  4
+  [63] .text.EPT0IntHand PROGBITS        00003c28 004c28 0001ac 00  AX  0   0  4
+  [64] .text.WWDTHandler PROGBITS        00003dd4 004dd4 000034 00  AX  0   0  4
+  [65] .text.GPT0IntHand PROGBITS        00003e08 004e08 000080 00  AX  0   0  4
+  [66] .text.RTCIntHandl PROGBITS        00003e88 004e88 000070 00  AX  0   0  4
+  [67] .text.UART0IntHan PROGBITS        00003ef8 004ef8 00003c 00  AX  0   0  4
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+  [110] .text.RC522_Reset PROGBITS        000047c8 0057c8 000016 00  AX  0   0  2
+  [111] .text.M500PcdConf PROGBITS        000047de 0057de 00007e 00  AX  0   0  2
+  [112] .text.RC522_Init  PROGBITS        0000485c 00585c 00009c 00  AX  0   0  4
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+  [117] .text.Detect_SPI_ PROGBITS        00004bdc 005bdc 00006c 00  AX  0   0  4
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+  [142] .text.std_clk_cal PROGBITS        00005824 006824 000284 00  AX  0   0  4
+  [143] .RomCode          PROGBITS        00005aa8 0080a0 000000 00   W  0   0  1
+  [144] .rodata           PROGBITS        00005aa8 006aa8 000c6c 00   A  0   0  4
+  [145] .data             PROGBITS        20000000 008000 0000a0 00  WA  0   0  4
+  [146] .bss              NOBITS          200000a0 0080a0 0006c0 00  WA  0   0  4
+  [147] .csky.attributes  CSKY_ATTRIBUTES 00000000 0080a0 000022 00      0   0  1
+  [148] .comment          PROGBITS        00000000 0080c2 000042 01  MS  0   0  1
+  [149] .csky_stack_size  PROGBITS        00000000 008110 0008cc 00      0   0 16
+  [150] .debug_line       PROGBITS        00000000 0089dc 0039da 00      0   0  1
+  [151] .debug_info       PROGBITS        00000000 00c3b6 02bf39 00      0   0  1
+  [152] .debug_abbrev     PROGBITS        00000000 0382ef 0028a3 00      0   0  1
+  [153] .debug_aranges    PROGBITS        00000000 03ab98 000cc8 00      0   0  8
+  [154] .debug_ranges     PROGBITS        00000000 03b860 000bf8 00      0   0  1
+  [155] .debug_str        PROGBITS        00000000 03c458 008893 01  MS  0   0  1
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+  [157] .debug_loc        PROGBITS        00000000 046af8 002f33 00      0   0  1
+  [158] .shstrtab         STRTAB          00000000 04f08a 000cf3 00      0   0  1
+  [159] .symtab           SYMTAB          00000000 049a2c 004150 10     160 718  4
+  [160] .strtab           STRTAB          00000000 04db7c 00150e 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x06714 0x06714 R E 0x1000
+  LOAD           0x008000 0x20000000 0x00006714 0x000a0 0x00760 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__modsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_Reset .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.Detect_SPI_task .text.RLY_Light_Ctrl .text.KEY1_LONG_PRESS_RELEASE_Handler .text.LogicCtrl_Init .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.BackLight_Task .text.Detect_WIFI_Task .text.Led_Task .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__modsi3) for __modsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_rc522.o(.text.RC522_Reset) for RC522_Reset
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) for Detect_SPI_task
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.BackLight_Task) for BackLight_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) for Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	__dtostr.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	__dtostr.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	__dtostr.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	__dtostr.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	__dtostr.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_eq_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_lt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_eq_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_lt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to snprintf_required.o(.text) for __cskyvprintfsnprintf
+	snprintf_required.o(.text) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	vsnprintf_required.o(.text) refers to memcpy_fast.o(.text) for memcpy
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	vsnprintf_required.o(.text) refers to __v2_printfDFHLlMOPpSSsWp.o(.text) for __v2_printf
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _udivdi3.o(.text) for __udivdi3
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _umoddi3.o(.text) for __umoddi3
+	__dtostr.o(.text) refers to __dtostr.o(.text) for __GI___dtostr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to __dtostr.o(.text) for __dtostr
+	__dtostr.o(.text) refers to __isnan.o(.text) for __isnan
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strlen_fast.o(.text) for strlen
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strcpy_fast.o(.text) for strcpy
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strchr.o(.text) for strchr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strerror.o(.text) for strerror
+	__dtostr.o(.text) refers to __isinf.o(.text) for __isinf
+	__dtostr.o(.text) refers to _eq_df.o(.text) for __eqdf2
+	__dtostr.o(.text) refers to _lt_df.o(.text) for __ltdf2
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (491 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2912 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
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+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3106 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3423 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3168 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4136 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3539 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3655 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4855 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4963 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7612 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2861 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
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+	Removing .data(strchr.o), (0 bytes).
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+======================================================================
+
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+	$d                                 0x0000520c               0  .text.TK_Sampling_prog
+	$d                                 0x0000521c               0  .text.TKEYIntHandler
+	$t                                 0x0000521c               0  .text.TKEYIntHandler
+	$d                                 0x00005298               0  .text.TKEYIntHandler
+	$d                                 0x000052a4               0  .text.get_key_number
+	$t                                 0x000052a4               0  .text.get_key_number
+	$d                                 0x000052c8               0  .text.get_key_number
+	$d                                 0x000052cc               0  .text.TK_Scan_Start
+	$t                                 0x000052cc               0  .text.TK_Scan_Start
+	$d                                 0x000052e4               0  .text.TK_Scan_Start
+	$d                                 0x000052ec               0  .text.TK_Keymap_prog
+	$t                                 0x000052ec               0  .text.TK_Keymap_prog
+	$d                                 0x00005434               0  .text.TK_Keymap_prog
+	$d                                 0x0000546c               0  .text.TK_overflow_predict
+	$t                                 0x0000546c               0  .text.TK_overflow_predict
+	$d                                 0x00005554               0  .text.TK_overflow_predict
+	$d                                 0x00005588               0  .text.TK_Baseline_tracking
+	$t                                 0x00005588               0  .text.TK_Baseline_tracking
+	$d                                 0x0000572c               0  .text.TK_Baseline_tracking
+	$d                                 0x00005758               0  .text.TK_result_prog
+	$t                                 0x00005758               0  .text.TK_result_prog
+	$d                                 0x00005798               0  .text.TK_result_prog
+	$d                                 0x000057ac               0  .text.CORETHandler
+	$t                                 0x000057ac               0  .text.CORETHandler
+	$d                                 0x0000580c               0  .text.CORETHandler
+	$d                                 0x00005824               0  .text.std_clk_calib
+	$t                                 0x00005824               0  .text.std_clk_calib
+	$d                                 0x00005a6c               0  .text.std_clk_calib
+	bp                                 0x00005aa8      O       16  .rodata
+	dp_l                               0x00005ab8      O       16  .rodata
+	dp_h                               0x00005ac8      O       16  .rodata
+	blanks.1847                        0x00005bec      O       16  .rodata
+	zeroes.1848                        0x00005bfc      O       16  .rodata
+	CSWTCH.1                           0x00005c0c      O      576  .rodata
+	NUM.6035                           0x200000b0      O        1  .bss
+	test_tick.5957                     0x200002e0      O        4  .bss
+	card_tick.5956                     0x200002e4      O        4  .bss
+	head_handle                        0x200002e8      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
+	__fixunsdfsi                       0x00000d10      F       56  .text
+	__adddf3                           0x0000101c      F       46  .text
+	__subdf3                           0x0000104c      F       54  .text
+	__muldf3                           0x00001084      F      564  .text
+	__divdf3                           0x000012b8      F      340  .text
+	__gtdf2                            0x0000140c      F       60  .text
+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__cskyvprintfsnprintf              0x00001964      F       32  .text
+	__cskyvprintfvsnprintf             0x000019c2      F       90  .text
+	__memset_fast                      0x00001a1c    w F      136  .text
+	memset                             0x00001a1c    w F      136  .text
+	__memcpy_fast                      0x00001aa4    w F      100  .text
+	memcpy                             0x00001aa4    w F      100  .text
+	__v2_printf                        0x00001b3c      F     1828  .text
+	__v2_printf$DFHLlMOPpSSsWp         0x00001b3c      F     1828  .text
+	__udivdi3                          0x00002260      F      940  .text
+	__umoddi3                          0x0000260c      F      928  .text
+	__GI___dtostr                      0x000029d2      F      826  .text
+	__dtostr                           0x000029d2      F      826  .text
+	__isnan                            0x00002d0c      F       44  .text
+	__strlen_fast                      0x00002d38    w F       82  .text
+	strlen                             0x00002d38    w F       82  .text
+	__strcpy_fast                      0x00002d8c    w F      176  .text
+	strcpy                             0x00002d8c    w F      176  .text
+	__GI_strchr                        0x00002e3c      F       18  .text
+	strchr                             0x00002e3c    w F       18  .text
+	__GI_strerror                      0x00002e50      F       28  .text
+	strerror                           0x00002e50      F       28  .text
+	__isinf                            0x00002e6c      F       48  .text
+	__eqdf2                            0x00002e9c      F       58  .text
+	__ltdf2                            0x00002ed8      F       58  .text
+	__main                             0x00002f14      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00002fc0      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x0000300c      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x0000303c      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x000030c4      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x000030ec      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00003128      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x0000313c      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00003154      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00003174      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00003190      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x000031ac      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x000031ec      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x000031f8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x0000321c      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x0000324c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x0000332c      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00003340      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x0000334e      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00003356      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x0000335e      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x00003374      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00003384      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00003394      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x000033a8      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x000033b8      F       28  .text.BT_DeInit
+	BT_Start                           0x000033d4      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x000033dc      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000033e6      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000033fe      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x0000342a      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00003430      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00003444      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00003454      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000034f4      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00003508      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x0000354c      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x00003560      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00003614      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00003624      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00003634      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x00003650      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00003668      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x00003680      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x00003698      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000036b4      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x000036d0      F      236  .text.UART_IO_Init
+	UARTInit                           0x000037bc      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x000037cc      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x000037dc      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000037fc      F       40  .text.EPT_Stop
+	main                               0x00003824      F      112  .text.startup.main
+	delay_nms                          0x00003894      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000038c0      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x00003954      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000039b4      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00003a18      F       80  .text.APT32F102_init
+	SYSCONIntHandler                   0x00003a68      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00003b58      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00003bc0      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00003c28      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00003dd4      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00003e08      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00003e88      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00003ef8      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00003f34      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00003f70      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x00004004      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x000040ec      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00004140      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00004170      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x000041a0      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x000041e8      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00004244      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x000042a4      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x000042d8      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00004324      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00004388      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x0000438a      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x00004392      F        8  .text.Trap3Handler
+	Trap2Handler                       0x0000439a      F        8  .text.Trap2Handler
+	Trap1Handler                       0x000043a2      F        8  .text.Trap1Handler
+	Trap0Handler                       0x000043aa      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x000043b2      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x000043ba      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x000043c2      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x000043ca      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x000043d2      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x000043da      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x000043e2      F        8  .text.I2CIntHandler
+	__divsi3                           0x000043ec      F       36  .text.__divsi3
+	__udivsi3                          0x00004410      F       36  .text.__udivsi3
+	__modsi3                           0x00004434      F       36  .text.__modsi3
+	__umodsi3                          0x00004458      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x0000447c      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x00004484      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x0000455c      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x000045c0      F      152  .text.Dbg_Println
+	RC522_Delay                        0x00004658      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x0000466c      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x000046c0      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x000046f8      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00004728      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x00004774      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x0000478c      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000047a6      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x000047bc      F       12  .text.RC522_PcdAntennaOff
+	RC522_Reset                        0x000047c8      F       22  .text.RC522_Reset
+	RC522_Init                         0x0000485c      F      156  .text.RC522_Init
+	RC522_PcdComMF522                  0x000048f8      F      314  .text.RC522_PcdComMF522
+	RC522_PcdRequest                   0x00004a34      F      136  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00004abc      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x00004b30      F      172  .text.Card_Read_TasK
+	Detect_SPI_task                    0x00004bdc      F      108  .text.Detect_SPI_task
+	RLY_Light_Ctrl                     0x00004c48      F       80  .text.RLY_Light_Ctrl
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00004c98      F      104  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	LogicCtrl_Init                     0x00004d00      F       52  .text.LogicCtrl_Init
+	LogicCtrl_Task                     0x00004d34      F      100  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00004d98      F      132  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x00004e1c      F      192  .text.LogicCtrl_NoRF_Task
+	BackLight_Task                     0x00004edc      F       36  .text.BackLight_Task
+	Detect_WIFI_Task                   0x00004f00      F      148  .text.Detect_WIFI_Task
+	Led_Task                           0x00004f94      F      120  .text.Led_Task
+	button_init                        0x0000500c      F       58  .text.button_init
+	button_attach                      0x00005046      F       10  .text.button_attach
+	button_handler                     0x00005050      F      288  .text.button_handler
+	button_start                       0x00005170      F       36  .text.button_start
+	button_ticks                       0x00005194      F       28  .text.button_ticks
+	read_button_GPIO                   0x000051b0      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x000051c4      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x0000521c      F      136  .text.TKEYIntHandler
+	get_key_number                     0x000052a4      F       40  .text.get_key_number
+	TK_Scan_Start                      0x000052cc      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000052ec      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x0000546c      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00005588      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x00005758      F       84  .text.TK_result_prog
+	CORETHandler                       0x000057ac      F      120  .text.CORETHandler
+	std_clk_calib                      0x00005824      F      644  .text.std_clk_calib
+	__thenan_df                        0x00005ad8      O       20  .rodata
+	__clz_tab                          0x00005aec      O      256  .rodata
+	_end_rodata                        0x00006714               0  .rodata
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+	UART1                              0x2000003c      O        4  .data
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+	neg_build_bounce                   0x20000094      O        1  .data
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+	scan_step_temp                     0x2000009c      O        1  .data
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+	_bss_start                         0x200000a0               0  .bss
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+	test_state                         0x200000ad      O        1  .bss
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+	RS485_Comming                      0x200000bc      O        4  .bss
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+	RS485_Comm_Start                   0x200000c4      O        4  .bss
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+	SysTick_Now                        0x200000cc      O        4  .bss
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+	SysTick_Diff                       0x200000d4      O        4  .bss
+	Dbg_Buffer                         0x200000d8      O      512  .bss
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+	Tim_Flag                           0x200002dc      O        4  .bss
+	Press_debounce_data                0x200002ec      O        1  .bss
+	TK_Lowpower_mode                   0x200002ed      O        1  .bss
+	TK_Lowpower_level                  0x200002ee      O        1  .bss
+	TK_longpress_time                  0x200002f0      O        4  .bss
+	Release_debounce_data              0x200002f4      O        1  .bss
+	Key_mode                           0x200002f5      O        1  .bss
+	TK_icon                            0x200002f6      O       34  .bss
+	MultiTimes_Filter                  0x20000318      O        1  .bss
+	Base_Speed                         0x20000319      O        1  .bss
+	TK_IO_ENABLE                       0x2000031c      O        4  .bss
+	Valid_Key_Num                      0x20000320      O        1  .bss
+	TK_senprd                          0x20000322      O       34  .bss
+	TK_Wakeup_level                    0x20000344      O        1  .bss
+	TK_Triggerlevel                    0x20000346      O       34  .bss
+	TK_EC_LEVEL                        0x20000368      O        2  .bss
+	TK_FVR_LEVEL                       0x2000036a      O        2  .bss
+	TK_BaseCnt                         0x2000036c      O        4  .bss
+	TK_PSEL_MODE                       0x20000370      O        2  .bss
+	R_CMPB_BUF                         0x20000374      O        4  .bss
+	R_CMPA_BUF                         0x20000378      O        4  .bss
+	R_SIORX_buf                        0x2000037c      O       40  .bss
+	g_uart                             0x200003a4      O      115  .bss
+	CardInfo                           0x20000418      O       52  .bss
+	g_read                             0x2000044c      O        8  .bss
+	KEY1                               0x20000454      O       48  .bss
+	dm_in                              0x20000484      O        9  .bss
+	baseline_data0                     0x20000490      O       34  .bss
+	TK_Postive_build2                  0x200004b2      O       17  .bss
+	Key_Map1                           0x200004c4      O        4  .bss
+	offset_data2_abs                   0x200004c8      O       34  .bss
+	scan_f                             0x200004ea      O        1  .bss
+	offset_data1_abs                   0x200004ec      O       34  .bss
+	Release_debounce0                  0x2000050e      O       17  .bss
+	Key_Map0                           0x20000520      O        4  .bss
+	bsae_over_f                        0x20000524      O        1  .bss
+	scan_cnt                           0x20000526      O        2  .bss
+	Press_debounce0                    0x20000528      O       17  .bss
+	offset_data0                       0x2000053a      O       34  .bss
+	sampling_data1                     0x2000055c      O       34  .bss
+	Key_Map2                           0x20000580      O        4  .bss
+	Release_debounce1                  0x20000584      O       17  .bss
+	tk_overflow_f                      0x20000595      O        1  .bss
+	TK_Negtive_build2                  0x20000596      O       17  .bss
+	base_update_f                      0x200005a7      O        1  .bss
+	TK_Postive_build1                  0x200005a8      O       17  .bss
+	time_cnt                           0x200005bc      O        4  .bss
+	lpt_scan_pend_cnt                  0x200005c0      O        2  .bss
+	TK_track_cnt                       0x200005c2      O        1  .bss
+	Key_Map                            0x200005c4      O        4  .bss
+	baseline_data1                     0x200005c8      O       34  .bss
+	TK_Postive_build0                  0x200005ea      O       17  .bss
+	sampling_data2                     0x200005fc      O       34  .bss
+	offset_data1                       0x2000061e      O       34  .bss
+	TK_ovrdect_cnt                     0x20000640      O        1  .bss
+	Press_debounce2                    0x20000641      O       17  .bss
+	TK_Negtive_build1                  0x20000652      O       17  .bss
+	tk_num                             0x20000663      O        1  .bss
+	TK_Negtive_build0                  0x20000664      O       17  .bss
+	Press_debounce1                    0x20000675      O       17  .bss
+	Release_debounce2                  0x20000686      O       17  .bss
+	r_Key_Map_Temp                     0x20000698      O        4  .bss
+	tk_seque                           0x2000069c      O       17  .bss
+	scan_step                          0x200006ad      O        1  .bss
+	baseline_data2                     0x200006ae      O       34  .bss
+	tk_sampling_max                    0x200006d0      O       34  .bss
+	offset_data0_abs                   0x200006f2      O       34  .bss
+	offset_data2                       0x20000714      O       34  .bss
+	sampling_data0                     0x20000736      O       34  .bss
+	errno                              0x20000758      O        4  .bss
+	__malloc_lock                      0x2000075c      O        4  .bss
+	_ebss                              0x20000760               0  .bss
+	_end                               0x20000760               0  .bss
+	end                                0x20000760               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00006714, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1012  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1020  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1026  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1033  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1044  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1049  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1056  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1063  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1070  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1077  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1084  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1091  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1098  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1105  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1119  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1126  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1133  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1139  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1146  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1153  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000020   Code   RO       1174  .text          	snprintf_required.o
+    0x00001984   0x00000098   Code   RO       1181  .text          	vsnprintf_required.o
+    0x00001a1c   0x00000088   Code   RO       1188  .text          	memset_fast.o
+    0x00001aa4   0x00000064   Code   RO       1193  .text          	memcpy_fast.o
+    0x00001b08   0x00000758   Code   RO       1351  .text          	__v2_printfDFHLlMOPpSSsWp.o
+    0x00002260   0x000003ac   Code   RO       1410  .text          	_udivdi3.o
+    0x0000260c   0x000003a0   Code   RO       1417  .text          	_umoddi3.o
+    0x000029ac   0x00000360   Code   RO       1438  .text          	__dtostr.o
+    0x00002d0c   0x0000002c   Code   RO       1446  .text          	__isnan.o
+    0x00002d38   0x00000052   Code   RO       1458  .text          	strlen_fast.o
+    0x00002d8a   0x00000002   PAD
+    0x00002d8c   0x000000b0   Code   RO       1463  .text          	strcpy_fast.o
+    0x00002e3c   0x00000012   Code   RO       1468  .text          	strchr.o
+    0x00002e4e   0x00000002   PAD
+    0x00002e50   0x0000001c   Code   RO       1473  .text          	strerror.o
+    0x00002e6c   0x00000030   Code   RO       1481  .text          	__isinf.o
+    0x00002e9c   0x0000003a   Code   RO       1487  .text          	_eq_df.o
+    0x00002ed6   0x00000002   PAD
+    0x00002ed8   0x0000003a   Code   RO       1494  .text          	_lt_df.o
+    0x00002f14   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00002f4c   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00002fc0   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x0000300c   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x0000303c   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x000030c4   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x000030ec   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00003128   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x0000313c   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003154   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003174   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00003190   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031ac   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x000031ec   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031f8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000321c   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000324c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x0000332c   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00003340   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x0000334e   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00003356   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x0000335e   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00003374   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00003384   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00003394   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x000033a8   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x000033b8   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x000033d4   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x000033dc   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x000033e6   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000033fe   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x0000342a   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00003430   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00003444   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00003454   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x000034f4   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003508   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000354c   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003560   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003614   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x00003624   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00003634   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x00003650   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003668   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003680   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003698   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036b4   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036d0   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000037bc   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x000037cc   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x000037dc   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x000037fc   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x00003824   0x00000070   Code   RO        690  .text.startup.main	Obj/main.o
+    0x00003894   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000038c0   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x00003954   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x000039b4   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00003a18   0x00000050   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00003a68   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00003b58   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x00003bc0   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00003c28   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003dd4   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00003e08   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003e88   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00003ef8   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00003f34   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00003f70   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00004004   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x000040ec   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00004140   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00004170   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x000041a0   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x000041e8   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00004244   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x000042a4   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x000042d8   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00004324   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00004388   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x0000438a   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x00004392   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x0000439a   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x000043a2   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x000043aa   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x000043b2   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x000043ba   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x000043c2   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x000043ca   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x000043d2   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x000043da   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x000043e2   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x000043ec   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00004410   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x00004434   0x00000024   Code   RO        787  .text.__modsi3 	Obj/drivers_apt32f102.o
+    0x00004458   0x00000024   Code   RO        788  .text.__umodsi3	Obj/drivers_apt32f102.o
+    0x0000447c   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00004484   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x0000455c   0x00000064   Code   RO        822  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x000045c0   0x00000098   Code   RO        827  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00004658   0x00000012   Code   RO        848  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x0000466c   0x00000054   Code   RO        849  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x000046c0   0x00000038   Code   RO        850  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x000046f8   0x00000030   Code   RO        851  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00004728   0x0000004c   Code   RO        852  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x00004774   0x00000018   Code   RO        853  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x0000478c   0x0000001a   Code   RO        854  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000047a6   0x00000016   Code   RO        855  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x000047bc   0x0000000c   Code   RO        856  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x000047c8   0x00000016   Code   RO        857  .text.RC522_Reset	Obj/SYSTEM_rc522.o
+    0x000047de   0x0000007e   Code   RO        859  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x0000485c   0x0000009c   Code   RO        861  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x000048f8   0x0000013a   Code   RO        862  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x00004a34   0x00000088   Code   RO        868  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x00004abc   0x00000074   Code   RO        869  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x00004b30   0x000000ac   Code   RO        870  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x00004bdc   0x0000006c   Code   RO        871  .text.Detect_SPI_task	Obj/SYSTEM_rc522.o
+    0x00004c48   0x00000050   Code   RO        890  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x00004c98   0x00000068   Code   RO        891  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x00004d00   0x00000034   Code   RO        892  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004d34   0x00000064   Code   RO        893  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004d98   0x00000084   Code   RO        896  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004e1c   0x000000c0   Code   RO        897  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004edc   0x00000024   Code   RO        898  .text.BackLight_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004f00   0x00000094   Code   RO        899  .text.Detect_WIFI_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004f94   0x00000078   Code   RO        901  .text.Led_Task 	Obj/SYSTEM_logic_ctrl.o
+    0x0000500c   0x0000003a   Code   RO        919  .text.button_init	Obj/SYSTEM_button.o
+    0x00005046   0x0000000a   Code   RO        920  .text.button_attach	Obj/SYSTEM_button.o
+    0x00005050   0x00000120   Code   RO        922  .text.button_handler	Obj/SYSTEM_button.o
+    0x00005170   0x00000024   Code   RO        923  .text.button_start	Obj/SYSTEM_button.o
+    0x00005194   0x0000001c   Code   RO        925  .text.button_ticks	Obj/SYSTEM_button.o
+    0x000051b0   0x00000014   Code   RO        926  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x000051c4   0x00000058   Code   RO        958  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000521c   0x00000088   Code   RO        962  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x000052a4   0x00000028   Code   RO        963  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x000052cc   0x00000020   Code   RO        965  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x000052ec   0x00000180   Code   RO        966  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000546c   0x0000011c   Code   RO        967  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005588   0x000001d0   Code   RO        968  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005758   0x00000054   Code   RO        969  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x000057ac   0x00000078   Code   RO        970  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005824   0x00000284   Code   RO        992  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00005aa8   0x00000030   Data   RO       1015  .rodata        	pow.o
+    0x00005ad8   0x00000014   Data   RO       1115  .rodata        	_thenan_df.o
+    0x00005aec   0x00000100   Data   RO       1163  .rodata        	_clz.o
+    0x00005bec   0x00000020   Data   RO       1354  .rodata        	__v2_printfDFHLlMOPpSSsWp.o
+    0x00005c0c   0x00000240   Data   RO       1476  .rodata        	strerror.o
+    0x00005e4c   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x00005e57   0x0000003e   Data   RO        831  .rodata.str1.1 	Obj/SYSTEM_uart.o
+    0x00005e95   0x00000063   Data   RO        872  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x00005ef8   0x00000068   Data   RO        902  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+    0x00005f60   0x00000022   Data   RO       1355  .rodata.str1.1 	__v2_printfDFHLlMOPpSSsWp.o
+    0x00005f82   0x00000008   Data   RO       1441  .rodata.str1.1 	__dtostr.o
+    0x00005f8a   0x00000787   Data   RO       1477  .rodata.str1.1 	strerror.o
+    0x00006711   0x00000003   PAD
+
+    Region RAM (Base: 0x20000000, Size: 0x00000760, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000004   Data   RW        819  .data          	Obj/SYSTEM_uart.o
+    0x2000006c   0x00000031   Data   RW        949  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x2000009d   0x00000003   PAD
+    0x200000a0   0x0000000e   Zero   RW        689  .bss           	Obj/main.o
+    0x200000ae   0x00000002   PAD
+    0x200000b0   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000bc   0x0000021c   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200002d8   0x00000004   Zero   RW        847  .bss           	Obj/SYSTEM_rc522.o
+    0x200002dc   0x0000000c   Zero   RW        888  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200002e8   0x00000004   Zero   RW        918  .bss           	Obj/SYSTEM_button.o
+    0x200002ec   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000372   0x00000002   PAD
+    0x20000374   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x200003a4   0x00000073   Zero   RW        844  COMMON         	Obj/SYSTEM_uart.o
+    0x20000417   0x00000001   PAD
+    0x20000418   0x00000034   Zero   RW        885  COMMON         	Obj/SYSTEM_rc522.o
+    0x2000044c   0x00000041   Zero   RW        915  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x2000048d   0x00000003   PAD
+    0x20000490   0x000002c8   Zero   RW        988  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000758   0x00000008   Zero   RW       1431  COMMON         	minilibc_init.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        287   Obj/arch_crt0.o
+         56          0          0          0        823   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
+        328          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        426          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+        112         11          0        148      11008   Obj/main.o
+        466          0          0          0      16155   Obj/mcu_initial.o
+       2434          0          0         60      14290   Obj/mcu_interrupt.o
+        144          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        468         62          4        655      13107   Obj/SYSTEM_uart.o
+       1516         99          0         56      15994   Obj/SYSTEM_rc522.o
+        964        104          0         77      12180   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11568   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       9302        276        108       1000     241298   Object Totals
+         10          3          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16339   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16339   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+        940          0          0          0          0   _udivdi3.o
+        928          0          0          0          0   _umoddi3.o
+	------------------------------------------------------------
+       5040        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         32          0          0          0          0   snprintf_required.o
+        152          0          0          0          0   vsnprintf_required.o
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+       1880         66          0          0          0   __v2_printfDFHLlMOPpSSsWp.o
+          0          0          0          8          0   minilibc_init.o
+          0          0          0          0          0   critical.o
+        864          8          0          0          0   __dtostr.o
+         44          0          0          0          0   __isnan.o
+          0          0          0          0          0   stdinit.o
+         82          0          0          0          0   strlen_fast.o
+        176          0          0          0          0   strcpy_fast.o
+         18          0          0          0          0   strchr.o
+         28       2503          0          0          0   strerror.o
+         48          0          0          0          0   __isinf.o
+	------------------------------------------------------------
+       3560       2577          0          8          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         58          0          0          0          0   _eq_df.o
+         58          0          0          0          0   _lt_df.o
+	------------------------------------------------------------
+        116          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      23192       3180        160       1728     266312   Grand Totals
+      23192       3180        160       1728     266312   Elf Image Totals
+      23192       3180        160          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				26372 (  25.75kB)
+Total	RW	Size (RW Data + ZI Data)			1888 (  1.84kB)
+Total	ROM	Size (Code + RO Data + RW Data)		26532 (  25.91kB)
+
+======================================================================
diff --git a/Source/Lst/RLY_10V485_V01_20250625.asm b/Source/Lst/RLY_10V485_V01_20250625.asm
new file mode 100644
index 0000000..c4e4fcb
--- /dev/null
+++ b/Source/Lst/RLY_10V485_V01_20250625.asm
@@ -0,0 +1,12537 @@
+
+.//Obj/RLY_10V485_V01_20250625.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	0000318e 	.long	0x0000318e
+       8:	0000317e 	.long	0x0000317e
+       c:	00000184 	.long	0x00000184
+      10:	00003186 	.long	0x00003186
+      14:	00003144 	.long	0x00003144
+      18:	00000184 	.long	0x00000184
+      1c:	00003176 	.long	0x00003176
+      20:	0000316e 	.long	0x0000316e
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	00003166 	.long	0x00003166
+      44:	0000315e 	.long	0x0000315e
+      48:	00003156 	.long	0x00003156
+      4c:	0000314e 	.long	0x0000314e
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00003146 	.long	0x00003146
+      80:	00004944 	.long	0x00004944
+      84:	00002838 	.long	0x00002838
+      88:	00002928 	.long	0x00002928
+      8c:	00002990 	.long	0x00002990
+      90:	000029f8 	.long	0x000029f8
+      94:	00000184 	.long	0x00000184
+      98:	00002ba4 	.long	0x00002ba4
+      9c:	00002f20 	.long	0x00002f20
+      a0:	00002f50 	.long	0x00002f50
+      a4:	00002bd8 	.long	0x00002bd8
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00002c58 	.long	0x00002c58
+      b4:	00002cc8 	.long	0x00002cc8
+      b8:	00002d04 	.long	0x00002d04
+      bc:	00002d98 	.long	0x00002d98
+      c0:	00000184 	.long	0x00000184
+      c4:	0000319e 	.long	0x0000319e
+      c8:	00000184 	.long	0x00000184
+      cc:	00002de4 	.long	0x00002de4
+      d0:	00002ecc 	.long	0x00002ecc
+      d4:	00002f80 	.long	0x00002f80
+      d8:	00002fc8 	.long	0x00002fc8
+      dc:	00002fe8 	.long	0x00002fe8
+      e0:	00003196 	.long	0x00003196
+      e4:	000043b4 	.long	0x000043b4
+      e8:	00003054 	.long	0x00003054
+      ec:	00000184 	.long	0x00000184
+      f0:	00003088 	.long	0x00003088
+      f4:	000030d4 	.long	0x000030d4
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x1a90	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x26ac	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00001a90 	.long	0x00001a90
+     198:	00000160 	.long	0x00000160
+     19c:	000026ac 	.long	0x000026ac
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e000071f 	bsr      	0x1034	// 1034 <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e0000705 	bsr      	0x1064	// 1064 <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000081a 	bsr      	0x12d0	// 12d0 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006dc 	bsr      	0x109c	// 109c <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007d0 	bsr      	0x12d0	// 12d0 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000068b 	bsr      	0x1064	// 1064 <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e0000656 	bsr      	0x1064	// 1064 <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e000066c 	bsr      	0x109c	// 109c <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000664 	bsr      	0x109c	// 109c <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e000065c 	bsr      	0x109c	// 109c <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000063a 	bsr      	0x1064	// 1064 <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000652 	bsr      	0x109c	// 109c <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000630 	bsr      	0x1064	// 1064 <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000644 	bsr      	0x109c	// 109c <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e000063e 	bsr      	0x109c	// 109c <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000063a 	bsr      	0x109c	// 109c <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e0000618 	bsr      	0x1064	// 1064 <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005f8 	bsr      	0x1034	// 1034 <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e000060a 	bsr      	0x1064	// 1064 <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e0000604 	bsr      	0x1064	// 1064 <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005f3 	bsr      	0x1064	// 1064 <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e000060b 	bsr      	0x109c	// 109c <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e0000603 	bsr      	0x109c	// 109c <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005c9 	bsr      	0x1034	// 1034 <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005f5 	bsr      	0x109c	// 109c <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005b7 	bsr      	0x1034	// 1034 <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005d7 	bsr      	0x109c	// 109c <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005cc 	bsr      	0x109c	// 109c <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x4c40	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000058a 	bsr      	0x1064	// 1064 <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000056a 	bsr      	0x1034	// 1034 <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006b2 	bsr      	0x12d0	// 12d0 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00004c40 	.long	0x00004c40
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000055a 	bsr      	0x109c	// 109c <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000054b 	bsr      	0x109c	// 109c <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e0000529 	bsr      	0x1064	// 1064 <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000521 	bsr      	0x1064	// 1064 <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000051b 	bsr      	0x1064	// 1064 <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000533 	bsr      	0x109c	// 109c <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000511 	bsr      	0x1064	// 1064 <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e0000529 	bsr      	0x109c	// 109c <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000521 	bsr      	0x109c	// 109c <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e0000519 	bsr      	0x109c	// 109c <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004df 	bsr      	0x1034	// 1034 <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e000050f 	bsr      	0x109c	// 109c <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004d5 	bsr      	0x1034	// 1034 <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e0000505 	bsr      	0x109c	// 109c <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004cb 	bsr      	0x1034	// 1034 <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004fb 	bsr      	0x109c	// 109c <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004c1 	bsr      	0x1034	// 1034 <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004f1 	bsr      	0x109c	// 109c <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004b7 	bsr      	0x1034	// 1034 <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004e3 	bsr      	0x109c	// 109c <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004dd 	bsr      	0x109c	// 109c <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e00004a1 	bsr      	0x1034	// 1034 <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004d1 	bsr      	0x109c	// 109c <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e0000499 	bsr      	0x1034	// 1034 <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004c5 	bsr      	0x109c	// 109c <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000048b 	bsr      	0x1034	// 1034 <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e0000487 	bsr      	0x1034	// 1034 <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004b4 	bsr      	0x109c	// 109c <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000490 	bsr      	0x1064	// 1064 <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e000048c 	bsr      	0x1064	// 1064 <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e0000486 	bsr      	0x1064	// 1064 <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e000049e 	bsr      	0x109c	// 109c <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e0000496 	bsr      	0x109c	// 109c <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e000045c 	bsr      	0x1034	// 1034 <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000454 	bsr      	0x1034	// 1034 <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000481 	bsr      	0x109c	// 109c <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e000045d 	bsr      	0x1064	// 1064 <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e0000457 	bsr      	0x1064	// 1064 <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e000046f 	bsr      	0x109c	// 109c <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e0000467 	bsr      	0x109c	// 109c <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e000042d 	bsr      	0x1034	// 1034 <__adddf3>
+     7de:	01db      	lrw      	r6, 0x4c40	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e0000426 	bsr      	0x1034	// 1034 <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000673 	bsr      	0x14d8	// 14d8 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x4c40	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000413 	bsr      	0x1034	// 1034 <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e000040f 	bsr      	0x1034	// 1034 <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e000040b 	bsr      	0x1034	// 1034 <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e000041d 	bsr      	0x1064	// 1064 <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e0000419 	bsr      	0x1064	// 1064 <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000415 	bsr      	0x1064	// 1064 <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003ec 	bsr      	0x1034	// 1034 <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003fc 	bsr      	0x1064	// 1064 <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005d6 	bsr      	0x1424	// 1424 <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003cc 	bsr      	0x1064	// 1064 <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003ac 	bsr      	0x1034	// 1034 <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003da 	bsr      	0x109c	// 109c <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003b6 	bsr      	0x1064	// 1064 <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003b0 	bsr      	0x1064	// 1064 <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003c8 	bsr      	0x109c	// 109c <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003c0 	bsr      	0x109c	// 109c <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e0000386 	bsr      	0x1034	// 1034 <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e000037e 	bsr      	0x1034	// 1034 <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000390 	bsr      	0x1064	// 1064 <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000038a 	bsr      	0x1064	// 1064 <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e000039e 	bsr      	0x109c	// 109c <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e0000398 	bsr      	0x109c	// 109c <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e0000378 	bsr      	0x1064	// 1064 <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000390 	bsr      	0x109c	// 109c <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e0000358 	bsr      	0x1034	// 1034 <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e0000388 	bsr      	0x109c	// 109c <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e0000368 	bsr      	0x1064	// 1064 <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000380 	bsr      	0x109c	// 109c <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e0000348 	bsr      	0x1034	// 1034 <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e0000378 	bsr      	0x109c	// 109c <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e0000356 	bsr      	0x1064	// 1064 <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000036a 	bsr      	0x109c	// 109c <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000345 	bsr      	0x1064	// 1064 <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000475 	bsr      	0x12d0	// 12d0 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000353 	bsr      	0x109c	// 109c <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000031b 	bsr      	0x1034	// 1034 <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e000032d 	bsr      	0x1064	// 1064 <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e0000329 	bsr      	0x1064	// 1064 <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000323 	bsr      	0x1064	// 1064 <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000321 	bsr      	0x109c	// 109c <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002fb 	bsr      	0x1064	// 1064 <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000511 	bsr      	0x149c	// 149c <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00004c40 	.long	0x00004c40
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e000027f 	bsr      	0x109c	// 109c <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000245 	bsr      	0x1034	// 1034 <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e0000248 	bsr      	0x1064	// 1064 <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000037a 	bsr      	0x12d0	// 12d0 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_sqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	7446      	sextb      	r1, r1
+     d08:	4121      	lsli      	r1, r1, 1
+     d0a:	63c4      	addu      	r15, r1
+     d0c:	9820      	ld.w      	r1, (r14, 0x0)
+     d0e:	1401      	addi      	r14, r14, 4
+     d10:	783c      	jmp      	r15
+	...
+
+00000d14 <___gnu_csky_case_uqi>:
+     d14:	1421      	subi      	r14, r14, 4
+     d16:	b820      	st.w      	r1, (r14, 0x0)
+     d18:	6c7f      	mov      	r1, r15
+     d1a:	6040      	addu      	r1, r0
+     d1c:	8120      	ld.b      	r1, (r1, 0x0)
+     d1e:	4121      	lsli      	r1, r1, 1
+     d20:	63c4      	addu      	r15, r1
+     d22:	9820      	ld.w      	r1, (r14, 0x0)
+     d24:	1401      	addi      	r14, r14, 4
+     d26:	783c      	jmp      	r15
+
+00000d28 <__fixunsdfsi>:
+     d28:	14d2      	push      	r4-r5, r15
+     d2a:	3200      	movi      	r2, 0
+     d2c:	106c      	lrw      	r3, 0x41e00000	// d5c <__fixunsdfsi+0x34>
+     d2e:	6d43      	mov      	r5, r0
+     d30:	6d07      	mov      	r4, r1
+     d32:	e0000397 	bsr      	0x1460	// 1460 <__gedf2>
+     d36:	38df      	btsti      	r0, 31
+     d38:	0c06      	bf      	0xd44	// d44 <__fixunsdfsi+0x1c>
+     d3a:	6c17      	mov      	r0, r5
+     d3c:	6c53      	mov      	r1, r4
+     d3e:	e0000405 	bsr      	0x1548	// 1548 <__fixdfsi>
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	3200      	movi      	r2, 0
+     d46:	1066      	lrw      	r3, 0x41e00000	// d5c <__fixunsdfsi+0x34>
+     d48:	6c17      	mov      	r0, r5
+     d4a:	6c53      	mov      	r1, r4
+     d4c:	e000018c 	bsr      	0x1064	// 1064 <__subdf3>
+     d50:	e00003fc 	bsr      	0x1548	// 1548 <__fixdfsi>
+     d54:	3380      	movi      	r3, 128
+     d56:	4378      	lsli      	r3, r3, 24
+     d58:	600c      	addu      	r0, r3
+     d5a:	1492      	pop      	r4-r5, r15
+     d5c:	41e00000 	.long	0x41e00000
+
+00000d60 <_fpadd_parts>:
+     d60:	14c4      	push      	r4-r7
+     d62:	142a      	subi      	r14, r14, 40
+     d64:	9060      	ld.w      	r3, (r0, 0x0)
+     d66:	3b01      	cmphsi      	r3, 2
+     d68:	6dcb      	mov      	r7, r2
+     d6a:	0c67      	bf      	0xe38	// e38 <_fpadd_parts+0xd8>
+     d6c:	9140      	ld.w      	r2, (r1, 0x0)
+     d6e:	3a01      	cmphsi      	r2, 2
+     d70:	0c66      	bf      	0xe3c	// e3c <_fpadd_parts+0xdc>
+     d72:	3b44      	cmpnei      	r3, 4
+     d74:	0cde      	bf      	0xf30	// f30 <_fpadd_parts+0x1d0>
+     d76:	3a44      	cmpnei      	r2, 4
+     d78:	0c62      	bf      	0xe3c	// e3c <_fpadd_parts+0xdc>
+     d7a:	3a42      	cmpnei      	r2, 2
+     d7c:	0cb7      	bf      	0xeea	// eea <_fpadd_parts+0x18a>
+     d7e:	3b42      	cmpnei      	r3, 2
+     d80:	0c5e      	bf      	0xe3c	// e3c <_fpadd_parts+0xdc>
+     d82:	9043      	ld.w      	r2, (r0, 0xc)
+     d84:	9064      	ld.w      	r3, (r0, 0x10)
+     d86:	9082      	ld.w      	r4, (r0, 0x8)
+     d88:	91a2      	ld.w      	r5, (r1, 0x8)
+     d8a:	b842      	st.w      	r2, (r14, 0x8)
+     d8c:	b863      	st.w      	r3, (r14, 0xc)
+     d8e:	9143      	ld.w      	r2, (r1, 0xc)
+     d90:	9164      	ld.w      	r3, (r1, 0x10)
+     d92:	b840      	st.w      	r2, (r14, 0x0)
+     d94:	b861      	st.w      	r3, (r14, 0x4)
+     d96:	5c75      	subu      	r3, r4, r5
+     d98:	3bdf      	btsti      	r3, 31
+     d9a:	6c8f      	mov      	r2, r3
+     d9c:	08d2      	bt      	0xf40	// f40 <_fpadd_parts+0x1e0>
+     d9e:	363f      	movi      	r6, 63
+     da0:	6499      	cmplt      	r6, r2
+     da2:	0c50      	bf      	0xe42	// e42 <_fpadd_parts+0xe2>
+     da4:	6515      	cmplt      	r5, r4
+     da6:	0cbf      	bf      	0xf24	// f24 <_fpadd_parts+0x1c4>
+     da8:	3200      	movi      	r2, 0
+     daa:	3300      	movi      	r3, 0
+     dac:	b840      	st.w      	r2, (r14, 0x0)
+     dae:	b861      	st.w      	r3, (r14, 0x4)
+     db0:	9061      	ld.w      	r3, (r0, 0x4)
+     db2:	9141      	ld.w      	r2, (r1, 0x4)
+     db4:	648e      	cmpne      	r3, r2
+     db6:	0c78      	bf      	0xea6	// ea6 <_fpadd_parts+0x146>
+     db8:	3b40      	cmpnei      	r3, 0
+     dba:	0cad      	bf      	0xf14	// f14 <_fpadd_parts+0x1b4>
+     dbc:	9800      	ld.w      	r0, (r14, 0x0)
+     dbe:	9821      	ld.w      	r1, (r14, 0x4)
+     dc0:	9842      	ld.w      	r2, (r14, 0x8)
+     dc2:	9863      	ld.w      	r3, (r14, 0xc)
+     dc4:	6400      	cmphs      	r0, r0
+     dc6:	600b      	subc      	r0, r2
+     dc8:	604f      	subc      	r1, r3
+     dca:	39df      	btsti      	r1, 31
+     dcc:	08bd      	bt      	0xf46	// f46 <_fpadd_parts+0x1e6>
+     dce:	3300      	movi      	r3, 0
+     dd0:	b761      	st.w      	r3, (r7, 0x4)
+     dd2:	b782      	st.w      	r4, (r7, 0x8)
+     dd4:	6c83      	mov      	r2, r0
+     dd6:	6cc7      	mov      	r3, r1
+     dd8:	b703      	st.w      	r0, (r7, 0xc)
+     dda:	b724      	st.w      	r1, (r7, 0x10)
+     ddc:	3000      	movi      	r0, 0
+     dde:	3100      	movi      	r1, 0
+     de0:	2800      	subi      	r0, 1
+     de2:	2900      	subi      	r1, 1
+     de4:	6401      	cmplt      	r0, r0
+     de6:	6009      	addc      	r0, r2
+     de8:	604d      	addc      	r1, r3
+     dea:	038f      	lrw      	r4, 0xfffffff	// 1028 <_fpadd_parts+0x2c8>
+     dec:	6450      	cmphs      	r4, r1
+     dee:	0c67      	bf      	0xebc	// ebc <_fpadd_parts+0x15c>
+     df0:	6506      	cmpne      	r1, r4
+     df2:	0cfd      	bf      	0xfec	// fec <_fpadd_parts+0x28c>
+     df4:	3000      	movi      	r0, 0
+     df6:	9722      	ld.w      	r1, (r7, 0x8)
+     df8:	2801      	subi      	r0, 2
+     dfa:	2900      	subi      	r1, 1
+     dfc:	03d4      	lrw      	r6, 0xfffffff	// 1028 <_fpadd_parts+0x2c8>
+     dfe:	b802      	st.w      	r0, (r14, 0x8)
+     e00:	b8e0      	st.w      	r7, (r14, 0x0)
+     e02:	0403      	br      	0xe08	// e08 <_fpadd_parts+0xa8>
+     e04:	6596      	cmpne      	r5, r6
+     e06:	0c83      	bf      	0xf0c	// f0c <_fpadd_parts+0x1ac>
+     e08:	4301      	lsli      	r0, r3, 1
+     e0a:	4a9f      	lsri      	r4, r2, 31
+     e0c:	6d00      	or      	r4, r0
+     e0e:	42a1      	lsli      	r5, r2, 1
+     e10:	6c97      	mov      	r2, r5
+     e12:	6cd3      	mov      	r3, r4
+     e14:	3500      	movi      	r5, 0
+     e16:	3400      	movi      	r4, 0
+     e18:	2c00      	subi      	r4, 1
+     e1a:	2d00      	subi      	r5, 1
+     e1c:	6511      	cmplt      	r4, r4
+     e1e:	6109      	addc      	r4, r2
+     e20:	614d      	addc      	r5, r3
+     e22:	6558      	cmphs      	r6, r5
+     e24:	6c07      	mov      	r0, r1
+     e26:	2900      	subi      	r1, 1
+     e28:	0bee      	bt      	0xe04	// e04 <_fpadd_parts+0xa4>
+     e2a:	98e0      	ld.w      	r7, (r14, 0x0)
+     e2c:	b743      	st.w      	r2, (r7, 0xc)
+     e2e:	b764      	st.w      	r3, (r7, 0x10)
+     e30:	3303      	movi      	r3, 3
+     e32:	b702      	st.w      	r0, (r7, 0x8)
+     e34:	b760      	st.w      	r3, (r7, 0x0)
+     e36:	6c1f      	mov      	r0, r7
+     e38:	140a      	addi      	r14, r14, 40
+     e3a:	1484      	pop      	r4-r7
+     e3c:	6c07      	mov      	r0, r1
+     e3e:	140a      	addi      	r14, r14, 40
+     e40:	1484      	pop      	r4-r7
+     e42:	3b20      	cmplti      	r3, 1
+     e44:	088c      	bt      	0xf5c	// f5c <_fpadd_parts+0x1fc>
+     e46:	3300      	movi      	r3, 0
+     e48:	2b1f      	subi      	r3, 32
+     e4a:	60c8      	addu      	r3, r2
+     e4c:	3bdf      	btsti      	r3, 31
+     e4e:	b866      	st.w      	r3, (r14, 0x18)
+     e50:	08bb      	bt      	0xfc6	// fc6 <_fpadd_parts+0x266>
+     e52:	98a1      	ld.w      	r5, (r14, 0x4)
+     e54:	714d      	lsr      	r5, r3
+     e56:	b8a4      	st.w      	r5, (r14, 0x10)
+     e58:	3500      	movi      	r5, 0
+     e5a:	b8a5      	st.w      	r5, (r14, 0x14)
+     e5c:	9866      	ld.w      	r3, (r14, 0x18)
+     e5e:	3bdf      	btsti      	r3, 31
+     e60:	3500      	movi      	r5, 0
+     e62:	3600      	movi      	r6, 0
+     e64:	08ad      	bt      	0xfbe	// fbe <_fpadd_parts+0x25e>
+     e66:	3201      	movi      	r2, 1
+     e68:	708c      	lsl      	r2, r3
+     e6a:	6d8b      	mov      	r6, r2
+     e6c:	3200      	movi      	r2, 0
+     e6e:	3300      	movi      	r3, 0
+     e70:	2a00      	subi      	r2, 1
+     e72:	2b00      	subi      	r3, 1
+     e74:	6489      	cmplt      	r2, r2
+     e76:	6095      	addc      	r2, r5
+     e78:	60d9      	addc      	r3, r6
+     e7a:	98a0      	ld.w      	r5, (r14, 0x0)
+     e7c:	98c1      	ld.w      	r6, (r14, 0x4)
+     e7e:	6948      	and      	r5, r2
+     e80:	698c      	and      	r6, r3
+     e82:	6c97      	mov      	r2, r5
+     e84:	6cdb      	mov      	r3, r6
+     e86:	6c8c      	or      	r2, r3
+     e88:	3a40      	cmpnei      	r2, 0
+     e8a:	3500      	movi      	r5, 0
+     e8c:	6155      	addc      	r5, r5
+     e8e:	6c97      	mov      	r2, r5
+     e90:	3300      	movi      	r3, 0
+     e92:	98a4      	ld.w      	r5, (r14, 0x10)
+     e94:	98c5      	ld.w      	r6, (r14, 0x14)
+     e96:	6d48      	or      	r5, r2
+     e98:	6d8c      	or      	r6, r3
+     e9a:	9061      	ld.w      	r3, (r0, 0x4)
+     e9c:	9141      	ld.w      	r2, (r1, 0x4)
+     e9e:	648e      	cmpne      	r3, r2
+     ea0:	b8a0      	st.w      	r5, (r14, 0x0)
+     ea2:	b8c1      	st.w      	r6, (r14, 0x4)
+     ea4:	0b8a      	bt      	0xdb8	// db8 <_fpadd_parts+0x58>
+     ea6:	b761      	st.w      	r3, (r7, 0x4)
+     ea8:	9800      	ld.w      	r0, (r14, 0x0)
+     eaa:	9821      	ld.w      	r1, (r14, 0x4)
+     eac:	9842      	ld.w      	r2, (r14, 0x8)
+     eae:	9863      	ld.w      	r3, (r14, 0xc)
+     eb0:	6489      	cmplt      	r2, r2
+     eb2:	6081      	addc      	r2, r0
+     eb4:	60c5      	addc      	r3, r1
+     eb6:	b782      	st.w      	r4, (r7, 0x8)
+     eb8:	b743      	st.w      	r2, (r7, 0xc)
+     eba:	b764      	st.w      	r3, (r7, 0x10)
+     ebc:	3103      	movi      	r1, 3
+     ebe:	b720      	st.w      	r1, (r7, 0x0)
+     ec0:	123b      	lrw      	r1, 0x1fffffff	// 102c <_fpadd_parts+0x2cc>
+     ec2:	64c4      	cmphs      	r1, r3
+     ec4:	0810      	bt      	0xee4	// ee4 <_fpadd_parts+0x184>
+     ec6:	439f      	lsli      	r4, r3, 31
+     ec8:	4a01      	lsri      	r0, r2, 1
+     eca:	6c10      	or      	r0, r4
+     ecc:	3500      	movi      	r5, 0
+     ece:	3401      	movi      	r4, 1
+     ed0:	4b21      	lsri      	r1, r3, 1
+     ed2:	6890      	and      	r2, r4
+     ed4:	68d4      	and      	r3, r5
+     ed6:	6c80      	or      	r2, r0
+     ed8:	6cc4      	or      	r3, r1
+     eda:	b743      	st.w      	r2, (r7, 0xc)
+     edc:	b764      	st.w      	r3, (r7, 0x10)
+     ede:	9762      	ld.w      	r3, (r7, 0x8)
+     ee0:	2300      	addi      	r3, 1
+     ee2:	b762      	st.w      	r3, (r7, 0x8)
+     ee4:	6c1f      	mov      	r0, r7
+     ee6:	140a      	addi      	r14, r14, 40
+     ee8:	1484      	pop      	r4-r7
+     eea:	3b42      	cmpnei      	r3, 2
+     eec:	0ba6      	bt      	0xe38	// e38 <_fpadd_parts+0xd8>
+     eee:	b760      	st.w      	r3, (r7, 0x0)
+     ef0:	9061      	ld.w      	r3, (r0, 0x4)
+     ef2:	b761      	st.w      	r3, (r7, 0x4)
+     ef4:	9062      	ld.w      	r3, (r0, 0x8)
+     ef6:	b762      	st.w      	r3, (r7, 0x8)
+     ef8:	9063      	ld.w      	r3, (r0, 0xc)
+     efa:	b763      	st.w      	r3, (r7, 0xc)
+     efc:	9064      	ld.w      	r3, (r0, 0x10)
+     efe:	9141      	ld.w      	r2, (r1, 0x4)
+     f00:	b764      	st.w      	r3, (r7, 0x10)
+     f02:	9061      	ld.w      	r3, (r0, 0x4)
+     f04:	68c8      	and      	r3, r2
+     f06:	b761      	st.w      	r3, (r7, 0x4)
+     f08:	6c1f      	mov      	r0, r7
+     f0a:	0797      	br      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f0c:	98e2      	ld.w      	r7, (r14, 0x8)
+     f0e:	651c      	cmphs      	r7, r4
+     f10:	0b7c      	bt      	0xe08	// e08 <_fpadd_parts+0xa8>
+     f12:	078c      	br      	0xe2a	// e2a <_fpadd_parts+0xca>
+     f14:	9802      	ld.w      	r0, (r14, 0x8)
+     f16:	9823      	ld.w      	r1, (r14, 0xc)
+     f18:	9840      	ld.w      	r2, (r14, 0x0)
+     f1a:	9861      	ld.w      	r3, (r14, 0x4)
+     f1c:	6400      	cmphs      	r0, r0
+     f1e:	600b      	subc      	r0, r2
+     f20:	604f      	subc      	r1, r3
+     f22:	0754      	br      	0xdca	// dca <_fpadd_parts+0x6a>
+     f24:	3200      	movi      	r2, 0
+     f26:	3300      	movi      	r3, 0
+     f28:	6d17      	mov      	r4, r5
+     f2a:	b842      	st.w      	r2, (r14, 0x8)
+     f2c:	b863      	st.w      	r3, (r14, 0xc)
+     f2e:	0741      	br      	0xdb0	// db0 <_fpadd_parts+0x50>
+     f30:	3a44      	cmpnei      	r2, 4
+     f32:	0b83      	bt      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f34:	9041      	ld.w      	r2, (r0, 0x4)
+     f36:	9161      	ld.w      	r3, (r1, 0x4)
+     f38:	64ca      	cmpne      	r2, r3
+     f3a:	0f7f      	bf      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f3c:	111d      	lrw      	r0, 0x4c70	// 1030 <_fpadd_parts+0x2d0>
+     f3e:	077d      	br      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f40:	3200      	movi      	r2, 0
+     f42:	608e      	subu      	r2, r3
+     f44:	072d      	br      	0xd9e	// d9e <_fpadd_parts+0x3e>
+     f46:	3301      	movi      	r3, 1
+     f48:	b761      	st.w      	r3, (r7, 0x4)
+     f4a:	3200      	movi      	r2, 0
+     f4c:	3300      	movi      	r3, 0
+     f4e:	6488      	cmphs      	r2, r2
+     f50:	6083      	subc      	r2, r0
+     f52:	60c7      	subc      	r3, r1
+     f54:	b782      	st.w      	r4, (r7, 0x8)
+     f56:	b743      	st.w      	r2, (r7, 0xc)
+     f58:	b764      	st.w      	r3, (r7, 0x10)
+     f5a:	0741      	br      	0xddc	// ddc <_fpadd_parts+0x7c>
+     f5c:	3b40      	cmpnei      	r3, 0
+     f5e:	0f29      	bf      	0xdb0	// db0 <_fpadd_parts+0x50>
+     f60:	3300      	movi      	r3, 0
+     f62:	2b1f      	subi      	r3, 32
+     f64:	60c8      	addu      	r3, r2
+     f66:	3bdf      	btsti      	r3, 31
+     f68:	6108      	addu      	r4, r2
+     f6a:	b866      	st.w      	r3, (r14, 0x18)
+     f6c:	0849      	bt      	0xffe	// ffe <_fpadd_parts+0x29e>
+     f6e:	9863      	ld.w      	r3, (r14, 0xc)
+     f70:	98a6      	ld.w      	r5, (r14, 0x18)
+     f72:	70d5      	lsr      	r3, r5
+     f74:	b864      	st.w      	r3, (r14, 0x10)
+     f76:	3300      	movi      	r3, 0
+     f78:	b865      	st.w      	r3, (r14, 0x14)
+     f7a:	9866      	ld.w      	r3, (r14, 0x18)
+     f7c:	3bdf      	btsti      	r3, 31
+     f7e:	3500      	movi      	r5, 0
+     f80:	3600      	movi      	r6, 0
+     f82:	083a      	bt      	0xff6	// ff6 <_fpadd_parts+0x296>
+     f84:	3201      	movi      	r2, 1
+     f86:	708c      	lsl      	r2, r3
+     f88:	6d8b      	mov      	r6, r2
+     f8a:	3200      	movi      	r2, 0
+     f8c:	3300      	movi      	r3, 0
+     f8e:	2a00      	subi      	r2, 1
+     f90:	2b00      	subi      	r3, 1
+     f92:	6489      	cmplt      	r2, r2
+     f94:	6095      	addc      	r2, r5
+     f96:	60d9      	addc      	r3, r6
+     f98:	98a2      	ld.w      	r5, (r14, 0x8)
+     f9a:	98c3      	ld.w      	r6, (r14, 0xc)
+     f9c:	6948      	and      	r5, r2
+     f9e:	698c      	and      	r6, r3
+     fa0:	6c97      	mov      	r2, r5
+     fa2:	6cdb      	mov      	r3, r6
+     fa4:	6c8c      	or      	r2, r3
+     fa6:	3a40      	cmpnei      	r2, 0
+     fa8:	3500      	movi      	r5, 0
+     faa:	6155      	addc      	r5, r5
+     fac:	6c97      	mov      	r2, r5
+     fae:	3300      	movi      	r3, 0
+     fb0:	98a4      	ld.w      	r5, (r14, 0x10)
+     fb2:	98c5      	ld.w      	r6, (r14, 0x14)
+     fb4:	6d48      	or      	r5, r2
+     fb6:	6d8c      	or      	r6, r3
+     fb8:	b8a2      	st.w      	r5, (r14, 0x8)
+     fba:	b8c3      	st.w      	r6, (r14, 0xc)
+     fbc:	06fa      	br      	0xdb0	// db0 <_fpadd_parts+0x50>
+     fbe:	3301      	movi      	r3, 1
+     fc0:	70c8      	lsl      	r3, r2
+     fc2:	6d4f      	mov      	r5, r3
+     fc4:	0754      	br      	0xe6c	// e6c <_fpadd_parts+0x10c>
+     fc6:	9861      	ld.w      	r3, (r14, 0x4)
+     fc8:	361f      	movi      	r6, 31
+     fca:	43a1      	lsli      	r5, r3, 1
+     fcc:	618a      	subu      	r6, r2
+     fce:	7158      	lsl      	r5, r6
+     fd0:	b8a9      	st.w      	r5, (r14, 0x24)
+     fd2:	98a0      	ld.w      	r5, (r14, 0x0)
+     fd4:	98c1      	ld.w      	r6, (r14, 0x4)
+     fd6:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fd8:	b8c8      	st.w      	r6, (r14, 0x20)
+     fda:	9867      	ld.w      	r3, (r14, 0x1c)
+     fdc:	70c9      	lsr      	r3, r2
+     fde:	98a9      	ld.w      	r5, (r14, 0x24)
+     fe0:	6cd4      	or      	r3, r5
+     fe2:	b864      	st.w      	r3, (r14, 0x10)
+     fe4:	9868      	ld.w      	r3, (r14, 0x20)
+     fe6:	70c9      	lsr      	r3, r2
+     fe8:	b865      	st.w      	r3, (r14, 0x14)
+     fea:	0739      	br      	0xe5c	// e5c <_fpadd_parts+0xfc>
+     fec:	3100      	movi      	r1, 0
+     fee:	2901      	subi      	r1, 2
+     ff0:	6404      	cmphs      	r1, r0
+     ff2:	0b01      	bt      	0xdf4	// df4 <_fpadd_parts+0x94>
+     ff4:	0764      	br      	0xebc	// ebc <_fpadd_parts+0x15c>
+     ff6:	3301      	movi      	r3, 1
+     ff8:	70c8      	lsl      	r3, r2
+     ffa:	6d4f      	mov      	r5, r3
+     ffc:	07c7      	br      	0xf8a	// f8a <_fpadd_parts+0x22a>
+     ffe:	9863      	ld.w      	r3, (r14, 0xc)
+    1000:	43c1      	lsli      	r6, r3, 1
+    1002:	351f      	movi      	r5, 31
+    1004:	5d69      	subu      	r3, r5, r2
+    1006:	6d5b      	mov      	r5, r6
+    1008:	714c      	lsl      	r5, r3
+    100a:	b8a9      	st.w      	r5, (r14, 0x24)
+    100c:	98a2      	ld.w      	r5, (r14, 0x8)
+    100e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1010:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1012:	b8c8      	st.w      	r6, (r14, 0x20)
+    1014:	9867      	ld.w      	r3, (r14, 0x1c)
+    1016:	70c9      	lsr      	r3, r2
+    1018:	98a9      	ld.w      	r5, (r14, 0x24)
+    101a:	6cd4      	or      	r3, r5
+    101c:	b864      	st.w      	r3, (r14, 0x10)
+    101e:	9868      	ld.w      	r3, (r14, 0x20)
+    1020:	70c9      	lsr      	r3, r2
+    1022:	b865      	st.w      	r3, (r14, 0x14)
+    1024:	07ab      	br      	0xf7a	// f7a <_fpadd_parts+0x21a>
+    1026:	0000      	bkpt
+    1028:	0fffffff 	.long	0x0fffffff
+    102c:	1fffffff 	.long	0x1fffffff
+    1030:	00004c70 	.long	0x00004c70
+
+00001034 <__adddf3>:
+    1034:	14d0      	push      	r15
+    1036:	1433      	subi      	r14, r14, 76
+    1038:	b800      	st.w      	r0, (r14, 0x0)
+    103a:	b821      	st.w      	r1, (r14, 0x4)
+    103c:	6c3b      	mov      	r0, r14
+    103e:	1904      	addi      	r1, r14, 16
+    1040:	b863      	st.w      	r3, (r14, 0xc)
+    1042:	b842      	st.w      	r2, (r14, 0x8)
+    1044:	e00003f4 	bsr      	0x182c	// 182c <__unpack_d>
+    1048:	1909      	addi      	r1, r14, 36
+    104a:	1802      	addi      	r0, r14, 8
+    104c:	e00003f0 	bsr      	0x182c	// 182c <__unpack_d>
+    1050:	1a0e      	addi      	r2, r14, 56
+    1052:	1909      	addi      	r1, r14, 36
+    1054:	1804      	addi      	r0, r14, 16
+    1056:	e3fffe85 	bsr      	0xd60	// d60 <_fpadd_parts>
+    105a:	e000031b 	bsr      	0x1690	// 1690 <__pack_d>
+    105e:	1413      	addi      	r14, r14, 76
+    1060:	1490      	pop      	r15
+	...
+
+00001064 <__subdf3>:
+    1064:	14d0      	push      	r15
+    1066:	1433      	subi      	r14, r14, 76
+    1068:	b800      	st.w      	r0, (r14, 0x0)
+    106a:	b821      	st.w      	r1, (r14, 0x4)
+    106c:	6c3b      	mov      	r0, r14
+    106e:	1904      	addi      	r1, r14, 16
+    1070:	b842      	st.w      	r2, (r14, 0x8)
+    1072:	b863      	st.w      	r3, (r14, 0xc)
+    1074:	e00003dc 	bsr      	0x182c	// 182c <__unpack_d>
+    1078:	1909      	addi      	r1, r14, 36
+    107a:	1802      	addi      	r0, r14, 8
+    107c:	e00003d8 	bsr      	0x182c	// 182c <__unpack_d>
+    1080:	986a      	ld.w      	r3, (r14, 0x28)
+    1082:	3201      	movi      	r2, 1
+    1084:	6cc9      	xor      	r3, r2
+    1086:	1909      	addi      	r1, r14, 36
+    1088:	1a0e      	addi      	r2, r14, 56
+    108a:	1804      	addi      	r0, r14, 16
+    108c:	b86a      	st.w      	r3, (r14, 0x28)
+    108e:	e3fffe69 	bsr      	0xd60	// d60 <_fpadd_parts>
+    1092:	e00002ff 	bsr      	0x1690	// 1690 <__pack_d>
+    1096:	1413      	addi      	r14, r14, 76
+    1098:	1490      	pop      	r15
+	...
+
+0000109c <__muldf3>:
+    109c:	14d4      	push      	r4-r7, r15
+    109e:	143b      	subi      	r14, r14, 108
+    10a0:	b808      	st.w      	r0, (r14, 0x20)
+    10a2:	b829      	st.w      	r1, (r14, 0x24)
+    10a4:	1808      	addi      	r0, r14, 32
+    10a6:	190c      	addi      	r1, r14, 48
+    10a8:	b86b      	st.w      	r3, (r14, 0x2c)
+    10aa:	b84a      	st.w      	r2, (r14, 0x28)
+    10ac:	e00003c0 	bsr      	0x182c	// 182c <__unpack_d>
+    10b0:	1911      	addi      	r1, r14, 68
+    10b2:	180a      	addi      	r0, r14, 40
+    10b4:	e00003bc 	bsr      	0x182c	// 182c <__unpack_d>
+    10b8:	986c      	ld.w      	r3, (r14, 0x30)
+    10ba:	3b01      	cmphsi      	r3, 2
+    10bc:	0cac      	bf      	0x1214	// 1214 <__muldf3+0x178>
+    10be:	9851      	ld.w      	r2, (r14, 0x44)
+    10c0:	3a01      	cmphsi      	r2, 2
+    10c2:	0c9c      	bf      	0x11fa	// 11fa <__muldf3+0x15e>
+    10c4:	3b44      	cmpnei      	r3, 4
+    10c6:	0ca5      	bf      	0x1210	// 1210 <__muldf3+0x174>
+    10c8:	3a44      	cmpnei      	r2, 4
+    10ca:	0c96      	bf      	0x11f6	// 11f6 <__muldf3+0x15a>
+    10cc:	3b42      	cmpnei      	r3, 2
+    10ce:	0ca3      	bf      	0x1214	// 1214 <__muldf3+0x178>
+    10d0:	3a42      	cmpnei      	r2, 2
+    10d2:	0c94      	bf      	0x11fa	// 11fa <__muldf3+0x15e>
+    10d4:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10d6:	98b4      	ld.w      	r5, (r14, 0x50)
+    10d8:	9875      	ld.w      	r3, (r14, 0x54)
+    10da:	6d8f      	mov      	r6, r3
+    10dc:	6c9f      	mov      	r2, r7
+    10de:	3300      	movi      	r3, 0
+    10e0:	6c17      	mov      	r0, r5
+    10e2:	3100      	movi      	r1, 0
+    10e4:	e0000294 	bsr      	0x160c	// 160c <__muldi3>
+    10e8:	b804      	st.w      	r0, (r14, 0x10)
+    10ea:	b825      	st.w      	r1, (r14, 0x14)
+    10ec:	6c9f      	mov      	r2, r7
+    10ee:	3300      	movi      	r3, 0
+    10f0:	6c1b      	mov      	r0, r6
+    10f2:	3100      	movi      	r1, 0
+    10f4:	9890      	ld.w      	r4, (r14, 0x40)
+    10f6:	b8c2      	st.w      	r6, (r14, 0x8)
+    10f8:	e000028a 	bsr      	0x160c	// 160c <__muldi3>
+    10fc:	6d83      	mov      	r6, r0
+    10fe:	6dc7      	mov      	r7, r1
+    1100:	9842      	ld.w      	r2, (r14, 0x8)
+    1102:	3300      	movi      	r3, 0
+    1104:	6c13      	mov      	r0, r4
+    1106:	3100      	movi      	r1, 0
+    1108:	e0000282 	bsr      	0x160c	// 160c <__muldi3>
+    110c:	b806      	st.w      	r0, (r14, 0x18)
+    110e:	b827      	st.w      	r1, (r14, 0x1c)
+    1110:	6c97      	mov      	r2, r5
+    1112:	3300      	movi      	r3, 0
+    1114:	6c13      	mov      	r0, r4
+    1116:	3100      	movi      	r1, 0
+    1118:	e000027a 	bsr      	0x160c	// 160c <__muldi3>
+    111c:	6401      	cmplt      	r0, r0
+    111e:	6019      	addc      	r0, r6
+    1120:	605d      	addc      	r1, r7
+    1122:	65c4      	cmphs      	r1, r7
+    1124:	0c91      	bf      	0x1246	// 1246 <__muldf3+0x1aa>
+    1126:	645e      	cmpne      	r7, r1
+    1128:	0c8d      	bf      	0x1242	// 1242 <__muldf3+0x1a6>
+    112a:	3300      	movi      	r3, 0
+    112c:	3400      	movi      	r4, 0
+    112e:	b862      	st.w      	r3, (r14, 0x8)
+    1130:	b883      	st.w      	r4, (r14, 0xc)
+    1132:	9884      	ld.w      	r4, (r14, 0x10)
+    1134:	98a5      	ld.w      	r5, (r14, 0x14)
+    1136:	3600      	movi      	r6, 0
+    1138:	6dc3      	mov      	r7, r0
+    113a:	6c93      	mov      	r2, r4
+    113c:	6cd7      	mov      	r3, r5
+    113e:	6489      	cmplt      	r2, r2
+    1140:	6099      	addc      	r2, r6
+    1142:	60dd      	addc      	r3, r7
+    1144:	6d8b      	mov      	r6, r2
+    1146:	6dcf      	mov      	r7, r3
+    1148:	6c93      	mov      	r2, r4
+    114a:	6cd7      	mov      	r3, r5
+    114c:	64dc      	cmphs      	r7, r3
+    114e:	0c70      	bf      	0x122e	// 122e <__muldf3+0x192>
+    1150:	65ce      	cmpne      	r3, r7
+    1152:	0c6c      	bf      	0x122a	// 122a <__muldf3+0x18e>
+    1154:	6c87      	mov      	r2, r1
+    1156:	3300      	movi      	r3, 0
+    1158:	9806      	ld.w      	r0, (r14, 0x18)
+    115a:	9827      	ld.w      	r1, (r14, 0x1c)
+    115c:	6401      	cmplt      	r0, r0
+    115e:	6009      	addc      	r0, r2
+    1160:	604d      	addc      	r1, r3
+    1162:	6c83      	mov      	r2, r0
+    1164:	6cc7      	mov      	r3, r1
+    1166:	9802      	ld.w      	r0, (r14, 0x8)
+    1168:	9823      	ld.w      	r1, (r14, 0xc)
+    116a:	6401      	cmplt      	r0, r0
+    116c:	6009      	addc      	r0, r2
+    116e:	604d      	addc      	r1, r3
+    1170:	6c83      	mov      	r2, r0
+    1172:	6cc7      	mov      	r3, r1
+    1174:	988e      	ld.w      	r4, (r14, 0x38)
+    1176:	9833      	ld.w      	r1, (r14, 0x4c)
+    1178:	6104      	addu      	r4, r1
+    117a:	5c2e      	addi      	r1, r4, 4
+    117c:	b838      	st.w      	r1, (r14, 0x60)
+    117e:	980d      	ld.w      	r0, (r14, 0x34)
+    1180:	9832      	ld.w      	r1, (r14, 0x48)
+    1182:	6442      	cmpne      	r0, r1
+    1184:	12b0      	lrw      	r5, 0x1fffffff	// 12c4 <__muldf3+0x228>
+    1186:	3100      	movi      	r1, 0
+    1188:	6045      	addc      	r1, r1
+    118a:	64d4      	cmphs      	r5, r3
+    118c:	b837      	st.w      	r1, (r14, 0x5c)
+    118e:	0879      	bt      	0x1280	// 1280 <__muldf3+0x1e4>
+    1190:	2404      	addi      	r4, 5
+    1192:	b8a4      	st.w      	r5, (r14, 0x10)
+    1194:	3001      	movi      	r0, 1
+    1196:	3100      	movi      	r1, 0
+    1198:	6808      	and      	r0, r2
+    119a:	684c      	and      	r1, r3
+    119c:	6c04      	or      	r0, r1
+    119e:	3840      	cmpnei      	r0, 0
+    11a0:	b882      	st.w      	r4, (r14, 0x8)
+    11a2:	0c0e      	bf      	0x11be	// 11be <__muldf3+0x122>
+    11a4:	473f      	lsli      	r1, r7, 31
+    11a6:	4e01      	lsri      	r0, r6, 1
+    11a8:	6c04      	or      	r0, r1
+    11aa:	4f21      	lsri      	r1, r7, 1
+    11ac:	b800      	st.w      	r0, (r14, 0x0)
+    11ae:	b821      	st.w      	r1, (r14, 0x4)
+    11b0:	3180      	movi      	r1, 128
+    11b2:	98c0      	ld.w      	r6, (r14, 0x0)
+    11b4:	98e1      	ld.w      	r7, (r14, 0x4)
+    11b6:	3000      	movi      	r0, 0
+    11b8:	4138      	lsli      	r1, r1, 24
+    11ba:	6d80      	or      	r6, r0
+    11bc:	6dc4      	or      	r7, r1
+    11be:	4b21      	lsri      	r1, r3, 1
+    11c0:	43bf      	lsli      	r5, r3, 31
+    11c2:	4a01      	lsri      	r0, r2, 1
+    11c4:	6cc7      	mov      	r3, r1
+    11c6:	9824      	ld.w      	r1, (r14, 0x10)
+    11c8:	6d40      	or      	r5, r0
+    11ca:	64c4      	cmphs      	r1, r3
+    11cc:	6c97      	mov      	r2, r5
+    11ce:	2400      	addi      	r4, 1
+    11d0:	0fe2      	bf      	0x1194	// 1194 <__muldf3+0xf8>
+    11d2:	9822      	ld.w      	r1, (r14, 0x8)
+    11d4:	b838      	st.w      	r1, (r14, 0x60)
+    11d6:	30ff      	movi      	r0, 255
+    11d8:	3100      	movi      	r1, 0
+    11da:	6808      	and      	r0, r2
+    11dc:	684c      	and      	r1, r3
+    11de:	3480      	movi      	r4, 128
+    11e0:	6502      	cmpne      	r0, r4
+    11e2:	0c37      	bf      	0x1250	// 1250 <__muldf3+0x1b4>
+    11e4:	b859      	st.w      	r2, (r14, 0x64)
+    11e6:	b87a      	st.w      	r3, (r14, 0x68)
+    11e8:	3303      	movi      	r3, 3
+    11ea:	b876      	st.w      	r3, (r14, 0x58)
+    11ec:	1816      	addi      	r0, r14, 88
+    11ee:	e0000251 	bsr      	0x1690	// 1690 <__pack_d>
+    11f2:	141b      	addi      	r14, r14, 108
+    11f4:	1494      	pop      	r4-r7, r15
+    11f6:	3b42      	cmpnei      	r3, 2
+    11f8:	0c42      	bf      	0x127c	// 127c <__muldf3+0x1e0>
+    11fa:	9872      	ld.w      	r3, (r14, 0x48)
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	64ca      	cmpne      	r2, r3
+    1200:	3300      	movi      	r3, 0
+    1202:	60cd      	addc      	r3, r3
+    1204:	1811      	addi      	r0, r14, 68
+    1206:	b872      	st.w      	r3, (r14, 0x48)
+    1208:	e0000244 	bsr      	0x1690	// 1690 <__pack_d>
+    120c:	141b      	addi      	r14, r14, 108
+    120e:	1494      	pop      	r4-r7, r15
+    1210:	3a42      	cmpnei      	r2, 2
+    1212:	0c35      	bf      	0x127c	// 127c <__muldf3+0x1e0>
+    1214:	984d      	ld.w      	r2, (r14, 0x34)
+    1216:	9872      	ld.w      	r3, (r14, 0x48)
+    1218:	64ca      	cmpne      	r2, r3
+    121a:	3300      	movi      	r3, 0
+    121c:	60cd      	addc      	r3, r3
+    121e:	180c      	addi      	r0, r14, 48
+    1220:	b86d      	st.w      	r3, (r14, 0x34)
+    1222:	e0000237 	bsr      	0x1690	// 1690 <__pack_d>
+    1226:	141b      	addi      	r14, r14, 108
+    1228:	1494      	pop      	r4-r7, r15
+    122a:	6498      	cmphs      	r6, r2
+    122c:	0b94      	bt      	0x1154	// 1154 <__muldf3+0xb8>
+    122e:	9882      	ld.w      	r4, (r14, 0x8)
+    1230:	98a3      	ld.w      	r5, (r14, 0xc)
+    1232:	3201      	movi      	r2, 1
+    1234:	3300      	movi      	r3, 0
+    1236:	6511      	cmplt      	r4, r4
+    1238:	6109      	addc      	r4, r2
+    123a:	614d      	addc      	r5, r3
+    123c:	b882      	st.w      	r4, (r14, 0x8)
+    123e:	b8a3      	st.w      	r5, (r14, 0xc)
+    1240:	078a      	br      	0x1154	// 1154 <__muldf3+0xb8>
+    1242:	6580      	cmphs      	r0, r6
+    1244:	0b73      	bt      	0x112a	// 112a <__muldf3+0x8e>
+    1246:	3300      	movi      	r3, 0
+    1248:	3401      	movi      	r4, 1
+    124a:	b862      	st.w      	r3, (r14, 0x8)
+    124c:	b883      	st.w      	r4, (r14, 0xc)
+    124e:	0772      	br      	0x1132	// 1132 <__muldf3+0x96>
+    1250:	3940      	cmpnei      	r1, 0
+    1252:	0bc9      	bt      	0x11e4	// 11e4 <__muldf3+0x148>
+    1254:	3180      	movi      	r1, 128
+    1256:	4121      	lsli      	r1, r1, 1
+    1258:	6848      	and      	r1, r2
+    125a:	3940      	cmpnei      	r1, 0
+    125c:	0bc4      	bt      	0x11e4	// 11e4 <__muldf3+0x148>
+    125e:	6c5b      	mov      	r1, r6
+    1260:	6c5c      	or      	r1, r7
+    1262:	3940      	cmpnei      	r1, 0
+    1264:	0fc0      	bf      	0x11e4	// 11e4 <__muldf3+0x148>
+    1266:	3080      	movi      	r0, 128
+    1268:	3100      	movi      	r1, 0
+    126a:	6401      	cmplt      	r0, r0
+    126c:	6009      	addc      	r0, r2
+    126e:	604d      	addc      	r1, r3
+    1270:	34ff      	movi      	r4, 255
+    1272:	6d43      	mov      	r5, r0
+    1274:	6951      	andn      	r5, r4
+    1276:	6c97      	mov      	r2, r5
+    1278:	6cc7      	mov      	r3, r1
+    127a:	07b5      	br      	0x11e4	// 11e4 <__muldf3+0x148>
+    127c:	1013      	lrw      	r0, 0x4c70	// 12c8 <__muldf3+0x22c>
+    127e:	07b8      	br      	0x11ee	// 11ee <__muldf3+0x152>
+    1280:	1033      	lrw      	r1, 0xfffffff	// 12cc <__muldf3+0x230>
+    1282:	64c4      	cmphs      	r1, r3
+    1284:	0fa9      	bf      	0x11d6	// 11d6 <__muldf3+0x13a>
+    1286:	2402      	addi      	r4, 3
+    1288:	b822      	st.w      	r1, (r14, 0x8)
+    128a:	4a1f      	lsri      	r0, r2, 31
+    128c:	4321      	lsli      	r1, r3, 1
+    128e:	42a1      	lsli      	r5, r2, 1
+    1290:	6c04      	or      	r0, r1
+    1292:	3fdf      	btsti      	r7, 31
+    1294:	b880      	st.w      	r4, (r14, 0x0)
+    1296:	6c97      	mov      	r2, r5
+    1298:	6cc3      	mov      	r3, r0
+    129a:	0c07      	bf      	0x12a8	// 12a8 <__muldf3+0x20c>
+    129c:	3001      	movi      	r0, 1
+    129e:	3100      	movi      	r1, 0
+    12a0:	6c08      	or      	r0, r2
+    12a2:	6c4c      	or      	r1, r3
+    12a4:	6c83      	mov      	r2, r0
+    12a6:	6cc7      	mov      	r3, r1
+    12a8:	4721      	lsli      	r1, r7, 1
+    12aa:	4e1f      	lsri      	r0, r6, 31
+    12ac:	6c04      	or      	r0, r1
+    12ae:	9822      	ld.w      	r1, (r14, 0x8)
+    12b0:	46a1      	lsli      	r5, r6, 1
+    12b2:	64c4      	cmphs      	r1, r3
+    12b4:	6d97      	mov      	r6, r5
+    12b6:	6dc3      	mov      	r7, r0
+    12b8:	2c00      	subi      	r4, 1
+    12ba:	0be8      	bt      	0x128a	// 128a <__muldf3+0x1ee>
+    12bc:	9820      	ld.w      	r1, (r14, 0x0)
+    12be:	b838      	st.w      	r1, (r14, 0x60)
+    12c0:	078b      	br      	0x11d6	// 11d6 <__muldf3+0x13a>
+    12c2:	0000      	bkpt
+    12c4:	1fffffff 	.long	0x1fffffff
+    12c8:	00004c70 	.long	0x00004c70
+    12cc:	0fffffff 	.long	0x0fffffff
+
+000012d0 <__divdf3>:
+    12d0:	14d4      	push      	r4-r7, r15
+    12d2:	1432      	subi      	r14, r14, 72
+    12d4:	b804      	st.w      	r0, (r14, 0x10)
+    12d6:	b825      	st.w      	r1, (r14, 0x14)
+    12d8:	1804      	addi      	r0, r14, 16
+    12da:	1908      	addi      	r1, r14, 32
+    12dc:	b867      	st.w      	r3, (r14, 0x1c)
+    12de:	b846      	st.w      	r2, (r14, 0x18)
+    12e0:	e00002a6 	bsr      	0x182c	// 182c <__unpack_d>
+    12e4:	190d      	addi      	r1, r14, 52
+    12e6:	1806      	addi      	r0, r14, 24
+    12e8:	e00002a2 	bsr      	0x182c	// 182c <__unpack_d>
+    12ec:	9868      	ld.w      	r3, (r14, 0x20)
+    12ee:	3b01      	cmphsi      	r3, 2
+    12f0:	0c66      	bf      	0x13bc	// 13bc <__divdf3+0xec>
+    12f2:	982d      	ld.w      	r1, (r14, 0x34)
+    12f4:	3901      	cmphsi      	r1, 2
+    12f6:	0c92      	bf      	0x141a	// 141a <__divdf3+0x14a>
+    12f8:	9849      	ld.w      	r2, (r14, 0x24)
+    12fa:	980e      	ld.w      	r0, (r14, 0x38)
+    12fc:	6c81      	xor      	r2, r0
+    12fe:	3b44      	cmpnei      	r3, 4
+    1300:	b849      	st.w      	r2, (r14, 0x24)
+    1302:	0c62      	bf      	0x13c6	// 13c6 <__divdf3+0xf6>
+    1304:	3b42      	cmpnei      	r3, 2
+    1306:	0c60      	bf      	0x13c6	// 13c6 <__divdf3+0xf6>
+    1308:	3944      	cmpnei      	r1, 4
+    130a:	0c62      	bf      	0x13ce	// 13ce <__divdf3+0xfe>
+    130c:	3942      	cmpnei      	r1, 2
+    130e:	0c82      	bf      	0x1412	// 1412 <__divdf3+0x142>
+    1310:	982a      	ld.w      	r1, (r14, 0x28)
+    1312:	986f      	ld.w      	r3, (r14, 0x3c)
+    1314:	604e      	subu      	r1, r3
+    1316:	9890      	ld.w      	r4, (r14, 0x40)
+    1318:	98b1      	ld.w      	r5, (r14, 0x44)
+    131a:	984b      	ld.w      	r2, (r14, 0x2c)
+    131c:	986c      	ld.w      	r3, (r14, 0x30)
+    131e:	654c      	cmphs      	r3, r5
+    1320:	b82a      	st.w      	r1, (r14, 0x28)
+    1322:	6d93      	mov      	r6, r4
+    1324:	6dd7      	mov      	r7, r5
+    1326:	0c05      	bf      	0x1330	// 1330 <__divdf3+0x60>
+    1328:	64d6      	cmpne      	r5, r3
+    132a:	080b      	bt      	0x1340	// 1340 <__divdf3+0x70>
+    132c:	6508      	cmphs      	r2, r4
+    132e:	0809      	bt      	0x1340	// 1340 <__divdf3+0x70>
+    1330:	4a9f      	lsri      	r4, r2, 31
+    1332:	4301      	lsli      	r0, r3, 1
+    1334:	42a1      	lsli      	r5, r2, 1
+    1336:	6d00      	or      	r4, r0
+    1338:	2900      	subi      	r1, 1
+    133a:	6c97      	mov      	r2, r5
+    133c:	6cd3      	mov      	r3, r4
+    133e:	b82a      	st.w      	r1, (r14, 0x28)
+    1340:	3000      	movi      	r0, 0
+    1342:	3100      	movi      	r1, 0
+    1344:	b802      	st.w      	r0, (r14, 0x8)
+    1346:	b823      	st.w      	r1, (r14, 0xc)
+    1348:	3180      	movi      	r1, 128
+    134a:	343d      	movi      	r4, 61
+    134c:	3000      	movi      	r0, 0
+    134e:	4135      	lsli      	r1, r1, 21
+    1350:	b8c0      	st.w      	r6, (r14, 0x0)
+    1352:	b8e1      	st.w      	r7, (r14, 0x4)
+    1354:	98a0      	ld.w      	r5, (r14, 0x0)
+    1356:	98c1      	ld.w      	r6, (r14, 0x4)
+    1358:	658c      	cmphs      	r3, r6
+    135a:	0c10      	bf      	0x137a	// 137a <__divdf3+0xaa>
+    135c:	64da      	cmpne      	r6, r3
+    135e:	0803      	bt      	0x1364	// 1364 <__divdf3+0x94>
+    1360:	6548      	cmphs      	r2, r5
+    1362:	0c0c      	bf      	0x137a	// 137a <__divdf3+0xaa>
+    1364:	98a2      	ld.w      	r5, (r14, 0x8)
+    1366:	98c3      	ld.w      	r6, (r14, 0xc)
+    1368:	6d40      	or      	r5, r0
+    136a:	6d84      	or      	r6, r1
+    136c:	b8a2      	st.w      	r5, (r14, 0x8)
+    136e:	b8c3      	st.w      	r6, (r14, 0xc)
+    1370:	98a0      	ld.w      	r5, (r14, 0x0)
+    1372:	98c1      	ld.w      	r6, (r14, 0x4)
+    1374:	6488      	cmphs      	r2, r2
+    1376:	6097      	subc      	r2, r5
+    1378:	60db      	subc      	r3, r6
+    137a:	41bf      	lsli      	r5, r1, 31
+    137c:	48e1      	lsri      	r7, r0, 1
+    137e:	6d97      	mov      	r6, r5
+    1380:	49a1      	lsri      	r5, r1, 1
+    1382:	6d9c      	or      	r6, r7
+    1384:	6c57      	mov      	r1, r5
+    1386:	4abf      	lsri      	r5, r2, 31
+    1388:	6c1b      	mov      	r0, r6
+    138a:	2c00      	subi      	r4, 1
+    138c:	6d97      	mov      	r6, r5
+    138e:	43a1      	lsli      	r5, r3, 1
+    1390:	6d94      	or      	r6, r5
+    1392:	4261      	lsli      	r3, r2, 1
+    1394:	3c40      	cmpnei      	r4, 0
+    1396:	6dcf      	mov      	r7, r3
+    1398:	6c8f      	mov      	r2, r3
+    139a:	6cdb      	mov      	r3, r6
+    139c:	0bdc      	bt      	0x1354	// 1354 <__divdf3+0x84>
+    139e:	30ff      	movi      	r0, 255
+    13a0:	3100      	movi      	r1, 0
+    13a2:	9882      	ld.w      	r4, (r14, 0x8)
+    13a4:	98a3      	ld.w      	r5, (r14, 0xc)
+    13a6:	6900      	and      	r4, r0
+    13a8:	6944      	and      	r5, r1
+    13aa:	6c13      	mov      	r0, r4
+    13ac:	6c57      	mov      	r1, r5
+    13ae:	3480      	movi      	r4, 128
+    13b0:	6502      	cmpne      	r0, r4
+    13b2:	0c15      	bf      	0x13dc	// 13dc <__divdf3+0x10c>
+    13b4:	9862      	ld.w      	r3, (r14, 0x8)
+    13b6:	9883      	ld.w      	r4, (r14, 0xc)
+    13b8:	b86b      	st.w      	r3, (r14, 0x2c)
+    13ba:	b88c      	st.w      	r4, (r14, 0x30)
+    13bc:	1808      	addi      	r0, r14, 32
+    13be:	e0000169 	bsr      	0x1690	// 1690 <__pack_d>
+    13c2:	1412      	addi      	r14, r14, 72
+    13c4:	1494      	pop      	r4-r7, r15
+    13c6:	644e      	cmpne      	r3, r1
+    13c8:	0bfa      	bt      	0x13bc	// 13bc <__divdf3+0xec>
+    13ca:	1016      	lrw      	r0, 0x4c70	// 1420 <__divdf3+0x150>
+    13cc:	07f9      	br      	0x13be	// 13be <__divdf3+0xee>
+    13ce:	3300      	movi      	r3, 0
+    13d0:	3400      	movi      	r4, 0
+    13d2:	b86b      	st.w      	r3, (r14, 0x2c)
+    13d4:	b88c      	st.w      	r4, (r14, 0x30)
+    13d6:	b86a      	st.w      	r3, (r14, 0x28)
+    13d8:	1808      	addi      	r0, r14, 32
+    13da:	07f2      	br      	0x13be	// 13be <__divdf3+0xee>
+    13dc:	3940      	cmpnei      	r1, 0
+    13de:	0beb      	bt      	0x13b4	// 13b4 <__divdf3+0xe4>
+    13e0:	3180      	movi      	r1, 128
+    13e2:	4121      	lsli      	r1, r1, 1
+    13e4:	9882      	ld.w      	r4, (r14, 0x8)
+    13e6:	98a3      	ld.w      	r5, (r14, 0xc)
+    13e8:	6850      	and      	r1, r4
+    13ea:	3940      	cmpnei      	r1, 0
+    13ec:	0be4      	bt      	0x13b4	// 13b4 <__divdf3+0xe4>
+    13ee:	6c98      	or      	r2, r6
+    13f0:	3a40      	cmpnei      	r2, 0
+    13f2:	0fe1      	bf      	0x13b4	// 13b4 <__divdf3+0xe4>
+    13f4:	3280      	movi      	r2, 128
+    13f6:	3300      	movi      	r3, 0
+    13f8:	6c13      	mov      	r0, r4
+    13fa:	6c57      	mov      	r1, r5
+    13fc:	6401      	cmplt      	r0, r0
+    13fe:	6009      	addc      	r0, r2
+    1400:	604d      	addc      	r1, r3
+    1402:	6c83      	mov      	r2, r0
+    1404:	6cc7      	mov      	r3, r1
+    1406:	6c0b      	mov      	r0, r2
+    1408:	31ff      	movi      	r1, 255
+    140a:	6805      	andn      	r0, r1
+    140c:	b802      	st.w      	r0, (r14, 0x8)
+    140e:	b863      	st.w      	r3, (r14, 0xc)
+    1410:	07d2      	br      	0x13b4	// 13b4 <__divdf3+0xe4>
+    1412:	3304      	movi      	r3, 4
+    1414:	b868      	st.w      	r3, (r14, 0x20)
+    1416:	1808      	addi      	r0, r14, 32
+    1418:	07d3      	br      	0x13be	// 13be <__divdf3+0xee>
+    141a:	180d      	addi      	r0, r14, 52
+    141c:	07d1      	br      	0x13be	// 13be <__divdf3+0xee>
+    141e:	0000      	bkpt
+    1420:	00004c70 	.long	0x00004c70
+
+00001424 <__gtdf2>:
+    1424:	14d0      	push      	r15
+    1426:	142e      	subi      	r14, r14, 56
+    1428:	b800      	st.w      	r0, (r14, 0x0)
+    142a:	b821      	st.w      	r1, (r14, 0x4)
+    142c:	6c3b      	mov      	r0, r14
+    142e:	1904      	addi      	r1, r14, 16
+    1430:	b863      	st.w      	r3, (r14, 0xc)
+    1432:	b842      	st.w      	r2, (r14, 0x8)
+    1434:	e00001fc 	bsr      	0x182c	// 182c <__unpack_d>
+    1438:	1909      	addi      	r1, r14, 36
+    143a:	1802      	addi      	r0, r14, 8
+    143c:	e00001f8 	bsr      	0x182c	// 182c <__unpack_d>
+    1440:	9864      	ld.w      	r3, (r14, 0x10)
+    1442:	3b01      	cmphsi      	r3, 2
+    1444:	0c0a      	bf      	0x1458	// 1458 <__gtdf2+0x34>
+    1446:	9869      	ld.w      	r3, (r14, 0x24)
+    1448:	3b01      	cmphsi      	r3, 2
+    144a:	0c07      	bf      	0x1458	// 1458 <__gtdf2+0x34>
+    144c:	1909      	addi      	r1, r14, 36
+    144e:	1804      	addi      	r0, r14, 16
+    1450:	e0000250 	bsr      	0x18f0	// 18f0 <__fpcmp_parts_d>
+    1454:	140e      	addi      	r14, r14, 56
+    1456:	1490      	pop      	r15
+    1458:	3000      	movi      	r0, 0
+    145a:	2800      	subi      	r0, 1
+    145c:	140e      	addi      	r14, r14, 56
+    145e:	1490      	pop      	r15
+
+00001460 <__gedf2>:
+    1460:	14d0      	push      	r15
+    1462:	142e      	subi      	r14, r14, 56
+    1464:	b800      	st.w      	r0, (r14, 0x0)
+    1466:	b821      	st.w      	r1, (r14, 0x4)
+    1468:	6c3b      	mov      	r0, r14
+    146a:	1904      	addi      	r1, r14, 16
+    146c:	b863      	st.w      	r3, (r14, 0xc)
+    146e:	b842      	st.w      	r2, (r14, 0x8)
+    1470:	e00001de 	bsr      	0x182c	// 182c <__unpack_d>
+    1474:	1909      	addi      	r1, r14, 36
+    1476:	1802      	addi      	r0, r14, 8
+    1478:	e00001da 	bsr      	0x182c	// 182c <__unpack_d>
+    147c:	9864      	ld.w      	r3, (r14, 0x10)
+    147e:	3b01      	cmphsi      	r3, 2
+    1480:	0c0a      	bf      	0x1494	// 1494 <__gedf2+0x34>
+    1482:	9869      	ld.w      	r3, (r14, 0x24)
+    1484:	3b01      	cmphsi      	r3, 2
+    1486:	0c07      	bf      	0x1494	// 1494 <__gedf2+0x34>
+    1488:	1909      	addi      	r1, r14, 36
+    148a:	1804      	addi      	r0, r14, 16
+    148c:	e0000232 	bsr      	0x18f0	// 18f0 <__fpcmp_parts_d>
+    1490:	140e      	addi      	r14, r14, 56
+    1492:	1490      	pop      	r15
+    1494:	3000      	movi      	r0, 0
+    1496:	2800      	subi      	r0, 1
+    1498:	140e      	addi      	r14, r14, 56
+    149a:	1490      	pop      	r15
+
+0000149c <__ledf2>:
+    149c:	14d0      	push      	r15
+    149e:	142e      	subi      	r14, r14, 56
+    14a0:	b800      	st.w      	r0, (r14, 0x0)
+    14a2:	b821      	st.w      	r1, (r14, 0x4)
+    14a4:	6c3b      	mov      	r0, r14
+    14a6:	1904      	addi      	r1, r14, 16
+    14a8:	b863      	st.w      	r3, (r14, 0xc)
+    14aa:	b842      	st.w      	r2, (r14, 0x8)
+    14ac:	e00001c0 	bsr      	0x182c	// 182c <__unpack_d>
+    14b0:	1909      	addi      	r1, r14, 36
+    14b2:	1802      	addi      	r0, r14, 8
+    14b4:	e00001bc 	bsr      	0x182c	// 182c <__unpack_d>
+    14b8:	9864      	ld.w      	r3, (r14, 0x10)
+    14ba:	3b01      	cmphsi      	r3, 2
+    14bc:	0c0a      	bf      	0x14d0	// 14d0 <__ledf2+0x34>
+    14be:	9869      	ld.w      	r3, (r14, 0x24)
+    14c0:	3b01      	cmphsi      	r3, 2
+    14c2:	0c07      	bf      	0x14d0	// 14d0 <__ledf2+0x34>
+    14c4:	1909      	addi      	r1, r14, 36
+    14c6:	1804      	addi      	r0, r14, 16
+    14c8:	e0000214 	bsr      	0x18f0	// 18f0 <__fpcmp_parts_d>
+    14cc:	140e      	addi      	r14, r14, 56
+    14ce:	1490      	pop      	r15
+    14d0:	3001      	movi      	r0, 1
+    14d2:	140e      	addi      	r14, r14, 56
+    14d4:	1490      	pop      	r15
+	...
+
+000014d8 <__floatsidf>:
+    14d8:	14d1      	push      	r4, r15
+    14da:	1425      	subi      	r14, r14, 20
+    14dc:	3303      	movi      	r3, 3
+    14de:	b860      	st.w      	r3, (r14, 0x0)
+    14e0:	3840      	cmpnei      	r0, 0
+    14e2:	487f      	lsri      	r3, r0, 31
+    14e4:	b861      	st.w      	r3, (r14, 0x4)
+    14e6:	0808      	bt      	0x14f6	// 14f6 <__floatsidf+0x1e>
+    14e8:	3302      	movi      	r3, 2
+    14ea:	b860      	st.w      	r3, (r14, 0x0)
+    14ec:	6c3b      	mov      	r0, r14
+    14ee:	e00000d1 	bsr      	0x1690	// 1690 <__pack_d>
+    14f2:	1405      	addi      	r14, r14, 20
+    14f4:	1491      	pop      	r4, r15
+    14f6:	38df      	btsti      	r0, 31
+    14f8:	0812      	bt      	0x151c	// 151c <__floatsidf+0x44>
+    14fa:	6d03      	mov      	r4, r0
+    14fc:	6c13      	mov      	r0, r4
+    14fe:	e00000a9 	bsr      	0x1650	// 1650 <__clzsi2>
+    1502:	321d      	movi      	r2, 29
+    1504:	6080      	addu      	r2, r0
+    1506:	2802      	subi      	r0, 3
+    1508:	38df      	btsti      	r0, 31
+    150a:	0810      	bt      	0x152a	// 152a <__floatsidf+0x52>
+    150c:	7100      	lsl      	r4, r0
+    150e:	3300      	movi      	r3, 0
+    1510:	b884      	st.w      	r4, (r14, 0x10)
+    1512:	b863      	st.w      	r3, (r14, 0xc)
+    1514:	333c      	movi      	r3, 60
+    1516:	60ca      	subu      	r3, r2
+    1518:	b862      	st.w      	r3, (r14, 0x8)
+    151a:	07e9      	br      	0x14ec	// 14ec <__floatsidf+0x14>
+    151c:	3380      	movi      	r3, 128
+    151e:	4378      	lsli      	r3, r3, 24
+    1520:	64c2      	cmpne      	r0, r3
+    1522:	0c0d      	bf      	0x153c	// 153c <__floatsidf+0x64>
+    1524:	3400      	movi      	r4, 0
+    1526:	6102      	subu      	r4, r0
+    1528:	07ea      	br      	0x14fc	// 14fc <__floatsidf+0x24>
+    152a:	311f      	movi      	r1, 31
+    152c:	4c61      	lsri      	r3, r4, 1
+    152e:	604a      	subu      	r1, r2
+    1530:	6c13      	mov      	r0, r4
+    1532:	70c5      	lsr      	r3, r1
+    1534:	7008      	lsl      	r0, r2
+    1536:	b864      	st.w      	r3, (r14, 0x10)
+    1538:	b803      	st.w      	r0, (r14, 0xc)
+    153a:	07ed      	br      	0x1514	// 1514 <__floatsidf+0x3c>
+    153c:	3000      	movi      	r0, 0
+    153e:	1022      	lrw      	r1, 0xc1e00000	// 1544 <__floatsidf+0x6c>
+    1540:	07d9      	br      	0x14f2	// 14f2 <__floatsidf+0x1a>
+    1542:	0000      	bkpt
+    1544:	c1e00000 	.long	0xc1e00000
+
+00001548 <__fixdfsi>:
+    1548:	14d0      	push      	r15
+    154a:	1427      	subi      	r14, r14, 28
+    154c:	b800      	st.w      	r0, (r14, 0x0)
+    154e:	b821      	st.w      	r1, (r14, 0x4)
+    1550:	6c3b      	mov      	r0, r14
+    1552:	1902      	addi      	r1, r14, 8
+    1554:	e000016c 	bsr      	0x182c	// 182c <__unpack_d>
+    1558:	9862      	ld.w      	r3, (r14, 0x8)
+    155a:	3b02      	cmphsi      	r3, 3
+    155c:	0c20      	bf      	0x159c	// 159c <__fixdfsi+0x54>
+    155e:	3b44      	cmpnei      	r3, 4
+    1560:	0c16      	bf      	0x158c	// 158c <__fixdfsi+0x44>
+    1562:	9864      	ld.w      	r3, (r14, 0x10)
+    1564:	3bdf      	btsti      	r3, 31
+    1566:	081b      	bt      	0x159c	// 159c <__fixdfsi+0x54>
+    1568:	3b3e      	cmplti      	r3, 31
+    156a:	0c11      	bf      	0x158c	// 158c <__fixdfsi+0x44>
+    156c:	323c      	movi      	r2, 60
+    156e:	5a6d      	subu      	r3, r2, r3
+    1570:	3200      	movi      	r2, 0
+    1572:	2a1f      	subi      	r2, 32
+    1574:	608c      	addu      	r2, r3
+    1576:	3adf      	btsti      	r2, 31
+    1578:	0815      	bt      	0x15a2	// 15a2 <__fixdfsi+0x5a>
+    157a:	9806      	ld.w      	r0, (r14, 0x18)
+    157c:	7009      	lsr      	r0, r2
+    157e:	9863      	ld.w      	r3, (r14, 0xc)
+    1580:	3b40      	cmpnei      	r3, 0
+    1582:	0c0b      	bf      	0x1598	// 1598 <__fixdfsi+0x50>
+    1584:	3300      	movi      	r3, 0
+    1586:	5b01      	subu      	r0, r3, r0
+    1588:	1407      	addi      	r14, r14, 28
+    158a:	1490      	pop      	r15
+    158c:	9863      	ld.w      	r3, (r14, 0xc)
+    158e:	3b40      	cmpnei      	r3, 0
+    1590:	3000      	movi      	r0, 0
+    1592:	6001      	addc      	r0, r0
+    1594:	1068      	lrw      	r3, 0x7fffffff	// 15b4 <__fixdfsi+0x6c>
+    1596:	600c      	addu      	r0, r3
+    1598:	1407      	addi      	r14, r14, 28
+    159a:	1490      	pop      	r15
+    159c:	3000      	movi      	r0, 0
+    159e:	1407      	addi      	r14, r14, 28
+    15a0:	1490      	pop      	r15
+    15a2:	9846      	ld.w      	r2, (r14, 0x18)
+    15a4:	311f      	movi      	r1, 31
+    15a6:	4241      	lsli      	r2, r2, 1
+    15a8:	604e      	subu      	r1, r3
+    15aa:	9805      	ld.w      	r0, (r14, 0x14)
+    15ac:	7084      	lsl      	r2, r1
+    15ae:	700d      	lsr      	r0, r3
+    15b0:	6c08      	or      	r0, r2
+    15b2:	07e6      	br      	0x157e	// 157e <__fixdfsi+0x36>
+    15b4:	7fffffff 	.long	0x7fffffff
+
+000015b8 <__floatunsidf>:
+    15b8:	14d2      	push      	r4-r5, r15
+    15ba:	1425      	subi      	r14, r14, 20
+    15bc:	3840      	cmpnei      	r0, 0
+    15be:	3500      	movi      	r5, 0
+    15c0:	6d03      	mov      	r4, r0
+    15c2:	b8a1      	st.w      	r5, (r14, 0x4)
+    15c4:	0c15      	bf      	0x15ee	// 15ee <__floatunsidf+0x36>
+    15c6:	3303      	movi      	r3, 3
+    15c8:	b860      	st.w      	r3, (r14, 0x0)
+    15ca:	e0000043 	bsr      	0x1650	// 1650 <__clzsi2>
+    15ce:	321d      	movi      	r2, 29
+    15d0:	6080      	addu      	r2, r0
+    15d2:	2802      	subi      	r0, 3
+    15d4:	38df      	btsti      	r0, 31
+    15d6:	0813      	bt      	0x15fc	// 15fc <__floatunsidf+0x44>
+    15d8:	7100      	lsl      	r4, r0
+    15da:	b884      	st.w      	r4, (r14, 0x10)
+    15dc:	b8a3      	st.w      	r5, (r14, 0xc)
+    15de:	333c      	movi      	r3, 60
+    15e0:	60ca      	subu      	r3, r2
+    15e2:	6c3b      	mov      	r0, r14
+    15e4:	b862      	st.w      	r3, (r14, 0x8)
+    15e6:	e0000055 	bsr      	0x1690	// 1690 <__pack_d>
+    15ea:	1405      	addi      	r14, r14, 20
+    15ec:	1492      	pop      	r4-r5, r15
+    15ee:	3302      	movi      	r3, 2
+    15f0:	6c3b      	mov      	r0, r14
+    15f2:	b860      	st.w      	r3, (r14, 0x0)
+    15f4:	e000004e 	bsr      	0x1690	// 1690 <__pack_d>
+    15f8:	1405      	addi      	r14, r14, 20
+    15fa:	1492      	pop      	r4-r5, r15
+    15fc:	311f      	movi      	r1, 31
+    15fe:	4c61      	lsri      	r3, r4, 1
+    1600:	604a      	subu      	r1, r2
+    1602:	70c5      	lsr      	r3, r1
+    1604:	7108      	lsl      	r4, r2
+    1606:	b864      	st.w      	r3, (r14, 0x10)
+    1608:	b883      	st.w      	r4, (r14, 0xc)
+    160a:	07ea      	br      	0x15de	// 15de <__floatunsidf+0x26>
+
+0000160c <__muldi3>:
+    160c:	14c4      	push      	r4-r7
+    160e:	1421      	subi      	r14, r14, 4
+    1610:	7501      	zexth      	r4, r0
+    1612:	48b0      	lsri      	r5, r0, 16
+    1614:	75c9      	zexth      	r7, r2
+    1616:	6d83      	mov      	r6, r0
+    1618:	b820      	st.w      	r1, (r14, 0x0)
+    161a:	6c13      	mov      	r0, r4
+    161c:	4a30      	lsri      	r1, r2, 16
+    161e:	7c1c      	mult      	r0, r7
+    1620:	7d04      	mult      	r4, r1
+    1622:	7dd4      	mult      	r7, r5
+    1624:	611c      	addu      	r4, r7
+    1626:	7d44      	mult      	r5, r1
+    1628:	4830      	lsri      	r1, r0, 16
+    162a:	6104      	addu      	r4, r1
+    162c:	65d0      	cmphs      	r4, r7
+    162e:	0804      	bt      	0x1636	// 1636 <__muldi3+0x2a>
+    1630:	3180      	movi      	r1, 128
+    1632:	4129      	lsli      	r1, r1, 9
+    1634:	6144      	addu      	r5, r1
+    1636:	4c30      	lsri      	r1, r4, 16
+    1638:	7cd8      	mult      	r3, r6
+    163a:	6144      	addu      	r5, r1
+    163c:	6c4f      	mov      	r1, r3
+    163e:	9860      	ld.w      	r3, (r14, 0x0)
+    1640:	7cc8      	mult      	r3, r2
+    1642:	4490      	lsli      	r4, r4, 16
+    1644:	604c      	addu      	r1, r3
+    1646:	7401      	zexth      	r0, r0
+    1648:	6010      	addu      	r0, r4
+    164a:	6054      	addu      	r1, r5
+    164c:	1401      	addi      	r14, r14, 4
+    164e:	1484      	pop      	r4-r7
+
+00001650 <__clzsi2>:
+    1650:	106d      	lrw      	r3, 0xffff	// 1684 <__clzsi2+0x34>
+    1652:	640c      	cmphs      	r3, r0
+    1654:	0c07      	bf      	0x1662	// 1662 <__clzsi2+0x12>
+    1656:	33ff      	movi      	r3, 255
+    1658:	640c      	cmphs      	r3, r0
+    165a:	0c0f      	bf      	0x1678	// 1678 <__clzsi2+0x28>
+    165c:	3320      	movi      	r3, 32
+    165e:	3200      	movi      	r2, 0
+    1660:	0406      	br      	0x166c	// 166c <__clzsi2+0x1c>
+    1662:	106a      	lrw      	r3, 0xffffff	// 1688 <__clzsi2+0x38>
+    1664:	640c      	cmphs      	r3, r0
+    1666:	080c      	bt      	0x167e	// 167e <__clzsi2+0x2e>
+    1668:	3308      	movi      	r3, 8
+    166a:	3218      	movi      	r2, 24
+    166c:	7009      	lsr      	r0, r2
+    166e:	1048      	lrw      	r2, 0x4c84	// 168c <__clzsi2+0x3c>
+    1670:	6008      	addu      	r0, r2
+    1672:	8040      	ld.b      	r2, (r0, 0x0)
+    1674:	5b09      	subu      	r0, r3, r2
+    1676:	783c      	jmp      	r15
+    1678:	3318      	movi      	r3, 24
+    167a:	3208      	movi      	r2, 8
+    167c:	07f8      	br      	0x166c	// 166c <__clzsi2+0x1c>
+    167e:	3310      	movi      	r3, 16
+    1680:	3210      	movi      	r2, 16
+    1682:	07f5      	br      	0x166c	// 166c <__clzsi2+0x1c>
+    1684:	0000ffff 	.long	0x0000ffff
+    1688:	00ffffff 	.long	0x00ffffff
+    168c:	00004c84 	.long	0x00004c84
+
+00001690 <__pack_d>:
+    1690:	14c4      	push      	r4-r7
+    1692:	1422      	subi      	r14, r14, 8
+    1694:	9060      	ld.w      	r3, (r0, 0x0)
+    1696:	3b01      	cmphsi      	r3, 2
+    1698:	90c3      	ld.w      	r6, (r0, 0xc)
+    169a:	90e4      	ld.w      	r7, (r0, 0x10)
+    169c:	9021      	ld.w      	r1, (r0, 0x4)
+    169e:	0c46      	bf      	0x172a	// 172a <__pack_d+0x9a>
+    16a0:	3b44      	cmpnei      	r3, 4
+    16a2:	0c40      	bf      	0x1722	// 1722 <__pack_d+0x92>
+    16a4:	3b42      	cmpnei      	r3, 2
+    16a6:	0c27      	bf      	0x16f4	// 16f4 <__pack_d+0x64>
+    16a8:	6cdb      	mov      	r3, r6
+    16aa:	6cdc      	or      	r3, r7
+    16ac:	3b40      	cmpnei      	r3, 0
+    16ae:	0c23      	bf      	0x16f4	// 16f4 <__pack_d+0x64>
+    16b0:	9062      	ld.w      	r3, (r0, 0x8)
+    16b2:	125a      	lrw      	r2, 0xfffffc02	// 1818 <__pack_d+0x188>
+    16b4:	648d      	cmplt      	r3, r2
+    16b6:	0855      	bt      	0x1760	// 1760 <__pack_d+0xd0>
+    16b8:	1259      	lrw      	r2, 0x3ff	// 181c <__pack_d+0x18c>
+    16ba:	64c9      	cmplt      	r2, r3
+    16bc:	0833      	bt      	0x1722	// 1722 <__pack_d+0x92>
+    16be:	34ff      	movi      	r4, 255
+    16c0:	3500      	movi      	r5, 0
+    16c2:	6918      	and      	r4, r6
+    16c4:	695c      	and      	r5, r7
+    16c6:	3280      	movi      	r2, 128
+    16c8:	6492      	cmpne      	r4, r2
+    16ca:	0c3f      	bf      	0x1748	// 1748 <__pack_d+0xb8>
+    16cc:	347f      	movi      	r4, 127
+    16ce:	3500      	movi      	r5, 0
+    16d0:	6599      	cmplt      	r6, r6
+    16d2:	6191      	addc      	r6, r4
+    16d4:	61d5      	addc      	r7, r5
+    16d6:	1253      	lrw      	r2, 0x1fffffff	// 1820 <__pack_d+0x190>
+    16d8:	65c8      	cmphs      	r2, r7
+    16da:	0c1a      	bf      	0x170e	// 170e <__pack_d+0x7e>
+    16dc:	1290      	lrw      	r4, 0x3ff	// 181c <__pack_d+0x18c>
+    16de:	610c      	addu      	r4, r3
+    16e0:	4718      	lsli      	r0, r7, 24
+    16e2:	4f68      	lsri      	r3, r7, 8
+    16e4:	4e48      	lsri      	r2, r6, 8
+    16e6:	6c80      	or      	r2, r0
+    16e8:	430c      	lsli      	r0, r3, 12
+    16ea:	486c      	lsri      	r3, r0, 12
+    16ec:	120e      	lrw      	r0, 0x7ff	// 1824 <__pack_d+0x194>
+    16ee:	6d4b      	mov      	r5, r2
+    16f0:	6900      	and      	r4, r0
+    16f2:	0404      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    16f4:	3400      	movi      	r4, 0
+    16f6:	3200      	movi      	r2, 0
+    16f8:	3300      	movi      	r3, 0
+    16fa:	430c      	lsli      	r0, r3, 12
+    16fc:	480c      	lsri      	r0, r0, 12
+    16fe:	4474      	lsli      	r3, r4, 20
+    1700:	419f      	lsli      	r4, r1, 31
+    1702:	6c43      	mov      	r1, r0
+    1704:	6c4c      	or      	r1, r3
+    1706:	6c50      	or      	r1, r4
+    1708:	6c0b      	mov      	r0, r2
+    170a:	1402      	addi      	r14, r14, 8
+    170c:	1484      	pop      	r4-r7
+    170e:	479f      	lsli      	r4, r7, 31
+    1710:	4e01      	lsri      	r0, r6, 1
+    1712:	6d00      	or      	r4, r0
+    1714:	6d93      	mov      	r6, r4
+    1716:	3480      	movi      	r4, 128
+    1718:	4f41      	lsri      	r2, r7, 1
+    171a:	4483      	lsli      	r4, r4, 3
+    171c:	6dcb      	mov      	r7, r2
+    171e:	610c      	addu      	r4, r3
+    1720:	07e0      	br      	0x16e0	// 16e0 <__pack_d+0x50>
+    1722:	1281      	lrw      	r4, 0x7ff	// 1824 <__pack_d+0x194>
+    1724:	3200      	movi      	r2, 0
+    1726:	3300      	movi      	r3, 0
+    1728:	07e9      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    172a:	4e08      	lsri      	r0, r6, 8
+    172c:	4798      	lsli      	r4, r7, 24
+    172e:	6d00      	or      	r4, r0
+    1730:	3580      	movi      	r5, 128
+    1732:	4705      	lsli      	r0, r7, 5
+    1734:	6c93      	mov      	r2, r4
+    1736:	486d      	lsri      	r3, r0, 13
+    1738:	3400      	movi      	r4, 0
+    173a:	45ac      	lsli      	r5, r5, 12
+    173c:	6c90      	or      	r2, r4
+    173e:	6cd4      	or      	r3, r5
+    1740:	430c      	lsli      	r0, r3, 12
+    1742:	486c      	lsri      	r3, r0, 12
+    1744:	1198      	lrw      	r4, 0x7ff	// 1824 <__pack_d+0x194>
+    1746:	07da      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    1748:	3d40      	cmpnei      	r5, 0
+    174a:	0bc1      	bt      	0x16cc	// 16cc <__pack_d+0x3c>
+    174c:	4241      	lsli      	r2, r2, 1
+    174e:	6898      	and      	r2, r6
+    1750:	3a40      	cmpnei      	r2, 0
+    1752:	0fc2      	bf      	0x16d6	// 16d6 <__pack_d+0x46>
+    1754:	3480      	movi      	r4, 128
+    1756:	3500      	movi      	r5, 0
+    1758:	6599      	cmplt      	r6, r6
+    175a:	6191      	addc      	r6, r4
+    175c:	61d5      	addc      	r7, r5
+    175e:	07bc      	br      	0x16d6	// 16d6 <__pack_d+0x46>
+    1760:	5a6d      	subu      	r3, r2, r3
+    1762:	3238      	movi      	r2, 56
+    1764:	64c9      	cmplt      	r2, r3
+    1766:	0bc7      	bt      	0x16f4	// 16f4 <__pack_d+0x64>
+    1768:	3200      	movi      	r2, 0
+    176a:	2a1f      	subi      	r2, 32
+    176c:	608c      	addu      	r2, r3
+    176e:	3adf      	btsti      	r2, 31
+    1770:	0848      	bt      	0x1800	// 1800 <__pack_d+0x170>
+    1772:	6c1f      	mov      	r0, r7
+    1774:	7009      	lsr      	r0, r2
+    1776:	b800      	st.w      	r0, (r14, 0x0)
+    1778:	3000      	movi      	r0, 0
+    177a:	b801      	st.w      	r0, (r14, 0x4)
+    177c:	3adf      	btsti      	r2, 31
+    177e:	083c      	bt      	0x17f6	// 17f6 <__pack_d+0x166>
+    1780:	3301      	movi      	r3, 1
+    1782:	70c8      	lsl      	r3, r2
+    1784:	6d4f      	mov      	r5, r3
+    1786:	3300      	movi      	r3, 0
+    1788:	6d0f      	mov      	r4, r3
+    178a:	3200      	movi      	r2, 0
+    178c:	3300      	movi      	r3, 0
+    178e:	2a00      	subi      	r2, 1
+    1790:	2b00      	subi      	r3, 1
+    1792:	6511      	cmplt      	r4, r4
+    1794:	6109      	addc      	r4, r2
+    1796:	614d      	addc      	r5, r3
+    1798:	6990      	and      	r6, r4
+    179a:	69d4      	and      	r7, r5
+    179c:	6d9c      	or      	r6, r7
+    179e:	3e40      	cmpnei      	r6, 0
+    17a0:	3000      	movi      	r0, 0
+    17a2:	6001      	addc      	r0, r0
+    17a4:	6c83      	mov      	r2, r0
+    17a6:	3300      	movi      	r3, 0
+    17a8:	9880      	ld.w      	r4, (r14, 0x0)
+    17aa:	98a1      	ld.w      	r5, (r14, 0x4)
+    17ac:	6d08      	or      	r4, r2
+    17ae:	6d4c      	or      	r5, r3
+    17b0:	32ff      	movi      	r2, 255
+    17b2:	3300      	movi      	r3, 0
+    17b4:	6890      	and      	r2, r4
+    17b6:	68d4      	and      	r3, r5
+    17b8:	3080      	movi      	r0, 128
+    17ba:	640a      	cmpne      	r2, r0
+    17bc:	081b      	bt      	0x17f2	// 17f2 <__pack_d+0x162>
+    17be:	3b40      	cmpnei      	r3, 0
+    17c0:	0819      	bt      	0x17f2	// 17f2 <__pack_d+0x162>
+    17c2:	3380      	movi      	r3, 128
+    17c4:	4361      	lsli      	r3, r3, 1
+    17c6:	68d0      	and      	r3, r4
+    17c8:	3b40      	cmpnei      	r3, 0
+    17ca:	0c06      	bf      	0x17d6	// 17d6 <__pack_d+0x146>
+    17cc:	3280      	movi      	r2, 128
+    17ce:	3300      	movi      	r3, 0
+    17d0:	6511      	cmplt      	r4, r4
+    17d2:	6109      	addc      	r4, r2
+    17d4:	614d      	addc      	r5, r3
+    17d6:	4518      	lsli      	r0, r5, 24
+    17d8:	4c48      	lsri      	r2, r4, 8
+    17da:	4d68      	lsri      	r3, r5, 8
+    17dc:	1093      	lrw      	r4, 0xfffffff	// 1828 <__pack_d+0x198>
+    17de:	6c80      	or      	r2, r0
+    17e0:	6550      	cmphs      	r4, r5
+    17e2:	430c      	lsli      	r0, r3, 12
+    17e4:	486c      	lsri      	r3, r0, 12
+    17e6:	3001      	movi      	r0, 1
+    17e8:	0c02      	bf      	0x17ec	// 17ec <__pack_d+0x15c>
+    17ea:	3000      	movi      	r0, 0
+    17ec:	108e      	lrw      	r4, 0x7ff	// 1824 <__pack_d+0x194>
+    17ee:	6900      	and      	r4, r0
+    17f0:	0785      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    17f2:	327f      	movi      	r2, 127
+    17f4:	07ed      	br      	0x17ce	// 17ce <__pack_d+0x13e>
+    17f6:	3201      	movi      	r2, 1
+    17f8:	708c      	lsl      	r2, r3
+    17fa:	3500      	movi      	r5, 0
+    17fc:	6d0b      	mov      	r4, r2
+    17fe:	07c6      	br      	0x178a	// 178a <__pack_d+0xfa>
+    1800:	341f      	movi      	r4, 31
+    1802:	610e      	subu      	r4, r3
+    1804:	4701      	lsli      	r0, r7, 1
+    1806:	7010      	lsl      	r0, r4
+    1808:	6d1b      	mov      	r4, r6
+    180a:	710d      	lsr      	r4, r3
+    180c:	6d00      	or      	r4, r0
+    180e:	6c1f      	mov      	r0, r7
+    1810:	700d      	lsr      	r0, r3
+    1812:	b880      	st.w      	r4, (r14, 0x0)
+    1814:	b801      	st.w      	r0, (r14, 0x4)
+    1816:	07b3      	br      	0x177c	// 177c <__pack_d+0xec>
+    1818:	fffffc02 	.long	0xfffffc02
+    181c:	000003ff 	.long	0x000003ff
+    1820:	1fffffff 	.long	0x1fffffff
+    1824:	000007ff 	.long	0x000007ff
+    1828:	0fffffff 	.long	0x0fffffff
+
+0000182c <__unpack_d>:
+    182c:	1423      	subi      	r14, r14, 12
+    182e:	b880      	st.w      	r4, (r14, 0x0)
+    1830:	b8c1      	st.w      	r6, (r14, 0x4)
+    1832:	b8e2      	st.w      	r7, (r14, 0x8)
+    1834:	8843      	ld.h      	r2, (r0, 0x6)
+    1836:	4251      	lsli      	r2, r2, 17
+    1838:	9061      	ld.w      	r3, (r0, 0x4)
+    183a:	9080      	ld.w      	r4, (r0, 0x0)
+    183c:	4a55      	lsri      	r2, r2, 21
+    183e:	8007      	ld.b      	r0, (r0, 0x7)
+    1840:	436c      	lsli      	r3, r3, 12
+    1842:	4807      	lsri      	r0, r0, 7
+    1844:	3a40      	cmpnei      	r2, 0
+    1846:	4b6c      	lsri      	r3, r3, 12
+    1848:	b101      	st.w      	r0, (r1, 0x4)
+    184a:	0819      	bt      	0x187c	// 187c <__unpack_d+0x50>
+    184c:	6c93      	mov      	r2, r4
+    184e:	6c8c      	or      	r2, r3
+    1850:	3a40      	cmpnei      	r2, 0
+    1852:	0c2d      	bf      	0x18ac	// 18ac <__unpack_d+0x80>
+    1854:	4c58      	lsri      	r2, r4, 24
+    1856:	4368      	lsli      	r3, r3, 8
+    1858:	6cc8      	or      	r3, r2
+    185a:	3203      	movi      	r2, 3
+    185c:	4408      	lsli      	r0, r4, 8
+    185e:	b140      	st.w      	r2, (r1, 0x0)
+    1860:	1181      	lrw      	r4, 0xfffffc01	// 18e4 <__unpack_d+0xb8>
+    1862:	11c2      	lrw      	r6, 0xfffffff	// 18e8 <__unpack_d+0xbc>
+    1864:	485f      	lsri      	r2, r0, 31
+    1866:	4361      	lsli      	r3, r3, 1
+    1868:	6cc8      	or      	r3, r2
+    186a:	64d8      	cmphs      	r6, r3
+    186c:	6c93      	mov      	r2, r4
+    186e:	4001      	lsli      	r0, r0, 1
+    1870:	2c00      	subi      	r4, 1
+    1872:	0bf9      	bt      	0x1864	// 1864 <__unpack_d+0x38>
+    1874:	b142      	st.w      	r2, (r1, 0x8)
+    1876:	b103      	st.w      	r0, (r1, 0xc)
+    1878:	b164      	st.w      	r3, (r1, 0x10)
+    187a:	0414      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    187c:	101c      	lrw      	r0, 0x7ff	// 18ec <__unpack_d+0xc0>
+    187e:	640a      	cmpne      	r2, r0
+    1880:	0c19      	bf      	0x18b2	// 18b2 <__unpack_d+0x86>
+    1882:	1019      	lrw      	r0, 0xfffffc01	// 18e4 <__unpack_d+0xb8>
+    1884:	6080      	addu      	r2, r0
+    1886:	b142      	st.w      	r2, (r1, 0x8)
+    1888:	3203      	movi      	r2, 3
+    188a:	43e8      	lsli      	r7, r3, 8
+    188c:	b140      	st.w      	r2, (r1, 0x0)
+    188e:	3380      	movi      	r3, 128
+    1890:	4c58      	lsri      	r2, r4, 24
+    1892:	6dc8      	or      	r7, r2
+    1894:	44c8      	lsli      	r6, r4, 8
+    1896:	3200      	movi      	r2, 0
+    1898:	4375      	lsli      	r3, r3, 21
+    189a:	6d88      	or      	r6, r2
+    189c:	6dcc      	or      	r7, r3
+    189e:	b1c3      	st.w      	r6, (r1, 0xc)
+    18a0:	b1e4      	st.w      	r7, (r1, 0x10)
+    18a2:	98e2      	ld.w      	r7, (r14, 0x8)
+    18a4:	98c1      	ld.w      	r6, (r14, 0x4)
+    18a6:	9880      	ld.w      	r4, (r14, 0x0)
+    18a8:	1403      	addi      	r14, r14, 12
+    18aa:	783c      	jmp      	r15
+    18ac:	3302      	movi      	r3, 2
+    18ae:	b160      	st.w      	r3, (r1, 0x0)
+    18b0:	07f9      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    18b2:	6c93      	mov      	r2, r4
+    18b4:	6c8c      	or      	r2, r3
+    18b6:	3a40      	cmpnei      	r2, 0
+    18b8:	0c10      	bf      	0x18d8	// 18d8 <__unpack_d+0xac>
+    18ba:	3280      	movi      	r2, 128
+    18bc:	424c      	lsli      	r2, r2, 12
+    18be:	688c      	and      	r2, r3
+    18c0:	3a40      	cmpnei      	r2, 0
+    18c2:	0c0e      	bf      	0x18de	// 18de <__unpack_d+0xb2>
+    18c4:	3201      	movi      	r2, 1
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	4c58      	lsri      	r2, r4, 24
+    18ca:	4368      	lsli      	r3, r3, 8
+    18cc:	6cc8      	or      	r3, r2
+    18ce:	4408      	lsli      	r0, r4, 8
+    18d0:	3b9b      	bclri      	r3, 27
+    18d2:	b103      	st.w      	r0, (r1, 0xc)
+    18d4:	b164      	st.w      	r3, (r1, 0x10)
+    18d6:	07e6      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    18d8:	3304      	movi      	r3, 4
+    18da:	b160      	st.w      	r3, (r1, 0x0)
+    18dc:	07e3      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    18de:	b140      	st.w      	r2, (r1, 0x0)
+    18e0:	07f4      	br      	0x18c8	// 18c8 <__unpack_d+0x9c>
+    18e2:	0000      	bkpt
+    18e4:	fffffc01 	.long	0xfffffc01
+    18e8:	0fffffff 	.long	0x0fffffff
+    18ec:	000007ff 	.long	0x000007ff
+
+000018f0 <__fpcmp_parts_d>:
+    18f0:	14c1      	push      	r4
+    18f2:	9060      	ld.w      	r3, (r0, 0x0)
+    18f4:	3b01      	cmphsi      	r3, 2
+    18f6:	0c12      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x2a>
+    18f8:	9140      	ld.w      	r2, (r1, 0x0)
+    18fa:	3a01      	cmphsi      	r2, 2
+    18fc:	0c0f      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x2a>
+    18fe:	3b44      	cmpnei      	r3, 4
+    1900:	0c17      	bf      	0x192e	// 192e <__fpcmp_parts_d+0x3e>
+    1902:	3a44      	cmpnei      	r2, 4
+    1904:	0c0f      	bf      	0x1922	// 1922 <__fpcmp_parts_d+0x32>
+    1906:	3b42      	cmpnei      	r3, 2
+    1908:	0c0b      	bf      	0x191e	// 191e <__fpcmp_parts_d+0x2e>
+    190a:	3a42      	cmpnei      	r2, 2
+    190c:	0c13      	bf      	0x1932	// 1932 <__fpcmp_parts_d+0x42>
+    190e:	9061      	ld.w      	r3, (r0, 0x4)
+    1910:	9141      	ld.w      	r2, (r1, 0x4)
+    1912:	648e      	cmpne      	r3, r2
+    1914:	0c14      	bf      	0x193c	// 193c <__fpcmp_parts_d+0x4c>
+    1916:	3b40      	cmpnei      	r3, 0
+    1918:	0808      	bt      	0x1928	// 1928 <__fpcmp_parts_d+0x38>
+    191a:	3001      	movi      	r0, 1
+    191c:	1481      	pop      	r4
+    191e:	3a42      	cmpnei      	r2, 2
+    1920:	0c28      	bf      	0x1970	// 1970 <__fpcmp_parts_d+0x80>
+    1922:	9161      	ld.w      	r3, (r1, 0x4)
+    1924:	3b40      	cmpnei      	r3, 0
+    1926:	0bfa      	bt      	0x191a	// 191a <__fpcmp_parts_d+0x2a>
+    1928:	3000      	movi      	r0, 0
+    192a:	2800      	subi      	r0, 1
+    192c:	1481      	pop      	r4
+    192e:	3a44      	cmpnei      	r2, 4
+    1930:	0c22      	bf      	0x1974	// 1974 <__fpcmp_parts_d+0x84>
+    1932:	9061      	ld.w      	r3, (r0, 0x4)
+    1934:	3b40      	cmpnei      	r3, 0
+    1936:	0bf9      	bt      	0x1928	// 1928 <__fpcmp_parts_d+0x38>
+    1938:	3001      	movi      	r0, 1
+    193a:	07f1      	br      	0x191c	// 191c <__fpcmp_parts_d+0x2c>
+    193c:	9082      	ld.w      	r4, (r0, 0x8)
+    193e:	9142      	ld.w      	r2, (r1, 0x8)
+    1940:	6509      	cmplt      	r2, r4
+    1942:	0bea      	bt      	0x1916	// 1916 <__fpcmp_parts_d+0x26>
+    1944:	6491      	cmplt      	r4, r2
+    1946:	080d      	bt      	0x1960	// 1960 <__fpcmp_parts_d+0x70>
+    1948:	9044      	ld.w      	r2, (r0, 0x10)
+    194a:	9083      	ld.w      	r4, (r0, 0xc)
+    194c:	9103      	ld.w      	r0, (r1, 0xc)
+    194e:	9124      	ld.w      	r1, (r1, 0x10)
+    1950:	6484      	cmphs      	r1, r2
+    1952:	0fe2      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x26>
+    1954:	644a      	cmpne      	r2, r1
+    1956:	0803      	bt      	0x195c	// 195c <__fpcmp_parts_d+0x6c>
+    1958:	6500      	cmphs      	r0, r4
+    195a:	0fde      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x26>
+    195c:	6448      	cmphs      	r2, r1
+    195e:	0805      	bt      	0x1968	// 1968 <__fpcmp_parts_d+0x78>
+    1960:	3b40      	cmpnei      	r3, 0
+    1962:	0fe3      	bf      	0x1928	// 1928 <__fpcmp_parts_d+0x38>
+    1964:	3001      	movi      	r0, 1
+    1966:	07db      	br      	0x191c	// 191c <__fpcmp_parts_d+0x2c>
+    1968:	6486      	cmpne      	r1, r2
+    196a:	0803      	bt      	0x1970	// 1970 <__fpcmp_parts_d+0x80>
+    196c:	6410      	cmphs      	r4, r0
+    196e:	0ff9      	bf      	0x1960	// 1960 <__fpcmp_parts_d+0x70>
+    1970:	3000      	movi      	r0, 0
+    1972:	1481      	pop      	r4
+    1974:	9161      	ld.w      	r3, (r1, 0x4)
+    1976:	9041      	ld.w      	r2, (r0, 0x4)
+    1978:	5b09      	subu      	r0, r3, r2
+    197a:	1481      	pop      	r4
+
+0000197c <__memset_fast>:
+    197c:	14c3      	push      	r4-r6
+    197e:	7444      	zextb      	r1, r1
+    1980:	3a40      	cmpnei      	r2, 0
+    1982:	0c1f      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    1984:	6d43      	mov      	r5, r0
+    1986:	6d03      	mov      	r4, r0
+    1988:	3603      	movi      	r6, 3
+    198a:	6918      	and      	r4, r6
+    198c:	3c40      	cmpnei      	r4, 0
+    198e:	0c1a      	bf      	0x19c2	// 19c2 <__memset_fast+0x46>
+    1990:	a520      	st.b      	r1, (r5, 0x0)
+    1992:	2a00      	subi      	r2, 1
+    1994:	3a40      	cmpnei      	r2, 0
+    1996:	0c15      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    1998:	2500      	addi      	r5, 1
+    199a:	6d17      	mov      	r4, r5
+    199c:	3603      	movi      	r6, 3
+    199e:	6918      	and      	r4, r6
+    19a0:	3c40      	cmpnei      	r4, 0
+    19a2:	0c10      	bf      	0x19c2	// 19c2 <__memset_fast+0x46>
+    19a4:	a520      	st.b      	r1, (r5, 0x0)
+    19a6:	2a00      	subi      	r2, 1
+    19a8:	3a40      	cmpnei      	r2, 0
+    19aa:	0c0b      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    19ac:	2500      	addi      	r5, 1
+    19ae:	6d17      	mov      	r4, r5
+    19b0:	3603      	movi      	r6, 3
+    19b2:	6918      	and      	r4, r6
+    19b4:	3c40      	cmpnei      	r4, 0
+    19b6:	0c06      	bf      	0x19c2	// 19c2 <__memset_fast+0x46>
+    19b8:	a520      	st.b      	r1, (r5, 0x0)
+    19ba:	2a00      	subi      	r2, 1
+    19bc:	2500      	addi      	r5, 1
+    19be:	0402      	br      	0x19c2	// 19c2 <__memset_fast+0x46>
+    19c0:	1483      	pop      	r4-r6
+    19c2:	4168      	lsli      	r3, r1, 8
+    19c4:	6c4c      	or      	r1, r3
+    19c6:	4170      	lsli      	r3, r1, 16
+    19c8:	6c4c      	or      	r1, r3
+    19ca:	3a2f      	cmplti      	r2, 16
+    19cc:	0809      	bt      	0x19de	// 19de <__memset_fast+0x62>
+    19ce:	b520      	st.w      	r1, (r5, 0x0)
+    19d0:	b521      	st.w      	r1, (r5, 0x4)
+    19d2:	b522      	st.w      	r1, (r5, 0x8)
+    19d4:	b523      	st.w      	r1, (r5, 0xc)
+    19d6:	2a0f      	subi      	r2, 16
+    19d8:	250f      	addi      	r5, 16
+    19da:	3a2f      	cmplti      	r2, 16
+    19dc:	0ff9      	bf      	0x19ce	// 19ce <__memset_fast+0x52>
+    19de:	3a23      	cmplti      	r2, 4
+    19e0:	0806      	bt      	0x19ec	// 19ec <__memset_fast+0x70>
+    19e2:	2a03      	subi      	r2, 4
+    19e4:	b520      	st.w      	r1, (r5, 0x0)
+    19e6:	2503      	addi      	r5, 4
+    19e8:	3a23      	cmplti      	r2, 4
+    19ea:	0ffc      	bf      	0x19e2	// 19e2 <__memset_fast+0x66>
+    19ec:	3a40      	cmpnei      	r2, 0
+    19ee:	0fe9      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    19f0:	2a00      	subi      	r2, 1
+    19f2:	a520      	st.b      	r1, (r5, 0x0)
+    19f4:	3a40      	cmpnei      	r2, 0
+    19f6:	0fe5      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    19f8:	2a00      	subi      	r2, 1
+    19fa:	a521      	st.b      	r1, (r5, 0x1)
+    19fc:	3a40      	cmpnei      	r2, 0
+    19fe:	0fe1      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    1a00:	a522      	st.b      	r1, (r5, 0x2)
+    1a02:	1483      	pop      	r4-r6
+
+00001a04 <__memcpy_fast>:
+    1a04:	14c3      	push      	r4-r6
+    1a06:	6d83      	mov      	r6, r0
+    1a08:	6d07      	mov      	r4, r1
+    1a0a:	6d18      	or      	r4, r6
+    1a0c:	3303      	movi      	r3, 3
+    1a0e:	690c      	and      	r4, r3
+    1a10:	3c40      	cmpnei      	r4, 0
+    1a12:	0c0b      	bf      	0x1a28	// 1a28 <__memcpy_fast+0x24>
+    1a14:	3a40      	cmpnei      	r2, 0
+    1a16:	0c08      	bf      	0x1a26	// 1a26 <__memcpy_fast+0x22>
+    1a18:	8160      	ld.b      	r3, (r1, 0x0)
+    1a1a:	2100      	addi      	r1, 1
+    1a1c:	2a00      	subi      	r2, 1
+    1a1e:	a660      	st.b      	r3, (r6, 0x0)
+    1a20:	2600      	addi      	r6, 1
+    1a22:	3a40      	cmpnei      	r2, 0
+    1a24:	0bfa      	bt      	0x1a18	// 1a18 <__memcpy_fast+0x14>
+    1a26:	1483      	pop      	r4-r6
+    1a28:	3a2f      	cmplti      	r2, 16
+    1a2a:	080e      	bt      	0x1a46	// 1a46 <__memcpy_fast+0x42>
+    1a2c:	91a0      	ld.w      	r5, (r1, 0x0)
+    1a2e:	9161      	ld.w      	r3, (r1, 0x4)
+    1a30:	9182      	ld.w      	r4, (r1, 0x8)
+    1a32:	b6a0      	st.w      	r5, (r6, 0x0)
+    1a34:	91a3      	ld.w      	r5, (r1, 0xc)
+    1a36:	b661      	st.w      	r3, (r6, 0x4)
+    1a38:	b682      	st.w      	r4, (r6, 0x8)
+    1a3a:	b6a3      	st.w      	r5, (r6, 0xc)
+    1a3c:	2a0f      	subi      	r2, 16
+    1a3e:	210f      	addi      	r1, 16
+    1a40:	260f      	addi      	r6, 16
+    1a42:	3a2f      	cmplti      	r2, 16
+    1a44:	0ff4      	bf      	0x1a2c	// 1a2c <__memcpy_fast+0x28>
+    1a46:	3a23      	cmplti      	r2, 4
+    1a48:	0808      	bt      	0x1a58	// 1a58 <__memcpy_fast+0x54>
+    1a4a:	9160      	ld.w      	r3, (r1, 0x0)
+    1a4c:	2a03      	subi      	r2, 4
+    1a4e:	2103      	addi      	r1, 4
+    1a50:	b660      	st.w      	r3, (r6, 0x0)
+    1a52:	2603      	addi      	r6, 4
+    1a54:	3a23      	cmplti      	r2, 4
+    1a56:	0ffa      	bf      	0x1a4a	// 1a4a <__memcpy_fast+0x46>
+    1a58:	3a40      	cmpnei      	r2, 0
+    1a5a:	0fe6      	bf      	0x1a26	// 1a26 <__memcpy_fast+0x22>
+    1a5c:	8160      	ld.b      	r3, (r1, 0x0)
+    1a5e:	2100      	addi      	r1, 1
+    1a60:	2a00      	subi      	r2, 1
+    1a62:	a660      	st.b      	r3, (r6, 0x0)
+    1a64:	2600      	addi      	r6, 1
+    1a66:	07f9      	br      	0x1a58	// 1a58 <__memcpy_fast+0x54>
+
+00001a68 <__GI_strncmp>:
+    1a68:	14c1      	push      	r4
+    1a6a:	6cc3      	mov      	r3, r0
+    1a6c:	6080      	addu      	r2, r0
+    1a6e:	040c      	br      	0x1a86	// 1a86 <__GI_strncmp+0x1e>
+    1a70:	8380      	ld.b      	r4, (r3, 0x0)
+    1a72:	8100      	ld.b      	r0, (r1, 0x0)
+    1a74:	6012      	subu      	r0, r4
+    1a76:	6c02      	nor      	r0, r0
+    1a78:	2000      	addi      	r0, 1
+    1a7a:	3840      	cmpnei      	r0, 0
+    1a7c:	0808      	bt      	0x1a8c	// 1a8c <__GI_strncmp+0x24>
+    1a7e:	3c40      	cmpnei      	r4, 0
+    1a80:	0c06      	bf      	0x1a8c	// 1a8c <__GI_strncmp+0x24>
+    1a82:	2300      	addi      	r3, 1
+    1a84:	2100      	addi      	r1, 1
+    1a86:	648c      	cmphs      	r3, r2
+    1a88:	0ff4      	bf      	0x1a70	// 1a70 <__GI_strncmp+0x8>
+    1a8a:	3000      	movi      	r0, 0
+    1a8c:	1481      	pop      	r4
+
+Disassembly of section .text.__main:
+
+00001a90 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    1a90:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    1a92:	1009      	lrw      	r0, 0x20000000	// 1ab4 <__main+0x24>
+    1a94:	1029      	lrw      	r1, 0x4f20	// 1ab8 <__main+0x28>
+    1a96:	6442      	cmpne      	r0, r1
+    1a98:	0c05      	bf      	0x1aa2	// 1aa2 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    1a9a:	1049      	lrw      	r2, 0x2000009c	// 1abc <__main+0x2c>
+    1a9c:	6082      	subu      	r2, r0
+    1a9e:	e3ffffb3 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    1aa2:	1048      	lrw      	r2, 0x20000674	// 1ac0 <__main+0x30>
+    1aa4:	1008      	lrw      	r0, 0x2000009c	// 1ac4 <__main+0x34>
+    1aa6:	640a      	cmpne      	r2, r0
+    1aa8:	0c05      	bf      	0x1ab2	// 1ab2 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    1aaa:	6082      	subu      	r2, r0
+    1aac:	3100      	movi      	r1, 0
+    1aae:	e3ffff67 	bsr      	0x197c	// 197c <__memset_fast>
+  }
+
+	
+}
+    1ab2:	1490      	pop      	r15
+    1ab4:	20000000 	.long	0x20000000
+    1ab8:	00004f20 	.long	0x00004f20
+    1abc:	2000009c 	.long	0x2000009c
+    1ac0:	20000674 	.long	0x20000674
+    1ac4:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00001ac8 <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    1ac8:	3848      	cmpnei      	r0, 8
+    1aca:	080a      	bt      	0x1ade	// 1ade <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    1acc:	107a      	lrw      	r3, 0x2000004c	// 1b34 <SYSCON_General_CMD.part.0+0x6c>
+    1ace:	32ff      	movi      	r2, 255
+    1ad0:	9320      	ld.w      	r1, (r3, 0x0)
+    1ad2:	9160      	ld.w      	r3, (r1, 0x0)
+    1ad4:	424c      	lsli      	r2, r2, 12
+    1ad6:	68c9      	andn      	r3, r2
+    1ad8:	3bae      	bseti      	r3, 14
+    1ada:	3bb2      	bseti      	r3, 18
+    1adc:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    1ade:	1077      	lrw      	r3, 0x2000005c	// 1b38 <SYSCON_General_CMD.part.0+0x70>
+    1ae0:	9360      	ld.w      	r3, (r3, 0x0)
+    1ae2:	9341      	ld.w      	r2, (r3, 0x4)
+    1ae4:	6c80      	or      	r2, r0
+    1ae6:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    1ae8:	9343      	ld.w      	r2, (r3, 0xc)
+    1aea:	6880      	and      	r2, r0
+    1aec:	3a40      	cmpnei      	r2, 0
+    1aee:	0ffd      	bf      	0x1ae8	// 1ae8 <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    1af0:	3842      	cmpnei      	r0, 2
+    1af2:	0807      	bt      	0x1b00	// 1b00 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    1af4:	3102      	movi      	r1, 2
+    1af6:	9344      	ld.w      	r2, (r3, 0x10)
+    1af8:	6884      	and      	r2, r1
+    1afa:	3a40      	cmpnei      	r2, 0
+    1afc:	0ffd      	bf      	0x1af6	// 1af6 <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    1afe:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    1b00:	3802      	cmphsi      	r0, 3
+    1b02:	0809      	bt      	0x1b14	// 1b14 <SYSCON_General_CMD.part.0+0x4c>
+    1b04:	3841      	cmpnei      	r0, 1
+    1b06:	0bfc      	bt      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    1b08:	3101      	movi      	r1, 1
+    1b0a:	9344      	ld.w      	r2, (r3, 0x10)
+    1b0c:	6884      	and      	r2, r1
+    1b0e:	3a40      	cmpnei      	r2, 0
+    1b10:	0ffd      	bf      	0x1b0a	// 1b0a <SYSCON_General_CMD.part.0+0x42>
+    1b12:	07f6      	br      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1b14:	3848      	cmpnei      	r0, 8
+    1b16:	0807      	bt      	0x1b24	// 1b24 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    1b18:	3108      	movi      	r1, 8
+    1b1a:	9344      	ld.w      	r2, (r3, 0x10)
+    1b1c:	6884      	and      	r2, r1
+    1b1e:	3a40      	cmpnei      	r2, 0
+    1b20:	0ffd      	bf      	0x1b1a	// 1b1a <SYSCON_General_CMD.part.0+0x52>
+    1b22:	07ee      	br      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1b24:	3850      	cmpnei      	r0, 16
+    1b26:	0bec      	bt      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    1b28:	3110      	movi      	r1, 16
+    1b2a:	9344      	ld.w      	r2, (r3, 0x10)
+    1b2c:	6884      	and      	r2, r1
+    1b2e:	3a40      	cmpnei      	r2, 0
+    1b30:	0ffd      	bf      	0x1b2a	// 1b2a <SYSCON_General_CMD.part.0+0x62>
+    1b32:	07e6      	br      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+    1b34:	2000004c 	.long	0x2000004c
+    1b38:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00001b3c <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    1b3c:	106c      	lrw      	r3, 0x2000005c	// 1b6c <SYSCON_RST_VALUE+0x30>
+    1b3e:	104d      	lrw      	r2, 0xffff	// 1b70 <SYSCON_RST_VALUE+0x34>
+    1b40:	9360      	ld.w      	r3, (r3, 0x0)
+    1b42:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    1b44:	104c      	lrw      	r2, 0xffffff	// 1b74 <SYSCON_RST_VALUE+0x38>
+    1b46:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    1b48:	104c      	lrw      	r2, 0xd22d0000	// 1b78 <SYSCON_RST_VALUE+0x3c>
+    1b4a:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    1b4c:	104c      	lrw      	r2, 0x70ff3bff	// 1b7c <SYSCON_RST_VALUE+0x40>
+    1b4e:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    1b50:	320a      	movi      	r2, 10
+    1b52:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b54:	102b      	lrw      	r1, 0x70c	// 1b80 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    1b56:	237f      	addi      	r3, 128
+    1b58:	3200      	movi      	r2, 0
+    1b5a:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    1b5c:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b5e:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    1b60:	1029      	lrw      	r1, 0x3fe	// 1b84 <SYSCON_RST_VALUE+0x48>
+    1b62:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    1b64:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    1b66:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    1b68:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    1b6a:	783c      	jmp      	r15
+    1b6c:	2000005c 	.long	0x2000005c
+    1b70:	0000ffff 	.long	0x0000ffff
+    1b74:	00ffffff 	.long	0x00ffffff
+    1b78:	d22d0000 	.long	0xd22d0000
+    1b7c:	70ff3bff 	.long	0x70ff3bff
+    1b80:	0000070c 	.long	0x0000070c
+    1b84:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+00001b88 <SYSCON_General_CMD>:
+{
+    1b88:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    1b8a:	3840      	cmpnei      	r0, 0
+    1b8c:	0c05      	bf      	0x1b96	// 1b96 <SYSCON_General_CMD+0xe>
+    1b8e:	6c07      	mov      	r0, r1
+    1b90:	e3ffff9c 	bsr      	0x1ac8	// 1ac8 <SYSCON_General_CMD.part.0>
+}
+    1b94:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    1b96:	1068      	lrw      	r3, 0x2000005c	// 1bb4 <SYSCON_General_CMD+0x2c>
+    1b98:	9360      	ld.w      	r3, (r3, 0x0)
+    1b9a:	9342      	ld.w      	r2, (r3, 0x8)
+    1b9c:	6c84      	or      	r2, r1
+    1b9e:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    1ba0:	9343      	ld.w      	r2, (r3, 0xc)
+    1ba2:	6884      	and      	r2, r1
+    1ba4:	3a40      	cmpnei      	r2, 0
+    1ba6:	0bfd      	bt      	0x1ba0	// 1ba0 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    1ba8:	237f      	addi      	r3, 128
+    1baa:	9301      	ld.w      	r0, (r3, 0x4)
+    1bac:	6c40      	or      	r1, r0
+    1bae:	b321      	st.w      	r1, (r3, 0x4)
+}
+    1bb0:	07f2      	br      	0x1b94	// 1b94 <SYSCON_General_CMD+0xc>
+    1bb2:	0000      	bkpt
+    1bb4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+00001bb8 <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    1bb8:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    1bba:	3b48      	cmpnei      	r3, 8
+    1bbc:	0828      	bt      	0x1c0c	// 1c0c <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1bbe:	109d      	lrw      	r4, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bc0:	3501      	movi      	r5, 1
+    1bc2:	9480      	ld.w      	r4, (r4, 0x0)
+    1bc4:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    1bc6:	3504      	movi      	r5, 4
+    1bc8:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1bca:	5b83      	subi      	r4, r3, 1
+    1bcc:	3c01      	cmphsi      	r4, 2
+    1bce:	0c2b      	bf      	0x1c24	// 1c24 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1bd0:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    1bd2:	3c04      	cmphsi      	r4, 5
+    1bd4:	0c03      	bf      	0x1bda	// 1bda <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1bd6:	3b4b      	cmpnei      	r3, 11
+    1bd8:	0807      	bt      	0x1be6	// 1be6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1bda:	1076      	lrw      	r3, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bdc:	3401      	movi      	r4, 1
+    1bde:	9360      	ld.w      	r3, (r3, 0x0)
+    1be0:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    1be2:	3400      	movi      	r4, 0
+    1be4:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1be6:	1094      	lrw      	r4, 0xd22d0000	// 1c34 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    1be8:	6c10      	or      	r0, r4
+    1bea:	1074      	lrw      	r3, 0x2000005c	// 1c38 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    1bec:	6c40      	or      	r1, r0
+    1bee:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bf0:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1bf2:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bf4:	4001      	lsli      	r0, r0, 1
+    1bf6:	9324      	ld.w      	r1, (r3, 0x10)
+    1bf8:	6840      	and      	r1, r0
+    1bfa:	3940      	cmpnei      	r1, 0
+    1bfc:	0ffd      	bf      	0x1bf6	// 1bf6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    1bfe:	1030      	lrw      	r1, 0xc33c0000	// 1c3c <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    1c00:	6c48      	or      	r1, r2
+    1c02:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    1c04:	9328      	ld.w      	r1, (r3, 0x20)
+    1c06:	644a      	cmpne      	r2, r1
+    1c08:	0bfe      	bt      	0x1c04	// 1c04 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    1c0a:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    1c0c:	3b40      	cmpnei      	r3, 0
+    1c0e:	0c03      	bf      	0x1c14	// 1c14 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    1c10:	3b49      	cmpnei      	r3, 9
+    1c12:	0807      	bt      	0x1c20	// 1c20 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    1c14:	1087      	lrw      	r4, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1c16:	3501      	movi      	r5, 1
+    1c18:	9480      	ld.w      	r4, (r4, 0x0)
+    1c1a:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    1c1c:	3502      	movi      	r5, 2
+    1c1e:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1c20:	3b4a      	cmpnei      	r3, 10
+    1c22:	0bd4      	bt      	0x1bca	// 1bca <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    1c24:	1083      	lrw      	r4, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1c26:	3501      	movi      	r5, 1
+    1c28:	9480      	ld.w      	r4, (r4, 0x0)
+    1c2a:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    1c2c:	b4a5      	st.w      	r5, (r4, 0x14)
+    1c2e:	07d1      	br      	0x1bd0	// 1bd0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    1c30:	20000060 	.long	0x20000060
+    1c34:	d22d0000 	.long	0xd22d0000
+    1c38:	2000005c 	.long	0x2000005c
+    1c3c:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+00001c40 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    1c40:	14d1      	push      	r4, r15
+    1c42:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    1c44:	3110      	movi      	r1, 16
+    1c46:	3000      	movi      	r0, 0
+    1c48:	e3ffffa0 	bsr      	0x1b88	// 1b88 <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    1c4c:	1066      	lrw      	r3, 0x2000005c	// 1c64 <SYSCON_HFOSC_SELECTE+0x24>
+    1c4e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c50:	9319      	ld.w      	r0, (r3, 0x64)
+    1c52:	3884      	bclri      	r0, 4
+    1c54:	3885      	bclri      	r0, 5
+    1c56:	6c10      	or      	r0, r4
+    1c58:	b319      	st.w      	r0, (r3, 0x64)
+    1c5a:	3010      	movi      	r0, 16
+    1c5c:	e3ffff36 	bsr      	0x1ac8	// 1ac8 <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    1c60:	1491      	pop      	r4, r15
+    1c62:	0000      	bkpt
+    1c64:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+00001c68 <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    1c68:	106c      	lrw      	r3, 0x2000005c	// 1c98 <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    1c6a:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c6c:	9360      	ld.w      	r3, (r3, 0x0)
+    1c6e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1c70:	0c0a      	bf      	0x1c84	// 1c84 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c72:	104b      	lrw      	r2, 0x78870000	// 1c9c <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c74:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c76:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c78:	4125      	lsli      	r1, r1, 5
+    1c7a:	934d      	ld.w      	r2, (r3, 0x34)
+    1c7c:	6884      	and      	r2, r1
+    1c7e:	3a40      	cmpnei      	r2, 0
+    1c80:	0ffd      	bf      	0x1c7a	// 1c7a <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    1c82:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c84:	1047      	lrw      	r2, 0x788755aa	// 1ca0 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c86:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c88:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c8a:	4125      	lsli      	r1, r1, 5
+    1c8c:	934d      	ld.w      	r2, (r3, 0x34)
+    1c8e:	6884      	and      	r2, r1
+    1c90:	3a40      	cmpnei      	r2, 0
+    1c92:	0bfd      	bt      	0x1c8c	// 1c8c <SYSCON_WDT_CMD+0x24>
+    1c94:	07f7      	br      	0x1c82	// 1c82 <SYSCON_WDT_CMD+0x1a>
+    1c96:	0000      	bkpt
+    1c98:	2000005c 	.long	0x2000005c
+    1c9c:	78870000 	.long	0x78870000
+    1ca0:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00001ca4 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    1ca4:	1064      	lrw      	r3, 0x2000005c	// 1cb4 <SYSCON_IWDCNT_Reload+0x10>
+    1ca6:	32b4      	movi      	r2, 180
+    1ca8:	9360      	ld.w      	r3, (r3, 0x0)
+    1caa:	237f      	addi      	r3, 128
+    1cac:	4257      	lsli      	r2, r2, 23
+    1cae:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    1cb0:	783c      	jmp      	r15
+    1cb2:	0000      	bkpt
+    1cb4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+00001cb8 <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    1cb8:	1044      	lrw      	r2, 0x87780000	// 1cc8 <SYSCON_IWDCNT_Config+0x10>
+    1cba:	1065      	lrw      	r3, 0x2000005c	// 1ccc <SYSCON_IWDCNT_Config+0x14>
+    1cbc:	6c48      	or      	r1, r2
+    1cbe:	9360      	ld.w      	r3, (r3, 0x0)
+    1cc0:	6c04      	or      	r0, r1
+    1cc2:	237f      	addi      	r3, 128
+    1cc4:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    1cc6:	783c      	jmp      	r15
+    1cc8:	87780000 	.long	0x87780000
+    1ccc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00001cd0 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    1cd0:	14c3      	push      	r4-r6
+    1cd2:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    1cd4:	10c5      	lrw      	r6, 0xb44b0000	// 1ce8 <SYSCON_LVD_Config+0x18>
+    1cd6:	6d18      	or      	r4, r6
+    1cd8:	6cd0      	or      	r3, r4
+    1cda:	6c8c      	or      	r2, r3
+    1cdc:	6c48      	or      	r1, r2
+    1cde:	10a4      	lrw      	r5, 0x2000005c	// 1cec <SYSCON_LVD_Config+0x1c>
+    1ce0:	6c04      	or      	r0, r1
+    1ce2:	95a0      	ld.w      	r5, (r5, 0x0)
+    1ce4:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    1ce6:	1483      	pop      	r4-r6
+    1ce8:	b44b0000 	.long	0xb44b0000
+    1cec:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00001cf0 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    1cf0:	1066      	lrw      	r3, 0x2000005c	// 1d08 <LVD_Int_Enable+0x18>
+    1cf2:	3180      	movi      	r1, 128
+    1cf4:	9360      	ld.w      	r3, (r3, 0x0)
+    1cf6:	3280      	movi      	r2, 128
+    1cf8:	604c      	addu      	r1, r3
+    1cfa:	4244      	lsli      	r2, r2, 4
+    1cfc:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    1cfe:	935d      	ld.w      	r2, (r3, 0x74)
+    1d00:	3aab      	bseti      	r2, 11
+    1d02:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1d04:	783c      	jmp      	r15
+    1d06:	0000      	bkpt
+    1d08:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00001d0c <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    1d0c:	1066      	lrw      	r3, 0x2000005c	// 1d24 <IWDT_Int_Enable+0x18>
+    1d0e:	3180      	movi      	r1, 128
+    1d10:	9360      	ld.w      	r3, (r3, 0x0)
+    1d12:	3280      	movi      	r2, 128
+    1d14:	604c      	addu      	r1, r3
+    1d16:	4241      	lsli      	r2, r2, 1
+    1d18:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    1d1a:	935d      	ld.w      	r2, (r3, 0x74)
+    1d1c:	3aa8      	bseti      	r2, 8
+    1d1e:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1d20:	783c      	jmp      	r15
+    1d22:	0000      	bkpt
+    1d24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+00001d28 <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    1d28:	3a40      	cmpnei      	r2, 0
+    1d2a:	0c04      	bf      	0x1d32	// 1d32 <EXTI_trigger_CMD+0xa>
+    1d2c:	3a41      	cmpnei      	r2, 1
+    1d2e:	0c0e      	bf      	0x1d4a	// 1d4a <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    1d30:	783c      	jmp      	r15
+    1d32:	106d      	lrw      	r3, 0x2000005c	// 1d64 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d34:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    1d36:	9360      	ld.w      	r3, (r3, 0x0)
+    1d38:	237f      	addi      	r3, 128
+    1d3a:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    1d3c:	0c04      	bf      	0x1d44	// 1d44 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    1d3e:	6c48      	or      	r1, r2
+    1d40:	b325      	st.w      	r1, (r3, 0x14)
+    1d42:	07f7      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    1d44:	6885      	andn      	r2, r1
+    1d46:	b345      	st.w      	r2, (r3, 0x14)
+    1d48:	07f4      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+    1d4a:	1067      	lrw      	r3, 0x2000005c	// 1d64 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d4c:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    1d4e:	9360      	ld.w      	r3, (r3, 0x0)
+    1d50:	237f      	addi      	r3, 128
+    1d52:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    1d54:	0c04      	bf      	0x1d5c	// 1d5c <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    1d56:	6c48      	or      	r1, r2
+    1d58:	b326      	st.w      	r1, (r3, 0x18)
+    1d5a:	07eb      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    1d5c:	6885      	andn      	r2, r1
+    1d5e:	b346      	st.w      	r2, (r3, 0x18)
+}
+    1d60:	07e8      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+    1d62:	0000      	bkpt
+    1d64:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_interrupt_CMD:
+
+00001d68 <EXTI_interrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void EXTI_interrupt_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN)
+{
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+    1d68:	106b      	lrw      	r3, 0x2000005c	// 1d94 <EXTI_interrupt_CMD+0x2c>
+    1d6a:	104c      	lrw      	r2, 0x3fff	// 1d98 <EXTI_interrupt_CMD+0x30>
+    1d6c:	9360      	ld.w      	r3, (r3, 0x0)
+    1d6e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1d70:	3840      	cmpnei      	r0, 0
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+    1d72:	b34b      	st.w      	r2, (r3, 0x2c)
+	if(NewState != DISABLE)
+    1d74:	0c0c      	bf      	0x1d8c	// 1d8c <EXTI_interrupt_CMD+0x24>
+	{
+		SYSCON->EXIER|=EXIPIN;								//EXI4 interrupt enable
+    1d76:	9347      	ld.w      	r2, (r3, 0x1c)
+    1d78:	6c84      	or      	r2, r1
+    1d7a:	b347      	st.w      	r2, (r3, 0x1c)
+		while(!(SYSCON->EXIMR&EXIPIN));						//Check EXI is enabled or not
+    1d7c:	9349      	ld.w      	r2, (r3, 0x24)
+    1d7e:	6884      	and      	r2, r1
+    1d80:	3a40      	cmpnei      	r2, 0
+    1d82:	0ffd      	bf      	0x1d7c	// 1d7c <EXTI_interrupt_CMD+0x14>
+		SYSCON->EXICR |=EXIPIN;								// Clear EXI status bit
+    1d84:	934b      	ld.w      	r2, (r3, 0x2c)
+    1d86:	6c48      	or      	r1, r2
+    1d88:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else
+	{
+		SYSCON->EXIDR|=EXIPIN;
+	}
+}
+    1d8a:	783c      	jmp      	r15
+		SYSCON->EXIDR|=EXIPIN;
+    1d8c:	9348      	ld.w      	r2, (r3, 0x20)
+    1d8e:	6c48      	or      	r1, r2
+    1d90:	b328      	st.w      	r1, (r3, 0x20)
+}
+    1d92:	07fc      	br      	0x1d8a	// 1d8a <EXTI_interrupt_CMD+0x22>
+    1d94:	2000005c 	.long	0x2000005c
+    1d98:	00003fff 	.long	0x00003fff
+
+Disassembly of section .text.GPIO_EXTI_interrupt:
+
+00001d9c <GPIO_EXTI_interrupt>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPIO_EXTI_interrupt(CSP_GPIO_T * GPIOX,U32_T GPIO_IECR_VALUE)
+{
+	GPIOX->IECR=GPIO_IECR_VALUE;
+    1d9c:	b02b      	st.w      	r1, (r0, 0x2c)
+}
+    1d9e:	783c      	jmp      	r15
+
+Disassembly of section .text.EXI4_Int_Enable:
+
+00001da0 <EXI4_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI4_INT);    
+    1da0:	3380      	movi      	r3, 128
+    1da2:	4370      	lsli      	r3, r3, 16
+    1da4:	1042      	lrw      	r2, 0xe000e100	// 1dac <EXI4_Int_Enable+0xc>
+    1da6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    1da8:	783c      	jmp      	r15
+    1daa:	0000      	bkpt
+    1dac:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+00001db0 <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    1db0:	3202      	movi      	r2, 2
+    1db2:	1062      	lrw      	r3, 0xe000e100	// 1db8 <SYSCON_Int_Enable+0x8>
+    1db4:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1db6:	783c      	jmp      	r15
+    1db8:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_Int_Disable:
+
+00001dbc <SYSCON_Int_Disable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Disable(void)
+{
+    INTC_ICER_WRITE(SYSCON_INT);    
+    1dbc:	3202      	movi      	r2, 2
+    1dbe:	1062      	lrw      	r3, 0xe000e180	// 1dc4 <SYSCON_Int_Disable+0x8>
+    1dc0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1dc2:	783c      	jmp      	r15
+    1dc4:	e000e180 	.long	0xe000e180
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+00001dc8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1dc8:	1066      	lrw      	r3, 0xe000e400	// 1de0 <SYSCON_INT_Priority+0x18>
+    1dca:	1047      	lrw      	r2, 0xc0c0c0c0	// 1de4 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1dcc:	1027      	lrw      	r1, 0xc0c000c0	// 1de8 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1dce:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    1dd0:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    1dd2:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    1dd4:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    1dd6:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    1dd8:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1dda:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    1ddc:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    1dde:	783c      	jmp      	r15
+    1de0:	e000e400 	.long	0xe000e400
+    1de4:	c0c0c0c0 	.long	0xc0c0c0c0
+    1de8:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+00001dec <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    1dec:	14c1      	push      	r4
+    1dee:	4862      	lsri      	r3, r0, 2
+    1df0:	4342      	lsli      	r2, r3, 2
+    1df2:	106a      	lrw      	r3, 0x20000064	// 1e18 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    1df4:	3403      	movi      	r4, 3
+    1df6:	9360      	ld.w      	r3, (r3, 0x0)
+    1df8:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1dfa:	3280      	movi      	r2, 128
+    1dfc:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    1dfe:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1e00:	60c8      	addu      	r3, r2
+    1e02:	4003      	lsli      	r0, r0, 3
+    1e04:	34ff      	movi      	r4, 255
+    1e06:	9340      	ld.w      	r2, (r3, 0x0)
+    1e08:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1e0a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1e0c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1e0e:	7040      	lsl      	r1, r0
+    1e10:	6c48      	or      	r1, r2
+    1e12:	b320      	st.w      	r1, (r3, 0x0)
+}
+    1e14:	1481      	pop      	r4
+    1e16:	0000      	bkpt
+    1e18:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+00001e1c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    1e1c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    1e1e:	3907      	cmphsi      	r1, 8
+{
+    1e20:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    1e22:	0830      	bt      	0x1e82	// 1e82 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    1e24:	5903      	subi      	r0, r1, 1
+    1e26:	3806      	cmphsi      	r0, 7
+    1e28:	0827      	bt      	0x1e76	// 1e76 <GPIO_Init+0x5a>
+    1e2a:	e3fff775 	bsr      	0xd14	// d14 <___gnu_csky_case_uqi>
+    1e2e:	1004      	.short	0x1004
+    1e30:	1d1a1613 	.long	0x1d1a1613
+    1e34:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e36:	3300      	movi      	r3, 0
+    1e38:	3104      	movi      	r1, 4
+    1e3a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    1e3c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1e3e:	9440      	ld.w      	r2, (r4, 0x0)
+    1e40:	68c8      	and      	r3, r2
+        if (Dir)
+    1e42:	0c1e      	bf      	0x1e7e	// 1e7e <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1e44:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1e46:	7084      	lsl      	r2, r1
+    1e48:	6cc8      	or      	r3, r2
+    1e4a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    1e4c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e4e:	3108      	movi      	r1, 8
+    1e50:	1166      	lrw      	r3, 0xfffff0ff	// 1ee8 <GPIO_Init+0xcc>
+    1e52:	07f5      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e54:	310c      	movi      	r1, 12
+    1e56:	1166      	lrw      	r3, 0xffff0fff	// 1eec <GPIO_Init+0xd0>
+    1e58:	07f2      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e5a:	3110      	movi      	r1, 16
+    1e5c:	1165      	lrw      	r3, 0xfff10000	// 1ef0 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e5e:	2b00      	subi      	r3, 1
+    1e60:	07ee      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e62:	3114      	movi      	r1, 20
+    1e64:	1164      	lrw      	r3, 0xff100000	// 1ef4 <GPIO_Init+0xd8>
+    1e66:	07fc      	br      	0x1e5e	// 1e5e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e68:	33f1      	movi      	r3, 241
+    1e6a:	3118      	movi      	r1, 24
+    1e6c:	4378      	lsli      	r3, r3, 24
+    1e6e:	07f8      	br      	0x1e5e	// 1e5e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e70:	311c      	movi      	r1, 28
+    1e72:	1162      	lrw      	r3, 0xfffffff	// 1ef8 <GPIO_Init+0xdc>
+    1e74:	07e4      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e76:	3300      	movi      	r3, 0
+    1e78:	3100      	movi      	r1, 0
+    1e7a:	2b0f      	subi      	r3, 16
+    1e7c:	07e0      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1e7e:	3202      	movi      	r2, 2
+    1e80:	07e3      	br      	0x1e46	// 1e46 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    1e82:	390f      	cmphsi      	r1, 16
+    1e84:	0be4      	bt      	0x1e4c	// 1e4c <GPIO_Init+0x30>
+        switch (PinNum)
+    1e86:	2908      	subi      	r1, 9
+    1e88:	3906      	cmphsi      	r1, 7
+    1e8a:	6c07      	mov      	r0, r1
+    1e8c:	0827      	bt      	0x1eda	// 1eda <GPIO_Init+0xbe>
+    1e8e:	e3fff743 	bsr      	0xd14	// d14 <___gnu_csky_case_uqi>
+    1e92:	1004      	.short	0x1004
+    1e94:	1d1a1613 	.long	0x1d1a1613
+    1e98:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e9a:	3300      	movi      	r3, 0
+    1e9c:	3104      	movi      	r1, 4
+    1e9e:	2bf0      	subi      	r3, 241
+      if (Dir)
+    1ea0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1ea2:	9441      	ld.w      	r2, (r4, 0x4)
+    1ea4:	68c8      	and      	r3, r2
+      if (Dir)
+    1ea6:	0c1e      	bf      	0x1ee2	// 1ee2 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1ea8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1eaa:	7084      	lsl      	r2, r1
+    1eac:	6cc8      	or      	r3, r2
+    1eae:	b461      	st.w      	r3, (r4, 0x4)
+}
+    1eb0:	07ce      	br      	0x1e4c	// 1e4c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1eb2:	3108      	movi      	r1, 8
+    1eb4:	106d      	lrw      	r3, 0xfffff0ff	// 1ee8 <GPIO_Init+0xcc>
+    1eb6:	07f5      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1eb8:	310c      	movi      	r1, 12
+    1eba:	106d      	lrw      	r3, 0xffff0fff	// 1eec <GPIO_Init+0xd0>
+    1ebc:	07f2      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1ebe:	3110      	movi      	r1, 16
+    1ec0:	106c      	lrw      	r3, 0xfff10000	// 1ef0 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1ec2:	2b00      	subi      	r3, 1
+    1ec4:	07ee      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1ec6:	3114      	movi      	r1, 20
+    1ec8:	106b      	lrw      	r3, 0xff100000	// 1ef4 <GPIO_Init+0xd8>
+    1eca:	07fc      	br      	0x1ec2	// 1ec2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1ecc:	33f1      	movi      	r3, 241
+    1ece:	3118      	movi      	r1, 24
+    1ed0:	4378      	lsli      	r3, r3, 24
+    1ed2:	07f8      	br      	0x1ec2	// 1ec2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1ed4:	311c      	movi      	r1, 28
+    1ed6:	1069      	lrw      	r3, 0xfffffff	// 1ef8 <GPIO_Init+0xdc>
+    1ed8:	07e4      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1eda:	3300      	movi      	r3, 0
+    1edc:	3100      	movi      	r1, 0
+    1ede:	2b0f      	subi      	r3, 16
+    1ee0:	07e0      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1ee2:	3202      	movi      	r2, 2
+    1ee4:	07e3      	br      	0x1eaa	// 1eaa <GPIO_Init+0x8e>
+    1ee6:	0000      	bkpt
+    1ee8:	fffff0ff 	.long	0xfffff0ff
+    1eec:	ffff0fff 	.long	0xffff0fff
+    1ef0:	fff10000 	.long	0xfff10000
+    1ef4:	ff100000 	.long	0xff100000
+    1ef8:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+00001efc <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    1efc:	4121      	lsli      	r1, r1, 1
+    1efe:	3203      	movi      	r2, 3
+    1f00:	9068      	ld.w      	r3, (r0, 0x20)
+    1f02:	7084      	lsl      	r2, r1
+    1f04:	68c9      	andn      	r3, r2
+    1f06:	3201      	movi      	r2, 1
+    1f08:	7084      	lsl      	r2, r1
+    1f0a:	6cc8      	or      	r3, r2
+    1f0c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    1f0e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00001f10 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    1f10:	4121      	lsli      	r1, r1, 1
+    1f12:	3301      	movi      	r3, 1
+    1f14:	9049      	ld.w      	r2, (r0, 0x24)
+    1f16:	70c4      	lsl      	r3, r1
+    1f18:	6cc8      	or      	r3, r2
+    1f1a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    1f1c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_IntGroup_Set:
+
+00001f20 <GPIO_IntGroup_Set>:
+//EXI16~EXI17:GPIOA0.0~GPIOA0.7
+//EXI18~EXI19:GPIOB0.0~GPIOB0.3
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_IntGroup_Set(GPIO_Group_TypeDef IO_MODE , uint8_t PinNum , GPIO_EXIPIN_TypeDef Selete_EXI_x)
+{
+    1f20:	14c1      	push      	r4
+    1f22:	1422      	subi      	r14, r14, 8
+	volatile unsigned int  R_data_temp;
+    volatile unsigned char R_GPIO_Pin;
+	if(Selete_EXI_x<16)
+    1f24:	3a0f      	cmphsi      	r2, 16
+    1f26:	084f      	bt      	0x1fc4	// 1fc4 <GPIO_IntGroup_Set+0xa4>
+	{
+		if((Selete_EXI_x==0)||(Selete_EXI_x==8))
+    1f28:	6ccb      	mov      	r3, r2
+    1f2a:	3b83      	bclri      	r3, 3
+    1f2c:	3b40      	cmpnei      	r3, 0
+    1f2e:	0813      	bt      	0x1f54	// 1f54 <GPIO_IntGroup_Set+0x34>
+		{
+			R_data_temp=0xfffffff0;
+    1f30:	2b0f      	subi      	r3, 16
+    1f32:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=0;
+    1f34:	3300      	movi      	r3, 0
+		else if((Selete_EXI_x==7)||(Selete_EXI_x==15))
+		{
+			R_data_temp=0x0fffffff;
+			R_GPIO_Pin=28;
+		}
+		if(Selete_EXI_x<8)
+    1f36:	3a07      	cmphsi      	r2, 8
+			R_GPIO_Pin=28;
+    1f38:	dc6e0003 	st.b      	r3, (r14, 0x3)
+    1f3c:	1176      	lrw      	r3, 0x20000044	// 2014 <GPIO_IntGroup_Set+0xf4>
+		if(Selete_EXI_x<8)
+    1f3e:	0c38      	bf      	0x1fae	// 1fae <GPIO_IntGroup_Set+0x8e>
+		{
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+		}
+		else if((Selete_EXI_x<16)&&(Selete_EXI_x>=8))
+		{
+			GPIOGRP->IGRPH =(GPIOGRP->IGRPH & R_data_temp) | (IO_MODE<<R_GPIO_Pin);    
+    1f40:	9340      	ld.w      	r2, (r3, 0x0)
+    1f42:	9261      	ld.w      	r3, (r2, 0x4)
+    1f44:	9881      	ld.w      	r4, (r14, 0x4)
+    1f46:	d82e0003 	ld.b      	r1, (r14, 0x3)
+    1f4a:	68d0      	and      	r3, r4
+    1f4c:	7004      	lsl      	r0, r1
+    1f4e:	6c0c      	or      	r0, r3
+    1f50:	b201      	st.w      	r0, (r2, 0x4)
+    1f52:	0437      	br      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+		else if((Selete_EXI_x==1)||(Selete_EXI_x==9))
+    1f54:	3b41      	cmpnei      	r3, 1
+    1f56:	0806      	bt      	0x1f62	// 1f62 <GPIO_IntGroup_Set+0x42>
+			R_data_temp=0xffffff0f;
+    1f58:	3300      	movi      	r3, 0
+    1f5a:	2bf0      	subi      	r3, 241
+    1f5c:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=4;
+    1f5e:	3304      	movi      	r3, 4
+    1f60:	07eb      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==2)||(Selete_EXI_x==10))
+    1f62:	3b42      	cmpnei      	r3, 2
+    1f64:	0805      	bt      	0x1f6e	// 1f6e <GPIO_IntGroup_Set+0x4e>
+			R_data_temp=0xfffff0ff;
+    1f66:	116d      	lrw      	r3, 0xfffff0ff	// 2018 <GPIO_IntGroup_Set+0xf8>
+    1f68:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=8;
+    1f6a:	3308      	movi      	r3, 8
+    1f6c:	07e5      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==3)||(Selete_EXI_x==11))
+    1f6e:	3b43      	cmpnei      	r3, 3
+    1f70:	0805      	bt      	0x1f7a	// 1f7a <GPIO_IntGroup_Set+0x5a>
+			R_data_temp=0xffff0fff;
+    1f72:	116b      	lrw      	r3, 0xffff0fff	// 201c <GPIO_IntGroup_Set+0xfc>
+    1f74:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=12;
+    1f76:	330c      	movi      	r3, 12
+    1f78:	07df      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==4)||(Selete_EXI_x==12))
+    1f7a:	3b44      	cmpnei      	r3, 4
+    1f7c:	0806      	bt      	0x1f88	// 1f88 <GPIO_IntGroup_Set+0x68>
+			R_data_temp=0xfff0ffff;
+    1f7e:	1169      	lrw      	r3, 0xfff10000	// 2020 <GPIO_IntGroup_Set+0x100>
+    1f80:	2b00      	subi      	r3, 1
+    1f82:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=16;
+    1f84:	3310      	movi      	r3, 16
+    1f86:	07d8      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==5)||(Selete_EXI_x==13))
+    1f88:	3b45      	cmpnei      	r3, 5
+    1f8a:	0806      	bt      	0x1f96	// 1f96 <GPIO_IntGroup_Set+0x76>
+			R_data_temp=0xff0fffff;
+    1f8c:	1166      	lrw      	r3, 0xff100000	// 2024 <GPIO_IntGroup_Set+0x104>
+    1f8e:	2b00      	subi      	r3, 1
+    1f90:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=20;
+    1f92:	3314      	movi      	r3, 20
+    1f94:	07d1      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==6)||(Selete_EXI_x==14))
+    1f96:	3b46      	cmpnei      	r3, 6
+    1f98:	0807      	bt      	0x1fa6	// 1fa6 <GPIO_IntGroup_Set+0x86>
+			R_data_temp=0xf0ffffff;
+    1f9a:	33f1      	movi      	r3, 241
+    1f9c:	4378      	lsli      	r3, r3, 24
+    1f9e:	2b00      	subi      	r3, 1
+    1fa0:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=24;
+    1fa2:	3318      	movi      	r3, 24
+    1fa4:	07c9      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+			R_data_temp=0x0fffffff;
+    1fa6:	1161      	lrw      	r3, 0xfffffff	// 2028 <GPIO_IntGroup_Set+0x108>
+    1fa8:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=28;
+    1faa:	331c      	movi      	r3, 28
+    1fac:	07c5      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+    1fae:	9340      	ld.w      	r2, (r3, 0x0)
+    1fb0:	9260      	ld.w      	r3, (r2, 0x0)
+    1fb2:	9881      	ld.w      	r4, (r14, 0x4)
+    1fb4:	d82e0003 	ld.b      	r1, (r14, 0x3)
+    1fb8:	68d0      	and      	r3, r4
+    1fba:	7004      	lsl      	r0, r1
+    1fbc:	6c0c      	or      	r0, r3
+    1fbe:	b200      	st.w      	r0, (r2, 0x0)
+			{
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+			}
+		}
+	}
+}
+    1fc0:	1402      	addi      	r14, r14, 8
+    1fc2:	1481      	pop      	r4
+	else if(Selete_EXI_x<20)
+    1fc4:	3a13      	cmphsi      	r2, 20
+    1fc6:	0bfd      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+		if((IO_MODE==0)&&((Selete_EXI_x==16)||((Selete_EXI_x==17))))						//PA0.0~PA0.7
+    1fc8:	3840      	cmpnei      	r0, 0
+    1fca:	0814      	bt      	0x1ff2	// 1ff2 <GPIO_IntGroup_Set+0xd2>
+    1fcc:	3300      	movi      	r3, 0
+    1fce:	2b0f      	subi      	r3, 16
+    1fd0:	60c8      	addu      	r3, r2
+    1fd2:	3b01      	cmphsi      	r3, 2
+    1fd4:	0bf6      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+			if(Selete_EXI_x==16)
+    1fd6:	3a50      	cmpnei      	r2, 16
+    1fd8:	106f      	lrw      	r3, 0x20000044	// 2014 <GPIO_IntGroup_Set+0xf4>
+    1fda:	0806      	bt      	0x1fe6	// 1fe6 <GPIO_IntGroup_Set+0xc6>
+				GPIOGRP->IGREX =(GPIOGRP->IGREX)|PinNum;
+    1fdc:	9340      	ld.w      	r2, (r3, 0x0)
+    1fde:	9262      	ld.w      	r3, (r2, 0x8)
+    1fe0:	6c4c      	or      	r1, r3
+    1fe2:	b222      	st.w      	r1, (r2, 0x8)
+    1fe4:	07ee      	br      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<4);
+    1fe6:	9360      	ld.w      	r3, (r3, 0x0)
+    1fe8:	9342      	ld.w      	r2, (r3, 0x8)
+    1fea:	4124      	lsli      	r1, r1, 4
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+    1fec:	6c48      	or      	r1, r2
+    1fee:	b322      	st.w      	r1, (r3, 0x8)
+}
+    1ff0:	07e8      	br      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+		else if((IO_MODE==2)&&((Selete_EXI_x==18)||(Selete_EXI_x==19)))					//PB0.0~PB0.3
+    1ff2:	3842      	cmpnei      	r0, 2
+    1ff4:	0be6      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+    1ff6:	3300      	movi      	r3, 0
+    1ff8:	2b11      	subi      	r3, 18
+    1ffa:	60c8      	addu      	r3, r2
+    1ffc:	3b01      	cmphsi      	r3, 2
+    1ffe:	0be1      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+    2000:	1065      	lrw      	r3, 0x20000044	// 2014 <GPIO_IntGroup_Set+0xf4>
+			if(Selete_EXI_x==18)
+    2002:	3a52      	cmpnei      	r2, 18
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+    2004:	9360      	ld.w      	r3, (r3, 0x0)
+    2006:	9342      	ld.w      	r2, (r3, 0x8)
+			if(Selete_EXI_x==18)
+    2008:	0803      	bt      	0x200e	// 200e <GPIO_IntGroup_Set+0xee>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+    200a:	4128      	lsli      	r1, r1, 8
+    200c:	07f0      	br      	0x1fec	// 1fec <GPIO_IntGroup_Set+0xcc>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+    200e:	412c      	lsli      	r1, r1, 12
+    2010:	07ee      	br      	0x1fec	// 1fec <GPIO_IntGroup_Set+0xcc>
+    2012:	0000      	bkpt
+    2014:	20000044 	.long	0x20000044
+    2018:	fffff0ff 	.long	0xfffff0ff
+    201c:	ffff0fff 	.long	0xffff0fff
+    2020:	fff10000 	.long	0xfff10000
+    2024:	ff100000 	.long	0xff100000
+    2028:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIOA0_EXI_Init:
+
+0000202c <GPIOA0_EXI_Init>:
+//IO EXI SET 
+//EntryParameter:EXI_IO(EXI0~EXI13)
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIOA0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
+{
+    202c:	14d0      	push      	r15
+    switch (EXI_IO)
+    202e:	380f      	cmphsi      	r0, 16
+    2030:	0812      	bt      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+    2032:	117d      	lrw      	r3, 0x2000004c	// 2124 <GPIOA0_EXI_Init+0xf8>
+    2034:	e3fff670 	bsr      	0xd14	// d14 <___gnu_csky_case_uqi>
+    2038:	1d150f08 	.long	0x1d150f08
+    203c:	39322b24 	.long	0x39322b24
+    2040:	544c463f 	.long	0x544c463f
+    2044:	7069625b 	.long	0x7069625b
+    {
+        case 0:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0) | 0X00000001;break;
+    2048:	9340      	ld.w      	r2, (r3, 0x0)
+    204a:	9260      	ld.w      	r3, (r2, 0x0)
+    204c:	310f      	movi      	r1, 15
+    204e:	68c5      	andn      	r3, r1
+    2050:	3ba0      	bseti      	r3, 0
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+    2052:	b260      	st.w      	r3, (r2, 0x0)
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    }
+}
+    2054:	1490      	pop      	r15
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+    2056:	9340      	ld.w      	r2, (r3, 0x0)
+    2058:	9260      	ld.w      	r3, (r2, 0x0)
+    205a:	31f0      	movi      	r1, 240
+    205c:	68c5      	andn      	r3, r1
+    205e:	3ba4      	bseti      	r3, 4
+    2060:	07f9      	br      	0x2052	// 2052 <GPIOA0_EXI_Init+0x26>
+        case 2:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000100;break;
+    2062:	9320      	ld.w      	r1, (r3, 0x0)
+    2064:	32f0      	movi      	r2, 240
+    2066:	9160      	ld.w      	r3, (r1, 0x0)
+    2068:	4244      	lsli      	r2, r2, 4
+    206a:	68c9      	andn      	r3, r2
+    206c:	3ba8      	bseti      	r3, 8
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+    206e:	b160      	st.w      	r3, (r1, 0x0)
+    2070:	07f2      	br      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+        case 3:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF) | 0X00001000;break;
+    2072:	9320      	ld.w      	r1, (r3, 0x0)
+    2074:	32f0      	movi      	r2, 240
+    2076:	9160      	ld.w      	r3, (r1, 0x0)
+    2078:	4248      	lsli      	r2, r2, 8
+    207a:	68c9      	andn      	r3, r2
+    207c:	3bac      	bseti      	r3, 12
+    207e:	07f8      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 4:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF) | 0X00010000;break;
+    2080:	9320      	ld.w      	r1, (r3, 0x0)
+    2082:	32f0      	movi      	r2, 240
+    2084:	9160      	ld.w      	r3, (r1, 0x0)
+    2086:	424c      	lsli      	r2, r2, 12
+    2088:	68c9      	andn      	r3, r2
+    208a:	3bb0      	bseti      	r3, 16
+    208c:	07f1      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 5:GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF) | 0X00100000;break;
+    208e:	9320      	ld.w      	r1, (r3, 0x0)
+    2090:	32f0      	movi      	r2, 240
+    2092:	9160      	ld.w      	r3, (r1, 0x0)
+    2094:	4250      	lsli      	r2, r2, 16
+    2096:	68c9      	andn      	r3, r2
+    2098:	3bb4      	bseti      	r3, 20
+    209a:	07ea      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+    209c:	9320      	ld.w      	r1, (r3, 0x0)
+    209e:	32f0      	movi      	r2, 240
+    20a0:	9160      	ld.w      	r3, (r1, 0x0)
+    20a2:	4254      	lsli      	r2, r2, 20
+    20a4:	68c9      	andn      	r3, r2
+    20a6:	3bb8      	bseti      	r3, 24
+    20a8:	07e3      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 7:GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF) | 0X10000000;break;
+    20aa:	9340      	ld.w      	r2, (r3, 0x0)
+    20ac:	9260      	ld.w      	r3, (r2, 0x0)
+    20ae:	4364      	lsli      	r3, r3, 4
+    20b0:	4b64      	lsri      	r3, r3, 4
+    20b2:	3bbc      	bseti      	r3, 28
+    20b4:	07cf      	br      	0x2052	// 2052 <GPIOA0_EXI_Init+0x26>
+        case 8:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000001;break;
+    20b6:	9340      	ld.w      	r2, (r3, 0x0)
+    20b8:	9261      	ld.w      	r3, (r2, 0x4)
+    20ba:	310f      	movi      	r1, 15
+    20bc:	68c5      	andn      	r3, r1
+    20be:	3ba0      	bseti      	r3, 0
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    20c0:	b261      	st.w      	r3, (r2, 0x4)
+}
+    20c2:	07c9      	br      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+        case 9:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F) | 0X00000010;break;
+    20c4:	9340      	ld.w      	r2, (r3, 0x0)
+    20c6:	9261      	ld.w      	r3, (r2, 0x4)
+    20c8:	31f0      	movi      	r1, 240
+    20ca:	68c5      	andn      	r3, r1
+    20cc:	3ba4      	bseti      	r3, 4
+    20ce:	07f9      	br      	0x20c0	// 20c0 <GPIOA0_EXI_Init+0x94>
+        case 10:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF) | 0X00000100;break;
+    20d0:	9320      	ld.w      	r1, (r3, 0x0)
+    20d2:	32f0      	movi      	r2, 240
+    20d4:	9161      	ld.w      	r3, (r1, 0x4)
+    20d6:	4244      	lsli      	r2, r2, 4
+    20d8:	68c9      	andn      	r3, r2
+    20da:	3ba8      	bseti      	r3, 8
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+    20dc:	b161      	st.w      	r3, (r1, 0x4)
+    20de:	07bb      	br      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+        case 11:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF) | 0X00001000;break;
+    20e0:	9320      	ld.w      	r1, (r3, 0x0)
+    20e2:	32f0      	movi      	r2, 240
+    20e4:	9161      	ld.w      	r3, (r1, 0x4)
+    20e6:	4248      	lsli      	r2, r2, 8
+    20e8:	68c9      	andn      	r3, r2
+    20ea:	3bac      	bseti      	r3, 12
+    20ec:	07f8      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+    20ee:	9320      	ld.w      	r1, (r3, 0x0)
+    20f0:	32f0      	movi      	r2, 240
+    20f2:	9161      	ld.w      	r3, (r1, 0x4)
+    20f4:	424c      	lsli      	r2, r2, 12
+    20f6:	68c9      	andn      	r3, r2
+    20f8:	3bb0      	bseti      	r3, 16
+    20fa:	07f1      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+    20fc:	9320      	ld.w      	r1, (r3, 0x0)
+    20fe:	32f0      	movi      	r2, 240
+    2100:	9161      	ld.w      	r3, (r1, 0x4)
+    2102:	4250      	lsli      	r2, r2, 16
+    2104:	68c9      	andn      	r3, r2
+    2106:	3bb4      	bseti      	r3, 20
+    2108:	07ea      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+    210a:	9320      	ld.w      	r1, (r3, 0x0)
+    210c:	32f0      	movi      	r2, 240
+    210e:	9161      	ld.w      	r3, (r1, 0x4)
+    2110:	4254      	lsli      	r2, r2, 20
+    2112:	68c9      	andn      	r3, r2
+    2114:	3bb8      	bseti      	r3, 24
+    2116:	07e3      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    2118:	9340      	ld.w      	r2, (r3, 0x0)
+    211a:	9261      	ld.w      	r3, (r2, 0x4)
+    211c:	4364      	lsli      	r3, r3, 4
+    211e:	4b64      	lsri      	r3, r3, 4
+    2120:	3bbc      	bseti      	r3, 28
+    2122:	07cf      	br      	0x20c0	// 20c0 <GPIOA0_EXI_Init+0x94>
+    2124:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPIO_Write_High:
+
+00002128 <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    2128:	3301      	movi      	r3, 1
+    212a:	70c4      	lsl      	r3, r1
+    212c:	b063      	st.w      	r3, (r0, 0xc)
+}
+    212e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00002130 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    2130:	3301      	movi      	r3, 1
+    2132:	70c4      	lsl      	r3, r1
+    2134:	b064      	st.w      	r3, (r0, 0x10)
+}
+    2136:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+00002138 <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    2138:	9045      	ld.w      	r2, (r0, 0x14)
+    213a:	3301      	movi      	r3, 1
+    213c:	7085      	lsr      	r2, r1
+    213e:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    2140:	3a40      	cmpnei      	r2, 0
+    2142:	70c4      	lsl      	r3, r1
+    2144:	0c03      	bf      	0x214a	// 214a <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    2146:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    2148:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    214a:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    214c:	07fe      	br      	0x2148	// 2148 <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+0000214e <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    214e:	3301      	movi      	r3, 1
+    2150:	9046      	ld.w      	r2, (r0, 0x18)
+    2152:	70c4      	lsl      	r3, r1
+    2154:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    2156:	64ca      	cmpne      	r2, r3
+    2158:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    215a:	7400      	zextb      	r0, r0
+}
+    215c:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00002160 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    2160:	1064      	lrw      	r3, 0x20000014	// 2170 <LPT_Soft_Reset+0x10>
+    2162:	9340      	ld.w      	r2, (r3, 0x0)
+    2164:	9261      	ld.w      	r3, (r2, 0x4)
+    2166:	3bac      	bseti      	r3, 12
+    2168:	3bae      	bseti      	r3, 14
+    216a:	b261      	st.w      	r3, (r2, 0x4)
+}
+    216c:	783c      	jmp      	r15
+    216e:	0000      	bkpt
+    2170:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+00002174 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    2174:	1063      	lrw      	r3, 0x20000010	// 2180 <WWDT_CNT_Load+0xc>
+    2176:	9360      	ld.w      	r3, (r3, 0x0)
+    2178:	9340      	ld.w      	r2, (r3, 0x0)
+    217a:	6c08      	or      	r0, r2
+    217c:	b300      	st.w      	r0, (r3, 0x0)
+}
+    217e:	783c      	jmp      	r15
+    2180:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+00002184 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    2184:	3300      	movi      	r3, 0
+    2186:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    2188:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    218a:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    218c:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    218e:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    2190:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    2192:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    2194:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    2196:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    2198:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    219a:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    219c:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    219e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000021a0 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    21a0:	9060      	ld.w      	r3, (r0, 0x0)
+    21a2:	3ba0      	bseti      	r3, 0
+    21a4:	b060      	st.w      	r3, (r0, 0x0)
+}
+    21a6:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000021a8 <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    21a8:	9060      	ld.w      	r3, (r0, 0x0)
+    21aa:	3bac      	bseti      	r3, 12
+    21ac:	3bae      	bseti      	r3, 14
+    21ae:	b060      	st.w      	r3, (r0, 0x0)
+}
+    21b0:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000021b2 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    21b2:	14c3      	push      	r4-r6
+    21b4:	98a4      	ld.w      	r5, (r14, 0x10)
+    21b6:	6d97      	mov      	r6, r5
+    21b8:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    21ba:	6d18      	or      	r4, r6
+    21bc:	6cd0      	or      	r3, r4
+    21be:	90a1      	ld.w      	r5, (r0, 0x4)
+    21c0:	6c4c      	or      	r1, r3
+    21c2:	6c54      	or      	r1, r5
+    21c4:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    21c6:	b042      	st.w      	r2, (r0, 0x8)
+}
+    21c8:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000021ca <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    21ca:	14c4      	push      	r4-r7
+    21cc:	1421      	subi      	r14, r14, 4
+    21ce:	9885      	ld.w      	r4, (r14, 0x14)
+    21d0:	6dd3      	mov      	r7, r4
+    21d2:	9886      	ld.w      	r4, (r14, 0x18)
+    21d4:	b880      	st.w      	r4, (r14, 0x0)
+    21d6:	9887      	ld.w      	r4, (r14, 0x1c)
+    21d8:	6d93      	mov      	r6, r4
+    21da:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    21dc:	6d58      	or      	r5, r6
+    21de:	98c0      	ld.w      	r6, (r14, 0x0)
+    21e0:	6d58      	or      	r5, r6
+    21e2:	6d5c      	or      	r5, r7
+    21e4:	6cd4      	or      	r3, r5
+    21e6:	6c8c      	or      	r2, r3
+    21e8:	9081      	ld.w      	r4, (r0, 0x4)
+    21ea:	6c48      	or      	r1, r2
+    21ec:	6d04      	or      	r4, r1
+    21ee:	6d9f      	mov      	r6, r7
+    21f0:	b081      	st.w      	r4, (r0, 0x4)
+}
+    21f2:	1401      	addi      	r14, r14, 4
+    21f4:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+000021f6 <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    21f6:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    21f8:	b044      	st.w      	r2, (r0, 0x10)
+}
+    21fa:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+000021fc <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    21fc:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    21fe:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    2200:	0c04      	bf      	0x2208	// 2208 <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    2202:	6c8c      	or      	r2, r3
+    2204:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    2206:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    2208:	68c9      	andn      	r3, r2
+    220a:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    220c:	07fd      	br      	0x2206	// 2206 <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00002210 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    2210:	3380      	movi      	r3, 128
+    2212:	4376      	lsli      	r3, r3, 22
+    2214:	1042      	lrw      	r2, 0xe000e100	// 221c <BT1_INT_ENABLE+0xc>
+    2216:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2218:	783c      	jmp      	r15
+    221a:	0000      	bkpt
+    221c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00002220 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    2220:	3840      	cmpnei      	r0, 0
+    2222:	080a      	bt      	0x2236	// 2236 <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    2224:	1165      	lrw      	r3, 0x20000048	// 22b8 <GPT_IO_Init+0x98>
+    2226:	31f0      	movi      	r1, 240
+    2228:	9340      	ld.w      	r2, (r3, 0x0)
+    222a:	9260      	ld.w      	r3, (r2, 0x0)
+    222c:	68c5      	andn      	r3, r1
+    222e:	3ba4      	bseti      	r3, 4
+    2230:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    2232:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    2234:	040b      	br      	0x224a	// 224a <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    2236:	3841      	cmpnei      	r0, 1
+    2238:	080a      	bt      	0x224c	// 224c <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    223a:	1161      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    223c:	31f0      	movi      	r1, 240
+    223e:	9340      	ld.w      	r2, (r3, 0x0)
+    2240:	9261      	ld.w      	r3, (r2, 0x4)
+    2242:	68c5      	andn      	r3, r1
+    2244:	3ba4      	bseti      	r3, 4
+    2246:	3ba6      	bseti      	r3, 6
+    2248:	b261      	st.w      	r3, (r2, 0x4)
+}
+    224a:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    224c:	3842      	cmpnei      	r0, 2
+    224e:	080b      	bt      	0x2264	// 2264 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    2250:	107b      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    2252:	32f0      	movi      	r2, 240
+    2254:	9320      	ld.w      	r1, (r3, 0x0)
+    2256:	9161      	ld.w      	r3, (r1, 0x4)
+    2258:	4244      	lsli      	r2, r2, 4
+    225a:	68c9      	andn      	r3, r2
+    225c:	3ba9      	bseti      	r3, 9
+    225e:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    2260:	b161      	st.w      	r3, (r1, 0x4)
+    2262:	07f4      	br      	0x224a	// 224a <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    2264:	3843      	cmpnei      	r0, 3
+    2266:	080b      	bt      	0x227c	// 227c <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    2268:	1075      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    226a:	32f0      	movi      	r2, 240
+    226c:	9320      	ld.w      	r1, (r3, 0x0)
+    226e:	4244      	lsli      	r2, r2, 4
+    2270:	9161      	ld.w      	r3, (r1, 0x4)
+    2272:	68c9      	andn      	r3, r2
+    2274:	32e0      	movi      	r2, 224
+    2276:	4243      	lsli      	r2, r2, 3
+    2278:	6cc8      	or      	r3, r2
+    227a:	07f3      	br      	0x2260	// 2260 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    227c:	3844      	cmpnei      	r0, 4
+    227e:	080a      	bt      	0x2292	// 2292 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    2280:	106f      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    2282:	32f0      	movi      	r2, 240
+    2284:	9320      	ld.w      	r1, (r3, 0x0)
+    2286:	9161      	ld.w      	r3, (r1, 0x4)
+    2288:	4248      	lsli      	r2, r2, 8
+    228a:	68c9      	andn      	r3, r2
+    228c:	3bad      	bseti      	r3, 13
+    228e:	3bae      	bseti      	r3, 14
+    2290:	07e8      	br      	0x2260	// 2260 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    2292:	3845      	cmpnei      	r0, 5
+    2294:	0808      	bt      	0x22a4	// 22a4 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    2296:	1069      	lrw      	r3, 0x20000048	// 22b8 <GPT_IO_Init+0x98>
+    2298:	310f      	movi      	r1, 15
+    229a:	9340      	ld.w      	r2, (r3, 0x0)
+    229c:	9260      	ld.w      	r3, (r2, 0x0)
+    229e:	68c5      	andn      	r3, r1
+    22a0:	3ba2      	bseti      	r3, 2
+    22a2:	07c8      	br      	0x2232	// 2232 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    22a4:	3846      	cmpnei      	r0, 6
+    22a6:	0bd2      	bt      	0x224a	// 224a <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    22a8:	1064      	lrw      	r3, 0x20000048	// 22b8 <GPT_IO_Init+0x98>
+    22aa:	31f0      	movi      	r1, 240
+    22ac:	9340      	ld.w      	r2, (r3, 0x0)
+    22ae:	9260      	ld.w      	r3, (r2, 0x0)
+    22b0:	68c5      	andn      	r3, r1
+    22b2:	3ba5      	bseti      	r3, 5
+    22b4:	3ba6      	bseti      	r3, 6
+    22b6:	07be      	br      	0x2232	// 2232 <GPT_IO_Init+0x12>
+    22b8:	20000048 	.long	0x20000048
+    22bc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000022c0 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    22c0:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    22c2:	6c48      	or      	r1, r2
+    22c4:	1083      	lrw      	r4, 0x20000024	// 22d0 <GPT_Configure+0x10>
+    22c6:	6c04      	or      	r0, r1
+    22c8:	9480      	ld.w      	r4, (r4, 0x0)
+    22ca:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    22cc:	b462      	st.w      	r3, (r4, 0x8)
+}
+    22ce:	1481      	pop      	r4
+    22d0:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+000022d4 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    22d4:	14c4      	push      	r4-r7
+    22d6:	1423      	subi      	r14, r14, 12
+    22d8:	9887      	ld.w      	r4, (r14, 0x1c)
+    22da:	6dd3      	mov      	r7, r4
+    22dc:	9888      	ld.w      	r4, (r14, 0x20)
+    22de:	b880      	st.w      	r4, (r14, 0x0)
+    22e0:	9889      	ld.w      	r4, (r14, 0x24)
+    22e2:	b881      	st.w      	r4, (r14, 0x4)
+    22e4:	988a      	ld.w      	r4, (r14, 0x28)
+    22e6:	b882      	st.w      	r4, (r14, 0x8)
+    22e8:	988b      	ld.w      	r4, (r14, 0x2c)
+    22ea:	6d93      	mov      	r6, r4
+    22ec:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    22ee:	3cb2      	bseti      	r4, 18
+    22f0:	6d18      	or      	r4, r6
+    22f2:	98c2      	ld.w      	r6, (r14, 0x8)
+    22f4:	6d18      	or      	r4, r6
+    22f6:	98c1      	ld.w      	r6, (r14, 0x4)
+    22f8:	6d18      	or      	r4, r6
+    22fa:	98c0      	ld.w      	r6, (r14, 0x0)
+    22fc:	6d18      	or      	r4, r6
+    22fe:	6d1c      	or      	r4, r7
+    2300:	6cd0      	or      	r3, r4
+    2302:	6c8c      	or      	r2, r3
+    2304:	6c48      	or      	r1, r2
+    2306:	10a4      	lrw      	r5, 0x20000024	// 2314 <GPT_WaveCtrl_Configure+0x40>
+    2308:	6c04      	or      	r0, r1
+    230a:	95a0      	ld.w      	r5, (r5, 0x0)
+    230c:	6d9f      	mov      	r6, r7
+    230e:	b503      	st.w      	r0, (r5, 0xc)
+}
+    2310:	1403      	addi      	r14, r14, 12
+    2312:	1484      	pop      	r4-r7
+    2314:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+00002318 <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    2318:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    231a:	6c8c      	or      	r2, r3
+    231c:	6c48      	or      	r1, r2
+    231e:	1083      	lrw      	r4, 0x20000024	// 2328 <GPT_WaveLoad_Configure+0x10>
+    2320:	6c04      	or      	r0, r1
+    2322:	9480      	ld.w      	r4, (r4, 0x0)
+    2324:	b411      	st.w      	r0, (r4, 0x44)
+}
+    2326:	1481      	pop      	r4
+    2328:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+0000232c <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    232c:	14c4      	push      	r4-r7
+    232e:	1425      	subi      	r14, r14, 20
+    2330:	1c09      	addi      	r4, r14, 36
+    2332:	8480      	ld.b      	r4, (r4, 0x0)
+    2334:	b880      	st.w      	r4, (r14, 0x0)
+    2336:	1c0a      	addi      	r4, r14, 40
+    2338:	8480      	ld.b      	r4, (r4, 0x0)
+    233a:	b881      	st.w      	r4, (r14, 0x4)
+    233c:	1c0b      	addi      	r4, r14, 44
+    233e:	8480      	ld.b      	r4, (r4, 0x0)
+    2340:	b882      	st.w      	r4, (r14, 0x8)
+    2342:	1c0c      	addi      	r4, r14, 48
+    2344:	8480      	ld.b      	r4, (r4, 0x0)
+    2346:	b883      	st.w      	r4, (r14, 0xc)
+    2348:	1c0d      	addi      	r4, r14, 52
+    234a:	8480      	ld.b      	r4, (r4, 0x0)
+    234c:	1e10      	addi      	r6, r14, 64
+    234e:	b884      	st.w      	r4, (r14, 0x10)
+    2350:	1d0f      	addi      	r5, r14, 60
+    2352:	1c0e      	addi      	r4, r14, 56
+    2354:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    2356:	3840      	cmpnei      	r0, 0
+{
+    2358:	1e11      	addi      	r6, r14, 68
+    235a:	8480      	ld.b      	r4, (r4, 0x0)
+    235c:	85a0      	ld.b      	r5, (r5, 0x0)
+    235e:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    2360:	081f      	bt      	0x239e	// 239e <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    2362:	47f0      	lsli      	r7, r7, 16
+    2364:	46d2      	lsli      	r6, r6, 18
+    2366:	45ae      	lsli      	r5, r5, 14
+    2368:	6dd8      	or      	r7, r6
+    236a:	6dd4      	or      	r7, r5
+    236c:	448c      	lsli      	r4, r4, 12
+    236e:	6dd0      	or      	r7, r4
+    2370:	9884      	ld.w      	r4, (r14, 0x10)
+    2372:	448a      	lsli      	r4, r4, 10
+    2374:	6dd0      	or      	r7, r4
+    2376:	9883      	ld.w      	r4, (r14, 0xc)
+    2378:	4488      	lsli      	r4, r4, 8
+    237a:	98a2      	ld.w      	r5, (r14, 0x8)
+    237c:	6d1c      	or      	r4, r7
+    237e:	45e6      	lsli      	r7, r5, 6
+    2380:	6d1c      	or      	r4, r7
+    2382:	6c90      	or      	r2, r4
+    2384:	6cc8      	or      	r3, r2
+    2386:	9841      	ld.w      	r2, (r14, 0x4)
+    2388:	4244      	lsli      	r2, r2, 4
+    238a:	6cc8      	or      	r3, r2
+    238c:	6c4c      	or      	r1, r3
+    238e:	9860      	ld.w      	r3, (r14, 0x0)
+    2390:	4362      	lsli      	r3, r3, 2
+    2392:	1013      	lrw      	r0, 0x20000024	// 23dc <GPT_WaveOut_Configure+0xb0>
+    2394:	6c4c      	or      	r1, r3
+    2396:	9000      	ld.w      	r0, (r0, 0x0)
+    2398:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    239a:	1405      	addi      	r14, r14, 20
+    239c:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    239e:	3841      	cmpnei      	r0, 1
+    23a0:	0bfd      	bt      	0x239a	// 239a <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    23a2:	47f0      	lsli      	r7, r7, 16
+    23a4:	46d2      	lsli      	r6, r6, 18
+    23a6:	45ae      	lsli      	r5, r5, 14
+    23a8:	6dd8      	or      	r7, r6
+    23aa:	6dd4      	or      	r7, r5
+    23ac:	448c      	lsli      	r4, r4, 12
+    23ae:	6dd0      	or      	r7, r4
+    23b0:	9884      	ld.w      	r4, (r14, 0x10)
+    23b2:	448a      	lsli      	r4, r4, 10
+    23b4:	6dd0      	or      	r7, r4
+    23b6:	9883      	ld.w      	r4, (r14, 0xc)
+    23b8:	4488      	lsli      	r4, r4, 8
+    23ba:	98a2      	ld.w      	r5, (r14, 0x8)
+    23bc:	6d1c      	or      	r4, r7
+    23be:	45e6      	lsli      	r7, r5, 6
+    23c0:	6d1c      	or      	r4, r7
+    23c2:	6c90      	or      	r2, r4
+    23c4:	6cc8      	or      	r3, r2
+    23c6:	9841      	ld.w      	r2, (r14, 0x4)
+    23c8:	4244      	lsli      	r2, r2, 4
+    23ca:	6cc8      	or      	r3, r2
+    23cc:	6c4c      	or      	r1, r3
+    23ce:	9860      	ld.w      	r3, (r14, 0x0)
+    23d0:	4362      	lsli      	r3, r3, 2
+    23d2:	1003      	lrw      	r0, 0x20000024	// 23dc <GPT_WaveOut_Configure+0xb0>
+    23d4:	6c4c      	or      	r1, r3
+    23d6:	9000      	ld.w      	r0, (r0, 0x0)
+    23d8:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    23da:	07e0      	br      	0x239a	// 239a <GPT_WaveOut_Configure+0x6e>
+    23dc:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+000023e0 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    23e0:	1063      	lrw      	r3, 0x20000024	// 23ec <GPT_Start+0xc>
+    23e2:	9340      	ld.w      	r2, (r3, 0x0)
+    23e4:	9261      	ld.w      	r3, (r2, 0x4)
+    23e6:	3ba0      	bseti      	r3, 0
+    23e8:	b261      	st.w      	r3, (r2, 0x4)
+}
+    23ea:	783c      	jmp      	r15
+    23ec:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+000023f0 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    23f0:	1063      	lrw      	r3, 0x20000024	// 23fc <GPT_Period_CMP_Write+0xc>
+    23f2:	9360      	ld.w      	r3, (r3, 0x0)
+    23f4:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    23f6:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    23f8:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    23fa:	783c      	jmp      	r15
+    23fc:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00002400 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    2400:	1066      	lrw      	r3, 0x20000024	// 2418 <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    2402:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    2404:	9360      	ld.w      	r3, (r3, 0x0)
+    2406:	237f      	addi      	r3, 128
+    2408:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    240a:	0c04      	bf      	0x2412	// 2412 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    240c:	6c48      	or      	r1, r2
+    240e:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    2410:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    2412:	6885      	andn      	r2, r1
+    2414:	b356      	st.w      	r2, (r3, 0x58)
+}
+    2416:	07fd      	br      	0x2410	// 2410 <GPT_ConfigInterrupt_CMD+0x10>
+    2418:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+0000241c <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    241c:	1065      	lrw      	r3, 0x20000040	// 2430 <UART0_DeInit+0x14>
+    241e:	3200      	movi      	r2, 0
+    2420:	9360      	ld.w      	r3, (r3, 0x0)
+    2422:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    2424:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    2426:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    2428:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    242a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    242c:	783c      	jmp      	r15
+    242e:	0000      	bkpt
+    2430:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00002434 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    2434:	1065      	lrw      	r3, 0x2000003c	// 2448 <UART1_DeInit+0x14>
+    2436:	3200      	movi      	r2, 0
+    2438:	9360      	ld.w      	r3, (r3, 0x0)
+    243a:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    243c:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    243e:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    2440:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    2442:	b344      	st.w      	r2, (r3, 0x10)
+}
+    2444:	783c      	jmp      	r15
+    2446:	0000      	bkpt
+    2448:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+0000244c <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    244c:	1065      	lrw      	r3, 0x20000038	// 2460 <UART2_DeInit+0x14>
+    244e:	3200      	movi      	r2, 0
+    2450:	9360      	ld.w      	r3, (r3, 0x0)
+    2452:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    2454:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    2456:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    2458:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    245a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    245c:	783c      	jmp      	r15
+    245e:	0000      	bkpt
+    2460:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART1_Int_Enable:
+
+00002464 <UART1_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_Int_Enable(void)
+{
+    UART1->ISR=0x0F;									//clear UART1 INT status
+    2464:	1065      	lrw      	r3, 0x2000003c	// 2478 <UART1_Int_Enable+0x14>
+    2466:	320f      	movi      	r2, 15
+    2468:	9360      	ld.w      	r3, (r3, 0x0)
+    246a:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART1_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    246c:	3380      	movi      	r3, 128
+    246e:	4367      	lsli      	r3, r3, 7
+    2470:	1043      	lrw      	r2, 0xe000e100	// 247c <UART1_Int_Enable+0x18>
+    2472:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2474:	783c      	jmp      	r15
+    2476:	0000      	bkpt
+    2478:	2000003c 	.long	0x2000003c
+    247c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+00002480 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    2480:	1065      	lrw      	r3, 0x20000038	// 2494 <UART2_Int_Enable+0x14>
+    2482:	320f      	movi      	r2, 15
+    2484:	9360      	ld.w      	r3, (r3, 0x0)
+    2486:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    2488:	3380      	movi      	r3, 128
+    248a:	4368      	lsli      	r3, r3, 8
+    248c:	1043      	lrw      	r2, 0xe000e100	// 2498 <UART2_Int_Enable+0x18>
+    248e:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2490:	783c      	jmp      	r15
+    2492:	0000      	bkpt
+    2494:	20000038 	.long	0x20000038
+    2498:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+0000249c <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    249c:	3840      	cmpnei      	r0, 0
+    249e:	0821      	bt      	0x24e0	// 24e0 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    24a0:	3940      	cmpnei      	r1, 0
+    24a2:	080a      	bt      	0x24b6	// 24b6 <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    24a4:	1177      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    24a6:	31ff      	movi      	r1, 255
+    24a8:	9340      	ld.w      	r2, (r3, 0x0)
+    24aa:	9260      	ld.w      	r3, (r2, 0x0)
+    24ac:	68c5      	andn      	r3, r1
+    24ae:	3ba2      	bseti      	r3, 2
+    24b0:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    24b2:	b260      	st.w      	r3, (r2, 0x0)
+    24b4:	0415      	br      	0x24de	// 24de <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    24b6:	3941      	cmpnei      	r1, 1
+    24b8:	0813      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    24ba:	1172      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    24bc:	31f0      	movi      	r1, 240
+    24be:	9340      	ld.w      	r2, (r3, 0x0)
+    24c0:	9260      	ld.w      	r3, (r2, 0x0)
+    24c2:	4130      	lsli      	r1, r1, 16
+    24c4:	68c5      	andn      	r3, r1
+    24c6:	31e0      	movi      	r1, 224
+    24c8:	412f      	lsli      	r1, r1, 15
+    24ca:	6cc4      	or      	r3, r1
+    24cc:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    24ce:	31f0      	movi      	r1, 240
+    24d0:	9261      	ld.w      	r3, (r2, 0x4)
+    24d2:	412c      	lsli      	r1, r1, 12
+    24d4:	68c5      	andn      	r3, r1
+    24d6:	31e0      	movi      	r1, 224
+    24d8:	412b      	lsli      	r1, r1, 11
+    24da:	6cc4      	or      	r3, r1
+    24dc:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    24de:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    24e0:	3841      	cmpnei      	r0, 1
+    24e2:	082d      	bt      	0x253c	// 253c <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    24e4:	3940      	cmpnei      	r1, 0
+    24e6:	0814      	bt      	0x250e	// 250e <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    24e8:	1167      	lrw      	r3, 0x20000048	// 2584 <UART_IO_Init+0xe8>
+    24ea:	310f      	movi      	r1, 15
+    24ec:	9340      	ld.w      	r2, (r3, 0x0)
+    24ee:	9260      	ld.w      	r3, (r2, 0x0)
+    24f0:	68c5      	andn      	r3, r1
+    24f2:	3107      	movi      	r1, 7
+    24f4:	6cc4      	or      	r3, r1
+    24f6:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    24f8:	32f0      	movi      	r2, 240
+    24fa:	1162      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    24fc:	4250      	lsli      	r2, r2, 16
+    24fe:	9320      	ld.w      	r1, (r3, 0x0)
+    2500:	9161      	ld.w      	r3, (r1, 0x4)
+    2502:	68c9      	andn      	r3, r2
+    2504:	32e0      	movi      	r2, 224
+    2506:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    2508:	6cc8      	or      	r3, r2
+    250a:	b161      	st.w      	r3, (r1, 0x4)
+    250c:	07e9      	br      	0x24de	// 24de <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    250e:	3941      	cmpnei      	r1, 1
+    2510:	080c      	bt      	0x2528	// 2528 <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    2512:	107c      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    2514:	32ff      	movi      	r2, 255
+    2516:	9320      	ld.w      	r1, (r3, 0x0)
+    2518:	424c      	lsli      	r2, r2, 12
+    251a:	9160      	ld.w      	r3, (r1, 0x0)
+    251c:	68c9      	andn      	r3, r2
+    251e:	32ee      	movi      	r2, 238
+    2520:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    2522:	6cc8      	or      	r3, r2
+    2524:	b160      	st.w      	r3, (r1, 0x0)
+}
+    2526:	07dc      	br      	0x24de	// 24de <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    2528:	3942      	cmpnei      	r1, 2
+    252a:	0bda      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    252c:	1075      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    252e:	32ee      	movi      	r2, 238
+    2530:	9320      	ld.w      	r1, (r3, 0x0)
+    2532:	9161      	ld.w      	r3, (r1, 0x4)
+    2534:	4368      	lsli      	r3, r3, 8
+    2536:	4b68      	lsri      	r3, r3, 8
+    2538:	4257      	lsli      	r2, r2, 23
+    253a:	07e7      	br      	0x2508	// 2508 <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    253c:	3842      	cmpnei      	r0, 2
+    253e:	0bd0      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    2540:	3940      	cmpnei      	r1, 0
+    2542:	0809      	bt      	0x2554	// 2554 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    2544:	106f      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    2546:	31ff      	movi      	r1, 255
+    2548:	9340      	ld.w      	r2, (r3, 0x0)
+    254a:	9260      	ld.w      	r3, (r2, 0x0)
+    254c:	68c5      	andn      	r3, r1
+    254e:	3177      	movi      	r1, 119
+    2550:	6cc4      	or      	r3, r1
+    2552:	07b0      	br      	0x24b2	// 24b2 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    2554:	3941      	cmpnei      	r1, 1
+    2556:	0809      	bt      	0x2568	// 2568 <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    2558:	106a      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    255a:	32ee      	movi      	r2, 238
+    255c:	9320      	ld.w      	r1, (r3, 0x0)
+    255e:	9160      	ld.w      	r3, (r1, 0x0)
+    2560:	4368      	lsli      	r3, r3, 8
+    2562:	4b68      	lsri      	r3, r3, 8
+    2564:	4257      	lsli      	r2, r2, 23
+    2566:	07de      	br      	0x2522	// 2522 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    2568:	3942      	cmpnei      	r1, 2
+    256a:	0bba      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    256c:	1066      	lrw      	r3, 0x20000048	// 2584 <UART_IO_Init+0xe8>
+    256e:	32ff      	movi      	r2, 255
+    2570:	9320      	ld.w      	r1, (r3, 0x0)
+    2572:	4250      	lsli      	r2, r2, 16
+    2574:	9160      	ld.w      	r3, (r1, 0x0)
+    2576:	68c9      	andn      	r3, r2
+    2578:	32cc      	movi      	r2, 204
+    257a:	424f      	lsli      	r2, r2, 15
+    257c:	07d3      	br      	0x2522	// 2522 <UART_IO_Init+0x86>
+    257e:	0000      	bkpt
+    2580:	2000004c 	.long	0x2000004c
+    2584:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+00002588 <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    2588:	1063      	lrw      	r3, 0x8000f	// 2594 <UARTInitRxTxIntEn+0xc>
+    258a:	6c8c      	or      	r2, r3
+    258c:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    258e:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2590:	783c      	jmp      	r15
+    2592:	0000      	bkpt
+    2594:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+00002598 <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    2598:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    259a:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    259c:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    259e:	5b85      	subu      	r4, r3, r1
+    25a0:	6490      	cmphs      	r4, r2
+    25a2:	0c02      	bf      	0x25a6	// 25a6 <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    25a4:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    25a6:	8380      	ld.b      	r4, (r3, 0x0)
+    25a8:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    25aa:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    25ac:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    25ae:	3c40      	cmpnei      	r4, 0
+    25b0:	0bfd      	bt      	0x25aa	// 25aa <UARTTransmit+0x12>
+    25b2:	2300      	addi      	r3, 1
+    25b4:	07f5      	br      	0x259e	// 259e <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000025b8 <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    25b8:	1068      	lrw      	r3, 0x20000020	// 25d8 <EPT_Stop+0x20>
+    25ba:	3280      	movi      	r2, 128
+    25bc:	9360      	ld.w      	r3, (r3, 0x0)
+    25be:	608c      	addu      	r2, r3
+    25c0:	1027      	lrw      	r1, 0xa55ac73a	// 25dc <EPT_Stop+0x24>
+    25c2:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    25c4:	9341      	ld.w      	r2, (r3, 0x4)
+    25c6:	31fe      	movi      	r1, 254
+    25c8:	6884      	and      	r2, r1
+    25ca:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    25cc:	3101      	movi      	r1, 1
+    25ce:	9341      	ld.w      	r2, (r3, 0x4)
+    25d0:	6884      	and      	r2, r1
+    25d2:	3a40      	cmpnei      	r2, 0
+    25d4:	0bfd      	bt      	0x25ce	// 25ce <EPT_Stop+0x16>
+}
+    25d6:	783c      	jmp      	r15
+    25d8:	20000020 	.long	0x20000020
+    25dc:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.Page_ProgramData:
+
+000025e0 <Page_ProgramData>:
+		IFC->CR=0X01;					//Start Program
+	}
+}
+//Normal mode, when the call is completed once, it will delay 4.2ms in the program
+void Page_ProgramData(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry)
+{
+    25e0:	14c4      	push      	r4-r7
+    25e2:	1422      	subi      	r14, r14, 8
+	int i,DataBuffer;
+
+	//Page cache wipe 1
+	SetUserKey;
+    25e4:	1165      	lrw      	r3, 0x20000060	// 2678 <Page_ProgramData+0x98>
+    25e6:	1186      	lrw      	r4, 0x5a5a5a5a	// 267c <Page_ProgramData+0x9c>
+    25e8:	9360      	ld.w      	r3, (r3, 0x0)
+    25ea:	b388      	st.w      	r4, (r3, 0x20)
+	IFC->CMR=0x07;					
+    25ec:	3407      	movi      	r4, 7
+    25ee:	b383      	st.w      	r4, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+    25f0:	3401      	movi      	r4, 1
+	IFC->FM_ADDR=FlashAdd;
+    25f2:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    25f4:	b384      	st.w      	r4, (r3, 0x10)
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+    25f6:	9384      	ld.w      	r4, (r3, 0x10)
+    25f8:	3c40      	cmpnei      	r4, 0
+    25fa:	0bfe      	bt      	0x25f6	// 25f6 <Page_ProgramData+0x16>
+	//Write data to the cache 2
+	for(i=0;i<((DataSize+3)/4);i++)   //sizeof structure
+    25fc:	2102      	addi      	r1, 3
+    25fe:	4922      	lsri      	r1, r1, 2
+    2600:	4122      	lsli      	r1, r1, 2
+    2602:	6048      	addu      	r1, r2
+    2604:	b820      	st.w      	r1, (r14, 0x0)
+    2606:	5829      	subu      	r1, r0, r2
+    2608:	b821      	st.w      	r1, (r14, 0x4)
+    260a:	9820      	ld.w      	r1, (r14, 0x0)
+    260c:	644a      	cmpne      	r2, r1
+    260e:	0826      	bt      	0x265a	// 265a <Page_ProgramData+0x7a>
+		*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
+		BufArry  +=4;
+	}
+	//Pre-programmed operation settings 3
+	SetUserKey;
+	IFC->CMR=0x06;					
+    2610:	3106      	movi      	r1, 6
+	SetUserKey;
+    2612:	105b      	lrw      	r2, 0x5a5a5a5a	// 267c <Page_ProgramData+0x9c>
+    2614:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x06;					
+    2616:	b323      	st.w      	r1, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+    2618:	3101      	movi      	r1, 1
+	IFC->FM_ADDR=FlashAdd;
+    261a:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    261c:	b324      	st.w      	r1, (r3, 0x10)
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+    261e:	9324      	ld.w      	r1, (r3, 0x10)
+    2620:	3940      	cmpnei      	r1, 0
+    2622:	0bfe      	bt      	0x261e	// 261e <Page_ProgramData+0x3e>
+	//Perform pre-programming 4
+	SetUserKey;
+    2624:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x01;					
+    2626:	3201      	movi      	r2, 1
+    2628:	b343      	st.w      	r2, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;			//
+    262a:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    262c:	b344      	st.w      	r2, (r3, 0x10)
+	while(IFC->RISR!=PEP_END_INT);			//Wait for the operation to complete
+    262e:	934a      	ld.w      	r2, (r3, 0x28)
+    2630:	3a44      	cmpnei      	r2, 4
+    2632:	0bfe      	bt      	0x262e	// 262e <Page_ProgramData+0x4e>
+	//Page erase 5
+	SetUserKey;
+	IFC->CMR=0x02;					
+    2634:	3102      	movi      	r1, 2
+	SetUserKey;
+    2636:	1052      	lrw      	r2, 0x5a5a5a5a	// 267c <Page_ProgramData+0x9c>
+    2638:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x02;					
+    263a:	b323      	st.w      	r1, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;			//
+	IFC->CR=0X01;					//Start Program
+    263c:	3101      	movi      	r1, 1
+	IFC->FM_ADDR=FlashAdd;			//
+    263e:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    2640:	b324      	st.w      	r1, (r3, 0x10)
+	while(IFC->RISR!=ERS_END_INT);			//Wait for the operation to complete
+    2642:	932a      	ld.w      	r1, (r3, 0x28)
+    2644:	3941      	cmpnei      	r1, 1
+    2646:	0bfe      	bt      	0x2642	// 2642 <Page_ProgramData+0x62>
+	//Write page cache data to flash memory 6
+	SetUserKey;
+    2648:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x01;					
+    264a:	b323      	st.w      	r1, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;		//
+    264c:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    264e:	b324      	st.w      	r1, (r3, 0x10)
+	while(IFC->RISR!=RGM_END_INT);			//Wait for the operation to complete
+    2650:	934a      	ld.w      	r2, (r3, 0x28)
+    2652:	3a42      	cmpnei      	r2, 2
+    2654:	0bfe      	bt      	0x2650	// 2650 <Page_ProgramData+0x70>
+}
+    2656:	1402      	addi      	r14, r14, 8
+    2658:	1484      	pop      	r4-r7
+		DataBuffer=*BufArry+(*(BufArry+1)<<8)+(*(BufArry+2)<<16)+(*(BufArry+3)<<24);
+    265a:	82e0      	ld.b      	r7, (r2, 0x0)
+    265c:	8281      	ld.b      	r4, (r2, 0x1)
+    265e:	4488      	lsli      	r4, r4, 8
+    2660:	8222      	ld.b      	r1, (r2, 0x2)
+    2662:	611c      	addu      	r4, r7
+    2664:	82a3      	ld.b      	r5, (r2, 0x3)
+    2666:	4130      	lsli      	r1, r1, 16
+    2668:	98c1      	ld.w      	r6, (r14, 0x4)
+    266a:	6050      	addu      	r1, r4
+    266c:	45b8      	lsli      	r5, r5, 24
+    266e:	6188      	addu      	r6, r2
+    2670:	6054      	addu      	r1, r5
+		*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
+    2672:	b620      	st.w      	r1, (r6, 0x0)
+		BufArry  +=4;
+    2674:	2203      	addi      	r2, 4
+    2676:	07ca      	br      	0x260a	// 260a <Page_ProgramData+0x2a>
+    2678:	20000060 	.long	0x20000060
+    267c:	5a5a5a5a 	.long	0x5a5a5a5a
+
+Disassembly of section .text.ReadDataArry_U8:
+
+00002680 <ReadDataArry_U8>:
+//ReadFlashData fuction return Data arry save in Flash
+//EntryParameter:RdStartAdd、DataLength、*DataArryPoint
+//ReturnValue:NONE
+*************************************************************/
+void ReadDataArry_U8(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint)
+{
+    2680:	14c3      	push      	r4-r6
+	unsigned int i;
+	for (i=0;i<DataLength;i++)
+    2682:	3300      	movi      	r3, 0
+	{
+		if((i!=0)&&(i%4==0))
+    2684:	3503      	movi      	r5, 3
+	for (i=0;i<DataLength;i++)
+    2686:	644e      	cmpne      	r3, r1
+    2688:	5acc      	addu      	r6, r2, r3
+    268a:	0802      	bt      	0x268e	// 268e <ReadDataArry_U8+0xe>
+			RdStartAdd +=4;
+		}	
+		*DataArryPoint=*(U8_T *)(RdStartAdd+ (i%4));
+		DataArryPoint++;
+	}
+}
+    268c:	1483      	pop      	r4-r6
+		if((i!=0)&&(i%4==0))
+    268e:	3b40      	cmpnei      	r3, 0
+    2690:	0c06      	bf      	0x269c	// 269c <ReadDataArry_U8+0x1c>
+    2692:	6d0f      	mov      	r4, r3
+    2694:	6914      	and      	r4, r5
+    2696:	3c40      	cmpnei      	r4, 0
+    2698:	0802      	bt      	0x269c	// 269c <ReadDataArry_U8+0x1c>
+			RdStartAdd +=4;
+    269a:	2003      	addi      	r0, 4
+		*DataArryPoint=*(U8_T *)(RdStartAdd+ (i%4));
+    269c:	6d0f      	mov      	r4, r3
+    269e:	6914      	and      	r4, r5
+    26a0:	6100      	addu      	r4, r0
+    26a2:	8480      	ld.b      	r4, (r4, 0x0)
+    26a4:	a680      	st.b      	r4, (r6, 0x0)
+	for (i=0;i<DataLength;i++)
+    26a6:	2300      	addi      	r3, 1
+    26a8:	07ef      	br      	0x2686	// 2686 <ReadDataArry_U8+0x6>
+
+Disassembly of section .text.startup.main:
+
+000026ac <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    26ac:	14d0      	push      	r15
+//	delay_nms(2000);
+	APT32F102_init();							//102 initial
+    26ae:	e000009f 	bsr      	0x27ec	// 27ec <APT32F102_init>
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    26b2:	1029      	lrw      	r1, 0x4d84	// 26d4 <main+0x28>
+    26b4:	3000      	movi      	r0, 0
+    26b6:	e00007df 	bsr      	0x3674	// 3674 <Dbg_Println>
+
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    26ba:	e3fffaf5 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+
+		UART1_TASK();
+    26be:	e000067d 	bsr      	0x33b8	// 33b8 <UART1_TASK>
+		
+		DIP_ScanTask();
+    26c2:	e000083f 	bsr      	0x3740	// 3740 <DIP_ScanTask>
+		
+		BLV_RLY_Task();
+    26c6:	e0000975 	bsr      	0x39b0	// 39b0 <BLV_RLY_Task>
+		
+		CTRL_LEDStatus_Task();
+    26ca:	e0000beb 	bsr      	0x3ea0	// 3ea0 <CTRL_LEDStatus_Task>
+		
+		BUS485Send_Task();
+    26ce:	e0000775 	bsr      	0x35b8	// 35b8 <BUS485Send_Task>
+    26d2:	07f4      	br      	0x26ba	// 26ba <main+0xe>
+    26d4:	00004d84 	.long	0x00004d84
+
+Disassembly of section .text.delay_nms:
+
+000026d8 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    26d8:	14d0      	push      	r15
+    26da:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    26dc:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    26de:	3300      	movi      	r3, 0
+    j = 50* t;
+    26e0:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    26e2:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    26e4:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    26e6:	b860      	st.w      	r3, (r14, 0x0)
+    26e8:	9840      	ld.w      	r2, (r14, 0x0)
+    26ea:	9861      	ld.w      	r3, (r14, 0x4)
+    26ec:	64c8      	cmphs      	r2, r3
+    26ee:	0c03      	bf      	0x26f4	// 26f4 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    26f0:	1403      	addi      	r14, r14, 12
+    26f2:	1490      	pop      	r15
+        k++;
+    26f4:	9862      	ld.w      	r3, (r14, 0x8)
+    26f6:	2300      	addi      	r3, 1
+    26f8:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    26fa:	e3fffad5 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    26fe:	9860      	ld.w      	r3, (r14, 0x0)
+    2700:	2300      	addi      	r3, 1
+    2702:	07f2      	br      	0x26e6	// 26e6 <delay_nms+0xe>
+
+Disassembly of section .text.delay_nus:
+
+00002704 <delay_nus>:
+void delay_nus(unsigned int t)
+{
+    2704:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    2706:	3300      	movi      	r3, 0
+    2708:	b862      	st.w      	r3, (r14, 0x8)
+    j = 1* t;
+    270a:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    270c:	b860      	st.w      	r3, (r14, 0x0)
+    270e:	9840      	ld.w      	r2, (r14, 0x0)
+    2710:	9861      	ld.w      	r3, (r14, 0x4)
+    2712:	64c8      	cmphs      	r2, r3
+    2714:	0c03      	bf      	0x271a	// 271a <delay_nus+0x16>
+    {
+        k++;
+    }
+}
+    2716:	1403      	addi      	r14, r14, 12
+    2718:	783c      	jmp      	r15
+        k++;
+    271a:	9862      	ld.w      	r3, (r14, 0x8)
+    271c:	2300      	addi      	r3, 1
+    271e:	b862      	st.w      	r3, (r14, 0x8)
+    for ( i = 0; i < j; i++ )
+    2720:	9860      	ld.w      	r3, (r14, 0x0)
+    2722:	2300      	addi      	r3, 1
+    2724:	07f4      	br      	0x270c	// 270c <delay_nus+0x8>
+
+Disassembly of section .text.BT_CONFIG:
+
+00002728 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    2728:	14d2      	push      	r4-r5, r15
+    272a:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    272c:	1095      	lrw      	r4, 0x20000008	// 2780 <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    272e:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    2730:	9400      	ld.w      	r0, (r4, 0x0)
+    2732:	e3fffd29 	bsr      	0x2184	// 2184 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    2736:	9400      	ld.w      	r0, (r4, 0x0)
+    2738:	b8a1      	st.w      	r5, (r14, 0x4)
+    273a:	b8a0      	st.w      	r5, (r14, 0x0)
+    273c:	3308      	movi      	r3, 8
+    273e:	3200      	movi      	r2, 0
+    2740:	3101      	movi      	r1, 1
+    2742:	e3fffd38 	bsr      	0x21b2	// 21b2 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    2746:	3380      	movi      	r3, 128
+    2748:	4363      	lsli      	r3, r3, 3
+    274a:	b861      	st.w      	r3, (r14, 0x4)
+    274c:	9400      	ld.w      	r0, (r4, 0x0)
+    274e:	3300      	movi      	r3, 0
+    2750:	b8a3      	st.w      	r5, (r14, 0xc)
+    2752:	b8a2      	st.w      	r5, (r14, 0x8)
+    2754:	b8a0      	st.w      	r5, (r14, 0x0)
+    2756:	3200      	movi      	r2, 0
+    2758:	3180      	movi      	r1, 128
+    275a:	e3fffd38 	bsr      	0x21ca	// 21ca <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    275e:	3201      	movi      	r2, 1
+    2760:	1029      	lrw      	r1, 0x12ac	// 2784 <BT_CONFIG+0x5c>
+    2762:	9400      	ld.w      	r0, (r4, 0x0)
+    2764:	e3fffd49 	bsr      	0x21f6	// 21f6 <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    2768:	9400      	ld.w      	r0, (r4, 0x0)
+    276a:	e3fffd1b 	bsr      	0x21a0	// 21a0 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    276e:	9400      	ld.w      	r0, (r4, 0x0)
+    2770:	3202      	movi      	r2, 2
+    2772:	3101      	movi      	r1, 1
+    2774:	e3fffd44 	bsr      	0x21fc	// 21fc <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    2778:	e3fffd4c 	bsr      	0x2210	// 2210 <BT1_INT_ENABLE>
+	
+}
+    277c:	1404      	addi      	r14, r14, 16
+    277e:	1492      	pop      	r4-r5, r15
+    2780:	20000008 	.long	0x20000008
+    2784:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+00002788 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    2788:	14d0      	push      	r15
+    278a:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    278c:	e3fff9d8 	bsr      	0x1b3c	// 1b3c <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    2790:	3101      	movi      	r1, 1
+    2792:	3001      	movi      	r0, 1
+    2794:	e3fff9fa 	bsr      	0x1b88	// 1b88 <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    2798:	3000      	movi      	r0, 0
+    279a:	e3fffa53 	bsr      	0x1c40	// 1c40 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    279e:	3180      	movi      	r1, 128
+    27a0:	3308      	movi      	r3, 8
+    27a2:	3200      	movi      	r2, 0
+    27a4:	4121      	lsli      	r1, r1, 1
+    27a6:	3002      	movi      	r0, 2
+    27a8:	e3fffa08 	bsr      	0x1bb8	// 1bb8 <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    27ac:	3080      	movi      	r0, 128
+    27ae:	3118      	movi      	r1, 24
+    27b0:	4002      	lsli      	r0, r0, 2
+    27b2:	e3fffa83 	bsr      	0x1cb8	// 1cb8 <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    27b6:	3001      	movi      	r0, 1
+    27b8:	e3fffa58 	bsr      	0x1c68	// 1c68 <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    27bc:	e3fffa74 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    27c0:	e3fffaa6 	bsr      	0x1d0c	// 1d0c <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    27c4:	3340      	movi      	r3, 64
+    27c6:	b860      	st.w      	r3, (r14, 0x0)
+    27c8:	31c0      	movi      	r1, 192
+    27ca:	3380      	movi      	r3, 128
+    27cc:	4364      	lsli      	r3, r3, 4
+    27ce:	3200      	movi      	r2, 0
+    27d0:	4123      	lsli      	r1, r1, 3
+    27d2:	3000      	movi      	r0, 0
+    27d4:	e3fffa7e 	bsr      	0x1cd0	// 1cd0 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    27d8:	e3fffa8c 	bsr      	0x1cf0	// 1cf0 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    27dc:	e3fffaea 	bsr      	0x1db0	// 1db0 <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    27e0:	3000      	movi      	r0, 0
+    27e2:	e00010ed 	bsr      	0x49bc	// 49bc <std_clk_calib>
+	
+}
+    27e6:	1401      	addi      	r14, r14, 4
+    27e8:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+000027ec <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    27ec:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    27ee:	1070      	lrw      	r3, 0x2000005c	// 282c <APT32F102_init+0x40>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    27f0:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    27f2:	9340      	ld.w      	r2, (r3, 0x0)
+    27f4:	106f      	lrw      	r3, 0xfffffff	// 2830 <APT32F102_init+0x44>
+    27f6:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    27f8:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    27fa:	926c      	ld.w      	r3, (r2, 0x30)
+    27fc:	68c4      	and      	r3, r1
+    27fe:	3b40      	cmpnei      	r3, 0
+    2800:	0ffd      	bf      	0x27fa	// 27fa <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    2802:	e3ffffc3 	bsr      	0x2788	// 2788 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    2806:	e0000507 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    280a:	e3fffadf 	bsr      	0x1dc8	// 1dc8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART1_IRQ,1);				//串口优先级最高
+    280e:	3101      	movi      	r1, 1
+    2810:	300e      	movi      	r0, 14
+    2812:	e3fffaed 	bsr      	0x1dec	// 1dec <Set_INT_Priority>
+
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	BT_CONFIG();			//BT initial
+    2816:	e3ffff89 	bsr      	0x2728	// 2728 <BT_CONFIG>
+	
+	UARTx_Init(UART_1,BLV_RLY_RS485_Pro);
+    281a:	1027      	lrw      	r1, 0x3d90	// 2834 <APT32F102_init+0x48>
+    281c:	3001      	movi      	r0, 1
+    281e:	e0000501 	bsr      	0x3220	// 3220 <UARTx_Init>
+	
+	DIP_Switch_Init();
+    2822:	e0000749 	bsr      	0x36b4	// 36b4 <DIP_Switch_Init>
+	
+	Relay_Init();
+    2826:	e00007d3 	bsr      	0x37cc	// 37cc <Relay_Init>
+	
+}
+    282a:	1490      	pop      	r15
+    282c:	2000005c 	.long	0x2000005c
+    2830:	0fffffff 	.long	0x0fffffff
+    2834:	00003d90 	.long	0x00003d90
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00002838 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    2838:	1460      	nie
+    283a:	1462      	ipush
+    // ISR content ...
+	nop;
+    283c:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    283e:	117a      	lrw      	r3, 0x2000005c	// 2924 <SYSCONIntHandler+0xec>
+    2840:	3280      	movi      	r2, 128
+    2842:	9360      	ld.w      	r3, (r3, 0x0)
+    2844:	60c8      	addu      	r3, r2
+    2846:	9323      	ld.w      	r1, (r3, 0xc)
+    2848:	3001      	movi      	r0, 1
+    284a:	6840      	and      	r1, r0
+    284c:	3940      	cmpnei      	r1, 0
+    284e:	0c04      	bf      	0x2856	// 2856 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    2850:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    2852:	1463      	ipop
+    2854:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    2856:	9323      	ld.w      	r1, (r3, 0xc)
+    2858:	3002      	movi      	r0, 2
+    285a:	6840      	and      	r1, r0
+    285c:	3940      	cmpnei      	r1, 0
+    285e:	0bf9      	bt      	0x2850	// 2850 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    2860:	9323      	ld.w      	r1, (r3, 0xc)
+    2862:	3008      	movi      	r0, 8
+    2864:	6840      	and      	r1, r0
+    2866:	3940      	cmpnei      	r1, 0
+    2868:	0bf4      	bt      	0x2850	// 2850 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    286a:	9323      	ld.w      	r1, (r3, 0xc)
+    286c:	3010      	movi      	r0, 16
+    286e:	6840      	and      	r1, r0
+    2870:	3940      	cmpnei      	r1, 0
+    2872:	0bef      	bt      	0x2850	// 2850 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    2874:	9323      	ld.w      	r1, (r3, 0xc)
+    2876:	6848      	and      	r1, r2
+    2878:	3940      	cmpnei      	r1, 0
+    287a:	0c03      	bf      	0x2880	// 2880 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    287c:	b341      	st.w      	r2, (r3, 0x4)
+}
+    287e:	07ea      	br      	0x2852	// 2852 <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    2880:	3280      	movi      	r2, 128
+    2882:	9323      	ld.w      	r1, (r3, 0xc)
+    2884:	4241      	lsli      	r2, r2, 1
+    2886:	6848      	and      	r1, r2
+    2888:	3940      	cmpnei      	r1, 0
+    288a:	0bf9      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    288c:	3280      	movi      	r2, 128
+    288e:	9323      	ld.w      	r1, (r3, 0xc)
+    2890:	4242      	lsli      	r2, r2, 2
+    2892:	6848      	and      	r1, r2
+    2894:	3940      	cmpnei      	r1, 0
+    2896:	0bf3      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    2898:	3280      	movi      	r2, 128
+    289a:	9323      	ld.w      	r1, (r3, 0xc)
+    289c:	4243      	lsli      	r2, r2, 3
+    289e:	6848      	and      	r1, r2
+    28a0:	3940      	cmpnei      	r1, 0
+    28a2:	0bed      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    28a4:	3280      	movi      	r2, 128
+    28a6:	9323      	ld.w      	r1, (r3, 0xc)
+    28a8:	4244      	lsli      	r2, r2, 4
+    28aa:	6848      	and      	r1, r2
+    28ac:	3940      	cmpnei      	r1, 0
+    28ae:	0c03      	bf      	0x28b4	// 28b4 <SYSCONIntHandler+0x7c>
+		nop;
+    28b0:	6c03      	mov      	r0, r0
+    28b2:	07e5      	br      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    28b4:	3280      	movi      	r2, 128
+    28b6:	9323      	ld.w      	r1, (r3, 0xc)
+    28b8:	4245      	lsli      	r2, r2, 5
+    28ba:	6848      	and      	r1, r2
+    28bc:	3940      	cmpnei      	r1, 0
+    28be:	0bdf      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    28c0:	3280      	movi      	r2, 128
+    28c2:	9323      	ld.w      	r1, (r3, 0xc)
+    28c4:	4246      	lsli      	r2, r2, 6
+    28c6:	6848      	and      	r1, r2
+    28c8:	3940      	cmpnei      	r1, 0
+    28ca:	0bd9      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    28cc:	3280      	movi      	r2, 128
+    28ce:	9323      	ld.w      	r1, (r3, 0xc)
+    28d0:	4247      	lsli      	r2, r2, 7
+    28d2:	6848      	and      	r1, r2
+    28d4:	3940      	cmpnei      	r1, 0
+    28d6:	0bd3      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    28d8:	3280      	movi      	r2, 128
+    28da:	9323      	ld.w      	r1, (r3, 0xc)
+    28dc:	424b      	lsli      	r2, r2, 11
+    28de:	6848      	and      	r1, r2
+    28e0:	3940      	cmpnei      	r1, 0
+    28e2:	0bcd      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    28e4:	3280      	movi      	r2, 128
+    28e6:	9323      	ld.w      	r1, (r3, 0xc)
+    28e8:	424c      	lsli      	r2, r2, 12
+    28ea:	6848      	and      	r1, r2
+    28ec:	3940      	cmpnei      	r1, 0
+    28ee:	0bc7      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    28f0:	3280      	movi      	r2, 128
+    28f2:	9323      	ld.w      	r1, (r3, 0xc)
+    28f4:	424d      	lsli      	r2, r2, 13
+    28f6:	6848      	and      	r1, r2
+    28f8:	3940      	cmpnei      	r1, 0
+    28fa:	0bc1      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    28fc:	3280      	movi      	r2, 128
+    28fe:	9323      	ld.w      	r1, (r3, 0xc)
+    2900:	424e      	lsli      	r2, r2, 14
+    2902:	6848      	and      	r1, r2
+    2904:	3940      	cmpnei      	r1, 0
+    2906:	0bbb      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    2908:	3280      	movi      	r2, 128
+    290a:	9323      	ld.w      	r1, (r3, 0xc)
+    290c:	424f      	lsli      	r2, r2, 15
+    290e:	6848      	and      	r1, r2
+    2910:	3940      	cmpnei      	r1, 0
+    2912:	0bb5      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    2914:	3280      	movi      	r2, 128
+    2916:	9323      	ld.w      	r1, (r3, 0xc)
+    2918:	4256      	lsli      	r2, r2, 22
+    291a:	6848      	and      	r1, r2
+    291c:	3940      	cmpnei      	r1, 0
+    291e:	0baf      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+    2920:	0799      	br      	0x2852	// 2852 <SYSCONIntHandler+0x1a>
+    2922:	0000      	bkpt
+    2924:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00002928 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    2928:	1460      	nie
+    292a:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    292c:	1078      	lrw      	r3, 0x20000060	// 298c <IFCIntHandler+0x64>
+    292e:	3101      	movi      	r1, 1
+    2930:	9360      	ld.w      	r3, (r3, 0x0)
+    2932:	934b      	ld.w      	r2, (r3, 0x2c)
+    2934:	6884      	and      	r2, r1
+    2936:	3a40      	cmpnei      	r2, 0
+    2938:	0c04      	bf      	0x2940	// 2940 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    293a:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    293c:	1463      	ipop
+    293e:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    2940:	934b      	ld.w      	r2, (r3, 0x2c)
+    2942:	3102      	movi      	r1, 2
+    2944:	6884      	and      	r2, r1
+    2946:	3a40      	cmpnei      	r2, 0
+    2948:	0bf9      	bt      	0x293a	// 293a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    294a:	934b      	ld.w      	r2, (r3, 0x2c)
+    294c:	3104      	movi      	r1, 4
+    294e:	6884      	and      	r2, r1
+    2950:	3a40      	cmpnei      	r2, 0
+    2952:	0bf4      	bt      	0x293a	// 293a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    2954:	3280      	movi      	r2, 128
+    2956:	932b      	ld.w      	r1, (r3, 0x2c)
+    2958:	4245      	lsli      	r2, r2, 5
+    295a:	6848      	and      	r1, r2
+    295c:	3940      	cmpnei      	r1, 0
+    295e:	0c03      	bf      	0x2964	// 2964 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    2960:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    2962:	07ed      	br      	0x293c	// 293c <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    2964:	3280      	movi      	r2, 128
+    2966:	932b      	ld.w      	r1, (r3, 0x2c)
+    2968:	4246      	lsli      	r2, r2, 6
+    296a:	6848      	and      	r1, r2
+    296c:	3940      	cmpnei      	r1, 0
+    296e:	0bf9      	bt      	0x2960	// 2960 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    2970:	3280      	movi      	r2, 128
+    2972:	932b      	ld.w      	r1, (r3, 0x2c)
+    2974:	4247      	lsli      	r2, r2, 7
+    2976:	6848      	and      	r1, r2
+    2978:	3940      	cmpnei      	r1, 0
+    297a:	0bf3      	bt      	0x2960	// 2960 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    297c:	3280      	movi      	r2, 128
+    297e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2980:	4248      	lsli      	r2, r2, 8
+    2982:	6848      	and      	r1, r2
+    2984:	3940      	cmpnei      	r1, 0
+    2986:	0bed      	bt      	0x2960	// 2960 <IFCIntHandler+0x38>
+    2988:	07da      	br      	0x293c	// 293c <IFCIntHandler+0x14>
+    298a:	0000      	bkpt
+    298c:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00002990 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    2990:	1460      	nie
+    2992:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    2994:	1078      	lrw      	r3, 0x20000050	// 29f4 <ADCIntHandler+0x64>
+    2996:	3101      	movi      	r1, 1
+    2998:	9360      	ld.w      	r3, (r3, 0x0)
+    299a:	9348      	ld.w      	r2, (r3, 0x20)
+    299c:	6884      	and      	r2, r1
+    299e:	3a40      	cmpnei      	r2, 0
+    29a0:	0c04      	bf      	0x29a8	// 29a8 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    29a2:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    29a4:	1463      	ipop
+    29a6:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    29a8:	9348      	ld.w      	r2, (r3, 0x20)
+    29aa:	3102      	movi      	r1, 2
+    29ac:	6884      	and      	r2, r1
+    29ae:	3a40      	cmpnei      	r2, 0
+    29b0:	0bf9      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    29b2:	9348      	ld.w      	r2, (r3, 0x20)
+    29b4:	3104      	movi      	r1, 4
+    29b6:	6884      	and      	r2, r1
+    29b8:	3a40      	cmpnei      	r2, 0
+    29ba:	0bf4      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    29bc:	9348      	ld.w      	r2, (r3, 0x20)
+    29be:	3110      	movi      	r1, 16
+    29c0:	6884      	and      	r2, r1
+    29c2:	3a40      	cmpnei      	r2, 0
+    29c4:	0bef      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    29c6:	9348      	ld.w      	r2, (r3, 0x20)
+    29c8:	3120      	movi      	r1, 32
+    29ca:	6884      	and      	r2, r1
+    29cc:	3a40      	cmpnei      	r2, 0
+    29ce:	0bea      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    29d0:	9348      	ld.w      	r2, (r3, 0x20)
+    29d2:	3140      	movi      	r1, 64
+    29d4:	6884      	and      	r2, r1
+    29d6:	3a40      	cmpnei      	r2, 0
+    29d8:	0be5      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    29da:	9348      	ld.w      	r2, (r3, 0x20)
+    29dc:	3180      	movi      	r1, 128
+    29de:	6884      	and      	r2, r1
+    29e0:	3a40      	cmpnei      	r2, 0
+    29e2:	0be0      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    29e4:	3280      	movi      	r2, 128
+    29e6:	9328      	ld.w      	r1, (r3, 0x20)
+    29e8:	4249      	lsli      	r2, r2, 9
+    29ea:	6848      	and      	r1, r2
+    29ec:	3940      	cmpnei      	r1, 0
+    29ee:	0fdb      	bf      	0x29a4	// 29a4 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    29f0:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    29f2:	07d9      	br      	0x29a4	// 29a4 <ADCIntHandler+0x14>
+    29f4:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+000029f8 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    29f8:	1460      	nie
+    29fa:	1462      	ipush
+    29fc:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    29fe:	1387      	lrw      	r4, 0x20000020	// 2b98 <EPT0IntHandler+0x1a0>
+    2a00:	3280      	movi      	r2, 128
+    2a02:	9460      	ld.w      	r3, (r4, 0x0)
+    2a04:	60c8      	addu      	r3, r2
+    2a06:	9335      	ld.w      	r1, (r3, 0x54)
+    2a08:	3001      	movi      	r0, 1
+    2a0a:	6840      	and      	r1, r0
+    2a0c:	3940      	cmpnei      	r1, 0
+    2a0e:	0c03      	bf      	0x2a14	// 2a14 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    2a10:	b317      	st.w      	r0, (r3, 0x5c)
+    2a12:	0424      	br      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    2a14:	9335      	ld.w      	r1, (r3, 0x54)
+    2a16:	3002      	movi      	r0, 2
+    2a18:	6840      	and      	r1, r0
+    2a1a:	3940      	cmpnei      	r1, 0
+    2a1c:	0bfa      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    2a1e:	9335      	ld.w      	r1, (r3, 0x54)
+    2a20:	3004      	movi      	r0, 4
+    2a22:	6840      	and      	r1, r0
+    2a24:	3940      	cmpnei      	r1, 0
+    2a26:	0bf5      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    2a28:	9335      	ld.w      	r1, (r3, 0x54)
+    2a2a:	3008      	movi      	r0, 8
+    2a2c:	6840      	and      	r1, r0
+    2a2e:	3940      	cmpnei      	r1, 0
+    2a30:	0bf0      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    2a32:	9335      	ld.w      	r1, (r3, 0x54)
+    2a34:	3010      	movi      	r0, 16
+    2a36:	6840      	and      	r1, r0
+    2a38:	3940      	cmpnei      	r1, 0
+    2a3a:	0c1f      	bf      	0x2a78	// 2a78 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    2a3c:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    2a3e:	3200      	movi      	r2, 0
+    2a40:	3101      	movi      	r1, 1
+    2a42:	3000      	movi      	r0, 0
+    2a44:	e3fff972 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    2a48:	3201      	movi      	r2, 1
+    2a4a:	3101      	movi      	r1, 1
+    2a4c:	3001      	movi      	r0, 1
+    2a4e:	e3fff96d 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    2a52:	9460      	ld.w      	r3, (r4, 0x0)
+    2a54:	934b      	ld.w      	r2, (r3, 0x2c)
+    2a56:	1272      	lrw      	r3, 0x2000014c	// 2b9c <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2a58:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    2a5a:	9460      	ld.w      	r3, (r4, 0x0)
+    2a5c:	3280      	movi      	r2, 128
+    2a5e:	60c8      	addu      	r3, r2
+    2a60:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a62:	3001      	movi      	r0, 1
+    2a64:	6840      	and      	r1, r0
+    2a66:	3940      	cmpnei      	r1, 0
+    2a68:	0c61      	bf      	0x2b2a	// 2b2a <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    2a6a:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    2a6c:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    2a70:	9880      	ld.w      	r4, (r14, 0x0)
+    2a72:	1402      	addi      	r14, r14, 8
+    2a74:	1463      	ipop
+    2a76:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    2a78:	9335      	ld.w      	r1, (r3, 0x54)
+    2a7a:	3020      	movi      	r0, 32
+    2a7c:	6840      	and      	r1, r0
+    2a7e:	3940      	cmpnei      	r1, 0
+    2a80:	0c10      	bf      	0x2aa0	// 2aa0 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    2a82:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    2a84:	3200      	movi      	r2, 0
+    2a86:	3101      	movi      	r1, 1
+    2a88:	3001      	movi      	r0, 1
+    2a8a:	e3fff94f 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    2a8e:	3201      	movi      	r2, 1
+    2a90:	3101      	movi      	r1, 1
+    2a92:	3000      	movi      	r0, 0
+    2a94:	e3fff94a 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2a98:	9460      	ld.w      	r3, (r4, 0x0)
+    2a9a:	934c      	ld.w      	r2, (r3, 0x30)
+    2a9c:	1261      	lrw      	r3, 0x20000148	// 2ba0 <EPT0IntHandler+0x1a8>
+    2a9e:	07dd      	br      	0x2a58	// 2a58 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    2aa0:	9335      	ld.w      	r1, (r3, 0x54)
+    2aa2:	3040      	movi      	r0, 64
+    2aa4:	6840      	and      	r1, r0
+    2aa6:	3940      	cmpnei      	r1, 0
+    2aa8:	0bb4      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    2aaa:	9335      	ld.w      	r1, (r3, 0x54)
+    2aac:	6848      	and      	r1, r2
+    2aae:	3940      	cmpnei      	r1, 0
+    2ab0:	0c03      	bf      	0x2ab6	// 2ab6 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    2ab2:	b357      	st.w      	r2, (r3, 0x5c)
+    2ab4:	07d3      	br      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    2ab6:	3280      	movi      	r2, 128
+    2ab8:	9335      	ld.w      	r1, (r3, 0x54)
+    2aba:	4241      	lsli      	r2, r2, 1
+    2abc:	6848      	and      	r1, r2
+    2abe:	3940      	cmpnei      	r1, 0
+    2ac0:	0bf9      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    2ac2:	3280      	movi      	r2, 128
+    2ac4:	9335      	ld.w      	r1, (r3, 0x54)
+    2ac6:	4242      	lsli      	r2, r2, 2
+    2ac8:	6848      	and      	r1, r2
+    2aca:	3940      	cmpnei      	r1, 0
+    2acc:	0bf3      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    2ace:	3280      	movi      	r2, 128
+    2ad0:	9335      	ld.w      	r1, (r3, 0x54)
+    2ad2:	4243      	lsli      	r2, r2, 3
+    2ad4:	6848      	and      	r1, r2
+    2ad6:	3940      	cmpnei      	r1, 0
+    2ad8:	0bed      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    2ada:	3280      	movi      	r2, 128
+    2adc:	9335      	ld.w      	r1, (r3, 0x54)
+    2ade:	4244      	lsli      	r2, r2, 4
+    2ae0:	6848      	and      	r1, r2
+    2ae2:	3940      	cmpnei      	r1, 0
+    2ae4:	0be7      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    2ae6:	3280      	movi      	r2, 128
+    2ae8:	9335      	ld.w      	r1, (r3, 0x54)
+    2aea:	4245      	lsli      	r2, r2, 5
+    2aec:	6848      	and      	r1, r2
+    2aee:	3940      	cmpnei      	r1, 0
+    2af0:	0be1      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    2af2:	3280      	movi      	r2, 128
+    2af4:	9335      	ld.w      	r1, (r3, 0x54)
+    2af6:	4246      	lsli      	r2, r2, 6
+    2af8:	6848      	and      	r1, r2
+    2afa:	3940      	cmpnei      	r1, 0
+    2afc:	0bdb      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    2afe:	3280      	movi      	r2, 128
+    2b00:	9335      	ld.w      	r1, (r3, 0x54)
+    2b02:	4247      	lsli      	r2, r2, 7
+    2b04:	6848      	and      	r1, r2
+    2b06:	3940      	cmpnei      	r1, 0
+    2b08:	0bd5      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    2b0a:	3280      	movi      	r2, 128
+    2b0c:	9335      	ld.w      	r1, (r3, 0x54)
+    2b0e:	4248      	lsli      	r2, r2, 8
+    2b10:	6848      	and      	r1, r2
+    2b12:	3940      	cmpnei      	r1, 0
+    2b14:	0bcf      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    2b16:	3280      	movi      	r2, 128
+    2b18:	9335      	ld.w      	r1, (r3, 0x54)
+    2b1a:	4249      	lsli      	r2, r2, 9
+    2b1c:	6848      	and      	r1, r2
+    2b1e:	3940      	cmpnei      	r1, 0
+    2b20:	0f9d      	bf      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    2b22:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    2b24:	e3fffd4a 	bsr      	0x25b8	// 25b8 <EPT_Stop>
+    2b28:	0799      	br      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    2b2a:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b2c:	3002      	movi      	r0, 2
+    2b2e:	6840      	and      	r1, r0
+    2b30:	3940      	cmpnei      	r1, 0
+    2b32:	0b9c      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    2b34:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b36:	3004      	movi      	r0, 4
+    2b38:	6840      	and      	r1, r0
+    2b3a:	3940      	cmpnei      	r1, 0
+    2b3c:	0b97      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    2b3e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b40:	3008      	movi      	r0, 8
+    2b42:	6840      	and      	r1, r0
+    2b44:	3940      	cmpnei      	r1, 0
+    2b46:	0b92      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    2b48:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b4a:	3010      	movi      	r0, 16
+    2b4c:	6840      	and      	r1, r0
+    2b4e:	3940      	cmpnei      	r1, 0
+    2b50:	0b8d      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    2b52:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b54:	3020      	movi      	r0, 32
+    2b56:	6840      	and      	r1, r0
+    2b58:	3940      	cmpnei      	r1, 0
+    2b5a:	0b88      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    2b5c:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b5e:	3040      	movi      	r0, 64
+    2b60:	6840      	and      	r1, r0
+    2b62:	3940      	cmpnei      	r1, 0
+    2b64:	0b83      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    2b66:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b68:	6848      	and      	r1, r2
+    2b6a:	3940      	cmpnei      	r1, 0
+    2b6c:	0c03      	bf      	0x2b72	// 2b72 <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    2b6e:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    2b70:	077e      	br      	0x2a6c	// 2a6c <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    2b72:	3280      	movi      	r2, 128
+    2b74:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b76:	4241      	lsli      	r2, r2, 1
+    2b78:	6848      	and      	r1, r2
+    2b7a:	3940      	cmpnei      	r1, 0
+    2b7c:	0bf9      	bt      	0x2b6e	// 2b6e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    2b7e:	3280      	movi      	r2, 128
+    2b80:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b82:	4242      	lsli      	r2, r2, 2
+    2b84:	6848      	and      	r1, r2
+    2b86:	3940      	cmpnei      	r1, 0
+    2b88:	0bf3      	bt      	0x2b6e	// 2b6e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    2b8a:	3280      	movi      	r2, 128
+    2b8c:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b8e:	4243      	lsli      	r2, r2, 3
+    2b90:	6848      	and      	r1, r2
+    2b92:	3940      	cmpnei      	r1, 0
+    2b94:	0bed      	bt      	0x2b6e	// 2b6e <EPT0IntHandler+0x176>
+    2b96:	076b      	br      	0x2a6c	// 2a6c <EPT0IntHandler+0x74>
+    2b98:	20000020 	.long	0x20000020
+    2b9c:	2000014c 	.long	0x2000014c
+    2ba0:	20000148 	.long	0x20000148
+
+Disassembly of section .text.WWDTHandler:
+
+00002ba4 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    2ba4:	1460      	nie
+    2ba6:	1462      	ipush
+    2ba8:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    2baa:	10ab      	lrw      	r5, 0x20000010	// 2bd4 <WWDTHandler+0x30>
+    2bac:	3401      	movi      	r4, 1
+    2bae:	9560      	ld.w      	r3, (r5, 0x0)
+    2bb0:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    2bb2:	30ff      	movi      	r0, 255
+    2bb4:	e3fffae0 	bsr      	0x2174	// 2174 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    2bb8:	9540      	ld.w      	r2, (r5, 0x0)
+    2bba:	9263      	ld.w      	r3, (r2, 0xc)
+    2bbc:	68d0      	and      	r3, r4
+    2bbe:	3b40      	cmpnei      	r3, 0
+    2bc0:	0c02      	bf      	0x2bc4	// 2bc4 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    2bc2:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    2bc4:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    2bc8:	98a1      	ld.w      	r5, (r14, 0x4)
+    2bca:	9880      	ld.w      	r4, (r14, 0x0)
+    2bcc:	1403      	addi      	r14, r14, 12
+    2bce:	1463      	ipop
+    2bd0:	1461      	nir
+    2bd2:	0000      	bkpt
+    2bd4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00002bd8 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    2bd8:	1460      	nie
+    2bda:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    2bdc:	107e      	lrw      	r3, 0x20000024	// 2c54 <GPT0IntHandler+0x7c>
+    2bde:	3101      	movi      	r1, 1
+    2be0:	9360      	ld.w      	r3, (r3, 0x0)
+    2be2:	237f      	addi      	r3, 128
+    2be4:	9355      	ld.w      	r2, (r3, 0x54)
+    2be6:	6884      	and      	r2, r1
+    2be8:	3a40      	cmpnei      	r2, 0
+    2bea:	0c04      	bf      	0x2bf2	// 2bf2 <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    2bec:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    2bee:	1463      	ipop
+    2bf0:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    2bf2:	9355      	ld.w      	r2, (r3, 0x54)
+    2bf4:	3102      	movi      	r1, 2
+    2bf6:	6884      	and      	r2, r1
+    2bf8:	3a40      	cmpnei      	r2, 0
+    2bfa:	0bf9      	bt      	0x2bec	// 2bec <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    2bfc:	9355      	ld.w      	r2, (r3, 0x54)
+    2bfe:	3110      	movi      	r1, 16
+    2c00:	6884      	and      	r2, r1
+    2c02:	3a40      	cmpnei      	r2, 0
+    2c04:	0bf4      	bt      	0x2bec	// 2bec <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    2c06:	9355      	ld.w      	r2, (r3, 0x54)
+    2c08:	3120      	movi      	r1, 32
+    2c0a:	6884      	and      	r2, r1
+    2c0c:	3a40      	cmpnei      	r2, 0
+    2c0e:	0bef      	bt      	0x2bec	// 2bec <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    2c10:	3280      	movi      	r2, 128
+    2c12:	9335      	ld.w      	r1, (r3, 0x54)
+    2c14:	4241      	lsli      	r2, r2, 1
+    2c16:	6848      	and      	r1, r2
+    2c18:	3940      	cmpnei      	r1, 0
+    2c1a:	0c03      	bf      	0x2c20	// 2c20 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    2c1c:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    2c1e:	07e8      	br      	0x2bee	// 2bee <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    2c20:	3280      	movi      	r2, 128
+    2c22:	9335      	ld.w      	r1, (r3, 0x54)
+    2c24:	4242      	lsli      	r2, r2, 2
+    2c26:	6848      	and      	r1, r2
+    2c28:	3940      	cmpnei      	r1, 0
+    2c2a:	0bf9      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    2c2c:	3280      	movi      	r2, 128
+    2c2e:	9335      	ld.w      	r1, (r3, 0x54)
+    2c30:	4243      	lsli      	r2, r2, 3
+    2c32:	6848      	and      	r1, r2
+    2c34:	3940      	cmpnei      	r1, 0
+    2c36:	0bf3      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    2c38:	3280      	movi      	r2, 128
+    2c3a:	9335      	ld.w      	r1, (r3, 0x54)
+    2c3c:	4244      	lsli      	r2, r2, 4
+    2c3e:	6848      	and      	r1, r2
+    2c40:	3940      	cmpnei      	r1, 0
+    2c42:	0bed      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    2c44:	3280      	movi      	r2, 128
+    2c46:	9335      	ld.w      	r1, (r3, 0x54)
+    2c48:	4249      	lsli      	r2, r2, 9
+    2c4a:	6848      	and      	r1, r2
+    2c4c:	3940      	cmpnei      	r1, 0
+    2c4e:	0be7      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+    2c50:	07cf      	br      	0x2bee	// 2bee <GPT0IntHandler+0x16>
+    2c52:	0000      	bkpt
+    2c54:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00002c58 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    2c58:	1460      	nie
+    2c5a:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    2c5c:	1079      	lrw      	r3, 0x20000018	// 2cc0 <RTCIntHandler+0x68>
+    2c5e:	3101      	movi      	r1, 1
+    2c60:	9360      	ld.w      	r3, (r3, 0x0)
+    2c62:	934a      	ld.w      	r2, (r3, 0x28)
+    2c64:	6884      	and      	r2, r1
+    2c66:	3a40      	cmpnei      	r2, 0
+    2c68:	0c14      	bf      	0x2c90	// 2c90 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    2c6a:	1057      	lrw      	r2, 0xca53	// 2cc4 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    2c6c:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    2c6e:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    2c70:	9342      	ld.w      	r2, (r3, 0x8)
+    2c72:	6c84      	or      	r2, r1
+    2c74:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    2c76:	3280      	movi      	r2, 128
+    2c78:	424d      	lsli      	r2, r2, 13
+    2c7a:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    2c7c:	3102      	movi      	r1, 2
+    2c7e:	9342      	ld.w      	r2, (r3, 0x8)
+    2c80:	6884      	and      	r2, r1
+    2c82:	3a40      	cmpnei      	r2, 0
+    2c84:	0bfd      	bt      	0x2c7e	// 2c7e <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    2c86:	9342      	ld.w      	r2, (r3, 0x8)
+    2c88:	3a80      	bclri      	r2, 0
+    2c8a:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    2c8c:	1463      	ipop
+    2c8e:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    2c90:	934a      	ld.w      	r2, (r3, 0x28)
+    2c92:	3102      	movi      	r1, 2
+    2c94:	6884      	and      	r2, r1
+    2c96:	3a40      	cmpnei      	r2, 0
+    2c98:	0c03      	bf      	0x2c9e	// 2c9e <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    2c9a:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    2c9c:	07f8      	br      	0x2c8c	// 2c8c <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    2c9e:	934a      	ld.w      	r2, (r3, 0x28)
+    2ca0:	3104      	movi      	r1, 4
+    2ca2:	6884      	and      	r2, r1
+    2ca4:	3a40      	cmpnei      	r2, 0
+    2ca6:	0bfa      	bt      	0x2c9a	// 2c9a <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    2ca8:	934a      	ld.w      	r2, (r3, 0x28)
+    2caa:	3108      	movi      	r1, 8
+    2cac:	6884      	and      	r2, r1
+    2cae:	3a40      	cmpnei      	r2, 0
+    2cb0:	0bf5      	bt      	0x2c9a	// 2c9a <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    2cb2:	934a      	ld.w      	r2, (r3, 0x28)
+    2cb4:	3110      	movi      	r1, 16
+    2cb6:	6884      	and      	r2, r1
+    2cb8:	3a40      	cmpnei      	r2, 0
+    2cba:	0bf0      	bt      	0x2c9a	// 2c9a <RTCIntHandler+0x42>
+    2cbc:	07e8      	br      	0x2c8c	// 2c8c <RTCIntHandler+0x34>
+    2cbe:	0000      	bkpt
+    2cc0:	20000018 	.long	0x20000018
+    2cc4:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00002cc8 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    2cc8:	1460      	nie
+    2cca:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2ccc:	106d      	lrw      	r3, 0x20000040	// 2d00 <UART0IntHandler+0x38>
+    2cce:	3102      	movi      	r1, 2
+    2cd0:	9360      	ld.w      	r3, (r3, 0x0)
+    2cd2:	9343      	ld.w      	r2, (r3, 0xc)
+    2cd4:	6884      	and      	r2, r1
+    2cd6:	3a40      	cmpnei      	r2, 0
+    2cd8:	0c03      	bf      	0x2cde	// 2cde <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    2cda:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2cdc:	0410      	br      	0x2cfc	// 2cfc <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2cde:	9343      	ld.w      	r2, (r3, 0xc)
+    2ce0:	3101      	movi      	r1, 1
+    2ce2:	6884      	and      	r2, r1
+    2ce4:	3a40      	cmpnei      	r2, 0
+    2ce6:	0bfa      	bt      	0x2cda	// 2cda <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2ce8:	9343      	ld.w      	r2, (r3, 0xc)
+    2cea:	3108      	movi      	r1, 8
+    2cec:	6884      	and      	r2, r1
+    2cee:	3a40      	cmpnei      	r2, 0
+    2cf0:	0bf5      	bt      	0x2cda	// 2cda <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2cf2:	9343      	ld.w      	r2, (r3, 0xc)
+    2cf4:	3104      	movi      	r1, 4
+    2cf6:	6884      	and      	r2, r1
+    2cf8:	3a40      	cmpnei      	r2, 0
+    2cfa:	0bf0      	bt      	0x2cda	// 2cda <UART0IntHandler+0x12>
+}
+    2cfc:	1463      	ipop
+    2cfe:	1461      	nir
+    2d00:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00002d04 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    2d04:	1460      	nie
+    2d06:	1462      	ipush
+    2d08:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2d0a:	107f      	lrw      	r3, 0x2000003c	// 2d84 <UART1IntHandler+0x80>
+    2d0c:	3102      	movi      	r1, 2
+    2d0e:	9360      	ld.w      	r3, (r3, 0x0)
+    2d10:	9343      	ld.w      	r2, (r3, 0xc)
+    2d12:	6884      	and      	r2, r1
+    2d14:	3a40      	cmpnei      	r2, 0
+    2d16:	0c0b      	bf      	0x2d2c	// 2d2c <UART1IntHandler+0x28>
+	{
+		UART1->ISR=UART_RX_INT_S;
+    2d18:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART1);
+    2d1a:	9300      	ld.w      	r0, (r3, 0x0)
+		UART1_RecvINT_Processing(inchar);
+    2d1c:	7400      	zextb      	r0, r0
+    2d1e:	e000032b 	bsr      	0x3374	// 3374 <UART1_RecvINT_Processing>
+		if(RS485_Comm_Flag == 0x01){
+			RS485_Comm_End ++;
+		}
+		
+	}	
+}
+    2d22:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2d26:	1401      	addi      	r14, r14, 4
+    2d28:	1463      	ipop
+    2d2a:	1461      	nir
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2d2c:	9323      	ld.w      	r1, (r3, 0xc)
+    2d2e:	3201      	movi      	r2, 1
+    2d30:	6848      	and      	r1, r2
+    2d32:	3940      	cmpnei      	r1, 0
+    2d34:	0c0d      	bf      	0x2d4e	// 2d4e <UART1IntHandler+0x4a>
+		UART1->ISR=UART_TX_INT_S;
+    2d36:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    2d38:	1074      	lrw      	r3, 0x200000a8	// 2d88 <UART1IntHandler+0x84>
+    2d3a:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2d3c:	1074      	lrw      	r3, 0x200000ac	// 2d8c <UART1IntHandler+0x88>
+    2d3e:	9360      	ld.w      	r3, (r3, 0x0)
+    2d40:	3b41      	cmpnei      	r3, 1
+    2d42:	0bf0      	bt      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    2d44:	1053      	lrw      	r2, 0x200000b0	// 2d90 <UART1IntHandler+0x8c>
+			RS485_Comm_End ++;
+    2d46:	9260      	ld.w      	r3, (r2, 0x0)
+    2d48:	2300      	addi      	r3, 1
+    2d4a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2d4c:	07eb      	br      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2d4e:	9343      	ld.w      	r2, (r3, 0xc)
+    2d50:	3108      	movi      	r1, 8
+    2d52:	6884      	and      	r2, r1
+    2d54:	3a40      	cmpnei      	r2, 0
+    2d56:	0c03      	bf      	0x2d5c	// 2d5c <UART1IntHandler+0x58>
+		UART1->ISR=UART_TX_IOV_S;
+    2d58:	b323      	st.w      	r1, (r3, 0xc)
+    2d5a:	07e4      	br      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2d5c:	9343      	ld.w      	r2, (r3, 0xc)
+    2d5e:	3104      	movi      	r1, 4
+    2d60:	6884      	and      	r2, r1
+    2d62:	3a40      	cmpnei      	r2, 0
+    2d64:	0bfa      	bt      	0x2d58	// 2d58 <UART1IntHandler+0x54>
+	else if ((UART1->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2d66:	3180      	movi      	r1, 128
+    2d68:	9303      	ld.w      	r0, (r3, 0xc)
+    2d6a:	412c      	lsli      	r1, r1, 12
+    2d6c:	6804      	and      	r0, r1
+    2d6e:	3840      	cmpnei      	r0, 0
+    2d70:	0fd9      	bf      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+		UART1->ISR=UART_TX_DONE_S;
+    2d72:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    2d74:	1065      	lrw      	r3, 0x200000a8	// 2d88 <UART1IntHandler+0x84>
+    2d76:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2d78:	1065      	lrw      	r3, 0x200000ac	// 2d8c <UART1IntHandler+0x88>
+    2d7a:	9360      	ld.w      	r3, (r3, 0x0)
+    2d7c:	3b41      	cmpnei      	r3, 1
+    2d7e:	0bd2      	bt      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+			RS485_Comm_End ++;
+    2d80:	1045      	lrw      	r2, 0x200000b4	// 2d94 <UART1IntHandler+0x90>
+    2d82:	07e2      	br      	0x2d46	// 2d46 <UART1IntHandler+0x42>
+    2d84:	2000003c 	.long	0x2000003c
+    2d88:	200000a8 	.long	0x200000a8
+    2d8c:	200000ac 	.long	0x200000ac
+    2d90:	200000b0 	.long	0x200000b0
+    2d94:	200000b4 	.long	0x200000b4
+
+Disassembly of section .text.UART2IntHandler:
+
+00002d98 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    2d98:	1460      	nie
+    2d9a:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2d9c:	1071      	lrw      	r3, 0x20000038	// 2de0 <UART2IntHandler+0x48>
+    2d9e:	3102      	movi      	r1, 2
+    2da0:	9360      	ld.w      	r3, (r3, 0x0)
+    2da2:	9343      	ld.w      	r2, (r3, 0xc)
+    2da4:	6884      	and      	r2, r1
+    2da6:	3a40      	cmpnei      	r2, 0
+    2da8:	0c04      	bf      	0x2db0	// 2db0 <UART2IntHandler+0x18>
+	{
+		UART2->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART2->ISR=UART_TX_IOV_S;
+    2daa:	b323      	st.w      	r1, (r3, 0xc)
+//			RS485_Comm_End ++;
+//		}
+		
+	}
+	
+}
+    2dac:	1463      	ipop
+    2dae:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2db0:	9343      	ld.w      	r2, (r3, 0xc)
+    2db2:	3101      	movi      	r1, 1
+    2db4:	6884      	and      	r2, r1
+    2db6:	3a40      	cmpnei      	r2, 0
+    2db8:	0bf9      	bt      	0x2daa	// 2daa <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2dba:	9343      	ld.w      	r2, (r3, 0xc)
+    2dbc:	3108      	movi      	r1, 8
+    2dbe:	6884      	and      	r2, r1
+    2dc0:	3a40      	cmpnei      	r2, 0
+    2dc2:	0bf4      	bt      	0x2daa	// 2daa <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2dc4:	9343      	ld.w      	r2, (r3, 0xc)
+    2dc6:	3104      	movi      	r1, 4
+    2dc8:	6884      	and      	r2, r1
+    2dca:	3a40      	cmpnei      	r2, 0
+    2dcc:	0bef      	bt      	0x2daa	// 2daa <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2dce:	3280      	movi      	r2, 128
+    2dd0:	9323      	ld.w      	r1, (r3, 0xc)
+    2dd2:	424c      	lsli      	r2, r2, 12
+    2dd4:	6848      	and      	r1, r2
+    2dd6:	3940      	cmpnei      	r1, 0
+    2dd8:	0fea      	bf      	0x2dac	// 2dac <UART2IntHandler+0x14>
+		UART2->ISR=UART_TX_DONE_S;
+    2dda:	b343      	st.w      	r2, (r3, 0xc)
+}
+    2ddc:	07e8      	br      	0x2dac	// 2dac <UART2IntHandler+0x14>
+    2dde:	0000      	bkpt
+    2de0:	20000038 	.long	0x20000038
+
+Disassembly of section .text.SPI0IntHandler:
+
+00002de4 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    2de4:	1460      	nie
+    2de6:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    2de8:	1178      	lrw      	r3, 0x20000034	// 2ec8 <SPI0IntHandler+0xe4>
+    2dea:	3101      	movi      	r1, 1
+    2dec:	9360      	ld.w      	r3, (r3, 0x0)
+    2dee:	9347      	ld.w      	r2, (r3, 0x1c)
+    2df0:	6884      	and      	r2, r1
+    2df2:	3a40      	cmpnei      	r2, 0
+    2df4:	0c03      	bf      	0x2dfa	// 2dfa <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    2df6:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    2df8:	0407      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    2dfa:	9347      	ld.w      	r2, (r3, 0x1c)
+    2dfc:	3002      	movi      	r0, 2
+    2dfe:	6880      	and      	r2, r0
+    2e00:	3a40      	cmpnei      	r2, 0
+    2e02:	0c04      	bf      	0x2e0a	// 2e0a <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    2e04:	b308      	st.w      	r0, (r3, 0x20)
+}
+    2e06:	1463      	ipop
+    2e08:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    2e0a:	9347      	ld.w      	r2, (r3, 0x1c)
+    2e0c:	3004      	movi      	r0, 4
+    2e0e:	6880      	and      	r2, r0
+    2e10:	3a40      	cmpnei      	r2, 0
+    2e12:	0c55      	bf      	0x2ebc	// 2ebc <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    2e14:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    2e16:	9302      	ld.w      	r0, (r3, 0x8)
+    2e18:	32aa      	movi      	r2, 170
+    2e1a:	6482      	cmpne      	r0, r2
+    2e1c:	083e      	bt      	0x2e98	// 2e98 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e1e:	3102      	movi      	r1, 2
+    2e20:	9343      	ld.w      	r2, (r3, 0xc)
+    2e22:	6884      	and      	r2, r1
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0ffd      	bf      	0x2e20	// 2e20 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    2e28:	3211      	movi      	r2, 17
+    2e2a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e2c:	3110      	movi      	r1, 16
+    2e2e:	9343      	ld.w      	r2, (r3, 0xc)
+    2e30:	6884      	and      	r2, r1
+    2e32:	3a40      	cmpnei      	r2, 0
+    2e34:	0bfd      	bt      	0x2e2e	// 2e2e <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e36:	3102      	movi      	r1, 2
+    2e38:	9343      	ld.w      	r2, (r3, 0xc)
+    2e3a:	6884      	and      	r2, r1
+    2e3c:	3a40      	cmpnei      	r2, 0
+    2e3e:	0ffd      	bf      	0x2e38	// 2e38 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    2e40:	3212      	movi      	r2, 18
+    2e42:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e44:	3110      	movi      	r1, 16
+    2e46:	9343      	ld.w      	r2, (r3, 0xc)
+    2e48:	6884      	and      	r2, r1
+    2e4a:	3a40      	cmpnei      	r2, 0
+    2e4c:	0bfd      	bt      	0x2e46	// 2e46 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e4e:	3102      	movi      	r1, 2
+    2e50:	9343      	ld.w      	r2, (r3, 0xc)
+    2e52:	6884      	and      	r2, r1
+    2e54:	3a40      	cmpnei      	r2, 0
+    2e56:	0ffd      	bf      	0x2e50	// 2e50 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    2e58:	3213      	movi      	r2, 19
+    2e5a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e5c:	3110      	movi      	r1, 16
+    2e5e:	9343      	ld.w      	r2, (r3, 0xc)
+    2e60:	6884      	and      	r2, r1
+    2e62:	3a40      	cmpnei      	r2, 0
+    2e64:	0bfd      	bt      	0x2e5e	// 2e5e <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e66:	3102      	movi      	r1, 2
+    2e68:	9343      	ld.w      	r2, (r3, 0xc)
+    2e6a:	6884      	and      	r2, r1
+    2e6c:	3a40      	cmpnei      	r2, 0
+    2e6e:	0ffd      	bf      	0x2e68	// 2e68 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    2e70:	3214      	movi      	r2, 20
+    2e72:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e74:	3110      	movi      	r1, 16
+    2e76:	9343      	ld.w      	r2, (r3, 0xc)
+    2e78:	6884      	and      	r2, r1
+    2e7a:	3a40      	cmpnei      	r2, 0
+    2e7c:	0bfd      	bt      	0x2e76	// 2e76 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e7e:	3102      	movi      	r1, 2
+    2e80:	9343      	ld.w      	r2, (r3, 0xc)
+    2e82:	6884      	and      	r2, r1
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	0ffd      	bf      	0x2e80	// 2e80 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    2e88:	3215      	movi      	r2, 21
+    2e8a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e8c:	3110      	movi      	r1, 16
+    2e8e:	9343      	ld.w      	r2, (r3, 0xc)
+    2e90:	6884      	and      	r2, r1
+    2e92:	3a40      	cmpnei      	r2, 0
+    2e94:	0bfd      	bt      	0x2e8e	// 2e8e <SPI0IntHandler+0xaa>
+    2e96:	07b8      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    2e98:	9343      	ld.w      	r2, (r3, 0xc)
+    2e9a:	6884      	and      	r2, r1
+    2e9c:	3a40      	cmpnei      	r2, 0
+    2e9e:	0bb4      	bt      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    2ea0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2ea2:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    2ea4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2ea6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2ea8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eaa:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eac:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eae:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eb0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2eb2:	9343      	ld.w      	r2, (r3, 0xc)
+    2eb4:	6884      	and      	r2, r1
+    2eb6:	3a40      	cmpnei      	r2, 0
+    2eb8:	0bfd      	bt      	0x2eb2	// 2eb2 <SPI0IntHandler+0xce>
+    2eba:	07a6      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    2ebc:	9347      	ld.w      	r2, (r3, 0x1c)
+    2ebe:	3108      	movi      	r1, 8
+    2ec0:	6884      	and      	r2, r1
+    2ec2:	3a40      	cmpnei      	r2, 0
+    2ec4:	0b99      	bt      	0x2df6	// 2df6 <SPI0IntHandler+0x12>
+    2ec6:	07a0      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+    2ec8:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+00002ecc <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    2ecc:	1460      	nie
+    2ece:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    2ed0:	1073      	lrw      	r3, 0x2000002c	// 2f1c <SIO0IntHandler+0x50>
+    2ed2:	3104      	movi      	r1, 4
+    2ed4:	9360      	ld.w      	r3, (r3, 0x0)
+    2ed6:	9349      	ld.w      	r2, (r3, 0x24)
+    2ed8:	6884      	and      	r2, r1
+    2eda:	3a40      	cmpnei      	r2, 0
+    2edc:	0c02      	bf      	0x2ee0	// 2ee0 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    2ede:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    2ee0:	9349      	ld.w      	r2, (r3, 0x24)
+    2ee2:	3101      	movi      	r1, 1
+    2ee4:	6884      	and      	r2, r1
+    2ee6:	3a40      	cmpnei      	r2, 0
+    2ee8:	0c02      	bf      	0x2eec	// 2eec <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    2eea:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    2eec:	9349      	ld.w      	r2, (r3, 0x24)
+    2eee:	3102      	movi      	r1, 2
+    2ef0:	6884      	and      	r2, r1
+    2ef2:	3a40      	cmpnei      	r2, 0
+    2ef4:	0c03      	bf      	0x2efa	// 2efa <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    2ef6:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    2ef8:	0410      	br      	0x2f18	// 2f18 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    2efa:	9349      	ld.w      	r2, (r3, 0x24)
+    2efc:	3108      	movi      	r1, 8
+    2efe:	6884      	and      	r2, r1
+    2f00:	3a40      	cmpnei      	r2, 0
+    2f02:	0bfa      	bt      	0x2ef6	// 2ef6 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    2f04:	9349      	ld.w      	r2, (r3, 0x24)
+    2f06:	3110      	movi      	r1, 16
+    2f08:	6884      	and      	r2, r1
+    2f0a:	3a40      	cmpnei      	r2, 0
+    2f0c:	0bf5      	bt      	0x2ef6	// 2ef6 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    2f0e:	9349      	ld.w      	r2, (r3, 0x24)
+    2f10:	3120      	movi      	r1, 32
+    2f12:	6884      	and      	r2, r1
+    2f14:	3a40      	cmpnei      	r2, 0
+    2f16:	0bf0      	bt      	0x2ef6	// 2ef6 <SIO0IntHandler+0x2a>
+}
+    2f18:	1463      	ipop
+    2f1a:	1461      	nir
+    2f1c:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00002f20 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    2f20:	1460      	nie
+    2f22:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    2f24:	106a      	lrw      	r3, 0x2000005c	// 2f4c <EXI0IntHandler+0x2c>
+    2f26:	3101      	movi      	r1, 1
+    2f28:	9360      	ld.w      	r3, (r3, 0x0)
+    2f2a:	237f      	addi      	r3, 128
+    2f2c:	934c      	ld.w      	r2, (r3, 0x30)
+    2f2e:	6884      	and      	r2, r1
+    2f30:	3a40      	cmpnei      	r2, 0
+    2f32:	0c04      	bf      	0x2f3a	// 2f3a <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    2f34:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    2f36:	1463      	ipop
+    2f38:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    2f3a:	3280      	movi      	r2, 128
+    2f3c:	932c      	ld.w      	r1, (r3, 0x30)
+    2f3e:	4249      	lsli      	r2, r2, 9
+    2f40:	6848      	and      	r1, r2
+    2f42:	3940      	cmpnei      	r1, 0
+    2f44:	0ff9      	bf      	0x2f36	// 2f36 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    2f46:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2f48:	07f7      	br      	0x2f36	// 2f36 <EXI0IntHandler+0x16>
+    2f4a:	0000      	bkpt
+    2f4c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00002f50 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    2f50:	1460      	nie
+    2f52:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    2f54:	106a      	lrw      	r3, 0x2000005c	// 2f7c <EXI1IntHandler+0x2c>
+    2f56:	3102      	movi      	r1, 2
+    2f58:	9360      	ld.w      	r3, (r3, 0x0)
+    2f5a:	237f      	addi      	r3, 128
+    2f5c:	934c      	ld.w      	r2, (r3, 0x30)
+    2f5e:	6884      	and      	r2, r1
+    2f60:	3a40      	cmpnei      	r2, 0
+    2f62:	0c04      	bf      	0x2f6a	// 2f6a <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    2f64:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    2f66:	1463      	ipop
+    2f68:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    2f6a:	3280      	movi      	r2, 128
+    2f6c:	932c      	ld.w      	r1, (r3, 0x30)
+    2f6e:	424a      	lsli      	r2, r2, 10
+    2f70:	6848      	and      	r1, r2
+    2f72:	3940      	cmpnei      	r1, 0
+    2f74:	0ff9      	bf      	0x2f66	// 2f66 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    2f76:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2f78:	07f7      	br      	0x2f66	// 2f66 <EXI1IntHandler+0x16>
+    2f7a:	0000      	bkpt
+    2f7c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+00002f80 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    2f80:	1460      	nie
+    2f82:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    2f84:	1070      	lrw      	r3, 0x2000005c	// 2fc4 <EXI2to3IntHandler+0x44>
+    2f86:	3104      	movi      	r1, 4
+    2f88:	9360      	ld.w      	r3, (r3, 0x0)
+    2f8a:	237f      	addi      	r3, 128
+    2f8c:	934c      	ld.w      	r2, (r3, 0x30)
+    2f8e:	6884      	and      	r2, r1
+    2f90:	3a40      	cmpnei      	r2, 0
+    2f92:	0c04      	bf      	0x2f9a	// 2f9a <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    2f94:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    2f96:	1463      	ipop
+    2f98:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    2f9a:	934c      	ld.w      	r2, (r3, 0x30)
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	6884      	and      	r2, r1
+    2fa0:	3a40      	cmpnei      	r2, 0
+    2fa2:	0bf9      	bt      	0x2f94	// 2f94 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    2fa4:	3280      	movi      	r2, 128
+    2fa6:	932c      	ld.w      	r1, (r3, 0x30)
+    2fa8:	424b      	lsli      	r2, r2, 11
+    2faa:	6848      	and      	r1, r2
+    2fac:	3940      	cmpnei      	r1, 0
+    2fae:	0c03      	bf      	0x2fb4	// 2fb4 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    2fb0:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2fb2:	07f2      	br      	0x2f96	// 2f96 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    2fb4:	3280      	movi      	r2, 128
+    2fb6:	932c      	ld.w      	r1, (r3, 0x30)
+    2fb8:	424c      	lsli      	r2, r2, 12
+    2fba:	6848      	and      	r1, r2
+    2fbc:	3940      	cmpnei      	r1, 0
+    2fbe:	0bf9      	bt      	0x2fb0	// 2fb0 <EXI2to3IntHandler+0x30>
+    2fc0:	07eb      	br      	0x2f96	// 2f96 <EXI2to3IntHandler+0x16>
+    2fc2:	0000      	bkpt
+    2fc4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+00002fc8 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    2fc8:	1460      	nie
+    2fca:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    2fcc:	1066      	lrw      	r3, 0x2000005c	// 2fe4 <EXI4to9IntHandler+0x1c>
+    2fce:	3110      	movi      	r1, 16
+    2fd0:	9360      	ld.w      	r3, (r3, 0x0)
+    2fd2:	237f      	addi      	r3, 128
+    2fd4:	934c      	ld.w      	r2, (r3, 0x30)
+    2fd6:	6884      	and      	r2, r1
+    2fd8:	3a40      	cmpnei      	r2, 0
+    2fda:	0c02      	bf      	0x2fde	// 2fde <EXI4to9IntHandler+0x16>
+	{
+		SYSCON->EXICR = EXI_PIN4;
+    2fdc:	b32b      	st.w      	r1, (r3, 0x2c)
+//	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN9;
+//	} 
+
+}
+    2fde:	1463      	ipop
+    2fe0:	1461      	nir
+    2fe2:	0000      	bkpt
+    2fe4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00002fe8 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    2fe8:	1460      	nie
+    2fea:	1462      	ipush
+    2fec:	14d0      	push      	r15
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    2fee:	1079      	lrw      	r3, 0x2000005c	// 3050 <EXI10to15IntHandler+0x68>
+    2ff0:	3280      	movi      	r2, 128
+    2ff2:	9360      	ld.w      	r3, (r3, 0x0)
+    2ff4:	237f      	addi      	r3, 128
+    2ff6:	932c      	ld.w      	r1, (r3, 0x30)
+    2ff8:	4243      	lsli      	r2, r2, 3
+    2ffa:	6848      	and      	r1, r2
+    2ffc:	3940      	cmpnei      	r1, 0
+    2ffe:	0c07      	bf      	0x300c	// 300c <EXI10to15IntHandler+0x24>
+	{
+		SYSCON->EXICR = EXI_PIN13;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN14;
+    3000:	b34b      	st.w      	r2, (r3, 0x2c)
+	{
+		SYSCON->EXICR = EXI_PIN15;
+		
+		BusBusy_Task();
+	}
+}
+    3002:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3006:	1401      	addi      	r14, r14, 4
+    3008:	1463      	ipop
+    300a:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    300c:	3280      	movi      	r2, 128
+    300e:	932c      	ld.w      	r1, (r3, 0x30)
+    3010:	4244      	lsli      	r2, r2, 4
+    3012:	6848      	and      	r1, r2
+    3014:	3940      	cmpnei      	r1, 0
+    3016:	0bf5      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    3018:	3280      	movi      	r2, 128
+    301a:	932c      	ld.w      	r1, (r3, 0x30)
+    301c:	4245      	lsli      	r2, r2, 5
+    301e:	6848      	and      	r1, r2
+    3020:	3940      	cmpnei      	r1, 0
+    3022:	0bef      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    3024:	3280      	movi      	r2, 128
+    3026:	932c      	ld.w      	r1, (r3, 0x30)
+    3028:	4246      	lsli      	r2, r2, 6
+    302a:	6848      	and      	r1, r2
+    302c:	3940      	cmpnei      	r1, 0
+    302e:	0be9      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    3030:	3280      	movi      	r2, 128
+    3032:	932c      	ld.w      	r1, (r3, 0x30)
+    3034:	4247      	lsli      	r2, r2, 7
+    3036:	6848      	and      	r1, r2
+    3038:	3940      	cmpnei      	r1, 0
+    303a:	0be3      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    303c:	3280      	movi      	r2, 128
+    303e:	932c      	ld.w      	r1, (r3, 0x30)
+    3040:	4248      	lsli      	r2, r2, 8
+    3042:	6848      	and      	r1, r2
+    3044:	3940      	cmpnei      	r1, 0
+    3046:	0fde      	bf      	0x3002	// 3002 <EXI10to15IntHandler+0x1a>
+		SYSCON->EXICR = EXI_PIN15;
+    3048:	b34b      	st.w      	r2, (r3, 0x2c)
+		BusBusy_Task();
+    304a:	e00002eb 	bsr      	0x3620	// 3620 <BusBusy_Task>
+}
+    304e:	07da      	br      	0x3002	// 3002 <EXI10to15IntHandler+0x1a>
+    3050:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+00003054 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    3054:	1460      	nie
+    3056:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    3058:	106b      	lrw      	r3, 0x20000014	// 3084 <LPTIntHandler+0x30>
+    305a:	3101      	movi      	r1, 1
+    305c:	9360      	ld.w      	r3, (r3, 0x0)
+    305e:	934e      	ld.w      	r2, (r3, 0x38)
+    3060:	6884      	and      	r2, r1
+    3062:	3a40      	cmpnei      	r2, 0
+    3064:	0c03      	bf      	0x306a	// 306a <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    3066:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    3068:	040b      	br      	0x307e	// 307e <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    306a:	934e      	ld.w      	r2, (r3, 0x38)
+    306c:	3102      	movi      	r1, 2
+    306e:	6884      	and      	r2, r1
+    3070:	3a40      	cmpnei      	r2, 0
+    3072:	0bfa      	bt      	0x3066	// 3066 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    3074:	934e      	ld.w      	r2, (r3, 0x38)
+    3076:	3104      	movi      	r1, 4
+    3078:	6884      	and      	r2, r1
+    307a:	3a40      	cmpnei      	r2, 0
+    307c:	0bf5      	bt      	0x3066	// 3066 <LPTIntHandler+0x12>
+}
+    307e:	1463      	ipop
+    3080:	1461      	nir
+    3082:	0000      	bkpt
+    3084:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+00003088 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    3088:	1460      	nie
+    308a:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    308c:	1071      	lrw      	r3, 0x2000000c	// 30d0 <BT0IntHandler+0x48>
+    308e:	3101      	movi      	r1, 1
+    3090:	9360      	ld.w      	r3, (r3, 0x0)
+    3092:	934c      	ld.w      	r2, (r3, 0x30)
+    3094:	6884      	and      	r2, r1
+    3096:	3a40      	cmpnei      	r2, 0
+    3098:	0c0a      	bf      	0x30ac	// 30ac <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    309a:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    309c:	9341      	ld.w      	r2, (r3, 0x4)
+    309e:	3a86      	bclri      	r2, 6
+    30a0:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    30a2:	9340      	ld.w      	r2, (r3, 0x0)
+    30a4:	3200      	movi      	r2, 0
+    30a6:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    30a8:	1463      	ipop
+    30aa:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    30ac:	934c      	ld.w      	r2, (r3, 0x30)
+    30ae:	3102      	movi      	r1, 2
+    30b0:	6884      	and      	r2, r1
+    30b2:	3a40      	cmpnei      	r2, 0
+    30b4:	0c03      	bf      	0x30ba	// 30ba <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    30b6:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    30b8:	07f8      	br      	0x30a8	// 30a8 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    30ba:	934c      	ld.w      	r2, (r3, 0x30)
+    30bc:	3104      	movi      	r1, 4
+    30be:	6884      	and      	r2, r1
+    30c0:	3a40      	cmpnei      	r2, 0
+    30c2:	0bfa      	bt      	0x30b6	// 30b6 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    30c4:	934c      	ld.w      	r2, (r3, 0x30)
+    30c6:	3108      	movi      	r1, 8
+    30c8:	6884      	and      	r2, r1
+    30ca:	3a40      	cmpnei      	r2, 0
+    30cc:	0bf5      	bt      	0x30b6	// 30b6 <BT0IntHandler+0x2e>
+    30ce:	07ed      	br      	0x30a8	// 30a8 <BT0IntHandler+0x20>
+    30d0:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+000030d4 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    30d4:	1460      	nie
+    30d6:	1462      	ipush
+    30d8:	14d0      	push      	r15
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    30da:	1079      	lrw      	r3, 0x20000008	// 313c <BT1IntHandler+0x68>
+    30dc:	3101      	movi      	r1, 1
+    30de:	9360      	ld.w      	r3, (r3, 0x0)
+    30e0:	934c      	ld.w      	r2, (r3, 0x30)
+    30e2:	6884      	and      	r2, r1
+    30e4:	3a40      	cmpnei      	r2, 0
+    30e6:	0c03      	bf      	0x30ec	// 30ec <BT1IntHandler+0x18>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    30e8:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    30ea:	0418      	br      	0x311a	// 311a <BT1IntHandler+0x46>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    30ec:	934c      	ld.w      	r2, (r3, 0x30)
+    30ee:	3102      	movi      	r1, 2
+    30f0:	6884      	and      	r2, r1
+    30f2:	3a40      	cmpnei      	r2, 0
+    30f4:	0c18      	bf      	0x3124	// 3124 <BT1IntHandler+0x50>
+		BT1->ICR = BT_CMP;
+    30f6:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    30f8:	1072      	lrw      	r3, 0x2000009c	// 3140 <BT1IntHandler+0x6c>
+    30fa:	8340      	ld.b      	r2, (r3, 0x0)
+    30fc:	2200      	addi      	r2, 1
+    30fe:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    3100:	9321      	ld.w      	r1, (r3, 0x4)
+    3102:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    3104:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    3106:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    3108:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    310a:	0c08      	bf      	0x311a	// 311a <BT1IntHandler+0x46>
+			NUM = 0;
+    310c:	3200      	movi      	r2, 0
+    310e:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    3110:	9342      	ld.w      	r2, (r3, 0x8)
+    3112:	2200      	addi      	r2, 1
+    3114:	b342      	st.w      	r2, (r3, 0x8)
+			BusIdle_Task();
+    3116:	e0000267 	bsr      	0x35e4	// 35e4 <BusIdle_Task>
+}
+    311a:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    311e:	1401      	addi      	r14, r14, 4
+    3120:	1463      	ipop
+    3122:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    3124:	934c      	ld.w      	r2, (r3, 0x30)
+    3126:	3104      	movi      	r1, 4
+    3128:	6884      	and      	r2, r1
+    312a:	3a40      	cmpnei      	r2, 0
+    312c:	0bde      	bt      	0x30e8	// 30e8 <BT1IntHandler+0x14>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    312e:	934c      	ld.w      	r2, (r3, 0x30)
+    3130:	3108      	movi      	r1, 8
+    3132:	6884      	and      	r2, r1
+    3134:	3a40      	cmpnei      	r2, 0
+    3136:	0bd9      	bt      	0x30e8	// 30e8 <BT1IntHandler+0x14>
+    3138:	07f1      	br      	0x311a	// 311a <BT1IntHandler+0x46>
+    313a:	0000      	bkpt
+    313c:	20000008 	.long	0x20000008
+    3140:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00003144 <PriviledgeVioHandler>:
+    3144:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00003146 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    3146:	1460      	nie
+    3148:	1462      	ipush
+    // ISR content ...
+
+}
+    314a:	1463      	ipop
+    314c:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+0000314e <Trap3Handler>:
+    314e:	1460      	nie
+    3150:	1462      	ipush
+    3152:	1463      	ipop
+    3154:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+00003156 <Trap2Handler>:
+    3156:	1460      	nie
+    3158:	1462      	ipush
+    315a:	1463      	ipop
+    315c:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+0000315e <Trap1Handler>:
+    315e:	1460      	nie
+    3160:	1462      	ipush
+    3162:	1463      	ipop
+    3164:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+00003166 <Trap0Handler>:
+    3166:	1460      	nie
+    3168:	1462      	ipush
+    316a:	1463      	ipop
+    316c:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+0000316e <UnrecExecpHandler>:
+    316e:	1460      	nie
+    3170:	1462      	ipush
+    3172:	1463      	ipop
+    3174:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+00003176 <BreakPointHandler>:
+    3176:	1460      	nie
+    3178:	1462      	ipush
+    317a:	1463      	ipop
+    317c:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+0000317e <AccessErrHandler>:
+    317e:	1460      	nie
+    3180:	1462      	ipush
+    3182:	1463      	ipop
+    3184:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+00003186 <IllegalInstrHandler>:
+    3186:	1460      	nie
+    3188:	1462      	ipush
+    318a:	1463      	ipop
+    318c:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+0000318e <MisalignedHandler>:
+    318e:	1460      	nie
+    3190:	1462      	ipush
+    3192:	1463      	ipop
+    3194:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+00003196 <CNTAIntHandler>:
+    3196:	1460      	nie
+    3198:	1462      	ipush
+    319a:	1463      	ipop
+    319c:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+0000319e <I2CIntHandler>:
+    319e:	1460      	nie
+    31a0:	1462      	ipush
+    31a2:	1463      	ipop
+    31a4:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000031a8 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    31a8:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    31aa:	c0006023 	mfcr      	r3, cr<0, 0>
+    31ae:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    31b2:	1046      	lrw      	r2, 0x20000000	// 31c8 <__divsi3+0x20>
+    31b4:	3400      	movi      	r4, 0
+    31b6:	9240      	ld.w      	r2, (r2, 0x0)
+    31b8:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    31ba:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    31bc:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    31be:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    31c0:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    31c4:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    31c6:	1481      	pop      	r4
+    31c8:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+000031cc <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    31cc:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    31ce:	c0006023 	mfcr      	r3, cr<0, 0>
+    31d2:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    31d6:	1046      	lrw      	r2, 0x20000000	// 31ec <__udivsi3+0x20>
+    31d8:	3401      	movi      	r4, 1
+    31da:	9240      	ld.w      	r2, (r2, 0x0)
+    31dc:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    31de:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    31e0:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    31e2:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    31e4:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    31e8:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    31ea:	1481      	pop      	r4
+    31ec:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+000031f0 <__umodsi3>:
+					);	
+	return HWD->REMAIN;
+}
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    31f0:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    31f2:	c0006023 	mfcr      	r3, cr<0, 0>
+    31f6:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    31fa:	1046      	lrw      	r2, 0x20000000	// 3210 <__umodsi3+0x20>
+    31fc:	3401      	movi      	r4, 1
+    31fe:	9240      	ld.w      	r2, (r2, 0x0)
+    3200:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    3202:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    3204:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    3206:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    3208:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    320c:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    320e:	1481      	pop      	r4
+    3210:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00003214 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    3214:	c1807420 	psrset      	ee, ie
+}
+    3218:	783c      	jmp      	r15
+
+Disassembly of section .text.CK_CPU_DisAllNormalIrq:
+
+0000321a <CK_CPU_DisAllNormalIrq>:
+
+void CK_CPU_DisAllNormalIrq(void)
+{
+ asm  ("psrclr ie");
+    321a:	c0807020 	psrclr      	ie
+}
+    321e:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00003220 <UARTx_Init>:
+UART_t g_uart;		//空间不足，只能用一个串口
+UART_t g_uart1;		//空间不足，只能用一个串口
+MULIT_t m_send;	
+
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    3220:	14d1      	push      	r4, r15
+	switch((U8_T)uart_id){
+    3222:	7400      	zextb      	r0, r0
+    3224:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    3226:	6d07      	mov      	r4, r1
+	switch((U8_T)uart_id){
+    3228:	0c13      	bf      	0x324e	// 324e <UARTx_Init+0x2e>
+    322a:	3840      	cmpnei      	r0, 0
+    322c:	0c04      	bf      	0x3234	// 3234 <UARTx_Init+0x14>
+    322e:	3842      	cmpnei      	r0, 2
+    3230:	0c7f      	bf      	0x332e	// 332e <UARTx_Init+0x10e>
+//			GPIO_DriveStrength_EN(GPIOB0,3);
+//			GPIO_Write_Low(GPIOB0,3);
+
+			break;
+	}
+}
+    3232:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    3234:	e3fff8f4 	bsr      	0x241c	// 241c <UART0_DeInit>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    3238:	3100      	movi      	r1, 0
+    323a:	3000      	movi      	r0, 0
+    323c:	e3fff930 	bsr      	0x249c	// 249c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART0,5000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    3240:	1263      	lrw      	r3, 0x20000040	// 334c <UARTx_Init+0x12c>
+    3242:	3200      	movi      	r2, 0
+    3244:	9300      	ld.w      	r0, (r3, 0x0)
+    3246:	1223      	lrw      	r1, 0x1388	// 3350 <UARTx_Init+0x130>
+    3248:	e3fff9a0 	bsr      	0x2588	// 2588 <UARTInitRxTxIntEn>
+			break;
+    324c:	07f3      	br      	0x3232	// 3232 <UARTx_Init+0x12>
+			memset(&g_uart1,0,sizeof(UART_t));
+    324e:	32a0      	movi      	r2, 160
+    3250:	3100      	movi      	r1, 0
+    3252:	1201      	lrw      	r0, 0x20000218	// 3354 <UARTx_Init+0x134>
+    3254:	e3fff394 	bsr      	0x197c	// 197c <__memset_fast>
+			memset(&m_send,0,sizeof(MULIT_t));
+    3258:	32a4      	movi      	r2, 164
+    325a:	3100      	movi      	r1, 0
+    325c:	111f      	lrw      	r0, 0x200002b8	// 3358 <UARTx_Init+0x138>
+    325e:	e3fff38f 	bsr      	0x197c	// 197c <__memset_fast>
+			g_uart1.RecvTimeout = Recv_9600_TimeOut;
+    3262:	117f      	lrw      	r3, 0x20000298	// 335c <UARTx_Init+0x13c>
+    3264:	3203      	movi      	r2, 3
+    3266:	b345      	st.w      	r2, (r3, 0x14)
+			g_uart1.processing_cf = prt_cf;
+    3268:	b387      	st.w      	r4, (r3, 0x1c)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    326a:	310f      	movi      	r1, 15
+			m_send.BusState_Tick = SysTick_1ms;
+    326c:	117d      	lrw      	r3, 0x200000a4	// 3360 <UARTx_Init+0x140>
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    326e:	119e      	lrw      	r4, 0x2000004c	// 3364 <UARTx_Init+0x144>
+			m_send.BusState_Tick = SysTick_1ms;
+    3270:	9340      	ld.w      	r2, (r3, 0x0)
+    3272:	117e      	lrw      	r3, 0x20000338	// 3368 <UARTx_Init+0x148>
+    3274:	b346      	st.w      	r2, (r3, 0x18)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    3276:	9400      	ld.w      	r0, (r4, 0x0)
+			m_send.HighBit_Flag = 0x01;			
+    3278:	3201      	movi      	r2, 1
+    327a:	a341      	st.b      	r2, (r3, 0x1)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    327c:	e3fff640 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+			GPIO_IntGroup_Set(PA0,15,Selete_EXI_PIN15); 					//EXI0 set PB0.2
+    3280:	320f      	movi      	r2, 15
+    3282:	310f      	movi      	r1, 15
+    3284:	3000      	movi      	r0, 0
+    3286:	e3fff64d 	bsr      	0x1f20	// 1f20 <GPIO_IntGroup_Set>
+			GPIOA0_EXI_Init(EXI15); 										//PB0.2 as input
+    328a:	300f      	movi      	r0, 15
+    328c:	e3fff6d0 	bsr      	0x202c	// 202c <GPIOA0_EXI_Init>
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIFT); 					//ENABLE falling edge
+    3290:	3180      	movi      	r1, 128
+    3292:	3201      	movi      	r2, 1
+    3294:	4128      	lsli      	r1, r1, 8
+    3296:	3001      	movi      	r0, 1
+    3298:	e3fff548 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIRT);
+    329c:	3180      	movi      	r1, 128
+    329e:	3200      	movi      	r2, 0
+    32a0:	4128      	lsli      	r1, r1, 8
+    32a2:	3001      	movi      	r0, 1
+    32a4:	e3fff542 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+			EXTI_interrupt_CMD(ENABLE,EXI_PIN15); 						//enable EXI
+    32a8:	3180      	movi      	r1, 128
+    32aa:	4128      	lsli      	r1, r1, 8
+    32ac:	3001      	movi      	r0, 1
+    32ae:	e3fff55d 	bsr      	0x1d68	// 1d68 <EXTI_interrupt_CMD>
+			GPIO_EXTI_interrupt(GPIOA0,0b1000000000000000); 			//enable GPIOB02 as EXI
+    32b2:	3180      	movi      	r1, 128
+    32b4:	9400      	ld.w      	r0, (r4, 0x0)
+    32b6:	4128      	lsli      	r1, r1, 8
+    32b8:	e3fff572 	bsr      	0x1d9c	// 1d9c <GPIO_EXTI_interrupt>
+			EXI4_Int_Enable(); 			
+    32bc:	e3fff572 	bsr      	0x1da0	// 1da0 <EXI4_Int_Enable>
+			UART1_DeInit();                                                 //clear all UART Register
+    32c0:	e3fff8ba 	bsr      	0x2434	// 2434 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    32c4:	3102      	movi      	r1, 2
+    32c6:	3001      	movi      	r0, 1
+    32c8:	e3fff8ea 	bsr      	0x249c	// 249c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART1,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    32cc:	1168      	lrw      	r3, 0x2000003c	// 336c <UARTx_Init+0x14c>
+    32ce:	3200      	movi      	r2, 0
+    32d0:	9300      	ld.w      	r0, (r3, 0x0)
+    32d2:	1120      	lrw      	r1, 0x1388	// 3350 <UARTx_Init+0x130>
+    32d4:	e3fff95a 	bsr      	0x2588	// 2588 <UARTInitRxTxIntEn>
+			UART1_Int_Enable();
+    32d8:	e3fff8c6 	bsr      	0x2464	// 2464 <UART1_Int_Enable>
+			GPIO_Init(GPIOA0,LED_TX_PIN,Output);
+    32dc:	9400      	ld.w      	r0, (r4, 0x0)
+    32de:	3200      	movi      	r2, 0
+    32e0:	3100      	movi      	r1, 0
+    32e2:	e3fff59d 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			GPIO_Init(GPIOA0,LED_RX_PIN,Output);			
+    32e6:	9400      	ld.w      	r0, (r4, 0x0)
+    32e8:	3200      	movi      	r2, 0
+    32ea:	3101      	movi      	r1, 1
+    32ec:	e3fff598 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			GPIO_Init(GPIOA0,LED_STATUS_PIN,Output);
+    32f0:	3200      	movi      	r2, 0
+    32f2:	9400      	ld.w      	r0, (r4, 0x0)
+    32f4:	3104      	movi      	r1, 4
+    32f6:	e3fff593 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			TX_LED_OFF;
+    32fa:	9400      	ld.w      	r0, (r4, 0x0)
+    32fc:	3100      	movi      	r1, 0
+    32fe:	e3fff715 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+			RX_LED_OFF;
+    3302:	9400      	ld.w      	r0, (r4, 0x0)
+    3304:	3101      	movi      	r1, 1
+    3306:	e3fff711 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+			STATUS_LED_ON;
+    330a:	9400      	ld.w      	r0, (r4, 0x0)
+    330c:	3104      	movi      	r1, 4
+    330e:	e3fff711 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+			GPIO_Init(GPIOA0,UART485_DR_PIN,Output);
+    3312:	3200      	movi      	r2, 0
+    3314:	9400      	ld.w      	r0, (r4, 0x0)
+    3316:	3107      	movi      	r1, 7
+    3318:	e3fff582 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOA0,UART485_DR_PIN);
+    331c:	9400      	ld.w      	r0, (r4, 0x0)
+    331e:	3107      	movi      	r1, 7
+    3320:	e3fff5f8 	bsr      	0x1f10	// 1f10 <GPIO_DriveStrength_EN>
+			WRITE_LOW_DR;
+    3324:	9400      	ld.w      	r0, (r4, 0x0)
+    3326:	3107      	movi      	r1, 7
+    3328:	e3fff704 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+			break;
+    332c:	0783      	br      	0x3232	// 3232 <UARTx_Init+0x12>
+			UART2_DeInit();                                                 //clear all UART Register
+    332e:	e3fff88f 	bsr      	0x244c	// 244c <UART2_DeInit>
+			UART_IO_Init(IO_UART2,2);                                    	//use PB0.4->RXD1, PB0.5->TXD1
+    3332:	3102      	movi      	r1, 2
+    3334:	3002      	movi      	r0, 2
+    3336:	e3fff8b3 	bsr      	0x249c	// 249c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    333a:	106e      	lrw      	r3, 0x20000038	// 3370 <UARTx_Init+0x150>
+    333c:	3200      	movi      	r2, 0
+    333e:	9300      	ld.w      	r0, (r3, 0x0)
+    3340:	1024      	lrw      	r1, 0x1388	// 3350 <UARTx_Init+0x130>
+    3342:	e3fff923 	bsr      	0x2588	// 2588 <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    3346:	e3fff89d 	bsr      	0x2480	// 2480 <UART2_Int_Enable>
+}
+    334a:	0774      	br      	0x3232	// 3232 <UARTx_Init+0x12>
+    334c:	20000040 	.long	0x20000040
+    3350:	00001388 	.long	0x00001388
+    3354:	20000218 	.long	0x20000218
+    3358:	200002b8 	.long	0x200002b8
+    335c:	20000298 	.long	0x20000298
+    3360:	200000a4 	.long	0x200000a4
+    3364:	2000004c 	.long	0x2000004c
+    3368:	20000338 	.long	0x20000338
+    336c:	2000003c 	.long	0x2000003c
+    3370:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART1_RecvINT_Processing:
+
+00003374 <UART1_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART1_RecvINT_Processing 
+* Description    : 串口1 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART1_RecvINT_Processing(char data){
+    3374:	14d0      	push      	r15
+	if((g_uart1.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart1.RecvLen = 0;
+    3376:	106d      	lrw      	r3, 0x20000298	// 33a8 <UART1_RecvINT_Processing+0x34>
+    3378:	8b28      	ld.h      	r1, (r3, 0x10)
+    337a:	3244      	movi      	r2, 68
+    337c:	6449      	cmplt      	r2, r1
+    337e:	0c03      	bf      	0x3384	// 3384 <UART1_RecvINT_Processing+0x10>
+    3380:	3200      	movi      	r2, 0
+    3382:	ab48      	st.h      	r2, (r3, 0x10)
+	g_uart1.RecvBuffer[g_uart1.RecvLen++] = (U8_T)data;
+    3384:	8b48      	ld.h      	r2, (r3, 0x10)
+    3386:	5a22      	addi      	r1, r2, 1
+    3388:	ab28      	st.h      	r1, (r3, 0x10)
+    338a:	1029      	lrw      	r1, 0x20000218	// 33ac <UART1_RecvINT_Processing+0x38>
+    338c:	6084      	addu      	r2, r1
+    338e:	a200      	st.b      	r0, (r2, 0x0)
+	
+	g_uart1.RecvIdleTiming = SysTick_1ms;
+	g_uart1.Receiving = 0x01;
+	
+	RX_LED_ON;
+    3390:	3101      	movi      	r1, 1
+	g_uart1.RecvIdleTiming = SysTick_1ms;
+    3392:	1048      	lrw      	r2, 0x200000a4	// 33b0 <UART1_RecvINT_Processing+0x3c>
+    3394:	9240      	ld.w      	r2, (r2, 0x0)
+    3396:	b346      	st.w      	r2, (r3, 0x18)
+	g_uart1.Receiving = 0x01;
+    3398:	3201      	movi      	r2, 1
+    339a:	a34c      	st.b      	r2, (r3, 0xc)
+	RX_LED_ON;
+    339c:	1066      	lrw      	r3, 0x2000004c	// 33b4 <UART1_RecvINT_Processing+0x40>
+    339e:	9300      	ld.w      	r0, (r3, 0x0)
+    33a0:	e3fff6c8 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+}
+    33a4:	1490      	pop      	r15
+    33a6:	0000      	bkpt
+    33a8:	20000298 	.long	0x20000298
+    33ac:	20000218 	.long	0x20000218
+    33b0:	200000a4 	.long	0x200000a4
+    33b4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.UART1_TASK:
+
+000033b8 <UART1_TASK>:
+
+void UART1_TASK(void){
+    33b8:	14d2      	push      	r4-r5, r15
+	U8_T rev = 0xFF;	
+	if(g_uart1.Receiving == 0x01){
+    33ba:	1097      	lrw      	r4, 0x20000298	// 3414 <UART1_TASK+0x5c>
+    33bc:	846c      	ld.b      	r3, (r4, 0xc)
+    33be:	3b41      	cmpnei      	r3, 1
+    33c0:	0828      	bt      	0x3410	// 3410 <UART1_TASK+0x58>
+		if(SysTick_1ms - g_uart1.RecvIdleTiming > g_uart1.RecvTimeout){
+    33c2:	10b6      	lrw      	r5, 0x200000a4	// 3418 <UART1_TASK+0x60>
+    33c4:	9560      	ld.w      	r3, (r5, 0x0)
+    33c6:	9446      	ld.w      	r2, (r4, 0x18)
+    33c8:	60ca      	subu      	r3, r2
+    33ca:	9445      	ld.w      	r2, (r4, 0x14)
+    33cc:	64c8      	cmphs      	r2, r3
+    33ce:	0821      	bt      	0x3410	// 3410 <UART1_TASK+0x58>
+			
+			SYSCON_Int_Disable();					//2025-03-19,复制接收缓冲到数据处理缓冲内
+    33d0:	e3fff4f6 	bsr      	0x1dbc	// 1dbc <SYSCON_Int_Disable>
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+    33d4:	9560      	ld.w      	r3, (r5, 0x0)
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+    33d6:	8c48      	ld.h      	r2, (r4, 0x10)
+    33d8:	1031      	lrw      	r1, 0x20000218	// 341c <UART1_TASK+0x64>
+    33da:	1012      	lrw      	r0, 0x2000025e	// 3420 <UART1_TASK+0x68>
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+    33dc:	b466      	st.w      	r3, (r4, 0x18)
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+    33de:	e3fff313 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+			g_uart1.DealLen = g_uart1.RecvLen;
+    33e2:	8c68      	ld.h      	r3, (r4, 0x10)
+    33e4:	ac67      	st.h      	r3, (r4, 0xe)
+			g_uart1.RecvLen = 0;
+    33e6:	3300      	movi      	r3, 0
+    33e8:	ac68      	st.h      	r3, (r4, 0x10)
+			g_uart1.Receiving = 0;
+    33ea:	a46c      	st.b      	r3, (r4, 0xc)
+			SYSCON_Int_Enable();
+    33ec:	e3fff4e2 	bsr      	0x1db0	// 1db0 <SYSCON_Int_Enable>
+
+#if DBG_LOG_EN
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART1 recv Len %d", g_uart1.DealLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART1 buff",g_uart1.DealBuffer,g_uart1.DealLen);
+#endif
+			if(g_uart1.processing_cf != NULL){
+    33f0:	9467      	ld.w      	r3, (r4, 0x1c)
+    33f2:	3b40      	cmpnei      	r3, 0
+    33f4:	0c04      	bf      	0x33fc	// 33fc <UART1_TASK+0x44>
+                rev = g_uart1.processing_cf(g_uart1.DealBuffer,g_uart1.DealLen);
+    33f6:	8c27      	ld.h      	r1, (r4, 0xe)
+    33f8:	100a      	lrw      	r0, 0x2000025e	// 3420 <UART1_TASK+0x68>
+    33fa:	7bcd      	jsr      	r3
+//			/*Boot处理函数 */
+//			if(rev != 0x00)
+//			{
+//				Boot_Comm_UpgradeProcess(g_uart1.DealBuffer,g_uart1.DealLen);
+//			}
+			RX_LED_OFF;
+    33fc:	106a      	lrw      	r3, 0x2000004c	// 3424 <UART1_TASK+0x6c>
+    33fe:	3101      	movi      	r1, 1
+    3400:	9300      	ld.w      	r0, (r3, 0x0)
+    3402:	e3fff693 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+			memset(g_uart1.DealBuffer,0,USART_BUFFER_SIZE);	
+    3406:	3246      	movi      	r2, 70
+    3408:	3100      	movi      	r1, 0
+    340a:	1006      	lrw      	r0, 0x2000025e	// 3420 <UART1_TASK+0x68>
+    340c:	e3fff2b8 	bsr      	0x197c	// 197c <__memset_fast>
+		}
+	}
+}
+    3410:	1492      	pop      	r4-r5, r15
+    3412:	0000      	bkpt
+    3414:	20000298 	.long	0x20000298
+    3418:	200000a4 	.long	0x200000a4
+    341c:	20000218 	.long	0x20000218
+    3420:	2000025e 	.long	0x2000025e
+    3424:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.BUS485_Send:
+
+00003428 <BUS485_Send>:
+ * 			buff:发送数据
+ * 			len：数据长度
+ * @retval 	
+ * */
+U8_T BUS485_Send(U8_T *buff,U16_T len)
+{
+    3428:	14d4      	push      	r4-r7, r15
+    342a:	1423      	subi      	r14, r14, 12
+    342c:	b802      	st.w      	r0, (r14, 0x8)
+    342e:	b821      	st.w      	r1, (r14, 0x4)
+	unsigned int Dataval = 0,delay_cnt = 0;
+    3430:	3600      	movi      	r6, 0
+
+	//等待通讯发送完成
+	while(RS485_Comming == 0x01){
+    3432:	118d      	lrw      	r4, 0x200000a8	// 34e4 <BUS485_Send+0xbc>
+		delay_cnt ++;
+		if(delay_cnt >= 100){
+			break;
+		}
+		
+		REVERISE_DR;	//485_DR
+    3434:	11ad      	lrw      	r5, 0x2000004c	// 34e8 <BUS485_Send+0xc0>
+	while(RS485_Comming == 0x01){
+    3436:	9460      	ld.w      	r3, (r4, 0x0)
+    3438:	3b41      	cmpnei      	r3, 1
+    343a:	0c47      	bf      	0x34c8	// 34c8 <BUS485_Send+0xa0>
+	}
+
+	if(m_send.BusState_Flag == UART_BUSIDLE){	//总线空闲
+    343c:	116c      	lrw      	r3, 0x20000338	// 34ec <BUS485_Send+0xc4>
+    343e:	83e0      	ld.b      	r7, (r3, 0x0)
+    3440:	3f40      	cmpnei      	r7, 0
+    3442:	b860      	st.w      	r3, (r14, 0x0)
+    3444:	084e      	bt      	0x34e0	// 34e0 <BUS485_Send+0xb8>
+		
+		TX_LED_ON;
+    3446:	11a9      	lrw      	r5, 0x2000004c	// 34e8 <BUS485_Send+0xc0>
+    3448:	3100      	movi      	r1, 0
+    344a:	9500      	ld.w      	r0, (r5, 0x0)
+    344c:	e3fff672 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+		CK_CPU_DisAllNormalIrq();	
+    3450:	e3fffee5 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+		
+		WRITE_HIGH_DR;	//485_DR
+    3454:	3107      	movi      	r1, 7
+    3456:	9500      	ld.w      	r0, (r5, 0x0)
+    3458:	e3fff668 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+		
+		RS485_Comm_Flag = 0x01;
+    345c:	3301      	movi      	r3, 1
+    345e:	b461      	st.w      	r3, (r4, 0x4)
+		RS485_Comm_Start = 0x00;
+		RS485_Comm_End = 0x00;		
+		
+		m_send.BusState_Flag = UART_BUSBUSY;//发送前总线置位繁忙
+    3460:	3201      	movi      	r2, 1
+    3462:	9860      	ld.w      	r3, (r14, 0x0)
+    3464:	a340      	st.b      	r2, (r3, 0x0)
+		m_send.BUSBUSY_LOCK = 0x01;			//锁定总线状态
+    3466:	a342      	st.b      	r2, (r3, 0x2)
+		RS485_Comm_Start = 0x00;
+    3468:	b4e2      	st.w      	r7, (r4, 0x8)
+		RS485_Comm_End = 0x00;		
+    346a:	b4e3      	st.w      	r7, (r4, 0xc)
+
+		CK_CPU_EnAllNormalIrq();		
+    346c:	e3fffed4 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+		
+		UARTTransmit(UART1,buff,len);
+    3470:	1160      	lrw      	r3, 0x2000003c	// 34f0 <BUS485_Send+0xc8>
+    3472:	9300      	ld.w      	r0, (r3, 0x0)
+    3474:	9841      	ld.w      	r2, (r14, 0x4)
+    3476:	9822      	ld.w      	r1, (r14, 0x8)
+    3478:	e3fff890 	bsr      	0x2598	// 2598 <UARTTransmit>
+		do{
+			delay_nus(100);
+    347c:	3064      	movi      	r0, 100
+    347e:	e3fff943 	bsr      	0x2704	// 2704 <delay_nus>
+			delay_cnt ++;
+    3482:	2600      	addi      	r6, 1
+			if(delay_cnt >= 100){
+    3484:	3363      	movi      	r3, 99
+    3486:	658c      	cmphs      	r3, r6
+    3488:	0c08      	bf      	0x3498	// 3498 <BUS485_Send+0x70>
+				break;
+			}
+			
+		}while((RS485_Comm_Start < len) || (RS485_Comm_End < len));    //发送完成
+    348a:	9462      	ld.w      	r3, (r4, 0x8)
+    348c:	9841      	ld.w      	r2, (r14, 0x4)
+    348e:	648d      	cmplt      	r3, r2
+    3490:	0bf6      	bt      	0x347c	// 347c <BUS485_Send+0x54>
+    3492:	9463      	ld.w      	r3, (r4, 0xc)
+    3494:	648d      	cmplt      	r3, r2
+    3496:	0bf3      	bt      	0x347c	// 347c <BUS485_Send+0x54>
+
+		CK_CPU_DisAllNormalIrq();	
+    3498:	e3fffec1 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+
+		WRITE_LOW_DR;	//485_DR
+    349c:	3107      	movi      	r1, 7
+    349e:	9500      	ld.w      	r0, (r5, 0x0)
+    34a0:	e3fff648 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+		
+		RS485_Comm_Flag = 0x00;			
+    34a4:	3300      	movi      	r3, 0
+    34a6:	b461      	st.w      	r3, (r4, 0x4)
+		
+		m_send.BusState_Tick = SysTick_1ms;
+    34a8:	9840      	ld.w      	r2, (r14, 0x0)
+    34aa:	1073      	lrw      	r3, 0x200000a4	// 34f4 <BUS485_Send+0xcc>
+    34ac:	9360      	ld.w      	r3, (r3, 0x0)
+    34ae:	b266      	st.w      	r3, (r2, 0x18)
+		m_send.BUSBUSY_LOCK = 0x00;			//解锁总线状态
+    34b0:	6ccb      	mov      	r3, r2
+    34b2:	3200      	movi      	r2, 0
+    34b4:	a342      	st.b      	r2, (r3, 0x2)
+		
+		CK_CPU_EnAllNormalIrq();			
+    34b6:	e3fffeaf 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+		
+		TX_LED_OFF;
+    34ba:	9500      	ld.w      	r0, (r5, 0x0)
+    34bc:	3100      	movi      	r1, 0
+    34be:	e3fff635 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+	{ 		
+		return UART_BUSBUSY;	//发送失败
+	}	
+	
+	return 0x02;		//传入状态无效
+}
+    34c2:	6c1f      	mov      	r0, r7
+    34c4:	1403      	addi      	r14, r14, 12
+    34c6:	1494      	pop      	r4-r7, r15
+		delay_nus(100);
+    34c8:	3064      	movi      	r0, 100
+    34ca:	e3fff91d 	bsr      	0x2704	// 2704 <delay_nus>
+		delay_cnt ++;
+    34ce:	2600      	addi      	r6, 1
+		if(delay_cnt >= 100){
+    34d0:	3364      	movi      	r3, 100
+    34d2:	64da      	cmpne      	r6, r3
+    34d4:	0fb4      	bf      	0x343c	// 343c <BUS485_Send+0x14>
+		REVERISE_DR;	//485_DR
+    34d6:	3107      	movi      	r1, 7
+    34d8:	9500      	ld.w      	r0, (r5, 0x0)
+    34da:	e3fff62f 	bsr      	0x2138	// 2138 <GPIO_Reverse>
+    34de:	07ac      	br      	0x3436	// 3436 <BUS485_Send+0xe>
+		return UART_BUSBUSY;	//发送失败
+    34e0:	3701      	movi      	r7, 1
+    34e2:	07f0      	br      	0x34c2	// 34c2 <BUS485_Send+0x9a>
+    34e4:	200000a8 	.long	0x200000a8
+    34e8:	2000004c 	.long	0x2000004c
+    34ec:	20000338 	.long	0x20000338
+    34f0:	2000003c 	.long	0x2000003c
+    34f4:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.MultSend_Task:
+
+000034f8 <MultSend_Task>:
+ * 			DatSd：发送标记,0x00:无发送，0x01：有数据发送
+ * 
+ * @retval 	0x00:发送成功	0x01:等待发送	0x02:数据无效
+ * */
+U8_T MultSend_Task(U8_T *buff,U16_T len,U8_T DatSd)
+{
+    34f8:	14d3      	push      	r4-r6, r15
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+    34fa:	5963      	subi      	r3, r1, 1
+    34fc:	74cd      	zexth      	r3, r3
+    34fe:	347f      	movi      	r4, 127
+    3500:	64d0      	cmphs      	r4, r3
+    3502:	0c23      	bf      	0x3548	// 3548 <MultSend_Task+0x50>
+	
+	if(DatSd == 0x01)	
+    3504:	3a41      	cmpnei      	r2, 1
+    3506:	0c03      	bf      	0x350c	// 350c <MultSend_Task+0x14>
+		}else{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"retry end,%d",m_send.ResendCnt );
+			return RETRY_END;//没有重发次数
+		}
+	}
+	return BUSSEND_WAIT;//等待
+    3508:	3001      	movi      	r0, 1
+}
+    350a:	1493      	pop      	r4-r6, r15
+		if( m_send.ResendCnt < m_send.TotalCnt)	//判断数据是否还在有效期，是否还有发送次数
+    350c:	1092      	lrw      	r4, 0x20000338	// 3554 <MultSend_Task+0x5c>
+    350e:	8444      	ld.b      	r2, (r4, 0x4)
+    3510:	8466      	ld.b      	r3, (r4, 0x6)
+    3512:	64c8      	cmphs      	r2, r3
+    3514:	081c      	bt      	0x354c	// 354c <MultSend_Task+0x54>
+			if(SysTick_1ms - m_send.BusbusyTimeout < m_send.DataValid_Time)
+    3516:	10b1      	lrw      	r5, 0x200000a4	// 3558 <MultSend_Task+0x60>
+    3518:	9560      	ld.w      	r3, (r5, 0x0)
+    351a:	94c8      	ld.w      	r6, (r4, 0x20)
+    351c:	60da      	subu      	r3, r6
+    351e:	94c5      	ld.w      	r6, (r4, 0x14)
+    3520:	658c      	cmphs      	r3, r6
+    3522:	0817      	bt      	0x3550	// 3550 <MultSend_Task+0x58>
+				if((m_send.ResendCnt == 0x00)||(SysTick_1ms - m_send.ASend_Tick >= m_send.DataWait_Time)){//数据发送间隔
+    3524:	3a40      	cmpnei      	r2, 0
+    3526:	0c07      	bf      	0x3534	// 3534 <MultSend_Task+0x3c>
+    3528:	9447      	ld.w      	r2, (r4, 0x1c)
+    352a:	9560      	ld.w      	r3, (r5, 0x0)
+    352c:	60ca      	subu      	r3, r2
+    352e:	9444      	ld.w      	r2, (r4, 0x10)
+    3530:	648c      	cmphs      	r3, r2
+    3532:	0feb      	bf      	0x3508	// 3508 <MultSend_Task+0x10>
+					if(BUS485_Send(buff,len) == UART_BUSIDLE){	//发送数据
+    3534:	e3ffff7a 	bsr      	0x3428	// 3428 <BUS485_Send>
+    3538:	3840      	cmpnei      	r0, 0
+    353a:	0be7      	bt      	0x3508	// 3508 <MultSend_Task+0x10>
+						m_send.ASend_Tick = SysTick_1ms;
+    353c:	9560      	ld.w      	r3, (r5, 0x0)
+    353e:	b467      	st.w      	r3, (r4, 0x1c)
+						m_send.ResendCnt++;
+    3540:	8464      	ld.b      	r3, (r4, 0x4)
+    3542:	2300      	addi      	r3, 1
+    3544:	a464      	st.b      	r3, (r4, 0x4)
+    3546:	07e2      	br      	0x350a	// 350a <MultSend_Task+0x12>
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+    3548:	3004      	movi      	r0, 4
+    354a:	07e0      	br      	0x350a	// 350a <MultSend_Task+0x12>
+			return RETRY_END;//没有重发次数
+    354c:	3003      	movi      	r0, 3
+    354e:	07de      	br      	0x350a	// 350a <MultSend_Task+0x12>
+				return DATA_END;//数据有效期结束
+    3550:	3002      	movi      	r0, 2
+    3552:	07dc      	br      	0x350a	// 350a <MultSend_Task+0x12>
+    3554:	20000338 	.long	0x20000338
+    3558:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.Set_GroupSend:
+
+0000355c <Set_GroupSend>:
+ * 			indate ：	设置数据有效期
+ * 			tim_val :	发送时间间隔
+ * @retval 	None
+ * */
+void Set_GroupSend(U8_T *data,U16_T sled,U8_T SCnt,U32_T indate,U32_T tim_val)
+{
+    355c:	14d4      	push      	r4-r7, r15
+    355e:	1421      	subi      	r14, r14, 4
+    3560:	6dcf      	mov      	r7, r3
+    3562:	9866      	ld.w      	r3, (r14, 0x18)
+    3564:	b860      	st.w      	r3, (r14, 0x0)
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    3566:	5963      	subi      	r3, r1, 1
+{
+    3568:	6d4b      	mov      	r5, r2
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    356a:	74cd      	zexth      	r3, r3
+    356c:	327f      	movi      	r2, 127
+    356e:	64c8      	cmphs      	r2, r3
+{
+    3570:	6d83      	mov      	r6, r0
+    3572:	6d07      	mov      	r4, r1
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    3574:	0c19      	bf      	0x35a6	// 35a6 <Set_GroupSend+0x4a>
+	
+	memset(m_send.SendBuffer,0, USART_SEND_SIZE);
+    3576:	3280      	movi      	r2, 128
+    3578:	3100      	movi      	r1, 0
+    357a:	100d      	lrw      	r0, 0x200002b8	// 35ac <Set_GroupSend+0x50>
+    357c:	e3fff200 	bsr      	0x197c	// 197c <__memset_fast>
+	memcpy(m_send.SendBuffer,data,sled);
+    3580:	6c93      	mov      	r2, r4
+    3582:	6c5b      	mov      	r1, r6
+    3584:	100a      	lrw      	r0, 0x200002b8	// 35ac <Set_GroupSend+0x50>
+    3586:	e3fff23f 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+	m_send.SendLen = sled;
+    358a:	106a      	lrw      	r3, 0x20000338	// 35b0 <Set_GroupSend+0x54>
+	
+	m_send.DataValid_Time = indate;//数据有效期
+	m_send.TotalCnt = SCnt;			//数据发送次数
+	m_send.DataWait_Time = tim_val;//发送数据间隔
+    358c:	9840      	ld.w      	r2, (r14, 0x0)
+    358e:	b344      	st.w      	r2, (r3, 0x10)
+	
+	m_send.ASend_Flag = 0x01;
+    3590:	3201      	movi      	r2, 1
+    3592:	a345      	st.b      	r2, (r3, 0x5)
+	m_send.SendState = BUSSEND_WAIT;
+    3594:	a343      	st.b      	r2, (r3, 0x3)
+	m_send.ResendCnt = 0x00;
+    3596:	3200      	movi      	r2, 0
+    3598:	a344      	st.b      	r2, (r3, 0x4)
+	m_send.SendLen = sled;
+    359a:	ab85      	st.h      	r4, (r3, 0xa)
+	m_send.DataValid_Time = indate;//数据有效期
+    359c:	b3e5      	st.w      	r7, (r3, 0x14)
+	m_send.TotalCnt = SCnt;			//数据发送次数
+    359e:	a3a6      	st.b      	r5, (r3, 0x6)
+	m_send.BusbusyTimeout = SysTick_1ms;
+    35a0:	1045      	lrw      	r2, 0x200000a4	// 35b4 <Set_GroupSend+0x58>
+    35a2:	9240      	ld.w      	r2, (r2, 0x0)
+    35a4:	b348      	st.w      	r2, (r3, 0x20)
+}
+    35a6:	1401      	addi      	r14, r14, 4
+    35a8:	1494      	pop      	r4-r7, r15
+    35aa:	0000      	bkpt
+    35ac:	200002b8 	.long	0x200002b8
+    35b0:	20000338 	.long	0x20000338
+    35b4:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.BUS485Send_Task:
+
+000035b8 <BUS485Send_Task>:
+	m_send.Jump_Flag = jump;
+}
+
+//485发送任务
+void BUS485Send_Task(void)	//2025-03-29
+{	
+    35b8:	14d1      	push      	r4, r15
+	//空闲等待
+	if(m_send.ASend_Flag == 0x01)
+    35ba:	1089      	lrw      	r4, 0x20000338	// 35dc <BUS485Send_Task+0x24>
+    35bc:	8465      	ld.b      	r3, (r4, 0x5)
+    35be:	3b41      	cmpnei      	r3, 1
+    35c0:	080d      	bt      	0x35da	// 35da <BUS485Send_Task+0x22>
+	{
+		m_send.SendState = MultSend_Task(m_send.SendBuffer,m_send.SendLen,m_send.ASend_Flag);
+    35c2:	8c25      	ld.h      	r1, (r4, 0xa)
+    35c4:	3201      	movi      	r2, 1
+    35c6:	1007      	lrw      	r0, 0x200002b8	// 35e0 <BUS485Send_Task+0x28>
+    35c8:	e3ffff98 	bsr      	0x34f8	// 34f8 <MultSend_Task>
+    35cc:	a403      	st.b      	r0, (r4, 0x3)
+		
+		if( (m_send.SendState == DATA_END)||(m_send.SendState == RETRY_END) )//判断发送数据是否有效
+    35ce:	2801      	subi      	r0, 2
+    35d0:	7400      	zextb      	r0, r0
+    35d2:	3801      	cmphsi      	r0, 2
+    35d4:	0803      	bt      	0x35da	// 35da <BUS485Send_Task+0x22>
+		{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"send end");
+			
+			m_send.ASend_Flag = 0x00;		//清除发送标志位
+    35d6:	3300      	movi      	r3, 0
+    35d8:	a465      	st.b      	r3, (r4, 0x5)
+
+		}
+	}
+}
+    35da:	1491      	pop      	r4, r15
+    35dc:	20000338 	.long	0x20000338
+    35e0:	200002b8 	.long	0x200002b8
+
+Disassembly of section .text.BusIdle_Task:
+
+000035e4 <BusIdle_Task>:
+/**********************************************************
+ * @brief	2025-03-25，检测总线空闲，在定时器中断里调用
+ * @retval 	None
+ * */
+void BusIdle_Task(void)
+{
+    35e4:	14d1      	push      	r4, r15
+	if((m_send.BusState_Flag != UART_BUSIDLE)&&(m_send.BUSBUSY_LOCK != 0x01))
+    35e6:	108d      	lrw      	r4, 0x20000338	// 3618 <BusIdle_Task+0x34>
+    35e8:	8460      	ld.b      	r3, (r4, 0x0)
+    35ea:	3b40      	cmpnei      	r3, 0
+    35ec:	0c15      	bf      	0x3616	// 3616 <BusIdle_Task+0x32>
+    35ee:	8462      	ld.b      	r3, (r4, 0x2)
+    35f0:	3b41      	cmpnei      	r3, 1
+    35f2:	0c12      	bf      	0x3616	// 3616 <BusIdle_Task+0x32>
+	{
+		CK_CPU_DisAllNormalIrq();
+    35f4:	e3fffe13 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+		if( (m_send.HighBit_Flag == 0x01)&&(SysTick_1ms - m_send.BusState_Tick >= (6 + m_send.Bus_DelayTime)) )
+    35f8:	8461      	ld.b      	r3, (r4, 0x1)
+    35fa:	3b41      	cmpnei      	r3, 1
+    35fc:	080b      	bt      	0x3612	// 3612 <BusIdle_Task+0x2e>
+    35fe:	1068      	lrw      	r3, 0x200000a4	// 361c <BusIdle_Task+0x38>
+    3600:	9340      	ld.w      	r2, (r3, 0x0)
+    3602:	9466      	ld.w      	r3, (r4, 0x18)
+    3604:	608e      	subu      	r2, r3
+    3606:	9463      	ld.w      	r3, (r4, 0xc)
+    3608:	2305      	addi      	r3, 6
+    360a:	64c8      	cmphs      	r2, r3
+    360c:	0c03      	bf      	0x3612	// 3612 <BusIdle_Task+0x2e>
+		{
+			m_send.BusState_Flag = UART_BUSIDLE;
+    360e:	3300      	movi      	r3, 0
+    3610:	a460      	st.b      	r3, (r4, 0x0)
+		}	
+		CK_CPU_EnAllNormalIrq();
+    3612:	e3fffe01 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+	}
+}
+    3616:	1491      	pop      	r4, r15
+    3618:	20000338 	.long	0x20000338
+    361c:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.BusBusy_Task:
+
+00003620 <BusBusy_Task>:
+/*******************************************************************
+ * @brief	检测总线繁忙，在串口接收RX引脚的外部中断服务函数里调用
+ * @retval 	None
+ * */
+void BusBusy_Task(void)
+{
+    3620:	14d2      	push      	r4-r5, r15
+	CK_CPU_DisAllNormalIrq();
+    3622:	e3fffdfc 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+	m_send.BusState_Flag = UART_BUSBUSY;
+    3626:	1091      	lrw      	r4, 0x20000338	// 3668 <BusBusy_Task+0x48>
+    3628:	3301      	movi      	r3, 1
+    362a:	a460      	st.b      	r3, (r4, 0x0)
+	m_send.BusState_Tick = SysTick_1ms;
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    362c:	310a      	movi      	r1, 10
+	m_send.BusState_Tick = SysTick_1ms;
+    362e:	1070      	lrw      	r3, 0x200000a4	// 366c <BusBusy_Task+0x4c>
+
+	if(READ_RX_LEVEL_STATE == 0x01){
+    3630:	10b0      	lrw      	r5, 0x2000004c	// 3670 <BusBusy_Task+0x50>
+	m_send.BusState_Tick = SysTick_1ms;
+    3632:	9340      	ld.w      	r2, (r3, 0x0)
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    3634:	9300      	ld.w      	r0, (r3, 0x0)
+    3636:	9467      	ld.w      	r3, (r4, 0x1c)
+	m_send.BusState_Tick = SysTick_1ms;
+    3638:	b446      	st.w      	r2, (r4, 0x18)
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    363a:	600e      	subu      	r0, r3
+    363c:	e3fffdda 	bsr      	0x31f0	// 31f0 <__umodsi3>
+    3640:	b403      	st.w      	r0, (r4, 0xc)
+	if(READ_RX_LEVEL_STATE == 0x01){
+    3642:	310f      	movi      	r1, 15
+    3644:	9500      	ld.w      	r0, (r5, 0x0)
+    3646:	e3fff584 	bsr      	0x214e	// 214e <GPIO_Read_Status>
+    364a:	3841      	cmpnei      	r0, 1
+    364c:	0806      	bt      	0x3658	// 3658 <BusBusy_Task+0x38>
+		m_send.HighBit_Flag = 0x01;			//高电平标志置位
+    364e:	3301      	movi      	r3, 1
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+		m_send.HighBit_Flag = 0x00;			//低电平
+    3650:	a461      	st.b      	r3, (r4, 0x1)
+	}	
+	CK_CPU_EnAllNormalIrq();
+    3652:	e3fffde1 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+}
+    3656:	1492      	pop      	r4-r5, r15
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+    3658:	9500      	ld.w      	r0, (r5, 0x0)
+    365a:	310f      	movi      	r1, 15
+    365c:	e3fff579 	bsr      	0x214e	// 214e <GPIO_Read_Status>
+    3660:	3840      	cmpnei      	r0, 0
+    3662:	0bf8      	bt      	0x3652	// 3652 <BusBusy_Task+0x32>
+		m_send.HighBit_Flag = 0x00;			//低电平
+    3664:	3300      	movi      	r3, 0
+    3666:	07f5      	br      	0x3650	// 3650 <BusBusy_Task+0x30>
+    3668:	20000338 	.long	0x20000338
+    366c:	200000a4 	.long	0x200000a4
+    3670:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.Dbg_Println:
+
+00003674 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    3674:	1423      	subi      	r14, r14, 12
+    3676:	b862      	st.w      	r3, (r14, 0x8)
+    3678:	b841      	st.w      	r2, (r14, 0x4)
+    367a:	b820      	st.w      	r1, (r14, 0x0)
+		
+		
+    }
+
+#endif	
+}
+    367c:	1403      	addi      	r14, r14, 12
+    367e:	783c      	jmp      	r15
+
+Disassembly of section .text.DIP_GetSwitchState:
+
+00003680 <DIP_GetSwitchState>:
+
+	/*进入设置界面 - 先决条件*/
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.DIP_val);
+}
+
+U8_T DIP_GetSwitchState(U8_T i){
+    3680:	14d0      	push      	r15
+	U8_T val = 0;
+	
+	switch (i)
+    3682:	3841      	cmpnei      	r0, 1
+    3684:	0c0d      	bf      	0x369e	// 369e <DIP_GetSwitchState+0x1e>
+    3686:	3840      	cmpnei      	r0, 0
+    3688:	0c05      	bf      	0x3692	// 3692 <DIP_GetSwitchState+0x12>
+    368a:	3842      	cmpnei      	r0, 2
+    368c:	0c0d      	bf      	0x36a6	// 36a6 <DIP_GetSwitchState+0x26>
+	U8_T val = 0;
+    368e:	3000      	movi      	r0, 0
+    3690:	0406      	br      	0x369c	// 369c <DIP_GetSwitchState+0x1c>
+    {
+		case DIP_CH1:
+			val = GPIO_Read_Status(GPIOA0,10);
+    3692:	1068      	lrw      	r3, 0x2000004c	// 36b0 <DIP_GetSwitchState+0x30>
+    3694:	310a      	movi      	r1, 10
+    3696:	9300      	ld.w      	r0, (r3, 0x0)
+			break;
+		case DIP_CH2:
+			val = GPIO_Read_Status(GPIOA0,9);
+			break;
+		case DIP_CH3:
+			val = GPIO_Read_Status(GPIOA0,8);
+    3698:	e3fff55b 	bsr      	0x214e	// 214e <GPIO_Read_Status>
+			break;
+
+    }
+    return val;
+}
+    369c:	1490      	pop      	r15
+			val = GPIO_Read_Status(GPIOA0,9);
+    369e:	1065      	lrw      	r3, 0x2000004c	// 36b0 <DIP_GetSwitchState+0x30>
+    36a0:	3109      	movi      	r1, 9
+    36a2:	9300      	ld.w      	r0, (r3, 0x0)
+    36a4:	07fa      	br      	0x3698	// 3698 <DIP_GetSwitchState+0x18>
+			val = GPIO_Read_Status(GPIOA0,8);
+    36a6:	1063      	lrw      	r3, 0x2000004c	// 36b0 <DIP_GetSwitchState+0x30>
+    36a8:	3108      	movi      	r1, 8
+    36aa:	9300      	ld.w      	r0, (r3, 0x0)
+    36ac:	07f6      	br      	0x3698	// 3698 <DIP_GetSwitchState+0x18>
+    36ae:	0000      	bkpt
+    36b0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.DIP_Switch_Init:
+
+000036b4 <DIP_Switch_Init>:
+void DIP_Switch_Init(void){
+    36b4:	14d2      	push      	r4-r5, r15
+	GPIO_Init(GPIOA0,10,Intput);
+    36b6:	1180      	lrw      	r4, 0x2000004c	// 3734 <DIP_Switch_Init+0x80>
+    36b8:	3201      	movi      	r2, 1
+    36ba:	9400      	ld.w      	r0, (r4, 0x0)
+    36bc:	310a      	movi      	r1, 10
+    36be:	e3fff3af 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_Init(GPIOA0,9,Intput);
+    36c2:	9400      	ld.w      	r0, (r4, 0x0)
+    36c4:	3201      	movi      	r2, 1
+    36c6:	3109      	movi      	r1, 9
+    36c8:	e3fff3aa 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_Init(GPIOA0,8,Intput);
+    36cc:	3201      	movi      	r2, 1
+    36ce:	9400      	ld.w      	r0, (r4, 0x0)
+    36d0:	3108      	movi      	r1, 8
+    36d2:	e3fff3a5 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,10);
+    36d6:	9400      	ld.w      	r0, (r4, 0x0)
+    36d8:	310a      	movi      	r1, 10
+    36da:	e3fff411 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+	GPIO_PullHigh_Init(GPIOA0,9);
+    36de:	9400      	ld.w      	r0, (r4, 0x0)
+    36e0:	3109      	movi      	r1, 9
+    36e2:	e3fff40d 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+	GPIO_PullHigh_Init(GPIOA0,8);
+    36e6:	9400      	ld.w      	r0, (r4, 0x0)
+    36e8:	3108      	movi      	r1, 8
+    36ea:	e3fff409 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+	memset(&g_Dip,0,sizeof(DIP_t));
+    36ee:	3210      	movi      	r2, 16
+    36f0:	3100      	movi      	r1, 0
+    36f2:	1012      	lrw      	r0, 0x2000035c	// 3738 <DIP_Switch_Init+0x84>
+    36f4:	e3fff144 	bsr      	0x197c	// 197c <__memset_fast>
+	delay_nms(20);
+    36f8:	3014      	movi      	r0, 20
+    36fa:	e3fff7ef 	bsr      	0x26d8	// 26d8 <delay_nms>
+    36fe:	3400      	movi      	r4, 0
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+    3700:	10ae      	lrw      	r5, 0x2000035c	// 3738 <DIP_Switch_Init+0x84>
+		if(DIP_GetSwitchState(i) == DIP_PRESS){
+    3702:	7410      	zextb      	r0, r4
+    3704:	e3ffffbe 	bsr      	0x3680	// 3680 <DIP_GetSwitchState>
+    3708:	3840      	cmpnei      	r0, 0
+    370a:	0807      	bt      	0x3718	// 3718 <DIP_Switch_Init+0x64>
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+    370c:	3301      	movi      	r3, 1
+    370e:	70d0      	lsl      	r3, r4
+    3710:	6c8f      	mov      	r2, r3
+    3712:	9562      	ld.w      	r3, (r5, 0x8)
+    3714:	6cc8      	or      	r3, r2
+    3716:	b562      	st.w      	r3, (r5, 0x8)
+    3718:	2400      	addi      	r4, 1
+	for (U8_T i = 0; i < DIP_CHN_MAX; i++) {
+    371a:	3c43      	cmpnei      	r4, 3
+    371c:	0bf3      	bt      	0x3702	// 3702 <DIP_Switch_Init+0x4e>
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    371e:	1067      	lrw      	r3, 0x2000035c	// 3738 <DIP_Switch_Init+0x84>
+	g_Dip.addr = g_Dip.DIP_val & 0x07;
+    3720:	3107      	movi      	r1, 7
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    3722:	9342      	ld.w      	r2, (r3, 0x8)
+	g_Dip.addr = g_Dip.DIP_val & 0x07;
+    3724:	6848      	and      	r1, r2
+    3726:	a326      	st.b      	r1, (r3, 0x6)
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.DIP_val);
+    3728:	3000      	movi      	r0, 0
+    372a:	1025      	lrw      	r1, 0x4d8f	// 373c <DIP_Switch_Init+0x88>
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    372c:	b343      	st.w      	r2, (r3, 0xc)
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.DIP_val);
+    372e:	e3ffffa3 	bsr      	0x3674	// 3674 <Dbg_Println>
+}
+    3732:	1492      	pop      	r4-r5, r15
+    3734:	2000004c 	.long	0x2000004c
+    3738:	2000035c 	.long	0x2000035c
+    373c:	00004d8f 	.long	0x00004d8f
+
+Disassembly of section .text.DIP_ScanTask:
+
+00003740 <DIP_ScanTask>:
+
+void DIP_ScanTask(void)
+{
+    3740:	14d3      	push      	r4-r6, r15
+    static U32_T update_20ms = 0;
+
+    if (SysTick_1ms - update_20ms > DIP_SCAN_Time)
+    3742:	1120      	lrw      	r1, 0x200000a4	// 37c0 <DIP_ScanTask+0x80>
+    3744:	1140      	lrw      	r2, 0x200000b8	// 37c4 <DIP_ScanTask+0x84>
+    3746:	11a1      	lrw      	r5, 0x2000035c	// 37c8 <DIP_ScanTask+0x88>
+    3748:	9200      	ld.w      	r0, (r2, 0x0)
+    374a:	9160      	ld.w      	r3, (r1, 0x0)
+    374c:	60c2      	subu      	r3, r0
+    374e:	3b14      	cmphsi      	r3, 21
+    3750:	0806      	bt      	0x375c	// 375c <DIP_ScanTask+0x1c>
+                }
+            }
+        }
+    }
+
+    if(g_Dip.DIP_val != g_Dip.DIP_last_val)
+    3752:	9562      	ld.w      	r3, (r5, 0x8)
+    3754:	9543      	ld.w      	r2, (r5, 0xc)
+    3756:	648e      	cmpne      	r3, r2
+    3758:	082e      	bt      	0x37b4	// 37b4 <DIP_ScanTask+0x74>
+		g_Dip.addr = g_Dip.DIP_val & 0x07;
+
+        
+    }
+    
+}
+    375a:	1493      	pop      	r4-r6, r15
+        update_20ms = SysTick_1ms;
+    375c:	9160      	ld.w      	r3, (r1, 0x0)
+    375e:	b260      	st.w      	r3, (r2, 0x0)
+    3760:	6d17      	mov      	r4, r5
+    3762:	3600      	movi      	r6, 0
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+    3764:	7418      	zextb      	r0, r6
+    3766:	e3ffff8d 	bsr      	0x3680	// 3680 <DIP_GetSwitchState>
+    376a:	3840      	cmpnei      	r0, 0
+                g_Dip.delayCnt_OFF[i] = 0;
+    376c:	3300      	movi      	r3, 0
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+    376e:	0814      	bt      	0x3796	// 3796 <DIP_ScanTask+0x56>
+                g_Dip.delayCnt_OFF[i] = 0;
+    3770:	a463      	st.b      	r3, (r4, 0x3)
+                if (g_Dip.delayCnt_ON[i] < DIP_DELAY_COUNT)
+    3772:	8460      	ld.b      	r3, (r4, 0x0)
+    3774:	3b04      	cmphsi      	r3, 5
+    3776:	0808      	bt      	0x3786	// 3786 <DIP_ScanTask+0x46>
+                    g_Dip.delayCnt_ON[i]++;
+    3778:	2300      	addi      	r3, 1
+                    g_Dip.delayCnt_ON[i] = 0;
+    377a:	a460      	st.b      	r3, (r4, 0x0)
+    377c:	2600      	addi      	r6, 1
+        for (U8_T i = 0; i < DIP_CHN_MAX; i++)
+    377e:	3e43      	cmpnei      	r6, 3
+    3780:	2400      	addi      	r4, 1
+    3782:	0bf1      	bt      	0x3764	// 3764 <DIP_ScanTask+0x24>
+    3784:	07e7      	br      	0x3752	// 3752 <DIP_ScanTask+0x12>
+                    g_Dip.DIP_val |= (DIP_VAL_ON << i);              
+    3786:	3301      	movi      	r3, 1
+    3788:	70d8      	lsl      	r3, r6
+    378a:	6c8f      	mov      	r2, r3
+    378c:	9562      	ld.w      	r3, (r5, 0x8)
+    378e:	6cc8      	or      	r3, r2
+    3790:	b562      	st.w      	r3, (r5, 0x8)
+                    g_Dip.delayCnt_ON[i] = 0;
+    3792:	3300      	movi      	r3, 0
+    3794:	07f3      	br      	0x377a	// 377a <DIP_ScanTask+0x3a>
+                g_Dip.delayCnt_ON[i] = 0;
+    3796:	a460      	st.b      	r3, (r4, 0x0)
+                if (g_Dip.delayCnt_OFF[i] < DIP_DELAY_COUNT)
+    3798:	8463      	ld.b      	r3, (r4, 0x3)
+    379a:	3b04      	cmphsi      	r3, 5
+    379c:	0804      	bt      	0x37a4	// 37a4 <DIP_ScanTask+0x64>
+                    g_Dip.delayCnt_OFF[i]++;
+    379e:	2300      	addi      	r3, 1
+                    g_Dip.delayCnt_OFF[i] = 0;
+    37a0:	a463      	st.b      	r3, (r4, 0x3)
+    37a2:	07ed      	br      	0x377c	// 377c <DIP_ScanTask+0x3c>
+                    g_Dip.DIP_val &= ~(DIP_VAL_ON << i);             
+    37a4:	3300      	movi      	r3, 0
+    37a6:	2b01      	subi      	r3, 2
+    37a8:	9542      	ld.w      	r2, (r5, 0x8)
+    37aa:	70db      	rotl      	r3, r6
+    37ac:	68c8      	and      	r3, r2
+    37ae:	b562      	st.w      	r3, (r5, 0x8)
+                    g_Dip.delayCnt_OFF[i] = 0;
+    37b0:	3300      	movi      	r3, 0
+    37b2:	07f7      	br      	0x37a0	// 37a0 <DIP_ScanTask+0x60>
+		g_Dip.addr = g_Dip.DIP_val & 0x07;
+    37b4:	3207      	movi      	r2, 7
+		g_Dip.DIP_last_val = g_Dip.DIP_val;
+    37b6:	b563      	st.w      	r3, (r5, 0xc)
+		g_Dip.addr = g_Dip.DIP_val & 0x07;
+    37b8:	68c8      	and      	r3, r2
+    37ba:	a566      	st.b      	r3, (r5, 0x6)
+}
+    37bc:	07cf      	br      	0x375a	// 375a <DIP_ScanTask+0x1a>
+    37be:	0000      	bkpt
+    37c0:	200000a4 	.long	0x200000a4
+    37c4:	200000b8 	.long	0x200000b8
+    37c8:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.Relay_Init:
+
+000037cc <Relay_Init>:
+#include "includes.h"
+
+ZERO_CTRL_RLY c_rly;
+
+void Relay_Init(void)
+{
+    37cc:	14d2      	push      	r4-r5, r15
+    37ce:	1429      	subi      	r14, r14, 36
+	memset(&c_rly,0, sizeof(ZERO_CTRL_RLY));
+    37d0:	11ac      	lrw      	r5, 0x2000036c	// 3880 <Relay_Init+0xb4>
+    37d2:	3218      	movi      	r2, 24
+    37d4:	3100      	movi      	r1, 0
+    37d6:	6c17      	mov      	r0, r5
+    37d8:	e3fff0d2 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	EEPROM_Init();
+    37dc:	e0000592 	bsr      	0x4300	// 4300 <EEPROM_Init>
+	
+
+	GPT_IO_Init(GPT_CHB_PB00);
+    37e0:	3005      	movi      	r0, 5
+    37e2:	e3fff51f 	bsr      	0x2220	// 2220 <GPT_IO_Init>
+	
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    37e6:	3400      	movi      	r4, 0
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    37e8:	3300      	movi      	r3, 0
+    37ea:	3240      	movi      	r2, 64
+    37ec:	3100      	movi      	r1, 0
+    37ee:	3001      	movi      	r0, 1
+    37f0:	e3fff568 	bsr      	0x22c0	// 22c0 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    37f4:	b885      	st.w      	r4, (r14, 0x14)
+    37f6:	b884      	st.w      	r4, (r14, 0x10)
+    37f8:	b883      	st.w      	r4, (r14, 0xc)
+    37fa:	b882      	st.w      	r4, (r14, 0x8)
+    37fc:	b881      	st.w      	r4, (r14, 0x4)
+    37fe:	b880      	st.w      	r4, (r14, 0x0)
+    3800:	3300      	movi      	r3, 0
+    3802:	3208      	movi      	r2, 8
+    3804:	3100      	movi      	r1, 0
+    3806:	3000      	movi      	r0, 0
+    3808:	e3fff566 	bsr      	0x22d4	// 22d4 <GPT_WaveCtrl_Configure>
+	GPT_Period_CMP_Write(10000,0,0);		
+    380c:	3200      	movi      	r2, 0
+    380e:	3100      	movi      	r1, 0
+    3810:	101d      	lrw      	r0, 0x2710	// 3884 <Relay_Init+0xb8>
+    3812:	e3fff5ef 	bsr      	0x23f0	// 23f0 <GPT_Period_CMP_Write>
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    3816:	3320      	movi      	r3, 32
+    3818:	3204      	movi      	r2, 4
+    381a:	3100      	movi      	r1, 0
+    381c:	3001      	movi      	r0, 1
+    381e:	e3fff57d 	bsr      	0x2318	// 2318 <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    3822:	3301      	movi      	r3, 1
+    3824:	3200      	movi      	r2, 0
+    3826:	b888      	st.w      	r4, (r14, 0x20)
+    3828:	b887      	st.w      	r4, (r14, 0x1c)
+    382a:	b886      	st.w      	r4, (r14, 0x18)
+    382c:	b885      	st.w      	r4, (r14, 0x14)
+    382e:	b884      	st.w      	r4, (r14, 0x10)
+    3830:	b883      	st.w      	r4, (r14, 0xc)
+    3832:	b862      	st.w      	r3, (r14, 0x8)
+    3834:	b861      	st.w      	r3, (r14, 0x4)
+    3836:	b880      	st.w      	r4, (r14, 0x0)
+    3838:	3302      	movi      	r3, 2
+    383a:	3100      	movi      	r1, 0
+    383c:	3001      	movi      	r0, 1
+    383e:	e3fff577 	bsr      	0x232c	// 232c <GPT_WaveOut_Configure>
+	GPT_Start();
+    3842:	e3fff5cf 	bsr      	0x23e0	// 23e0 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+    3846:	3180      	movi      	r1, 128
+	
+	
+	
+	
+	//真-继电器
+	GPIO_Init(GPIOA0,12,Output);
+    3848:	1090      	lrw      	r4, 0x2000004c	// 3888 <Relay_Init+0xbc>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+    384a:	4129      	lsli      	r1, r1, 9
+    384c:	3001      	movi      	r0, 1
+    384e:	e3fff5d9 	bsr      	0x2400	// 2400 <GPT_ConfigInterrupt_CMD>
+	GPIO_Init(GPIOA0,12,Output);
+    3852:	9400      	ld.w      	r0, (r4, 0x0)
+    3854:	3200      	movi      	r2, 0
+    3856:	310c      	movi      	r1, 12
+    3858:	e3fff2e2 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_Init(GPIOA0,13,Output);	
+    385c:	3200      	movi      	r2, 0
+    385e:	9400      	ld.w      	r0, (r4, 0x0)
+    3860:	310d      	movi      	r1, 13
+    3862:	e3fff2dd 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	
+	RLY_1_CLOSE;
+    3866:	9400      	ld.w      	r0, (r4, 0x0)
+    3868:	310d      	movi      	r1, 13
+    386a:	e3fff463 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+	RLY_2_CLOSE;
+    386e:	9400      	ld.w      	r0, (r4, 0x0)
+    3870:	310c      	movi      	r1, 12
+    3872:	e3fff45f 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+	
+	
+	
+	c_rly.rly_control = 0x01;	//继电器控制标志位
+    3876:	3301      	movi      	r3, 1
+    3878:	a560      	st.b      	r3, (r5, 0x0)
+}
+    387a:	1409      	addi      	r14, r14, 36
+    387c:	1492      	pop      	r4-r5, r15
+    387e:	0000      	bkpt
+    3880:	2000036c 	.long	0x2000036c
+    3884:	00002710 	.long	0x00002710
+    3888:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.CheckSum:
+
+0000388c <CheckSum>:
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum(U8_T *data,U16_T len)
+{
+    388c:	6cc3      	mov      	r3, r0
+    388e:	6040      	addu      	r1, r0
+	U8_T data_sum = 0;
+    3890:	3000      	movi      	r0, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    3892:	644e      	cmpne      	r3, r1
+    3894:	0802      	bt      	0x3898	// 3898 <CheckSum+0xc>
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+}
+    3896:	783c      	jmp      	r15
+		data_sum += data[i];
+    3898:	8340      	ld.b      	r2, (r3, 0x0)
+    389a:	6008      	addu      	r0, r2
+    389c:	7400      	zextb      	r0, r0
+    389e:	2300      	addi      	r3, 1
+    38a0:	07f9      	br      	0x3892	// 3892 <CheckSum+0x6>
+
+Disassembly of section .text.CheckSum2:
+
+000038a2 <CheckSum2>:
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum2(U8_T *data,U16_T len)
+{
+    38a2:	6040      	addu      	r1, r0
+	U8_T data_sum = 0;
+    38a4:	3300      	movi      	r3, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    38a6:	6442      	cmpne      	r0, r1
+    38a8:	0804      	bt      	0x38b0	// 38b0 <CheckSum2+0xe>
+	{
+		data_sum += data[i];
+	}
+	return ~(data_sum);
+    38aa:	6cce      	nor      	r3, r3
+    38ac:	740c      	zextb      	r0, r3
+}
+    38ae:	783c      	jmp      	r15
+		data_sum += data[i];
+    38b0:	8040      	ld.b      	r2, (r0, 0x0)
+    38b2:	60c8      	addu      	r3, r2
+    38b4:	74cc      	zextb      	r3, r3
+    38b6:	2000      	addi      	r0, 1
+    38b8:	07f7      	br      	0x38a6	// 38a6 <CheckSum2+0x4>
+
+Disassembly of section .text.Change_OUTV:
+
+000038bc <Change_OUTV>:
+
+
+//选择输出电压，0 - 10000mV
+U8_T Change_OUTV(U16_T VolOut)
+{
+	if(VolOut > 10000) return 0x01;
+    38bc:	1065      	lrw      	r3, 0x2710	// 38d0 <Change_OUTV+0x14>
+    38be:	640c      	cmphs      	r3, r0
+    38c0:	0c06      	bf      	0x38cc	// 38cc <Change_OUTV+0x10>
+	
+	GPT0->CMPA = VolOut;
+    38c2:	1065      	lrw      	r3, 0x20000024	// 38d4 <Change_OUTV+0x18>
+    38c4:	9360      	ld.w      	r3, (r3, 0x0)
+    38c6:	b30b      	st.w      	r0, (r3, 0x2c)
+#if DBG_LOG_EN	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"CMPA:%d",VolOut);
+#endif		
+	return 0x00;
+    38c8:	3000      	movi      	r0, 0
+}
+    38ca:	783c      	jmp      	r15
+	if(VolOut > 10000) return 0x01;
+    38cc:	3001      	movi      	r0, 1
+    38ce:	07fe      	br      	0x38ca	// 38ca <Change_OUTV+0xe>
+    38d0:	00002710 	.long	0x00002710
+    38d4:	20000024 	.long	0x20000024
+
+Disassembly of section .text.BLV_VolOut_Ctrl:
+
+000038d8 <BLV_VolOut_Ctrl>:
+ * @param	
+ * @retval 	None
+ * */
+
+void BLV_VolOut_Ctrl(void)
+{
+    38d8:	14d1      	push      	r4, r15
+	c_rly.wind = WIND_STOP;
+    38da:	1095      	lrw      	r4, 0x2000036c	// 392c <BLV_VolOut_Ctrl+0x54>
+    38dc:	3300      	movi      	r3, 0
+    38de:	a46d      	st.b      	r3, (r4, 0xd)
+
+	if(c_rly.rly_state[WINDRLY_HIGH] == Control_ON)			// 优先级高>中>抵 , 若同时被控制多个风速继电器，则将按照优先级打开继电器  
+    38e0:	8465      	ld.b      	r3, (r4, 0x5)
+    38e2:	3b41      	cmpnei      	r3, 1
+    38e4:	0804      	bt      	0x38ec	// 38ec <BLV_VolOut_Ctrl+0x14>
+	{
+#if DBG_LOG_EN		
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_HIGH");
+#endif		
+		c_rly.wind = WIND_HIGH;
+    38e6:	3303      	movi      	r3, 3
+	}else if(c_rly.rly_state[WINDRLY_LOW] == Control_ON)	
+	{
+#if DBG_LOG_EN
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_LOW");
+#endif		
+		c_rly.wind = WIND_LOW;
+    38e8:	a46d      	st.b      	r3, (r4, 0xd)
+    38ea:	0409      	br      	0x38fc	// 38fc <BLV_VolOut_Ctrl+0x24>
+	}else if(c_rly.rly_state[WINDRLY_MID] == Control_ON)	
+    38ec:	8464      	ld.b      	r3, (r4, 0x4)
+    38ee:	3b41      	cmpnei      	r3, 1
+    38f0:	0803      	bt      	0x38f6	// 38f6 <BLV_VolOut_Ctrl+0x1e>
+		c_rly.wind = WIND_MID;
+    38f2:	3302      	movi      	r3, 2
+    38f4:	07fa      	br      	0x38e8	// 38e8 <BLV_VolOut_Ctrl+0x10>
+	}else if(c_rly.rly_state[WINDRLY_LOW] == Control_ON)	
+    38f6:	8463      	ld.b      	r3, (r4, 0x3)
+    38f8:	3b41      	cmpnei      	r3, 1
+    38fa:	0ff7      	bf      	0x38e8	// 38e8 <BLV_VolOut_Ctrl+0x10>
+	}	
+
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"VolOut_Ctrl wind:%d",c_rly.wind);
+    38fc:	844d      	ld.b      	r2, (r4, 0xd)
+    38fe:	102d      	lrw      	r1, 0x4d9b	// 3930 <BLV_VolOut_Ctrl+0x58>
+    3900:	3000      	movi      	r0, 0
+    3902:	e3fffeb9 	bsr      	0x3674	// 3674 <Dbg_Println>
+
+	
+	if(c_rly.wind == WIND_STOP){
+    3906:	846d      	ld.b      	r3, (r4, 0xd)
+    3908:	3b40      	cmpnei      	r3, 0
+    390a:	0805      	bt      	0x3914	// 3914 <BLV_VolOut_Ctrl+0x3c>
+		Change_OUTV(c_rly.wind_STOP_vol);
+    390c:	8c08      	ld.h      	r0, (r4, 0x10)
+	}else if(c_rly.wind == WIND_LOW){
+		Change_OUTV(c_rly.wind_LOW_vol);
+	}else if(c_rly.wind == WIND_MID){
+		Change_OUTV(c_rly.wind_MID_vol);
+	}else if(c_rly.wind == WIND_HIGH){
+		Change_OUTV(c_rly.wind_HIGH_vol);
+    390e:	e3ffffd7 	bsr      	0x38bc	// 38bc <Change_OUTV>
+	}		
+}
+    3912:	1491      	pop      	r4, r15
+	}else if(c_rly.wind == WIND_LOW){
+    3914:	3b41      	cmpnei      	r3, 1
+    3916:	0803      	bt      	0x391c	// 391c <BLV_VolOut_Ctrl+0x44>
+		Change_OUTV(c_rly.wind_LOW_vol);
+    3918:	8c09      	ld.h      	r0, (r4, 0x12)
+    391a:	07fa      	br      	0x390e	// 390e <BLV_VolOut_Ctrl+0x36>
+	}else if(c_rly.wind == WIND_MID){
+    391c:	3b42      	cmpnei      	r3, 2
+    391e:	0803      	bt      	0x3924	// 3924 <BLV_VolOut_Ctrl+0x4c>
+		Change_OUTV(c_rly.wind_MID_vol);
+    3920:	8c0a      	ld.h      	r0, (r4, 0x14)
+    3922:	07f6      	br      	0x390e	// 390e <BLV_VolOut_Ctrl+0x36>
+	}else if(c_rly.wind == WIND_HIGH){
+    3924:	3b43      	cmpnei      	r3, 3
+    3926:	0bf6      	bt      	0x3912	// 3912 <BLV_VolOut_Ctrl+0x3a>
+		Change_OUTV(c_rly.wind_HIGH_vol);
+    3928:	8c0b      	ld.h      	r0, (r4, 0x16)
+    392a:	07f2      	br      	0x390e	// 390e <BLV_VolOut_Ctrl+0x36>
+    392c:	2000036c 	.long	0x2000036c
+    3930:	00004d9b 	.long	0x00004d9b
+
+Disassembly of section .text.BLV_RLY_Ctrl_Purpose:
+
+00003934 <BLV_RLY_Ctrl_Purpose>:
+ * @param	rly_id:继电器id
+ * @param	state：继电器要改变的状态
+ * @retval 	None
+ * */
+void BLV_RLY_Ctrl_Purpose(U8_T rly_id,U8_T state)
+{
+    3934:	14d0      	push      	r15
+	if(rly_id >= RLY_MAX) return;
+    3936:	3804      	cmphsi      	r0, 5
+    3938:	0807      	bt      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+
+	switch(state)
+    393a:	3941      	cmpnei      	r1, 1
+    393c:	0c06      	bf      	0x3948	// 3948 <BLV_RLY_Ctrl_Purpose+0x14>
+    393e:	3940      	cmpnei      	r1, 0
+    3940:	0c13      	bf      	0x3966	// 3966 <BLV_RLY_Ctrl_Purpose+0x32>
+    3942:	3942      	cmpnei      	r1, 2
+    3944:	0c20      	bf      	0x3984	// 3984 <BLV_RLY_Ctrl_Purpose+0x50>
+				}
+			}				
+		break;		
+	}
+
+}
+    3946:	1490      	pop      	r15
+			if(c_rly.rly_state[rly_id] != Control_ON)
+    3948:	1078      	lrw      	r3, 0x2000036c	// 39a8 <BLV_RLY_Ctrl_Purpose+0x74>
+    394a:	60c0      	addu      	r3, r0
+    394c:	8341      	ld.b      	r2, (r3, 0x1)
+    394e:	3a41      	cmpnei      	r2, 1
+    3950:	0ffb      	bf      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+				c_rly.rly_state[rly_id] = Control_ON;
+    3952:	3201      	movi      	r2, 1
+				if(rly_id == CTRL_RLY1){
+    3954:	3840      	cmpnei      	r0, 0
+				c_rly.rly_state[rly_id] = Control_ON;
+    3956:	a341      	st.b      	r2, (r3, 0x1)
+				if(rly_id == CTRL_RLY1){
+    3958:	0822      	bt      	0x399c	// 399c <BLV_RLY_Ctrl_Purpose+0x68>
+					RLY_1_OPEN;
+    395a:	1075      	lrw      	r3, 0x2000004c	// 39ac <BLV_RLY_Ctrl_Purpose+0x78>
+    395c:	310d      	movi      	r1, 13
+    395e:	9300      	ld.w      	r0, (r3, 0x0)
+					RLY_2_OPEN;
+    3960:	e3fff3e4 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+    3964:	07f1      	br      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+    3966:	1071      	lrw      	r3, 0x2000036c	// 39a8 <BLV_RLY_Ctrl_Purpose+0x74>
+    3968:	60c0      	addu      	r3, r0
+    396a:	8341      	ld.b      	r2, (r3, 0x1)
+    396c:	3a40      	cmpnei      	r2, 0
+    396e:	0fec      	bf      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+				c_rly.rly_state[rly_id] = Control_OFF;
+    3970:	3200      	movi      	r2, 0
+				if(rly_id == CTRL_RLY1){
+    3972:	3840      	cmpnei      	r0, 0
+				c_rly.rly_state[rly_id] = Control_OFF;
+    3974:	a341      	st.b      	r2, (r3, 0x1)
+				if(rly_id == CTRL_RLY1){
+    3976:	080d      	bt      	0x3990	// 3990 <BLV_RLY_Ctrl_Purpose+0x5c>
+					RLY_1_CLOSE;
+    3978:	106d      	lrw      	r3, 0x2000004c	// 39ac <BLV_RLY_Ctrl_Purpose+0x78>
+    397a:	310d      	movi      	r1, 13
+    397c:	9300      	ld.w      	r0, (r3, 0x0)
+					RLY_2_CLOSE;
+    397e:	e3fff3d9 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+    3982:	07e2      	br      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+    3984:	1069      	lrw      	r3, 0x2000036c	// 39a8 <BLV_RLY_Ctrl_Purpose+0x74>
+    3986:	60c0      	addu      	r3, r0
+    3988:	8341      	ld.b      	r2, (r3, 0x1)
+    398a:	3a40      	cmpnei      	r2, 0
+    398c:	0fe3      	bf      	0x3952	// 3952 <BLV_RLY_Ctrl_Purpose+0x1e>
+    398e:	07f1      	br      	0x3970	// 3970 <BLV_RLY_Ctrl_Purpose+0x3c>
+				}else if(rly_id == CTRL_RLY2){
+    3990:	3841      	cmpnei      	r0, 1
+    3992:	0bda      	bt      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+					RLY_2_CLOSE;
+    3994:	1066      	lrw      	r3, 0x2000004c	// 39ac <BLV_RLY_Ctrl_Purpose+0x78>
+    3996:	310c      	movi      	r1, 12
+    3998:	9300      	ld.w      	r0, (r3, 0x0)
+    399a:	07f2      	br      	0x397e	// 397e <BLV_RLY_Ctrl_Purpose+0x4a>
+				}else if(rly_id == CTRL_RLY2){
+    399c:	3841      	cmpnei      	r0, 1
+    399e:	0bd4      	bt      	0x3946	// 3946 <BLV_RLY_Ctrl_Purpose+0x12>
+					RLY_2_OPEN;
+    39a0:	1063      	lrw      	r3, 0x2000004c	// 39ac <BLV_RLY_Ctrl_Purpose+0x78>
+    39a2:	310c      	movi      	r1, 12
+    39a4:	9300      	ld.w      	r0, (r3, 0x0)
+    39a6:	07dd      	br      	0x3960	// 3960 <BLV_RLY_Ctrl_Purpose+0x2c>
+    39a8:	2000036c 	.long	0x2000036c
+    39ac:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.BLV_RLY_Task:
+
+000039b0 <BLV_RLY_Task>:
+//继电器动作处理
+void BLV_RLY_Task(void)
+{
+    39b0:	14d3      	push      	r4-r6, r15
+	if(c_rly.rly_control != 0x01)return;
+    39b2:	10b1      	lrw      	r5, 0x2000036c	// 39f4 <BLV_RLY_Task+0x44>
+    39b4:	8560      	ld.b      	r3, (r5, 0x0)
+    39b6:	3b41      	cmpnei      	r3, 1
+    39b8:	0815      	bt      	0x39e2	// 39e2 <BLV_RLY_Task+0x32>
+    39ba:	6d97      	mov      	r6, r5
+    39bc:	3400      	movi      	r4, 0
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_ctrl_state[i] == RLY_OFF)
+    39be:	8666      	ld.b      	r3, (r6, 0x6)
+    39c0:	3b41      	cmpnei      	r3, 1
+    39c2:	0811      	bt      	0x39e4	// 39e4 <BLV_RLY_Task+0x34>
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_OFF);
+    39c4:	3100      	movi      	r1, 0
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+			
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+		{
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+    39c6:	6c13      	mov      	r0, r4
+    39c8:	e3ffffb6 	bsr      	0x3934	// 3934 <BLV_RLY_Ctrl_Purpose>
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    39cc:	2400      	addi      	r4, 1
+    39ce:	7510      	zextb      	r4, r4
+		}				
+
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+    39d0:	3300      	movi      	r3, 0
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    39d2:	3c45      	cmpnei      	r4, 5
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+    39d4:	a666      	st.b      	r3, (r6, 0x6)
+    39d6:	2600      	addi      	r6, 1
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    39d8:	0bf3      	bt      	0x39be	// 39be <BLV_RLY_Task+0xe>
+	}
+	
+	BLV_VolOut_Ctrl();		//风速判断，输出pwm
+    39da:	e3ffff7f 	bsr      	0x38d8	// 38d8 <BLV_VolOut_Ctrl>
+	
+#if DBG_LOG_EN	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"BLV_RLY_Task");
+#endif	
+	c_rly.rly_control = 0x00;
+    39de:	3300      	movi      	r3, 0
+    39e0:	a560      	st.b      	r3, (r5, 0x0)
+}
+    39e2:	1493      	pop      	r4-r6, r15
+		else if(c_rly.rly_ctrl_state[i] == RLY_ON)
+    39e4:	3b42      	cmpnei      	r3, 2
+    39e6:	0803      	bt      	0x39ec	// 39ec <BLV_RLY_Task+0x3c>
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+    39e8:	3101      	movi      	r1, 1
+    39ea:	07ee      	br      	0x39c6	// 39c6 <BLV_RLY_Task+0x16>
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+    39ec:	3b43      	cmpnei      	r3, 3
+    39ee:	0bef      	bt      	0x39cc	// 39cc <BLV_RLY_Task+0x1c>
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+    39f0:	3102      	movi      	r1, 2
+    39f2:	07ea      	br      	0x39c6	// 39c6 <BLV_RLY_Task+0x16>
+    39f4:	2000036c 	.long	0x2000036c
+
+Disassembly of section .text.BLV_A9RLY_CMD_SET_Processing:
+
+000039f8 <BLV_A9RLY_CMD_SET_Processing>:
+
+
+
+//1、主机下发设置继电器状态
+U8_T BLV_A9RLY_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    39f8:	14d3      	push      	r4-r6, r15
+    39fa:	1429      	subi      	r14, r14, 36
+	if(len < 9) return 0x01;
+    39fc:	3908      	cmphsi      	r1, 9
+    39fe:	0c48      	bf      	0x3a8e	// 3a8e <BLV_A9RLY_CMD_SET_Processing+0x96>
+	U16_T RLY_STATE = 0x00;
+	
+	
+//	if(len >= 9)
+	{
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+    3a00:	8048      	ld.b      	r2, (r0, 0x8)
+    3a02:	8067      	ld.b      	r3, (r0, 0x7)
+    3a04:	4248      	lsli      	r2, r2, 8
+    3a06:	608c      	addu      	r2, r3
+		c_rly.rly_control = 0x01;	//继电器控制标志
+    3a08:	3101      	movi      	r1, 1
+    3a0a:	1163      	lrw      	r3, 0x2000036c	// 3a94 <BLV_A9RLY_CMD_SET_Processing+0x9c>
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+    3a0c:	7489      	zexth      	r2, r2
+		c_rly.rly_control = 0x01;	//继电器控制标志
+    3a0e:	a320      	st.b      	r1, (r3, 0x0)
+    3a10:	3400      	movi      	r4, 0
+    3a12:	6d4f      	mov      	r5, r3
+		
+		for(U8_T i = 0;i<RLY_MAX;i++)
+		{
+			t = ((RLY_STATE>>(2*i)) & 0x03);
+    3a14:	3603      	movi      	r6, 3
+    3a16:	6c4b      	mov      	r1, r2
+    3a18:	7052      	asr      	r1, r4
+    3a1a:	6858      	and      	r1, r6
+    3a1c:	7444      	zextb      	r1, r1
+			
+			if(t == NO_CTRL){
+    3a1e:	3940      	cmpnei      	r1, 0
+    3a20:	0831      	bt      	0x3a82	// 3a82 <BLV_A9RLY_CMD_SET_Processing+0x8a>
+    3a22:	2401      	addi      	r4, 2
+		for(U8_T i = 0;i<RLY_MAX;i++)
+    3a24:	3c4a      	cmpnei      	r4, 10
+			}else if(t == RLY_OFF){
+				c_rly.rly_ctrl_state[i] = RLY_OFF;
+			}else if(t == RLY_ON){
+				c_rly.rly_ctrl_state[i] = RLY_ON;
+			}else if(t == RLY_RES){
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+    3a26:	a326      	st.b      	r1, (r3, 0x6)
+    3a28:	2300      	addi      	r3, 1
+		for(U8_T i = 0;i<RLY_MAX;i++)
+    3a2a:	0bf6      	bt      	0x3a16	// 3a16 <BLV_A9RLY_CMD_SET_Processing+0x1e>
+			}				
+		}
+	}
+	
+	//BLV_RLY_Task();
+	c_rly.SN = (data[1]&0x0F);
+    3a2c:	8061      	ld.b      	r3, (r0, 0x1)
+    3a2e:	320f      	movi      	r2, 15
+    3a30:	68c8      	and      	r3, r2
+    3a32:	a56c      	st.b      	r3, (r5, 0xc)
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;		//SN
+    3a34:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3a38:	8062      	ld.b      	r3, (r0, 0x2)
+    3a3a:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3a3e:	8060      	ld.b      	r3, (r0, 0x0)
+    3a40:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3a44:	3300      	movi      	r3, 0
+    3a46:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_SET_RLYSTATE_REPLY;		//回复CMD
+    3a4a:	3330      	movi      	r3, 48
+	SendData[SendLen++] = g_Dip.addr;
+    3a4c:	1053      	lrw      	r2, 0x2000035c	// 3a98 <BLV_A9RLY_CMD_SET_Processing+0xa0>
+    3a4e:	8246      	ld.b      	r2, (r2, 0x6)
+	SendData[SendLen++] = CMD_SET_RLYSTATE_REPLY;		//回复CMD
+    3a50:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3a54:	3107      	movi      	r1, 7
+	SendData[SEND_LEN] = SendLen;	//len
+    3a56:	3307      	movi      	r3, 7
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3a58:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = g_Dip.addr;
+    3a5a:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SEND_LEN] = SendLen;	//len
+    3a5e:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3a62:	e3ffff20 	bsr      	0x38a2	// 38a2 <CheckSum2>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3a66:	3314      	movi      	r3, 20
+    3a68:	b860      	st.w      	r3, (r14, 0x0)
+    3a6a:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3a6c:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3a70:	4361      	lsli      	r3, r3, 1
+    3a72:	1801      	addi      	r0, r14, 4
+    3a74:	3201      	movi      	r2, 1
+    3a76:	3107      	movi      	r1, 7
+    3a78:	e3fffd72 	bsr      	0x355c	// 355c <Set_GroupSend>
+    3a7c:	3000      	movi      	r0, 0
+	
+	return 0x00;
+}
+    3a7e:	1409      	addi      	r14, r14, 36
+    3a80:	1493      	pop      	r4-r6, r15
+			}else if(t == RLY_OFF){
+    3a82:	3941      	cmpnei      	r1, 1
+    3a84:	0fcf      	bf      	0x3a22	// 3a22 <BLV_A9RLY_CMD_SET_Processing+0x2a>
+			}else if(t == RLY_ON){
+    3a86:	3942      	cmpnei      	r1, 2
+    3a88:	0fcd      	bf      	0x3a22	// 3a22 <BLV_A9RLY_CMD_SET_Processing+0x2a>
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+    3a8a:	3103      	movi      	r1, 3
+    3a8c:	07cb      	br      	0x3a22	// 3a22 <BLV_A9RLY_CMD_SET_Processing+0x2a>
+	if(len < 9) return 0x01;
+    3a8e:	3001      	movi      	r0, 1
+    3a90:	07f7      	br      	0x3a7e	// 3a7e <BLV_A9RLY_CMD_SET_Processing+0x86>
+    3a92:	0000      	bkpt
+    3a94:	2000036c 	.long	0x2000036c
+    3a98:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_A9RLY_CMD_READ_Processing:
+
+00003a9c <BLV_A9RLY_CMD_READ_Processing>:
+
+//2、读取继电器状态的回复
+void BLV_A9RLY_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3a9c:	14d2      	push      	r4-r5, r15
+    3a9e:	1429      	subi      	r14, r14, 36
+    3aa0:	11a0      	lrw      	r5, 0x2000036c	// 3b20 <BLV_A9RLY_CMD_READ_Processing+0x84>
+    3aa2:	3200      	movi      	r2, 0
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	U8_T RLY_State2 = 0x00;
+    3aa4:	3400      	movi      	r4, 0
+    3aa6:	6c57      	mov      	r1, r5
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_state[i] == Control_ON)
+    3aa8:	8561      	ld.b      	r3, (r5, 0x1)
+    3aaa:	3b41      	cmpnei      	r3, 1
+    3aac:	0804      	bt      	0x3ab4	// 3ab4 <BLV_A9RLY_CMD_READ_Processing+0x18>
+		{
+			RLY_State2 |= (0x01<<i);
+    3aae:	70c8      	lsl      	r3, r2
+    3ab0:	6cd0      	or      	r3, r4
+    3ab2:	750c      	zextb      	r4, r3
+    3ab4:	2200      	addi      	r2, 1
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3ab6:	3a45      	cmpnei      	r2, 5
+    3ab8:	2500      	addi      	r5, 1
+    3aba:	0bf7      	bt      	0x3aa8	// 3aa8 <BLV_A9RLY_CMD_READ_Processing+0xc>
+		}
+	}
+	
+	c_rly.SN = (data[1]&0x0F);
+    3abc:	8041      	ld.b      	r2, (r0, 0x1)
+    3abe:	330f      	movi      	r3, 15
+    3ac0:	688c      	and      	r2, r3
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3ac2:	1079      	lrw      	r3, 0x2000035c	// 3b24 <BLV_A9RLY_CMD_READ_Processing+0x88>
+    3ac4:	8366      	ld.b      	r3, (r3, 0x6)
+	c_rly.SN = (data[1]&0x0F);
+    3ac6:	a14c      	st.b      	r2, (r1, 0xc)
+	SendData[SendLen++] = g_Dip.addr;
+    3ac8:	dc6e0004 	st.b      	r3, (r14, 0x4)
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+    3acc:	8062      	ld.b      	r3, (r0, 0x2)
+    3ace:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3ad2:	8060      	ld.b      	r3, (r0, 0x0)
+    3ad4:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3ad8:	3300      	movi      	r3, 0
+    3ada:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_READ_RLYSTATE_REPLY;		//回复CMD
+    3ade:	3334      	movi      	r3, 52
+    3ae0:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	SendData[SendLen++] = RLY_State2;
+	SendData[SendLen++] = 0x00;
+    3ae4:	3300      	movi      	r3, 0
+    3ae6:	dc6e000c 	st.b      	r3, (r14, 0xc)
+	SendData[SendLen++] = 0x00;
+    3aea:	dc6e000d 	st.b      	r3, (r14, 0xd)
+	
+	SendLen = 0x0A;
+	SendData[SEND_LEN] = 0x0A;	//len
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3aee:	310a      	movi      	r1, 10
+	SendData[SEND_LEN] = 0x0A;	//len
+    3af0:	330a      	movi      	r3, 10
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3af2:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = c_rly.SN;
+    3af4:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	SendData[SEND_LEN] = 0x0A;	//len
+    3af8:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SendLen++] = RLY_State2;
+    3afc:	dc8e000b 	st.b      	r4, (r14, 0xb)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3b00:	e3fffed1 	bsr      	0x38a2	// 38a2 <CheckSum2>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3b04:	3314      	movi      	r3, 20
+    3b06:	b860      	st.w      	r3, (r14, 0x0)
+    3b08:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3b0a:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3b0e:	4361      	lsli      	r3, r3, 1
+    3b10:	3201      	movi      	r2, 1
+    3b12:	310a      	movi      	r1, 10
+    3b14:	1801      	addi      	r0, r14, 4
+    3b16:	e3fffd23 	bsr      	0x355c	// 355c <Set_GroupSend>
+}
+    3b1a:	1409      	addi      	r14, r14, 36
+    3b1c:	1492      	pop      	r4-r5, r15
+    3b1e:	0000      	bkpt
+    3b20:	2000036c 	.long	0x2000036c
+    3b24:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_WINDOUT_CMD_SET_Processing:
+
+00003b28 <BLV_WINDOUT_CMD_SET_Processing>:
+
+//3、设置各个风速档位的电压输出值
+U8_T BLV_WINDOUT_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    3b28:	14d4      	push      	r4-r7, r15
+    3b2a:	1429      	subi      	r14, r14, 36
+	if(len < 15) return 0x01;
+    3b2c:	390e      	cmphsi      	r1, 15
+{
+    3b2e:	6d03      	mov      	r4, r0
+	if(len < 15) return 0x01;
+    3b30:	0c5f      	bf      	0x3bee	// 3bee <BLV_WINDOUT_CMD_SET_Processing+0xc6>
+    3b32:	58ba      	addi      	r5, r0, 7
+    3b34:	3300      	movi      	r3, 0
+    3b36:	3100      	movi      	r1, 0
+//	if(len >= 15)
+	{
+		for(U8_T i = 0x00; i < 0x04; i++)
+		{
+			SetVol = (data[(SEND_PARA+(i*2))] + (data[(SEND_PARA+(i*2+1))]<<8 ));
+			if(SetVol <= 10000){
+    3b38:	11cf      	lrw      	r6, 0x2710	// 3bf4 <BLV_WINDOUT_CMD_SET_Processing+0xcc>
+    3b3a:	1110      	lrw      	r0, 0x2000036c	// 3bf8 <BLV_WINDOUT_CMD_SET_Processing+0xd0>
+			SetVol = (data[(SEND_PARA+(i*2))] + (data[(SEND_PARA+(i*2+1))]<<8 ));
+    3b3c:	8541      	ld.b      	r2, (r5, 0x1)
+    3b3e:	4248      	lsli      	r2, r2, 8
+    3b40:	85e0      	ld.b      	r7, (r5, 0x0)
+    3b42:	609c      	addu      	r2, r7
+    3b44:	7489      	zexth      	r2, r2
+			if(SetVol <= 10000){
+    3b46:	6498      	cmphs      	r6, r2
+    3b48:	0c0d      	bf      	0x3b62	// 3b62 <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+				switch(i){
+    3b4a:	3942      	cmpnei      	r1, 2
+    3b4c:	0c47      	bf      	0x3bda	// 3bda <BLV_WINDOUT_CMD_SET_Processing+0xb2>
+    3b4e:	3943      	cmpnei      	r1, 3
+    3b50:	0c4a      	bf      	0x3be4	// 3be4 <BLV_WINDOUT_CMD_SET_Processing+0xbc>
+    3b52:	3941      	cmpnei      	r1, 1
+    3b54:	0c3e      	bf      	0x3bd0	// 3bd0 <BLV_WINDOUT_CMD_SET_Processing+0xa8>
+				case 0x00:
+					if(c_rly.wind_STOP_vol != SetVol){
+    3b56:	88e8      	ld.h      	r7, (r0, 0x10)
+    3b58:	649e      	cmpne      	r7, r2
+    3b5a:	0c04      	bf      	0x3b62	// 3b62 <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_STOP_vol = SetVol;
+    3b5c:	a848      	st.h      	r2, (r0, 0x10)
+					}				
+				break;
+				case 0x03:
+					if(c_rly.wind_HIGH_vol != SetVol){
+						c_rly.wind_HIGH_vol = SetVol;
+						save_flag++;
+    3b5e:	2300      	addi      	r3, 1
+    3b60:	74cc      	zextb      	r3, r3
+		for(U8_T i = 0x00; i < 0x04; i++)
+    3b62:	2100      	addi      	r1, 1
+    3b64:	7444      	zextb      	r1, r1
+    3b66:	3944      	cmpnei      	r1, 4
+    3b68:	2501      	addi      	r5, 2
+    3b6a:	0be9      	bt      	0x3b3c	// 3b3c <BLV_WINDOUT_CMD_SET_Processing+0x14>
+				}
+			}
+		}
+	}
+	
+	if(save_flag != 0x00)
+    3b6c:	3b40      	cmpnei      	r3, 0
+    3b6e:	0c03      	bf      	0x3b74	// 3b74 <BLV_WINDOUT_CMD_SET_Processing+0x4c>
+	{
+		EEPROM_WritePara();	//保存flash
+    3b70:	e00002d2 	bsr      	0x4114	// 4114 <EEPROM_WritePara>
+		
+	}
+	
+	BLV_VolOut_Ctrl();
+    3b74:	e3fffeb2 	bsr      	0x38d8	// 38d8 <BLV_VolOut_Ctrl>
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+    3b78:	8461      	ld.b      	r3, (r4, 0x1)
+    3b7a:	320f      	movi      	r2, 15
+    3b7c:	68c8      	and      	r3, r2
+    3b7e:	105f      	lrw      	r2, 0x2000036c	// 3bf8 <BLV_WINDOUT_CMD_SET_Processing+0xd0>
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3b80:	3107      	movi      	r1, 7
+	c_rly.SN = (data[1]&0x0F);
+    3b82:	a26c      	st.b      	r3, (r2, 0xc)
+	SendData[SendLen++] = c_rly.SN;
+    3b84:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3b88:	8462      	ld.b      	r3, (r4, 0x2)
+    3b8a:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3b8e:	8460      	ld.b      	r3, (r4, 0x0)
+    3b90:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//sum
+    3b94:	3300      	movi      	r3, 0
+    3b96:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+    3b9a:	3337      	movi      	r3, 55
+	SendData[SendLen++] = g_Dip.addr;
+    3b9c:	1058      	lrw      	r2, 0x2000035c	// 3bfc <BLV_WINDOUT_CMD_SET_Processing+0xd4>
+    3b9e:	8246      	ld.b      	r2, (r2, 0x6)
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+    3ba0:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3ba4:	1801      	addi      	r0, r14, 4
+	SendData[SEND_LEN] = SendLen;	//len
+    3ba6:	3307      	movi      	r3, 7
+	SendData[SendLen++] = g_Dip.addr;
+    3ba8:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SEND_LEN] = SendLen;	//len
+    3bac:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3bb0:	e3fffe79 	bsr      	0x38a2	// 38a2 <CheckSum2>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3bb4:	3314      	movi      	r3, 20
+    3bb6:	b860      	st.w      	r3, (r14, 0x0)
+    3bb8:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3bba:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3bbe:	4361      	lsli      	r3, r3, 1
+    3bc0:	1801      	addi      	r0, r14, 4
+    3bc2:	3201      	movi      	r2, 1
+    3bc4:	3107      	movi      	r1, 7
+    3bc6:	e3fffccb 	bsr      	0x355c	// 355c <Set_GroupSend>
+    3bca:	3000      	movi      	r0, 0
+	
+	return 0x00;
+}
+    3bcc:	1409      	addi      	r14, r14, 36
+    3bce:	1494      	pop      	r4-r7, r15
+					if(c_rly.wind_LOW_vol != SetVol){
+    3bd0:	88e9      	ld.h      	r7, (r0, 0x12)
+    3bd2:	649e      	cmpne      	r7, r2
+    3bd4:	0fc7      	bf      	0x3b62	// 3b62 <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_LOW_vol = SetVol;
+    3bd6:	a849      	st.h      	r2, (r0, 0x12)
+    3bd8:	07c3      	br      	0x3b5e	// 3b5e <BLV_WINDOUT_CMD_SET_Processing+0x36>
+					if(c_rly.wind_MID_vol != SetVol){
+    3bda:	88ea      	ld.h      	r7, (r0, 0x14)
+    3bdc:	649e      	cmpne      	r7, r2
+    3bde:	0fc2      	bf      	0x3b62	// 3b62 <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_MID_vol = SetVol;
+    3be0:	a84a      	st.h      	r2, (r0, 0x14)
+    3be2:	07be      	br      	0x3b5e	// 3b5e <BLV_WINDOUT_CMD_SET_Processing+0x36>
+					if(c_rly.wind_HIGH_vol != SetVol){
+    3be4:	88eb      	ld.h      	r7, (r0, 0x16)
+    3be6:	649e      	cmpne      	r7, r2
+    3be8:	0fbd      	bf      	0x3b62	// 3b62 <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_HIGH_vol = SetVol;
+    3bea:	a84b      	st.h      	r2, (r0, 0x16)
+    3bec:	07b9      	br      	0x3b5e	// 3b5e <BLV_WINDOUT_CMD_SET_Processing+0x36>
+	if(len < 15) return 0x01;
+    3bee:	3001      	movi      	r0, 1
+    3bf0:	07ee      	br      	0x3bcc	// 3bcc <BLV_WINDOUT_CMD_SET_Processing+0xa4>
+    3bf2:	0000      	bkpt
+    3bf4:	00002710 	.long	0x00002710
+    3bf8:	2000036c 	.long	0x2000036c
+    3bfc:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_WINDOUT_CMD_READ_Processing:
+
+00003c00 <BLV_WINDOUT_CMD_READ_Processing>:
+//4、读取各个风速档位的电压输出值
+U8_T BLV_WINDOUT_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3c00:	14d0      	push      	r15
+    3c02:	1429      	subi      	r14, r14, 36
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+    3c04:	8041      	ld.b      	r2, (r0, 0x1)
+    3c06:	330f      	movi      	r3, 15
+    3c08:	688c      	and      	r2, r3
+    3c0a:	1161      	lrw      	r3, 0x2000036c	// 3c8c <BLV_WINDOUT_CMD_READ_Processing+0x8c>
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3c0c:	1121      	lrw      	r1, 0x2000035c	// 3c90 <BLV_WINDOUT_CMD_READ_Processing+0x90>
+    3c0e:	8126      	ld.b      	r1, (r1, 0x6)
+	c_rly.SN = (data[1]&0x0F);
+    3c10:	a34c      	st.b      	r2, (r3, 0xc)
+	SendData[SendLen++] = c_rly.SN;
+    3c12:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3c16:	8042      	ld.b      	r2, (r0, 0x2)
+    3c18:	dc4e0006 	st.b      	r2, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3c1c:	8040      	ld.b      	r2, (r0, 0x0)
+    3c1e:	dc4e0007 	st.b      	r2, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3c22:	3200      	movi      	r2, 0
+    3c24:	dc4e0009 	st.b      	r2, (r14, 0x9)
+	SendData[SendLen++] = CMD_READ_WINDOUTVOL_REPLY;		//回复CMD
+    3c28:	3239      	movi      	r2, 57
+    3c2a:	dc4e000a 	st.b      	r2, (r14, 0xa)
+	SendData[SendLen++] = (c_rly.wind_STOP_vol & 0xFF);
+    3c2e:	8b48      	ld.h      	r2, (r3, 0x10)
+    3c30:	dc4e000b 	st.b      	r2, (r14, 0xb)
+	SendData[SendLen++] = (c_rly.wind_STOP_vol >> 8) & 0xFF;
+    3c34:	4a48      	lsri      	r2, r2, 8
+    3c36:	dc4e000c 	st.b      	r2, (r14, 0xc)
+	SendData[SendLen++] = (c_rly.wind_LOW_vol & 0xFF);
+    3c3a:	8b49      	ld.h      	r2, (r3, 0x12)
+    3c3c:	dc4e000d 	st.b      	r2, (r14, 0xd)
+	SendData[SendLen++] = (c_rly.wind_LOW_vol >> 8) & 0xFF;
+    3c40:	4a48      	lsri      	r2, r2, 8
+    3c42:	dc4e000e 	st.b      	r2, (r14, 0xe)
+	SendData[SendLen++] = (c_rly.wind_MID_vol & 0xFF);
+    3c46:	8b4a      	ld.h      	r2, (r3, 0x14)
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol & 0xFF);
+    3c48:	8b6b      	ld.h      	r3, (r3, 0x16)
+    3c4a:	dc6e0011 	st.b      	r3, (r14, 0x11)
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;
+    3c4e:	4b68      	lsri      	r3, r3, 8
+	SendData[SendLen++] = g_Dip.addr;
+    3c50:	dc2e0004 	st.b      	r1, (r14, 0x4)
+	SendData[SendLen++] = (c_rly.wind_MID_vol & 0xFF);
+    3c54:	dc4e000f 	st.b      	r2, (r14, 0xf)
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;
+    3c58:	dc6e0012 	st.b      	r3, (r14, 0x12)
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+    3c5c:	4a48      	lsri      	r2, r2, 8
+	
+	SendLen = 0x0F;
+	SendData[SEND_LEN] = SendLen;	//len
+    3c5e:	330f      	movi      	r3, 15
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3c60:	310f      	movi      	r1, 15
+    3c62:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+    3c64:	dc4e0010 	st.b      	r2, (r14, 0x10)
+	SendData[SEND_LEN] = SendLen;	//len
+    3c68:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3c6c:	e3fffe1b 	bsr      	0x38a2	// 38a2 <CheckSum2>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3c70:	3314      	movi      	r3, 20
+    3c72:	b860      	st.w      	r3, (r14, 0x0)
+    3c74:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3c76:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3c7a:	4361      	lsli      	r3, r3, 1
+    3c7c:	1801      	addi      	r0, r14, 4
+    3c7e:	3201      	movi      	r2, 1
+    3c80:	310f      	movi      	r1, 15
+    3c82:	e3fffc6d 	bsr      	0x355c	// 355c <Set_GroupSend>
+	
+	return 0x00;
+}
+    3c86:	3000      	movi      	r0, 0
+    3c88:	1409      	addi      	r14, r14, 36
+    3c8a:	1490      	pop      	r15
+    3c8c:	2000036c 	.long	0x2000036c
+    3c90:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_DEVPROT_CMD_SET_Processing:
+
+00003c94 <BLV_DEVPROT_CMD_SET_Processing>:
+
+//5、设置端口模式
+U8_T BLV_DEVPROT_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    3c94:	14d2      	push      	r4-r5, r15
+    3c96:	1429      	subi      	r14, r14, 36
+	if(len != 0x08)  return 0x01;
+    3c98:	3948      	cmpnei      	r1, 8
+{
+    3c9a:	6d43      	mov      	r5, r0
+	if(len != 0x08)  return 0x01;
+    3c9c:	0838      	bt      	0x3d0c	// 3d0c <BLV_DEVPROT_CMD_SET_Processing+0x78>
+	
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	if((data[SEND_PARA] == ACTIVE_PORT)||((data[SEND_PARA] == POLLING_PORT)))
+    3c9e:	8067      	ld.b      	r3, (r0, 0x7)
+    3ca0:	5b43      	subi      	r2, r3, 1
+    3ca2:	7488      	zextb      	r2, r2
+    3ca4:	3a01      	cmphsi      	r2, 2
+    3ca6:	0835      	bt      	0x3d10	// 3d10 <BLV_DEVPROT_CMD_SET_Processing+0x7c>
+	{
+		if(data[SEND_PARA]  != c_rly.dev_port){
+    3ca8:	109b      	lrw      	r4, 0x2000036c	// 3d14 <BLV_DEVPROT_CMD_SET_Processing+0x80>
+    3caa:	844b      	ld.b      	r2, (r4, 0xb)
+    3cac:	64ca      	cmpne      	r2, r3
+    3cae:	0c04      	bf      	0x3cb6	// 3cb6 <BLV_DEVPROT_CMD_SET_Processing+0x22>
+			c_rly.dev_port = data[SEND_PARA];
+    3cb0:	a46b      	st.b      	r3, (r4, 0xb)
+			
+			EEPROM_WritePara();	//保存flash
+    3cb2:	e0000231 	bsr      	0x4114	// 4114 <EEPROM_WritePara>
+		}
+	}else{
+		return 0x02;//设置的端口不合法
+	}
+	
+	c_rly.SN = (data[1]&0x0F);
+    3cb6:	8561      	ld.b      	r3, (r5, 0x1)
+    3cb8:	320f      	movi      	r2, 15
+    3cba:	68c8      	and      	r3, r2
+    3cbc:	a46c      	st.b      	r3, (r4, 0xc)
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+    3cbe:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3cc2:	8562      	ld.b      	r3, (r5, 0x2)
+    3cc4:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3cc8:	8560      	ld.b      	r3, (r5, 0x0)
+    3cca:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3cce:	3300      	movi      	r3, 0
+    3cd0:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_SET_DEVPORT_REPLY;		//回复CMD
+    3cd4:	3338      	movi      	r3, 56
+	SendData[SendLen++] = g_Dip.addr;
+    3cd6:	1051      	lrw      	r2, 0x2000035c	// 3d18 <BLV_DEVPROT_CMD_SET_Processing+0x84>
+    3cd8:	8246      	ld.b      	r2, (r2, 0x6)
+	SendData[SendLen++] = CMD_SET_DEVPORT_REPLY;		//回复CMD
+    3cda:	dc6e000a 	st.b      	r3, (r14, 0xa)
+
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3cde:	3107      	movi      	r1, 7
+	SendData[SEND_LEN] = SendLen;	//len
+    3ce0:	3307      	movi      	r3, 7
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3ce2:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = g_Dip.addr;
+    3ce4:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SEND_LEN] = SendLen;	//len
+    3ce8:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3cec:	e3fffddb 	bsr      	0x38a2	// 38a2 <CheckSum2>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3cf0:	3314      	movi      	r3, 20
+    3cf2:	b860      	st.w      	r3, (r14, 0x0)
+    3cf4:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3cf6:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3cfa:	4361      	lsli      	r3, r3, 1
+    3cfc:	1801      	addi      	r0, r14, 4
+    3cfe:	3201      	movi      	r2, 1
+    3d00:	3107      	movi      	r1, 7
+    3d02:	e3fffc2d 	bsr      	0x355c	// 355c <Set_GroupSend>
+    3d06:	3000      	movi      	r0, 0
+
+	return 0x00;
+}
+    3d08:	1409      	addi      	r14, r14, 36
+    3d0a:	1492      	pop      	r4-r5, r15
+	if(len != 0x08)  return 0x01;
+    3d0c:	3001      	movi      	r0, 1
+    3d0e:	07fd      	br      	0x3d08	// 3d08 <BLV_DEVPROT_CMD_SET_Processing+0x74>
+		return 0x02;//设置的端口不合法
+    3d10:	3002      	movi      	r0, 2
+    3d12:	07fb      	br      	0x3d08	// 3d08 <BLV_DEVPROT_CMD_SET_Processing+0x74>
+    3d14:	2000036c 	.long	0x2000036c
+    3d18:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_DEVPROT_CMD_READ_Processing:
+
+00003d1c <BLV_DEVPROT_CMD_READ_Processing>:
+
+
+
+//6、读取端口模式
+U8_T BLV_DEVPROT_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3d1c:	14d0      	push      	r15
+    3d1e:	1429      	subi      	r14, r14, 36
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+    3d20:	8061      	ld.b      	r3, (r0, 0x1)
+    3d22:	320f      	movi      	r2, 15
+    3d24:	68c8      	and      	r3, r2
+    3d26:	1059      	lrw      	r2, 0x2000036c	// 3d88 <BLV_DEVPROT_CMD_READ_Processing+0x6c>
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3d28:	1039      	lrw      	r1, 0x2000035c	// 3d8c <BLV_DEVPROT_CMD_READ_Processing+0x70>
+    3d2a:	8126      	ld.b      	r1, (r1, 0x6)
+	c_rly.SN = (data[1]&0x0F);
+    3d2c:	a26c      	st.b      	r3, (r2, 0xc)
+	SendData[SendLen++] = c_rly.SN;
+    3d2e:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3d32:	8062      	ld.b      	r3, (r0, 0x2)
+    3d34:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3d38:	8060      	ld.b      	r3, (r0, 0x0)
+    3d3a:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3d3e:	3300      	movi      	r3, 0
+    3d40:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_READ_DEVPORT_REPLY;		//回复CMD
+    3d44:	333a      	movi      	r3, 58
+    3d46:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	SendData[SendLen++] = c_rly.dev_port;		//端口模式
+    3d4a:	826b      	ld.b      	r3, (r2, 0xb)
+    3d4c:	dc6e000b 	st.b      	r3, (r14, 0xb)
+	SendData[SendLen++] = Project_FW_Version;	//软件版本号
+    3d50:	3301      	movi      	r3, 1
+	SendData[SendLen++] = g_Dip.addr;
+    3d52:	dc2e0004 	st.b      	r1, (r14, 0x4)
+	SendData[SendLen++] = Project_FW_Version;	//软件版本号
+    3d56:	dc6e000c 	st.b      	r3, (r14, 0xc)
+	SendData[SendLen++] = Project_HW_Version;	//硬件版本号
+    3d5a:	dc6e000d 	st.b      	r3, (r14, 0xd)
+	
+	SendLen = 0x0A;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3d5e:	310a      	movi      	r1, 10
+	SendData[SEND_LEN] = SendLen;	//len
+    3d60:	330a      	movi      	r3, 10
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3d62:	1801      	addi      	r0, r14, 4
+	SendData[SEND_LEN] = SendLen;	//len
+    3d64:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3d68:	e3fffd9d 	bsr      	0x38a2	// 38a2 <CheckSum2>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3d6c:	3314      	movi      	r3, 20
+    3d6e:	b860      	st.w      	r3, (r14, 0x0)
+    3d70:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum2(SendData,SendLen);
+    3d72:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3d76:	4361      	lsli      	r3, r3, 1
+    3d78:	1801      	addi      	r0, r14, 4
+    3d7a:	3201      	movi      	r2, 1
+    3d7c:	310a      	movi      	r1, 10
+    3d7e:	e3fffbef 	bsr      	0x355c	// 355c <Set_GroupSend>
+
+	return 0x00;
+}
+    3d82:	3000      	movi      	r0, 0
+    3d84:	1409      	addi      	r14, r14, 36
+    3d86:	1490      	pop      	r15
+    3d88:	2000036c 	.long	0x2000036c
+    3d8c:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_RLY_RS485_Pro:
+
+00003d90 <BLV_RLY_RS485_Pro>:
+
+U8_T BLV_RLY_RS485_Pro(U8_T *RecData, U16_T Len)
+{
+    3d90:	14d3      	push      	r4-r6, r15
+    3d92:	142d      	subi      	r14, r14, 52
+	U8_T ret = 0x00;
+	U8_T ckdata[50];
+	
+	if(Len < 0x05)
+    3d94:	3904      	cmphsi      	r1, 5
+{
+    3d96:	6d03      	mov      	r4, r0
+    3d98:	6d47      	mov      	r5, r1
+	if(Len < 0x05)
+    3d9a:	0808      	bt      	0x3daa	// 3daa <BLV_RLY_RS485_Pro+0x1a>
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Data Len Err");
+    3d9c:	1139      	lrw      	r1, 0x4daf	// 3e80 <BLV_RLY_RS485_Pro+0xf0>
+		return 0x01;
+	}
+	
+	if(RecData[4] !=  Len)
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check Err");
+    3d9e:	3000      	movi      	r0, 0
+    3da0:	e3fffc6a 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x01;
+    3da4:	3001      	movi      	r0, 1
+		case CMD_READ_DEVPORT:
+			BLV_DEVPROT_CMD_READ_Processing(RecData,Len);
+		break;		
+	}
+	
+}
+    3da6:	140d      	addi      	r14, r14, 52
+    3da8:	1493      	pop      	r4-r6, r15
+	if(RecData[4] !=  Len)
+    3daa:	80c4      	ld.b      	r6, (r0, 0x4)
+    3dac:	645a      	cmpne      	r6, r1
+    3dae:	0c03      	bf      	0x3db4	// 3db4 <BLV_RLY_RS485_Pro+0x24>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check Err");
+    3db0:	1135      	lrw      	r1, 0x4dbc	// 3e84 <BLV_RLY_RS485_Pro+0xf4>
+    3db2:	07f6      	br      	0x3d9e	// 3d9e <BLV_RLY_RS485_Pro+0xe>
+	if(RecData[2] !=  A9EXPANDTYPE)			//A9继电器设备类型
+    3db4:	8062      	ld.b      	r3, (r0, 0x2)
+    3db6:	3b4e      	cmpnei      	r3, 14
+    3db8:	0c07      	bf      	0x3dc6	// 3dc6 <BLV_RLY_RS485_Pro+0x36>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Type Check Err");
+    3dba:	3000      	movi      	r0, 0
+    3dbc:	1133      	lrw      	r1, 0x4dca	// 3e88 <BLV_RLY_RS485_Pro+0xf8>
+    3dbe:	e3fffc5b 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x02;		
+    3dc2:	3002      	movi      	r0, 2
+    3dc4:	07f1      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+	if(RecData[3] !=  g_Dip.addr)			//地址校验
+    3dc6:	1172      	lrw      	r3, 0x2000035c	// 3e8c <BLV_RLY_RS485_Pro+0xfc>
+    3dc8:	8043      	ld.b      	r2, (r0, 0x3)
+    3dca:	8366      	ld.b      	r3, (r3, 0x6)
+    3dcc:	64ca      	cmpne      	r2, r3
+    3dce:	0c07      	bf      	0x3ddc	// 3ddc <BLV_RLY_RS485_Pro+0x4c>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Addr Check Err ");	
+    3dd0:	3000      	movi      	r0, 0
+    3dd2:	1130      	lrw      	r1, 0x4dd9	// 3e90 <BLV_RLY_RS485_Pro+0x100>
+    3dd4:	e3fffc50 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x03;		
+    3dd8:	3003      	movi      	r0, 3
+    3dda:	07e6      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+	memcpy(ckdata,RecData,Len);
+    3ddc:	6c43      	mov      	r1, r0
+    3dde:	6c9b      	mov      	r2, r6
+    3de0:	6c3b      	mov      	r0, r14
+    3de2:	e3ffee11 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+	ckdata[SEND_SUM] = 0x00;
+    3de6:	3300      	movi      	r3, 0
+	if(CheckSum2(ckdata,Len) != RecData[SEND_SUM])		//和校验
+    3de8:	6c5b      	mov      	r1, r6
+    3dea:	6c3b      	mov      	r0, r14
+	ckdata[SEND_SUM] = 0x00;
+    3dec:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	if(CheckSum2(ckdata,Len) != RecData[SEND_SUM])		//和校验
+    3df0:	e3fffd59 	bsr      	0x38a2	// 38a2 <CheckSum2>
+    3df4:	8465      	ld.b      	r3, (r4, 0x5)
+    3df6:	640e      	cmpne      	r3, r0
+    3df8:	0c0c      	bf      	0x3e10	// 3e10 <BLV_RLY_RS485_Pro+0x80>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Sum Check Err: %02x",CheckSum(ckdata,Len));	
+    3dfa:	6c5b      	mov      	r1, r6
+    3dfc:	6c3b      	mov      	r0, r14
+    3dfe:	e3fffd47 	bsr      	0x388c	// 388c <CheckSum>
+    3e02:	6c83      	mov      	r2, r0
+    3e04:	1124      	lrw      	r1, 0x4de9	// 3e94 <BLV_RLY_RS485_Pro+0x104>
+    3e06:	3000      	movi      	r0, 0
+    3e08:	e3fffc36 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x05;		
+    3e0c:	3005      	movi      	r0, 5
+    3e0e:	07cc      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+    3e10:	320f      	movi      	r2, 15
+    3e12:	8461      	ld.b      	r3, (r4, 0x1)
+    3e14:	68c8      	and      	r3, r2
+	if((RecData[SEND_SN]&0x0F) == c_rly.SN)
+    3e16:	1141      	lrw      	r2, 0x2000036c	// 3e98 <BLV_RLY_RS485_Pro+0x108>
+    3e18:	824c      	ld.b      	r2, (r2, 0xc)
+    3e1a:	64ca      	cmpne      	r2, r3
+    3e1c:	0807      	bt      	0x3e2a	// 3e2a <BLV_RLY_RS485_Pro+0x9a>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"SN is Equal: %02x",c_rly.SN);	
+    3e1e:	3000      	movi      	r0, 0
+    3e20:	103f      	lrw      	r1, 0x4dfd	// 3e9c <BLV_RLY_RS485_Pro+0x10c>
+    3e22:	e3fffc29 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x00;
+    3e26:	3000      	movi      	r0, 0
+    3e28:	07bf      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+	switch(RecData[0x06])
+    3e2a:	8406      	ld.b      	r0, (r4, 0x6)
+    3e2c:	281f      	subi      	r0, 32
+    3e2e:	380a      	cmphsi      	r0, 11
+    3e30:	0bbb      	bt      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+    3e32:	e3ffe765 	bsr      	0xcfc	// cfc <___gnu_csky_case_sqi>
+    3e36:	b806      	.short	0xb806
+    3e38:	b80bb8b8 	.long	0xb80bb8b8
+    3e3c:	151a10b8 	.long	0x151a10b8
+    3e40:	001f      	.short	0x001f
+			BLV_A9RLY_CMD_SET_Processing(RecData,Len);
+    3e42:	6c57      	mov      	r1, r5
+    3e44:	6c13      	mov      	r0, r4
+    3e46:	e3fffdd9 	bsr      	0x39f8	// 39f8 <BLV_A9RLY_CMD_SET_Processing>
+		break;
+    3e4a:	07ae      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+			BLV_A9RLY_CMD_READ_Processing(RecData,Len);
+    3e4c:	6c57      	mov      	r1, r5
+    3e4e:	6c13      	mov      	r0, r4
+    3e50:	e3fffe26 	bsr      	0x3a9c	// 3a9c <BLV_A9RLY_CMD_READ_Processing>
+		break;
+    3e54:	07a9      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+			BLV_WINDOUT_CMD_SET_Processing(RecData,Len);
+    3e56:	6c57      	mov      	r1, r5
+    3e58:	6c13      	mov      	r0, r4
+    3e5a:	e3fffe67 	bsr      	0x3b28	// 3b28 <BLV_WINDOUT_CMD_SET_Processing>
+		break;
+    3e5e:	07a4      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+			BLV_WINDOUT_CMD_READ_Processing(RecData,Len);
+    3e60:	6c57      	mov      	r1, r5
+    3e62:	6c13      	mov      	r0, r4
+    3e64:	e3fffece 	bsr      	0x3c00	// 3c00 <BLV_WINDOUT_CMD_READ_Processing>
+		break;		
+    3e68:	079f      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+			BLV_DEVPROT_CMD_SET_Processing(RecData,Len);
+    3e6a:	6c57      	mov      	r1, r5
+    3e6c:	6c13      	mov      	r0, r4
+    3e6e:	e3ffff13 	bsr      	0x3c94	// 3c94 <BLV_DEVPROT_CMD_SET_Processing>
+		break;
+    3e72:	079a      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+			BLV_DEVPROT_CMD_READ_Processing(RecData,Len);
+    3e74:	6c57      	mov      	r1, r5
+    3e76:	6c13      	mov      	r0, r4
+    3e78:	e3ffff52 	bsr      	0x3d1c	// 3d1c <BLV_DEVPROT_CMD_READ_Processing>
+}
+    3e7c:	0795      	br      	0x3da6	// 3da6 <BLV_RLY_RS485_Pro+0x16>
+    3e7e:	0000      	bkpt
+    3e80:	00004daf 	.long	0x00004daf
+    3e84:	00004dbc 	.long	0x00004dbc
+    3e88:	00004dca 	.long	0x00004dca
+    3e8c:	2000035c 	.long	0x2000035c
+    3e90:	00004dd9 	.long	0x00004dd9
+    3e94:	00004de9 	.long	0x00004de9
+    3e98:	2000036c 	.long	0x2000036c
+    3e9c:	00004dfd 	.long	0x00004dfd
+
+Disassembly of section .text.CTRL_LEDStatus_Task:
+
+00003ea0 <CTRL_LEDStatus_Task>:
+
+
+
+void CTRL_LEDStatus_Task(void)
+{
+    3ea0:	14d0      	push      	r15
+	static U32_T Ctrl_LED_tick = 0x00;
+	
+	if(SysTick_1ms - Ctrl_LED_tick >= 500)
+    3ea2:	1029      	lrw      	r1, 0x200000a4	// 3ec4 <CTRL_LEDStatus_Task+0x24>
+    3ea4:	1049      	lrw      	r2, 0x200000bc	// 3ec8 <CTRL_LEDStatus_Task+0x28>
+    3ea6:	9160      	ld.w      	r3, (r1, 0x0)
+    3ea8:	9200      	ld.w      	r0, (r2, 0x0)
+    3eaa:	60c2      	subu      	r3, r0
+    3eac:	1008      	lrw      	r0, 0x1f3	// 3ecc <CTRL_LEDStatus_Task+0x2c>
+    3eae:	64c0      	cmphs      	r0, r3
+    3eb0:	0808      	bt      	0x3ec0	// 3ec0 <CTRL_LEDStatus_Task+0x20>
+	{
+		Ctrl_LED_tick = SysTick_1ms;
+    3eb2:	9160      	ld.w      	r3, (r1, 0x0)
+    3eb4:	b260      	st.w      	r3, (r2, 0x0)
+		
+		REVERISE_STATUS;
+    3eb6:	3104      	movi      	r1, 4
+    3eb8:	1066      	lrw      	r3, 0x2000004c	// 3ed0 <CTRL_LEDStatus_Task+0x30>
+    3eba:	9300      	ld.w      	r0, (r3, 0x0)
+    3ebc:	e3fff13e 	bsr      	0x2138	// 2138 <GPIO_Reverse>
+	}
+    3ec0:	1490      	pop      	r15
+    3ec2:	0000      	bkpt
+    3ec4:	200000a4 	.long	0x200000a4
+    3ec8:	200000bc 	.long	0x200000bc
+    3ecc:	000001f3 	.long	0x000001f3
+    3ed0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.EEPROM_CheckSum:
+
+00003ed4 <EEPROM_CheckSum>:
+#include "includes.h"
+
+E_MCU_DEV_INFO g_mcu_dev;
+
+U8_T EEPROM_CheckSum(U8_T *data,U16_T len)
+{
+    3ed4:	6cc3      	mov      	r3, r0
+    3ed6:	6040      	addu      	r1, r0
+	U8_T data_sum = 0;
+    3ed8:	3000      	movi      	r0, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    3eda:	644e      	cmpne      	r3, r1
+    3edc:	0802      	bt      	0x3ee0	// 3ee0 <EEPROM_CheckSum+0xc>
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+}
+    3ede:	783c      	jmp      	r15
+		data_sum += data[i];
+    3ee0:	8340      	ld.b      	r2, (r3, 0x0)
+    3ee2:	6008      	addu      	r0, r2
+    3ee4:	7400      	zextb      	r0, r0
+    3ee6:	2300      	addi      	r3, 1
+    3ee8:	07f9      	br      	0x3eda	// 3eda <EEPROM_CheckSum+0x6>
+
+Disassembly of section .text.EEPROM_ReadPara:
+
+00003eec <EEPROM_ReadPara>:
+* Description    : 读取参数
+* Parameter		 :
+* 		info	：读取参数指针
+*******************************************************************************/
+U8_T EEPROM_ReadPara(void)
+{
+    3eec:	14d1      	push      	r4, r15
+    3eee:	1430      	subi      	r14, r14, 64
+	U32_T temp_addr = EEPROM_PARA_SaveAddr;
+	U8_T read_info[10];
+	U8_T para_data[EEPROM_PARA_Size];
+	UINT16 read_len = 0;
+	
+	memset(read_info,0,sizeof(read_info));
+    3ef0:	6c3b      	mov      	r0, r14
+    3ef2:	320a      	movi      	r2, 10
+    3ef4:	3100      	movi      	r1, 0
+    3ef6:	e3ffed43 	bsr      	0x197c	// 197c <__memset_fast>
+	memset(para_data,0,sizeof(para_data));
+    3efa:	3232      	movi      	r2, 50
+    3efc:	3100      	movi      	r1, 0
+    3efe:	1803      	addi      	r0, r14, 12
+    3f00:	e3ffed3e 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	ReadDataArry_U8(temp_addr,4,read_info);
+    3f04:	6cbb      	mov      	r2, r14
+    3f06:	3104      	movi      	r1, 4
+    3f08:	1214      	lrw      	r0, 0x10000100	// 4058 <EEPROM_ReadPara+0x16c>
+    3f0a:	e3fff3bb 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+	
+	if(read_info[0] == EEPROM_SAVE_Flag){
+    3f0e:	d84e0000 	ld.b      	r2, (r14, 0x0)
+    3f12:	33a5      	movi      	r3, 165
+    3f14:	64ca      	cmpne      	r2, r3
+    3f16:	1292      	lrw      	r4, 0x2000036c	// 405c <EEPROM_ReadPara+0x170>
+    3f18:	0872      	bt      	0x3ffc	// 3ffc <EEPROM_ReadPara+0x110>
+		read_len = read_info[2];
+		read_len <<= 8;
+		read_len |= read_info[1];
+    3f1a:	d86e0002 	ld.b      	r3, (r14, 0x2)
+    3f1e:	d84e0001 	ld.b      	r2, (r14, 0x1)
+    3f22:	4368      	lsli      	r3, r3, 8
+		
+		if((read_len <= EEPROM_PARA_Size) && (read_len == 0x0A)){
+    3f24:	6cc8      	or      	r3, r2
+    3f26:	3b4a      	cmpnei      	r3, 10
+    3f28:	086a      	bt      	0x3ffc	// 3ffc <EEPROM_ReadPara+0x110>
+			temp_addr += EEPROM_Data_Offset;
+			ReadDataArry_U8(temp_addr,read_len,para_data);
+    3f2a:	1a03      	addi      	r2, r14, 12
+    3f2c:	310a      	movi      	r1, 10
+    3f2e:	120d      	lrw      	r0, 0x10000104	// 4060 <EEPROM_ReadPara+0x174>
+    3f30:	e3fff3a8 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+			if(CheckSum(para_data,read_len) == read_info[3]){
+    3f34:	310a      	movi      	r1, 10
+    3f36:	1803      	addi      	r0, r14, 12
+    3f38:	e3fffcaa 	bsr      	0x388c	// 388c <CheckSum>
+    3f3c:	d86e0003 	ld.b      	r3, (r14, 0x3)
+    3f40:	640e      	cmpne      	r3, r0
+    3f42:	085d      	bt      	0x3ffc	// 3ffc <EEPROM_ReadPara+0x110>
+				//校验成功 - 读取参数
+				c_rly.wind_STOP_vol = (para_data[0] + (para_data[1]<<8));
+    3f44:	d86e000d 	ld.b      	r3, (r14, 0xd)
+    3f48:	d84e000c 	ld.b      	r2, (r14, 0xc)
+    3f4c:	4368      	lsli      	r3, r3, 8
+    3f4e:	60c8      	addu      	r3, r2
+    3f50:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_STOP_vol > 10000){
+    3f52:	1245      	lrw      	r2, 0x2710	// 4064 <EEPROM_ReadPara+0x178>
+    3f54:	64c8      	cmphs      	r2, r3
+    3f56:	0c48      	bf      	0x3fe6	// 3fe6 <EEPROM_ReadPara+0xfa>
+					c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+    3f58:	ac68      	st.h      	r3, (r4, 0x10)
+				}
+				
+				c_rly.wind_LOW_vol = (para_data[2] + (para_data[3]<<8));
+    3f5a:	d86e000f 	ld.b      	r3, (r14, 0xf)
+    3f5e:	d84e000e 	ld.b      	r2, (r14, 0xe)
+    3f62:	4368      	lsli      	r3, r3, 8
+    3f64:	60c8      	addu      	r3, r2
+    3f66:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_LOW_vol > 10000){
+    3f68:	115f      	lrw      	r2, 0x2710	// 4064 <EEPROM_ReadPara+0x178>
+    3f6a:	64c8      	cmphs      	r2, r3
+    3f6c:	0c3f      	bf      	0x3fea	// 3fea <EEPROM_ReadPara+0xfe>
+					c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+    3f6e:	ac69      	st.h      	r3, (r4, 0x12)
+				}
+				
+				c_rly.wind_MID_vol = (para_data[4] + (para_data[5]<<8));
+    3f70:	d86e0011 	ld.b      	r3, (r14, 0x11)
+    3f74:	d84e0010 	ld.b      	r2, (r14, 0x10)
+    3f78:	4368      	lsli      	r3, r3, 8
+    3f7a:	60c8      	addu      	r3, r2
+    3f7c:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_MID_vol > 10000){
+    3f7e:	115a      	lrw      	r2, 0x2710	// 4064 <EEPROM_ReadPara+0x178>
+    3f80:	64c8      	cmphs      	r2, r3
+    3f82:	0c36      	bf      	0x3fee	// 3fee <EEPROM_ReadPara+0x102>
+					c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+    3f84:	ac6a      	st.h      	r3, (r4, 0x14)
+				}
+				
+				c_rly.wind_HIGH_vol = (para_data[6] + (para_data[7]<<8));
+    3f86:	d86e0013 	ld.b      	r3, (r14, 0x13)
+    3f8a:	d84e0012 	ld.b      	r2, (r14, 0x12)
+    3f8e:	4368      	lsli      	r3, r3, 8
+    3f90:	60c8      	addu      	r3, r2
+    3f92:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_HIGH_vol > 10000){
+    3f94:	1154      	lrw      	r2, 0x2710	// 4064 <EEPROM_ReadPara+0x178>
+    3f96:	64c8      	cmphs      	r2, r3
+    3f98:	0c2d      	bf      	0x3ff2	// 3ff2 <EEPROM_ReadPara+0x106>
+				c_rly.wind_HIGH_vol = (para_data[6] + (para_data[7]<<8));
+    3f9a:	ac6b      	st.h      	r3, (r4, 0x16)
+					c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+				}				
+				
+				//设备端口模式
+				c_rly.dev_port = para_data[9];
+    3f9c:	d84e0015 	ld.b      	r2, (r14, 0x15)
+				if((c_rly.dev_port != ACTIVE_PORT)&&(c_rly.dev_port != POLLING_PORT))
+    3fa0:	5a63      	subi      	r3, r2, 1
+    3fa2:	74cc      	zextb      	r3, r3
+    3fa4:	3b01      	cmphsi      	r3, 2
+    3fa6:	0828      	bt      	0x3ff6	// 3ff6 <EEPROM_ReadPara+0x10a>
+				c_rly.dev_port = para_data[9];
+    3fa8:	a44b      	st.b      	r2, (r4, 0xb)
+				{
+					c_rly.dev_port = POLLING_PORT;
+				}
+
+
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_STOP_vol : %d",c_rly.wind_STOP_vol);
+    3faa:	8c48      	ld.h      	r2, (r4, 0x10)
+    3fac:	112f      	lrw      	r1, 0x4e0f	// 4068 <EEPROM_ReadPara+0x17c>
+    3fae:	3000      	movi      	r0, 0
+    3fb0:	e3fffb62 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_LOW_vol  : %d",c_rly.wind_LOW_vol);
+    3fb4:	8c49      	ld.h      	r2, (r4, 0x12)
+    3fb6:	112e      	lrw      	r1, 0x4e32	// 406c <EEPROM_ReadPara+0x180>
+    3fb8:	3000      	movi      	r0, 0
+    3fba:	e3fffb5d 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_MID_vol  : %d",c_rly.wind_MID_vol);
+    3fbe:	8c4a      	ld.h      	r2, (r4, 0x14)
+    3fc0:	112c      	lrw      	r1, 0x4e55	// 4070 <EEPROM_ReadPara+0x184>
+    3fc2:	3000      	movi      	r0, 0
+    3fc4:	e3fffb58 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+    3fc8:	8c4b      	ld.h      	r2, (r4, 0x16)
+    3fca:	112b      	lrw      	r1, 0x4e78	// 4074 <EEPROM_ReadPara+0x188>
+    3fcc:	3000      	movi      	r0, 0
+    3fce:	e3fffb53 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara dev_port      : %d",c_rly.dev_port);				
+    3fd2:	3000      	movi      	r0, 0
+    3fd4:	844b      	ld.b      	r2, (r4, 0xb)
+    3fd6:	1129      	lrw      	r1, 0x4e9b	// 4078 <EEPROM_ReadPara+0x18c>
+    3fd8:	e3fffb4e 	bsr      	0x3674	// 3674 <Dbg_Println>
+				SYSCON_IWDCNT_Reload(); 
+    3fdc:	e3ffee64 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+				return 0x00;
+    3fe0:	3000      	movi      	r0, 0
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_MID_vol  : %d",c_rly.wind_MID_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"dev_port      : %d",c_rly.dev_port);		
+	SYSCON_IWDCNT_Reload(); 
+	return 0x01;
+}
+    3fe2:	1410      	addi      	r14, r14, 64
+    3fe4:	1491      	pop      	r4, r15
+					c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+    3fe6:	3300      	movi      	r3, 0
+    3fe8:	07b8      	br      	0x3f58	// 3f58 <EEPROM_ReadPara+0x6c>
+					c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+    3fea:	116b      	lrw      	r3, 0xbb8	// 4094 <EEPROM_ReadPara+0x1a8>
+    3fec:	07c1      	br      	0x3f6e	// 3f6e <EEPROM_ReadPara+0x82>
+					c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+    3fee:	116b      	lrw      	r3, 0x1770	// 4098 <EEPROM_ReadPara+0x1ac>
+    3ff0:	07ca      	br      	0x3f84	// 3f84 <EEPROM_ReadPara+0x98>
+					c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+    3ff2:	ac4b      	st.h      	r2, (r4, 0x16)
+    3ff4:	07d4      	br      	0x3f9c	// 3f9c <EEPROM_ReadPara+0xb0>
+					c_rly.dev_port = POLLING_PORT;
+    3ff6:	3301      	movi      	r3, 1
+    3ff8:	a46b      	st.b      	r3, (r4, 0xb)
+    3ffa:	07d8      	br      	0x3faa	// 3faa <EEPROM_ReadPara+0xbe>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara Default!");
+    3ffc:	1120      	lrw      	r1, 0x4ebe	// 407c <EEPROM_ReadPara+0x190>
+    3ffe:	3000      	movi      	r0, 0
+    4000:	e3fffb3a 	bsr      	0x3674	// 3674 <Dbg_Println>
+	c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+    4004:	3300      	movi      	r3, 0
+    4006:	ac68      	st.h      	r3, (r4, 0x10)
+	c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+    4008:	1163      	lrw      	r3, 0xbb8	// 4094 <EEPROM_ReadPara+0x1a8>
+    400a:	ac69      	st.h      	r3, (r4, 0x12)
+	c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+    400c:	1163      	lrw      	r3, 0x1770	// 4098 <EEPROM_ReadPara+0x1ac>
+    400e:	ac6a      	st.h      	r3, (r4, 0x14)
+	c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+    4010:	1163      	lrw      	r3, 0x2710	// 409c <EEPROM_ReadPara+0x1b0>
+    4012:	ac6b      	st.h      	r3, (r4, 0x16)
+	c_rly.dev_port = POLLING_PORT;
+    4014:	3301      	movi      	r3, 1
+    4016:	a46b      	st.b      	r3, (r4, 0xb)
+	SYSCON_IWDCNT_Reload(); 
+    4018:	e3ffee46 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_STOP_vol : %d",c_rly.wind_STOP_vol);
+    401c:	8c48      	ld.h      	r2, (r4, 0x10)
+    401e:	1039      	lrw      	r1, 0x4e1f	// 4080 <EEPROM_ReadPara+0x194>
+    4020:	3000      	movi      	r0, 0
+    4022:	e3fffb29 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_LOW_vol  : %d",c_rly.wind_LOW_vol);
+    4026:	8c49      	ld.h      	r2, (r4, 0x12)
+    4028:	1037      	lrw      	r1, 0x4e42	// 4084 <EEPROM_ReadPara+0x198>
+    402a:	3000      	movi      	r0, 0
+    402c:	e3fffb24 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_MID_vol  : %d",c_rly.wind_MID_vol);
+    4030:	8c4a      	ld.h      	r2, (r4, 0x14)
+    4032:	1036      	lrw      	r1, 0x4e65	// 4088 <EEPROM_ReadPara+0x19c>
+    4034:	3000      	movi      	r0, 0
+    4036:	e3fffb1f 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+    403a:	8c4b      	ld.h      	r2, (r4, 0x16)
+    403c:	1034      	lrw      	r1, 0x4e88	// 408c <EEPROM_ReadPara+0x1a0>
+    403e:	3000      	movi      	r0, 0
+    4040:	e3fffb1a 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"dev_port      : %d",c_rly.dev_port);		
+    4044:	3000      	movi      	r0, 0
+    4046:	844b      	ld.b      	r2, (r4, 0xb)
+    4048:	1032      	lrw      	r1, 0x4eab	// 4090 <EEPROM_ReadPara+0x1a4>
+    404a:	e3fffb15 	bsr      	0x3674	// 3674 <Dbg_Println>
+	SYSCON_IWDCNT_Reload(); 
+    404e:	e3ffee2b 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+	return 0x01;
+    4052:	3001      	movi      	r0, 1
+    4054:	07c7      	br      	0x3fe2	// 3fe2 <EEPROM_ReadPara+0xf6>
+    4056:	0000      	bkpt
+    4058:	10000100 	.long	0x10000100
+    405c:	2000036c 	.long	0x2000036c
+    4060:	10000104 	.long	0x10000104
+    4064:	00002710 	.long	0x00002710
+    4068:	00004e0f 	.long	0x00004e0f
+    406c:	00004e32 	.long	0x00004e32
+    4070:	00004e55 	.long	0x00004e55
+    4074:	00004e78 	.long	0x00004e78
+    4078:	00004e9b 	.long	0x00004e9b
+    407c:	00004ebe 	.long	0x00004ebe
+    4080:	00004e1f 	.long	0x00004e1f
+    4084:	00004e42 	.long	0x00004e42
+    4088:	00004e65 	.long	0x00004e65
+    408c:	00004e88 	.long	0x00004e88
+    4090:	00004eab 	.long	0x00004eab
+    4094:	00000bb8 	.long	0x00000bb8
+    4098:	00001770 	.long	0x00001770
+    409c:	00002710 	.long	0x00002710
+
+Disassembly of section .text.EEPROM_ValidateWrite:
+
+000040a0 <EEPROM_ValidateWrite>:
+
+/*******************************************************************************
+* Function Name  : EEPROM_ValidateWrite 
+* Description    : 校验写入参数
+*******************************************************************************/
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+    40a0:	1425      	subi      	r14, r14, 20
+    40a2:	dd0e2003 	st.w      	r8, (r14, 0xc)
+    40a6:	6e3b      	mov      	r8, r14
+    40a8:	b880      	st.w      	r4, (r14, 0x0)
+    40aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    40ac:	b8c2      	st.w      	r6, (r14, 0x8)
+    40ae:	ddee2004 	st.w      	r15, (r14, 0x10)
+	U8_T Read_para[Write_Len];
+    40b2:	5a6a      	addi      	r3, r2, 3
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+    40b4:	6d0b      	mov      	r4, r2
+	U8_T Read_para[Write_Len];
+    40b6:	4b62      	lsri      	r3, r3, 2
+    40b8:	3280      	movi      	r2, 128
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+    40ba:	6d83      	mov      	r6, r0
+    40bc:	6d47      	mov      	r5, r1
+	U8_T Read_para[Write_Len];
+    40be:	4362      	lsli      	r3, r3, 2
+    40c0:	4245      	lsli      	r2, r2, 5
+    40c2:	64c8      	cmphs      	r2, r3
+    40c4:	0806      	bt      	0x40d0	// 40d0 <EEPROM_ValidateWrite+0x30>
+    40c6:	638a      	subu      	r14, r2
+    40c8:	ddce2000 	st.w      	r14, (r14, 0x0)
+    40cc:	60ca      	subu      	r3, r2
+    40ce:	07fa      	br      	0x40c2	// 40c2 <EEPROM_ValidateWrite+0x22>
+    40d0:	638e      	subu      	r14, r3
+	U16_T i = 0;
+	
+	memset(Read_para,0,sizeof(Read_para));
+    40d2:	6c93      	mov      	r2, r4
+    40d4:	3100      	movi      	r1, 0
+    40d6:	6c3b      	mov      	r0, r14
+    40d8:	e3ffec52 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	ReadDataArry_U8(Eeprom_Write_SaveAddr,Write_Len,Read_para);
+    40dc:	6c53      	mov      	r1, r4
+    40de:	6cbb      	mov      	r2, r14
+    40e0:	6c1b      	mov      	r0, r6
+    40e2:	e3fff2cf 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+    40e6:	6138      	addu      	r4, r14
+    40e8:	6cfb      	mov      	r3, r14
+	for(i=0;i<Write_Len;i++){
+    40ea:	650e      	cmpne      	r3, r4
+    40ec:	080c      	bt      	0x4104	// 4104 <EEPROM_ValidateWrite+0x64>
+		if (Read_para[i]!=Write_Data[i]) {
+			return 0x01;
+		}
+	}
+	return 0x00;
+    40ee:	3000      	movi      	r0, 0
+}
+    40f0:	6fa3      	mov      	r14, r8
+    40f2:	d9ee2004 	ld.w      	r15, (r14, 0x10)
+    40f6:	d90e2003 	ld.w      	r8, (r14, 0xc)
+    40fa:	98c2      	ld.w      	r6, (r14, 0x8)
+    40fc:	98a1      	ld.w      	r5, (r14, 0x4)
+    40fe:	9880      	ld.w      	r4, (r14, 0x0)
+    4100:	1405      	addi      	r14, r14, 20
+    4102:	783c      	jmp      	r15
+		if (Read_para[i]!=Write_Data[i]) {
+    4104:	8320      	ld.b      	r1, (r3, 0x0)
+    4106:	8540      	ld.b      	r2, (r5, 0x0)
+    4108:	6486      	cmpne      	r1, r2
+    410a:	2300      	addi      	r3, 1
+    410c:	2500      	addi      	r5, 1
+    410e:	0fee      	bf      	0x40ea	// 40ea <EEPROM_ValidateWrite+0x4a>
+			return 0x01;
+    4110:	3001      	movi      	r0, 1
+    4112:	07ef      	br      	0x40f0	// 40f0 <EEPROM_ValidateWrite+0x50>
+
+Disassembly of section .text.EEPROM_WritePara:
+
+00004114 <EEPROM_WritePara>:
+/*******************************************************************************
+* Function Name  : EEPROM_WritePara 
+* Description    : 保存参数
+*******************************************************************************/
+U8_T EEPROM_WritePara(void)
+{
+    4114:	14d1      	push      	r4, r15
+    4116:	142f      	subi      	r14, r14, 60
+	U32_T temp_addr = EEPROM_PARA_SaveAddr;
+	U8_T save_para[EEPROM_PARA_Size+10];
+	UINT16 save_len = 0x0A;
+	
+	memset(save_para,0,sizeof(save_para));
+    4118:	6c3b      	mov      	r0, r14
+    411a:	323c      	movi      	r2, 60
+    411c:	3100      	movi      	r1, 0
+    411e:	e3ffec2f 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	if(save_len >= EEPROM_PARA_Size)	save_len = EEPROM_PARA_Size;
+	
+	save_para[0] = EEPROM_SAVE_Flag;
+    4122:	3300      	movi      	r3, 0
+    4124:	2b5a      	subi      	r3, 91
+    4126:	dc6e0000 	st.b      	r3, (r14, 0x0)
+	save_para[1] = save_len & 0xFF;
+    412a:	330a      	movi      	r3, 10
+    412c:	dc6e0001 	st.b      	r3, (r14, 0x1)
+	save_para[12] = g_Dip.addr;
+	save_para[13] = c_rly.dev_port;		//端口模式
+	
+	
+	
+	save_para[3] = CheckSum(&save_para[4],save_len);
+    4130:	310a      	movi      	r1, 10
+	save_para[4] = c_rly.wind_STOP_vol & 0xFF;
+    4132:	1160      	lrw      	r3, 0x2000036c	// 41b0 <EEPROM_WritePara+0x9c>
+    4134:	8b48      	ld.h      	r2, (r3, 0x10)
+    4136:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	save_para[5] = (c_rly.wind_STOP_vol >> 8) & 0xFF;	
+    413a:	4a48      	lsri      	r2, r2, 8
+    413c:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	save_para[6] = c_rly.wind_LOW_vol & 0xFF;
+    4140:	8b49      	ld.h      	r2, (r3, 0x12)
+    4142:	dc4e0006 	st.b      	r2, (r14, 0x6)
+	save_para[7] = (c_rly.wind_LOW_vol >> 8) & 0xFF;	
+    4146:	4a48      	lsri      	r2, r2, 8
+    4148:	dc4e0007 	st.b      	r2, (r14, 0x7)
+	save_para[8] = c_rly.wind_MID_vol & 0xFF;
+    414c:	8b4a      	ld.h      	r2, (r3, 0x14)
+    414e:	dc4e0008 	st.b      	r2, (r14, 0x8)
+	save_para[9] = (c_rly.wind_MID_vol >> 8) & 0xFF;	
+    4152:	4a48      	lsri      	r2, r2, 8
+    4154:	dc4e0009 	st.b      	r2, (r14, 0x9)
+	save_para[10] = c_rly.wind_HIGH_vol & 0xFF;
+    4158:	8b4b      	ld.h      	r2, (r3, 0x16)
+    415a:	dc4e000a 	st.b      	r2, (r14, 0xa)
+	save_para[11] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;	
+    415e:	4a48      	lsri      	r2, r2, 8
+    4160:	dc4e000b 	st.b      	r2, (r14, 0xb)
+	save_para[13] = c_rly.dev_port;		//端口模式
+    4164:	836b      	ld.b      	r3, (r3, 0xb)
+	save_para[12] = g_Dip.addr;
+    4166:	1054      	lrw      	r2, 0x2000035c	// 41b4 <EEPROM_WritePara+0xa0>
+    4168:	8246      	ld.b      	r2, (r2, 0x6)
+	save_para[3] = CheckSum(&save_para[4],save_len);
+    416a:	1801      	addi      	r0, r14, 4
+	save_para[13] = c_rly.dev_port;		//端口模式
+    416c:	dc6e000d 	st.b      	r3, (r14, 0xd)
+	save_para[12] = g_Dip.addr;
+    4170:	dc4e000c 	st.b      	r2, (r14, 0xc)
+	save_para[3] = CheckSum(&save_para[4],save_len);
+    4174:	e3fffb8c 	bsr      	0x388c	// 388c <CheckSum>
+    4178:	dc0e0003 	st.b      	r0, (r14, 0x3)
+	
+	save_len += 4;
+	Page_ProgramData(temp_addr,save_len,save_para);	
+    417c:	6cbb      	mov      	r2, r14
+    417e:	310e      	movi      	r1, 14
+    4180:	100e      	lrw      	r0, 0x10000100	// 41b8 <EEPROM_WritePara+0xa4>
+    4182:	e3fff22f 	bsr      	0x25e0	// 25e0 <Page_ProgramData>
+	
+	if(EEPROM_ValidateWrite(temp_addr,save_para,save_len)){
+    4186:	320e      	movi      	r2, 14
+    4188:	6c7b      	mov      	r1, r14
+    418a:	100c      	lrw      	r0, 0x10000100	// 41b8 <EEPROM_WritePara+0xa4>
+    418c:	e3ffff8a 	bsr      	0x40a0	// 40a0 <EEPROM_ValidateWrite>
+    4190:	3840      	cmpnei      	r0, 0
+    4192:	6d03      	mov      	r4, r0
+    4194:	0c09      	bf      	0x41a6	// 41a6 <EEPROM_WritePara+0x92>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para Err");
+    4196:	102a      	lrw      	r1, 0x4ed7	// 41bc <EEPROM_WritePara+0xa8>
+    4198:	3000      	movi      	r0, 0
+    419a:	e3fffa6d 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x01;
+    419e:	3401      	movi      	r4, 1
+	}	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para");
+	return 0;
+}
+    41a0:	6c13      	mov      	r0, r4
+    41a2:	140f      	addi      	r14, r14, 60
+    41a4:	1491      	pop      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para");
+    41a6:	1027      	lrw      	r1, 0x4ef6	// 41c0 <EEPROM_WritePara+0xac>
+    41a8:	3000      	movi      	r0, 0
+    41aa:	e3fffa65 	bsr      	0x3674	// 3674 <Dbg_Println>
+	return 0;
+    41ae:	07f9      	br      	0x41a0	// 41a0 <EEPROM_WritePara+0x8c>
+    41b0:	2000036c 	.long	0x2000036c
+    41b4:	2000035c 	.long	0x2000035c
+    41b8:	10000100 	.long	0x10000100
+    41bc:	00004ed7 	.long	0x00004ed7
+    41c0:	00004ef6 	.long	0x00004ef6
+
+Disassembly of section .text.EEPROM_ReadMCUDevInfo:
+
+000041c4 <EEPROM_ReadMCUDevInfo>:
+/*******************************************************************************
+* Function Name  : EEPROM_ReadMCUDevInfo 
+* Description    : 从EEPROM中读取设备信息
+*******************************************************************************/
+U8_T EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    41c4:	14d1      	push      	r4, r15
+    41c6:	1432      	subi      	r14, r14, 72
+    41c8:	6d03      	mov      	r4, r0
+	U8_T read_info[6];
+	U8_T para_data[EEPROM_DATA_Size_Max];
+	U16_T read_len = 0;
+	
+	memset(read_info,0,sizeof(read_info));
+    41ca:	3300      	movi      	r3, 0
+	memset(para_data,0,sizeof(para_data));
+    41cc:	3240      	movi      	r2, 64
+    41ce:	3100      	movi      	r1, 0
+    41d0:	1802      	addi      	r0, r14, 8
+	memset(read_info,0,sizeof(read_info));
+    41d2:	b860      	st.w      	r3, (r14, 0x0)
+    41d4:	dc6e1002 	st.h      	r3, (r14, 0x4)
+	memset(para_data,0,sizeof(para_data));
+    41d8:	e3ffebd2 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	ReadDataArry_U8(EEPROM_MCUDevInfo_Address,4,read_info);
+    41dc:	3080      	movi      	r0, 128
+    41de:	6cbb      	mov      	r2, r14
+    41e0:	3104      	movi      	r1, 4
+    41e2:	4015      	lsli      	r0, r0, 21
+    41e4:	e3fff24e 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+	
+	if(read_info[0] == EEPROM_SVAE_FLAG){
+    41e8:	d84e0000 	ld.b      	r2, (r14, 0x0)
+    41ec:	33ae      	movi      	r3, 174
+    41ee:	64ca      	cmpne      	r2, r3
+    41f0:	0c04      	bf      	0x41f8	// 41f8 <EEPROM_ReadMCUDevInfo+0x34>
+				return 0x00;
+			}
+		}
+	}
+	
+	return 0x01;
+    41f2:	3001      	movi      	r0, 1
+}
+    41f4:	1412      	addi      	r14, r14, 72
+    41f6:	1491      	pop      	r4, r15
+		read_len |= read_info[1];
+    41f8:	d82e0002 	ld.b      	r1, (r14, 0x2)
+    41fc:	d86e0001 	ld.b      	r3, (r14, 0x1)
+    4200:	4128      	lsli      	r1, r1, 8
+    4202:	6c4c      	or      	r1, r3
+		if(read_len <= EEPROM_DATA_Size_Max){
+    4204:	3340      	movi      	r3, 64
+    4206:	644c      	cmphs      	r3, r1
+    4208:	0ff5      	bf      	0x41f2	// 41f2 <EEPROM_ReadMCUDevInfo+0x2e>
+			ReadDataArry_U8(EEPROM_MCUDevInfo_Address+EEPROM_Offset_Data,read_len,para_data);
+    420a:	1a02      	addi      	r2, r14, 8
+    420c:	1009      	lrw      	r0, 0x10000004	// 4230 <EEPROM_ReadMCUDevInfo+0x6c>
+    420e:	e3fff239 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+			if(EEPROM_CheckSum(para_data,sizeof(E_MCU_DEV_INFO)) == read_info[3]){
+    4212:	3125      	movi      	r1, 37
+    4214:	1802      	addi      	r0, r14, 8
+    4216:	e3fffe5f 	bsr      	0x3ed4	// 3ed4 <EEPROM_CheckSum>
+    421a:	d86e0003 	ld.b      	r3, (r14, 0x3)
+    421e:	640e      	cmpne      	r3, r0
+    4220:	0be9      	bt      	0x41f2	// 41f2 <EEPROM_ReadMCUDevInfo+0x2e>
+				memcpy((uint8_t *)info,para_data,sizeof(E_MCU_DEV_INFO));
+    4222:	3225      	movi      	r2, 37
+    4224:	1902      	addi      	r1, r14, 8
+    4226:	6c13      	mov      	r0, r4
+    4228:	e3ffebee 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+				return 0x00;
+    422c:	3000      	movi      	r0, 0
+    422e:	07e3      	br      	0x41f4	// 41f4 <EEPROM_ReadMCUDevInfo+0x30>
+    4230:	10000004 	.long	0x10000004
+
+Disassembly of section .text.EEPROM_WriteMCUDevInfo:
+
+00004234 <EEPROM_WriteMCUDevInfo>:
+/*******************************************************************************
+* Function Name  : EEPROM_WriteMCUDevInfo 
+* Description    : 将设备信息写入到EEPROM中
+*******************************************************************************/
+U8_T EEPROM_WriteMCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    4234:	14d0      	push      	r15
+    4236:	1432      	subi      	r14, r14, 72
+	U8_T save_data[EEPROM_DATA_Size_Max + 6];
+	U16_T save_len = sizeof(E_MCU_DEV_INFO);
+	
+	if(save_len >= EEPROM_DATA_Size_Max) save_len = EEPROM_DATA_Size_Max;
+	
+	save_data[0] = EEPROM_SVAE_FLAG;
+    4238:	3300      	movi      	r3, 0
+    423a:	2b51      	subi      	r3, 82
+    423c:	dc6e0000 	st.b      	r3, (r14, 0x0)
+	save_data[1] = save_len & 0xFF;
+    4240:	3325      	movi      	r3, 37
+    4242:	dc6e0001 	st.b      	r3, (r14, 0x1)
+	save_data[2] = (save_len >> 8) & 0xFF;
+    4246:	3300      	movi      	r3, 0
+    4248:	dc6e0002 	st.b      	r3, (r14, 0x2)
+	
+	memcpy(&save_data[4],(uint8_t *)info,save_len);
+    424c:	1b01      	addi      	r3, r14, 4
+{
+    424e:	6c43      	mov      	r1, r0
+	memcpy(&save_data[4],(uint8_t *)info,save_len);
+    4250:	3225      	movi      	r2, 37
+    4252:	6c0f      	mov      	r0, r3
+    4254:	e3ffebd8 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+	
+	save_data[3] = EEPROM_CheckSum(&save_data[4],save_len);
+    4258:	3125      	movi      	r1, 37
+    425a:	e3fffe3d 	bsr      	0x3ed4	// 3ed4 <EEPROM_CheckSum>
+    425e:	dc0e0003 	st.b      	r0, (r14, 0x3)
+	
+	save_len+=4;
+	
+	Page_ProgramData(EEPROM_MCUDevInfo_Address,save_len,save_data);
+    4262:	3080      	movi      	r0, 128
+    4264:	4015      	lsli      	r0, r0, 21
+    4266:	6cbb      	mov      	r2, r14
+    4268:	3129      	movi      	r1, 41
+    426a:	e3fff1bb 	bsr      	0x25e0	// 25e0 <Page_ProgramData>
+	
+	return 0;
+}
+    426e:	3000      	movi      	r0, 0
+    4270:	1412      	addi      	r14, r14, 72
+    4272:	1490      	pop      	r15
+
+Disassembly of section .text.EEPROM_Default_MCUDevInfo:
+
+00004274 <EEPROM_Default_MCUDevInfo>:
+/*******************************************************************************
+* Function Name  : EEPROM_Default_MCUDevInfo 
+* Description    : EEPROM中参数恢复默认值，且将默认参数保存至EEPROM中
+*******************************************************************************/
+void EEPROM_Default_MCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    4274:	14d2      	push      	r4-r5, r15
+	memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+
+	EEPROM_WriteMCUDevInfo(info);
+#elif (Project_Area == 0x02)
+	/*APP 区域*/
+	info->dev_addr = 0x00;
+    4276:	3300      	movi      	r3, 0
+    4278:	a060      	st.b      	r3, (r0, 0x0)
+	info->dev_type = Project_Type;
+    427a:	a061      	st.b      	r3, (r0, 0x1)
+	info->dev_app_ver = Project_FW_Version;
+    427c:	3301      	movi      	r3, 1
+    427e:	a063      	st.b      	r3, (r0, 0x3)
+	info->dev_name_len = sizeof(Peoject_Name);
+
+	memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
+    4280:	58b2      	addi      	r5, r0, 5
+	info->dev_name_len = sizeof(Peoject_Name);
+    4282:	330f      	movi      	r3, 15
+    4284:	a064      	st.b      	r3, (r0, 0x4)
+{
+    4286:	6d03      	mov      	r4, r0
+	memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
+    4288:	3220      	movi      	r2, 32
+    428a:	3100      	movi      	r1, 0
+    428c:	6c17      	mov      	r0, r5
+    428e:	e3ffeb77 	bsr      	0x197c	// 197c <__memset_fast>
+	memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+    4292:	320f      	movi      	r2, 15
+    4294:	1024      	lrw      	r1, 0x4f11	// 42a4 <EEPROM_Default_MCUDevInfo+0x30>
+    4296:	6c17      	mov      	r0, r5
+    4298:	e3ffebb6 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+
+	EEPROM_WriteMCUDevInfo(info);
+    429c:	6c13      	mov      	r0, r4
+    429e:	e3ffffcb 	bsr      	0x4234	// 4234 <EEPROM_WriteMCUDevInfo>
+#endif
+}
+    42a2:	1492      	pop      	r4-r5, r15
+    42a4:	00004f11 	.long	0x00004f11
+
+Disassembly of section .text.EEPROM_Validate_MCUDevInfo:
+
+000042a8 <EEPROM_Validate_MCUDevInfo>:
+* Description    : 校验从EEPROM 中读取的参数是否正确，如果不正确的话，便将当前正确的参数写入
+		APP区域中，判断APP参数与EEPROM中记录的是否一致
+		Boot区域中，判断Boot参数与EEPROM中记录的是否一致
+*******************************************************************************/
+void EEPROM_Validate_MCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    42a8:	14d3      	push      	r4-r6, r15
+	}
+#elif (Project_Area == 0x02)
+	/*APP 区域*/
+	U8_T save_flag = 0;
+
+	if(info->dev_app_ver != Project_FW_Version)
+    42aa:	8063      	ld.b      	r3, (r0, 0x3)
+    42ac:	3b41      	cmpnei      	r3, 1
+{
+    42ae:	6d03      	mov      	r4, r0
+	if(info->dev_app_ver != Project_FW_Version)
+    42b0:	0c21      	bf      	0x42f2	// 42f2 <EEPROM_Validate_MCUDevInfo+0x4a>
+	{
+		info->dev_app_ver = Project_FW_Version;
+    42b2:	3301      	movi      	r3, 1
+    42b4:	a063      	st.b      	r3, (r0, 0x3)
+		save_flag = 0x01;
+    42b6:	3501      	movi      	r5, 1
+	}
+
+	if(info->dev_type != Project_Type)
+    42b8:	8461      	ld.b      	r3, (r4, 0x1)
+    42ba:	3b40      	cmpnei      	r3, 0
+    42bc:	0c04      	bf      	0x42c4	// 42c4 <EEPROM_Validate_MCUDevInfo+0x1c>
+	{
+		info->dev_type = Project_Type;
+    42be:	3300      	movi      	r3, 0
+    42c0:	a461      	st.b      	r3, (r4, 0x1)
+		save_flag = 0x01;
+    42c2:	3501      	movi      	r5, 1
+	}
+
+	if(info->dev_name_len != sizeof(Peoject_Name))
+    42c4:	8464      	ld.b      	r3, (r4, 0x4)
+    42c6:	3b4f      	cmpnei      	r3, 15
+    42c8:	0c04      	bf      	0x42d0	// 42d0 <EEPROM_Validate_MCUDevInfo+0x28>
+	{
+		info->dev_name_len = sizeof(Peoject_Name);
+    42ca:	330f      	movi      	r3, 15
+    42cc:	a464      	st.b      	r3, (r4, 0x4)
+		save_flag = 0x01;
+    42ce:	3501      	movi      	r5, 1
+	}
+
+	if(strncmp((char *)info->dev_name,(char *)Peoject_Name,sizeof(Peoject_Name)))
+    42d0:	5cd2      	addi      	r6, r4, 5
+    42d2:	320f      	movi      	r2, 15
+    42d4:	102a      	lrw      	r1, 0x4f11	// 42fc <EEPROM_Validate_MCUDevInfo+0x54>
+    42d6:	6c1b      	mov      	r0, r6
+    42d8:	e3ffebc8 	bsr      	0x1a68	// 1a68 <__GI_strncmp>
+    42dc:	3840      	cmpnei      	r0, 0
+    42de:	0c0c      	bf      	0x42f6	// 42f6 <EEPROM_Validate_MCUDevInfo+0x4e>
+	{
+		memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+    42e0:	8444      	ld.b      	r2, (r4, 0x4)
+    42e2:	1027      	lrw      	r1, 0x4f11	// 42fc <EEPROM_Validate_MCUDevInfo+0x54>
+    42e4:	6c1b      	mov      	r0, r6
+    42e6:	e3ffeb8f 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+		save_flag = 0x01;
+	}
+
+	if(save_flag == 0x01)
+	{
+		EEPROM_WriteMCUDevInfo(info);
+    42ea:	6c13      	mov      	r0, r4
+    42ec:	e3ffffa4 	bsr      	0x4234	// 4234 <EEPROM_WriteMCUDevInfo>
+	}
+#endif
+}
+    42f0:	0405      	br      	0x42fa	// 42fa <EEPROM_Validate_MCUDevInfo+0x52>
+	U8_T save_flag = 0;
+    42f2:	3500      	movi      	r5, 0
+    42f4:	07e2      	br      	0x42b8	// 42b8 <EEPROM_Validate_MCUDevInfo+0x10>
+	if(save_flag == 0x01)
+    42f6:	3d41      	cmpnei      	r5, 1
+    42f8:	0ff9      	bf      	0x42ea	// 42ea <EEPROM_Validate_MCUDevInfo+0x42>
+}
+    42fa:	1493      	pop      	r4-r6, r15
+    42fc:	00004f11 	.long	0x00004f11
+
+Disassembly of section .text.EEPROM_Init:
+
+00004300 <EEPROM_Init>:
+{
+    4300:	14d2      	push      	r4-r5, r15
+	EnIFCClk; //使能 IFC 时钟
+    4302:	1074      	lrw      	r3, 0x20000060	// 4350 <EEPROM_Init+0x50>
+    4304:	3201      	movi      	r2, 1
+    4306:	9360      	ld.w      	r3, (r3, 0x0)
+    4308:	b341      	st.w      	r2, (r3, 0x4)
+	IFC->MR |= 0x10002; //高速模式，延迟 2 个周期
+    430a:	9345      	ld.w      	r2, (r3, 0x14)
+    430c:	3aa1      	bseti      	r2, 1
+    430e:	3ab0      	bseti      	r2, 16
+    4310:	b345      	st.w      	r2, (r3, 0x14)
+	EEPROM_ReadPara();
+    4312:	e3fffded 	bsr      	0x3eec	// 3eec <EEPROM_ReadPara>
+	memset(&g_mcu_dev,0,sizeof(E_MCU_DEV_INFO));
+    4316:	1090      	lrw      	r4, 0x20000384	// 4354 <EEPROM_Init+0x54>
+    4318:	3225      	movi      	r2, 37
+    431a:	3100      	movi      	r1, 0
+    431c:	6c13      	mov      	r0, r4
+    431e:	e3ffeb2f 	bsr      	0x197c	// 197c <__memset_fast>
+	rev = EEPROM_ReadMCUDevInfo(&g_mcu_dev);
+    4322:	6c13      	mov      	r0, r4
+    4324:	e3ffff50 	bsr      	0x41c4	// 41c4 <EEPROM_ReadMCUDevInfo>
+	if(g_Dip.addr != g_mcu_dev.dev_addr){
+    4328:	106c      	lrw      	r3, 0x2000035c	// 4358 <EEPROM_Init+0x58>
+    432a:	8366      	ld.b      	r3, (r3, 0x6)
+    432c:	8440      	ld.b      	r2, (r4, 0x0)
+    432e:	64ca      	cmpne      	r2, r3
+	rev = EEPROM_ReadMCUDevInfo(&g_mcu_dev);
+    4330:	6d43      	mov      	r5, r0
+	if(g_Dip.addr != g_mcu_dev.dev_addr){
+    4332:	0c05      	bf      	0x433c	// 433c <EEPROM_Init+0x3c>
+		EEPROM_WriteMCUDevInfo(&g_mcu_dev);
+    4334:	6c13      	mov      	r0, r4
+		g_mcu_dev.dev_addr = g_Dip.addr;
+    4336:	a460      	st.b      	r3, (r4, 0x0)
+		EEPROM_WriteMCUDevInfo(&g_mcu_dev);
+    4338:	e3ffff7e 	bsr      	0x4234	// 4234 <EEPROM_WriteMCUDevInfo>
+	if(rev == 0x00){
+    433c:	3d40      	cmpnei      	r5, 0
+		EEPROM_Validate_MCUDevInfo(&g_mcu_dev);
+    433e:	1006      	lrw      	r0, 0x20000384	// 4354 <EEPROM_Init+0x54>
+	if(rev == 0x00){
+    4340:	0804      	bt      	0x4348	// 4348 <EEPROM_Init+0x48>
+		EEPROM_Validate_MCUDevInfo(&g_mcu_dev);
+    4342:	e3ffffb3 	bsr      	0x42a8	// 42a8 <EEPROM_Validate_MCUDevInfo>
+}
+    4346:	1492      	pop      	r4-r5, r15
+		EEPROM_Default_MCUDevInfo(&g_mcu_dev);
+    4348:	e3ffff96 	bsr      	0x4274	// 4274 <EEPROM_Default_MCUDevInfo>
+}
+    434c:	07fd      	br      	0x4346	// 4346 <EEPROM_Init+0x46>
+    434e:	0000      	bkpt
+    4350:	20000060 	.long	0x20000060
+    4354:	20000384 	.long	0x20000384
+    4358:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+0000435c <TK_Sampling_prog>:
+    435c:	14c4      	push      	r4-r7
+    435e:	1072      	lrw      	r3, 0x20000054	// 43a4 <TK_Sampling_prog+0x48>
+    4360:	1012      	lrw      	r0, 0x20000652	// 43a8 <TK_Sampling_prog+0x4c>
+    4362:	1093      	lrw      	r4, 0x200004c3	// 43ac <TK_Sampling_prog+0x50>
+    4364:	6d83      	mov      	r6, r0
+    4366:	93a0      	ld.w      	r5, (r3, 0x0)
+    4368:	3300      	movi      	r3, 0
+    436a:	4342      	lsli      	r2, r3, 2
+    436c:	6094      	addu      	r2, r5
+    436e:	9220      	ld.w      	r1, (r2, 0x0)
+    4370:	4341      	lsli      	r2, r3, 1
+    4372:	6080      	addu      	r2, r0
+    4374:	7445      	zexth      	r1, r1
+    4376:	aa20      	st.h      	r1, (r2, 0x0)
+    4378:	8440      	ld.b      	r2, (r4, 0x0)
+    437a:	3a41      	cmpnei      	r2, 1
+    437c:	080f      	bt      	0x439a	// 439a <TK_Sampling_prog+0x3e>
+    437e:	3300      	movi      	r3, 0
+    4380:	10ec      	lrw      	r7, 0x200003ac	// 43b0 <TK_Sampling_prog+0x54>
+    4382:	4341      	lsli      	r2, r3, 1
+    4384:	5e28      	addu      	r1, r6, r2
+    4386:	8920      	ld.h      	r1, (r1, 0x0)
+    4388:	2300      	addi      	r3, 1
+    438a:	7445      	zexth      	r1, r1
+    438c:	609c      	addu      	r2, r7
+    438e:	3b51      	cmpnei      	r3, 17
+    4390:	aa20      	st.h      	r1, (r2, 0x0)
+    4392:	0bf8      	bt      	0x4382	// 4382 <TK_Sampling_prog+0x26>
+    4394:	3300      	movi      	r3, 0
+    4396:	a460      	st.b      	r3, (r4, 0x0)
+    4398:	3311      	movi      	r3, 17
+    439a:	2300      	addi      	r3, 1
+    439c:	74cc      	zextb      	r3, r3
+    439e:	3b10      	cmphsi      	r3, 17
+    43a0:	0fe5      	bf      	0x436a	// 436a <TK_Sampling_prog+0xe>
+    43a2:	1484      	pop      	r4-r7
+    43a4:	20000054 	.long	0x20000054
+    43a8:	20000652 	.long	0x20000652
+    43ac:	200004c3 	.long	0x200004c3
+    43b0:	200003ac 	.long	0x200003ac
+
+Disassembly of section .text.TKEYIntHandler:
+
+000043b4 <TKEYIntHandler>:
+    43b4:	1460      	nie
+    43b6:	1462      	ipush
+    43b8:	14d1      	push      	r4, r15
+    43ba:	109e      	lrw      	r4, 0x20000068	// 4430 <TKEYIntHandler+0x7c>
+    43bc:	9460      	ld.w      	r3, (r4, 0x0)
+    43be:	3b40      	cmpnei      	r3, 0
+    43c0:	080b      	bt      	0x43d6	// 43d6 <TKEYIntHandler+0x22>
+    43c2:	3301      	movi      	r3, 1
+    43c4:	b460      	st.w      	r3, (r4, 0x0)
+    43c6:	107c      	lrw      	r3, 0x20000440	// 4434 <TKEYIntHandler+0x80>
+    43c8:	8360      	ld.b      	r3, (r3, 0x0)
+    43ca:	3b41      	cmpnei      	r3, 1
+    43cc:	0805      	bt      	0x43d6	// 43d6 <TKEYIntHandler+0x22>
+    43ce:	e3ffffc7 	bsr      	0x435c	// 435c <TK_Sampling_prog>
+    43d2:	3301      	movi      	r3, 1
+    43d4:	a464      	st.b      	r3, (r4, 0x4)
+    43d6:	1079      	lrw      	r3, 0x20000058	// 4438 <TKEYIntHandler+0x84>
+    43d8:	3101      	movi      	r1, 1
+    43da:	9360      	ld.w      	r3, (r3, 0x0)
+    43dc:	934a      	ld.w      	r2, (r3, 0x28)
+    43de:	6884      	and      	r2, r1
+    43e0:	3a40      	cmpnei      	r2, 0
+    43e2:	0c02      	bf      	0x43e6	// 43e6 <TKEYIntHandler+0x32>
+    43e4:	b32c      	st.w      	r1, (r3, 0x30)
+    43e6:	934a      	ld.w      	r2, (r3, 0x28)
+    43e8:	3102      	movi      	r1, 2
+    43ea:	6884      	and      	r2, r1
+    43ec:	3a40      	cmpnei      	r2, 0
+    43ee:	0c02      	bf      	0x43f2	// 43f2 <TKEYIntHandler+0x3e>
+    43f0:	b32c      	st.w      	r1, (r3, 0x30)
+    43f2:	934a      	ld.w      	r2, (r3, 0x28)
+    43f4:	3104      	movi      	r1, 4
+    43f6:	6884      	and      	r2, r1
+    43f8:	3a40      	cmpnei      	r2, 0
+    43fa:	0c02      	bf      	0x43fe	// 43fe <TKEYIntHandler+0x4a>
+    43fc:	b32c      	st.w      	r1, (r3, 0x30)
+    43fe:	934a      	ld.w      	r2, (r3, 0x28)
+    4400:	3108      	movi      	r1, 8
+    4402:	6884      	and      	r2, r1
+    4404:	3a40      	cmpnei      	r2, 0
+    4406:	0c02      	bf      	0x440a	// 440a <TKEYIntHandler+0x56>
+    4408:	b32c      	st.w      	r1, (r3, 0x30)
+    440a:	934a      	ld.w      	r2, (r3, 0x28)
+    440c:	3110      	movi      	r1, 16
+    440e:	6884      	and      	r2, r1
+    4410:	3a40      	cmpnei      	r2, 0
+    4412:	0c02      	bf      	0x4416	// 4416 <TKEYIntHandler+0x62>
+    4414:	b32c      	st.w      	r1, (r3, 0x30)
+    4416:	934a      	ld.w      	r2, (r3, 0x28)
+    4418:	3120      	movi      	r1, 32
+    441a:	6884      	and      	r2, r1
+    441c:	3a40      	cmpnei      	r2, 0
+    441e:	0c02      	bf      	0x4422	// 4422 <TKEYIntHandler+0x6e>
+    4420:	b32c      	st.w      	r1, (r3, 0x30)
+    4422:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    4426:	9880      	ld.w      	r4, (r14, 0x0)
+    4428:	1402      	addi      	r14, r14, 8
+    442a:	1463      	ipop
+    442c:	1461      	nir
+    442e:	0000      	bkpt
+    4430:	20000068 	.long	0x20000068
+    4434:	20000440 	.long	0x20000440
+    4438:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+0000443c <get_key_number>:
+    443c:	14c2      	push      	r4-r5
+    443e:	3200      	movi      	r2, 0
+    4440:	3000      	movi      	r0, 0
+    4442:	1088      	lrw      	r4, 0x200004e0	// 4460 <get_key_number+0x24>
+    4444:	3501      	movi      	r5, 1
+    4446:	3120      	movi      	r1, 32
+    4448:	9460      	ld.w      	r3, (r4, 0x0)
+    444a:	70c9      	lsr      	r3, r2
+    444c:	68d4      	and      	r3, r5
+    444e:	3b40      	cmpnei      	r3, 0
+    4450:	0c02      	bf      	0x4454	// 4454 <get_key_number+0x18>
+    4452:	2000      	addi      	r0, 1
+    4454:	2200      	addi      	r2, 1
+    4456:	644a      	cmpne      	r2, r1
+    4458:	0bf8      	bt      	0x4448	// 4448 <get_key_number+0xc>
+    445a:	7400      	zextb      	r0, r0
+    445c:	1482      	pop      	r4-r5
+    445e:	0000      	bkpt
+    4460:	200004e0 	.long	0x200004e0
+
+Disassembly of section .text.TK_Scan_Start:
+
+00004464 <TK_Scan_Start>:
+    4464:	1046      	lrw      	r2, 0x20000068	// 447c <TK_Scan_Start+0x18>
+    4466:	8264      	ld.b      	r3, (r2, 0x4)
+    4468:	74cc      	zextb      	r3, r3
+    446a:	3b41      	cmpnei      	r3, 1
+    446c:	0807      	bt      	0x447a	// 447a <TK_Scan_Start+0x16>
+    446e:	1025      	lrw      	r1, 0x20000058	// 4480 <TK_Scan_Start+0x1c>
+    4470:	9120      	ld.w      	r1, (r1, 0x0)
+    4472:	b162      	st.w      	r3, (r1, 0x8)
+    4474:	3300      	movi      	r3, 0
+    4476:	b260      	st.w      	r3, (r2, 0x0)
+    4478:	a264      	st.b      	r3, (r2, 0x4)
+    447a:	783c      	jmp      	r15
+    447c:	20000068 	.long	0x20000068
+    4480:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+00004484 <TK_Keymap_prog>:
+    4484:	14d4      	push      	r4-r7, r15
+    4486:	1425      	subi      	r14, r14, 20
+    4488:	1271      	lrw      	r3, 0x200000ec	// 45cc <TK_Keymap_prog+0x148>
+    448a:	8360      	ld.b      	r3, (r3, 0x0)
+    448c:	b860      	st.w      	r3, (r14, 0x0)
+    448e:	3400      	movi      	r4, 0
+    4490:	1270      	lrw      	r3, 0x200000c0	// 45d0 <TK_Keymap_prog+0x14c>
+    4492:	8360      	ld.b      	r3, (r3, 0x0)
+    4494:	b861      	st.w      	r3, (r14, 0x4)
+    4496:	12f0      	lrw      	r7, 0x20000456	// 45d4 <TK_Keymap_prog+0x150>
+    4498:	1270      	lrw      	r3, 0x200000c9	// 45d8 <TK_Keymap_prog+0x154>
+    449a:	83a0      	ld.b      	r5, (r3, 0x0)
+    449c:	1270      	lrw      	r3, 0x200000c8	// 45dc <TK_Keymap_prog+0x158>
+    449e:	8360      	ld.b      	r3, (r3, 0x0)
+    44a0:	b862      	st.w      	r3, (r14, 0x8)
+    44a2:	6d9f      	mov      	r6, r7
+    44a4:	126f      	lrw      	r3, 0x20000652	// 45e0 <TK_Keymap_prog+0x15c>
+    44a6:	b863      	st.w      	r3, (r14, 0xc)
+    44a8:	4461      	lsli      	r3, r4, 1
+    44aa:	9843      	ld.w      	r2, (r14, 0xc)
+    44ac:	608c      	addu      	r2, r3
+    44ae:	122e      	lrw      	r1, 0x200003ac	// 45e4 <TK_Keymap_prog+0x160>
+    44b0:	604c      	addu      	r1, r3
+    44b2:	8a40      	ld.h      	r2, (r2, 0x0)
+    44b4:	8920      	ld.h      	r1, (r1, 0x0)
+    44b6:	6086      	subu      	r2, r1
+    44b8:	748b      	sexth      	r2, r2
+    44ba:	5f2c      	addu      	r1, r7, r3
+    44bc:	a940      	st.h      	r2, (r1, 0x0)
+    44be:	8940      	ld.h      	r2, (r1, 0x0)
+    44c0:	748b      	sexth      	r2, r2
+    44c2:	3adf      	btsti      	r2, 31
+    44c4:	1249      	lrw      	r2, 0x2000060e	// 45e8 <TK_Keymap_prog+0x164>
+    44c6:	608c      	addu      	r2, r3
+    44c8:	0c37      	bf      	0x4536	// 4536 <TK_Keymap_prog+0xb2>
+    44ca:	3100      	movi      	r1, 0
+    44cc:	aa20      	st.h      	r1, (r2, 0x0)
+    44ce:	9840      	ld.w      	r2, (r14, 0x0)
+    44d0:	3a01      	cmphsi      	r2, 2
+    44d2:	0c6d      	bf      	0x45ac	// 45ac <TK_Keymap_prog+0x128>
+    44d4:	4461      	lsli      	r3, r4, 1
+    44d6:	5e2c      	addu      	r1, r6, r3
+    44d8:	1205      	lrw      	r0, 0x2000011a	// 45ec <TK_Keymap_prog+0x168>
+    44da:	8940      	ld.h      	r2, (r1, 0x0)
+    44dc:	60c0      	addu      	r3, r0
+    44de:	748b      	sexth      	r2, r2
+    44e0:	8b60      	ld.h      	r3, (r3, 0x0)
+    44e2:	648d      	cmplt      	r3, r2
+    44e4:	9840      	ld.w      	r2, (r14, 0x0)
+    44e6:	7cc8      	mult      	r3, r2
+    44e8:	0c2a      	bf      	0x453c	// 453c <TK_Keymap_prog+0xb8>
+    44ea:	8940      	ld.h      	r2, (r1, 0x0)
+    44ec:	748b      	sexth      	r2, r2
+    44ee:	64c9      	cmplt      	r2, r3
+    44f0:	0c26      	bf      	0x453c	// 453c <TK_Keymap_prog+0xb8>
+    44f2:	1240      	lrw      	r2, 0x20000444	// 45f0 <TK_Keymap_prog+0x16c>
+    44f4:	6090      	addu      	r2, r4
+    44f6:	8260      	ld.b      	r3, (r2, 0x0)
+    44f8:	2300      	addi      	r3, 1
+    44fa:	74cc      	zextb      	r3, r3
+    44fc:	a260      	st.b      	r3, (r2, 0x0)
+    44fe:	3100      	movi      	r1, 0
+    4500:	117d      	lrw      	r3, 0x2000042a	// 45f4 <TK_Keymap_prog+0x170>
+    4502:	60d0      	addu      	r3, r4
+    4504:	a320      	st.b      	r1, (r3, 0x0)
+    4506:	117d      	lrw      	r3, 0x20000506	// 45f8 <TK_Keymap_prog+0x174>
+    4508:	60d0      	addu      	r3, r4
+    450a:	a320      	st.b      	r1, (r3, 0x0)
+    450c:	117c      	lrw      	r3, 0x20000580	// 45fc <TK_Keymap_prog+0x178>
+    450e:	60d0      	addu      	r3, r4
+    4510:	a320      	st.b      	r1, (r3, 0x0)
+    4512:	8260      	ld.b      	r3, (r2, 0x0)
+    4514:	9821      	ld.w      	r1, (r14, 0x4)
+    4516:	64c4      	cmphs      	r1, r3
+    4518:	081f      	bt      	0x4556	// 4556 <TK_Keymap_prog+0xd2>
+    451a:	3d40      	cmpnei      	r5, 0
+    451c:	0852      	bt      	0x45c0	// 45c0 <TK_Keymap_prog+0x13c>
+    451e:	1139      	lrw      	r1, 0x2000043c	// 4600 <TK_Keymap_prog+0x17c>
+    4520:	9160      	ld.w      	r3, (r1, 0x0)
+    4522:	3b40      	cmpnei      	r3, 0
+    4524:	0806      	bt      	0x4530	// 4530 <TK_Keymap_prog+0xac>
+    4526:	9100      	ld.w      	r0, (r1, 0x0)
+    4528:	3301      	movi      	r3, 1
+    452a:	70d0      	lsl      	r3, r4
+    452c:	6cc0      	or      	r3, r0
+    452e:	b160      	st.w      	r3, (r1, 0x0)
+    4530:	3300      	movi      	r3, 0
+    4532:	a260      	st.b      	r3, (r2, 0x0)
+    4534:	0411      	br      	0x4556	// 4556 <TK_Keymap_prog+0xd2>
+    4536:	8920      	ld.h      	r1, (r1, 0x0)
+    4538:	7445      	zexth      	r1, r1
+    453a:	07c9      	br      	0x44cc	// 44cc <TK_Keymap_prog+0x48>
+    453c:	4441      	lsli      	r2, r4, 1
+    453e:	6098      	addu      	r2, r6
+    4540:	8a40      	ld.h      	r2, (r2, 0x0)
+    4542:	748b      	sexth      	r2, r2
+    4544:	648d      	cmplt      	r3, r2
+    4546:	0c08      	bf      	0x4556	// 4556 <TK_Keymap_prog+0xd2>
+    4548:	3300      	movi      	r3, 0
+    454a:	114e      	lrw      	r2, 0x2000043c	// 4600 <TK_Keymap_prog+0x17c>
+    454c:	2b01      	subi      	r3, 2
+    454e:	9220      	ld.w      	r1, (r2, 0x0)
+    4550:	70d3      	rotl      	r3, r4
+    4552:	68c4      	and      	r3, r1
+    4554:	b260      	st.w      	r3, (r2, 0x0)
+    4556:	4441      	lsli      	r2, r4, 1
+    4558:	5e68      	addu      	r3, r6, r2
+    455a:	8b60      	ld.h      	r3, (r3, 0x0)
+    455c:	74cf      	sexth      	r3, r3
+    455e:	b864      	st.w      	r3, (r14, 0x10)
+    4560:	3105      	movi      	r1, 5
+    4562:	1163      	lrw      	r3, 0x2000011a	// 45ec <TK_Keymap_prog+0x168>
+    4564:	608c      	addu      	r2, r3
+    4566:	8a00      	ld.h      	r0, (r2, 0x0)
+    4568:	4002      	lsli      	r0, r0, 2
+    456a:	e3fff61f 	bsr      	0x31a8	// 31a8 <__divsi3>
+    456e:	9864      	ld.w      	r3, (r14, 0x10)
+    4570:	640d      	cmplt      	r3, r0
+    4572:	0c18      	bf      	0x45a2	// 45a2 <TK_Keymap_prog+0x11e>
+    4574:	1140      	lrw      	r2, 0x2000042a	// 45f4 <TK_Keymap_prog+0x170>
+    4576:	6090      	addu      	r2, r4
+    4578:	8260      	ld.b      	r3, (r2, 0x0)
+    457a:	2300      	addi      	r3, 1
+    457c:	74cc      	zextb      	r3, r3
+    457e:	a260      	st.b      	r3, (r2, 0x0)
+    4580:	3100      	movi      	r1, 0
+    4582:	107c      	lrw      	r3, 0x20000444	// 45f0 <TK_Keymap_prog+0x16c>
+    4584:	60d0      	addu      	r3, r4
+    4586:	a320      	st.b      	r1, (r3, 0x0)
+    4588:	8260      	ld.b      	r3, (r2, 0x0)
+    458a:	9822      	ld.w      	r1, (r14, 0x8)
+    458c:	64c4      	cmphs      	r1, r3
+    458e:	080a      	bt      	0x45a2	// 45a2 <TK_Keymap_prog+0x11e>
+    4590:	3300      	movi      	r3, 0
+    4592:	103c      	lrw      	r1, 0x2000043c	// 4600 <TK_Keymap_prog+0x17c>
+    4594:	2b01      	subi      	r3, 2
+    4596:	9100      	ld.w      	r0, (r1, 0x0)
+    4598:	70d3      	rotl      	r3, r4
+    459a:	68c0      	and      	r3, r0
+    459c:	b160      	st.w      	r3, (r1, 0x0)
+    459e:	3300      	movi      	r3, 0
+    45a0:	a260      	st.b      	r3, (r2, 0x0)
+    45a2:	2400      	addi      	r4, 1
+    45a4:	3c51      	cmpnei      	r4, 17
+    45a6:	0b81      	bt      	0x44a8	// 44a8 <TK_Keymap_prog+0x24>
+    45a8:	1405      	addi      	r14, r14, 20
+    45aa:	1494      	pop      	r4-r7, r15
+    45ac:	60d8      	addu      	r3, r6
+    45ae:	4441      	lsli      	r2, r4, 1
+    45b0:	102f      	lrw      	r1, 0x2000011a	// 45ec <TK_Keymap_prog+0x168>
+    45b2:	8b60      	ld.h      	r3, (r3, 0x0)
+    45b4:	6084      	addu      	r2, r1
+    45b6:	74cf      	sexth      	r3, r3
+    45b8:	8a40      	ld.h      	r2, (r2, 0x0)
+    45ba:	64c9      	cmplt      	r2, r3
+    45bc:	0fcd      	bf      	0x4556	// 4556 <TK_Keymap_prog+0xd2>
+    45be:	079a      	br      	0x44f2	// 44f2 <TK_Keymap_prog+0x6e>
+    45c0:	3d41      	cmpnei      	r5, 1
+    45c2:	0bb7      	bt      	0x4530	// 4530 <TK_Keymap_prog+0xac>
+    45c4:	102f      	lrw      	r1, 0x2000043c	// 4600 <TK_Keymap_prog+0x17c>
+    45c6:	6cd7      	mov      	r3, r5
+    45c8:	9100      	ld.w      	r0, (r1, 0x0)
+    45ca:	07b0      	br      	0x452a	// 452a <TK_Keymap_prog+0xa6>
+    45cc:	200000ec 	.long	0x200000ec
+    45d0:	200000c0 	.long	0x200000c0
+    45d4:	20000456 	.long	0x20000456
+    45d8:	200000c9 	.long	0x200000c9
+    45dc:	200000c8 	.long	0x200000c8
+    45e0:	20000652 	.long	0x20000652
+    45e4:	200003ac 	.long	0x200003ac
+    45e8:	2000060e 	.long	0x2000060e
+    45ec:	2000011a 	.long	0x2000011a
+    45f0:	20000444 	.long	0x20000444
+    45f4:	2000042a 	.long	0x2000042a
+    45f8:	20000506 	.long	0x20000506
+    45fc:	20000580 	.long	0x20000580
+    4600:	2000043c 	.long	0x2000043c
+
+Disassembly of section .text.TK_overflow_predict:
+
+00004604 <TK_overflow_predict>:
+    4604:	14d4      	push      	r4-r7, r15
+    4606:	1421      	subi      	r14, r14, 4
+    4608:	11d9      	lrw      	r6, 0x20000068	// 46ec <TK_overflow_predict+0xe8>
+    460a:	8665      	ld.b      	r3, (r6, 0x5)
+    460c:	3b41      	cmpnei      	r3, 1
+    460e:	085f      	bt      	0x46cc	// 46cc <TK_overflow_predict+0xc8>
+    4610:	1158      	lrw      	r2, 0x2000055c	// 46f0 <TK_overflow_predict+0xec>
+    4612:	8260      	ld.b      	r3, (r2, 0x0)
+    4614:	2300      	addi      	r3, 1
+    4616:	74cc      	zextb      	r3, r3
+    4618:	a260      	st.b      	r3, (r2, 0x0)
+    461a:	8260      	ld.b      	r3, (r2, 0x0)
+    461c:	1136      	lrw      	r1, 0x200000ed	// 46f4 <TK_overflow_predict+0xf0>
+    461e:	8120      	ld.b      	r1, (r1, 0x0)
+    4620:	64c4      	cmphs      	r1, r3
+    4622:	0855      	bt      	0x46cc	// 46cc <TK_overflow_predict+0xc8>
+    4624:	3300      	movi      	r3, 0
+    4626:	a260      	st.b      	r3, (r2, 0x0)
+    4628:	3500      	movi      	r5, 0
+    462a:	11f4      	lrw      	r7, 0x200000f0	// 46f8 <TK_overflow_predict+0xf4>
+    462c:	2605      	addi      	r6, 6
+    462e:	9760      	ld.w      	r3, (r7, 0x0)
+    4630:	70d5      	lsr      	r3, r5
+    4632:	3201      	movi      	r2, 1
+    4634:	68c8      	and      	r3, r2
+    4636:	3b40      	cmpnei      	r3, 0
+    4638:	0c34      	bf      	0x46a0	// 46a0 <TK_overflow_predict+0x9c>
+    463a:	4581      	lsli      	r4, r5, 1
+    463c:	5e70      	addu      	r3, r6, r4
+    463e:	8b00      	ld.h      	r0, (r3, 0x0)
+    4640:	e3ffe7bc 	bsr      	0x15b8	// 15b8 <__floatunsidf>
+    4644:	6cc7      	mov      	r3, r1
+    4646:	3180      	movi      	r1, 128
+    4648:	6c83      	mov      	r2, r0
+    464a:	4137      	lsli      	r1, r1, 23
+    464c:	3000      	movi      	r0, 0
+    464e:	e3ffddb3 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    4652:	116b      	lrw      	r3, 0x200000f6	// 46fc <TK_overflow_predict+0xf8>
+    4654:	60d0      	addu      	r3, r4
+    4656:	8b60      	ld.h      	r3, (r3, 0x0)
+    4658:	4364      	lsli      	r3, r3, 4
+    465a:	230e      	addi      	r3, 15
+    465c:	b860      	st.w      	r3, (r14, 0x0)
+    465e:	e3ffe365 	bsr      	0xd28	// d28 <__fixunsdfsi>
+    4662:	9860      	ld.w      	r3, (r14, 0x0)
+    4664:	7cc0      	mult      	r3, r0
+    4666:	1147      	lrw      	r2, 0x200005ec	// 4700 <TK_overflow_predict+0xfc>
+    4668:	740d      	zexth      	r0, r3
+    466a:	6090      	addu      	r2, r4
+    466c:	1166      	lrw      	r3, 0x20000652	// 4704 <TK_overflow_predict+0x100>
+    466e:	60d0      	addu      	r3, r4
+    4670:	aa00      	st.h      	r0, (r2, 0x0)
+    4672:	8b60      	ld.h      	r3, (r3, 0x0)
+    4674:	8a00      	ld.h      	r0, (r2, 0x0)
+    4676:	7401      	zexth      	r0, r0
+    4678:	325f      	movi      	r2, 95
+    467a:	74cd      	zexth      	r3, r3
+    467c:	7c08      	mult      	r0, r2
+    467e:	3164      	movi      	r1, 100
+    4680:	b860      	st.w      	r3, (r14, 0x0)
+    4682:	e3fff593 	bsr      	0x31a8	// 31a8 <__divsi3>
+    4686:	9860      	ld.w      	r3, (r14, 0x0)
+    4688:	64c1      	cmplt      	r0, r3
+    468a:	0c0b      	bf      	0x46a0	// 46a0 <TK_overflow_predict+0x9c>
+    468c:	107f      	lrw      	r3, 0x200000ca	// 4708 <TK_overflow_predict+0x104>
+    468e:	610c      	addu      	r4, r3
+    4690:	8c60      	ld.h      	r3, (r4, 0x0)
+    4692:	3b06      	cmphsi      	r3, 7
+    4694:	0806      	bt      	0x46a0	// 46a0 <TK_overflow_predict+0x9c>
+    4696:	2300      	addi      	r3, 1
+    4698:	ac60      	st.h      	r3, (r4, 0x0)
+    469a:	3201      	movi      	r2, 1
+    469c:	107c      	lrw      	r3, 0x200004b1	// 470c <TK_overflow_predict+0x108>
+    469e:	a340      	st.b      	r2, (r3, 0x0)
+    46a0:	2500      	addi      	r5, 1
+    46a2:	3d51      	cmpnei      	r5, 17
+    46a4:	0bc5      	bt      	0x462e	// 462e <TK_overflow_predict+0x2a>
+    46a6:	107a      	lrw      	r3, 0x200004b1	// 470c <TK_overflow_predict+0x108>
+    46a8:	8340      	ld.b      	r2, (r3, 0x0)
+    46aa:	3a41      	cmpnei      	r2, 1
+    46ac:	0810      	bt      	0x46cc	// 46cc <TK_overflow_predict+0xc8>
+    46ae:	3200      	movi      	r2, 0
+    46b0:	a340      	st.b      	r2, (r3, 0x0)
+    46b2:	3200      	movi      	r2, 0
+    46b4:	1077      	lrw      	r3, 0x20000058	// 4710 <TK_overflow_predict+0x10c>
+    46b6:	1018      	lrw      	r0, 0x2000057f	// 4714 <TK_overflow_predict+0x110>
+    46b8:	10b8      	lrw      	r5, 0x200005b8	// 4718 <TK_overflow_predict+0x114>
+    46ba:	10d4      	lrw      	r6, 0x200000ca	// 4708 <TK_overflow_predict+0x104>
+    46bc:	9360      	ld.w      	r3, (r3, 0x0)
+    46be:	b342      	st.w      	r2, (r3, 0x8)
+    46c0:	1077      	lrw      	r3, 0x20000054	// 471c <TK_overflow_predict+0x118>
+    46c2:	9380      	ld.w      	r4, (r3, 0x0)
+    46c4:	3300      	movi      	r3, 0
+    46c6:	8040      	ld.b      	r2, (r0, 0x0)
+    46c8:	648c      	cmphs      	r3, r2
+    46ca:	0c03      	bf      	0x46d0	// 46d0 <TK_overflow_predict+0xcc>
+    46cc:	1401      	addi      	r14, r14, 4
+    46ce:	1494      	pop      	r4-r7, r15
+    46d0:	5d4c      	addu      	r2, r5, r3
+    46d2:	8240      	ld.b      	r2, (r2, 0x0)
+    46d4:	4241      	lsli      	r2, r2, 1
+    46d6:	4322      	lsli      	r1, r3, 2
+    46d8:	6098      	addu      	r2, r6
+    46da:	6050      	addu      	r1, r4
+    46dc:	8a40      	ld.h      	r2, (r2, 0x0)
+    46de:	91f2      	ld.w      	r7, (r1, 0x48)
+    46e0:	4254      	lsli      	r2, r2, 20
+    46e2:	6c9c      	or      	r2, r7
+    46e4:	2300      	addi      	r3, 1
+    46e6:	b152      	st.w      	r2, (r1, 0x48)
+    46e8:	74cc      	zextb      	r3, r3
+    46ea:	07ee      	br      	0x46c6	// 46c6 <TK_overflow_predict+0xc2>
+    46ec:	20000068 	.long	0x20000068
+    46f0:	2000055c 	.long	0x2000055c
+    46f4:	200000ed 	.long	0x200000ed
+    46f8:	200000f0 	.long	0x200000f0
+    46fc:	200000f6 	.long	0x200000f6
+    4700:	200005ec 	.long	0x200005ec
+    4704:	20000652 	.long	0x20000652
+    4708:	200000ca 	.long	0x200000ca
+    470c:	200004b1 	.long	0x200004b1
+    4710:	20000058 	.long	0x20000058
+    4714:	2000057f 	.long	0x2000057f
+    4718:	200005b8 	.long	0x200005b8
+    471c:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00004720 <TK_Baseline_tracking>:
+    4720:	14c4      	push      	r4-r7
+    4722:	1422      	subi      	r14, r14, 8
+    4724:	1348      	lrw      	r2, 0x200004de	// 48c4 <TK_Baseline_tracking+0x1a4>
+    4726:	8260      	ld.b      	r3, (r2, 0x0)
+    4728:	2300      	addi      	r3, 1
+    472a:	74cc      	zextb      	r3, r3
+    472c:	a260      	st.b      	r3, (r2, 0x0)
+    472e:	8260      	ld.b      	r3, (r2, 0x0)
+    4730:	1326      	lrw      	r1, 0x200000ed	// 48c8 <TK_Baseline_tracking+0x1a8>
+    4732:	8120      	ld.b      	r1, (r1, 0x0)
+    4734:	644c      	cmphs      	r3, r1
+    4736:	0cad      	bf      	0x4890	// 4890 <TK_Baseline_tracking+0x170>
+    4738:	3300      	movi      	r3, 0
+    473a:	a260      	st.b      	r3, (r2, 0x0)
+    473c:	1364      	lrw      	r3, 0x2000043c	// 48cc <TK_Baseline_tracking+0x1ac>
+    473e:	9360      	ld.w      	r3, (r3, 0x0)
+    4740:	3b40      	cmpnei      	r3, 0
+    4742:	08a7      	bt      	0x4890	// 4890 <TK_Baseline_tracking+0x170>
+    4744:	1323      	lrw      	r1, 0x20000456	// 48d0 <TK_Baseline_tracking+0x1b0>
+    4746:	6dc7      	mov      	r7, r1
+    4748:	b820      	st.w      	r1, (r14, 0x0)
+    474a:	3200      	movi      	r2, 0
+    474c:	1362      	lrw      	r3, 0x2000011a	// 48d4 <TK_Baseline_tracking+0x1b4>
+    474e:	1323      	lrw      	r1, 0x200003ac	// 48d8 <TK_Baseline_tracking+0x1b8>
+    4750:	4201      	lsli      	r0, r2, 1
+    4752:	9880      	ld.w      	r4, (r14, 0x0)
+    4754:	6100      	addu      	r4, r0
+    4756:	8c80      	ld.h      	r4, (r4, 0x0)
+    4758:	7513      	sexth      	r4, r4
+    475a:	3cdf      	btsti      	r4, 31
+    475c:	0c27      	bf      	0x47aa	// 47aa <TK_Baseline_tracking+0x8a>
+    475e:	13a0      	lrw      	r5, 0x20000652	// 48dc <TK_Baseline_tracking+0x1bc>
+    4760:	5980      	addu      	r4, r1, r0
+    4762:	6014      	addu      	r0, r5
+    4764:	b881      	st.w      	r4, (r14, 0x4)
+    4766:	8c80      	ld.h      	r4, (r4, 0x0)
+    4768:	88c0      	ld.h      	r6, (r0, 0x0)
+    476a:	7511      	zexth      	r4, r4
+    476c:	7599      	zexth      	r6, r6
+    476e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    4770:	611a      	subu      	r4, r6
+    4772:	6551      	cmplt      	r4, r5
+    4774:	081b      	bt      	0x47aa	// 47aa <TK_Baseline_tracking+0x8a>
+    4776:	9881      	ld.w      	r4, (r14, 0x4)
+    4778:	8c80      	ld.h      	r4, (r4, 0x0)
+    477a:	8800      	ld.h      	r0, (r0, 0x0)
+    477c:	7511      	zexth      	r4, r4
+    477e:	7401      	zexth      	r0, r0
+    4780:	5c01      	subu      	r0, r4, r0
+    4782:	4581      	lsli      	r4, r5, 1
+    4784:	6150      	addu      	r5, r4
+    4786:	6541      	cmplt      	r0, r5
+    4788:	0c11      	bf      	0x47aa	// 47aa <TK_Baseline_tracking+0x8a>
+    478a:	1296      	lrw      	r4, 0x20000580	// 48e0 <TK_Baseline_tracking+0x1c0>
+    478c:	6108      	addu      	r4, r2
+    478e:	8400      	ld.b      	r0, (r4, 0x0)
+    4790:	2000      	addi      	r0, 1
+    4792:	7400      	zextb      	r0, r0
+    4794:	a400      	st.b      	r0, (r4, 0x0)
+    4796:	1214      	lrw      	r0, 0x20000088	// 48e4 <TK_Baseline_tracking+0x1c4>
+    4798:	84a0      	ld.b      	r5, (r4, 0x0)
+    479a:	8008      	ld.b      	r0, (r0, 0x8)
+    479c:	6540      	cmphs      	r0, r5
+    479e:	0806      	bt      	0x47aa	// 47aa <TK_Baseline_tracking+0x8a>
+    47a0:	1212      	lrw      	r0, 0x200004c3	// 48e8 <TK_Baseline_tracking+0x1c8>
+    47a2:	3501      	movi      	r5, 1
+    47a4:	a0a0      	st.b      	r5, (r0, 0x0)
+    47a6:	3000      	movi      	r0, 0
+    47a8:	a400      	st.b      	r0, (r4, 0x0)
+    47aa:	4201      	lsli      	r0, r2, 1
+    47ac:	5f80      	addu      	r4, r7, r0
+    47ae:	8c80      	ld.h      	r4, (r4, 0x0)
+    47b0:	7513      	sexth      	r4, r4
+    47b2:	3c20      	cmplti      	r4, 1
+    47b4:	0870      	bt      	0x4894	// 4894 <TK_Baseline_tracking+0x174>
+    47b6:	128a      	lrw      	r4, 0x20000652	// 48dc <TK_Baseline_tracking+0x1bc>
+    47b8:	6100      	addu      	r4, r0
+    47ba:	59a0      	addu      	r5, r1, r0
+    47bc:	8c80      	ld.h      	r4, (r4, 0x0)
+    47be:	8da0      	ld.h      	r5, (r5, 0x0)
+    47c0:	7555      	zexth      	r5, r5
+    47c2:	7511      	zexth      	r4, r4
+    47c4:	6116      	subu      	r4, r5
+    47c6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    47c8:	45a2      	lsli      	r5, r5, 2
+    47ca:	6551      	cmplt      	r4, r5
+    47cc:	0864      	bt      	0x4894	// 4894 <TK_Baseline_tracking+0x174>
+    47ce:	1288      	lrw      	r4, 0x20000506	// 48ec <TK_Baseline_tracking+0x1cc>
+    47d0:	6108      	addu      	r4, r2
+    47d2:	84a0      	ld.b      	r5, (r4, 0x0)
+    47d4:	2500      	addi      	r5, 1
+    47d6:	7554      	zextb      	r5, r5
+    47d8:	a4a0      	st.b      	r5, (r4, 0x0)
+    47da:	12a3      	lrw      	r5, 0x20000088	// 48e4 <TK_Baseline_tracking+0x1c4>
+    47dc:	84c0      	ld.b      	r6, (r4, 0x0)
+    47de:	85a9      	ld.b      	r5, (r5, 0x9)
+    47e0:	6594      	cmphs      	r5, r6
+    47e2:	0806      	bt      	0x47ee	// 47ee <TK_Baseline_tracking+0xce>
+    47e4:	12a1      	lrw      	r5, 0x200004c3	// 48e8 <TK_Baseline_tracking+0x1c8>
+    47e6:	3601      	movi      	r6, 1
+    47e8:	a5c0      	st.b      	r6, (r5, 0x0)
+    47ea:	3500      	movi      	r5, 0
+    47ec:	a4a0      	st.b      	r5, (r4, 0x0)
+    47ee:	5f80      	addu      	r4, r7, r0
+    47f0:	8c80      	ld.h      	r4, (r4, 0x0)
+    47f2:	7513      	sexth      	r4, r4
+    47f4:	3cdf      	btsti      	r4, 31
+    47f6:	0c10      	bf      	0x4816	// 4816 <TK_Baseline_tracking+0xf6>
+    47f8:	11d9      	lrw      	r6, 0x20000652	// 48dc <TK_Baseline_tracking+0x1bc>
+    47fa:	59a0      	addu      	r5, r1, r0
+    47fc:	6180      	addu      	r6, r0
+    47fe:	8d80      	ld.h      	r4, (r5, 0x0)
+    4800:	8ec0      	ld.h      	r6, (r6, 0x0)
+    4802:	7599      	zexth      	r6, r6
+    4804:	7511      	zexth      	r4, r4
+    4806:	611a      	subu      	r4, r6
+    4808:	8bc0      	ld.h      	r6, (r3, 0x0)
+    480a:	6591      	cmplt      	r4, r6
+    480c:	0c05      	bf      	0x4816	// 4816 <TK_Baseline_tracking+0xf6>
+    480e:	8d80      	ld.h      	r4, (r5, 0x0)
+    4810:	2c00      	subi      	r4, 1
+    4812:	7511      	zexth      	r4, r4
+    4814:	ad80      	st.h      	r4, (r5, 0x0)
+    4816:	5f80      	addu      	r4, r7, r0
+    4818:	8c80      	ld.h      	r4, (r4, 0x0)
+    481a:	7513      	sexth      	r4, r4
+    481c:	3cdf      	btsti      	r4, 31
+    481e:	0c11      	bf      	0x4840	// 4840 <TK_Baseline_tracking+0x120>
+    4820:	11cf      	lrw      	r6, 0x20000652	// 48dc <TK_Baseline_tracking+0x1bc>
+    4822:	59a0      	addu      	r5, r1, r0
+    4824:	6180      	addu      	r6, r0
+    4826:	8d80      	ld.h      	r4, (r5, 0x0)
+    4828:	8ec0      	ld.h      	r6, (r6, 0x0)
+    482a:	7599      	zexth      	r6, r6
+    482c:	7511      	zexth      	r4, r4
+    482e:	611a      	subu      	r4, r6
+    4830:	8bc0      	ld.h      	r6, (r3, 0x0)
+    4832:	4ec1      	lsri      	r6, r6, 1
+    4834:	6591      	cmplt      	r4, r6
+    4836:	0805      	bt      	0x4840	// 4840 <TK_Baseline_tracking+0x120>
+    4838:	8d80      	ld.h      	r4, (r5, 0x0)
+    483a:	2c01      	subi      	r4, 2
+    483c:	7511      	zexth      	r4, r4
+    483e:	ad80      	st.h      	r4, (r5, 0x0)
+    4840:	5fa0      	addu      	r5, r7, r0
+    4842:	8d80      	ld.h      	r4, (r5, 0x0)
+    4844:	7513      	sexth      	r4, r4
+    4846:	3c20      	cmplti      	r4, 1
+    4848:	080c      	bt      	0x4860	// 4860 <TK_Baseline_tracking+0x140>
+    484a:	8da0      	ld.h      	r5, (r5, 0x0)
+    484c:	8b80      	ld.h      	r4, (r3, 0x0)
+    484e:	7557      	sexth      	r5, r5
+    4850:	4c81      	lsri      	r4, r4, 1
+    4852:	6515      	cmplt      	r5, r4
+    4854:	0c06      	bf      	0x4860	// 4860 <TK_Baseline_tracking+0x140>
+    4856:	59a0      	addu      	r5, r1, r0
+    4858:	8d80      	ld.h      	r4, (r5, 0x0)
+    485a:	2400      	addi      	r4, 1
+    485c:	7511      	zexth      	r4, r4
+    485e:	ad80      	st.h      	r4, (r5, 0x0)
+    4860:	5fa0      	addu      	r5, r7, r0
+    4862:	8d80      	ld.h      	r4, (r5, 0x0)
+    4864:	7513      	sexth      	r4, r4
+    4866:	3c20      	cmplti      	r4, 1
+    4868:	0810      	bt      	0x4888	// 4888 <TK_Baseline_tracking+0x168>
+    486a:	8dc0      	ld.h      	r6, (r5, 0x0)
+    486c:	759b      	sexth      	r6, r6
+    486e:	8b80      	ld.h      	r4, (r3, 0x0)
+    4870:	6519      	cmplt      	r6, r4
+    4872:	0c0b      	bf      	0x4888	// 4888 <TK_Baseline_tracking+0x168>
+    4874:	8da0      	ld.h      	r5, (r5, 0x0)
+    4876:	7557      	sexth      	r5, r5
+    4878:	4c81      	lsri      	r4, r4, 1
+    487a:	6515      	cmplt      	r5, r4
+    487c:	0806      	bt      	0x4888	// 4888 <TK_Baseline_tracking+0x168>
+    487e:	6004      	addu      	r0, r1
+    4880:	8880      	ld.h      	r4, (r0, 0x0)
+    4882:	2401      	addi      	r4, 2
+    4884:	7511      	zexth      	r4, r4
+    4886:	a880      	st.h      	r4, (r0, 0x0)
+    4888:	2200      	addi      	r2, 1
+    488a:	3a51      	cmpnei      	r2, 17
+    488c:	2301      	addi      	r3, 2
+    488e:	0b61      	bt      	0x4750	// 4750 <TK_Baseline_tracking+0x30>
+    4890:	1402      	addi      	r14, r14, 8
+    4892:	1484      	pop      	r4-r7
+    4894:	5f80      	addu      	r4, r7, r0
+    4896:	8c80      	ld.h      	r4, (r4, 0x0)
+    4898:	7513      	sexth      	r4, r4
+    489a:	3cdf      	btsti      	r4, 31
+    489c:	0fa9      	bf      	0x47ee	// 47ee <TK_Baseline_tracking+0xce>
+    489e:	10b0      	lrw      	r5, 0x20000652	// 48dc <TK_Baseline_tracking+0x1bc>
+    48a0:	5980      	addu      	r4, r1, r0
+    48a2:	6140      	addu      	r5, r0
+    48a4:	8c80      	ld.h      	r4, (r4, 0x0)
+    48a6:	8da0      	ld.h      	r5, (r5, 0x0)
+    48a8:	7555      	zexth      	r5, r5
+    48aa:	8bc0      	ld.h      	r6, (r3, 0x0)
+    48ac:	7511      	zexth      	r4, r4
+    48ae:	6116      	subu      	r4, r5
+    48b0:	46a1      	lsli      	r5, r6, 1
+    48b2:	6158      	addu      	r5, r6
+    48b4:	6551      	cmplt      	r4, r5
+    48b6:	0b9c      	bt      	0x47ee	// 47ee <TK_Baseline_tracking+0xce>
+    48b8:	108c      	lrw      	r4, 0x200004c3	// 48e8 <TK_Baseline_tracking+0x1c8>
+    48ba:	3501      	movi      	r5, 1
+    48bc:	a4a0      	st.b      	r5, (r4, 0x0)
+    48be:	6c03      	mov      	r0, r0
+    48c0:	0797      	br      	0x47ee	// 47ee <TK_Baseline_tracking+0xce>
+    48c2:	0000      	bkpt
+    48c4:	200004de 	.long	0x200004de
+    48c8:	200000ed 	.long	0x200000ed
+    48cc:	2000043c 	.long	0x2000043c
+    48d0:	20000456 	.long	0x20000456
+    48d4:	2000011a 	.long	0x2000011a
+    48d8:	200003ac 	.long	0x200003ac
+    48dc:	20000652 	.long	0x20000652
+    48e0:	20000580 	.long	0x20000580
+    48e4:	20000088 	.long	0x20000088
+    48e8:	200004c3 	.long	0x200004c3
+    48ec:	20000506 	.long	0x20000506
+
+Disassembly of section .text.TK_result_prog:
+
+000048f0 <TK_result_prog>:
+    48f0:	14d2      	push      	r4-r5, r15
+    48f2:	1050      	lrw      	r2, 0x2000043c	// 4930 <TK_result_prog+0x40>
+    48f4:	1090      	lrw      	r4, 0x200004e0	// 4934 <TK_result_prog+0x44>
+    48f6:	9260      	ld.w      	r3, (r2, 0x0)
+    48f8:	3b40      	cmpnei      	r3, 0
+    48fa:	0c02      	bf      	0x48fe	// 48fe <TK_result_prog+0xe>
+    48fc:	9260      	ld.w      	r3, (r2, 0x0)
+    48fe:	b460      	st.w      	r3, (r4, 0x0)
+    4900:	9460      	ld.w      	r3, (r4, 0x0)
+    4902:	3b40      	cmpnei      	r3, 0
+    4904:	10ad      	lrw      	r5, 0x200005b4	// 4938 <TK_result_prog+0x48>
+    4906:	0c11      	bf      	0x4928	// 4928 <TK_result_prog+0x38>
+    4908:	9440      	ld.w      	r2, (r4, 0x0)
+    490a:	9560      	ld.w      	r3, (r5, 0x0)
+    490c:	64ca      	cmpne      	r2, r3
+    490e:	0c03      	bf      	0x4914	// 4914 <TK_result_prog+0x24>
+    4910:	9460      	ld.w      	r3, (r4, 0x0)
+    4912:	b560      	st.w      	r3, (r5, 0x0)
+    4914:	e3fffd94 	bsr      	0x443c	// 443c <get_key_number>
+    4918:	1069      	lrw      	r3, 0x200000f4	// 493c <TK_result_prog+0x4c>
+    491a:	8360      	ld.b      	r3, (r3, 0x0)
+    491c:	640c      	cmphs      	r3, r0
+    491e:	0804      	bt      	0x4926	// 4926 <TK_result_prog+0x36>
+    4920:	3300      	movi      	r3, 0
+    4922:	b460      	st.w      	r3, (r4, 0x0)
+    4924:	b560      	st.w      	r3, (r5, 0x0)
+    4926:	1492      	pop      	r4-r5, r15
+    4928:	1046      	lrw      	r2, 0x200004d8	// 4940 <TK_result_prog+0x50>
+    492a:	b560      	st.w      	r3, (r5, 0x0)
+    492c:	b260      	st.w      	r3, (r2, 0x0)
+    492e:	07fc      	br      	0x4926	// 4926 <TK_result_prog+0x36>
+    4930:	2000043c 	.long	0x2000043c
+    4934:	200004e0 	.long	0x200004e0
+    4938:	200005b4 	.long	0x200005b4
+    493c:	200000f4 	.long	0x200000f4
+    4940:	200004d8 	.long	0x200004d8
+
+Disassembly of section .text.CORETHandler:
+
+00004944 <CORETHandler>:
+    4944:	1460      	nie
+    4946:	1462      	ipush
+    4948:	14d1      	push      	r4, r15
+    494a:	1077      	lrw      	r3, 0x20000064	// 49a4 <CORETHandler+0x60>
+    494c:	3400      	movi      	r4, 0
+    494e:	9360      	ld.w      	r3, (r3, 0x0)
+    4950:	b386      	st.w      	r4, (r3, 0x18)
+    4952:	1076      	lrw      	r3, 0x20000440	// 49a8 <CORETHandler+0x64>
+    4954:	8360      	ld.b      	r3, (r3, 0x0)
+    4956:	3b41      	cmpnei      	r3, 1
+    4958:	0820      	bt      	0x4998	// 4998 <CORETHandler+0x54>
+    495a:	e3fffd85 	bsr      	0x4464	// 4464 <TK_Scan_Start>
+    495e:	e3fffd93 	bsr      	0x4484	// 4484 <TK_Keymap_prog>
+    4962:	e3fffe51 	bsr      	0x4604	// 4604 <TK_overflow_predict>
+    4966:	e3fffedd 	bsr      	0x4720	// 4720 <TK_Baseline_tracking>
+    496a:	e3ffffc3 	bsr      	0x48f0	// 48f0 <TK_result_prog>
+    496e:	1070      	lrw      	r3, 0x200004e0	// 49ac <CORETHandler+0x68>
+    4970:	9360      	ld.w      	r3, (r3, 0x0)
+    4972:	3b40      	cmpnei      	r3, 0
+    4974:	0c12      	bf      	0x4998	// 4998 <CORETHandler+0x54>
+    4976:	106f      	lrw      	r3, 0x200000c4	// 49b0 <CORETHandler+0x6c>
+    4978:	9340      	ld.w      	r2, (r3, 0x0)
+    497a:	3a40      	cmpnei      	r2, 0
+    497c:	0c0e      	bf      	0x4998	// 4998 <CORETHandler+0x54>
+    497e:	106e      	lrw      	r3, 0x200004d8	// 49b4 <CORETHandler+0x70>
+    4980:	3064      	movi      	r0, 100
+    4982:	9320      	ld.w      	r1, (r3, 0x0)
+    4984:	2100      	addi      	r1, 1
+    4986:	b320      	st.w      	r1, (r3, 0x0)
+    4988:	9320      	ld.w      	r1, (r3, 0x0)
+    498a:	7c80      	mult      	r2, r0
+    498c:	6448      	cmphs      	r2, r1
+    498e:	0805      	bt      	0x4998	// 4998 <CORETHandler+0x54>
+    4990:	104a      	lrw      	r2, 0x200004c3	// 49b8 <CORETHandler+0x74>
+    4992:	3101      	movi      	r1, 1
+    4994:	a220      	st.b      	r1, (r2, 0x0)
+    4996:	b380      	st.w      	r4, (r3, 0x0)
+    4998:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    499c:	9880      	ld.w      	r4, (r14, 0x0)
+    499e:	1402      	addi      	r14, r14, 8
+    49a0:	1463      	ipop
+    49a2:	1461      	nir
+    49a4:	20000064 	.long	0x20000064
+    49a8:	20000440 	.long	0x20000440
+    49ac:	200004e0 	.long	0x200004e0
+    49b0:	200000c4 	.long	0x200000c4
+    49b4:	200004d8 	.long	0x200004d8
+    49b8:	200004c3 	.long	0x200004c3
+
+Disassembly of section .text.std_clk_calib:
+
+000049bc <std_clk_calib>:
+    49bc:	14d4      	push      	r4-r7, r15
+    49be:	142d      	subi      	r14, r14, 52
+    49c0:	3201      	movi      	r2, 1
+    49c2:	03ce      	lrw      	r6, 0x2000005c	// 4c04 <std_clk_calib+0x248>
+    49c4:	6cc3      	mov      	r3, r0
+    49c6:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    49ca:	9640      	ld.w      	r2, (r6, 0x0)
+    49cc:	9247      	ld.w      	r2, (r2, 0x1c)
+    49ce:	7488      	zextb      	r2, r2
+    49d0:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    49d4:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    49d8:	3a40      	cmpnei      	r2, 0
+    49da:	0c08      	bf      	0x49ea	// 49ea <std_clk_calib+0x2e>
+    49dc:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    49e0:	3a42      	cmpnei      	r2, 2
+    49e2:	0c04      	bf      	0x49ea	// 49ea <std_clk_calib+0x2e>
+    49e4:	3000      	movi      	r0, 0
+    49e6:	140d      	addi      	r14, r14, 52
+    49e8:	1494      	pop      	r4-r7, r15
+    49ea:	0397      	lrw      	r4, 0x2000000c	// 4c08 <std_clk_calib+0x24c>
+    49ec:	3209      	movi      	r2, 9
+    49ee:	9400      	ld.w      	r0, (r4, 0x0)
+    49f0:	3b40      	cmpnei      	r3, 0
+    49f2:	b041      	st.w      	r2, (r0, 0x4)
+    49f4:	0857      	bt      	0x4aa2	// 4aa2 <std_clk_calib+0xe6>
+    49f6:	3307      	movi      	r3, 7
+    49f8:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    49fc:	037b      	lrw      	r3, 0x2dc6c00	// 4c0c <std_clk_calib+0x250>
+    49fe:	b863      	st.w      	r3, (r14, 0xc)
+    4a00:	3380      	movi      	r3, 128
+    4a02:	4362      	lsli      	r3, r3, 2
+    4a04:	b867      	st.w      	r3, (r14, 0x1c)
+    4a06:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    4a0a:	74cc      	zextb      	r3, r3
+    4a0c:	b062      	st.w      	r3, (r0, 0x8)
+    4a0e:	037e      	lrw      	r3, 0xffff	// 4c10 <std_clk_calib+0x254>
+    4a10:	b063      	st.w      	r3, (r0, 0xc)
+    4a12:	3201      	movi      	r2, 1
+    4a14:	3101      	movi      	r1, 1
+    4a16:	03bf      	lrw      	r5, 0x20000014	// 4c14 <std_clk_calib+0x258>
+    4a18:	e3ffebf2 	bsr      	0x21fc	// 21fc <BT_ConfigInterrupt_CMD>
+    4a1c:	95e0      	ld.w      	r7, (r5, 0x0)
+    4a1e:	137f      	lrw      	r3, 0xbe9c0005	// 4c18 <std_clk_calib+0x25c>
+    4a20:	b760      	st.w      	r3, (r7, 0x0)
+    4a22:	135f      	lrw      	r2, 0x30010	// 4c1c <std_clk_calib+0x260>
+    4a24:	3300      	movi      	r3, 0
+    4a26:	b762      	st.w      	r3, (r7, 0x8)
+    4a28:	b743      	st.w      	r2, (r7, 0xc)
+    4a2a:	32d8      	movi      	r2, 216
+    4a2c:	b745      	st.w      	r2, (r7, 0x14)
+    4a2e:	974f      	ld.w      	r2, (r7, 0x3c)
+    4a30:	3aa2      	bseti      	r2, 2
+    4a32:	b74f      	st.w      	r2, (r7, 0x3c)
+    4a34:	9803      	ld.w      	r0, (r14, 0xc)
+    4a36:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    4a3a:	327d      	movi      	r2, 125
+    4a3c:	2100      	addi      	r1, 1
+    4a3e:	7c48      	mult      	r1, r2
+    4a40:	b861      	st.w      	r3, (r14, 0x4)
+    4a42:	e3fff3c5 	bsr      	0x31cc	// 31cc <__udivsi3>
+    4a46:	b804      	st.w      	r0, (r14, 0x10)
+    4a48:	32fa      	movi      	r2, 250
+    4a4a:	9824      	ld.w      	r1, (r14, 0x10)
+    4a4c:	4242      	lsli      	r2, r2, 2
+    4a4e:	6448      	cmphs      	r2, r1
+    4a50:	0bca      	bt      	0x49e4	// 49e4 <std_clk_calib+0x28>
+    4a52:	9844      	ld.w      	r2, (r14, 0x10)
+    4a54:	3178      	movi      	r1, 120
+    4a56:	9804      	ld.w      	r0, (r14, 0x10)
+    4a58:	b840      	st.w      	r2, (r14, 0x0)
+    4a5a:	e3fff3b9 	bsr      	0x31cc	// 31cc <__udivsi3>
+    4a5e:	9840      	ld.w      	r2, (r14, 0x0)
+    4a60:	6082      	subu      	r2, r0
+    4a62:	b845      	st.w      	r2, (r14, 0x14)
+    4a64:	9804      	ld.w      	r0, (r14, 0x10)
+    4a66:	3178      	movi      	r1, 120
+    4a68:	9844      	ld.w      	r2, (r14, 0x10)
+    4a6a:	b840      	st.w      	r2, (r14, 0x0)
+    4a6c:	e3fff3b0 	bsr      	0x31cc	// 31cc <__udivsi3>
+    4a70:	9840      	ld.w      	r2, (r14, 0x0)
+    4a72:	6008      	addu      	r0, r2
+    4a74:	b806      	st.w      	r0, (r14, 0x18)
+    4a76:	c0807020 	psrclr      	ie
+    4a7a:	9640      	ld.w      	r2, (r6, 0x0)
+    4a7c:	9254      	ld.w      	r2, (r2, 0x50)
+    4a7e:	b848      	st.w      	r2, (r14, 0x20)
+    4a80:	9861      	ld.w      	r3, (r14, 0x4)
+    4a82:	9440      	ld.w      	r2, (r4, 0x0)
+    4a84:	b260      	st.w      	r3, (r2, 0x0)
+    4a86:	b761      	st.w      	r3, (r7, 0x4)
+    4a88:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    4a8c:	3b40      	cmpnei      	r3, 0
+    4a8e:	083e      	bt      	0x4b0a	// 4b0a <std_clk_calib+0x14e>
+    4a90:	e3ffeb68 	bsr      	0x2160	// 2160 <LPT_Soft_Reset>
+    4a94:	9400      	ld.w      	r0, (r4, 0x0)
+    4a96:	e3ffeb89 	bsr      	0x21a8	// 21a8 <BT_Soft_Reset>
+    4a9a:	c1807420 	psrset      	ee, ie
+    4a9e:	3001      	movi      	r0, 1
+    4aa0:	07a3      	br      	0x49e6	// 49e6 <std_clk_calib+0x2a>
+    4aa2:	3b41      	cmpnei      	r3, 1
+    4aa4:	0806      	bt      	0x4ab0	// 4ab0 <std_clk_calib+0xf4>
+    4aa6:	3303      	movi      	r3, 3
+    4aa8:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4aac:	127d      	lrw      	r3, 0x16e3600	// 4c20 <std_clk_calib+0x264>
+    4aae:	07a8      	br      	0x49fe	// 49fe <std_clk_calib+0x42>
+    4ab0:	3b42      	cmpnei      	r3, 2
+    4ab2:	0806      	bt      	0x4abe	// 4abe <std_clk_calib+0x102>
+    4ab4:	3301      	movi      	r3, 1
+    4ab6:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4aba:	127b      	lrw      	r3, 0xb71b00	// 4c24 <std_clk_calib+0x268>
+    4abc:	07a1      	br      	0x49fe	// 49fe <std_clk_calib+0x42>
+    4abe:	3b43      	cmpnei      	r3, 3
+    4ac0:	0806      	bt      	0x4acc	// 4acc <std_clk_calib+0x110>
+    4ac2:	3300      	movi      	r3, 0
+    4ac4:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4ac8:	1278      	lrw      	r3, 0x5b8d80	// 4c28 <std_clk_calib+0x26c>
+    4aca:	079a      	br      	0x49fe	// 49fe <std_clk_calib+0x42>
+    4acc:	3b44      	cmpnei      	r3, 4
+    4ace:	0809      	bt      	0x4ae0	// 4ae0 <std_clk_calib+0x124>
+    4ad0:	3300      	movi      	r3, 0
+    4ad2:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4ad6:	1276      	lrw      	r3, 0x54c720	// 4c2c <std_clk_calib+0x270>
+    4ad8:	b863      	st.w      	r3, (r14, 0xc)
+    4ada:	3380      	movi      	r3, 128
+    4adc:	4369      	lsli      	r3, r3, 9
+    4ade:	0793      	br      	0x4a04	// 4a04 <std_clk_calib+0x48>
+    4ae0:	3b45      	cmpnei      	r3, 5
+    4ae2:	0806      	bt      	0x4aee	// 4aee <std_clk_calib+0x132>
+    4ae4:	3300      	movi      	r3, 0
+    4ae6:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4aea:	1272      	lrw      	r3, 0x3ffed0	// 4c30 <std_clk_calib+0x274>
+    4aec:	07f6      	br      	0x4ad8	// 4ad8 <std_clk_calib+0x11c>
+    4aee:	3b46      	cmpnei      	r3, 6
+    4af0:	0806      	bt      	0x4afc	// 4afc <std_clk_calib+0x140>
+    4af2:	3300      	movi      	r3, 0
+    4af4:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4af8:	126f      	lrw      	r3, 0x1fff68	// 4c34 <std_clk_calib+0x278>
+    4afa:	07ef      	br      	0x4ad8	// 4ad8 <std_clk_calib+0x11c>
+    4afc:	3b47      	cmpnei      	r3, 7
+    4afe:	0b84      	bt      	0x4a06	// 4a06 <std_clk_calib+0x4a>
+    4b00:	3300      	movi      	r3, 0
+    4b02:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4b06:	126d      	lrw      	r3, 0x1ffb8	// 4c38 <std_clk_calib+0x27c>
+    4b08:	07e8      	br      	0x4ad8	// 4ad8 <std_clk_calib+0x11c>
+    4b0a:	9560      	ld.w      	r3, (r5, 0x0)
+    4b0c:	3101      	movi      	r1, 1
+    4b0e:	9440      	ld.w      	r2, (r4, 0x0)
+    4b10:	b321      	st.w      	r1, (r3, 0x4)
+    4b12:	b220      	st.w      	r1, (r2, 0x0)
+    4b14:	3100      	movi      	r1, 0
+    4b16:	b327      	st.w      	r1, (r3, 0x1c)
+    4b18:	3004      	movi      	r0, 4
+    4b1a:	b225      	st.w      	r1, (r2, 0x14)
+    4b1c:	932e      	ld.w      	r1, (r3, 0x38)
+    4b1e:	6840      	and      	r1, r0
+    4b20:	3940      	cmpnei      	r1, 0
+    4b22:	0ffd      	bf      	0x4b1c	// 4b1c <std_clk_calib+0x160>
+    4b24:	9225      	ld.w      	r1, (r2, 0x14)
+    4b26:	b82a      	st.w      	r1, (r14, 0x28)
+    4b28:	3100      	movi      	r1, 0
+    4b2a:	b310      	st.w      	r0, (r3, 0x40)
+    4b2c:	b327      	st.w      	r1, (r3, 0x1c)
+    4b2e:	3004      	movi      	r0, 4
+    4b30:	b225      	st.w      	r1, (r2, 0x14)
+    4b32:	932e      	ld.w      	r1, (r3, 0x38)
+    4b34:	6840      	and      	r1, r0
+    4b36:	3940      	cmpnei      	r1, 0
+    4b38:	0ffd      	bf      	0x4b32	// 4b32 <std_clk_calib+0x176>
+    4b3a:	9225      	ld.w      	r1, (r2, 0x14)
+    4b3c:	b82b      	st.w      	r1, (r14, 0x2c)
+    4b3e:	3100      	movi      	r1, 0
+    4b40:	b310      	st.w      	r0, (r3, 0x40)
+    4b42:	b327      	st.w      	r1, (r3, 0x1c)
+    4b44:	3004      	movi      	r0, 4
+    4b46:	b225      	st.w      	r1, (r2, 0x14)
+    4b48:	932e      	ld.w      	r1, (r3, 0x38)
+    4b4a:	6840      	and      	r1, r0
+    4b4c:	3940      	cmpnei      	r1, 0
+    4b4e:	0ffd      	bf      	0x4b48	// 4b48 <std_clk_calib+0x18c>
+    4b50:	9225      	ld.w      	r1, (r2, 0x14)
+    4b52:	b82c      	st.w      	r1, (r14, 0x30)
+    4b54:	b310      	st.w      	r0, (r3, 0x40)
+    4b56:	982b      	ld.w      	r1, (r14, 0x2c)
+    4b58:	980c      	ld.w      	r0, (r14, 0x30)
+    4b5a:	6040      	addu      	r1, r0
+    4b5c:	b829      	st.w      	r1, (r14, 0x24)
+    4b5e:	9829      	ld.w      	r1, (r14, 0x24)
+    4b60:	4921      	lsri      	r1, r1, 1
+    4b62:	b829      	st.w      	r1, (r14, 0x24)
+    4b64:	3100      	movi      	r1, 0
+    4b66:	b321      	st.w      	r1, (r3, 0x4)
+    4b68:	b220      	st.w      	r1, (r2, 0x0)
+    4b6a:	b327      	st.w      	r1, (r3, 0x1c)
+    4b6c:	b225      	st.w      	r1, (r2, 0x14)
+    4b6e:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4b72:	3b42      	cmpnei      	r3, 2
+    4b74:	9849      	ld.w      	r2, (r14, 0x24)
+    4b76:	082c      	bt      	0x4bce	// 4bce <std_clk_calib+0x212>
+    4b78:	1171      	lrw      	r3, 0x7ff	// 4c3c <std_clk_calib+0x280>
+    4b7a:	648c      	cmphs      	r3, r2
+    4b7c:	0c03      	bf      	0x4b82	// 4b82 <std_clk_calib+0x1c6>
+    4b7e:	3300      	movi      	r3, 0
+    4b80:	040f      	br      	0x4b9e	// 4b9e <std_clk_calib+0x1e2>
+    4b82:	9849      	ld.w      	r2, (r14, 0x24)
+    4b84:	9866      	ld.w      	r3, (r14, 0x18)
+    4b86:	648c      	cmphs      	r3, r2
+    4b88:	080e      	bt      	0x4ba4	// 4ba4 <std_clk_calib+0x1e8>
+    4b8a:	9868      	ld.w      	r3, (r14, 0x20)
+    4b8c:	9847      	ld.w      	r2, (r14, 0x1c)
+    4b8e:	60ca      	subu      	r3, r2
+    4b90:	b868      	st.w      	r3, (r14, 0x20)
+    4b92:	32fe      	movi      	r2, 254
+    4b94:	9868      	ld.w      	r3, (r14, 0x20)
+    4b96:	4248      	lsli      	r2, r2, 8
+    4b98:	68c8      	and      	r3, r2
+    4b9a:	3b40      	cmpnei      	r3, 0
+    4b9c:	0812      	bt      	0x4bc0	// 4bc0 <std_clk_calib+0x204>
+    4b9e:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    4ba2:	0721      	br      	0x49e4	// 49e4 <std_clk_calib+0x28>
+    4ba4:	9849      	ld.w      	r2, (r14, 0x24)
+    4ba6:	9865      	ld.w      	r3, (r14, 0x14)
+    4ba8:	64c8      	cmphs      	r2, r3
+    4baa:	0829      	bt      	0x4bfc	// 4bfc <std_clk_calib+0x240>
+    4bac:	9868      	ld.w      	r3, (r14, 0x20)
+    4bae:	9847      	ld.w      	r2, (r14, 0x1c)
+    4bb0:	60c8      	addu      	r3, r2
+    4bb2:	b868      	st.w      	r3, (r14, 0x20)
+    4bb4:	33fe      	movi      	r3, 254
+    4bb6:	9848      	ld.w      	r2, (r14, 0x20)
+    4bb8:	4368      	lsli      	r3, r3, 8
+    4bba:	688c      	and      	r2, r3
+    4bbc:	64ca      	cmpne      	r2, r3
+    4bbe:	0fe0      	bf      	0x4b7e	// 4b7e <std_clk_calib+0x1c2>
+    4bc0:	9660      	ld.w      	r3, (r6, 0x0)
+    4bc2:	9848      	ld.w      	r2, (r14, 0x20)
+    4bc4:	b354      	st.w      	r2, (r3, 0x50)
+    4bc6:	3001      	movi      	r0, 1
+    4bc8:	e3ffed88 	bsr      	0x26d8	// 26d8 <delay_nms>
+    4bcc:	075e      	br      	0x4a88	// 4a88 <std_clk_calib+0xcc>
+    4bce:	9866      	ld.w      	r3, (r14, 0x18)
+    4bd0:	648c      	cmphs      	r3, r2
+    4bd2:	0809      	bt      	0x4be4	// 4be4 <std_clk_calib+0x228>
+    4bd4:	9868      	ld.w      	r3, (r14, 0x20)
+    4bd6:	9847      	ld.w      	r2, (r14, 0x1c)
+    4bd8:	60ca      	subu      	r3, r2
+    4bda:	b868      	st.w      	r3, (r14, 0x20)
+    4bdc:	32ff      	movi      	r2, 255
+    4bde:	9868      	ld.w      	r3, (r14, 0x20)
+    4be0:	4250      	lsli      	r2, r2, 16
+    4be2:	07db      	br      	0x4b98	// 4b98 <std_clk_calib+0x1dc>
+    4be4:	9849      	ld.w      	r2, (r14, 0x24)
+    4be6:	9865      	ld.w      	r3, (r14, 0x14)
+    4be8:	64c8      	cmphs      	r2, r3
+    4bea:	0809      	bt      	0x4bfc	// 4bfc <std_clk_calib+0x240>
+    4bec:	9868      	ld.w      	r3, (r14, 0x20)
+    4bee:	9847      	ld.w      	r2, (r14, 0x1c)
+    4bf0:	60c8      	addu      	r3, r2
+    4bf2:	b868      	st.w      	r3, (r14, 0x20)
+    4bf4:	33ff      	movi      	r3, 255
+    4bf6:	9848      	ld.w      	r2, (r14, 0x20)
+    4bf8:	4370      	lsli      	r3, r3, 16
+    4bfa:	07e0      	br      	0x4bba	// 4bba <std_clk_calib+0x1fe>
+    4bfc:	3300      	movi      	r3, 0
+    4bfe:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    4c02:	07e2      	br      	0x4bc6	// 4bc6 <std_clk_calib+0x20a>
+    4c04:	2000005c 	.long	0x2000005c
+    4c08:	2000000c 	.long	0x2000000c
+    4c0c:	02dc6c00 	.long	0x02dc6c00
+    4c10:	0000ffff 	.long	0x0000ffff
+    4c14:	20000014 	.long	0x20000014
+    4c18:	be9c0005 	.long	0xbe9c0005
+    4c1c:	00030010 	.long	0x00030010
+    4c20:	016e3600 	.long	0x016e3600
+    4c24:	00b71b00 	.long	0x00b71b00
+    4c28:	005b8d80 	.long	0x005b8d80
+    4c2c:	0054c720 	.long	0x0054c720
+    4c30:	003ffed0 	.long	0x003ffed0
+    4c34:	001fff68 	.long	0x001fff68
+    4c38:	0001ffb8 	.long	0x0001ffb8
+    4c3c:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/RLY_10V485_V01_20250625.map b/Source/Lst/RLY_10V485_V01_20250625.map
new file mode 100644
index 0000000..6f64fea
--- /dev/null
+++ b/Source/Lst/RLY_10V485_V01_20250625.map
@@ -0,0 +1,2260 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          337432 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         169
+  Section header string table index: 166
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 001a8e 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00001a90 002a90 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00001ac8 002ac8 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00001b3c 002b3c 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        00001b88 002b88 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        00001bb8 002bb8 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        00001c40 002c40 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        00001c68 002c68 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00001ca4 002ca4 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        00001cb8 002cb8 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00001cd0 002cd0 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00001cf0 002cf0 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00001d0c 002d0c 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        00001d28 002d28 000040 00  AX  0   0  4
+  [15] .text.EXTI_interr PROGBITS        00001d68 002d68 000034 00  AX  0   0  4
+  [16] .text.GPIO_EXTI_i PROGBITS        00001d9c 002d9c 000004 00  AX  0   0  2
+  [17] .text.EXI4_Int_En PROGBITS        00001da0 002da0 000010 00  AX  0   0  4
+  [18] .text.SYSCON_Int_ PROGBITS        00001db0 002db0 00000c 00  AX  0   0  4
+  [19] .text.SYSCON_Int_ PROGBITS        00001dbc 002dbc 00000c 00  AX  0   0  4
+  [20] .text.SYSCON_INT_ PROGBITS        00001dc8 002dc8 000024 00  AX  0   0  4
+  [21] .text.Set_INT_Pri PROGBITS        00001dec 002dec 000030 00  AX  0   0  4
+  [22] .text.GPIO_Init   PROGBITS        00001e1c 002e1c 0000e0 00  AX  0   0  4
+  [23] .text.GPIO_PullHi PROGBITS        00001efc 002efc 000014 00  AX  0   0  2
+  [24] .text.GPIO_DriveS PROGBITS        00001f10 002f10 00000e 00  AX  0   0  2
+  [25] .text.GPIO_IntGro PROGBITS        00001f20 002f20 00010c 00  AX  0   0  4
+  [26] .text.GPIOA0_EXI_ PROGBITS        0000202c 00302c 0000fc 00  AX  0   0  4
+  [27] .text.GPIO_Write_ PROGBITS        00002128 003128 000008 00  AX  0   0  2
+  [28] .text.GPIO_Write_ PROGBITS        00002130 003130 000008 00  AX  0   0  2
+  [29] .text.GPIO_Revers PROGBITS        00002138 003138 000016 00  AX  0   0  2
+  [30] .text.GPIO_Read_S PROGBITS        0000214e 00314e 000010 00  AX  0   0  2
+  [31] .text.LPT_Soft_Re PROGBITS        00002160 003160 000014 00  AX  0   0  4
+  [32] .text.WWDT_CNT_Lo PROGBITS        00002174 003174 000010 00  AX  0   0  4
+  [33] .text.BT_DeInit   PROGBITS        00002184 003184 00001c 00  AX  0   0  2
+  [34] .text.BT_Start    PROGBITS        000021a0 0031a0 000008 00  AX  0   0  2
+  [35] .text.BT_Soft_Res PROGBITS        000021a8 0031a8 00000a 00  AX  0   0  2
+  [36] .text.BT_Configur PROGBITS        000021b2 0031b2 000018 00  AX  0   0  2
+  [37] .text.BT_ControlS PROGBITS        000021ca 0031ca 00002c 00  AX  0   0  2
+  [38] .text.BT_Period_C PROGBITS        000021f6 0031f6 000006 00  AX  0   0  2
+  [39] .text.BT_ConfigIn PROGBITS        000021fc 0031fc 000012 00  AX  0   0  2
+  [40] .text.BT1_INT_ENA PROGBITS        00002210 003210 000010 00  AX  0   0  4
+  [41] .text.GPT_IO_Init PROGBITS        00002220 003220 0000a0 00  AX  0   0  4
+  [42] .text.GPT_Configu PROGBITS        000022c0 0032c0 000014 00  AX  0   0  4
+  [43] .text.GPT_WaveCtr PROGBITS        000022d4 0032d4 000044 00  AX  0   0  4
+  [44] .text.GPT_WaveLoa PROGBITS        00002318 003318 000014 00  AX  0   0  4
+  [45] .text.GPT_WaveOut PROGBITS        0000232c 00332c 0000b4 00  AX  0   0  4
+  [46] .text.GPT_Start   PROGBITS        000023e0 0033e0 000010 00  AX  0   0  4
+  [47] .text.GPT_Period_ PROGBITS        000023f0 0033f0 000010 00  AX  0   0  4
+  [48] .text.GPT_ConfigI PROGBITS        00002400 003400 00001c 00  AX  0   0  4
+  [49] .text.UART0_DeIni PROGBITS        0000241c 00341c 000018 00  AX  0   0  4
+  [50] .text.UART1_DeIni PROGBITS        00002434 003434 000018 00  AX  0   0  4
+  [51] .text.UART2_DeIni PROGBITS        0000244c 00344c 000018 00  AX  0   0  4
+  [52] .text.UART1_Int_E PROGBITS        00002464 003464 00001c 00  AX  0   0  4
+  [53] .text.UART2_Int_E PROGBITS        00002480 003480 00001c 00  AX  0   0  4
+  [54] .text.UART_IO_Ini PROGBITS        0000249c 00349c 0000ec 00  AX  0   0  4
+  [55] .text.UARTInitRxT PROGBITS        00002588 003588 000010 00  AX  0   0  4
+  [56] .text.UARTTransmi PROGBITS        00002598 003598 00001e 00  AX  0   0  2
+  [57] .text.EPT_Stop    PROGBITS        000025b8 0035b8 000028 00  AX  0   0  4
+  [58] .text.Page_Progra PROGBITS        000025e0 0035e0 0000a0 00  AX  0   0  4
+  [59] .text.ReadDataArr PROGBITS        00002680 003680 00002a 00  AX  0   0  2
+  [60] .text.startup.mai PROGBITS        000026ac 0036ac 00002c 00  AX  0   0  4
+  [61] .text.delay_nms   PROGBITS        000026d8 0036d8 00002c 00  AX  0   0  2
+  [62] .text.delay_nus   PROGBITS        00002704 003704 000022 00  AX  0   0  2
+  [63] .text.BT_CONFIG   PROGBITS        00002728 003728 000060 00  AX  0   0  4
+  [64] .text.SYSCON_CONF PROGBITS        00002788 003788 000062 00  AX  0   0  2
+  [65] .text.APT32F102_i PROGBITS        000027ec 0037ec 00004c 00  AX  0   0  4
+  [66] .text.SYSCONIntHa PROGBITS        00002838 003838 0000f0 00  AX  0   0  4
+  [67] .text.IFCIntHandl PROGBITS        00002928 003928 000068 00  AX  0   0  4
+  [68] .text.ADCIntHandl PROGBITS        00002990 003990 000068 00  AX  0   0  4
+  [69] .text.EPT0IntHand PROGBITS        000029f8 0039f8 0001ac 00  AX  0   0  4
+  [70] .text.WWDTHandler PROGBITS        00002ba4 003ba4 000034 00  AX  0   0  4
+  [71] .text.GPT0IntHand PROGBITS        00002bd8 003bd8 000080 00  AX  0   0  4
+  [72] .text.RTCIntHandl PROGBITS        00002c58 003c58 000070 00  AX  0   0  4
+  [73] .text.UART0IntHan PROGBITS        00002cc8 003cc8 00003c 00  AX  0   0  4
+  [74] .text.UART1IntHan PROGBITS        00002d04 003d04 000094 00  AX  0   0  4
+  [75] .text.UART2IntHan PROGBITS        00002d98 003d98 00004c 00  AX  0   0  4
+  [76] .text.SPI0IntHand PROGBITS        00002de4 003de4 0000e8 00  AX  0   0  4
+  [77] .text.SIO0IntHand PROGBITS        00002ecc 003ecc 000054 00  AX  0   0  4
+  [78] .text.EXI0IntHand PROGBITS        00002f20 003f20 000030 00  AX  0   0  4
+  [79] .text.EXI1IntHand PROGBITS        00002f50 003f50 000030 00  AX  0   0  4
+  [80] .text.EXI2to3IntH PROGBITS        00002f80 003f80 000048 00  AX  0   0  4
+  [81] .text.EXI4to9IntH PROGBITS        00002fc8 003fc8 000020 00  AX  0   0  4
+  [82] .text.EXI10to15In PROGBITS        00002fe8 003fe8 00006c 00  AX  0   0  4
+  [83] .text.LPTIntHandl PROGBITS        00003054 004054 000034 00  AX  0   0  4
+  [84] .text.BT0IntHandl PROGBITS        00003088 004088 00004c 00  AX  0   0  4
+  [85] .text.BT1IntHandl PROGBITS        000030d4 0040d4 000070 00  AX  0   0  4
+  [86] .text.PriviledgeV PROGBITS        00003144 004144 000002 00  AX  0   0  2
+  [87] .text.PendTrapHan PROGBITS        00003146 004146 000008 00  AX  0   0  2
+  [88] .text.Trap3Handle PROGBITS        0000314e 00414e 000008 00  AX  0   0  2
+  [89] .text.Trap2Handle PROGBITS        00003156 004156 000008 00  AX  0   0  2
+  [90] .text.Trap1Handle PROGBITS        0000315e 00415e 000008 00  AX  0   0  2
+  [91] .text.Trap0Handle PROGBITS        00003166 004166 000008 00  AX  0   0  2
+  [92] .text.UnrecExecpH PROGBITS        0000316e 00416e 000008 00  AX  0   0  2
+  [93] .text.BreakPointH PROGBITS        00003176 004176 000008 00  AX  0   0  2
+  [94] .text.AccessErrHa PROGBITS        0000317e 00417e 000008 00  AX  0   0  2
+  [95] .text.IllegalInst PROGBITS        00003186 004186 000008 00  AX  0   0  2
+  [96] .text.MisalignedH PROGBITS        0000318e 00418e 000008 00  AX  0   0  2
+  [97] .text.CNTAIntHand PROGBITS        00003196 004196 000008 00  AX  0   0  2
+  [98] .text.I2CIntHandl PROGBITS        0000319e 00419e 000008 00  AX  0   0  2
+  [99] .text.__divsi3    PROGBITS        000031a8 0041a8 000024 00  AX  0   0  4
+  [100] .text.__udivsi3   PROGBITS        000031cc 0041cc 000024 00  AX  0   0  4
+  [101] .text.__umodsi3   PROGBITS        000031f0 0041f0 000024 00  AX  0   0  4
+  [102] .text.CK_CPU_EnAl PROGBITS        00003214 004214 000006 00  AX  0   0  2
+  [103] .text.CK_CPU_DisA PROGBITS        0000321a 00421a 000006 00  AX  0   0  2
+  [104] .text.UARTx_Init  PROGBITS        00003220 004220 000154 00  AX  0   0  4
+  [105] .text.UART1_RecvI PROGBITS        00003374 004374 000044 00  AX  0   0  4
+  [106] .text.UART1_TASK  PROGBITS        000033b8 0043b8 000070 00  AX  0   0  4
+  [107] .text.BUS485_Send PROGBITS        00003428 004428 0000d0 00  AX  0   0  4
+  [108] .text.MultSend_Ta PROGBITS        000034f8 0044f8 000064 00  AX  0   0  4
+  [109] .text.Set_GroupSe PROGBITS        0000355c 00455c 00005c 00  AX  0   0  4
+  [110] .text.BUS485Send_ PROGBITS        000035b8 0045b8 00002c 00  AX  0   0  4
+  [111] .text.BusIdle_Tas PROGBITS        000035e4 0045e4 00003c 00  AX  0   0  4
+  [112] .text.BusBusy_Tas PROGBITS        00003620 004620 000054 00  AX  0   0  4
+  [113] .text.Dbg_Println PROGBITS        00003674 004674 00000c 00  AX  0   0  2
+  [114] .text.DIP_GetSwit PROGBITS        00003680 004680 000034 00  AX  0   0  4
+  [115] .text.DIP_Switch_ PROGBITS        000036b4 0046b4 00008c 00  AX  0   0  4
+  [116] .text.DIP_ScanTas PROGBITS        00003740 004740 00008c 00  AX  0   0  4
+  [117] .text.Relay_Init  PROGBITS        000037cc 0047cc 0000c0 00  AX  0   0  4
+  [118] .text.CheckSum    PROGBITS        0000388c 00488c 000016 00  AX  0   0  2
+  [119] .text.CheckSum2   PROGBITS        000038a2 0048a2 000018 00  AX  0   0  2
+  [120] .text.Change_OUTV PROGBITS        000038bc 0048bc 00001c 00  AX  0   0  4
+  [121] .text.BLV_VolOut_ PROGBITS        000038d8 0048d8 00005c 00  AX  0   0  4
+  [122] .text.BLV_RLY_Ctr PROGBITS        00003934 004934 00007c 00  AX  0   0  4
+  [123] .text.BLV_RLY_Tas PROGBITS        000039b0 0049b0 000048 00  AX  0   0  4
+  [124] .text.BLV_A9RLY_C PROGBITS        000039f8 0049f8 0000a4 00  AX  0   0  4
+  [125] .text.BLV_A9RLY_C PROGBITS        00003a9c 004a9c 00008c 00  AX  0   0  4
+  [126] .text.BLV_WINDOUT PROGBITS        00003b28 004b28 0000d8 00  AX  0   0  4
+  [127] .text.BLV_WINDOUT PROGBITS        00003c00 004c00 000094 00  AX  0   0  4
+  [128] .text.BLV_DEVPROT PROGBITS        00003c94 004c94 000088 00  AX  0   0  4
+  [129] .text.BLV_DEVPROT PROGBITS        00003d1c 004d1c 000074 00  AX  0   0  4
+  [130] .text.BLV_RLY_RS4 PROGBITS        00003d90 004d90 000110 00  AX  0   0  4
+  [131] .text.CTRL_LEDSta PROGBITS        00003ea0 004ea0 000034 00  AX  0   0  4
+  [132] .text.EEPROM_Chec PROGBITS        00003ed4 004ed4 000016 00  AX  0   0  2
+  [133] .text.EEPROM_Read PROGBITS        00003eec 004eec 0001b4 00  AX  0   0  4
+  [134] .text.EEPROM_Vali PROGBITS        000040a0 0050a0 000074 00  AX  0   0  2
+  [135] .text.EEPROM_Writ PROGBITS        00004114 005114 0000b0 00  AX  0   0  4
+  [136] .text.EEPROM_Read PROGBITS        000041c4 0051c4 000070 00  AX  0   0  4
+  [137] .text.EEPROM_Writ PROGBITS        00004234 005234 000040 00  AX  0   0  2
+  [138] .text.EEPROM_Defa PROGBITS        00004274 005274 000034 00  AX  0   0  4
+  [139] .text.EEPROM_Vali PROGBITS        000042a8 0052a8 000058 00  AX  0   0  4
+  [140] .text.EEPROM_Init PROGBITS        00004300 005300 00005c 00  AX  0   0  4
+  [141] .text.TK_Sampling PROGBITS        0000435c 00535c 000058 00  AX  0   0  4
+  [142] .text.TKEYIntHand PROGBITS        000043b4 0053b4 000088 00  AX  0   0  4
+  [143] .text.get_key_num PROGBITS        0000443c 00543c 000028 00  AX  0   0  4
+  [144] .text.TK_Scan_Sta PROGBITS        00004464 005464 000020 00  AX  0   0  4
+  [145] .text.TK_Keymap_p PROGBITS        00004484 005484 000180 00  AX  0   0  4
+  [146] .text.TK_overflow PROGBITS        00004604 005604 00011c 00  AX  0   0  4
+  [147] .text.TK_Baseline PROGBITS        00004720 005720 0001d0 00  AX  0   0  4
+  [148] .text.TK_result_p PROGBITS        000048f0 0058f0 000054 00  AX  0   0  4
+  [149] .text.CORETHandle PROGBITS        00004944 005944 000078 00  AX  0   0  4
+  [150] .text.std_clk_cal PROGBITS        000049bc 0059bc 000284 00  AX  0   0  4
+  [151] .RomCode          PROGBITS        00004c40 00609c 000000 00   W  0   0  1
+  [152] .rodata           PROGBITS        00004c40 005c40 0002e0 00   A  0   0  4
+  [153] .data             PROGBITS        20000000 006000 00009c 00  WA  0   0  4
+  [154] .bss              NOBITS          2000009c 00609c 0005d8 00  WA  0   0  4
+  [155] .csky.attributes  CSKY_ATTRIBUTES 00000000 00609c 000022 00      0   0  1
+  [156] .comment          PROGBITS        00000000 0060be 000042 01  MS  0   0  1
+  [157] .csky_stack_size  PROGBITS        00000000 006100 0007ec 00      0   0 16
+  [158] .debug_line       PROGBITS        00000000 0068ec 003ba2 00      0   0  1
+  [159] .debug_info       PROGBITS        00000000 00a48e 02f10b 00      0   0  1
+  [160] .debug_abbrev     PROGBITS        00000000 039599 002bd6 00      0   0  1
+  [161] .debug_aranges    PROGBITS        00000000 03c170 000d00 00      0   0  8
+  [162] .debug_ranges     PROGBITS        00000000 03ce70 000ca0 00      0   0  1
+  [163] .debug_str        PROGBITS        00000000 03db10 009b77 01  MS  0   0  1
+  [164] .debug_frame      PROGBITS        00000000 047688 001e90 00      0   0  4
+  [165] .debug_loc        PROGBITS        00000000 049518 00300b 00      0   0  1
+  [166] .shstrtab         STRTAB          00000000 05180f 000e07 00      0   0  1
+  [167] .symtab           SYMTAB          00000000 04c524 003f10 10     168 705  4
+  [168] .strtab           STRTAB          00000000 050434 0013db 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x04f20 0x04f20 R E 0x1000
+  LOAD           0x006000 0x20000000 0x00004f20 0x0009c 0x00674 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.EXTI_interrupt_CMD .text.GPIO_EXTI_interrupt .text.EXI4_Int_Enable .text.SYSCON_Int_Enable .text.SYSCON_Int_Disable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_IntGroup_Set .text.GPIOA0_EXI_Init .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART1_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.Page_ProgramData .text.ReadDataArry_U8 .text.startup.main .text.delay_nms .text.delay_nus .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.CK_CPU_DisAllNormalIrq .text.UARTx_Init .text.UART1_RecvINT_Processing .text.UART1_TASK .text.BUS485_Send .text.MultSend_Task .text.Set_GroupSend .text.BUS485Send_Task .text.BusIdle_Task .text.BusBusy_Task .text.Dbg_Println .text.DIP_GetSwitchState .text.DIP_Switch_Init .text.DIP_ScanTask .text.Relay_Init .text.CheckSum .text.CheckSum2 .text.Change_OUTV .text.BLV_VolOut_Ctrl .text.BLV_RLY_Ctrl_Purpose .text.BLV_RLY_Task .text.BLV_A9RLY_CMD_SET_Processing .text.BLV_A9RLY_CMD_READ_Processing .text.BLV_WINDOUT_CMD_SET_Processing .text.BLV_WINDOUT_CMD_READ_Processing .text.BLV_DEVPROT_CMD_SET_Processing .text.BLV_DEVPROT_CMD_READ_Processing .text.BLV_RLY_RS485_Pro .text.CTRL_LEDStatus_Task .text.EEPROM_CheckSum .text.EEPROM_ReadPara .text.EEPROM_ValidateWrite .text.EEPROM_WritePara .text.EEPROM_ReadMCUDevInfo .text.EEPROM_WriteMCUDevInfo .text.EEPROM_Default_MCUDevInfo .text.EEPROM_Validate_MCUDevInfo .text.EEPROM_Init .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_interrupt_CMD) for EXTI_interrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.GPIO_EXTI_interrupt) for GPIO_EXTI_interrupt
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXI4_Int_Enable) for EXI4_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Disable) for SYSCON_Int_Disable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.UART1_RecvINT_Processing) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/SYSTEM_control_rly.o(.text.CTRL_LEDStatus_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_IntGroup_Set) for GPIO_IntGroup_Set
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIOA0_EXI_Init) for GPIOA0_EXI_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_Int_Enable) for UART1_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/FWlib_apt32f102_ifc.o(.text.Page_ProgramData) for Page_ProgramData
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) refers to Obj/FWlib_apt32f102_ifc.o(.text.Page_ProgramData) for Page_ProgramData
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/FWlib_apt32f102_ifc.o(.text.ReadDataArry_U8) for ReadDataArry_U8
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ValidateWrite) refers to Obj/FWlib_apt32f102_ifc.o(.text.ReadDataArry_U8) for ReadDataArry_U8
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to Obj/FWlib_apt32f102_ifc.o(.text.ReadDataArry_U8) for ReadDataArry_U8
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/mcu_initial.o(.text.delay_nus) for delay_nus
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusIdle_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusIdle_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART1IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART1_RecvINT_Processing) for UART1_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.UART1_TASK) for UART1_TASK
+	Obj/SYSTEM_uart.o(.text.MultSend_Task) refers to Obj/SYSTEM_uart.o(.text.BUS485_Send) for BUS485_Send
+	Obj/SYSTEM_uart.o(.text.BUS485Send_Task) refers to Obj/SYSTEM_uart.o(.text.MultSend_Task) for MultSend_Task
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.BUS485Send_Task) for BUS485Send_Task
+	Obj/mcu_interrupt.o(.text.BT1IntHandler) refers to Obj/SYSTEM_uart.o(.text.BusIdle_Task) for BusIdle_Task
+	Obj/mcu_interrupt.o(.text.EXI10to15IntHandler) refers to Obj/SYSTEM_uart.o(.text.BusBusy_Task) for BusBusy_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) for DIP_GetSwitchState
+	Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) for DIP_GetSwitchState
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) for DIP_Switch_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) for DIP_ScanTask
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_control_rly.o(.text.Relay_Init) for Relay_Init
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum2) for CheckSum2
+	Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) refers to Obj/SYSTEM_control_rly.o(.text.Change_OUTV) for Change_OUTV
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) for BLV_VolOut_Ctrl
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) for BLV_VolOut_Ctrl
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) for BLV_RLY_Ctrl_Purpose
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) for BLV_RLY_Task
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) for BLV_A9RLY_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) for BLV_A9RLY_CMD_READ_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) for BLV_WINDOUT_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_READ_Processing) for BLV_WINDOUT_CMD_READ_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) for BLV_DEVPROT_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_READ_Processing) for BLV_DEVPROT_CMD_READ_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_control_rly.o(.text.CTRL_LEDStatus_Task) for CTRL_LEDStatus_Task
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_CheckSum) for EEPROM_CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_CheckSum) for EEPROM_CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) for EEPROM_ReadPara
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_ValidateWrite) for EEPROM_ValidateWrite
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) for EEPROM_WritePara
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) for EEPROM_WritePara
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) for EEPROM_ReadMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) for EEPROM_WriteMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) for EEPROM_WriteMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) for EEPROM_WriteMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) for EEPROM_Default_MCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) for EEPROM_Validate_MCUDevInfo
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) for EEPROM_Init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to _csky_case_sqi.o(.text) for ___gnu_csky_case_sqi
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIOA0_EXI_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.Set_GroupSend) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ValidateWrite) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to memset_fast.o(.text) for memset
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_uart.o(.text.Set_GroupSend) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) refers to strncmp.o(.text) for strncmp
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (487 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2911 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text.GPIO_Read_Output(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3105 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3422 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3167 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4135 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3538 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInit(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3654 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4854 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4962 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2860 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .bss(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (2 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.GPT0_CONFIG(Obj/mcu_initial.o), (2 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text.__modsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_uart.o), (4 bytes).
+	Removing .text.UART0_TASK(Obj/SYSTEM_uart.o), (60 bytes).
+	Removing .text.UART2_RecvINT_Processing(Obj/SYSTEM_uart.o), (52 bytes).
+	Removing .text.UART0_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (96 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (144 bytes).
+	Removing .text.Clear_SendFlag(Obj/SYSTEM_uart.o), (16 bytes).
+	Removing .text.BUS485_Jump_Boot(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Get_BUS485_Send_State(Obj/SYSTEM_uart.o), (28 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (2 bytes).
+	Removing .text(Obj/SYSTEM_dip_switch.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_dip_switch.o), (0 bytes).
+	Removing .text(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .text.BLV_CMD_SN(Obj/SYSTEM_control_rly.o), (16 bytes).
+	Removing .text(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .bss(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (125 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_sqi.o), (0 bytes).
+	Removing .bss(_csky_case_sqi.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+	Removing .data(strncmp.o), (0 bytes).
+	Removing .bss(strncmp.o), (0 bytes).
+
+597 unused seciton(s) (total 158568 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	$d                                 0x00000000               0  .text
+	FWlib_apt32f102_clkcalib.o         0x00000000     df        0  *ABS*
+	FWlib_apt32f102_tkey_c_1_17.o      0x00000000     df        0  *ABS*
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+	$d                                 0x00003ed4               0  .text.EEPROM_CheckSum
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+	bp                                 0x00004c40      O       16  .rodata
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+	NUM.6030                           0x2000009c      O        1  .bss
+	update_20ms.5936                   0x200000b8      O        4  .bss
+	Ctrl_LED_tick.6038                 0x200000bc      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_sqi               0x00000cfc      F       22  .text
+	___gnu_csky_case_uqi               0x00000d14      F       20  .text
+	__fixunsdfsi                       0x00000d28      F       56  .text
+	__adddf3                           0x00001034      F       46  .text
+	__subdf3                           0x00001064      F       54  .text
+	__muldf3                           0x0000109c      F      564  .text
+	__divdf3                           0x000012d0      F      340  .text
+	__gtdf2                            0x00001424      F       60  .text
+	__gedf2                            0x00001460      F       60  .text
+	__ledf2                            0x0000149c      F       58  .text
+	__floatsidf                        0x000014d8      F      112  .text
+	__fixdfsi                          0x00001548      F      112  .text
+	__floatunsidf                      0x000015b8      F       84  .text
+	__muldi3                           0x0000160c      F       68  .text
+	__clzsi2                           0x00001650      F       64  .text
+	__pack_d                           0x00001690      F      412  .text
+	__unpack_d                         0x0000182c      F      196  .text
+	__fpcmp_parts_d                    0x000018f0      F      140  .text
+	__memset_fast                      0x0000197c    w F      136  .text
+	memset                             0x0000197c    w F      136  .text
+	__memcpy_fast                      0x00001a04    w F      100  .text
+	memcpy                             0x00001a04    w F      100  .text
+	__GI_strncmp                       0x00001a68      F       38  .text
+	strncmp                            0x00001a68    w F       38  .text
+	__main                             0x00001a90      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00001b3c      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x00001b88      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x00001bb8      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x00001c40      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x00001c68      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00001ca4      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x00001cb8      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00001cd0      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00001cf0      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00001d0c      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x00001d28      F       64  .text.EXTI_trigger_CMD
+	EXTI_interrupt_CMD                 0x00001d68      F       52  .text.EXTI_interrupt_CMD
+	GPIO_EXTI_interrupt                0x00001d9c      F        4  .text.GPIO_EXTI_interrupt
+	EXI4_Int_Enable                    0x00001da0      F       16  .text.EXI4_Int_Enable
+	SYSCON_Int_Enable                  0x00001db0      F       12  .text.SYSCON_Int_Enable
+	SYSCON_Int_Disable                 0x00001dbc      F       12  .text.SYSCON_Int_Disable
+	SYSCON_INT_Priority                0x00001dc8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x00001dec      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x00001e1c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x00001efc      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00001f10      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_IntGroup_Set                  0x00001f20      F      268  .text.GPIO_IntGroup_Set
+	GPIOA0_EXI_Init                    0x0000202c      F      252  .text.GPIOA0_EXI_Init
+	GPIO_Write_High                    0x00002128      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00002130      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x00002138      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x0000214e      F       16  .text.GPIO_Read_Status
+	LPT_Soft_Reset                     0x00002160      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x00002174      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x00002184      F       28  .text.BT_DeInit
+	BT_Start                           0x000021a0      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x000021a8      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000021b2      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000021ca      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x000021f6      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x000021fc      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00002210      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00002220      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000022c0      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x000022d4      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x00002318      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x0000232c      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x000023e0      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x000023f0      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00002400      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x0000241c      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00002434      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x0000244c      F       24  .text.UART2_DeInit
+	UART1_Int_Enable                   0x00002464      F       28  .text.UART1_Int_Enable
+	UART2_Int_Enable                   0x00002480      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x0000249c      F      236  .text.UART_IO_Init
+	UARTInitRxTxIntEn                  0x00002588      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x00002598      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000025b8      F       40  .text.EPT_Stop
+	Page_ProgramData                   0x000025e0      F      160  .text.Page_ProgramData
+	ReadDataArry_U8                    0x00002680      F       42  .text.ReadDataArry_U8
+	main                               0x000026ac      F       44  .text.startup.main
+	delay_nms                          0x000026d8      F       44  .text.delay_nms
+	delay_nus                          0x00002704      F       34  .text.delay_nus
+	BT_CONFIG                          0x00002728      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x00002788      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x000027ec      F       76  .text.APT32F102_init
+	SYSCONIntHandler                   0x00002838      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00002928      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00002990      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x000029f8      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00002ba4      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00002bd8      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00002c58      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00002cc8      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00002d04      F      148  .text.UART1IntHandler
+	UART2IntHandler                    0x00002d98      F       76  .text.UART2IntHandler
+	SPI0IntHandler                     0x00002de4      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x00002ecc      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00002f20      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00002f50      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x00002f80      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x00002fc8      F       32  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00002fe8      F      108  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x00003054      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x00003088      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x000030d4      F      112  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00003144      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00003146      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x0000314e      F        8  .text.Trap3Handler
+	Trap2Handler                       0x00003156      F        8  .text.Trap2Handler
+	Trap1Handler                       0x0000315e      F        8  .text.Trap1Handler
+	Trap0Handler                       0x00003166      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x0000316e      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x00003176      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x0000317e      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x00003186      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x0000318e      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x00003196      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x0000319e      F        8  .text.I2CIntHandler
+	__divsi3                           0x000031a8      F       36  .text.__divsi3
+	__udivsi3                          0x000031cc      F       36  .text.__udivsi3
+	__umodsi3                          0x000031f0      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x00003214      F        6  .text.CK_CPU_EnAllNormalIrq
+	CK_CPU_DisAllNormalIrq             0x0000321a      F        6  .text.CK_CPU_DisAllNormalIrq
+	UARTx_Init                         0x00003220      F      340  .text.UARTx_Init
+	UART1_RecvINT_Processing           0x00003374      F       68  .text.UART1_RecvINT_Processing
+	UART1_TASK                         0x000033b8      F      112  .text.UART1_TASK
+	BUS485_Send                        0x00003428      F      208  .text.BUS485_Send
+	MultSend_Task                      0x000034f8      F      100  .text.MultSend_Task
+	Set_GroupSend                      0x0000355c      F       92  .text.Set_GroupSend
+	BUS485Send_Task                    0x000035b8      F       44  .text.BUS485Send_Task
+	BusIdle_Task                       0x000035e4      F       60  .text.BusIdle_Task
+	BusBusy_Task                       0x00003620      F       84  .text.BusBusy_Task
+	Dbg_Println                        0x00003674      F       12  .text.Dbg_Println
+	DIP_GetSwitchState                 0x00003680      F       52  .text.DIP_GetSwitchState
+	DIP_Switch_Init                    0x000036b4      F      140  .text.DIP_Switch_Init
+	DIP_ScanTask                       0x00003740      F      140  .text.DIP_ScanTask
+	Relay_Init                         0x000037cc      F      192  .text.Relay_Init
+	CheckSum                           0x0000388c      F       22  .text.CheckSum
+	CheckSum2                          0x000038a2      F       24  .text.CheckSum2
+	Change_OUTV                        0x000038bc      F       28  .text.Change_OUTV
+	BLV_VolOut_Ctrl                    0x000038d8      F       92  .text.BLV_VolOut_Ctrl
+	BLV_RLY_Ctrl_Purpose               0x00003934      F      124  .text.BLV_RLY_Ctrl_Purpose
+	BLV_RLY_Task                       0x000039b0      F       72  .text.BLV_RLY_Task
+	BLV_A9RLY_CMD_SET_Processing       0x000039f8      F      164  .text.BLV_A9RLY_CMD_SET_Processing
+	BLV_A9RLY_CMD_READ_Processing      0x00003a9c      F      140  .text.BLV_A9RLY_CMD_READ_Processing
+	BLV_WINDOUT_CMD_SET_Processing     0x00003b28      F      216  .text.BLV_WINDOUT_CMD_SET_Processing
+	BLV_WINDOUT_CMD_READ_Processing    0x00003c00      F      148  .text.BLV_WINDOUT_CMD_READ_Processing
+	BLV_DEVPROT_CMD_SET_Processing     0x00003c94      F      136  .text.BLV_DEVPROT_CMD_SET_Processing
+	BLV_DEVPROT_CMD_READ_Processing    0x00003d1c      F      116  .text.BLV_DEVPROT_CMD_READ_Processing
+	BLV_RLY_RS485_Pro                  0x00003d90      F      272  .text.BLV_RLY_RS485_Pro
+	CTRL_LEDStatus_Task                0x00003ea0      F       52  .text.CTRL_LEDStatus_Task
+	EEPROM_CheckSum                    0x00003ed4      F       22  .text.EEPROM_CheckSum
+	EEPROM_ReadPara                    0x00003eec      F      424  .text.EEPROM_ReadPara
+	EEPROM_ValidateWrite               0x000040a0      F      116  .text.EEPROM_ValidateWrite
+	EEPROM_WritePara                   0x00004114      F      176  .text.EEPROM_WritePara
+	EEPROM_ReadMCUDevInfo              0x000041c4      F      112  .text.EEPROM_ReadMCUDevInfo
+	EEPROM_WriteMCUDevInfo             0x00004234      F       64  .text.EEPROM_WriteMCUDevInfo
+	EEPROM_Default_MCUDevInfo          0x00004274      F       52  .text.EEPROM_Default_MCUDevInfo
+	EEPROM_Validate_MCUDevInfo         0x000042a8      F       88  .text.EEPROM_Validate_MCUDevInfo
+	EEPROM_Init                        0x00004300      F       92  .text.EEPROM_Init
+	TK_Sampling_prog                   0x0000435c      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x000043b4      F      136  .text.TKEYIntHandler
+	get_key_number                     0x0000443c      F       40  .text.get_key_number
+	TK_Scan_Start                      0x00004464      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x00004484      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00004604      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00004720      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x000048f0      F       84  .text.TK_result_prog
+	CORETHandler                       0x00004944      F      120  .text.CORETHandler
+	std_clk_calib                      0x000049bc      F      644  .text.std_clk_calib
+	__thenan_df                        0x00004c70      O       20  .rodata
+	__clz_tab                          0x00004c84      O      256  .rodata
+	_end_rodata                        0x00004f20               0  .rodata
+	HWD                                0x20000000      O        4  .data
+	_start_data                        0x20000000               0  .data
+	CRC                                0x20000004      O        4  .data
+	BT1                                0x20000008      O        4  .data
+	BT0                                0x2000000c      O        4  .data
+	WWDT                               0x20000010      O        4  .data
+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
+	EPT0                               0x20000020      O        4  .data
+	GPT0                               0x20000024      O        4  .data
+	CA0                                0x20000028      O        4  .data
+	SIO0                               0x2000002c      O        4  .data
+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	s_tkey                             0x20000068      O        4  .data
+	samp_setover_f                     0x2000006c      O        1  .data
+	tk_overflow_en                     0x2000006d      O        1  .data
+	tk_div                             0x2000006e      O       34  .data
+	neg_build_bounce                   0x20000090      O        1  .data
+	pos_build_bounce                   0x20000091      O        1  .data
+	tk_scan_para0                      0x20000094      O        4  .data
+	scan_step_temp                     0x20000098      O        1  .data
+	_end_data                          0x2000009c               0  .data
+	_bss_start                         0x2000009c               0  .bss
+	SysTick_100us                      0x200000a0      O        4  .bss
+	SysTick_1ms                        0x200000a4      O        4  .bss
+	RS485_Comming                      0x200000a8      O        4  .bss
+	RS485_Comm_Flag                    0x200000ac      O        4  .bss
+	RS485_Comm_Start                   0x200000b0      O        4  .bss
+	RS485_Comm_End                     0x200000b4      O        4  .bss
+	Press_debounce_data                0x200000c0      O        1  .bss
+	TK_Lowpower_mode                   0x200000c1      O        1  .bss
+	TK_Lowpower_level                  0x200000c2      O        1  .bss
+	TK_longpress_time                  0x200000c4      O        4  .bss
+	Release_debounce_data              0x200000c8      O        1  .bss
+	Key_mode                           0x200000c9      O        1  .bss
+	TK_icon                            0x200000ca      O       34  .bss
+	MultiTimes_Filter                  0x200000ec      O        1  .bss
+	Base_Speed                         0x200000ed      O        1  .bss
+	TK_IO_ENABLE                       0x200000f0      O        4  .bss
+	Valid_Key_Num                      0x200000f4      O        1  .bss
+	TK_senprd                          0x200000f6      O       34  .bss
+	TK_Wakeup_level                    0x20000118      O        1  .bss
+	TK_Triggerlevel                    0x2000011a      O       34  .bss
+	TK_EC_LEVEL                        0x2000013c      O        2  .bss
+	TK_FVR_LEVEL                       0x2000013e      O        2  .bss
+	TK_BaseCnt                         0x20000140      O        4  .bss
+	TK_PSEL_MODE                       0x20000144      O        2  .bss
+	R_CMPB_BUF                         0x20000148      O        4  .bss
+	R_CMPA_BUF                         0x2000014c      O        4  .bss
+	R_SIORX_buf                        0x20000150      O       40  .bss
+	g_uart                             0x20000178      O      160  .bss
+	g_uart1                            0x20000218      O      160  .bss
+	m_send                             0x200002b8      O      164  .bss
+	g_Dip                              0x2000035c      O       16  .bss
+	c_rly                              0x2000036c      O       24  .bss
+	g_mcu_dev                          0x20000384      O       37  .bss
+	baseline_data0                     0x200003ac      O       34  .bss
+	TK_Postive_build2                  0x200003ce      O       17  .bss
+	Key_Map1                           0x200003e0      O        4  .bss
+	offset_data2_abs                   0x200003e4      O       34  .bss
+	scan_f                             0x20000406      O        1  .bss
+	offset_data1_abs                   0x20000408      O       34  .bss
+	Release_debounce0                  0x2000042a      O       17  .bss
+	Key_Map0                           0x2000043c      O        4  .bss
+	bsae_over_f                        0x20000440      O        1  .bss
+	scan_cnt                           0x20000442      O        2  .bss
+	Press_debounce0                    0x20000444      O       17  .bss
+	offset_data0                       0x20000456      O       34  .bss
+	sampling_data1                     0x20000478      O       34  .bss
+	Key_Map2                           0x2000049c      O        4  .bss
+	Release_debounce1                  0x200004a0      O       17  .bss
+	tk_overflow_f                      0x200004b1      O        1  .bss
+	TK_Negtive_build2                  0x200004b2      O       17  .bss
+	base_update_f                      0x200004c3      O        1  .bss
+	TK_Postive_build1                  0x200004c4      O       17  .bss
+	time_cnt                           0x200004d8      O        4  .bss
+	lpt_scan_pend_cnt                  0x200004dc      O        2  .bss
+	TK_track_cnt                       0x200004de      O        1  .bss
+	Key_Map                            0x200004e0      O        4  .bss
+	baseline_data1                     0x200004e4      O       34  .bss
+	TK_Postive_build0                  0x20000506      O       17  .bss
+	sampling_data2                     0x20000518      O       34  .bss
+	offset_data1                       0x2000053a      O       34  .bss
+	TK_ovrdect_cnt                     0x2000055c      O        1  .bss
+	Press_debounce2                    0x2000055d      O       17  .bss
+	TK_Negtive_build1                  0x2000056e      O       17  .bss
+	tk_num                             0x2000057f      O        1  .bss
+	TK_Negtive_build0                  0x20000580      O       17  .bss
+	Press_debounce1                    0x20000591      O       17  .bss
+	Release_debounce2                  0x200005a2      O       17  .bss
+	r_Key_Map_Temp                     0x200005b4      O        4  .bss
+	tk_seque                           0x200005b8      O       17  .bss
+	scan_step                          0x200005c9      O        1  .bss
+	baseline_data2                     0x200005ca      O       34  .bss
+	tk_sampling_max                    0x200005ec      O       34  .bss
+	offset_data0_abs                   0x2000060e      O       34  .bss
+	offset_data2                       0x20000630      O       34  .bss
+	sampling_data0                     0x20000652      O       34  .bss
+	_ebss                              0x20000674               0  .bss
+	_end                               0x20000674               0  .bss
+	end                                0x20000674               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00004f20, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1007  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1015  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1021  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1028  .text          	sqrt.o
+    0x00000cfc   0x00000016   Code   RO       1039  .text          	_csky_case_sqi.o
+    0x00000d12   0x00000002   PAD
+    0x00000d14   0x00000014   Code   RO       1044  .text          	_csky_case_uqi.o
+    0x00000d28   0x00000038   Code   RO       1049  .text          	_fixunsdfsi.o
+    0x00000d60   0x0000033a   Code   RO       1056  .text          	_addsub_df.o
+    0x0000109a   0x00000002   PAD
+    0x0000109c   0x00000234   Code   RO       1063  .text          	_mul_df.o
+    0x000012d0   0x00000154   Code   RO       1070  .text          	_div_df.o
+    0x00001424   0x0000003c   Code   RO       1077  .text          	_gt_df.o
+    0x00001460   0x0000003c   Code   RO       1084  .text          	_ge_df.o
+    0x0000149c   0x0000003a   Code   RO       1091  .text          	_le_df.o
+    0x000014d6   0x00000002   PAD
+    0x000014d8   0x00000070   Code   RO       1098  .text          	_si_to_df.o
+    0x00001548   0x00000070   Code   RO       1105  .text          	_df_to_si.o
+    0x000015b8   0x00000054   Code   RO       1119  .text          	_usi_to_df.o
+    0x0000160c   0x00000044   Code   RO       1126  .text          	_muldi3.o
+    0x00001650   0x00000040   Code   RO       1133  .text          	_clzsi2.o
+    0x00001690   0x0000019c   Code   RO       1139  .text          	_pack_df.o
+    0x0000182c   0x000000c4   Code   RO       1146  .text          	_unpack_df.o
+    0x000018f0   0x0000008c   Code   RO       1153  .text          	_fpcmp_parts_df.o
+    0x0000197c   0x00000088   Code   RO       1174  .text          	memset_fast.o
+    0x00001a04   0x00000064   Code   RO       1179  .text          	memcpy_fast.o
+    0x00001a68   0x00000026   Code   RO       1185  .text          	strncmp.o
+    0x00001a90   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00001ac8   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00001b3c   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x00001b88   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001bb8   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c40   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x00001c68   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001ca4   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x00001cb8   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cd0   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cf0   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d0c   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d28   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d68   0x00000034   Code   RO         79  .text.EXTI_interrupt_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d9c   0x00000004   Code   RO         80  .text.GPIO_EXTI_interrupt	Obj/FWlib_apt32f102_syscon.o
+    0x00001da0   0x00000010   Code   RO         91  .text.EXI4_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001db0   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001dbc   0x0000000c   Code   RO        104  .text.SYSCON_Int_Disable	Obj/FWlib_apt32f102_syscon.o
+    0x00001dc8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001dec   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001e1c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001efc   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001f10   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x00001f20   0x0000010c   Code   RO        143  .text.GPIO_IntGroup_Set	Obj/FWlib_apt32f102_gpio.o
+    0x0000202c   0x000000fc   Code   RO        144  .text.GPIOA0_EXI_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00002128   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00002130   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x00002138   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x0000214e   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00002160   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x00002174   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x00002184   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x000021a0   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x000021a8   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x000021b2   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000021ca   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000021f6   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x000021fc   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00002210   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00002220   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x000022c0   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000022d4   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002318   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000232c   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000023e0   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x000023f0   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00002400   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x0000241c   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00002434   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x0000244c   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00002464   0x0000001c   Code   RO        440  .text.UART1_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x00002480   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x0000249c   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x00002588   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x00002598   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x000025b8   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x000025e0   0x000000a0   Code   RO        641  .text.Page_ProgramData	Obj/FWlib_apt32f102_ifc.o
+    0x00002680   0x0000002a   Code   RO        644  .text.ReadDataArry_U8	Obj/FWlib_apt32f102_ifc.o
+    0x000026ac   0x0000002c   Code   RO        690  .text.startup.main	Obj/main.o
+    0x000026d8   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x00002704   0x00000022   Code   RO        708  .text.delay_nus	Obj/mcu_initial.o
+    0x00002728   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x00002788   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x000027ec   0x0000004c   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00002838   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00002928   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x00002990   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x000029f8   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002ba4   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00002bd8   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002c58   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00002cc8   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00002d04   0x00000094   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00002d98   0x0000004c   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00002de4   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x00002ecc   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00002f20   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00002f50   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x00002f80   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x00002fc8   0x00000020   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00002fe8   0x0000006c   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x00003054   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x00003088   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x000030d4   0x00000070   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00003144   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x00003146   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x0000314e   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x00003156   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x0000315e   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x00003166   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x0000316e   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x00003176   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x0000317e   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x00003186   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x0000318e   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x00003196   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x0000319e   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x000031a8   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x000031cc   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x000031f0   0x00000024   Code   RO        788  .text.__umodsi3	Obj/drivers_apt32f102.o
+    0x00003214   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x0000321a   0x00000006   Code   RO        807  .text.CK_CPU_DisAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00003220   0x00000154   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x00003374   0x00000044   Code   RO        823  .text.UART1_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x000033b8   0x00000070   Code   RO        824  .text.UART1_TASK	Obj/SYSTEM_uart.o
+    0x00003428   0x000000d0   Code   RO        830  .text.BUS485_Send	Obj/SYSTEM_uart.o
+    0x000034f8   0x00000064   Code   RO        831  .text.MultSend_Task	Obj/SYSTEM_uart.o
+    0x0000355c   0x0000005c   Code   RO        832  .text.Set_GroupSend	Obj/SYSTEM_uart.o
+    0x000035b8   0x0000002c   Code   RO        835  .text.BUS485Send_Task	Obj/SYSTEM_uart.o
+    0x000035e4   0x0000003c   Code   RO        837  .text.BusIdle_Task	Obj/SYSTEM_uart.o
+    0x00003620   0x00000054   Code   RO        838  .text.BusBusy_Task	Obj/SYSTEM_uart.o
+    0x00003674   0x0000000c   Code   RO        840  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00003680   0x00000034   Code   RO        858  .text.DIP_GetSwitchState	Obj/SYSTEM_dip_switch.o
+    0x000036b4   0x0000008c   Code   RO        859  .text.DIP_Switch_Init	Obj/SYSTEM_dip_switch.o
+    0x00003740   0x0000008c   Code   RO        860  .text.DIP_ScanTask	Obj/SYSTEM_dip_switch.o
+    0x000037cc   0x000000c0   Code   RO        878  .text.Relay_Init	Obj/SYSTEM_control_rly.o
+    0x0000388c   0x00000016   Code   RO        879  .text.CheckSum 	Obj/SYSTEM_control_rly.o
+    0x000038a2   0x00000018   Code   RO        880  .text.CheckSum2	Obj/SYSTEM_control_rly.o
+    0x000038bc   0x0000001c   Code   RO        881  .text.Change_OUTV	Obj/SYSTEM_control_rly.o
+    0x000038d8   0x0000005c   Code   RO        882  .text.BLV_VolOut_Ctrl	Obj/SYSTEM_control_rly.o
+    0x00003934   0x0000007c   Code   RO        883  .text.BLV_RLY_Ctrl_Purpose	Obj/SYSTEM_control_rly.o
+    0x000039b0   0x00000048   Code   RO        884  .text.BLV_RLY_Task	Obj/SYSTEM_control_rly.o
+    0x000039f8   0x000000a4   Code   RO        886  .text.BLV_A9RLY_CMD_SET_Processing	Obj/SYSTEM_control_rly.o
+    0x00003a9c   0x0000008c   Code   RO        887  .text.BLV_A9RLY_CMD_READ_Processing	Obj/SYSTEM_control_rly.o
+    0x00003b28   0x000000d8   Code   RO        888  .text.BLV_WINDOUT_CMD_SET_Processing	Obj/SYSTEM_control_rly.o
+    0x00003c00   0x00000094   Code   RO        889  .text.BLV_WINDOUT_CMD_READ_Processing	Obj/SYSTEM_control_rly.o
+    0x00003c94   0x00000088   Code   RO        890  .text.BLV_DEVPROT_CMD_SET_Processing	Obj/SYSTEM_control_rly.o
+    0x00003d1c   0x00000074   Code   RO        891  .text.BLV_DEVPROT_CMD_READ_Processing	Obj/SYSTEM_control_rly.o
+    0x00003d90   0x00000110   Code   RO        892  .text.BLV_RLY_RS485_Pro	Obj/SYSTEM_control_rly.o
+    0x00003ea0   0x00000034   Code   RO        893  .text.CTRL_LEDStatus_Task	Obj/SYSTEM_control_rly.o
+    0x00003ed4   0x00000016   Code   RO        911  .text.EEPROM_CheckSum	Obj/SYSTEM_eeprom.o
+    0x00003eec   0x000001b4   Code   RO        912  .text.EEPROM_ReadPara	Obj/SYSTEM_eeprom.o
+    0x000040a0   0x00000074   Code   RO        913  .text.EEPROM_ValidateWrite	Obj/SYSTEM_eeprom.o
+    0x00004114   0x000000b0   Code   RO        914  .text.EEPROM_WritePara	Obj/SYSTEM_eeprom.o
+    0x000041c4   0x00000070   Code   RO        915  .text.EEPROM_ReadMCUDevInfo	Obj/SYSTEM_eeprom.o
+    0x00004234   0x00000040   Code   RO        916  .text.EEPROM_WriteMCUDevInfo	Obj/SYSTEM_eeprom.o
+    0x00004274   0x00000034   Code   RO        917  .text.EEPROM_Default_MCUDevInfo	Obj/SYSTEM_eeprom.o
+    0x000042a8   0x00000058   Code   RO        918  .text.EEPROM_Validate_MCUDevInfo	Obj/SYSTEM_eeprom.o
+    0x00004300   0x0000005c   Code   RO        919  .text.EEPROM_Init	Obj/SYSTEM_eeprom.o
+    0x0000435c   0x00000058   Code   RO        953  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x000043b4   0x00000088   Code   RO        957  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000443c   0x00000028   Code   RO        958  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004464   0x00000020   Code   RO        960  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004484   0x00000180   Code   RO        961  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004604   0x0000011c   Code   RO        962  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004720   0x000001d0   Code   RO        963  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x000048f0   0x00000054   Code   RO        964  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004944   0x00000078   Code   RO        965  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x000049bc   0x00000284   Code   RO        987  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00004c40   0x00000030   Data   RO       1010  .rodata        	pow.o
+    0x00004c70   0x00000014   Data   RO       1115  .rodata        	_thenan_df.o
+    0x00004c84   0x00000100   Data   RO       1163  .rodata        	_clz.o
+    0x00004d84   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x00004d8f   0x0000000c   Data   RO        861  .rodata.str1.1 	Obj/SYSTEM_dip_switch.o
+    0x00004d9b   0x00000074   Data   RO        894  .rodata.str1.1 	Obj/SYSTEM_control_rly.o
+    0x00004e0f   0x00000111   Data   RO        920  .rodata.str1.1 	Obj/SYSTEM_eeprom.o
+
+    Region RAM (Base: 0x20000000, Size: 0x00000674, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000031   Data   RW        944  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000099   0x00000003   PAD
+    0x2000009c   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000a8   0x00000010   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200000b8   0x00000004   Zero   RW        857  .bss           	Obj/SYSTEM_dip_switch.o
+    0x200000bc   0x00000004   Zero   RW        877  .bss           	Obj/SYSTEM_control_rly.o
+    0x200000c0   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000146   0x00000002   PAD
+    0x20000148   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x20000178   0x000001e4   Zero   RW        854  COMMON         	Obj/SYSTEM_uart.o
+    0x2000035c   0x00000010   Zero   RW        874  COMMON         	Obj/SYSTEM_dip_switch.o
+    0x2000036c   0x00000018   Zero   RW        907  COMMON         	Obj/SYSTEM_control_rly.o
+    0x20000384   0x00000025   Zero   RW        933  COMMON         	Obj/SYSTEM_eeprom.o
+    0x200003a9   0x00000003   PAD
+    0x200003ac   0x000002c8   Zero   RW        983  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        286   Obj/arch_crt0.o
+         56          0          0          0        820   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        852          0          0          0      21127   Obj/FWlib_apt32f102_syscon.o
+        832          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        410          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+        202          0          0          0      16689   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+         44         11          0        134      11371   Obj/main.o
+        348          0          0          0      15905   Obj/mcu_initial.o
+       2414          0          0         60      14816   Obj/mcu_interrupt.o
+        108          0        104          0       8379   Obj/drivers_apt32f102.o
+         12          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+       1120          0          0        500      15118   Obj/SYSTEM_uart.o
+        332         12          0         20      10909   Obj/SYSTEM_dip_switch.o
+       1798        116          0         28      16406   Obj/SYSTEM_control_rly.o
+       1158        273          0         37      12528   Obj/SYSTEM_eeprom.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+      10860        412        104        779     260729   Object Totals
+          6          0          3          5          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16345   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16345   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         22          0          0          0          0   _csky_case_sqi.o
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+	------------------------------------------------------------
+       3194        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+         38          0          0          0          0   strncmp.o
+	------------------------------------------------------------
+        274          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      19498        736        156       1496     285749   Grand Totals
+      19498        736        156       1496     285749   Elf Image Totals
+      19498        736        156          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				20234 (  19.76kB)
+Total	RW	Size (RW Data + ZI Data)			1652 (  1.61kB)
+Total	ROM	Size (Code + RO Data + RW Data)		20390 (  19.91kB)
+
+======================================================================
diff --git a/Source/Lst/RLY_10V485_V02_20260402.asm b/Source/Lst/RLY_10V485_V02_20260402.asm
new file mode 100644
index 0000000..3ea42a8
--- /dev/null
+++ b/Source/Lst/RLY_10V485_V02_20260402.asm
@@ -0,0 +1,12584 @@
+
+.//Obj/RLY_10V485_V02_20260402.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	0000318e 	.long	0x0000318e
+       8:	0000317e 	.long	0x0000317e
+       c:	00000184 	.long	0x00000184
+      10:	00003186 	.long	0x00003186
+      14:	00003144 	.long	0x00003144
+      18:	00000184 	.long	0x00000184
+      1c:	00003176 	.long	0x00003176
+      20:	0000316e 	.long	0x0000316e
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	00003166 	.long	0x00003166
+      44:	0000315e 	.long	0x0000315e
+      48:	00003156 	.long	0x00003156
+      4c:	0000314e 	.long	0x0000314e
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00003146 	.long	0x00003146
+      80:	00004974 	.long	0x00004974
+      84:	00002838 	.long	0x00002838
+      88:	00002928 	.long	0x00002928
+      8c:	00002990 	.long	0x00002990
+      90:	000029f8 	.long	0x000029f8
+      94:	00000184 	.long	0x00000184
+      98:	00002ba4 	.long	0x00002ba4
+      9c:	00002f20 	.long	0x00002f20
+      a0:	00002f50 	.long	0x00002f50
+      a4:	00002bd8 	.long	0x00002bd8
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00002c58 	.long	0x00002c58
+      b4:	00002cc8 	.long	0x00002cc8
+      b8:	00002d04 	.long	0x00002d04
+      bc:	00002d98 	.long	0x00002d98
+      c0:	00000184 	.long	0x00000184
+      c4:	0000319e 	.long	0x0000319e
+      c8:	00000184 	.long	0x00000184
+      cc:	00002de4 	.long	0x00002de4
+      d0:	00002ecc 	.long	0x00002ecc
+      d4:	00002f80 	.long	0x00002f80
+      d8:	00002fc8 	.long	0x00002fc8
+      dc:	00002fe8 	.long	0x00002fe8
+      e0:	00003196 	.long	0x00003196
+      e4:	000043e4 	.long	0x000043e4
+      e8:	00003054 	.long	0x00003054
+      ec:	00000184 	.long	0x00000184
+      f0:	00003088 	.long	0x00003088
+      f4:	000030d4 	.long	0x000030d4
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x1a90	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x26ac	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00001a90 	.long	0x00001a90
+     198:	00000160 	.long	0x00000160
+     19c:	000026ac 	.long	0x000026ac
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e000071f 	bsr      	0x1034	// 1034 <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e0000705 	bsr      	0x1064	// 1064 <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000081a 	bsr      	0x12d0	// 12d0 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006dc 	bsr      	0x109c	// 109c <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007d0 	bsr      	0x12d0	// 12d0 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000068b 	bsr      	0x1064	// 1064 <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e0000656 	bsr      	0x1064	// 1064 <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e000066c 	bsr      	0x109c	// 109c <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000664 	bsr      	0x109c	// 109c <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e000065c 	bsr      	0x109c	// 109c <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000063a 	bsr      	0x1064	// 1064 <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000652 	bsr      	0x109c	// 109c <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000630 	bsr      	0x1064	// 1064 <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000644 	bsr      	0x109c	// 109c <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e000063e 	bsr      	0x109c	// 109c <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000063a 	bsr      	0x109c	// 109c <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e0000618 	bsr      	0x1064	// 1064 <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005f8 	bsr      	0x1034	// 1034 <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e000060a 	bsr      	0x1064	// 1064 <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e0000604 	bsr      	0x1064	// 1064 <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005f3 	bsr      	0x1064	// 1064 <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e000060b 	bsr      	0x109c	// 109c <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e0000603 	bsr      	0x109c	// 109c <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005c9 	bsr      	0x1034	// 1034 <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005f5 	bsr      	0x109c	// 109c <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005b7 	bsr      	0x1034	// 1034 <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005d7 	bsr      	0x109c	// 109c <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005cc 	bsr      	0x109c	// 109c <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x4c70	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000058a 	bsr      	0x1064	// 1064 <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000056a 	bsr      	0x1034	// 1034 <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006b2 	bsr      	0x12d0	// 12d0 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00004c70 	.long	0x00004c70
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000055a 	bsr      	0x109c	// 109c <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000054b 	bsr      	0x109c	// 109c <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e0000529 	bsr      	0x1064	// 1064 <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000521 	bsr      	0x1064	// 1064 <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000051b 	bsr      	0x1064	// 1064 <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000533 	bsr      	0x109c	// 109c <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000511 	bsr      	0x1064	// 1064 <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e0000529 	bsr      	0x109c	// 109c <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000521 	bsr      	0x109c	// 109c <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e0000519 	bsr      	0x109c	// 109c <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004df 	bsr      	0x1034	// 1034 <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e000050f 	bsr      	0x109c	// 109c <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004d5 	bsr      	0x1034	// 1034 <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e0000505 	bsr      	0x109c	// 109c <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004cb 	bsr      	0x1034	// 1034 <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004fb 	bsr      	0x109c	// 109c <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004c1 	bsr      	0x1034	// 1034 <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004f1 	bsr      	0x109c	// 109c <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004b7 	bsr      	0x1034	// 1034 <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004e3 	bsr      	0x109c	// 109c <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004dd 	bsr      	0x109c	// 109c <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e00004a1 	bsr      	0x1034	// 1034 <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004d1 	bsr      	0x109c	// 109c <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e0000499 	bsr      	0x1034	// 1034 <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004c5 	bsr      	0x109c	// 109c <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000048b 	bsr      	0x1034	// 1034 <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e0000487 	bsr      	0x1034	// 1034 <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004b4 	bsr      	0x109c	// 109c <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000490 	bsr      	0x1064	// 1064 <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e000048c 	bsr      	0x1064	// 1064 <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e0000486 	bsr      	0x1064	// 1064 <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e000049e 	bsr      	0x109c	// 109c <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e0000496 	bsr      	0x109c	// 109c <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e000045c 	bsr      	0x1034	// 1034 <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000454 	bsr      	0x1034	// 1034 <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000481 	bsr      	0x109c	// 109c <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e000045d 	bsr      	0x1064	// 1064 <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e0000457 	bsr      	0x1064	// 1064 <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e000046f 	bsr      	0x109c	// 109c <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e0000467 	bsr      	0x109c	// 109c <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e000042d 	bsr      	0x1034	// 1034 <__adddf3>
+     7de:	01db      	lrw      	r6, 0x4c70	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e0000426 	bsr      	0x1034	// 1034 <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000673 	bsr      	0x14d8	// 14d8 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x4c70	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000413 	bsr      	0x1034	// 1034 <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e000040f 	bsr      	0x1034	// 1034 <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e000040b 	bsr      	0x1034	// 1034 <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e000041d 	bsr      	0x1064	// 1064 <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e0000419 	bsr      	0x1064	// 1064 <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000415 	bsr      	0x1064	// 1064 <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003ec 	bsr      	0x1034	// 1034 <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003fc 	bsr      	0x1064	// 1064 <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005d6 	bsr      	0x1424	// 1424 <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003cc 	bsr      	0x1064	// 1064 <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003ac 	bsr      	0x1034	// 1034 <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003da 	bsr      	0x109c	// 109c <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003b6 	bsr      	0x1064	// 1064 <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003b0 	bsr      	0x1064	// 1064 <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003c8 	bsr      	0x109c	// 109c <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003c0 	bsr      	0x109c	// 109c <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e0000386 	bsr      	0x1034	// 1034 <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e000037e 	bsr      	0x1034	// 1034 <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000390 	bsr      	0x1064	// 1064 <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000038a 	bsr      	0x1064	// 1064 <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e000039e 	bsr      	0x109c	// 109c <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e0000398 	bsr      	0x109c	// 109c <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e0000378 	bsr      	0x1064	// 1064 <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000390 	bsr      	0x109c	// 109c <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e0000358 	bsr      	0x1034	// 1034 <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e0000388 	bsr      	0x109c	// 109c <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e0000368 	bsr      	0x1064	// 1064 <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000380 	bsr      	0x109c	// 109c <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e0000348 	bsr      	0x1034	// 1034 <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e0000378 	bsr      	0x109c	// 109c <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e0000356 	bsr      	0x1064	// 1064 <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000036a 	bsr      	0x109c	// 109c <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000345 	bsr      	0x1064	// 1064 <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000475 	bsr      	0x12d0	// 12d0 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000353 	bsr      	0x109c	// 109c <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000031b 	bsr      	0x1034	// 1034 <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e000032d 	bsr      	0x1064	// 1064 <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e0000329 	bsr      	0x1064	// 1064 <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000323 	bsr      	0x1064	// 1064 <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000321 	bsr      	0x109c	// 109c <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002fb 	bsr      	0x1064	// 1064 <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000511 	bsr      	0x149c	// 149c <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00004c70 	.long	0x00004c70
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e000027f 	bsr      	0x109c	// 109c <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000245 	bsr      	0x1034	// 1034 <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e0000248 	bsr      	0x1064	// 1064 <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000037a 	bsr      	0x12d0	// 12d0 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_sqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	7446      	sextb      	r1, r1
+     d08:	4121      	lsli      	r1, r1, 1
+     d0a:	63c4      	addu      	r15, r1
+     d0c:	9820      	ld.w      	r1, (r14, 0x0)
+     d0e:	1401      	addi      	r14, r14, 4
+     d10:	783c      	jmp      	r15
+	...
+
+00000d14 <___gnu_csky_case_uqi>:
+     d14:	1421      	subi      	r14, r14, 4
+     d16:	b820      	st.w      	r1, (r14, 0x0)
+     d18:	6c7f      	mov      	r1, r15
+     d1a:	6040      	addu      	r1, r0
+     d1c:	8120      	ld.b      	r1, (r1, 0x0)
+     d1e:	4121      	lsli      	r1, r1, 1
+     d20:	63c4      	addu      	r15, r1
+     d22:	9820      	ld.w      	r1, (r14, 0x0)
+     d24:	1401      	addi      	r14, r14, 4
+     d26:	783c      	jmp      	r15
+
+00000d28 <__fixunsdfsi>:
+     d28:	14d2      	push      	r4-r5, r15
+     d2a:	3200      	movi      	r2, 0
+     d2c:	106c      	lrw      	r3, 0x41e00000	// d5c <__fixunsdfsi+0x34>
+     d2e:	6d43      	mov      	r5, r0
+     d30:	6d07      	mov      	r4, r1
+     d32:	e0000397 	bsr      	0x1460	// 1460 <__gedf2>
+     d36:	38df      	btsti      	r0, 31
+     d38:	0c06      	bf      	0xd44	// d44 <__fixunsdfsi+0x1c>
+     d3a:	6c17      	mov      	r0, r5
+     d3c:	6c53      	mov      	r1, r4
+     d3e:	e0000405 	bsr      	0x1548	// 1548 <__fixdfsi>
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	3200      	movi      	r2, 0
+     d46:	1066      	lrw      	r3, 0x41e00000	// d5c <__fixunsdfsi+0x34>
+     d48:	6c17      	mov      	r0, r5
+     d4a:	6c53      	mov      	r1, r4
+     d4c:	e000018c 	bsr      	0x1064	// 1064 <__subdf3>
+     d50:	e00003fc 	bsr      	0x1548	// 1548 <__fixdfsi>
+     d54:	3380      	movi      	r3, 128
+     d56:	4378      	lsli      	r3, r3, 24
+     d58:	600c      	addu      	r0, r3
+     d5a:	1492      	pop      	r4-r5, r15
+     d5c:	41e00000 	.long	0x41e00000
+
+00000d60 <_fpadd_parts>:
+     d60:	14c4      	push      	r4-r7
+     d62:	142a      	subi      	r14, r14, 40
+     d64:	9060      	ld.w      	r3, (r0, 0x0)
+     d66:	3b01      	cmphsi      	r3, 2
+     d68:	6dcb      	mov      	r7, r2
+     d6a:	0c67      	bf      	0xe38	// e38 <_fpadd_parts+0xd8>
+     d6c:	9140      	ld.w      	r2, (r1, 0x0)
+     d6e:	3a01      	cmphsi      	r2, 2
+     d70:	0c66      	bf      	0xe3c	// e3c <_fpadd_parts+0xdc>
+     d72:	3b44      	cmpnei      	r3, 4
+     d74:	0cde      	bf      	0xf30	// f30 <_fpadd_parts+0x1d0>
+     d76:	3a44      	cmpnei      	r2, 4
+     d78:	0c62      	bf      	0xe3c	// e3c <_fpadd_parts+0xdc>
+     d7a:	3a42      	cmpnei      	r2, 2
+     d7c:	0cb7      	bf      	0xeea	// eea <_fpadd_parts+0x18a>
+     d7e:	3b42      	cmpnei      	r3, 2
+     d80:	0c5e      	bf      	0xe3c	// e3c <_fpadd_parts+0xdc>
+     d82:	9043      	ld.w      	r2, (r0, 0xc)
+     d84:	9064      	ld.w      	r3, (r0, 0x10)
+     d86:	9082      	ld.w      	r4, (r0, 0x8)
+     d88:	91a2      	ld.w      	r5, (r1, 0x8)
+     d8a:	b842      	st.w      	r2, (r14, 0x8)
+     d8c:	b863      	st.w      	r3, (r14, 0xc)
+     d8e:	9143      	ld.w      	r2, (r1, 0xc)
+     d90:	9164      	ld.w      	r3, (r1, 0x10)
+     d92:	b840      	st.w      	r2, (r14, 0x0)
+     d94:	b861      	st.w      	r3, (r14, 0x4)
+     d96:	5c75      	subu      	r3, r4, r5
+     d98:	3bdf      	btsti      	r3, 31
+     d9a:	6c8f      	mov      	r2, r3
+     d9c:	08d2      	bt      	0xf40	// f40 <_fpadd_parts+0x1e0>
+     d9e:	363f      	movi      	r6, 63
+     da0:	6499      	cmplt      	r6, r2
+     da2:	0c50      	bf      	0xe42	// e42 <_fpadd_parts+0xe2>
+     da4:	6515      	cmplt      	r5, r4
+     da6:	0cbf      	bf      	0xf24	// f24 <_fpadd_parts+0x1c4>
+     da8:	3200      	movi      	r2, 0
+     daa:	3300      	movi      	r3, 0
+     dac:	b840      	st.w      	r2, (r14, 0x0)
+     dae:	b861      	st.w      	r3, (r14, 0x4)
+     db0:	9061      	ld.w      	r3, (r0, 0x4)
+     db2:	9141      	ld.w      	r2, (r1, 0x4)
+     db4:	648e      	cmpne      	r3, r2
+     db6:	0c78      	bf      	0xea6	// ea6 <_fpadd_parts+0x146>
+     db8:	3b40      	cmpnei      	r3, 0
+     dba:	0cad      	bf      	0xf14	// f14 <_fpadd_parts+0x1b4>
+     dbc:	9800      	ld.w      	r0, (r14, 0x0)
+     dbe:	9821      	ld.w      	r1, (r14, 0x4)
+     dc0:	9842      	ld.w      	r2, (r14, 0x8)
+     dc2:	9863      	ld.w      	r3, (r14, 0xc)
+     dc4:	6400      	cmphs      	r0, r0
+     dc6:	600b      	subc      	r0, r2
+     dc8:	604f      	subc      	r1, r3
+     dca:	39df      	btsti      	r1, 31
+     dcc:	08bd      	bt      	0xf46	// f46 <_fpadd_parts+0x1e6>
+     dce:	3300      	movi      	r3, 0
+     dd0:	b761      	st.w      	r3, (r7, 0x4)
+     dd2:	b782      	st.w      	r4, (r7, 0x8)
+     dd4:	6c83      	mov      	r2, r0
+     dd6:	6cc7      	mov      	r3, r1
+     dd8:	b703      	st.w      	r0, (r7, 0xc)
+     dda:	b724      	st.w      	r1, (r7, 0x10)
+     ddc:	3000      	movi      	r0, 0
+     dde:	3100      	movi      	r1, 0
+     de0:	2800      	subi      	r0, 1
+     de2:	2900      	subi      	r1, 1
+     de4:	6401      	cmplt      	r0, r0
+     de6:	6009      	addc      	r0, r2
+     de8:	604d      	addc      	r1, r3
+     dea:	038f      	lrw      	r4, 0xfffffff	// 1028 <_fpadd_parts+0x2c8>
+     dec:	6450      	cmphs      	r4, r1
+     dee:	0c67      	bf      	0xebc	// ebc <_fpadd_parts+0x15c>
+     df0:	6506      	cmpne      	r1, r4
+     df2:	0cfd      	bf      	0xfec	// fec <_fpadd_parts+0x28c>
+     df4:	3000      	movi      	r0, 0
+     df6:	9722      	ld.w      	r1, (r7, 0x8)
+     df8:	2801      	subi      	r0, 2
+     dfa:	2900      	subi      	r1, 1
+     dfc:	03d4      	lrw      	r6, 0xfffffff	// 1028 <_fpadd_parts+0x2c8>
+     dfe:	b802      	st.w      	r0, (r14, 0x8)
+     e00:	b8e0      	st.w      	r7, (r14, 0x0)
+     e02:	0403      	br      	0xe08	// e08 <_fpadd_parts+0xa8>
+     e04:	6596      	cmpne      	r5, r6
+     e06:	0c83      	bf      	0xf0c	// f0c <_fpadd_parts+0x1ac>
+     e08:	4301      	lsli      	r0, r3, 1
+     e0a:	4a9f      	lsri      	r4, r2, 31
+     e0c:	6d00      	or      	r4, r0
+     e0e:	42a1      	lsli      	r5, r2, 1
+     e10:	6c97      	mov      	r2, r5
+     e12:	6cd3      	mov      	r3, r4
+     e14:	3500      	movi      	r5, 0
+     e16:	3400      	movi      	r4, 0
+     e18:	2c00      	subi      	r4, 1
+     e1a:	2d00      	subi      	r5, 1
+     e1c:	6511      	cmplt      	r4, r4
+     e1e:	6109      	addc      	r4, r2
+     e20:	614d      	addc      	r5, r3
+     e22:	6558      	cmphs      	r6, r5
+     e24:	6c07      	mov      	r0, r1
+     e26:	2900      	subi      	r1, 1
+     e28:	0bee      	bt      	0xe04	// e04 <_fpadd_parts+0xa4>
+     e2a:	98e0      	ld.w      	r7, (r14, 0x0)
+     e2c:	b743      	st.w      	r2, (r7, 0xc)
+     e2e:	b764      	st.w      	r3, (r7, 0x10)
+     e30:	3303      	movi      	r3, 3
+     e32:	b702      	st.w      	r0, (r7, 0x8)
+     e34:	b760      	st.w      	r3, (r7, 0x0)
+     e36:	6c1f      	mov      	r0, r7
+     e38:	140a      	addi      	r14, r14, 40
+     e3a:	1484      	pop      	r4-r7
+     e3c:	6c07      	mov      	r0, r1
+     e3e:	140a      	addi      	r14, r14, 40
+     e40:	1484      	pop      	r4-r7
+     e42:	3b20      	cmplti      	r3, 1
+     e44:	088c      	bt      	0xf5c	// f5c <_fpadd_parts+0x1fc>
+     e46:	3300      	movi      	r3, 0
+     e48:	2b1f      	subi      	r3, 32
+     e4a:	60c8      	addu      	r3, r2
+     e4c:	3bdf      	btsti      	r3, 31
+     e4e:	b866      	st.w      	r3, (r14, 0x18)
+     e50:	08bb      	bt      	0xfc6	// fc6 <_fpadd_parts+0x266>
+     e52:	98a1      	ld.w      	r5, (r14, 0x4)
+     e54:	714d      	lsr      	r5, r3
+     e56:	b8a4      	st.w      	r5, (r14, 0x10)
+     e58:	3500      	movi      	r5, 0
+     e5a:	b8a5      	st.w      	r5, (r14, 0x14)
+     e5c:	9866      	ld.w      	r3, (r14, 0x18)
+     e5e:	3bdf      	btsti      	r3, 31
+     e60:	3500      	movi      	r5, 0
+     e62:	3600      	movi      	r6, 0
+     e64:	08ad      	bt      	0xfbe	// fbe <_fpadd_parts+0x25e>
+     e66:	3201      	movi      	r2, 1
+     e68:	708c      	lsl      	r2, r3
+     e6a:	6d8b      	mov      	r6, r2
+     e6c:	3200      	movi      	r2, 0
+     e6e:	3300      	movi      	r3, 0
+     e70:	2a00      	subi      	r2, 1
+     e72:	2b00      	subi      	r3, 1
+     e74:	6489      	cmplt      	r2, r2
+     e76:	6095      	addc      	r2, r5
+     e78:	60d9      	addc      	r3, r6
+     e7a:	98a0      	ld.w      	r5, (r14, 0x0)
+     e7c:	98c1      	ld.w      	r6, (r14, 0x4)
+     e7e:	6948      	and      	r5, r2
+     e80:	698c      	and      	r6, r3
+     e82:	6c97      	mov      	r2, r5
+     e84:	6cdb      	mov      	r3, r6
+     e86:	6c8c      	or      	r2, r3
+     e88:	3a40      	cmpnei      	r2, 0
+     e8a:	3500      	movi      	r5, 0
+     e8c:	6155      	addc      	r5, r5
+     e8e:	6c97      	mov      	r2, r5
+     e90:	3300      	movi      	r3, 0
+     e92:	98a4      	ld.w      	r5, (r14, 0x10)
+     e94:	98c5      	ld.w      	r6, (r14, 0x14)
+     e96:	6d48      	or      	r5, r2
+     e98:	6d8c      	or      	r6, r3
+     e9a:	9061      	ld.w      	r3, (r0, 0x4)
+     e9c:	9141      	ld.w      	r2, (r1, 0x4)
+     e9e:	648e      	cmpne      	r3, r2
+     ea0:	b8a0      	st.w      	r5, (r14, 0x0)
+     ea2:	b8c1      	st.w      	r6, (r14, 0x4)
+     ea4:	0b8a      	bt      	0xdb8	// db8 <_fpadd_parts+0x58>
+     ea6:	b761      	st.w      	r3, (r7, 0x4)
+     ea8:	9800      	ld.w      	r0, (r14, 0x0)
+     eaa:	9821      	ld.w      	r1, (r14, 0x4)
+     eac:	9842      	ld.w      	r2, (r14, 0x8)
+     eae:	9863      	ld.w      	r3, (r14, 0xc)
+     eb0:	6489      	cmplt      	r2, r2
+     eb2:	6081      	addc      	r2, r0
+     eb4:	60c5      	addc      	r3, r1
+     eb6:	b782      	st.w      	r4, (r7, 0x8)
+     eb8:	b743      	st.w      	r2, (r7, 0xc)
+     eba:	b764      	st.w      	r3, (r7, 0x10)
+     ebc:	3103      	movi      	r1, 3
+     ebe:	b720      	st.w      	r1, (r7, 0x0)
+     ec0:	123b      	lrw      	r1, 0x1fffffff	// 102c <_fpadd_parts+0x2cc>
+     ec2:	64c4      	cmphs      	r1, r3
+     ec4:	0810      	bt      	0xee4	// ee4 <_fpadd_parts+0x184>
+     ec6:	439f      	lsli      	r4, r3, 31
+     ec8:	4a01      	lsri      	r0, r2, 1
+     eca:	6c10      	or      	r0, r4
+     ecc:	3500      	movi      	r5, 0
+     ece:	3401      	movi      	r4, 1
+     ed0:	4b21      	lsri      	r1, r3, 1
+     ed2:	6890      	and      	r2, r4
+     ed4:	68d4      	and      	r3, r5
+     ed6:	6c80      	or      	r2, r0
+     ed8:	6cc4      	or      	r3, r1
+     eda:	b743      	st.w      	r2, (r7, 0xc)
+     edc:	b764      	st.w      	r3, (r7, 0x10)
+     ede:	9762      	ld.w      	r3, (r7, 0x8)
+     ee0:	2300      	addi      	r3, 1
+     ee2:	b762      	st.w      	r3, (r7, 0x8)
+     ee4:	6c1f      	mov      	r0, r7
+     ee6:	140a      	addi      	r14, r14, 40
+     ee8:	1484      	pop      	r4-r7
+     eea:	3b42      	cmpnei      	r3, 2
+     eec:	0ba6      	bt      	0xe38	// e38 <_fpadd_parts+0xd8>
+     eee:	b760      	st.w      	r3, (r7, 0x0)
+     ef0:	9061      	ld.w      	r3, (r0, 0x4)
+     ef2:	b761      	st.w      	r3, (r7, 0x4)
+     ef4:	9062      	ld.w      	r3, (r0, 0x8)
+     ef6:	b762      	st.w      	r3, (r7, 0x8)
+     ef8:	9063      	ld.w      	r3, (r0, 0xc)
+     efa:	b763      	st.w      	r3, (r7, 0xc)
+     efc:	9064      	ld.w      	r3, (r0, 0x10)
+     efe:	9141      	ld.w      	r2, (r1, 0x4)
+     f00:	b764      	st.w      	r3, (r7, 0x10)
+     f02:	9061      	ld.w      	r3, (r0, 0x4)
+     f04:	68c8      	and      	r3, r2
+     f06:	b761      	st.w      	r3, (r7, 0x4)
+     f08:	6c1f      	mov      	r0, r7
+     f0a:	0797      	br      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f0c:	98e2      	ld.w      	r7, (r14, 0x8)
+     f0e:	651c      	cmphs      	r7, r4
+     f10:	0b7c      	bt      	0xe08	// e08 <_fpadd_parts+0xa8>
+     f12:	078c      	br      	0xe2a	// e2a <_fpadd_parts+0xca>
+     f14:	9802      	ld.w      	r0, (r14, 0x8)
+     f16:	9823      	ld.w      	r1, (r14, 0xc)
+     f18:	9840      	ld.w      	r2, (r14, 0x0)
+     f1a:	9861      	ld.w      	r3, (r14, 0x4)
+     f1c:	6400      	cmphs      	r0, r0
+     f1e:	600b      	subc      	r0, r2
+     f20:	604f      	subc      	r1, r3
+     f22:	0754      	br      	0xdca	// dca <_fpadd_parts+0x6a>
+     f24:	3200      	movi      	r2, 0
+     f26:	3300      	movi      	r3, 0
+     f28:	6d17      	mov      	r4, r5
+     f2a:	b842      	st.w      	r2, (r14, 0x8)
+     f2c:	b863      	st.w      	r3, (r14, 0xc)
+     f2e:	0741      	br      	0xdb0	// db0 <_fpadd_parts+0x50>
+     f30:	3a44      	cmpnei      	r2, 4
+     f32:	0b83      	bt      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f34:	9041      	ld.w      	r2, (r0, 0x4)
+     f36:	9161      	ld.w      	r3, (r1, 0x4)
+     f38:	64ca      	cmpne      	r2, r3
+     f3a:	0f7f      	bf      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f3c:	111d      	lrw      	r0, 0x4ca0	// 1030 <_fpadd_parts+0x2d0>
+     f3e:	077d      	br      	0xe38	// e38 <_fpadd_parts+0xd8>
+     f40:	3200      	movi      	r2, 0
+     f42:	608e      	subu      	r2, r3
+     f44:	072d      	br      	0xd9e	// d9e <_fpadd_parts+0x3e>
+     f46:	3301      	movi      	r3, 1
+     f48:	b761      	st.w      	r3, (r7, 0x4)
+     f4a:	3200      	movi      	r2, 0
+     f4c:	3300      	movi      	r3, 0
+     f4e:	6488      	cmphs      	r2, r2
+     f50:	6083      	subc      	r2, r0
+     f52:	60c7      	subc      	r3, r1
+     f54:	b782      	st.w      	r4, (r7, 0x8)
+     f56:	b743      	st.w      	r2, (r7, 0xc)
+     f58:	b764      	st.w      	r3, (r7, 0x10)
+     f5a:	0741      	br      	0xddc	// ddc <_fpadd_parts+0x7c>
+     f5c:	3b40      	cmpnei      	r3, 0
+     f5e:	0f29      	bf      	0xdb0	// db0 <_fpadd_parts+0x50>
+     f60:	3300      	movi      	r3, 0
+     f62:	2b1f      	subi      	r3, 32
+     f64:	60c8      	addu      	r3, r2
+     f66:	3bdf      	btsti      	r3, 31
+     f68:	6108      	addu      	r4, r2
+     f6a:	b866      	st.w      	r3, (r14, 0x18)
+     f6c:	0849      	bt      	0xffe	// ffe <_fpadd_parts+0x29e>
+     f6e:	9863      	ld.w      	r3, (r14, 0xc)
+     f70:	98a6      	ld.w      	r5, (r14, 0x18)
+     f72:	70d5      	lsr      	r3, r5
+     f74:	b864      	st.w      	r3, (r14, 0x10)
+     f76:	3300      	movi      	r3, 0
+     f78:	b865      	st.w      	r3, (r14, 0x14)
+     f7a:	9866      	ld.w      	r3, (r14, 0x18)
+     f7c:	3bdf      	btsti      	r3, 31
+     f7e:	3500      	movi      	r5, 0
+     f80:	3600      	movi      	r6, 0
+     f82:	083a      	bt      	0xff6	// ff6 <_fpadd_parts+0x296>
+     f84:	3201      	movi      	r2, 1
+     f86:	708c      	lsl      	r2, r3
+     f88:	6d8b      	mov      	r6, r2
+     f8a:	3200      	movi      	r2, 0
+     f8c:	3300      	movi      	r3, 0
+     f8e:	2a00      	subi      	r2, 1
+     f90:	2b00      	subi      	r3, 1
+     f92:	6489      	cmplt      	r2, r2
+     f94:	6095      	addc      	r2, r5
+     f96:	60d9      	addc      	r3, r6
+     f98:	98a2      	ld.w      	r5, (r14, 0x8)
+     f9a:	98c3      	ld.w      	r6, (r14, 0xc)
+     f9c:	6948      	and      	r5, r2
+     f9e:	698c      	and      	r6, r3
+     fa0:	6c97      	mov      	r2, r5
+     fa2:	6cdb      	mov      	r3, r6
+     fa4:	6c8c      	or      	r2, r3
+     fa6:	3a40      	cmpnei      	r2, 0
+     fa8:	3500      	movi      	r5, 0
+     faa:	6155      	addc      	r5, r5
+     fac:	6c97      	mov      	r2, r5
+     fae:	3300      	movi      	r3, 0
+     fb0:	98a4      	ld.w      	r5, (r14, 0x10)
+     fb2:	98c5      	ld.w      	r6, (r14, 0x14)
+     fb4:	6d48      	or      	r5, r2
+     fb6:	6d8c      	or      	r6, r3
+     fb8:	b8a2      	st.w      	r5, (r14, 0x8)
+     fba:	b8c3      	st.w      	r6, (r14, 0xc)
+     fbc:	06fa      	br      	0xdb0	// db0 <_fpadd_parts+0x50>
+     fbe:	3301      	movi      	r3, 1
+     fc0:	70c8      	lsl      	r3, r2
+     fc2:	6d4f      	mov      	r5, r3
+     fc4:	0754      	br      	0xe6c	// e6c <_fpadd_parts+0x10c>
+     fc6:	9861      	ld.w      	r3, (r14, 0x4)
+     fc8:	361f      	movi      	r6, 31
+     fca:	43a1      	lsli      	r5, r3, 1
+     fcc:	618a      	subu      	r6, r2
+     fce:	7158      	lsl      	r5, r6
+     fd0:	b8a9      	st.w      	r5, (r14, 0x24)
+     fd2:	98a0      	ld.w      	r5, (r14, 0x0)
+     fd4:	98c1      	ld.w      	r6, (r14, 0x4)
+     fd6:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fd8:	b8c8      	st.w      	r6, (r14, 0x20)
+     fda:	9867      	ld.w      	r3, (r14, 0x1c)
+     fdc:	70c9      	lsr      	r3, r2
+     fde:	98a9      	ld.w      	r5, (r14, 0x24)
+     fe0:	6cd4      	or      	r3, r5
+     fe2:	b864      	st.w      	r3, (r14, 0x10)
+     fe4:	9868      	ld.w      	r3, (r14, 0x20)
+     fe6:	70c9      	lsr      	r3, r2
+     fe8:	b865      	st.w      	r3, (r14, 0x14)
+     fea:	0739      	br      	0xe5c	// e5c <_fpadd_parts+0xfc>
+     fec:	3100      	movi      	r1, 0
+     fee:	2901      	subi      	r1, 2
+     ff0:	6404      	cmphs      	r1, r0
+     ff2:	0b01      	bt      	0xdf4	// df4 <_fpadd_parts+0x94>
+     ff4:	0764      	br      	0xebc	// ebc <_fpadd_parts+0x15c>
+     ff6:	3301      	movi      	r3, 1
+     ff8:	70c8      	lsl      	r3, r2
+     ffa:	6d4f      	mov      	r5, r3
+     ffc:	07c7      	br      	0xf8a	// f8a <_fpadd_parts+0x22a>
+     ffe:	9863      	ld.w      	r3, (r14, 0xc)
+    1000:	43c1      	lsli      	r6, r3, 1
+    1002:	351f      	movi      	r5, 31
+    1004:	5d69      	subu      	r3, r5, r2
+    1006:	6d5b      	mov      	r5, r6
+    1008:	714c      	lsl      	r5, r3
+    100a:	b8a9      	st.w      	r5, (r14, 0x24)
+    100c:	98a2      	ld.w      	r5, (r14, 0x8)
+    100e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1010:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1012:	b8c8      	st.w      	r6, (r14, 0x20)
+    1014:	9867      	ld.w      	r3, (r14, 0x1c)
+    1016:	70c9      	lsr      	r3, r2
+    1018:	98a9      	ld.w      	r5, (r14, 0x24)
+    101a:	6cd4      	or      	r3, r5
+    101c:	b864      	st.w      	r3, (r14, 0x10)
+    101e:	9868      	ld.w      	r3, (r14, 0x20)
+    1020:	70c9      	lsr      	r3, r2
+    1022:	b865      	st.w      	r3, (r14, 0x14)
+    1024:	07ab      	br      	0xf7a	// f7a <_fpadd_parts+0x21a>
+    1026:	0000      	bkpt
+    1028:	0fffffff 	.long	0x0fffffff
+    102c:	1fffffff 	.long	0x1fffffff
+    1030:	00004ca0 	.long	0x00004ca0
+
+00001034 <__adddf3>:
+    1034:	14d0      	push      	r15
+    1036:	1433      	subi      	r14, r14, 76
+    1038:	b800      	st.w      	r0, (r14, 0x0)
+    103a:	b821      	st.w      	r1, (r14, 0x4)
+    103c:	6c3b      	mov      	r0, r14
+    103e:	1904      	addi      	r1, r14, 16
+    1040:	b863      	st.w      	r3, (r14, 0xc)
+    1042:	b842      	st.w      	r2, (r14, 0x8)
+    1044:	e00003f4 	bsr      	0x182c	// 182c <__unpack_d>
+    1048:	1909      	addi      	r1, r14, 36
+    104a:	1802      	addi      	r0, r14, 8
+    104c:	e00003f0 	bsr      	0x182c	// 182c <__unpack_d>
+    1050:	1a0e      	addi      	r2, r14, 56
+    1052:	1909      	addi      	r1, r14, 36
+    1054:	1804      	addi      	r0, r14, 16
+    1056:	e3fffe85 	bsr      	0xd60	// d60 <_fpadd_parts>
+    105a:	e000031b 	bsr      	0x1690	// 1690 <__pack_d>
+    105e:	1413      	addi      	r14, r14, 76
+    1060:	1490      	pop      	r15
+	...
+
+00001064 <__subdf3>:
+    1064:	14d0      	push      	r15
+    1066:	1433      	subi      	r14, r14, 76
+    1068:	b800      	st.w      	r0, (r14, 0x0)
+    106a:	b821      	st.w      	r1, (r14, 0x4)
+    106c:	6c3b      	mov      	r0, r14
+    106e:	1904      	addi      	r1, r14, 16
+    1070:	b842      	st.w      	r2, (r14, 0x8)
+    1072:	b863      	st.w      	r3, (r14, 0xc)
+    1074:	e00003dc 	bsr      	0x182c	// 182c <__unpack_d>
+    1078:	1909      	addi      	r1, r14, 36
+    107a:	1802      	addi      	r0, r14, 8
+    107c:	e00003d8 	bsr      	0x182c	// 182c <__unpack_d>
+    1080:	986a      	ld.w      	r3, (r14, 0x28)
+    1082:	3201      	movi      	r2, 1
+    1084:	6cc9      	xor      	r3, r2
+    1086:	1909      	addi      	r1, r14, 36
+    1088:	1a0e      	addi      	r2, r14, 56
+    108a:	1804      	addi      	r0, r14, 16
+    108c:	b86a      	st.w      	r3, (r14, 0x28)
+    108e:	e3fffe69 	bsr      	0xd60	// d60 <_fpadd_parts>
+    1092:	e00002ff 	bsr      	0x1690	// 1690 <__pack_d>
+    1096:	1413      	addi      	r14, r14, 76
+    1098:	1490      	pop      	r15
+	...
+
+0000109c <__muldf3>:
+    109c:	14d4      	push      	r4-r7, r15
+    109e:	143b      	subi      	r14, r14, 108
+    10a0:	b808      	st.w      	r0, (r14, 0x20)
+    10a2:	b829      	st.w      	r1, (r14, 0x24)
+    10a4:	1808      	addi      	r0, r14, 32
+    10a6:	190c      	addi      	r1, r14, 48
+    10a8:	b86b      	st.w      	r3, (r14, 0x2c)
+    10aa:	b84a      	st.w      	r2, (r14, 0x28)
+    10ac:	e00003c0 	bsr      	0x182c	// 182c <__unpack_d>
+    10b0:	1911      	addi      	r1, r14, 68
+    10b2:	180a      	addi      	r0, r14, 40
+    10b4:	e00003bc 	bsr      	0x182c	// 182c <__unpack_d>
+    10b8:	986c      	ld.w      	r3, (r14, 0x30)
+    10ba:	3b01      	cmphsi      	r3, 2
+    10bc:	0cac      	bf      	0x1214	// 1214 <__muldf3+0x178>
+    10be:	9851      	ld.w      	r2, (r14, 0x44)
+    10c0:	3a01      	cmphsi      	r2, 2
+    10c2:	0c9c      	bf      	0x11fa	// 11fa <__muldf3+0x15e>
+    10c4:	3b44      	cmpnei      	r3, 4
+    10c6:	0ca5      	bf      	0x1210	// 1210 <__muldf3+0x174>
+    10c8:	3a44      	cmpnei      	r2, 4
+    10ca:	0c96      	bf      	0x11f6	// 11f6 <__muldf3+0x15a>
+    10cc:	3b42      	cmpnei      	r3, 2
+    10ce:	0ca3      	bf      	0x1214	// 1214 <__muldf3+0x178>
+    10d0:	3a42      	cmpnei      	r2, 2
+    10d2:	0c94      	bf      	0x11fa	// 11fa <__muldf3+0x15e>
+    10d4:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10d6:	98b4      	ld.w      	r5, (r14, 0x50)
+    10d8:	9875      	ld.w      	r3, (r14, 0x54)
+    10da:	6d8f      	mov      	r6, r3
+    10dc:	6c9f      	mov      	r2, r7
+    10de:	3300      	movi      	r3, 0
+    10e0:	6c17      	mov      	r0, r5
+    10e2:	3100      	movi      	r1, 0
+    10e4:	e0000294 	bsr      	0x160c	// 160c <__muldi3>
+    10e8:	b804      	st.w      	r0, (r14, 0x10)
+    10ea:	b825      	st.w      	r1, (r14, 0x14)
+    10ec:	6c9f      	mov      	r2, r7
+    10ee:	3300      	movi      	r3, 0
+    10f0:	6c1b      	mov      	r0, r6
+    10f2:	3100      	movi      	r1, 0
+    10f4:	9890      	ld.w      	r4, (r14, 0x40)
+    10f6:	b8c2      	st.w      	r6, (r14, 0x8)
+    10f8:	e000028a 	bsr      	0x160c	// 160c <__muldi3>
+    10fc:	6d83      	mov      	r6, r0
+    10fe:	6dc7      	mov      	r7, r1
+    1100:	9842      	ld.w      	r2, (r14, 0x8)
+    1102:	3300      	movi      	r3, 0
+    1104:	6c13      	mov      	r0, r4
+    1106:	3100      	movi      	r1, 0
+    1108:	e0000282 	bsr      	0x160c	// 160c <__muldi3>
+    110c:	b806      	st.w      	r0, (r14, 0x18)
+    110e:	b827      	st.w      	r1, (r14, 0x1c)
+    1110:	6c97      	mov      	r2, r5
+    1112:	3300      	movi      	r3, 0
+    1114:	6c13      	mov      	r0, r4
+    1116:	3100      	movi      	r1, 0
+    1118:	e000027a 	bsr      	0x160c	// 160c <__muldi3>
+    111c:	6401      	cmplt      	r0, r0
+    111e:	6019      	addc      	r0, r6
+    1120:	605d      	addc      	r1, r7
+    1122:	65c4      	cmphs      	r1, r7
+    1124:	0c91      	bf      	0x1246	// 1246 <__muldf3+0x1aa>
+    1126:	645e      	cmpne      	r7, r1
+    1128:	0c8d      	bf      	0x1242	// 1242 <__muldf3+0x1a6>
+    112a:	3300      	movi      	r3, 0
+    112c:	3400      	movi      	r4, 0
+    112e:	b862      	st.w      	r3, (r14, 0x8)
+    1130:	b883      	st.w      	r4, (r14, 0xc)
+    1132:	9884      	ld.w      	r4, (r14, 0x10)
+    1134:	98a5      	ld.w      	r5, (r14, 0x14)
+    1136:	3600      	movi      	r6, 0
+    1138:	6dc3      	mov      	r7, r0
+    113a:	6c93      	mov      	r2, r4
+    113c:	6cd7      	mov      	r3, r5
+    113e:	6489      	cmplt      	r2, r2
+    1140:	6099      	addc      	r2, r6
+    1142:	60dd      	addc      	r3, r7
+    1144:	6d8b      	mov      	r6, r2
+    1146:	6dcf      	mov      	r7, r3
+    1148:	6c93      	mov      	r2, r4
+    114a:	6cd7      	mov      	r3, r5
+    114c:	64dc      	cmphs      	r7, r3
+    114e:	0c70      	bf      	0x122e	// 122e <__muldf3+0x192>
+    1150:	65ce      	cmpne      	r3, r7
+    1152:	0c6c      	bf      	0x122a	// 122a <__muldf3+0x18e>
+    1154:	6c87      	mov      	r2, r1
+    1156:	3300      	movi      	r3, 0
+    1158:	9806      	ld.w      	r0, (r14, 0x18)
+    115a:	9827      	ld.w      	r1, (r14, 0x1c)
+    115c:	6401      	cmplt      	r0, r0
+    115e:	6009      	addc      	r0, r2
+    1160:	604d      	addc      	r1, r3
+    1162:	6c83      	mov      	r2, r0
+    1164:	6cc7      	mov      	r3, r1
+    1166:	9802      	ld.w      	r0, (r14, 0x8)
+    1168:	9823      	ld.w      	r1, (r14, 0xc)
+    116a:	6401      	cmplt      	r0, r0
+    116c:	6009      	addc      	r0, r2
+    116e:	604d      	addc      	r1, r3
+    1170:	6c83      	mov      	r2, r0
+    1172:	6cc7      	mov      	r3, r1
+    1174:	988e      	ld.w      	r4, (r14, 0x38)
+    1176:	9833      	ld.w      	r1, (r14, 0x4c)
+    1178:	6104      	addu      	r4, r1
+    117a:	5c2e      	addi      	r1, r4, 4
+    117c:	b838      	st.w      	r1, (r14, 0x60)
+    117e:	980d      	ld.w      	r0, (r14, 0x34)
+    1180:	9832      	ld.w      	r1, (r14, 0x48)
+    1182:	6442      	cmpne      	r0, r1
+    1184:	12b0      	lrw      	r5, 0x1fffffff	// 12c4 <__muldf3+0x228>
+    1186:	3100      	movi      	r1, 0
+    1188:	6045      	addc      	r1, r1
+    118a:	64d4      	cmphs      	r5, r3
+    118c:	b837      	st.w      	r1, (r14, 0x5c)
+    118e:	0879      	bt      	0x1280	// 1280 <__muldf3+0x1e4>
+    1190:	2404      	addi      	r4, 5
+    1192:	b8a4      	st.w      	r5, (r14, 0x10)
+    1194:	3001      	movi      	r0, 1
+    1196:	3100      	movi      	r1, 0
+    1198:	6808      	and      	r0, r2
+    119a:	684c      	and      	r1, r3
+    119c:	6c04      	or      	r0, r1
+    119e:	3840      	cmpnei      	r0, 0
+    11a0:	b882      	st.w      	r4, (r14, 0x8)
+    11a2:	0c0e      	bf      	0x11be	// 11be <__muldf3+0x122>
+    11a4:	473f      	lsli      	r1, r7, 31
+    11a6:	4e01      	lsri      	r0, r6, 1
+    11a8:	6c04      	or      	r0, r1
+    11aa:	4f21      	lsri      	r1, r7, 1
+    11ac:	b800      	st.w      	r0, (r14, 0x0)
+    11ae:	b821      	st.w      	r1, (r14, 0x4)
+    11b0:	3180      	movi      	r1, 128
+    11b2:	98c0      	ld.w      	r6, (r14, 0x0)
+    11b4:	98e1      	ld.w      	r7, (r14, 0x4)
+    11b6:	3000      	movi      	r0, 0
+    11b8:	4138      	lsli      	r1, r1, 24
+    11ba:	6d80      	or      	r6, r0
+    11bc:	6dc4      	or      	r7, r1
+    11be:	4b21      	lsri      	r1, r3, 1
+    11c0:	43bf      	lsli      	r5, r3, 31
+    11c2:	4a01      	lsri      	r0, r2, 1
+    11c4:	6cc7      	mov      	r3, r1
+    11c6:	9824      	ld.w      	r1, (r14, 0x10)
+    11c8:	6d40      	or      	r5, r0
+    11ca:	64c4      	cmphs      	r1, r3
+    11cc:	6c97      	mov      	r2, r5
+    11ce:	2400      	addi      	r4, 1
+    11d0:	0fe2      	bf      	0x1194	// 1194 <__muldf3+0xf8>
+    11d2:	9822      	ld.w      	r1, (r14, 0x8)
+    11d4:	b838      	st.w      	r1, (r14, 0x60)
+    11d6:	30ff      	movi      	r0, 255
+    11d8:	3100      	movi      	r1, 0
+    11da:	6808      	and      	r0, r2
+    11dc:	684c      	and      	r1, r3
+    11de:	3480      	movi      	r4, 128
+    11e0:	6502      	cmpne      	r0, r4
+    11e2:	0c37      	bf      	0x1250	// 1250 <__muldf3+0x1b4>
+    11e4:	b859      	st.w      	r2, (r14, 0x64)
+    11e6:	b87a      	st.w      	r3, (r14, 0x68)
+    11e8:	3303      	movi      	r3, 3
+    11ea:	b876      	st.w      	r3, (r14, 0x58)
+    11ec:	1816      	addi      	r0, r14, 88
+    11ee:	e0000251 	bsr      	0x1690	// 1690 <__pack_d>
+    11f2:	141b      	addi      	r14, r14, 108
+    11f4:	1494      	pop      	r4-r7, r15
+    11f6:	3b42      	cmpnei      	r3, 2
+    11f8:	0c42      	bf      	0x127c	// 127c <__muldf3+0x1e0>
+    11fa:	9872      	ld.w      	r3, (r14, 0x48)
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	64ca      	cmpne      	r2, r3
+    1200:	3300      	movi      	r3, 0
+    1202:	60cd      	addc      	r3, r3
+    1204:	1811      	addi      	r0, r14, 68
+    1206:	b872      	st.w      	r3, (r14, 0x48)
+    1208:	e0000244 	bsr      	0x1690	// 1690 <__pack_d>
+    120c:	141b      	addi      	r14, r14, 108
+    120e:	1494      	pop      	r4-r7, r15
+    1210:	3a42      	cmpnei      	r2, 2
+    1212:	0c35      	bf      	0x127c	// 127c <__muldf3+0x1e0>
+    1214:	984d      	ld.w      	r2, (r14, 0x34)
+    1216:	9872      	ld.w      	r3, (r14, 0x48)
+    1218:	64ca      	cmpne      	r2, r3
+    121a:	3300      	movi      	r3, 0
+    121c:	60cd      	addc      	r3, r3
+    121e:	180c      	addi      	r0, r14, 48
+    1220:	b86d      	st.w      	r3, (r14, 0x34)
+    1222:	e0000237 	bsr      	0x1690	// 1690 <__pack_d>
+    1226:	141b      	addi      	r14, r14, 108
+    1228:	1494      	pop      	r4-r7, r15
+    122a:	6498      	cmphs      	r6, r2
+    122c:	0b94      	bt      	0x1154	// 1154 <__muldf3+0xb8>
+    122e:	9882      	ld.w      	r4, (r14, 0x8)
+    1230:	98a3      	ld.w      	r5, (r14, 0xc)
+    1232:	3201      	movi      	r2, 1
+    1234:	3300      	movi      	r3, 0
+    1236:	6511      	cmplt      	r4, r4
+    1238:	6109      	addc      	r4, r2
+    123a:	614d      	addc      	r5, r3
+    123c:	b882      	st.w      	r4, (r14, 0x8)
+    123e:	b8a3      	st.w      	r5, (r14, 0xc)
+    1240:	078a      	br      	0x1154	// 1154 <__muldf3+0xb8>
+    1242:	6580      	cmphs      	r0, r6
+    1244:	0b73      	bt      	0x112a	// 112a <__muldf3+0x8e>
+    1246:	3300      	movi      	r3, 0
+    1248:	3401      	movi      	r4, 1
+    124a:	b862      	st.w      	r3, (r14, 0x8)
+    124c:	b883      	st.w      	r4, (r14, 0xc)
+    124e:	0772      	br      	0x1132	// 1132 <__muldf3+0x96>
+    1250:	3940      	cmpnei      	r1, 0
+    1252:	0bc9      	bt      	0x11e4	// 11e4 <__muldf3+0x148>
+    1254:	3180      	movi      	r1, 128
+    1256:	4121      	lsli      	r1, r1, 1
+    1258:	6848      	and      	r1, r2
+    125a:	3940      	cmpnei      	r1, 0
+    125c:	0bc4      	bt      	0x11e4	// 11e4 <__muldf3+0x148>
+    125e:	6c5b      	mov      	r1, r6
+    1260:	6c5c      	or      	r1, r7
+    1262:	3940      	cmpnei      	r1, 0
+    1264:	0fc0      	bf      	0x11e4	// 11e4 <__muldf3+0x148>
+    1266:	3080      	movi      	r0, 128
+    1268:	3100      	movi      	r1, 0
+    126a:	6401      	cmplt      	r0, r0
+    126c:	6009      	addc      	r0, r2
+    126e:	604d      	addc      	r1, r3
+    1270:	34ff      	movi      	r4, 255
+    1272:	6d43      	mov      	r5, r0
+    1274:	6951      	andn      	r5, r4
+    1276:	6c97      	mov      	r2, r5
+    1278:	6cc7      	mov      	r3, r1
+    127a:	07b5      	br      	0x11e4	// 11e4 <__muldf3+0x148>
+    127c:	1013      	lrw      	r0, 0x4ca0	// 12c8 <__muldf3+0x22c>
+    127e:	07b8      	br      	0x11ee	// 11ee <__muldf3+0x152>
+    1280:	1033      	lrw      	r1, 0xfffffff	// 12cc <__muldf3+0x230>
+    1282:	64c4      	cmphs      	r1, r3
+    1284:	0fa9      	bf      	0x11d6	// 11d6 <__muldf3+0x13a>
+    1286:	2402      	addi      	r4, 3
+    1288:	b822      	st.w      	r1, (r14, 0x8)
+    128a:	4a1f      	lsri      	r0, r2, 31
+    128c:	4321      	lsli      	r1, r3, 1
+    128e:	42a1      	lsli      	r5, r2, 1
+    1290:	6c04      	or      	r0, r1
+    1292:	3fdf      	btsti      	r7, 31
+    1294:	b880      	st.w      	r4, (r14, 0x0)
+    1296:	6c97      	mov      	r2, r5
+    1298:	6cc3      	mov      	r3, r0
+    129a:	0c07      	bf      	0x12a8	// 12a8 <__muldf3+0x20c>
+    129c:	3001      	movi      	r0, 1
+    129e:	3100      	movi      	r1, 0
+    12a0:	6c08      	or      	r0, r2
+    12a2:	6c4c      	or      	r1, r3
+    12a4:	6c83      	mov      	r2, r0
+    12a6:	6cc7      	mov      	r3, r1
+    12a8:	4721      	lsli      	r1, r7, 1
+    12aa:	4e1f      	lsri      	r0, r6, 31
+    12ac:	6c04      	or      	r0, r1
+    12ae:	9822      	ld.w      	r1, (r14, 0x8)
+    12b0:	46a1      	lsli      	r5, r6, 1
+    12b2:	64c4      	cmphs      	r1, r3
+    12b4:	6d97      	mov      	r6, r5
+    12b6:	6dc3      	mov      	r7, r0
+    12b8:	2c00      	subi      	r4, 1
+    12ba:	0be8      	bt      	0x128a	// 128a <__muldf3+0x1ee>
+    12bc:	9820      	ld.w      	r1, (r14, 0x0)
+    12be:	b838      	st.w      	r1, (r14, 0x60)
+    12c0:	078b      	br      	0x11d6	// 11d6 <__muldf3+0x13a>
+    12c2:	0000      	bkpt
+    12c4:	1fffffff 	.long	0x1fffffff
+    12c8:	00004ca0 	.long	0x00004ca0
+    12cc:	0fffffff 	.long	0x0fffffff
+
+000012d0 <__divdf3>:
+    12d0:	14d4      	push      	r4-r7, r15
+    12d2:	1432      	subi      	r14, r14, 72
+    12d4:	b804      	st.w      	r0, (r14, 0x10)
+    12d6:	b825      	st.w      	r1, (r14, 0x14)
+    12d8:	1804      	addi      	r0, r14, 16
+    12da:	1908      	addi      	r1, r14, 32
+    12dc:	b867      	st.w      	r3, (r14, 0x1c)
+    12de:	b846      	st.w      	r2, (r14, 0x18)
+    12e0:	e00002a6 	bsr      	0x182c	// 182c <__unpack_d>
+    12e4:	190d      	addi      	r1, r14, 52
+    12e6:	1806      	addi      	r0, r14, 24
+    12e8:	e00002a2 	bsr      	0x182c	// 182c <__unpack_d>
+    12ec:	9868      	ld.w      	r3, (r14, 0x20)
+    12ee:	3b01      	cmphsi      	r3, 2
+    12f0:	0c66      	bf      	0x13bc	// 13bc <__divdf3+0xec>
+    12f2:	982d      	ld.w      	r1, (r14, 0x34)
+    12f4:	3901      	cmphsi      	r1, 2
+    12f6:	0c92      	bf      	0x141a	// 141a <__divdf3+0x14a>
+    12f8:	9849      	ld.w      	r2, (r14, 0x24)
+    12fa:	980e      	ld.w      	r0, (r14, 0x38)
+    12fc:	6c81      	xor      	r2, r0
+    12fe:	3b44      	cmpnei      	r3, 4
+    1300:	b849      	st.w      	r2, (r14, 0x24)
+    1302:	0c62      	bf      	0x13c6	// 13c6 <__divdf3+0xf6>
+    1304:	3b42      	cmpnei      	r3, 2
+    1306:	0c60      	bf      	0x13c6	// 13c6 <__divdf3+0xf6>
+    1308:	3944      	cmpnei      	r1, 4
+    130a:	0c62      	bf      	0x13ce	// 13ce <__divdf3+0xfe>
+    130c:	3942      	cmpnei      	r1, 2
+    130e:	0c82      	bf      	0x1412	// 1412 <__divdf3+0x142>
+    1310:	982a      	ld.w      	r1, (r14, 0x28)
+    1312:	986f      	ld.w      	r3, (r14, 0x3c)
+    1314:	604e      	subu      	r1, r3
+    1316:	9890      	ld.w      	r4, (r14, 0x40)
+    1318:	98b1      	ld.w      	r5, (r14, 0x44)
+    131a:	984b      	ld.w      	r2, (r14, 0x2c)
+    131c:	986c      	ld.w      	r3, (r14, 0x30)
+    131e:	654c      	cmphs      	r3, r5
+    1320:	b82a      	st.w      	r1, (r14, 0x28)
+    1322:	6d93      	mov      	r6, r4
+    1324:	6dd7      	mov      	r7, r5
+    1326:	0c05      	bf      	0x1330	// 1330 <__divdf3+0x60>
+    1328:	64d6      	cmpne      	r5, r3
+    132a:	080b      	bt      	0x1340	// 1340 <__divdf3+0x70>
+    132c:	6508      	cmphs      	r2, r4
+    132e:	0809      	bt      	0x1340	// 1340 <__divdf3+0x70>
+    1330:	4a9f      	lsri      	r4, r2, 31
+    1332:	4301      	lsli      	r0, r3, 1
+    1334:	42a1      	lsli      	r5, r2, 1
+    1336:	6d00      	or      	r4, r0
+    1338:	2900      	subi      	r1, 1
+    133a:	6c97      	mov      	r2, r5
+    133c:	6cd3      	mov      	r3, r4
+    133e:	b82a      	st.w      	r1, (r14, 0x28)
+    1340:	3000      	movi      	r0, 0
+    1342:	3100      	movi      	r1, 0
+    1344:	b802      	st.w      	r0, (r14, 0x8)
+    1346:	b823      	st.w      	r1, (r14, 0xc)
+    1348:	3180      	movi      	r1, 128
+    134a:	343d      	movi      	r4, 61
+    134c:	3000      	movi      	r0, 0
+    134e:	4135      	lsli      	r1, r1, 21
+    1350:	b8c0      	st.w      	r6, (r14, 0x0)
+    1352:	b8e1      	st.w      	r7, (r14, 0x4)
+    1354:	98a0      	ld.w      	r5, (r14, 0x0)
+    1356:	98c1      	ld.w      	r6, (r14, 0x4)
+    1358:	658c      	cmphs      	r3, r6
+    135a:	0c10      	bf      	0x137a	// 137a <__divdf3+0xaa>
+    135c:	64da      	cmpne      	r6, r3
+    135e:	0803      	bt      	0x1364	// 1364 <__divdf3+0x94>
+    1360:	6548      	cmphs      	r2, r5
+    1362:	0c0c      	bf      	0x137a	// 137a <__divdf3+0xaa>
+    1364:	98a2      	ld.w      	r5, (r14, 0x8)
+    1366:	98c3      	ld.w      	r6, (r14, 0xc)
+    1368:	6d40      	or      	r5, r0
+    136a:	6d84      	or      	r6, r1
+    136c:	b8a2      	st.w      	r5, (r14, 0x8)
+    136e:	b8c3      	st.w      	r6, (r14, 0xc)
+    1370:	98a0      	ld.w      	r5, (r14, 0x0)
+    1372:	98c1      	ld.w      	r6, (r14, 0x4)
+    1374:	6488      	cmphs      	r2, r2
+    1376:	6097      	subc      	r2, r5
+    1378:	60db      	subc      	r3, r6
+    137a:	41bf      	lsli      	r5, r1, 31
+    137c:	48e1      	lsri      	r7, r0, 1
+    137e:	6d97      	mov      	r6, r5
+    1380:	49a1      	lsri      	r5, r1, 1
+    1382:	6d9c      	or      	r6, r7
+    1384:	6c57      	mov      	r1, r5
+    1386:	4abf      	lsri      	r5, r2, 31
+    1388:	6c1b      	mov      	r0, r6
+    138a:	2c00      	subi      	r4, 1
+    138c:	6d97      	mov      	r6, r5
+    138e:	43a1      	lsli      	r5, r3, 1
+    1390:	6d94      	or      	r6, r5
+    1392:	4261      	lsli      	r3, r2, 1
+    1394:	3c40      	cmpnei      	r4, 0
+    1396:	6dcf      	mov      	r7, r3
+    1398:	6c8f      	mov      	r2, r3
+    139a:	6cdb      	mov      	r3, r6
+    139c:	0bdc      	bt      	0x1354	// 1354 <__divdf3+0x84>
+    139e:	30ff      	movi      	r0, 255
+    13a0:	3100      	movi      	r1, 0
+    13a2:	9882      	ld.w      	r4, (r14, 0x8)
+    13a4:	98a3      	ld.w      	r5, (r14, 0xc)
+    13a6:	6900      	and      	r4, r0
+    13a8:	6944      	and      	r5, r1
+    13aa:	6c13      	mov      	r0, r4
+    13ac:	6c57      	mov      	r1, r5
+    13ae:	3480      	movi      	r4, 128
+    13b0:	6502      	cmpne      	r0, r4
+    13b2:	0c15      	bf      	0x13dc	// 13dc <__divdf3+0x10c>
+    13b4:	9862      	ld.w      	r3, (r14, 0x8)
+    13b6:	9883      	ld.w      	r4, (r14, 0xc)
+    13b8:	b86b      	st.w      	r3, (r14, 0x2c)
+    13ba:	b88c      	st.w      	r4, (r14, 0x30)
+    13bc:	1808      	addi      	r0, r14, 32
+    13be:	e0000169 	bsr      	0x1690	// 1690 <__pack_d>
+    13c2:	1412      	addi      	r14, r14, 72
+    13c4:	1494      	pop      	r4-r7, r15
+    13c6:	644e      	cmpne      	r3, r1
+    13c8:	0bfa      	bt      	0x13bc	// 13bc <__divdf3+0xec>
+    13ca:	1016      	lrw      	r0, 0x4ca0	// 1420 <__divdf3+0x150>
+    13cc:	07f9      	br      	0x13be	// 13be <__divdf3+0xee>
+    13ce:	3300      	movi      	r3, 0
+    13d0:	3400      	movi      	r4, 0
+    13d2:	b86b      	st.w      	r3, (r14, 0x2c)
+    13d4:	b88c      	st.w      	r4, (r14, 0x30)
+    13d6:	b86a      	st.w      	r3, (r14, 0x28)
+    13d8:	1808      	addi      	r0, r14, 32
+    13da:	07f2      	br      	0x13be	// 13be <__divdf3+0xee>
+    13dc:	3940      	cmpnei      	r1, 0
+    13de:	0beb      	bt      	0x13b4	// 13b4 <__divdf3+0xe4>
+    13e0:	3180      	movi      	r1, 128
+    13e2:	4121      	lsli      	r1, r1, 1
+    13e4:	9882      	ld.w      	r4, (r14, 0x8)
+    13e6:	98a3      	ld.w      	r5, (r14, 0xc)
+    13e8:	6850      	and      	r1, r4
+    13ea:	3940      	cmpnei      	r1, 0
+    13ec:	0be4      	bt      	0x13b4	// 13b4 <__divdf3+0xe4>
+    13ee:	6c98      	or      	r2, r6
+    13f0:	3a40      	cmpnei      	r2, 0
+    13f2:	0fe1      	bf      	0x13b4	// 13b4 <__divdf3+0xe4>
+    13f4:	3280      	movi      	r2, 128
+    13f6:	3300      	movi      	r3, 0
+    13f8:	6c13      	mov      	r0, r4
+    13fa:	6c57      	mov      	r1, r5
+    13fc:	6401      	cmplt      	r0, r0
+    13fe:	6009      	addc      	r0, r2
+    1400:	604d      	addc      	r1, r3
+    1402:	6c83      	mov      	r2, r0
+    1404:	6cc7      	mov      	r3, r1
+    1406:	6c0b      	mov      	r0, r2
+    1408:	31ff      	movi      	r1, 255
+    140a:	6805      	andn      	r0, r1
+    140c:	b802      	st.w      	r0, (r14, 0x8)
+    140e:	b863      	st.w      	r3, (r14, 0xc)
+    1410:	07d2      	br      	0x13b4	// 13b4 <__divdf3+0xe4>
+    1412:	3304      	movi      	r3, 4
+    1414:	b868      	st.w      	r3, (r14, 0x20)
+    1416:	1808      	addi      	r0, r14, 32
+    1418:	07d3      	br      	0x13be	// 13be <__divdf3+0xee>
+    141a:	180d      	addi      	r0, r14, 52
+    141c:	07d1      	br      	0x13be	// 13be <__divdf3+0xee>
+    141e:	0000      	bkpt
+    1420:	00004ca0 	.long	0x00004ca0
+
+00001424 <__gtdf2>:
+    1424:	14d0      	push      	r15
+    1426:	142e      	subi      	r14, r14, 56
+    1428:	b800      	st.w      	r0, (r14, 0x0)
+    142a:	b821      	st.w      	r1, (r14, 0x4)
+    142c:	6c3b      	mov      	r0, r14
+    142e:	1904      	addi      	r1, r14, 16
+    1430:	b863      	st.w      	r3, (r14, 0xc)
+    1432:	b842      	st.w      	r2, (r14, 0x8)
+    1434:	e00001fc 	bsr      	0x182c	// 182c <__unpack_d>
+    1438:	1909      	addi      	r1, r14, 36
+    143a:	1802      	addi      	r0, r14, 8
+    143c:	e00001f8 	bsr      	0x182c	// 182c <__unpack_d>
+    1440:	9864      	ld.w      	r3, (r14, 0x10)
+    1442:	3b01      	cmphsi      	r3, 2
+    1444:	0c0a      	bf      	0x1458	// 1458 <__gtdf2+0x34>
+    1446:	9869      	ld.w      	r3, (r14, 0x24)
+    1448:	3b01      	cmphsi      	r3, 2
+    144a:	0c07      	bf      	0x1458	// 1458 <__gtdf2+0x34>
+    144c:	1909      	addi      	r1, r14, 36
+    144e:	1804      	addi      	r0, r14, 16
+    1450:	e0000250 	bsr      	0x18f0	// 18f0 <__fpcmp_parts_d>
+    1454:	140e      	addi      	r14, r14, 56
+    1456:	1490      	pop      	r15
+    1458:	3000      	movi      	r0, 0
+    145a:	2800      	subi      	r0, 1
+    145c:	140e      	addi      	r14, r14, 56
+    145e:	1490      	pop      	r15
+
+00001460 <__gedf2>:
+    1460:	14d0      	push      	r15
+    1462:	142e      	subi      	r14, r14, 56
+    1464:	b800      	st.w      	r0, (r14, 0x0)
+    1466:	b821      	st.w      	r1, (r14, 0x4)
+    1468:	6c3b      	mov      	r0, r14
+    146a:	1904      	addi      	r1, r14, 16
+    146c:	b863      	st.w      	r3, (r14, 0xc)
+    146e:	b842      	st.w      	r2, (r14, 0x8)
+    1470:	e00001de 	bsr      	0x182c	// 182c <__unpack_d>
+    1474:	1909      	addi      	r1, r14, 36
+    1476:	1802      	addi      	r0, r14, 8
+    1478:	e00001da 	bsr      	0x182c	// 182c <__unpack_d>
+    147c:	9864      	ld.w      	r3, (r14, 0x10)
+    147e:	3b01      	cmphsi      	r3, 2
+    1480:	0c0a      	bf      	0x1494	// 1494 <__gedf2+0x34>
+    1482:	9869      	ld.w      	r3, (r14, 0x24)
+    1484:	3b01      	cmphsi      	r3, 2
+    1486:	0c07      	bf      	0x1494	// 1494 <__gedf2+0x34>
+    1488:	1909      	addi      	r1, r14, 36
+    148a:	1804      	addi      	r0, r14, 16
+    148c:	e0000232 	bsr      	0x18f0	// 18f0 <__fpcmp_parts_d>
+    1490:	140e      	addi      	r14, r14, 56
+    1492:	1490      	pop      	r15
+    1494:	3000      	movi      	r0, 0
+    1496:	2800      	subi      	r0, 1
+    1498:	140e      	addi      	r14, r14, 56
+    149a:	1490      	pop      	r15
+
+0000149c <__ledf2>:
+    149c:	14d0      	push      	r15
+    149e:	142e      	subi      	r14, r14, 56
+    14a0:	b800      	st.w      	r0, (r14, 0x0)
+    14a2:	b821      	st.w      	r1, (r14, 0x4)
+    14a4:	6c3b      	mov      	r0, r14
+    14a6:	1904      	addi      	r1, r14, 16
+    14a8:	b863      	st.w      	r3, (r14, 0xc)
+    14aa:	b842      	st.w      	r2, (r14, 0x8)
+    14ac:	e00001c0 	bsr      	0x182c	// 182c <__unpack_d>
+    14b0:	1909      	addi      	r1, r14, 36
+    14b2:	1802      	addi      	r0, r14, 8
+    14b4:	e00001bc 	bsr      	0x182c	// 182c <__unpack_d>
+    14b8:	9864      	ld.w      	r3, (r14, 0x10)
+    14ba:	3b01      	cmphsi      	r3, 2
+    14bc:	0c0a      	bf      	0x14d0	// 14d0 <__ledf2+0x34>
+    14be:	9869      	ld.w      	r3, (r14, 0x24)
+    14c0:	3b01      	cmphsi      	r3, 2
+    14c2:	0c07      	bf      	0x14d0	// 14d0 <__ledf2+0x34>
+    14c4:	1909      	addi      	r1, r14, 36
+    14c6:	1804      	addi      	r0, r14, 16
+    14c8:	e0000214 	bsr      	0x18f0	// 18f0 <__fpcmp_parts_d>
+    14cc:	140e      	addi      	r14, r14, 56
+    14ce:	1490      	pop      	r15
+    14d0:	3001      	movi      	r0, 1
+    14d2:	140e      	addi      	r14, r14, 56
+    14d4:	1490      	pop      	r15
+	...
+
+000014d8 <__floatsidf>:
+    14d8:	14d1      	push      	r4, r15
+    14da:	1425      	subi      	r14, r14, 20
+    14dc:	3303      	movi      	r3, 3
+    14de:	b860      	st.w      	r3, (r14, 0x0)
+    14e0:	3840      	cmpnei      	r0, 0
+    14e2:	487f      	lsri      	r3, r0, 31
+    14e4:	b861      	st.w      	r3, (r14, 0x4)
+    14e6:	0808      	bt      	0x14f6	// 14f6 <__floatsidf+0x1e>
+    14e8:	3302      	movi      	r3, 2
+    14ea:	b860      	st.w      	r3, (r14, 0x0)
+    14ec:	6c3b      	mov      	r0, r14
+    14ee:	e00000d1 	bsr      	0x1690	// 1690 <__pack_d>
+    14f2:	1405      	addi      	r14, r14, 20
+    14f4:	1491      	pop      	r4, r15
+    14f6:	38df      	btsti      	r0, 31
+    14f8:	0812      	bt      	0x151c	// 151c <__floatsidf+0x44>
+    14fa:	6d03      	mov      	r4, r0
+    14fc:	6c13      	mov      	r0, r4
+    14fe:	e00000a9 	bsr      	0x1650	// 1650 <__clzsi2>
+    1502:	321d      	movi      	r2, 29
+    1504:	6080      	addu      	r2, r0
+    1506:	2802      	subi      	r0, 3
+    1508:	38df      	btsti      	r0, 31
+    150a:	0810      	bt      	0x152a	// 152a <__floatsidf+0x52>
+    150c:	7100      	lsl      	r4, r0
+    150e:	3300      	movi      	r3, 0
+    1510:	b884      	st.w      	r4, (r14, 0x10)
+    1512:	b863      	st.w      	r3, (r14, 0xc)
+    1514:	333c      	movi      	r3, 60
+    1516:	60ca      	subu      	r3, r2
+    1518:	b862      	st.w      	r3, (r14, 0x8)
+    151a:	07e9      	br      	0x14ec	// 14ec <__floatsidf+0x14>
+    151c:	3380      	movi      	r3, 128
+    151e:	4378      	lsli      	r3, r3, 24
+    1520:	64c2      	cmpne      	r0, r3
+    1522:	0c0d      	bf      	0x153c	// 153c <__floatsidf+0x64>
+    1524:	3400      	movi      	r4, 0
+    1526:	6102      	subu      	r4, r0
+    1528:	07ea      	br      	0x14fc	// 14fc <__floatsidf+0x24>
+    152a:	311f      	movi      	r1, 31
+    152c:	4c61      	lsri      	r3, r4, 1
+    152e:	604a      	subu      	r1, r2
+    1530:	6c13      	mov      	r0, r4
+    1532:	70c5      	lsr      	r3, r1
+    1534:	7008      	lsl      	r0, r2
+    1536:	b864      	st.w      	r3, (r14, 0x10)
+    1538:	b803      	st.w      	r0, (r14, 0xc)
+    153a:	07ed      	br      	0x1514	// 1514 <__floatsidf+0x3c>
+    153c:	3000      	movi      	r0, 0
+    153e:	1022      	lrw      	r1, 0xc1e00000	// 1544 <__floatsidf+0x6c>
+    1540:	07d9      	br      	0x14f2	// 14f2 <__floatsidf+0x1a>
+    1542:	0000      	bkpt
+    1544:	c1e00000 	.long	0xc1e00000
+
+00001548 <__fixdfsi>:
+    1548:	14d0      	push      	r15
+    154a:	1427      	subi      	r14, r14, 28
+    154c:	b800      	st.w      	r0, (r14, 0x0)
+    154e:	b821      	st.w      	r1, (r14, 0x4)
+    1550:	6c3b      	mov      	r0, r14
+    1552:	1902      	addi      	r1, r14, 8
+    1554:	e000016c 	bsr      	0x182c	// 182c <__unpack_d>
+    1558:	9862      	ld.w      	r3, (r14, 0x8)
+    155a:	3b02      	cmphsi      	r3, 3
+    155c:	0c20      	bf      	0x159c	// 159c <__fixdfsi+0x54>
+    155e:	3b44      	cmpnei      	r3, 4
+    1560:	0c16      	bf      	0x158c	// 158c <__fixdfsi+0x44>
+    1562:	9864      	ld.w      	r3, (r14, 0x10)
+    1564:	3bdf      	btsti      	r3, 31
+    1566:	081b      	bt      	0x159c	// 159c <__fixdfsi+0x54>
+    1568:	3b3e      	cmplti      	r3, 31
+    156a:	0c11      	bf      	0x158c	// 158c <__fixdfsi+0x44>
+    156c:	323c      	movi      	r2, 60
+    156e:	5a6d      	subu      	r3, r2, r3
+    1570:	3200      	movi      	r2, 0
+    1572:	2a1f      	subi      	r2, 32
+    1574:	608c      	addu      	r2, r3
+    1576:	3adf      	btsti      	r2, 31
+    1578:	0815      	bt      	0x15a2	// 15a2 <__fixdfsi+0x5a>
+    157a:	9806      	ld.w      	r0, (r14, 0x18)
+    157c:	7009      	lsr      	r0, r2
+    157e:	9863      	ld.w      	r3, (r14, 0xc)
+    1580:	3b40      	cmpnei      	r3, 0
+    1582:	0c0b      	bf      	0x1598	// 1598 <__fixdfsi+0x50>
+    1584:	3300      	movi      	r3, 0
+    1586:	5b01      	subu      	r0, r3, r0
+    1588:	1407      	addi      	r14, r14, 28
+    158a:	1490      	pop      	r15
+    158c:	9863      	ld.w      	r3, (r14, 0xc)
+    158e:	3b40      	cmpnei      	r3, 0
+    1590:	3000      	movi      	r0, 0
+    1592:	6001      	addc      	r0, r0
+    1594:	1068      	lrw      	r3, 0x7fffffff	// 15b4 <__fixdfsi+0x6c>
+    1596:	600c      	addu      	r0, r3
+    1598:	1407      	addi      	r14, r14, 28
+    159a:	1490      	pop      	r15
+    159c:	3000      	movi      	r0, 0
+    159e:	1407      	addi      	r14, r14, 28
+    15a0:	1490      	pop      	r15
+    15a2:	9846      	ld.w      	r2, (r14, 0x18)
+    15a4:	311f      	movi      	r1, 31
+    15a6:	4241      	lsli      	r2, r2, 1
+    15a8:	604e      	subu      	r1, r3
+    15aa:	9805      	ld.w      	r0, (r14, 0x14)
+    15ac:	7084      	lsl      	r2, r1
+    15ae:	700d      	lsr      	r0, r3
+    15b0:	6c08      	or      	r0, r2
+    15b2:	07e6      	br      	0x157e	// 157e <__fixdfsi+0x36>
+    15b4:	7fffffff 	.long	0x7fffffff
+
+000015b8 <__floatunsidf>:
+    15b8:	14d2      	push      	r4-r5, r15
+    15ba:	1425      	subi      	r14, r14, 20
+    15bc:	3840      	cmpnei      	r0, 0
+    15be:	3500      	movi      	r5, 0
+    15c0:	6d03      	mov      	r4, r0
+    15c2:	b8a1      	st.w      	r5, (r14, 0x4)
+    15c4:	0c15      	bf      	0x15ee	// 15ee <__floatunsidf+0x36>
+    15c6:	3303      	movi      	r3, 3
+    15c8:	b860      	st.w      	r3, (r14, 0x0)
+    15ca:	e0000043 	bsr      	0x1650	// 1650 <__clzsi2>
+    15ce:	321d      	movi      	r2, 29
+    15d0:	6080      	addu      	r2, r0
+    15d2:	2802      	subi      	r0, 3
+    15d4:	38df      	btsti      	r0, 31
+    15d6:	0813      	bt      	0x15fc	// 15fc <__floatunsidf+0x44>
+    15d8:	7100      	lsl      	r4, r0
+    15da:	b884      	st.w      	r4, (r14, 0x10)
+    15dc:	b8a3      	st.w      	r5, (r14, 0xc)
+    15de:	333c      	movi      	r3, 60
+    15e0:	60ca      	subu      	r3, r2
+    15e2:	6c3b      	mov      	r0, r14
+    15e4:	b862      	st.w      	r3, (r14, 0x8)
+    15e6:	e0000055 	bsr      	0x1690	// 1690 <__pack_d>
+    15ea:	1405      	addi      	r14, r14, 20
+    15ec:	1492      	pop      	r4-r5, r15
+    15ee:	3302      	movi      	r3, 2
+    15f0:	6c3b      	mov      	r0, r14
+    15f2:	b860      	st.w      	r3, (r14, 0x0)
+    15f4:	e000004e 	bsr      	0x1690	// 1690 <__pack_d>
+    15f8:	1405      	addi      	r14, r14, 20
+    15fa:	1492      	pop      	r4-r5, r15
+    15fc:	311f      	movi      	r1, 31
+    15fe:	4c61      	lsri      	r3, r4, 1
+    1600:	604a      	subu      	r1, r2
+    1602:	70c5      	lsr      	r3, r1
+    1604:	7108      	lsl      	r4, r2
+    1606:	b864      	st.w      	r3, (r14, 0x10)
+    1608:	b883      	st.w      	r4, (r14, 0xc)
+    160a:	07ea      	br      	0x15de	// 15de <__floatunsidf+0x26>
+
+0000160c <__muldi3>:
+    160c:	14c4      	push      	r4-r7
+    160e:	1421      	subi      	r14, r14, 4
+    1610:	7501      	zexth      	r4, r0
+    1612:	48b0      	lsri      	r5, r0, 16
+    1614:	75c9      	zexth      	r7, r2
+    1616:	6d83      	mov      	r6, r0
+    1618:	b820      	st.w      	r1, (r14, 0x0)
+    161a:	6c13      	mov      	r0, r4
+    161c:	4a30      	lsri      	r1, r2, 16
+    161e:	7c1c      	mult      	r0, r7
+    1620:	7d04      	mult      	r4, r1
+    1622:	7dd4      	mult      	r7, r5
+    1624:	611c      	addu      	r4, r7
+    1626:	7d44      	mult      	r5, r1
+    1628:	4830      	lsri      	r1, r0, 16
+    162a:	6104      	addu      	r4, r1
+    162c:	65d0      	cmphs      	r4, r7
+    162e:	0804      	bt      	0x1636	// 1636 <__muldi3+0x2a>
+    1630:	3180      	movi      	r1, 128
+    1632:	4129      	lsli      	r1, r1, 9
+    1634:	6144      	addu      	r5, r1
+    1636:	4c30      	lsri      	r1, r4, 16
+    1638:	7cd8      	mult      	r3, r6
+    163a:	6144      	addu      	r5, r1
+    163c:	6c4f      	mov      	r1, r3
+    163e:	9860      	ld.w      	r3, (r14, 0x0)
+    1640:	7cc8      	mult      	r3, r2
+    1642:	4490      	lsli      	r4, r4, 16
+    1644:	604c      	addu      	r1, r3
+    1646:	7401      	zexth      	r0, r0
+    1648:	6010      	addu      	r0, r4
+    164a:	6054      	addu      	r1, r5
+    164c:	1401      	addi      	r14, r14, 4
+    164e:	1484      	pop      	r4-r7
+
+00001650 <__clzsi2>:
+    1650:	106d      	lrw      	r3, 0xffff	// 1684 <__clzsi2+0x34>
+    1652:	640c      	cmphs      	r3, r0
+    1654:	0c07      	bf      	0x1662	// 1662 <__clzsi2+0x12>
+    1656:	33ff      	movi      	r3, 255
+    1658:	640c      	cmphs      	r3, r0
+    165a:	0c0f      	bf      	0x1678	// 1678 <__clzsi2+0x28>
+    165c:	3320      	movi      	r3, 32
+    165e:	3200      	movi      	r2, 0
+    1660:	0406      	br      	0x166c	// 166c <__clzsi2+0x1c>
+    1662:	106a      	lrw      	r3, 0xffffff	// 1688 <__clzsi2+0x38>
+    1664:	640c      	cmphs      	r3, r0
+    1666:	080c      	bt      	0x167e	// 167e <__clzsi2+0x2e>
+    1668:	3308      	movi      	r3, 8
+    166a:	3218      	movi      	r2, 24
+    166c:	7009      	lsr      	r0, r2
+    166e:	1048      	lrw      	r2, 0x4cb4	// 168c <__clzsi2+0x3c>
+    1670:	6008      	addu      	r0, r2
+    1672:	8040      	ld.b      	r2, (r0, 0x0)
+    1674:	5b09      	subu      	r0, r3, r2
+    1676:	783c      	jmp      	r15
+    1678:	3318      	movi      	r3, 24
+    167a:	3208      	movi      	r2, 8
+    167c:	07f8      	br      	0x166c	// 166c <__clzsi2+0x1c>
+    167e:	3310      	movi      	r3, 16
+    1680:	3210      	movi      	r2, 16
+    1682:	07f5      	br      	0x166c	// 166c <__clzsi2+0x1c>
+    1684:	0000ffff 	.long	0x0000ffff
+    1688:	00ffffff 	.long	0x00ffffff
+    168c:	00004cb4 	.long	0x00004cb4
+
+00001690 <__pack_d>:
+    1690:	14c4      	push      	r4-r7
+    1692:	1422      	subi      	r14, r14, 8
+    1694:	9060      	ld.w      	r3, (r0, 0x0)
+    1696:	3b01      	cmphsi      	r3, 2
+    1698:	90c3      	ld.w      	r6, (r0, 0xc)
+    169a:	90e4      	ld.w      	r7, (r0, 0x10)
+    169c:	9021      	ld.w      	r1, (r0, 0x4)
+    169e:	0c46      	bf      	0x172a	// 172a <__pack_d+0x9a>
+    16a0:	3b44      	cmpnei      	r3, 4
+    16a2:	0c40      	bf      	0x1722	// 1722 <__pack_d+0x92>
+    16a4:	3b42      	cmpnei      	r3, 2
+    16a6:	0c27      	bf      	0x16f4	// 16f4 <__pack_d+0x64>
+    16a8:	6cdb      	mov      	r3, r6
+    16aa:	6cdc      	or      	r3, r7
+    16ac:	3b40      	cmpnei      	r3, 0
+    16ae:	0c23      	bf      	0x16f4	// 16f4 <__pack_d+0x64>
+    16b0:	9062      	ld.w      	r3, (r0, 0x8)
+    16b2:	125a      	lrw      	r2, 0xfffffc02	// 1818 <__pack_d+0x188>
+    16b4:	648d      	cmplt      	r3, r2
+    16b6:	0855      	bt      	0x1760	// 1760 <__pack_d+0xd0>
+    16b8:	1259      	lrw      	r2, 0x3ff	// 181c <__pack_d+0x18c>
+    16ba:	64c9      	cmplt      	r2, r3
+    16bc:	0833      	bt      	0x1722	// 1722 <__pack_d+0x92>
+    16be:	34ff      	movi      	r4, 255
+    16c0:	3500      	movi      	r5, 0
+    16c2:	6918      	and      	r4, r6
+    16c4:	695c      	and      	r5, r7
+    16c6:	3280      	movi      	r2, 128
+    16c8:	6492      	cmpne      	r4, r2
+    16ca:	0c3f      	bf      	0x1748	// 1748 <__pack_d+0xb8>
+    16cc:	347f      	movi      	r4, 127
+    16ce:	3500      	movi      	r5, 0
+    16d0:	6599      	cmplt      	r6, r6
+    16d2:	6191      	addc      	r6, r4
+    16d4:	61d5      	addc      	r7, r5
+    16d6:	1253      	lrw      	r2, 0x1fffffff	// 1820 <__pack_d+0x190>
+    16d8:	65c8      	cmphs      	r2, r7
+    16da:	0c1a      	bf      	0x170e	// 170e <__pack_d+0x7e>
+    16dc:	1290      	lrw      	r4, 0x3ff	// 181c <__pack_d+0x18c>
+    16de:	610c      	addu      	r4, r3
+    16e0:	4718      	lsli      	r0, r7, 24
+    16e2:	4f68      	lsri      	r3, r7, 8
+    16e4:	4e48      	lsri      	r2, r6, 8
+    16e6:	6c80      	or      	r2, r0
+    16e8:	430c      	lsli      	r0, r3, 12
+    16ea:	486c      	lsri      	r3, r0, 12
+    16ec:	120e      	lrw      	r0, 0x7ff	// 1824 <__pack_d+0x194>
+    16ee:	6d4b      	mov      	r5, r2
+    16f0:	6900      	and      	r4, r0
+    16f2:	0404      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    16f4:	3400      	movi      	r4, 0
+    16f6:	3200      	movi      	r2, 0
+    16f8:	3300      	movi      	r3, 0
+    16fa:	430c      	lsli      	r0, r3, 12
+    16fc:	480c      	lsri      	r0, r0, 12
+    16fe:	4474      	lsli      	r3, r4, 20
+    1700:	419f      	lsli      	r4, r1, 31
+    1702:	6c43      	mov      	r1, r0
+    1704:	6c4c      	or      	r1, r3
+    1706:	6c50      	or      	r1, r4
+    1708:	6c0b      	mov      	r0, r2
+    170a:	1402      	addi      	r14, r14, 8
+    170c:	1484      	pop      	r4-r7
+    170e:	479f      	lsli      	r4, r7, 31
+    1710:	4e01      	lsri      	r0, r6, 1
+    1712:	6d00      	or      	r4, r0
+    1714:	6d93      	mov      	r6, r4
+    1716:	3480      	movi      	r4, 128
+    1718:	4f41      	lsri      	r2, r7, 1
+    171a:	4483      	lsli      	r4, r4, 3
+    171c:	6dcb      	mov      	r7, r2
+    171e:	610c      	addu      	r4, r3
+    1720:	07e0      	br      	0x16e0	// 16e0 <__pack_d+0x50>
+    1722:	1281      	lrw      	r4, 0x7ff	// 1824 <__pack_d+0x194>
+    1724:	3200      	movi      	r2, 0
+    1726:	3300      	movi      	r3, 0
+    1728:	07e9      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    172a:	4e08      	lsri      	r0, r6, 8
+    172c:	4798      	lsli      	r4, r7, 24
+    172e:	6d00      	or      	r4, r0
+    1730:	3580      	movi      	r5, 128
+    1732:	4705      	lsli      	r0, r7, 5
+    1734:	6c93      	mov      	r2, r4
+    1736:	486d      	lsri      	r3, r0, 13
+    1738:	3400      	movi      	r4, 0
+    173a:	45ac      	lsli      	r5, r5, 12
+    173c:	6c90      	or      	r2, r4
+    173e:	6cd4      	or      	r3, r5
+    1740:	430c      	lsli      	r0, r3, 12
+    1742:	486c      	lsri      	r3, r0, 12
+    1744:	1198      	lrw      	r4, 0x7ff	// 1824 <__pack_d+0x194>
+    1746:	07da      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    1748:	3d40      	cmpnei      	r5, 0
+    174a:	0bc1      	bt      	0x16cc	// 16cc <__pack_d+0x3c>
+    174c:	4241      	lsli      	r2, r2, 1
+    174e:	6898      	and      	r2, r6
+    1750:	3a40      	cmpnei      	r2, 0
+    1752:	0fc2      	bf      	0x16d6	// 16d6 <__pack_d+0x46>
+    1754:	3480      	movi      	r4, 128
+    1756:	3500      	movi      	r5, 0
+    1758:	6599      	cmplt      	r6, r6
+    175a:	6191      	addc      	r6, r4
+    175c:	61d5      	addc      	r7, r5
+    175e:	07bc      	br      	0x16d6	// 16d6 <__pack_d+0x46>
+    1760:	5a6d      	subu      	r3, r2, r3
+    1762:	3238      	movi      	r2, 56
+    1764:	64c9      	cmplt      	r2, r3
+    1766:	0bc7      	bt      	0x16f4	// 16f4 <__pack_d+0x64>
+    1768:	3200      	movi      	r2, 0
+    176a:	2a1f      	subi      	r2, 32
+    176c:	608c      	addu      	r2, r3
+    176e:	3adf      	btsti      	r2, 31
+    1770:	0848      	bt      	0x1800	// 1800 <__pack_d+0x170>
+    1772:	6c1f      	mov      	r0, r7
+    1774:	7009      	lsr      	r0, r2
+    1776:	b800      	st.w      	r0, (r14, 0x0)
+    1778:	3000      	movi      	r0, 0
+    177a:	b801      	st.w      	r0, (r14, 0x4)
+    177c:	3adf      	btsti      	r2, 31
+    177e:	083c      	bt      	0x17f6	// 17f6 <__pack_d+0x166>
+    1780:	3301      	movi      	r3, 1
+    1782:	70c8      	lsl      	r3, r2
+    1784:	6d4f      	mov      	r5, r3
+    1786:	3300      	movi      	r3, 0
+    1788:	6d0f      	mov      	r4, r3
+    178a:	3200      	movi      	r2, 0
+    178c:	3300      	movi      	r3, 0
+    178e:	2a00      	subi      	r2, 1
+    1790:	2b00      	subi      	r3, 1
+    1792:	6511      	cmplt      	r4, r4
+    1794:	6109      	addc      	r4, r2
+    1796:	614d      	addc      	r5, r3
+    1798:	6990      	and      	r6, r4
+    179a:	69d4      	and      	r7, r5
+    179c:	6d9c      	or      	r6, r7
+    179e:	3e40      	cmpnei      	r6, 0
+    17a0:	3000      	movi      	r0, 0
+    17a2:	6001      	addc      	r0, r0
+    17a4:	6c83      	mov      	r2, r0
+    17a6:	3300      	movi      	r3, 0
+    17a8:	9880      	ld.w      	r4, (r14, 0x0)
+    17aa:	98a1      	ld.w      	r5, (r14, 0x4)
+    17ac:	6d08      	or      	r4, r2
+    17ae:	6d4c      	or      	r5, r3
+    17b0:	32ff      	movi      	r2, 255
+    17b2:	3300      	movi      	r3, 0
+    17b4:	6890      	and      	r2, r4
+    17b6:	68d4      	and      	r3, r5
+    17b8:	3080      	movi      	r0, 128
+    17ba:	640a      	cmpne      	r2, r0
+    17bc:	081b      	bt      	0x17f2	// 17f2 <__pack_d+0x162>
+    17be:	3b40      	cmpnei      	r3, 0
+    17c0:	0819      	bt      	0x17f2	// 17f2 <__pack_d+0x162>
+    17c2:	3380      	movi      	r3, 128
+    17c4:	4361      	lsli      	r3, r3, 1
+    17c6:	68d0      	and      	r3, r4
+    17c8:	3b40      	cmpnei      	r3, 0
+    17ca:	0c06      	bf      	0x17d6	// 17d6 <__pack_d+0x146>
+    17cc:	3280      	movi      	r2, 128
+    17ce:	3300      	movi      	r3, 0
+    17d0:	6511      	cmplt      	r4, r4
+    17d2:	6109      	addc      	r4, r2
+    17d4:	614d      	addc      	r5, r3
+    17d6:	4518      	lsli      	r0, r5, 24
+    17d8:	4c48      	lsri      	r2, r4, 8
+    17da:	4d68      	lsri      	r3, r5, 8
+    17dc:	1093      	lrw      	r4, 0xfffffff	// 1828 <__pack_d+0x198>
+    17de:	6c80      	or      	r2, r0
+    17e0:	6550      	cmphs      	r4, r5
+    17e2:	430c      	lsli      	r0, r3, 12
+    17e4:	486c      	lsri      	r3, r0, 12
+    17e6:	3001      	movi      	r0, 1
+    17e8:	0c02      	bf      	0x17ec	// 17ec <__pack_d+0x15c>
+    17ea:	3000      	movi      	r0, 0
+    17ec:	108e      	lrw      	r4, 0x7ff	// 1824 <__pack_d+0x194>
+    17ee:	6900      	and      	r4, r0
+    17f0:	0785      	br      	0x16fa	// 16fa <__pack_d+0x6a>
+    17f2:	327f      	movi      	r2, 127
+    17f4:	07ed      	br      	0x17ce	// 17ce <__pack_d+0x13e>
+    17f6:	3201      	movi      	r2, 1
+    17f8:	708c      	lsl      	r2, r3
+    17fa:	3500      	movi      	r5, 0
+    17fc:	6d0b      	mov      	r4, r2
+    17fe:	07c6      	br      	0x178a	// 178a <__pack_d+0xfa>
+    1800:	341f      	movi      	r4, 31
+    1802:	610e      	subu      	r4, r3
+    1804:	4701      	lsli      	r0, r7, 1
+    1806:	7010      	lsl      	r0, r4
+    1808:	6d1b      	mov      	r4, r6
+    180a:	710d      	lsr      	r4, r3
+    180c:	6d00      	or      	r4, r0
+    180e:	6c1f      	mov      	r0, r7
+    1810:	700d      	lsr      	r0, r3
+    1812:	b880      	st.w      	r4, (r14, 0x0)
+    1814:	b801      	st.w      	r0, (r14, 0x4)
+    1816:	07b3      	br      	0x177c	// 177c <__pack_d+0xec>
+    1818:	fffffc02 	.long	0xfffffc02
+    181c:	000003ff 	.long	0x000003ff
+    1820:	1fffffff 	.long	0x1fffffff
+    1824:	000007ff 	.long	0x000007ff
+    1828:	0fffffff 	.long	0x0fffffff
+
+0000182c <__unpack_d>:
+    182c:	1423      	subi      	r14, r14, 12
+    182e:	b880      	st.w      	r4, (r14, 0x0)
+    1830:	b8c1      	st.w      	r6, (r14, 0x4)
+    1832:	b8e2      	st.w      	r7, (r14, 0x8)
+    1834:	8843      	ld.h      	r2, (r0, 0x6)
+    1836:	4251      	lsli      	r2, r2, 17
+    1838:	9061      	ld.w      	r3, (r0, 0x4)
+    183a:	9080      	ld.w      	r4, (r0, 0x0)
+    183c:	4a55      	lsri      	r2, r2, 21
+    183e:	8007      	ld.b      	r0, (r0, 0x7)
+    1840:	436c      	lsli      	r3, r3, 12
+    1842:	4807      	lsri      	r0, r0, 7
+    1844:	3a40      	cmpnei      	r2, 0
+    1846:	4b6c      	lsri      	r3, r3, 12
+    1848:	b101      	st.w      	r0, (r1, 0x4)
+    184a:	0819      	bt      	0x187c	// 187c <__unpack_d+0x50>
+    184c:	6c93      	mov      	r2, r4
+    184e:	6c8c      	or      	r2, r3
+    1850:	3a40      	cmpnei      	r2, 0
+    1852:	0c2d      	bf      	0x18ac	// 18ac <__unpack_d+0x80>
+    1854:	4c58      	lsri      	r2, r4, 24
+    1856:	4368      	lsli      	r3, r3, 8
+    1858:	6cc8      	or      	r3, r2
+    185a:	3203      	movi      	r2, 3
+    185c:	4408      	lsli      	r0, r4, 8
+    185e:	b140      	st.w      	r2, (r1, 0x0)
+    1860:	1181      	lrw      	r4, 0xfffffc01	// 18e4 <__unpack_d+0xb8>
+    1862:	11c2      	lrw      	r6, 0xfffffff	// 18e8 <__unpack_d+0xbc>
+    1864:	485f      	lsri      	r2, r0, 31
+    1866:	4361      	lsli      	r3, r3, 1
+    1868:	6cc8      	or      	r3, r2
+    186a:	64d8      	cmphs      	r6, r3
+    186c:	6c93      	mov      	r2, r4
+    186e:	4001      	lsli      	r0, r0, 1
+    1870:	2c00      	subi      	r4, 1
+    1872:	0bf9      	bt      	0x1864	// 1864 <__unpack_d+0x38>
+    1874:	b142      	st.w      	r2, (r1, 0x8)
+    1876:	b103      	st.w      	r0, (r1, 0xc)
+    1878:	b164      	st.w      	r3, (r1, 0x10)
+    187a:	0414      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    187c:	101c      	lrw      	r0, 0x7ff	// 18ec <__unpack_d+0xc0>
+    187e:	640a      	cmpne      	r2, r0
+    1880:	0c19      	bf      	0x18b2	// 18b2 <__unpack_d+0x86>
+    1882:	1019      	lrw      	r0, 0xfffffc01	// 18e4 <__unpack_d+0xb8>
+    1884:	6080      	addu      	r2, r0
+    1886:	b142      	st.w      	r2, (r1, 0x8)
+    1888:	3203      	movi      	r2, 3
+    188a:	43e8      	lsli      	r7, r3, 8
+    188c:	b140      	st.w      	r2, (r1, 0x0)
+    188e:	3380      	movi      	r3, 128
+    1890:	4c58      	lsri      	r2, r4, 24
+    1892:	6dc8      	or      	r7, r2
+    1894:	44c8      	lsli      	r6, r4, 8
+    1896:	3200      	movi      	r2, 0
+    1898:	4375      	lsli      	r3, r3, 21
+    189a:	6d88      	or      	r6, r2
+    189c:	6dcc      	or      	r7, r3
+    189e:	b1c3      	st.w      	r6, (r1, 0xc)
+    18a0:	b1e4      	st.w      	r7, (r1, 0x10)
+    18a2:	98e2      	ld.w      	r7, (r14, 0x8)
+    18a4:	98c1      	ld.w      	r6, (r14, 0x4)
+    18a6:	9880      	ld.w      	r4, (r14, 0x0)
+    18a8:	1403      	addi      	r14, r14, 12
+    18aa:	783c      	jmp      	r15
+    18ac:	3302      	movi      	r3, 2
+    18ae:	b160      	st.w      	r3, (r1, 0x0)
+    18b0:	07f9      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    18b2:	6c93      	mov      	r2, r4
+    18b4:	6c8c      	or      	r2, r3
+    18b6:	3a40      	cmpnei      	r2, 0
+    18b8:	0c10      	bf      	0x18d8	// 18d8 <__unpack_d+0xac>
+    18ba:	3280      	movi      	r2, 128
+    18bc:	424c      	lsli      	r2, r2, 12
+    18be:	688c      	and      	r2, r3
+    18c0:	3a40      	cmpnei      	r2, 0
+    18c2:	0c0e      	bf      	0x18de	// 18de <__unpack_d+0xb2>
+    18c4:	3201      	movi      	r2, 1
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	4c58      	lsri      	r2, r4, 24
+    18ca:	4368      	lsli      	r3, r3, 8
+    18cc:	6cc8      	or      	r3, r2
+    18ce:	4408      	lsli      	r0, r4, 8
+    18d0:	3b9b      	bclri      	r3, 27
+    18d2:	b103      	st.w      	r0, (r1, 0xc)
+    18d4:	b164      	st.w      	r3, (r1, 0x10)
+    18d6:	07e6      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    18d8:	3304      	movi      	r3, 4
+    18da:	b160      	st.w      	r3, (r1, 0x0)
+    18dc:	07e3      	br      	0x18a2	// 18a2 <__unpack_d+0x76>
+    18de:	b140      	st.w      	r2, (r1, 0x0)
+    18e0:	07f4      	br      	0x18c8	// 18c8 <__unpack_d+0x9c>
+    18e2:	0000      	bkpt
+    18e4:	fffffc01 	.long	0xfffffc01
+    18e8:	0fffffff 	.long	0x0fffffff
+    18ec:	000007ff 	.long	0x000007ff
+
+000018f0 <__fpcmp_parts_d>:
+    18f0:	14c1      	push      	r4
+    18f2:	9060      	ld.w      	r3, (r0, 0x0)
+    18f4:	3b01      	cmphsi      	r3, 2
+    18f6:	0c12      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x2a>
+    18f8:	9140      	ld.w      	r2, (r1, 0x0)
+    18fa:	3a01      	cmphsi      	r2, 2
+    18fc:	0c0f      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x2a>
+    18fe:	3b44      	cmpnei      	r3, 4
+    1900:	0c17      	bf      	0x192e	// 192e <__fpcmp_parts_d+0x3e>
+    1902:	3a44      	cmpnei      	r2, 4
+    1904:	0c0f      	bf      	0x1922	// 1922 <__fpcmp_parts_d+0x32>
+    1906:	3b42      	cmpnei      	r3, 2
+    1908:	0c0b      	bf      	0x191e	// 191e <__fpcmp_parts_d+0x2e>
+    190a:	3a42      	cmpnei      	r2, 2
+    190c:	0c13      	bf      	0x1932	// 1932 <__fpcmp_parts_d+0x42>
+    190e:	9061      	ld.w      	r3, (r0, 0x4)
+    1910:	9141      	ld.w      	r2, (r1, 0x4)
+    1912:	648e      	cmpne      	r3, r2
+    1914:	0c14      	bf      	0x193c	// 193c <__fpcmp_parts_d+0x4c>
+    1916:	3b40      	cmpnei      	r3, 0
+    1918:	0808      	bt      	0x1928	// 1928 <__fpcmp_parts_d+0x38>
+    191a:	3001      	movi      	r0, 1
+    191c:	1481      	pop      	r4
+    191e:	3a42      	cmpnei      	r2, 2
+    1920:	0c28      	bf      	0x1970	// 1970 <__fpcmp_parts_d+0x80>
+    1922:	9161      	ld.w      	r3, (r1, 0x4)
+    1924:	3b40      	cmpnei      	r3, 0
+    1926:	0bfa      	bt      	0x191a	// 191a <__fpcmp_parts_d+0x2a>
+    1928:	3000      	movi      	r0, 0
+    192a:	2800      	subi      	r0, 1
+    192c:	1481      	pop      	r4
+    192e:	3a44      	cmpnei      	r2, 4
+    1930:	0c22      	bf      	0x1974	// 1974 <__fpcmp_parts_d+0x84>
+    1932:	9061      	ld.w      	r3, (r0, 0x4)
+    1934:	3b40      	cmpnei      	r3, 0
+    1936:	0bf9      	bt      	0x1928	// 1928 <__fpcmp_parts_d+0x38>
+    1938:	3001      	movi      	r0, 1
+    193a:	07f1      	br      	0x191c	// 191c <__fpcmp_parts_d+0x2c>
+    193c:	9082      	ld.w      	r4, (r0, 0x8)
+    193e:	9142      	ld.w      	r2, (r1, 0x8)
+    1940:	6509      	cmplt      	r2, r4
+    1942:	0bea      	bt      	0x1916	// 1916 <__fpcmp_parts_d+0x26>
+    1944:	6491      	cmplt      	r4, r2
+    1946:	080d      	bt      	0x1960	// 1960 <__fpcmp_parts_d+0x70>
+    1948:	9044      	ld.w      	r2, (r0, 0x10)
+    194a:	9083      	ld.w      	r4, (r0, 0xc)
+    194c:	9103      	ld.w      	r0, (r1, 0xc)
+    194e:	9124      	ld.w      	r1, (r1, 0x10)
+    1950:	6484      	cmphs      	r1, r2
+    1952:	0fe2      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x26>
+    1954:	644a      	cmpne      	r2, r1
+    1956:	0803      	bt      	0x195c	// 195c <__fpcmp_parts_d+0x6c>
+    1958:	6500      	cmphs      	r0, r4
+    195a:	0fde      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x26>
+    195c:	6448      	cmphs      	r2, r1
+    195e:	0805      	bt      	0x1968	// 1968 <__fpcmp_parts_d+0x78>
+    1960:	3b40      	cmpnei      	r3, 0
+    1962:	0fe3      	bf      	0x1928	// 1928 <__fpcmp_parts_d+0x38>
+    1964:	3001      	movi      	r0, 1
+    1966:	07db      	br      	0x191c	// 191c <__fpcmp_parts_d+0x2c>
+    1968:	6486      	cmpne      	r1, r2
+    196a:	0803      	bt      	0x1970	// 1970 <__fpcmp_parts_d+0x80>
+    196c:	6410      	cmphs      	r4, r0
+    196e:	0ff9      	bf      	0x1960	// 1960 <__fpcmp_parts_d+0x70>
+    1970:	3000      	movi      	r0, 0
+    1972:	1481      	pop      	r4
+    1974:	9161      	ld.w      	r3, (r1, 0x4)
+    1976:	9041      	ld.w      	r2, (r0, 0x4)
+    1978:	5b09      	subu      	r0, r3, r2
+    197a:	1481      	pop      	r4
+
+0000197c <__memset_fast>:
+    197c:	14c3      	push      	r4-r6
+    197e:	7444      	zextb      	r1, r1
+    1980:	3a40      	cmpnei      	r2, 0
+    1982:	0c1f      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    1984:	6d43      	mov      	r5, r0
+    1986:	6d03      	mov      	r4, r0
+    1988:	3603      	movi      	r6, 3
+    198a:	6918      	and      	r4, r6
+    198c:	3c40      	cmpnei      	r4, 0
+    198e:	0c1a      	bf      	0x19c2	// 19c2 <__memset_fast+0x46>
+    1990:	a520      	st.b      	r1, (r5, 0x0)
+    1992:	2a00      	subi      	r2, 1
+    1994:	3a40      	cmpnei      	r2, 0
+    1996:	0c15      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    1998:	2500      	addi      	r5, 1
+    199a:	6d17      	mov      	r4, r5
+    199c:	3603      	movi      	r6, 3
+    199e:	6918      	and      	r4, r6
+    19a0:	3c40      	cmpnei      	r4, 0
+    19a2:	0c10      	bf      	0x19c2	// 19c2 <__memset_fast+0x46>
+    19a4:	a520      	st.b      	r1, (r5, 0x0)
+    19a6:	2a00      	subi      	r2, 1
+    19a8:	3a40      	cmpnei      	r2, 0
+    19aa:	0c0b      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    19ac:	2500      	addi      	r5, 1
+    19ae:	6d17      	mov      	r4, r5
+    19b0:	3603      	movi      	r6, 3
+    19b2:	6918      	and      	r4, r6
+    19b4:	3c40      	cmpnei      	r4, 0
+    19b6:	0c06      	bf      	0x19c2	// 19c2 <__memset_fast+0x46>
+    19b8:	a520      	st.b      	r1, (r5, 0x0)
+    19ba:	2a00      	subi      	r2, 1
+    19bc:	2500      	addi      	r5, 1
+    19be:	0402      	br      	0x19c2	// 19c2 <__memset_fast+0x46>
+    19c0:	1483      	pop      	r4-r6
+    19c2:	4168      	lsli      	r3, r1, 8
+    19c4:	6c4c      	or      	r1, r3
+    19c6:	4170      	lsli      	r3, r1, 16
+    19c8:	6c4c      	or      	r1, r3
+    19ca:	3a2f      	cmplti      	r2, 16
+    19cc:	0809      	bt      	0x19de	// 19de <__memset_fast+0x62>
+    19ce:	b520      	st.w      	r1, (r5, 0x0)
+    19d0:	b521      	st.w      	r1, (r5, 0x4)
+    19d2:	b522      	st.w      	r1, (r5, 0x8)
+    19d4:	b523      	st.w      	r1, (r5, 0xc)
+    19d6:	2a0f      	subi      	r2, 16
+    19d8:	250f      	addi      	r5, 16
+    19da:	3a2f      	cmplti      	r2, 16
+    19dc:	0ff9      	bf      	0x19ce	// 19ce <__memset_fast+0x52>
+    19de:	3a23      	cmplti      	r2, 4
+    19e0:	0806      	bt      	0x19ec	// 19ec <__memset_fast+0x70>
+    19e2:	2a03      	subi      	r2, 4
+    19e4:	b520      	st.w      	r1, (r5, 0x0)
+    19e6:	2503      	addi      	r5, 4
+    19e8:	3a23      	cmplti      	r2, 4
+    19ea:	0ffc      	bf      	0x19e2	// 19e2 <__memset_fast+0x66>
+    19ec:	3a40      	cmpnei      	r2, 0
+    19ee:	0fe9      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    19f0:	2a00      	subi      	r2, 1
+    19f2:	a520      	st.b      	r1, (r5, 0x0)
+    19f4:	3a40      	cmpnei      	r2, 0
+    19f6:	0fe5      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    19f8:	2a00      	subi      	r2, 1
+    19fa:	a521      	st.b      	r1, (r5, 0x1)
+    19fc:	3a40      	cmpnei      	r2, 0
+    19fe:	0fe1      	bf      	0x19c0	// 19c0 <__memset_fast+0x44>
+    1a00:	a522      	st.b      	r1, (r5, 0x2)
+    1a02:	1483      	pop      	r4-r6
+
+00001a04 <__memcpy_fast>:
+    1a04:	14c3      	push      	r4-r6
+    1a06:	6d83      	mov      	r6, r0
+    1a08:	6d07      	mov      	r4, r1
+    1a0a:	6d18      	or      	r4, r6
+    1a0c:	3303      	movi      	r3, 3
+    1a0e:	690c      	and      	r4, r3
+    1a10:	3c40      	cmpnei      	r4, 0
+    1a12:	0c0b      	bf      	0x1a28	// 1a28 <__memcpy_fast+0x24>
+    1a14:	3a40      	cmpnei      	r2, 0
+    1a16:	0c08      	bf      	0x1a26	// 1a26 <__memcpy_fast+0x22>
+    1a18:	8160      	ld.b      	r3, (r1, 0x0)
+    1a1a:	2100      	addi      	r1, 1
+    1a1c:	2a00      	subi      	r2, 1
+    1a1e:	a660      	st.b      	r3, (r6, 0x0)
+    1a20:	2600      	addi      	r6, 1
+    1a22:	3a40      	cmpnei      	r2, 0
+    1a24:	0bfa      	bt      	0x1a18	// 1a18 <__memcpy_fast+0x14>
+    1a26:	1483      	pop      	r4-r6
+    1a28:	3a2f      	cmplti      	r2, 16
+    1a2a:	080e      	bt      	0x1a46	// 1a46 <__memcpy_fast+0x42>
+    1a2c:	91a0      	ld.w      	r5, (r1, 0x0)
+    1a2e:	9161      	ld.w      	r3, (r1, 0x4)
+    1a30:	9182      	ld.w      	r4, (r1, 0x8)
+    1a32:	b6a0      	st.w      	r5, (r6, 0x0)
+    1a34:	91a3      	ld.w      	r5, (r1, 0xc)
+    1a36:	b661      	st.w      	r3, (r6, 0x4)
+    1a38:	b682      	st.w      	r4, (r6, 0x8)
+    1a3a:	b6a3      	st.w      	r5, (r6, 0xc)
+    1a3c:	2a0f      	subi      	r2, 16
+    1a3e:	210f      	addi      	r1, 16
+    1a40:	260f      	addi      	r6, 16
+    1a42:	3a2f      	cmplti      	r2, 16
+    1a44:	0ff4      	bf      	0x1a2c	// 1a2c <__memcpy_fast+0x28>
+    1a46:	3a23      	cmplti      	r2, 4
+    1a48:	0808      	bt      	0x1a58	// 1a58 <__memcpy_fast+0x54>
+    1a4a:	9160      	ld.w      	r3, (r1, 0x0)
+    1a4c:	2a03      	subi      	r2, 4
+    1a4e:	2103      	addi      	r1, 4
+    1a50:	b660      	st.w      	r3, (r6, 0x0)
+    1a52:	2603      	addi      	r6, 4
+    1a54:	3a23      	cmplti      	r2, 4
+    1a56:	0ffa      	bf      	0x1a4a	// 1a4a <__memcpy_fast+0x46>
+    1a58:	3a40      	cmpnei      	r2, 0
+    1a5a:	0fe6      	bf      	0x1a26	// 1a26 <__memcpy_fast+0x22>
+    1a5c:	8160      	ld.b      	r3, (r1, 0x0)
+    1a5e:	2100      	addi      	r1, 1
+    1a60:	2a00      	subi      	r2, 1
+    1a62:	a660      	st.b      	r3, (r6, 0x0)
+    1a64:	2600      	addi      	r6, 1
+    1a66:	07f9      	br      	0x1a58	// 1a58 <__memcpy_fast+0x54>
+
+00001a68 <__GI_strncmp>:
+    1a68:	14c1      	push      	r4
+    1a6a:	6cc3      	mov      	r3, r0
+    1a6c:	6080      	addu      	r2, r0
+    1a6e:	040c      	br      	0x1a86	// 1a86 <__GI_strncmp+0x1e>
+    1a70:	8380      	ld.b      	r4, (r3, 0x0)
+    1a72:	8100      	ld.b      	r0, (r1, 0x0)
+    1a74:	6012      	subu      	r0, r4
+    1a76:	6c02      	nor      	r0, r0
+    1a78:	2000      	addi      	r0, 1
+    1a7a:	3840      	cmpnei      	r0, 0
+    1a7c:	0808      	bt      	0x1a8c	// 1a8c <__GI_strncmp+0x24>
+    1a7e:	3c40      	cmpnei      	r4, 0
+    1a80:	0c06      	bf      	0x1a8c	// 1a8c <__GI_strncmp+0x24>
+    1a82:	2300      	addi      	r3, 1
+    1a84:	2100      	addi      	r1, 1
+    1a86:	648c      	cmphs      	r3, r2
+    1a88:	0ff4      	bf      	0x1a70	// 1a70 <__GI_strncmp+0x8>
+    1a8a:	3000      	movi      	r0, 0
+    1a8c:	1481      	pop      	r4
+
+Disassembly of section .text.__main:
+
+00001a90 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    1a90:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    1a92:	1009      	lrw      	r0, 0x20000000	// 1ab4 <__main+0x24>
+    1a94:	1029      	lrw      	r1, 0x4f68	// 1ab8 <__main+0x28>
+    1a96:	6442      	cmpne      	r0, r1
+    1a98:	0c05      	bf      	0x1aa2	// 1aa2 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    1a9a:	1049      	lrw      	r2, 0x2000009c	// 1abc <__main+0x2c>
+    1a9c:	6082      	subu      	r2, r0
+    1a9e:	e3ffffb3 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    1aa2:	1048      	lrw      	r2, 0x20000674	// 1ac0 <__main+0x30>
+    1aa4:	1008      	lrw      	r0, 0x2000009c	// 1ac4 <__main+0x34>
+    1aa6:	640a      	cmpne      	r2, r0
+    1aa8:	0c05      	bf      	0x1ab2	// 1ab2 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    1aaa:	6082      	subu      	r2, r0
+    1aac:	3100      	movi      	r1, 0
+    1aae:	e3ffff67 	bsr      	0x197c	// 197c <__memset_fast>
+  }
+
+	
+}
+    1ab2:	1490      	pop      	r15
+    1ab4:	20000000 	.long	0x20000000
+    1ab8:	00004f68 	.long	0x00004f68
+    1abc:	2000009c 	.long	0x2000009c
+    1ac0:	20000674 	.long	0x20000674
+    1ac4:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00001ac8 <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    1ac8:	3848      	cmpnei      	r0, 8
+    1aca:	080a      	bt      	0x1ade	// 1ade <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    1acc:	107a      	lrw      	r3, 0x2000004c	// 1b34 <SYSCON_General_CMD.part.0+0x6c>
+    1ace:	32ff      	movi      	r2, 255
+    1ad0:	9320      	ld.w      	r1, (r3, 0x0)
+    1ad2:	9160      	ld.w      	r3, (r1, 0x0)
+    1ad4:	424c      	lsli      	r2, r2, 12
+    1ad6:	68c9      	andn      	r3, r2
+    1ad8:	3bae      	bseti      	r3, 14
+    1ada:	3bb2      	bseti      	r3, 18
+    1adc:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    1ade:	1077      	lrw      	r3, 0x2000005c	// 1b38 <SYSCON_General_CMD.part.0+0x70>
+    1ae0:	9360      	ld.w      	r3, (r3, 0x0)
+    1ae2:	9341      	ld.w      	r2, (r3, 0x4)
+    1ae4:	6c80      	or      	r2, r0
+    1ae6:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    1ae8:	9343      	ld.w      	r2, (r3, 0xc)
+    1aea:	6880      	and      	r2, r0
+    1aec:	3a40      	cmpnei      	r2, 0
+    1aee:	0ffd      	bf      	0x1ae8	// 1ae8 <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    1af0:	3842      	cmpnei      	r0, 2
+    1af2:	0807      	bt      	0x1b00	// 1b00 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    1af4:	3102      	movi      	r1, 2
+    1af6:	9344      	ld.w      	r2, (r3, 0x10)
+    1af8:	6884      	and      	r2, r1
+    1afa:	3a40      	cmpnei      	r2, 0
+    1afc:	0ffd      	bf      	0x1af6	// 1af6 <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    1afe:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    1b00:	3802      	cmphsi      	r0, 3
+    1b02:	0809      	bt      	0x1b14	// 1b14 <SYSCON_General_CMD.part.0+0x4c>
+    1b04:	3841      	cmpnei      	r0, 1
+    1b06:	0bfc      	bt      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    1b08:	3101      	movi      	r1, 1
+    1b0a:	9344      	ld.w      	r2, (r3, 0x10)
+    1b0c:	6884      	and      	r2, r1
+    1b0e:	3a40      	cmpnei      	r2, 0
+    1b10:	0ffd      	bf      	0x1b0a	// 1b0a <SYSCON_General_CMD.part.0+0x42>
+    1b12:	07f6      	br      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1b14:	3848      	cmpnei      	r0, 8
+    1b16:	0807      	bt      	0x1b24	// 1b24 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    1b18:	3108      	movi      	r1, 8
+    1b1a:	9344      	ld.w      	r2, (r3, 0x10)
+    1b1c:	6884      	and      	r2, r1
+    1b1e:	3a40      	cmpnei      	r2, 0
+    1b20:	0ffd      	bf      	0x1b1a	// 1b1a <SYSCON_General_CMD.part.0+0x52>
+    1b22:	07ee      	br      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1b24:	3850      	cmpnei      	r0, 16
+    1b26:	0bec      	bt      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    1b28:	3110      	movi      	r1, 16
+    1b2a:	9344      	ld.w      	r2, (r3, 0x10)
+    1b2c:	6884      	and      	r2, r1
+    1b2e:	3a40      	cmpnei      	r2, 0
+    1b30:	0ffd      	bf      	0x1b2a	// 1b2a <SYSCON_General_CMD.part.0+0x62>
+    1b32:	07e6      	br      	0x1afe	// 1afe <SYSCON_General_CMD.part.0+0x36>
+    1b34:	2000004c 	.long	0x2000004c
+    1b38:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00001b3c <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    1b3c:	106c      	lrw      	r3, 0x2000005c	// 1b6c <SYSCON_RST_VALUE+0x30>
+    1b3e:	104d      	lrw      	r2, 0xffff	// 1b70 <SYSCON_RST_VALUE+0x34>
+    1b40:	9360      	ld.w      	r3, (r3, 0x0)
+    1b42:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    1b44:	104c      	lrw      	r2, 0xffffff	// 1b74 <SYSCON_RST_VALUE+0x38>
+    1b46:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    1b48:	104c      	lrw      	r2, 0xd22d0000	// 1b78 <SYSCON_RST_VALUE+0x3c>
+    1b4a:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    1b4c:	104c      	lrw      	r2, 0x70ff3bff	// 1b7c <SYSCON_RST_VALUE+0x40>
+    1b4e:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    1b50:	320a      	movi      	r2, 10
+    1b52:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b54:	102b      	lrw      	r1, 0x70c	// 1b80 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    1b56:	237f      	addi      	r3, 128
+    1b58:	3200      	movi      	r2, 0
+    1b5a:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    1b5c:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b5e:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    1b60:	1029      	lrw      	r1, 0x3fe	// 1b84 <SYSCON_RST_VALUE+0x48>
+    1b62:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    1b64:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    1b66:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    1b68:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    1b6a:	783c      	jmp      	r15
+    1b6c:	2000005c 	.long	0x2000005c
+    1b70:	0000ffff 	.long	0x0000ffff
+    1b74:	00ffffff 	.long	0x00ffffff
+    1b78:	d22d0000 	.long	0xd22d0000
+    1b7c:	70ff3bff 	.long	0x70ff3bff
+    1b80:	0000070c 	.long	0x0000070c
+    1b84:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+00001b88 <SYSCON_General_CMD>:
+{
+    1b88:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    1b8a:	3840      	cmpnei      	r0, 0
+    1b8c:	0c05      	bf      	0x1b96	// 1b96 <SYSCON_General_CMD+0xe>
+    1b8e:	6c07      	mov      	r0, r1
+    1b90:	e3ffff9c 	bsr      	0x1ac8	// 1ac8 <SYSCON_General_CMD.part.0>
+}
+    1b94:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    1b96:	1068      	lrw      	r3, 0x2000005c	// 1bb4 <SYSCON_General_CMD+0x2c>
+    1b98:	9360      	ld.w      	r3, (r3, 0x0)
+    1b9a:	9342      	ld.w      	r2, (r3, 0x8)
+    1b9c:	6c84      	or      	r2, r1
+    1b9e:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    1ba0:	9343      	ld.w      	r2, (r3, 0xc)
+    1ba2:	6884      	and      	r2, r1
+    1ba4:	3a40      	cmpnei      	r2, 0
+    1ba6:	0bfd      	bt      	0x1ba0	// 1ba0 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    1ba8:	237f      	addi      	r3, 128
+    1baa:	9301      	ld.w      	r0, (r3, 0x4)
+    1bac:	6c40      	or      	r1, r0
+    1bae:	b321      	st.w      	r1, (r3, 0x4)
+}
+    1bb0:	07f2      	br      	0x1b94	// 1b94 <SYSCON_General_CMD+0xc>
+    1bb2:	0000      	bkpt
+    1bb4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+00001bb8 <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    1bb8:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    1bba:	3b48      	cmpnei      	r3, 8
+    1bbc:	0828      	bt      	0x1c0c	// 1c0c <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1bbe:	109d      	lrw      	r4, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bc0:	3501      	movi      	r5, 1
+    1bc2:	9480      	ld.w      	r4, (r4, 0x0)
+    1bc4:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    1bc6:	3504      	movi      	r5, 4
+    1bc8:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1bca:	5b83      	subi      	r4, r3, 1
+    1bcc:	3c01      	cmphsi      	r4, 2
+    1bce:	0c2b      	bf      	0x1c24	// 1c24 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1bd0:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    1bd2:	3c04      	cmphsi      	r4, 5
+    1bd4:	0c03      	bf      	0x1bda	// 1bda <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1bd6:	3b4b      	cmpnei      	r3, 11
+    1bd8:	0807      	bt      	0x1be6	// 1be6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1bda:	1076      	lrw      	r3, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bdc:	3401      	movi      	r4, 1
+    1bde:	9360      	ld.w      	r3, (r3, 0x0)
+    1be0:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    1be2:	3400      	movi      	r4, 0
+    1be4:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1be6:	1094      	lrw      	r4, 0xd22d0000	// 1c34 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    1be8:	6c10      	or      	r0, r4
+    1bea:	1074      	lrw      	r3, 0x2000005c	// 1c38 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    1bec:	6c40      	or      	r1, r0
+    1bee:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bf0:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1bf2:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bf4:	4001      	lsli      	r0, r0, 1
+    1bf6:	9324      	ld.w      	r1, (r3, 0x10)
+    1bf8:	6840      	and      	r1, r0
+    1bfa:	3940      	cmpnei      	r1, 0
+    1bfc:	0ffd      	bf      	0x1bf6	// 1bf6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    1bfe:	1030      	lrw      	r1, 0xc33c0000	// 1c3c <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    1c00:	6c48      	or      	r1, r2
+    1c02:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    1c04:	9328      	ld.w      	r1, (r3, 0x20)
+    1c06:	644a      	cmpne      	r2, r1
+    1c08:	0bfe      	bt      	0x1c04	// 1c04 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    1c0a:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    1c0c:	3b40      	cmpnei      	r3, 0
+    1c0e:	0c03      	bf      	0x1c14	// 1c14 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    1c10:	3b49      	cmpnei      	r3, 9
+    1c12:	0807      	bt      	0x1c20	// 1c20 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    1c14:	1087      	lrw      	r4, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1c16:	3501      	movi      	r5, 1
+    1c18:	9480      	ld.w      	r4, (r4, 0x0)
+    1c1a:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    1c1c:	3502      	movi      	r5, 2
+    1c1e:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1c20:	3b4a      	cmpnei      	r3, 10
+    1c22:	0bd4      	bt      	0x1bca	// 1bca <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    1c24:	1083      	lrw      	r4, 0x20000060	// 1c30 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1c26:	3501      	movi      	r5, 1
+    1c28:	9480      	ld.w      	r4, (r4, 0x0)
+    1c2a:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    1c2c:	b4a5      	st.w      	r5, (r4, 0x14)
+    1c2e:	07d1      	br      	0x1bd0	// 1bd0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    1c30:	20000060 	.long	0x20000060
+    1c34:	d22d0000 	.long	0xd22d0000
+    1c38:	2000005c 	.long	0x2000005c
+    1c3c:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+00001c40 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    1c40:	14d1      	push      	r4, r15
+    1c42:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    1c44:	3110      	movi      	r1, 16
+    1c46:	3000      	movi      	r0, 0
+    1c48:	e3ffffa0 	bsr      	0x1b88	// 1b88 <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    1c4c:	1066      	lrw      	r3, 0x2000005c	// 1c64 <SYSCON_HFOSC_SELECTE+0x24>
+    1c4e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c50:	9319      	ld.w      	r0, (r3, 0x64)
+    1c52:	3884      	bclri      	r0, 4
+    1c54:	3885      	bclri      	r0, 5
+    1c56:	6c10      	or      	r0, r4
+    1c58:	b319      	st.w      	r0, (r3, 0x64)
+    1c5a:	3010      	movi      	r0, 16
+    1c5c:	e3ffff36 	bsr      	0x1ac8	// 1ac8 <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    1c60:	1491      	pop      	r4, r15
+    1c62:	0000      	bkpt
+    1c64:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+00001c68 <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    1c68:	106c      	lrw      	r3, 0x2000005c	// 1c98 <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    1c6a:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c6c:	9360      	ld.w      	r3, (r3, 0x0)
+    1c6e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1c70:	0c0a      	bf      	0x1c84	// 1c84 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c72:	104b      	lrw      	r2, 0x78870000	// 1c9c <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c74:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c76:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c78:	4125      	lsli      	r1, r1, 5
+    1c7a:	934d      	ld.w      	r2, (r3, 0x34)
+    1c7c:	6884      	and      	r2, r1
+    1c7e:	3a40      	cmpnei      	r2, 0
+    1c80:	0ffd      	bf      	0x1c7a	// 1c7a <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    1c82:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c84:	1047      	lrw      	r2, 0x788755aa	// 1ca0 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c86:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c88:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c8a:	4125      	lsli      	r1, r1, 5
+    1c8c:	934d      	ld.w      	r2, (r3, 0x34)
+    1c8e:	6884      	and      	r2, r1
+    1c90:	3a40      	cmpnei      	r2, 0
+    1c92:	0bfd      	bt      	0x1c8c	// 1c8c <SYSCON_WDT_CMD+0x24>
+    1c94:	07f7      	br      	0x1c82	// 1c82 <SYSCON_WDT_CMD+0x1a>
+    1c96:	0000      	bkpt
+    1c98:	2000005c 	.long	0x2000005c
+    1c9c:	78870000 	.long	0x78870000
+    1ca0:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00001ca4 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    1ca4:	1064      	lrw      	r3, 0x2000005c	// 1cb4 <SYSCON_IWDCNT_Reload+0x10>
+    1ca6:	32b4      	movi      	r2, 180
+    1ca8:	9360      	ld.w      	r3, (r3, 0x0)
+    1caa:	237f      	addi      	r3, 128
+    1cac:	4257      	lsli      	r2, r2, 23
+    1cae:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    1cb0:	783c      	jmp      	r15
+    1cb2:	0000      	bkpt
+    1cb4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+00001cb8 <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    1cb8:	1044      	lrw      	r2, 0x87780000	// 1cc8 <SYSCON_IWDCNT_Config+0x10>
+    1cba:	1065      	lrw      	r3, 0x2000005c	// 1ccc <SYSCON_IWDCNT_Config+0x14>
+    1cbc:	6c48      	or      	r1, r2
+    1cbe:	9360      	ld.w      	r3, (r3, 0x0)
+    1cc0:	6c04      	or      	r0, r1
+    1cc2:	237f      	addi      	r3, 128
+    1cc4:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    1cc6:	783c      	jmp      	r15
+    1cc8:	87780000 	.long	0x87780000
+    1ccc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00001cd0 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    1cd0:	14c3      	push      	r4-r6
+    1cd2:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    1cd4:	10c5      	lrw      	r6, 0xb44b0000	// 1ce8 <SYSCON_LVD_Config+0x18>
+    1cd6:	6d18      	or      	r4, r6
+    1cd8:	6cd0      	or      	r3, r4
+    1cda:	6c8c      	or      	r2, r3
+    1cdc:	6c48      	or      	r1, r2
+    1cde:	10a4      	lrw      	r5, 0x2000005c	// 1cec <SYSCON_LVD_Config+0x1c>
+    1ce0:	6c04      	or      	r0, r1
+    1ce2:	95a0      	ld.w      	r5, (r5, 0x0)
+    1ce4:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    1ce6:	1483      	pop      	r4-r6
+    1ce8:	b44b0000 	.long	0xb44b0000
+    1cec:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00001cf0 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    1cf0:	1066      	lrw      	r3, 0x2000005c	// 1d08 <LVD_Int_Enable+0x18>
+    1cf2:	3180      	movi      	r1, 128
+    1cf4:	9360      	ld.w      	r3, (r3, 0x0)
+    1cf6:	3280      	movi      	r2, 128
+    1cf8:	604c      	addu      	r1, r3
+    1cfa:	4244      	lsli      	r2, r2, 4
+    1cfc:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    1cfe:	935d      	ld.w      	r2, (r3, 0x74)
+    1d00:	3aab      	bseti      	r2, 11
+    1d02:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1d04:	783c      	jmp      	r15
+    1d06:	0000      	bkpt
+    1d08:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00001d0c <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    1d0c:	1066      	lrw      	r3, 0x2000005c	// 1d24 <IWDT_Int_Enable+0x18>
+    1d0e:	3180      	movi      	r1, 128
+    1d10:	9360      	ld.w      	r3, (r3, 0x0)
+    1d12:	3280      	movi      	r2, 128
+    1d14:	604c      	addu      	r1, r3
+    1d16:	4241      	lsli      	r2, r2, 1
+    1d18:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    1d1a:	935d      	ld.w      	r2, (r3, 0x74)
+    1d1c:	3aa8      	bseti      	r2, 8
+    1d1e:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1d20:	783c      	jmp      	r15
+    1d22:	0000      	bkpt
+    1d24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+00001d28 <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    1d28:	3a40      	cmpnei      	r2, 0
+    1d2a:	0c04      	bf      	0x1d32	// 1d32 <EXTI_trigger_CMD+0xa>
+    1d2c:	3a41      	cmpnei      	r2, 1
+    1d2e:	0c0e      	bf      	0x1d4a	// 1d4a <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    1d30:	783c      	jmp      	r15
+    1d32:	106d      	lrw      	r3, 0x2000005c	// 1d64 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d34:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    1d36:	9360      	ld.w      	r3, (r3, 0x0)
+    1d38:	237f      	addi      	r3, 128
+    1d3a:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    1d3c:	0c04      	bf      	0x1d44	// 1d44 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    1d3e:	6c48      	or      	r1, r2
+    1d40:	b325      	st.w      	r1, (r3, 0x14)
+    1d42:	07f7      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    1d44:	6885      	andn      	r2, r1
+    1d46:	b345      	st.w      	r2, (r3, 0x14)
+    1d48:	07f4      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+    1d4a:	1067      	lrw      	r3, 0x2000005c	// 1d64 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d4c:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    1d4e:	9360      	ld.w      	r3, (r3, 0x0)
+    1d50:	237f      	addi      	r3, 128
+    1d52:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    1d54:	0c04      	bf      	0x1d5c	// 1d5c <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    1d56:	6c48      	or      	r1, r2
+    1d58:	b326      	st.w      	r1, (r3, 0x18)
+    1d5a:	07eb      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    1d5c:	6885      	andn      	r2, r1
+    1d5e:	b346      	st.w      	r2, (r3, 0x18)
+}
+    1d60:	07e8      	br      	0x1d30	// 1d30 <EXTI_trigger_CMD+0x8>
+    1d62:	0000      	bkpt
+    1d64:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_interrupt_CMD:
+
+00001d68 <EXTI_interrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void EXTI_interrupt_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN)
+{
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+    1d68:	106b      	lrw      	r3, 0x2000005c	// 1d94 <EXTI_interrupt_CMD+0x2c>
+    1d6a:	104c      	lrw      	r2, 0x3fff	// 1d98 <EXTI_interrupt_CMD+0x30>
+    1d6c:	9360      	ld.w      	r3, (r3, 0x0)
+    1d6e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1d70:	3840      	cmpnei      	r0, 0
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+    1d72:	b34b      	st.w      	r2, (r3, 0x2c)
+	if(NewState != DISABLE)
+    1d74:	0c0c      	bf      	0x1d8c	// 1d8c <EXTI_interrupt_CMD+0x24>
+	{
+		SYSCON->EXIER|=EXIPIN;								//EXI4 interrupt enable
+    1d76:	9347      	ld.w      	r2, (r3, 0x1c)
+    1d78:	6c84      	or      	r2, r1
+    1d7a:	b347      	st.w      	r2, (r3, 0x1c)
+		while(!(SYSCON->EXIMR&EXIPIN));						//Check EXI is enabled or not
+    1d7c:	9349      	ld.w      	r2, (r3, 0x24)
+    1d7e:	6884      	and      	r2, r1
+    1d80:	3a40      	cmpnei      	r2, 0
+    1d82:	0ffd      	bf      	0x1d7c	// 1d7c <EXTI_interrupt_CMD+0x14>
+		SYSCON->EXICR |=EXIPIN;								// Clear EXI status bit
+    1d84:	934b      	ld.w      	r2, (r3, 0x2c)
+    1d86:	6c48      	or      	r1, r2
+    1d88:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else
+	{
+		SYSCON->EXIDR|=EXIPIN;
+	}
+}
+    1d8a:	783c      	jmp      	r15
+		SYSCON->EXIDR|=EXIPIN;
+    1d8c:	9348      	ld.w      	r2, (r3, 0x20)
+    1d8e:	6c48      	or      	r1, r2
+    1d90:	b328      	st.w      	r1, (r3, 0x20)
+}
+    1d92:	07fc      	br      	0x1d8a	// 1d8a <EXTI_interrupt_CMD+0x22>
+    1d94:	2000005c 	.long	0x2000005c
+    1d98:	00003fff 	.long	0x00003fff
+
+Disassembly of section .text.GPIO_EXTI_interrupt:
+
+00001d9c <GPIO_EXTI_interrupt>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPIO_EXTI_interrupt(CSP_GPIO_T * GPIOX,U32_T GPIO_IECR_VALUE)
+{
+	GPIOX->IECR=GPIO_IECR_VALUE;
+    1d9c:	b02b      	st.w      	r1, (r0, 0x2c)
+}
+    1d9e:	783c      	jmp      	r15
+
+Disassembly of section .text.EXI4_Int_Enable:
+
+00001da0 <EXI4_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI4_INT);    
+    1da0:	3380      	movi      	r3, 128
+    1da2:	4370      	lsli      	r3, r3, 16
+    1da4:	1042      	lrw      	r2, 0xe000e100	// 1dac <EXI4_Int_Enable+0xc>
+    1da6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    1da8:	783c      	jmp      	r15
+    1daa:	0000      	bkpt
+    1dac:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+00001db0 <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    1db0:	3202      	movi      	r2, 2
+    1db2:	1062      	lrw      	r3, 0xe000e100	// 1db8 <SYSCON_Int_Enable+0x8>
+    1db4:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1db6:	783c      	jmp      	r15
+    1db8:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_Int_Disable:
+
+00001dbc <SYSCON_Int_Disable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Disable(void)
+{
+    INTC_ICER_WRITE(SYSCON_INT);    
+    1dbc:	3202      	movi      	r2, 2
+    1dbe:	1062      	lrw      	r3, 0xe000e180	// 1dc4 <SYSCON_Int_Disable+0x8>
+    1dc0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1dc2:	783c      	jmp      	r15
+    1dc4:	e000e180 	.long	0xe000e180
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+00001dc8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1dc8:	1066      	lrw      	r3, 0xe000e400	// 1de0 <SYSCON_INT_Priority+0x18>
+    1dca:	1047      	lrw      	r2, 0xc0c0c0c0	// 1de4 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1dcc:	1027      	lrw      	r1, 0xc0c000c0	// 1de8 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1dce:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    1dd0:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    1dd2:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    1dd4:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    1dd6:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    1dd8:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1dda:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    1ddc:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    1dde:	783c      	jmp      	r15
+    1de0:	e000e400 	.long	0xe000e400
+    1de4:	c0c0c0c0 	.long	0xc0c0c0c0
+    1de8:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+00001dec <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    1dec:	14c1      	push      	r4
+    1dee:	4862      	lsri      	r3, r0, 2
+    1df0:	4342      	lsli      	r2, r3, 2
+    1df2:	106a      	lrw      	r3, 0x20000064	// 1e18 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    1df4:	3403      	movi      	r4, 3
+    1df6:	9360      	ld.w      	r3, (r3, 0x0)
+    1df8:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1dfa:	3280      	movi      	r2, 128
+    1dfc:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    1dfe:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1e00:	60c8      	addu      	r3, r2
+    1e02:	4003      	lsli      	r0, r0, 3
+    1e04:	34ff      	movi      	r4, 255
+    1e06:	9340      	ld.w      	r2, (r3, 0x0)
+    1e08:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1e0a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1e0c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1e0e:	7040      	lsl      	r1, r0
+    1e10:	6c48      	or      	r1, r2
+    1e12:	b320      	st.w      	r1, (r3, 0x0)
+}
+    1e14:	1481      	pop      	r4
+    1e16:	0000      	bkpt
+    1e18:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+00001e1c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    1e1c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    1e1e:	3907      	cmphsi      	r1, 8
+{
+    1e20:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    1e22:	0830      	bt      	0x1e82	// 1e82 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    1e24:	5903      	subi      	r0, r1, 1
+    1e26:	3806      	cmphsi      	r0, 7
+    1e28:	0827      	bt      	0x1e76	// 1e76 <GPIO_Init+0x5a>
+    1e2a:	e3fff775 	bsr      	0xd14	// d14 <___gnu_csky_case_uqi>
+    1e2e:	1004      	.short	0x1004
+    1e30:	1d1a1613 	.long	0x1d1a1613
+    1e34:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e36:	3300      	movi      	r3, 0
+    1e38:	3104      	movi      	r1, 4
+    1e3a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    1e3c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1e3e:	9440      	ld.w      	r2, (r4, 0x0)
+    1e40:	68c8      	and      	r3, r2
+        if (Dir)
+    1e42:	0c1e      	bf      	0x1e7e	// 1e7e <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1e44:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1e46:	7084      	lsl      	r2, r1
+    1e48:	6cc8      	or      	r3, r2
+    1e4a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    1e4c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e4e:	3108      	movi      	r1, 8
+    1e50:	1166      	lrw      	r3, 0xfffff0ff	// 1ee8 <GPIO_Init+0xcc>
+    1e52:	07f5      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e54:	310c      	movi      	r1, 12
+    1e56:	1166      	lrw      	r3, 0xffff0fff	// 1eec <GPIO_Init+0xd0>
+    1e58:	07f2      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e5a:	3110      	movi      	r1, 16
+    1e5c:	1165      	lrw      	r3, 0xfff10000	// 1ef0 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e5e:	2b00      	subi      	r3, 1
+    1e60:	07ee      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e62:	3114      	movi      	r1, 20
+    1e64:	1164      	lrw      	r3, 0xff100000	// 1ef4 <GPIO_Init+0xd8>
+    1e66:	07fc      	br      	0x1e5e	// 1e5e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e68:	33f1      	movi      	r3, 241
+    1e6a:	3118      	movi      	r1, 24
+    1e6c:	4378      	lsli      	r3, r3, 24
+    1e6e:	07f8      	br      	0x1e5e	// 1e5e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e70:	311c      	movi      	r1, 28
+    1e72:	1162      	lrw      	r3, 0xfffffff	// 1ef8 <GPIO_Init+0xdc>
+    1e74:	07e4      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e76:	3300      	movi      	r3, 0
+    1e78:	3100      	movi      	r1, 0
+    1e7a:	2b0f      	subi      	r3, 16
+    1e7c:	07e0      	br      	0x1e3c	// 1e3c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1e7e:	3202      	movi      	r2, 2
+    1e80:	07e3      	br      	0x1e46	// 1e46 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    1e82:	390f      	cmphsi      	r1, 16
+    1e84:	0be4      	bt      	0x1e4c	// 1e4c <GPIO_Init+0x30>
+        switch (PinNum)
+    1e86:	2908      	subi      	r1, 9
+    1e88:	3906      	cmphsi      	r1, 7
+    1e8a:	6c07      	mov      	r0, r1
+    1e8c:	0827      	bt      	0x1eda	// 1eda <GPIO_Init+0xbe>
+    1e8e:	e3fff743 	bsr      	0xd14	// d14 <___gnu_csky_case_uqi>
+    1e92:	1004      	.short	0x1004
+    1e94:	1d1a1613 	.long	0x1d1a1613
+    1e98:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e9a:	3300      	movi      	r3, 0
+    1e9c:	3104      	movi      	r1, 4
+    1e9e:	2bf0      	subi      	r3, 241
+      if (Dir)
+    1ea0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1ea2:	9441      	ld.w      	r2, (r4, 0x4)
+    1ea4:	68c8      	and      	r3, r2
+      if (Dir)
+    1ea6:	0c1e      	bf      	0x1ee2	// 1ee2 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1ea8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1eaa:	7084      	lsl      	r2, r1
+    1eac:	6cc8      	or      	r3, r2
+    1eae:	b461      	st.w      	r3, (r4, 0x4)
+}
+    1eb0:	07ce      	br      	0x1e4c	// 1e4c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1eb2:	3108      	movi      	r1, 8
+    1eb4:	106d      	lrw      	r3, 0xfffff0ff	// 1ee8 <GPIO_Init+0xcc>
+    1eb6:	07f5      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1eb8:	310c      	movi      	r1, 12
+    1eba:	106d      	lrw      	r3, 0xffff0fff	// 1eec <GPIO_Init+0xd0>
+    1ebc:	07f2      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1ebe:	3110      	movi      	r1, 16
+    1ec0:	106c      	lrw      	r3, 0xfff10000	// 1ef0 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1ec2:	2b00      	subi      	r3, 1
+    1ec4:	07ee      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1ec6:	3114      	movi      	r1, 20
+    1ec8:	106b      	lrw      	r3, 0xff100000	// 1ef4 <GPIO_Init+0xd8>
+    1eca:	07fc      	br      	0x1ec2	// 1ec2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1ecc:	33f1      	movi      	r3, 241
+    1ece:	3118      	movi      	r1, 24
+    1ed0:	4378      	lsli      	r3, r3, 24
+    1ed2:	07f8      	br      	0x1ec2	// 1ec2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1ed4:	311c      	movi      	r1, 28
+    1ed6:	1069      	lrw      	r3, 0xfffffff	// 1ef8 <GPIO_Init+0xdc>
+    1ed8:	07e4      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1eda:	3300      	movi      	r3, 0
+    1edc:	3100      	movi      	r1, 0
+    1ede:	2b0f      	subi      	r3, 16
+    1ee0:	07e0      	br      	0x1ea0	// 1ea0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1ee2:	3202      	movi      	r2, 2
+    1ee4:	07e3      	br      	0x1eaa	// 1eaa <GPIO_Init+0x8e>
+    1ee6:	0000      	bkpt
+    1ee8:	fffff0ff 	.long	0xfffff0ff
+    1eec:	ffff0fff 	.long	0xffff0fff
+    1ef0:	fff10000 	.long	0xfff10000
+    1ef4:	ff100000 	.long	0xff100000
+    1ef8:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+00001efc <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    1efc:	4121      	lsli      	r1, r1, 1
+    1efe:	3203      	movi      	r2, 3
+    1f00:	9068      	ld.w      	r3, (r0, 0x20)
+    1f02:	7084      	lsl      	r2, r1
+    1f04:	68c9      	andn      	r3, r2
+    1f06:	3201      	movi      	r2, 1
+    1f08:	7084      	lsl      	r2, r1
+    1f0a:	6cc8      	or      	r3, r2
+    1f0c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    1f0e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00001f10 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    1f10:	4121      	lsli      	r1, r1, 1
+    1f12:	3301      	movi      	r3, 1
+    1f14:	9049      	ld.w      	r2, (r0, 0x24)
+    1f16:	70c4      	lsl      	r3, r1
+    1f18:	6cc8      	or      	r3, r2
+    1f1a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    1f1c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_IntGroup_Set:
+
+00001f20 <GPIO_IntGroup_Set>:
+//EXI16~EXI17:GPIOA0.0~GPIOA0.7
+//EXI18~EXI19:GPIOB0.0~GPIOB0.3
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_IntGroup_Set(GPIO_Group_TypeDef IO_MODE , uint8_t PinNum , GPIO_EXIPIN_TypeDef Selete_EXI_x)
+{
+    1f20:	14c1      	push      	r4
+    1f22:	1422      	subi      	r14, r14, 8
+	volatile unsigned int  R_data_temp;
+    volatile unsigned char R_GPIO_Pin;
+	if(Selete_EXI_x<16)
+    1f24:	3a0f      	cmphsi      	r2, 16
+    1f26:	084f      	bt      	0x1fc4	// 1fc4 <GPIO_IntGroup_Set+0xa4>
+	{
+		if((Selete_EXI_x==0)||(Selete_EXI_x==8))
+    1f28:	6ccb      	mov      	r3, r2
+    1f2a:	3b83      	bclri      	r3, 3
+    1f2c:	3b40      	cmpnei      	r3, 0
+    1f2e:	0813      	bt      	0x1f54	// 1f54 <GPIO_IntGroup_Set+0x34>
+		{
+			R_data_temp=0xfffffff0;
+    1f30:	2b0f      	subi      	r3, 16
+    1f32:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=0;
+    1f34:	3300      	movi      	r3, 0
+		else if((Selete_EXI_x==7)||(Selete_EXI_x==15))
+		{
+			R_data_temp=0x0fffffff;
+			R_GPIO_Pin=28;
+		}
+		if(Selete_EXI_x<8)
+    1f36:	3a07      	cmphsi      	r2, 8
+			R_GPIO_Pin=28;
+    1f38:	dc6e0003 	st.b      	r3, (r14, 0x3)
+    1f3c:	1176      	lrw      	r3, 0x20000044	// 2014 <GPIO_IntGroup_Set+0xf4>
+		if(Selete_EXI_x<8)
+    1f3e:	0c38      	bf      	0x1fae	// 1fae <GPIO_IntGroup_Set+0x8e>
+		{
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+		}
+		else if((Selete_EXI_x<16)&&(Selete_EXI_x>=8))
+		{
+			GPIOGRP->IGRPH =(GPIOGRP->IGRPH & R_data_temp) | (IO_MODE<<R_GPIO_Pin);    
+    1f40:	9340      	ld.w      	r2, (r3, 0x0)
+    1f42:	9261      	ld.w      	r3, (r2, 0x4)
+    1f44:	9881      	ld.w      	r4, (r14, 0x4)
+    1f46:	d82e0003 	ld.b      	r1, (r14, 0x3)
+    1f4a:	68d0      	and      	r3, r4
+    1f4c:	7004      	lsl      	r0, r1
+    1f4e:	6c0c      	or      	r0, r3
+    1f50:	b201      	st.w      	r0, (r2, 0x4)
+    1f52:	0437      	br      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+		else if((Selete_EXI_x==1)||(Selete_EXI_x==9))
+    1f54:	3b41      	cmpnei      	r3, 1
+    1f56:	0806      	bt      	0x1f62	// 1f62 <GPIO_IntGroup_Set+0x42>
+			R_data_temp=0xffffff0f;
+    1f58:	3300      	movi      	r3, 0
+    1f5a:	2bf0      	subi      	r3, 241
+    1f5c:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=4;
+    1f5e:	3304      	movi      	r3, 4
+    1f60:	07eb      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==2)||(Selete_EXI_x==10))
+    1f62:	3b42      	cmpnei      	r3, 2
+    1f64:	0805      	bt      	0x1f6e	// 1f6e <GPIO_IntGroup_Set+0x4e>
+			R_data_temp=0xfffff0ff;
+    1f66:	116d      	lrw      	r3, 0xfffff0ff	// 2018 <GPIO_IntGroup_Set+0xf8>
+    1f68:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=8;
+    1f6a:	3308      	movi      	r3, 8
+    1f6c:	07e5      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==3)||(Selete_EXI_x==11))
+    1f6e:	3b43      	cmpnei      	r3, 3
+    1f70:	0805      	bt      	0x1f7a	// 1f7a <GPIO_IntGroup_Set+0x5a>
+			R_data_temp=0xffff0fff;
+    1f72:	116b      	lrw      	r3, 0xffff0fff	// 201c <GPIO_IntGroup_Set+0xfc>
+    1f74:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=12;
+    1f76:	330c      	movi      	r3, 12
+    1f78:	07df      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==4)||(Selete_EXI_x==12))
+    1f7a:	3b44      	cmpnei      	r3, 4
+    1f7c:	0806      	bt      	0x1f88	// 1f88 <GPIO_IntGroup_Set+0x68>
+			R_data_temp=0xfff0ffff;
+    1f7e:	1169      	lrw      	r3, 0xfff10000	// 2020 <GPIO_IntGroup_Set+0x100>
+    1f80:	2b00      	subi      	r3, 1
+    1f82:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=16;
+    1f84:	3310      	movi      	r3, 16
+    1f86:	07d8      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==5)||(Selete_EXI_x==13))
+    1f88:	3b45      	cmpnei      	r3, 5
+    1f8a:	0806      	bt      	0x1f96	// 1f96 <GPIO_IntGroup_Set+0x76>
+			R_data_temp=0xff0fffff;
+    1f8c:	1166      	lrw      	r3, 0xff100000	// 2024 <GPIO_IntGroup_Set+0x104>
+    1f8e:	2b00      	subi      	r3, 1
+    1f90:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=20;
+    1f92:	3314      	movi      	r3, 20
+    1f94:	07d1      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==6)||(Selete_EXI_x==14))
+    1f96:	3b46      	cmpnei      	r3, 6
+    1f98:	0807      	bt      	0x1fa6	// 1fa6 <GPIO_IntGroup_Set+0x86>
+			R_data_temp=0xf0ffffff;
+    1f9a:	33f1      	movi      	r3, 241
+    1f9c:	4378      	lsli      	r3, r3, 24
+    1f9e:	2b00      	subi      	r3, 1
+    1fa0:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=24;
+    1fa2:	3318      	movi      	r3, 24
+    1fa4:	07c9      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+			R_data_temp=0x0fffffff;
+    1fa6:	1161      	lrw      	r3, 0xfffffff	// 2028 <GPIO_IntGroup_Set+0x108>
+    1fa8:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=28;
+    1faa:	331c      	movi      	r3, 28
+    1fac:	07c5      	br      	0x1f36	// 1f36 <GPIO_IntGroup_Set+0x16>
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+    1fae:	9340      	ld.w      	r2, (r3, 0x0)
+    1fb0:	9260      	ld.w      	r3, (r2, 0x0)
+    1fb2:	9881      	ld.w      	r4, (r14, 0x4)
+    1fb4:	d82e0003 	ld.b      	r1, (r14, 0x3)
+    1fb8:	68d0      	and      	r3, r4
+    1fba:	7004      	lsl      	r0, r1
+    1fbc:	6c0c      	or      	r0, r3
+    1fbe:	b200      	st.w      	r0, (r2, 0x0)
+			{
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+			}
+		}
+	}
+}
+    1fc0:	1402      	addi      	r14, r14, 8
+    1fc2:	1481      	pop      	r4
+	else if(Selete_EXI_x<20)
+    1fc4:	3a13      	cmphsi      	r2, 20
+    1fc6:	0bfd      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+		if((IO_MODE==0)&&((Selete_EXI_x==16)||((Selete_EXI_x==17))))						//PA0.0~PA0.7
+    1fc8:	3840      	cmpnei      	r0, 0
+    1fca:	0814      	bt      	0x1ff2	// 1ff2 <GPIO_IntGroup_Set+0xd2>
+    1fcc:	3300      	movi      	r3, 0
+    1fce:	2b0f      	subi      	r3, 16
+    1fd0:	60c8      	addu      	r3, r2
+    1fd2:	3b01      	cmphsi      	r3, 2
+    1fd4:	0bf6      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+			if(Selete_EXI_x==16)
+    1fd6:	3a50      	cmpnei      	r2, 16
+    1fd8:	106f      	lrw      	r3, 0x20000044	// 2014 <GPIO_IntGroup_Set+0xf4>
+    1fda:	0806      	bt      	0x1fe6	// 1fe6 <GPIO_IntGroup_Set+0xc6>
+				GPIOGRP->IGREX =(GPIOGRP->IGREX)|PinNum;
+    1fdc:	9340      	ld.w      	r2, (r3, 0x0)
+    1fde:	9262      	ld.w      	r3, (r2, 0x8)
+    1fe0:	6c4c      	or      	r1, r3
+    1fe2:	b222      	st.w      	r1, (r2, 0x8)
+    1fe4:	07ee      	br      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<4);
+    1fe6:	9360      	ld.w      	r3, (r3, 0x0)
+    1fe8:	9342      	ld.w      	r2, (r3, 0x8)
+    1fea:	4124      	lsli      	r1, r1, 4
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+    1fec:	6c48      	or      	r1, r2
+    1fee:	b322      	st.w      	r1, (r3, 0x8)
+}
+    1ff0:	07e8      	br      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+		else if((IO_MODE==2)&&((Selete_EXI_x==18)||(Selete_EXI_x==19)))					//PB0.0~PB0.3
+    1ff2:	3842      	cmpnei      	r0, 2
+    1ff4:	0be6      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+    1ff6:	3300      	movi      	r3, 0
+    1ff8:	2b11      	subi      	r3, 18
+    1ffa:	60c8      	addu      	r3, r2
+    1ffc:	3b01      	cmphsi      	r3, 2
+    1ffe:	0be1      	bt      	0x1fc0	// 1fc0 <GPIO_IntGroup_Set+0xa0>
+    2000:	1065      	lrw      	r3, 0x20000044	// 2014 <GPIO_IntGroup_Set+0xf4>
+			if(Selete_EXI_x==18)
+    2002:	3a52      	cmpnei      	r2, 18
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+    2004:	9360      	ld.w      	r3, (r3, 0x0)
+    2006:	9342      	ld.w      	r2, (r3, 0x8)
+			if(Selete_EXI_x==18)
+    2008:	0803      	bt      	0x200e	// 200e <GPIO_IntGroup_Set+0xee>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+    200a:	4128      	lsli      	r1, r1, 8
+    200c:	07f0      	br      	0x1fec	// 1fec <GPIO_IntGroup_Set+0xcc>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+    200e:	412c      	lsli      	r1, r1, 12
+    2010:	07ee      	br      	0x1fec	// 1fec <GPIO_IntGroup_Set+0xcc>
+    2012:	0000      	bkpt
+    2014:	20000044 	.long	0x20000044
+    2018:	fffff0ff 	.long	0xfffff0ff
+    201c:	ffff0fff 	.long	0xffff0fff
+    2020:	fff10000 	.long	0xfff10000
+    2024:	ff100000 	.long	0xff100000
+    2028:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIOA0_EXI_Init:
+
+0000202c <GPIOA0_EXI_Init>:
+//IO EXI SET 
+//EntryParameter:EXI_IO(EXI0~EXI13)
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIOA0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
+{
+    202c:	14d0      	push      	r15
+    switch (EXI_IO)
+    202e:	380f      	cmphsi      	r0, 16
+    2030:	0812      	bt      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+    2032:	117d      	lrw      	r3, 0x2000004c	// 2124 <GPIOA0_EXI_Init+0xf8>
+    2034:	e3fff670 	bsr      	0xd14	// d14 <___gnu_csky_case_uqi>
+    2038:	1d150f08 	.long	0x1d150f08
+    203c:	39322b24 	.long	0x39322b24
+    2040:	544c463f 	.long	0x544c463f
+    2044:	7069625b 	.long	0x7069625b
+    {
+        case 0:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0) | 0X00000001;break;
+    2048:	9340      	ld.w      	r2, (r3, 0x0)
+    204a:	9260      	ld.w      	r3, (r2, 0x0)
+    204c:	310f      	movi      	r1, 15
+    204e:	68c5      	andn      	r3, r1
+    2050:	3ba0      	bseti      	r3, 0
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+    2052:	b260      	st.w      	r3, (r2, 0x0)
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    }
+}
+    2054:	1490      	pop      	r15
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+    2056:	9340      	ld.w      	r2, (r3, 0x0)
+    2058:	9260      	ld.w      	r3, (r2, 0x0)
+    205a:	31f0      	movi      	r1, 240
+    205c:	68c5      	andn      	r3, r1
+    205e:	3ba4      	bseti      	r3, 4
+    2060:	07f9      	br      	0x2052	// 2052 <GPIOA0_EXI_Init+0x26>
+        case 2:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000100;break;
+    2062:	9320      	ld.w      	r1, (r3, 0x0)
+    2064:	32f0      	movi      	r2, 240
+    2066:	9160      	ld.w      	r3, (r1, 0x0)
+    2068:	4244      	lsli      	r2, r2, 4
+    206a:	68c9      	andn      	r3, r2
+    206c:	3ba8      	bseti      	r3, 8
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+    206e:	b160      	st.w      	r3, (r1, 0x0)
+    2070:	07f2      	br      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+        case 3:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF) | 0X00001000;break;
+    2072:	9320      	ld.w      	r1, (r3, 0x0)
+    2074:	32f0      	movi      	r2, 240
+    2076:	9160      	ld.w      	r3, (r1, 0x0)
+    2078:	4248      	lsli      	r2, r2, 8
+    207a:	68c9      	andn      	r3, r2
+    207c:	3bac      	bseti      	r3, 12
+    207e:	07f8      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 4:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF) | 0X00010000;break;
+    2080:	9320      	ld.w      	r1, (r3, 0x0)
+    2082:	32f0      	movi      	r2, 240
+    2084:	9160      	ld.w      	r3, (r1, 0x0)
+    2086:	424c      	lsli      	r2, r2, 12
+    2088:	68c9      	andn      	r3, r2
+    208a:	3bb0      	bseti      	r3, 16
+    208c:	07f1      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 5:GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF) | 0X00100000;break;
+    208e:	9320      	ld.w      	r1, (r3, 0x0)
+    2090:	32f0      	movi      	r2, 240
+    2092:	9160      	ld.w      	r3, (r1, 0x0)
+    2094:	4250      	lsli      	r2, r2, 16
+    2096:	68c9      	andn      	r3, r2
+    2098:	3bb4      	bseti      	r3, 20
+    209a:	07ea      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+    209c:	9320      	ld.w      	r1, (r3, 0x0)
+    209e:	32f0      	movi      	r2, 240
+    20a0:	9160      	ld.w      	r3, (r1, 0x0)
+    20a2:	4254      	lsli      	r2, r2, 20
+    20a4:	68c9      	andn      	r3, r2
+    20a6:	3bb8      	bseti      	r3, 24
+    20a8:	07e3      	br      	0x206e	// 206e <GPIOA0_EXI_Init+0x42>
+        case 7:GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF) | 0X10000000;break;
+    20aa:	9340      	ld.w      	r2, (r3, 0x0)
+    20ac:	9260      	ld.w      	r3, (r2, 0x0)
+    20ae:	4364      	lsli      	r3, r3, 4
+    20b0:	4b64      	lsri      	r3, r3, 4
+    20b2:	3bbc      	bseti      	r3, 28
+    20b4:	07cf      	br      	0x2052	// 2052 <GPIOA0_EXI_Init+0x26>
+        case 8:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000001;break;
+    20b6:	9340      	ld.w      	r2, (r3, 0x0)
+    20b8:	9261      	ld.w      	r3, (r2, 0x4)
+    20ba:	310f      	movi      	r1, 15
+    20bc:	68c5      	andn      	r3, r1
+    20be:	3ba0      	bseti      	r3, 0
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    20c0:	b261      	st.w      	r3, (r2, 0x4)
+}
+    20c2:	07c9      	br      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+        case 9:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F) | 0X00000010;break;
+    20c4:	9340      	ld.w      	r2, (r3, 0x0)
+    20c6:	9261      	ld.w      	r3, (r2, 0x4)
+    20c8:	31f0      	movi      	r1, 240
+    20ca:	68c5      	andn      	r3, r1
+    20cc:	3ba4      	bseti      	r3, 4
+    20ce:	07f9      	br      	0x20c0	// 20c0 <GPIOA0_EXI_Init+0x94>
+        case 10:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF) | 0X00000100;break;
+    20d0:	9320      	ld.w      	r1, (r3, 0x0)
+    20d2:	32f0      	movi      	r2, 240
+    20d4:	9161      	ld.w      	r3, (r1, 0x4)
+    20d6:	4244      	lsli      	r2, r2, 4
+    20d8:	68c9      	andn      	r3, r2
+    20da:	3ba8      	bseti      	r3, 8
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+    20dc:	b161      	st.w      	r3, (r1, 0x4)
+    20de:	07bb      	br      	0x2054	// 2054 <GPIOA0_EXI_Init+0x28>
+        case 11:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF) | 0X00001000;break;
+    20e0:	9320      	ld.w      	r1, (r3, 0x0)
+    20e2:	32f0      	movi      	r2, 240
+    20e4:	9161      	ld.w      	r3, (r1, 0x4)
+    20e6:	4248      	lsli      	r2, r2, 8
+    20e8:	68c9      	andn      	r3, r2
+    20ea:	3bac      	bseti      	r3, 12
+    20ec:	07f8      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+    20ee:	9320      	ld.w      	r1, (r3, 0x0)
+    20f0:	32f0      	movi      	r2, 240
+    20f2:	9161      	ld.w      	r3, (r1, 0x4)
+    20f4:	424c      	lsli      	r2, r2, 12
+    20f6:	68c9      	andn      	r3, r2
+    20f8:	3bb0      	bseti      	r3, 16
+    20fa:	07f1      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+    20fc:	9320      	ld.w      	r1, (r3, 0x0)
+    20fe:	32f0      	movi      	r2, 240
+    2100:	9161      	ld.w      	r3, (r1, 0x4)
+    2102:	4250      	lsli      	r2, r2, 16
+    2104:	68c9      	andn      	r3, r2
+    2106:	3bb4      	bseti      	r3, 20
+    2108:	07ea      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+    210a:	9320      	ld.w      	r1, (r3, 0x0)
+    210c:	32f0      	movi      	r2, 240
+    210e:	9161      	ld.w      	r3, (r1, 0x4)
+    2110:	4254      	lsli      	r2, r2, 20
+    2112:	68c9      	andn      	r3, r2
+    2114:	3bb8      	bseti      	r3, 24
+    2116:	07e3      	br      	0x20dc	// 20dc <GPIOA0_EXI_Init+0xb0>
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    2118:	9340      	ld.w      	r2, (r3, 0x0)
+    211a:	9261      	ld.w      	r3, (r2, 0x4)
+    211c:	4364      	lsli      	r3, r3, 4
+    211e:	4b64      	lsri      	r3, r3, 4
+    2120:	3bbc      	bseti      	r3, 28
+    2122:	07cf      	br      	0x20c0	// 20c0 <GPIOA0_EXI_Init+0x94>
+    2124:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPIO_Write_High:
+
+00002128 <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    2128:	3301      	movi      	r3, 1
+    212a:	70c4      	lsl      	r3, r1
+    212c:	b063      	st.w      	r3, (r0, 0xc)
+}
+    212e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00002130 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    2130:	3301      	movi      	r3, 1
+    2132:	70c4      	lsl      	r3, r1
+    2134:	b064      	st.w      	r3, (r0, 0x10)
+}
+    2136:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+00002138 <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    2138:	9045      	ld.w      	r2, (r0, 0x14)
+    213a:	3301      	movi      	r3, 1
+    213c:	7085      	lsr      	r2, r1
+    213e:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    2140:	3a40      	cmpnei      	r2, 0
+    2142:	70c4      	lsl      	r3, r1
+    2144:	0c03      	bf      	0x214a	// 214a <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    2146:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    2148:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    214a:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    214c:	07fe      	br      	0x2148	// 2148 <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+0000214e <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    214e:	3301      	movi      	r3, 1
+    2150:	9046      	ld.w      	r2, (r0, 0x18)
+    2152:	70c4      	lsl      	r3, r1
+    2154:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    2156:	64ca      	cmpne      	r2, r3
+    2158:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    215a:	7400      	zextb      	r0, r0
+}
+    215c:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00002160 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    2160:	1064      	lrw      	r3, 0x20000014	// 2170 <LPT_Soft_Reset+0x10>
+    2162:	9340      	ld.w      	r2, (r3, 0x0)
+    2164:	9261      	ld.w      	r3, (r2, 0x4)
+    2166:	3bac      	bseti      	r3, 12
+    2168:	3bae      	bseti      	r3, 14
+    216a:	b261      	st.w      	r3, (r2, 0x4)
+}
+    216c:	783c      	jmp      	r15
+    216e:	0000      	bkpt
+    2170:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+00002174 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    2174:	1063      	lrw      	r3, 0x20000010	// 2180 <WWDT_CNT_Load+0xc>
+    2176:	9360      	ld.w      	r3, (r3, 0x0)
+    2178:	9340      	ld.w      	r2, (r3, 0x0)
+    217a:	6c08      	or      	r0, r2
+    217c:	b300      	st.w      	r0, (r3, 0x0)
+}
+    217e:	783c      	jmp      	r15
+    2180:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+00002184 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    2184:	3300      	movi      	r3, 0
+    2186:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    2188:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    218a:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    218c:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    218e:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    2190:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    2192:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    2194:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    2196:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    2198:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    219a:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    219c:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    219e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000021a0 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    21a0:	9060      	ld.w      	r3, (r0, 0x0)
+    21a2:	3ba0      	bseti      	r3, 0
+    21a4:	b060      	st.w      	r3, (r0, 0x0)
+}
+    21a6:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000021a8 <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    21a8:	9060      	ld.w      	r3, (r0, 0x0)
+    21aa:	3bac      	bseti      	r3, 12
+    21ac:	3bae      	bseti      	r3, 14
+    21ae:	b060      	st.w      	r3, (r0, 0x0)
+}
+    21b0:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000021b2 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    21b2:	14c3      	push      	r4-r6
+    21b4:	98a4      	ld.w      	r5, (r14, 0x10)
+    21b6:	6d97      	mov      	r6, r5
+    21b8:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    21ba:	6d18      	or      	r4, r6
+    21bc:	6cd0      	or      	r3, r4
+    21be:	90a1      	ld.w      	r5, (r0, 0x4)
+    21c0:	6c4c      	or      	r1, r3
+    21c2:	6c54      	or      	r1, r5
+    21c4:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    21c6:	b042      	st.w      	r2, (r0, 0x8)
+}
+    21c8:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000021ca <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    21ca:	14c4      	push      	r4-r7
+    21cc:	1421      	subi      	r14, r14, 4
+    21ce:	9885      	ld.w      	r4, (r14, 0x14)
+    21d0:	6dd3      	mov      	r7, r4
+    21d2:	9886      	ld.w      	r4, (r14, 0x18)
+    21d4:	b880      	st.w      	r4, (r14, 0x0)
+    21d6:	9887      	ld.w      	r4, (r14, 0x1c)
+    21d8:	6d93      	mov      	r6, r4
+    21da:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    21dc:	6d58      	or      	r5, r6
+    21de:	98c0      	ld.w      	r6, (r14, 0x0)
+    21e0:	6d58      	or      	r5, r6
+    21e2:	6d5c      	or      	r5, r7
+    21e4:	6cd4      	or      	r3, r5
+    21e6:	6c8c      	or      	r2, r3
+    21e8:	9081      	ld.w      	r4, (r0, 0x4)
+    21ea:	6c48      	or      	r1, r2
+    21ec:	6d04      	or      	r4, r1
+    21ee:	6d9f      	mov      	r6, r7
+    21f0:	b081      	st.w      	r4, (r0, 0x4)
+}
+    21f2:	1401      	addi      	r14, r14, 4
+    21f4:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+000021f6 <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    21f6:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    21f8:	b044      	st.w      	r2, (r0, 0x10)
+}
+    21fa:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+000021fc <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    21fc:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    21fe:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    2200:	0c04      	bf      	0x2208	// 2208 <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    2202:	6c8c      	or      	r2, r3
+    2204:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    2206:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    2208:	68c9      	andn      	r3, r2
+    220a:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    220c:	07fd      	br      	0x2206	// 2206 <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00002210 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    2210:	3380      	movi      	r3, 128
+    2212:	4376      	lsli      	r3, r3, 22
+    2214:	1042      	lrw      	r2, 0xe000e100	// 221c <BT1_INT_ENABLE+0xc>
+    2216:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2218:	783c      	jmp      	r15
+    221a:	0000      	bkpt
+    221c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00002220 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    2220:	3840      	cmpnei      	r0, 0
+    2222:	080a      	bt      	0x2236	// 2236 <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    2224:	1165      	lrw      	r3, 0x20000048	// 22b8 <GPT_IO_Init+0x98>
+    2226:	31f0      	movi      	r1, 240
+    2228:	9340      	ld.w      	r2, (r3, 0x0)
+    222a:	9260      	ld.w      	r3, (r2, 0x0)
+    222c:	68c5      	andn      	r3, r1
+    222e:	3ba4      	bseti      	r3, 4
+    2230:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    2232:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    2234:	040b      	br      	0x224a	// 224a <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    2236:	3841      	cmpnei      	r0, 1
+    2238:	080a      	bt      	0x224c	// 224c <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    223a:	1161      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    223c:	31f0      	movi      	r1, 240
+    223e:	9340      	ld.w      	r2, (r3, 0x0)
+    2240:	9261      	ld.w      	r3, (r2, 0x4)
+    2242:	68c5      	andn      	r3, r1
+    2244:	3ba4      	bseti      	r3, 4
+    2246:	3ba6      	bseti      	r3, 6
+    2248:	b261      	st.w      	r3, (r2, 0x4)
+}
+    224a:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    224c:	3842      	cmpnei      	r0, 2
+    224e:	080b      	bt      	0x2264	// 2264 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    2250:	107b      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    2252:	32f0      	movi      	r2, 240
+    2254:	9320      	ld.w      	r1, (r3, 0x0)
+    2256:	9161      	ld.w      	r3, (r1, 0x4)
+    2258:	4244      	lsli      	r2, r2, 4
+    225a:	68c9      	andn      	r3, r2
+    225c:	3ba9      	bseti      	r3, 9
+    225e:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    2260:	b161      	st.w      	r3, (r1, 0x4)
+    2262:	07f4      	br      	0x224a	// 224a <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    2264:	3843      	cmpnei      	r0, 3
+    2266:	080b      	bt      	0x227c	// 227c <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    2268:	1075      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    226a:	32f0      	movi      	r2, 240
+    226c:	9320      	ld.w      	r1, (r3, 0x0)
+    226e:	4244      	lsli      	r2, r2, 4
+    2270:	9161      	ld.w      	r3, (r1, 0x4)
+    2272:	68c9      	andn      	r3, r2
+    2274:	32e0      	movi      	r2, 224
+    2276:	4243      	lsli      	r2, r2, 3
+    2278:	6cc8      	or      	r3, r2
+    227a:	07f3      	br      	0x2260	// 2260 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    227c:	3844      	cmpnei      	r0, 4
+    227e:	080a      	bt      	0x2292	// 2292 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    2280:	106f      	lrw      	r3, 0x2000004c	// 22bc <GPT_IO_Init+0x9c>
+    2282:	32f0      	movi      	r2, 240
+    2284:	9320      	ld.w      	r1, (r3, 0x0)
+    2286:	9161      	ld.w      	r3, (r1, 0x4)
+    2288:	4248      	lsli      	r2, r2, 8
+    228a:	68c9      	andn      	r3, r2
+    228c:	3bad      	bseti      	r3, 13
+    228e:	3bae      	bseti      	r3, 14
+    2290:	07e8      	br      	0x2260	// 2260 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    2292:	3845      	cmpnei      	r0, 5
+    2294:	0808      	bt      	0x22a4	// 22a4 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    2296:	1069      	lrw      	r3, 0x20000048	// 22b8 <GPT_IO_Init+0x98>
+    2298:	310f      	movi      	r1, 15
+    229a:	9340      	ld.w      	r2, (r3, 0x0)
+    229c:	9260      	ld.w      	r3, (r2, 0x0)
+    229e:	68c5      	andn      	r3, r1
+    22a0:	3ba2      	bseti      	r3, 2
+    22a2:	07c8      	br      	0x2232	// 2232 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    22a4:	3846      	cmpnei      	r0, 6
+    22a6:	0bd2      	bt      	0x224a	// 224a <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    22a8:	1064      	lrw      	r3, 0x20000048	// 22b8 <GPT_IO_Init+0x98>
+    22aa:	31f0      	movi      	r1, 240
+    22ac:	9340      	ld.w      	r2, (r3, 0x0)
+    22ae:	9260      	ld.w      	r3, (r2, 0x0)
+    22b0:	68c5      	andn      	r3, r1
+    22b2:	3ba5      	bseti      	r3, 5
+    22b4:	3ba6      	bseti      	r3, 6
+    22b6:	07be      	br      	0x2232	// 2232 <GPT_IO_Init+0x12>
+    22b8:	20000048 	.long	0x20000048
+    22bc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000022c0 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    22c0:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    22c2:	6c48      	or      	r1, r2
+    22c4:	1083      	lrw      	r4, 0x20000024	// 22d0 <GPT_Configure+0x10>
+    22c6:	6c04      	or      	r0, r1
+    22c8:	9480      	ld.w      	r4, (r4, 0x0)
+    22ca:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    22cc:	b462      	st.w      	r3, (r4, 0x8)
+}
+    22ce:	1481      	pop      	r4
+    22d0:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+000022d4 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    22d4:	14c4      	push      	r4-r7
+    22d6:	1423      	subi      	r14, r14, 12
+    22d8:	9887      	ld.w      	r4, (r14, 0x1c)
+    22da:	6dd3      	mov      	r7, r4
+    22dc:	9888      	ld.w      	r4, (r14, 0x20)
+    22de:	b880      	st.w      	r4, (r14, 0x0)
+    22e0:	9889      	ld.w      	r4, (r14, 0x24)
+    22e2:	b881      	st.w      	r4, (r14, 0x4)
+    22e4:	988a      	ld.w      	r4, (r14, 0x28)
+    22e6:	b882      	st.w      	r4, (r14, 0x8)
+    22e8:	988b      	ld.w      	r4, (r14, 0x2c)
+    22ea:	6d93      	mov      	r6, r4
+    22ec:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    22ee:	3cb2      	bseti      	r4, 18
+    22f0:	6d18      	or      	r4, r6
+    22f2:	98c2      	ld.w      	r6, (r14, 0x8)
+    22f4:	6d18      	or      	r4, r6
+    22f6:	98c1      	ld.w      	r6, (r14, 0x4)
+    22f8:	6d18      	or      	r4, r6
+    22fa:	98c0      	ld.w      	r6, (r14, 0x0)
+    22fc:	6d18      	or      	r4, r6
+    22fe:	6d1c      	or      	r4, r7
+    2300:	6cd0      	or      	r3, r4
+    2302:	6c8c      	or      	r2, r3
+    2304:	6c48      	or      	r1, r2
+    2306:	10a4      	lrw      	r5, 0x20000024	// 2314 <GPT_WaveCtrl_Configure+0x40>
+    2308:	6c04      	or      	r0, r1
+    230a:	95a0      	ld.w      	r5, (r5, 0x0)
+    230c:	6d9f      	mov      	r6, r7
+    230e:	b503      	st.w      	r0, (r5, 0xc)
+}
+    2310:	1403      	addi      	r14, r14, 12
+    2312:	1484      	pop      	r4-r7
+    2314:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+00002318 <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    2318:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    231a:	6c8c      	or      	r2, r3
+    231c:	6c48      	or      	r1, r2
+    231e:	1083      	lrw      	r4, 0x20000024	// 2328 <GPT_WaveLoad_Configure+0x10>
+    2320:	6c04      	or      	r0, r1
+    2322:	9480      	ld.w      	r4, (r4, 0x0)
+    2324:	b411      	st.w      	r0, (r4, 0x44)
+}
+    2326:	1481      	pop      	r4
+    2328:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+0000232c <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    232c:	14c4      	push      	r4-r7
+    232e:	1425      	subi      	r14, r14, 20
+    2330:	1c09      	addi      	r4, r14, 36
+    2332:	8480      	ld.b      	r4, (r4, 0x0)
+    2334:	b880      	st.w      	r4, (r14, 0x0)
+    2336:	1c0a      	addi      	r4, r14, 40
+    2338:	8480      	ld.b      	r4, (r4, 0x0)
+    233a:	b881      	st.w      	r4, (r14, 0x4)
+    233c:	1c0b      	addi      	r4, r14, 44
+    233e:	8480      	ld.b      	r4, (r4, 0x0)
+    2340:	b882      	st.w      	r4, (r14, 0x8)
+    2342:	1c0c      	addi      	r4, r14, 48
+    2344:	8480      	ld.b      	r4, (r4, 0x0)
+    2346:	b883      	st.w      	r4, (r14, 0xc)
+    2348:	1c0d      	addi      	r4, r14, 52
+    234a:	8480      	ld.b      	r4, (r4, 0x0)
+    234c:	1e10      	addi      	r6, r14, 64
+    234e:	b884      	st.w      	r4, (r14, 0x10)
+    2350:	1d0f      	addi      	r5, r14, 60
+    2352:	1c0e      	addi      	r4, r14, 56
+    2354:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    2356:	3840      	cmpnei      	r0, 0
+{
+    2358:	1e11      	addi      	r6, r14, 68
+    235a:	8480      	ld.b      	r4, (r4, 0x0)
+    235c:	85a0      	ld.b      	r5, (r5, 0x0)
+    235e:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    2360:	081f      	bt      	0x239e	// 239e <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    2362:	47f0      	lsli      	r7, r7, 16
+    2364:	46d2      	lsli      	r6, r6, 18
+    2366:	45ae      	lsli      	r5, r5, 14
+    2368:	6dd8      	or      	r7, r6
+    236a:	6dd4      	or      	r7, r5
+    236c:	448c      	lsli      	r4, r4, 12
+    236e:	6dd0      	or      	r7, r4
+    2370:	9884      	ld.w      	r4, (r14, 0x10)
+    2372:	448a      	lsli      	r4, r4, 10
+    2374:	6dd0      	or      	r7, r4
+    2376:	9883      	ld.w      	r4, (r14, 0xc)
+    2378:	4488      	lsli      	r4, r4, 8
+    237a:	98a2      	ld.w      	r5, (r14, 0x8)
+    237c:	6d1c      	or      	r4, r7
+    237e:	45e6      	lsli      	r7, r5, 6
+    2380:	6d1c      	or      	r4, r7
+    2382:	6c90      	or      	r2, r4
+    2384:	6cc8      	or      	r3, r2
+    2386:	9841      	ld.w      	r2, (r14, 0x4)
+    2388:	4244      	lsli      	r2, r2, 4
+    238a:	6cc8      	or      	r3, r2
+    238c:	6c4c      	or      	r1, r3
+    238e:	9860      	ld.w      	r3, (r14, 0x0)
+    2390:	4362      	lsli      	r3, r3, 2
+    2392:	1013      	lrw      	r0, 0x20000024	// 23dc <GPT_WaveOut_Configure+0xb0>
+    2394:	6c4c      	or      	r1, r3
+    2396:	9000      	ld.w      	r0, (r0, 0x0)
+    2398:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    239a:	1405      	addi      	r14, r14, 20
+    239c:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    239e:	3841      	cmpnei      	r0, 1
+    23a0:	0bfd      	bt      	0x239a	// 239a <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    23a2:	47f0      	lsli      	r7, r7, 16
+    23a4:	46d2      	lsli      	r6, r6, 18
+    23a6:	45ae      	lsli      	r5, r5, 14
+    23a8:	6dd8      	or      	r7, r6
+    23aa:	6dd4      	or      	r7, r5
+    23ac:	448c      	lsli      	r4, r4, 12
+    23ae:	6dd0      	or      	r7, r4
+    23b0:	9884      	ld.w      	r4, (r14, 0x10)
+    23b2:	448a      	lsli      	r4, r4, 10
+    23b4:	6dd0      	or      	r7, r4
+    23b6:	9883      	ld.w      	r4, (r14, 0xc)
+    23b8:	4488      	lsli      	r4, r4, 8
+    23ba:	98a2      	ld.w      	r5, (r14, 0x8)
+    23bc:	6d1c      	or      	r4, r7
+    23be:	45e6      	lsli      	r7, r5, 6
+    23c0:	6d1c      	or      	r4, r7
+    23c2:	6c90      	or      	r2, r4
+    23c4:	6cc8      	or      	r3, r2
+    23c6:	9841      	ld.w      	r2, (r14, 0x4)
+    23c8:	4244      	lsli      	r2, r2, 4
+    23ca:	6cc8      	or      	r3, r2
+    23cc:	6c4c      	or      	r1, r3
+    23ce:	9860      	ld.w      	r3, (r14, 0x0)
+    23d0:	4362      	lsli      	r3, r3, 2
+    23d2:	1003      	lrw      	r0, 0x20000024	// 23dc <GPT_WaveOut_Configure+0xb0>
+    23d4:	6c4c      	or      	r1, r3
+    23d6:	9000      	ld.w      	r0, (r0, 0x0)
+    23d8:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    23da:	07e0      	br      	0x239a	// 239a <GPT_WaveOut_Configure+0x6e>
+    23dc:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+000023e0 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    23e0:	1063      	lrw      	r3, 0x20000024	// 23ec <GPT_Start+0xc>
+    23e2:	9340      	ld.w      	r2, (r3, 0x0)
+    23e4:	9261      	ld.w      	r3, (r2, 0x4)
+    23e6:	3ba0      	bseti      	r3, 0
+    23e8:	b261      	st.w      	r3, (r2, 0x4)
+}
+    23ea:	783c      	jmp      	r15
+    23ec:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+000023f0 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    23f0:	1063      	lrw      	r3, 0x20000024	// 23fc <GPT_Period_CMP_Write+0xc>
+    23f2:	9360      	ld.w      	r3, (r3, 0x0)
+    23f4:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    23f6:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    23f8:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    23fa:	783c      	jmp      	r15
+    23fc:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00002400 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    2400:	1066      	lrw      	r3, 0x20000024	// 2418 <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    2402:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    2404:	9360      	ld.w      	r3, (r3, 0x0)
+    2406:	237f      	addi      	r3, 128
+    2408:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    240a:	0c04      	bf      	0x2412	// 2412 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    240c:	6c48      	or      	r1, r2
+    240e:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    2410:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    2412:	6885      	andn      	r2, r1
+    2414:	b356      	st.w      	r2, (r3, 0x58)
+}
+    2416:	07fd      	br      	0x2410	// 2410 <GPT_ConfigInterrupt_CMD+0x10>
+    2418:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+0000241c <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    241c:	1065      	lrw      	r3, 0x20000040	// 2430 <UART0_DeInit+0x14>
+    241e:	3200      	movi      	r2, 0
+    2420:	9360      	ld.w      	r3, (r3, 0x0)
+    2422:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    2424:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    2426:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    2428:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    242a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    242c:	783c      	jmp      	r15
+    242e:	0000      	bkpt
+    2430:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00002434 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    2434:	1065      	lrw      	r3, 0x2000003c	// 2448 <UART1_DeInit+0x14>
+    2436:	3200      	movi      	r2, 0
+    2438:	9360      	ld.w      	r3, (r3, 0x0)
+    243a:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    243c:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    243e:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    2440:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    2442:	b344      	st.w      	r2, (r3, 0x10)
+}
+    2444:	783c      	jmp      	r15
+    2446:	0000      	bkpt
+    2448:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+0000244c <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    244c:	1065      	lrw      	r3, 0x20000038	// 2460 <UART2_DeInit+0x14>
+    244e:	3200      	movi      	r2, 0
+    2450:	9360      	ld.w      	r3, (r3, 0x0)
+    2452:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    2454:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    2456:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    2458:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    245a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    245c:	783c      	jmp      	r15
+    245e:	0000      	bkpt
+    2460:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART1_Int_Enable:
+
+00002464 <UART1_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_Int_Enable(void)
+{
+    UART1->ISR=0x0F;									//clear UART1 INT status
+    2464:	1065      	lrw      	r3, 0x2000003c	// 2478 <UART1_Int_Enable+0x14>
+    2466:	320f      	movi      	r2, 15
+    2468:	9360      	ld.w      	r3, (r3, 0x0)
+    246a:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART1_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    246c:	3380      	movi      	r3, 128
+    246e:	4367      	lsli      	r3, r3, 7
+    2470:	1043      	lrw      	r2, 0xe000e100	// 247c <UART1_Int_Enable+0x18>
+    2472:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2474:	783c      	jmp      	r15
+    2476:	0000      	bkpt
+    2478:	2000003c 	.long	0x2000003c
+    247c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+00002480 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    2480:	1065      	lrw      	r3, 0x20000038	// 2494 <UART2_Int_Enable+0x14>
+    2482:	320f      	movi      	r2, 15
+    2484:	9360      	ld.w      	r3, (r3, 0x0)
+    2486:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    2488:	3380      	movi      	r3, 128
+    248a:	4368      	lsli      	r3, r3, 8
+    248c:	1043      	lrw      	r2, 0xe000e100	// 2498 <UART2_Int_Enable+0x18>
+    248e:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2490:	783c      	jmp      	r15
+    2492:	0000      	bkpt
+    2494:	20000038 	.long	0x20000038
+    2498:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+0000249c <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    249c:	3840      	cmpnei      	r0, 0
+    249e:	0821      	bt      	0x24e0	// 24e0 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    24a0:	3940      	cmpnei      	r1, 0
+    24a2:	080a      	bt      	0x24b6	// 24b6 <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    24a4:	1177      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    24a6:	31ff      	movi      	r1, 255
+    24a8:	9340      	ld.w      	r2, (r3, 0x0)
+    24aa:	9260      	ld.w      	r3, (r2, 0x0)
+    24ac:	68c5      	andn      	r3, r1
+    24ae:	3ba2      	bseti      	r3, 2
+    24b0:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    24b2:	b260      	st.w      	r3, (r2, 0x0)
+    24b4:	0415      	br      	0x24de	// 24de <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    24b6:	3941      	cmpnei      	r1, 1
+    24b8:	0813      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    24ba:	1172      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    24bc:	31f0      	movi      	r1, 240
+    24be:	9340      	ld.w      	r2, (r3, 0x0)
+    24c0:	9260      	ld.w      	r3, (r2, 0x0)
+    24c2:	4130      	lsli      	r1, r1, 16
+    24c4:	68c5      	andn      	r3, r1
+    24c6:	31e0      	movi      	r1, 224
+    24c8:	412f      	lsli      	r1, r1, 15
+    24ca:	6cc4      	or      	r3, r1
+    24cc:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    24ce:	31f0      	movi      	r1, 240
+    24d0:	9261      	ld.w      	r3, (r2, 0x4)
+    24d2:	412c      	lsli      	r1, r1, 12
+    24d4:	68c5      	andn      	r3, r1
+    24d6:	31e0      	movi      	r1, 224
+    24d8:	412b      	lsli      	r1, r1, 11
+    24da:	6cc4      	or      	r3, r1
+    24dc:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    24de:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    24e0:	3841      	cmpnei      	r0, 1
+    24e2:	082d      	bt      	0x253c	// 253c <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    24e4:	3940      	cmpnei      	r1, 0
+    24e6:	0814      	bt      	0x250e	// 250e <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    24e8:	1167      	lrw      	r3, 0x20000048	// 2584 <UART_IO_Init+0xe8>
+    24ea:	310f      	movi      	r1, 15
+    24ec:	9340      	ld.w      	r2, (r3, 0x0)
+    24ee:	9260      	ld.w      	r3, (r2, 0x0)
+    24f0:	68c5      	andn      	r3, r1
+    24f2:	3107      	movi      	r1, 7
+    24f4:	6cc4      	or      	r3, r1
+    24f6:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    24f8:	32f0      	movi      	r2, 240
+    24fa:	1162      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    24fc:	4250      	lsli      	r2, r2, 16
+    24fe:	9320      	ld.w      	r1, (r3, 0x0)
+    2500:	9161      	ld.w      	r3, (r1, 0x4)
+    2502:	68c9      	andn      	r3, r2
+    2504:	32e0      	movi      	r2, 224
+    2506:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    2508:	6cc8      	or      	r3, r2
+    250a:	b161      	st.w      	r3, (r1, 0x4)
+    250c:	07e9      	br      	0x24de	// 24de <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    250e:	3941      	cmpnei      	r1, 1
+    2510:	080c      	bt      	0x2528	// 2528 <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    2512:	107c      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    2514:	32ff      	movi      	r2, 255
+    2516:	9320      	ld.w      	r1, (r3, 0x0)
+    2518:	424c      	lsli      	r2, r2, 12
+    251a:	9160      	ld.w      	r3, (r1, 0x0)
+    251c:	68c9      	andn      	r3, r2
+    251e:	32ee      	movi      	r2, 238
+    2520:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    2522:	6cc8      	or      	r3, r2
+    2524:	b160      	st.w      	r3, (r1, 0x0)
+}
+    2526:	07dc      	br      	0x24de	// 24de <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    2528:	3942      	cmpnei      	r1, 2
+    252a:	0bda      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    252c:	1075      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    252e:	32ee      	movi      	r2, 238
+    2530:	9320      	ld.w      	r1, (r3, 0x0)
+    2532:	9161      	ld.w      	r3, (r1, 0x4)
+    2534:	4368      	lsli      	r3, r3, 8
+    2536:	4b68      	lsri      	r3, r3, 8
+    2538:	4257      	lsli      	r2, r2, 23
+    253a:	07e7      	br      	0x2508	// 2508 <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    253c:	3842      	cmpnei      	r0, 2
+    253e:	0bd0      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    2540:	3940      	cmpnei      	r1, 0
+    2542:	0809      	bt      	0x2554	// 2554 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    2544:	106f      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    2546:	31ff      	movi      	r1, 255
+    2548:	9340      	ld.w      	r2, (r3, 0x0)
+    254a:	9260      	ld.w      	r3, (r2, 0x0)
+    254c:	68c5      	andn      	r3, r1
+    254e:	3177      	movi      	r1, 119
+    2550:	6cc4      	or      	r3, r1
+    2552:	07b0      	br      	0x24b2	// 24b2 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    2554:	3941      	cmpnei      	r1, 1
+    2556:	0809      	bt      	0x2568	// 2568 <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    2558:	106a      	lrw      	r3, 0x2000004c	// 2580 <UART_IO_Init+0xe4>
+    255a:	32ee      	movi      	r2, 238
+    255c:	9320      	ld.w      	r1, (r3, 0x0)
+    255e:	9160      	ld.w      	r3, (r1, 0x0)
+    2560:	4368      	lsli      	r3, r3, 8
+    2562:	4b68      	lsri      	r3, r3, 8
+    2564:	4257      	lsli      	r2, r2, 23
+    2566:	07de      	br      	0x2522	// 2522 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    2568:	3942      	cmpnei      	r1, 2
+    256a:	0bba      	bt      	0x24de	// 24de <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    256c:	1066      	lrw      	r3, 0x20000048	// 2584 <UART_IO_Init+0xe8>
+    256e:	32ff      	movi      	r2, 255
+    2570:	9320      	ld.w      	r1, (r3, 0x0)
+    2572:	4250      	lsli      	r2, r2, 16
+    2574:	9160      	ld.w      	r3, (r1, 0x0)
+    2576:	68c9      	andn      	r3, r2
+    2578:	32cc      	movi      	r2, 204
+    257a:	424f      	lsli      	r2, r2, 15
+    257c:	07d3      	br      	0x2522	// 2522 <UART_IO_Init+0x86>
+    257e:	0000      	bkpt
+    2580:	2000004c 	.long	0x2000004c
+    2584:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+00002588 <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    2588:	1063      	lrw      	r3, 0x8000f	// 2594 <UARTInitRxTxIntEn+0xc>
+    258a:	6c8c      	or      	r2, r3
+    258c:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    258e:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2590:	783c      	jmp      	r15
+    2592:	0000      	bkpt
+    2594:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+00002598 <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    2598:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    259a:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    259c:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    259e:	5b85      	subu      	r4, r3, r1
+    25a0:	6490      	cmphs      	r4, r2
+    25a2:	0c02      	bf      	0x25a6	// 25a6 <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    25a4:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    25a6:	8380      	ld.b      	r4, (r3, 0x0)
+    25a8:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    25aa:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    25ac:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    25ae:	3c40      	cmpnei      	r4, 0
+    25b0:	0bfd      	bt      	0x25aa	// 25aa <UARTTransmit+0x12>
+    25b2:	2300      	addi      	r3, 1
+    25b4:	07f5      	br      	0x259e	// 259e <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000025b8 <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    25b8:	1068      	lrw      	r3, 0x20000020	// 25d8 <EPT_Stop+0x20>
+    25ba:	3280      	movi      	r2, 128
+    25bc:	9360      	ld.w      	r3, (r3, 0x0)
+    25be:	608c      	addu      	r2, r3
+    25c0:	1027      	lrw      	r1, 0xa55ac73a	// 25dc <EPT_Stop+0x24>
+    25c2:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    25c4:	9341      	ld.w      	r2, (r3, 0x4)
+    25c6:	31fe      	movi      	r1, 254
+    25c8:	6884      	and      	r2, r1
+    25ca:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    25cc:	3101      	movi      	r1, 1
+    25ce:	9341      	ld.w      	r2, (r3, 0x4)
+    25d0:	6884      	and      	r2, r1
+    25d2:	3a40      	cmpnei      	r2, 0
+    25d4:	0bfd      	bt      	0x25ce	// 25ce <EPT_Stop+0x16>
+}
+    25d6:	783c      	jmp      	r15
+    25d8:	20000020 	.long	0x20000020
+    25dc:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.Page_ProgramData:
+
+000025e0 <Page_ProgramData>:
+		IFC->CR=0X01;					//Start Program
+	}
+}
+//Normal mode, when the call is completed once, it will delay 4.2ms in the program
+void Page_ProgramData(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry)
+{
+    25e0:	14c4      	push      	r4-r7
+    25e2:	1422      	subi      	r14, r14, 8
+	int i,DataBuffer;
+
+	//Page cache wipe 1
+	SetUserKey;
+    25e4:	1165      	lrw      	r3, 0x20000060	// 2678 <Page_ProgramData+0x98>
+    25e6:	1186      	lrw      	r4, 0x5a5a5a5a	// 267c <Page_ProgramData+0x9c>
+    25e8:	9360      	ld.w      	r3, (r3, 0x0)
+    25ea:	b388      	st.w      	r4, (r3, 0x20)
+	IFC->CMR=0x07;					
+    25ec:	3407      	movi      	r4, 7
+    25ee:	b383      	st.w      	r4, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+    25f0:	3401      	movi      	r4, 1
+	IFC->FM_ADDR=FlashAdd;
+    25f2:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    25f4:	b384      	st.w      	r4, (r3, 0x10)
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+    25f6:	9384      	ld.w      	r4, (r3, 0x10)
+    25f8:	3c40      	cmpnei      	r4, 0
+    25fa:	0bfe      	bt      	0x25f6	// 25f6 <Page_ProgramData+0x16>
+	//Write data to the cache 2
+	for(i=0;i<((DataSize+3)/4);i++)   //sizeof structure
+    25fc:	2102      	addi      	r1, 3
+    25fe:	4922      	lsri      	r1, r1, 2
+    2600:	4122      	lsli      	r1, r1, 2
+    2602:	6048      	addu      	r1, r2
+    2604:	b820      	st.w      	r1, (r14, 0x0)
+    2606:	5829      	subu      	r1, r0, r2
+    2608:	b821      	st.w      	r1, (r14, 0x4)
+    260a:	9820      	ld.w      	r1, (r14, 0x0)
+    260c:	644a      	cmpne      	r2, r1
+    260e:	0826      	bt      	0x265a	// 265a <Page_ProgramData+0x7a>
+		*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
+		BufArry  +=4;
+	}
+	//Pre-programmed operation settings 3
+	SetUserKey;
+	IFC->CMR=0x06;					
+    2610:	3106      	movi      	r1, 6
+	SetUserKey;
+    2612:	105b      	lrw      	r2, 0x5a5a5a5a	// 267c <Page_ProgramData+0x9c>
+    2614:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x06;					
+    2616:	b323      	st.w      	r1, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;
+	IFC->CR=0X01;					//Start Program
+    2618:	3101      	movi      	r1, 1
+	IFC->FM_ADDR=FlashAdd;
+    261a:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    261c:	b324      	st.w      	r1, (r3, 0x10)
+	while(IFC->CR!=0x0);			//Wait for the operation to complete
+    261e:	9324      	ld.w      	r1, (r3, 0x10)
+    2620:	3940      	cmpnei      	r1, 0
+    2622:	0bfe      	bt      	0x261e	// 261e <Page_ProgramData+0x3e>
+	//Perform pre-programming 4
+	SetUserKey;
+    2624:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x01;					
+    2626:	3201      	movi      	r2, 1
+    2628:	b343      	st.w      	r2, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;			//
+    262a:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    262c:	b344      	st.w      	r2, (r3, 0x10)
+	while(IFC->RISR!=PEP_END_INT);			//Wait for the operation to complete
+    262e:	934a      	ld.w      	r2, (r3, 0x28)
+    2630:	3a44      	cmpnei      	r2, 4
+    2632:	0bfe      	bt      	0x262e	// 262e <Page_ProgramData+0x4e>
+	//Page erase 5
+	SetUserKey;
+	IFC->CMR=0x02;					
+    2634:	3102      	movi      	r1, 2
+	SetUserKey;
+    2636:	1052      	lrw      	r2, 0x5a5a5a5a	// 267c <Page_ProgramData+0x9c>
+    2638:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x02;					
+    263a:	b323      	st.w      	r1, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;			//
+	IFC->CR=0X01;					//Start Program
+    263c:	3101      	movi      	r1, 1
+	IFC->FM_ADDR=FlashAdd;			//
+    263e:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    2640:	b324      	st.w      	r1, (r3, 0x10)
+	while(IFC->RISR!=ERS_END_INT);			//Wait for the operation to complete
+    2642:	932a      	ld.w      	r1, (r3, 0x28)
+    2644:	3941      	cmpnei      	r1, 1
+    2646:	0bfe      	bt      	0x2642	// 2642 <Page_ProgramData+0x62>
+	//Write page cache data to flash memory 6
+	SetUserKey;
+    2648:	b348      	st.w      	r2, (r3, 0x20)
+	IFC->CMR=0x01;					
+    264a:	b323      	st.w      	r1, (r3, 0xc)
+	IFC->FM_ADDR=FlashAdd;		//
+    264c:	b306      	st.w      	r0, (r3, 0x18)
+	IFC->CR=0X01;					//Start Program
+    264e:	b324      	st.w      	r1, (r3, 0x10)
+	while(IFC->RISR!=RGM_END_INT);			//Wait for the operation to complete
+    2650:	934a      	ld.w      	r2, (r3, 0x28)
+    2652:	3a42      	cmpnei      	r2, 2
+    2654:	0bfe      	bt      	0x2650	// 2650 <Page_ProgramData+0x70>
+}
+    2656:	1402      	addi      	r14, r14, 8
+    2658:	1484      	pop      	r4-r7
+		DataBuffer=*BufArry+(*(BufArry+1)<<8)+(*(BufArry+2)<<16)+(*(BufArry+3)<<24);
+    265a:	82e0      	ld.b      	r7, (r2, 0x0)
+    265c:	8281      	ld.b      	r4, (r2, 0x1)
+    265e:	4488      	lsli      	r4, r4, 8
+    2660:	8222      	ld.b      	r1, (r2, 0x2)
+    2662:	611c      	addu      	r4, r7
+    2664:	82a3      	ld.b      	r5, (r2, 0x3)
+    2666:	4130      	lsli      	r1, r1, 16
+    2668:	98c1      	ld.w      	r6, (r14, 0x4)
+    266a:	6050      	addu      	r1, r4
+    266c:	45b8      	lsli      	r5, r5, 24
+    266e:	6188      	addu      	r6, r2
+    2670:	6054      	addu      	r1, r5
+		*(volatile unsigned int *)(FlashAdd+4*i)=DataBuffer;
+    2672:	b620      	st.w      	r1, (r6, 0x0)
+		BufArry  +=4;
+    2674:	2203      	addi      	r2, 4
+    2676:	07ca      	br      	0x260a	// 260a <Page_ProgramData+0x2a>
+    2678:	20000060 	.long	0x20000060
+    267c:	5a5a5a5a 	.long	0x5a5a5a5a
+
+Disassembly of section .text.ReadDataArry_U8:
+
+00002680 <ReadDataArry_U8>:
+//ReadFlashData fuction return Data arry save in Flash
+//EntryParameter:RdStartAdd、DataLength、*DataArryPoint
+//ReturnValue:NONE
+*************************************************************/
+void ReadDataArry_U8(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint)
+{
+    2680:	14c3      	push      	r4-r6
+	unsigned int i;
+	for (i=0;i<DataLength;i++)
+    2682:	3300      	movi      	r3, 0
+	{
+		if((i!=0)&&(i%4==0))
+    2684:	3503      	movi      	r5, 3
+	for (i=0;i<DataLength;i++)
+    2686:	644e      	cmpne      	r3, r1
+    2688:	5acc      	addu      	r6, r2, r3
+    268a:	0802      	bt      	0x268e	// 268e <ReadDataArry_U8+0xe>
+			RdStartAdd +=4;
+		}	
+		*DataArryPoint=*(U8_T *)(RdStartAdd+ (i%4));
+		DataArryPoint++;
+	}
+}
+    268c:	1483      	pop      	r4-r6
+		if((i!=0)&&(i%4==0))
+    268e:	3b40      	cmpnei      	r3, 0
+    2690:	0c06      	bf      	0x269c	// 269c <ReadDataArry_U8+0x1c>
+    2692:	6d0f      	mov      	r4, r3
+    2694:	6914      	and      	r4, r5
+    2696:	3c40      	cmpnei      	r4, 0
+    2698:	0802      	bt      	0x269c	// 269c <ReadDataArry_U8+0x1c>
+			RdStartAdd +=4;
+    269a:	2003      	addi      	r0, 4
+		*DataArryPoint=*(U8_T *)(RdStartAdd+ (i%4));
+    269c:	6d0f      	mov      	r4, r3
+    269e:	6914      	and      	r4, r5
+    26a0:	6100      	addu      	r4, r0
+    26a2:	8480      	ld.b      	r4, (r4, 0x0)
+    26a4:	a680      	st.b      	r4, (r6, 0x0)
+	for (i=0;i<DataLength;i++)
+    26a6:	2300      	addi      	r3, 1
+    26a8:	07ef      	br      	0x2686	// 2686 <ReadDataArry_U8+0x6>
+
+Disassembly of section .text.startup.main:
+
+000026ac <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    26ac:	14d0      	push      	r15
+//	delay_nms(2000);
+	APT32F102_init();							//102 initial
+    26ae:	e000009f 	bsr      	0x27ec	// 27ec <APT32F102_init>
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    26b2:	1029      	lrw      	r1, 0x4db4	// 26d4 <main+0x28>
+    26b4:	3000      	movi      	r0, 0
+    26b6:	e00007df 	bsr      	0x3674	// 3674 <Dbg_Println>
+
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    26ba:	e3fffaf5 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+
+		UART1_TASK();
+    26be:	e000067d 	bsr      	0x33b8	// 33b8 <UART1_TASK>
+		
+		DIP_ScanTask();
+    26c2:	e0000843 	bsr      	0x3748	// 3748 <DIP_ScanTask>
+		
+		BLV_RLY_Task();
+    26c6:	e0000993 	bsr      	0x39ec	// 39ec <BLV_RLY_Task>
+		
+		CTRL_LEDStatus_Task();
+    26ca:	e0000c03 	bsr      	0x3ed0	// 3ed0 <CTRL_LEDStatus_Task>
+		
+		BUS485Send_Task();
+    26ce:	e0000775 	bsr      	0x35b8	// 35b8 <BUS485Send_Task>
+    26d2:	07f4      	br      	0x26ba	// 26ba <main+0xe>
+    26d4:	00004db4 	.long	0x00004db4
+
+Disassembly of section .text.delay_nms:
+
+000026d8 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    26d8:	14d0      	push      	r15
+    26da:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    26dc:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    26de:	3300      	movi      	r3, 0
+    j = 50* t;
+    26e0:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    26e2:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    26e4:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    26e6:	b860      	st.w      	r3, (r14, 0x0)
+    26e8:	9840      	ld.w      	r2, (r14, 0x0)
+    26ea:	9861      	ld.w      	r3, (r14, 0x4)
+    26ec:	64c8      	cmphs      	r2, r3
+    26ee:	0c03      	bf      	0x26f4	// 26f4 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    26f0:	1403      	addi      	r14, r14, 12
+    26f2:	1490      	pop      	r15
+        k++;
+    26f4:	9862      	ld.w      	r3, (r14, 0x8)
+    26f6:	2300      	addi      	r3, 1
+    26f8:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    26fa:	e3fffad5 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    26fe:	9860      	ld.w      	r3, (r14, 0x0)
+    2700:	2300      	addi      	r3, 1
+    2702:	07f2      	br      	0x26e6	// 26e6 <delay_nms+0xe>
+
+Disassembly of section .text.delay_nus:
+
+00002704 <delay_nus>:
+void delay_nus(unsigned int t)
+{
+    2704:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    2706:	3300      	movi      	r3, 0
+    2708:	b862      	st.w      	r3, (r14, 0x8)
+    j = 1* t;
+    270a:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    270c:	b860      	st.w      	r3, (r14, 0x0)
+    270e:	9840      	ld.w      	r2, (r14, 0x0)
+    2710:	9861      	ld.w      	r3, (r14, 0x4)
+    2712:	64c8      	cmphs      	r2, r3
+    2714:	0c03      	bf      	0x271a	// 271a <delay_nus+0x16>
+    {
+        k++;
+    }
+}
+    2716:	1403      	addi      	r14, r14, 12
+    2718:	783c      	jmp      	r15
+        k++;
+    271a:	9862      	ld.w      	r3, (r14, 0x8)
+    271c:	2300      	addi      	r3, 1
+    271e:	b862      	st.w      	r3, (r14, 0x8)
+    for ( i = 0; i < j; i++ )
+    2720:	9860      	ld.w      	r3, (r14, 0x0)
+    2722:	2300      	addi      	r3, 1
+    2724:	07f4      	br      	0x270c	// 270c <delay_nus+0x8>
+
+Disassembly of section .text.BT_CONFIG:
+
+00002728 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    2728:	14d2      	push      	r4-r5, r15
+    272a:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    272c:	1095      	lrw      	r4, 0x20000008	// 2780 <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    272e:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    2730:	9400      	ld.w      	r0, (r4, 0x0)
+    2732:	e3fffd29 	bsr      	0x2184	// 2184 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    2736:	9400      	ld.w      	r0, (r4, 0x0)
+    2738:	b8a1      	st.w      	r5, (r14, 0x4)
+    273a:	b8a0      	st.w      	r5, (r14, 0x0)
+    273c:	3308      	movi      	r3, 8
+    273e:	3200      	movi      	r2, 0
+    2740:	3101      	movi      	r1, 1
+    2742:	e3fffd38 	bsr      	0x21b2	// 21b2 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    2746:	3380      	movi      	r3, 128
+    2748:	4363      	lsli      	r3, r3, 3
+    274a:	b861      	st.w      	r3, (r14, 0x4)
+    274c:	9400      	ld.w      	r0, (r4, 0x0)
+    274e:	3300      	movi      	r3, 0
+    2750:	b8a3      	st.w      	r5, (r14, 0xc)
+    2752:	b8a2      	st.w      	r5, (r14, 0x8)
+    2754:	b8a0      	st.w      	r5, (r14, 0x0)
+    2756:	3200      	movi      	r2, 0
+    2758:	3180      	movi      	r1, 128
+    275a:	e3fffd38 	bsr      	0x21ca	// 21ca <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    275e:	3201      	movi      	r2, 1
+    2760:	1029      	lrw      	r1, 0x12ac	// 2784 <BT_CONFIG+0x5c>
+    2762:	9400      	ld.w      	r0, (r4, 0x0)
+    2764:	e3fffd49 	bsr      	0x21f6	// 21f6 <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    2768:	9400      	ld.w      	r0, (r4, 0x0)
+    276a:	e3fffd1b 	bsr      	0x21a0	// 21a0 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    276e:	9400      	ld.w      	r0, (r4, 0x0)
+    2770:	3202      	movi      	r2, 2
+    2772:	3101      	movi      	r1, 1
+    2774:	e3fffd44 	bsr      	0x21fc	// 21fc <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    2778:	e3fffd4c 	bsr      	0x2210	// 2210 <BT1_INT_ENABLE>
+	
+}
+    277c:	1404      	addi      	r14, r14, 16
+    277e:	1492      	pop      	r4-r5, r15
+    2780:	20000008 	.long	0x20000008
+    2784:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+00002788 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    2788:	14d0      	push      	r15
+    278a:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    278c:	e3fff9d8 	bsr      	0x1b3c	// 1b3c <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    2790:	3101      	movi      	r1, 1
+    2792:	3001      	movi      	r0, 1
+    2794:	e3fff9fa 	bsr      	0x1b88	// 1b88 <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    2798:	3000      	movi      	r0, 0
+    279a:	e3fffa53 	bsr      	0x1c40	// 1c40 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    279e:	3180      	movi      	r1, 128
+    27a0:	3308      	movi      	r3, 8
+    27a2:	3200      	movi      	r2, 0
+    27a4:	4121      	lsli      	r1, r1, 1
+    27a6:	3002      	movi      	r0, 2
+    27a8:	e3fffa08 	bsr      	0x1bb8	// 1bb8 <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    27ac:	3080      	movi      	r0, 128
+    27ae:	3118      	movi      	r1, 24
+    27b0:	4002      	lsli      	r0, r0, 2
+    27b2:	e3fffa83 	bsr      	0x1cb8	// 1cb8 <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    27b6:	3001      	movi      	r0, 1
+    27b8:	e3fffa58 	bsr      	0x1c68	// 1c68 <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    27bc:	e3fffa74 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    27c0:	e3fffaa6 	bsr      	0x1d0c	// 1d0c <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    27c4:	3340      	movi      	r3, 64
+    27c6:	b860      	st.w      	r3, (r14, 0x0)
+    27c8:	31c0      	movi      	r1, 192
+    27ca:	3380      	movi      	r3, 128
+    27cc:	4364      	lsli      	r3, r3, 4
+    27ce:	3200      	movi      	r2, 0
+    27d0:	4123      	lsli      	r1, r1, 3
+    27d2:	3000      	movi      	r0, 0
+    27d4:	e3fffa7e 	bsr      	0x1cd0	// 1cd0 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    27d8:	e3fffa8c 	bsr      	0x1cf0	// 1cf0 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    27dc:	e3fffaea 	bsr      	0x1db0	// 1db0 <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    27e0:	3000      	movi      	r0, 0
+    27e2:	e0001105 	bsr      	0x49ec	// 49ec <std_clk_calib>
+	
+}
+    27e6:	1401      	addi      	r14, r14, 4
+    27e8:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+000027ec <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    27ec:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    27ee:	1070      	lrw      	r3, 0x2000005c	// 282c <APT32F102_init+0x40>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    27f0:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    27f2:	9340      	ld.w      	r2, (r3, 0x0)
+    27f4:	106f      	lrw      	r3, 0xfffffff	// 2830 <APT32F102_init+0x44>
+    27f6:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    27f8:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    27fa:	926c      	ld.w      	r3, (r2, 0x30)
+    27fc:	68c4      	and      	r3, r1
+    27fe:	3b40      	cmpnei      	r3, 0
+    2800:	0ffd      	bf      	0x27fa	// 27fa <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    2802:	e3ffffc3 	bsr      	0x2788	// 2788 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    2806:	e0000507 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    280a:	e3fffadf 	bsr      	0x1dc8	// 1dc8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART1_IRQ,1);				//串口优先级最高
+    280e:	3101      	movi      	r1, 1
+    2810:	300e      	movi      	r0, 14
+    2812:	e3fffaed 	bsr      	0x1dec	// 1dec <Set_INT_Priority>
+
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	BT_CONFIG();			//BT initial
+    2816:	e3ffff89 	bsr      	0x2728	// 2728 <BT_CONFIG>
+	
+	UARTx_Init(UART_1,BLV_RLY_RS485_Pro);
+    281a:	1027      	lrw      	r1, 0x3dcc	// 2834 <APT32F102_init+0x48>
+    281c:	3001      	movi      	r0, 1
+    281e:	e0000501 	bsr      	0x3220	// 3220 <UARTx_Init>
+	
+	DIP_Switch_Init();
+    2822:	e000074b 	bsr      	0x36b8	// 36b8 <DIP_Switch_Init>
+	
+	Relay_Init();
+    2826:	e00007df 	bsr      	0x37e4	// 37e4 <Relay_Init>
+	
+}
+    282a:	1490      	pop      	r15
+    282c:	2000005c 	.long	0x2000005c
+    2830:	0fffffff 	.long	0x0fffffff
+    2834:	00003dcc 	.long	0x00003dcc
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00002838 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    2838:	1460      	nie
+    283a:	1462      	ipush
+    // ISR content ...
+	nop;
+    283c:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    283e:	117a      	lrw      	r3, 0x2000005c	// 2924 <SYSCONIntHandler+0xec>
+    2840:	3280      	movi      	r2, 128
+    2842:	9360      	ld.w      	r3, (r3, 0x0)
+    2844:	60c8      	addu      	r3, r2
+    2846:	9323      	ld.w      	r1, (r3, 0xc)
+    2848:	3001      	movi      	r0, 1
+    284a:	6840      	and      	r1, r0
+    284c:	3940      	cmpnei      	r1, 0
+    284e:	0c04      	bf      	0x2856	// 2856 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    2850:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    2852:	1463      	ipop
+    2854:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    2856:	9323      	ld.w      	r1, (r3, 0xc)
+    2858:	3002      	movi      	r0, 2
+    285a:	6840      	and      	r1, r0
+    285c:	3940      	cmpnei      	r1, 0
+    285e:	0bf9      	bt      	0x2850	// 2850 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    2860:	9323      	ld.w      	r1, (r3, 0xc)
+    2862:	3008      	movi      	r0, 8
+    2864:	6840      	and      	r1, r0
+    2866:	3940      	cmpnei      	r1, 0
+    2868:	0bf4      	bt      	0x2850	// 2850 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    286a:	9323      	ld.w      	r1, (r3, 0xc)
+    286c:	3010      	movi      	r0, 16
+    286e:	6840      	and      	r1, r0
+    2870:	3940      	cmpnei      	r1, 0
+    2872:	0bef      	bt      	0x2850	// 2850 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    2874:	9323      	ld.w      	r1, (r3, 0xc)
+    2876:	6848      	and      	r1, r2
+    2878:	3940      	cmpnei      	r1, 0
+    287a:	0c03      	bf      	0x2880	// 2880 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    287c:	b341      	st.w      	r2, (r3, 0x4)
+}
+    287e:	07ea      	br      	0x2852	// 2852 <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    2880:	3280      	movi      	r2, 128
+    2882:	9323      	ld.w      	r1, (r3, 0xc)
+    2884:	4241      	lsli      	r2, r2, 1
+    2886:	6848      	and      	r1, r2
+    2888:	3940      	cmpnei      	r1, 0
+    288a:	0bf9      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    288c:	3280      	movi      	r2, 128
+    288e:	9323      	ld.w      	r1, (r3, 0xc)
+    2890:	4242      	lsli      	r2, r2, 2
+    2892:	6848      	and      	r1, r2
+    2894:	3940      	cmpnei      	r1, 0
+    2896:	0bf3      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    2898:	3280      	movi      	r2, 128
+    289a:	9323      	ld.w      	r1, (r3, 0xc)
+    289c:	4243      	lsli      	r2, r2, 3
+    289e:	6848      	and      	r1, r2
+    28a0:	3940      	cmpnei      	r1, 0
+    28a2:	0bed      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    28a4:	3280      	movi      	r2, 128
+    28a6:	9323      	ld.w      	r1, (r3, 0xc)
+    28a8:	4244      	lsli      	r2, r2, 4
+    28aa:	6848      	and      	r1, r2
+    28ac:	3940      	cmpnei      	r1, 0
+    28ae:	0c03      	bf      	0x28b4	// 28b4 <SYSCONIntHandler+0x7c>
+		nop;
+    28b0:	6c03      	mov      	r0, r0
+    28b2:	07e5      	br      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    28b4:	3280      	movi      	r2, 128
+    28b6:	9323      	ld.w      	r1, (r3, 0xc)
+    28b8:	4245      	lsli      	r2, r2, 5
+    28ba:	6848      	and      	r1, r2
+    28bc:	3940      	cmpnei      	r1, 0
+    28be:	0bdf      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    28c0:	3280      	movi      	r2, 128
+    28c2:	9323      	ld.w      	r1, (r3, 0xc)
+    28c4:	4246      	lsli      	r2, r2, 6
+    28c6:	6848      	and      	r1, r2
+    28c8:	3940      	cmpnei      	r1, 0
+    28ca:	0bd9      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    28cc:	3280      	movi      	r2, 128
+    28ce:	9323      	ld.w      	r1, (r3, 0xc)
+    28d0:	4247      	lsli      	r2, r2, 7
+    28d2:	6848      	and      	r1, r2
+    28d4:	3940      	cmpnei      	r1, 0
+    28d6:	0bd3      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    28d8:	3280      	movi      	r2, 128
+    28da:	9323      	ld.w      	r1, (r3, 0xc)
+    28dc:	424b      	lsli      	r2, r2, 11
+    28de:	6848      	and      	r1, r2
+    28e0:	3940      	cmpnei      	r1, 0
+    28e2:	0bcd      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    28e4:	3280      	movi      	r2, 128
+    28e6:	9323      	ld.w      	r1, (r3, 0xc)
+    28e8:	424c      	lsli      	r2, r2, 12
+    28ea:	6848      	and      	r1, r2
+    28ec:	3940      	cmpnei      	r1, 0
+    28ee:	0bc7      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    28f0:	3280      	movi      	r2, 128
+    28f2:	9323      	ld.w      	r1, (r3, 0xc)
+    28f4:	424d      	lsli      	r2, r2, 13
+    28f6:	6848      	and      	r1, r2
+    28f8:	3940      	cmpnei      	r1, 0
+    28fa:	0bc1      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    28fc:	3280      	movi      	r2, 128
+    28fe:	9323      	ld.w      	r1, (r3, 0xc)
+    2900:	424e      	lsli      	r2, r2, 14
+    2902:	6848      	and      	r1, r2
+    2904:	3940      	cmpnei      	r1, 0
+    2906:	0bbb      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    2908:	3280      	movi      	r2, 128
+    290a:	9323      	ld.w      	r1, (r3, 0xc)
+    290c:	424f      	lsli      	r2, r2, 15
+    290e:	6848      	and      	r1, r2
+    2910:	3940      	cmpnei      	r1, 0
+    2912:	0bb5      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    2914:	3280      	movi      	r2, 128
+    2916:	9323      	ld.w      	r1, (r3, 0xc)
+    2918:	4256      	lsli      	r2, r2, 22
+    291a:	6848      	and      	r1, r2
+    291c:	3940      	cmpnei      	r1, 0
+    291e:	0baf      	bt      	0x287c	// 287c <SYSCONIntHandler+0x44>
+    2920:	0799      	br      	0x2852	// 2852 <SYSCONIntHandler+0x1a>
+    2922:	0000      	bkpt
+    2924:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00002928 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    2928:	1460      	nie
+    292a:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    292c:	1078      	lrw      	r3, 0x20000060	// 298c <IFCIntHandler+0x64>
+    292e:	3101      	movi      	r1, 1
+    2930:	9360      	ld.w      	r3, (r3, 0x0)
+    2932:	934b      	ld.w      	r2, (r3, 0x2c)
+    2934:	6884      	and      	r2, r1
+    2936:	3a40      	cmpnei      	r2, 0
+    2938:	0c04      	bf      	0x2940	// 2940 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    293a:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    293c:	1463      	ipop
+    293e:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    2940:	934b      	ld.w      	r2, (r3, 0x2c)
+    2942:	3102      	movi      	r1, 2
+    2944:	6884      	and      	r2, r1
+    2946:	3a40      	cmpnei      	r2, 0
+    2948:	0bf9      	bt      	0x293a	// 293a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    294a:	934b      	ld.w      	r2, (r3, 0x2c)
+    294c:	3104      	movi      	r1, 4
+    294e:	6884      	and      	r2, r1
+    2950:	3a40      	cmpnei      	r2, 0
+    2952:	0bf4      	bt      	0x293a	// 293a <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    2954:	3280      	movi      	r2, 128
+    2956:	932b      	ld.w      	r1, (r3, 0x2c)
+    2958:	4245      	lsli      	r2, r2, 5
+    295a:	6848      	and      	r1, r2
+    295c:	3940      	cmpnei      	r1, 0
+    295e:	0c03      	bf      	0x2964	// 2964 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    2960:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    2962:	07ed      	br      	0x293c	// 293c <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    2964:	3280      	movi      	r2, 128
+    2966:	932b      	ld.w      	r1, (r3, 0x2c)
+    2968:	4246      	lsli      	r2, r2, 6
+    296a:	6848      	and      	r1, r2
+    296c:	3940      	cmpnei      	r1, 0
+    296e:	0bf9      	bt      	0x2960	// 2960 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    2970:	3280      	movi      	r2, 128
+    2972:	932b      	ld.w      	r1, (r3, 0x2c)
+    2974:	4247      	lsli      	r2, r2, 7
+    2976:	6848      	and      	r1, r2
+    2978:	3940      	cmpnei      	r1, 0
+    297a:	0bf3      	bt      	0x2960	// 2960 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    297c:	3280      	movi      	r2, 128
+    297e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2980:	4248      	lsli      	r2, r2, 8
+    2982:	6848      	and      	r1, r2
+    2984:	3940      	cmpnei      	r1, 0
+    2986:	0bed      	bt      	0x2960	// 2960 <IFCIntHandler+0x38>
+    2988:	07da      	br      	0x293c	// 293c <IFCIntHandler+0x14>
+    298a:	0000      	bkpt
+    298c:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00002990 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    2990:	1460      	nie
+    2992:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    2994:	1078      	lrw      	r3, 0x20000050	// 29f4 <ADCIntHandler+0x64>
+    2996:	3101      	movi      	r1, 1
+    2998:	9360      	ld.w      	r3, (r3, 0x0)
+    299a:	9348      	ld.w      	r2, (r3, 0x20)
+    299c:	6884      	and      	r2, r1
+    299e:	3a40      	cmpnei      	r2, 0
+    29a0:	0c04      	bf      	0x29a8	// 29a8 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    29a2:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    29a4:	1463      	ipop
+    29a6:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    29a8:	9348      	ld.w      	r2, (r3, 0x20)
+    29aa:	3102      	movi      	r1, 2
+    29ac:	6884      	and      	r2, r1
+    29ae:	3a40      	cmpnei      	r2, 0
+    29b0:	0bf9      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    29b2:	9348      	ld.w      	r2, (r3, 0x20)
+    29b4:	3104      	movi      	r1, 4
+    29b6:	6884      	and      	r2, r1
+    29b8:	3a40      	cmpnei      	r2, 0
+    29ba:	0bf4      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    29bc:	9348      	ld.w      	r2, (r3, 0x20)
+    29be:	3110      	movi      	r1, 16
+    29c0:	6884      	and      	r2, r1
+    29c2:	3a40      	cmpnei      	r2, 0
+    29c4:	0bef      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    29c6:	9348      	ld.w      	r2, (r3, 0x20)
+    29c8:	3120      	movi      	r1, 32
+    29ca:	6884      	and      	r2, r1
+    29cc:	3a40      	cmpnei      	r2, 0
+    29ce:	0bea      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    29d0:	9348      	ld.w      	r2, (r3, 0x20)
+    29d2:	3140      	movi      	r1, 64
+    29d4:	6884      	and      	r2, r1
+    29d6:	3a40      	cmpnei      	r2, 0
+    29d8:	0be5      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    29da:	9348      	ld.w      	r2, (r3, 0x20)
+    29dc:	3180      	movi      	r1, 128
+    29de:	6884      	and      	r2, r1
+    29e0:	3a40      	cmpnei      	r2, 0
+    29e2:	0be0      	bt      	0x29a2	// 29a2 <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    29e4:	3280      	movi      	r2, 128
+    29e6:	9328      	ld.w      	r1, (r3, 0x20)
+    29e8:	4249      	lsli      	r2, r2, 9
+    29ea:	6848      	and      	r1, r2
+    29ec:	3940      	cmpnei      	r1, 0
+    29ee:	0fdb      	bf      	0x29a4	// 29a4 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    29f0:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    29f2:	07d9      	br      	0x29a4	// 29a4 <ADCIntHandler+0x14>
+    29f4:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+000029f8 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    29f8:	1460      	nie
+    29fa:	1462      	ipush
+    29fc:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    29fe:	1387      	lrw      	r4, 0x20000020	// 2b98 <EPT0IntHandler+0x1a0>
+    2a00:	3280      	movi      	r2, 128
+    2a02:	9460      	ld.w      	r3, (r4, 0x0)
+    2a04:	60c8      	addu      	r3, r2
+    2a06:	9335      	ld.w      	r1, (r3, 0x54)
+    2a08:	3001      	movi      	r0, 1
+    2a0a:	6840      	and      	r1, r0
+    2a0c:	3940      	cmpnei      	r1, 0
+    2a0e:	0c03      	bf      	0x2a14	// 2a14 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    2a10:	b317      	st.w      	r0, (r3, 0x5c)
+    2a12:	0424      	br      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    2a14:	9335      	ld.w      	r1, (r3, 0x54)
+    2a16:	3002      	movi      	r0, 2
+    2a18:	6840      	and      	r1, r0
+    2a1a:	3940      	cmpnei      	r1, 0
+    2a1c:	0bfa      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    2a1e:	9335      	ld.w      	r1, (r3, 0x54)
+    2a20:	3004      	movi      	r0, 4
+    2a22:	6840      	and      	r1, r0
+    2a24:	3940      	cmpnei      	r1, 0
+    2a26:	0bf5      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    2a28:	9335      	ld.w      	r1, (r3, 0x54)
+    2a2a:	3008      	movi      	r0, 8
+    2a2c:	6840      	and      	r1, r0
+    2a2e:	3940      	cmpnei      	r1, 0
+    2a30:	0bf0      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    2a32:	9335      	ld.w      	r1, (r3, 0x54)
+    2a34:	3010      	movi      	r0, 16
+    2a36:	6840      	and      	r1, r0
+    2a38:	3940      	cmpnei      	r1, 0
+    2a3a:	0c1f      	bf      	0x2a78	// 2a78 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    2a3c:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    2a3e:	3200      	movi      	r2, 0
+    2a40:	3101      	movi      	r1, 1
+    2a42:	3000      	movi      	r0, 0
+    2a44:	e3fff972 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    2a48:	3201      	movi      	r2, 1
+    2a4a:	3101      	movi      	r1, 1
+    2a4c:	3001      	movi      	r0, 1
+    2a4e:	e3fff96d 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    2a52:	9460      	ld.w      	r3, (r4, 0x0)
+    2a54:	934b      	ld.w      	r2, (r3, 0x2c)
+    2a56:	1272      	lrw      	r3, 0x2000014c	// 2b9c <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2a58:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    2a5a:	9460      	ld.w      	r3, (r4, 0x0)
+    2a5c:	3280      	movi      	r2, 128
+    2a5e:	60c8      	addu      	r3, r2
+    2a60:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a62:	3001      	movi      	r0, 1
+    2a64:	6840      	and      	r1, r0
+    2a66:	3940      	cmpnei      	r1, 0
+    2a68:	0c61      	bf      	0x2b2a	// 2b2a <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    2a6a:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    2a6c:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    2a70:	9880      	ld.w      	r4, (r14, 0x0)
+    2a72:	1402      	addi      	r14, r14, 8
+    2a74:	1463      	ipop
+    2a76:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    2a78:	9335      	ld.w      	r1, (r3, 0x54)
+    2a7a:	3020      	movi      	r0, 32
+    2a7c:	6840      	and      	r1, r0
+    2a7e:	3940      	cmpnei      	r1, 0
+    2a80:	0c10      	bf      	0x2aa0	// 2aa0 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    2a82:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    2a84:	3200      	movi      	r2, 0
+    2a86:	3101      	movi      	r1, 1
+    2a88:	3001      	movi      	r0, 1
+    2a8a:	e3fff94f 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    2a8e:	3201      	movi      	r2, 1
+    2a90:	3101      	movi      	r1, 1
+    2a92:	3000      	movi      	r0, 0
+    2a94:	e3fff94a 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2a98:	9460      	ld.w      	r3, (r4, 0x0)
+    2a9a:	934c      	ld.w      	r2, (r3, 0x30)
+    2a9c:	1261      	lrw      	r3, 0x20000148	// 2ba0 <EPT0IntHandler+0x1a8>
+    2a9e:	07dd      	br      	0x2a58	// 2a58 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    2aa0:	9335      	ld.w      	r1, (r3, 0x54)
+    2aa2:	3040      	movi      	r0, 64
+    2aa4:	6840      	and      	r1, r0
+    2aa6:	3940      	cmpnei      	r1, 0
+    2aa8:	0bb4      	bt      	0x2a10	// 2a10 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    2aaa:	9335      	ld.w      	r1, (r3, 0x54)
+    2aac:	6848      	and      	r1, r2
+    2aae:	3940      	cmpnei      	r1, 0
+    2ab0:	0c03      	bf      	0x2ab6	// 2ab6 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    2ab2:	b357      	st.w      	r2, (r3, 0x5c)
+    2ab4:	07d3      	br      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    2ab6:	3280      	movi      	r2, 128
+    2ab8:	9335      	ld.w      	r1, (r3, 0x54)
+    2aba:	4241      	lsli      	r2, r2, 1
+    2abc:	6848      	and      	r1, r2
+    2abe:	3940      	cmpnei      	r1, 0
+    2ac0:	0bf9      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    2ac2:	3280      	movi      	r2, 128
+    2ac4:	9335      	ld.w      	r1, (r3, 0x54)
+    2ac6:	4242      	lsli      	r2, r2, 2
+    2ac8:	6848      	and      	r1, r2
+    2aca:	3940      	cmpnei      	r1, 0
+    2acc:	0bf3      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    2ace:	3280      	movi      	r2, 128
+    2ad0:	9335      	ld.w      	r1, (r3, 0x54)
+    2ad2:	4243      	lsli      	r2, r2, 3
+    2ad4:	6848      	and      	r1, r2
+    2ad6:	3940      	cmpnei      	r1, 0
+    2ad8:	0bed      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    2ada:	3280      	movi      	r2, 128
+    2adc:	9335      	ld.w      	r1, (r3, 0x54)
+    2ade:	4244      	lsli      	r2, r2, 4
+    2ae0:	6848      	and      	r1, r2
+    2ae2:	3940      	cmpnei      	r1, 0
+    2ae4:	0be7      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    2ae6:	3280      	movi      	r2, 128
+    2ae8:	9335      	ld.w      	r1, (r3, 0x54)
+    2aea:	4245      	lsli      	r2, r2, 5
+    2aec:	6848      	and      	r1, r2
+    2aee:	3940      	cmpnei      	r1, 0
+    2af0:	0be1      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    2af2:	3280      	movi      	r2, 128
+    2af4:	9335      	ld.w      	r1, (r3, 0x54)
+    2af6:	4246      	lsli      	r2, r2, 6
+    2af8:	6848      	and      	r1, r2
+    2afa:	3940      	cmpnei      	r1, 0
+    2afc:	0bdb      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    2afe:	3280      	movi      	r2, 128
+    2b00:	9335      	ld.w      	r1, (r3, 0x54)
+    2b02:	4247      	lsli      	r2, r2, 7
+    2b04:	6848      	and      	r1, r2
+    2b06:	3940      	cmpnei      	r1, 0
+    2b08:	0bd5      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    2b0a:	3280      	movi      	r2, 128
+    2b0c:	9335      	ld.w      	r1, (r3, 0x54)
+    2b0e:	4248      	lsli      	r2, r2, 8
+    2b10:	6848      	and      	r1, r2
+    2b12:	3940      	cmpnei      	r1, 0
+    2b14:	0bcf      	bt      	0x2ab2	// 2ab2 <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    2b16:	3280      	movi      	r2, 128
+    2b18:	9335      	ld.w      	r1, (r3, 0x54)
+    2b1a:	4249      	lsli      	r2, r2, 9
+    2b1c:	6848      	and      	r1, r2
+    2b1e:	3940      	cmpnei      	r1, 0
+    2b20:	0f9d      	bf      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    2b22:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    2b24:	e3fffd4a 	bsr      	0x25b8	// 25b8 <EPT_Stop>
+    2b28:	0799      	br      	0x2a5a	// 2a5a <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    2b2a:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b2c:	3002      	movi      	r0, 2
+    2b2e:	6840      	and      	r1, r0
+    2b30:	3940      	cmpnei      	r1, 0
+    2b32:	0b9c      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    2b34:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b36:	3004      	movi      	r0, 4
+    2b38:	6840      	and      	r1, r0
+    2b3a:	3940      	cmpnei      	r1, 0
+    2b3c:	0b97      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    2b3e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b40:	3008      	movi      	r0, 8
+    2b42:	6840      	and      	r1, r0
+    2b44:	3940      	cmpnei      	r1, 0
+    2b46:	0b92      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    2b48:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b4a:	3010      	movi      	r0, 16
+    2b4c:	6840      	and      	r1, r0
+    2b4e:	3940      	cmpnei      	r1, 0
+    2b50:	0b8d      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    2b52:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b54:	3020      	movi      	r0, 32
+    2b56:	6840      	and      	r1, r0
+    2b58:	3940      	cmpnei      	r1, 0
+    2b5a:	0b88      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    2b5c:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b5e:	3040      	movi      	r0, 64
+    2b60:	6840      	and      	r1, r0
+    2b62:	3940      	cmpnei      	r1, 0
+    2b64:	0b83      	bt      	0x2a6a	// 2a6a <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    2b66:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b68:	6848      	and      	r1, r2
+    2b6a:	3940      	cmpnei      	r1, 0
+    2b6c:	0c03      	bf      	0x2b72	// 2b72 <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    2b6e:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    2b70:	077e      	br      	0x2a6c	// 2a6c <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    2b72:	3280      	movi      	r2, 128
+    2b74:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b76:	4241      	lsli      	r2, r2, 1
+    2b78:	6848      	and      	r1, r2
+    2b7a:	3940      	cmpnei      	r1, 0
+    2b7c:	0bf9      	bt      	0x2b6e	// 2b6e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    2b7e:	3280      	movi      	r2, 128
+    2b80:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b82:	4242      	lsli      	r2, r2, 2
+    2b84:	6848      	and      	r1, r2
+    2b86:	3940      	cmpnei      	r1, 0
+    2b88:	0bf3      	bt      	0x2b6e	// 2b6e <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    2b8a:	3280      	movi      	r2, 128
+    2b8c:	932b      	ld.w      	r1, (r3, 0x2c)
+    2b8e:	4243      	lsli      	r2, r2, 3
+    2b90:	6848      	and      	r1, r2
+    2b92:	3940      	cmpnei      	r1, 0
+    2b94:	0bed      	bt      	0x2b6e	// 2b6e <EPT0IntHandler+0x176>
+    2b96:	076b      	br      	0x2a6c	// 2a6c <EPT0IntHandler+0x74>
+    2b98:	20000020 	.long	0x20000020
+    2b9c:	2000014c 	.long	0x2000014c
+    2ba0:	20000148 	.long	0x20000148
+
+Disassembly of section .text.WWDTHandler:
+
+00002ba4 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    2ba4:	1460      	nie
+    2ba6:	1462      	ipush
+    2ba8:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    2baa:	10ab      	lrw      	r5, 0x20000010	// 2bd4 <WWDTHandler+0x30>
+    2bac:	3401      	movi      	r4, 1
+    2bae:	9560      	ld.w      	r3, (r5, 0x0)
+    2bb0:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    2bb2:	30ff      	movi      	r0, 255
+    2bb4:	e3fffae0 	bsr      	0x2174	// 2174 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    2bb8:	9540      	ld.w      	r2, (r5, 0x0)
+    2bba:	9263      	ld.w      	r3, (r2, 0xc)
+    2bbc:	68d0      	and      	r3, r4
+    2bbe:	3b40      	cmpnei      	r3, 0
+    2bc0:	0c02      	bf      	0x2bc4	// 2bc4 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    2bc2:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    2bc4:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    2bc8:	98a1      	ld.w      	r5, (r14, 0x4)
+    2bca:	9880      	ld.w      	r4, (r14, 0x0)
+    2bcc:	1403      	addi      	r14, r14, 12
+    2bce:	1463      	ipop
+    2bd0:	1461      	nir
+    2bd2:	0000      	bkpt
+    2bd4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00002bd8 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    2bd8:	1460      	nie
+    2bda:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    2bdc:	107e      	lrw      	r3, 0x20000024	// 2c54 <GPT0IntHandler+0x7c>
+    2bde:	3101      	movi      	r1, 1
+    2be0:	9360      	ld.w      	r3, (r3, 0x0)
+    2be2:	237f      	addi      	r3, 128
+    2be4:	9355      	ld.w      	r2, (r3, 0x54)
+    2be6:	6884      	and      	r2, r1
+    2be8:	3a40      	cmpnei      	r2, 0
+    2bea:	0c04      	bf      	0x2bf2	// 2bf2 <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    2bec:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    2bee:	1463      	ipop
+    2bf0:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    2bf2:	9355      	ld.w      	r2, (r3, 0x54)
+    2bf4:	3102      	movi      	r1, 2
+    2bf6:	6884      	and      	r2, r1
+    2bf8:	3a40      	cmpnei      	r2, 0
+    2bfa:	0bf9      	bt      	0x2bec	// 2bec <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    2bfc:	9355      	ld.w      	r2, (r3, 0x54)
+    2bfe:	3110      	movi      	r1, 16
+    2c00:	6884      	and      	r2, r1
+    2c02:	3a40      	cmpnei      	r2, 0
+    2c04:	0bf4      	bt      	0x2bec	// 2bec <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    2c06:	9355      	ld.w      	r2, (r3, 0x54)
+    2c08:	3120      	movi      	r1, 32
+    2c0a:	6884      	and      	r2, r1
+    2c0c:	3a40      	cmpnei      	r2, 0
+    2c0e:	0bef      	bt      	0x2bec	// 2bec <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    2c10:	3280      	movi      	r2, 128
+    2c12:	9335      	ld.w      	r1, (r3, 0x54)
+    2c14:	4241      	lsli      	r2, r2, 1
+    2c16:	6848      	and      	r1, r2
+    2c18:	3940      	cmpnei      	r1, 0
+    2c1a:	0c03      	bf      	0x2c20	// 2c20 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    2c1c:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    2c1e:	07e8      	br      	0x2bee	// 2bee <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    2c20:	3280      	movi      	r2, 128
+    2c22:	9335      	ld.w      	r1, (r3, 0x54)
+    2c24:	4242      	lsli      	r2, r2, 2
+    2c26:	6848      	and      	r1, r2
+    2c28:	3940      	cmpnei      	r1, 0
+    2c2a:	0bf9      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    2c2c:	3280      	movi      	r2, 128
+    2c2e:	9335      	ld.w      	r1, (r3, 0x54)
+    2c30:	4243      	lsli      	r2, r2, 3
+    2c32:	6848      	and      	r1, r2
+    2c34:	3940      	cmpnei      	r1, 0
+    2c36:	0bf3      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    2c38:	3280      	movi      	r2, 128
+    2c3a:	9335      	ld.w      	r1, (r3, 0x54)
+    2c3c:	4244      	lsli      	r2, r2, 4
+    2c3e:	6848      	and      	r1, r2
+    2c40:	3940      	cmpnei      	r1, 0
+    2c42:	0bed      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    2c44:	3280      	movi      	r2, 128
+    2c46:	9335      	ld.w      	r1, (r3, 0x54)
+    2c48:	4249      	lsli      	r2, r2, 9
+    2c4a:	6848      	and      	r1, r2
+    2c4c:	3940      	cmpnei      	r1, 0
+    2c4e:	0be7      	bt      	0x2c1c	// 2c1c <GPT0IntHandler+0x44>
+    2c50:	07cf      	br      	0x2bee	// 2bee <GPT0IntHandler+0x16>
+    2c52:	0000      	bkpt
+    2c54:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00002c58 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    2c58:	1460      	nie
+    2c5a:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    2c5c:	1079      	lrw      	r3, 0x20000018	// 2cc0 <RTCIntHandler+0x68>
+    2c5e:	3101      	movi      	r1, 1
+    2c60:	9360      	ld.w      	r3, (r3, 0x0)
+    2c62:	934a      	ld.w      	r2, (r3, 0x28)
+    2c64:	6884      	and      	r2, r1
+    2c66:	3a40      	cmpnei      	r2, 0
+    2c68:	0c14      	bf      	0x2c90	// 2c90 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    2c6a:	1057      	lrw      	r2, 0xca53	// 2cc4 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    2c6c:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    2c6e:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    2c70:	9342      	ld.w      	r2, (r3, 0x8)
+    2c72:	6c84      	or      	r2, r1
+    2c74:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    2c76:	3280      	movi      	r2, 128
+    2c78:	424d      	lsli      	r2, r2, 13
+    2c7a:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    2c7c:	3102      	movi      	r1, 2
+    2c7e:	9342      	ld.w      	r2, (r3, 0x8)
+    2c80:	6884      	and      	r2, r1
+    2c82:	3a40      	cmpnei      	r2, 0
+    2c84:	0bfd      	bt      	0x2c7e	// 2c7e <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    2c86:	9342      	ld.w      	r2, (r3, 0x8)
+    2c88:	3a80      	bclri      	r2, 0
+    2c8a:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    2c8c:	1463      	ipop
+    2c8e:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    2c90:	934a      	ld.w      	r2, (r3, 0x28)
+    2c92:	3102      	movi      	r1, 2
+    2c94:	6884      	and      	r2, r1
+    2c96:	3a40      	cmpnei      	r2, 0
+    2c98:	0c03      	bf      	0x2c9e	// 2c9e <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    2c9a:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    2c9c:	07f8      	br      	0x2c8c	// 2c8c <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    2c9e:	934a      	ld.w      	r2, (r3, 0x28)
+    2ca0:	3104      	movi      	r1, 4
+    2ca2:	6884      	and      	r2, r1
+    2ca4:	3a40      	cmpnei      	r2, 0
+    2ca6:	0bfa      	bt      	0x2c9a	// 2c9a <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    2ca8:	934a      	ld.w      	r2, (r3, 0x28)
+    2caa:	3108      	movi      	r1, 8
+    2cac:	6884      	and      	r2, r1
+    2cae:	3a40      	cmpnei      	r2, 0
+    2cb0:	0bf5      	bt      	0x2c9a	// 2c9a <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    2cb2:	934a      	ld.w      	r2, (r3, 0x28)
+    2cb4:	3110      	movi      	r1, 16
+    2cb6:	6884      	and      	r2, r1
+    2cb8:	3a40      	cmpnei      	r2, 0
+    2cba:	0bf0      	bt      	0x2c9a	// 2c9a <RTCIntHandler+0x42>
+    2cbc:	07e8      	br      	0x2c8c	// 2c8c <RTCIntHandler+0x34>
+    2cbe:	0000      	bkpt
+    2cc0:	20000018 	.long	0x20000018
+    2cc4:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00002cc8 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    2cc8:	1460      	nie
+    2cca:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2ccc:	106d      	lrw      	r3, 0x20000040	// 2d00 <UART0IntHandler+0x38>
+    2cce:	3102      	movi      	r1, 2
+    2cd0:	9360      	ld.w      	r3, (r3, 0x0)
+    2cd2:	9343      	ld.w      	r2, (r3, 0xc)
+    2cd4:	6884      	and      	r2, r1
+    2cd6:	3a40      	cmpnei      	r2, 0
+    2cd8:	0c03      	bf      	0x2cde	// 2cde <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    2cda:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2cdc:	0410      	br      	0x2cfc	// 2cfc <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2cde:	9343      	ld.w      	r2, (r3, 0xc)
+    2ce0:	3101      	movi      	r1, 1
+    2ce2:	6884      	and      	r2, r1
+    2ce4:	3a40      	cmpnei      	r2, 0
+    2ce6:	0bfa      	bt      	0x2cda	// 2cda <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2ce8:	9343      	ld.w      	r2, (r3, 0xc)
+    2cea:	3108      	movi      	r1, 8
+    2cec:	6884      	and      	r2, r1
+    2cee:	3a40      	cmpnei      	r2, 0
+    2cf0:	0bf5      	bt      	0x2cda	// 2cda <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2cf2:	9343      	ld.w      	r2, (r3, 0xc)
+    2cf4:	3104      	movi      	r1, 4
+    2cf6:	6884      	and      	r2, r1
+    2cf8:	3a40      	cmpnei      	r2, 0
+    2cfa:	0bf0      	bt      	0x2cda	// 2cda <UART0IntHandler+0x12>
+}
+    2cfc:	1463      	ipop
+    2cfe:	1461      	nir
+    2d00:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00002d04 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    2d04:	1460      	nie
+    2d06:	1462      	ipush
+    2d08:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2d0a:	107f      	lrw      	r3, 0x2000003c	// 2d84 <UART1IntHandler+0x80>
+    2d0c:	3102      	movi      	r1, 2
+    2d0e:	9360      	ld.w      	r3, (r3, 0x0)
+    2d10:	9343      	ld.w      	r2, (r3, 0xc)
+    2d12:	6884      	and      	r2, r1
+    2d14:	3a40      	cmpnei      	r2, 0
+    2d16:	0c0b      	bf      	0x2d2c	// 2d2c <UART1IntHandler+0x28>
+	{
+		UART1->ISR=UART_RX_INT_S;
+    2d18:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART1);
+    2d1a:	9300      	ld.w      	r0, (r3, 0x0)
+		UART1_RecvINT_Processing(inchar);
+    2d1c:	7400      	zextb      	r0, r0
+    2d1e:	e000032b 	bsr      	0x3374	// 3374 <UART1_RecvINT_Processing>
+		if(RS485_Comm_Flag == 0x01){
+			RS485_Comm_End ++;
+		}
+		
+	}	
+}
+    2d22:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2d26:	1401      	addi      	r14, r14, 4
+    2d28:	1463      	ipop
+    2d2a:	1461      	nir
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2d2c:	9323      	ld.w      	r1, (r3, 0xc)
+    2d2e:	3201      	movi      	r2, 1
+    2d30:	6848      	and      	r1, r2
+    2d32:	3940      	cmpnei      	r1, 0
+    2d34:	0c0d      	bf      	0x2d4e	// 2d4e <UART1IntHandler+0x4a>
+		UART1->ISR=UART_TX_INT_S;
+    2d36:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    2d38:	1074      	lrw      	r3, 0x200000a8	// 2d88 <UART1IntHandler+0x84>
+    2d3a:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2d3c:	1074      	lrw      	r3, 0x200000ac	// 2d8c <UART1IntHandler+0x88>
+    2d3e:	9360      	ld.w      	r3, (r3, 0x0)
+    2d40:	3b41      	cmpnei      	r3, 1
+    2d42:	0bf0      	bt      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    2d44:	1053      	lrw      	r2, 0x200000b0	// 2d90 <UART1IntHandler+0x8c>
+			RS485_Comm_End ++;
+    2d46:	9260      	ld.w      	r3, (r2, 0x0)
+    2d48:	2300      	addi      	r3, 1
+    2d4a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2d4c:	07eb      	br      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2d4e:	9343      	ld.w      	r2, (r3, 0xc)
+    2d50:	3108      	movi      	r1, 8
+    2d52:	6884      	and      	r2, r1
+    2d54:	3a40      	cmpnei      	r2, 0
+    2d56:	0c03      	bf      	0x2d5c	// 2d5c <UART1IntHandler+0x58>
+		UART1->ISR=UART_TX_IOV_S;
+    2d58:	b323      	st.w      	r1, (r3, 0xc)
+    2d5a:	07e4      	br      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2d5c:	9343      	ld.w      	r2, (r3, 0xc)
+    2d5e:	3104      	movi      	r1, 4
+    2d60:	6884      	and      	r2, r1
+    2d62:	3a40      	cmpnei      	r2, 0
+    2d64:	0bfa      	bt      	0x2d58	// 2d58 <UART1IntHandler+0x54>
+	else if ((UART1->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2d66:	3180      	movi      	r1, 128
+    2d68:	9303      	ld.w      	r0, (r3, 0xc)
+    2d6a:	412c      	lsli      	r1, r1, 12
+    2d6c:	6804      	and      	r0, r1
+    2d6e:	3840      	cmpnei      	r0, 0
+    2d70:	0fd9      	bf      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+		UART1->ISR=UART_TX_DONE_S;
+    2d72:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    2d74:	1065      	lrw      	r3, 0x200000a8	// 2d88 <UART1IntHandler+0x84>
+    2d76:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2d78:	1065      	lrw      	r3, 0x200000ac	// 2d8c <UART1IntHandler+0x88>
+    2d7a:	9360      	ld.w      	r3, (r3, 0x0)
+    2d7c:	3b41      	cmpnei      	r3, 1
+    2d7e:	0bd2      	bt      	0x2d22	// 2d22 <UART1IntHandler+0x1e>
+			RS485_Comm_End ++;
+    2d80:	1045      	lrw      	r2, 0x200000b4	// 2d94 <UART1IntHandler+0x90>
+    2d82:	07e2      	br      	0x2d46	// 2d46 <UART1IntHandler+0x42>
+    2d84:	2000003c 	.long	0x2000003c
+    2d88:	200000a8 	.long	0x200000a8
+    2d8c:	200000ac 	.long	0x200000ac
+    2d90:	200000b0 	.long	0x200000b0
+    2d94:	200000b4 	.long	0x200000b4
+
+Disassembly of section .text.UART2IntHandler:
+
+00002d98 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    2d98:	1460      	nie
+    2d9a:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2d9c:	1071      	lrw      	r3, 0x20000038	// 2de0 <UART2IntHandler+0x48>
+    2d9e:	3102      	movi      	r1, 2
+    2da0:	9360      	ld.w      	r3, (r3, 0x0)
+    2da2:	9343      	ld.w      	r2, (r3, 0xc)
+    2da4:	6884      	and      	r2, r1
+    2da6:	3a40      	cmpnei      	r2, 0
+    2da8:	0c04      	bf      	0x2db0	// 2db0 <UART2IntHandler+0x18>
+	{
+		UART2->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART2->ISR=UART_TX_IOV_S;
+    2daa:	b323      	st.w      	r1, (r3, 0xc)
+//			RS485_Comm_End ++;
+//		}
+		
+	}
+	
+}
+    2dac:	1463      	ipop
+    2dae:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2db0:	9343      	ld.w      	r2, (r3, 0xc)
+    2db2:	3101      	movi      	r1, 1
+    2db4:	6884      	and      	r2, r1
+    2db6:	3a40      	cmpnei      	r2, 0
+    2db8:	0bf9      	bt      	0x2daa	// 2daa <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2dba:	9343      	ld.w      	r2, (r3, 0xc)
+    2dbc:	3108      	movi      	r1, 8
+    2dbe:	6884      	and      	r2, r1
+    2dc0:	3a40      	cmpnei      	r2, 0
+    2dc2:	0bf4      	bt      	0x2daa	// 2daa <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2dc4:	9343      	ld.w      	r2, (r3, 0xc)
+    2dc6:	3104      	movi      	r1, 4
+    2dc8:	6884      	and      	r2, r1
+    2dca:	3a40      	cmpnei      	r2, 0
+    2dcc:	0bef      	bt      	0x2daa	// 2daa <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2dce:	3280      	movi      	r2, 128
+    2dd0:	9323      	ld.w      	r1, (r3, 0xc)
+    2dd2:	424c      	lsli      	r2, r2, 12
+    2dd4:	6848      	and      	r1, r2
+    2dd6:	3940      	cmpnei      	r1, 0
+    2dd8:	0fea      	bf      	0x2dac	// 2dac <UART2IntHandler+0x14>
+		UART2->ISR=UART_TX_DONE_S;
+    2dda:	b343      	st.w      	r2, (r3, 0xc)
+}
+    2ddc:	07e8      	br      	0x2dac	// 2dac <UART2IntHandler+0x14>
+    2dde:	0000      	bkpt
+    2de0:	20000038 	.long	0x20000038
+
+Disassembly of section .text.SPI0IntHandler:
+
+00002de4 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    2de4:	1460      	nie
+    2de6:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    2de8:	1178      	lrw      	r3, 0x20000034	// 2ec8 <SPI0IntHandler+0xe4>
+    2dea:	3101      	movi      	r1, 1
+    2dec:	9360      	ld.w      	r3, (r3, 0x0)
+    2dee:	9347      	ld.w      	r2, (r3, 0x1c)
+    2df0:	6884      	and      	r2, r1
+    2df2:	3a40      	cmpnei      	r2, 0
+    2df4:	0c03      	bf      	0x2dfa	// 2dfa <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    2df6:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    2df8:	0407      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    2dfa:	9347      	ld.w      	r2, (r3, 0x1c)
+    2dfc:	3002      	movi      	r0, 2
+    2dfe:	6880      	and      	r2, r0
+    2e00:	3a40      	cmpnei      	r2, 0
+    2e02:	0c04      	bf      	0x2e0a	// 2e0a <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    2e04:	b308      	st.w      	r0, (r3, 0x20)
+}
+    2e06:	1463      	ipop
+    2e08:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    2e0a:	9347      	ld.w      	r2, (r3, 0x1c)
+    2e0c:	3004      	movi      	r0, 4
+    2e0e:	6880      	and      	r2, r0
+    2e10:	3a40      	cmpnei      	r2, 0
+    2e12:	0c55      	bf      	0x2ebc	// 2ebc <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    2e14:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    2e16:	9302      	ld.w      	r0, (r3, 0x8)
+    2e18:	32aa      	movi      	r2, 170
+    2e1a:	6482      	cmpne      	r0, r2
+    2e1c:	083e      	bt      	0x2e98	// 2e98 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e1e:	3102      	movi      	r1, 2
+    2e20:	9343      	ld.w      	r2, (r3, 0xc)
+    2e22:	6884      	and      	r2, r1
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0ffd      	bf      	0x2e20	// 2e20 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    2e28:	3211      	movi      	r2, 17
+    2e2a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e2c:	3110      	movi      	r1, 16
+    2e2e:	9343      	ld.w      	r2, (r3, 0xc)
+    2e30:	6884      	and      	r2, r1
+    2e32:	3a40      	cmpnei      	r2, 0
+    2e34:	0bfd      	bt      	0x2e2e	// 2e2e <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e36:	3102      	movi      	r1, 2
+    2e38:	9343      	ld.w      	r2, (r3, 0xc)
+    2e3a:	6884      	and      	r2, r1
+    2e3c:	3a40      	cmpnei      	r2, 0
+    2e3e:	0ffd      	bf      	0x2e38	// 2e38 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    2e40:	3212      	movi      	r2, 18
+    2e42:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e44:	3110      	movi      	r1, 16
+    2e46:	9343      	ld.w      	r2, (r3, 0xc)
+    2e48:	6884      	and      	r2, r1
+    2e4a:	3a40      	cmpnei      	r2, 0
+    2e4c:	0bfd      	bt      	0x2e46	// 2e46 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e4e:	3102      	movi      	r1, 2
+    2e50:	9343      	ld.w      	r2, (r3, 0xc)
+    2e52:	6884      	and      	r2, r1
+    2e54:	3a40      	cmpnei      	r2, 0
+    2e56:	0ffd      	bf      	0x2e50	// 2e50 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    2e58:	3213      	movi      	r2, 19
+    2e5a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e5c:	3110      	movi      	r1, 16
+    2e5e:	9343      	ld.w      	r2, (r3, 0xc)
+    2e60:	6884      	and      	r2, r1
+    2e62:	3a40      	cmpnei      	r2, 0
+    2e64:	0bfd      	bt      	0x2e5e	// 2e5e <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e66:	3102      	movi      	r1, 2
+    2e68:	9343      	ld.w      	r2, (r3, 0xc)
+    2e6a:	6884      	and      	r2, r1
+    2e6c:	3a40      	cmpnei      	r2, 0
+    2e6e:	0ffd      	bf      	0x2e68	// 2e68 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    2e70:	3214      	movi      	r2, 20
+    2e72:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e74:	3110      	movi      	r1, 16
+    2e76:	9343      	ld.w      	r2, (r3, 0xc)
+    2e78:	6884      	and      	r2, r1
+    2e7a:	3a40      	cmpnei      	r2, 0
+    2e7c:	0bfd      	bt      	0x2e76	// 2e76 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2e7e:	3102      	movi      	r1, 2
+    2e80:	9343      	ld.w      	r2, (r3, 0xc)
+    2e82:	6884      	and      	r2, r1
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	0ffd      	bf      	0x2e80	// 2e80 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    2e88:	3215      	movi      	r2, 21
+    2e8a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2e8c:	3110      	movi      	r1, 16
+    2e8e:	9343      	ld.w      	r2, (r3, 0xc)
+    2e90:	6884      	and      	r2, r1
+    2e92:	3a40      	cmpnei      	r2, 0
+    2e94:	0bfd      	bt      	0x2e8e	// 2e8e <SPI0IntHandler+0xaa>
+    2e96:	07b8      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    2e98:	9343      	ld.w      	r2, (r3, 0xc)
+    2e9a:	6884      	and      	r2, r1
+    2e9c:	3a40      	cmpnei      	r2, 0
+    2e9e:	0bb4      	bt      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    2ea0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2ea2:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    2ea4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2ea6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2ea8:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eaa:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eac:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eae:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2eb0:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2eb2:	9343      	ld.w      	r2, (r3, 0xc)
+    2eb4:	6884      	and      	r2, r1
+    2eb6:	3a40      	cmpnei      	r2, 0
+    2eb8:	0bfd      	bt      	0x2eb2	// 2eb2 <SPI0IntHandler+0xce>
+    2eba:	07a6      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    2ebc:	9347      	ld.w      	r2, (r3, 0x1c)
+    2ebe:	3108      	movi      	r1, 8
+    2ec0:	6884      	and      	r2, r1
+    2ec2:	3a40      	cmpnei      	r2, 0
+    2ec4:	0b99      	bt      	0x2df6	// 2df6 <SPI0IntHandler+0x12>
+    2ec6:	07a0      	br      	0x2e06	// 2e06 <SPI0IntHandler+0x22>
+    2ec8:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+00002ecc <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    2ecc:	1460      	nie
+    2ece:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    2ed0:	1073      	lrw      	r3, 0x2000002c	// 2f1c <SIO0IntHandler+0x50>
+    2ed2:	3104      	movi      	r1, 4
+    2ed4:	9360      	ld.w      	r3, (r3, 0x0)
+    2ed6:	9349      	ld.w      	r2, (r3, 0x24)
+    2ed8:	6884      	and      	r2, r1
+    2eda:	3a40      	cmpnei      	r2, 0
+    2edc:	0c02      	bf      	0x2ee0	// 2ee0 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    2ede:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    2ee0:	9349      	ld.w      	r2, (r3, 0x24)
+    2ee2:	3101      	movi      	r1, 1
+    2ee4:	6884      	and      	r2, r1
+    2ee6:	3a40      	cmpnei      	r2, 0
+    2ee8:	0c02      	bf      	0x2eec	// 2eec <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    2eea:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    2eec:	9349      	ld.w      	r2, (r3, 0x24)
+    2eee:	3102      	movi      	r1, 2
+    2ef0:	6884      	and      	r2, r1
+    2ef2:	3a40      	cmpnei      	r2, 0
+    2ef4:	0c03      	bf      	0x2efa	// 2efa <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    2ef6:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    2ef8:	0410      	br      	0x2f18	// 2f18 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    2efa:	9349      	ld.w      	r2, (r3, 0x24)
+    2efc:	3108      	movi      	r1, 8
+    2efe:	6884      	and      	r2, r1
+    2f00:	3a40      	cmpnei      	r2, 0
+    2f02:	0bfa      	bt      	0x2ef6	// 2ef6 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    2f04:	9349      	ld.w      	r2, (r3, 0x24)
+    2f06:	3110      	movi      	r1, 16
+    2f08:	6884      	and      	r2, r1
+    2f0a:	3a40      	cmpnei      	r2, 0
+    2f0c:	0bf5      	bt      	0x2ef6	// 2ef6 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    2f0e:	9349      	ld.w      	r2, (r3, 0x24)
+    2f10:	3120      	movi      	r1, 32
+    2f12:	6884      	and      	r2, r1
+    2f14:	3a40      	cmpnei      	r2, 0
+    2f16:	0bf0      	bt      	0x2ef6	// 2ef6 <SIO0IntHandler+0x2a>
+}
+    2f18:	1463      	ipop
+    2f1a:	1461      	nir
+    2f1c:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00002f20 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    2f20:	1460      	nie
+    2f22:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    2f24:	106a      	lrw      	r3, 0x2000005c	// 2f4c <EXI0IntHandler+0x2c>
+    2f26:	3101      	movi      	r1, 1
+    2f28:	9360      	ld.w      	r3, (r3, 0x0)
+    2f2a:	237f      	addi      	r3, 128
+    2f2c:	934c      	ld.w      	r2, (r3, 0x30)
+    2f2e:	6884      	and      	r2, r1
+    2f30:	3a40      	cmpnei      	r2, 0
+    2f32:	0c04      	bf      	0x2f3a	// 2f3a <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    2f34:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    2f36:	1463      	ipop
+    2f38:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    2f3a:	3280      	movi      	r2, 128
+    2f3c:	932c      	ld.w      	r1, (r3, 0x30)
+    2f3e:	4249      	lsli      	r2, r2, 9
+    2f40:	6848      	and      	r1, r2
+    2f42:	3940      	cmpnei      	r1, 0
+    2f44:	0ff9      	bf      	0x2f36	// 2f36 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    2f46:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2f48:	07f7      	br      	0x2f36	// 2f36 <EXI0IntHandler+0x16>
+    2f4a:	0000      	bkpt
+    2f4c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00002f50 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    2f50:	1460      	nie
+    2f52:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    2f54:	106a      	lrw      	r3, 0x2000005c	// 2f7c <EXI1IntHandler+0x2c>
+    2f56:	3102      	movi      	r1, 2
+    2f58:	9360      	ld.w      	r3, (r3, 0x0)
+    2f5a:	237f      	addi      	r3, 128
+    2f5c:	934c      	ld.w      	r2, (r3, 0x30)
+    2f5e:	6884      	and      	r2, r1
+    2f60:	3a40      	cmpnei      	r2, 0
+    2f62:	0c04      	bf      	0x2f6a	// 2f6a <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    2f64:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    2f66:	1463      	ipop
+    2f68:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    2f6a:	3280      	movi      	r2, 128
+    2f6c:	932c      	ld.w      	r1, (r3, 0x30)
+    2f6e:	424a      	lsli      	r2, r2, 10
+    2f70:	6848      	and      	r1, r2
+    2f72:	3940      	cmpnei      	r1, 0
+    2f74:	0ff9      	bf      	0x2f66	// 2f66 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    2f76:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2f78:	07f7      	br      	0x2f66	// 2f66 <EXI1IntHandler+0x16>
+    2f7a:	0000      	bkpt
+    2f7c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+00002f80 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    2f80:	1460      	nie
+    2f82:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    2f84:	1070      	lrw      	r3, 0x2000005c	// 2fc4 <EXI2to3IntHandler+0x44>
+    2f86:	3104      	movi      	r1, 4
+    2f88:	9360      	ld.w      	r3, (r3, 0x0)
+    2f8a:	237f      	addi      	r3, 128
+    2f8c:	934c      	ld.w      	r2, (r3, 0x30)
+    2f8e:	6884      	and      	r2, r1
+    2f90:	3a40      	cmpnei      	r2, 0
+    2f92:	0c04      	bf      	0x2f9a	// 2f9a <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    2f94:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    2f96:	1463      	ipop
+    2f98:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    2f9a:	934c      	ld.w      	r2, (r3, 0x30)
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	6884      	and      	r2, r1
+    2fa0:	3a40      	cmpnei      	r2, 0
+    2fa2:	0bf9      	bt      	0x2f94	// 2f94 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    2fa4:	3280      	movi      	r2, 128
+    2fa6:	932c      	ld.w      	r1, (r3, 0x30)
+    2fa8:	424b      	lsli      	r2, r2, 11
+    2faa:	6848      	and      	r1, r2
+    2fac:	3940      	cmpnei      	r1, 0
+    2fae:	0c03      	bf      	0x2fb4	// 2fb4 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    2fb0:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2fb2:	07f2      	br      	0x2f96	// 2f96 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    2fb4:	3280      	movi      	r2, 128
+    2fb6:	932c      	ld.w      	r1, (r3, 0x30)
+    2fb8:	424c      	lsli      	r2, r2, 12
+    2fba:	6848      	and      	r1, r2
+    2fbc:	3940      	cmpnei      	r1, 0
+    2fbe:	0bf9      	bt      	0x2fb0	// 2fb0 <EXI2to3IntHandler+0x30>
+    2fc0:	07eb      	br      	0x2f96	// 2f96 <EXI2to3IntHandler+0x16>
+    2fc2:	0000      	bkpt
+    2fc4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+00002fc8 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    2fc8:	1460      	nie
+    2fca:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    2fcc:	1066      	lrw      	r3, 0x2000005c	// 2fe4 <EXI4to9IntHandler+0x1c>
+    2fce:	3110      	movi      	r1, 16
+    2fd0:	9360      	ld.w      	r3, (r3, 0x0)
+    2fd2:	237f      	addi      	r3, 128
+    2fd4:	934c      	ld.w      	r2, (r3, 0x30)
+    2fd6:	6884      	and      	r2, r1
+    2fd8:	3a40      	cmpnei      	r2, 0
+    2fda:	0c02      	bf      	0x2fde	// 2fde <EXI4to9IntHandler+0x16>
+	{
+		SYSCON->EXICR = EXI_PIN4;
+    2fdc:	b32b      	st.w      	r1, (r3, 0x2c)
+//	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN9;
+//	} 
+
+}
+    2fde:	1463      	ipop
+    2fe0:	1461      	nir
+    2fe2:	0000      	bkpt
+    2fe4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00002fe8 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    2fe8:	1460      	nie
+    2fea:	1462      	ipush
+    2fec:	14d0      	push      	r15
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    2fee:	1079      	lrw      	r3, 0x2000005c	// 3050 <EXI10to15IntHandler+0x68>
+    2ff0:	3280      	movi      	r2, 128
+    2ff2:	9360      	ld.w      	r3, (r3, 0x0)
+    2ff4:	237f      	addi      	r3, 128
+    2ff6:	932c      	ld.w      	r1, (r3, 0x30)
+    2ff8:	4243      	lsli      	r2, r2, 3
+    2ffa:	6848      	and      	r1, r2
+    2ffc:	3940      	cmpnei      	r1, 0
+    2ffe:	0c07      	bf      	0x300c	// 300c <EXI10to15IntHandler+0x24>
+	{
+		SYSCON->EXICR = EXI_PIN13;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN14;
+    3000:	b34b      	st.w      	r2, (r3, 0x2c)
+	{
+		SYSCON->EXICR = EXI_PIN15;
+		
+		BusBusy_Task();
+	}
+}
+    3002:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3006:	1401      	addi      	r14, r14, 4
+    3008:	1463      	ipop
+    300a:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    300c:	3280      	movi      	r2, 128
+    300e:	932c      	ld.w      	r1, (r3, 0x30)
+    3010:	4244      	lsli      	r2, r2, 4
+    3012:	6848      	and      	r1, r2
+    3014:	3940      	cmpnei      	r1, 0
+    3016:	0bf5      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    3018:	3280      	movi      	r2, 128
+    301a:	932c      	ld.w      	r1, (r3, 0x30)
+    301c:	4245      	lsli      	r2, r2, 5
+    301e:	6848      	and      	r1, r2
+    3020:	3940      	cmpnei      	r1, 0
+    3022:	0bef      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    3024:	3280      	movi      	r2, 128
+    3026:	932c      	ld.w      	r1, (r3, 0x30)
+    3028:	4246      	lsli      	r2, r2, 6
+    302a:	6848      	and      	r1, r2
+    302c:	3940      	cmpnei      	r1, 0
+    302e:	0be9      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    3030:	3280      	movi      	r2, 128
+    3032:	932c      	ld.w      	r1, (r3, 0x30)
+    3034:	4247      	lsli      	r2, r2, 7
+    3036:	6848      	and      	r1, r2
+    3038:	3940      	cmpnei      	r1, 0
+    303a:	0be3      	bt      	0x3000	// 3000 <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    303c:	3280      	movi      	r2, 128
+    303e:	932c      	ld.w      	r1, (r3, 0x30)
+    3040:	4248      	lsli      	r2, r2, 8
+    3042:	6848      	and      	r1, r2
+    3044:	3940      	cmpnei      	r1, 0
+    3046:	0fde      	bf      	0x3002	// 3002 <EXI10to15IntHandler+0x1a>
+		SYSCON->EXICR = EXI_PIN15;
+    3048:	b34b      	st.w      	r2, (r3, 0x2c)
+		BusBusy_Task();
+    304a:	e00002eb 	bsr      	0x3620	// 3620 <BusBusy_Task>
+}
+    304e:	07da      	br      	0x3002	// 3002 <EXI10to15IntHandler+0x1a>
+    3050:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+00003054 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    3054:	1460      	nie
+    3056:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    3058:	106b      	lrw      	r3, 0x20000014	// 3084 <LPTIntHandler+0x30>
+    305a:	3101      	movi      	r1, 1
+    305c:	9360      	ld.w      	r3, (r3, 0x0)
+    305e:	934e      	ld.w      	r2, (r3, 0x38)
+    3060:	6884      	and      	r2, r1
+    3062:	3a40      	cmpnei      	r2, 0
+    3064:	0c03      	bf      	0x306a	// 306a <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    3066:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    3068:	040b      	br      	0x307e	// 307e <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    306a:	934e      	ld.w      	r2, (r3, 0x38)
+    306c:	3102      	movi      	r1, 2
+    306e:	6884      	and      	r2, r1
+    3070:	3a40      	cmpnei      	r2, 0
+    3072:	0bfa      	bt      	0x3066	// 3066 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    3074:	934e      	ld.w      	r2, (r3, 0x38)
+    3076:	3104      	movi      	r1, 4
+    3078:	6884      	and      	r2, r1
+    307a:	3a40      	cmpnei      	r2, 0
+    307c:	0bf5      	bt      	0x3066	// 3066 <LPTIntHandler+0x12>
+}
+    307e:	1463      	ipop
+    3080:	1461      	nir
+    3082:	0000      	bkpt
+    3084:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+00003088 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    3088:	1460      	nie
+    308a:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    308c:	1071      	lrw      	r3, 0x2000000c	// 30d0 <BT0IntHandler+0x48>
+    308e:	3101      	movi      	r1, 1
+    3090:	9360      	ld.w      	r3, (r3, 0x0)
+    3092:	934c      	ld.w      	r2, (r3, 0x30)
+    3094:	6884      	and      	r2, r1
+    3096:	3a40      	cmpnei      	r2, 0
+    3098:	0c0a      	bf      	0x30ac	// 30ac <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    309a:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    309c:	9341      	ld.w      	r2, (r3, 0x4)
+    309e:	3a86      	bclri      	r2, 6
+    30a0:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    30a2:	9340      	ld.w      	r2, (r3, 0x0)
+    30a4:	3200      	movi      	r2, 0
+    30a6:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    30a8:	1463      	ipop
+    30aa:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    30ac:	934c      	ld.w      	r2, (r3, 0x30)
+    30ae:	3102      	movi      	r1, 2
+    30b0:	6884      	and      	r2, r1
+    30b2:	3a40      	cmpnei      	r2, 0
+    30b4:	0c03      	bf      	0x30ba	// 30ba <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    30b6:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    30b8:	07f8      	br      	0x30a8	// 30a8 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    30ba:	934c      	ld.w      	r2, (r3, 0x30)
+    30bc:	3104      	movi      	r1, 4
+    30be:	6884      	and      	r2, r1
+    30c0:	3a40      	cmpnei      	r2, 0
+    30c2:	0bfa      	bt      	0x30b6	// 30b6 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    30c4:	934c      	ld.w      	r2, (r3, 0x30)
+    30c6:	3108      	movi      	r1, 8
+    30c8:	6884      	and      	r2, r1
+    30ca:	3a40      	cmpnei      	r2, 0
+    30cc:	0bf5      	bt      	0x30b6	// 30b6 <BT0IntHandler+0x2e>
+    30ce:	07ed      	br      	0x30a8	// 30a8 <BT0IntHandler+0x20>
+    30d0:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+000030d4 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    30d4:	1460      	nie
+    30d6:	1462      	ipush
+    30d8:	14d0      	push      	r15
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    30da:	1079      	lrw      	r3, 0x20000008	// 313c <BT1IntHandler+0x68>
+    30dc:	3101      	movi      	r1, 1
+    30de:	9360      	ld.w      	r3, (r3, 0x0)
+    30e0:	934c      	ld.w      	r2, (r3, 0x30)
+    30e2:	6884      	and      	r2, r1
+    30e4:	3a40      	cmpnei      	r2, 0
+    30e6:	0c03      	bf      	0x30ec	// 30ec <BT1IntHandler+0x18>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    30e8:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    30ea:	0418      	br      	0x311a	// 311a <BT1IntHandler+0x46>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    30ec:	934c      	ld.w      	r2, (r3, 0x30)
+    30ee:	3102      	movi      	r1, 2
+    30f0:	6884      	and      	r2, r1
+    30f2:	3a40      	cmpnei      	r2, 0
+    30f4:	0c18      	bf      	0x3124	// 3124 <BT1IntHandler+0x50>
+		BT1->ICR = BT_CMP;
+    30f6:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    30f8:	1072      	lrw      	r3, 0x2000009c	// 3140 <BT1IntHandler+0x6c>
+    30fa:	8340      	ld.b      	r2, (r3, 0x0)
+    30fc:	2200      	addi      	r2, 1
+    30fe:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    3100:	9321      	ld.w      	r1, (r3, 0x4)
+    3102:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    3104:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    3106:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    3108:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    310a:	0c08      	bf      	0x311a	// 311a <BT1IntHandler+0x46>
+			NUM = 0;
+    310c:	3200      	movi      	r2, 0
+    310e:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    3110:	9342      	ld.w      	r2, (r3, 0x8)
+    3112:	2200      	addi      	r2, 1
+    3114:	b342      	st.w      	r2, (r3, 0x8)
+			BusIdle_Task();
+    3116:	e0000267 	bsr      	0x35e4	// 35e4 <BusIdle_Task>
+}
+    311a:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    311e:	1401      	addi      	r14, r14, 4
+    3120:	1463      	ipop
+    3122:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    3124:	934c      	ld.w      	r2, (r3, 0x30)
+    3126:	3104      	movi      	r1, 4
+    3128:	6884      	and      	r2, r1
+    312a:	3a40      	cmpnei      	r2, 0
+    312c:	0bde      	bt      	0x30e8	// 30e8 <BT1IntHandler+0x14>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    312e:	934c      	ld.w      	r2, (r3, 0x30)
+    3130:	3108      	movi      	r1, 8
+    3132:	6884      	and      	r2, r1
+    3134:	3a40      	cmpnei      	r2, 0
+    3136:	0bd9      	bt      	0x30e8	// 30e8 <BT1IntHandler+0x14>
+    3138:	07f1      	br      	0x311a	// 311a <BT1IntHandler+0x46>
+    313a:	0000      	bkpt
+    313c:	20000008 	.long	0x20000008
+    3140:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00003144 <PriviledgeVioHandler>:
+    3144:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00003146 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    3146:	1460      	nie
+    3148:	1462      	ipush
+    // ISR content ...
+
+}
+    314a:	1463      	ipop
+    314c:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+0000314e <Trap3Handler>:
+    314e:	1460      	nie
+    3150:	1462      	ipush
+    3152:	1463      	ipop
+    3154:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+00003156 <Trap2Handler>:
+    3156:	1460      	nie
+    3158:	1462      	ipush
+    315a:	1463      	ipop
+    315c:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+0000315e <Trap1Handler>:
+    315e:	1460      	nie
+    3160:	1462      	ipush
+    3162:	1463      	ipop
+    3164:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+00003166 <Trap0Handler>:
+    3166:	1460      	nie
+    3168:	1462      	ipush
+    316a:	1463      	ipop
+    316c:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+0000316e <UnrecExecpHandler>:
+    316e:	1460      	nie
+    3170:	1462      	ipush
+    3172:	1463      	ipop
+    3174:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+00003176 <BreakPointHandler>:
+    3176:	1460      	nie
+    3178:	1462      	ipush
+    317a:	1463      	ipop
+    317c:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+0000317e <AccessErrHandler>:
+    317e:	1460      	nie
+    3180:	1462      	ipush
+    3182:	1463      	ipop
+    3184:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+00003186 <IllegalInstrHandler>:
+    3186:	1460      	nie
+    3188:	1462      	ipush
+    318a:	1463      	ipop
+    318c:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+0000318e <MisalignedHandler>:
+    318e:	1460      	nie
+    3190:	1462      	ipush
+    3192:	1463      	ipop
+    3194:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+00003196 <CNTAIntHandler>:
+    3196:	1460      	nie
+    3198:	1462      	ipush
+    319a:	1463      	ipop
+    319c:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+0000319e <I2CIntHandler>:
+    319e:	1460      	nie
+    31a0:	1462      	ipush
+    31a2:	1463      	ipop
+    31a4:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000031a8 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    31a8:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    31aa:	c0006023 	mfcr      	r3, cr<0, 0>
+    31ae:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    31b2:	1046      	lrw      	r2, 0x20000000	// 31c8 <__divsi3+0x20>
+    31b4:	3400      	movi      	r4, 0
+    31b6:	9240      	ld.w      	r2, (r2, 0x0)
+    31b8:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    31ba:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    31bc:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    31be:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    31c0:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    31c4:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    31c6:	1481      	pop      	r4
+    31c8:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+000031cc <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    31cc:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    31ce:	c0006023 	mfcr      	r3, cr<0, 0>
+    31d2:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    31d6:	1046      	lrw      	r2, 0x20000000	// 31ec <__udivsi3+0x20>
+    31d8:	3401      	movi      	r4, 1
+    31da:	9240      	ld.w      	r2, (r2, 0x0)
+    31dc:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    31de:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    31e0:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    31e2:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    31e4:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    31e8:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    31ea:	1481      	pop      	r4
+    31ec:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+000031f0 <__umodsi3>:
+					);	
+	return HWD->REMAIN;
+}
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    31f0:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    31f2:	c0006023 	mfcr      	r3, cr<0, 0>
+    31f6:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    31fa:	1046      	lrw      	r2, 0x20000000	// 3210 <__umodsi3+0x20>
+    31fc:	3401      	movi      	r4, 1
+    31fe:	9240      	ld.w      	r2, (r2, 0x0)
+    3200:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    3202:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    3204:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    3206:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    3208:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    320c:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    320e:	1481      	pop      	r4
+    3210:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00003214 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    3214:	c1807420 	psrset      	ee, ie
+}
+    3218:	783c      	jmp      	r15
+
+Disassembly of section .text.CK_CPU_DisAllNormalIrq:
+
+0000321a <CK_CPU_DisAllNormalIrq>:
+
+void CK_CPU_DisAllNormalIrq(void)
+{
+ asm  ("psrclr ie");
+    321a:	c0807020 	psrclr      	ie
+}
+    321e:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00003220 <UARTx_Init>:
+UART_t g_uart;		//空间不足，只能用一个串口
+UART_t g_uart1;		//空间不足，只能用一个串口
+MULIT_t m_send;	
+
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    3220:	14d1      	push      	r4, r15
+	switch((U8_T)uart_id){
+    3222:	7400      	zextb      	r0, r0
+    3224:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    3226:	6d07      	mov      	r4, r1
+	switch((U8_T)uart_id){
+    3228:	0c13      	bf      	0x324e	// 324e <UARTx_Init+0x2e>
+    322a:	3840      	cmpnei      	r0, 0
+    322c:	0c04      	bf      	0x3234	// 3234 <UARTx_Init+0x14>
+    322e:	3842      	cmpnei      	r0, 2
+    3230:	0c7f      	bf      	0x332e	// 332e <UARTx_Init+0x10e>
+//			GPIO_DriveStrength_EN(GPIOB0,3);
+//			GPIO_Write_Low(GPIOB0,3);
+
+			break;
+	}
+}
+    3232:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    3234:	e3fff8f4 	bsr      	0x241c	// 241c <UART0_DeInit>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    3238:	3100      	movi      	r1, 0
+    323a:	3000      	movi      	r0, 0
+    323c:	e3fff930 	bsr      	0x249c	// 249c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART0,5000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    3240:	1263      	lrw      	r3, 0x20000040	// 334c <UARTx_Init+0x12c>
+    3242:	3200      	movi      	r2, 0
+    3244:	9300      	ld.w      	r0, (r3, 0x0)
+    3246:	1223      	lrw      	r1, 0x1388	// 3350 <UARTx_Init+0x130>
+    3248:	e3fff9a0 	bsr      	0x2588	// 2588 <UARTInitRxTxIntEn>
+			break;
+    324c:	07f3      	br      	0x3232	// 3232 <UARTx_Init+0x12>
+			memset(&g_uart1,0,sizeof(UART_t));
+    324e:	32a0      	movi      	r2, 160
+    3250:	3100      	movi      	r1, 0
+    3252:	1201      	lrw      	r0, 0x20000218	// 3354 <UARTx_Init+0x134>
+    3254:	e3fff394 	bsr      	0x197c	// 197c <__memset_fast>
+			memset(&m_send,0,sizeof(MULIT_t));
+    3258:	32a4      	movi      	r2, 164
+    325a:	3100      	movi      	r1, 0
+    325c:	111f      	lrw      	r0, 0x200002b8	// 3358 <UARTx_Init+0x138>
+    325e:	e3fff38f 	bsr      	0x197c	// 197c <__memset_fast>
+			g_uart1.RecvTimeout = Recv_9600_TimeOut;
+    3262:	117f      	lrw      	r3, 0x20000298	// 335c <UARTx_Init+0x13c>
+    3264:	3203      	movi      	r2, 3
+    3266:	b345      	st.w      	r2, (r3, 0x14)
+			g_uart1.processing_cf = prt_cf;
+    3268:	b387      	st.w      	r4, (r3, 0x1c)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    326a:	310f      	movi      	r1, 15
+			m_send.BusState_Tick = SysTick_1ms;
+    326c:	117d      	lrw      	r3, 0x200000a4	// 3360 <UARTx_Init+0x140>
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    326e:	119e      	lrw      	r4, 0x2000004c	// 3364 <UARTx_Init+0x144>
+			m_send.BusState_Tick = SysTick_1ms;
+    3270:	9340      	ld.w      	r2, (r3, 0x0)
+    3272:	117e      	lrw      	r3, 0x20000338	// 3368 <UARTx_Init+0x148>
+    3274:	b346      	st.w      	r2, (r3, 0x18)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    3276:	9400      	ld.w      	r0, (r4, 0x0)
+			m_send.HighBit_Flag = 0x01;			
+    3278:	3201      	movi      	r2, 1
+    327a:	a341      	st.b      	r2, (r3, 0x1)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    327c:	e3fff640 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+			GPIO_IntGroup_Set(PA0,15,Selete_EXI_PIN15); 					//EXI0 set PB0.2
+    3280:	320f      	movi      	r2, 15
+    3282:	310f      	movi      	r1, 15
+    3284:	3000      	movi      	r0, 0
+    3286:	e3fff64d 	bsr      	0x1f20	// 1f20 <GPIO_IntGroup_Set>
+			GPIOA0_EXI_Init(EXI15); 										//PB0.2 as input
+    328a:	300f      	movi      	r0, 15
+    328c:	e3fff6d0 	bsr      	0x202c	// 202c <GPIOA0_EXI_Init>
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIFT); 					//ENABLE falling edge
+    3290:	3180      	movi      	r1, 128
+    3292:	3201      	movi      	r2, 1
+    3294:	4128      	lsli      	r1, r1, 8
+    3296:	3001      	movi      	r0, 1
+    3298:	e3fff548 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIRT);
+    329c:	3180      	movi      	r1, 128
+    329e:	3200      	movi      	r2, 0
+    32a0:	4128      	lsli      	r1, r1, 8
+    32a2:	3001      	movi      	r0, 1
+    32a4:	e3fff542 	bsr      	0x1d28	// 1d28 <EXTI_trigger_CMD>
+			EXTI_interrupt_CMD(ENABLE,EXI_PIN15); 						//enable EXI
+    32a8:	3180      	movi      	r1, 128
+    32aa:	4128      	lsli      	r1, r1, 8
+    32ac:	3001      	movi      	r0, 1
+    32ae:	e3fff55d 	bsr      	0x1d68	// 1d68 <EXTI_interrupt_CMD>
+			GPIO_EXTI_interrupt(GPIOA0,0b1000000000000000); 			//enable GPIOB02 as EXI
+    32b2:	3180      	movi      	r1, 128
+    32b4:	9400      	ld.w      	r0, (r4, 0x0)
+    32b6:	4128      	lsli      	r1, r1, 8
+    32b8:	e3fff572 	bsr      	0x1d9c	// 1d9c <GPIO_EXTI_interrupt>
+			EXI4_Int_Enable(); 			
+    32bc:	e3fff572 	bsr      	0x1da0	// 1da0 <EXI4_Int_Enable>
+			UART1_DeInit();                                                 //clear all UART Register
+    32c0:	e3fff8ba 	bsr      	0x2434	// 2434 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    32c4:	3102      	movi      	r1, 2
+    32c6:	3001      	movi      	r0, 1
+    32c8:	e3fff8ea 	bsr      	0x249c	// 249c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART1,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    32cc:	1168      	lrw      	r3, 0x2000003c	// 336c <UARTx_Init+0x14c>
+    32ce:	3200      	movi      	r2, 0
+    32d0:	9300      	ld.w      	r0, (r3, 0x0)
+    32d2:	1120      	lrw      	r1, 0x1388	// 3350 <UARTx_Init+0x130>
+    32d4:	e3fff95a 	bsr      	0x2588	// 2588 <UARTInitRxTxIntEn>
+			UART1_Int_Enable();
+    32d8:	e3fff8c6 	bsr      	0x2464	// 2464 <UART1_Int_Enable>
+			GPIO_Init(GPIOA0,LED_TX_PIN,Output);
+    32dc:	9400      	ld.w      	r0, (r4, 0x0)
+    32de:	3200      	movi      	r2, 0
+    32e0:	3100      	movi      	r1, 0
+    32e2:	e3fff59d 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			GPIO_Init(GPIOA0,LED_RX_PIN,Output);			
+    32e6:	9400      	ld.w      	r0, (r4, 0x0)
+    32e8:	3200      	movi      	r2, 0
+    32ea:	3101      	movi      	r1, 1
+    32ec:	e3fff598 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			GPIO_Init(GPIOA0,LED_STATUS_PIN,Output);
+    32f0:	3200      	movi      	r2, 0
+    32f2:	9400      	ld.w      	r0, (r4, 0x0)
+    32f4:	3104      	movi      	r1, 4
+    32f6:	e3fff593 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			TX_LED_OFF;
+    32fa:	9400      	ld.w      	r0, (r4, 0x0)
+    32fc:	3100      	movi      	r1, 0
+    32fe:	e3fff715 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+			RX_LED_OFF;
+    3302:	9400      	ld.w      	r0, (r4, 0x0)
+    3304:	3101      	movi      	r1, 1
+    3306:	e3fff711 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+			STATUS_LED_ON;
+    330a:	9400      	ld.w      	r0, (r4, 0x0)
+    330c:	3104      	movi      	r1, 4
+    330e:	e3fff711 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+			GPIO_Init(GPIOA0,UART485_DR_PIN,Output);
+    3312:	3200      	movi      	r2, 0
+    3314:	9400      	ld.w      	r0, (r4, 0x0)
+    3316:	3107      	movi      	r1, 7
+    3318:	e3fff582 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOA0,UART485_DR_PIN);
+    331c:	9400      	ld.w      	r0, (r4, 0x0)
+    331e:	3107      	movi      	r1, 7
+    3320:	e3fff5f8 	bsr      	0x1f10	// 1f10 <GPIO_DriveStrength_EN>
+			WRITE_LOW_DR;
+    3324:	9400      	ld.w      	r0, (r4, 0x0)
+    3326:	3107      	movi      	r1, 7
+    3328:	e3fff704 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+			break;
+    332c:	0783      	br      	0x3232	// 3232 <UARTx_Init+0x12>
+			UART2_DeInit();                                                 //clear all UART Register
+    332e:	e3fff88f 	bsr      	0x244c	// 244c <UART2_DeInit>
+			UART_IO_Init(IO_UART2,2);                                    	//use PB0.4->RXD1, PB0.5->TXD1
+    3332:	3102      	movi      	r1, 2
+    3334:	3002      	movi      	r0, 2
+    3336:	e3fff8b3 	bsr      	0x249c	// 249c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    333a:	106e      	lrw      	r3, 0x20000038	// 3370 <UARTx_Init+0x150>
+    333c:	3200      	movi      	r2, 0
+    333e:	9300      	ld.w      	r0, (r3, 0x0)
+    3340:	1024      	lrw      	r1, 0x1388	// 3350 <UARTx_Init+0x130>
+    3342:	e3fff923 	bsr      	0x2588	// 2588 <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    3346:	e3fff89d 	bsr      	0x2480	// 2480 <UART2_Int_Enable>
+}
+    334a:	0774      	br      	0x3232	// 3232 <UARTx_Init+0x12>
+    334c:	20000040 	.long	0x20000040
+    3350:	00001388 	.long	0x00001388
+    3354:	20000218 	.long	0x20000218
+    3358:	200002b8 	.long	0x200002b8
+    335c:	20000298 	.long	0x20000298
+    3360:	200000a4 	.long	0x200000a4
+    3364:	2000004c 	.long	0x2000004c
+    3368:	20000338 	.long	0x20000338
+    336c:	2000003c 	.long	0x2000003c
+    3370:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART1_RecvINT_Processing:
+
+00003374 <UART1_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART1_RecvINT_Processing 
+* Description    : 串口1 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART1_RecvINT_Processing(char data){
+    3374:	14d0      	push      	r15
+	if((g_uart1.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart1.RecvLen = 0;
+    3376:	106d      	lrw      	r3, 0x20000298	// 33a8 <UART1_RecvINT_Processing+0x34>
+    3378:	8b28      	ld.h      	r1, (r3, 0x10)
+    337a:	3244      	movi      	r2, 68
+    337c:	6449      	cmplt      	r2, r1
+    337e:	0c03      	bf      	0x3384	// 3384 <UART1_RecvINT_Processing+0x10>
+    3380:	3200      	movi      	r2, 0
+    3382:	ab48      	st.h      	r2, (r3, 0x10)
+	g_uart1.RecvBuffer[g_uart1.RecvLen++] = (U8_T)data;
+    3384:	8b48      	ld.h      	r2, (r3, 0x10)
+    3386:	5a22      	addi      	r1, r2, 1
+    3388:	ab28      	st.h      	r1, (r3, 0x10)
+    338a:	1029      	lrw      	r1, 0x20000218	// 33ac <UART1_RecvINT_Processing+0x38>
+    338c:	6084      	addu      	r2, r1
+    338e:	a200      	st.b      	r0, (r2, 0x0)
+	
+	g_uart1.RecvIdleTiming = SysTick_1ms;
+	g_uart1.Receiving = 0x01;
+	
+	RX_LED_ON;
+    3390:	3101      	movi      	r1, 1
+	g_uart1.RecvIdleTiming = SysTick_1ms;
+    3392:	1048      	lrw      	r2, 0x200000a4	// 33b0 <UART1_RecvINT_Processing+0x3c>
+    3394:	9240      	ld.w      	r2, (r2, 0x0)
+    3396:	b346      	st.w      	r2, (r3, 0x18)
+	g_uart1.Receiving = 0x01;
+    3398:	3201      	movi      	r2, 1
+    339a:	a34c      	st.b      	r2, (r3, 0xc)
+	RX_LED_ON;
+    339c:	1066      	lrw      	r3, 0x2000004c	// 33b4 <UART1_RecvINT_Processing+0x40>
+    339e:	9300      	ld.w      	r0, (r3, 0x0)
+    33a0:	e3fff6c8 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+}
+    33a4:	1490      	pop      	r15
+    33a6:	0000      	bkpt
+    33a8:	20000298 	.long	0x20000298
+    33ac:	20000218 	.long	0x20000218
+    33b0:	200000a4 	.long	0x200000a4
+    33b4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.UART1_TASK:
+
+000033b8 <UART1_TASK>:
+
+void UART1_TASK(void){
+    33b8:	14d2      	push      	r4-r5, r15
+	U8_T rev = 0xFF;	
+	if(g_uart1.Receiving == 0x01){
+    33ba:	1097      	lrw      	r4, 0x20000298	// 3414 <UART1_TASK+0x5c>
+    33bc:	846c      	ld.b      	r3, (r4, 0xc)
+    33be:	3b41      	cmpnei      	r3, 1
+    33c0:	0828      	bt      	0x3410	// 3410 <UART1_TASK+0x58>
+		if(SysTick_1ms - g_uart1.RecvIdleTiming > g_uart1.RecvTimeout){
+    33c2:	10b6      	lrw      	r5, 0x200000a4	// 3418 <UART1_TASK+0x60>
+    33c4:	9560      	ld.w      	r3, (r5, 0x0)
+    33c6:	9446      	ld.w      	r2, (r4, 0x18)
+    33c8:	60ca      	subu      	r3, r2
+    33ca:	9445      	ld.w      	r2, (r4, 0x14)
+    33cc:	64c8      	cmphs      	r2, r3
+    33ce:	0821      	bt      	0x3410	// 3410 <UART1_TASK+0x58>
+			
+			SYSCON_Int_Disable();					//2025-03-19,复制接收缓冲到数据处理缓冲内
+    33d0:	e3fff4f6 	bsr      	0x1dbc	// 1dbc <SYSCON_Int_Disable>
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+    33d4:	9560      	ld.w      	r3, (r5, 0x0)
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+    33d6:	8c48      	ld.h      	r2, (r4, 0x10)
+    33d8:	1031      	lrw      	r1, 0x20000218	// 341c <UART1_TASK+0x64>
+    33da:	1012      	lrw      	r0, 0x2000025e	// 3420 <UART1_TASK+0x68>
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+    33dc:	b466      	st.w      	r3, (r4, 0x18)
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+    33de:	e3fff313 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+			g_uart1.DealLen = g_uart1.RecvLen;
+    33e2:	8c68      	ld.h      	r3, (r4, 0x10)
+    33e4:	ac67      	st.h      	r3, (r4, 0xe)
+			g_uart1.RecvLen = 0;
+    33e6:	3300      	movi      	r3, 0
+    33e8:	ac68      	st.h      	r3, (r4, 0x10)
+			g_uart1.Receiving = 0;
+    33ea:	a46c      	st.b      	r3, (r4, 0xc)
+			SYSCON_Int_Enable();
+    33ec:	e3fff4e2 	bsr      	0x1db0	// 1db0 <SYSCON_Int_Enable>
+
+#if DBG_LOG_EN
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART1 recv Len %d", g_uart1.DealLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART1 buff",g_uart1.DealBuffer,g_uart1.DealLen);
+#endif
+			if(g_uart1.processing_cf != NULL){
+    33f0:	9467      	ld.w      	r3, (r4, 0x1c)
+    33f2:	3b40      	cmpnei      	r3, 0
+    33f4:	0c04      	bf      	0x33fc	// 33fc <UART1_TASK+0x44>
+                rev = g_uart1.processing_cf(g_uart1.DealBuffer,g_uart1.DealLen);
+    33f6:	8c27      	ld.h      	r1, (r4, 0xe)
+    33f8:	100a      	lrw      	r0, 0x2000025e	// 3420 <UART1_TASK+0x68>
+    33fa:	7bcd      	jsr      	r3
+            }
+
+
+			RX_LED_OFF;
+    33fc:	106a      	lrw      	r3, 0x2000004c	// 3424 <UART1_TASK+0x6c>
+    33fe:	3101      	movi      	r1, 1
+    3400:	9300      	ld.w      	r0, (r3, 0x0)
+    3402:	e3fff693 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+			memset(g_uart1.DealBuffer,0,USART_BUFFER_SIZE);	
+    3406:	3246      	movi      	r2, 70
+    3408:	3100      	movi      	r1, 0
+    340a:	1006      	lrw      	r0, 0x2000025e	// 3420 <UART1_TASK+0x68>
+    340c:	e3fff2b8 	bsr      	0x197c	// 197c <__memset_fast>
+		}
+	}
+}
+    3410:	1492      	pop      	r4-r5, r15
+    3412:	0000      	bkpt
+    3414:	20000298 	.long	0x20000298
+    3418:	200000a4 	.long	0x200000a4
+    341c:	20000218 	.long	0x20000218
+    3420:	2000025e 	.long	0x2000025e
+    3424:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.BUS485_Send:
+
+00003428 <BUS485_Send>:
+ * 			buff:发送数据
+ * 			len：数据长度
+ * @retval 	
+ * */
+U8_T BUS485_Send(U8_T *buff,U16_T len)
+{
+    3428:	14d4      	push      	r4-r7, r15
+    342a:	1423      	subi      	r14, r14, 12
+    342c:	b802      	st.w      	r0, (r14, 0x8)
+    342e:	b821      	st.w      	r1, (r14, 0x4)
+	unsigned int Dataval = 0,delay_cnt = 0;
+    3430:	3600      	movi      	r6, 0
+
+	//等待通讯发送完成
+	while(RS485_Comming == 0x01){
+    3432:	118d      	lrw      	r4, 0x200000a8	// 34e4 <BUS485_Send+0xbc>
+		delay_cnt ++;
+		if(delay_cnt >= 100){
+			break;
+		}
+		
+		REVERISE_DR;	//485_DR
+    3434:	11ad      	lrw      	r5, 0x2000004c	// 34e8 <BUS485_Send+0xc0>
+	while(RS485_Comming == 0x01){
+    3436:	9460      	ld.w      	r3, (r4, 0x0)
+    3438:	3b41      	cmpnei      	r3, 1
+    343a:	0c47      	bf      	0x34c8	// 34c8 <BUS485_Send+0xa0>
+	}
+
+	if(m_send.BusState_Flag == UART_BUSIDLE){	//总线空闲
+    343c:	116c      	lrw      	r3, 0x20000338	// 34ec <BUS485_Send+0xc4>
+    343e:	83e0      	ld.b      	r7, (r3, 0x0)
+    3440:	3f40      	cmpnei      	r7, 0
+    3442:	b860      	st.w      	r3, (r14, 0x0)
+    3444:	084e      	bt      	0x34e0	// 34e0 <BUS485_Send+0xb8>
+		
+		TX_LED_ON;
+    3446:	11a9      	lrw      	r5, 0x2000004c	// 34e8 <BUS485_Send+0xc0>
+    3448:	3100      	movi      	r1, 0
+    344a:	9500      	ld.w      	r0, (r5, 0x0)
+    344c:	e3fff672 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+		CK_CPU_DisAllNormalIrq();	
+    3450:	e3fffee5 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+		
+		WRITE_HIGH_DR;	//485_DR
+    3454:	3107      	movi      	r1, 7
+    3456:	9500      	ld.w      	r0, (r5, 0x0)
+    3458:	e3fff668 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+		
+		RS485_Comm_Flag = 0x01;
+    345c:	3301      	movi      	r3, 1
+    345e:	b461      	st.w      	r3, (r4, 0x4)
+		RS485_Comm_Start = 0x00;
+		RS485_Comm_End = 0x00;		
+		
+		m_send.BusState_Flag = UART_BUSBUSY;//发送前总线置位繁忙
+    3460:	3201      	movi      	r2, 1
+    3462:	9860      	ld.w      	r3, (r14, 0x0)
+    3464:	a340      	st.b      	r2, (r3, 0x0)
+		m_send.BUSBUSY_LOCK = 0x01;			//锁定总线状态
+    3466:	a342      	st.b      	r2, (r3, 0x2)
+		RS485_Comm_Start = 0x00;
+    3468:	b4e2      	st.w      	r7, (r4, 0x8)
+		RS485_Comm_End = 0x00;		
+    346a:	b4e3      	st.w      	r7, (r4, 0xc)
+
+		CK_CPU_EnAllNormalIrq();		
+    346c:	e3fffed4 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+		
+		UARTTransmit(UART1,buff,len);
+    3470:	1160      	lrw      	r3, 0x2000003c	// 34f0 <BUS485_Send+0xc8>
+    3472:	9300      	ld.w      	r0, (r3, 0x0)
+    3474:	9841      	ld.w      	r2, (r14, 0x4)
+    3476:	9822      	ld.w      	r1, (r14, 0x8)
+    3478:	e3fff890 	bsr      	0x2598	// 2598 <UARTTransmit>
+		do{
+			delay_nus(100);
+    347c:	3064      	movi      	r0, 100
+    347e:	e3fff943 	bsr      	0x2704	// 2704 <delay_nus>
+			delay_cnt ++;
+    3482:	2600      	addi      	r6, 1
+			if(delay_cnt >= 100){
+    3484:	3363      	movi      	r3, 99
+    3486:	658c      	cmphs      	r3, r6
+    3488:	0c08      	bf      	0x3498	// 3498 <BUS485_Send+0x70>
+				break;
+			}
+			
+		}while((RS485_Comm_Start < len) || (RS485_Comm_End < len));    //发送完成
+    348a:	9462      	ld.w      	r3, (r4, 0x8)
+    348c:	9841      	ld.w      	r2, (r14, 0x4)
+    348e:	648d      	cmplt      	r3, r2
+    3490:	0bf6      	bt      	0x347c	// 347c <BUS485_Send+0x54>
+    3492:	9463      	ld.w      	r3, (r4, 0xc)
+    3494:	648d      	cmplt      	r3, r2
+    3496:	0bf3      	bt      	0x347c	// 347c <BUS485_Send+0x54>
+
+		CK_CPU_DisAllNormalIrq();	
+    3498:	e3fffec1 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+
+		WRITE_LOW_DR;	//485_DR
+    349c:	3107      	movi      	r1, 7
+    349e:	9500      	ld.w      	r0, (r5, 0x0)
+    34a0:	e3fff648 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+		
+		RS485_Comm_Flag = 0x00;			
+    34a4:	3300      	movi      	r3, 0
+    34a6:	b461      	st.w      	r3, (r4, 0x4)
+		
+		m_send.BusState_Tick = SysTick_1ms;
+    34a8:	9840      	ld.w      	r2, (r14, 0x0)
+    34aa:	1073      	lrw      	r3, 0x200000a4	// 34f4 <BUS485_Send+0xcc>
+    34ac:	9360      	ld.w      	r3, (r3, 0x0)
+    34ae:	b266      	st.w      	r3, (r2, 0x18)
+		m_send.BUSBUSY_LOCK = 0x00;			//解锁总线状态
+    34b0:	6ccb      	mov      	r3, r2
+    34b2:	3200      	movi      	r2, 0
+    34b4:	a342      	st.b      	r2, (r3, 0x2)
+		
+		CK_CPU_EnAllNormalIrq();			
+    34b6:	e3fffeaf 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+		
+		TX_LED_OFF;
+    34ba:	9500      	ld.w      	r0, (r5, 0x0)
+    34bc:	3100      	movi      	r1, 0
+    34be:	e3fff635 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+	{ 		
+		return UART_BUSBUSY;	//发送失败
+	}	
+	
+	return 0x02;		//传入状态无效
+}
+    34c2:	6c1f      	mov      	r0, r7
+    34c4:	1403      	addi      	r14, r14, 12
+    34c6:	1494      	pop      	r4-r7, r15
+		delay_nus(100);
+    34c8:	3064      	movi      	r0, 100
+    34ca:	e3fff91d 	bsr      	0x2704	// 2704 <delay_nus>
+		delay_cnt ++;
+    34ce:	2600      	addi      	r6, 1
+		if(delay_cnt >= 100){
+    34d0:	3364      	movi      	r3, 100
+    34d2:	64da      	cmpne      	r6, r3
+    34d4:	0fb4      	bf      	0x343c	// 343c <BUS485_Send+0x14>
+		REVERISE_DR;	//485_DR
+    34d6:	3107      	movi      	r1, 7
+    34d8:	9500      	ld.w      	r0, (r5, 0x0)
+    34da:	e3fff62f 	bsr      	0x2138	// 2138 <GPIO_Reverse>
+    34de:	07ac      	br      	0x3436	// 3436 <BUS485_Send+0xe>
+		return UART_BUSBUSY;	//发送失败
+    34e0:	3701      	movi      	r7, 1
+    34e2:	07f0      	br      	0x34c2	// 34c2 <BUS485_Send+0x9a>
+    34e4:	200000a8 	.long	0x200000a8
+    34e8:	2000004c 	.long	0x2000004c
+    34ec:	20000338 	.long	0x20000338
+    34f0:	2000003c 	.long	0x2000003c
+    34f4:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.MultSend_Task:
+
+000034f8 <MultSend_Task>:
+ * 			DatSd：发送标记,0x00:无发送，0x01：有数据发送
+ * 
+ * @retval 	0x00:发送成功	0x01:等待发送	0x02:数据无效
+ * */
+U8_T MultSend_Task(U8_T *buff,U16_T len,U8_T DatSd)
+{
+    34f8:	14d3      	push      	r4-r6, r15
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+    34fa:	5963      	subi      	r3, r1, 1
+    34fc:	74cd      	zexth      	r3, r3
+    34fe:	347f      	movi      	r4, 127
+    3500:	64d0      	cmphs      	r4, r3
+    3502:	0c23      	bf      	0x3548	// 3548 <MultSend_Task+0x50>
+	
+	if(DatSd == 0x01)	
+    3504:	3a41      	cmpnei      	r2, 1
+    3506:	0c03      	bf      	0x350c	// 350c <MultSend_Task+0x14>
+		}else{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"retry end,%d",m_send.ResendCnt );
+			return RETRY_END;//没有重发次数
+		}
+	}
+	return BUSSEND_WAIT;//等待
+    3508:	3001      	movi      	r0, 1
+}
+    350a:	1493      	pop      	r4-r6, r15
+		if( m_send.ResendCnt < m_send.TotalCnt)	//判断数据是否还在有效期，是否还有发送次数
+    350c:	1092      	lrw      	r4, 0x20000338	// 3554 <MultSend_Task+0x5c>
+    350e:	8444      	ld.b      	r2, (r4, 0x4)
+    3510:	8466      	ld.b      	r3, (r4, 0x6)
+    3512:	64c8      	cmphs      	r2, r3
+    3514:	081c      	bt      	0x354c	// 354c <MultSend_Task+0x54>
+			if(SysTick_1ms - m_send.BusbusyTimeout < m_send.DataValid_Time)
+    3516:	10b1      	lrw      	r5, 0x200000a4	// 3558 <MultSend_Task+0x60>
+    3518:	9560      	ld.w      	r3, (r5, 0x0)
+    351a:	94c8      	ld.w      	r6, (r4, 0x20)
+    351c:	60da      	subu      	r3, r6
+    351e:	94c5      	ld.w      	r6, (r4, 0x14)
+    3520:	658c      	cmphs      	r3, r6
+    3522:	0817      	bt      	0x3550	// 3550 <MultSend_Task+0x58>
+				if((m_send.ResendCnt == 0x00)||(SysTick_1ms - m_send.ASend_Tick >= m_send.DataWait_Time)){//数据发送间隔
+    3524:	3a40      	cmpnei      	r2, 0
+    3526:	0c07      	bf      	0x3534	// 3534 <MultSend_Task+0x3c>
+    3528:	9447      	ld.w      	r2, (r4, 0x1c)
+    352a:	9560      	ld.w      	r3, (r5, 0x0)
+    352c:	60ca      	subu      	r3, r2
+    352e:	9444      	ld.w      	r2, (r4, 0x10)
+    3530:	648c      	cmphs      	r3, r2
+    3532:	0feb      	bf      	0x3508	// 3508 <MultSend_Task+0x10>
+					if(BUS485_Send(buff,len) == UART_BUSIDLE){	//发送数据
+    3534:	e3ffff7a 	bsr      	0x3428	// 3428 <BUS485_Send>
+    3538:	3840      	cmpnei      	r0, 0
+    353a:	0be7      	bt      	0x3508	// 3508 <MultSend_Task+0x10>
+						m_send.ASend_Tick = SysTick_1ms;
+    353c:	9560      	ld.w      	r3, (r5, 0x0)
+    353e:	b467      	st.w      	r3, (r4, 0x1c)
+						m_send.ResendCnt++;
+    3540:	8464      	ld.b      	r3, (r4, 0x4)
+    3542:	2300      	addi      	r3, 1
+    3544:	a464      	st.b      	r3, (r4, 0x4)
+    3546:	07e2      	br      	0x350a	// 350a <MultSend_Task+0x12>
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+    3548:	3004      	movi      	r0, 4
+    354a:	07e0      	br      	0x350a	// 350a <MultSend_Task+0x12>
+			return RETRY_END;//没有重发次数
+    354c:	3003      	movi      	r0, 3
+    354e:	07de      	br      	0x350a	// 350a <MultSend_Task+0x12>
+				return DATA_END;//数据有效期结束
+    3550:	3002      	movi      	r0, 2
+    3552:	07dc      	br      	0x350a	// 350a <MultSend_Task+0x12>
+    3554:	20000338 	.long	0x20000338
+    3558:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.Set_GroupSend:
+
+0000355c <Set_GroupSend>:
+ * 			indate ：	设置数据有效期
+ * 			tim_val :	发送时间间隔
+ * @retval 	None
+ * */
+void Set_GroupSend(U8_T *data,U16_T sled,U8_T SCnt,U32_T indate,U32_T tim_val)
+{
+    355c:	14d4      	push      	r4-r7, r15
+    355e:	1421      	subi      	r14, r14, 4
+    3560:	6dcf      	mov      	r7, r3
+    3562:	9866      	ld.w      	r3, (r14, 0x18)
+    3564:	b860      	st.w      	r3, (r14, 0x0)
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    3566:	5963      	subi      	r3, r1, 1
+{
+    3568:	6d4b      	mov      	r5, r2
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    356a:	74cd      	zexth      	r3, r3
+    356c:	327f      	movi      	r2, 127
+    356e:	64c8      	cmphs      	r2, r3
+{
+    3570:	6d83      	mov      	r6, r0
+    3572:	6d07      	mov      	r4, r1
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    3574:	0c19      	bf      	0x35a6	// 35a6 <Set_GroupSend+0x4a>
+	
+	memset(m_send.SendBuffer,0, USART_SEND_SIZE);
+    3576:	3280      	movi      	r2, 128
+    3578:	3100      	movi      	r1, 0
+    357a:	100d      	lrw      	r0, 0x200002b8	// 35ac <Set_GroupSend+0x50>
+    357c:	e3fff200 	bsr      	0x197c	// 197c <__memset_fast>
+	memcpy(m_send.SendBuffer,data,sled);
+    3580:	6c93      	mov      	r2, r4
+    3582:	6c5b      	mov      	r1, r6
+    3584:	100a      	lrw      	r0, 0x200002b8	// 35ac <Set_GroupSend+0x50>
+    3586:	e3fff23f 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+	m_send.SendLen = sled;
+    358a:	106a      	lrw      	r3, 0x20000338	// 35b0 <Set_GroupSend+0x54>
+	
+	m_send.DataValid_Time = indate;//数据有效期
+	m_send.TotalCnt = SCnt;			//数据发送次数
+	m_send.DataWait_Time = tim_val;//发送数据间隔
+    358c:	9840      	ld.w      	r2, (r14, 0x0)
+    358e:	b344      	st.w      	r2, (r3, 0x10)
+	
+	m_send.ASend_Flag = 0x01;
+    3590:	3201      	movi      	r2, 1
+    3592:	a345      	st.b      	r2, (r3, 0x5)
+	m_send.SendState = BUSSEND_WAIT;
+    3594:	a343      	st.b      	r2, (r3, 0x3)
+	m_send.ResendCnt = 0x00;
+    3596:	3200      	movi      	r2, 0
+    3598:	a344      	st.b      	r2, (r3, 0x4)
+	m_send.SendLen = sled;
+    359a:	ab85      	st.h      	r4, (r3, 0xa)
+	m_send.DataValid_Time = indate;//数据有效期
+    359c:	b3e5      	st.w      	r7, (r3, 0x14)
+	m_send.TotalCnt = SCnt;			//数据发送次数
+    359e:	a3a6      	st.b      	r5, (r3, 0x6)
+	m_send.BusbusyTimeout = SysTick_1ms;
+    35a0:	1045      	lrw      	r2, 0x200000a4	// 35b4 <Set_GroupSend+0x58>
+    35a2:	9240      	ld.w      	r2, (r2, 0x0)
+    35a4:	b348      	st.w      	r2, (r3, 0x20)
+}
+    35a6:	1401      	addi      	r14, r14, 4
+    35a8:	1494      	pop      	r4-r7, r15
+    35aa:	0000      	bkpt
+    35ac:	200002b8 	.long	0x200002b8
+    35b0:	20000338 	.long	0x20000338
+    35b4:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.BUS485Send_Task:
+
+000035b8 <BUS485Send_Task>:
+	m_send.Jump_Flag = jump;
+}
+
+//485发送任务
+void BUS485Send_Task(void)	//2025-03-29
+{	
+    35b8:	14d1      	push      	r4, r15
+	//空闲等待
+	if(m_send.ASend_Flag == 0x01)
+    35ba:	1089      	lrw      	r4, 0x20000338	// 35dc <BUS485Send_Task+0x24>
+    35bc:	8465      	ld.b      	r3, (r4, 0x5)
+    35be:	3b41      	cmpnei      	r3, 1
+    35c0:	080d      	bt      	0x35da	// 35da <BUS485Send_Task+0x22>
+	{
+		m_send.SendState = MultSend_Task(m_send.SendBuffer,m_send.SendLen,m_send.ASend_Flag);
+    35c2:	8c25      	ld.h      	r1, (r4, 0xa)
+    35c4:	3201      	movi      	r2, 1
+    35c6:	1007      	lrw      	r0, 0x200002b8	// 35e0 <BUS485Send_Task+0x28>
+    35c8:	e3ffff98 	bsr      	0x34f8	// 34f8 <MultSend_Task>
+    35cc:	a403      	st.b      	r0, (r4, 0x3)
+		
+		if( (m_send.SendState == DATA_END)||(m_send.SendState == RETRY_END) )//判断发送数据是否有效
+    35ce:	2801      	subi      	r0, 2
+    35d0:	7400      	zextb      	r0, r0
+    35d2:	3801      	cmphsi      	r0, 2
+    35d4:	0803      	bt      	0x35da	// 35da <BUS485Send_Task+0x22>
+		{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"send end");
+			
+			m_send.ASend_Flag = 0x00;		//清除发送标志位
+    35d6:	3300      	movi      	r3, 0
+    35d8:	a465      	st.b      	r3, (r4, 0x5)
+
+		}
+	}
+}
+    35da:	1491      	pop      	r4, r15
+    35dc:	20000338 	.long	0x20000338
+    35e0:	200002b8 	.long	0x200002b8
+
+Disassembly of section .text.BusIdle_Task:
+
+000035e4 <BusIdle_Task>:
+/**********************************************************
+ * @brief	2025-03-25，检测总线空闲，在定时器中断里调用
+ * @retval 	None
+ * */
+void BusIdle_Task(void)
+{
+    35e4:	14d1      	push      	r4, r15
+	if((m_send.BusState_Flag != UART_BUSIDLE)&&(m_send.BUSBUSY_LOCK != 0x01))
+    35e6:	108d      	lrw      	r4, 0x20000338	// 3618 <BusIdle_Task+0x34>
+    35e8:	8460      	ld.b      	r3, (r4, 0x0)
+    35ea:	3b40      	cmpnei      	r3, 0
+    35ec:	0c15      	bf      	0x3616	// 3616 <BusIdle_Task+0x32>
+    35ee:	8462      	ld.b      	r3, (r4, 0x2)
+    35f0:	3b41      	cmpnei      	r3, 1
+    35f2:	0c12      	bf      	0x3616	// 3616 <BusIdle_Task+0x32>
+	{
+		CK_CPU_DisAllNormalIrq();
+    35f4:	e3fffe13 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+		if( (m_send.HighBit_Flag == 0x01)&&(SysTick_1ms - m_send.BusState_Tick >= (6 + m_send.Bus_DelayTime)) )
+    35f8:	8461      	ld.b      	r3, (r4, 0x1)
+    35fa:	3b41      	cmpnei      	r3, 1
+    35fc:	080b      	bt      	0x3612	// 3612 <BusIdle_Task+0x2e>
+    35fe:	1068      	lrw      	r3, 0x200000a4	// 361c <BusIdle_Task+0x38>
+    3600:	9340      	ld.w      	r2, (r3, 0x0)
+    3602:	9466      	ld.w      	r3, (r4, 0x18)
+    3604:	608e      	subu      	r2, r3
+    3606:	9463      	ld.w      	r3, (r4, 0xc)
+    3608:	2305      	addi      	r3, 6
+    360a:	64c8      	cmphs      	r2, r3
+    360c:	0c03      	bf      	0x3612	// 3612 <BusIdle_Task+0x2e>
+		{
+			m_send.BusState_Flag = UART_BUSIDLE;
+    360e:	3300      	movi      	r3, 0
+    3610:	a460      	st.b      	r3, (r4, 0x0)
+		}	
+		CK_CPU_EnAllNormalIrq();
+    3612:	e3fffe01 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+	}
+}
+    3616:	1491      	pop      	r4, r15
+    3618:	20000338 	.long	0x20000338
+    361c:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.BusBusy_Task:
+
+00003620 <BusBusy_Task>:
+/*******************************************************************
+ * @brief	检测总线繁忙，在串口接收RX引脚的外部中断服务函数里调用
+ * @retval 	None
+ * */
+void BusBusy_Task(void)
+{
+    3620:	14d2      	push      	r4-r5, r15
+	CK_CPU_DisAllNormalIrq();
+    3622:	e3fffdfc 	bsr      	0x321a	// 321a <CK_CPU_DisAllNormalIrq>
+	m_send.BusState_Flag = UART_BUSBUSY;
+    3626:	1091      	lrw      	r4, 0x20000338	// 3668 <BusBusy_Task+0x48>
+    3628:	3301      	movi      	r3, 1
+    362a:	a460      	st.b      	r3, (r4, 0x0)
+	m_send.BusState_Tick = SysTick_1ms;
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    362c:	310a      	movi      	r1, 10
+	m_send.BusState_Tick = SysTick_1ms;
+    362e:	1070      	lrw      	r3, 0x200000a4	// 366c <BusBusy_Task+0x4c>
+
+	if(READ_RX_LEVEL_STATE == 0x01){
+    3630:	10b0      	lrw      	r5, 0x2000004c	// 3670 <BusBusy_Task+0x50>
+	m_send.BusState_Tick = SysTick_1ms;
+    3632:	9340      	ld.w      	r2, (r3, 0x0)
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    3634:	9300      	ld.w      	r0, (r3, 0x0)
+    3636:	9467      	ld.w      	r3, (r4, 0x1c)
+	m_send.BusState_Tick = SysTick_1ms;
+    3638:	b446      	st.w      	r2, (r4, 0x18)
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    363a:	600e      	subu      	r0, r3
+    363c:	e3fffdda 	bsr      	0x31f0	// 31f0 <__umodsi3>
+    3640:	b403      	st.w      	r0, (r4, 0xc)
+	if(READ_RX_LEVEL_STATE == 0x01){
+    3642:	310f      	movi      	r1, 15
+    3644:	9500      	ld.w      	r0, (r5, 0x0)
+    3646:	e3fff584 	bsr      	0x214e	// 214e <GPIO_Read_Status>
+    364a:	3841      	cmpnei      	r0, 1
+    364c:	0806      	bt      	0x3658	// 3658 <BusBusy_Task+0x38>
+		m_send.HighBit_Flag = 0x01;			//高电平标志置位
+    364e:	3301      	movi      	r3, 1
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+		m_send.HighBit_Flag = 0x00;			//低电平
+    3650:	a461      	st.b      	r3, (r4, 0x1)
+	}	
+	CK_CPU_EnAllNormalIrq();
+    3652:	e3fffde1 	bsr      	0x3214	// 3214 <CK_CPU_EnAllNormalIrq>
+}
+    3656:	1492      	pop      	r4-r5, r15
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+    3658:	9500      	ld.w      	r0, (r5, 0x0)
+    365a:	310f      	movi      	r1, 15
+    365c:	e3fff579 	bsr      	0x214e	// 214e <GPIO_Read_Status>
+    3660:	3840      	cmpnei      	r0, 0
+    3662:	0bf8      	bt      	0x3652	// 3652 <BusBusy_Task+0x32>
+		m_send.HighBit_Flag = 0x00;			//低电平
+    3664:	3300      	movi      	r3, 0
+    3666:	07f5      	br      	0x3650	// 3650 <BusBusy_Task+0x30>
+    3668:	20000338 	.long	0x20000338
+    366c:	200000a4 	.long	0x200000a4
+    3670:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.Dbg_Println:
+
+00003674 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    3674:	1423      	subi      	r14, r14, 12
+    3676:	b862      	st.w      	r3, (r14, 0x8)
+    3678:	b841      	st.w      	r2, (r14, 0x4)
+    367a:	b820      	st.w      	r1, (r14, 0x0)
+		
+		
+    }
+
+#endif	
+}
+    367c:	1403      	addi      	r14, r14, 12
+    367e:	783c      	jmp      	r15
+
+Disassembly of section .text.Dbg_Print_Buff:
+
+00003680 <Dbg_Print_Buff>:
+		
+		DBG_Printf("\r\n",2);
+    }
+
+#endif	
+}
+    3680:	783c      	jmp      	r15
+
+Disassembly of section .text.DIP_GetSwitchState:
+
+00003684 <DIP_GetSwitchState>:
+
+	/*进入设置界面 - 先决条件*/
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+}
+
+U8_T DIP_GetSwitchState(U8_T i){
+    3684:	14d0      	push      	r15
+	U8_T val = 0;
+	
+	switch (i)
+    3686:	3841      	cmpnei      	r0, 1
+    3688:	0c0d      	bf      	0x36a2	// 36a2 <DIP_GetSwitchState+0x1e>
+    368a:	3840      	cmpnei      	r0, 0
+    368c:	0c05      	bf      	0x3696	// 3696 <DIP_GetSwitchState+0x12>
+    368e:	3842      	cmpnei      	r0, 2
+    3690:	0c0d      	bf      	0x36aa	// 36aa <DIP_GetSwitchState+0x26>
+	U8_T val = 0;
+    3692:	3000      	movi      	r0, 0
+    3694:	0406      	br      	0x36a0	// 36a0 <DIP_GetSwitchState+0x1c>
+    {
+		case DIP_CH1:
+			val = GPIO_Read_Status(GPIOA0,10);
+    3696:	1068      	lrw      	r3, 0x2000004c	// 36b4 <DIP_GetSwitchState+0x30>
+    3698:	310a      	movi      	r1, 10
+    369a:	9300      	ld.w      	r0, (r3, 0x0)
+			break;
+		case DIP_CH2:
+			val = GPIO_Read_Status(GPIOA0,9);
+			break;
+		case DIP_CH3:
+			val = GPIO_Read_Status(GPIOA0,8);
+    369c:	e3fff559 	bsr      	0x214e	// 214e <GPIO_Read_Status>
+			break;
+
+    }
+    return val;
+}
+    36a0:	1490      	pop      	r15
+			val = GPIO_Read_Status(GPIOA0,9);
+    36a2:	1065      	lrw      	r3, 0x2000004c	// 36b4 <DIP_GetSwitchState+0x30>
+    36a4:	3109      	movi      	r1, 9
+    36a6:	9300      	ld.w      	r0, (r3, 0x0)
+    36a8:	07fa      	br      	0x369c	// 369c <DIP_GetSwitchState+0x18>
+			val = GPIO_Read_Status(GPIOA0,8);
+    36aa:	1063      	lrw      	r3, 0x2000004c	// 36b4 <DIP_GetSwitchState+0x30>
+    36ac:	3108      	movi      	r1, 8
+    36ae:	9300      	ld.w      	r0, (r3, 0x0)
+    36b0:	07f6      	br      	0x369c	// 369c <DIP_GetSwitchState+0x18>
+    36b2:	0000      	bkpt
+    36b4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.DIP_Switch_Init:
+
+000036b8 <DIP_Switch_Init>:
+void DIP_Switch_Init(void){
+    36b8:	14d2      	push      	r4-r5, r15
+	GPIO_Init(GPIOA0,10,Intput);
+    36ba:	1181      	lrw      	r4, 0x2000004c	// 373c <DIP_Switch_Init+0x84>
+    36bc:	3201      	movi      	r2, 1
+    36be:	9400      	ld.w      	r0, (r4, 0x0)
+    36c0:	310a      	movi      	r1, 10
+    36c2:	e3fff3ad 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_Init(GPIOA0,9,Intput);
+    36c6:	9400      	ld.w      	r0, (r4, 0x0)
+    36c8:	3201      	movi      	r2, 1
+    36ca:	3109      	movi      	r1, 9
+    36cc:	e3fff3a8 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_Init(GPIOA0,8,Intput);
+    36d0:	3201      	movi      	r2, 1
+    36d2:	9400      	ld.w      	r0, (r4, 0x0)
+    36d4:	3108      	movi      	r1, 8
+    36d6:	e3fff3a3 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,10);
+    36da:	9400      	ld.w      	r0, (r4, 0x0)
+    36dc:	310a      	movi      	r1, 10
+    36de:	e3fff40f 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+	GPIO_PullHigh_Init(GPIOA0,9);
+    36e2:	9400      	ld.w      	r0, (r4, 0x0)
+    36e4:	3109      	movi      	r1, 9
+    36e6:	e3fff40b 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+	GPIO_PullHigh_Init(GPIOA0,8);
+    36ea:	9400      	ld.w      	r0, (r4, 0x0)
+    36ec:	3108      	movi      	r1, 8
+    36ee:	e3fff407 	bsr      	0x1efc	// 1efc <GPIO_PullHigh_Init>
+	memset(&g_Dip,0,sizeof(DIP_t));
+    36f2:	3210      	movi      	r2, 16
+    36f4:	3100      	movi      	r1, 0
+    36f6:	1013      	lrw      	r0, 0x2000035c	// 3740 <DIP_Switch_Init+0x88>
+    36f8:	e3fff142 	bsr      	0x197c	// 197c <__memset_fast>
+	delay_nms(20);
+    36fc:	3014      	movi      	r0, 20
+    36fe:	e3fff7ed 	bsr      	0x26d8	// 26d8 <delay_nms>
+    3702:	3400      	movi      	r4, 0
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+    3704:	10af      	lrw      	r5, 0x2000035c	// 3740 <DIP_Switch_Init+0x88>
+		if(DIP_GetSwitchState(i) == DIP_PRESS){
+    3706:	7410      	zextb      	r0, r4
+    3708:	e3ffffbe 	bsr      	0x3684	// 3684 <DIP_GetSwitchState>
+    370c:	3840      	cmpnei      	r0, 0
+    370e:	0807      	bt      	0x371c	// 371c <DIP_Switch_Init+0x64>
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+    3710:	3301      	movi      	r3, 1
+    3712:	70d0      	lsl      	r3, r4
+    3714:	6c8f      	mov      	r2, r3
+    3716:	9562      	ld.w      	r3, (r5, 0x8)
+    3718:	6cc8      	or      	r3, r2
+    371a:	b562      	st.w      	r3, (r5, 0x8)
+    371c:	2400      	addi      	r4, 1
+	for (U8_T i = 0; i < DIP_CHN_MAX; i++) {
+    371e:	3c43      	cmpnei      	r4, 3
+    3720:	0bf3      	bt      	0x3706	// 3706 <DIP_Switch_Init+0x4e>
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    3722:	1068      	lrw      	r3, 0x2000035c	// 3740 <DIP_Switch_Init+0x88>
+	g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+    3724:	3107      	movi      	r1, 7
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    3726:	9342      	ld.w      	r2, (r3, 0x8)
+    3728:	b343      	st.w      	r2, (r3, 0xc)
+	g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+    372a:	6884      	and      	r2, r1
+    372c:	2213      	addi      	r2, 20
+    372e:	7488      	zextb      	r2, r2
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+    3730:	1025      	lrw      	r1, 0x4dbf	// 3744 <DIP_Switch_Init+0x8c>
+    3732:	3000      	movi      	r0, 0
+	g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+    3734:	a346      	st.b      	r2, (r3, 0x6)
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+    3736:	e3ffff9f 	bsr      	0x3674	// 3674 <Dbg_Println>
+}
+    373a:	1492      	pop      	r4-r5, r15
+    373c:	2000004c 	.long	0x2000004c
+    3740:	2000035c 	.long	0x2000035c
+    3744:	00004dbf 	.long	0x00004dbf
+
+Disassembly of section .text.DIP_ScanTask:
+
+00003748 <DIP_ScanTask>:
+
+void DIP_ScanTask(void)
+{
+    3748:	14d3      	push      	r4-r6, r15
+    static U32_T update_20ms = 0;
+
+    if (SysTick_1ms - update_20ms > DIP_SCAN_Time)
+    374a:	1123      	lrw      	r1, 0x200000a4	// 37d4 <DIP_ScanTask+0x8c>
+    374c:	1143      	lrw      	r2, 0x200000b8	// 37d8 <DIP_ScanTask+0x90>
+    374e:	11a4      	lrw      	r5, 0x2000035c	// 37dc <DIP_ScanTask+0x94>
+    3750:	9200      	ld.w      	r0, (r2, 0x0)
+    3752:	9160      	ld.w      	r3, (r1, 0x0)
+    3754:	60c2      	subu      	r3, r0
+    3756:	3b14      	cmphsi      	r3, 21
+    3758:	0806      	bt      	0x3764	// 3764 <DIP_ScanTask+0x1c>
+                }
+            }
+        }
+    }
+
+    if(g_Dip.DIP_val != g_Dip.DIP_last_val)
+    375a:	9542      	ld.w      	r2, (r5, 0x8)
+    375c:	9563      	ld.w      	r3, (r5, 0xc)
+    375e:	64ca      	cmpne      	r2, r3
+    3760:	082e      	bt      	0x37bc	// 37bc <DIP_ScanTask+0x74>
+		
+
+        Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+    }
+    
+}
+    3762:	1493      	pop      	r4-r6, r15
+        update_20ms = SysTick_1ms;
+    3764:	9160      	ld.w      	r3, (r1, 0x0)
+    3766:	b260      	st.w      	r3, (r2, 0x0)
+    3768:	6d17      	mov      	r4, r5
+    376a:	3600      	movi      	r6, 0
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+    376c:	7418      	zextb      	r0, r6
+    376e:	e3ffff8b 	bsr      	0x3684	// 3684 <DIP_GetSwitchState>
+    3772:	3840      	cmpnei      	r0, 0
+                g_Dip.delayCnt_OFF[i] = 0;
+    3774:	3300      	movi      	r3, 0
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+    3776:	0814      	bt      	0x379e	// 379e <DIP_ScanTask+0x56>
+                g_Dip.delayCnt_OFF[i] = 0;
+    3778:	a463      	st.b      	r3, (r4, 0x3)
+                if (g_Dip.delayCnt_ON[i] < DIP_DELAY_COUNT)
+    377a:	8460      	ld.b      	r3, (r4, 0x0)
+    377c:	3b04      	cmphsi      	r3, 5
+    377e:	0808      	bt      	0x378e	// 378e <DIP_ScanTask+0x46>
+                    g_Dip.delayCnt_ON[i]++;
+    3780:	2300      	addi      	r3, 1
+                    g_Dip.delayCnt_ON[i] = 0;
+    3782:	a460      	st.b      	r3, (r4, 0x0)
+    3784:	2600      	addi      	r6, 1
+        for (U8_T i = 0; i < DIP_CHN_MAX; i++)
+    3786:	3e43      	cmpnei      	r6, 3
+    3788:	2400      	addi      	r4, 1
+    378a:	0bf1      	bt      	0x376c	// 376c <DIP_ScanTask+0x24>
+    378c:	07e7      	br      	0x375a	// 375a <DIP_ScanTask+0x12>
+                    g_Dip.DIP_val |= (DIP_VAL_ON << i);              
+    378e:	3301      	movi      	r3, 1
+    3790:	70d8      	lsl      	r3, r6
+    3792:	6c8f      	mov      	r2, r3
+    3794:	9562      	ld.w      	r3, (r5, 0x8)
+    3796:	6cc8      	or      	r3, r2
+    3798:	b562      	st.w      	r3, (r5, 0x8)
+                    g_Dip.delayCnt_ON[i] = 0;
+    379a:	3300      	movi      	r3, 0
+    379c:	07f3      	br      	0x3782	// 3782 <DIP_ScanTask+0x3a>
+                g_Dip.delayCnt_ON[i] = 0;
+    379e:	a460      	st.b      	r3, (r4, 0x0)
+                if (g_Dip.delayCnt_OFF[i] < DIP_DELAY_COUNT)
+    37a0:	8463      	ld.b      	r3, (r4, 0x3)
+    37a2:	3b04      	cmphsi      	r3, 5
+    37a4:	0804      	bt      	0x37ac	// 37ac <DIP_ScanTask+0x64>
+                    g_Dip.delayCnt_OFF[i]++;
+    37a6:	2300      	addi      	r3, 1
+                    g_Dip.delayCnt_OFF[i] = 0;
+    37a8:	a463      	st.b      	r3, (r4, 0x3)
+    37aa:	07ed      	br      	0x3784	// 3784 <DIP_ScanTask+0x3c>
+                    g_Dip.DIP_val &= ~(DIP_VAL_ON << i);             
+    37ac:	3300      	movi      	r3, 0
+    37ae:	2b01      	subi      	r3, 2
+    37b0:	9542      	ld.w      	r2, (r5, 0x8)
+    37b2:	70db      	rotl      	r3, r6
+    37b4:	68c8      	and      	r3, r2
+    37b6:	b562      	st.w      	r3, (r5, 0x8)
+                    g_Dip.delayCnt_OFF[i] = 0;
+    37b8:	3300      	movi      	r3, 0
+    37ba:	07f7      	br      	0x37a8	// 37a8 <DIP_ScanTask+0x60>
+		g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+    37bc:	3307      	movi      	r3, 7
+		g_Dip.DIP_last_val = g_Dip.DIP_val;
+    37be:	b543      	st.w      	r2, (r5, 0xc)
+		g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+    37c0:	688c      	and      	r2, r3
+    37c2:	2213      	addi      	r2, 20
+    37c4:	7488      	zextb      	r2, r2
+        Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+    37c6:	1027      	lrw      	r1, 0x4dbf	// 37e0 <DIP_ScanTask+0x98>
+    37c8:	3000      	movi      	r0, 0
+		g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+    37ca:	a546      	st.b      	r2, (r5, 0x6)
+        Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+    37cc:	e3ffff54 	bsr      	0x3674	// 3674 <Dbg_Println>
+}
+    37d0:	07c9      	br      	0x3762	// 3762 <DIP_ScanTask+0x1a>
+    37d2:	0000      	bkpt
+    37d4:	200000a4 	.long	0x200000a4
+    37d8:	200000b8 	.long	0x200000b8
+    37dc:	2000035c 	.long	0x2000035c
+    37e0:	00004dbf 	.long	0x00004dbf
+
+Disassembly of section .text.Relay_Init:
+
+000037e4 <Relay_Init>:
+#include "includes.h"
+
+ZERO_CTRL_RLY c_rly;
+
+void Relay_Init(void)
+{
+    37e4:	14d2      	push      	r4-r5, r15
+    37e6:	1429      	subi      	r14, r14, 36
+	memset(&c_rly,0, sizeof(ZERO_CTRL_RLY));
+    37e8:	11ac      	lrw      	r5, 0x2000036c	// 3898 <Relay_Init+0xb4>
+    37ea:	3218      	movi      	r2, 24
+    37ec:	3100      	movi      	r1, 0
+    37ee:	6c17      	mov      	r0, r5
+    37f0:	e3fff0c6 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	EEPROM_Init();
+    37f4:	e000059e 	bsr      	0x4330	// 4330 <EEPROM_Init>
+	
+
+	GPT_IO_Init(GPT_CHB_PB00);
+    37f8:	3005      	movi      	r0, 5
+    37fa:	e3fff513 	bsr      	0x2220	// 2220 <GPT_IO_Init>
+	
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    37fe:	3400      	movi      	r4, 0
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    3800:	3300      	movi      	r3, 0
+    3802:	3240      	movi      	r2, 64
+    3804:	3100      	movi      	r1, 0
+    3806:	3001      	movi      	r0, 1
+    3808:	e3fff55c 	bsr      	0x22c0	// 22c0 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    380c:	b885      	st.w      	r4, (r14, 0x14)
+    380e:	b884      	st.w      	r4, (r14, 0x10)
+    3810:	b883      	st.w      	r4, (r14, 0xc)
+    3812:	b882      	st.w      	r4, (r14, 0x8)
+    3814:	b881      	st.w      	r4, (r14, 0x4)
+    3816:	b880      	st.w      	r4, (r14, 0x0)
+    3818:	3300      	movi      	r3, 0
+    381a:	3208      	movi      	r2, 8
+    381c:	3100      	movi      	r1, 0
+    381e:	3000      	movi      	r0, 0
+    3820:	e3fff55a 	bsr      	0x22d4	// 22d4 <GPT_WaveCtrl_Configure>
+	GPT_Period_CMP_Write(10000,0,0);		
+    3824:	3200      	movi      	r2, 0
+    3826:	3100      	movi      	r1, 0
+    3828:	101d      	lrw      	r0, 0x2710	// 389c <Relay_Init+0xb8>
+    382a:	e3fff5e3 	bsr      	0x23f0	// 23f0 <GPT_Period_CMP_Write>
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    382e:	3320      	movi      	r3, 32
+    3830:	3204      	movi      	r2, 4
+    3832:	3100      	movi      	r1, 0
+    3834:	3001      	movi      	r0, 1
+    3836:	e3fff571 	bsr      	0x2318	// 2318 <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    383a:	3301      	movi      	r3, 1
+    383c:	3200      	movi      	r2, 0
+    383e:	b888      	st.w      	r4, (r14, 0x20)
+    3840:	b887      	st.w      	r4, (r14, 0x1c)
+    3842:	b886      	st.w      	r4, (r14, 0x18)
+    3844:	b885      	st.w      	r4, (r14, 0x14)
+    3846:	b884      	st.w      	r4, (r14, 0x10)
+    3848:	b883      	st.w      	r4, (r14, 0xc)
+    384a:	b862      	st.w      	r3, (r14, 0x8)
+    384c:	b861      	st.w      	r3, (r14, 0x4)
+    384e:	b880      	st.w      	r4, (r14, 0x0)
+    3850:	3302      	movi      	r3, 2
+    3852:	3100      	movi      	r1, 0
+    3854:	3001      	movi      	r0, 1
+    3856:	e3fff56b 	bsr      	0x232c	// 232c <GPT_WaveOut_Configure>
+	GPT_Start();
+    385a:	e3fff5c3 	bsr      	0x23e0	// 23e0 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+    385e:	3180      	movi      	r1, 128
+	
+	
+	
+	
+	//真-继电器
+	GPIO_Init(GPIOA0,12,Output);
+    3860:	1090      	lrw      	r4, 0x2000004c	// 38a0 <Relay_Init+0xbc>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+    3862:	4129      	lsli      	r1, r1, 9
+    3864:	3001      	movi      	r0, 1
+    3866:	e3fff5cd 	bsr      	0x2400	// 2400 <GPT_ConfigInterrupt_CMD>
+	GPIO_Init(GPIOA0,12,Output);
+    386a:	9400      	ld.w      	r0, (r4, 0x0)
+    386c:	3200      	movi      	r2, 0
+    386e:	310c      	movi      	r1, 12
+    3870:	e3fff2d6 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	GPIO_Init(GPIOA0,13,Output);	
+    3874:	3200      	movi      	r2, 0
+    3876:	9400      	ld.w      	r0, (r4, 0x0)
+    3878:	310d      	movi      	r1, 13
+    387a:	e3fff2d1 	bsr      	0x1e1c	// 1e1c <GPIO_Init>
+	
+	RLY_1_CLOSE;
+    387e:	9400      	ld.w      	r0, (r4, 0x0)
+    3880:	310d      	movi      	r1, 13
+    3882:	e3fff457 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+	RLY_2_CLOSE;
+    3886:	9400      	ld.w      	r0, (r4, 0x0)
+    3888:	310c      	movi      	r1, 12
+    388a:	e3fff453 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+	
+	
+	
+	c_rly.rly_control = 0x01;	//继电器控制标志位
+    388e:	3301      	movi      	r3, 1
+    3890:	a560      	st.b      	r3, (r5, 0x0)
+}
+    3892:	1409      	addi      	r14, r14, 36
+    3894:	1492      	pop      	r4-r5, r15
+    3896:	0000      	bkpt
+    3898:	2000036c 	.long	0x2000036c
+    389c:	00002710 	.long	0x00002710
+    38a0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.CheckSum:
+
+000038a4 <CheckSum>:
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum(U8_T *data,U16_T len)
+{
+    38a4:	6040      	addu      	r1, r0
+	U16_T data_sum = 0;
+    38a6:	3300      	movi      	r3, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    38a8:	6442      	cmpne      	r0, r1
+    38aa:	0803      	bt      	0x38b0	// 38b0 <CheckSum+0xc>
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+    38ac:	740c      	zextb      	r0, r3
+}
+    38ae:	783c      	jmp      	r15
+		data_sum += data[i];
+    38b0:	8040      	ld.b      	r2, (r0, 0x0)
+    38b2:	60c8      	addu      	r3, r2
+    38b4:	74cd      	zexth      	r3, r3
+    38b6:	2000      	addi      	r0, 1
+    38b8:	07f8      	br      	0x38a8	// 38a8 <CheckSum+0x4>
+
+Disassembly of section .text.CheckSum_Check:
+
+000038ba <CheckSum_Check>:
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum_Check(U8_T *data,U16_T len)
+{
+    38ba:	6040      	addu      	r1, r0
+	U16_T data_sum = 0;
+    38bc:	3300      	movi      	r3, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    38be:	6442      	cmpne      	r0, r1
+    38c0:	0804      	bt      	0x38c8	// 38c8 <CheckSum_Check+0xe>
+	{
+		data_sum += data[i];
+	}
+	return ~data_sum;
+    38c2:	6cce      	nor      	r3, r3
+    38c4:	740c      	zextb      	r0, r3
+}
+    38c6:	783c      	jmp      	r15
+		data_sum += data[i];
+    38c8:	8040      	ld.b      	r2, (r0, 0x0)
+    38ca:	60c8      	addu      	r3, r2
+    38cc:	74cd      	zexth      	r3, r3
+    38ce:	2000      	addi      	r0, 1
+    38d0:	07f7      	br      	0x38be	// 38be <CheckSum_Check+0x4>
+
+Disassembly of section .text.CheckSum_Overlook_Check:
+
+000038d2 <CheckSum_Overlook_Check>:
+U8_T CheckSum_Overlook_Check(U8_T *data, U16_T len, U16_T check_id)
+{
+    38d2:	14c2      	push      	r4-r5
+	U8_T data_sum = 0;
+	
+	for(U8_T i = 0;i<len;i++)
+    38d4:	3400      	movi      	r4, 0
+	U8_T data_sum = 0;
+    38d6:	3300      	movi      	r3, 0
+	for(U8_T i = 0;i<len;i++)
+    38d8:	7551      	zexth      	r5, r4
+    38da:	6454      	cmphs      	r5, r1
+    38dc:	0c04      	bf      	0x38e4	// 38e4 <CheckSum_Overlook_Check+0x12>
+	{
+		if(check_id != i) data_sum += data[i];
+	}
+	return ~data_sum;
+    38de:	6cce      	nor      	r3, r3
+    38e0:	740c      	zextb      	r0, r3
+}
+    38e2:	1482      	pop      	r4-r5
+		if(check_id != i) data_sum += data[i];
+    38e4:	6496      	cmpne      	r5, r2
+    38e6:	0c05      	bf      	0x38f0	// 38f0 <CheckSum_Overlook_Check+0x1e>
+    38e8:	58b0      	addu      	r5, r0, r4
+    38ea:	85a0      	ld.b      	r5, (r5, 0x0)
+    38ec:	60d4      	addu      	r3, r5
+    38ee:	74cc      	zextb      	r3, r3
+	for(U8_T i = 0;i<len;i++)
+    38f0:	2400      	addi      	r4, 1
+    38f2:	7510      	zextb      	r4, r4
+    38f4:	07f2      	br      	0x38d8	// 38d8 <CheckSum_Overlook_Check+0x6>
+
+Disassembly of section .text.Change_OUTV:
+
+000038f8 <Change_OUTV>:
+
+
+//选择输出电压，0 - 10000mV
+U8_T Change_OUTV(U16_T VolOut)
+{
+	if(VolOut > 10000) return 0x01;
+    38f8:	1065      	lrw      	r3, 0x2710	// 390c <Change_OUTV+0x14>
+    38fa:	640c      	cmphs      	r3, r0
+    38fc:	0c06      	bf      	0x3908	// 3908 <Change_OUTV+0x10>
+	
+	GPT0->CMPA = VolOut;
+    38fe:	1065      	lrw      	r3, 0x20000024	// 3910 <Change_OUTV+0x18>
+    3900:	9360      	ld.w      	r3, (r3, 0x0)
+    3902:	b30b      	st.w      	r0, (r3, 0x2c)
+#if DBG_LOG_EN	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"CMPA:%d",VolOut);
+#endif		
+	return 0x00;
+    3904:	3000      	movi      	r0, 0
+}
+    3906:	783c      	jmp      	r15
+	if(VolOut > 10000) return 0x01;
+    3908:	3001      	movi      	r0, 1
+    390a:	07fe      	br      	0x3906	// 3906 <Change_OUTV+0xe>
+    390c:	00002710 	.long	0x00002710
+    3910:	20000024 	.long	0x20000024
+
+Disassembly of section .text.BLV_VolOut_Ctrl:
+
+00003914 <BLV_VolOut_Ctrl>:
+ * @param	
+ * @retval 	None
+ * */
+
+void BLV_VolOut_Ctrl(void)
+{
+    3914:	14d1      	push      	r4, r15
+	c_rly.wind = WIND_STOP;
+    3916:	1095      	lrw      	r4, 0x2000036c	// 3968 <BLV_VolOut_Ctrl+0x54>
+    3918:	3300      	movi      	r3, 0
+    391a:	a46d      	st.b      	r3, (r4, 0xd)
+
+	if(c_rly.rly_state[WINDRLY_HIGH] == Control_ON)			// 优先级高>中>抵 , 若同时被控制多个风速继电器，则将按照优先级打开继电器  
+    391c:	8465      	ld.b      	r3, (r4, 0x5)
+    391e:	3b41      	cmpnei      	r3, 1
+    3920:	0804      	bt      	0x3928	// 3928 <BLV_VolOut_Ctrl+0x14>
+	{
+#if DBG_LOG_EN		
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_HIGH");
+#endif		
+		c_rly.wind = WIND_HIGH;
+    3922:	3303      	movi      	r3, 3
+	}else if(c_rly.rly_state[WINDRLY_LOW] == Control_ON)	
+	{
+#if DBG_LOG_EN
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_LOW");
+#endif		
+		c_rly.wind = WIND_LOW;
+    3924:	a46d      	st.b      	r3, (r4, 0xd)
+    3926:	0409      	br      	0x3938	// 3938 <BLV_VolOut_Ctrl+0x24>
+	}else if(c_rly.rly_state[WINDRLY_MID] == Control_ON)	
+    3928:	8464      	ld.b      	r3, (r4, 0x4)
+    392a:	3b41      	cmpnei      	r3, 1
+    392c:	0803      	bt      	0x3932	// 3932 <BLV_VolOut_Ctrl+0x1e>
+		c_rly.wind = WIND_MID;
+    392e:	3302      	movi      	r3, 2
+    3930:	07fa      	br      	0x3924	// 3924 <BLV_VolOut_Ctrl+0x10>
+	}else if(c_rly.rly_state[WINDRLY_LOW] == Control_ON)	
+    3932:	8463      	ld.b      	r3, (r4, 0x3)
+    3934:	3b41      	cmpnei      	r3, 1
+    3936:	0ff7      	bf      	0x3924	// 3924 <BLV_VolOut_Ctrl+0x10>
+	}	
+
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"VolOut_Ctrl wind:%d",c_rly.wind);
+    3938:	844d      	ld.b      	r2, (r4, 0xd)
+    393a:	102d      	lrw      	r1, 0x4dcb	// 396c <BLV_VolOut_Ctrl+0x58>
+    393c:	3000      	movi      	r0, 0
+    393e:	e3fffe9b 	bsr      	0x3674	// 3674 <Dbg_Println>
+
+	
+	if(c_rly.wind == WIND_STOP){
+    3942:	846d      	ld.b      	r3, (r4, 0xd)
+    3944:	3b40      	cmpnei      	r3, 0
+    3946:	0805      	bt      	0x3950	// 3950 <BLV_VolOut_Ctrl+0x3c>
+		Change_OUTV(c_rly.wind_STOP_vol);
+    3948:	8c08      	ld.h      	r0, (r4, 0x10)
+	}else if(c_rly.wind == WIND_LOW){
+		Change_OUTV(c_rly.wind_LOW_vol);
+	}else if(c_rly.wind == WIND_MID){
+		Change_OUTV(c_rly.wind_MID_vol);
+	}else if(c_rly.wind == WIND_HIGH){
+		Change_OUTV(c_rly.wind_HIGH_vol);
+    394a:	e3ffffd7 	bsr      	0x38f8	// 38f8 <Change_OUTV>
+	}		
+}
+    394e:	1491      	pop      	r4, r15
+	}else if(c_rly.wind == WIND_LOW){
+    3950:	3b41      	cmpnei      	r3, 1
+    3952:	0803      	bt      	0x3958	// 3958 <BLV_VolOut_Ctrl+0x44>
+		Change_OUTV(c_rly.wind_LOW_vol);
+    3954:	8c09      	ld.h      	r0, (r4, 0x12)
+    3956:	07fa      	br      	0x394a	// 394a <BLV_VolOut_Ctrl+0x36>
+	}else if(c_rly.wind == WIND_MID){
+    3958:	3b42      	cmpnei      	r3, 2
+    395a:	0803      	bt      	0x3960	// 3960 <BLV_VolOut_Ctrl+0x4c>
+		Change_OUTV(c_rly.wind_MID_vol);
+    395c:	8c0a      	ld.h      	r0, (r4, 0x14)
+    395e:	07f6      	br      	0x394a	// 394a <BLV_VolOut_Ctrl+0x36>
+	}else if(c_rly.wind == WIND_HIGH){
+    3960:	3b43      	cmpnei      	r3, 3
+    3962:	0bf6      	bt      	0x394e	// 394e <BLV_VolOut_Ctrl+0x3a>
+		Change_OUTV(c_rly.wind_HIGH_vol);
+    3964:	8c0b      	ld.h      	r0, (r4, 0x16)
+    3966:	07f2      	br      	0x394a	// 394a <BLV_VolOut_Ctrl+0x36>
+    3968:	2000036c 	.long	0x2000036c
+    396c:	00004dcb 	.long	0x00004dcb
+
+Disassembly of section .text.BLV_RLY_Ctrl_Purpose:
+
+00003970 <BLV_RLY_Ctrl_Purpose>:
+ * @param	rly_id:继电器id
+ * @param	state：继电器要改变的状态
+ * @retval 	None
+ * */
+void BLV_RLY_Ctrl_Purpose(U8_T rly_id,U8_T state)
+{
+    3970:	14d0      	push      	r15
+	if(rly_id >= RLY_MAX) return;
+    3972:	3804      	cmphsi      	r0, 5
+    3974:	0807      	bt      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+
+	switch(state)
+    3976:	3941      	cmpnei      	r1, 1
+    3978:	0c06      	bf      	0x3984	// 3984 <BLV_RLY_Ctrl_Purpose+0x14>
+    397a:	3940      	cmpnei      	r1, 0
+    397c:	0c13      	bf      	0x39a2	// 39a2 <BLV_RLY_Ctrl_Purpose+0x32>
+    397e:	3942      	cmpnei      	r1, 2
+    3980:	0c20      	bf      	0x39c0	// 39c0 <BLV_RLY_Ctrl_Purpose+0x50>
+				}
+			}				
+		break;		
+	}
+
+}
+    3982:	1490      	pop      	r15
+			if(c_rly.rly_state[rly_id] != Control_ON)
+    3984:	1078      	lrw      	r3, 0x2000036c	// 39e4 <BLV_RLY_Ctrl_Purpose+0x74>
+    3986:	60c0      	addu      	r3, r0
+    3988:	8341      	ld.b      	r2, (r3, 0x1)
+    398a:	3a41      	cmpnei      	r2, 1
+    398c:	0ffb      	bf      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+				c_rly.rly_state[rly_id] = Control_ON;
+    398e:	3201      	movi      	r2, 1
+				if(rly_id == CTRL_RLY1){
+    3990:	3840      	cmpnei      	r0, 0
+				c_rly.rly_state[rly_id] = Control_ON;
+    3992:	a341      	st.b      	r2, (r3, 0x1)
+				if(rly_id == CTRL_RLY1){
+    3994:	0822      	bt      	0x39d8	// 39d8 <BLV_RLY_Ctrl_Purpose+0x68>
+					RLY_1_OPEN;
+    3996:	1075      	lrw      	r3, 0x2000004c	// 39e8 <BLV_RLY_Ctrl_Purpose+0x78>
+    3998:	310d      	movi      	r1, 13
+    399a:	9300      	ld.w      	r0, (r3, 0x0)
+					RLY_2_OPEN;
+    399c:	e3fff3c6 	bsr      	0x2128	// 2128 <GPIO_Write_High>
+    39a0:	07f1      	br      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+    39a2:	1071      	lrw      	r3, 0x2000036c	// 39e4 <BLV_RLY_Ctrl_Purpose+0x74>
+    39a4:	60c0      	addu      	r3, r0
+    39a6:	8341      	ld.b      	r2, (r3, 0x1)
+    39a8:	3a40      	cmpnei      	r2, 0
+    39aa:	0fec      	bf      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+				c_rly.rly_state[rly_id] = Control_OFF;
+    39ac:	3200      	movi      	r2, 0
+				if(rly_id == CTRL_RLY1){
+    39ae:	3840      	cmpnei      	r0, 0
+				c_rly.rly_state[rly_id] = Control_OFF;
+    39b0:	a341      	st.b      	r2, (r3, 0x1)
+				if(rly_id == CTRL_RLY1){
+    39b2:	080d      	bt      	0x39cc	// 39cc <BLV_RLY_Ctrl_Purpose+0x5c>
+					RLY_1_CLOSE;
+    39b4:	106d      	lrw      	r3, 0x2000004c	// 39e8 <BLV_RLY_Ctrl_Purpose+0x78>
+    39b6:	310d      	movi      	r1, 13
+    39b8:	9300      	ld.w      	r0, (r3, 0x0)
+					RLY_2_CLOSE;
+    39ba:	e3fff3bb 	bsr      	0x2130	// 2130 <GPIO_Write_Low>
+    39be:	07e2      	br      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+    39c0:	1069      	lrw      	r3, 0x2000036c	// 39e4 <BLV_RLY_Ctrl_Purpose+0x74>
+    39c2:	60c0      	addu      	r3, r0
+    39c4:	8341      	ld.b      	r2, (r3, 0x1)
+    39c6:	3a40      	cmpnei      	r2, 0
+    39c8:	0fe3      	bf      	0x398e	// 398e <BLV_RLY_Ctrl_Purpose+0x1e>
+    39ca:	07f1      	br      	0x39ac	// 39ac <BLV_RLY_Ctrl_Purpose+0x3c>
+				}else if(rly_id == CTRL_RLY2){
+    39cc:	3841      	cmpnei      	r0, 1
+    39ce:	0bda      	bt      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+					RLY_2_CLOSE;
+    39d0:	1066      	lrw      	r3, 0x2000004c	// 39e8 <BLV_RLY_Ctrl_Purpose+0x78>
+    39d2:	310c      	movi      	r1, 12
+    39d4:	9300      	ld.w      	r0, (r3, 0x0)
+    39d6:	07f2      	br      	0x39ba	// 39ba <BLV_RLY_Ctrl_Purpose+0x4a>
+				}else if(rly_id == CTRL_RLY2){
+    39d8:	3841      	cmpnei      	r0, 1
+    39da:	0bd4      	bt      	0x3982	// 3982 <BLV_RLY_Ctrl_Purpose+0x12>
+					RLY_2_OPEN;
+    39dc:	1063      	lrw      	r3, 0x2000004c	// 39e8 <BLV_RLY_Ctrl_Purpose+0x78>
+    39de:	310c      	movi      	r1, 12
+    39e0:	9300      	ld.w      	r0, (r3, 0x0)
+    39e2:	07dd      	br      	0x399c	// 399c <BLV_RLY_Ctrl_Purpose+0x2c>
+    39e4:	2000036c 	.long	0x2000036c
+    39e8:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.BLV_RLY_Task:
+
+000039ec <BLV_RLY_Task>:
+//继电器动作处理
+void BLV_RLY_Task(void)
+{
+    39ec:	14d3      	push      	r4-r6, r15
+	if(c_rly.rly_control != 0x01)return;
+    39ee:	10b1      	lrw      	r5, 0x2000036c	// 3a30 <BLV_RLY_Task+0x44>
+    39f0:	8560      	ld.b      	r3, (r5, 0x0)
+    39f2:	3b41      	cmpnei      	r3, 1
+    39f4:	0815      	bt      	0x3a1e	// 3a1e <BLV_RLY_Task+0x32>
+    39f6:	6d97      	mov      	r6, r5
+    39f8:	3400      	movi      	r4, 0
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_ctrl_state[i] == RLY_OFF)
+    39fa:	8666      	ld.b      	r3, (r6, 0x6)
+    39fc:	3b41      	cmpnei      	r3, 1
+    39fe:	0811      	bt      	0x3a20	// 3a20 <BLV_RLY_Task+0x34>
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_OFF);
+    3a00:	3100      	movi      	r1, 0
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+			
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+		{
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+    3a02:	6c13      	mov      	r0, r4
+    3a04:	e3ffffb6 	bsr      	0x3970	// 3970 <BLV_RLY_Ctrl_Purpose>
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3a08:	2400      	addi      	r4, 1
+    3a0a:	7510      	zextb      	r4, r4
+		}				
+
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+    3a0c:	3300      	movi      	r3, 0
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3a0e:	3c45      	cmpnei      	r4, 5
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+    3a10:	a666      	st.b      	r3, (r6, 0x6)
+    3a12:	2600      	addi      	r6, 1
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3a14:	0bf3      	bt      	0x39fa	// 39fa <BLV_RLY_Task+0xe>
+	}
+	
+	BLV_VolOut_Ctrl();		//风速判断，输出pwm
+    3a16:	e3ffff7f 	bsr      	0x3914	// 3914 <BLV_VolOut_Ctrl>
+	
+#if DBG_LOG_EN	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"BLV_RLY_Task");
+#endif	
+	c_rly.rly_control = 0x00;
+    3a1a:	3300      	movi      	r3, 0
+    3a1c:	a560      	st.b      	r3, (r5, 0x0)
+}
+    3a1e:	1493      	pop      	r4-r6, r15
+		else if(c_rly.rly_ctrl_state[i] == RLY_ON)
+    3a20:	3b42      	cmpnei      	r3, 2
+    3a22:	0803      	bt      	0x3a28	// 3a28 <BLV_RLY_Task+0x3c>
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+    3a24:	3101      	movi      	r1, 1
+    3a26:	07ee      	br      	0x3a02	// 3a02 <BLV_RLY_Task+0x16>
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+    3a28:	3b43      	cmpnei      	r3, 3
+    3a2a:	0bef      	bt      	0x3a08	// 3a08 <BLV_RLY_Task+0x1c>
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+    3a2c:	3102      	movi      	r1, 2
+    3a2e:	07ea      	br      	0x3a02	// 3a02 <BLV_RLY_Task+0x16>
+    3a30:	2000036c 	.long	0x2000036c
+
+Disassembly of section .text.BLV_A9RLY_CMD_SET_Processing:
+
+00003a34 <BLV_A9RLY_CMD_SET_Processing>:
+
+
+
+//1、主机下发设置继电器状态
+U8_T BLV_A9RLY_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    3a34:	14d3      	push      	r4-r6, r15
+    3a36:	1429      	subi      	r14, r14, 36
+	if(len < 9) return 0x01;
+    3a38:	3908      	cmphsi      	r1, 9
+    3a3a:	0c48      	bf      	0x3aca	// 3aca <BLV_A9RLY_CMD_SET_Processing+0x96>
+	U16_T RLY_STATE = 0x00;
+	
+	
+//	if(len >= 9)
+	{
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+    3a3c:	8048      	ld.b      	r2, (r0, 0x8)
+    3a3e:	8067      	ld.b      	r3, (r0, 0x7)
+    3a40:	4248      	lsli      	r2, r2, 8
+    3a42:	608c      	addu      	r2, r3
+		c_rly.rly_control = 0x01;	//继电器控制标志
+    3a44:	3101      	movi      	r1, 1
+    3a46:	1163      	lrw      	r3, 0x2000036c	// 3ad0 <BLV_A9RLY_CMD_SET_Processing+0x9c>
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+    3a48:	7489      	zexth      	r2, r2
+		c_rly.rly_control = 0x01;	//继电器控制标志
+    3a4a:	a320      	st.b      	r1, (r3, 0x0)
+    3a4c:	3400      	movi      	r4, 0
+    3a4e:	6d4f      	mov      	r5, r3
+		
+		for(U8_T i = 0;i<RLY_MAX;i++)
+		{
+			t = ((RLY_STATE>>(2*i)) & 0x03);
+    3a50:	3603      	movi      	r6, 3
+    3a52:	6c4b      	mov      	r1, r2
+    3a54:	7052      	asr      	r1, r4
+    3a56:	6858      	and      	r1, r6
+    3a58:	7444      	zextb      	r1, r1
+			
+			if(t == NO_CTRL){
+    3a5a:	3940      	cmpnei      	r1, 0
+    3a5c:	0831      	bt      	0x3abe	// 3abe <BLV_A9RLY_CMD_SET_Processing+0x8a>
+    3a5e:	2401      	addi      	r4, 2
+		for(U8_T i = 0;i<RLY_MAX;i++)
+    3a60:	3c4a      	cmpnei      	r4, 10
+			}else if(t == RLY_OFF){
+				c_rly.rly_ctrl_state[i] = RLY_OFF;
+			}else if(t == RLY_ON){
+				c_rly.rly_ctrl_state[i] = RLY_ON;
+			}else if(t == RLY_RES){
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+    3a62:	a326      	st.b      	r1, (r3, 0x6)
+    3a64:	2300      	addi      	r3, 1
+		for(U8_T i = 0;i<RLY_MAX;i++)
+    3a66:	0bf6      	bt      	0x3a52	// 3a52 <BLV_A9RLY_CMD_SET_Processing+0x1e>
+			}				
+		}
+	}
+	
+	//BLV_RLY_Task();
+	c_rly.SN = (data[1]&0x0F);
+    3a68:	8061      	ld.b      	r3, (r0, 0x1)
+    3a6a:	320f      	movi      	r2, 15
+    3a6c:	68c8      	and      	r3, r2
+    3a6e:	a56c      	st.b      	r3, (r5, 0xc)
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;		//SN
+    3a70:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3a74:	8062      	ld.b      	r3, (r0, 0x2)
+    3a76:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3a7a:	8060      	ld.b      	r3, (r0, 0x0)
+    3a7c:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3a80:	3300      	movi      	r3, 0
+    3a82:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_SET_RLYSTATE_REPLY;		//回复CMD
+    3a86:	3330      	movi      	r3, 48
+	SendData[SendLen++] = g_Dip.addr;
+    3a88:	1053      	lrw      	r2, 0x2000035c	// 3ad4 <BLV_A9RLY_CMD_SET_Processing+0xa0>
+    3a8a:	8246      	ld.b      	r2, (r2, 0x6)
+	SendData[SendLen++] = CMD_SET_RLYSTATE_REPLY;		//回复CMD
+    3a8c:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3a90:	3107      	movi      	r1, 7
+	SendData[SEND_LEN] = SendLen;	//len
+    3a92:	3307      	movi      	r3, 7
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3a94:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = g_Dip.addr;
+    3a96:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SEND_LEN] = SendLen;	//len
+    3a9a:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3a9e:	e3ffff0e 	bsr      	0x38ba	// 38ba <CheckSum_Check>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3aa2:	3314      	movi      	r3, 20
+    3aa4:	b860      	st.w      	r3, (r14, 0x0)
+    3aa6:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3aa8:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3aac:	4361      	lsli      	r3, r3, 1
+    3aae:	1801      	addi      	r0, r14, 4
+    3ab0:	3201      	movi      	r2, 1
+    3ab2:	3107      	movi      	r1, 7
+    3ab4:	e3fffd54 	bsr      	0x355c	// 355c <Set_GroupSend>
+    3ab8:	3000      	movi      	r0, 0
+	
+	return 0x00;
+}
+    3aba:	1409      	addi      	r14, r14, 36
+    3abc:	1493      	pop      	r4-r6, r15
+			}else if(t == RLY_OFF){
+    3abe:	3941      	cmpnei      	r1, 1
+    3ac0:	0fcf      	bf      	0x3a5e	// 3a5e <BLV_A9RLY_CMD_SET_Processing+0x2a>
+			}else if(t == RLY_ON){
+    3ac2:	3942      	cmpnei      	r1, 2
+    3ac4:	0fcd      	bf      	0x3a5e	// 3a5e <BLV_A9RLY_CMD_SET_Processing+0x2a>
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+    3ac6:	3103      	movi      	r1, 3
+    3ac8:	07cb      	br      	0x3a5e	// 3a5e <BLV_A9RLY_CMD_SET_Processing+0x2a>
+	if(len < 9) return 0x01;
+    3aca:	3001      	movi      	r0, 1
+    3acc:	07f7      	br      	0x3aba	// 3aba <BLV_A9RLY_CMD_SET_Processing+0x86>
+    3ace:	0000      	bkpt
+    3ad0:	2000036c 	.long	0x2000036c
+    3ad4:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_A9RLY_CMD_READ_Processing:
+
+00003ad8 <BLV_A9RLY_CMD_READ_Processing>:
+
+//2、读取继电器状态的回复
+void BLV_A9RLY_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3ad8:	14d2      	push      	r4-r5, r15
+    3ada:	1429      	subi      	r14, r14, 36
+    3adc:	11a0      	lrw      	r5, 0x2000036c	// 3b5c <BLV_A9RLY_CMD_READ_Processing+0x84>
+    3ade:	3200      	movi      	r2, 0
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	U8_T RLY_State2 = 0x00;
+    3ae0:	3400      	movi      	r4, 0
+    3ae2:	6c57      	mov      	r1, r5
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_state[i] == Control_ON)
+    3ae4:	8561      	ld.b      	r3, (r5, 0x1)
+    3ae6:	3b41      	cmpnei      	r3, 1
+    3ae8:	0804      	bt      	0x3af0	// 3af0 <BLV_A9RLY_CMD_READ_Processing+0x18>
+		{
+			RLY_State2 |= (0x01<<i);
+    3aea:	70c8      	lsl      	r3, r2
+    3aec:	6cd0      	or      	r3, r4
+    3aee:	750c      	zextb      	r4, r3
+    3af0:	2200      	addi      	r2, 1
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3af2:	3a45      	cmpnei      	r2, 5
+    3af4:	2500      	addi      	r5, 1
+    3af6:	0bf7      	bt      	0x3ae4	// 3ae4 <BLV_A9RLY_CMD_READ_Processing+0xc>
+		}
+	}
+	
+	c_rly.SN = (data[1]&0x0F);
+    3af8:	8041      	ld.b      	r2, (r0, 0x1)
+    3afa:	330f      	movi      	r3, 15
+    3afc:	688c      	and      	r2, r3
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3afe:	1079      	lrw      	r3, 0x2000035c	// 3b60 <BLV_A9RLY_CMD_READ_Processing+0x88>
+    3b00:	8366      	ld.b      	r3, (r3, 0x6)
+	c_rly.SN = (data[1]&0x0F);
+    3b02:	a14c      	st.b      	r2, (r1, 0xc)
+	SendData[SendLen++] = g_Dip.addr;
+    3b04:	dc6e0004 	st.b      	r3, (r14, 0x4)
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+    3b08:	8062      	ld.b      	r3, (r0, 0x2)
+    3b0a:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3b0e:	8060      	ld.b      	r3, (r0, 0x0)
+    3b10:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3b14:	3300      	movi      	r3, 0
+    3b16:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_READ_RLYSTATE_REPLY;		//回复CMD
+    3b1a:	3334      	movi      	r3, 52
+    3b1c:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	SendData[SendLen++] = RLY_State2;
+	SendData[SendLen++] = 0x00;
+    3b20:	3300      	movi      	r3, 0
+    3b22:	dc6e000c 	st.b      	r3, (r14, 0xc)
+	SendData[SendLen++] = 0x00;
+    3b26:	dc6e000d 	st.b      	r3, (r14, 0xd)
+	
+	SendLen = 0x0A;
+	SendData[SEND_LEN] = 0x0A;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3b2a:	310a      	movi      	r1, 10
+	SendData[SEND_LEN] = 0x0A;	//len
+    3b2c:	330a      	movi      	r3, 10
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3b2e:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = c_rly.SN;
+    3b30:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	SendData[SEND_LEN] = 0x0A;	//len
+    3b34:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SendLen++] = RLY_State2;
+    3b38:	dc8e000b 	st.b      	r4, (r14, 0xb)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3b3c:	e3fffebf 	bsr      	0x38ba	// 38ba <CheckSum_Check>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3b40:	3314      	movi      	r3, 20
+    3b42:	b860      	st.w      	r3, (r14, 0x0)
+    3b44:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3b46:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3b4a:	4361      	lsli      	r3, r3, 1
+    3b4c:	3201      	movi      	r2, 1
+    3b4e:	310a      	movi      	r1, 10
+    3b50:	1801      	addi      	r0, r14, 4
+    3b52:	e3fffd05 	bsr      	0x355c	// 355c <Set_GroupSend>
+}
+    3b56:	1409      	addi      	r14, r14, 36
+    3b58:	1492      	pop      	r4-r5, r15
+    3b5a:	0000      	bkpt
+    3b5c:	2000036c 	.long	0x2000036c
+    3b60:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_WINDOUT_CMD_SET_Processing:
+
+00003b64 <BLV_WINDOUT_CMD_SET_Processing>:
+
+//3、设置各个风速档位的电压输出值
+U8_T BLV_WINDOUT_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    3b64:	14d4      	push      	r4-r7, r15
+    3b66:	1429      	subi      	r14, r14, 36
+	if(len < 15) return 0x01;
+    3b68:	390e      	cmphsi      	r1, 15
+{
+    3b6a:	6d03      	mov      	r4, r0
+	if(len < 15) return 0x01;
+    3b6c:	0c5f      	bf      	0x3c2a	// 3c2a <BLV_WINDOUT_CMD_SET_Processing+0xc6>
+    3b6e:	58ba      	addi      	r5, r0, 7
+    3b70:	3300      	movi      	r3, 0
+    3b72:	3100      	movi      	r1, 0
+//	if(len >= 15)
+	{
+		for(U8_T i = 0x00; i < 0x04; i++)
+		{
+			SetVol = (data[(SEND_PARA+(i*2))] + (data[(SEND_PARA+(i*2+1))]<<8 ));
+			if(SetVol <= 10000){
+    3b74:	11cf      	lrw      	r6, 0x2710	// 3c30 <BLV_WINDOUT_CMD_SET_Processing+0xcc>
+    3b76:	1110      	lrw      	r0, 0x2000036c	// 3c34 <BLV_WINDOUT_CMD_SET_Processing+0xd0>
+			SetVol = (data[(SEND_PARA+(i*2))] + (data[(SEND_PARA+(i*2+1))]<<8 ));
+    3b78:	8541      	ld.b      	r2, (r5, 0x1)
+    3b7a:	4248      	lsli      	r2, r2, 8
+    3b7c:	85e0      	ld.b      	r7, (r5, 0x0)
+    3b7e:	609c      	addu      	r2, r7
+    3b80:	7489      	zexth      	r2, r2
+			if(SetVol <= 10000){
+    3b82:	6498      	cmphs      	r6, r2
+    3b84:	0c0d      	bf      	0x3b9e	// 3b9e <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+				switch(i){
+    3b86:	3942      	cmpnei      	r1, 2
+    3b88:	0c47      	bf      	0x3c16	// 3c16 <BLV_WINDOUT_CMD_SET_Processing+0xb2>
+    3b8a:	3943      	cmpnei      	r1, 3
+    3b8c:	0c4a      	bf      	0x3c20	// 3c20 <BLV_WINDOUT_CMD_SET_Processing+0xbc>
+    3b8e:	3941      	cmpnei      	r1, 1
+    3b90:	0c3e      	bf      	0x3c0c	// 3c0c <BLV_WINDOUT_CMD_SET_Processing+0xa8>
+				case 0x00:
+					if(c_rly.wind_STOP_vol != SetVol){
+    3b92:	88e8      	ld.h      	r7, (r0, 0x10)
+    3b94:	649e      	cmpne      	r7, r2
+    3b96:	0c04      	bf      	0x3b9e	// 3b9e <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_STOP_vol = SetVol;
+    3b98:	a848      	st.h      	r2, (r0, 0x10)
+					}				
+				break;
+				case 0x03:
+					if(c_rly.wind_HIGH_vol != SetVol){
+						c_rly.wind_HIGH_vol = SetVol;
+						save_flag++;
+    3b9a:	2300      	addi      	r3, 1
+    3b9c:	74cc      	zextb      	r3, r3
+		for(U8_T i = 0x00; i < 0x04; i++)
+    3b9e:	2100      	addi      	r1, 1
+    3ba0:	7444      	zextb      	r1, r1
+    3ba2:	3944      	cmpnei      	r1, 4
+    3ba4:	2501      	addi      	r5, 2
+    3ba6:	0be9      	bt      	0x3b78	// 3b78 <BLV_WINDOUT_CMD_SET_Processing+0x14>
+				}
+			}
+		}
+	}
+	
+	if(save_flag != 0x00)
+    3ba8:	3b40      	cmpnei      	r3, 0
+    3baa:	0c03      	bf      	0x3bb0	// 3bb0 <BLV_WINDOUT_CMD_SET_Processing+0x4c>
+	{
+		EEPROM_WritePara();	//保存flash
+    3bac:	e00002cc 	bsr      	0x4144	// 4144 <EEPROM_WritePara>
+		
+	}
+	
+	BLV_VolOut_Ctrl();
+    3bb0:	e3fffeb2 	bsr      	0x3914	// 3914 <BLV_VolOut_Ctrl>
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+    3bb4:	8461      	ld.b      	r3, (r4, 0x1)
+    3bb6:	320f      	movi      	r2, 15
+    3bb8:	68c8      	and      	r3, r2
+    3bba:	105f      	lrw      	r2, 0x2000036c	// 3c34 <BLV_WINDOUT_CMD_SET_Processing+0xd0>
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3bbc:	3107      	movi      	r1, 7
+	c_rly.SN = (data[1]&0x0F);
+    3bbe:	a26c      	st.b      	r3, (r2, 0xc)
+	SendData[SendLen++] = c_rly.SN;
+    3bc0:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3bc4:	8462      	ld.b      	r3, (r4, 0x2)
+    3bc6:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3bca:	8460      	ld.b      	r3, (r4, 0x0)
+    3bcc:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//sum
+    3bd0:	3300      	movi      	r3, 0
+    3bd2:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+    3bd6:	3337      	movi      	r3, 55
+	SendData[SendLen++] = g_Dip.addr;
+    3bd8:	1058      	lrw      	r2, 0x2000035c	// 3c38 <BLV_WINDOUT_CMD_SET_Processing+0xd4>
+    3bda:	8246      	ld.b      	r2, (r2, 0x6)
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+    3bdc:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3be0:	1801      	addi      	r0, r14, 4
+	SendData[SEND_LEN] = SendLen;	//len
+    3be2:	3307      	movi      	r3, 7
+	SendData[SendLen++] = g_Dip.addr;
+    3be4:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SEND_LEN] = SendLen;	//len
+    3be8:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3bec:	e3fffe67 	bsr      	0x38ba	// 38ba <CheckSum_Check>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3bf0:	3314      	movi      	r3, 20
+    3bf2:	b860      	st.w      	r3, (r14, 0x0)
+    3bf4:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3bf6:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3bfa:	4361      	lsli      	r3, r3, 1
+    3bfc:	1801      	addi      	r0, r14, 4
+    3bfe:	3201      	movi      	r2, 1
+    3c00:	3107      	movi      	r1, 7
+    3c02:	e3fffcad 	bsr      	0x355c	// 355c <Set_GroupSend>
+    3c06:	3000      	movi      	r0, 0
+	
+	return 0x00;
+}
+    3c08:	1409      	addi      	r14, r14, 36
+    3c0a:	1494      	pop      	r4-r7, r15
+					if(c_rly.wind_LOW_vol != SetVol){
+    3c0c:	88e9      	ld.h      	r7, (r0, 0x12)
+    3c0e:	649e      	cmpne      	r7, r2
+    3c10:	0fc7      	bf      	0x3b9e	// 3b9e <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_LOW_vol = SetVol;
+    3c12:	a849      	st.h      	r2, (r0, 0x12)
+    3c14:	07c3      	br      	0x3b9a	// 3b9a <BLV_WINDOUT_CMD_SET_Processing+0x36>
+					if(c_rly.wind_MID_vol != SetVol){
+    3c16:	88ea      	ld.h      	r7, (r0, 0x14)
+    3c18:	649e      	cmpne      	r7, r2
+    3c1a:	0fc2      	bf      	0x3b9e	// 3b9e <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_MID_vol = SetVol;
+    3c1c:	a84a      	st.h      	r2, (r0, 0x14)
+    3c1e:	07be      	br      	0x3b9a	// 3b9a <BLV_WINDOUT_CMD_SET_Processing+0x36>
+					if(c_rly.wind_HIGH_vol != SetVol){
+    3c20:	88eb      	ld.h      	r7, (r0, 0x16)
+    3c22:	649e      	cmpne      	r7, r2
+    3c24:	0fbd      	bf      	0x3b9e	// 3b9e <BLV_WINDOUT_CMD_SET_Processing+0x3a>
+						c_rly.wind_HIGH_vol = SetVol;
+    3c26:	a84b      	st.h      	r2, (r0, 0x16)
+    3c28:	07b9      	br      	0x3b9a	// 3b9a <BLV_WINDOUT_CMD_SET_Processing+0x36>
+	if(len < 15) return 0x01;
+    3c2a:	3001      	movi      	r0, 1
+    3c2c:	07ee      	br      	0x3c08	// 3c08 <BLV_WINDOUT_CMD_SET_Processing+0xa4>
+    3c2e:	0000      	bkpt
+    3c30:	00002710 	.long	0x00002710
+    3c34:	2000036c 	.long	0x2000036c
+    3c38:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_WINDOUT_CMD_READ_Processing:
+
+00003c3c <BLV_WINDOUT_CMD_READ_Processing>:
+//4、读取各个风速档位的电压输出值
+U8_T BLV_WINDOUT_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3c3c:	14d0      	push      	r15
+    3c3e:	1429      	subi      	r14, r14, 36
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+    3c40:	8041      	ld.b      	r2, (r0, 0x1)
+    3c42:	330f      	movi      	r3, 15
+    3c44:	688c      	and      	r2, r3
+    3c46:	1161      	lrw      	r3, 0x2000036c	// 3cc8 <BLV_WINDOUT_CMD_READ_Processing+0x8c>
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3c48:	1121      	lrw      	r1, 0x2000035c	// 3ccc <BLV_WINDOUT_CMD_READ_Processing+0x90>
+    3c4a:	8126      	ld.b      	r1, (r1, 0x6)
+	c_rly.SN = (data[1]&0x0F);
+    3c4c:	a34c      	st.b      	r2, (r3, 0xc)
+	SendData[SendLen++] = c_rly.SN;
+    3c4e:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3c52:	8042      	ld.b      	r2, (r0, 0x2)
+    3c54:	dc4e0006 	st.b      	r2, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3c58:	8040      	ld.b      	r2, (r0, 0x0)
+    3c5a:	dc4e0007 	st.b      	r2, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3c5e:	3200      	movi      	r2, 0
+    3c60:	dc4e0009 	st.b      	r2, (r14, 0x9)
+	SendData[SendLen++] = CMD_READ_WINDOUTVOL_REPLY;		//回复CMD
+    3c64:	3239      	movi      	r2, 57
+    3c66:	dc4e000a 	st.b      	r2, (r14, 0xa)
+	SendData[SendLen++] = (c_rly.wind_STOP_vol & 0xFF);
+    3c6a:	8b48      	ld.h      	r2, (r3, 0x10)
+    3c6c:	dc4e000b 	st.b      	r2, (r14, 0xb)
+	SendData[SendLen++] = (c_rly.wind_STOP_vol >> 8) & 0xFF;
+    3c70:	4a48      	lsri      	r2, r2, 8
+    3c72:	dc4e000c 	st.b      	r2, (r14, 0xc)
+	SendData[SendLen++] = (c_rly.wind_LOW_vol & 0xFF);
+    3c76:	8b49      	ld.h      	r2, (r3, 0x12)
+    3c78:	dc4e000d 	st.b      	r2, (r14, 0xd)
+	SendData[SendLen++] = (c_rly.wind_LOW_vol >> 8) & 0xFF;
+    3c7c:	4a48      	lsri      	r2, r2, 8
+    3c7e:	dc4e000e 	st.b      	r2, (r14, 0xe)
+	SendData[SendLen++] = (c_rly.wind_MID_vol & 0xFF);
+    3c82:	8b4a      	ld.h      	r2, (r3, 0x14)
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol & 0xFF);
+    3c84:	8b6b      	ld.h      	r3, (r3, 0x16)
+    3c86:	dc6e0011 	st.b      	r3, (r14, 0x11)
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;
+    3c8a:	4b68      	lsri      	r3, r3, 8
+	SendData[SendLen++] = g_Dip.addr;
+    3c8c:	dc2e0004 	st.b      	r1, (r14, 0x4)
+	SendData[SendLen++] = (c_rly.wind_MID_vol & 0xFF);
+    3c90:	dc4e000f 	st.b      	r2, (r14, 0xf)
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;
+    3c94:	dc6e0012 	st.b      	r3, (r14, 0x12)
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+    3c98:	4a48      	lsri      	r2, r2, 8
+	
+	SendLen = 0x0F;
+	SendData[SEND_LEN] = SendLen;	//len
+    3c9a:	330f      	movi      	r3, 15
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3c9c:	310f      	movi      	r1, 15
+    3c9e:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+    3ca0:	dc4e0010 	st.b      	r2, (r14, 0x10)
+	SendData[SEND_LEN] = SendLen;	//len
+    3ca4:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3ca8:	e3fffe09 	bsr      	0x38ba	// 38ba <CheckSum_Check>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3cac:	3314      	movi      	r3, 20
+    3cae:	b860      	st.w      	r3, (r14, 0x0)
+    3cb0:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3cb2:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3cb6:	4361      	lsli      	r3, r3, 1
+    3cb8:	1801      	addi      	r0, r14, 4
+    3cba:	3201      	movi      	r2, 1
+    3cbc:	310f      	movi      	r1, 15
+    3cbe:	e3fffc4f 	bsr      	0x355c	// 355c <Set_GroupSend>
+	
+	return 0x00;
+}
+    3cc2:	3000      	movi      	r0, 0
+    3cc4:	1409      	addi      	r14, r14, 36
+    3cc6:	1490      	pop      	r15
+    3cc8:	2000036c 	.long	0x2000036c
+    3ccc:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_DEVPROT_CMD_SET_Processing:
+
+00003cd0 <BLV_DEVPROT_CMD_SET_Processing>:
+
+//5、设置端口模式
+U8_T BLV_DEVPROT_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    3cd0:	14d2      	push      	r4-r5, r15
+    3cd2:	1429      	subi      	r14, r14, 36
+	if(len != 0x08)  return 0x01;
+    3cd4:	3948      	cmpnei      	r1, 8
+{
+    3cd6:	6d43      	mov      	r5, r0
+	if(len != 0x08)  return 0x01;
+    3cd8:	0838      	bt      	0x3d48	// 3d48 <BLV_DEVPROT_CMD_SET_Processing+0x78>
+	
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	if((data[SEND_PARA] == ACTIVE_PORT)||((data[SEND_PARA] == POLLING_PORT)))
+    3cda:	8067      	ld.b      	r3, (r0, 0x7)
+    3cdc:	5b43      	subi      	r2, r3, 1
+    3cde:	7488      	zextb      	r2, r2
+    3ce0:	3a01      	cmphsi      	r2, 2
+    3ce2:	0835      	bt      	0x3d4c	// 3d4c <BLV_DEVPROT_CMD_SET_Processing+0x7c>
+	{
+		if(data[SEND_PARA]  != c_rly.dev_port){
+    3ce4:	109b      	lrw      	r4, 0x2000036c	// 3d50 <BLV_DEVPROT_CMD_SET_Processing+0x80>
+    3ce6:	844b      	ld.b      	r2, (r4, 0xb)
+    3ce8:	64ca      	cmpne      	r2, r3
+    3cea:	0c04      	bf      	0x3cf2	// 3cf2 <BLV_DEVPROT_CMD_SET_Processing+0x22>
+			c_rly.dev_port = data[SEND_PARA];
+    3cec:	a46b      	st.b      	r3, (r4, 0xb)
+			
+			EEPROM_WritePara();	//保存flash
+    3cee:	e000022b 	bsr      	0x4144	// 4144 <EEPROM_WritePara>
+		}
+	}else{
+		return 0x02;//设置的端口不合法
+	}
+	
+	c_rly.SN = (data[1]&0x0F);
+    3cf2:	8561      	ld.b      	r3, (r5, 0x1)
+    3cf4:	320f      	movi      	r2, 15
+    3cf6:	68c8      	and      	r3, r2
+    3cf8:	a46c      	st.b      	r3, (r4, 0xc)
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+    3cfa:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3cfe:	8562      	ld.b      	r3, (r5, 0x2)
+    3d00:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3d04:	8560      	ld.b      	r3, (r5, 0x0)
+    3d06:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3d0a:	3300      	movi      	r3, 0
+    3d0c:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_SET_DEVPORT_REPLY;		//回复CMD
+    3d10:	3338      	movi      	r3, 56
+	SendData[SendLen++] = g_Dip.addr;
+    3d12:	1051      	lrw      	r2, 0x2000035c	// 3d54 <BLV_DEVPROT_CMD_SET_Processing+0x84>
+    3d14:	8246      	ld.b      	r2, (r2, 0x6)
+	SendData[SendLen++] = CMD_SET_DEVPORT_REPLY;		//回复CMD
+    3d16:	dc6e000a 	st.b      	r3, (r14, 0xa)
+
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3d1a:	3107      	movi      	r1, 7
+	SendData[SEND_LEN] = SendLen;	//len
+    3d1c:	3307      	movi      	r3, 7
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3d1e:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = g_Dip.addr;
+    3d20:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SEND_LEN] = SendLen;	//len
+    3d24:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3d28:	e3fffdc9 	bsr      	0x38ba	// 38ba <CheckSum_Check>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3d2c:	3314      	movi      	r3, 20
+    3d2e:	b860      	st.w      	r3, (r14, 0x0)
+    3d30:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3d32:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3d36:	4361      	lsli      	r3, r3, 1
+    3d38:	1801      	addi      	r0, r14, 4
+    3d3a:	3201      	movi      	r2, 1
+    3d3c:	3107      	movi      	r1, 7
+    3d3e:	e3fffc0f 	bsr      	0x355c	// 355c <Set_GroupSend>
+    3d42:	3000      	movi      	r0, 0
+
+	return 0x00;
+}
+    3d44:	1409      	addi      	r14, r14, 36
+    3d46:	1492      	pop      	r4-r5, r15
+	if(len != 0x08)  return 0x01;
+    3d48:	3001      	movi      	r0, 1
+    3d4a:	07fd      	br      	0x3d44	// 3d44 <BLV_DEVPROT_CMD_SET_Processing+0x74>
+		return 0x02;//设置的端口不合法
+    3d4c:	3002      	movi      	r0, 2
+    3d4e:	07fb      	br      	0x3d44	// 3d44 <BLV_DEVPROT_CMD_SET_Processing+0x74>
+    3d50:	2000036c 	.long	0x2000036c
+    3d54:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_DEVPROT_CMD_READ_Processing:
+
+00003d58 <BLV_DEVPROT_CMD_READ_Processing>:
+
+
+
+//6、读取端口模式
+U8_T BLV_DEVPROT_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3d58:	14d0      	push      	r15
+    3d5a:	1429      	subi      	r14, r14, 36
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+    3d5c:	8061      	ld.b      	r3, (r0, 0x1)
+    3d5e:	320f      	movi      	r2, 15
+    3d60:	68c8      	and      	r3, r2
+    3d62:	1059      	lrw      	r2, 0x2000036c	// 3dc4 <BLV_DEVPROT_CMD_READ_Processing+0x6c>
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3d64:	1039      	lrw      	r1, 0x2000035c	// 3dc8 <BLV_DEVPROT_CMD_READ_Processing+0x70>
+    3d66:	8126      	ld.b      	r1, (r1, 0x6)
+	c_rly.SN = (data[1]&0x0F);
+    3d68:	a26c      	st.b      	r3, (r2, 0xc)
+	SendData[SendLen++] = c_rly.SN;
+    3d6a:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3d6e:	8062      	ld.b      	r3, (r0, 0x2)
+    3d70:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3d74:	8060      	ld.b      	r3, (r0, 0x0)
+    3d76:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    3d7a:	3300      	movi      	r3, 0
+    3d7c:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = CMD_READ_DEVPORT_REPLY;		//回复CMD
+    3d80:	333a      	movi      	r3, 58
+    3d82:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	SendData[SendLen++] = c_rly.dev_port;		//端口模式
+    3d86:	826b      	ld.b      	r3, (r2, 0xb)
+    3d88:	dc6e000b 	st.b      	r3, (r14, 0xb)
+	SendData[SendLen++] = Project_FW_Version;	//软件版本号
+    3d8c:	3302      	movi      	r3, 2
+	SendData[SendLen++] = g_Dip.addr;
+    3d8e:	dc2e0004 	st.b      	r1, (r14, 0x4)
+	SendData[SendLen++] = Project_FW_Version;	//软件版本号
+    3d92:	dc6e000c 	st.b      	r3, (r14, 0xc)
+	SendData[SendLen++] = Project_HW_Version;	//硬件版本号
+    3d96:	dc6e000d 	st.b      	r3, (r14, 0xd)
+	
+	SendLen = 0x0A;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3d9a:	310a      	movi      	r1, 10
+	SendData[SEND_LEN] = SendLen;	//len
+    3d9c:	330a      	movi      	r3, 10
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3d9e:	1801      	addi      	r0, r14, 4
+	SendData[SEND_LEN] = SendLen;	//len
+    3da0:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3da4:	e3fffd8b 	bsr      	0x38ba	// 38ba <CheckSum_Check>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3da8:	3314      	movi      	r3, 20
+    3daa:	b860      	st.w      	r3, (r14, 0x0)
+    3dac:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+    3dae:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+    3db2:	4361      	lsli      	r3, r3, 1
+    3db4:	1801      	addi      	r0, r14, 4
+    3db6:	3201      	movi      	r2, 1
+    3db8:	310a      	movi      	r1, 10
+    3dba:	e3fffbd1 	bsr      	0x355c	// 355c <Set_GroupSend>
+
+	return 0x00;
+}
+    3dbe:	3000      	movi      	r0, 0
+    3dc0:	1409      	addi      	r14, r14, 36
+    3dc2:	1490      	pop      	r15
+    3dc4:	2000036c 	.long	0x2000036c
+    3dc8:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.BLV_RLY_RS485_Pro:
+
+00003dcc <BLV_RLY_RS485_Pro>:
+
+U8_T BLV_RLY_RS485_Pro(U8_T *RecData, U16_T Len)
+{
+    3dcc:	14d3      	push      	r4-r6, r15
+	U8_T ret = 0x00;
+	
+	if(Len < 0x07)
+    3dce:	3906      	cmphsi      	r1, 7
+{
+    3dd0:	6d03      	mov      	r4, r0
+    3dd2:	6d47      	mov      	r5, r1
+	if(Len < 0x07)
+    3dd4:	0807      	bt      	0x3de2	// 3de2 <BLV_RLY_RS485_Pro+0x16>
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Data Len Err");
+    3dd6:	1136      	lrw      	r1, 0x4ddf	// 3eac <BLV_RLY_RS485_Pro+0xe0>
+		return 0x01;
+	}
+	
+	if(RecData[4] !=  Len)
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check Err");
+    3dd8:	3000      	movi      	r0, 0
+    3dda:	e3fffc4d 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x01;
+    3dde:	3001      	movi      	r0, 1
+		case CMD_READ_DEVPORT:
+			BLV_DEVPROT_CMD_READ_Processing(RecData,Len);
+		break;		
+	}
+	
+}
+    3de0:	1493      	pop      	r4-r6, r15
+	if(RecData[4] !=  Len)
+    3de2:	80c4      	ld.b      	r6, (r0, 0x4)
+    3de4:	645a      	cmpne      	r6, r1
+    3de6:	0c03      	bf      	0x3dec	// 3dec <BLV_RLY_RS485_Pro+0x20>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check Err");
+    3de8:	1132      	lrw      	r1, 0x4dec	// 3eb0 <BLV_RLY_RS485_Pro+0xe4>
+    3dea:	07f7      	br      	0x3dd8	// 3dd8 <BLV_RLY_RS485_Pro+0xc>
+	if(RecData[2] !=  A9EXPANDTYPE)			//A9继电器设备类型
+    3dec:	8062      	ld.b      	r3, (r0, 0x2)
+    3dee:	3b4e      	cmpnei      	r3, 14
+    3df0:	0c07      	bf      	0x3dfe	// 3dfe <BLV_RLY_RS485_Pro+0x32>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Type Check Err");
+    3df2:	3000      	movi      	r0, 0
+    3df4:	1130      	lrw      	r1, 0x4dfa	// 3eb4 <BLV_RLY_RS485_Pro+0xe8>
+    3df6:	e3fffc3f 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x02;		
+    3dfa:	3002      	movi      	r0, 2
+    3dfc:	07f2      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+	if(RecData[3] !=  g_Dip.addr)			//地址校验
+    3dfe:	116f      	lrw      	r3, 0x2000035c	// 3eb8 <BLV_RLY_RS485_Pro+0xec>
+    3e00:	8043      	ld.b      	r2, (r0, 0x3)
+    3e02:	8366      	ld.b      	r3, (r3, 0x6)
+    3e04:	64ca      	cmpne      	r2, r3
+    3e06:	0c07      	bf      	0x3e14	// 3e14 <BLV_RLY_RS485_Pro+0x48>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Addr Check Err ");	
+    3e08:	3000      	movi      	r0, 0
+    3e0a:	112d      	lrw      	r1, 0x4e09	// 3ebc <BLV_RLY_RS485_Pro+0xf0>
+    3e0c:	e3fffc34 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x03;		
+    3e10:	3003      	movi      	r0, 3
+    3e12:	07e7      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+	if( CheckSum_Overlook_Check(RecData,Len,SEND_SUM) != RecData[SEND_SUM] )		//和校验
+    3e14:	3205      	movi      	r2, 5
+    3e16:	6c5b      	mov      	r1, r6
+    3e18:	e3fffd5d 	bsr      	0x38d2	// 38d2 <CheckSum_Overlook_Check>
+    3e1c:	8445      	ld.b      	r2, (r4, 0x5)
+    3e1e:	6482      	cmpne      	r0, r2
+    3e20:	6cc3      	mov      	r3, r0
+    3e22:	0c0d      	bf      	0x3e3c	// 3e3c <BLV_RLY_RS485_Pro+0x70>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Sum Check Err: %02x,%02x",RecData[SEND_SUM],CheckSum_Overlook_Check(RecData,Len,SEND_SUM));
+    3e24:	1127      	lrw      	r1, 0x4e19	// 3ec0 <BLV_RLY_RS485_Pro+0xf4>
+    3e26:	3000      	movi      	r0, 0
+    3e28:	e3fffc26 	bsr      	0x3674	// 3674 <Dbg_Println>
+		Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"Sum Check Err: ",RecData,Len);
+    3e2c:	3000      	movi      	r0, 0
+    3e2e:	6cdb      	mov      	r3, r6
+    3e30:	6c93      	mov      	r2, r4
+    3e32:	1125      	lrw      	r1, 0x4e32	// 3ec4 <BLV_RLY_RS485_Pro+0xf8>
+    3e34:	e3fffc26 	bsr      	0x3680	// 3680 <Dbg_Print_Buff>
+		return 0x05;		
+    3e38:	3005      	movi      	r0, 5
+    3e3a:	07d3      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+    3e3c:	320f      	movi      	r2, 15
+    3e3e:	8461      	ld.b      	r3, (r4, 0x1)
+    3e40:	68c8      	and      	r3, r2
+	if((RecData[SEND_SN]&0x0F) == c_rly.SN)
+    3e42:	1142      	lrw      	r2, 0x2000036c	// 3ec8 <BLV_RLY_RS485_Pro+0xfc>
+    3e44:	824c      	ld.b      	r2, (r2, 0xc)
+    3e46:	64ca      	cmpne      	r2, r3
+    3e48:	0807      	bt      	0x3e56	// 3e56 <BLV_RLY_RS485_Pro+0x8a>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"SN is Equal: %02x",c_rly.SN);	
+    3e4a:	3000      	movi      	r0, 0
+    3e4c:	1120      	lrw      	r1, 0x4e42	// 3ecc <BLV_RLY_RS485_Pro+0x100>
+    3e4e:	e3fffc13 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x00;
+    3e52:	3000      	movi      	r0, 0
+    3e54:	07c6      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+	switch(RecData[0x06])
+    3e56:	8406      	ld.b      	r0, (r4, 0x6)
+    3e58:	281f      	subi      	r0, 32
+    3e5a:	380a      	cmphsi      	r0, 11
+    3e5c:	0bc2      	bt      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+    3e5e:	e3ffe74f 	bsr      	0xcfc	// cfc <___gnu_csky_case_sqi>
+    3e62:	bf06      	.short	0xbf06
+    3e64:	bf0bbfbf 	.long	0xbf0bbfbf
+    3e68:	151a10bf 	.long	0x151a10bf
+    3e6c:	001f      	.short	0x001f
+			BLV_A9RLY_CMD_SET_Processing(RecData,Len);
+    3e6e:	6c57      	mov      	r1, r5
+    3e70:	6c13      	mov      	r0, r4
+    3e72:	e3fffde1 	bsr      	0x3a34	// 3a34 <BLV_A9RLY_CMD_SET_Processing>
+		break;
+    3e76:	07b5      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_A9RLY_CMD_READ_Processing(RecData,Len);
+    3e78:	6c57      	mov      	r1, r5
+    3e7a:	6c13      	mov      	r0, r4
+    3e7c:	e3fffe2e 	bsr      	0x3ad8	// 3ad8 <BLV_A9RLY_CMD_READ_Processing>
+		break;
+    3e80:	07b0      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_WINDOUT_CMD_SET_Processing(RecData,Len);
+    3e82:	6c57      	mov      	r1, r5
+    3e84:	6c13      	mov      	r0, r4
+    3e86:	e3fffe6f 	bsr      	0x3b64	// 3b64 <BLV_WINDOUT_CMD_SET_Processing>
+		break;
+    3e8a:	07ab      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_WINDOUT_CMD_READ_Processing(RecData,Len);
+    3e8c:	6c57      	mov      	r1, r5
+    3e8e:	6c13      	mov      	r0, r4
+    3e90:	e3fffed6 	bsr      	0x3c3c	// 3c3c <BLV_WINDOUT_CMD_READ_Processing>
+		break;		
+    3e94:	07a6      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_DEVPROT_CMD_SET_Processing(RecData,Len);
+    3e96:	6c57      	mov      	r1, r5
+    3e98:	6c13      	mov      	r0, r4
+    3e9a:	e3ffff1b 	bsr      	0x3cd0	// 3cd0 <BLV_DEVPROT_CMD_SET_Processing>
+		break;
+    3e9e:	07a1      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_DEVPROT_CMD_READ_Processing(RecData,Len);
+    3ea0:	6c57      	mov      	r1, r5
+    3ea2:	6c13      	mov      	r0, r4
+    3ea4:	e3ffff5a 	bsr      	0x3d58	// 3d58 <BLV_DEVPROT_CMD_READ_Processing>
+}
+    3ea8:	079c      	br      	0x3de0	// 3de0 <BLV_RLY_RS485_Pro+0x14>
+    3eaa:	0000      	bkpt
+    3eac:	00004ddf 	.long	0x00004ddf
+    3eb0:	00004dec 	.long	0x00004dec
+    3eb4:	00004dfa 	.long	0x00004dfa
+    3eb8:	2000035c 	.long	0x2000035c
+    3ebc:	00004e09 	.long	0x00004e09
+    3ec0:	00004e19 	.long	0x00004e19
+    3ec4:	00004e32 	.long	0x00004e32
+    3ec8:	2000036c 	.long	0x2000036c
+    3ecc:	00004e42 	.long	0x00004e42
+
+Disassembly of section .text.CTRL_LEDStatus_Task:
+
+00003ed0 <CTRL_LEDStatus_Task>:
+
+
+
+void CTRL_LEDStatus_Task(void)
+{
+    3ed0:	14d0      	push      	r15
+	static U32_T Ctrl_LED_tick = 0x00;
+	
+	if(SysTick_1ms - Ctrl_LED_tick >= 500)
+    3ed2:	1029      	lrw      	r1, 0x200000a4	// 3ef4 <CTRL_LEDStatus_Task+0x24>
+    3ed4:	1049      	lrw      	r2, 0x200000bc	// 3ef8 <CTRL_LEDStatus_Task+0x28>
+    3ed6:	9160      	ld.w      	r3, (r1, 0x0)
+    3ed8:	9200      	ld.w      	r0, (r2, 0x0)
+    3eda:	60c2      	subu      	r3, r0
+    3edc:	1008      	lrw      	r0, 0x1f3	// 3efc <CTRL_LEDStatus_Task+0x2c>
+    3ede:	64c0      	cmphs      	r0, r3
+    3ee0:	0808      	bt      	0x3ef0	// 3ef0 <CTRL_LEDStatus_Task+0x20>
+	{
+		Ctrl_LED_tick = SysTick_1ms;
+    3ee2:	9160      	ld.w      	r3, (r1, 0x0)
+    3ee4:	b260      	st.w      	r3, (r2, 0x0)
+		
+		REVERISE_STATUS;
+    3ee6:	3104      	movi      	r1, 4
+    3ee8:	1066      	lrw      	r3, 0x2000004c	// 3f00 <CTRL_LEDStatus_Task+0x30>
+    3eea:	9300      	ld.w      	r0, (r3, 0x0)
+    3eec:	e3fff126 	bsr      	0x2138	// 2138 <GPIO_Reverse>
+	}
+    3ef0:	1490      	pop      	r15
+    3ef2:	0000      	bkpt
+    3ef4:	200000a4 	.long	0x200000a4
+    3ef8:	200000bc 	.long	0x200000bc
+    3efc:	000001f3 	.long	0x000001f3
+    3f00:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.EEPROM_CheckSum:
+
+00003f04 <EEPROM_CheckSum>:
+#include "includes.h"
+
+E_MCU_DEV_INFO g_mcu_dev;
+
+U8_T EEPROM_CheckSum(U8_T *data,U16_T len)
+{
+    3f04:	6cc3      	mov      	r3, r0
+    3f06:	6040      	addu      	r1, r0
+	U8_T data_sum = 0;
+    3f08:	3000      	movi      	r0, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    3f0a:	644e      	cmpne      	r3, r1
+    3f0c:	0802      	bt      	0x3f10	// 3f10 <EEPROM_CheckSum+0xc>
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+}
+    3f0e:	783c      	jmp      	r15
+		data_sum += data[i];
+    3f10:	8340      	ld.b      	r2, (r3, 0x0)
+    3f12:	6008      	addu      	r0, r2
+    3f14:	7400      	zextb      	r0, r0
+    3f16:	2300      	addi      	r3, 1
+    3f18:	07f9      	br      	0x3f0a	// 3f0a <EEPROM_CheckSum+0x6>
+
+Disassembly of section .text.EEPROM_ReadPara:
+
+00003f1c <EEPROM_ReadPara>:
+* Description    : 读取参数
+* Parameter		 :
+* 		info	：读取参数指针
+*******************************************************************************/
+U8_T EEPROM_ReadPara(void)
+{
+    3f1c:	14d1      	push      	r4, r15
+    3f1e:	1430      	subi      	r14, r14, 64
+	U32_T temp_addr = EEPROM_PARA_SaveAddr;
+	U8_T read_info[10];
+	U8_T para_data[EEPROM_PARA_Size];
+	UINT16 read_len = 0;
+	
+	memset(read_info,0,sizeof(read_info));
+    3f20:	6c3b      	mov      	r0, r14
+    3f22:	320a      	movi      	r2, 10
+    3f24:	3100      	movi      	r1, 0
+    3f26:	e3ffed2b 	bsr      	0x197c	// 197c <__memset_fast>
+	memset(para_data,0,sizeof(para_data));
+    3f2a:	3232      	movi      	r2, 50
+    3f2c:	3100      	movi      	r1, 0
+    3f2e:	1803      	addi      	r0, r14, 12
+    3f30:	e3ffed26 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	ReadDataArry_U8(temp_addr,4,read_info);
+    3f34:	6cbb      	mov      	r2, r14
+    3f36:	3104      	movi      	r1, 4
+    3f38:	1214      	lrw      	r0, 0x10000100	// 4088 <EEPROM_ReadPara+0x16c>
+    3f3a:	e3fff3a3 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+	
+	if(read_info[0] == EEPROM_SAVE_Flag){
+    3f3e:	d84e0000 	ld.b      	r2, (r14, 0x0)
+    3f42:	33a5      	movi      	r3, 165
+    3f44:	64ca      	cmpne      	r2, r3
+    3f46:	1292      	lrw      	r4, 0x2000036c	// 408c <EEPROM_ReadPara+0x170>
+    3f48:	0872      	bt      	0x402c	// 402c <EEPROM_ReadPara+0x110>
+		read_len = read_info[2];
+		read_len <<= 8;
+		read_len |= read_info[1];
+    3f4a:	d86e0002 	ld.b      	r3, (r14, 0x2)
+    3f4e:	d84e0001 	ld.b      	r2, (r14, 0x1)
+    3f52:	4368      	lsli      	r3, r3, 8
+		
+		if((read_len <= EEPROM_PARA_Size) && (read_len == 0x0A)){
+    3f54:	6cc8      	or      	r3, r2
+    3f56:	3b4a      	cmpnei      	r3, 10
+    3f58:	086a      	bt      	0x402c	// 402c <EEPROM_ReadPara+0x110>
+			temp_addr += EEPROM_Data_Offset;
+			ReadDataArry_U8(temp_addr,read_len,para_data);
+    3f5a:	1a03      	addi      	r2, r14, 12
+    3f5c:	310a      	movi      	r1, 10
+    3f5e:	120d      	lrw      	r0, 0x10000104	// 4090 <EEPROM_ReadPara+0x174>
+    3f60:	e3fff390 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+			if(CheckSum(para_data,read_len) == read_info[3]){
+    3f64:	310a      	movi      	r1, 10
+    3f66:	1803      	addi      	r0, r14, 12
+    3f68:	e3fffc9e 	bsr      	0x38a4	// 38a4 <CheckSum>
+    3f6c:	d86e0003 	ld.b      	r3, (r14, 0x3)
+    3f70:	640e      	cmpne      	r3, r0
+    3f72:	085d      	bt      	0x402c	// 402c <EEPROM_ReadPara+0x110>
+				//校验成功 - 读取参数
+				c_rly.wind_STOP_vol = (para_data[0] + (para_data[1]<<8));
+    3f74:	d86e000d 	ld.b      	r3, (r14, 0xd)
+    3f78:	d84e000c 	ld.b      	r2, (r14, 0xc)
+    3f7c:	4368      	lsli      	r3, r3, 8
+    3f7e:	60c8      	addu      	r3, r2
+    3f80:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_STOP_vol > 10000){
+    3f82:	1245      	lrw      	r2, 0x2710	// 4094 <EEPROM_ReadPara+0x178>
+    3f84:	64c8      	cmphs      	r2, r3
+    3f86:	0c48      	bf      	0x4016	// 4016 <EEPROM_ReadPara+0xfa>
+					c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+    3f88:	ac68      	st.h      	r3, (r4, 0x10)
+				}
+				
+				c_rly.wind_LOW_vol = (para_data[2] + (para_data[3]<<8));
+    3f8a:	d86e000f 	ld.b      	r3, (r14, 0xf)
+    3f8e:	d84e000e 	ld.b      	r2, (r14, 0xe)
+    3f92:	4368      	lsli      	r3, r3, 8
+    3f94:	60c8      	addu      	r3, r2
+    3f96:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_LOW_vol > 10000){
+    3f98:	115f      	lrw      	r2, 0x2710	// 4094 <EEPROM_ReadPara+0x178>
+    3f9a:	64c8      	cmphs      	r2, r3
+    3f9c:	0c3f      	bf      	0x401a	// 401a <EEPROM_ReadPara+0xfe>
+					c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+    3f9e:	ac69      	st.h      	r3, (r4, 0x12)
+				}
+				
+				c_rly.wind_MID_vol = (para_data[4] + (para_data[5]<<8));
+    3fa0:	d86e0011 	ld.b      	r3, (r14, 0x11)
+    3fa4:	d84e0010 	ld.b      	r2, (r14, 0x10)
+    3fa8:	4368      	lsli      	r3, r3, 8
+    3faa:	60c8      	addu      	r3, r2
+    3fac:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_MID_vol > 10000){
+    3fae:	115a      	lrw      	r2, 0x2710	// 4094 <EEPROM_ReadPara+0x178>
+    3fb0:	64c8      	cmphs      	r2, r3
+    3fb2:	0c36      	bf      	0x401e	// 401e <EEPROM_ReadPara+0x102>
+					c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+    3fb4:	ac6a      	st.h      	r3, (r4, 0x14)
+				}
+				
+				c_rly.wind_HIGH_vol = (para_data[6] + (para_data[7]<<8));
+    3fb6:	d86e0013 	ld.b      	r3, (r14, 0x13)
+    3fba:	d84e0012 	ld.b      	r2, (r14, 0x12)
+    3fbe:	4368      	lsli      	r3, r3, 8
+    3fc0:	60c8      	addu      	r3, r2
+    3fc2:	74cd      	zexth      	r3, r3
+				if(c_rly.wind_HIGH_vol > 10000){
+    3fc4:	1154      	lrw      	r2, 0x2710	// 4094 <EEPROM_ReadPara+0x178>
+    3fc6:	64c8      	cmphs      	r2, r3
+    3fc8:	0c2d      	bf      	0x4022	// 4022 <EEPROM_ReadPara+0x106>
+				c_rly.wind_HIGH_vol = (para_data[6] + (para_data[7]<<8));
+    3fca:	ac6b      	st.h      	r3, (r4, 0x16)
+					c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+				}				
+				
+				//设备端口模式
+				c_rly.dev_port = para_data[9];
+    3fcc:	d84e0015 	ld.b      	r2, (r14, 0x15)
+				if((c_rly.dev_port != ACTIVE_PORT)&&(c_rly.dev_port != POLLING_PORT))
+    3fd0:	5a63      	subi      	r3, r2, 1
+    3fd2:	74cc      	zextb      	r3, r3
+    3fd4:	3b01      	cmphsi      	r3, 2
+    3fd6:	0828      	bt      	0x4026	// 4026 <EEPROM_ReadPara+0x10a>
+				c_rly.dev_port = para_data[9];
+    3fd8:	a44b      	st.b      	r2, (r4, 0xb)
+				{
+					c_rly.dev_port = POLLING_PORT;
+				}
+
+
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_STOP_vol : %d",c_rly.wind_STOP_vol);
+    3fda:	8c48      	ld.h      	r2, (r4, 0x10)
+    3fdc:	112f      	lrw      	r1, 0x4e54	// 4098 <EEPROM_ReadPara+0x17c>
+    3fde:	3000      	movi      	r0, 0
+    3fe0:	e3fffb4a 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_LOW_vol  : %d",c_rly.wind_LOW_vol);
+    3fe4:	8c49      	ld.h      	r2, (r4, 0x12)
+    3fe6:	112e      	lrw      	r1, 0x4e77	// 409c <EEPROM_ReadPara+0x180>
+    3fe8:	3000      	movi      	r0, 0
+    3fea:	e3fffb45 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_MID_vol  : %d",c_rly.wind_MID_vol);
+    3fee:	8c4a      	ld.h      	r2, (r4, 0x14)
+    3ff0:	112c      	lrw      	r1, 0x4e9a	// 40a0 <EEPROM_ReadPara+0x184>
+    3ff2:	3000      	movi      	r0, 0
+    3ff4:	e3fffb40 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+    3ff8:	8c4b      	ld.h      	r2, (r4, 0x16)
+    3ffa:	112b      	lrw      	r1, 0x4ebd	// 40a4 <EEPROM_ReadPara+0x188>
+    3ffc:	3000      	movi      	r0, 0
+    3ffe:	e3fffb3b 	bsr      	0x3674	// 3674 <Dbg_Println>
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara dev_port      : %d",c_rly.dev_port);				
+    4002:	3000      	movi      	r0, 0
+    4004:	844b      	ld.b      	r2, (r4, 0xb)
+    4006:	1129      	lrw      	r1, 0x4ee0	// 40a8 <EEPROM_ReadPara+0x18c>
+    4008:	e3fffb36 	bsr      	0x3674	// 3674 <Dbg_Println>
+				SYSCON_IWDCNT_Reload(); 
+    400c:	e3ffee4c 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+				return 0x00;
+    4010:	3000      	movi      	r0, 0
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_MID_vol  : %d",c_rly.wind_MID_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"dev_port      : %d",c_rly.dev_port);		
+	SYSCON_IWDCNT_Reload(); 
+	return 0x01;
+}
+    4012:	1410      	addi      	r14, r14, 64
+    4014:	1491      	pop      	r4, r15
+					c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+    4016:	3300      	movi      	r3, 0
+    4018:	07b8      	br      	0x3f88	// 3f88 <EEPROM_ReadPara+0x6c>
+					c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+    401a:	116b      	lrw      	r3, 0xbb8	// 40c4 <EEPROM_ReadPara+0x1a8>
+    401c:	07c1      	br      	0x3f9e	// 3f9e <EEPROM_ReadPara+0x82>
+					c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+    401e:	116b      	lrw      	r3, 0x1770	// 40c8 <EEPROM_ReadPara+0x1ac>
+    4020:	07ca      	br      	0x3fb4	// 3fb4 <EEPROM_ReadPara+0x98>
+					c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+    4022:	ac4b      	st.h      	r2, (r4, 0x16)
+    4024:	07d4      	br      	0x3fcc	// 3fcc <EEPROM_ReadPara+0xb0>
+					c_rly.dev_port = POLLING_PORT;
+    4026:	3301      	movi      	r3, 1
+    4028:	a46b      	st.b      	r3, (r4, 0xb)
+    402a:	07d8      	br      	0x3fda	// 3fda <EEPROM_ReadPara+0xbe>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara Default!");
+    402c:	1120      	lrw      	r1, 0x4f03	// 40ac <EEPROM_ReadPara+0x190>
+    402e:	3000      	movi      	r0, 0
+    4030:	e3fffb22 	bsr      	0x3674	// 3674 <Dbg_Println>
+	c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+    4034:	3300      	movi      	r3, 0
+    4036:	ac68      	st.h      	r3, (r4, 0x10)
+	c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+    4038:	1163      	lrw      	r3, 0xbb8	// 40c4 <EEPROM_ReadPara+0x1a8>
+    403a:	ac69      	st.h      	r3, (r4, 0x12)
+	c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+    403c:	1163      	lrw      	r3, 0x1770	// 40c8 <EEPROM_ReadPara+0x1ac>
+    403e:	ac6a      	st.h      	r3, (r4, 0x14)
+	c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+    4040:	1163      	lrw      	r3, 0x2710	// 40cc <EEPROM_ReadPara+0x1b0>
+    4042:	ac6b      	st.h      	r3, (r4, 0x16)
+	c_rly.dev_port = POLLING_PORT;
+    4044:	3301      	movi      	r3, 1
+    4046:	a46b      	st.b      	r3, (r4, 0xb)
+	SYSCON_IWDCNT_Reload(); 
+    4048:	e3ffee2e 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_STOP_vol : %d",c_rly.wind_STOP_vol);
+    404c:	8c48      	ld.h      	r2, (r4, 0x10)
+    404e:	1039      	lrw      	r1, 0x4e64	// 40b0 <EEPROM_ReadPara+0x194>
+    4050:	3000      	movi      	r0, 0
+    4052:	e3fffb11 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_LOW_vol  : %d",c_rly.wind_LOW_vol);
+    4056:	8c49      	ld.h      	r2, (r4, 0x12)
+    4058:	1037      	lrw      	r1, 0x4e87	// 40b4 <EEPROM_ReadPara+0x198>
+    405a:	3000      	movi      	r0, 0
+    405c:	e3fffb0c 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_MID_vol  : %d",c_rly.wind_MID_vol);
+    4060:	8c4a      	ld.h      	r2, (r4, 0x14)
+    4062:	1036      	lrw      	r1, 0x4eaa	// 40b8 <EEPROM_ReadPara+0x19c>
+    4064:	3000      	movi      	r0, 0
+    4066:	e3fffb07 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+    406a:	8c4b      	ld.h      	r2, (r4, 0x16)
+    406c:	1034      	lrw      	r1, 0x4ecd	// 40bc <EEPROM_ReadPara+0x1a0>
+    406e:	3000      	movi      	r0, 0
+    4070:	e3fffb02 	bsr      	0x3674	// 3674 <Dbg_Println>
+	Dbg_Println(DBG_BIT_SYS_STATUS,"dev_port      : %d",c_rly.dev_port);		
+    4074:	3000      	movi      	r0, 0
+    4076:	844b      	ld.b      	r2, (r4, 0xb)
+    4078:	1032      	lrw      	r1, 0x4ef0	// 40c0 <EEPROM_ReadPara+0x1a4>
+    407a:	e3fffafd 	bsr      	0x3674	// 3674 <Dbg_Println>
+	SYSCON_IWDCNT_Reload(); 
+    407e:	e3ffee13 	bsr      	0x1ca4	// 1ca4 <SYSCON_IWDCNT_Reload>
+	return 0x01;
+    4082:	3001      	movi      	r0, 1
+    4084:	07c7      	br      	0x4012	// 4012 <EEPROM_ReadPara+0xf6>
+    4086:	0000      	bkpt
+    4088:	10000100 	.long	0x10000100
+    408c:	2000036c 	.long	0x2000036c
+    4090:	10000104 	.long	0x10000104
+    4094:	00002710 	.long	0x00002710
+    4098:	00004e54 	.long	0x00004e54
+    409c:	00004e77 	.long	0x00004e77
+    40a0:	00004e9a 	.long	0x00004e9a
+    40a4:	00004ebd 	.long	0x00004ebd
+    40a8:	00004ee0 	.long	0x00004ee0
+    40ac:	00004f03 	.long	0x00004f03
+    40b0:	00004e64 	.long	0x00004e64
+    40b4:	00004e87 	.long	0x00004e87
+    40b8:	00004eaa 	.long	0x00004eaa
+    40bc:	00004ecd 	.long	0x00004ecd
+    40c0:	00004ef0 	.long	0x00004ef0
+    40c4:	00000bb8 	.long	0x00000bb8
+    40c8:	00001770 	.long	0x00001770
+    40cc:	00002710 	.long	0x00002710
+
+Disassembly of section .text.EEPROM_ValidateWrite:
+
+000040d0 <EEPROM_ValidateWrite>:
+
+/*******************************************************************************
+* Function Name  : EEPROM_ValidateWrite 
+* Description    : 校验写入参数
+*******************************************************************************/
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+    40d0:	1425      	subi      	r14, r14, 20
+    40d2:	dd0e2003 	st.w      	r8, (r14, 0xc)
+    40d6:	6e3b      	mov      	r8, r14
+    40d8:	b880      	st.w      	r4, (r14, 0x0)
+    40da:	b8a1      	st.w      	r5, (r14, 0x4)
+    40dc:	b8c2      	st.w      	r6, (r14, 0x8)
+    40de:	ddee2004 	st.w      	r15, (r14, 0x10)
+	U8_T Read_para[Write_Len];
+    40e2:	5a6a      	addi      	r3, r2, 3
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+    40e4:	6d0b      	mov      	r4, r2
+	U8_T Read_para[Write_Len];
+    40e6:	4b62      	lsri      	r3, r3, 2
+    40e8:	3280      	movi      	r2, 128
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+    40ea:	6d83      	mov      	r6, r0
+    40ec:	6d47      	mov      	r5, r1
+	U8_T Read_para[Write_Len];
+    40ee:	4362      	lsli      	r3, r3, 2
+    40f0:	4245      	lsli      	r2, r2, 5
+    40f2:	64c8      	cmphs      	r2, r3
+    40f4:	0806      	bt      	0x4100	// 4100 <EEPROM_ValidateWrite+0x30>
+    40f6:	638a      	subu      	r14, r2
+    40f8:	ddce2000 	st.w      	r14, (r14, 0x0)
+    40fc:	60ca      	subu      	r3, r2
+    40fe:	07fa      	br      	0x40f2	// 40f2 <EEPROM_ValidateWrite+0x22>
+    4100:	638e      	subu      	r14, r3
+	U16_T i = 0;
+	
+	memset(Read_para,0,sizeof(Read_para));
+    4102:	6c93      	mov      	r2, r4
+    4104:	3100      	movi      	r1, 0
+    4106:	6c3b      	mov      	r0, r14
+    4108:	e3ffec3a 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	ReadDataArry_U8(Eeprom_Write_SaveAddr,Write_Len,Read_para);
+    410c:	6c53      	mov      	r1, r4
+    410e:	6cbb      	mov      	r2, r14
+    4110:	6c1b      	mov      	r0, r6
+    4112:	e3fff2b7 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+    4116:	6138      	addu      	r4, r14
+    4118:	6cfb      	mov      	r3, r14
+	for(i=0;i<Write_Len;i++){
+    411a:	650e      	cmpne      	r3, r4
+    411c:	080c      	bt      	0x4134	// 4134 <EEPROM_ValidateWrite+0x64>
+		if (Read_para[i]!=Write_Data[i]) {
+			return 0x01;
+		}
+	}
+	return 0x00;
+    411e:	3000      	movi      	r0, 0
+}
+    4120:	6fa3      	mov      	r14, r8
+    4122:	d9ee2004 	ld.w      	r15, (r14, 0x10)
+    4126:	d90e2003 	ld.w      	r8, (r14, 0xc)
+    412a:	98c2      	ld.w      	r6, (r14, 0x8)
+    412c:	98a1      	ld.w      	r5, (r14, 0x4)
+    412e:	9880      	ld.w      	r4, (r14, 0x0)
+    4130:	1405      	addi      	r14, r14, 20
+    4132:	783c      	jmp      	r15
+		if (Read_para[i]!=Write_Data[i]) {
+    4134:	8320      	ld.b      	r1, (r3, 0x0)
+    4136:	8540      	ld.b      	r2, (r5, 0x0)
+    4138:	6486      	cmpne      	r1, r2
+    413a:	2300      	addi      	r3, 1
+    413c:	2500      	addi      	r5, 1
+    413e:	0fee      	bf      	0x411a	// 411a <EEPROM_ValidateWrite+0x4a>
+			return 0x01;
+    4140:	3001      	movi      	r0, 1
+    4142:	07ef      	br      	0x4120	// 4120 <EEPROM_ValidateWrite+0x50>
+
+Disassembly of section .text.EEPROM_WritePara:
+
+00004144 <EEPROM_WritePara>:
+/*******************************************************************************
+* Function Name  : EEPROM_WritePara 
+* Description    : 保存参数
+*******************************************************************************/
+U8_T EEPROM_WritePara(void)
+{
+    4144:	14d1      	push      	r4, r15
+    4146:	142f      	subi      	r14, r14, 60
+	U32_T temp_addr = EEPROM_PARA_SaveAddr;
+	U8_T save_para[EEPROM_PARA_Size+10];
+	UINT16 save_len = 0x0A;
+	
+	memset(save_para,0,sizeof(save_para));
+    4148:	6c3b      	mov      	r0, r14
+    414a:	323c      	movi      	r2, 60
+    414c:	3100      	movi      	r1, 0
+    414e:	e3ffec17 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	if(save_len >= EEPROM_PARA_Size)	save_len = EEPROM_PARA_Size;
+	
+	save_para[0] = EEPROM_SAVE_Flag;
+    4152:	3300      	movi      	r3, 0
+    4154:	2b5a      	subi      	r3, 91
+    4156:	dc6e0000 	st.b      	r3, (r14, 0x0)
+	save_para[1] = save_len & 0xFF;
+    415a:	330a      	movi      	r3, 10
+    415c:	dc6e0001 	st.b      	r3, (r14, 0x1)
+	save_para[12] = g_Dip.addr;
+	save_para[13] = c_rly.dev_port;		//端口模式
+	
+	
+	
+	save_para[3] = CheckSum(&save_para[4],save_len);
+    4160:	310a      	movi      	r1, 10
+	save_para[4] = c_rly.wind_STOP_vol & 0xFF;
+    4162:	1160      	lrw      	r3, 0x2000036c	// 41e0 <EEPROM_WritePara+0x9c>
+    4164:	8b48      	ld.h      	r2, (r3, 0x10)
+    4166:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	save_para[5] = (c_rly.wind_STOP_vol >> 8) & 0xFF;	
+    416a:	4a48      	lsri      	r2, r2, 8
+    416c:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	save_para[6] = c_rly.wind_LOW_vol & 0xFF;
+    4170:	8b49      	ld.h      	r2, (r3, 0x12)
+    4172:	dc4e0006 	st.b      	r2, (r14, 0x6)
+	save_para[7] = (c_rly.wind_LOW_vol >> 8) & 0xFF;	
+    4176:	4a48      	lsri      	r2, r2, 8
+    4178:	dc4e0007 	st.b      	r2, (r14, 0x7)
+	save_para[8] = c_rly.wind_MID_vol & 0xFF;
+    417c:	8b4a      	ld.h      	r2, (r3, 0x14)
+    417e:	dc4e0008 	st.b      	r2, (r14, 0x8)
+	save_para[9] = (c_rly.wind_MID_vol >> 8) & 0xFF;	
+    4182:	4a48      	lsri      	r2, r2, 8
+    4184:	dc4e0009 	st.b      	r2, (r14, 0x9)
+	save_para[10] = c_rly.wind_HIGH_vol & 0xFF;
+    4188:	8b4b      	ld.h      	r2, (r3, 0x16)
+    418a:	dc4e000a 	st.b      	r2, (r14, 0xa)
+	save_para[11] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;	
+    418e:	4a48      	lsri      	r2, r2, 8
+    4190:	dc4e000b 	st.b      	r2, (r14, 0xb)
+	save_para[13] = c_rly.dev_port;		//端口模式
+    4194:	836b      	ld.b      	r3, (r3, 0xb)
+	save_para[12] = g_Dip.addr;
+    4196:	1054      	lrw      	r2, 0x2000035c	// 41e4 <EEPROM_WritePara+0xa0>
+    4198:	8246      	ld.b      	r2, (r2, 0x6)
+	save_para[3] = CheckSum(&save_para[4],save_len);
+    419a:	1801      	addi      	r0, r14, 4
+	save_para[13] = c_rly.dev_port;		//端口模式
+    419c:	dc6e000d 	st.b      	r3, (r14, 0xd)
+	save_para[12] = g_Dip.addr;
+    41a0:	dc4e000c 	st.b      	r2, (r14, 0xc)
+	save_para[3] = CheckSum(&save_para[4],save_len);
+    41a4:	e3fffb80 	bsr      	0x38a4	// 38a4 <CheckSum>
+    41a8:	dc0e0003 	st.b      	r0, (r14, 0x3)
+	
+	save_len += 4;
+	Page_ProgramData(temp_addr,save_len,save_para);	
+    41ac:	6cbb      	mov      	r2, r14
+    41ae:	310e      	movi      	r1, 14
+    41b0:	100e      	lrw      	r0, 0x10000100	// 41e8 <EEPROM_WritePara+0xa4>
+    41b2:	e3fff217 	bsr      	0x25e0	// 25e0 <Page_ProgramData>
+	
+	if(EEPROM_ValidateWrite(temp_addr,save_para,save_len)){
+    41b6:	320e      	movi      	r2, 14
+    41b8:	6c7b      	mov      	r1, r14
+    41ba:	100c      	lrw      	r0, 0x10000100	// 41e8 <EEPROM_WritePara+0xa4>
+    41bc:	e3ffff8a 	bsr      	0x40d0	// 40d0 <EEPROM_ValidateWrite>
+    41c0:	3840      	cmpnei      	r0, 0
+    41c2:	6d03      	mov      	r4, r0
+    41c4:	0c09      	bf      	0x41d6	// 41d6 <EEPROM_WritePara+0x92>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para Err");
+    41c6:	102a      	lrw      	r1, 0x4f1c	// 41ec <EEPROM_WritePara+0xa8>
+    41c8:	3000      	movi      	r0, 0
+    41ca:	e3fffa55 	bsr      	0x3674	// 3674 <Dbg_Println>
+		return 0x01;
+    41ce:	3401      	movi      	r4, 1
+	}	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para");
+	return 0;
+}
+    41d0:	6c13      	mov      	r0, r4
+    41d2:	140f      	addi      	r14, r14, 60
+    41d4:	1491      	pop      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para");
+    41d6:	1027      	lrw      	r1, 0x4f3b	// 41f0 <EEPROM_WritePara+0xac>
+    41d8:	3000      	movi      	r0, 0
+    41da:	e3fffa4d 	bsr      	0x3674	// 3674 <Dbg_Println>
+	return 0;
+    41de:	07f9      	br      	0x41d0	// 41d0 <EEPROM_WritePara+0x8c>
+    41e0:	2000036c 	.long	0x2000036c
+    41e4:	2000035c 	.long	0x2000035c
+    41e8:	10000100 	.long	0x10000100
+    41ec:	00004f1c 	.long	0x00004f1c
+    41f0:	00004f3b 	.long	0x00004f3b
+
+Disassembly of section .text.EEPROM_ReadMCUDevInfo:
+
+000041f4 <EEPROM_ReadMCUDevInfo>:
+/*******************************************************************************
+* Function Name  : EEPROM_ReadMCUDevInfo 
+* Description    : 从EEPROM中读取设备信息
+*******************************************************************************/
+U8_T EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    41f4:	14d1      	push      	r4, r15
+    41f6:	1432      	subi      	r14, r14, 72
+    41f8:	6d03      	mov      	r4, r0
+	U8_T read_info[6];
+	U8_T para_data[EEPROM_DATA_Size_Max];
+	U16_T read_len = 0;
+	
+	memset(read_info,0,sizeof(read_info));
+    41fa:	3300      	movi      	r3, 0
+	memset(para_data,0,sizeof(para_data));
+    41fc:	3240      	movi      	r2, 64
+    41fe:	3100      	movi      	r1, 0
+    4200:	1802      	addi      	r0, r14, 8
+	memset(read_info,0,sizeof(read_info));
+    4202:	b860      	st.w      	r3, (r14, 0x0)
+    4204:	dc6e1002 	st.h      	r3, (r14, 0x4)
+	memset(para_data,0,sizeof(para_data));
+    4208:	e3ffebba 	bsr      	0x197c	// 197c <__memset_fast>
+	
+	ReadDataArry_U8(EEPROM_MCUDevInfo_Address,4,read_info);
+    420c:	3080      	movi      	r0, 128
+    420e:	6cbb      	mov      	r2, r14
+    4210:	3104      	movi      	r1, 4
+    4212:	4015      	lsli      	r0, r0, 21
+    4214:	e3fff236 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+	
+	if(read_info[0] == EEPROM_SVAE_FLAG){
+    4218:	d84e0000 	ld.b      	r2, (r14, 0x0)
+    421c:	33ae      	movi      	r3, 174
+    421e:	64ca      	cmpne      	r2, r3
+    4220:	0c04      	bf      	0x4228	// 4228 <EEPROM_ReadMCUDevInfo+0x34>
+				return 0x00;
+			}
+		}
+	}
+	
+	return 0x01;
+    4222:	3001      	movi      	r0, 1
+}
+    4224:	1412      	addi      	r14, r14, 72
+    4226:	1491      	pop      	r4, r15
+		read_len |= read_info[1];
+    4228:	d82e0002 	ld.b      	r1, (r14, 0x2)
+    422c:	d86e0001 	ld.b      	r3, (r14, 0x1)
+    4230:	4128      	lsli      	r1, r1, 8
+    4232:	6c4c      	or      	r1, r3
+		if(read_len <= EEPROM_DATA_Size_Max){
+    4234:	3340      	movi      	r3, 64
+    4236:	644c      	cmphs      	r3, r1
+    4238:	0ff5      	bf      	0x4222	// 4222 <EEPROM_ReadMCUDevInfo+0x2e>
+			ReadDataArry_U8(EEPROM_MCUDevInfo_Address+EEPROM_Offset_Data,read_len,para_data);
+    423a:	1a02      	addi      	r2, r14, 8
+    423c:	1009      	lrw      	r0, 0x10000004	// 4260 <EEPROM_ReadMCUDevInfo+0x6c>
+    423e:	e3fff221 	bsr      	0x2680	// 2680 <ReadDataArry_U8>
+			if(EEPROM_CheckSum(para_data,sizeof(E_MCU_DEV_INFO)) == read_info[3]){
+    4242:	3125      	movi      	r1, 37
+    4244:	1802      	addi      	r0, r14, 8
+    4246:	e3fffe5f 	bsr      	0x3f04	// 3f04 <EEPROM_CheckSum>
+    424a:	d86e0003 	ld.b      	r3, (r14, 0x3)
+    424e:	640e      	cmpne      	r3, r0
+    4250:	0be9      	bt      	0x4222	// 4222 <EEPROM_ReadMCUDevInfo+0x2e>
+				memcpy((uint8_t *)info,para_data,sizeof(E_MCU_DEV_INFO));
+    4252:	3225      	movi      	r2, 37
+    4254:	1902      	addi      	r1, r14, 8
+    4256:	6c13      	mov      	r0, r4
+    4258:	e3ffebd6 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+				return 0x00;
+    425c:	3000      	movi      	r0, 0
+    425e:	07e3      	br      	0x4224	// 4224 <EEPROM_ReadMCUDevInfo+0x30>
+    4260:	10000004 	.long	0x10000004
+
+Disassembly of section .text.EEPROM_WriteMCUDevInfo:
+
+00004264 <EEPROM_WriteMCUDevInfo>:
+/*******************************************************************************
+* Function Name  : EEPROM_WriteMCUDevInfo 
+* Description    : 将设备信息写入到EEPROM中
+*******************************************************************************/
+U8_T EEPROM_WriteMCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    4264:	14d0      	push      	r15
+    4266:	1432      	subi      	r14, r14, 72
+	U8_T save_data[EEPROM_DATA_Size_Max + 6];
+	U16_T save_len = sizeof(E_MCU_DEV_INFO);
+	
+	if(save_len >= EEPROM_DATA_Size_Max) save_len = EEPROM_DATA_Size_Max;
+	
+	save_data[0] = EEPROM_SVAE_FLAG;
+    4268:	3300      	movi      	r3, 0
+    426a:	2b51      	subi      	r3, 82
+    426c:	dc6e0000 	st.b      	r3, (r14, 0x0)
+	save_data[1] = save_len & 0xFF;
+    4270:	3325      	movi      	r3, 37
+    4272:	dc6e0001 	st.b      	r3, (r14, 0x1)
+	save_data[2] = (save_len >> 8) & 0xFF;
+    4276:	3300      	movi      	r3, 0
+    4278:	dc6e0002 	st.b      	r3, (r14, 0x2)
+	
+	memcpy(&save_data[4],(uint8_t *)info,save_len);
+    427c:	1b01      	addi      	r3, r14, 4
+{
+    427e:	6c43      	mov      	r1, r0
+	memcpy(&save_data[4],(uint8_t *)info,save_len);
+    4280:	3225      	movi      	r2, 37
+    4282:	6c0f      	mov      	r0, r3
+    4284:	e3ffebc0 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+	
+	save_data[3] = EEPROM_CheckSum(&save_data[4],save_len);
+    4288:	3125      	movi      	r1, 37
+    428a:	e3fffe3d 	bsr      	0x3f04	// 3f04 <EEPROM_CheckSum>
+    428e:	dc0e0003 	st.b      	r0, (r14, 0x3)
+	
+	save_len+=4;
+	
+	Page_ProgramData(EEPROM_MCUDevInfo_Address,save_len,save_data);
+    4292:	3080      	movi      	r0, 128
+    4294:	4015      	lsli      	r0, r0, 21
+    4296:	6cbb      	mov      	r2, r14
+    4298:	3129      	movi      	r1, 41
+    429a:	e3fff1a3 	bsr      	0x25e0	// 25e0 <Page_ProgramData>
+	
+	return 0;
+}
+    429e:	3000      	movi      	r0, 0
+    42a0:	1412      	addi      	r14, r14, 72
+    42a2:	1490      	pop      	r15
+
+Disassembly of section .text.EEPROM_Default_MCUDevInfo:
+
+000042a4 <EEPROM_Default_MCUDevInfo>:
+/*******************************************************************************
+* Function Name  : EEPROM_Default_MCUDevInfo 
+* Description    : EEPROM中参数恢复默认值，且将默认参数保存至EEPROM中
+*******************************************************************************/
+void EEPROM_Default_MCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    42a4:	14d2      	push      	r4-r5, r15
+	memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+
+	EEPROM_WriteMCUDevInfo(info);
+#elif (Project_Area == 0x02)
+	/*APP 区域*/
+	info->dev_addr = 0x00;
+    42a6:	3300      	movi      	r3, 0
+    42a8:	a060      	st.b      	r3, (r0, 0x0)
+	info->dev_type = Project_Type;
+    42aa:	a061      	st.b      	r3, (r0, 0x1)
+	info->dev_app_ver = Project_FW_Version;
+    42ac:	3302      	movi      	r3, 2
+    42ae:	a063      	st.b      	r3, (r0, 0x3)
+	info->dev_name_len = sizeof(Peoject_Name);
+
+	memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
+    42b0:	58b2      	addi      	r5, r0, 5
+	info->dev_name_len = sizeof(Peoject_Name);
+    42b2:	330f      	movi      	r3, 15
+    42b4:	a064      	st.b      	r3, (r0, 0x4)
+{
+    42b6:	6d03      	mov      	r4, r0
+	memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
+    42b8:	3220      	movi      	r2, 32
+    42ba:	3100      	movi      	r1, 0
+    42bc:	6c17      	mov      	r0, r5
+    42be:	e3ffeb5f 	bsr      	0x197c	// 197c <__memset_fast>
+	memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+    42c2:	320f      	movi      	r2, 15
+    42c4:	1024      	lrw      	r1, 0x4f56	// 42d4 <EEPROM_Default_MCUDevInfo+0x30>
+    42c6:	6c17      	mov      	r0, r5
+    42c8:	e3ffeb9e 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+
+	EEPROM_WriteMCUDevInfo(info);
+    42cc:	6c13      	mov      	r0, r4
+    42ce:	e3ffffcb 	bsr      	0x4264	// 4264 <EEPROM_WriteMCUDevInfo>
+#endif
+}
+    42d2:	1492      	pop      	r4-r5, r15
+    42d4:	00004f56 	.long	0x00004f56
+
+Disassembly of section .text.EEPROM_Validate_MCUDevInfo:
+
+000042d8 <EEPROM_Validate_MCUDevInfo>:
+* Description    : 校验从EEPROM 中读取的参数是否正确，如果不正确的话，便将当前正确的参数写入
+		APP区域中，判断APP参数与EEPROM中记录的是否一致
+		Boot区域中，判断Boot参数与EEPROM中记录的是否一致
+*******************************************************************************/
+void EEPROM_Validate_MCUDevInfo(E_MCU_DEV_INFO *info)
+{
+    42d8:	14d3      	push      	r4-r6, r15
+	}
+#elif (Project_Area == 0x02)
+	/*APP 区域*/
+	U8_T save_flag = 0;
+
+	if(info->dev_app_ver != Project_FW_Version)
+    42da:	8063      	ld.b      	r3, (r0, 0x3)
+    42dc:	3b42      	cmpnei      	r3, 2
+{
+    42de:	6d03      	mov      	r4, r0
+	if(info->dev_app_ver != Project_FW_Version)
+    42e0:	0c21      	bf      	0x4322	// 4322 <EEPROM_Validate_MCUDevInfo+0x4a>
+	{
+		info->dev_app_ver = Project_FW_Version;
+    42e2:	3302      	movi      	r3, 2
+    42e4:	a063      	st.b      	r3, (r0, 0x3)
+		save_flag = 0x01;
+    42e6:	3501      	movi      	r5, 1
+	}
+
+	if(info->dev_type != Project_Type)
+    42e8:	8461      	ld.b      	r3, (r4, 0x1)
+    42ea:	3b40      	cmpnei      	r3, 0
+    42ec:	0c04      	bf      	0x42f4	// 42f4 <EEPROM_Validate_MCUDevInfo+0x1c>
+	{
+		info->dev_type = Project_Type;
+    42ee:	3300      	movi      	r3, 0
+    42f0:	a461      	st.b      	r3, (r4, 0x1)
+		save_flag = 0x01;
+    42f2:	3501      	movi      	r5, 1
+	}
+
+	if(info->dev_name_len != sizeof(Peoject_Name))
+    42f4:	8464      	ld.b      	r3, (r4, 0x4)
+    42f6:	3b4f      	cmpnei      	r3, 15
+    42f8:	0c04      	bf      	0x4300	// 4300 <EEPROM_Validate_MCUDevInfo+0x28>
+	{
+		info->dev_name_len = sizeof(Peoject_Name);
+    42fa:	330f      	movi      	r3, 15
+    42fc:	a464      	st.b      	r3, (r4, 0x4)
+		save_flag = 0x01;
+    42fe:	3501      	movi      	r5, 1
+	}
+
+	if(strncmp((char *)info->dev_name,(char *)Peoject_Name,sizeof(Peoject_Name)))
+    4300:	5cd2      	addi      	r6, r4, 5
+    4302:	320f      	movi      	r2, 15
+    4304:	102a      	lrw      	r1, 0x4f56	// 432c <EEPROM_Validate_MCUDevInfo+0x54>
+    4306:	6c1b      	mov      	r0, r6
+    4308:	e3ffebb0 	bsr      	0x1a68	// 1a68 <__GI_strncmp>
+    430c:	3840      	cmpnei      	r0, 0
+    430e:	0c0c      	bf      	0x4326	// 4326 <EEPROM_Validate_MCUDevInfo+0x4e>
+	{
+		memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+    4310:	8444      	ld.b      	r2, (r4, 0x4)
+    4312:	1027      	lrw      	r1, 0x4f56	// 432c <EEPROM_Validate_MCUDevInfo+0x54>
+    4314:	6c1b      	mov      	r0, r6
+    4316:	e3ffeb77 	bsr      	0x1a04	// 1a04 <__memcpy_fast>
+		save_flag = 0x01;
+	}
+
+	if(save_flag == 0x01)
+	{
+		EEPROM_WriteMCUDevInfo(info);
+    431a:	6c13      	mov      	r0, r4
+    431c:	e3ffffa4 	bsr      	0x4264	// 4264 <EEPROM_WriteMCUDevInfo>
+	}
+#endif
+}
+    4320:	0405      	br      	0x432a	// 432a <EEPROM_Validate_MCUDevInfo+0x52>
+	U8_T save_flag = 0;
+    4322:	3500      	movi      	r5, 0
+    4324:	07e2      	br      	0x42e8	// 42e8 <EEPROM_Validate_MCUDevInfo+0x10>
+	if(save_flag == 0x01)
+    4326:	3d41      	cmpnei      	r5, 1
+    4328:	0ff9      	bf      	0x431a	// 431a <EEPROM_Validate_MCUDevInfo+0x42>
+}
+    432a:	1493      	pop      	r4-r6, r15
+    432c:	00004f56 	.long	0x00004f56
+
+Disassembly of section .text.EEPROM_Init:
+
+00004330 <EEPROM_Init>:
+{
+    4330:	14d2      	push      	r4-r5, r15
+	EnIFCClk; //使能 IFC 时钟
+    4332:	1074      	lrw      	r3, 0x20000060	// 4380 <EEPROM_Init+0x50>
+    4334:	3201      	movi      	r2, 1
+    4336:	9360      	ld.w      	r3, (r3, 0x0)
+    4338:	b341      	st.w      	r2, (r3, 0x4)
+	IFC->MR |= 0x10002; //高速模式，延迟 2 个周期
+    433a:	9345      	ld.w      	r2, (r3, 0x14)
+    433c:	3aa1      	bseti      	r2, 1
+    433e:	3ab0      	bseti      	r2, 16
+    4340:	b345      	st.w      	r2, (r3, 0x14)
+	EEPROM_ReadPara();
+    4342:	e3fffded 	bsr      	0x3f1c	// 3f1c <EEPROM_ReadPara>
+	memset(&g_mcu_dev,0,sizeof(E_MCU_DEV_INFO));
+    4346:	1090      	lrw      	r4, 0x20000384	// 4384 <EEPROM_Init+0x54>
+    4348:	3225      	movi      	r2, 37
+    434a:	3100      	movi      	r1, 0
+    434c:	6c13      	mov      	r0, r4
+    434e:	e3ffeb17 	bsr      	0x197c	// 197c <__memset_fast>
+	rev = EEPROM_ReadMCUDevInfo(&g_mcu_dev);
+    4352:	6c13      	mov      	r0, r4
+    4354:	e3ffff50 	bsr      	0x41f4	// 41f4 <EEPROM_ReadMCUDevInfo>
+	if(g_Dip.addr != g_mcu_dev.dev_addr){
+    4358:	106c      	lrw      	r3, 0x2000035c	// 4388 <EEPROM_Init+0x58>
+    435a:	8366      	ld.b      	r3, (r3, 0x6)
+    435c:	8440      	ld.b      	r2, (r4, 0x0)
+    435e:	64ca      	cmpne      	r2, r3
+	rev = EEPROM_ReadMCUDevInfo(&g_mcu_dev);
+    4360:	6d43      	mov      	r5, r0
+	if(g_Dip.addr != g_mcu_dev.dev_addr){
+    4362:	0c05      	bf      	0x436c	// 436c <EEPROM_Init+0x3c>
+		EEPROM_WriteMCUDevInfo(&g_mcu_dev);
+    4364:	6c13      	mov      	r0, r4
+		g_mcu_dev.dev_addr = g_Dip.addr;
+    4366:	a460      	st.b      	r3, (r4, 0x0)
+		EEPROM_WriteMCUDevInfo(&g_mcu_dev);
+    4368:	e3ffff7e 	bsr      	0x4264	// 4264 <EEPROM_WriteMCUDevInfo>
+	if(rev == 0x00){
+    436c:	3d40      	cmpnei      	r5, 0
+		EEPROM_Validate_MCUDevInfo(&g_mcu_dev);
+    436e:	1006      	lrw      	r0, 0x20000384	// 4384 <EEPROM_Init+0x54>
+	if(rev == 0x00){
+    4370:	0804      	bt      	0x4378	// 4378 <EEPROM_Init+0x48>
+		EEPROM_Validate_MCUDevInfo(&g_mcu_dev);
+    4372:	e3ffffb3 	bsr      	0x42d8	// 42d8 <EEPROM_Validate_MCUDevInfo>
+}
+    4376:	1492      	pop      	r4-r5, r15
+		EEPROM_Default_MCUDevInfo(&g_mcu_dev);
+    4378:	e3ffff96 	bsr      	0x42a4	// 42a4 <EEPROM_Default_MCUDevInfo>
+}
+    437c:	07fd      	br      	0x4376	// 4376 <EEPROM_Init+0x46>
+    437e:	0000      	bkpt
+    4380:	20000060 	.long	0x20000060
+    4384:	20000384 	.long	0x20000384
+    4388:	2000035c 	.long	0x2000035c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+0000438c <TK_Sampling_prog>:
+    438c:	14c4      	push      	r4-r7
+    438e:	1072      	lrw      	r3, 0x20000054	// 43d4 <TK_Sampling_prog+0x48>
+    4390:	1012      	lrw      	r0, 0x20000652	// 43d8 <TK_Sampling_prog+0x4c>
+    4392:	1093      	lrw      	r4, 0x200004c3	// 43dc <TK_Sampling_prog+0x50>
+    4394:	6d83      	mov      	r6, r0
+    4396:	93a0      	ld.w      	r5, (r3, 0x0)
+    4398:	3300      	movi      	r3, 0
+    439a:	4342      	lsli      	r2, r3, 2
+    439c:	6094      	addu      	r2, r5
+    439e:	9220      	ld.w      	r1, (r2, 0x0)
+    43a0:	4341      	lsli      	r2, r3, 1
+    43a2:	6080      	addu      	r2, r0
+    43a4:	7445      	zexth      	r1, r1
+    43a6:	aa20      	st.h      	r1, (r2, 0x0)
+    43a8:	8440      	ld.b      	r2, (r4, 0x0)
+    43aa:	3a41      	cmpnei      	r2, 1
+    43ac:	080f      	bt      	0x43ca	// 43ca <TK_Sampling_prog+0x3e>
+    43ae:	3300      	movi      	r3, 0
+    43b0:	10ec      	lrw      	r7, 0x200003ac	// 43e0 <TK_Sampling_prog+0x54>
+    43b2:	4341      	lsli      	r2, r3, 1
+    43b4:	5e28      	addu      	r1, r6, r2
+    43b6:	8920      	ld.h      	r1, (r1, 0x0)
+    43b8:	2300      	addi      	r3, 1
+    43ba:	7445      	zexth      	r1, r1
+    43bc:	609c      	addu      	r2, r7
+    43be:	3b51      	cmpnei      	r3, 17
+    43c0:	aa20      	st.h      	r1, (r2, 0x0)
+    43c2:	0bf8      	bt      	0x43b2	// 43b2 <TK_Sampling_prog+0x26>
+    43c4:	3300      	movi      	r3, 0
+    43c6:	a460      	st.b      	r3, (r4, 0x0)
+    43c8:	3311      	movi      	r3, 17
+    43ca:	2300      	addi      	r3, 1
+    43cc:	74cc      	zextb      	r3, r3
+    43ce:	3b10      	cmphsi      	r3, 17
+    43d0:	0fe5      	bf      	0x439a	// 439a <TK_Sampling_prog+0xe>
+    43d2:	1484      	pop      	r4-r7
+    43d4:	20000054 	.long	0x20000054
+    43d8:	20000652 	.long	0x20000652
+    43dc:	200004c3 	.long	0x200004c3
+    43e0:	200003ac 	.long	0x200003ac
+
+Disassembly of section .text.TKEYIntHandler:
+
+000043e4 <TKEYIntHandler>:
+    43e4:	1460      	nie
+    43e6:	1462      	ipush
+    43e8:	14d1      	push      	r4, r15
+    43ea:	109e      	lrw      	r4, 0x20000068	// 4460 <TKEYIntHandler+0x7c>
+    43ec:	9460      	ld.w      	r3, (r4, 0x0)
+    43ee:	3b40      	cmpnei      	r3, 0
+    43f0:	080b      	bt      	0x4406	// 4406 <TKEYIntHandler+0x22>
+    43f2:	3301      	movi      	r3, 1
+    43f4:	b460      	st.w      	r3, (r4, 0x0)
+    43f6:	107c      	lrw      	r3, 0x20000440	// 4464 <TKEYIntHandler+0x80>
+    43f8:	8360      	ld.b      	r3, (r3, 0x0)
+    43fa:	3b41      	cmpnei      	r3, 1
+    43fc:	0805      	bt      	0x4406	// 4406 <TKEYIntHandler+0x22>
+    43fe:	e3ffffc7 	bsr      	0x438c	// 438c <TK_Sampling_prog>
+    4402:	3301      	movi      	r3, 1
+    4404:	a464      	st.b      	r3, (r4, 0x4)
+    4406:	1079      	lrw      	r3, 0x20000058	// 4468 <TKEYIntHandler+0x84>
+    4408:	3101      	movi      	r1, 1
+    440a:	9360      	ld.w      	r3, (r3, 0x0)
+    440c:	934a      	ld.w      	r2, (r3, 0x28)
+    440e:	6884      	and      	r2, r1
+    4410:	3a40      	cmpnei      	r2, 0
+    4412:	0c02      	bf      	0x4416	// 4416 <TKEYIntHandler+0x32>
+    4414:	b32c      	st.w      	r1, (r3, 0x30)
+    4416:	934a      	ld.w      	r2, (r3, 0x28)
+    4418:	3102      	movi      	r1, 2
+    441a:	6884      	and      	r2, r1
+    441c:	3a40      	cmpnei      	r2, 0
+    441e:	0c02      	bf      	0x4422	// 4422 <TKEYIntHandler+0x3e>
+    4420:	b32c      	st.w      	r1, (r3, 0x30)
+    4422:	934a      	ld.w      	r2, (r3, 0x28)
+    4424:	3104      	movi      	r1, 4
+    4426:	6884      	and      	r2, r1
+    4428:	3a40      	cmpnei      	r2, 0
+    442a:	0c02      	bf      	0x442e	// 442e <TKEYIntHandler+0x4a>
+    442c:	b32c      	st.w      	r1, (r3, 0x30)
+    442e:	934a      	ld.w      	r2, (r3, 0x28)
+    4430:	3108      	movi      	r1, 8
+    4432:	6884      	and      	r2, r1
+    4434:	3a40      	cmpnei      	r2, 0
+    4436:	0c02      	bf      	0x443a	// 443a <TKEYIntHandler+0x56>
+    4438:	b32c      	st.w      	r1, (r3, 0x30)
+    443a:	934a      	ld.w      	r2, (r3, 0x28)
+    443c:	3110      	movi      	r1, 16
+    443e:	6884      	and      	r2, r1
+    4440:	3a40      	cmpnei      	r2, 0
+    4442:	0c02      	bf      	0x4446	// 4446 <TKEYIntHandler+0x62>
+    4444:	b32c      	st.w      	r1, (r3, 0x30)
+    4446:	934a      	ld.w      	r2, (r3, 0x28)
+    4448:	3120      	movi      	r1, 32
+    444a:	6884      	and      	r2, r1
+    444c:	3a40      	cmpnei      	r2, 0
+    444e:	0c02      	bf      	0x4452	// 4452 <TKEYIntHandler+0x6e>
+    4450:	b32c      	st.w      	r1, (r3, 0x30)
+    4452:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    4456:	9880      	ld.w      	r4, (r14, 0x0)
+    4458:	1402      	addi      	r14, r14, 8
+    445a:	1463      	ipop
+    445c:	1461      	nir
+    445e:	0000      	bkpt
+    4460:	20000068 	.long	0x20000068
+    4464:	20000440 	.long	0x20000440
+    4468:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+0000446c <get_key_number>:
+    446c:	14c2      	push      	r4-r5
+    446e:	3200      	movi      	r2, 0
+    4470:	3000      	movi      	r0, 0
+    4472:	1088      	lrw      	r4, 0x200004e0	// 4490 <get_key_number+0x24>
+    4474:	3501      	movi      	r5, 1
+    4476:	3120      	movi      	r1, 32
+    4478:	9460      	ld.w      	r3, (r4, 0x0)
+    447a:	70c9      	lsr      	r3, r2
+    447c:	68d4      	and      	r3, r5
+    447e:	3b40      	cmpnei      	r3, 0
+    4480:	0c02      	bf      	0x4484	// 4484 <get_key_number+0x18>
+    4482:	2000      	addi      	r0, 1
+    4484:	2200      	addi      	r2, 1
+    4486:	644a      	cmpne      	r2, r1
+    4488:	0bf8      	bt      	0x4478	// 4478 <get_key_number+0xc>
+    448a:	7400      	zextb      	r0, r0
+    448c:	1482      	pop      	r4-r5
+    448e:	0000      	bkpt
+    4490:	200004e0 	.long	0x200004e0
+
+Disassembly of section .text.TK_Scan_Start:
+
+00004494 <TK_Scan_Start>:
+    4494:	1046      	lrw      	r2, 0x20000068	// 44ac <TK_Scan_Start+0x18>
+    4496:	8264      	ld.b      	r3, (r2, 0x4)
+    4498:	74cc      	zextb      	r3, r3
+    449a:	3b41      	cmpnei      	r3, 1
+    449c:	0807      	bt      	0x44aa	// 44aa <TK_Scan_Start+0x16>
+    449e:	1025      	lrw      	r1, 0x20000058	// 44b0 <TK_Scan_Start+0x1c>
+    44a0:	9120      	ld.w      	r1, (r1, 0x0)
+    44a2:	b162      	st.w      	r3, (r1, 0x8)
+    44a4:	3300      	movi      	r3, 0
+    44a6:	b260      	st.w      	r3, (r2, 0x0)
+    44a8:	a264      	st.b      	r3, (r2, 0x4)
+    44aa:	783c      	jmp      	r15
+    44ac:	20000068 	.long	0x20000068
+    44b0:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000044b4 <TK_Keymap_prog>:
+    44b4:	14d4      	push      	r4-r7, r15
+    44b6:	1425      	subi      	r14, r14, 20
+    44b8:	1271      	lrw      	r3, 0x200000ec	// 45fc <TK_Keymap_prog+0x148>
+    44ba:	8360      	ld.b      	r3, (r3, 0x0)
+    44bc:	b860      	st.w      	r3, (r14, 0x0)
+    44be:	3400      	movi      	r4, 0
+    44c0:	1270      	lrw      	r3, 0x200000c0	// 4600 <TK_Keymap_prog+0x14c>
+    44c2:	8360      	ld.b      	r3, (r3, 0x0)
+    44c4:	b861      	st.w      	r3, (r14, 0x4)
+    44c6:	12f0      	lrw      	r7, 0x20000456	// 4604 <TK_Keymap_prog+0x150>
+    44c8:	1270      	lrw      	r3, 0x200000c9	// 4608 <TK_Keymap_prog+0x154>
+    44ca:	83a0      	ld.b      	r5, (r3, 0x0)
+    44cc:	1270      	lrw      	r3, 0x200000c8	// 460c <TK_Keymap_prog+0x158>
+    44ce:	8360      	ld.b      	r3, (r3, 0x0)
+    44d0:	b862      	st.w      	r3, (r14, 0x8)
+    44d2:	6d9f      	mov      	r6, r7
+    44d4:	126f      	lrw      	r3, 0x20000652	// 4610 <TK_Keymap_prog+0x15c>
+    44d6:	b863      	st.w      	r3, (r14, 0xc)
+    44d8:	4461      	lsli      	r3, r4, 1
+    44da:	9843      	ld.w      	r2, (r14, 0xc)
+    44dc:	608c      	addu      	r2, r3
+    44de:	122e      	lrw      	r1, 0x200003ac	// 4614 <TK_Keymap_prog+0x160>
+    44e0:	604c      	addu      	r1, r3
+    44e2:	8a40      	ld.h      	r2, (r2, 0x0)
+    44e4:	8920      	ld.h      	r1, (r1, 0x0)
+    44e6:	6086      	subu      	r2, r1
+    44e8:	748b      	sexth      	r2, r2
+    44ea:	5f2c      	addu      	r1, r7, r3
+    44ec:	a940      	st.h      	r2, (r1, 0x0)
+    44ee:	8940      	ld.h      	r2, (r1, 0x0)
+    44f0:	748b      	sexth      	r2, r2
+    44f2:	3adf      	btsti      	r2, 31
+    44f4:	1249      	lrw      	r2, 0x2000060e	// 4618 <TK_Keymap_prog+0x164>
+    44f6:	608c      	addu      	r2, r3
+    44f8:	0c37      	bf      	0x4566	// 4566 <TK_Keymap_prog+0xb2>
+    44fa:	3100      	movi      	r1, 0
+    44fc:	aa20      	st.h      	r1, (r2, 0x0)
+    44fe:	9840      	ld.w      	r2, (r14, 0x0)
+    4500:	3a01      	cmphsi      	r2, 2
+    4502:	0c6d      	bf      	0x45dc	// 45dc <TK_Keymap_prog+0x128>
+    4504:	4461      	lsli      	r3, r4, 1
+    4506:	5e2c      	addu      	r1, r6, r3
+    4508:	1205      	lrw      	r0, 0x2000011a	// 461c <TK_Keymap_prog+0x168>
+    450a:	8940      	ld.h      	r2, (r1, 0x0)
+    450c:	60c0      	addu      	r3, r0
+    450e:	748b      	sexth      	r2, r2
+    4510:	8b60      	ld.h      	r3, (r3, 0x0)
+    4512:	648d      	cmplt      	r3, r2
+    4514:	9840      	ld.w      	r2, (r14, 0x0)
+    4516:	7cc8      	mult      	r3, r2
+    4518:	0c2a      	bf      	0x456c	// 456c <TK_Keymap_prog+0xb8>
+    451a:	8940      	ld.h      	r2, (r1, 0x0)
+    451c:	748b      	sexth      	r2, r2
+    451e:	64c9      	cmplt      	r2, r3
+    4520:	0c26      	bf      	0x456c	// 456c <TK_Keymap_prog+0xb8>
+    4522:	1240      	lrw      	r2, 0x20000444	// 4620 <TK_Keymap_prog+0x16c>
+    4524:	6090      	addu      	r2, r4
+    4526:	8260      	ld.b      	r3, (r2, 0x0)
+    4528:	2300      	addi      	r3, 1
+    452a:	74cc      	zextb      	r3, r3
+    452c:	a260      	st.b      	r3, (r2, 0x0)
+    452e:	3100      	movi      	r1, 0
+    4530:	117d      	lrw      	r3, 0x2000042a	// 4624 <TK_Keymap_prog+0x170>
+    4532:	60d0      	addu      	r3, r4
+    4534:	a320      	st.b      	r1, (r3, 0x0)
+    4536:	117d      	lrw      	r3, 0x20000506	// 4628 <TK_Keymap_prog+0x174>
+    4538:	60d0      	addu      	r3, r4
+    453a:	a320      	st.b      	r1, (r3, 0x0)
+    453c:	117c      	lrw      	r3, 0x20000580	// 462c <TK_Keymap_prog+0x178>
+    453e:	60d0      	addu      	r3, r4
+    4540:	a320      	st.b      	r1, (r3, 0x0)
+    4542:	8260      	ld.b      	r3, (r2, 0x0)
+    4544:	9821      	ld.w      	r1, (r14, 0x4)
+    4546:	64c4      	cmphs      	r1, r3
+    4548:	081f      	bt      	0x4586	// 4586 <TK_Keymap_prog+0xd2>
+    454a:	3d40      	cmpnei      	r5, 0
+    454c:	0852      	bt      	0x45f0	// 45f0 <TK_Keymap_prog+0x13c>
+    454e:	1139      	lrw      	r1, 0x2000043c	// 4630 <TK_Keymap_prog+0x17c>
+    4550:	9160      	ld.w      	r3, (r1, 0x0)
+    4552:	3b40      	cmpnei      	r3, 0
+    4554:	0806      	bt      	0x4560	// 4560 <TK_Keymap_prog+0xac>
+    4556:	9100      	ld.w      	r0, (r1, 0x0)
+    4558:	3301      	movi      	r3, 1
+    455a:	70d0      	lsl      	r3, r4
+    455c:	6cc0      	or      	r3, r0
+    455e:	b160      	st.w      	r3, (r1, 0x0)
+    4560:	3300      	movi      	r3, 0
+    4562:	a260      	st.b      	r3, (r2, 0x0)
+    4564:	0411      	br      	0x4586	// 4586 <TK_Keymap_prog+0xd2>
+    4566:	8920      	ld.h      	r1, (r1, 0x0)
+    4568:	7445      	zexth      	r1, r1
+    456a:	07c9      	br      	0x44fc	// 44fc <TK_Keymap_prog+0x48>
+    456c:	4441      	lsli      	r2, r4, 1
+    456e:	6098      	addu      	r2, r6
+    4570:	8a40      	ld.h      	r2, (r2, 0x0)
+    4572:	748b      	sexth      	r2, r2
+    4574:	648d      	cmplt      	r3, r2
+    4576:	0c08      	bf      	0x4586	// 4586 <TK_Keymap_prog+0xd2>
+    4578:	3300      	movi      	r3, 0
+    457a:	114e      	lrw      	r2, 0x2000043c	// 4630 <TK_Keymap_prog+0x17c>
+    457c:	2b01      	subi      	r3, 2
+    457e:	9220      	ld.w      	r1, (r2, 0x0)
+    4580:	70d3      	rotl      	r3, r4
+    4582:	68c4      	and      	r3, r1
+    4584:	b260      	st.w      	r3, (r2, 0x0)
+    4586:	4441      	lsli      	r2, r4, 1
+    4588:	5e68      	addu      	r3, r6, r2
+    458a:	8b60      	ld.h      	r3, (r3, 0x0)
+    458c:	74cf      	sexth      	r3, r3
+    458e:	b864      	st.w      	r3, (r14, 0x10)
+    4590:	3105      	movi      	r1, 5
+    4592:	1163      	lrw      	r3, 0x2000011a	// 461c <TK_Keymap_prog+0x168>
+    4594:	608c      	addu      	r2, r3
+    4596:	8a00      	ld.h      	r0, (r2, 0x0)
+    4598:	4002      	lsli      	r0, r0, 2
+    459a:	e3fff607 	bsr      	0x31a8	// 31a8 <__divsi3>
+    459e:	9864      	ld.w      	r3, (r14, 0x10)
+    45a0:	640d      	cmplt      	r3, r0
+    45a2:	0c18      	bf      	0x45d2	// 45d2 <TK_Keymap_prog+0x11e>
+    45a4:	1140      	lrw      	r2, 0x2000042a	// 4624 <TK_Keymap_prog+0x170>
+    45a6:	6090      	addu      	r2, r4
+    45a8:	8260      	ld.b      	r3, (r2, 0x0)
+    45aa:	2300      	addi      	r3, 1
+    45ac:	74cc      	zextb      	r3, r3
+    45ae:	a260      	st.b      	r3, (r2, 0x0)
+    45b0:	3100      	movi      	r1, 0
+    45b2:	107c      	lrw      	r3, 0x20000444	// 4620 <TK_Keymap_prog+0x16c>
+    45b4:	60d0      	addu      	r3, r4
+    45b6:	a320      	st.b      	r1, (r3, 0x0)
+    45b8:	8260      	ld.b      	r3, (r2, 0x0)
+    45ba:	9822      	ld.w      	r1, (r14, 0x8)
+    45bc:	64c4      	cmphs      	r1, r3
+    45be:	080a      	bt      	0x45d2	// 45d2 <TK_Keymap_prog+0x11e>
+    45c0:	3300      	movi      	r3, 0
+    45c2:	103c      	lrw      	r1, 0x2000043c	// 4630 <TK_Keymap_prog+0x17c>
+    45c4:	2b01      	subi      	r3, 2
+    45c6:	9100      	ld.w      	r0, (r1, 0x0)
+    45c8:	70d3      	rotl      	r3, r4
+    45ca:	68c0      	and      	r3, r0
+    45cc:	b160      	st.w      	r3, (r1, 0x0)
+    45ce:	3300      	movi      	r3, 0
+    45d0:	a260      	st.b      	r3, (r2, 0x0)
+    45d2:	2400      	addi      	r4, 1
+    45d4:	3c51      	cmpnei      	r4, 17
+    45d6:	0b81      	bt      	0x44d8	// 44d8 <TK_Keymap_prog+0x24>
+    45d8:	1405      	addi      	r14, r14, 20
+    45da:	1494      	pop      	r4-r7, r15
+    45dc:	60d8      	addu      	r3, r6
+    45de:	4441      	lsli      	r2, r4, 1
+    45e0:	102f      	lrw      	r1, 0x2000011a	// 461c <TK_Keymap_prog+0x168>
+    45e2:	8b60      	ld.h      	r3, (r3, 0x0)
+    45e4:	6084      	addu      	r2, r1
+    45e6:	74cf      	sexth      	r3, r3
+    45e8:	8a40      	ld.h      	r2, (r2, 0x0)
+    45ea:	64c9      	cmplt      	r2, r3
+    45ec:	0fcd      	bf      	0x4586	// 4586 <TK_Keymap_prog+0xd2>
+    45ee:	079a      	br      	0x4522	// 4522 <TK_Keymap_prog+0x6e>
+    45f0:	3d41      	cmpnei      	r5, 1
+    45f2:	0bb7      	bt      	0x4560	// 4560 <TK_Keymap_prog+0xac>
+    45f4:	102f      	lrw      	r1, 0x2000043c	// 4630 <TK_Keymap_prog+0x17c>
+    45f6:	6cd7      	mov      	r3, r5
+    45f8:	9100      	ld.w      	r0, (r1, 0x0)
+    45fa:	07b0      	br      	0x455a	// 455a <TK_Keymap_prog+0xa6>
+    45fc:	200000ec 	.long	0x200000ec
+    4600:	200000c0 	.long	0x200000c0
+    4604:	20000456 	.long	0x20000456
+    4608:	200000c9 	.long	0x200000c9
+    460c:	200000c8 	.long	0x200000c8
+    4610:	20000652 	.long	0x20000652
+    4614:	200003ac 	.long	0x200003ac
+    4618:	2000060e 	.long	0x2000060e
+    461c:	2000011a 	.long	0x2000011a
+    4620:	20000444 	.long	0x20000444
+    4624:	2000042a 	.long	0x2000042a
+    4628:	20000506 	.long	0x20000506
+    462c:	20000580 	.long	0x20000580
+    4630:	2000043c 	.long	0x2000043c
+
+Disassembly of section .text.TK_overflow_predict:
+
+00004634 <TK_overflow_predict>:
+    4634:	14d4      	push      	r4-r7, r15
+    4636:	1421      	subi      	r14, r14, 4
+    4638:	11d9      	lrw      	r6, 0x20000068	// 471c <TK_overflow_predict+0xe8>
+    463a:	8665      	ld.b      	r3, (r6, 0x5)
+    463c:	3b41      	cmpnei      	r3, 1
+    463e:	085f      	bt      	0x46fc	// 46fc <TK_overflow_predict+0xc8>
+    4640:	1158      	lrw      	r2, 0x2000055c	// 4720 <TK_overflow_predict+0xec>
+    4642:	8260      	ld.b      	r3, (r2, 0x0)
+    4644:	2300      	addi      	r3, 1
+    4646:	74cc      	zextb      	r3, r3
+    4648:	a260      	st.b      	r3, (r2, 0x0)
+    464a:	8260      	ld.b      	r3, (r2, 0x0)
+    464c:	1136      	lrw      	r1, 0x200000ed	// 4724 <TK_overflow_predict+0xf0>
+    464e:	8120      	ld.b      	r1, (r1, 0x0)
+    4650:	64c4      	cmphs      	r1, r3
+    4652:	0855      	bt      	0x46fc	// 46fc <TK_overflow_predict+0xc8>
+    4654:	3300      	movi      	r3, 0
+    4656:	a260      	st.b      	r3, (r2, 0x0)
+    4658:	3500      	movi      	r5, 0
+    465a:	11f4      	lrw      	r7, 0x200000f0	// 4728 <TK_overflow_predict+0xf4>
+    465c:	2605      	addi      	r6, 6
+    465e:	9760      	ld.w      	r3, (r7, 0x0)
+    4660:	70d5      	lsr      	r3, r5
+    4662:	3201      	movi      	r2, 1
+    4664:	68c8      	and      	r3, r2
+    4666:	3b40      	cmpnei      	r3, 0
+    4668:	0c34      	bf      	0x46d0	// 46d0 <TK_overflow_predict+0x9c>
+    466a:	4581      	lsli      	r4, r5, 1
+    466c:	5e70      	addu      	r3, r6, r4
+    466e:	8b00      	ld.h      	r0, (r3, 0x0)
+    4670:	e3ffe7a4 	bsr      	0x15b8	// 15b8 <__floatunsidf>
+    4674:	6cc7      	mov      	r3, r1
+    4676:	3180      	movi      	r1, 128
+    4678:	6c83      	mov      	r2, r0
+    467a:	4137      	lsli      	r1, r1, 23
+    467c:	3000      	movi      	r0, 0
+    467e:	e3ffdd9b 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    4682:	116b      	lrw      	r3, 0x200000f6	// 472c <TK_overflow_predict+0xf8>
+    4684:	60d0      	addu      	r3, r4
+    4686:	8b60      	ld.h      	r3, (r3, 0x0)
+    4688:	4364      	lsli      	r3, r3, 4
+    468a:	230e      	addi      	r3, 15
+    468c:	b860      	st.w      	r3, (r14, 0x0)
+    468e:	e3ffe34d 	bsr      	0xd28	// d28 <__fixunsdfsi>
+    4692:	9860      	ld.w      	r3, (r14, 0x0)
+    4694:	7cc0      	mult      	r3, r0
+    4696:	1147      	lrw      	r2, 0x200005ec	// 4730 <TK_overflow_predict+0xfc>
+    4698:	740d      	zexth      	r0, r3
+    469a:	6090      	addu      	r2, r4
+    469c:	1166      	lrw      	r3, 0x20000652	// 4734 <TK_overflow_predict+0x100>
+    469e:	60d0      	addu      	r3, r4
+    46a0:	aa00      	st.h      	r0, (r2, 0x0)
+    46a2:	8b60      	ld.h      	r3, (r3, 0x0)
+    46a4:	8a00      	ld.h      	r0, (r2, 0x0)
+    46a6:	7401      	zexth      	r0, r0
+    46a8:	325f      	movi      	r2, 95
+    46aa:	74cd      	zexth      	r3, r3
+    46ac:	7c08      	mult      	r0, r2
+    46ae:	3164      	movi      	r1, 100
+    46b0:	b860      	st.w      	r3, (r14, 0x0)
+    46b2:	e3fff57b 	bsr      	0x31a8	// 31a8 <__divsi3>
+    46b6:	9860      	ld.w      	r3, (r14, 0x0)
+    46b8:	64c1      	cmplt      	r0, r3
+    46ba:	0c0b      	bf      	0x46d0	// 46d0 <TK_overflow_predict+0x9c>
+    46bc:	107f      	lrw      	r3, 0x200000ca	// 4738 <TK_overflow_predict+0x104>
+    46be:	610c      	addu      	r4, r3
+    46c0:	8c60      	ld.h      	r3, (r4, 0x0)
+    46c2:	3b06      	cmphsi      	r3, 7
+    46c4:	0806      	bt      	0x46d0	// 46d0 <TK_overflow_predict+0x9c>
+    46c6:	2300      	addi      	r3, 1
+    46c8:	ac60      	st.h      	r3, (r4, 0x0)
+    46ca:	3201      	movi      	r2, 1
+    46cc:	107c      	lrw      	r3, 0x200004b1	// 473c <TK_overflow_predict+0x108>
+    46ce:	a340      	st.b      	r2, (r3, 0x0)
+    46d0:	2500      	addi      	r5, 1
+    46d2:	3d51      	cmpnei      	r5, 17
+    46d4:	0bc5      	bt      	0x465e	// 465e <TK_overflow_predict+0x2a>
+    46d6:	107a      	lrw      	r3, 0x200004b1	// 473c <TK_overflow_predict+0x108>
+    46d8:	8340      	ld.b      	r2, (r3, 0x0)
+    46da:	3a41      	cmpnei      	r2, 1
+    46dc:	0810      	bt      	0x46fc	// 46fc <TK_overflow_predict+0xc8>
+    46de:	3200      	movi      	r2, 0
+    46e0:	a340      	st.b      	r2, (r3, 0x0)
+    46e2:	3200      	movi      	r2, 0
+    46e4:	1077      	lrw      	r3, 0x20000058	// 4740 <TK_overflow_predict+0x10c>
+    46e6:	1018      	lrw      	r0, 0x2000057f	// 4744 <TK_overflow_predict+0x110>
+    46e8:	10b8      	lrw      	r5, 0x200005b8	// 4748 <TK_overflow_predict+0x114>
+    46ea:	10d4      	lrw      	r6, 0x200000ca	// 4738 <TK_overflow_predict+0x104>
+    46ec:	9360      	ld.w      	r3, (r3, 0x0)
+    46ee:	b342      	st.w      	r2, (r3, 0x8)
+    46f0:	1077      	lrw      	r3, 0x20000054	// 474c <TK_overflow_predict+0x118>
+    46f2:	9380      	ld.w      	r4, (r3, 0x0)
+    46f4:	3300      	movi      	r3, 0
+    46f6:	8040      	ld.b      	r2, (r0, 0x0)
+    46f8:	648c      	cmphs      	r3, r2
+    46fa:	0c03      	bf      	0x4700	// 4700 <TK_overflow_predict+0xcc>
+    46fc:	1401      	addi      	r14, r14, 4
+    46fe:	1494      	pop      	r4-r7, r15
+    4700:	5d4c      	addu      	r2, r5, r3
+    4702:	8240      	ld.b      	r2, (r2, 0x0)
+    4704:	4241      	lsli      	r2, r2, 1
+    4706:	4322      	lsli      	r1, r3, 2
+    4708:	6098      	addu      	r2, r6
+    470a:	6050      	addu      	r1, r4
+    470c:	8a40      	ld.h      	r2, (r2, 0x0)
+    470e:	91f2      	ld.w      	r7, (r1, 0x48)
+    4710:	4254      	lsli      	r2, r2, 20
+    4712:	6c9c      	or      	r2, r7
+    4714:	2300      	addi      	r3, 1
+    4716:	b152      	st.w      	r2, (r1, 0x48)
+    4718:	74cc      	zextb      	r3, r3
+    471a:	07ee      	br      	0x46f6	// 46f6 <TK_overflow_predict+0xc2>
+    471c:	20000068 	.long	0x20000068
+    4720:	2000055c 	.long	0x2000055c
+    4724:	200000ed 	.long	0x200000ed
+    4728:	200000f0 	.long	0x200000f0
+    472c:	200000f6 	.long	0x200000f6
+    4730:	200005ec 	.long	0x200005ec
+    4734:	20000652 	.long	0x20000652
+    4738:	200000ca 	.long	0x200000ca
+    473c:	200004b1 	.long	0x200004b1
+    4740:	20000058 	.long	0x20000058
+    4744:	2000057f 	.long	0x2000057f
+    4748:	200005b8 	.long	0x200005b8
+    474c:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00004750 <TK_Baseline_tracking>:
+    4750:	14c4      	push      	r4-r7
+    4752:	1422      	subi      	r14, r14, 8
+    4754:	1348      	lrw      	r2, 0x200004de	// 48f4 <TK_Baseline_tracking+0x1a4>
+    4756:	8260      	ld.b      	r3, (r2, 0x0)
+    4758:	2300      	addi      	r3, 1
+    475a:	74cc      	zextb      	r3, r3
+    475c:	a260      	st.b      	r3, (r2, 0x0)
+    475e:	8260      	ld.b      	r3, (r2, 0x0)
+    4760:	1326      	lrw      	r1, 0x200000ed	// 48f8 <TK_Baseline_tracking+0x1a8>
+    4762:	8120      	ld.b      	r1, (r1, 0x0)
+    4764:	644c      	cmphs      	r3, r1
+    4766:	0cad      	bf      	0x48c0	// 48c0 <TK_Baseline_tracking+0x170>
+    4768:	3300      	movi      	r3, 0
+    476a:	a260      	st.b      	r3, (r2, 0x0)
+    476c:	1364      	lrw      	r3, 0x2000043c	// 48fc <TK_Baseline_tracking+0x1ac>
+    476e:	9360      	ld.w      	r3, (r3, 0x0)
+    4770:	3b40      	cmpnei      	r3, 0
+    4772:	08a7      	bt      	0x48c0	// 48c0 <TK_Baseline_tracking+0x170>
+    4774:	1323      	lrw      	r1, 0x20000456	// 4900 <TK_Baseline_tracking+0x1b0>
+    4776:	6dc7      	mov      	r7, r1
+    4778:	b820      	st.w      	r1, (r14, 0x0)
+    477a:	3200      	movi      	r2, 0
+    477c:	1362      	lrw      	r3, 0x2000011a	// 4904 <TK_Baseline_tracking+0x1b4>
+    477e:	1323      	lrw      	r1, 0x200003ac	// 4908 <TK_Baseline_tracking+0x1b8>
+    4780:	4201      	lsli      	r0, r2, 1
+    4782:	9880      	ld.w      	r4, (r14, 0x0)
+    4784:	6100      	addu      	r4, r0
+    4786:	8c80      	ld.h      	r4, (r4, 0x0)
+    4788:	7513      	sexth      	r4, r4
+    478a:	3cdf      	btsti      	r4, 31
+    478c:	0c27      	bf      	0x47da	// 47da <TK_Baseline_tracking+0x8a>
+    478e:	13a0      	lrw      	r5, 0x20000652	// 490c <TK_Baseline_tracking+0x1bc>
+    4790:	5980      	addu      	r4, r1, r0
+    4792:	6014      	addu      	r0, r5
+    4794:	b881      	st.w      	r4, (r14, 0x4)
+    4796:	8c80      	ld.h      	r4, (r4, 0x0)
+    4798:	88c0      	ld.h      	r6, (r0, 0x0)
+    479a:	7511      	zexth      	r4, r4
+    479c:	7599      	zexth      	r6, r6
+    479e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    47a0:	611a      	subu      	r4, r6
+    47a2:	6551      	cmplt      	r4, r5
+    47a4:	081b      	bt      	0x47da	// 47da <TK_Baseline_tracking+0x8a>
+    47a6:	9881      	ld.w      	r4, (r14, 0x4)
+    47a8:	8c80      	ld.h      	r4, (r4, 0x0)
+    47aa:	8800      	ld.h      	r0, (r0, 0x0)
+    47ac:	7511      	zexth      	r4, r4
+    47ae:	7401      	zexth      	r0, r0
+    47b0:	5c01      	subu      	r0, r4, r0
+    47b2:	4581      	lsli      	r4, r5, 1
+    47b4:	6150      	addu      	r5, r4
+    47b6:	6541      	cmplt      	r0, r5
+    47b8:	0c11      	bf      	0x47da	// 47da <TK_Baseline_tracking+0x8a>
+    47ba:	1296      	lrw      	r4, 0x20000580	// 4910 <TK_Baseline_tracking+0x1c0>
+    47bc:	6108      	addu      	r4, r2
+    47be:	8400      	ld.b      	r0, (r4, 0x0)
+    47c0:	2000      	addi      	r0, 1
+    47c2:	7400      	zextb      	r0, r0
+    47c4:	a400      	st.b      	r0, (r4, 0x0)
+    47c6:	1214      	lrw      	r0, 0x20000088	// 4914 <TK_Baseline_tracking+0x1c4>
+    47c8:	84a0      	ld.b      	r5, (r4, 0x0)
+    47ca:	8008      	ld.b      	r0, (r0, 0x8)
+    47cc:	6540      	cmphs      	r0, r5
+    47ce:	0806      	bt      	0x47da	// 47da <TK_Baseline_tracking+0x8a>
+    47d0:	1212      	lrw      	r0, 0x200004c3	// 4918 <TK_Baseline_tracking+0x1c8>
+    47d2:	3501      	movi      	r5, 1
+    47d4:	a0a0      	st.b      	r5, (r0, 0x0)
+    47d6:	3000      	movi      	r0, 0
+    47d8:	a400      	st.b      	r0, (r4, 0x0)
+    47da:	4201      	lsli      	r0, r2, 1
+    47dc:	5f80      	addu      	r4, r7, r0
+    47de:	8c80      	ld.h      	r4, (r4, 0x0)
+    47e0:	7513      	sexth      	r4, r4
+    47e2:	3c20      	cmplti      	r4, 1
+    47e4:	0870      	bt      	0x48c4	// 48c4 <TK_Baseline_tracking+0x174>
+    47e6:	128a      	lrw      	r4, 0x20000652	// 490c <TK_Baseline_tracking+0x1bc>
+    47e8:	6100      	addu      	r4, r0
+    47ea:	59a0      	addu      	r5, r1, r0
+    47ec:	8c80      	ld.h      	r4, (r4, 0x0)
+    47ee:	8da0      	ld.h      	r5, (r5, 0x0)
+    47f0:	7555      	zexth      	r5, r5
+    47f2:	7511      	zexth      	r4, r4
+    47f4:	6116      	subu      	r4, r5
+    47f6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    47f8:	45a2      	lsli      	r5, r5, 2
+    47fa:	6551      	cmplt      	r4, r5
+    47fc:	0864      	bt      	0x48c4	// 48c4 <TK_Baseline_tracking+0x174>
+    47fe:	1288      	lrw      	r4, 0x20000506	// 491c <TK_Baseline_tracking+0x1cc>
+    4800:	6108      	addu      	r4, r2
+    4802:	84a0      	ld.b      	r5, (r4, 0x0)
+    4804:	2500      	addi      	r5, 1
+    4806:	7554      	zextb      	r5, r5
+    4808:	a4a0      	st.b      	r5, (r4, 0x0)
+    480a:	12a3      	lrw      	r5, 0x20000088	// 4914 <TK_Baseline_tracking+0x1c4>
+    480c:	84c0      	ld.b      	r6, (r4, 0x0)
+    480e:	85a9      	ld.b      	r5, (r5, 0x9)
+    4810:	6594      	cmphs      	r5, r6
+    4812:	0806      	bt      	0x481e	// 481e <TK_Baseline_tracking+0xce>
+    4814:	12a1      	lrw      	r5, 0x200004c3	// 4918 <TK_Baseline_tracking+0x1c8>
+    4816:	3601      	movi      	r6, 1
+    4818:	a5c0      	st.b      	r6, (r5, 0x0)
+    481a:	3500      	movi      	r5, 0
+    481c:	a4a0      	st.b      	r5, (r4, 0x0)
+    481e:	5f80      	addu      	r4, r7, r0
+    4820:	8c80      	ld.h      	r4, (r4, 0x0)
+    4822:	7513      	sexth      	r4, r4
+    4824:	3cdf      	btsti      	r4, 31
+    4826:	0c10      	bf      	0x4846	// 4846 <TK_Baseline_tracking+0xf6>
+    4828:	11d9      	lrw      	r6, 0x20000652	// 490c <TK_Baseline_tracking+0x1bc>
+    482a:	59a0      	addu      	r5, r1, r0
+    482c:	6180      	addu      	r6, r0
+    482e:	8d80      	ld.h      	r4, (r5, 0x0)
+    4830:	8ec0      	ld.h      	r6, (r6, 0x0)
+    4832:	7599      	zexth      	r6, r6
+    4834:	7511      	zexth      	r4, r4
+    4836:	611a      	subu      	r4, r6
+    4838:	8bc0      	ld.h      	r6, (r3, 0x0)
+    483a:	6591      	cmplt      	r4, r6
+    483c:	0c05      	bf      	0x4846	// 4846 <TK_Baseline_tracking+0xf6>
+    483e:	8d80      	ld.h      	r4, (r5, 0x0)
+    4840:	2c00      	subi      	r4, 1
+    4842:	7511      	zexth      	r4, r4
+    4844:	ad80      	st.h      	r4, (r5, 0x0)
+    4846:	5f80      	addu      	r4, r7, r0
+    4848:	8c80      	ld.h      	r4, (r4, 0x0)
+    484a:	7513      	sexth      	r4, r4
+    484c:	3cdf      	btsti      	r4, 31
+    484e:	0c11      	bf      	0x4870	// 4870 <TK_Baseline_tracking+0x120>
+    4850:	11cf      	lrw      	r6, 0x20000652	// 490c <TK_Baseline_tracking+0x1bc>
+    4852:	59a0      	addu      	r5, r1, r0
+    4854:	6180      	addu      	r6, r0
+    4856:	8d80      	ld.h      	r4, (r5, 0x0)
+    4858:	8ec0      	ld.h      	r6, (r6, 0x0)
+    485a:	7599      	zexth      	r6, r6
+    485c:	7511      	zexth      	r4, r4
+    485e:	611a      	subu      	r4, r6
+    4860:	8bc0      	ld.h      	r6, (r3, 0x0)
+    4862:	4ec1      	lsri      	r6, r6, 1
+    4864:	6591      	cmplt      	r4, r6
+    4866:	0805      	bt      	0x4870	// 4870 <TK_Baseline_tracking+0x120>
+    4868:	8d80      	ld.h      	r4, (r5, 0x0)
+    486a:	2c01      	subi      	r4, 2
+    486c:	7511      	zexth      	r4, r4
+    486e:	ad80      	st.h      	r4, (r5, 0x0)
+    4870:	5fa0      	addu      	r5, r7, r0
+    4872:	8d80      	ld.h      	r4, (r5, 0x0)
+    4874:	7513      	sexth      	r4, r4
+    4876:	3c20      	cmplti      	r4, 1
+    4878:	080c      	bt      	0x4890	// 4890 <TK_Baseline_tracking+0x140>
+    487a:	8da0      	ld.h      	r5, (r5, 0x0)
+    487c:	8b80      	ld.h      	r4, (r3, 0x0)
+    487e:	7557      	sexth      	r5, r5
+    4880:	4c81      	lsri      	r4, r4, 1
+    4882:	6515      	cmplt      	r5, r4
+    4884:	0c06      	bf      	0x4890	// 4890 <TK_Baseline_tracking+0x140>
+    4886:	59a0      	addu      	r5, r1, r0
+    4888:	8d80      	ld.h      	r4, (r5, 0x0)
+    488a:	2400      	addi      	r4, 1
+    488c:	7511      	zexth      	r4, r4
+    488e:	ad80      	st.h      	r4, (r5, 0x0)
+    4890:	5fa0      	addu      	r5, r7, r0
+    4892:	8d80      	ld.h      	r4, (r5, 0x0)
+    4894:	7513      	sexth      	r4, r4
+    4896:	3c20      	cmplti      	r4, 1
+    4898:	0810      	bt      	0x48b8	// 48b8 <TK_Baseline_tracking+0x168>
+    489a:	8dc0      	ld.h      	r6, (r5, 0x0)
+    489c:	759b      	sexth      	r6, r6
+    489e:	8b80      	ld.h      	r4, (r3, 0x0)
+    48a0:	6519      	cmplt      	r6, r4
+    48a2:	0c0b      	bf      	0x48b8	// 48b8 <TK_Baseline_tracking+0x168>
+    48a4:	8da0      	ld.h      	r5, (r5, 0x0)
+    48a6:	7557      	sexth      	r5, r5
+    48a8:	4c81      	lsri      	r4, r4, 1
+    48aa:	6515      	cmplt      	r5, r4
+    48ac:	0806      	bt      	0x48b8	// 48b8 <TK_Baseline_tracking+0x168>
+    48ae:	6004      	addu      	r0, r1
+    48b0:	8880      	ld.h      	r4, (r0, 0x0)
+    48b2:	2401      	addi      	r4, 2
+    48b4:	7511      	zexth      	r4, r4
+    48b6:	a880      	st.h      	r4, (r0, 0x0)
+    48b8:	2200      	addi      	r2, 1
+    48ba:	3a51      	cmpnei      	r2, 17
+    48bc:	2301      	addi      	r3, 2
+    48be:	0b61      	bt      	0x4780	// 4780 <TK_Baseline_tracking+0x30>
+    48c0:	1402      	addi      	r14, r14, 8
+    48c2:	1484      	pop      	r4-r7
+    48c4:	5f80      	addu      	r4, r7, r0
+    48c6:	8c80      	ld.h      	r4, (r4, 0x0)
+    48c8:	7513      	sexth      	r4, r4
+    48ca:	3cdf      	btsti      	r4, 31
+    48cc:	0fa9      	bf      	0x481e	// 481e <TK_Baseline_tracking+0xce>
+    48ce:	10b0      	lrw      	r5, 0x20000652	// 490c <TK_Baseline_tracking+0x1bc>
+    48d0:	5980      	addu      	r4, r1, r0
+    48d2:	6140      	addu      	r5, r0
+    48d4:	8c80      	ld.h      	r4, (r4, 0x0)
+    48d6:	8da0      	ld.h      	r5, (r5, 0x0)
+    48d8:	7555      	zexth      	r5, r5
+    48da:	8bc0      	ld.h      	r6, (r3, 0x0)
+    48dc:	7511      	zexth      	r4, r4
+    48de:	6116      	subu      	r4, r5
+    48e0:	46a1      	lsli      	r5, r6, 1
+    48e2:	6158      	addu      	r5, r6
+    48e4:	6551      	cmplt      	r4, r5
+    48e6:	0b9c      	bt      	0x481e	// 481e <TK_Baseline_tracking+0xce>
+    48e8:	108c      	lrw      	r4, 0x200004c3	// 4918 <TK_Baseline_tracking+0x1c8>
+    48ea:	3501      	movi      	r5, 1
+    48ec:	a4a0      	st.b      	r5, (r4, 0x0)
+    48ee:	6c03      	mov      	r0, r0
+    48f0:	0797      	br      	0x481e	// 481e <TK_Baseline_tracking+0xce>
+    48f2:	0000      	bkpt
+    48f4:	200004de 	.long	0x200004de
+    48f8:	200000ed 	.long	0x200000ed
+    48fc:	2000043c 	.long	0x2000043c
+    4900:	20000456 	.long	0x20000456
+    4904:	2000011a 	.long	0x2000011a
+    4908:	200003ac 	.long	0x200003ac
+    490c:	20000652 	.long	0x20000652
+    4910:	20000580 	.long	0x20000580
+    4914:	20000088 	.long	0x20000088
+    4918:	200004c3 	.long	0x200004c3
+    491c:	20000506 	.long	0x20000506
+
+Disassembly of section .text.TK_result_prog:
+
+00004920 <TK_result_prog>:
+    4920:	14d2      	push      	r4-r5, r15
+    4922:	1050      	lrw      	r2, 0x2000043c	// 4960 <TK_result_prog+0x40>
+    4924:	1090      	lrw      	r4, 0x200004e0	// 4964 <TK_result_prog+0x44>
+    4926:	9260      	ld.w      	r3, (r2, 0x0)
+    4928:	3b40      	cmpnei      	r3, 0
+    492a:	0c02      	bf      	0x492e	// 492e <TK_result_prog+0xe>
+    492c:	9260      	ld.w      	r3, (r2, 0x0)
+    492e:	b460      	st.w      	r3, (r4, 0x0)
+    4930:	9460      	ld.w      	r3, (r4, 0x0)
+    4932:	3b40      	cmpnei      	r3, 0
+    4934:	10ad      	lrw      	r5, 0x200005b4	// 4968 <TK_result_prog+0x48>
+    4936:	0c11      	bf      	0x4958	// 4958 <TK_result_prog+0x38>
+    4938:	9440      	ld.w      	r2, (r4, 0x0)
+    493a:	9560      	ld.w      	r3, (r5, 0x0)
+    493c:	64ca      	cmpne      	r2, r3
+    493e:	0c03      	bf      	0x4944	// 4944 <TK_result_prog+0x24>
+    4940:	9460      	ld.w      	r3, (r4, 0x0)
+    4942:	b560      	st.w      	r3, (r5, 0x0)
+    4944:	e3fffd94 	bsr      	0x446c	// 446c <get_key_number>
+    4948:	1069      	lrw      	r3, 0x200000f4	// 496c <TK_result_prog+0x4c>
+    494a:	8360      	ld.b      	r3, (r3, 0x0)
+    494c:	640c      	cmphs      	r3, r0
+    494e:	0804      	bt      	0x4956	// 4956 <TK_result_prog+0x36>
+    4950:	3300      	movi      	r3, 0
+    4952:	b460      	st.w      	r3, (r4, 0x0)
+    4954:	b560      	st.w      	r3, (r5, 0x0)
+    4956:	1492      	pop      	r4-r5, r15
+    4958:	1046      	lrw      	r2, 0x200004d8	// 4970 <TK_result_prog+0x50>
+    495a:	b560      	st.w      	r3, (r5, 0x0)
+    495c:	b260      	st.w      	r3, (r2, 0x0)
+    495e:	07fc      	br      	0x4956	// 4956 <TK_result_prog+0x36>
+    4960:	2000043c 	.long	0x2000043c
+    4964:	200004e0 	.long	0x200004e0
+    4968:	200005b4 	.long	0x200005b4
+    496c:	200000f4 	.long	0x200000f4
+    4970:	200004d8 	.long	0x200004d8
+
+Disassembly of section .text.CORETHandler:
+
+00004974 <CORETHandler>:
+    4974:	1460      	nie
+    4976:	1462      	ipush
+    4978:	14d1      	push      	r4, r15
+    497a:	1077      	lrw      	r3, 0x20000064	// 49d4 <CORETHandler+0x60>
+    497c:	3400      	movi      	r4, 0
+    497e:	9360      	ld.w      	r3, (r3, 0x0)
+    4980:	b386      	st.w      	r4, (r3, 0x18)
+    4982:	1076      	lrw      	r3, 0x20000440	// 49d8 <CORETHandler+0x64>
+    4984:	8360      	ld.b      	r3, (r3, 0x0)
+    4986:	3b41      	cmpnei      	r3, 1
+    4988:	0820      	bt      	0x49c8	// 49c8 <CORETHandler+0x54>
+    498a:	e3fffd85 	bsr      	0x4494	// 4494 <TK_Scan_Start>
+    498e:	e3fffd93 	bsr      	0x44b4	// 44b4 <TK_Keymap_prog>
+    4992:	e3fffe51 	bsr      	0x4634	// 4634 <TK_overflow_predict>
+    4996:	e3fffedd 	bsr      	0x4750	// 4750 <TK_Baseline_tracking>
+    499a:	e3ffffc3 	bsr      	0x4920	// 4920 <TK_result_prog>
+    499e:	1070      	lrw      	r3, 0x200004e0	// 49dc <CORETHandler+0x68>
+    49a0:	9360      	ld.w      	r3, (r3, 0x0)
+    49a2:	3b40      	cmpnei      	r3, 0
+    49a4:	0c12      	bf      	0x49c8	// 49c8 <CORETHandler+0x54>
+    49a6:	106f      	lrw      	r3, 0x200000c4	// 49e0 <CORETHandler+0x6c>
+    49a8:	9340      	ld.w      	r2, (r3, 0x0)
+    49aa:	3a40      	cmpnei      	r2, 0
+    49ac:	0c0e      	bf      	0x49c8	// 49c8 <CORETHandler+0x54>
+    49ae:	106e      	lrw      	r3, 0x200004d8	// 49e4 <CORETHandler+0x70>
+    49b0:	3064      	movi      	r0, 100
+    49b2:	9320      	ld.w      	r1, (r3, 0x0)
+    49b4:	2100      	addi      	r1, 1
+    49b6:	b320      	st.w      	r1, (r3, 0x0)
+    49b8:	9320      	ld.w      	r1, (r3, 0x0)
+    49ba:	7c80      	mult      	r2, r0
+    49bc:	6448      	cmphs      	r2, r1
+    49be:	0805      	bt      	0x49c8	// 49c8 <CORETHandler+0x54>
+    49c0:	104a      	lrw      	r2, 0x200004c3	// 49e8 <CORETHandler+0x74>
+    49c2:	3101      	movi      	r1, 1
+    49c4:	a220      	st.b      	r1, (r2, 0x0)
+    49c6:	b380      	st.w      	r4, (r3, 0x0)
+    49c8:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    49cc:	9880      	ld.w      	r4, (r14, 0x0)
+    49ce:	1402      	addi      	r14, r14, 8
+    49d0:	1463      	ipop
+    49d2:	1461      	nir
+    49d4:	20000064 	.long	0x20000064
+    49d8:	20000440 	.long	0x20000440
+    49dc:	200004e0 	.long	0x200004e0
+    49e0:	200000c4 	.long	0x200000c4
+    49e4:	200004d8 	.long	0x200004d8
+    49e8:	200004c3 	.long	0x200004c3
+
+Disassembly of section .text.std_clk_calib:
+
+000049ec <std_clk_calib>:
+    49ec:	14d4      	push      	r4-r7, r15
+    49ee:	142d      	subi      	r14, r14, 52
+    49f0:	3201      	movi      	r2, 1
+    49f2:	03ce      	lrw      	r6, 0x2000005c	// 4c34 <std_clk_calib+0x248>
+    49f4:	6cc3      	mov      	r3, r0
+    49f6:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    49fa:	9640      	ld.w      	r2, (r6, 0x0)
+    49fc:	9247      	ld.w      	r2, (r2, 0x1c)
+    49fe:	7488      	zextb      	r2, r2
+    4a00:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    4a04:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    4a08:	3a40      	cmpnei      	r2, 0
+    4a0a:	0c08      	bf      	0x4a1a	// 4a1a <std_clk_calib+0x2e>
+    4a0c:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    4a10:	3a42      	cmpnei      	r2, 2
+    4a12:	0c04      	bf      	0x4a1a	// 4a1a <std_clk_calib+0x2e>
+    4a14:	3000      	movi      	r0, 0
+    4a16:	140d      	addi      	r14, r14, 52
+    4a18:	1494      	pop      	r4-r7, r15
+    4a1a:	0397      	lrw      	r4, 0x2000000c	// 4c38 <std_clk_calib+0x24c>
+    4a1c:	3209      	movi      	r2, 9
+    4a1e:	9400      	ld.w      	r0, (r4, 0x0)
+    4a20:	3b40      	cmpnei      	r3, 0
+    4a22:	b041      	st.w      	r2, (r0, 0x4)
+    4a24:	0857      	bt      	0x4ad2	// 4ad2 <std_clk_calib+0xe6>
+    4a26:	3307      	movi      	r3, 7
+    4a28:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4a2c:	037b      	lrw      	r3, 0x2dc6c00	// 4c3c <std_clk_calib+0x250>
+    4a2e:	b863      	st.w      	r3, (r14, 0xc)
+    4a30:	3380      	movi      	r3, 128
+    4a32:	4362      	lsli      	r3, r3, 2
+    4a34:	b867      	st.w      	r3, (r14, 0x1c)
+    4a36:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    4a3a:	74cc      	zextb      	r3, r3
+    4a3c:	b062      	st.w      	r3, (r0, 0x8)
+    4a3e:	037e      	lrw      	r3, 0xffff	// 4c40 <std_clk_calib+0x254>
+    4a40:	b063      	st.w      	r3, (r0, 0xc)
+    4a42:	3201      	movi      	r2, 1
+    4a44:	3101      	movi      	r1, 1
+    4a46:	03bf      	lrw      	r5, 0x20000014	// 4c44 <std_clk_calib+0x258>
+    4a48:	e3ffebda 	bsr      	0x21fc	// 21fc <BT_ConfigInterrupt_CMD>
+    4a4c:	95e0      	ld.w      	r7, (r5, 0x0)
+    4a4e:	137f      	lrw      	r3, 0xbe9c0005	// 4c48 <std_clk_calib+0x25c>
+    4a50:	b760      	st.w      	r3, (r7, 0x0)
+    4a52:	135f      	lrw      	r2, 0x30010	// 4c4c <std_clk_calib+0x260>
+    4a54:	3300      	movi      	r3, 0
+    4a56:	b762      	st.w      	r3, (r7, 0x8)
+    4a58:	b743      	st.w      	r2, (r7, 0xc)
+    4a5a:	32d8      	movi      	r2, 216
+    4a5c:	b745      	st.w      	r2, (r7, 0x14)
+    4a5e:	974f      	ld.w      	r2, (r7, 0x3c)
+    4a60:	3aa2      	bseti      	r2, 2
+    4a62:	b74f      	st.w      	r2, (r7, 0x3c)
+    4a64:	9803      	ld.w      	r0, (r14, 0xc)
+    4a66:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    4a6a:	327d      	movi      	r2, 125
+    4a6c:	2100      	addi      	r1, 1
+    4a6e:	7c48      	mult      	r1, r2
+    4a70:	b861      	st.w      	r3, (r14, 0x4)
+    4a72:	e3fff3ad 	bsr      	0x31cc	// 31cc <__udivsi3>
+    4a76:	b804      	st.w      	r0, (r14, 0x10)
+    4a78:	32fa      	movi      	r2, 250
+    4a7a:	9824      	ld.w      	r1, (r14, 0x10)
+    4a7c:	4242      	lsli      	r2, r2, 2
+    4a7e:	6448      	cmphs      	r2, r1
+    4a80:	0bca      	bt      	0x4a14	// 4a14 <std_clk_calib+0x28>
+    4a82:	9844      	ld.w      	r2, (r14, 0x10)
+    4a84:	3178      	movi      	r1, 120
+    4a86:	9804      	ld.w      	r0, (r14, 0x10)
+    4a88:	b840      	st.w      	r2, (r14, 0x0)
+    4a8a:	e3fff3a1 	bsr      	0x31cc	// 31cc <__udivsi3>
+    4a8e:	9840      	ld.w      	r2, (r14, 0x0)
+    4a90:	6082      	subu      	r2, r0
+    4a92:	b845      	st.w      	r2, (r14, 0x14)
+    4a94:	9804      	ld.w      	r0, (r14, 0x10)
+    4a96:	3178      	movi      	r1, 120
+    4a98:	9844      	ld.w      	r2, (r14, 0x10)
+    4a9a:	b840      	st.w      	r2, (r14, 0x0)
+    4a9c:	e3fff398 	bsr      	0x31cc	// 31cc <__udivsi3>
+    4aa0:	9840      	ld.w      	r2, (r14, 0x0)
+    4aa2:	6008      	addu      	r0, r2
+    4aa4:	b806      	st.w      	r0, (r14, 0x18)
+    4aa6:	c0807020 	psrclr      	ie
+    4aaa:	9640      	ld.w      	r2, (r6, 0x0)
+    4aac:	9254      	ld.w      	r2, (r2, 0x50)
+    4aae:	b848      	st.w      	r2, (r14, 0x20)
+    4ab0:	9861      	ld.w      	r3, (r14, 0x4)
+    4ab2:	9440      	ld.w      	r2, (r4, 0x0)
+    4ab4:	b260      	st.w      	r3, (r2, 0x0)
+    4ab6:	b761      	st.w      	r3, (r7, 0x4)
+    4ab8:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    4abc:	3b40      	cmpnei      	r3, 0
+    4abe:	083e      	bt      	0x4b3a	// 4b3a <std_clk_calib+0x14e>
+    4ac0:	e3ffeb50 	bsr      	0x2160	// 2160 <LPT_Soft_Reset>
+    4ac4:	9400      	ld.w      	r0, (r4, 0x0)
+    4ac6:	e3ffeb71 	bsr      	0x21a8	// 21a8 <BT_Soft_Reset>
+    4aca:	c1807420 	psrset      	ee, ie
+    4ace:	3001      	movi      	r0, 1
+    4ad0:	07a3      	br      	0x4a16	// 4a16 <std_clk_calib+0x2a>
+    4ad2:	3b41      	cmpnei      	r3, 1
+    4ad4:	0806      	bt      	0x4ae0	// 4ae0 <std_clk_calib+0xf4>
+    4ad6:	3303      	movi      	r3, 3
+    4ad8:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4adc:	127d      	lrw      	r3, 0x16e3600	// 4c50 <std_clk_calib+0x264>
+    4ade:	07a8      	br      	0x4a2e	// 4a2e <std_clk_calib+0x42>
+    4ae0:	3b42      	cmpnei      	r3, 2
+    4ae2:	0806      	bt      	0x4aee	// 4aee <std_clk_calib+0x102>
+    4ae4:	3301      	movi      	r3, 1
+    4ae6:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4aea:	127b      	lrw      	r3, 0xb71b00	// 4c54 <std_clk_calib+0x268>
+    4aec:	07a1      	br      	0x4a2e	// 4a2e <std_clk_calib+0x42>
+    4aee:	3b43      	cmpnei      	r3, 3
+    4af0:	0806      	bt      	0x4afc	// 4afc <std_clk_calib+0x110>
+    4af2:	3300      	movi      	r3, 0
+    4af4:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4af8:	1278      	lrw      	r3, 0x5b8d80	// 4c58 <std_clk_calib+0x26c>
+    4afa:	079a      	br      	0x4a2e	// 4a2e <std_clk_calib+0x42>
+    4afc:	3b44      	cmpnei      	r3, 4
+    4afe:	0809      	bt      	0x4b10	// 4b10 <std_clk_calib+0x124>
+    4b00:	3300      	movi      	r3, 0
+    4b02:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4b06:	1276      	lrw      	r3, 0x54c720	// 4c5c <std_clk_calib+0x270>
+    4b08:	b863      	st.w      	r3, (r14, 0xc)
+    4b0a:	3380      	movi      	r3, 128
+    4b0c:	4369      	lsli      	r3, r3, 9
+    4b0e:	0793      	br      	0x4a34	// 4a34 <std_clk_calib+0x48>
+    4b10:	3b45      	cmpnei      	r3, 5
+    4b12:	0806      	bt      	0x4b1e	// 4b1e <std_clk_calib+0x132>
+    4b14:	3300      	movi      	r3, 0
+    4b16:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4b1a:	1272      	lrw      	r3, 0x3ffed0	// 4c60 <std_clk_calib+0x274>
+    4b1c:	07f6      	br      	0x4b08	// 4b08 <std_clk_calib+0x11c>
+    4b1e:	3b46      	cmpnei      	r3, 6
+    4b20:	0806      	bt      	0x4b2c	// 4b2c <std_clk_calib+0x140>
+    4b22:	3300      	movi      	r3, 0
+    4b24:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4b28:	126f      	lrw      	r3, 0x1fff68	// 4c64 <std_clk_calib+0x278>
+    4b2a:	07ef      	br      	0x4b08	// 4b08 <std_clk_calib+0x11c>
+    4b2c:	3b47      	cmpnei      	r3, 7
+    4b2e:	0b84      	bt      	0x4a36	// 4a36 <std_clk_calib+0x4a>
+    4b30:	3300      	movi      	r3, 0
+    4b32:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4b36:	126d      	lrw      	r3, 0x1ffb8	// 4c68 <std_clk_calib+0x27c>
+    4b38:	07e8      	br      	0x4b08	// 4b08 <std_clk_calib+0x11c>
+    4b3a:	9560      	ld.w      	r3, (r5, 0x0)
+    4b3c:	3101      	movi      	r1, 1
+    4b3e:	9440      	ld.w      	r2, (r4, 0x0)
+    4b40:	b321      	st.w      	r1, (r3, 0x4)
+    4b42:	b220      	st.w      	r1, (r2, 0x0)
+    4b44:	3100      	movi      	r1, 0
+    4b46:	b327      	st.w      	r1, (r3, 0x1c)
+    4b48:	3004      	movi      	r0, 4
+    4b4a:	b225      	st.w      	r1, (r2, 0x14)
+    4b4c:	932e      	ld.w      	r1, (r3, 0x38)
+    4b4e:	6840      	and      	r1, r0
+    4b50:	3940      	cmpnei      	r1, 0
+    4b52:	0ffd      	bf      	0x4b4c	// 4b4c <std_clk_calib+0x160>
+    4b54:	9225      	ld.w      	r1, (r2, 0x14)
+    4b56:	b82a      	st.w      	r1, (r14, 0x28)
+    4b58:	3100      	movi      	r1, 0
+    4b5a:	b310      	st.w      	r0, (r3, 0x40)
+    4b5c:	b327      	st.w      	r1, (r3, 0x1c)
+    4b5e:	3004      	movi      	r0, 4
+    4b60:	b225      	st.w      	r1, (r2, 0x14)
+    4b62:	932e      	ld.w      	r1, (r3, 0x38)
+    4b64:	6840      	and      	r1, r0
+    4b66:	3940      	cmpnei      	r1, 0
+    4b68:	0ffd      	bf      	0x4b62	// 4b62 <std_clk_calib+0x176>
+    4b6a:	9225      	ld.w      	r1, (r2, 0x14)
+    4b6c:	b82b      	st.w      	r1, (r14, 0x2c)
+    4b6e:	3100      	movi      	r1, 0
+    4b70:	b310      	st.w      	r0, (r3, 0x40)
+    4b72:	b327      	st.w      	r1, (r3, 0x1c)
+    4b74:	3004      	movi      	r0, 4
+    4b76:	b225      	st.w      	r1, (r2, 0x14)
+    4b78:	932e      	ld.w      	r1, (r3, 0x38)
+    4b7a:	6840      	and      	r1, r0
+    4b7c:	3940      	cmpnei      	r1, 0
+    4b7e:	0ffd      	bf      	0x4b78	// 4b78 <std_clk_calib+0x18c>
+    4b80:	9225      	ld.w      	r1, (r2, 0x14)
+    4b82:	b82c      	st.w      	r1, (r14, 0x30)
+    4b84:	b310      	st.w      	r0, (r3, 0x40)
+    4b86:	982b      	ld.w      	r1, (r14, 0x2c)
+    4b88:	980c      	ld.w      	r0, (r14, 0x30)
+    4b8a:	6040      	addu      	r1, r0
+    4b8c:	b829      	st.w      	r1, (r14, 0x24)
+    4b8e:	9829      	ld.w      	r1, (r14, 0x24)
+    4b90:	4921      	lsri      	r1, r1, 1
+    4b92:	b829      	st.w      	r1, (r14, 0x24)
+    4b94:	3100      	movi      	r1, 0
+    4b96:	b321      	st.w      	r1, (r3, 0x4)
+    4b98:	b220      	st.w      	r1, (r2, 0x0)
+    4b9a:	b327      	st.w      	r1, (r3, 0x1c)
+    4b9c:	b225      	st.w      	r1, (r2, 0x14)
+    4b9e:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4ba2:	3b42      	cmpnei      	r3, 2
+    4ba4:	9849      	ld.w      	r2, (r14, 0x24)
+    4ba6:	082c      	bt      	0x4bfe	// 4bfe <std_clk_calib+0x212>
+    4ba8:	1171      	lrw      	r3, 0x7ff	// 4c6c <std_clk_calib+0x280>
+    4baa:	648c      	cmphs      	r3, r2
+    4bac:	0c03      	bf      	0x4bb2	// 4bb2 <std_clk_calib+0x1c6>
+    4bae:	3300      	movi      	r3, 0
+    4bb0:	040f      	br      	0x4bce	// 4bce <std_clk_calib+0x1e2>
+    4bb2:	9849      	ld.w      	r2, (r14, 0x24)
+    4bb4:	9866      	ld.w      	r3, (r14, 0x18)
+    4bb6:	648c      	cmphs      	r3, r2
+    4bb8:	080e      	bt      	0x4bd4	// 4bd4 <std_clk_calib+0x1e8>
+    4bba:	9868      	ld.w      	r3, (r14, 0x20)
+    4bbc:	9847      	ld.w      	r2, (r14, 0x1c)
+    4bbe:	60ca      	subu      	r3, r2
+    4bc0:	b868      	st.w      	r3, (r14, 0x20)
+    4bc2:	32fe      	movi      	r2, 254
+    4bc4:	9868      	ld.w      	r3, (r14, 0x20)
+    4bc6:	4248      	lsli      	r2, r2, 8
+    4bc8:	68c8      	and      	r3, r2
+    4bca:	3b40      	cmpnei      	r3, 0
+    4bcc:	0812      	bt      	0x4bf0	// 4bf0 <std_clk_calib+0x204>
+    4bce:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    4bd2:	0721      	br      	0x4a14	// 4a14 <std_clk_calib+0x28>
+    4bd4:	9849      	ld.w      	r2, (r14, 0x24)
+    4bd6:	9865      	ld.w      	r3, (r14, 0x14)
+    4bd8:	64c8      	cmphs      	r2, r3
+    4bda:	0829      	bt      	0x4c2c	// 4c2c <std_clk_calib+0x240>
+    4bdc:	9868      	ld.w      	r3, (r14, 0x20)
+    4bde:	9847      	ld.w      	r2, (r14, 0x1c)
+    4be0:	60c8      	addu      	r3, r2
+    4be2:	b868      	st.w      	r3, (r14, 0x20)
+    4be4:	33fe      	movi      	r3, 254
+    4be6:	9848      	ld.w      	r2, (r14, 0x20)
+    4be8:	4368      	lsli      	r3, r3, 8
+    4bea:	688c      	and      	r2, r3
+    4bec:	64ca      	cmpne      	r2, r3
+    4bee:	0fe0      	bf      	0x4bae	// 4bae <std_clk_calib+0x1c2>
+    4bf0:	9660      	ld.w      	r3, (r6, 0x0)
+    4bf2:	9848      	ld.w      	r2, (r14, 0x20)
+    4bf4:	b354      	st.w      	r2, (r3, 0x50)
+    4bf6:	3001      	movi      	r0, 1
+    4bf8:	e3ffed70 	bsr      	0x26d8	// 26d8 <delay_nms>
+    4bfc:	075e      	br      	0x4ab8	// 4ab8 <std_clk_calib+0xcc>
+    4bfe:	9866      	ld.w      	r3, (r14, 0x18)
+    4c00:	648c      	cmphs      	r3, r2
+    4c02:	0809      	bt      	0x4c14	// 4c14 <std_clk_calib+0x228>
+    4c04:	9868      	ld.w      	r3, (r14, 0x20)
+    4c06:	9847      	ld.w      	r2, (r14, 0x1c)
+    4c08:	60ca      	subu      	r3, r2
+    4c0a:	b868      	st.w      	r3, (r14, 0x20)
+    4c0c:	32ff      	movi      	r2, 255
+    4c0e:	9868      	ld.w      	r3, (r14, 0x20)
+    4c10:	4250      	lsli      	r2, r2, 16
+    4c12:	07db      	br      	0x4bc8	// 4bc8 <std_clk_calib+0x1dc>
+    4c14:	9849      	ld.w      	r2, (r14, 0x24)
+    4c16:	9865      	ld.w      	r3, (r14, 0x14)
+    4c18:	64c8      	cmphs      	r2, r3
+    4c1a:	0809      	bt      	0x4c2c	// 4c2c <std_clk_calib+0x240>
+    4c1c:	9868      	ld.w      	r3, (r14, 0x20)
+    4c1e:	9847      	ld.w      	r2, (r14, 0x1c)
+    4c20:	60c8      	addu      	r3, r2
+    4c22:	b868      	st.w      	r3, (r14, 0x20)
+    4c24:	33ff      	movi      	r3, 255
+    4c26:	9848      	ld.w      	r2, (r14, 0x20)
+    4c28:	4370      	lsli      	r3, r3, 16
+    4c2a:	07e0      	br      	0x4bea	// 4bea <std_clk_calib+0x1fe>
+    4c2c:	3300      	movi      	r3, 0
+    4c2e:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    4c32:	07e2      	br      	0x4bf6	// 4bf6 <std_clk_calib+0x20a>
+    4c34:	2000005c 	.long	0x2000005c
+    4c38:	2000000c 	.long	0x2000000c
+    4c3c:	02dc6c00 	.long	0x02dc6c00
+    4c40:	0000ffff 	.long	0x0000ffff
+    4c44:	20000014 	.long	0x20000014
+    4c48:	be9c0005 	.long	0xbe9c0005
+    4c4c:	00030010 	.long	0x00030010
+    4c50:	016e3600 	.long	0x016e3600
+    4c54:	00b71b00 	.long	0x00b71b00
+    4c58:	005b8d80 	.long	0x005b8d80
+    4c5c:	0054c720 	.long	0x0054c720
+    4c60:	003ffed0 	.long	0x003ffed0
+    4c64:	001fff68 	.long	0x001fff68
+    4c68:	0001ffb8 	.long	0x0001ffb8
+    4c6c:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/RLY_10V485_V02_20260402.map b/Source/Lst/RLY_10V485_V02_20260402.map
new file mode 100644
index 0000000..1562b2b
--- /dev/null
+++ b/Source/Lst/RLY_10V485_V02_20260402.map
@@ -0,0 +1,2271 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          338260 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         171
+  Section header string table index: 168
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 001a8e 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00001a90 002a90 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00001ac8 002ac8 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00001b3c 002b3c 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        00001b88 002b88 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        00001bb8 002bb8 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        00001c40 002c40 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        00001c68 002c68 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00001ca4 002ca4 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        00001cb8 002cb8 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00001cd0 002cd0 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00001cf0 002cf0 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00001d0c 002d0c 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        00001d28 002d28 000040 00  AX  0   0  4
+  [15] .text.EXTI_interr PROGBITS        00001d68 002d68 000034 00  AX  0   0  4
+  [16] .text.GPIO_EXTI_i PROGBITS        00001d9c 002d9c 000004 00  AX  0   0  2
+  [17] .text.EXI4_Int_En PROGBITS        00001da0 002da0 000010 00  AX  0   0  4
+  [18] .text.SYSCON_Int_ PROGBITS        00001db0 002db0 00000c 00  AX  0   0  4
+  [19] .text.SYSCON_Int_ PROGBITS        00001dbc 002dbc 00000c 00  AX  0   0  4
+  [20] .text.SYSCON_INT_ PROGBITS        00001dc8 002dc8 000024 00  AX  0   0  4
+  [21] .text.Set_INT_Pri PROGBITS        00001dec 002dec 000030 00  AX  0   0  4
+  [22] .text.GPIO_Init   PROGBITS        00001e1c 002e1c 0000e0 00  AX  0   0  4
+  [23] .text.GPIO_PullHi PROGBITS        00001efc 002efc 000014 00  AX  0   0  2
+  [24] .text.GPIO_DriveS PROGBITS        00001f10 002f10 00000e 00  AX  0   0  2
+  [25] .text.GPIO_IntGro PROGBITS        00001f20 002f20 00010c 00  AX  0   0  4
+  [26] .text.GPIOA0_EXI_ PROGBITS        0000202c 00302c 0000fc 00  AX  0   0  4
+  [27] .text.GPIO_Write_ PROGBITS        00002128 003128 000008 00  AX  0   0  2
+  [28] .text.GPIO_Write_ PROGBITS        00002130 003130 000008 00  AX  0   0  2
+  [29] .text.GPIO_Revers PROGBITS        00002138 003138 000016 00  AX  0   0  2
+  [30] .text.GPIO_Read_S PROGBITS        0000214e 00314e 000010 00  AX  0   0  2
+  [31] .text.LPT_Soft_Re PROGBITS        00002160 003160 000014 00  AX  0   0  4
+  [32] .text.WWDT_CNT_Lo PROGBITS        00002174 003174 000010 00  AX  0   0  4
+  [33] .text.BT_DeInit   PROGBITS        00002184 003184 00001c 00  AX  0   0  2
+  [34] .text.BT_Start    PROGBITS        000021a0 0031a0 000008 00  AX  0   0  2
+  [35] .text.BT_Soft_Res PROGBITS        000021a8 0031a8 00000a 00  AX  0   0  2
+  [36] .text.BT_Configur PROGBITS        000021b2 0031b2 000018 00  AX  0   0  2
+  [37] .text.BT_ControlS PROGBITS        000021ca 0031ca 00002c 00  AX  0   0  2
+  [38] .text.BT_Period_C PROGBITS        000021f6 0031f6 000006 00  AX  0   0  2
+  [39] .text.BT_ConfigIn PROGBITS        000021fc 0031fc 000012 00  AX  0   0  2
+  [40] .text.BT1_INT_ENA PROGBITS        00002210 003210 000010 00  AX  0   0  4
+  [41] .text.GPT_IO_Init PROGBITS        00002220 003220 0000a0 00  AX  0   0  4
+  [42] .text.GPT_Configu PROGBITS        000022c0 0032c0 000014 00  AX  0   0  4
+  [43] .text.GPT_WaveCtr PROGBITS        000022d4 0032d4 000044 00  AX  0   0  4
+  [44] .text.GPT_WaveLoa PROGBITS        00002318 003318 000014 00  AX  0   0  4
+  [45] .text.GPT_WaveOut PROGBITS        0000232c 00332c 0000b4 00  AX  0   0  4
+  [46] .text.GPT_Start   PROGBITS        000023e0 0033e0 000010 00  AX  0   0  4
+  [47] .text.GPT_Period_ PROGBITS        000023f0 0033f0 000010 00  AX  0   0  4
+  [48] .text.GPT_ConfigI PROGBITS        00002400 003400 00001c 00  AX  0   0  4
+  [49] .text.UART0_DeIni PROGBITS        0000241c 00341c 000018 00  AX  0   0  4
+  [50] .text.UART1_DeIni PROGBITS        00002434 003434 000018 00  AX  0   0  4
+  [51] .text.UART2_DeIni PROGBITS        0000244c 00344c 000018 00  AX  0   0  4
+  [52] .text.UART1_Int_E PROGBITS        00002464 003464 00001c 00  AX  0   0  4
+  [53] .text.UART2_Int_E PROGBITS        00002480 003480 00001c 00  AX  0   0  4
+  [54] .text.UART_IO_Ini PROGBITS        0000249c 00349c 0000ec 00  AX  0   0  4
+  [55] .text.UARTInitRxT PROGBITS        00002588 003588 000010 00  AX  0   0  4
+  [56] .text.UARTTransmi PROGBITS        00002598 003598 00001e 00  AX  0   0  2
+  [57] .text.EPT_Stop    PROGBITS        000025b8 0035b8 000028 00  AX  0   0  4
+  [58] .text.Page_Progra PROGBITS        000025e0 0035e0 0000a0 00  AX  0   0  4
+  [59] .text.ReadDataArr PROGBITS        00002680 003680 00002a 00  AX  0   0  2
+  [60] .text.startup.mai PROGBITS        000026ac 0036ac 00002c 00  AX  0   0  4
+  [61] .text.delay_nms   PROGBITS        000026d8 0036d8 00002c 00  AX  0   0  2
+  [62] .text.delay_nus   PROGBITS        00002704 003704 000022 00  AX  0   0  2
+  [63] .text.BT_CONFIG   PROGBITS        00002728 003728 000060 00  AX  0   0  4
+  [64] .text.SYSCON_CONF PROGBITS        00002788 003788 000062 00  AX  0   0  2
+  [65] .text.APT32F102_i PROGBITS        000027ec 0037ec 00004c 00  AX  0   0  4
+  [66] .text.SYSCONIntHa PROGBITS        00002838 003838 0000f0 00  AX  0   0  4
+  [67] .text.IFCIntHandl PROGBITS        00002928 003928 000068 00  AX  0   0  4
+  [68] .text.ADCIntHandl PROGBITS        00002990 003990 000068 00  AX  0   0  4
+  [69] .text.EPT0IntHand PROGBITS        000029f8 0039f8 0001ac 00  AX  0   0  4
+  [70] .text.WWDTHandler PROGBITS        00002ba4 003ba4 000034 00  AX  0   0  4
+  [71] .text.GPT0IntHand PROGBITS        00002bd8 003bd8 000080 00  AX  0   0  4
+  [72] .text.RTCIntHandl PROGBITS        00002c58 003c58 000070 00  AX  0   0  4
+  [73] .text.UART0IntHan PROGBITS        00002cc8 003cc8 00003c 00  AX  0   0  4
+  [74] .text.UART1IntHan PROGBITS        00002d04 003d04 000094 00  AX  0   0  4
+  [75] .text.UART2IntHan PROGBITS        00002d98 003d98 00004c 00  AX  0   0  4
+  [76] .text.SPI0IntHand PROGBITS        00002de4 003de4 0000e8 00  AX  0   0  4
+  [77] .text.SIO0IntHand PROGBITS        00002ecc 003ecc 000054 00  AX  0   0  4
+  [78] .text.EXI0IntHand PROGBITS        00002f20 003f20 000030 00  AX  0   0  4
+  [79] .text.EXI1IntHand PROGBITS        00002f50 003f50 000030 00  AX  0   0  4
+  [80] .text.EXI2to3IntH PROGBITS        00002f80 003f80 000048 00  AX  0   0  4
+  [81] .text.EXI4to9IntH PROGBITS        00002fc8 003fc8 000020 00  AX  0   0  4
+  [82] .text.EXI10to15In PROGBITS        00002fe8 003fe8 00006c 00  AX  0   0  4
+  [83] .text.LPTIntHandl PROGBITS        00003054 004054 000034 00  AX  0   0  4
+  [84] .text.BT0IntHandl PROGBITS        00003088 004088 00004c 00  AX  0   0  4
+  [85] .text.BT1IntHandl PROGBITS        000030d4 0040d4 000070 00  AX  0   0  4
+  [86] .text.PriviledgeV PROGBITS        00003144 004144 000002 00  AX  0   0  2
+  [87] .text.PendTrapHan PROGBITS        00003146 004146 000008 00  AX  0   0  2
+  [88] .text.Trap3Handle PROGBITS        0000314e 00414e 000008 00  AX  0   0  2
+  [89] .text.Trap2Handle PROGBITS        00003156 004156 000008 00  AX  0   0  2
+  [90] .text.Trap1Handle PROGBITS        0000315e 00415e 000008 00  AX  0   0  2
+  [91] .text.Trap0Handle PROGBITS        00003166 004166 000008 00  AX  0   0  2
+  [92] .text.UnrecExecpH PROGBITS        0000316e 00416e 000008 00  AX  0   0  2
+  [93] .text.BreakPointH PROGBITS        00003176 004176 000008 00  AX  0   0  2
+  [94] .text.AccessErrHa PROGBITS        0000317e 00417e 000008 00  AX  0   0  2
+  [95] .text.IllegalInst PROGBITS        00003186 004186 000008 00  AX  0   0  2
+  [96] .text.MisalignedH PROGBITS        0000318e 00418e 000008 00  AX  0   0  2
+  [97] .text.CNTAIntHand PROGBITS        00003196 004196 000008 00  AX  0   0  2
+  [98] .text.I2CIntHandl PROGBITS        0000319e 00419e 000008 00  AX  0   0  2
+  [99] .text.__divsi3    PROGBITS        000031a8 0041a8 000024 00  AX  0   0  4
+  [100] .text.__udivsi3   PROGBITS        000031cc 0041cc 000024 00  AX  0   0  4
+  [101] .text.__umodsi3   PROGBITS        000031f0 0041f0 000024 00  AX  0   0  4
+  [102] .text.CK_CPU_EnAl PROGBITS        00003214 004214 000006 00  AX  0   0  2
+  [103] .text.CK_CPU_DisA PROGBITS        0000321a 00421a 000006 00  AX  0   0  2
+  [104] .text.UARTx_Init  PROGBITS        00003220 004220 000154 00  AX  0   0  4
+  [105] .text.UART1_RecvI PROGBITS        00003374 004374 000044 00  AX  0   0  4
+  [106] .text.UART1_TASK  PROGBITS        000033b8 0043b8 000070 00  AX  0   0  4
+  [107] .text.BUS485_Send PROGBITS        00003428 004428 0000d0 00  AX  0   0  4
+  [108] .text.MultSend_Ta PROGBITS        000034f8 0044f8 000064 00  AX  0   0  4
+  [109] .text.Set_GroupSe PROGBITS        0000355c 00455c 00005c 00  AX  0   0  4
+  [110] .text.BUS485Send_ PROGBITS        000035b8 0045b8 00002c 00  AX  0   0  4
+  [111] .text.BusIdle_Tas PROGBITS        000035e4 0045e4 00003c 00  AX  0   0  4
+  [112] .text.BusBusy_Tas PROGBITS        00003620 004620 000054 00  AX  0   0  4
+  [113] .text.Dbg_Println PROGBITS        00003674 004674 00000c 00  AX  0   0  2
+  [114] .text.Dbg_Print_B PROGBITS        00003680 004680 000002 00  AX  0   0  2
+  [115] .text.DIP_GetSwit PROGBITS        00003684 004684 000034 00  AX  0   0  4
+  [116] .text.DIP_Switch_ PROGBITS        000036b8 0046b8 000090 00  AX  0   0  4
+  [117] .text.DIP_ScanTas PROGBITS        00003748 004748 00009c 00  AX  0   0  4
+  [118] .text.Relay_Init  PROGBITS        000037e4 0047e4 0000c0 00  AX  0   0  4
+  [119] .text.CheckSum    PROGBITS        000038a4 0048a4 000016 00  AX  0   0  2
+  [120] .text.CheckSum_Ch PROGBITS        000038ba 0048ba 000018 00  AX  0   0  2
+  [121] .text.CheckSum_Ov PROGBITS        000038d2 0048d2 000024 00  AX  0   0  2
+  [122] .text.Change_OUTV PROGBITS        000038f8 0048f8 00001c 00  AX  0   0  4
+  [123] .text.BLV_VolOut_ PROGBITS        00003914 004914 00005c 00  AX  0   0  4
+  [124] .text.BLV_RLY_Ctr PROGBITS        00003970 004970 00007c 00  AX  0   0  4
+  [125] .text.BLV_RLY_Tas PROGBITS        000039ec 0049ec 000048 00  AX  0   0  4
+  [126] .text.BLV_A9RLY_C PROGBITS        00003a34 004a34 0000a4 00  AX  0   0  4
+  [127] .text.BLV_A9RLY_C PROGBITS        00003ad8 004ad8 00008c 00  AX  0   0  4
+  [128] .text.BLV_WINDOUT PROGBITS        00003b64 004b64 0000d8 00  AX  0   0  4
+  [129] .text.BLV_WINDOUT PROGBITS        00003c3c 004c3c 000094 00  AX  0   0  4
+  [130] .text.BLV_DEVPROT PROGBITS        00003cd0 004cd0 000088 00  AX  0   0  4
+  [131] .text.BLV_DEVPROT PROGBITS        00003d58 004d58 000074 00  AX  0   0  4
+  [132] .text.BLV_RLY_RS4 PROGBITS        00003dcc 004dcc 000104 00  AX  0   0  4
+  [133] .text.CTRL_LEDSta PROGBITS        00003ed0 004ed0 000034 00  AX  0   0  4
+  [134] .text.EEPROM_Chec PROGBITS        00003f04 004f04 000016 00  AX  0   0  2
+  [135] .text.EEPROM_Read PROGBITS        00003f1c 004f1c 0001b4 00  AX  0   0  4
+  [136] .text.EEPROM_Vali PROGBITS        000040d0 0050d0 000074 00  AX  0   0  2
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+  [138] .text.EEPROM_Read PROGBITS        000041f4 0051f4 000070 00  AX  0   0  4
+  [139] .text.EEPROM_Writ PROGBITS        00004264 005264 000040 00  AX  0   0  2
+  [140] .text.EEPROM_Defa PROGBITS        000042a4 0052a4 000034 00  AX  0   0  4
+  [141] .text.EEPROM_Vali PROGBITS        000042d8 0052d8 000058 00  AX  0   0  4
+  [142] .text.EEPROM_Init PROGBITS        00004330 005330 00005c 00  AX  0   0  4
+  [143] .text.TK_Sampling PROGBITS        0000438c 00538c 000058 00  AX  0   0  4
+  [144] .text.TKEYIntHand PROGBITS        000043e4 0053e4 000088 00  AX  0   0  4
+  [145] .text.get_key_num PROGBITS        0000446c 00546c 000028 00  AX  0   0  4
+  [146] .text.TK_Scan_Sta PROGBITS        00004494 005494 000020 00  AX  0   0  4
+  [147] .text.TK_Keymap_p PROGBITS        000044b4 0054b4 000180 00  AX  0   0  4
+  [148] .text.TK_overflow PROGBITS        00004634 005634 00011c 00  AX  0   0  4
+  [149] .text.TK_Baseline PROGBITS        00004750 005750 0001d0 00  AX  0   0  4
+  [150] .text.TK_result_p PROGBITS        00004920 005920 000054 00  AX  0   0  4
+  [151] .text.CORETHandle PROGBITS        00004974 005974 000078 00  AX  0   0  4
+  [152] .text.std_clk_cal PROGBITS        000049ec 0059ec 000284 00  AX  0   0  4
+  [153] .RomCode          PROGBITS        00004c70 00609c 000000 00   W  0   0  1
+  [154] .rodata           PROGBITS        00004c70 005c70 0002f8 00   A  0   0  4
+  [155] .data             PROGBITS        20000000 006000 00009c 00  WA  0   0  4
+  [156] .bss              NOBITS          2000009c 00609c 0005d8 00  WA  0   0  4
+  [157] .csky.attributes  CSKY_ATTRIBUTES 00000000 00609c 000022 00      0   0  1
+  [158] .comment          PROGBITS        00000000 0060be 000042 01  MS  0   0  1
+  [159] .csky_stack_size  PROGBITS        00000000 006100 0007fc 00      0   0 16
+  [160] .debug_line       PROGBITS        00000000 0068fc 003bd5 00      0   0  1
+  [161] .debug_info       PROGBITS        00000000 00a4d1 02f1c3 00      0   0  1
+  [162] .debug_abbrev     PROGBITS        00000000 039694 002bc5 00      0   0  1
+  [163] .debug_aranges    PROGBITS        00000000 03c260 000d10 00      0   0  8
+  [164] .debug_ranges     PROGBITS        00000000 03cf70 000cf0 00      0   0  1
+  [165] .debug_str        PROGBITS        00000000 03dc60 009ba4 01  MS  0   0  1
+  [166] .debug_frame      PROGBITS        00000000 047804 001eb8 00      0   0  4
+  [167] .debug_loc        PROGBITS        00000000 0496bc 0030bf 00      0   0  1
+  [168] .shstrtab         STRTAB          00000000 051b13 000e3f 00      0   0  1
+  [169] .symtab           SYMTAB          00000000 04c77c 003f90 10     170 711  4
+  [170] .strtab           STRTAB          00000000 05070c 001407 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x04f68 0x04f68 R E 0x1000
+  LOAD           0x006000 0x20000000 0x00004f68 0x0009c 0x00674 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.EXTI_interrupt_CMD .text.GPIO_EXTI_interrupt .text.EXI4_Int_Enable .text.SYSCON_Int_Enable .text.SYSCON_Int_Disable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_IntGroup_Set .text.GPIOA0_EXI_Init .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART1_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.Page_ProgramData .text.ReadDataArry_U8 .text.startup.main .text.delay_nms .text.delay_nus .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.CK_CPU_DisAllNormalIrq .text.UARTx_Init .text.UART1_RecvINT_Processing .text.UART1_TASK .text.BUS485_Send .text.MultSend_Task .text.Set_GroupSend .text.BUS485Send_Task .text.BusIdle_Task .text.BusBusy_Task .text.Dbg_Println .text.Dbg_Print_Buff .text.DIP_GetSwitchState .text.DIP_Switch_Init .text.DIP_ScanTask .text.Relay_Init .text.CheckSum .text.CheckSum_Check .text.CheckSum_Overlook_Check .text.Change_OUTV .text.BLV_VolOut_Ctrl .text.BLV_RLY_Ctrl_Purpose .text.BLV_RLY_Task .text.BLV_A9RLY_CMD_SET_Processing .text.BLV_A9RLY_CMD_READ_Processing .text.BLV_WINDOUT_CMD_SET_Processing .text.BLV_WINDOUT_CMD_READ_Processing .text.BLV_DEVPROT_CMD_SET_Processing .text.BLV_DEVPROT_CMD_READ_Processing .text.BLV_RLY_RS485_Pro .text.CTRL_LEDStatus_Task .text.EEPROM_CheckSum .text.EEPROM_ReadPara .text.EEPROM_ValidateWrite .text.EEPROM_WritePara .text.EEPROM_ReadMCUDevInfo .text.EEPROM_WriteMCUDevInfo .text.EEPROM_Default_MCUDevInfo .text.EEPROM_Validate_MCUDevInfo .text.EEPROM_Init .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_interrupt_CMD) for EXTI_interrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.GPIO_EXTI_interrupt) for GPIO_EXTI_interrupt
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXI4_Int_Enable) for EXI4_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Disable) for SYSCON_Int_Disable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.UART1_RecvINT_Processing) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/SYSTEM_control_rly.o(.text.CTRL_LEDStatus_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_IntGroup_Set) for GPIO_IntGroup_Set
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIOA0_EXI_Init) for GPIOA0_EXI_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_Int_Enable) for UART1_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/FWlib_apt32f102_ifc.o(.text.Page_ProgramData) for Page_ProgramData
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) refers to Obj/FWlib_apt32f102_ifc.o(.text.Page_ProgramData) for Page_ProgramData
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/FWlib_apt32f102_ifc.o(.text.ReadDataArry_U8) for ReadDataArry_U8
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ValidateWrite) refers to Obj/FWlib_apt32f102_ifc.o(.text.ReadDataArry_U8) for ReadDataArry_U8
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to Obj/FWlib_apt32f102_ifc.o(.text.ReadDataArry_U8) for ReadDataArry_U8
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/mcu_initial.o(.text.delay_nus) for delay_nus
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusIdle_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusIdle_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART1IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART1_RecvINT_Processing) for UART1_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.UART1_TASK) for UART1_TASK
+	Obj/SYSTEM_uart.o(.text.MultSend_Task) refers to Obj/SYSTEM_uart.o(.text.BUS485_Send) for BUS485_Send
+	Obj/SYSTEM_uart.o(.text.BUS485Send_Task) refers to Obj/SYSTEM_uart.o(.text.MultSend_Task) for MultSend_Task
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.BUS485Send_Task) for BUS485Send_Task
+	Obj/mcu_interrupt.o(.text.BT1IntHandler) refers to Obj/SYSTEM_uart.o(.text.BusIdle_Task) for BusIdle_Task
+	Obj/mcu_interrupt.o(.text.EXI10to15IntHandler) refers to Obj/SYSTEM_uart.o(.text.BusBusy_Task) for BusBusy_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_uart.o(.text.Dbg_Print_Buff) for Dbg_Print_Buff
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) for DIP_GetSwitchState
+	Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) for DIP_GetSwitchState
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) for DIP_Switch_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) for DIP_ScanTask
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_control_rly.o(.text.Relay_Init) for Relay_Init
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Check) for CheckSum_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Check) for CheckSum_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Check) for CheckSum_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Check) for CheckSum_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Check) for CheckSum_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Check) for CheckSum_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum_Overlook_Check) for CheckSum_Overlook_Check
+	Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) refers to Obj/SYSTEM_control_rly.o(.text.Change_OUTV) for Change_OUTV
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) for BLV_VolOut_Ctrl
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) for BLV_VolOut_Ctrl
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) for BLV_RLY_Ctrl_Purpose
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) for BLV_RLY_Task
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) for BLV_A9RLY_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) for BLV_A9RLY_CMD_READ_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) for BLV_WINDOUT_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_READ_Processing) for BLV_WINDOUT_CMD_READ_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) for BLV_DEVPROT_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_READ_Processing) for BLV_DEVPROT_CMD_READ_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_control_rly.o(.text.CTRL_LEDStatus_Task) for CTRL_LEDStatus_Task
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_CheckSum) for EEPROM_CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_CheckSum) for EEPROM_CheckSum
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) for EEPROM_ReadPara
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_ValidateWrite) for EEPROM_ValidateWrite
+	Obj/SYSTEM_control_rly.o(.text.BLV_WINDOUT_CMD_SET_Processing) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) for EEPROM_WritePara
+	Obj/SYSTEM_control_rly.o(.text.BLV_DEVPROT_CMD_SET_Processing) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) for EEPROM_WritePara
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) for EEPROM_ReadMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) for EEPROM_WriteMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) for EEPROM_WriteMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) for EEPROM_WriteMCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) for EEPROM_Default_MCUDevInfo
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) for EEPROM_Validate_MCUDevInfo
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) for EEPROM_Init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to _csky_case_sqi.o(.text) for ___gnu_csky_case_sqi
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIOA0_EXI_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.Set_GroupSend) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadPara) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ValidateWrite) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WritePara) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Init) refers to memset_fast.o(.text) for memset
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_uart.o(.text.Set_GroupSend) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_ReadMCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_WriteMCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Default_MCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_eeprom.o(.text.EEPROM_Validate_MCUDevInfo) refers to strncmp.o(.text) for strncmp
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (487 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2915 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text.GPIO_Read_Output(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
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+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
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+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
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+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
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+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
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+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
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+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
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+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3426 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
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+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3171 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4139 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3542 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInit(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3658 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4858 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4966 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2864 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .bss(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (2 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.GPT0_CONFIG(Obj/mcu_initial.o), (2 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text.__modsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
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+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_uart.o), (4 bytes).
+	Removing .text.UART0_TASK(Obj/SYSTEM_uart.o), (60 bytes).
+	Removing .text.UART2_RecvINT_Processing(Obj/SYSTEM_uart.o), (52 bytes).
+	Removing .text.UART0_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (96 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (144 bytes).
+	Removing .text.Clear_SendFlag(Obj/SYSTEM_uart.o), (16 bytes).
+	Removing .text.BUS485_Jump_Boot(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Get_BUS485_Send_State(Obj/SYSTEM_uart.o), (28 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text(Obj/SYSTEM_dip_switch.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_dip_switch.o), (0 bytes).
+	Removing .text(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .text.CheckSum3(Obj/SYSTEM_control_rly.o), (32 bytes).
+	Removing .text.BLV_CMD_SN(Obj/SYSTEM_control_rly.o), (16 bytes).
+	Removing .text(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .bss(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
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+	Removing .debug_info(Obj/__rt_entry.o), (129 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
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+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
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+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
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+	Removing .bss(_csky_case_sqi.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
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+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+	Removing .data(strncmp.o), (0 bytes).
+	Removing .bss(strncmp.o), (0 bytes).
+
+597 unused seciton(s) (total 158642 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	FWlib_apt32f102_clkcalib.o         0x00000000     df        0  *ABS*
+	FWlib_apt32f102_tkey_c_1_17.o      0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_bt.o           0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_ept.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_gpio.o         0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_gpt.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_ifc.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_lpt.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_syscon.o       0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_uart.o         0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_wwdt.o         0x00000000     df        0  *ABS*
+	Obj/SYSTEM_control_rly.o           0x00000000     df        0  *ABS*
+	Obj/SYSTEM_dip_switch.o            0x00000000     df        0  *ABS*
+	Obj/SYSTEM_eeprom.o                0x00000000     df        0  *ABS*
+	Obj/SYSTEM_uart.o                  0x00000000     df        0  *ABS*
+	Obj/arch_crt0.o                    0x00000000     df        0  *ABS*
+	Obj/arch_mem_init.o                0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102.o            0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102_ck801.o      0x00000000     df        0  *ABS*
+	Obj/main.o                         0x00000000     df        0  *ABS*
+	Obj/mcu_initial.o                  0x00000000     df        0  *ABS*
+	Obj/mcu_interrupt.o                0x00000000     df        0  *ABS*
+	_addsub_df.o                       0x00000000     df        0  *ABS*
+	_clzsi2.o                          0x00000000     df        0  *ABS*
+	_csky_case_sqi.o                   0x00000000     df        0  *ABS*
+	_csky_case_uqi.o                   0x00000000     df        0  *ABS*
+	_df_to_si.o                        0x00000000     df        0  *ABS*
+	_div_df.o                          0x00000000     df        0  *ABS*
+	_fixunsdfsi.o                      0x00000000     df        0  *ABS*
+	_fpcmp_parts_df.o                  0x00000000     df        0  *ABS*
+	_ge_df.o                           0x00000000     df        0  *ABS*
+	_gt_df.o                           0x00000000     df        0  *ABS*
+	_le_df.o                           0x00000000     df        0  *ABS*
+	_mul_df.o                          0x00000000     df        0  *ABS*
+	_muldi3.o                          0x00000000     df        0  *ABS*
+	_pack_df.o                         0x00000000     df        0  *ABS*
+	_si_to_df.o                        0x00000000     df        0  *ABS*
+	_unpack_df.o                       0x00000000     df        0  *ABS*
+	_usi_to_df.o                       0x00000000     df        0  *ABS*
+	fabs.o                             0x00000000     df        0  *ABS*
+	memcpy_fast.o                      0x00000000     df        0  *ABS*
+	memset_fast.o                      0x00000000     df        0  *ABS*
+	pow.o                              0x00000000     df        0  *ABS*
+	scalbn.o                           0x00000000     df        0  *ABS*
+	sqrt.o                             0x00000000     df        0  *ABS*
+	strncmp.o                          0x00000000     df        0  *ABS*
+	$d                                 0x00000000               0  .text
+	$t                                 0x0000010c               0  .text
+	INIT_KERLE_STACK                   0x0000013e               0  .text
+	__to_main                          0x00000146               0  .text
+	__dummy                            0x00000182               0  .text
+	$d                                 0x00000186               0  .text
+	$d                                 0x000001b4               0  .text
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+	$t                                 0x000005e0               0  .text
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+	$d                                 0x00000b5e               0  .text
+	$t                                 0x00000b5e               0  .text
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+	$d                                 0x00000d28               0  .text
+	$t                                 0x00000d28               0  .text
+	$d                                 0x00000d5c               0  .text
+	_fpadd_parts                       0x00000d60      F      724  .text
+	$d                                 0x00000d60               0  .text
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+	$t                                 0x00001a90               0  .text.__main
+	$d                                 0x00001ab4               0  .text.__main
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+	$t                                 0x00001ac8               0  .text.SYSCON_General_CMD.part.0
+	$d                                 0x00001b34               0  .text.SYSCON_General_CMD.part.0
+	$d                                 0x00001b3c               0  .text.SYSCON_RST_VALUE
+	$t                                 0x00001b3c               0  .text.SYSCON_RST_VALUE
+	$d                                 0x00001b6c               0  .text.SYSCON_RST_VALUE
+	$d                                 0x00001b88               0  .text.SYSCON_General_CMD
+	$t                                 0x00001b88               0  .text.SYSCON_General_CMD
+	$d                                 0x00001bb4               0  .text.SYSCON_General_CMD
+	$d                                 0x00001bb8               0  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	$t                                 0x00001bb8               0  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	$d                                 0x00001c30               0  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	$d                                 0x00001c40               0  .text.SYSCON_HFOSC_SELECTE
+	$t                                 0x00001c40               0  .text.SYSCON_HFOSC_SELECTE
+	$d                                 0x00001c64               0  .text.SYSCON_HFOSC_SELECTE
+	$d                                 0x00001c68               0  .text.SYSCON_WDT_CMD
+	$t                                 0x00001c68               0  .text.SYSCON_WDT_CMD
+	$d                                 0x00001c98               0  .text.SYSCON_WDT_CMD
+	$d                                 0x00001ca4               0  .text.SYSCON_IWDCNT_Reload
+	$t                                 0x00001ca4               0  .text.SYSCON_IWDCNT_Reload
+	$d                                 0x00001cb4               0  .text.SYSCON_IWDCNT_Reload
+	$d                                 0x00001cb8               0  .text.SYSCON_IWDCNT_Config
+	$t                                 0x00001cb8               0  .text.SYSCON_IWDCNT_Config
+	$d                                 0x00001cc8               0  .text.SYSCON_IWDCNT_Config
+	$d                                 0x00001cd0               0  .text.SYSCON_LVD_Config
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+	$d                                 0x00001cf0               0  .text.LVD_Int_Enable
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+	$d                                 0x00001d0c               0  .text.IWDT_Int_Enable
+	$t                                 0x00001d0c               0  .text.IWDT_Int_Enable
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+	$t                                 0x00001d28               0  .text.EXTI_trigger_CMD
+	$d                                 0x00001d64               0  .text.EXTI_trigger_CMD
+	$d                                 0x00001d68               0  .text.EXTI_interrupt_CMD
+	$t                                 0x00001d68               0  .text.EXTI_interrupt_CMD
+	$d                                 0x00001d94               0  .text.EXTI_interrupt_CMD
+	$d                                 0x00001d9c               0  .text.GPIO_EXTI_interrupt
+	$t                                 0x00001d9c               0  .text.GPIO_EXTI_interrupt
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+	$d                                 0x00001e2e               0  .text.GPIO_Init
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+	$t                                 0x00002d98               0  .text.UART2IntHandler
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+	bp                                 0x00004c70      O       16  .rodata
+	dp_l                               0x00004c80      O       16  .rodata
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+	NUM.6030                           0x2000009c      O        1  .bss
+	update_20ms.5936                   0x200000b8      O        4  .bss
+	Ctrl_LED_tick.6057                 0x200000bc      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_sqi               0x00000cfc      F       22  .text
+	___gnu_csky_case_uqi               0x00000d14      F       20  .text
+	__fixunsdfsi                       0x00000d28      F       56  .text
+	__adddf3                           0x00001034      F       46  .text
+	__subdf3                           0x00001064      F       54  .text
+	__muldf3                           0x0000109c      F      564  .text
+	__divdf3                           0x000012d0      F      340  .text
+	__gtdf2                            0x00001424      F       60  .text
+	__gedf2                            0x00001460      F       60  .text
+	__ledf2                            0x0000149c      F       58  .text
+	__floatsidf                        0x000014d8      F      112  .text
+	__fixdfsi                          0x00001548      F      112  .text
+	__floatunsidf                      0x000015b8      F       84  .text
+	__muldi3                           0x0000160c      F       68  .text
+	__clzsi2                           0x00001650      F       64  .text
+	__pack_d                           0x00001690      F      412  .text
+	__unpack_d                         0x0000182c      F      196  .text
+	__fpcmp_parts_d                    0x000018f0      F      140  .text
+	__memset_fast                      0x0000197c    w F      136  .text
+	memset                             0x0000197c    w F      136  .text
+	__memcpy_fast                      0x00001a04    w F      100  .text
+	memcpy                             0x00001a04    w F      100  .text
+	__GI_strncmp                       0x00001a68      F       38  .text
+	strncmp                            0x00001a68    w F       38  .text
+	__main                             0x00001a90      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00001b3c      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x00001b88      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x00001bb8      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x00001c40      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x00001c68      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00001ca4      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x00001cb8      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00001cd0      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00001cf0      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00001d0c      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x00001d28      F       64  .text.EXTI_trigger_CMD
+	EXTI_interrupt_CMD                 0x00001d68      F       52  .text.EXTI_interrupt_CMD
+	GPIO_EXTI_interrupt                0x00001d9c      F        4  .text.GPIO_EXTI_interrupt
+	EXI4_Int_Enable                    0x00001da0      F       16  .text.EXI4_Int_Enable
+	SYSCON_Int_Enable                  0x00001db0      F       12  .text.SYSCON_Int_Enable
+	SYSCON_Int_Disable                 0x00001dbc      F       12  .text.SYSCON_Int_Disable
+	SYSCON_INT_Priority                0x00001dc8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x00001dec      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x00001e1c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x00001efc      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00001f10      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_IntGroup_Set                  0x00001f20      F      268  .text.GPIO_IntGroup_Set
+	GPIOA0_EXI_Init                    0x0000202c      F      252  .text.GPIOA0_EXI_Init
+	GPIO_Write_High                    0x00002128      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00002130      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x00002138      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x0000214e      F       16  .text.GPIO_Read_Status
+	LPT_Soft_Reset                     0x00002160      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x00002174      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x00002184      F       28  .text.BT_DeInit
+	BT_Start                           0x000021a0      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x000021a8      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000021b2      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000021ca      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x000021f6      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x000021fc      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00002210      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00002220      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000022c0      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x000022d4      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x00002318      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x0000232c      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x000023e0      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x000023f0      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00002400      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x0000241c      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00002434      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x0000244c      F       24  .text.UART2_DeInit
+	UART1_Int_Enable                   0x00002464      F       28  .text.UART1_Int_Enable
+	UART2_Int_Enable                   0x00002480      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x0000249c      F      236  .text.UART_IO_Init
+	UARTInitRxTxIntEn                  0x00002588      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x00002598      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000025b8      F       40  .text.EPT_Stop
+	Page_ProgramData                   0x000025e0      F      160  .text.Page_ProgramData
+	ReadDataArry_U8                    0x00002680      F       42  .text.ReadDataArry_U8
+	main                               0x000026ac      F       44  .text.startup.main
+	delay_nms                          0x000026d8      F       44  .text.delay_nms
+	delay_nus                          0x00002704      F       34  .text.delay_nus
+	BT_CONFIG                          0x00002728      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x00002788      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x000027ec      F       76  .text.APT32F102_init
+	SYSCONIntHandler                   0x00002838      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00002928      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00002990      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x000029f8      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00002ba4      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00002bd8      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00002c58      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00002cc8      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00002d04      F      148  .text.UART1IntHandler
+	UART2IntHandler                    0x00002d98      F       76  .text.UART2IntHandler
+	SPI0IntHandler                     0x00002de4      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x00002ecc      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00002f20      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00002f50      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x00002f80      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x00002fc8      F       32  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00002fe8      F      108  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x00003054      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x00003088      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x000030d4      F      112  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00003144      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00003146      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x0000314e      F        8  .text.Trap3Handler
+	Trap2Handler                       0x00003156      F        8  .text.Trap2Handler
+	Trap1Handler                       0x0000315e      F        8  .text.Trap1Handler
+	Trap0Handler                       0x00003166      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x0000316e      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x00003176      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x0000317e      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x00003186      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x0000318e      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x00003196      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x0000319e      F        8  .text.I2CIntHandler
+	__divsi3                           0x000031a8      F       36  .text.__divsi3
+	__udivsi3                          0x000031cc      F       36  .text.__udivsi3
+	__umodsi3                          0x000031f0      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x00003214      F        6  .text.CK_CPU_EnAllNormalIrq
+	CK_CPU_DisAllNormalIrq             0x0000321a      F        6  .text.CK_CPU_DisAllNormalIrq
+	UARTx_Init                         0x00003220      F      340  .text.UARTx_Init
+	UART1_RecvINT_Processing           0x00003374      F       68  .text.UART1_RecvINT_Processing
+	UART1_TASK                         0x000033b8      F      112  .text.UART1_TASK
+	BUS485_Send                        0x00003428      F      208  .text.BUS485_Send
+	MultSend_Task                      0x000034f8      F      100  .text.MultSend_Task
+	Set_GroupSend                      0x0000355c      F       92  .text.Set_GroupSend
+	BUS485Send_Task                    0x000035b8      F       44  .text.BUS485Send_Task
+	BusIdle_Task                       0x000035e4      F       60  .text.BusIdle_Task
+	BusBusy_Task                       0x00003620      F       84  .text.BusBusy_Task
+	Dbg_Println                        0x00003674      F       12  .text.Dbg_Println
+	Dbg_Print_Buff                     0x00003680      F        2  .text.Dbg_Print_Buff
+	DIP_GetSwitchState                 0x00003684      F       52  .text.DIP_GetSwitchState
+	DIP_Switch_Init                    0x000036b8      F      144  .text.DIP_Switch_Init
+	DIP_ScanTask                       0x00003748      F      156  .text.DIP_ScanTask
+	Relay_Init                         0x000037e4      F      192  .text.Relay_Init
+	CheckSum                           0x000038a4      F       22  .text.CheckSum
+	CheckSum_Check                     0x000038ba      F       24  .text.CheckSum_Check
+	CheckSum_Overlook_Check            0x000038d2      F       36  .text.CheckSum_Overlook_Check
+	Change_OUTV                        0x000038f8      F       28  .text.Change_OUTV
+	BLV_VolOut_Ctrl                    0x00003914      F       92  .text.BLV_VolOut_Ctrl
+	BLV_RLY_Ctrl_Purpose               0x00003970      F      124  .text.BLV_RLY_Ctrl_Purpose
+	BLV_RLY_Task                       0x000039ec      F       72  .text.BLV_RLY_Task
+	BLV_A9RLY_CMD_SET_Processing       0x00003a34      F      164  .text.BLV_A9RLY_CMD_SET_Processing
+	BLV_A9RLY_CMD_READ_Processing      0x00003ad8      F      140  .text.BLV_A9RLY_CMD_READ_Processing
+	BLV_WINDOUT_CMD_SET_Processing     0x00003b64      F      216  .text.BLV_WINDOUT_CMD_SET_Processing
+	BLV_WINDOUT_CMD_READ_Processing    0x00003c3c      F      148  .text.BLV_WINDOUT_CMD_READ_Processing
+	BLV_DEVPROT_CMD_SET_Processing     0x00003cd0      F      136  .text.BLV_DEVPROT_CMD_SET_Processing
+	BLV_DEVPROT_CMD_READ_Processing    0x00003d58      F      116  .text.BLV_DEVPROT_CMD_READ_Processing
+	BLV_RLY_RS485_Pro                  0x00003dcc      F      260  .text.BLV_RLY_RS485_Pro
+	CTRL_LEDStatus_Task                0x00003ed0      F       52  .text.CTRL_LEDStatus_Task
+	EEPROM_CheckSum                    0x00003f04      F       22  .text.EEPROM_CheckSum
+	EEPROM_ReadPara                    0x00003f1c      F      424  .text.EEPROM_ReadPara
+	EEPROM_ValidateWrite               0x000040d0      F      116  .text.EEPROM_ValidateWrite
+	EEPROM_WritePara                   0x00004144      F      176  .text.EEPROM_WritePara
+	EEPROM_ReadMCUDevInfo              0x000041f4      F      112  .text.EEPROM_ReadMCUDevInfo
+	EEPROM_WriteMCUDevInfo             0x00004264      F       64  .text.EEPROM_WriteMCUDevInfo
+	EEPROM_Default_MCUDevInfo          0x000042a4      F       52  .text.EEPROM_Default_MCUDevInfo
+	EEPROM_Validate_MCUDevInfo         0x000042d8      F       88  .text.EEPROM_Validate_MCUDevInfo
+	EEPROM_Init                        0x00004330      F       92  .text.EEPROM_Init
+	TK_Sampling_prog                   0x0000438c      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x000043e4      F      136  .text.TKEYIntHandler
+	get_key_number                     0x0000446c      F       40  .text.get_key_number
+	TK_Scan_Start                      0x00004494      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000044b4      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00004634      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00004750      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x00004920      F       84  .text.TK_result_prog
+	CORETHandler                       0x00004974      F      120  .text.CORETHandler
+	std_clk_calib                      0x000049ec      F      644  .text.std_clk_calib
+	__thenan_df                        0x00004ca0      O       20  .rodata
+	__clz_tab                          0x00004cb4      O      256  .rodata
+	_end_rodata                        0x00004f68               0  .rodata
+	HWD                                0x20000000      O        4  .data
+	_start_data                        0x20000000               0  .data
+	CRC                                0x20000004      O        4  .data
+	BT1                                0x20000008      O        4  .data
+	BT0                                0x2000000c      O        4  .data
+	WWDT                               0x20000010      O        4  .data
+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
+	EPT0                               0x20000020      O        4  .data
+	GPT0                               0x20000024      O        4  .data
+	CA0                                0x20000028      O        4  .data
+	SIO0                               0x2000002c      O        4  .data
+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	s_tkey                             0x20000068      O        4  .data
+	samp_setover_f                     0x2000006c      O        1  .data
+	tk_overflow_en                     0x2000006d      O        1  .data
+	tk_div                             0x2000006e      O       34  .data
+	neg_build_bounce                   0x20000090      O        1  .data
+	pos_build_bounce                   0x20000091      O        1  .data
+	tk_scan_para0                      0x20000094      O        4  .data
+	scan_step_temp                     0x20000098      O        1  .data
+	_end_data                          0x2000009c               0  .data
+	_bss_start                         0x2000009c               0  .bss
+	SysTick_100us                      0x200000a0      O        4  .bss
+	SysTick_1ms                        0x200000a4      O        4  .bss
+	RS485_Comming                      0x200000a8      O        4  .bss
+	RS485_Comm_Flag                    0x200000ac      O        4  .bss
+	RS485_Comm_Start                   0x200000b0      O        4  .bss
+	RS485_Comm_End                     0x200000b4      O        4  .bss
+	Press_debounce_data                0x200000c0      O        1  .bss
+	TK_Lowpower_mode                   0x200000c1      O        1  .bss
+	TK_Lowpower_level                  0x200000c2      O        1  .bss
+	TK_longpress_time                  0x200000c4      O        4  .bss
+	Release_debounce_data              0x200000c8      O        1  .bss
+	Key_mode                           0x200000c9      O        1  .bss
+	TK_icon                            0x200000ca      O       34  .bss
+	MultiTimes_Filter                  0x200000ec      O        1  .bss
+	Base_Speed                         0x200000ed      O        1  .bss
+	TK_IO_ENABLE                       0x200000f0      O        4  .bss
+	Valid_Key_Num                      0x200000f4      O        1  .bss
+	TK_senprd                          0x200000f6      O       34  .bss
+	TK_Wakeup_level                    0x20000118      O        1  .bss
+	TK_Triggerlevel                    0x2000011a      O       34  .bss
+	TK_EC_LEVEL                        0x2000013c      O        2  .bss
+	TK_FVR_LEVEL                       0x2000013e      O        2  .bss
+	TK_BaseCnt                         0x20000140      O        4  .bss
+	TK_PSEL_MODE                       0x20000144      O        2  .bss
+	R_CMPB_BUF                         0x20000148      O        4  .bss
+	R_CMPA_BUF                         0x2000014c      O        4  .bss
+	R_SIORX_buf                        0x20000150      O       40  .bss
+	g_uart                             0x20000178      O      160  .bss
+	g_uart1                            0x20000218      O      160  .bss
+	m_send                             0x200002b8      O      164  .bss
+	g_Dip                              0x2000035c      O       16  .bss
+	c_rly                              0x2000036c      O       24  .bss
+	g_mcu_dev                          0x20000384      O       37  .bss
+	baseline_data0                     0x200003ac      O       34  .bss
+	TK_Postive_build2                  0x200003ce      O       17  .bss
+	Key_Map1                           0x200003e0      O        4  .bss
+	offset_data2_abs                   0x200003e4      O       34  .bss
+	scan_f                             0x20000406      O        1  .bss
+	offset_data1_abs                   0x20000408      O       34  .bss
+	Release_debounce0                  0x2000042a      O       17  .bss
+	Key_Map0                           0x2000043c      O        4  .bss
+	bsae_over_f                        0x20000440      O        1  .bss
+	scan_cnt                           0x20000442      O        2  .bss
+	Press_debounce0                    0x20000444      O       17  .bss
+	offset_data0                       0x20000456      O       34  .bss
+	sampling_data1                     0x20000478      O       34  .bss
+	Key_Map2                           0x2000049c      O        4  .bss
+	Release_debounce1                  0x200004a0      O       17  .bss
+	tk_overflow_f                      0x200004b1      O        1  .bss
+	TK_Negtive_build2                  0x200004b2      O       17  .bss
+	base_update_f                      0x200004c3      O        1  .bss
+	TK_Postive_build1                  0x200004c4      O       17  .bss
+	time_cnt                           0x200004d8      O        4  .bss
+	lpt_scan_pend_cnt                  0x200004dc      O        2  .bss
+	TK_track_cnt                       0x200004de      O        1  .bss
+	Key_Map                            0x200004e0      O        4  .bss
+	baseline_data1                     0x200004e4      O       34  .bss
+	TK_Postive_build0                  0x20000506      O       17  .bss
+	sampling_data2                     0x20000518      O       34  .bss
+	offset_data1                       0x2000053a      O       34  .bss
+	TK_ovrdect_cnt                     0x2000055c      O        1  .bss
+	Press_debounce2                    0x2000055d      O       17  .bss
+	TK_Negtive_build1                  0x2000056e      O       17  .bss
+	tk_num                             0x2000057f      O        1  .bss
+	TK_Negtive_build0                  0x20000580      O       17  .bss
+	Press_debounce1                    0x20000591      O       17  .bss
+	Release_debounce2                  0x200005a2      O       17  .bss
+	r_Key_Map_Temp                     0x200005b4      O        4  .bss
+	tk_seque                           0x200005b8      O       17  .bss
+	scan_step                          0x200005c9      O        1  .bss
+	baseline_data2                     0x200005ca      O       34  .bss
+	tk_sampling_max                    0x200005ec      O       34  .bss
+	offset_data0_abs                   0x2000060e      O       34  .bss
+	offset_data2                       0x20000630      O       34  .bss
+	sampling_data0                     0x20000652      O       34  .bss
+	_ebss                              0x20000674               0  .bss
+	_end                               0x20000674               0  .bss
+	end                                0x20000674               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00004f68, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1009  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1017  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1023  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1030  .text          	sqrt.o
+    0x00000cfc   0x00000016   Code   RO       1041  .text          	_csky_case_sqi.o
+    0x00000d12   0x00000002   PAD
+    0x00000d14   0x00000014   Code   RO       1046  .text          	_csky_case_uqi.o
+    0x00000d28   0x00000038   Code   RO       1051  .text          	_fixunsdfsi.o
+    0x00000d60   0x0000033a   Code   RO       1058  .text          	_addsub_df.o
+    0x0000109a   0x00000002   PAD
+    0x0000109c   0x00000234   Code   RO       1065  .text          	_mul_df.o
+    0x000012d0   0x00000154   Code   RO       1072  .text          	_div_df.o
+    0x00001424   0x0000003c   Code   RO       1079  .text          	_gt_df.o
+    0x00001460   0x0000003c   Code   RO       1086  .text          	_ge_df.o
+    0x0000149c   0x0000003a   Code   RO       1093  .text          	_le_df.o
+    0x000014d6   0x00000002   PAD
+    0x000014d8   0x00000070   Code   RO       1100  .text          	_si_to_df.o
+    0x00001548   0x00000070   Code   RO       1107  .text          	_df_to_si.o
+    0x000015b8   0x00000054   Code   RO       1121  .text          	_usi_to_df.o
+    0x0000160c   0x00000044   Code   RO       1128  .text          	_muldi3.o
+    0x00001650   0x00000040   Code   RO       1135  .text          	_clzsi2.o
+    0x00001690   0x0000019c   Code   RO       1141  .text          	_pack_df.o
+    0x0000182c   0x000000c4   Code   RO       1148  .text          	_unpack_df.o
+    0x000018f0   0x0000008c   Code   RO       1155  .text          	_fpcmp_parts_df.o
+    0x0000197c   0x00000088   Code   RO       1176  .text          	memset_fast.o
+    0x00001a04   0x00000064   Code   RO       1181  .text          	memcpy_fast.o
+    0x00001a68   0x00000026   Code   RO       1187  .text          	strncmp.o
+    0x00001a90   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00001ac8   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00001b3c   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x00001b88   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001bb8   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c40   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x00001c68   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001ca4   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x00001cb8   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cd0   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cf0   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d0c   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d28   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d68   0x00000034   Code   RO         79  .text.EXTI_interrupt_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d9c   0x00000004   Code   RO         80  .text.GPIO_EXTI_interrupt	Obj/FWlib_apt32f102_syscon.o
+    0x00001da0   0x00000010   Code   RO         91  .text.EXI4_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001db0   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001dbc   0x0000000c   Code   RO        104  .text.SYSCON_Int_Disable	Obj/FWlib_apt32f102_syscon.o
+    0x00001dc8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001dec   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001e1c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001efc   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001f10   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x00001f20   0x0000010c   Code   RO        143  .text.GPIO_IntGroup_Set	Obj/FWlib_apt32f102_gpio.o
+    0x0000202c   0x000000fc   Code   RO        144  .text.GPIOA0_EXI_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00002128   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00002130   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x00002138   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x0000214e   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00002160   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x00002174   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x00002184   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x000021a0   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x000021a8   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x000021b2   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000021ca   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000021f6   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x000021fc   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00002210   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00002220   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x000022c0   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000022d4   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002318   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000232c   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000023e0   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x000023f0   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00002400   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x0000241c   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00002434   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x0000244c   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00002464   0x0000001c   Code   RO        440  .text.UART1_Int_Enable	Obj/FWlib_apt32f102_uart.o
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+    0x0000249c   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x00002588   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x00002598   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x000025b8   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
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+    0x00002680   0x0000002a   Code   RO        644  .text.ReadDataArry_U8	Obj/FWlib_apt32f102_ifc.o
+    0x000026ac   0x0000002c   Code   RO        690  .text.startup.main	Obj/main.o
+    0x000026d8   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x00002704   0x00000022   Code   RO        708  .text.delay_nus	Obj/mcu_initial.o
+    0x00002728   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x00002788   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x000027ec   0x0000004c   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00002838   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00002928   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x00002990   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x000029f8   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002ba4   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00002bd8   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002c58   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00002cc8   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00002d04   0x00000094   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00002d98   0x0000004c   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
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+    0x00002ecc   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00002f20   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00002f50   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x00002f80   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
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+    0x00002fe8   0x0000006c   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x00003054   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
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+    0x00003146   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
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+    0x00003176   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
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+    0x0000318e   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x00003196   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
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+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+         38          0          0          0          0   strncmp.o
+	------------------------------------------------------------
+        274          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      19544        760        156       1496     286328   Grand Totals
+      19544        760        156       1496     286328   Elf Image Totals
+      19544        760        156          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				20304 (  19.83kB)
+Total	RW	Size (RW Data + ZI Data)			1652 (  1.61kB)
+Total	ROM	Size (Code + RO Data + RW Data)		20460 (  19.98kB)
+
+======================================================================
diff --git a/Source/Lst/TRF_TM_CR_V02_20241030.asm b/Source/Lst/TRF_TM_CR_V02_20241030.asm
new file mode 100644
index 0000000..95adc40
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V02_20241030.asm
@@ -0,0 +1,13830 @@
+
+.//Obj/TRF_TM_CR_V02_20241030.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	000043da 	.long	0x000043da
+       8:	000043ca 	.long	0x000043ca
+       c:	00000184 	.long	0x00000184
+      10:	000043d2 	.long	0x000043d2
+      14:	00004390 	.long	0x00004390
+      18:	00000184 	.long	0x00000184
+      1c:	000043c2 	.long	0x000043c2
+      20:	000043ba 	.long	0x000043ba
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	000043b2 	.long	0x000043b2
+      44:	000043aa 	.long	0x000043aa
+      48:	000043a2 	.long	0x000043a2
+      4c:	0000439a 	.long	0x0000439a
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00004392 	.long	0x00004392
+      80:	000058b0 	.long	0x000058b0
+      84:	00003a70 	.long	0x00003a70
+      88:	00003b60 	.long	0x00003b60
+      8c:	00003bc8 	.long	0x00003bc8
+      90:	00003c30 	.long	0x00003c30
+      94:	00000184 	.long	0x00000184
+      98:	00003ddc 	.long	0x00003ddc
+      9c:	00004148 	.long	0x00004148
+      a0:	00004178 	.long	0x00004178
+      a4:	00003e10 	.long	0x00003e10
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00003e90 	.long	0x00003e90
+      b4:	00003f00 	.long	0x00003f00
+      b8:	00003f3c 	.long	0x00003f3c
+      bc:	00003f78 	.long	0x00003f78
+      c0:	00000184 	.long	0x00000184
+      c4:	000043ea 	.long	0x000043ea
+      c8:	00000184 	.long	0x00000184
+      cc:	0000400c 	.long	0x0000400c
+      d0:	000040f4 	.long	0x000040f4
+      d4:	000041a8 	.long	0x000041a8
+      d8:	000041f0 	.long	0x000041f0
+      dc:	0000424c 	.long	0x0000424c
+      e0:	000043e2 	.long	0x000043e2
+      e4:	00005320 	.long	0x00005320
+      e8:	000042ac 	.long	0x000042ac
+      ec:	00000184 	.long	0x00000184
+      f0:	000042e0 	.long	0x000042e0
+      f4:	0000432c 	.long	0x0000432c
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x2f14	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x3824	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00002f14 	.long	0x00002f14
+     198:	00000160 	.long	0x00000160
+     19c:	00003824 	.long	0x00003824
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x5bac	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00005bac 	.long	0x00005bac
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x5bac	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x5bac	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00005bac 	.long	0x00005bac
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x5bdc	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00005bdc 	.long	0x00005bdc
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x5bdc	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00005bdc 	.long	0x00005bdc
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x5bdc	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00005bdc 	.long	0x00005bdc
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x5bf0	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	00005bf0 	.long	0x00005bf0
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__cskyvprintfsnprintf>:
+    1964:	1422      	subi      	r14, r14, 8
+    1966:	b861      	st.w      	r3, (r14, 0x4)
+    1968:	b840      	st.w      	r2, (r14, 0x0)
+    196a:	14d0      	push      	r15
+    196c:	1421      	subi      	r14, r14, 4
+    196e:	9862      	ld.w      	r3, (r14, 0x8)
+    1970:	b860      	st.w      	r3, (r14, 0x0)
+    1972:	9840      	ld.w      	r2, (r14, 0x0)
+    1974:	1b03      	addi      	r3, r14, 12
+    1976:	e0000026 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+    197a:	1401      	addi      	r14, r14, 4
+    197c:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    1980:	1403      	addi      	r14, r14, 12
+    1982:	783c      	jmp      	r15
+
+00001984 <swrite>:
+    1984:	14d3      	push      	r4-r6, r15
+    1986:	6d4b      	mov      	r5, r2
+    1988:	9582      	ld.w      	r4, (r5, 0x8)
+    198a:	9241      	ld.w      	r2, (r2, 0x4)
+    198c:	610a      	subu      	r4, r2
+    198e:	3c40      	cmpnei      	r4, 0
+    1990:	6d87      	mov      	r6, r1
+    1992:	0c16      	bf      	0x19be	// 19be <swrite+0x3a>
+    1994:	6504      	cmphs      	r1, r4
+    1996:	0802      	bt      	0x199a	// 199a <swrite+0x16>
+    1998:	6d07      	mov      	r4, r1
+    199a:	9560      	ld.w      	r3, (r5, 0x0)
+    199c:	3b40      	cmpnei      	r3, 0
+    199e:	0c0d      	bf      	0x19b8	// 19b8 <swrite+0x34>
+    19a0:	60c8      	addu      	r3, r2
+    19a2:	6c43      	mov      	r1, r0
+    19a4:	6c93      	mov      	r2, r4
+    19a6:	6c0f      	mov      	r0, r3
+    19a8:	e000007e 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    19ac:	9500      	ld.w      	r0, (r5, 0x0)
+    19ae:	9521      	ld.w      	r1, (r5, 0x4)
+    19b0:	6010      	addu      	r0, r4
+    19b2:	6004      	addu      	r0, r1
+    19b4:	3200      	movi      	r2, 0
+    19b6:	a040      	st.b      	r2, (r0, 0x0)
+    19b8:	9561      	ld.w      	r3, (r5, 0x4)
+    19ba:	610c      	addu      	r4, r3
+    19bc:	b581      	st.w      	r4, (r5, 0x4)
+    19be:	6c1b      	mov      	r0, r6
+    19c0:	1493      	pop      	r4-r6, r15
+
+000019c2 <__cskyvprintfvsnprintf>:
+    19c2:	14d3      	push      	r4-r6, r15
+    19c4:	1425      	subi      	r14, r14, 20
+    19c6:	6d07      	mov      	r4, r1
+    19c8:	6d43      	mov      	r5, r0
+    19ca:	6c4b      	mov      	r1, r2
+    19cc:	1802      	addi      	r0, r14, 8
+    19ce:	3200      	movi      	r2, 0
+    19d0:	3c40      	cmpnei      	r4, 0
+    19d2:	b0a0      	st.w      	r5, (r0, 0x0)
+    19d4:	b041      	st.w      	r2, (r0, 0x4)
+    19d6:	0c1c      	bf      	0x1a0e	// 1a0e <__cskyvprintfvsnprintf+0x4c>
+    19d8:	5cc3      	subi      	r6, r4, 1
+    19da:	b0c2      	st.w      	r6, (r0, 0x8)
+    19dc:	b800      	st.w      	r0, (r14, 0x0)
+    19de:	6c8f      	mov      	r2, r3
+    19e0:	100e      	lrw      	r0, 0x1984	// 1a18 <__cskyvprintfvsnprintf+0x56>
+    19e2:	b801      	st.w      	r0, (r14, 0x4)
+    19e4:	6c3b      	mov      	r0, r14
+    19e6:	e00000ab 	bsr      	0x1b3c	// 1b3c <__v2_printf>
+    19ea:	3d40      	cmpnei      	r5, 0
+    19ec:	0c0f      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19ee:	3c40      	cmpnei      	r4, 0
+    19f0:	0c0d      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f2:	38df      	btsti      	r0, 31
+    19f4:	080b      	bt      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f6:	3300      	movi      	r3, 0
+    19f8:	2b00      	subi      	r3, 1
+    19fa:	64d2      	cmpne      	r4, r3
+    19fc:	0c0b      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    19fe:	6500      	cmphs      	r0, r4
+    1a00:	0c09      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    1a02:	6114      	addu      	r4, r5
+    1a04:	2c00      	subi      	r4, 1
+    1a06:	3100      	movi      	r1, 0
+    1a08:	a420      	st.b      	r1, (r4, 0x0)
+    1a0a:	1405      	addi      	r14, r14, 20
+    1a0c:	1493      	pop      	r4-r6, r15
+    1a0e:	3600      	movi      	r6, 0
+    1a10:	07e5      	br      	0x19da	// 19da <__cskyvprintfvsnprintf+0x18>
+    1a12:	5d80      	addu      	r4, r5, r0
+    1a14:	07f9      	br      	0x1a06	// 1a06 <__cskyvprintfvsnprintf+0x44>
+    1a16:	0000      	bkpt
+    1a18:	00001984 	.long	0x00001984
+
+00001a1c <__memset_fast>:
+    1a1c:	14c3      	push      	r4-r6
+    1a1e:	7444      	zextb      	r1, r1
+    1a20:	3a40      	cmpnei      	r2, 0
+    1a22:	0c1f      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a24:	6d43      	mov      	r5, r0
+    1a26:	6d03      	mov      	r4, r0
+    1a28:	3603      	movi      	r6, 3
+    1a2a:	6918      	and      	r4, r6
+    1a2c:	3c40      	cmpnei      	r4, 0
+    1a2e:	0c1a      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a30:	a520      	st.b      	r1, (r5, 0x0)
+    1a32:	2a00      	subi      	r2, 1
+    1a34:	3a40      	cmpnei      	r2, 0
+    1a36:	0c15      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a38:	2500      	addi      	r5, 1
+    1a3a:	6d17      	mov      	r4, r5
+    1a3c:	3603      	movi      	r6, 3
+    1a3e:	6918      	and      	r4, r6
+    1a40:	3c40      	cmpnei      	r4, 0
+    1a42:	0c10      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a44:	a520      	st.b      	r1, (r5, 0x0)
+    1a46:	2a00      	subi      	r2, 1
+    1a48:	3a40      	cmpnei      	r2, 0
+    1a4a:	0c0b      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a4c:	2500      	addi      	r5, 1
+    1a4e:	6d17      	mov      	r4, r5
+    1a50:	3603      	movi      	r6, 3
+    1a52:	6918      	and      	r4, r6
+    1a54:	3c40      	cmpnei      	r4, 0
+    1a56:	0c06      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a58:	a520      	st.b      	r1, (r5, 0x0)
+    1a5a:	2a00      	subi      	r2, 1
+    1a5c:	2500      	addi      	r5, 1
+    1a5e:	0402      	br      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a60:	1483      	pop      	r4-r6
+    1a62:	4168      	lsli      	r3, r1, 8
+    1a64:	6c4c      	or      	r1, r3
+    1a66:	4170      	lsli      	r3, r1, 16
+    1a68:	6c4c      	or      	r1, r3
+    1a6a:	3a2f      	cmplti      	r2, 16
+    1a6c:	0809      	bt      	0x1a7e	// 1a7e <__memset_fast+0x62>
+    1a6e:	b520      	st.w      	r1, (r5, 0x0)
+    1a70:	b521      	st.w      	r1, (r5, 0x4)
+    1a72:	b522      	st.w      	r1, (r5, 0x8)
+    1a74:	b523      	st.w      	r1, (r5, 0xc)
+    1a76:	2a0f      	subi      	r2, 16
+    1a78:	250f      	addi      	r5, 16
+    1a7a:	3a2f      	cmplti      	r2, 16
+    1a7c:	0ff9      	bf      	0x1a6e	// 1a6e <__memset_fast+0x52>
+    1a7e:	3a23      	cmplti      	r2, 4
+    1a80:	0806      	bt      	0x1a8c	// 1a8c <__memset_fast+0x70>
+    1a82:	2a03      	subi      	r2, 4
+    1a84:	b520      	st.w      	r1, (r5, 0x0)
+    1a86:	2503      	addi      	r5, 4
+    1a88:	3a23      	cmplti      	r2, 4
+    1a8a:	0ffc      	bf      	0x1a82	// 1a82 <__memset_fast+0x66>
+    1a8c:	3a40      	cmpnei      	r2, 0
+    1a8e:	0fe9      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a90:	2a00      	subi      	r2, 1
+    1a92:	a520      	st.b      	r1, (r5, 0x0)
+    1a94:	3a40      	cmpnei      	r2, 0
+    1a96:	0fe5      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a98:	2a00      	subi      	r2, 1
+    1a9a:	a521      	st.b      	r1, (r5, 0x1)
+    1a9c:	3a40      	cmpnei      	r2, 0
+    1a9e:	0fe1      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1aa0:	a522      	st.b      	r1, (r5, 0x2)
+    1aa2:	1483      	pop      	r4-r6
+
+00001aa4 <__memcpy_fast>:
+    1aa4:	14c3      	push      	r4-r6
+    1aa6:	6d83      	mov      	r6, r0
+    1aa8:	6d07      	mov      	r4, r1
+    1aaa:	6d18      	or      	r4, r6
+    1aac:	3303      	movi      	r3, 3
+    1aae:	690c      	and      	r4, r3
+    1ab0:	3c40      	cmpnei      	r4, 0
+    1ab2:	0c0b      	bf      	0x1ac8	// 1ac8 <__memcpy_fast+0x24>
+    1ab4:	3a40      	cmpnei      	r2, 0
+    1ab6:	0c08      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1ab8:	8160      	ld.b      	r3, (r1, 0x0)
+    1aba:	2100      	addi      	r1, 1
+    1abc:	2a00      	subi      	r2, 1
+    1abe:	a660      	st.b      	r3, (r6, 0x0)
+    1ac0:	2600      	addi      	r6, 1
+    1ac2:	3a40      	cmpnei      	r2, 0
+    1ac4:	0bfa      	bt      	0x1ab8	// 1ab8 <__memcpy_fast+0x14>
+    1ac6:	1483      	pop      	r4-r6
+    1ac8:	3a2f      	cmplti      	r2, 16
+    1aca:	080e      	bt      	0x1ae6	// 1ae6 <__memcpy_fast+0x42>
+    1acc:	91a0      	ld.w      	r5, (r1, 0x0)
+    1ace:	9161      	ld.w      	r3, (r1, 0x4)
+    1ad0:	9182      	ld.w      	r4, (r1, 0x8)
+    1ad2:	b6a0      	st.w      	r5, (r6, 0x0)
+    1ad4:	91a3      	ld.w      	r5, (r1, 0xc)
+    1ad6:	b661      	st.w      	r3, (r6, 0x4)
+    1ad8:	b682      	st.w      	r4, (r6, 0x8)
+    1ada:	b6a3      	st.w      	r5, (r6, 0xc)
+    1adc:	2a0f      	subi      	r2, 16
+    1ade:	210f      	addi      	r1, 16
+    1ae0:	260f      	addi      	r6, 16
+    1ae2:	3a2f      	cmplti      	r2, 16
+    1ae4:	0ff4      	bf      	0x1acc	// 1acc <__memcpy_fast+0x28>
+    1ae6:	3a23      	cmplti      	r2, 4
+    1ae8:	0808      	bt      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+    1aea:	9160      	ld.w      	r3, (r1, 0x0)
+    1aec:	2a03      	subi      	r2, 4
+    1aee:	2103      	addi      	r1, 4
+    1af0:	b660      	st.w      	r3, (r6, 0x0)
+    1af2:	2603      	addi      	r6, 4
+    1af4:	3a23      	cmplti      	r2, 4
+    1af6:	0ffa      	bf      	0x1aea	// 1aea <__memcpy_fast+0x46>
+    1af8:	3a40      	cmpnei      	r2, 0
+    1afa:	0fe6      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1afc:	8160      	ld.b      	r3, (r1, 0x0)
+    1afe:	2100      	addi      	r1, 1
+    1b00:	2a00      	subi      	r2, 1
+    1b02:	a660      	st.b      	r3, (r6, 0x0)
+    1b04:	2600      	addi      	r6, 1
+    1b06:	07f9      	br      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+
+00001b08 <PAD.1851>:
+    1b08:	14d4      	push      	r4-r7, r15
+    1b0a:	3820      	cmplti      	r0, 1
+    1b0c:	6d03      	mov      	r4, r0
+    1b0e:	6d47      	mov      	r5, r1
+    1b10:	6df7      	mov      	r7, r13
+    1b12:	080d      	bt      	0x1b2c	// 1b2c <PAD.1851+0x24>
+    1b14:	6d83      	mov      	r6, r0
+    1b16:	3e30      	cmplti      	r6, 17
+    1b18:	9700      	ld.w      	r0, (r7, 0x0)
+    1b1a:	0c0a      	bf      	0x1b2e	// 1b2e <PAD.1851+0x26>
+    1b1c:	5c63      	subi      	r3, r4, 1
+    1b1e:	4b24      	lsri      	r1, r3, 4
+    1b20:	4164      	lsli      	r3, r1, 4
+    1b22:	9040      	ld.w      	r2, (r0, 0x0)
+    1b24:	5c2d      	subu      	r1, r4, r3
+    1b26:	9081      	ld.w      	r4, (r0, 0x4)
+    1b28:	6c17      	mov      	r0, r5
+    1b2a:	7bd1      	jsr      	r4
+    1b2c:	1494      	pop      	r4-r7, r15
+    1b2e:	9040      	ld.w      	r2, (r0, 0x0)
+    1b30:	9061      	ld.w      	r3, (r0, 0x4)
+    1b32:	3110      	movi      	r1, 16
+    1b34:	6c17      	mov      	r0, r5
+    1b36:	7bcd      	jsr      	r3
+    1b38:	2e0f      	subi      	r6, 16
+    1b3a:	07ee      	br      	0x1b16	// 1b16 <PAD.1851+0xe>
+
+00001b3c <__v2_printf>:
+    1b3c:	14d4      	push      	r4-r7, r15
+    1b3e:	143c      	subi      	r14, r14, 112
+    1b40:	b826      	st.w      	r1, (r14, 0x18)
+    1b42:	1912      	addi      	r1, r14, 72
+    1b44:	1b21      	addi      	r3, r14, 132
+    1b46:	b810      	st.w      	r0, (r14, 0x40)
+    1b48:	2100      	addi      	r1, 1
+    1b4a:	3000      	movi      	r0, 0
+    1b4c:	6d4b      	mov      	r5, r2
+    1b4e:	b871      	st.w      	r3, (r14, 0x44)
+    1b50:	b80a      	st.w      	r0, (r14, 0x28)
+    1b52:	b809      	st.w      	r0, (r14, 0x24)
+    1b54:	b82d      	st.w      	r1, (r14, 0x34)
+    1b56:	9886      	ld.w      	r4, (r14, 0x18)
+    1b58:	3325      	movi      	r3, 37
+    1b5a:	84c0      	ld.b      	r6, (r4, 0x0)
+    1b5c:	3e40      	cmpnei      	r6, 0
+    1b5e:	0c03      	bf      	0x1b64	// 1b64 <__v2_printf+0x28>
+    1b60:	64da      	cmpne      	r6, r3
+    1b62:	0845      	bt      	0x1bec	// 1bec <__v2_printf+0xb0>
+    1b64:	9846      	ld.w      	r2, (r14, 0x18)
+    1b66:	5cc9      	subu      	r6, r4, r2
+    1b68:	3e40      	cmpnei      	r6, 0
+    1b6a:	0c0a      	bf      	0x1b7e	// 1b7e <__v2_printf+0x42>
+    1b6c:	9870      	ld.w      	r3, (r14, 0x40)
+    1b6e:	9340      	ld.w      	r2, (r3, 0x0)
+    1b70:	6c5b      	mov      	r1, r6
+    1b72:	9361      	ld.w      	r3, (r3, 0x4)
+    1b74:	9806      	ld.w      	r0, (r14, 0x18)
+    1b76:	7bcd      	jsr      	r3
+    1b78:	9809      	ld.w      	r0, (r14, 0x24)
+    1b7a:	6018      	addu      	r0, r6
+    1b7c:	b809      	st.w      	r0, (r14, 0x24)
+    1b7e:	8420      	ld.b      	r1, (r4, 0x0)
+    1b80:	3940      	cmpnei      	r1, 0
+    1b82:	0803      	bt      	0x1b88	// 1b88 <__v2_printf+0x4c>
+    1b84:	e8000367 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1b88:	3637      	movi      	r6, 55
+    1b8a:	1a01      	addi      	r2, r14, 4
+    1b8c:	3700      	movi      	r7, 0
+    1b8e:	6188      	addu      	r6, r2
+    1b90:	a6e0      	st.b      	r7, (r6, 0x0)
+    1b92:	3300      	movi      	r3, 0
+    1b94:	3600      	movi      	r6, 0
+    1b96:	2400      	addi      	r4, 1
+    1b98:	3000      	movi      	r0, 0
+    1b9a:	3100      	movi      	r1, 0
+    1b9c:	2e00      	subi      	r6, 1
+    1b9e:	b867      	st.w      	r3, (r14, 0x1c)
+    1ba0:	3700      	movi      	r7, 0
+    1ba2:	5c42      	addi      	r2, r4, 1
+    1ba4:	b846      	st.w      	r2, (r14, 0x18)
+    1ba6:	8480      	ld.b      	r4, (r4, 0x0)
+    1ba8:	3364      	movi      	r3, 100
+    1baa:	64d2      	cmpne      	r4, r3
+    1bac:	0d90      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1bae:	650d      	cmplt      	r3, r4
+    1bb0:	084e      	bt      	0x1c4c	// 1c4c <__v2_printf+0x110>
+    1bb2:	322e      	movi      	r2, 46
+    1bb4:	6492      	cmpne      	r4, r2
+    1bb6:	0d41      	bf      	0x1e38	// 1e38 <__v2_printf+0x2fc>
+    1bb8:	6509      	cmplt      	r2, r4
+    1bba:	0829      	bt      	0x1c0c	// 1c0c <__v2_printf+0xd0>
+    1bbc:	332a      	movi      	r3, 42
+    1bbe:	64d2      	cmpne      	r4, r3
+    1bc0:	0d31      	bf      	0x1e22	// 1e22 <__v2_printf+0x2e6>
+    1bc2:	650d      	cmplt      	r3, r4
+    1bc4:	081c      	bt      	0x1bfc	// 1bfc <__v2_printf+0xc0>
+    1bc6:	3220      	movi      	r2, 32
+    1bc8:	6492      	cmpne      	r4, r2
+    1bca:	0d25      	bf      	0x1e14	// 1e14 <__v2_printf+0x2d8>
+    1bcc:	3323      	movi      	r3, 35
+    1bce:	64d2      	cmpne      	r4, r3
+    1bd0:	0d27      	bf      	0x1e1e	// 1e1e <__v2_printf+0x2e2>
+    1bd2:	3c40      	cmpnei      	r4, 0
+    1bd4:	0803      	bt      	0x1bda	// 1bda <__v2_printf+0x9e>
+    1bd6:	e800033e 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1bda:	1e12      	addi      	r6, r14, 72
+    1bdc:	3037      	movi      	r0, 55
+    1bde:	1a01      	addi      	r2, r14, 4
+    1be0:	a680      	st.b      	r4, (r6, 0x0)
+    1be2:	6008      	addu      	r0, r2
+    1be4:	3400      	movi      	r4, 0
+    1be6:	a080      	st.b      	r4, (r0, 0x0)
+    1be8:	b8a5      	st.w      	r5, (r14, 0x14)
+    1bea:	042c      	br      	0x1c42	// 1c42 <__v2_printf+0x106>
+    1bec:	2400      	addi      	r4, 1
+    1bee:	07b6      	br      	0x1b5a	// 1b5a <__v2_printf+0x1e>
+    1bf0:	3001      	movi      	r0, 1
+    1bf2:	312b      	movi      	r1, 43
+    1bf4:	9886      	ld.w      	r4, (r14, 0x18)
+    1bf6:	07d6      	br      	0x1ba2	// 1ba2 <__v2_printf+0x66>
+    1bf8:	6d4f      	mov      	r5, r3
+    1bfa:	07fd      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1bfc:	322b      	movi      	r2, 43
+    1bfe:	6492      	cmpne      	r4, r2
+    1c00:	0ff8      	bf      	0x1bf0	// 1bf0 <__v2_printf+0xb4>
+    1c02:	332d      	movi      	r3, 45
+    1c04:	64d2      	cmpne      	r4, r3
+    1c06:	0be6      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c08:	3fa2      	bseti      	r7, 2
+    1c0a:	07f5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c0c:	3339      	movi      	r3, 57
+    1c0e:	650d      	cmplt      	r3, r4
+    1c10:	0809      	bt      	0x1c22	// 1c22 <__v2_printf+0xe6>
+    1c12:	3231      	movi      	r2, 49
+    1c14:	6491      	cmplt      	r4, r2
+    1c16:	0d34      	bf      	0x1e7e	// 1e7e <__v2_printf+0x342>
+    1c18:	3330      	movi      	r3, 48
+    1c1a:	64d2      	cmpne      	r4, r3
+    1c1c:	0bdb      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c1e:	3fa7      	bseti      	r7, 7
+    1c20:	07ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c22:	3258      	movi      	r2, 88
+    1c24:	6492      	cmpne      	r4, r2
+    1c26:	0cd3      	bf      	0x1dcc	// 1dcc <__v2_printf+0x290>
+    1c28:	3063      	movi      	r0, 99
+    1c2a:	6412      	cmpne      	r4, r0
+    1c2c:	0bd3      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c2e:	3337      	movi      	r3, 55
+    1c30:	1a01      	addi      	r2, r14, 4
+    1c32:	5d2e      	addi      	r1, r5, 4
+    1c34:	85c0      	ld.b      	r6, (r5, 0x0)
+    1c36:	3400      	movi      	r4, 0
+    1c38:	1d12      	addi      	r5, r14, 72
+    1c3a:	60c8      	addu      	r3, r2
+    1c3c:	b825      	st.w      	r1, (r14, 0x14)
+    1c3e:	a5c0      	st.b      	r6, (r5, 0x0)
+    1c40:	a380      	st.b      	r4, (r3, 0x0)
+    1c42:	3601      	movi      	r6, 1
+    1c44:	3500      	movi      	r5, 0
+    1c46:	1c12      	addi      	r4, r14, 72
+    1c48:	e8000295 	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1c4c:	336d      	movi      	r3, 109
+    1c4e:	64d2      	cmpne      	r4, r3
+    1c50:	0d2d      	bf      	0x1eaa	// 1eaa <__v2_printf+0x36e>
+    1c52:	650d      	cmplt      	r3, r4
+    1c54:	0883      	bt      	0x1d5a	// 1d5a <__v2_printf+0x21e>
+    1c56:	3268      	movi      	r2, 104
+    1c58:	6492      	cmpne      	r4, r2
+    1c5a:	0d24      	bf      	0x1ea2	// 1ea2 <__v2_printf+0x366>
+    1c5c:	6509      	cmplt      	r2, r4
+    1c5e:	086f      	bt      	0x1d3c	// 1d3c <__v2_printf+0x200>
+    1c60:	3366      	movi      	r3, 102
+    1c62:	64d1      	cmplt      	r4, r3
+    1c64:	0bb7      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c66:	3840      	cmpnei      	r0, 0
+    1c68:	0c05      	bf      	0x1c72	// 1c72 <__v2_printf+0x136>
+    1c6a:	3037      	movi      	r0, 55
+    1c6c:	1a01      	addi      	r2, r14, 4
+    1c6e:	6008      	addu      	r0, r2
+    1c70:	a020      	st.b      	r1, (r0, 0x0)
+    1c72:	5d3e      	addi      	r1, r5, 8
+    1c74:	b825      	st.w      	r1, (r14, 0x14)
+    1c76:	9500      	ld.w      	r0, (r5, 0x0)
+    1c78:	9521      	ld.w      	r1, (r5, 0x4)
+    1c7a:	98a7      	ld.w      	r5, (r14, 0x1c)
+    1c7c:	3d40      	cmpnei      	r5, 0
+    1c7e:	0803      	bt      	0x1c84	// 1c84 <__v2_printf+0x148>
+    1c80:	3301      	movi      	r3, 1
+    1c82:	b867      	st.w      	r3, (r14, 0x1c)
+    1c84:	3200      	movi      	r2, 0
+    1c86:	2a00      	subi      	r2, 1
+    1c88:	649a      	cmpne      	r6, r2
+    1c8a:	0d58      	bf      	0x1f3a	// 1f3a <__v2_printf+0x3fe>
+    1c8c:	6d5b      	mov      	r5, r6
+    1c8e:	9867      	ld.w      	r3, (r14, 0x1c)
+    1c90:	b860      	st.w      	r3, (r14, 0x0)
+    1c92:	b8a1      	st.w      	r5, (r14, 0x4)
+    1c94:	3328      	movi      	r3, 40
+    1c96:	1a12      	addi      	r2, r14, 72
+    1c98:	e000069d 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    1c9c:	3100      	movi      	r1, 0
+    1c9e:	2900      	subi      	r1, 1
+    1ca0:	645a      	cmpne      	r6, r1
+    1ca2:	b808      	st.w      	r0, (r14, 0x20)
+    1ca4:	0c1a      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1ca6:	312e      	movi      	r1, 46
+    1ca8:	980d      	ld.w      	r0, (r14, 0x34)
+    1caa:	e00008c9 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cae:	3840      	cmpnei      	r0, 0
+    1cb0:	98c8      	ld.w      	r6, (r14, 0x20)
+    1cb2:	0d48      	bf      	0x1f42	// 1f42 <__v2_printf+0x406>
+    1cb4:	3d40      	cmpnei      	r5, 0
+    1cb6:	0805      	bt      	0x1cc0	// 1cc0 <__v2_printf+0x184>
+    1cb8:	3101      	movi      	r1, 1
+    1cba:	685c      	and      	r1, r7
+    1cbc:	3940      	cmpnei      	r1, 0
+    1cbe:	0d40      	bf      	0x1f3e	// 1f3e <__v2_printf+0x402>
+    1cc0:	58c2      	addi      	r6, r0, 1
+    1cc2:	2500      	addi      	r5, 1
+    1cc4:	5d59      	subu      	r2, r5, r6
+    1cc6:	6080      	addu      	r2, r0
+    1cc8:	3a20      	cmplti      	r2, 1
+    1cca:	0805      	bt      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1ccc:	2600      	addi      	r6, 1
+    1cce:	8660      	ld.b      	r3, (r6, 0x0)
+    1cd0:	3b40      	cmpnei      	r3, 0
+    1cd2:	0bf9      	bt      	0x1cc4	// 1cc4 <__v2_printf+0x188>
+    1cd4:	3500      	movi      	r5, 0
+    1cd6:	a6a0      	st.b      	r5, (r6, 0x0)
+    1cd8:	3067      	movi      	r0, 103
+    1cda:	6412      	cmpne      	r4, r0
+    1cdc:	0822      	bt      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cde:	312e      	movi      	r1, 46
+    1ce0:	1812      	addi      	r0, r14, 72
+    1ce2:	e00008ad 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1ce6:	3840      	cmpnei      	r0, 0
+    1ce8:	6d03      	mov      	r4, r0
+    1cea:	0c1b      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cec:	3165      	movi      	r1, 101
+    1cee:	e00008a7 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cf2:	6c43      	mov      	r1, r0
+    1cf4:	84c0      	ld.b      	r6, (r4, 0x0)
+    1cf6:	3e40      	cmpnei      	r6, 0
+    1cf8:	0930      	bt      	0x1f58	// 1f58 <__v2_printf+0x41c>
+    1cfa:	3940      	cmpnei      	r1, 0
+    1cfc:	0c02      	bf      	0x1d00	// 1d00 <__v2_printf+0x1c4>
+    1cfe:	6d07      	mov      	r4, r1
+    1d00:	3630      	movi      	r6, 48
+    1d02:	5c63      	subi      	r3, r4, 1
+    1d04:	8340      	ld.b      	r2, (r3, 0x0)
+    1d06:	658a      	cmpne      	r2, r6
+    1d08:	0d2a      	bf      	0x1f5c	// 1f5c <__v2_printf+0x420>
+    1d0a:	352e      	movi      	r5, 46
+    1d0c:	654a      	cmpne      	r2, r5
+    1d0e:	0802      	bt      	0x1d12	// 1d12 <__v2_printf+0x1d6>
+    1d10:	6d0f      	mov      	r4, r3
+    1d12:	3000      	movi      	r0, 0
+    1d14:	3940      	cmpnei      	r1, 0
+    1d16:	a400      	st.b      	r0, (r4, 0x0)
+    1d18:	0c04      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1d1a:	6c13      	mov      	r0, r4
+    1d1c:	e0000838 	bsr      	0x2d8c	// 2d8c <__strcpy_fast>
+    1d20:	1912      	addi      	r1, r14, 72
+    1d22:	81c0      	ld.b      	r6, (r1, 0x0)
+    1d24:	332d      	movi      	r3, 45
+    1d26:	64da      	cmpne      	r6, r3
+    1d28:	0c02      	bf      	0x1d2c	// 1d2c <__v2_printf+0x1f0>
+    1d2a:	05ef      	br      	0x2108	// 2108 <__v2_printf+0x5cc>
+    1d2c:	3437      	movi      	r4, 55
+    1d2e:	1801      	addi      	r0, r14, 4
+    1d30:	352d      	movi      	r5, 45
+    1d32:	6100      	addu      	r4, r0
+    1d34:	a4a0      	st.b      	r5, (r4, 0x0)
+    1d36:	1912      	addi      	r1, r14, 72
+    1d38:	5982      	addi      	r4, r1, 1
+    1d3a:	05ec      	br      	0x2112	// 2112 <__v2_printf+0x5d6>
+    1d3c:	3369      	movi      	r3, 105
+    1d3e:	64d2      	cmpne      	r4, r3
+    1d40:	0cc6      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1d42:	326c      	movi      	r2, 108
+    1d44:	6492      	cmpne      	r4, r2
+    1d46:	0b46      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d48:	9866      	ld.w      	r3, (r14, 0x18)
+    1d4a:	8340      	ld.b      	r2, (r3, 0x0)
+    1d4c:	650a      	cmpne      	r2, r4
+    1d4e:	08ac      	bt      	0x1ea6	// 1ea6 <__v2_printf+0x36a>
+    1d50:	9886      	ld.w      	r4, (r14, 0x18)
+    1d52:	2400      	addi      	r4, 1
+    1d54:	b886      	st.w      	r4, (r14, 0x18)
+    1d56:	3fa5      	bseti      	r7, 5
+    1d58:	074e      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1d5a:	3371      	movi      	r3, 113
+    1d5c:	64d2      	cmpne      	r4, r3
+    1d5e:	0ffc      	bf      	0x1d56	// 1d56 <__v2_printf+0x21a>
+    1d60:	650d      	cmplt      	r3, r4
+    1d62:	081a      	bt      	0x1d96	// 1d96 <__v2_printf+0x25a>
+    1d64:	306f      	movi      	r0, 111
+    1d66:	6412      	cmpne      	r4, r0
+    1d68:	0cfc      	bf      	0x1f60	// 1f60 <__v2_printf+0x424>
+    1d6a:	3170      	movi      	r1, 112
+    1d6c:	6452      	cmpne      	r4, r1
+    1d6e:	0b32      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d70:	5d4e      	addi      	r2, r5, 4
+    1d72:	3400      	movi      	r4, 0
+    1d74:	95a0      	ld.w      	r5, (r5, 0x0)
+    1d76:	b845      	st.w      	r2, (r14, 0x14)
+    1d78:	1901      	addi      	r1, r14, 4
+    1d7a:	3239      	movi      	r2, 57
+    1d7c:	b8a3      	st.w      	r5, (r14, 0xc)
+    1d7e:	b884      	st.w      	r4, (r14, 0x10)
+    1d80:	3330      	movi      	r3, 48
+    1d82:	180f      	addi      	r0, r14, 60
+    1d84:	3578      	movi      	r5, 120
+    1d86:	6084      	addu      	r2, r1
+    1d88:	0195      	lrw      	r4, 0x60da	// 20b0 <__v2_printf+0x574>
+    1d8a:	3fa1      	bseti      	r7, 1
+    1d8c:	a060      	st.b      	r3, (r0, 0x0)
+    1d8e:	a2a0      	st.b      	r5, (r2, 0x0)
+    1d90:	b88a      	st.w      	r4, (r14, 0x28)
+    1d92:	3402      	movi      	r4, 2
+    1d94:	04f1      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1d96:	3275      	movi      	r2, 117
+    1d98:	6492      	cmpne      	r4, r2
+    1d9a:	0d28      	bf      	0x1fea	// 1fea <__v2_printf+0x4ae>
+    1d9c:	3378      	movi      	r3, 120
+    1d9e:	64d2      	cmpne      	r4, r3
+    1da0:	0d44      	bf      	0x2028	// 2028 <__v2_printf+0x4ec>
+    1da2:	3173      	movi      	r1, 115
+    1da4:	6452      	cmpne      	r4, r1
+    1da6:	0b16      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1da8:	3200      	movi      	r2, 0
+    1daa:	3037      	movi      	r0, 55
+    1dac:	1901      	addi      	r1, r14, 4
+    1dae:	2a00      	subi      	r2, 1
+    1db0:	5d6e      	addi      	r3, r5, 4
+    1db2:	9580      	ld.w      	r4, (r5, 0x0)
+    1db4:	6004      	addu      	r0, r1
+    1db6:	3500      	movi      	r5, 0
+    1db8:	649a      	cmpne      	r6, r2
+    1dba:	b865      	st.w      	r3, (r14, 0x14)
+    1dbc:	a0a0      	st.b      	r5, (r0, 0x0)
+    1dbe:	090b      	bt      	0x1fd4	// 1fd4 <__v2_printf+0x498>
+    1dc0:	6cd3      	mov      	r3, r4
+    1dc2:	83c0      	ld.b      	r6, (r3, 0x0)
+    1dc4:	3e40      	cmpnei      	r6, 0
+    1dc6:	0910      	bt      	0x1fe6	// 1fe6 <__v2_printf+0x4aa>
+    1dc8:	5bd1      	subu      	r6, r3, r4
+    1dca:	047f      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1dcc:	3840      	cmpnei      	r0, 0
+    1dce:	0c05      	bf      	0x1dd8	// 1dd8 <__v2_printf+0x29c>
+    1dd0:	3037      	movi      	r0, 55
+    1dd2:	1b01      	addi      	r3, r14, 4
+    1dd4:	600c      	addu      	r0, r3
+    1dd6:	a020      	st.b      	r1, (r0, 0x0)
+    1dd8:	0228      	lrw      	r1, 0x60c9	// 20b4 <__v2_printf+0x578>
+    1dda:	3020      	movi      	r0, 32
+    1ddc:	681c      	and      	r0, r7
+    1dde:	3840      	cmpnei      	r0, 0
+    1de0:	b82a      	st.w      	r1, (r14, 0x28)
+    1de2:	0d2b      	bf      	0x2038	// 2038 <__v2_printf+0x4fc>
+    1de4:	5d5e      	addi      	r2, r5, 8
+    1de6:	b845      	st.w      	r2, (r14, 0x14)
+    1de8:	9520      	ld.w      	r1, (r5, 0x0)
+    1dea:	9541      	ld.w      	r2, (r5, 0x4)
+    1dec:	b823      	st.w      	r1, (r14, 0xc)
+    1dee:	b844      	st.w      	r2, (r14, 0x10)
+    1df0:	3001      	movi      	r0, 1
+    1df2:	681c      	and      	r0, r7
+    1df4:	3840      	cmpnei      	r0, 0
+    1df6:	0fce      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1df8:	98a3      	ld.w      	r5, (r14, 0xc)
+    1dfa:	9864      	ld.w      	r3, (r14, 0x10)
+    1dfc:	6d4c      	or      	r5, r3
+    1dfe:	3d40      	cmpnei      	r5, 0
+    1e00:	0fc9      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e02:	3039      	movi      	r0, 57
+    1e04:	1d01      	addi      	r5, r14, 4
+    1e06:	3130      	movi      	r1, 48
+    1e08:	1a0f      	addi      	r2, r14, 60
+    1e0a:	6014      	addu      	r0, r5
+    1e0c:	a220      	st.b      	r1, (r2, 0x0)
+    1e0e:	a080      	st.b      	r4, (r0, 0x0)
+    1e10:	3fa1      	bseti      	r7, 1
+    1e12:	07c0      	br      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e14:	3940      	cmpnei      	r1, 0
+    1e16:	0aef      	bt      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e18:	3001      	movi      	r0, 1
+    1e1a:	3120      	movi      	r1, 32
+    1e1c:	06ec      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e1e:	3fa0      	bseti      	r7, 0
+    1e20:	06ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e22:	9580      	ld.w      	r4, (r5, 0x0)
+    1e24:	3cdf      	btsti      	r4, 31
+    1e26:	5d6e      	addi      	r3, r5, 4
+    1e28:	b887      	st.w      	r4, (r14, 0x1c)
+    1e2a:	0ee7      	bf      	0x1bf8	// 1bf8 <__v2_printf+0xbc>
+    1e2c:	9847      	ld.w      	r2, (r14, 0x1c)
+    1e2e:	3500      	movi      	r5, 0
+    1e30:	614a      	subu      	r5, r2
+    1e32:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1e34:	6d4f      	mov      	r5, r3
+    1e36:	06e9      	br      	0x1c08	// 1c08 <__v2_printf+0xcc>
+    1e38:	98c6      	ld.w      	r6, (r14, 0x18)
+    1e3a:	8680      	ld.b      	r4, (r6, 0x0)
+    1e3c:	322a      	movi      	r2, 42
+    1e3e:	9866      	ld.w      	r3, (r14, 0x18)
+    1e40:	6492      	cmpne      	r4, r2
+    1e42:	2300      	addi      	r3, 1
+    1e44:	0c0b      	bf      	0x1e5a	// 1e5a <__v2_printf+0x31e>
+    1e46:	b865      	st.w      	r3, (r14, 0x14)
+    1e48:	3600      	movi      	r6, 0
+    1e4a:	3300      	movi      	r3, 0
+    1e4c:	2b2f      	subi      	r3, 48
+    1e4e:	60d0      	addu      	r3, r4
+    1e50:	3b09      	cmphsi      	r3, 10
+    1e52:	9845      	ld.w      	r2, (r14, 0x14)
+    1e54:	0c0c      	bf      	0x1e6c	// 1e6c <__v2_printf+0x330>
+    1e56:	b846      	st.w      	r2, (r14, 0x18)
+    1e58:	06a8      	br      	0x1ba8	// 1ba8 <__v2_printf+0x6c>
+    1e5a:	95c0      	ld.w      	r6, (r5, 0x0)
+    1e5c:	3edf      	btsti      	r6, 31
+    1e5e:	5d8e      	addi      	r4, r5, 4
+    1e60:	0c03      	bf      	0x1e66	// 1e66 <__v2_printf+0x32a>
+    1e62:	3600      	movi      	r6, 0
+    1e64:	2e00      	subi      	r6, 1
+    1e66:	6d53      	mov      	r5, r4
+    1e68:	b866      	st.w      	r3, (r14, 0x18)
+    1e6a:	06c5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e6c:	340a      	movi      	r4, 10
+    1e6e:	7d18      	mult      	r4, r6
+    1e70:	9845      	ld.w      	r2, (r14, 0x14)
+    1e72:	6d8f      	mov      	r6, r3
+    1e74:	6190      	addu      	r6, r4
+    1e76:	8280      	ld.b      	r4, (r2, 0x0)
+    1e78:	2200      	addi      	r2, 1
+    1e7a:	b845      	st.w      	r2, (r14, 0x14)
+    1e7c:	07e7      	br      	0x1e4a	// 1e4a <__v2_printf+0x30e>
+    1e7e:	3200      	movi      	r2, 0
+    1e80:	b847      	st.w      	r2, (r14, 0x1c)
+    1e82:	9867      	ld.w      	r3, (r14, 0x1c)
+    1e84:	320a      	movi      	r2, 10
+    1e86:	7cc8      	mult      	r3, r2
+    1e88:	2c2f      	subi      	r4, 48
+    1e8a:	610c      	addu      	r4, r3
+    1e8c:	b887      	st.w      	r4, (r14, 0x1c)
+    1e8e:	3300      	movi      	r3, 0
+    1e90:	9886      	ld.w      	r4, (r14, 0x18)
+    1e92:	5c42      	addi      	r2, r4, 1
+    1e94:	2b2f      	subi      	r3, 48
+    1e96:	8480      	ld.b      	r4, (r4, 0x0)
+    1e98:	60d0      	addu      	r3, r4
+    1e9a:	3b09      	cmphsi      	r3, 10
+    1e9c:	b846      	st.w      	r2, (r14, 0x18)
+    1e9e:	0ff2      	bf      	0x1e82	// 1e82 <__v2_printf+0x346>
+    1ea0:	07db      	br      	0x1e56	// 1e56 <__v2_printf+0x31a>
+    1ea2:	3fa6      	bseti      	r7, 6
+    1ea4:	06a8      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1ea6:	3fa4      	bseti      	r7, 4
+    1ea8:	06a6      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1eaa:	3840      	cmpnei      	r0, 0
+    1eac:	0c05      	bf      	0x1eb6	// 1eb6 <__v2_printf+0x37a>
+    1eae:	3637      	movi      	r6, 55
+    1eb0:	1b01      	addi      	r3, r14, 4
+    1eb2:	618c      	addu      	r6, r3
+    1eb4:	a620      	st.b      	r1, (r6, 0x0)
+    1eb6:	033e      	lrw      	r1, 0x20000768	// 20b8 <__v2_printf+0x57c>
+    1eb8:	9100      	ld.w      	r0, (r1, 0x0)
+    1eba:	e00007cb 	bsr      	0x2e50	// 2e50 <__GI_strerror>
+    1ebe:	6d03      	mov      	r4, r0
+    1ec0:	e000073c 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    1ec4:	6d83      	mov      	r6, r0
+    1ec6:	b8a5      	st.w      	r5, (r14, 0x14)
+    1ec8:	3500      	movi      	r5, 0
+    1eca:	0554      	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1ecc:	3840      	cmpnei      	r0, 0
+    1ece:	0c05      	bf      	0x1ed8	// 1ed8 <__v2_printf+0x39c>
+    1ed0:	3037      	movi      	r0, 55
+    1ed2:	1a01      	addi      	r2, r14, 4
+    1ed4:	6008      	addu      	r0, r2
+    1ed6:	a020      	st.b      	r1, (r0, 0x0)
+    1ed8:	3420      	movi      	r4, 32
+    1eda:	691c      	and      	r4, r7
+    1edc:	3c40      	cmpnei      	r4, 0
+    1ede:	0c1a      	bf      	0x1f12	// 1f12 <__v2_printf+0x3d6>
+    1ee0:	5d7e      	addi      	r3, r5, 8
+    1ee2:	9520      	ld.w      	r1, (r5, 0x0)
+    1ee4:	9541      	ld.w      	r2, (r5, 0x4)
+    1ee6:	b865      	st.w      	r3, (r14, 0x14)
+    1ee8:	b823      	st.w      	r1, (r14, 0xc)
+    1eea:	b844      	st.w      	r2, (r14, 0x10)
+    1eec:	9804      	ld.w      	r0, (r14, 0x10)
+    1eee:	38df      	btsti      	r0, 31
+    1ef0:	0c0f      	bf      	0x1f0e	// 1f0e <__v2_printf+0x3d2>
+    1ef2:	9883      	ld.w      	r4, (r14, 0xc)
+    1ef4:	98a4      	ld.w      	r5, (r14, 0x10)
+    1ef6:	3200      	movi      	r2, 0
+    1ef8:	3300      	movi      	r3, 0
+    1efa:	6488      	cmphs      	r2, r2
+    1efc:	6093      	subc      	r2, r4
+    1efe:	60d7      	subc      	r3, r5
+    1f00:	b843      	st.w      	r2, (r14, 0xc)
+    1f02:	b864      	st.w      	r3, (r14, 0x10)
+    1f04:	3237      	movi      	r2, 55
+    1f06:	1b01      	addi      	r3, r14, 4
+    1f08:	352d      	movi      	r5, 45
+    1f0a:	608c      	addu      	r2, r3
+    1f0c:	a2a0      	st.b      	r5, (r2, 0x0)
+    1f0e:	3401      	movi      	r4, 1
+    1f10:	0438      	br      	0x1f80	// 1f80 <__v2_printf+0x444>
+    1f12:	3310      	movi      	r3, 16
+    1f14:	68dc      	and      	r3, r7
+    1f16:	3b40      	cmpnei      	r3, 0
+    1f18:	0c08      	bf      	0x1f28	// 1f28 <__v2_printf+0x3ec>
+    1f1a:	5d4e      	addi      	r2, r5, 4
+    1f1c:	b845      	st.w      	r2, (r14, 0x14)
+    1f1e:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f20:	559f      	asri      	r4, r5, 31
+    1f22:	b8a3      	st.w      	r5, (r14, 0xc)
+    1f24:	b884      	st.w      	r4, (r14, 0x10)
+    1f26:	07e3      	br      	0x1eec	// 1eec <__v2_printf+0x3b0>
+    1f28:	3140      	movi      	r1, 64
+    1f2a:	685c      	and      	r1, r7
+    1f2c:	5d0e      	addi      	r0, r5, 4
+    1f2e:	3940      	cmpnei      	r1, 0
+    1f30:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f32:	b805      	st.w      	r0, (r14, 0x14)
+    1f34:	0ff6      	bf      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f36:	7557      	sexth      	r5, r5
+    1f38:	07f4      	br      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f3a:	3506      	movi      	r5, 6
+    1f3c:	06a9      	br      	0x1c8e	// 1c8e <__v2_printf+0x152>
+    1f3e:	6d83      	mov      	r6, r0
+    1f40:	06ca      	br      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1f42:	3201      	movi      	r2, 1
+    1f44:	689c      	and      	r2, r7
+    1f46:	3a40      	cmpnei      	r2, 0
+    1f48:	0ec8      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f4a:	1d12      	addi      	r5, r14, 72
+    1f4c:	6158      	addu      	r5, r6
+    1f4e:	332e      	movi      	r3, 46
+    1f50:	3000      	movi      	r0, 0
+    1f52:	a560      	st.b      	r3, (r5, 0x0)
+    1f54:	a501      	st.b      	r0, (r5, 0x1)
+    1f56:	06c1      	br      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f58:	2400      	addi      	r4, 1
+    1f5a:	06cd      	br      	0x1cf4	// 1cf4 <__v2_printf+0x1b8>
+    1f5c:	6d0f      	mov      	r4, r3
+    1f5e:	06d2      	br      	0x1d02	// 1d02 <__v2_printf+0x1c6>
+    1f60:	3320      	movi      	r3, 32
+    1f62:	68dc      	and      	r3, r7
+    1f64:	3b40      	cmpnei      	r3, 0
+    1f66:	0c24      	bf      	0x1fae	// 1fae <__v2_printf+0x472>
+    1f68:	5d7e      	addi      	r3, r5, 8
+    1f6a:	9500      	ld.w      	r0, (r5, 0x0)
+    1f6c:	9521      	ld.w      	r1, (r5, 0x4)
+    1f6e:	b865      	st.w      	r3, (r14, 0x14)
+    1f70:	b803      	st.w      	r0, (r14, 0xc)
+    1f72:	b824      	st.w      	r1, (r14, 0x10)
+    1f74:	3400      	movi      	r4, 0
+    1f76:	3537      	movi      	r5, 55
+    1f78:	1801      	addi      	r0, r14, 4
+    1f7a:	3200      	movi      	r2, 0
+    1f7c:	6140      	addu      	r5, r0
+    1f7e:	a540      	st.b      	r2, (r5, 0x0)
+    1f80:	3100      	movi      	r1, 0
+    1f82:	2900      	subi      	r1, 1
+    1f84:	9803      	ld.w      	r0, (r14, 0xc)
+    1f86:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f88:	645a      	cmpne      	r6, r1
+    1f8a:	6c14      	or      	r0, r5
+    1f8c:	0cc8      	bf      	0x211c	// 211c <__v2_printf+0x5e0>
+    1f8e:	6c9f      	mov      	r2, r7
+    1f90:	3a87      	bclri      	r2, 7
+    1f92:	3840      	cmpnei      	r0, 0
+    1f94:	b848      	st.w      	r2, (r14, 0x20)
+    1f96:	08c6      	bt      	0x2122	// 2122 <__v2_printf+0x5e6>
+    1f98:	3e40      	cmpnei      	r6, 0
+    1f9a:	0cac      	bf      	0x20f2	// 20f2 <__v2_printf+0x5b6>
+    1f9c:	3c41      	cmpnei      	r4, 1
+    1f9e:	0c68      	bf      	0x206e	// 206e <__v2_printf+0x532>
+    1fa0:	3c42      	cmpnei      	r4, 2
+    1fa2:	0c8d      	bf      	0x20bc	// 20bc <__v2_printf+0x580>
+    1fa4:	3300      	movi      	r3, 0
+    1fa6:	3400      	movi      	r4, 0
+    1fa8:	b863      	st.w      	r3, (r14, 0xc)
+    1faa:	b884      	st.w      	r4, (r14, 0x10)
+    1fac:	04bf      	br      	0x212a	// 212a <__v2_printf+0x5ee>
+    1fae:	3010      	movi      	r0, 16
+    1fb0:	681c      	and      	r0, r7
+    1fb2:	3840      	cmpnei      	r0, 0
+    1fb4:	0c05      	bf      	0x1fbe	// 1fbe <__v2_printf+0x482>
+    1fb6:	5d8e      	addi      	r4, r5, 4
+    1fb8:	b885      	st.w      	r4, (r14, 0x14)
+    1fba:	95a0      	ld.w      	r5, (r5, 0x0)
+    1fbc:	0408      	br      	0x1fcc	// 1fcc <__v2_printf+0x490>
+    1fbe:	3240      	movi      	r2, 64
+    1fc0:	689c      	and      	r2, r7
+    1fc2:	5d2e      	addi      	r1, r5, 4
+    1fc4:	3a40      	cmpnei      	r2, 0
+    1fc6:	b825      	st.w      	r1, (r14, 0x14)
+    1fc8:	0ff9      	bf      	0x1fba	// 1fba <__v2_printf+0x47e>
+    1fca:	8da0      	ld.h      	r5, (r5, 0x0)
+    1fcc:	3400      	movi      	r4, 0
+    1fce:	b8a3      	st.w      	r5, (r14, 0xc)
+    1fd0:	b884      	st.w      	r4, (r14, 0x10)
+    1fd2:	07d2      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1fd4:	5cb8      	addu      	r5, r4, r6
+    1fd6:	6cd3      	mov      	r3, r4
+    1fd8:	654e      	cmpne      	r3, r5
+    1fda:	0f77      	bf      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1fdc:	8300      	ld.b      	r0, (r3, 0x0)
+    1fde:	3840      	cmpnei      	r0, 0
+    1fe0:	0ef4      	bf      	0x1dc8	// 1dc8 <__v2_printf+0x28c>
+    1fe2:	2300      	addi      	r3, 1
+    1fe4:	07fa      	br      	0x1fd8	// 1fd8 <__v2_printf+0x49c>
+    1fe6:	2300      	addi      	r3, 1
+    1fe8:	06ed      	br      	0x1dc2	// 1dc2 <__v2_printf+0x286>
+    1fea:	3420      	movi      	r4, 32
+    1fec:	691c      	and      	r4, r7
+    1fee:	3c40      	cmpnei      	r4, 0
+    1ff0:	0c09      	bf      	0x2002	// 2002 <__v2_printf+0x4c6>
+    1ff2:	5d7e      	addi      	r3, r5, 8
+    1ff4:	9520      	ld.w      	r1, (r5, 0x0)
+    1ff6:	9541      	ld.w      	r2, (r5, 0x4)
+    1ff8:	b865      	st.w      	r3, (r14, 0x14)
+    1ffa:	b823      	st.w      	r1, (r14, 0xc)
+    1ffc:	b844      	st.w      	r2, (r14, 0x10)
+    1ffe:	3401      	movi      	r4, 1
+    2000:	07bb      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    2002:	3310      	movi      	r3, 16
+    2004:	68dc      	and      	r3, r7
+    2006:	3b40      	cmpnei      	r3, 0
+    2008:	0c05      	bf      	0x2012	// 2012 <__v2_printf+0x4d6>
+    200a:	5d0e      	addi      	r0, r5, 4
+    200c:	b805      	st.w      	r0, (r14, 0x14)
+    200e:	95a0      	ld.w      	r5, (r5, 0x0)
+    2010:	0408      	br      	0x2020	// 2020 <__v2_printf+0x4e4>
+    2012:	3140      	movi      	r1, 64
+    2014:	685c      	and      	r1, r7
+    2016:	5d4e      	addi      	r2, r5, 4
+    2018:	3940      	cmpnei      	r1, 0
+    201a:	b845      	st.w      	r2, (r14, 0x14)
+    201c:	0ff9      	bf      	0x200e	// 200e <__v2_printf+0x4d2>
+    201e:	8da0      	ld.h      	r5, (r5, 0x0)
+    2020:	3400      	movi      	r4, 0
+    2022:	b8a3      	st.w      	r5, (r14, 0xc)
+    2024:	b884      	st.w      	r4, (r14, 0x10)
+    2026:	07ec      	br      	0x1ffe	// 1ffe <__v2_printf+0x4c2>
+    2028:	3840      	cmpnei      	r0, 0
+    202a:	0c05      	bf      	0x2034	// 2034 <__v2_printf+0x4f8>
+    202c:	3337      	movi      	r3, 55
+    202e:	1a01      	addi      	r2, r14, 4
+    2030:	60c8      	addu      	r3, r2
+    2032:	a320      	st.b      	r1, (r3, 0x0)
+    2034:	103f      	lrw      	r1, 0x60da	// 20b0 <__v2_printf+0x574>
+    2036:	06d2      	br      	0x1dda	// 1dda <__v2_printf+0x29e>
+    2038:	3310      	movi      	r3, 16
+    203a:	68dc      	and      	r3, r7
+    203c:	3b40      	cmpnei      	r3, 0
+    203e:	0c05      	bf      	0x2048	// 2048 <__v2_printf+0x50c>
+    2040:	5d0e      	addi      	r0, r5, 4
+    2042:	b805      	st.w      	r0, (r14, 0x14)
+    2044:	95a0      	ld.w      	r5, (r5, 0x0)
+    2046:	0408      	br      	0x2056	// 2056 <__v2_printf+0x51a>
+    2048:	3240      	movi      	r2, 64
+    204a:	689c      	and      	r2, r7
+    204c:	5d2e      	addi      	r1, r5, 4
+    204e:	3a40      	cmpnei      	r2, 0
+    2050:	b825      	st.w      	r1, (r14, 0x14)
+    2052:	0ff9      	bf      	0x2044	// 2044 <__v2_printf+0x508>
+    2054:	8da0      	ld.h      	r5, (r5, 0x0)
+    2056:	3300      	movi      	r3, 0
+    2058:	b8a3      	st.w      	r5, (r14, 0xc)
+    205a:	b864      	st.w      	r3, (r14, 0x10)
+    205c:	06ca      	br      	0x1df0	// 1df0 <__v2_printf+0x2b4>
+    205e:	6cd3      	mov      	r3, r4
+    2060:	0467      	br      	0x212e	// 212e <__v2_printf+0x5f2>
+    2062:	9884      	ld.w      	r4, (r14, 0x10)
+    2064:	3c40      	cmpnei      	r4, 0
+    2066:	080b      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    2068:	9843      	ld.w      	r2, (r14, 0xc)
+    206a:	3a09      	cmphsi      	r2, 10
+    206c:	0808      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    206e:	9883      	ld.w      	r4, (r14, 0xc)
+    2070:	242f      	addi      	r4, 48
+    2072:	1f1a      	addi      	r7, r14, 104
+    2074:	a787      	st.b      	r4, (r7, 0x7)
+    2076:	1c12      	addi      	r4, r14, 72
+    2078:	2426      	addi      	r4, 39
+    207a:	0478      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    207c:	1c1c      	addi      	r4, r14, 112
+    207e:	3530      	movi      	r5, 48
+    2080:	320a      	movi      	r2, 10
+    2082:	3300      	movi      	r3, 0
+    2084:	9803      	ld.w      	r0, (r14, 0xc)
+    2086:	9824      	ld.w      	r1, (r14, 0x10)
+    2088:	e00002c2 	bsr      	0x260c	// 260c <__umoddi3>
+    208c:	6014      	addu      	r0, r5
+    208e:	2c00      	subi      	r4, 1
+    2090:	a400      	st.b      	r0, (r4, 0x0)
+    2092:	320a      	movi      	r2, 10
+    2094:	9803      	ld.w      	r0, (r14, 0xc)
+    2096:	9824      	ld.w      	r1, (r14, 0x10)
+    2098:	3300      	movi      	r3, 0
+    209a:	e00000e3 	bsr      	0x2260	// 2260 <__udivdi3>
+    209e:	b803      	st.w      	r0, (r14, 0xc)
+    20a0:	b824      	st.w      	r1, (r14, 0x10)
+    20a2:	9823      	ld.w      	r1, (r14, 0xc)
+    20a4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20a6:	6c5c      	or      	r1, r7
+    20a8:	3940      	cmpnei      	r1, 0
+    20aa:	0beb      	bt      	0x2080	// 2080 <__v2_printf+0x544>
+    20ac:	045f      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20ae:	0000      	bkpt
+    20b0:	000060da 	.long	0x000060da
+    20b4:	000060c9 	.long	0x000060c9
+    20b8:	20000768 	.long	0x20000768
+    20bc:	3300      	movi      	r3, 0
+    20be:	3400      	movi      	r4, 0
+    20c0:	b863      	st.w      	r3, (r14, 0xc)
+    20c2:	b884      	st.w      	r4, (r14, 0x10)
+    20c4:	1c1c      	addi      	r4, r14, 112
+    20c6:	320f      	movi      	r2, 15
+    20c8:	9803      	ld.w      	r0, (r14, 0xc)
+    20ca:	982a      	ld.w      	r1, (r14, 0x28)
+    20cc:	6808      	and      	r0, r2
+    20ce:	6004      	addu      	r0, r1
+    20d0:	80a0      	ld.b      	r5, (r0, 0x0)
+    20d2:	2c00      	subi      	r4, 1
+    20d4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20d6:	a4a0      	st.b      	r5, (r4, 0x0)
+    20d8:	98a4      	ld.w      	r5, (r14, 0x10)
+    20da:	9863      	ld.w      	r3, (r14, 0xc)
+    20dc:	471c      	lsli      	r0, r7, 28
+    20de:	4de4      	lsri      	r7, r5, 4
+    20e0:	4b24      	lsri      	r1, r3, 4
+    20e2:	b8e4      	st.w      	r7, (r14, 0x10)
+    20e4:	6c04      	or      	r0, r1
+    20e6:	9864      	ld.w      	r3, (r14, 0x10)
+    20e8:	b803      	st.w      	r0, (r14, 0xc)
+    20ea:	6c0c      	or      	r0, r3
+    20ec:	3840      	cmpnei      	r0, 0
+    20ee:	0bed      	bt      	0x20c8	// 20c8 <__v2_printf+0x58c>
+    20f0:	043d      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20f2:	3c40      	cmpnei      	r4, 0
+    20f4:	0808      	bt      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20f6:	3301      	movi      	r3, 1
+    20f8:	68dc      	and      	r3, r7
+    20fa:	3b40      	cmpnei      	r3, 0
+    20fc:	0c04      	bf      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20fe:	1f1a      	addi      	r7, r14, 104
+    2100:	3430      	movi      	r4, 48
+    2102:	07b9      	br      	0x2074	// 2074 <__v2_printf+0x538>
+    2104:	1c1c      	addi      	r4, r14, 112
+    2106:	0432      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    2108:	322b      	movi      	r2, 43
+    210a:	649a      	cmpne      	r6, r2
+    210c:	0802      	bt      	0x2110	// 2110 <__v2_printf+0x5d4>
+    210e:	0614      	br      	0x1d36	// 1d36 <__v2_printf+0x1fa>
+    2110:	1c12      	addi      	r4, r14, 72
+    2112:	6c13      	mov      	r0, r4
+    2114:	e0000612 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    2118:	6d83      	mov      	r6, r0
+    211a:	06d7      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    211c:	3840      	cmpnei      	r0, 0
+    211e:	b8e8      	st.w      	r7, (r14, 0x20)
+    2120:	0f3e      	bf      	0x1f9c	// 1f9c <__v2_printf+0x460>
+    2122:	3c41      	cmpnei      	r4, 1
+    2124:	0f9f      	bf      	0x2062	// 2062 <__v2_printf+0x526>
+    2126:	3c42      	cmpnei      	r4, 2
+    2128:	0fce      	bf      	0x20c4	// 20c4 <__v2_printf+0x588>
+    212a:	1b1c      	addi      	r3, r14, 112
+    212c:	3707      	movi      	r7, 7
+    212e:	9823      	ld.w      	r1, (r14, 0xc)
+    2130:	685c      	and      	r1, r7
+    2132:	212f      	addi      	r1, 48
+    2134:	9804      	ld.w      	r0, (r14, 0x10)
+    2136:	7484      	zextb      	r2, r1
+    2138:	9823      	ld.w      	r1, (r14, 0xc)
+    213a:	40bd      	lsli      	r5, r0, 29
+    213c:	4903      	lsri      	r0, r1, 3
+    213e:	9824      	ld.w      	r1, (r14, 0x10)
+    2140:	4923      	lsri      	r1, r1, 3
+    2142:	b824      	st.w      	r1, (r14, 0x10)
+    2144:	6d40      	or      	r5, r0
+    2146:	9804      	ld.w      	r0, (r14, 0x10)
+    2148:	b8a3      	st.w      	r5, (r14, 0xc)
+    214a:	6d40      	or      	r5, r0
+    214c:	5b83      	subi      	r4, r3, 1
+    214e:	3d40      	cmpnei      	r5, 0
+    2150:	a440      	st.b      	r2, (r4, 0x0)
+    2152:	0b86      	bt      	0x205e	// 205e <__v2_printf+0x522>
+    2154:	3701      	movi      	r7, 1
+    2156:	9828      	ld.w      	r1, (r14, 0x20)
+    2158:	69c4      	and      	r7, r1
+    215a:	3f40      	cmpnei      	r7, 0
+    215c:	0c07      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    215e:	3530      	movi      	r5, 48
+    2160:	654a      	cmpne      	r2, r5
+    2162:	0c04      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    2164:	5b87      	subi      	r4, r3, 2
+    2166:	3330      	movi      	r3, 48
+    2168:	a460      	st.b      	r3, (r4, 0x0)
+    216a:	6d5b      	mov      	r5, r6
+    216c:	1e1c      	addi      	r6, r14, 112
+    216e:	6192      	subu      	r6, r4
+    2170:	98e8      	ld.w      	r7, (r14, 0x20)
+    2172:	6595      	cmplt      	r5, r6
+    2174:	b8a8      	st.w      	r5, (r14, 0x20)
+    2176:	0c02      	bf      	0x217a	// 217a <__v2_printf+0x63e>
+    2178:	b8c8      	st.w      	r6, (r14, 0x20)
+    217a:	3037      	movi      	r0, 55
+    217c:	1b01      	addi      	r3, r14, 4
+    217e:	600c      	addu      	r0, r3
+    2180:	8040      	ld.b      	r2, (r0, 0x0)
+    2182:	3a40      	cmpnei      	r2, 0
+    2184:	0c04      	bf      	0x218c	// 218c <__v2_printf+0x650>
+    2186:	9828      	ld.w      	r1, (r14, 0x20)
+    2188:	2100      	addi      	r1, 1
+    218a:	b828      	st.w      	r1, (r14, 0x20)
+    218c:	3002      	movi      	r0, 2
+    218e:	681c      	and      	r0, r7
+    2190:	3840      	cmpnei      	r0, 0
+    2192:	b80b      	st.w      	r0, (r14, 0x2c)
+    2194:	0c04      	bf      	0x219c	// 219c <__v2_printf+0x660>
+    2196:	9868      	ld.w      	r3, (r14, 0x20)
+    2198:	2301      	addi      	r3, 2
+    219a:	b868      	st.w      	r3, (r14, 0x20)
+    219c:	3284      	movi      	r2, 132
+    219e:	689c      	and      	r2, r7
+    21a0:	3a40      	cmpnei      	r2, 0
+    21a2:	b84c      	st.w      	r2, (r14, 0x30)
+    21a4:	080b      	bt      	0x21ba	// 21ba <__v2_printf+0x67e>
+    21a6:	3310      	movi      	r3, 16
+    21a8:	1a0c      	addi      	r2, r14, 48
+    21aa:	9827      	ld.w      	r1, (r14, 0x1c)
+    21ac:	9808      	ld.w      	r0, (r14, 0x20)
+    21ae:	60c8      	addu      	r3, r2
+    21b0:	5901      	subu      	r0, r1, r0
+    21b2:	6f4f      	mov      	r13, r3
+    21b4:	1129      	lrw      	r1, 0x5cf0	// 2258 <__v2_printf+0x71c>
+    21b6:	e3fffca9 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    21ba:	3137      	movi      	r1, 55
+    21bc:	1801      	addi      	r0, r14, 4
+    21be:	6040      	addu      	r1, r0
+    21c0:	8160      	ld.b      	r3, (r1, 0x0)
+    21c2:	3b40      	cmpnei      	r3, 0
+    21c4:	0c0b      	bf      	0x21da	// 21da <__v2_printf+0x69e>
+    21c6:	9830      	ld.w      	r1, (r14, 0x40)
+    21c8:	9101      	ld.w      	r0, (r1, 0x4)
+    21ca:	b802      	st.w      	r0, (r14, 0x8)
+    21cc:	1b0c      	addi      	r3, r14, 48
+    21ce:	300b      	movi      	r0, 11
+    21d0:	9140      	ld.w      	r2, (r1, 0x0)
+    21d2:	600c      	addu      	r0, r3
+    21d4:	3101      	movi      	r1, 1
+    21d6:	9862      	ld.w      	r3, (r14, 0x8)
+    21d8:	7bcd      	jsr      	r3
+    21da:	984b      	ld.w      	r2, (r14, 0x2c)
+    21dc:	3a40      	cmpnei      	r2, 0
+    21de:	0c07      	bf      	0x21ec	// 21ec <__v2_printf+0x6b0>
+    21e0:	9830      	ld.w      	r1, (r14, 0x40)
+    21e2:	9140      	ld.w      	r2, (r1, 0x0)
+    21e4:	9161      	ld.w      	r3, (r1, 0x4)
+    21e6:	180f      	addi      	r0, r14, 60
+    21e8:	3102      	movi      	r1, 2
+    21ea:	7bcd      	jsr      	r3
+    21ec:	3080      	movi      	r0, 128
+    21ee:	984c      	ld.w      	r2, (r14, 0x30)
+    21f0:	640a      	cmpne      	r2, r0
+    21f2:	080b      	bt      	0x2208	// 2208 <__v2_printf+0x6cc>
+    21f4:	9827      	ld.w      	r1, (r14, 0x1c)
+    21f6:	9868      	ld.w      	r3, (r14, 0x20)
+    21f8:	590d      	subu      	r0, r1, r3
+    21fa:	1a0c      	addi      	r2, r14, 48
+    21fc:	3110      	movi      	r1, 16
+    21fe:	6048      	addu      	r1, r2
+    2200:	6f47      	mov      	r13, r1
+    2202:	1037      	lrw      	r1, 0x5d00	// 225c <__v2_printf+0x720>
+    2204:	e3fffc82 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    2208:	5d19      	subu      	r0, r5, r6
+    220a:	1b0c      	addi      	r3, r14, 48
+    220c:	3510      	movi      	r5, 16
+    220e:	614c      	addu      	r5, r3
+    2210:	6f57      	mov      	r13, r5
+    2212:	6d77      	mov      	r5, r13
+    2214:	1032      	lrw      	r1, 0x5d00	// 225c <__v2_printf+0x720>
+    2216:	e3fffc79 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    221a:	9500      	ld.w      	r0, (r5, 0x0)
+    221c:	9040      	ld.w      	r2, (r0, 0x0)
+    221e:	9061      	ld.w      	r3, (r0, 0x4)
+    2220:	6c13      	mov      	r0, r4
+    2222:	3404      	movi      	r4, 4
+    2224:	6c5b      	mov      	r1, r6
+    2226:	691c      	and      	r4, r7
+    2228:	7bcd      	jsr      	r3
+    222a:	3c40      	cmpnei      	r4, 0
+    222c:	0c08      	bf      	0x223c	// 223c <__v2_printf+0x700>
+    222e:	9828      	ld.w      	r1, (r14, 0x20)
+    2230:	98c7      	ld.w      	r6, (r14, 0x1c)
+    2232:	5e05      	subu      	r0, r6, r1
+    2234:	6f57      	mov      	r13, r5
+    2236:	1029      	lrw      	r1, 0x5cf0	// 2258 <__v2_printf+0x71c>
+    2238:	e3fffc68 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    223c:	98a7      	ld.w      	r5, (r14, 0x1c)
+    223e:	9848      	ld.w      	r2, (r14, 0x20)
+    2240:	6495      	cmplt      	r5, r2
+    2242:	0c02      	bf      	0x2246	// 2246 <__v2_printf+0x70a>
+    2244:	6d4b      	mov      	r5, r2
+    2246:	9809      	ld.w      	r0, (r14, 0x24)
+    2248:	6014      	addu      	r0, r5
+    224a:	b809      	st.w      	r0, (r14, 0x24)
+    224c:	98a5      	ld.w      	r5, (r14, 0x14)
+    224e:	e800fc84 	br      	0x1b56	// 1b56 <__v2_printf+0x1a>
+    2252:	9809      	ld.w      	r0, (r14, 0x24)
+    2254:	141c      	addi      	r14, r14, 112
+    2256:	1494      	pop      	r4-r7, r15
+    2258:	00005cf0 	.long	0x00005cf0
+    225c:	00005d00 	.long	0x00005d00
+
+00002260 <__udivdi3>:
+    2260:	14d4      	push      	r4-r7, r15
+    2262:	1426      	subi      	r14, r14, 24
+    2264:	6dc7      	mov      	r7, r1
+    2266:	3b40      	cmpnei      	r3, 0
+    2268:	6d03      	mov      	r4, r0
+    226a:	6c4f      	mov      	r1, r3
+    226c:	6d8b      	mov      	r6, r2
+    226e:	b800      	st.w      	r0, (r14, 0x0)
+    2270:	6d5f      	mov      	r5, r7
+    2272:	085b      	bt      	0x2328	// 2328 <__udivdi3+0xc8>
+    2274:	649c      	cmphs      	r7, r2
+    2276:	0874      	bt      	0x235e	// 235e <__udivdi3+0xfe>
+    2278:	003d      	lrw      	r1, 0xffff	// 2600 <__udivdi3+0x3a0>
+    227a:	6484      	cmphs      	r1, r2
+    227c:	0cdc      	bf      	0x2434	// 2434 <__udivdi3+0x1d4>
+    227e:	31ff      	movi      	r1, 255
+    2280:	6484      	cmphs      	r1, r2
+    2282:	0802      	bt      	0x2286	// 2286 <__udivdi3+0x26>
+    2284:	3308      	movi      	r3, 8
+    2286:	6c4b      	mov      	r1, r2
+    2288:	704d      	lsr      	r1, r3
+    228a:	0100      	lrw      	r0, 0x5bf0	// 2604 <__udivdi3+0x3a4>
+    228c:	6040      	addu      	r1, r0
+    228e:	8120      	ld.b      	r1, (r1, 0x0)
+    2290:	60c4      	addu      	r3, r1
+    2292:	3120      	movi      	r1, 32
+    2294:	604e      	subu      	r1, r3
+    2296:	3940      	cmpnei      	r1, 0
+    2298:	0c09      	bf      	0x22aa	// 22aa <__udivdi3+0x4a>
+    229a:	6d53      	mov      	r5, r4
+    229c:	7084      	lsl      	r2, r1
+    229e:	71c4      	lsl      	r7, r1
+    22a0:	714d      	lsr      	r5, r3
+    22a2:	7104      	lsl      	r4, r1
+    22a4:	6d8b      	mov      	r6, r2
+    22a6:	6d5c      	or      	r5, r7
+    22a8:	b880      	st.w      	r4, (r14, 0x0)
+    22aa:	4e90      	lsri      	r4, r6, 16
+    22ac:	6c53      	mov      	r1, r4
+    22ae:	6c17      	mov      	r0, r5
+    22b0:	e00010d8 	bsr      	0x4460	// 4460 <__umodsi3>
+    22b4:	b801      	st.w      	r0, (r14, 0x4)
+    22b6:	6c53      	mov      	r1, r4
+    22b8:	6c17      	mov      	r0, r5
+    22ba:	e00010af 	bsr      	0x4418	// 4418 <__udivsi3>
+    22be:	75d9      	zexth      	r7, r6
+    22c0:	9861      	ld.w      	r3, (r14, 0x4)
+    22c2:	9820      	ld.w      	r1, (r14, 0x0)
+    22c4:	6c9f      	mov      	r2, r7
+    22c6:	4370      	lsli      	r3, r3, 16
+    22c8:	4930      	lsri      	r1, r1, 16
+    22ca:	7c80      	mult      	r2, r0
+    22cc:	6cc4      	or      	r3, r1
+    22ce:	648c      	cmphs      	r3, r2
+    22d0:	6d43      	mov      	r5, r0
+    22d2:	0808      	bt      	0x22e2	// 22e2 <__udivdi3+0x82>
+    22d4:	60d8      	addu      	r3, r6
+    22d6:	658c      	cmphs      	r3, r6
+    22d8:	5823      	subi      	r1, r0, 1
+    22da:	0c03      	bf      	0x22e0	// 22e0 <__udivdi3+0x80>
+    22dc:	648c      	cmphs      	r3, r2
+    22de:	0d8e      	bf      	0x25fa	// 25fa <__udivdi3+0x39a>
+    22e0:	6d47      	mov      	r5, r1
+    22e2:	60ca      	subu      	r3, r2
+    22e4:	6c53      	mov      	r1, r4
+    22e6:	6c0f      	mov      	r0, r3
+    22e8:	b862      	st.w      	r3, (r14, 0x8)
+    22ea:	e00010bb 	bsr      	0x4460	// 4460 <__umodsi3>
+    22ee:	9862      	ld.w      	r3, (r14, 0x8)
+    22f0:	b801      	st.w      	r0, (r14, 0x4)
+    22f2:	6c53      	mov      	r1, r4
+    22f4:	6c0f      	mov      	r0, r3
+    22f6:	e0001091 	bsr      	0x4418	// 4418 <__udivsi3>
+    22fa:	9841      	ld.w      	r2, (r14, 0x4)
+    22fc:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2300:	4250      	lsli      	r2, r2, 16
+    2302:	74cd      	zexth      	r3, r3
+    2304:	7dc0      	mult      	r7, r0
+    2306:	6c8c      	or      	r2, r3
+    2308:	65c8      	cmphs      	r2, r7
+    230a:	6d03      	mov      	r4, r0
+    230c:	0808      	bt      	0x231c	// 231c <__udivdi3+0xbc>
+    230e:	6098      	addu      	r2, r6
+    2310:	6588      	cmphs      	r2, r6
+    2312:	5863      	subi      	r3, r0, 1
+    2314:	0d4d      	bf      	0x25ae	// 25ae <__udivdi3+0x34e>
+    2316:	65c8      	cmphs      	r2, r7
+    2318:	094b      	bt      	0x25ae	// 25ae <__udivdi3+0x34e>
+    231a:	2c01      	subi      	r4, 2
+    231c:	4510      	lsli      	r0, r5, 16
+    231e:	3700      	movi      	r7, 0
+    2320:	6c10      	or      	r0, r4
+    2322:	6c5f      	mov      	r1, r7
+    2324:	1406      	addi      	r14, r14, 24
+    2326:	1494      	pop      	r4-r7, r15
+    2328:	64dc      	cmphs      	r7, r3
+    232a:	0c76      	bf      	0x2416	// 2416 <__udivdi3+0x1b6>
+    232c:	026a      	lrw      	r3, 0xffff	// 2600 <__udivdi3+0x3a0>
+    232e:	644c      	cmphs      	r3, r1
+    2330:	0878      	bt      	0x2420	// 2420 <__udivdi3+0x1c0>
+    2332:	0269      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2334:	644c      	cmphs      	r3, r1
+    2336:	0d48      	bf      	0x25c6	// 25c6 <__udivdi3+0x366>
+    2338:	3610      	movi      	r6, 16
+    233a:	6cc7      	mov      	r3, r1
+    233c:	70d9      	lsr      	r3, r6
+    233e:	020d      	lrw      	r0, 0x5bf0	// 2604 <__udivdi3+0x3a4>
+    2340:	60c0      	addu      	r3, r0
+    2342:	8360      	ld.b      	r3, (r3, 0x0)
+    2344:	618c      	addu      	r6, r3
+    2346:	3020      	movi      	r0, 32
+    2348:	5879      	subu      	r3, r0, r6
+    234a:	3b40      	cmpnei      	r3, 0
+    234c:	b860      	st.w      	r3, (r14, 0x0)
+    234e:	0878      	bt      	0x243e	// 243e <__udivdi3+0x1de>
+    2350:	65c4      	cmphs      	r1, r7
+    2352:	0d40      	bf      	0x25d2	// 25d2 <__udivdi3+0x372>
+    2354:	6490      	cmphs      	r4, r2
+    2356:	6c0f      	mov      	r0, r3
+    2358:	600d      	addc      	r0, r3
+    235a:	3700      	movi      	r7, 0
+    235c:	045f      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    235e:	3a40      	cmpnei      	r2, 0
+    2360:	0808      	bt      	0x2370	// 2370 <__udivdi3+0x110>
+    2362:	3100      	movi      	r1, 0
+    2364:	3001      	movi      	r0, 1
+    2366:	b861      	st.w      	r3, (r14, 0x4)
+    2368:	e0001058 	bsr      	0x4418	// 4418 <__udivsi3>
+    236c:	6d83      	mov      	r6, r0
+    236e:	9861      	ld.w      	r3, (r14, 0x4)
+    2370:	025b      	lrw      	r2, 0xffff	// 2600 <__udivdi3+0x3a0>
+    2372:	6588      	cmphs      	r2, r6
+    2374:	085b      	bt      	0x242a	// 242a <__udivdi3+0x1ca>
+    2376:	027a      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2378:	658c      	cmphs      	r3, r6
+    237a:	0d28      	bf      	0x25ca	// 25ca <__udivdi3+0x36a>
+    237c:	3310      	movi      	r3, 16
+    237e:	6c9b      	mov      	r2, r6
+    2380:	023e      	lrw      	r1, 0x5bf0	// 2604 <__udivdi3+0x3a4>
+    2382:	708d      	lsr      	r2, r3
+    2384:	6084      	addu      	r2, r1
+    2386:	8240      	ld.b      	r2, (r2, 0x0)
+    2388:	5a2c      	addu      	r1, r2, r3
+    238a:	3220      	movi      	r2, 32
+    238c:	6086      	subu      	r2, r1
+    238e:	3a40      	cmpnei      	r2, 0
+    2390:	08c0      	bt      	0x2510	// 2510 <__udivdi3+0x2b0>
+    2392:	74d9      	zexth      	r3, r6
+    2394:	5f99      	subu      	r4, r7, r6
+    2396:	4eb0      	lsri      	r5, r6, 16
+    2398:	b861      	st.w      	r3, (r14, 0x4)
+    239a:	3701      	movi      	r7, 1
+    239c:	6c57      	mov      	r1, r5
+    239e:	6c13      	mov      	r0, r4
+    23a0:	e0001060 	bsr      	0x4460	// 4460 <__umodsi3>
+    23a4:	b802      	st.w      	r0, (r14, 0x8)
+    23a6:	6c57      	mov      	r1, r5
+    23a8:	6c13      	mov      	r0, r4
+    23aa:	e0001037 	bsr      	0x4418	// 4418 <__udivsi3>
+    23ae:	9862      	ld.w      	r3, (r14, 0x8)
+    23b0:	4330      	lsli      	r1, r3, 16
+    23b2:	9860      	ld.w      	r3, (r14, 0x0)
+    23b4:	9841      	ld.w      	r2, (r14, 0x4)
+    23b6:	4b70      	lsri      	r3, r3, 16
+    23b8:	7c80      	mult      	r2, r0
+    23ba:	6cc4      	or      	r3, r1
+    23bc:	648c      	cmphs      	r3, r2
+    23be:	6d03      	mov      	r4, r0
+    23c0:	0808      	bt      	0x23d0	// 23d0 <__udivdi3+0x170>
+    23c2:	60d8      	addu      	r3, r6
+    23c4:	658c      	cmphs      	r3, r6
+    23c6:	5823      	subi      	r1, r0, 1
+    23c8:	0c03      	bf      	0x23ce	// 23ce <__udivdi3+0x16e>
+    23ca:	648c      	cmphs      	r3, r2
+    23cc:	0d14      	bf      	0x25f4	// 25f4 <__udivdi3+0x394>
+    23ce:	6d07      	mov      	r4, r1
+    23d0:	60ca      	subu      	r3, r2
+    23d2:	6c57      	mov      	r1, r5
+    23d4:	6c0f      	mov      	r0, r3
+    23d6:	b863      	st.w      	r3, (r14, 0xc)
+    23d8:	e0001044 	bsr      	0x4460	// 4460 <__umodsi3>
+    23dc:	9863      	ld.w      	r3, (r14, 0xc)
+    23de:	6c57      	mov      	r1, r5
+    23e0:	b802      	st.w      	r0, (r14, 0x8)
+    23e2:	6c0f      	mov      	r0, r3
+    23e4:	e000101a 	bsr      	0x4418	// 4418 <__udivsi3>
+    23e8:	9842      	ld.w      	r2, (r14, 0x8)
+    23ea:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    23ee:	9821      	ld.w      	r1, (r14, 0x4)
+    23f0:	4250      	lsli      	r2, r2, 16
+    23f2:	74cd      	zexth      	r3, r3
+    23f4:	7c40      	mult      	r1, r0
+    23f6:	6cc8      	or      	r3, r2
+    23f8:	644c      	cmphs      	r3, r1
+    23fa:	6d43      	mov      	r5, r0
+    23fc:	0808      	bt      	0x240c	// 240c <__udivdi3+0x1ac>
+    23fe:	60d8      	addu      	r3, r6
+    2400:	658c      	cmphs      	r3, r6
+    2402:	5843      	subi      	r2, r0, 1
+    2404:	0cd3      	bf      	0x25aa	// 25aa <__udivdi3+0x34a>
+    2406:	644c      	cmphs      	r3, r1
+    2408:	08d1      	bt      	0x25aa	// 25aa <__udivdi3+0x34a>
+    240a:	2d01      	subi      	r5, 2
+    240c:	4410      	lsli      	r0, r4, 16
+    240e:	6c14      	or      	r0, r5
+    2410:	6c5f      	mov      	r1, r7
+    2412:	1406      	addi      	r14, r14, 24
+    2414:	1494      	pop      	r4-r7, r15
+    2416:	3700      	movi      	r7, 0
+    2418:	3000      	movi      	r0, 0
+    241a:	6c5f      	mov      	r1, r7
+    241c:	1406      	addi      	r14, r14, 24
+    241e:	1494      	pop      	r4-r7, r15
+    2420:	33ff      	movi      	r3, 255
+    2422:	644c      	cmphs      	r3, r1
+    2424:	6583      	mvcv      	r6
+    2426:	46c3      	lsli      	r6, r6, 3
+    2428:	0789      	br      	0x233a	// 233a <__udivdi3+0xda>
+    242a:	32ff      	movi      	r2, 255
+    242c:	6588      	cmphs      	r2, r6
+    242e:	0ba8      	bt      	0x237e	// 237e <__udivdi3+0x11e>
+    2430:	3308      	movi      	r3, 8
+    2432:	07a6      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    2434:	1375      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2436:	648c      	cmphs      	r3, r2
+    2438:	0ccb      	bf      	0x25ce	// 25ce <__udivdi3+0x36e>
+    243a:	3310      	movi      	r3, 16
+    243c:	0725      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    243e:	9800      	ld.w      	r0, (r14, 0x0)
+    2440:	6ccb      	mov      	r3, r2
+    2442:	6d4b      	mov      	r5, r2
+    2444:	7040      	lsl      	r1, r0
+    2446:	7140      	lsl      	r5, r0
+    2448:	70d9      	lsr      	r3, r6
+    244a:	6cc4      	or      	r3, r1
+    244c:	b8a3      	st.w      	r5, (r14, 0xc)
+    244e:	6d53      	mov      	r5, r4
+    2450:	6c4f      	mov      	r1, r3
+    2452:	7159      	lsr      	r5, r6
+    2454:	6cdf      	mov      	r3, r7
+    2456:	71c0      	lsl      	r7, r0
+    2458:	6d5c      	or      	r5, r7
+    245a:	70d9      	lsr      	r3, r6
+    245c:	b8a1      	st.w      	r5, (r14, 0x4)
+    245e:	49b0      	lsri      	r5, r1, 16
+    2460:	b822      	st.w      	r1, (r14, 0x8)
+    2462:	75c5      	zexth      	r7, r1
+    2464:	6c0f      	mov      	r0, r3
+    2466:	6c57      	mov      	r1, r5
+    2468:	b864      	st.w      	r3, (r14, 0x10)
+    246a:	e0000ffb 	bsr      	0x4460	// 4460 <__umodsi3>
+    246e:	9864      	ld.w      	r3, (r14, 0x10)
+    2470:	6d83      	mov      	r6, r0
+    2472:	6c57      	mov      	r1, r5
+    2474:	6c0f      	mov      	r0, r3
+    2476:	e0000fd1 	bsr      	0x4418	// 4418 <__udivsi3>
+    247a:	6c5f      	mov      	r1, r7
+    247c:	7c40      	mult      	r1, r0
+    247e:	6c87      	mov      	r2, r1
+    2480:	4630      	lsli      	r1, r6, 16
+    2482:	98c1      	ld.w      	r6, (r14, 0x4)
+    2484:	4ed0      	lsri      	r6, r6, 16
+    2486:	6d84      	or      	r6, r1
+    2488:	6498      	cmphs      	r6, r2
+    248a:	6cc3      	mov      	r3, r0
+    248c:	0807      	bt      	0x249a	// 249a <__udivdi3+0x23a>
+    248e:	5823      	subi      	r1, r0, 1
+    2490:	9802      	ld.w      	r0, (r14, 0x8)
+    2492:	6180      	addu      	r6, r0
+    2494:	6418      	cmphs      	r6, r0
+    2496:	08a6      	bt      	0x25e2	// 25e2 <__udivdi3+0x382>
+    2498:	6cc7      	mov      	r3, r1
+    249a:	618a      	subu      	r6, r2
+    249c:	6c57      	mov      	r1, r5
+    249e:	6c1b      	mov      	r0, r6
+    24a0:	b865      	st.w      	r3, (r14, 0x14)
+    24a2:	e0000fdf 	bsr      	0x4460	// 4460 <__umodsi3>
+    24a6:	b804      	st.w      	r0, (r14, 0x10)
+    24a8:	6c57      	mov      	r1, r5
+    24aa:	6c1b      	mov      	r0, r6
+    24ac:	e0000fb6 	bsr      	0x4418	// 4418 <__udivsi3>
+    24b0:	9864      	ld.w      	r3, (r14, 0x10)
+    24b2:	6c9f      	mov      	r2, r7
+    24b4:	43f0      	lsli      	r7, r3, 16
+    24b6:	d86e1002 	ld.h      	r3, (r14, 0x4)
+    24ba:	744d      	zexth      	r1, r3
+    24bc:	7c80      	mult      	r2, r0
+    24be:	6dc4      	or      	r7, r1
+    24c0:	649c      	cmphs      	r7, r2
+    24c2:	9865      	ld.w      	r3, (r14, 0x14)
+    24c4:	0807      	bt      	0x24d2	// 24d2 <__udivdi3+0x272>
+    24c6:	98a2      	ld.w      	r5, (r14, 0x8)
+    24c8:	61d4      	addu      	r7, r5
+    24ca:	655c      	cmphs      	r7, r5
+    24cc:	5823      	subi      	r1, r0, 1
+    24ce:	0885      	bt      	0x25d8	// 25d8 <__udivdi3+0x378>
+    24d0:	6c07      	mov      	r0, r1
+    24d2:	4370      	lsli      	r3, r3, 16
+    24d4:	6c0c      	or      	r0, r3
+    24d6:	74c1      	zexth      	r3, r0
+    24d8:	61ca      	subu      	r7, r2
+    24da:	9843      	ld.w      	r2, (r14, 0xc)
+    24dc:	7549      	zexth      	r5, r2
+    24de:	4830      	lsri      	r1, r0, 16
+    24e0:	4a50      	lsri      	r2, r2, 16
+    24e2:	6d8f      	mov      	r6, r3
+    24e4:	7d94      	mult      	r6, r5
+    24e6:	7cc8      	mult      	r3, r2
+    24e8:	7d44      	mult      	r5, r1
+    24ea:	60d4      	addu      	r3, r5
+    24ec:	7c48      	mult      	r1, r2
+    24ee:	4e50      	lsri      	r2, r6, 16
+    24f0:	60c8      	addu      	r3, r2
+    24f2:	654c      	cmphs      	r3, r5
+    24f4:	0804      	bt      	0x24fc	// 24fc <__udivdi3+0x29c>
+    24f6:	3280      	movi      	r2, 128
+    24f8:	4249      	lsli      	r2, r2, 9
+    24fa:	6048      	addu      	r1, r2
+    24fc:	4b50      	lsri      	r2, r3, 16
+    24fe:	6048      	addu      	r1, r2
+    2500:	645c      	cmphs      	r7, r1
+    2502:	0c5f      	bf      	0x25c0	// 25c0 <__udivdi3+0x360>
+    2504:	645e      	cmpne      	r7, r1
+    2506:	0c56      	bf      	0x25b2	// 25b2 <__udivdi3+0x352>
+    2508:	3700      	movi      	r7, 0
+    250a:	6c5f      	mov      	r1, r7
+    250c:	1406      	addi      	r14, r14, 24
+    250e:	1494      	pop      	r4-r7, r15
+    2510:	6d53      	mov      	r5, r4
+    2512:	6cdf      	mov      	r3, r7
+    2514:	7145      	lsr      	r5, r1
+    2516:	71c8      	lsl      	r7, r2
+    2518:	7188      	lsl      	r6, r2
+    251a:	6d5c      	or      	r5, r7
+    251c:	70c5      	lsr      	r3, r1
+    251e:	6dd7      	mov      	r7, r5
+    2520:	b8a3      	st.w      	r5, (r14, 0xc)
+    2522:	4eb0      	lsri      	r5, r6, 16
+    2524:	7108      	lsl      	r4, r2
+    2526:	6c57      	mov      	r1, r5
+    2528:	7499      	zexth      	r2, r6
+    252a:	6c0f      	mov      	r0, r3
+    252c:	b841      	st.w      	r2, (r14, 0x4)
+    252e:	b880      	st.w      	r4, (r14, 0x0)
+    2530:	b862      	st.w      	r3, (r14, 0x8)
+    2532:	e0000f97 	bsr      	0x4460	// 4460 <__umodsi3>
+    2536:	9862      	ld.w      	r3, (r14, 0x8)
+    2538:	6d03      	mov      	r4, r0
+    253a:	6c57      	mov      	r1, r5
+    253c:	6c0f      	mov      	r0, r3
+    253e:	e0000f6d 	bsr      	0x4418	// 4418 <__udivsi3>
+    2542:	6cc3      	mov      	r3, r0
+    2544:	7499      	zexth      	r2, r6
+    2546:	7cc8      	mult      	r3, r2
+    2548:	4450      	lsli      	r2, r4, 16
+    254a:	4f90      	lsri      	r4, r7, 16
+    254c:	6d08      	or      	r4, r2
+    254e:	64d0      	cmphs      	r4, r3
+    2550:	6c43      	mov      	r1, r0
+    2552:	b802      	st.w      	r0, (r14, 0x8)
+    2554:	080b      	bt      	0x256a	// 256a <__udivdi3+0x30a>
+    2556:	6118      	addu      	r4, r6
+    2558:	6c87      	mov      	r2, r1
+    255a:	6590      	cmphs      	r4, r6
+    255c:	2a00      	subi      	r2, 1
+    255e:	0c49      	bf      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2560:	64d0      	cmphs      	r4, r3
+    2562:	0847      	bt      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2564:	2a00      	subi      	r2, 1
+    2566:	b842      	st.w      	r2, (r14, 0x8)
+    2568:	6118      	addu      	r4, r6
+    256a:	610e      	subu      	r4, r3
+    256c:	6c57      	mov      	r1, r5
+    256e:	6c13      	mov      	r0, r4
+    2570:	e0000f78 	bsr      	0x4460	// 4460 <__umodsi3>
+    2574:	6dc3      	mov      	r7, r0
+    2576:	6c57      	mov      	r1, r5
+    2578:	6c13      	mov      	r0, r4
+    257a:	e0000f4f 	bsr      	0x4418	// 4418 <__udivsi3>
+    257e:	d84e1006 	ld.h      	r2, (r14, 0xc)
+    2582:	74d9      	zexth      	r3, r6
+    2584:	47f0      	lsli      	r7, r7, 16
+    2586:	7509      	zexth      	r4, r2
+    2588:	7cc0      	mult      	r3, r0
+    258a:	6dd0      	or      	r7, r4
+    258c:	64dc      	cmphs      	r7, r3
+    258e:	0809      	bt      	0x25a0	// 25a0 <__udivdi3+0x340>
+    2590:	61d8      	addu      	r7, r6
+    2592:	659c      	cmphs      	r7, r6
+    2594:	5843      	subi      	r2, r0, 1
+    2596:	0c2b      	bf      	0x25ec	// 25ec <__udivdi3+0x38c>
+    2598:	64dc      	cmphs      	r7, r3
+    259a:	0829      	bt      	0x25ec	// 25ec <__udivdi3+0x38c>
+    259c:	2801      	subi      	r0, 2
+    259e:	61d8      	addu      	r7, r6
+    25a0:	5f8d      	subu      	r4, r7, r3
+    25a2:	9862      	ld.w      	r3, (r14, 0x8)
+    25a4:	43f0      	lsli      	r7, r3, 16
+    25a6:	6dc0      	or      	r7, r0
+    25a8:	06fa      	br      	0x239c	// 239c <__udivdi3+0x13c>
+    25aa:	6d4b      	mov      	r5, r2
+    25ac:	0730      	br      	0x240c	// 240c <__udivdi3+0x1ac>
+    25ae:	6d0f      	mov      	r4, r3
+    25b0:	06b6      	br      	0x231c	// 231c <__udivdi3+0xbc>
+    25b2:	9840      	ld.w      	r2, (r14, 0x0)
+    25b4:	4370      	lsli      	r3, r3, 16
+    25b6:	7599      	zexth      	r6, r6
+    25b8:	7108      	lsl      	r4, r2
+    25ba:	60d8      	addu      	r3, r6
+    25bc:	64d0      	cmphs      	r4, r3
+    25be:	0ba5      	bt      	0x2508	// 2508 <__udivdi3+0x2a8>
+    25c0:	2800      	subi      	r0, 1
+    25c2:	3700      	movi      	r7, 0
+    25c4:	07a3      	br      	0x250a	// 250a <__udivdi3+0x2aa>
+    25c6:	3618      	movi      	r6, 24
+    25c8:	06b9      	br      	0x233a	// 233a <__udivdi3+0xda>
+    25ca:	3318      	movi      	r3, 24
+    25cc:	06d9      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    25ce:	3318      	movi      	r3, 24
+    25d0:	065b      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    25d2:	3700      	movi      	r7, 0
+    25d4:	3001      	movi      	r0, 1
+    25d6:	0722      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    25d8:	649c      	cmphs      	r7, r2
+    25da:	0b7b      	bt      	0x24d0	// 24d0 <__udivdi3+0x270>
+    25dc:	2801      	subi      	r0, 2
+    25de:	61d4      	addu      	r7, r5
+    25e0:	0779      	br      	0x24d2	// 24d2 <__udivdi3+0x272>
+    25e2:	6498      	cmphs      	r6, r2
+    25e4:	0b5a      	bt      	0x2498	// 2498 <__udivdi3+0x238>
+    25e6:	2b01      	subi      	r3, 2
+    25e8:	6180      	addu      	r6, r0
+    25ea:	0758      	br      	0x249a	// 249a <__udivdi3+0x23a>
+    25ec:	6c0b      	mov      	r0, r2
+    25ee:	07d9      	br      	0x25a0	// 25a0 <__udivdi3+0x340>
+    25f0:	b842      	st.w      	r2, (r14, 0x8)
+    25f2:	07bc      	br      	0x256a	// 256a <__udivdi3+0x30a>
+    25f4:	2c01      	subi      	r4, 2
+    25f6:	60d8      	addu      	r3, r6
+    25f8:	06ec      	br      	0x23d0	// 23d0 <__udivdi3+0x170>
+    25fa:	2d01      	subi      	r5, 2
+    25fc:	60d8      	addu      	r3, r6
+    25fe:	0672      	br      	0x22e2	// 22e2 <__udivdi3+0x82>
+    2600:	0000ffff 	.long	0x0000ffff
+    2604:	00005bf0 	.long	0x00005bf0
+    2608:	00ffffff 	.long	0x00ffffff
+
+0000260c <__umoddi3>:
+    260c:	14d4      	push      	r4-r7, r15
+    260e:	1427      	subi      	r14, r14, 28
+    2610:	6d07      	mov      	r4, r1
+    2612:	6c4f      	mov      	r1, r3
+    2614:	6d43      	mov      	r5, r0
+    2616:	3940      	cmpnei      	r1, 0
+    2618:	6dcf      	mov      	r7, r3
+    261a:	6c0b      	mov      	r0, r2
+    261c:	b8a0      	st.w      	r5, (r14, 0x0)
+    261e:	6cd3      	mov      	r3, r4
+    2620:	085a      	bt      	0x26d4	// 26d4 <__umoddi3+0xc8>
+    2622:	6490      	cmphs      	r4, r2
+    2624:	0877      	bt      	0x2712	// 2712 <__umoddi3+0x106>
+    2626:	0120      	lrw      	r1, 0xffff	// 29a0 <__umoddi3+0x394>
+    2628:	6484      	cmphs      	r1, r2
+    262a:	0cd2      	bf      	0x27ce	// 27ce <__umoddi3+0x1c2>
+    262c:	31ff      	movi      	r1, 255
+    262e:	6484      	cmphs      	r1, r2
+    2630:	0802      	bt      	0x2634	// 2634 <__umoddi3+0x28>
+    2632:	3708      	movi      	r7, 8
+    2634:	6c43      	mov      	r1, r0
+    2636:	705d      	lsr      	r1, r7
+    2638:	01c4      	lrw      	r6, 0x5bf0	// 29a4 <__umoddi3+0x398>
+    263a:	6058      	addu      	r1, r6
+    263c:	8120      	ld.b      	r1, (r1, 0x0)
+    263e:	61c4      	addu      	r7, r1
+    2640:	3120      	movi      	r1, 32
+    2642:	605e      	subu      	r1, r7
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	b821      	st.w      	r1, (r14, 0x4)
+    2648:	0c09      	bf      	0x265a	// 265a <__umoddi3+0x4e>
+    264a:	6cd7      	mov      	r3, r5
+    264c:	6c83      	mov      	r2, r0
+    264e:	7104      	lsl      	r4, r1
+    2650:	70dd      	lsr      	r3, r7
+    2652:	7144      	lsl      	r5, r1
+    2654:	7084      	lsl      	r2, r1
+    2656:	6cd0      	or      	r3, r4
+    2658:	b8a0      	st.w      	r5, (r14, 0x0)
+    265a:	4a90      	lsri      	r4, r2, 16
+    265c:	6c53      	mov      	r1, r4
+    265e:	6c0f      	mov      	r0, r3
+    2660:	75c9      	zexth      	r7, r2
+    2662:	b843      	st.w      	r2, (r14, 0xc)
+    2664:	b862      	st.w      	r3, (r14, 0x8)
+    2666:	e0000efd 	bsr      	0x4460	// 4460 <__umodsi3>
+    266a:	9862      	ld.w      	r3, (r14, 0x8)
+    266c:	6d43      	mov      	r5, r0
+    266e:	6c53      	mov      	r1, r4
+    2670:	6c0f      	mov      	r0, r3
+    2672:	e0000ed3 	bsr      	0x4418	// 4418 <__udivsi3>
+    2676:	9840      	ld.w      	r2, (r14, 0x0)
+    2678:	4570      	lsli      	r3, r5, 16
+    267a:	4ab0      	lsri      	r5, r2, 16
+    267c:	7c1c      	mult      	r0, r7
+    267e:	6cd4      	or      	r3, r5
+    2680:	640c      	cmphs      	r3, r0
+    2682:	9843      	ld.w      	r2, (r14, 0xc)
+    2684:	0806      	bt      	0x2690	// 2690 <__umoddi3+0x84>
+    2686:	60c8      	addu      	r3, r2
+    2688:	648c      	cmphs      	r3, r2
+    268a:	0c03      	bf      	0x2690	// 2690 <__umoddi3+0x84>
+    268c:	640c      	cmphs      	r3, r0
+    268e:	0d7d      	bf      	0x2988	// 2988 <__umoddi3+0x37c>
+    2690:	60c2      	subu      	r3, r0
+    2692:	6c53      	mov      	r1, r4
+    2694:	6c0f      	mov      	r0, r3
+    2696:	b843      	st.w      	r2, (r14, 0xc)
+    2698:	b862      	st.w      	r3, (r14, 0x8)
+    269a:	e0000ee3 	bsr      	0x4460	// 4460 <__umodsi3>
+    269e:	9862      	ld.w      	r3, (r14, 0x8)
+    26a0:	6d43      	mov      	r5, r0
+    26a2:	6c53      	mov      	r1, r4
+    26a4:	6c0f      	mov      	r0, r3
+    26a6:	e0000eb9 	bsr      	0x4418	// 4418 <__udivsi3>
+    26aa:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    26ae:	7dc0      	mult      	r7, r0
+    26b0:	45b0      	lsli      	r5, r5, 16
+    26b2:	740d      	zexth      	r0, r3
+    26b4:	6d40      	or      	r5, r0
+    26b6:	65d4      	cmphs      	r5, r7
+    26b8:	0807      	bt      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26ba:	9843      	ld.w      	r2, (r14, 0xc)
+    26bc:	6148      	addu      	r5, r2
+    26be:	6494      	cmphs      	r5, r2
+    26c0:	0c03      	bf      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26c2:	65d4      	cmphs      	r5, r7
+    26c4:	0d5e      	bf      	0x2980	// 2980 <__umoddi3+0x374>
+    26c6:	615e      	subu      	r5, r7
+    26c8:	6c17      	mov      	r0, r5
+    26ca:	9861      	ld.w      	r3, (r14, 0x4)
+    26cc:	700d      	lsr      	r0, r3
+    26ce:	3100      	movi      	r1, 0
+    26d0:	1407      	addi      	r14, r14, 28
+    26d2:	1494      	pop      	r4-r7, r15
+    26d4:	6450      	cmphs      	r4, r1
+    26d6:	0c6e      	bf      	0x27b2	// 27b2 <__umoddi3+0x1a6>
+    26d8:	024d      	lrw      	r2, 0xffff	// 29a0 <__umoddi3+0x394>
+    26da:	6448      	cmphs      	r2, r1
+    26dc:	086f      	bt      	0x27ba	// 27ba <__umoddi3+0x1ae>
+    26de:	024c      	lrw      	r2, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    26e0:	6448      	cmphs      	r2, r1
+    26e2:	0d3f      	bf      	0x2960	// 2960 <__umoddi3+0x354>
+    26e4:	3610      	movi      	r6, 16
+    26e6:	6c87      	mov      	r2, r1
+    26e8:	7099      	lsr      	r2, r6
+    26ea:	02f0      	lrw      	r7, 0x5bf0	// 29a4 <__umoddi3+0x398>
+    26ec:	609c      	addu      	r2, r7
+    26ee:	8240      	ld.b      	r2, (r2, 0x0)
+    26f0:	6188      	addu      	r6, r2
+    26f2:	3720      	movi      	r7, 32
+    26f4:	61da      	subu      	r7, r6
+    26f6:	3f40      	cmpnei      	r7, 0
+    26f8:	0870      	bt      	0x27d8	// 27d8 <__umoddi3+0x1cc>
+    26fa:	6504      	cmphs      	r1, r4
+    26fc:	0c03      	bf      	0x2702	// 2702 <__umoddi3+0xf6>
+    26fe:	6414      	cmphs      	r5, r0
+    2700:	0d46      	bf      	0x298c	// 298c <__umoddi3+0x380>
+    2702:	5d01      	subu      	r0, r5, r0
+    2704:	6414      	cmphs      	r5, r0
+    2706:	6106      	subu      	r4, r1
+    2708:	6483      	mvcv      	r2
+    270a:	5c69      	subu      	r3, r4, r2
+    270c:	6c4f      	mov      	r1, r3
+    270e:	1407      	addi      	r14, r14, 28
+    2710:	1494      	pop      	r4-r7, r15
+    2712:	3a40      	cmpnei      	r2, 0
+    2714:	0806      	bt      	0x2720	// 2720 <__umoddi3+0x114>
+    2716:	3100      	movi      	r1, 0
+    2718:	3001      	movi      	r0, 1
+    271a:	e0000e7f 	bsr      	0x4418	// 4418 <__udivsi3>
+    271e:	6c83      	mov      	r2, r0
+    2720:	027f      	lrw      	r3, 0xffff	// 29a0 <__umoddi3+0x394>
+    2722:	648c      	cmphs      	r3, r2
+    2724:	0850      	bt      	0x27c4	// 27c4 <__umoddi3+0x1b8>
+    2726:	027e      	lrw      	r3, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    2728:	648c      	cmphs      	r3, r2
+    272a:	0d1d      	bf      	0x2964	// 2964 <__umoddi3+0x358>
+    272c:	3710      	movi      	r7, 16
+    272e:	6ccb      	mov      	r3, r2
+    2730:	70dd      	lsr      	r3, r7
+    2732:	0322      	lrw      	r1, 0x5bf0	// 29a4 <__umoddi3+0x398>
+    2734:	60c4      	addu      	r3, r1
+    2736:	8360      	ld.b      	r3, (r3, 0x0)
+    2738:	61cc      	addu      	r7, r3
+    273a:	3320      	movi      	r3, 32
+    273c:	60de      	subu      	r3, r7
+    273e:	3b40      	cmpnei      	r3, 0
+    2740:	b861      	st.w      	r3, (r14, 0x4)
+    2742:	08c2      	bt      	0x28c6	// 28c6 <__umoddi3+0x2ba>
+    2744:	74c9      	zexth      	r3, r2
+    2746:	610a      	subu      	r4, r2
+    2748:	4af0      	lsri      	r7, r2, 16
+    274a:	6d8f      	mov      	r6, r3
+    274c:	6c5f      	mov      	r1, r7
+    274e:	6c13      	mov      	r0, r4
+    2750:	b842      	st.w      	r2, (r14, 0x8)
+    2752:	e0000e87 	bsr      	0x4460	// 4460 <__umodsi3>
+    2756:	6d43      	mov      	r5, r0
+    2758:	6c5f      	mov      	r1, r7
+    275a:	6c13      	mov      	r0, r4
+    275c:	e0000e5e 	bsr      	0x4418	// 4418 <__udivsi3>
+    2760:	9860      	ld.w      	r3, (r14, 0x0)
+    2762:	4590      	lsli      	r4, r5, 16
+    2764:	4bb0      	lsri      	r5, r3, 16
+    2766:	7c18      	mult      	r0, r6
+    2768:	6d14      	or      	r4, r5
+    276a:	6410      	cmphs      	r4, r0
+    276c:	9842      	ld.w      	r2, (r14, 0x8)
+    276e:	0806      	bt      	0x277a	// 277a <__umoddi3+0x16e>
+    2770:	6108      	addu      	r4, r2
+    2772:	6490      	cmphs      	r4, r2
+    2774:	0c03      	bf      	0x277a	// 277a <__umoddi3+0x16e>
+    2776:	6410      	cmphs      	r4, r0
+    2778:	0d06      	bf      	0x2984	// 2984 <__umoddi3+0x378>
+    277a:	6102      	subu      	r4, r0
+    277c:	6c5f      	mov      	r1, r7
+    277e:	6c13      	mov      	r0, r4
+    2780:	b842      	st.w      	r2, (r14, 0x8)
+    2782:	e0000e6f 	bsr      	0x4460	// 4460 <__umodsi3>
+    2786:	6d43      	mov      	r5, r0
+    2788:	6c5f      	mov      	r1, r7
+    278a:	6c13      	mov      	r0, r4
+    278c:	e0000e46 	bsr      	0x4418	// 4418 <__udivsi3>
+    2790:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2794:	7c18      	mult      	r0, r6
+    2796:	45b0      	lsli      	r5, r5, 16
+    2798:	758d      	zexth      	r6, r3
+    279a:	6d58      	or      	r5, r6
+    279c:	6414      	cmphs      	r5, r0
+    279e:	0808      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a0:	9842      	ld.w      	r2, (r14, 0x8)
+    27a2:	6148      	addu      	r5, r2
+    27a4:	6494      	cmphs      	r5, r2
+    27a6:	0c04      	bf      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a8:	6414      	cmphs      	r5, r0
+    27aa:	0802      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27ac:	6148      	addu      	r5, r2
+    27ae:	6142      	subu      	r5, r0
+    27b0:	078c      	br      	0x26c8	// 26c8 <__umoddi3+0xbc>
+    27b2:	6c17      	mov      	r0, r5
+    27b4:	6c53      	mov      	r1, r4
+    27b6:	1407      	addi      	r14, r14, 28
+    27b8:	1494      	pop      	r4-r7, r15
+    27ba:	32ff      	movi      	r2, 255
+    27bc:	6448      	cmphs      	r2, r1
+    27be:	6583      	mvcv      	r6
+    27c0:	46c3      	lsli      	r6, r6, 3
+    27c2:	0792      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    27c4:	33ff      	movi      	r3, 255
+    27c6:	648c      	cmphs      	r3, r2
+    27c8:	0bb3      	bt      	0x272e	// 272e <__umoddi3+0x122>
+    27ca:	3708      	movi      	r7, 8
+    27cc:	07b1      	br      	0x272e	// 272e <__umoddi3+0x122>
+    27ce:	1337      	lrw      	r1, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    27d0:	6484      	cmphs      	r1, r2
+    27d2:	0ccb      	bf      	0x2968	// 2968 <__umoddi3+0x35c>
+    27d4:	3710      	movi      	r7, 16
+    27d6:	072f      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    27d8:	6cc3      	mov      	r3, r0
+    27da:	705c      	lsl      	r1, r7
+    27dc:	70d9      	lsr      	r3, r6
+    27de:	6cc4      	or      	r3, r1
+    27e0:	6c57      	mov      	r1, r5
+    27e2:	6c93      	mov      	r2, r4
+    27e4:	7059      	lsr      	r1, r6
+    27e6:	711c      	lsl      	r4, r7
+    27e8:	7099      	lsr      	r2, r6
+    27ea:	6c50      	or      	r1, r4
+    27ec:	701c      	lsl      	r0, r7
+    27ee:	4b90      	lsri      	r4, r3, 16
+    27f0:	715c      	lsl      	r5, r7
+    27f2:	b803      	st.w      	r0, (r14, 0xc)
+    27f4:	b820      	st.w      	r1, (r14, 0x0)
+    27f6:	b8a4      	st.w      	r5, (r14, 0x10)
+    27f8:	6c53      	mov      	r1, r4
+    27fa:	754d      	zexth      	r5, r3
+    27fc:	6c0b      	mov      	r0, r2
+    27fe:	b862      	st.w      	r3, (r14, 0x8)
+    2800:	b8a1      	st.w      	r5, (r14, 0x4)
+    2802:	b846      	st.w      	r2, (r14, 0x18)
+    2804:	e0000e2e 	bsr      	0x4460	// 4460 <__umodsi3>
+    2808:	9846      	ld.w      	r2, (r14, 0x18)
+    280a:	b805      	st.w      	r0, (r14, 0x14)
+    280c:	6c53      	mov      	r1, r4
+    280e:	6c0b      	mov      	r0, r2
+    2810:	e0000e04 	bsr      	0x4418	// 4418 <__udivsi3>
+    2814:	9841      	ld.w      	r2, (r14, 0x4)
+    2816:	7c80      	mult      	r2, r0
+    2818:	9865      	ld.w      	r3, (r14, 0x14)
+    281a:	6d43      	mov      	r5, r0
+    281c:	9800      	ld.w      	r0, (r14, 0x0)
+    281e:	4330      	lsli      	r1, r3, 16
+    2820:	4870      	lsri      	r3, r0, 16
+    2822:	6cc4      	or      	r3, r1
+    2824:	648c      	cmphs      	r3, r2
+    2826:	0807      	bt      	0x2834	// 2834 <__umoddi3+0x228>
+    2828:	9802      	ld.w      	r0, (r14, 0x8)
+    282a:	60c0      	addu      	r3, r0
+    282c:	640c      	cmphs      	r3, r0
+    282e:	5d23      	subi      	r1, r5, 1
+    2830:	08a3      	bt      	0x2976	// 2976 <__umoddi3+0x36a>
+    2832:	6d47      	mov      	r5, r1
+    2834:	60ca      	subu      	r3, r2
+    2836:	6c53      	mov      	r1, r4
+    2838:	6c0f      	mov      	r0, r3
+    283a:	b866      	st.w      	r3, (r14, 0x18)
+    283c:	e0000e12 	bsr      	0x4460	// 4460 <__umodsi3>
+    2840:	9866      	ld.w      	r3, (r14, 0x18)
+    2842:	6c53      	mov      	r1, r4
+    2844:	b805      	st.w      	r0, (r14, 0x14)
+    2846:	6c0f      	mov      	r0, r3
+    2848:	e0000de8 	bsr      	0x4418	// 4418 <__udivsi3>
+    284c:	9845      	ld.w      	r2, (r14, 0x14)
+    284e:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2852:	9821      	ld.w      	r1, (r14, 0x4)
+    2854:	4250      	lsli      	r2, r2, 16
+    2856:	750d      	zexth      	r4, r3
+    2858:	7c40      	mult      	r1, r0
+    285a:	6c90      	or      	r2, r4
+    285c:	6448      	cmphs      	r2, r1
+    285e:	0807      	bt      	0x286c	// 286c <__umoddi3+0x260>
+    2860:	9882      	ld.w      	r4, (r14, 0x8)
+    2862:	6090      	addu      	r2, r4
+    2864:	6508      	cmphs      	r2, r4
+    2866:	5863      	subi      	r3, r0, 1
+    2868:	0882      	bt      	0x296c	// 296c <__umoddi3+0x360>
+    286a:	6c0f      	mov      	r0, r3
+    286c:	45b0      	lsli      	r5, r5, 16
+    286e:	6d40      	or      	r5, r0
+    2870:	74d5      	zexth      	r3, r5
+    2872:	9803      	ld.w      	r0, (r14, 0xc)
+    2874:	4db0      	lsri      	r5, r5, 16
+    2876:	6d0f      	mov      	r4, r3
+    2878:	6086      	subu      	r2, r1
+    287a:	7441      	zexth      	r1, r0
+    287c:	4810      	lsri      	r0, r0, 16
+    287e:	7d04      	mult      	r4, r1
+    2880:	7cc0      	mult      	r3, r0
+    2882:	7c54      	mult      	r1, r5
+    2884:	60c4      	addu      	r3, r1
+    2886:	7d40      	mult      	r5, r0
+    2888:	4c10      	lsri      	r0, r4, 16
+    288a:	60c0      	addu      	r3, r0
+    288c:	644c      	cmphs      	r3, r1
+    288e:	0804      	bt      	0x2896	// 2896 <__umoddi3+0x28a>
+    2890:	3180      	movi      	r1, 128
+    2892:	4129      	lsli      	r1, r1, 9
+    2894:	6144      	addu      	r5, r1
+    2896:	4b30      	lsri      	r1, r3, 16
+    2898:	6144      	addu      	r5, r1
+    289a:	4370      	lsli      	r3, r3, 16
+    289c:	7511      	zexth      	r4, r4
+    289e:	6548      	cmphs      	r2, r5
+    28a0:	60d0      	addu      	r3, r4
+    28a2:	0c56      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    28a4:	654a      	cmpne      	r2, r5
+    28a6:	0c76      	bf      	0x2992	// 2992 <__umoddi3+0x386>
+    28a8:	5a35      	subu      	r1, r2, r5
+    28aa:	6c0f      	mov      	r0, r3
+    28ac:	9864      	ld.w      	r3, (r14, 0x10)
+    28ae:	5b01      	subu      	r0, r3, r0
+    28b0:	640c      	cmphs      	r3, r0
+    28b2:	64c3      	mvcv      	r3
+    28b4:	598d      	subu      	r4, r1, r3
+    28b6:	6d53      	mov      	r5, r4
+    28b8:	7158      	lsl      	r5, r6
+    28ba:	701d      	lsr      	r0, r7
+    28bc:	6c53      	mov      	r1, r4
+    28be:	6c14      	or      	r0, r5
+    28c0:	705d      	lsr      	r1, r7
+    28c2:	1407      	addi      	r14, r14, 28
+    28c4:	1494      	pop      	r4-r7, r15
+    28c6:	9801      	ld.w      	r0, (r14, 0x4)
+    28c8:	6c57      	mov      	r1, r5
+    28ca:	6cd3      	mov      	r3, r4
+    28cc:	705d      	lsr      	r1, r7
+    28ce:	7100      	lsl      	r4, r0
+    28d0:	7080      	lsl      	r2, r0
+    28d2:	6c50      	or      	r1, r4
+    28d4:	70dd      	lsr      	r3, r7
+    28d6:	6d07      	mov      	r4, r1
+    28d8:	4af0      	lsri      	r7, r2, 16
+    28da:	b822      	st.w      	r1, (r14, 0x8)
+    28dc:	7449      	zexth      	r1, r2
+    28de:	7140      	lsl      	r5, r0
+    28e0:	6d87      	mov      	r6, r1
+    28e2:	6c0f      	mov      	r0, r3
+    28e4:	6c5f      	mov      	r1, r7
+    28e6:	b844      	st.w      	r2, (r14, 0x10)
+    28e8:	b8a0      	st.w      	r5, (r14, 0x0)
+    28ea:	b863      	st.w      	r3, (r14, 0xc)
+    28ec:	e0000dba 	bsr      	0x4460	// 4460 <__umodsi3>
+    28f0:	9863      	ld.w      	r3, (r14, 0xc)
+    28f2:	6d43      	mov      	r5, r0
+    28f4:	6c5f      	mov      	r1, r7
+    28f6:	6c0f      	mov      	r0, r3
+    28f8:	e0000d90 	bsr      	0x4418	// 4418 <__udivsi3>
+    28fc:	45b0      	lsli      	r5, r5, 16
+    28fe:	4c70      	lsri      	r3, r4, 16
+    2900:	7c18      	mult      	r0, r6
+    2902:	6d4c      	or      	r5, r3
+    2904:	6414      	cmphs      	r5, r0
+    2906:	9844      	ld.w      	r2, (r14, 0x10)
+    2908:	0807      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    290a:	6148      	addu      	r5, r2
+    290c:	6494      	cmphs      	r5, r2
+    290e:	0c04      	bf      	0x2916	// 2916 <__umoddi3+0x30a>
+    2910:	6414      	cmphs      	r5, r0
+    2912:	0802      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    2914:	6148      	addu      	r5, r2
+    2916:	6142      	subu      	r5, r0
+    2918:	6c5f      	mov      	r1, r7
+    291a:	6c17      	mov      	r0, r5
+    291c:	b843      	st.w      	r2, (r14, 0xc)
+    291e:	e0000da1 	bsr      	0x4460	// 4460 <__umodsi3>
+    2922:	6d03      	mov      	r4, r0
+    2924:	6c5f      	mov      	r1, r7
+    2926:	6c17      	mov      	r0, r5
+    2928:	e0000d78 	bsr      	0x4418	// 4418 <__udivsi3>
+    292c:	d86e1004 	ld.h      	r3, (r14, 0x8)
+    2930:	4490      	lsli      	r4, r4, 16
+    2932:	744d      	zexth      	r1, r3
+    2934:	7c18      	mult      	r0, r6
+    2936:	6d04      	or      	r4, r1
+    2938:	6410      	cmphs      	r4, r0
+    293a:	9843      	ld.w      	r2, (r14, 0xc)
+    293c:	0807      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    293e:	6108      	addu      	r4, r2
+    2940:	6490      	cmphs      	r4, r2
+    2942:	0c04      	bf      	0x294a	// 294a <__umoddi3+0x33e>
+    2944:	6410      	cmphs      	r4, r0
+    2946:	0802      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    2948:	6108      	addu      	r4, r2
+    294a:	6102      	subu      	r4, r0
+    294c:	0700      	br      	0x274c	// 274c <__umoddi3+0x140>
+    294e:	9823      	ld.w      	r1, (r14, 0xc)
+    2950:	5b05      	subu      	r0, r3, r1
+    2952:	640c      	cmphs      	r3, r0
+    2954:	9822      	ld.w      	r1, (r14, 0x8)
+    2956:	6146      	subu      	r5, r1
+    2958:	64c3      	mvcv      	r3
+    295a:	614e      	subu      	r5, r3
+    295c:	5a35      	subu      	r1, r2, r5
+    295e:	07a7      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    2960:	3618      	movi      	r6, 24
+    2962:	06c2      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    2964:	3718      	movi      	r7, 24
+    2966:	06e4      	br      	0x272e	// 272e <__umoddi3+0x122>
+    2968:	3718      	movi      	r7, 24
+    296a:	0665      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    296c:	6448      	cmphs      	r2, r1
+    296e:	0b7e      	bt      	0x286a	// 286a <__umoddi3+0x25e>
+    2970:	2801      	subi      	r0, 2
+    2972:	6090      	addu      	r2, r4
+    2974:	077c      	br      	0x286c	// 286c <__umoddi3+0x260>
+    2976:	648c      	cmphs      	r3, r2
+    2978:	0b5d      	bt      	0x2832	// 2832 <__umoddi3+0x226>
+    297a:	2d01      	subi      	r5, 2
+    297c:	60c0      	addu      	r3, r0
+    297e:	075b      	br      	0x2834	// 2834 <__umoddi3+0x228>
+    2980:	6148      	addu      	r5, r2
+    2982:	06a2      	br      	0x26c6	// 26c6 <__umoddi3+0xba>
+    2984:	6108      	addu      	r4, r2
+    2986:	06fa      	br      	0x277a	// 277a <__umoddi3+0x16e>
+    2988:	60c8      	addu      	r3, r2
+    298a:	0683      	br      	0x2690	// 2690 <__umoddi3+0x84>
+    298c:	6c17      	mov      	r0, r5
+    298e:	6c4f      	mov      	r1, r3
+    2990:	06bf      	br      	0x270e	// 270e <__umoddi3+0x102>
+    2992:	9824      	ld.w      	r1, (r14, 0x10)
+    2994:	64c4      	cmphs      	r1, r3
+    2996:	0fdc      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    2998:	6c0f      	mov      	r0, r3
+    299a:	3100      	movi      	r1, 0
+    299c:	0788      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    299e:	0000      	bkpt
+    29a0:	0000ffff 	.long	0x0000ffff
+    29a4:	00005bf0 	.long	0x00005bf0
+    29a8:	00ffffff 	.long	0x00ffffff
+
+000029ac <copystring>:
+    29ac:	14c2      	push      	r4-r5
+    29ae:	3300      	movi      	r3, 0
+    29b0:	644d      	cmplt      	r3, r1
+    29b2:	0803      	bt      	0x29b8	// 29b8 <copystring+0xc>
+    29b4:	6c0f      	mov      	r0, r3
+    29b6:	1482      	pop      	r4-r5
+    29b8:	5aac      	addu      	r5, r2, r3
+    29ba:	588c      	addu      	r4, r0, r3
+    29bc:	2300      	addi      	r3, 1
+    29be:	85a0      	ld.b      	r5, (r5, 0x0)
+    29c0:	3b43      	cmpnei      	r3, 3
+    29c2:	a4a0      	st.b      	r5, (r4, 0x0)
+    29c4:	0bf6      	bt      	0x29b0	// 29b0 <copystring+0x4>
+    29c6:	3923      	cmplti      	r1, 4
+    29c8:	0bf6      	bt      	0x29b4	// 29b4 <copystring+0x8>
+    29ca:	3300      	movi      	r3, 0
+    29cc:	a063      	st.b      	r3, (r0, 0x3)
+    29ce:	3304      	movi      	r3, 4
+    29d0:	07f2      	br      	0x29b4	// 29b4 <copystring+0x8>
+
+000029d2 <__GI___dtostr>:
+    29d2:	14d4      	push      	r4-r7, r15
+    29d4:	142c      	subi      	r14, r14, 48
+    29d6:	6d8f      	mov      	r6, r3
+    29d8:	9871      	ld.w      	r3, (r14, 0x44)
+    29da:	b80a      	st.w      	r0, (r14, 0x28)
+    29dc:	b824      	st.w      	r1, (r14, 0x10)
+    29de:	b842      	st.w      	r2, (r14, 0x8)
+    29e0:	b86b      	st.w      	r3, (r14, 0x2c)
+    29e2:	98f2      	ld.w      	r7, (r14, 0x48)
+    29e4:	e0000244 	bsr      	0x2e6c	// 2e6c <__isinf>
+    29e8:	3840      	cmpnei      	r0, 0
+    29ea:	0c0a      	bf      	0x29fe	// 29fe <__GI___dtostr+0x2c>
+    29ec:	0244      	lrw      	r2, 0x60eb	// 2cd8 <__GI___dtostr+0x306>
+    29ee:	6c5b      	mov      	r1, r6
+    29f0:	9802      	ld.w      	r0, (r14, 0x8)
+    29f2:	e3ffffdd 	bsr      	0x29ac	// 29ac <copystring>
+    29f6:	b809      	st.w      	r0, (r14, 0x24)
+    29f8:	9809      	ld.w      	r0, (r14, 0x24)
+    29fa:	140c      	addi      	r14, r14, 48
+    29fc:	1494      	pop      	r4-r7, r15
+    29fe:	980a      	ld.w      	r0, (r14, 0x28)
+    2a00:	9824      	ld.w      	r1, (r14, 0x10)
+    2a02:	e0000185 	bsr      	0x2d0c	// 2d0c <__isnan>
+    2a06:	3840      	cmpnei      	r0, 0
+    2a08:	b809      	st.w      	r0, (r14, 0x24)
+    2a0a:	0c03      	bf      	0x2a10	// 2a10 <__GI___dtostr+0x3e>
+    2a0c:	024b      	lrw      	r2, 0x60ef	// 2cdc <__GI___dtostr+0x30a>
+    2a0e:	07f0      	br      	0x29ee	// 29ee <__GI___dtostr+0x1c>
+    2a10:	3200      	movi      	r2, 0
+    2a12:	3300      	movi      	r3, 0
+    2a14:	980a      	ld.w      	r0, (r14, 0x28)
+    2a16:	9824      	ld.w      	r1, (r14, 0x10)
+    2a18:	e0000242 	bsr      	0x2e9c	// 2e9c <__eqdf2>
+    2a1c:	3840      	cmpnei      	r0, 0
+    2a1e:	082d      	bt      	0x2a78	// 2a78 <__GI___dtostr+0xa6>
+    2a20:	3f40      	cmpnei      	r7, 0
+    2a22:	0d57      	bf      	0x2cd0	// 2cd0 <__GI___dtostr+0x2fe>
+    2a24:	5fa6      	addi      	r5, r7, 2
+    2a26:	6558      	cmphs      	r6, r5
+    2a28:	0d56      	bf      	0x2cd4	// 2cd4 <__GI___dtostr+0x302>
+    2a2a:	3d40      	cmpnei      	r5, 0
+    2a2c:	0c0b      	bf      	0x2a42	// 2a42 <__GI___dtostr+0x70>
+    2a2e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a30:	39df      	btsti      	r1, 31
+    2a32:	0c1a      	bf      	0x2a66	// 2a66 <__GI___dtostr+0x94>
+    2a34:	9802      	ld.w      	r0, (r14, 0x8)
+    2a36:	322d      	movi      	r2, 45
+    2a38:	a040      	st.b      	r2, (r0, 0x0)
+    2a3a:	5d02      	addi      	r0, r5, 1
+    2a3c:	3501      	movi      	r5, 1
+    2a3e:	6414      	cmphs      	r5, r0
+    2a40:	0c16      	bf      	0x2a6c	// 2a6c <__GI___dtostr+0x9a>
+    2a42:	9882      	ld.w      	r4, (r14, 0x8)
+    2a44:	8420      	ld.b      	r1, (r4, 0x0)
+    2a46:	3330      	movi      	r3, 48
+    2a48:	64c6      	cmpne      	r1, r3
+    2a4a:	3000      	movi      	r0, 0
+    2a4c:	6001      	addc      	r0, r0
+    2a4e:	9842      	ld.w      	r2, (r14, 0x8)
+    2a50:	9822      	ld.w      	r1, (r14, 0x8)
+    2a52:	6008      	addu      	r0, r2
+    2a54:	342e      	movi      	r4, 46
+    2a56:	6054      	addu      	r1, r5
+    2a58:	3300      	movi      	r3, 0
+    2a5a:	a081      	st.b      	r4, (r0, 0x1)
+    2a5c:	b8a9      	st.w      	r5, (r14, 0x24)
+    2a5e:	a160      	st.b      	r3, (r1, 0x0)
+    2a60:	07cc      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2a62:	3501      	movi      	r5, 1
+    2a64:	07e5      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2a66:	6c17      	mov      	r0, r5
+    2a68:	3500      	movi      	r5, 0
+    2a6a:	07ea      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a6c:	9842      	ld.w      	r2, (r14, 0x8)
+    2a6e:	6094      	addu      	r2, r5
+    2a70:	3430      	movi      	r4, 48
+    2a72:	a280      	st.b      	r4, (r2, 0x0)
+    2a74:	2500      	addi      	r5, 1
+    2a76:	07e4      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a78:	3200      	movi      	r2, 0
+    2a7a:	3300      	movi      	r3, 0
+    2a7c:	980a      	ld.w      	r0, (r14, 0x28)
+    2a7e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a80:	e000022c 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2a84:	38df      	btsti      	r0, 31
+    2a86:	0c8e      	bf      	0x2ba2	// 2ba2 <__GI___dtostr+0x1d0>
+    2a88:	3180      	movi      	r1, 128
+    2a8a:	98a2      	ld.w      	r5, (r14, 0x8)
+    2a8c:	9884      	ld.w      	r4, (r14, 0x10)
+    2a8e:	4158      	lsli      	r2, r1, 24
+    2a90:	332d      	movi      	r3, 45
+    2a92:	a560      	st.b      	r3, (r5, 0x0)
+    2a94:	6108      	addu      	r4, r2
+    2a96:	2e00      	subi      	r6, 1
+    2a98:	2500      	addi      	r5, 1
+    2a9a:	3000      	movi      	r0, 0
+    2a9c:	032e      	lrw      	r1, 0x3fe00000	// 2ce0 <__GI___dtostr+0x30e>
+    2a9e:	3300      	movi      	r3, 0
+    2aa0:	b865      	st.w      	r3, (r14, 0x14)
+    2aa2:	9845      	ld.w      	r2, (r14, 0x14)
+    2aa4:	65ca      	cmpne      	r2, r7
+    2aa6:	0881      	bt      	0x2ba8	// 2ba8 <__GI___dtostr+0x1d6>
+    2aa8:	6c83      	mov      	r2, r0
+    2aaa:	6cc7      	mov      	r3, r1
+    2aac:	980a      	ld.w      	r0, (r14, 0x28)
+    2aae:	6c53      	mov      	r1, r4
+    2ab0:	e3fff2b6 	bsr      	0x101c	// 101c <__adddf3>
+    2ab4:	3200      	movi      	r2, 0
+    2ab6:	0373      	lrw      	r3, 0x3ff00000	// 2ce4 <__GI___dtostr+0x312>
+    2ab8:	b806      	st.w      	r0, (r14, 0x18)
+    2aba:	b827      	st.w      	r1, (r14, 0x1c)
+    2abc:	e000020e 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2ac0:	38df      	btsti      	r0, 31
+    2ac2:	0c05      	bf      	0x2acc	// 2acc <__GI___dtostr+0xfa>
+    2ac4:	3430      	movi      	r4, 48
+    2ac6:	a580      	st.b      	r4, (r5, 0x0)
+    2ac8:	2e00      	subi      	r6, 1
+    2aca:	2500      	addi      	r5, 1
+    2acc:	9804      	ld.w      	r0, (r14, 0x10)
+    2ace:	4021      	lsli      	r1, r0, 1
+    2ad0:	0379      	lrw      	r3, 0xfffffc01	// 2ce8 <__GI___dtostr+0x316>
+    2ad2:	4915      	lsri      	r0, r1, 21
+    2ad4:	600c      	addu      	r0, r3
+    2ad6:	e3fff4f5 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2ada:	035a      	lrw      	r2, 0x509f79ff	// 2cec <__GI___dtostr+0x31a>
+    2adc:	037a      	lrw      	r3, 0x3fd34413	// 2cf0 <__GI___dtostr+0x31e>
+    2ade:	e3fff2d3 	bsr      	0x1084	// 1084 <__muldf3>
+    2ae2:	e3fff527 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2ae6:	5842      	addi      	r2, r0, 1
+    2ae8:	3a20      	cmplti      	r2, 1
+    2aea:	b848      	st.w      	r2, (r14, 0x20)
+    2aec:	08e7      	bt      	0x2cba	// 2cba <__GI___dtostr+0x2e8>
+    2aee:	033d      	lrw      	r1, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2af0:	6dcb      	mov      	r7, r2
+    2af2:	3400      	movi      	r4, 0
+    2af4:	b823      	st.w      	r1, (r14, 0xc)
+    2af6:	3f0a      	cmphsi      	r7, 11
+    2af8:	085f      	bt      	0x2bb6	// 2bb6 <__GI___dtostr+0x1e4>
+    2afa:	3f41      	cmpnei      	r7, 1
+    2afc:	0868      	bt      	0x2bcc	// 2bcc <__GI___dtostr+0x1fa>
+    2afe:	135f      	lrw      	r2, 0xcccccccd	// 2cf8 <__GI___dtostr+0x326>
+    2b00:	137f      	lrw      	r3, 0x3feccccc	// 2cfc <__GI___dtostr+0x32a>
+    2b02:	6c13      	mov      	r0, r4
+    2b04:	9823      	ld.w      	r1, (r14, 0xc)
+    2b06:	e3fff483 	bsr      	0x140c	// 140c <__gtdf2>
+    2b0a:	3820      	cmplti      	r0, 1
+    2b0c:	0c6a      	bf      	0x2be0	// 2be0 <__GI___dtostr+0x20e>
+    2b0e:	9862      	ld.w      	r3, (r14, 0x8)
+    2b10:	64d6      	cmpne      	r5, r3
+    2b12:	0807      	bt      	0x2b20	// 2b20 <__GI___dtostr+0x14e>
+    2b14:	3e40      	cmpnei      	r6, 0
+    2b16:	0f71      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b18:	3230      	movi      	r2, 48
+    2b1a:	a540      	st.b      	r2, (r5, 0x0)
+    2b1c:	2e00      	subi      	r6, 1
+    2b1e:	2500      	addi      	r5, 1
+    2b20:	9805      	ld.w      	r0, (r14, 0x14)
+    2b22:	3840      	cmpnei      	r0, 0
+    2b24:	08cf      	bt      	0x2cc2	// 2cc2 <__GI___dtostr+0x2f0>
+    2b26:	9822      	ld.w      	r1, (r14, 0x8)
+    2b28:	5d65      	subu      	r3, r5, r1
+    2b2a:	2300      	addi      	r3, 1
+    2b2c:	984b      	ld.w      	r2, (r14, 0x2c)
+    2b2e:	648c      	cmphs      	r3, r2
+    2b30:	08a5      	bt      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b32:	3e40      	cmpnei      	r6, 0
+    2b34:	0f62      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b36:	372e      	movi      	r7, 46
+    2b38:	a5e0      	st.b      	r7, (r5, 0x0)
+    2b3a:	980b      	ld.w      	r0, (r14, 0x2c)
+    2b3c:	5de2      	addi      	r7, r5, 1
+    2b3e:	9822      	ld.w      	r1, (r14, 0x8)
+    2b40:	2000      	addi      	r0, 1
+    2b42:	5f65      	subu      	r3, r7, r1
+    2b44:	584d      	subu      	r2, r0, r3
+    2b46:	2e00      	subi      	r6, 1
+    2b48:	b845      	st.w      	r2, (r14, 0x14)
+    2b4a:	9805      	ld.w      	r0, (r14, 0x14)
+    2b4c:	6418      	cmphs      	r6, r0
+    2b4e:	0f55      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b50:	6d43      	mov      	r5, r0
+    2b52:	615c      	addu      	r5, r7
+    2b54:	36ff      	movi      	r6, 255
+    2b56:	655e      	cmpne      	r7, r5
+    2b58:	0c91      	bf      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b5a:	6c93      	mov      	r2, r4
+    2b5c:	9863      	ld.w      	r3, (r14, 0xc)
+    2b5e:	9806      	ld.w      	r0, (r14, 0x18)
+    2b60:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b62:	e3fff3ab 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b66:	e3fff4e5 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2b6a:	3130      	movi      	r1, 48
+    2b6c:	6040      	addu      	r1, r0
+    2b6e:	a720      	st.b      	r1, (r7, 0x0)
+    2b70:	6818      	and      	r0, r6
+    2b72:	e3fff4a7 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2b76:	6c93      	mov      	r2, r4
+    2b78:	9863      	ld.w      	r3, (r14, 0xc)
+    2b7a:	e3fff285 	bsr      	0x1084	// 1084 <__muldf3>
+    2b7e:	6c83      	mov      	r2, r0
+    2b80:	6cc7      	mov      	r3, r1
+    2b82:	9806      	ld.w      	r0, (r14, 0x18)
+    2b84:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b86:	e3fff263 	bsr      	0x104c	// 104c <__subdf3>
+    2b8a:	b806      	st.w      	r0, (r14, 0x18)
+    2b8c:	b827      	st.w      	r1, (r14, 0x1c)
+    2b8e:	6c13      	mov      	r0, r4
+    2b90:	9823      	ld.w      	r1, (r14, 0xc)
+    2b92:	3200      	movi      	r2, 0
+    2b94:	1278      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2b96:	e3fff391 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b9a:	2700      	addi      	r7, 1
+    2b9c:	6d03      	mov      	r4, r0
+    2b9e:	b823      	st.w      	r1, (r14, 0xc)
+    2ba0:	07db      	br      	0x2b56	// 2b56 <__GI___dtostr+0x184>
+    2ba2:	98a2      	ld.w      	r5, (r14, 0x8)
+    2ba4:	9884      	ld.w      	r4, (r14, 0x10)
+    2ba6:	077a      	br      	0x2a9a	// 2a9a <__GI___dtostr+0xc8>
+    2ba8:	1276      	lrw      	r3, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2baa:	1257      	lrw      	r2, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2bac:	e3fff26c 	bsr      	0x1084	// 1084 <__muldf3>
+    2bb0:	9865      	ld.w      	r3, (r14, 0x14)
+    2bb2:	2300      	addi      	r3, 1
+    2bb4:	0776      	br      	0x2aa0	// 2aa0 <__GI___dtostr+0xce>
+    2bb6:	3080      	movi      	r0, 128
+    2bb8:	4056      	lsli      	r2, r0, 22
+    2bba:	9823      	ld.w      	r1, (r14, 0xc)
+    2bbc:	6c13      	mov      	r0, r4
+    2bbe:	1273      	lrw      	r3, 0x4202a05f	// 2d08 <__GI___dtostr+0x336>
+    2bc0:	e3fff262 	bsr      	0x1084	// 1084 <__muldf3>
+    2bc4:	6d03      	mov      	r4, r0
+    2bc6:	b823      	st.w      	r1, (r14, 0xc)
+    2bc8:	2f09      	subi      	r7, 10
+    2bca:	0796      	br      	0x2af6	// 2af6 <__GI___dtostr+0x124>
+    2bcc:	6c13      	mov      	r0, r4
+    2bce:	9823      	ld.w      	r1, (r14, 0xc)
+    2bd0:	3200      	movi      	r2, 0
+    2bd2:	1269      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2bd4:	e3fff258 	bsr      	0x1084	// 1084 <__muldf3>
+    2bd8:	6d03      	mov      	r4, r0
+    2bda:	b823      	st.w      	r1, (r14, 0xc)
+    2bdc:	2f00      	subi      	r7, 1
+    2bde:	078e      	br      	0x2afa	// 2afa <__GI___dtostr+0x128>
+    2be0:	9863      	ld.w      	r3, (r14, 0xc)
+    2be2:	6c93      	mov      	r2, r4
+    2be4:	9806      	ld.w      	r0, (r14, 0x18)
+    2be6:	9827      	ld.w      	r1, (r14, 0x1c)
+    2be8:	e3fff368 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2bec:	e3fff4a2 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2bf0:	3f40      	cmpnei      	r7, 0
+    2bf2:	74c0      	zextb      	r3, r0
+    2bf4:	0c03      	bf      	0x2bfa	// 2bfa <__GI___dtostr+0x228>
+    2bf6:	3b40      	cmpnei      	r3, 0
+    2bf8:	0c58      	bf      	0x2ca8	// 2ca8 <__GI___dtostr+0x2d6>
+    2bfa:	232f      	addi      	r3, 48
+    2bfc:	3e40      	cmpnei      	r6, 0
+    2bfe:	a560      	st.b      	r3, (r5, 0x0)
+    2c00:	2500      	addi      	r5, 1
+    2c02:	0842      	bt      	0x2c86	// 2c86 <__GI___dtostr+0x2b4>
+    2c04:	6c93      	mov      	r2, r4
+    2c06:	9863      	ld.w      	r3, (r14, 0xc)
+    2c08:	980a      	ld.w      	r0, (r14, 0x28)
+    2c0a:	9824      	ld.w      	r1, (r14, 0x10)
+    2c0c:	e3fff356 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2c10:	9845      	ld.w      	r2, (r14, 0x14)
+    2c12:	988b      	ld.w      	r4, (r14, 0x2c)
+    2c14:	b841      	st.w      	r2, (r14, 0x4)
+    2c16:	b880      	st.w      	r4, (r14, 0x0)
+    2c18:	3300      	movi      	r3, 0
+    2c1a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c1c:	e3fffedb 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    2c20:	3840      	cmpnei      	r0, 0
+    2c22:	0eeb      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c24:	5dc0      	addu      	r6, r5, r0
+    2c26:	37fa      	movi      	r7, 250
+    2c28:	3565      	movi      	r5, 101
+    2c2a:	6c02      	nor      	r0, r0
+    2c2c:	a6a0      	st.b      	r5, (r6, 0x0)
+    2c2e:	6d03      	mov      	r4, r0
+    2c30:	5ea2      	addi      	r5, r6, 1
+    2c32:	3101      	movi      	r1, 1
+    2c34:	3604      	movi      	r6, 4
+    2c36:	47e2      	lsli      	r7, r7, 2
+    2c38:	9808      	ld.w      	r0, (r14, 0x20)
+    2c3a:	65c1      	cmplt      	r0, r7
+    2c3c:	0c03      	bf      	0x2c42	// 2c42 <__GI___dtostr+0x270>
+    2c3e:	3940      	cmpnei      	r1, 0
+    2c40:	0811      	bt      	0x2c62	// 2c62 <__GI___dtostr+0x290>
+    2c42:	3c40      	cmpnei      	r4, 0
+    2c44:	0c08      	bf      	0x2c54	// 2c54 <__GI___dtostr+0x282>
+    2c46:	6c5f      	mov      	r1, r7
+    2c48:	9808      	ld.w      	r0, (r14, 0x20)
+    2c4a:	e0000bd5 	bsr      	0x43f4	// 43f4 <__divsi3>
+    2c4e:	202f      	addi      	r0, 48
+    2c50:	a500      	st.b      	r0, (r5, 0x0)
+    2c52:	2500      	addi      	r5, 1
+    2c54:	6c5f      	mov      	r1, r7
+    2c56:	9808      	ld.w      	r0, (r14, 0x20)
+    2c58:	e0000bf2 	bsr      	0x443c	// 443c <__modsi3>
+    2c5c:	2c00      	subi      	r4, 1
+    2c5e:	b808      	st.w      	r0, (r14, 0x20)
+    2c60:	3100      	movi      	r1, 0
+    2c62:	b823      	st.w      	r1, (r14, 0xc)
+    2c64:	6c1f      	mov      	r0, r7
+    2c66:	310a      	movi      	r1, 10
+    2c68:	2e00      	subi      	r6, 1
+    2c6a:	e0000bc5 	bsr      	0x43f4	// 43f4 <__divsi3>
+    2c6e:	3e40      	cmpnei      	r6, 0
+    2c70:	6dc3      	mov      	r7, r0
+    2c72:	9823      	ld.w      	r1, (r14, 0xc)
+    2c74:	0be2      	bt      	0x2c38	// 2c38 <__GI___dtostr+0x266>
+    2c76:	3c40      	cmpnei      	r4, 0
+    2c78:	0ec0      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c7a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c7c:	3300      	movi      	r3, 0
+    2c7e:	5d89      	subu      	r4, r5, r2
+    2c80:	a560      	st.b      	r3, (r5, 0x0)
+    2c82:	b889      	st.w      	r4, (r14, 0x24)
+    2c84:	06ba      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c86:	7400      	zextb      	r0, r0
+    2c88:	e3fff41c 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2c8c:	6c93      	mov      	r2, r4
+    2c8e:	9863      	ld.w      	r3, (r14, 0xc)
+    2c90:	e3fff1fa 	bsr      	0x1084	// 1084 <__muldf3>
+    2c94:	6c83      	mov      	r2, r0
+    2c96:	6cc7      	mov      	r3, r1
+    2c98:	9806      	ld.w      	r0, (r14, 0x18)
+    2c9a:	9827      	ld.w      	r1, (r14, 0x1c)
+    2c9c:	e3fff1d8 	bsr      	0x104c	// 104c <__subdf3>
+    2ca0:	b806      	st.w      	r0, (r14, 0x18)
+    2ca2:	b827      	st.w      	r1, (r14, 0x1c)
+    2ca4:	2e00      	subi      	r6, 1
+    2ca6:	3700      	movi      	r7, 0
+    2ca8:	6c13      	mov      	r0, r4
+    2caa:	9823      	ld.w      	r1, (r14, 0xc)
+    2cac:	3200      	movi      	r2, 0
+    2cae:	1072      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2cb0:	e3fff304 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2cb4:	6d03      	mov      	r4, r0
+    2cb6:	b823      	st.w      	r1, (r14, 0xc)
+    2cb8:	0723      	br      	0x2afe	// 2afe <__GI___dtostr+0x12c>
+    2cba:	1012      	lrw      	r0, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2cbc:	1092      	lrw      	r4, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2cbe:	b803      	st.w      	r0, (r14, 0xc)
+    2cc0:	0727      	br      	0x2b0e	// 2b0e <__GI___dtostr+0x13c>
+    2cc2:	3e40      	cmpnei      	r6, 0
+    2cc4:	0e9a      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2cc6:	372e      	movi      	r7, 46
+    2cc8:	a5e0      	st.b      	r7, (r5, 0x0)
+    2cca:	2e00      	subi      	r6, 1
+    2ccc:	5de2      	addi      	r7, r5, 1
+    2cce:	073e      	br      	0x2b4a	// 2b4a <__GI___dtostr+0x178>
+    2cd0:	3e40      	cmpnei      	r6, 0
+    2cd2:	0ac8      	bt      	0x2a62	// 2a62 <__GI___dtostr+0x90>
+    2cd4:	3508      	movi      	r5, 8
+    2cd6:	06ac      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2cd8:	000060eb 	.long	0x000060eb
+    2cdc:	000060ef 	.long	0x000060ef
+    2ce0:	3fe00000 	.long	0x3fe00000
+    2ce4:	3ff00000 	.long	0x3ff00000
+    2ce8:	fffffc01 	.long	0xfffffc01
+    2cec:	509f79ff 	.long	0x509f79ff
+    2cf0:	3fd34413 	.long	0x3fd34413
+    2cf4:	40240000 	.long	0x40240000
+    2cf8:	cccccccd 	.long	0xcccccccd
+    2cfc:	3feccccc 	.long	0x3feccccc
+    2d00:	3fb99999 	.long	0x3fb99999
+    2d04:	9999999a 	.long	0x9999999a
+    2d08:	4202a05f 	.long	0x4202a05f
+
+00002d0c <__isnan>:
+    2d0c:	416c      	lsli      	r3, r1, 12
+    2d0e:	4b4c      	lsri      	r2, r3, 12
+    2d10:	6c08      	or      	r0, r2
+    2d12:	3840      	cmpnei      	r0, 0
+    2d14:	0c0e      	bf      	0x2d30	// 2d30 <__isnan+0x24>
+    2d16:	1008      	lrw      	r0, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d18:	6840      	and      	r1, r0
+    2d1a:	6cc7      	mov      	r3, r1
+    2d1c:	3000      	movi      	r0, 0
+    2d1e:	1026      	lrw      	r1, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d20:	3200      	movi      	r2, 0
+    2d22:	6c81      	xor      	r2, r0
+    2d24:	6cc5      	xor      	r3, r1
+    2d26:	6c8c      	or      	r2, r3
+    2d28:	3a40      	cmpnei      	r2, 0
+    2d2a:	6443      	mvcv      	r1
+    2d2c:	7404      	zextb      	r0, r1
+    2d2e:	783c      	jmp      	r15
+    2d30:	3000      	movi      	r0, 0
+    2d32:	07fe      	br      	0x2d2e	// 2d2e <__isnan+0x22>
+    2d34:	7ff00000 	.long	0x7ff00000
+
+00002d38 <__strlen_fast>:
+    2d38:	6c43      	mov      	r1, r0
+    2d3a:	3203      	movi      	r2, 3
+    2d3c:	6808      	and      	r0, r2
+    2d3e:	3840      	cmpnei      	r0, 0
+    2d40:	0c08      	bf      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d42:	3000      	movi      	r0, 0
+    2d44:	8140      	ld.b      	r2, (r1, 0x0)
+    2d46:	3a40      	cmpnei      	r2, 0
+    2d48:	0c20      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d4a:	2100      	addi      	r1, 1
+    2d4c:	2000      	addi      	r0, 1
+    2d4e:	07fb      	br      	0x2d44	// 2d44 <__strlen_fast+0xc>
+    2d50:	9140      	ld.w      	r2, (r1, 0x0)
+    2d52:	680b      	tstnbz      	r2
+    2d54:	0c04      	bf      	0x2d5c	// 2d5c <__strlen_fast+0x24>
+    2d56:	2103      	addi      	r1, 4
+    2d58:	2003      	addi      	r0, 4
+    2d5a:	07fb      	br      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d5c:	31ff      	movi      	r1, 255
+    2d5e:	6ccb      	mov      	r3, r2
+    2d60:	68c4      	and      	r3, r1
+    2d62:	3b40      	cmpnei      	r3, 0
+    2d64:	0c12      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d66:	2000      	addi      	r0, 1
+    2d68:	3110      	movi      	r1, 16
+    2d6a:	6ccb      	mov      	r3, r2
+    2d6c:	70c4      	lsl      	r3, r1
+    2d6e:	3118      	movi      	r1, 24
+    2d70:	70c5      	lsr      	r3, r1
+    2d72:	3b40      	cmpnei      	r3, 0
+    2d74:	0c0a      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d76:	2000      	addi      	r0, 1
+    2d78:	3108      	movi      	r1, 8
+    2d7a:	6ccb      	mov      	r3, r2
+    2d7c:	70c4      	lsl      	r3, r1
+    2d7e:	3118      	movi      	r1, 24
+    2d80:	70c5      	lsr      	r3, r1
+    2d82:	3b40      	cmpnei      	r3, 0
+    2d84:	0c02      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d86:	2000      	addi      	r0, 1
+    2d88:	783c      	jmp      	r15
+	...
+
+00002d8c <__strcpy_fast>:
+    2d8c:	14c1      	push      	r4
+    2d8e:	6d03      	mov      	r4, r0
+    2d90:	6c87      	mov      	r2, r1
+    2d92:	6c90      	or      	r2, r4
+    2d94:	3303      	movi      	r3, 3
+    2d96:	688c      	and      	r2, r3
+    2d98:	3a40      	cmpnei      	r2, 0
+    2d9a:	0c08      	bf      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2d9c:	8160      	ld.b      	r3, (r1, 0x0)
+    2d9e:	a460      	st.b      	r3, (r4, 0x0)
+    2da0:	2100      	addi      	r1, 1
+    2da2:	2400      	addi      	r4, 1
+    2da4:	3b40      	cmpnei      	r3, 0
+    2da6:	0bfb      	bt      	0x2d9c	// 2d9c <__strcpy_fast+0x10>
+    2da8:	1481      	pop      	r4
+    2daa:	9160      	ld.w      	r3, (r1, 0x0)
+    2dac:	680f      	tstnbz      	r3
+    2dae:	0c2e      	bf      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2db0:	b460      	st.w      	r3, (r4, 0x0)
+    2db2:	9161      	ld.w      	r3, (r1, 0x4)
+    2db4:	680f      	tstnbz      	r3
+    2db6:	0c1d      	bf      	0x2df0	// 2df0 <__strcpy_fast+0x64>
+    2db8:	b461      	st.w      	r3, (r4, 0x4)
+    2dba:	9162      	ld.w      	r3, (r1, 0x8)
+    2dbc:	680f      	tstnbz      	r3
+    2dbe:	0c1b      	bf      	0x2df4	// 2df4 <__strcpy_fast+0x68>
+    2dc0:	b462      	st.w      	r3, (r4, 0x8)
+    2dc2:	9163      	ld.w      	r3, (r1, 0xc)
+    2dc4:	680f      	tstnbz      	r3
+    2dc6:	0c19      	bf      	0x2df8	// 2df8 <__strcpy_fast+0x6c>
+    2dc8:	b463      	st.w      	r3, (r4, 0xc)
+    2dca:	9164      	ld.w      	r3, (r1, 0x10)
+    2dcc:	680f      	tstnbz      	r3
+    2dce:	0c17      	bf      	0x2dfc	// 2dfc <__strcpy_fast+0x70>
+    2dd0:	b464      	st.w      	r3, (r4, 0x10)
+    2dd2:	9165      	ld.w      	r3, (r1, 0x14)
+    2dd4:	680f      	tstnbz      	r3
+    2dd6:	0c15      	bf      	0x2e00	// 2e00 <__strcpy_fast+0x74>
+    2dd8:	b465      	st.w      	r3, (r4, 0x14)
+    2dda:	9166      	ld.w      	r3, (r1, 0x18)
+    2ddc:	680f      	tstnbz      	r3
+    2dde:	0c13      	bf      	0x2e04	// 2e04 <__strcpy_fast+0x78>
+    2de0:	b466      	st.w      	r3, (r4, 0x18)
+    2de2:	9167      	ld.w      	r3, (r1, 0x1c)
+    2de4:	680f      	tstnbz      	r3
+    2de6:	0c11      	bf      	0x2e08	// 2e08 <__strcpy_fast+0x7c>
+    2de8:	b467      	st.w      	r3, (r4, 0x1c)
+    2dea:	241f      	addi      	r4, 32
+    2dec:	211f      	addi      	r1, 32
+    2dee:	07de      	br      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2df0:	2403      	addi      	r4, 4
+    2df2:	040c      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df4:	2407      	addi      	r4, 8
+    2df6:	040a      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df8:	240b      	addi      	r4, 12
+    2dfa:	0408      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2dfc:	240f      	addi      	r4, 16
+    2dfe:	0406      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e00:	2413      	addi      	r4, 20
+    2e02:	0404      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e04:	2417      	addi      	r4, 24
+    2e06:	0402      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e08:	241b      	addi      	r4, 28
+    2e0a:	3118      	movi      	r1, 24
+    2e0c:	6c8f      	mov      	r2, r3
+    2e0e:	7084      	lsl      	r2, r1
+    2e10:	7085      	lsr      	r2, r1
+    2e12:	a440      	st.b      	r2, (r4, 0x0)
+    2e14:	3a40      	cmpnei      	r2, 0
+    2e16:	0c12      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e18:	3110      	movi      	r1, 16
+    2e1a:	6c8f      	mov      	r2, r3
+    2e1c:	7084      	lsl      	r2, r1
+    2e1e:	3118      	movi      	r1, 24
+    2e20:	7085      	lsr      	r2, r1
+    2e22:	a441      	st.b      	r2, (r4, 0x1)
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0c0a      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e28:	3108      	movi      	r1, 8
+    2e2a:	6c8f      	mov      	r2, r3
+    2e2c:	7084      	lsl      	r2, r1
+    2e2e:	3118      	movi      	r1, 24
+    2e30:	7085      	lsr      	r2, r1
+    2e32:	a442      	st.b      	r2, (r4, 0x2)
+    2e34:	3a40      	cmpnei      	r2, 0
+    2e36:	0c02      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e38:	b460      	st.w      	r3, (r4, 0x0)
+    2e3a:	1481      	pop      	r4
+
+00002e3c <__GI_strchr>:
+    2e3c:	8040      	ld.b      	r2, (r0, 0x0)
+    2e3e:	644a      	cmpne      	r2, r1
+    2e40:	0c06      	bf      	0x2e4c	// 2e4c <__GI_strchr+0x10>
+    2e42:	3a40      	cmpnei      	r2, 0
+    2e44:	0c03      	bf      	0x2e4a	// 2e4a <__GI_strchr+0xe>
+    2e46:	2000      	addi      	r0, 1
+    2e48:	07fa      	br      	0x2e3c	// 2e3c <__GI_strchr>
+    2e4a:	6c0b      	mov      	r0, r2
+    2e4c:	783c      	jmp      	r15
+	...
+
+00002e50 <__GI_strerror>:
+    2e50:	338f      	movi      	r3, 143
+    2e52:	640c      	cmphs      	r3, r0
+    2e54:	0c06      	bf      	0x2e60	// 2e60 <__GI_strerror+0x10>
+    2e56:	4002      	lsli      	r0, r0, 2
+    2e58:	1023      	lrw      	r1, 0x5d10	// 2e64 <__GI_strerror+0x14>
+    2e5a:	6004      	addu      	r0, r1
+    2e5c:	9000      	ld.w      	r0, (r0, 0x0)
+    2e5e:	783c      	jmp      	r15
+    2e60:	1002      	lrw      	r0, 0x5f77	// 2e68 <__GI_strerror+0x18>
+    2e62:	07fe      	br      	0x2e5e	// 2e5e <__GI_strerror+0xe>
+    2e64:	00005d10 	.long	0x00005d10
+    2e68:	00005f77 	.long	0x00005f77
+
+00002e6c <__isinf>:
+    2e6c:	3840      	cmpnei      	r0, 0
+    2e6e:	6c83      	mov      	r2, r0
+    2e70:	6cc7      	mov      	r3, r1
+    2e72:	0804      	bt      	0x2e7a	// 2e7a <__isinf+0xe>
+    2e74:	1028      	lrw      	r1, 0x7ff00000	// 2e94 <__isinf+0x28>
+    2e76:	644e      	cmpne      	r3, r1
+    2e78:	0c0b      	bf      	0x2e8e	// 2e8e <__isinf+0x22>
+    2e7a:	3000      	movi      	r0, 0
+    2e7c:	1027      	lrw      	r1, 0xfff00000	// 2e98 <__isinf+0x2c>
+    2e7e:	6c81      	xor      	r2, r0
+    2e80:	6cc5      	xor      	r3, r1
+    2e82:	6c8c      	or      	r2, r3
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	64c3      	mvcv      	r3
+    2e88:	3000      	movi      	r0, 0
+    2e8a:	600e      	subu      	r0, r3
+    2e8c:	783c      	jmp      	r15
+    2e8e:	3001      	movi      	r0, 1
+    2e90:	07fe      	br      	0x2e8c	// 2e8c <__isinf+0x20>
+    2e92:	0000      	bkpt
+    2e94:	7ff00000 	.long	0x7ff00000
+    2e98:	fff00000 	.long	0xfff00000
+
+00002e9c <__eqdf2>:
+    2e9c:	14d0      	push      	r15
+    2e9e:	142e      	subi      	r14, r14, 56
+    2ea0:	b800      	st.w      	r0, (r14, 0x0)
+    2ea2:	b821      	st.w      	r1, (r14, 0x4)
+    2ea4:	6c3b      	mov      	r0, r14
+    2ea6:	1904      	addi      	r1, r14, 16
+    2ea8:	b863      	st.w      	r3, (r14, 0xc)
+    2eaa:	b842      	st.w      	r2, (r14, 0x8)
+    2eac:	e3fff4b4 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb0:	1909      	addi      	r1, r14, 36
+    2eb2:	1802      	addi      	r0, r14, 8
+    2eb4:	e3fff4b0 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb8:	9864      	ld.w      	r3, (r14, 0x10)
+    2eba:	3b01      	cmphsi      	r3, 2
+    2ebc:	0c0a      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ebe:	9869      	ld.w      	r3, (r14, 0x24)
+    2ec0:	3b01      	cmphsi      	r3, 2
+    2ec2:	0c07      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ec4:	1909      	addi      	r1, r14, 36
+    2ec6:	1804      	addi      	r0, r14, 16
+    2ec8:	e3fff508 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2ecc:	140e      	addi      	r14, r14, 56
+    2ece:	1490      	pop      	r15
+    2ed0:	3001      	movi      	r0, 1
+    2ed2:	140e      	addi      	r14, r14, 56
+    2ed4:	1490      	pop      	r15
+	...
+
+00002ed8 <__ltdf2>:
+    2ed8:	14d0      	push      	r15
+    2eda:	142e      	subi      	r14, r14, 56
+    2edc:	b800      	st.w      	r0, (r14, 0x0)
+    2ede:	b821      	st.w      	r1, (r14, 0x4)
+    2ee0:	6c3b      	mov      	r0, r14
+    2ee2:	1904      	addi      	r1, r14, 16
+    2ee4:	b863      	st.w      	r3, (r14, 0xc)
+    2ee6:	b842      	st.w      	r2, (r14, 0x8)
+    2ee8:	e3fff496 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eec:	1909      	addi      	r1, r14, 36
+    2eee:	1802      	addi      	r0, r14, 8
+    2ef0:	e3fff492 	bsr      	0x1814	// 1814 <__unpack_d>
+    2ef4:	9864      	ld.w      	r3, (r14, 0x10)
+    2ef6:	3b01      	cmphsi      	r3, 2
+    2ef8:	0c0a      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2efa:	9869      	ld.w      	r3, (r14, 0x24)
+    2efc:	3b01      	cmphsi      	r3, 2
+    2efe:	0c07      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2f00:	1909      	addi      	r1, r14, 36
+    2f02:	1804      	addi      	r0, r14, 16
+    2f04:	e3fff4ea 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2f08:	140e      	addi      	r14, r14, 56
+    2f0a:	1490      	pop      	r15
+    2f0c:	3001      	movi      	r0, 1
+    2f0e:	140e      	addi      	r14, r14, 56
+    2f10:	1490      	pop      	r15
+
+Disassembly of section .text.__main:
+
+00002f14 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    2f14:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    2f16:	1009      	lrw      	r0, 0x20000000	// 2f38 <__main+0x24>
+    2f18:	1029      	lrw      	r1, 0x687c	// 2f3c <__main+0x28>
+    2f1a:	6442      	cmpne      	r0, r1
+    2f1c:	0c05      	bf      	0x2f26	// 2f26 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    2f1e:	1049      	lrw      	r2, 0x200000a0	// 2f40 <__main+0x2c>
+    2f20:	6082      	subu      	r2, r0
+    2f22:	e3fff5c1 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    2f26:	1048      	lrw      	r2, 0x20000770	// 2f44 <__main+0x30>
+    2f28:	1008      	lrw      	r0, 0x200000a0	// 2f48 <__main+0x34>
+    2f2a:	640a      	cmpne      	r2, r0
+    2f2c:	0c05      	bf      	0x2f36	// 2f36 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    2f2e:	6082      	subu      	r2, r0
+    2f30:	3100      	movi      	r1, 0
+    2f32:	e3fff575 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+  }
+
+	
+}
+    2f36:	1490      	pop      	r15
+    2f38:	20000000 	.long	0x20000000
+    2f3c:	0000687c 	.long	0x0000687c
+    2f40:	200000a0 	.long	0x200000a0
+    2f44:	20000770 	.long	0x20000770
+    2f48:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00002f4c <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    2f4c:	3848      	cmpnei      	r0, 8
+    2f4e:	080a      	bt      	0x2f62	// 2f62 <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    2f50:	107a      	lrw      	r3, 0x2000004c	// 2fb8 <SYSCON_General_CMD.part.0+0x6c>
+    2f52:	32ff      	movi      	r2, 255
+    2f54:	9320      	ld.w      	r1, (r3, 0x0)
+    2f56:	9160      	ld.w      	r3, (r1, 0x0)
+    2f58:	424c      	lsli      	r2, r2, 12
+    2f5a:	68c9      	andn      	r3, r2
+    2f5c:	3bae      	bseti      	r3, 14
+    2f5e:	3bb2      	bseti      	r3, 18
+    2f60:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    2f62:	1077      	lrw      	r3, 0x2000005c	// 2fbc <SYSCON_General_CMD.part.0+0x70>
+    2f64:	9360      	ld.w      	r3, (r3, 0x0)
+    2f66:	9341      	ld.w      	r2, (r3, 0x4)
+    2f68:	6c80      	or      	r2, r0
+    2f6a:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    2f6c:	9343      	ld.w      	r2, (r3, 0xc)
+    2f6e:	6880      	and      	r2, r0
+    2f70:	3a40      	cmpnei      	r2, 0
+    2f72:	0ffd      	bf      	0x2f6c	// 2f6c <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    2f74:	3842      	cmpnei      	r0, 2
+    2f76:	0807      	bt      	0x2f84	// 2f84 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    2f78:	3102      	movi      	r1, 2
+    2f7a:	9344      	ld.w      	r2, (r3, 0x10)
+    2f7c:	6884      	and      	r2, r1
+    2f7e:	3a40      	cmpnei      	r2, 0
+    2f80:	0ffd      	bf      	0x2f7a	// 2f7a <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    2f82:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    2f84:	3802      	cmphsi      	r0, 3
+    2f86:	0809      	bt      	0x2f98	// 2f98 <SYSCON_General_CMD.part.0+0x4c>
+    2f88:	3841      	cmpnei      	r0, 1
+    2f8a:	0bfc      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    2f8c:	3101      	movi      	r1, 1
+    2f8e:	9344      	ld.w      	r2, (r3, 0x10)
+    2f90:	6884      	and      	r2, r1
+    2f92:	3a40      	cmpnei      	r2, 0
+    2f94:	0ffd      	bf      	0x2f8e	// 2f8e <SYSCON_General_CMD.part.0+0x42>
+    2f96:	07f6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2f98:	3848      	cmpnei      	r0, 8
+    2f9a:	0807      	bt      	0x2fa8	// 2fa8 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	9344      	ld.w      	r2, (r3, 0x10)
+    2fa0:	6884      	and      	r2, r1
+    2fa2:	3a40      	cmpnei      	r2, 0
+    2fa4:	0ffd      	bf      	0x2f9e	// 2f9e <SYSCON_General_CMD.part.0+0x52>
+    2fa6:	07ee      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2fa8:	3850      	cmpnei      	r0, 16
+    2faa:	0bec      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    2fac:	3110      	movi      	r1, 16
+    2fae:	9344      	ld.w      	r2, (r3, 0x10)
+    2fb0:	6884      	and      	r2, r1
+    2fb2:	3a40      	cmpnei      	r2, 0
+    2fb4:	0ffd      	bf      	0x2fae	// 2fae <SYSCON_General_CMD.part.0+0x62>
+    2fb6:	07e6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+    2fb8:	2000004c 	.long	0x2000004c
+    2fbc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00002fc0 <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    2fc0:	106c      	lrw      	r3, 0x2000005c	// 2ff0 <SYSCON_RST_VALUE+0x30>
+    2fc2:	104d      	lrw      	r2, 0xffff	// 2ff4 <SYSCON_RST_VALUE+0x34>
+    2fc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2fc6:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    2fc8:	104c      	lrw      	r2, 0xffffff	// 2ff8 <SYSCON_RST_VALUE+0x38>
+    2fca:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    2fcc:	104c      	lrw      	r2, 0xd22d0000	// 2ffc <SYSCON_RST_VALUE+0x3c>
+    2fce:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    2fd0:	104c      	lrw      	r2, 0x70ff3bff	// 3000 <SYSCON_RST_VALUE+0x40>
+    2fd2:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    2fd4:	320a      	movi      	r2, 10
+    2fd6:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fd8:	102b      	lrw      	r1, 0x70c	// 3004 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    2fda:	237f      	addi      	r3, 128
+    2fdc:	3200      	movi      	r2, 0
+    2fde:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    2fe0:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fe2:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    2fe4:	1029      	lrw      	r1, 0x3fe	// 3008 <SYSCON_RST_VALUE+0x48>
+    2fe6:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    2fe8:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    2fea:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    2fec:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    2fee:	783c      	jmp      	r15
+    2ff0:	2000005c 	.long	0x2000005c
+    2ff4:	0000ffff 	.long	0x0000ffff
+    2ff8:	00ffffff 	.long	0x00ffffff
+    2ffc:	d22d0000 	.long	0xd22d0000
+    3000:	70ff3bff 	.long	0x70ff3bff
+    3004:	0000070c 	.long	0x0000070c
+    3008:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+0000300c <SYSCON_General_CMD>:
+{
+    300c:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    300e:	3840      	cmpnei      	r0, 0
+    3010:	0c05      	bf      	0x301a	// 301a <SYSCON_General_CMD+0xe>
+    3012:	6c07      	mov      	r0, r1
+    3014:	e3ffff9c 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+}
+    3018:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    301a:	1068      	lrw      	r3, 0x2000005c	// 3038 <SYSCON_General_CMD+0x2c>
+    301c:	9360      	ld.w      	r3, (r3, 0x0)
+    301e:	9342      	ld.w      	r2, (r3, 0x8)
+    3020:	6c84      	or      	r2, r1
+    3022:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    3024:	9343      	ld.w      	r2, (r3, 0xc)
+    3026:	6884      	and      	r2, r1
+    3028:	3a40      	cmpnei      	r2, 0
+    302a:	0bfd      	bt      	0x3024	// 3024 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    302c:	237f      	addi      	r3, 128
+    302e:	9301      	ld.w      	r0, (r3, 0x4)
+    3030:	6c40      	or      	r1, r0
+    3032:	b321      	st.w      	r1, (r3, 0x4)
+}
+    3034:	07f2      	br      	0x3018	// 3018 <SYSCON_General_CMD+0xc>
+    3036:	0000      	bkpt
+    3038:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+0000303c <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    303c:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    303e:	3b48      	cmpnei      	r3, 8
+    3040:	0828      	bt      	0x3090	// 3090 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    3042:	109d      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3044:	3501      	movi      	r5, 1
+    3046:	9480      	ld.w      	r4, (r4, 0x0)
+    3048:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    304a:	3504      	movi      	r5, 4
+    304c:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    304e:	5b83      	subi      	r4, r3, 1
+    3050:	3c01      	cmphsi      	r4, 2
+    3052:	0c2b      	bf      	0x30a8	// 30a8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    3054:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    3056:	3c04      	cmphsi      	r4, 5
+    3058:	0c03      	bf      	0x305e	// 305e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    305a:	3b4b      	cmpnei      	r3, 11
+    305c:	0807      	bt      	0x306a	// 306a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    305e:	1076      	lrw      	r3, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3060:	3401      	movi      	r4, 1
+    3062:	9360      	ld.w      	r3, (r3, 0x0)
+    3064:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    3066:	3400      	movi      	r4, 0
+    3068:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    306a:	1094      	lrw      	r4, 0xd22d0000	// 30b8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    306c:	6c10      	or      	r0, r4
+    306e:	1074      	lrw      	r3, 0x2000005c	// 30bc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    3070:	6c40      	or      	r1, r0
+    3072:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3074:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    3076:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3078:	4001      	lsli      	r0, r0, 1
+    307a:	9324      	ld.w      	r1, (r3, 0x10)
+    307c:	6840      	and      	r1, r0
+    307e:	3940      	cmpnei      	r1, 0
+    3080:	0ffd      	bf      	0x307a	// 307a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    3082:	1030      	lrw      	r1, 0xc33c0000	// 30c0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    3084:	6c48      	or      	r1, r2
+    3086:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    3088:	9328      	ld.w      	r1, (r3, 0x20)
+    308a:	644a      	cmpne      	r2, r1
+    308c:	0bfe      	bt      	0x3088	// 3088 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    308e:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    3090:	3b40      	cmpnei      	r3, 0
+    3092:	0c03      	bf      	0x3098	// 3098 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    3094:	3b49      	cmpnei      	r3, 9
+    3096:	0807      	bt      	0x30a4	// 30a4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    3098:	1087      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    309a:	3501      	movi      	r5, 1
+    309c:	9480      	ld.w      	r4, (r4, 0x0)
+    309e:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    30a0:	3502      	movi      	r5, 2
+    30a2:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    30a4:	3b4a      	cmpnei      	r3, 10
+    30a6:	0bd4      	bt      	0x304e	// 304e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    30a8:	1083      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    30aa:	3501      	movi      	r5, 1
+    30ac:	9480      	ld.w      	r4, (r4, 0x0)
+    30ae:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    30b0:	b4a5      	st.w      	r5, (r4, 0x14)
+    30b2:	07d1      	br      	0x3054	// 3054 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    30b4:	20000060 	.long	0x20000060
+    30b8:	d22d0000 	.long	0xd22d0000
+    30bc:	2000005c 	.long	0x2000005c
+    30c0:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+000030c4 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    30c4:	14d1      	push      	r4, r15
+    30c6:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    30c8:	3110      	movi      	r1, 16
+    30ca:	3000      	movi      	r0, 0
+    30cc:	e3ffffa0 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    30d0:	1066      	lrw      	r3, 0x2000005c	// 30e8 <SYSCON_HFOSC_SELECTE+0x24>
+    30d2:	9360      	ld.w      	r3, (r3, 0x0)
+    30d4:	9319      	ld.w      	r0, (r3, 0x64)
+    30d6:	3884      	bclri      	r0, 4
+    30d8:	3885      	bclri      	r0, 5
+    30da:	6c10      	or      	r0, r4
+    30dc:	b319      	st.w      	r0, (r3, 0x64)
+    30de:	3010      	movi      	r0, 16
+    30e0:	e3ffff36 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    30e4:	1491      	pop      	r4, r15
+    30e6:	0000      	bkpt
+    30e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+000030ec <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    30ec:	106c      	lrw      	r3, 0x2000005c	// 311c <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    30ee:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f0:	9360      	ld.w      	r3, (r3, 0x0)
+    30f2:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    30f4:	0c0a      	bf      	0x3108	// 3108 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f6:	104b      	lrw      	r2, 0x78870000	// 3120 <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30f8:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30fa:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30fc:	4125      	lsli      	r1, r1, 5
+    30fe:	934d      	ld.w      	r2, (r3, 0x34)
+    3100:	6884      	and      	r2, r1
+    3102:	3a40      	cmpnei      	r2, 0
+    3104:	0ffd      	bf      	0x30fe	// 30fe <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    3106:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    3108:	1047      	lrw      	r2, 0x788755aa	// 3124 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310a:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    310c:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310e:	4125      	lsli      	r1, r1, 5
+    3110:	934d      	ld.w      	r2, (r3, 0x34)
+    3112:	6884      	and      	r2, r1
+    3114:	3a40      	cmpnei      	r2, 0
+    3116:	0bfd      	bt      	0x3110	// 3110 <SYSCON_WDT_CMD+0x24>
+    3118:	07f7      	br      	0x3106	// 3106 <SYSCON_WDT_CMD+0x1a>
+    311a:	0000      	bkpt
+    311c:	2000005c 	.long	0x2000005c
+    3120:	78870000 	.long	0x78870000
+    3124:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00003128 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    3128:	1064      	lrw      	r3, 0x2000005c	// 3138 <SYSCON_IWDCNT_Reload+0x10>
+    312a:	32b4      	movi      	r2, 180
+    312c:	9360      	ld.w      	r3, (r3, 0x0)
+    312e:	237f      	addi      	r3, 128
+    3130:	4257      	lsli      	r2, r2, 23
+    3132:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    3134:	783c      	jmp      	r15
+    3136:	0000      	bkpt
+    3138:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+0000313c <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    313c:	1044      	lrw      	r2, 0x87780000	// 314c <SYSCON_IWDCNT_Config+0x10>
+    313e:	1065      	lrw      	r3, 0x2000005c	// 3150 <SYSCON_IWDCNT_Config+0x14>
+    3140:	6c48      	or      	r1, r2
+    3142:	9360      	ld.w      	r3, (r3, 0x0)
+    3144:	6c04      	or      	r0, r1
+    3146:	237f      	addi      	r3, 128
+    3148:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    314a:	783c      	jmp      	r15
+    314c:	87780000 	.long	0x87780000
+    3150:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00003154 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    3154:	14c3      	push      	r4-r6
+    3156:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    3158:	10c5      	lrw      	r6, 0xb44b0000	// 316c <SYSCON_LVD_Config+0x18>
+    315a:	6d18      	or      	r4, r6
+    315c:	6cd0      	or      	r3, r4
+    315e:	6c8c      	or      	r2, r3
+    3160:	6c48      	or      	r1, r2
+    3162:	10a4      	lrw      	r5, 0x2000005c	// 3170 <SYSCON_LVD_Config+0x1c>
+    3164:	6c04      	or      	r0, r1
+    3166:	95a0      	ld.w      	r5, (r5, 0x0)
+    3168:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    316a:	1483      	pop      	r4-r6
+    316c:	b44b0000 	.long	0xb44b0000
+    3170:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00003174 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    3174:	1066      	lrw      	r3, 0x2000005c	// 318c <LVD_Int_Enable+0x18>
+    3176:	3180      	movi      	r1, 128
+    3178:	9360      	ld.w      	r3, (r3, 0x0)
+    317a:	3280      	movi      	r2, 128
+    317c:	604c      	addu      	r1, r3
+    317e:	4244      	lsli      	r2, r2, 4
+    3180:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    3182:	935d      	ld.w      	r2, (r3, 0x74)
+    3184:	3aab      	bseti      	r2, 11
+    3186:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    3188:	783c      	jmp      	r15
+    318a:	0000      	bkpt
+    318c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00003190 <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    3190:	1066      	lrw      	r3, 0x2000005c	// 31a8 <IWDT_Int_Enable+0x18>
+    3192:	3180      	movi      	r1, 128
+    3194:	9360      	ld.w      	r3, (r3, 0x0)
+    3196:	3280      	movi      	r2, 128
+    3198:	604c      	addu      	r1, r3
+    319a:	4241      	lsli      	r2, r2, 1
+    319c:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    319e:	935d      	ld.w      	r2, (r3, 0x74)
+    31a0:	3aa8      	bseti      	r2, 8
+    31a2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    31a4:	783c      	jmp      	r15
+    31a6:	0000      	bkpt
+    31a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+000031ac <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    31ac:	3a40      	cmpnei      	r2, 0
+    31ae:	0c04      	bf      	0x31b6	// 31b6 <EXTI_trigger_CMD+0xa>
+    31b0:	3a41      	cmpnei      	r2, 1
+    31b2:	0c0e      	bf      	0x31ce	// 31ce <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    31b4:	783c      	jmp      	r15
+    31b6:	106d      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31b8:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    31ba:	9360      	ld.w      	r3, (r3, 0x0)
+    31bc:	237f      	addi      	r3, 128
+    31be:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    31c0:	0c04      	bf      	0x31c8	// 31c8 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    31c2:	6c48      	or      	r1, r2
+    31c4:	b325      	st.w      	r1, (r3, 0x14)
+    31c6:	07f7      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    31c8:	6885      	andn      	r2, r1
+    31ca:	b345      	st.w      	r2, (r3, 0x14)
+    31cc:	07f4      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31ce:	1067      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31d0:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    31d2:	9360      	ld.w      	r3, (r3, 0x0)
+    31d4:	237f      	addi      	r3, 128
+    31d6:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    31d8:	0c04      	bf      	0x31e0	// 31e0 <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    31da:	6c48      	or      	r1, r2
+    31dc:	b326      	st.w      	r1, (r3, 0x18)
+    31de:	07eb      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    31e0:	6885      	andn      	r2, r1
+    31e2:	b346      	st.w      	r2, (r3, 0x18)
+}
+    31e4:	07e8      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31e6:	0000      	bkpt
+    31e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+000031ec <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    31ec:	3202      	movi      	r2, 2
+    31ee:	1062      	lrw      	r3, 0xe000e100	// 31f4 <SYSCON_Int_Enable+0x8>
+    31f0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    31f2:	783c      	jmp      	r15
+    31f4:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+000031f8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31f8:	1066      	lrw      	r3, 0xe000e400	// 3210 <SYSCON_INT_Priority+0x18>
+    31fa:	1047      	lrw      	r2, 0xc0c0c0c0	// 3214 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    31fc:	1027      	lrw      	r1, 0xc0c000c0	// 3218 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31fe:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    3200:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    3202:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    3204:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    3206:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    3208:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    320a:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    320c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    320e:	783c      	jmp      	r15
+    3210:	e000e400 	.long	0xe000e400
+    3214:	c0c0c0c0 	.long	0xc0c0c0c0
+    3218:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+0000321c <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    321c:	14c1      	push      	r4
+    321e:	4862      	lsri      	r3, r0, 2
+    3220:	4342      	lsli      	r2, r3, 2
+    3222:	106a      	lrw      	r3, 0x20000064	// 3248 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    3224:	3403      	movi      	r4, 3
+    3226:	9360      	ld.w      	r3, (r3, 0x0)
+    3228:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    322a:	3280      	movi      	r2, 128
+    322c:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    322e:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    3230:	60c8      	addu      	r3, r2
+    3232:	4003      	lsli      	r0, r0, 3
+    3234:	34ff      	movi      	r4, 255
+    3236:	9340      	ld.w      	r2, (r3, 0x0)
+    3238:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    323c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323e:	7040      	lsl      	r1, r0
+    3240:	6c48      	or      	r1, r2
+    3242:	b320      	st.w      	r1, (r3, 0x0)
+}
+    3244:	1481      	pop      	r4
+    3246:	0000      	bkpt
+    3248:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+0000324c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    324c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    324e:	3907      	cmphsi      	r1, 8
+{
+    3250:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    3252:	0830      	bt      	0x32b2	// 32b2 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    3254:	5903      	subi      	r0, r1, 1
+    3256:	3806      	cmphsi      	r0, 7
+    3258:	0827      	bt      	0x32a6	// 32a6 <GPIO_Init+0x5a>
+    325a:	e3ffed51 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    325e:	1004      	.short	0x1004
+    3260:	1d1a1613 	.long	0x1d1a1613
+    3264:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    3266:	3300      	movi      	r3, 0
+    3268:	3104      	movi      	r1, 4
+    326a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    326c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    326e:	9440      	ld.w      	r2, (r4, 0x0)
+    3270:	68c8      	and      	r3, r2
+        if (Dir)
+    3272:	0c1e      	bf      	0x32ae	// 32ae <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    3274:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    3276:	7084      	lsl      	r2, r1
+    3278:	6cc8      	or      	r3, r2
+    327a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    327c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    327e:	3108      	movi      	r1, 8
+    3280:	1166      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    3282:	07f5      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    3284:	310c      	movi      	r1, 12
+    3286:	1166      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    3288:	07f2      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    328a:	3110      	movi      	r1, 16
+    328c:	1165      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    328e:	2b00      	subi      	r3, 1
+    3290:	07ee      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    3292:	3114      	movi      	r1, 20
+    3294:	1164      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    3296:	07fc      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    3298:	33f1      	movi      	r3, 241
+    329a:	3118      	movi      	r1, 24
+    329c:	4378      	lsli      	r3, r3, 24
+    329e:	07f8      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    32a0:	311c      	movi      	r1, 28
+    32a2:	1162      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    32a4:	07e4      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    32a6:	3300      	movi      	r3, 0
+    32a8:	3100      	movi      	r1, 0
+    32aa:	2b0f      	subi      	r3, 16
+    32ac:	07e0      	br      	0x326c	// 326c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    32ae:	3202      	movi      	r2, 2
+    32b0:	07e3      	br      	0x3276	// 3276 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    32b2:	390f      	cmphsi      	r1, 16
+    32b4:	0be4      	bt      	0x327c	// 327c <GPIO_Init+0x30>
+        switch (PinNum)
+    32b6:	2908      	subi      	r1, 9
+    32b8:	3906      	cmphsi      	r1, 7
+    32ba:	6c07      	mov      	r0, r1
+    32bc:	0827      	bt      	0x330a	// 330a <GPIO_Init+0xbe>
+    32be:	e3ffed1f 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    32c2:	1004      	.short	0x1004
+    32c4:	1d1a1613 	.long	0x1d1a1613
+    32c8:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    32ca:	3300      	movi      	r3, 0
+    32cc:	3104      	movi      	r1, 4
+    32ce:	2bf0      	subi      	r3, 241
+      if (Dir)
+    32d0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d2:	9441      	ld.w      	r2, (r4, 0x4)
+    32d4:	68c8      	and      	r3, r2
+      if (Dir)
+    32d6:	0c1e      	bf      	0x3312	// 3312 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    32da:	7084      	lsl      	r2, r1
+    32dc:	6cc8      	or      	r3, r2
+    32de:	b461      	st.w      	r3, (r4, 0x4)
+}
+    32e0:	07ce      	br      	0x327c	// 327c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    32e2:	3108      	movi      	r1, 8
+    32e4:	106d      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    32e6:	07f5      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    32e8:	310c      	movi      	r1, 12
+    32ea:	106d      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    32ec:	07f2      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    32ee:	3110      	movi      	r1, 16
+    32f0:	106c      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32f2:	2b00      	subi      	r3, 1
+    32f4:	07ee      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    32f6:	3114      	movi      	r1, 20
+    32f8:	106b      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    32fa:	07fc      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32fc:	33f1      	movi      	r3, 241
+    32fe:	3118      	movi      	r1, 24
+    3300:	4378      	lsli      	r3, r3, 24
+    3302:	07f8      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    3304:	311c      	movi      	r1, 28
+    3306:	1069      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    3308:	07e4      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    330a:	3300      	movi      	r3, 0
+    330c:	3100      	movi      	r1, 0
+    330e:	2b0f      	subi      	r3, 16
+    3310:	07e0      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    3312:	3202      	movi      	r2, 2
+    3314:	07e3      	br      	0x32da	// 32da <GPIO_Init+0x8e>
+    3316:	0000      	bkpt
+    3318:	fffff0ff 	.long	0xfffff0ff
+    331c:	ffff0fff 	.long	0xffff0fff
+    3320:	fff10000 	.long	0xfff10000
+    3324:	ff100000 	.long	0xff100000
+    3328:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+0000332c <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    332c:	4121      	lsli      	r1, r1, 1
+    332e:	3203      	movi      	r2, 3
+    3330:	9068      	ld.w      	r3, (r0, 0x20)
+    3332:	7084      	lsl      	r2, r1
+    3334:	68c9      	andn      	r3, r2
+    3336:	3201      	movi      	r2, 1
+    3338:	7084      	lsl      	r2, r1
+    333a:	6cc8      	or      	r3, r2
+    333c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    333e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00003340 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    3340:	4121      	lsli      	r1, r1, 1
+    3342:	3301      	movi      	r3, 1
+    3344:	9049      	ld.w      	r2, (r0, 0x24)
+    3346:	70c4      	lsl      	r3, r1
+    3348:	6cc8      	or      	r3, r2
+    334a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    334c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+0000334e <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    334e:	3301      	movi      	r3, 1
+    3350:	70c4      	lsl      	r3, r1
+    3352:	b063      	st.w      	r3, (r0, 0xc)
+}
+    3354:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00003356 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    3356:	3301      	movi      	r3, 1
+    3358:	70c4      	lsl      	r3, r1
+    335a:	b064      	st.w      	r3, (r0, 0x10)
+}
+    335c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+0000335e <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    335e:	9045      	ld.w      	r2, (r0, 0x14)
+    3360:	3301      	movi      	r3, 1
+    3362:	7085      	lsr      	r2, r1
+    3364:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    3366:	3a40      	cmpnei      	r2, 0
+    3368:	70c4      	lsl      	r3, r1
+    336a:	0c03      	bf      	0x3370	// 3370 <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    336c:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    336e:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    3370:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    3372:	07fe      	br      	0x336e	// 336e <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00003374 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    3374:	3301      	movi      	r3, 1
+    3376:	9046      	ld.w      	r2, (r0, 0x18)
+    3378:	70c4      	lsl      	r3, r1
+    337a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    337c:	64ca      	cmpne      	r2, r3
+    337e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3380:	7400      	zextb      	r0, r0
+}
+    3382:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00003384 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    3384:	3301      	movi      	r3, 1
+    3386:	9045      	ld.w      	r2, (r0, 0x14)
+    3388:	70c4      	lsl      	r3, r1
+    338a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    338c:	64ca      	cmpne      	r2, r3
+    338e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3390:	7400      	zextb      	r0, r0
+}
+    3392:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00003394 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    3394:	1064      	lrw      	r3, 0x20000014	// 33a4 <LPT_Soft_Reset+0x10>
+    3396:	9340      	ld.w      	r2, (r3, 0x0)
+    3398:	9261      	ld.w      	r3, (r2, 0x4)
+    339a:	3bac      	bseti      	r3, 12
+    339c:	3bae      	bseti      	r3, 14
+    339e:	b261      	st.w      	r3, (r2, 0x4)
+}
+    33a0:	783c      	jmp      	r15
+    33a2:	0000      	bkpt
+    33a4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+000033a8 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    33a8:	1063      	lrw      	r3, 0x20000010	// 33b4 <WWDT_CNT_Load+0xc>
+    33aa:	9360      	ld.w      	r3, (r3, 0x0)
+    33ac:	9340      	ld.w      	r2, (r3, 0x0)
+    33ae:	6c08      	or      	r0, r2
+    33b0:	b300      	st.w      	r0, (r3, 0x0)
+}
+    33b2:	783c      	jmp      	r15
+    33b4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+000033b8 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    33b8:	3300      	movi      	r3, 0
+    33ba:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    33bc:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    33be:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    33c0:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    33c2:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    33c4:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    33c6:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    33c8:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    33ca:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    33cc:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    33ce:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    33d0:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    33d2:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000033d4 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    33d4:	9060      	ld.w      	r3, (r0, 0x0)
+    33d6:	3ba0      	bseti      	r3, 0
+    33d8:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33da:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000033dc <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    33dc:	9060      	ld.w      	r3, (r0, 0x0)
+    33de:	3bac      	bseti      	r3, 12
+    33e0:	3bae      	bseti      	r3, 14
+    33e2:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33e4:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000033e6 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    33e6:	14c3      	push      	r4-r6
+    33e8:	98a4      	ld.w      	r5, (r14, 0x10)
+    33ea:	6d97      	mov      	r6, r5
+    33ec:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    33ee:	6d18      	or      	r4, r6
+    33f0:	6cd0      	or      	r3, r4
+    33f2:	90a1      	ld.w      	r5, (r0, 0x4)
+    33f4:	6c4c      	or      	r1, r3
+    33f6:	6c54      	or      	r1, r5
+    33f8:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    33fa:	b042      	st.w      	r2, (r0, 0x8)
+}
+    33fc:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000033fe <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    33fe:	14c4      	push      	r4-r7
+    3400:	1421      	subi      	r14, r14, 4
+    3402:	9885      	ld.w      	r4, (r14, 0x14)
+    3404:	6dd3      	mov      	r7, r4
+    3406:	9886      	ld.w      	r4, (r14, 0x18)
+    3408:	b880      	st.w      	r4, (r14, 0x0)
+    340a:	9887      	ld.w      	r4, (r14, 0x1c)
+    340c:	6d93      	mov      	r6, r4
+    340e:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    3410:	6d58      	or      	r5, r6
+    3412:	98c0      	ld.w      	r6, (r14, 0x0)
+    3414:	6d58      	or      	r5, r6
+    3416:	6d5c      	or      	r5, r7
+    3418:	6cd4      	or      	r3, r5
+    341a:	6c8c      	or      	r2, r3
+    341c:	9081      	ld.w      	r4, (r0, 0x4)
+    341e:	6c48      	or      	r1, r2
+    3420:	6d04      	or      	r4, r1
+    3422:	6d9f      	mov      	r6, r7
+    3424:	b081      	st.w      	r4, (r0, 0x4)
+}
+    3426:	1401      	addi      	r14, r14, 4
+    3428:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+0000342a <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    342a:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    342c:	b044      	st.w      	r2, (r0, 0x10)
+}
+    342e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00003430 <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    3430:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3432:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    3434:	0c04      	bf      	0x343c	// 343c <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3436:	6c8c      	or      	r2, r3
+    3438:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    343a:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    343c:	68c9      	andn      	r3, r2
+    343e:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    3440:	07fd      	br      	0x343a	// 343a <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00003444 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    3444:	3380      	movi      	r3, 128
+    3446:	4376      	lsli      	r3, r3, 22
+    3448:	1042      	lrw      	r2, 0xe000e100	// 3450 <BT1_INT_ENABLE+0xc>
+    344a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    344c:	783c      	jmp      	r15
+    344e:	0000      	bkpt
+    3450:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00003454 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    3454:	3840      	cmpnei      	r0, 0
+    3456:	080a      	bt      	0x346a	// 346a <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    3458:	1165      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    345a:	31f0      	movi      	r1, 240
+    345c:	9340      	ld.w      	r2, (r3, 0x0)
+    345e:	9260      	ld.w      	r3, (r2, 0x0)
+    3460:	68c5      	andn      	r3, r1
+    3462:	3ba4      	bseti      	r3, 4
+    3464:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    3466:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    3468:	040b      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    346a:	3841      	cmpnei      	r0, 1
+    346c:	080a      	bt      	0x3480	// 3480 <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    346e:	1161      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3470:	31f0      	movi      	r1, 240
+    3472:	9340      	ld.w      	r2, (r3, 0x0)
+    3474:	9261      	ld.w      	r3, (r2, 0x4)
+    3476:	68c5      	andn      	r3, r1
+    3478:	3ba4      	bseti      	r3, 4
+    347a:	3ba6      	bseti      	r3, 6
+    347c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    347e:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    3480:	3842      	cmpnei      	r0, 2
+    3482:	080b      	bt      	0x3498	// 3498 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    3484:	107b      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3486:	32f0      	movi      	r2, 240
+    3488:	9320      	ld.w      	r1, (r3, 0x0)
+    348a:	9161      	ld.w      	r3, (r1, 0x4)
+    348c:	4244      	lsli      	r2, r2, 4
+    348e:	68c9      	andn      	r3, r2
+    3490:	3ba9      	bseti      	r3, 9
+    3492:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    3494:	b161      	st.w      	r3, (r1, 0x4)
+    3496:	07f4      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    3498:	3843      	cmpnei      	r0, 3
+    349a:	080b      	bt      	0x34b0	// 34b0 <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    349c:	1075      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    349e:	32f0      	movi      	r2, 240
+    34a0:	9320      	ld.w      	r1, (r3, 0x0)
+    34a2:	4244      	lsli      	r2, r2, 4
+    34a4:	9161      	ld.w      	r3, (r1, 0x4)
+    34a6:	68c9      	andn      	r3, r2
+    34a8:	32e0      	movi      	r2, 224
+    34aa:	4243      	lsli      	r2, r2, 3
+    34ac:	6cc8      	or      	r3, r2
+    34ae:	07f3      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    34b0:	3844      	cmpnei      	r0, 4
+    34b2:	080a      	bt      	0x34c6	// 34c6 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    34b4:	106f      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    34b6:	32f0      	movi      	r2, 240
+    34b8:	9320      	ld.w      	r1, (r3, 0x0)
+    34ba:	9161      	ld.w      	r3, (r1, 0x4)
+    34bc:	4248      	lsli      	r2, r2, 8
+    34be:	68c9      	andn      	r3, r2
+    34c0:	3bad      	bseti      	r3, 13
+    34c2:	3bae      	bseti      	r3, 14
+    34c4:	07e8      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    34c6:	3845      	cmpnei      	r0, 5
+    34c8:	0808      	bt      	0x34d8	// 34d8 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    34ca:	1069      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34cc:	310f      	movi      	r1, 15
+    34ce:	9340      	ld.w      	r2, (r3, 0x0)
+    34d0:	9260      	ld.w      	r3, (r2, 0x0)
+    34d2:	68c5      	andn      	r3, r1
+    34d4:	3ba2      	bseti      	r3, 2
+    34d6:	07c8      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    34d8:	3846      	cmpnei      	r0, 6
+    34da:	0bd2      	bt      	0x347e	// 347e <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    34dc:	1064      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34de:	31f0      	movi      	r1, 240
+    34e0:	9340      	ld.w      	r2, (r3, 0x0)
+    34e2:	9260      	ld.w      	r3, (r2, 0x0)
+    34e4:	68c5      	andn      	r3, r1
+    34e6:	3ba5      	bseti      	r3, 5
+    34e8:	3ba6      	bseti      	r3, 6
+    34ea:	07be      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+    34ec:	20000048 	.long	0x20000048
+    34f0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000034f4 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    34f4:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    34f6:	6c48      	or      	r1, r2
+    34f8:	1083      	lrw      	r4, 0x20000024	// 3504 <GPT_Configure+0x10>
+    34fa:	6c04      	or      	r0, r1
+    34fc:	9480      	ld.w      	r4, (r4, 0x0)
+    34fe:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    3500:	b462      	st.w      	r3, (r4, 0x8)
+}
+    3502:	1481      	pop      	r4
+    3504:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00003508 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    3508:	14c4      	push      	r4-r7
+    350a:	1423      	subi      	r14, r14, 12
+    350c:	9887      	ld.w      	r4, (r14, 0x1c)
+    350e:	6dd3      	mov      	r7, r4
+    3510:	9888      	ld.w      	r4, (r14, 0x20)
+    3512:	b880      	st.w      	r4, (r14, 0x0)
+    3514:	9889      	ld.w      	r4, (r14, 0x24)
+    3516:	b881      	st.w      	r4, (r14, 0x4)
+    3518:	988a      	ld.w      	r4, (r14, 0x28)
+    351a:	b882      	st.w      	r4, (r14, 0x8)
+    351c:	988b      	ld.w      	r4, (r14, 0x2c)
+    351e:	6d93      	mov      	r6, r4
+    3520:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    3522:	3cb2      	bseti      	r4, 18
+    3524:	6d18      	or      	r4, r6
+    3526:	98c2      	ld.w      	r6, (r14, 0x8)
+    3528:	6d18      	or      	r4, r6
+    352a:	98c1      	ld.w      	r6, (r14, 0x4)
+    352c:	6d18      	or      	r4, r6
+    352e:	98c0      	ld.w      	r6, (r14, 0x0)
+    3530:	6d18      	or      	r4, r6
+    3532:	6d1c      	or      	r4, r7
+    3534:	6cd0      	or      	r3, r4
+    3536:	6c8c      	or      	r2, r3
+    3538:	6c48      	or      	r1, r2
+    353a:	10a4      	lrw      	r5, 0x20000024	// 3548 <GPT_WaveCtrl_Configure+0x40>
+    353c:	6c04      	or      	r0, r1
+    353e:	95a0      	ld.w      	r5, (r5, 0x0)
+    3540:	6d9f      	mov      	r6, r7
+    3542:	b503      	st.w      	r0, (r5, 0xc)
+}
+    3544:	1403      	addi      	r14, r14, 12
+    3546:	1484      	pop      	r4-r7
+    3548:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+0000354c <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    354c:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    354e:	6c8c      	or      	r2, r3
+    3550:	6c48      	or      	r1, r2
+    3552:	1083      	lrw      	r4, 0x20000024	// 355c <GPT_WaveLoad_Configure+0x10>
+    3554:	6c04      	or      	r0, r1
+    3556:	9480      	ld.w      	r4, (r4, 0x0)
+    3558:	b411      	st.w      	r0, (r4, 0x44)
+}
+    355a:	1481      	pop      	r4
+    355c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+00003560 <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    3560:	14c4      	push      	r4-r7
+    3562:	1425      	subi      	r14, r14, 20
+    3564:	1c09      	addi      	r4, r14, 36
+    3566:	8480      	ld.b      	r4, (r4, 0x0)
+    3568:	b880      	st.w      	r4, (r14, 0x0)
+    356a:	1c0a      	addi      	r4, r14, 40
+    356c:	8480      	ld.b      	r4, (r4, 0x0)
+    356e:	b881      	st.w      	r4, (r14, 0x4)
+    3570:	1c0b      	addi      	r4, r14, 44
+    3572:	8480      	ld.b      	r4, (r4, 0x0)
+    3574:	b882      	st.w      	r4, (r14, 0x8)
+    3576:	1c0c      	addi      	r4, r14, 48
+    3578:	8480      	ld.b      	r4, (r4, 0x0)
+    357a:	b883      	st.w      	r4, (r14, 0xc)
+    357c:	1c0d      	addi      	r4, r14, 52
+    357e:	8480      	ld.b      	r4, (r4, 0x0)
+    3580:	1e10      	addi      	r6, r14, 64
+    3582:	b884      	st.w      	r4, (r14, 0x10)
+    3584:	1d0f      	addi      	r5, r14, 60
+    3586:	1c0e      	addi      	r4, r14, 56
+    3588:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    358a:	3840      	cmpnei      	r0, 0
+{
+    358c:	1e11      	addi      	r6, r14, 68
+    358e:	8480      	ld.b      	r4, (r4, 0x0)
+    3590:	85a0      	ld.b      	r5, (r5, 0x0)
+    3592:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    3594:	081f      	bt      	0x35d2	// 35d2 <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    3596:	47f0      	lsli      	r7, r7, 16
+    3598:	46d2      	lsli      	r6, r6, 18
+    359a:	45ae      	lsli      	r5, r5, 14
+    359c:	6dd8      	or      	r7, r6
+    359e:	6dd4      	or      	r7, r5
+    35a0:	448c      	lsli      	r4, r4, 12
+    35a2:	6dd0      	or      	r7, r4
+    35a4:	9884      	ld.w      	r4, (r14, 0x10)
+    35a6:	448a      	lsli      	r4, r4, 10
+    35a8:	6dd0      	or      	r7, r4
+    35aa:	9883      	ld.w      	r4, (r14, 0xc)
+    35ac:	4488      	lsli      	r4, r4, 8
+    35ae:	98a2      	ld.w      	r5, (r14, 0x8)
+    35b0:	6d1c      	or      	r4, r7
+    35b2:	45e6      	lsli      	r7, r5, 6
+    35b4:	6d1c      	or      	r4, r7
+    35b6:	6c90      	or      	r2, r4
+    35b8:	6cc8      	or      	r3, r2
+    35ba:	9841      	ld.w      	r2, (r14, 0x4)
+    35bc:	4244      	lsli      	r2, r2, 4
+    35be:	6cc8      	or      	r3, r2
+    35c0:	6c4c      	or      	r1, r3
+    35c2:	9860      	ld.w      	r3, (r14, 0x0)
+    35c4:	4362      	lsli      	r3, r3, 2
+    35c6:	1013      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    35c8:	6c4c      	or      	r1, r3
+    35ca:	9000      	ld.w      	r0, (r0, 0x0)
+    35cc:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    35ce:	1405      	addi      	r14, r14, 20
+    35d0:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    35d2:	3841      	cmpnei      	r0, 1
+    35d4:	0bfd      	bt      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    35d6:	47f0      	lsli      	r7, r7, 16
+    35d8:	46d2      	lsli      	r6, r6, 18
+    35da:	45ae      	lsli      	r5, r5, 14
+    35dc:	6dd8      	or      	r7, r6
+    35de:	6dd4      	or      	r7, r5
+    35e0:	448c      	lsli      	r4, r4, 12
+    35e2:	6dd0      	or      	r7, r4
+    35e4:	9884      	ld.w      	r4, (r14, 0x10)
+    35e6:	448a      	lsli      	r4, r4, 10
+    35e8:	6dd0      	or      	r7, r4
+    35ea:	9883      	ld.w      	r4, (r14, 0xc)
+    35ec:	4488      	lsli      	r4, r4, 8
+    35ee:	98a2      	ld.w      	r5, (r14, 0x8)
+    35f0:	6d1c      	or      	r4, r7
+    35f2:	45e6      	lsli      	r7, r5, 6
+    35f4:	6d1c      	or      	r4, r7
+    35f6:	6c90      	or      	r2, r4
+    35f8:	6cc8      	or      	r3, r2
+    35fa:	9841      	ld.w      	r2, (r14, 0x4)
+    35fc:	4244      	lsli      	r2, r2, 4
+    35fe:	6cc8      	or      	r3, r2
+    3600:	6c4c      	or      	r1, r3
+    3602:	9860      	ld.w      	r3, (r14, 0x0)
+    3604:	4362      	lsli      	r3, r3, 2
+    3606:	1003      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    3608:	6c4c      	or      	r1, r3
+    360a:	9000      	ld.w      	r0, (r0, 0x0)
+    360c:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    360e:	07e0      	br      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+    3610:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00003614 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    3614:	1063      	lrw      	r3, 0x20000024	// 3620 <GPT_Start+0xc>
+    3616:	9340      	ld.w      	r2, (r3, 0x0)
+    3618:	9261      	ld.w      	r3, (r2, 0x4)
+    361a:	3ba0      	bseti      	r3, 0
+    361c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    361e:	783c      	jmp      	r15
+    3620:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00003624 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    3624:	1063      	lrw      	r3, 0x20000024	// 3630 <GPT_Period_CMP_Write+0xc>
+    3626:	9360      	ld.w      	r3, (r3, 0x0)
+    3628:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    362a:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    362c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    362e:	783c      	jmp      	r15
+    3630:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00003634 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    3634:	1066      	lrw      	r3, 0x20000024	// 364c <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    3636:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3638:	9360      	ld.w      	r3, (r3, 0x0)
+    363a:	237f      	addi      	r3, 128
+    363c:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    363e:	0c04      	bf      	0x3646	// 3646 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3640:	6c48      	or      	r1, r2
+    3642:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    3644:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    3646:	6885      	andn      	r2, r1
+    3648:	b356      	st.w      	r2, (r3, 0x58)
+}
+    364a:	07fd      	br      	0x3644	// 3644 <GPT_ConfigInterrupt_CMD+0x10>
+    364c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+00003650 <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    3650:	1065      	lrw      	r3, 0x20000040	// 3664 <UART0_DeInit+0x14>
+    3652:	3200      	movi      	r2, 0
+    3654:	9360      	ld.w      	r3, (r3, 0x0)
+    3656:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    3658:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    365a:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    365c:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    365e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3660:	783c      	jmp      	r15
+    3662:	0000      	bkpt
+    3664:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00003668 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    3668:	1065      	lrw      	r3, 0x2000003c	// 367c <UART1_DeInit+0x14>
+    366a:	3200      	movi      	r2, 0
+    366c:	9360      	ld.w      	r3, (r3, 0x0)
+    366e:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    3670:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    3672:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    3674:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    3676:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3678:	783c      	jmp      	r15
+    367a:	0000      	bkpt
+    367c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+00003680 <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    3680:	1065      	lrw      	r3, 0x20000038	// 3694 <UART2_DeInit+0x14>
+    3682:	3200      	movi      	r2, 0
+    3684:	9360      	ld.w      	r3, (r3, 0x0)
+    3686:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    3688:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    368a:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    368c:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    368e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3690:	783c      	jmp      	r15
+    3692:	0000      	bkpt
+    3694:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+00003698 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    3698:	1065      	lrw      	r3, 0x20000040	// 36ac <UART0_Int_Enable+0x14>
+    369a:	320f      	movi      	r2, 15
+    369c:	9360      	ld.w      	r3, (r3, 0x0)
+    369e:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36a0:	3380      	movi      	r3, 128
+    36a2:	4366      	lsli      	r3, r3, 6
+    36a4:	1043      	lrw      	r2, 0xe000e100	// 36b0 <UART0_Int_Enable+0x18>
+    36a6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36a8:	783c      	jmp      	r15
+    36aa:	0000      	bkpt
+    36ac:	20000040 	.long	0x20000040
+    36b0:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000036b4 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    36b4:	1065      	lrw      	r3, 0x20000038	// 36c8 <UART2_Int_Enable+0x14>
+    36b6:	320f      	movi      	r2, 15
+    36b8:	9360      	ld.w      	r3, (r3, 0x0)
+    36ba:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36bc:	3380      	movi      	r3, 128
+    36be:	4368      	lsli      	r3, r3, 8
+    36c0:	1043      	lrw      	r2, 0xe000e100	// 36cc <UART2_Int_Enable+0x18>
+    36c2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36c4:	783c      	jmp      	r15
+    36c6:	0000      	bkpt
+    36c8:	20000038 	.long	0x20000038
+    36cc:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+000036d0 <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    36d0:	3840      	cmpnei      	r0, 0
+    36d2:	0821      	bt      	0x3714	// 3714 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    36d4:	3940      	cmpnei      	r1, 0
+    36d6:	080a      	bt      	0x36ea	// 36ea <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    36d8:	1177      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36da:	31ff      	movi      	r1, 255
+    36dc:	9340      	ld.w      	r2, (r3, 0x0)
+    36de:	9260      	ld.w      	r3, (r2, 0x0)
+    36e0:	68c5      	andn      	r3, r1
+    36e2:	3ba2      	bseti      	r3, 2
+    36e4:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    36e6:	b260      	st.w      	r3, (r2, 0x0)
+    36e8:	0415      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    36ea:	3941      	cmpnei      	r1, 1
+    36ec:	0813      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    36ee:	1172      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36f0:	31f0      	movi      	r1, 240
+    36f2:	9340      	ld.w      	r2, (r3, 0x0)
+    36f4:	9260      	ld.w      	r3, (r2, 0x0)
+    36f6:	4130      	lsli      	r1, r1, 16
+    36f8:	68c5      	andn      	r3, r1
+    36fa:	31e0      	movi      	r1, 224
+    36fc:	412f      	lsli      	r1, r1, 15
+    36fe:	6cc4      	or      	r3, r1
+    3700:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    3702:	31f0      	movi      	r1, 240
+    3704:	9261      	ld.w      	r3, (r2, 0x4)
+    3706:	412c      	lsli      	r1, r1, 12
+    3708:	68c5      	andn      	r3, r1
+    370a:	31e0      	movi      	r1, 224
+    370c:	412b      	lsli      	r1, r1, 11
+    370e:	6cc4      	or      	r3, r1
+    3710:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    3712:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    3714:	3841      	cmpnei      	r0, 1
+    3716:	082d      	bt      	0x3770	// 3770 <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    3718:	3940      	cmpnei      	r1, 0
+    371a:	0814      	bt      	0x3742	// 3742 <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    371c:	1167      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    371e:	310f      	movi      	r1, 15
+    3720:	9340      	ld.w      	r2, (r3, 0x0)
+    3722:	9260      	ld.w      	r3, (r2, 0x0)
+    3724:	68c5      	andn      	r3, r1
+    3726:	3107      	movi      	r1, 7
+    3728:	6cc4      	or      	r3, r1
+    372a:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    372c:	32f0      	movi      	r2, 240
+    372e:	1162      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3730:	4250      	lsli      	r2, r2, 16
+    3732:	9320      	ld.w      	r1, (r3, 0x0)
+    3734:	9161      	ld.w      	r3, (r1, 0x4)
+    3736:	68c9      	andn      	r3, r2
+    3738:	32e0      	movi      	r2, 224
+    373a:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    373c:	6cc8      	or      	r3, r2
+    373e:	b161      	st.w      	r3, (r1, 0x4)
+    3740:	07e9      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    3742:	3941      	cmpnei      	r1, 1
+    3744:	080c      	bt      	0x375c	// 375c <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    3746:	107c      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3748:	32ff      	movi      	r2, 255
+    374a:	9320      	ld.w      	r1, (r3, 0x0)
+    374c:	424c      	lsli      	r2, r2, 12
+    374e:	9160      	ld.w      	r3, (r1, 0x0)
+    3750:	68c9      	andn      	r3, r2
+    3752:	32ee      	movi      	r2, 238
+    3754:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    3756:	6cc8      	or      	r3, r2
+    3758:	b160      	st.w      	r3, (r1, 0x0)
+}
+    375a:	07dc      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    375c:	3942      	cmpnei      	r1, 2
+    375e:	0bda      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    3760:	1075      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3762:	32ee      	movi      	r2, 238
+    3764:	9320      	ld.w      	r1, (r3, 0x0)
+    3766:	9161      	ld.w      	r3, (r1, 0x4)
+    3768:	4368      	lsli      	r3, r3, 8
+    376a:	4b68      	lsri      	r3, r3, 8
+    376c:	4257      	lsli      	r2, r2, 23
+    376e:	07e7      	br      	0x373c	// 373c <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    3770:	3842      	cmpnei      	r0, 2
+    3772:	0bd0      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    3774:	3940      	cmpnei      	r1, 0
+    3776:	0809      	bt      	0x3788	// 3788 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    3778:	106f      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    377a:	31ff      	movi      	r1, 255
+    377c:	9340      	ld.w      	r2, (r3, 0x0)
+    377e:	9260      	ld.w      	r3, (r2, 0x0)
+    3780:	68c5      	andn      	r3, r1
+    3782:	3177      	movi      	r1, 119
+    3784:	6cc4      	or      	r3, r1
+    3786:	07b0      	br      	0x36e6	// 36e6 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    3788:	3941      	cmpnei      	r1, 1
+    378a:	0809      	bt      	0x379c	// 379c <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    378c:	106a      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    378e:	32ee      	movi      	r2, 238
+    3790:	9320      	ld.w      	r1, (r3, 0x0)
+    3792:	9160      	ld.w      	r3, (r1, 0x0)
+    3794:	4368      	lsli      	r3, r3, 8
+    3796:	4b68      	lsri      	r3, r3, 8
+    3798:	4257      	lsli      	r2, r2, 23
+    379a:	07de      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    379c:	3942      	cmpnei      	r1, 2
+    379e:	0bba      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    37a0:	1066      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    37a2:	32ff      	movi      	r2, 255
+    37a4:	9320      	ld.w      	r1, (r3, 0x0)
+    37a6:	4250      	lsli      	r2, r2, 16
+    37a8:	9160      	ld.w      	r3, (r1, 0x0)
+    37aa:	68c9      	andn      	r3, r2
+    37ac:	32cc      	movi      	r2, 204
+    37ae:	424f      	lsli      	r2, r2, 15
+    37b0:	07d3      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+    37b2:	0000      	bkpt
+    37b4:	2000004c 	.long	0x2000004c
+    37b8:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000037bc <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    37bc:	1063      	lrw      	r3, 0x80003	// 37c8 <UARTInit+0xc>
+    37be:	6c8c      	or      	r2, r3
+    37c0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37c2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37c4:	783c      	jmp      	r15
+    37c6:	0000      	bkpt
+    37c8:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+000037cc <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    37cc:	1063      	lrw      	r3, 0x8000f	// 37d8 <UARTInitRxTxIntEn+0xc>
+    37ce:	6c8c      	or      	r2, r3
+    37d0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37d2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37d4:	783c      	jmp      	r15
+    37d6:	0000      	bkpt
+    37d8:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+000037dc <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    37dc:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37de:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    37e0:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37e2:	5b85      	subu      	r4, r3, r1
+    37e4:	6490      	cmphs      	r4, r2
+    37e6:	0c02      	bf      	0x37ea	// 37ea <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    37e8:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    37ea:	8380      	ld.b      	r4, (r3, 0x0)
+    37ec:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    37ee:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    37f0:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    37f2:	3c40      	cmpnei      	r4, 0
+    37f4:	0bfd      	bt      	0x37ee	// 37ee <UARTTransmit+0x12>
+    37f6:	2300      	addi      	r3, 1
+    37f8:	07f5      	br      	0x37e2	// 37e2 <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000037fc <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    37fc:	1068      	lrw      	r3, 0x20000020	// 381c <EPT_Stop+0x20>
+    37fe:	3280      	movi      	r2, 128
+    3800:	9360      	ld.w      	r3, (r3, 0x0)
+    3802:	608c      	addu      	r2, r3
+    3804:	1027      	lrw      	r1, 0xa55ac73a	// 3820 <EPT_Stop+0x24>
+    3806:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    3808:	9341      	ld.w      	r2, (r3, 0x4)
+    380a:	31fe      	movi      	r1, 254
+    380c:	6884      	and      	r2, r1
+    380e:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    3810:	3101      	movi      	r1, 1
+    3812:	9341      	ld.w      	r2, (r3, 0x4)
+    3814:	6884      	and      	r2, r1
+    3816:	3a40      	cmpnei      	r2, 0
+    3818:	0bfd      	bt      	0x3812	// 3812 <EPT_Stop+0x16>
+}
+    381a:	783c      	jmp      	r15
+    381c:	20000020 	.long	0x20000020
+    3820:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00003824 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    3824:	14d1      	push      	r4, r15
+	delay_nms(2000);
+    3826:	30fa      	movi      	r0, 250
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3828:	109a      	lrw      	r4, 0x20000048	// 3890 <main+0x6c>
+	delay_nms(2000);
+    382a:	4003      	lsli      	r0, r0, 3
+    382c:	e0000038 	bsr      	0x389c	// 389c <delay_nms>
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3830:	3201      	movi      	r2, 1
+    3832:	9400      	ld.w      	r0, (r4, 0x0)
+    3834:	3102      	movi      	r1, 2
+    3836:	e3fffd0b 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    383a:	9400      	ld.w      	r0, (r4, 0x0)
+    383c:	3102      	movi      	r1, 2
+    383e:	e3fffd77 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3842:	3102      	movi      	r1, 2
+    3844:	9400      	ld.w      	r0, (r4, 0x0)
+    3846:	e3fffd97 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    384a:	1093      	lrw      	r4, 0x200000a0	// 3894 <main+0x70>
+	last_state = rf_exist;
+    384c:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    384e:	a400      	st.b      	r0, (r4, 0x0)
+	APT32F102_init();							//102 initial
+    3850:	e00000e8 	bsr      	0x3a20	// 3a20 <APT32F102_init>
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    3854:	1031      	lrw      	r1, 0x5f50	// 3898 <main+0x74>
+    3856:	3000      	movi      	r0, 0
+    3858:	e00006b8 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    385c:	e3fffc66 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+
+		//UART2_TASK();
+		Detect_WIFI_Task();
+    3860:	e0000bd2 	bsr      	0x5004	// 5004 <Detect_WIFI_Task>
+		
+		Detect_SPI_task();
+    3864:	e00009da 	bsr      	0x4c18	// 4c18 <Detect_SPI_task>
+		
+
+		Led_Task();
+    3868:	e0000c18 	bsr      	0x5098	// 5098 <Led_Task>
+		
+		if (finish_flag == 1) {
+    386c:	8462      	ld.b      	r3, (r4, 0x2)
+    386e:	3b41      	cmpnei      	r3, 1
+    3870:	0bf6      	bt      	0x385c	// 385c <main+0x38>
+			Card_Read_TasK();
+    3872:	e000097b 	bsr      	0x4b68	// 4b68 <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    3876:	8460      	ld.b      	r3, (r4, 0x0)
+    3878:	3b41      	cmpnei      	r3, 1
+    387a:	0806      	bt      	0x3886	// 3886 <main+0x62>
+			{
+				BackLight_Task();
+    387c:	e0000bb2 	bsr      	0x4fe0	// 4fe0 <BackLight_Task>
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    3880:	e0000b50 	bsr      	0x4f20	// 4f20 <LogicCtrl_NoRF_Task>
+    3884:	07ec      	br      	0x385c	// 385c <main+0x38>
+				//Dbg_Println(DBG_BIT_SYS_STATUS,"n rf!");
+			}
+			else if(rf_exist == 0x00)
+    3886:	3b40      	cmpnei      	r3, 0
+    3888:	0bea      	bt      	0x385c	// 385c <main+0x38>
+			{
+//				Debounce_Task();
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    388a:	e0000a8f 	bsr      	0x4da8	// 4da8 <LogicCtrl_Task>
+    388e:	07e7      	br      	0x385c	// 385c <main+0x38>
+    3890:	20000048 	.long	0x20000048
+    3894:	200000a0 	.long	0x200000a0
+    3898:	00005f50 	.long	0x00005f50
+
+Disassembly of section .text.delay_nms:
+
+0000389c <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    389c:	14d0      	push      	r15
+    389e:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    38a0:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    38a2:	3300      	movi      	r3, 0
+    j = 50* t;
+    38a4:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    38a6:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    38a8:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    38aa:	b860      	st.w      	r3, (r14, 0x0)
+    38ac:	9840      	ld.w      	r2, (r14, 0x0)
+    38ae:	9861      	ld.w      	r3, (r14, 0x4)
+    38b0:	64c8      	cmphs      	r2, r3
+    38b2:	0c03      	bf      	0x38b8	// 38b8 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    38b4:	1403      	addi      	r14, r14, 12
+    38b6:	1490      	pop      	r15
+        k++;
+    38b8:	9862      	ld.w      	r3, (r14, 0x8)
+    38ba:	2300      	addi      	r3, 1
+    38bc:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    38be:	e3fffc35 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    38c2:	9860      	ld.w      	r3, (r14, 0x0)
+    38c4:	2300      	addi      	r3, 1
+    38c6:	07f2      	br      	0x38aa	// 38aa <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000038c8 <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    38c8:	14d0      	push      	r15
+    38ca:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    38cc:	3000      	movi      	r0, 0
+    38ce:	e3fffdc3 	bsr      	0x3454	// 3454 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    38d2:	3300      	movi      	r3, 0
+    38d4:	3240      	movi      	r2, 64
+    38d6:	3100      	movi      	r1, 0
+    38d8:	3001      	movi      	r0, 1
+    38da:	e3fffe0d 	bsr      	0x34f4	// 34f4 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    38de:	3300      	movi      	r3, 0
+    38e0:	b865      	st.w      	r3, (r14, 0x14)
+    38e2:	b864      	st.w      	r3, (r14, 0x10)
+    38e4:	b863      	st.w      	r3, (r14, 0xc)
+    38e6:	b862      	st.w      	r3, (r14, 0x8)
+    38e8:	b861      	st.w      	r3, (r14, 0x4)
+    38ea:	b860      	st.w      	r3, (r14, 0x0)
+    38ec:	3208      	movi      	r2, 8
+    38ee:	3100      	movi      	r1, 0
+    38f0:	3000      	movi      	r0, 0
+    38f2:	e3fffe0b 	bsr      	0x3508	// 3508 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    38f6:	1079      	lrw      	r3, 0x200000a0	// 3958 <GPT0_CONFIG+0x90>
+    38f8:	8360      	ld.b      	r3, (r3, 0x0)
+    38fa:	3b41      	cmpnei      	r3, 1
+    38fc:	0827      	bt      	0x394a	// 394a <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    38fe:	31fa      	movi      	r1, 250
+    3900:	4123      	lsli      	r1, r1, 3
+    3902:	3200      	movi      	r2, 0
+    3904:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    3906:	e3fffe8f 	bsr      	0x3624	// 3624 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    390a:	3320      	movi      	r3, 32
+    390c:	3204      	movi      	r2, 4
+    390e:	3100      	movi      	r1, 0
+    3910:	3001      	movi      	r0, 1
+    3912:	e3fffe1d 	bsr      	0x354c	// 354c <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    3916:	3300      	movi      	r3, 0
+    3918:	3201      	movi      	r2, 1
+    391a:	b868      	st.w      	r3, (r14, 0x20)
+    391c:	b867      	st.w      	r3, (r14, 0x1c)
+    391e:	b866      	st.w      	r3, (r14, 0x18)
+    3920:	b865      	st.w      	r3, (r14, 0x14)
+    3922:	b864      	st.w      	r3, (r14, 0x10)
+    3924:	b863      	st.w      	r3, (r14, 0xc)
+    3926:	b842      	st.w      	r2, (r14, 0x8)
+    3928:	b841      	st.w      	r2, (r14, 0x4)
+    392a:	b860      	st.w      	r3, (r14, 0x0)
+    392c:	3200      	movi      	r2, 0
+    392e:	3302      	movi      	r3, 2
+    3930:	3100      	movi      	r1, 0
+    3932:	3000      	movi      	r0, 0
+    3934:	e3fffe16 	bsr      	0x3560	// 3560 <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    3938:	e3fffe6e 	bsr      	0x3614	// 3614 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    393c:	3180      	movi      	r1, 128
+    393e:	4129      	lsli      	r1, r1, 9
+    3940:	3001      	movi      	r0, 1
+    3942:	e3fffe79 	bsr      	0x3634	// 3634 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    3946:	1409      	addi      	r14, r14, 36
+    3948:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    394a:	3b40      	cmpnei      	r3, 0
+    394c:	0bdf      	bt      	0x390a	// 390a <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    394e:	30fa      	movi      	r0, 250
+    3950:	3200      	movi      	r2, 0
+    3952:	3100      	movi      	r1, 0
+    3954:	4003      	lsli      	r0, r0, 3
+    3956:	07d8      	br      	0x3906	// 3906 <GPT0_CONFIG+0x3e>
+    3958:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.BT_CONFIG:
+
+0000395c <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    395c:	14d2      	push      	r4-r5, r15
+    395e:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    3960:	1095      	lrw      	r4, 0x20000008	// 39b4 <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    3962:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    3964:	9400      	ld.w      	r0, (r4, 0x0)
+    3966:	e3fffd29 	bsr      	0x33b8	// 33b8 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    396a:	9400      	ld.w      	r0, (r4, 0x0)
+    396c:	b8a1      	st.w      	r5, (r14, 0x4)
+    396e:	b8a0      	st.w      	r5, (r14, 0x0)
+    3970:	3308      	movi      	r3, 8
+    3972:	3200      	movi      	r2, 0
+    3974:	3101      	movi      	r1, 1
+    3976:	e3fffd38 	bsr      	0x33e6	// 33e6 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    397a:	3380      	movi      	r3, 128
+    397c:	4363      	lsli      	r3, r3, 3
+    397e:	b861      	st.w      	r3, (r14, 0x4)
+    3980:	9400      	ld.w      	r0, (r4, 0x0)
+    3982:	3300      	movi      	r3, 0
+    3984:	b8a3      	st.w      	r5, (r14, 0xc)
+    3986:	b8a2      	st.w      	r5, (r14, 0x8)
+    3988:	b8a0      	st.w      	r5, (r14, 0x0)
+    398a:	3200      	movi      	r2, 0
+    398c:	3180      	movi      	r1, 128
+    398e:	e3fffd38 	bsr      	0x33fe	// 33fe <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    3992:	3201      	movi      	r2, 1
+    3994:	1029      	lrw      	r1, 0x12ac	// 39b8 <BT_CONFIG+0x5c>
+    3996:	9400      	ld.w      	r0, (r4, 0x0)
+    3998:	e3fffd49 	bsr      	0x342a	// 342a <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    399c:	9400      	ld.w      	r0, (r4, 0x0)
+    399e:	e3fffd1b 	bsr      	0x33d4	// 33d4 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    39a2:	9400      	ld.w      	r0, (r4, 0x0)
+    39a4:	3202      	movi      	r2, 2
+    39a6:	3101      	movi      	r1, 1
+    39a8:	e3fffd44 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    39ac:	e3fffd4c 	bsr      	0x3444	// 3444 <BT1_INT_ENABLE>
+	
+}
+    39b0:	1404      	addi      	r14, r14, 16
+    39b2:	1492      	pop      	r4-r5, r15
+    39b4:	20000008 	.long	0x20000008
+    39b8:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000039bc <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    39bc:	14d0      	push      	r15
+    39be:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    39c0:	e3fffb00 	bsr      	0x2fc0	// 2fc0 <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    39c4:	3101      	movi      	r1, 1
+    39c6:	3001      	movi      	r0, 1
+    39c8:	e3fffb22 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    39cc:	3000      	movi      	r0, 0
+    39ce:	e3fffb7b 	bsr      	0x30c4	// 30c4 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    39d2:	3180      	movi      	r1, 128
+    39d4:	3308      	movi      	r3, 8
+    39d6:	3200      	movi      	r2, 0
+    39d8:	4121      	lsli      	r1, r1, 1
+    39da:	3002      	movi      	r0, 2
+    39dc:	e3fffb30 	bsr      	0x303c	// 303c <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    39e0:	3080      	movi      	r0, 128
+    39e2:	3118      	movi      	r1, 24
+    39e4:	4002      	lsli      	r0, r0, 2
+    39e6:	e3fffbab 	bsr      	0x313c	// 313c <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    39ea:	3001      	movi      	r0, 1
+    39ec:	e3fffb80 	bsr      	0x30ec	// 30ec <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    39f0:	e3fffb9c 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    39f4:	e3fffbce 	bsr      	0x3190	// 3190 <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    39f8:	3340      	movi      	r3, 64
+    39fa:	b860      	st.w      	r3, (r14, 0x0)
+    39fc:	31c0      	movi      	r1, 192
+    39fe:	3380      	movi      	r3, 128
+    3a00:	4364      	lsli      	r3, r3, 4
+    3a02:	3200      	movi      	r2, 0
+    3a04:	4123      	lsli      	r1, r1, 3
+    3a06:	3000      	movi      	r0, 0
+    3a08:	e3fffba6 	bsr      	0x3154	// 3154 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    3a0c:	e3fffbb4 	bsr      	0x3174	// 3174 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    3a10:	e3fffbee 	bsr      	0x31ec	// 31ec <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    3a14:	3000      	movi      	r0, 0
+    3a16:	e0000f89 	bsr      	0x5928	// 5928 <std_clk_calib>
+	
+}
+    3a1a:	1401      	addi      	r14, r14, 4
+    3a1c:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00003a20 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    3a20:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a22:	1072      	lrw      	r3, 0x2000005c	// 3a68 <APT32F102_init+0x48>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a24:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a26:	9340      	ld.w      	r2, (r3, 0x0)
+    3a28:	1071      	lrw      	r3, 0xfffffff	// 3a6c <APT32F102_init+0x4c>
+    3a2a:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    3a2c:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a2e:	926c      	ld.w      	r3, (r2, 0x30)
+    3a30:	68c4      	and      	r3, r1
+    3a32:	3b40      	cmpnei      	r3, 0
+    3a34:	0ffd      	bf      	0x3a2e	// 3a2e <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    3a36:	e3ffffc3 	bsr      	0x39bc	// 39bc <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    3a3a:	e0000525 	bsr      	0x4484	// 4484 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    3a3e:	e3fffbdd 	bsr      	0x31f8	// 31f8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    3a42:	3101      	movi      	r1, 1
+    3a44:	300f      	movi      	r0, 15
+    3a46:	e3fffbeb 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//	Set_INT_Priority(SIO_IRQ,1);				//SIO优先级最高
+//	
+	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+    3a4a:	3102      	movi      	r1, 2
+    3a4c:	3019      	movi      	r0, 25
+    3a4e:	e3fffbe7 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    3a52:	e3ffff85 	bsr      	0x395c	// 395c <BT_CONFIG>
+
+	GPT0_CONFIG();
+    3a56:	e3ffff39 	bsr      	0x38c8	// 38c8 <GPT0_CONFIG>
+	
+	UARTx_Init(UART_2,NULL);
+    3a5a:	3100      	movi      	r1, 0
+    3a5c:	3002      	movi      	r0, 2
+    3a5e:	e0000517 	bsr      	0x448c	// 448c <UARTx_Init>
+//	UARTx_Init(UART_2,NULL);
+	
+	RC522_Init();
+    3a62:	e0000701 	bsr      	0x4864	// 4864 <RC522_Init>
+//	}
+//	else if(rf_exist == 0x00)  //带无线模块初始化
+//	{
+//		LogicCtrl_Init();     
+//	}
+}
+    3a66:	1490      	pop      	r15
+    3a68:	2000005c 	.long	0x2000005c
+    3a6c:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00003a70 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    3a70:	1460      	nie
+    3a72:	1462      	ipush
+    // ISR content ...
+	nop;
+    3a74:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    3a76:	117a      	lrw      	r3, 0x2000005c	// 3b5c <SYSCONIntHandler+0xec>
+    3a78:	3280      	movi      	r2, 128
+    3a7a:	9360      	ld.w      	r3, (r3, 0x0)
+    3a7c:	60c8      	addu      	r3, r2
+    3a7e:	9323      	ld.w      	r1, (r3, 0xc)
+    3a80:	3001      	movi      	r0, 1
+    3a82:	6840      	and      	r1, r0
+    3a84:	3940      	cmpnei      	r1, 0
+    3a86:	0c04      	bf      	0x3a8e	// 3a8e <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    3a88:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    3a8a:	1463      	ipop
+    3a8c:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    3a8e:	9323      	ld.w      	r1, (r3, 0xc)
+    3a90:	3002      	movi      	r0, 2
+    3a92:	6840      	and      	r1, r0
+    3a94:	3940      	cmpnei      	r1, 0
+    3a96:	0bf9      	bt      	0x3a88	// 3a88 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    3a98:	9323      	ld.w      	r1, (r3, 0xc)
+    3a9a:	3008      	movi      	r0, 8
+    3a9c:	6840      	and      	r1, r0
+    3a9e:	3940      	cmpnei      	r1, 0
+    3aa0:	0bf4      	bt      	0x3a88	// 3a88 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    3aa2:	9323      	ld.w      	r1, (r3, 0xc)
+    3aa4:	3010      	movi      	r0, 16
+    3aa6:	6840      	and      	r1, r0
+    3aa8:	3940      	cmpnei      	r1, 0
+    3aaa:	0bef      	bt      	0x3a88	// 3a88 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    3aac:	9323      	ld.w      	r1, (r3, 0xc)
+    3aae:	6848      	and      	r1, r2
+    3ab0:	3940      	cmpnei      	r1, 0
+    3ab2:	0c03      	bf      	0x3ab8	// 3ab8 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    3ab4:	b341      	st.w      	r2, (r3, 0x4)
+}
+    3ab6:	07ea      	br      	0x3a8a	// 3a8a <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    3ab8:	3280      	movi      	r2, 128
+    3aba:	9323      	ld.w      	r1, (r3, 0xc)
+    3abc:	4241      	lsli      	r2, r2, 1
+    3abe:	6848      	and      	r1, r2
+    3ac0:	3940      	cmpnei      	r1, 0
+    3ac2:	0bf9      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    3ac4:	3280      	movi      	r2, 128
+    3ac6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ac8:	4242      	lsli      	r2, r2, 2
+    3aca:	6848      	and      	r1, r2
+    3acc:	3940      	cmpnei      	r1, 0
+    3ace:	0bf3      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    3ad0:	3280      	movi      	r2, 128
+    3ad2:	9323      	ld.w      	r1, (r3, 0xc)
+    3ad4:	4243      	lsli      	r2, r2, 3
+    3ad6:	6848      	and      	r1, r2
+    3ad8:	3940      	cmpnei      	r1, 0
+    3ada:	0bed      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    3adc:	3280      	movi      	r2, 128
+    3ade:	9323      	ld.w      	r1, (r3, 0xc)
+    3ae0:	4244      	lsli      	r2, r2, 4
+    3ae2:	6848      	and      	r1, r2
+    3ae4:	3940      	cmpnei      	r1, 0
+    3ae6:	0c03      	bf      	0x3aec	// 3aec <SYSCONIntHandler+0x7c>
+		nop;
+    3ae8:	6c03      	mov      	r0, r0
+    3aea:	07e5      	br      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    3aec:	3280      	movi      	r2, 128
+    3aee:	9323      	ld.w      	r1, (r3, 0xc)
+    3af0:	4245      	lsli      	r2, r2, 5
+    3af2:	6848      	and      	r1, r2
+    3af4:	3940      	cmpnei      	r1, 0
+    3af6:	0bdf      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    3af8:	3280      	movi      	r2, 128
+    3afa:	9323      	ld.w      	r1, (r3, 0xc)
+    3afc:	4246      	lsli      	r2, r2, 6
+    3afe:	6848      	and      	r1, r2
+    3b00:	3940      	cmpnei      	r1, 0
+    3b02:	0bd9      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    3b04:	3280      	movi      	r2, 128
+    3b06:	9323      	ld.w      	r1, (r3, 0xc)
+    3b08:	4247      	lsli      	r2, r2, 7
+    3b0a:	6848      	and      	r1, r2
+    3b0c:	3940      	cmpnei      	r1, 0
+    3b0e:	0bd3      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    3b10:	3280      	movi      	r2, 128
+    3b12:	9323      	ld.w      	r1, (r3, 0xc)
+    3b14:	424b      	lsli      	r2, r2, 11
+    3b16:	6848      	and      	r1, r2
+    3b18:	3940      	cmpnei      	r1, 0
+    3b1a:	0bcd      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    3b1c:	3280      	movi      	r2, 128
+    3b1e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b20:	424c      	lsli      	r2, r2, 12
+    3b22:	6848      	and      	r1, r2
+    3b24:	3940      	cmpnei      	r1, 0
+    3b26:	0bc7      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    3b28:	3280      	movi      	r2, 128
+    3b2a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b2c:	424d      	lsli      	r2, r2, 13
+    3b2e:	6848      	and      	r1, r2
+    3b30:	3940      	cmpnei      	r1, 0
+    3b32:	0bc1      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    3b34:	3280      	movi      	r2, 128
+    3b36:	9323      	ld.w      	r1, (r3, 0xc)
+    3b38:	424e      	lsli      	r2, r2, 14
+    3b3a:	6848      	and      	r1, r2
+    3b3c:	3940      	cmpnei      	r1, 0
+    3b3e:	0bbb      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    3b40:	3280      	movi      	r2, 128
+    3b42:	9323      	ld.w      	r1, (r3, 0xc)
+    3b44:	424f      	lsli      	r2, r2, 15
+    3b46:	6848      	and      	r1, r2
+    3b48:	3940      	cmpnei      	r1, 0
+    3b4a:	0bb5      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    3b4c:	3280      	movi      	r2, 128
+    3b4e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b50:	4256      	lsli      	r2, r2, 22
+    3b52:	6848      	and      	r1, r2
+    3b54:	3940      	cmpnei      	r1, 0
+    3b56:	0baf      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+    3b58:	0799      	br      	0x3a8a	// 3a8a <SYSCONIntHandler+0x1a>
+    3b5a:	0000      	bkpt
+    3b5c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00003b60 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    3b60:	1460      	nie
+    3b62:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    3b64:	1078      	lrw      	r3, 0x20000060	// 3bc4 <IFCIntHandler+0x64>
+    3b66:	3101      	movi      	r1, 1
+    3b68:	9360      	ld.w      	r3, (r3, 0x0)
+    3b6a:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b6c:	6884      	and      	r2, r1
+    3b6e:	3a40      	cmpnei      	r2, 0
+    3b70:	0c04      	bf      	0x3b78	// 3b78 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    3b72:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    3b74:	1463      	ipop
+    3b76:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    3b78:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b7a:	3102      	movi      	r1, 2
+    3b7c:	6884      	and      	r2, r1
+    3b7e:	3a40      	cmpnei      	r2, 0
+    3b80:	0bf9      	bt      	0x3b72	// 3b72 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    3b82:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b84:	3104      	movi      	r1, 4
+    3b86:	6884      	and      	r2, r1
+    3b88:	3a40      	cmpnei      	r2, 0
+    3b8a:	0bf4      	bt      	0x3b72	// 3b72 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    3b8c:	3280      	movi      	r2, 128
+    3b8e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b90:	4245      	lsli      	r2, r2, 5
+    3b92:	6848      	and      	r1, r2
+    3b94:	3940      	cmpnei      	r1, 0
+    3b96:	0c03      	bf      	0x3b9c	// 3b9c <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    3b98:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    3b9a:	07ed      	br      	0x3b74	// 3b74 <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    3b9c:	3280      	movi      	r2, 128
+    3b9e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3ba0:	4246      	lsli      	r2, r2, 6
+    3ba2:	6848      	and      	r1, r2
+    3ba4:	3940      	cmpnei      	r1, 0
+    3ba6:	0bf9      	bt      	0x3b98	// 3b98 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    3ba8:	3280      	movi      	r2, 128
+    3baa:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bac:	4247      	lsli      	r2, r2, 7
+    3bae:	6848      	and      	r1, r2
+    3bb0:	3940      	cmpnei      	r1, 0
+    3bb2:	0bf3      	bt      	0x3b98	// 3b98 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    3bb4:	3280      	movi      	r2, 128
+    3bb6:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bb8:	4248      	lsli      	r2, r2, 8
+    3bba:	6848      	and      	r1, r2
+    3bbc:	3940      	cmpnei      	r1, 0
+    3bbe:	0bed      	bt      	0x3b98	// 3b98 <IFCIntHandler+0x38>
+    3bc0:	07da      	br      	0x3b74	// 3b74 <IFCIntHandler+0x14>
+    3bc2:	0000      	bkpt
+    3bc4:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00003bc8 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    3bc8:	1460      	nie
+    3bca:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    3bcc:	1078      	lrw      	r3, 0x20000050	// 3c2c <ADCIntHandler+0x64>
+    3bce:	3101      	movi      	r1, 1
+    3bd0:	9360      	ld.w      	r3, (r3, 0x0)
+    3bd2:	9348      	ld.w      	r2, (r3, 0x20)
+    3bd4:	6884      	and      	r2, r1
+    3bd6:	3a40      	cmpnei      	r2, 0
+    3bd8:	0c04      	bf      	0x3be0	// 3be0 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    3bda:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    3bdc:	1463      	ipop
+    3bde:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    3be0:	9348      	ld.w      	r2, (r3, 0x20)
+    3be2:	3102      	movi      	r1, 2
+    3be4:	6884      	and      	r2, r1
+    3be6:	3a40      	cmpnei      	r2, 0
+    3be8:	0bf9      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    3bea:	9348      	ld.w      	r2, (r3, 0x20)
+    3bec:	3104      	movi      	r1, 4
+    3bee:	6884      	and      	r2, r1
+    3bf0:	3a40      	cmpnei      	r2, 0
+    3bf2:	0bf4      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    3bf4:	9348      	ld.w      	r2, (r3, 0x20)
+    3bf6:	3110      	movi      	r1, 16
+    3bf8:	6884      	and      	r2, r1
+    3bfa:	3a40      	cmpnei      	r2, 0
+    3bfc:	0bef      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    3bfe:	9348      	ld.w      	r2, (r3, 0x20)
+    3c00:	3120      	movi      	r1, 32
+    3c02:	6884      	and      	r2, r1
+    3c04:	3a40      	cmpnei      	r2, 0
+    3c06:	0bea      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    3c08:	9348      	ld.w      	r2, (r3, 0x20)
+    3c0a:	3140      	movi      	r1, 64
+    3c0c:	6884      	and      	r2, r1
+    3c0e:	3a40      	cmpnei      	r2, 0
+    3c10:	0be5      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    3c12:	9348      	ld.w      	r2, (r3, 0x20)
+    3c14:	3180      	movi      	r1, 128
+    3c16:	6884      	and      	r2, r1
+    3c18:	3a40      	cmpnei      	r2, 0
+    3c1a:	0be0      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    3c1c:	3280      	movi      	r2, 128
+    3c1e:	9328      	ld.w      	r1, (r3, 0x20)
+    3c20:	4249      	lsli      	r2, r2, 9
+    3c22:	6848      	and      	r1, r2
+    3c24:	3940      	cmpnei      	r1, 0
+    3c26:	0fdb      	bf      	0x3bdc	// 3bdc <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    3c28:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    3c2a:	07d9      	br      	0x3bdc	// 3bdc <ADCIntHandler+0x14>
+    3c2c:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00003c30 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    3c30:	1460      	nie
+    3c32:	1462      	ipush
+    3c34:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    3c36:	1387      	lrw      	r4, 0x20000020	// 3dd0 <EPT0IntHandler+0x1a0>
+    3c38:	3280      	movi      	r2, 128
+    3c3a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c3c:	60c8      	addu      	r3, r2
+    3c3e:	9335      	ld.w      	r1, (r3, 0x54)
+    3c40:	3001      	movi      	r0, 1
+    3c42:	6840      	and      	r1, r0
+    3c44:	3940      	cmpnei      	r1, 0
+    3c46:	0c03      	bf      	0x3c4c	// 3c4c <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    3c48:	b317      	st.w      	r0, (r3, 0x5c)
+    3c4a:	0424      	br      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    3c4c:	9335      	ld.w      	r1, (r3, 0x54)
+    3c4e:	3002      	movi      	r0, 2
+    3c50:	6840      	and      	r1, r0
+    3c52:	3940      	cmpnei      	r1, 0
+    3c54:	0bfa      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    3c56:	9335      	ld.w      	r1, (r3, 0x54)
+    3c58:	3004      	movi      	r0, 4
+    3c5a:	6840      	and      	r1, r0
+    3c5c:	3940      	cmpnei      	r1, 0
+    3c5e:	0bf5      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    3c60:	9335      	ld.w      	r1, (r3, 0x54)
+    3c62:	3008      	movi      	r0, 8
+    3c64:	6840      	and      	r1, r0
+    3c66:	3940      	cmpnei      	r1, 0
+    3c68:	0bf0      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    3c6a:	9335      	ld.w      	r1, (r3, 0x54)
+    3c6c:	3010      	movi      	r0, 16
+    3c6e:	6840      	and      	r1, r0
+    3c70:	3940      	cmpnei      	r1, 0
+    3c72:	0c1f      	bf      	0x3cb0	// 3cb0 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    3c74:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    3c76:	3200      	movi      	r2, 0
+    3c78:	3101      	movi      	r1, 1
+    3c7a:	3000      	movi      	r0, 0
+    3c7c:	e3fffa98 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    3c80:	3201      	movi      	r2, 1
+    3c82:	3101      	movi      	r1, 1
+    3c84:	3001      	movi      	r0, 1
+    3c86:	e3fffa93 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    3c8a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c8c:	934b      	ld.w      	r2, (r3, 0x2c)
+    3c8e:	1272      	lrw      	r3, 0x20000388	// 3dd4 <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3c90:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    3c92:	9460      	ld.w      	r3, (r4, 0x0)
+    3c94:	3280      	movi      	r2, 128
+    3c96:	60c8      	addu      	r3, r2
+    3c98:	932b      	ld.w      	r1, (r3, 0x2c)
+    3c9a:	3001      	movi      	r0, 1
+    3c9c:	6840      	and      	r1, r0
+    3c9e:	3940      	cmpnei      	r1, 0
+    3ca0:	0c61      	bf      	0x3d62	// 3d62 <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    3ca2:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    3ca4:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3ca8:	9880      	ld.w      	r4, (r14, 0x0)
+    3caa:	1402      	addi      	r14, r14, 8
+    3cac:	1463      	ipop
+    3cae:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    3cb0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cb2:	3020      	movi      	r0, 32
+    3cb4:	6840      	and      	r1, r0
+    3cb6:	3940      	cmpnei      	r1, 0
+    3cb8:	0c10      	bf      	0x3cd8	// 3cd8 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    3cba:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    3cbc:	3200      	movi      	r2, 0
+    3cbe:	3101      	movi      	r1, 1
+    3cc0:	3001      	movi      	r0, 1
+    3cc2:	e3fffa75 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    3cc6:	3201      	movi      	r2, 1
+    3cc8:	3101      	movi      	r1, 1
+    3cca:	3000      	movi      	r0, 0
+    3ccc:	e3fffa70 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3cd0:	9460      	ld.w      	r3, (r4, 0x0)
+    3cd2:	934c      	ld.w      	r2, (r3, 0x30)
+    3cd4:	1261      	lrw      	r3, 0x20000384	// 3dd8 <EPT0IntHandler+0x1a8>
+    3cd6:	07dd      	br      	0x3c90	// 3c90 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    3cd8:	9335      	ld.w      	r1, (r3, 0x54)
+    3cda:	3040      	movi      	r0, 64
+    3cdc:	6840      	and      	r1, r0
+    3cde:	3940      	cmpnei      	r1, 0
+    3ce0:	0bb4      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    3ce2:	9335      	ld.w      	r1, (r3, 0x54)
+    3ce4:	6848      	and      	r1, r2
+    3ce6:	3940      	cmpnei      	r1, 0
+    3ce8:	0c03      	bf      	0x3cee	// 3cee <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    3cea:	b357      	st.w      	r2, (r3, 0x5c)
+    3cec:	07d3      	br      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    3cee:	3280      	movi      	r2, 128
+    3cf0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cf2:	4241      	lsli      	r2, r2, 1
+    3cf4:	6848      	and      	r1, r2
+    3cf6:	3940      	cmpnei      	r1, 0
+    3cf8:	0bf9      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    3cfa:	3280      	movi      	r2, 128
+    3cfc:	9335      	ld.w      	r1, (r3, 0x54)
+    3cfe:	4242      	lsli      	r2, r2, 2
+    3d00:	6848      	and      	r1, r2
+    3d02:	3940      	cmpnei      	r1, 0
+    3d04:	0bf3      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    3d06:	3280      	movi      	r2, 128
+    3d08:	9335      	ld.w      	r1, (r3, 0x54)
+    3d0a:	4243      	lsli      	r2, r2, 3
+    3d0c:	6848      	and      	r1, r2
+    3d0e:	3940      	cmpnei      	r1, 0
+    3d10:	0bed      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    3d12:	3280      	movi      	r2, 128
+    3d14:	9335      	ld.w      	r1, (r3, 0x54)
+    3d16:	4244      	lsli      	r2, r2, 4
+    3d18:	6848      	and      	r1, r2
+    3d1a:	3940      	cmpnei      	r1, 0
+    3d1c:	0be7      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    3d1e:	3280      	movi      	r2, 128
+    3d20:	9335      	ld.w      	r1, (r3, 0x54)
+    3d22:	4245      	lsli      	r2, r2, 5
+    3d24:	6848      	and      	r1, r2
+    3d26:	3940      	cmpnei      	r1, 0
+    3d28:	0be1      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    3d2a:	3280      	movi      	r2, 128
+    3d2c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d2e:	4246      	lsli      	r2, r2, 6
+    3d30:	6848      	and      	r1, r2
+    3d32:	3940      	cmpnei      	r1, 0
+    3d34:	0bdb      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    3d36:	3280      	movi      	r2, 128
+    3d38:	9335      	ld.w      	r1, (r3, 0x54)
+    3d3a:	4247      	lsli      	r2, r2, 7
+    3d3c:	6848      	and      	r1, r2
+    3d3e:	3940      	cmpnei      	r1, 0
+    3d40:	0bd5      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    3d42:	3280      	movi      	r2, 128
+    3d44:	9335      	ld.w      	r1, (r3, 0x54)
+    3d46:	4248      	lsli      	r2, r2, 8
+    3d48:	6848      	and      	r1, r2
+    3d4a:	3940      	cmpnei      	r1, 0
+    3d4c:	0bcf      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    3d4e:	3280      	movi      	r2, 128
+    3d50:	9335      	ld.w      	r1, (r3, 0x54)
+    3d52:	4249      	lsli      	r2, r2, 9
+    3d54:	6848      	and      	r1, r2
+    3d56:	3940      	cmpnei      	r1, 0
+    3d58:	0f9d      	bf      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    3d5a:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    3d5c:	e3fffd50 	bsr      	0x37fc	// 37fc <EPT_Stop>
+    3d60:	0799      	br      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    3d62:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d64:	3002      	movi      	r0, 2
+    3d66:	6840      	and      	r1, r0
+    3d68:	3940      	cmpnei      	r1, 0
+    3d6a:	0b9c      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    3d6c:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d6e:	3004      	movi      	r0, 4
+    3d70:	6840      	and      	r1, r0
+    3d72:	3940      	cmpnei      	r1, 0
+    3d74:	0b97      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    3d76:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d78:	3008      	movi      	r0, 8
+    3d7a:	6840      	and      	r1, r0
+    3d7c:	3940      	cmpnei      	r1, 0
+    3d7e:	0b92      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    3d80:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d82:	3010      	movi      	r0, 16
+    3d84:	6840      	and      	r1, r0
+    3d86:	3940      	cmpnei      	r1, 0
+    3d88:	0b8d      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    3d8a:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d8c:	3020      	movi      	r0, 32
+    3d8e:	6840      	and      	r1, r0
+    3d90:	3940      	cmpnei      	r1, 0
+    3d92:	0b88      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    3d94:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d96:	3040      	movi      	r0, 64
+    3d98:	6840      	and      	r1, r0
+    3d9a:	3940      	cmpnei      	r1, 0
+    3d9c:	0b83      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    3d9e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3da0:	6848      	and      	r1, r2
+    3da2:	3940      	cmpnei      	r1, 0
+    3da4:	0c03      	bf      	0x3daa	// 3daa <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    3da6:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    3da8:	077e      	br      	0x3ca4	// 3ca4 <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    3daa:	3280      	movi      	r2, 128
+    3dac:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dae:	4241      	lsli      	r2, r2, 1
+    3db0:	6848      	and      	r1, r2
+    3db2:	3940      	cmpnei      	r1, 0
+    3db4:	0bf9      	bt      	0x3da6	// 3da6 <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    3db6:	3280      	movi      	r2, 128
+    3db8:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dba:	4242      	lsli      	r2, r2, 2
+    3dbc:	6848      	and      	r1, r2
+    3dbe:	3940      	cmpnei      	r1, 0
+    3dc0:	0bf3      	bt      	0x3da6	// 3da6 <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    3dc2:	3280      	movi      	r2, 128
+    3dc4:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dc6:	4243      	lsli      	r2, r2, 3
+    3dc8:	6848      	and      	r1, r2
+    3dca:	3940      	cmpnei      	r1, 0
+    3dcc:	0bed      	bt      	0x3da6	// 3da6 <EPT0IntHandler+0x176>
+    3dce:	076b      	br      	0x3ca4	// 3ca4 <EPT0IntHandler+0x74>
+    3dd0:	20000020 	.long	0x20000020
+    3dd4:	20000388 	.long	0x20000388
+    3dd8:	20000384 	.long	0x20000384
+
+Disassembly of section .text.WWDTHandler:
+
+00003ddc <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    3ddc:	1460      	nie
+    3dde:	1462      	ipush
+    3de0:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    3de2:	10ab      	lrw      	r5, 0x20000010	// 3e0c <WWDTHandler+0x30>
+    3de4:	3401      	movi      	r4, 1
+    3de6:	9560      	ld.w      	r3, (r5, 0x0)
+    3de8:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    3dea:	30ff      	movi      	r0, 255
+    3dec:	e3fffade 	bsr      	0x33a8	// 33a8 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    3df0:	9540      	ld.w      	r2, (r5, 0x0)
+    3df2:	9263      	ld.w      	r3, (r2, 0xc)
+    3df4:	68d0      	and      	r3, r4
+    3df6:	3b40      	cmpnei      	r3, 0
+    3df8:	0c02      	bf      	0x3dfc	// 3dfc <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    3dfa:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    3dfc:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    3e00:	98a1      	ld.w      	r5, (r14, 0x4)
+    3e02:	9880      	ld.w      	r4, (r14, 0x0)
+    3e04:	1403      	addi      	r14, r14, 12
+    3e06:	1463      	ipop
+    3e08:	1461      	nir
+    3e0a:	0000      	bkpt
+    3e0c:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00003e10 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    3e10:	1460      	nie
+    3e12:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    3e14:	107e      	lrw      	r3, 0x20000024	// 3e8c <GPT0IntHandler+0x7c>
+    3e16:	3101      	movi      	r1, 1
+    3e18:	9360      	ld.w      	r3, (r3, 0x0)
+    3e1a:	237f      	addi      	r3, 128
+    3e1c:	9355      	ld.w      	r2, (r3, 0x54)
+    3e1e:	6884      	and      	r2, r1
+    3e20:	3a40      	cmpnei      	r2, 0
+    3e22:	0c04      	bf      	0x3e2a	// 3e2a <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    3e24:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    3e26:	1463      	ipop
+    3e28:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    3e2a:	9355      	ld.w      	r2, (r3, 0x54)
+    3e2c:	3102      	movi      	r1, 2
+    3e2e:	6884      	and      	r2, r1
+    3e30:	3a40      	cmpnei      	r2, 0
+    3e32:	0bf9      	bt      	0x3e24	// 3e24 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    3e34:	9355      	ld.w      	r2, (r3, 0x54)
+    3e36:	3110      	movi      	r1, 16
+    3e38:	6884      	and      	r2, r1
+    3e3a:	3a40      	cmpnei      	r2, 0
+    3e3c:	0bf4      	bt      	0x3e24	// 3e24 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    3e3e:	9355      	ld.w      	r2, (r3, 0x54)
+    3e40:	3120      	movi      	r1, 32
+    3e42:	6884      	and      	r2, r1
+    3e44:	3a40      	cmpnei      	r2, 0
+    3e46:	0bef      	bt      	0x3e24	// 3e24 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    3e48:	3280      	movi      	r2, 128
+    3e4a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e4c:	4241      	lsli      	r2, r2, 1
+    3e4e:	6848      	and      	r1, r2
+    3e50:	3940      	cmpnei      	r1, 0
+    3e52:	0c03      	bf      	0x3e58	// 3e58 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    3e54:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    3e56:	07e8      	br      	0x3e26	// 3e26 <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    3e58:	3280      	movi      	r2, 128
+    3e5a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e5c:	4242      	lsli      	r2, r2, 2
+    3e5e:	6848      	and      	r1, r2
+    3e60:	3940      	cmpnei      	r1, 0
+    3e62:	0bf9      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    3e64:	3280      	movi      	r2, 128
+    3e66:	9335      	ld.w      	r1, (r3, 0x54)
+    3e68:	4243      	lsli      	r2, r2, 3
+    3e6a:	6848      	and      	r1, r2
+    3e6c:	3940      	cmpnei      	r1, 0
+    3e6e:	0bf3      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    3e70:	3280      	movi      	r2, 128
+    3e72:	9335      	ld.w      	r1, (r3, 0x54)
+    3e74:	4244      	lsli      	r2, r2, 4
+    3e76:	6848      	and      	r1, r2
+    3e78:	3940      	cmpnei      	r1, 0
+    3e7a:	0bed      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    3e7c:	3280      	movi      	r2, 128
+    3e7e:	9335      	ld.w      	r1, (r3, 0x54)
+    3e80:	4249      	lsli      	r2, r2, 9
+    3e82:	6848      	and      	r1, r2
+    3e84:	3940      	cmpnei      	r1, 0
+    3e86:	0be7      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+    3e88:	07cf      	br      	0x3e26	// 3e26 <GPT0IntHandler+0x16>
+    3e8a:	0000      	bkpt
+    3e8c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00003e90 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    3e90:	1460      	nie
+    3e92:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    3e94:	1079      	lrw      	r3, 0x20000018	// 3ef8 <RTCIntHandler+0x68>
+    3e96:	3101      	movi      	r1, 1
+    3e98:	9360      	ld.w      	r3, (r3, 0x0)
+    3e9a:	934a      	ld.w      	r2, (r3, 0x28)
+    3e9c:	6884      	and      	r2, r1
+    3e9e:	3a40      	cmpnei      	r2, 0
+    3ea0:	0c14      	bf      	0x3ec8	// 3ec8 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    3ea2:	1057      	lrw      	r2, 0xca53	// 3efc <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    3ea4:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    3ea6:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    3ea8:	9342      	ld.w      	r2, (r3, 0x8)
+    3eaa:	6c84      	or      	r2, r1
+    3eac:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    3eae:	3280      	movi      	r2, 128
+    3eb0:	424d      	lsli      	r2, r2, 13
+    3eb2:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    3eb4:	3102      	movi      	r1, 2
+    3eb6:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb8:	6884      	and      	r2, r1
+    3eba:	3a40      	cmpnei      	r2, 0
+    3ebc:	0bfd      	bt      	0x3eb6	// 3eb6 <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    3ebe:	9342      	ld.w      	r2, (r3, 0x8)
+    3ec0:	3a80      	bclri      	r2, 0
+    3ec2:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    3ec4:	1463      	ipop
+    3ec6:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    3ec8:	934a      	ld.w      	r2, (r3, 0x28)
+    3eca:	3102      	movi      	r1, 2
+    3ecc:	6884      	and      	r2, r1
+    3ece:	3a40      	cmpnei      	r2, 0
+    3ed0:	0c03      	bf      	0x3ed6	// 3ed6 <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    3ed2:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    3ed4:	07f8      	br      	0x3ec4	// 3ec4 <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    3ed6:	934a      	ld.w      	r2, (r3, 0x28)
+    3ed8:	3104      	movi      	r1, 4
+    3eda:	6884      	and      	r2, r1
+    3edc:	3a40      	cmpnei      	r2, 0
+    3ede:	0bfa      	bt      	0x3ed2	// 3ed2 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    3ee0:	934a      	ld.w      	r2, (r3, 0x28)
+    3ee2:	3108      	movi      	r1, 8
+    3ee4:	6884      	and      	r2, r1
+    3ee6:	3a40      	cmpnei      	r2, 0
+    3ee8:	0bf5      	bt      	0x3ed2	// 3ed2 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    3eea:	934a      	ld.w      	r2, (r3, 0x28)
+    3eec:	3110      	movi      	r1, 16
+    3eee:	6884      	and      	r2, r1
+    3ef0:	3a40      	cmpnei      	r2, 0
+    3ef2:	0bf0      	bt      	0x3ed2	// 3ed2 <RTCIntHandler+0x42>
+    3ef4:	07e8      	br      	0x3ec4	// 3ec4 <RTCIntHandler+0x34>
+    3ef6:	0000      	bkpt
+    3ef8:	20000018 	.long	0x20000018
+    3efc:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00003f00 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    3f00:	1460      	nie
+    3f02:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f04:	106d      	lrw      	r3, 0x20000040	// 3f38 <UART0IntHandler+0x38>
+    3f06:	3102      	movi      	r1, 2
+    3f08:	9360      	ld.w      	r3, (r3, 0x0)
+    3f0a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f0c:	6884      	and      	r2, r1
+    3f0e:	3a40      	cmpnei      	r2, 0
+    3f10:	0c03      	bf      	0x3f16	// 3f16 <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    3f12:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f14:	0410      	br      	0x3f34	// 3f34 <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f16:	9343      	ld.w      	r2, (r3, 0xc)
+    3f18:	3101      	movi      	r1, 1
+    3f1a:	6884      	and      	r2, r1
+    3f1c:	3a40      	cmpnei      	r2, 0
+    3f1e:	0bfa      	bt      	0x3f12	// 3f12 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f20:	9343      	ld.w      	r2, (r3, 0xc)
+    3f22:	3108      	movi      	r1, 8
+    3f24:	6884      	and      	r2, r1
+    3f26:	3a40      	cmpnei      	r2, 0
+    3f28:	0bf5      	bt      	0x3f12	// 3f12 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f2a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f2c:	3104      	movi      	r1, 4
+    3f2e:	6884      	and      	r2, r1
+    3f30:	3a40      	cmpnei      	r2, 0
+    3f32:	0bf0      	bt      	0x3f12	// 3f12 <UART0IntHandler+0x12>
+}
+    3f34:	1463      	ipop
+    3f36:	1461      	nir
+    3f38:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00003f3c <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    3f3c:	1460      	nie
+    3f3e:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f40:	106d      	lrw      	r3, 0x2000003c	// 3f74 <UART1IntHandler+0x38>
+    3f42:	3102      	movi      	r1, 2
+    3f44:	9360      	ld.w      	r3, (r3, 0x0)
+    3f46:	9343      	ld.w      	r2, (r3, 0xc)
+    3f48:	6884      	and      	r2, r1
+    3f4a:	3a40      	cmpnei      	r2, 0
+    3f4c:	0c03      	bf      	0x3f52	// 3f52 <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    3f4e:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f50:	0410      	br      	0x3f70	// 3f70 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f52:	9343      	ld.w      	r2, (r3, 0xc)
+    3f54:	3101      	movi      	r1, 1
+    3f56:	6884      	and      	r2, r1
+    3f58:	3a40      	cmpnei      	r2, 0
+    3f5a:	0bfa      	bt      	0x3f4e	// 3f4e <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f5c:	9343      	ld.w      	r2, (r3, 0xc)
+    3f5e:	3108      	movi      	r1, 8
+    3f60:	6884      	and      	r2, r1
+    3f62:	3a40      	cmpnei      	r2, 0
+    3f64:	0bf5      	bt      	0x3f4e	// 3f4e <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f66:	9343      	ld.w      	r2, (r3, 0xc)
+    3f68:	3104      	movi      	r1, 4
+    3f6a:	6884      	and      	r2, r1
+    3f6c:	3a40      	cmpnei      	r2, 0
+    3f6e:	0bf0      	bt      	0x3f4e	// 3f4e <UART1IntHandler+0x12>
+}
+    3f70:	1463      	ipop
+    3f72:	1461      	nir
+    3f74:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00003f78 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    3f78:	1460      	nie
+    3f7a:	1462      	ipush
+    3f7c:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f7e:	107f      	lrw      	r3, 0x20000038	// 3ff8 <UART2IntHandler+0x80>
+    3f80:	3102      	movi      	r1, 2
+    3f82:	9360      	ld.w      	r3, (r3, 0x0)
+    3f84:	9343      	ld.w      	r2, (r3, 0xc)
+    3f86:	6884      	and      	r2, r1
+    3f88:	3a40      	cmpnei      	r2, 0
+    3f8a:	0c0b      	bf      	0x3fa0	// 3fa0 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    3f8c:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    3f8e:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    3f90:	7400      	zextb      	r0, r0
+    3f92:	e00002e9 	bsr      	0x4564	// 4564 <UART2_RecvINT_Processing>
+		//GPIO_Write_Low(GPIOB0,3);
+		
+		//GPIO_Reverse(GPIOB0,3);
+	}
+	
+}
+    3f96:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3f9a:	1401      	addi      	r14, r14, 4
+    3f9c:	1463      	ipop
+    3f9e:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3fa0:	9323      	ld.w      	r1, (r3, 0xc)
+    3fa2:	3201      	movi      	r2, 1
+    3fa4:	6848      	and      	r1, r2
+    3fa6:	3940      	cmpnei      	r1, 0
+    3fa8:	0c0d      	bf      	0x3fc2	// 3fc2 <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    3faa:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    3fac:	1074      	lrw      	r3, 0x200000bc	// 3ffc <UART2IntHandler+0x84>
+    3fae:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fb0:	1074      	lrw      	r3, 0x200000c0	// 4000 <UART2IntHandler+0x88>
+    3fb2:	9360      	ld.w      	r3, (r3, 0x0)
+    3fb4:	3b41      	cmpnei      	r3, 1
+    3fb6:	0bf0      	bt      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    3fb8:	1053      	lrw      	r2, 0x200000c4	// 4004 <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    3fba:	9260      	ld.w      	r3, (r2, 0x0)
+    3fbc:	2300      	addi      	r3, 1
+    3fbe:	b260      	st.w      	r3, (r2, 0x0)
+}
+    3fc0:	07eb      	br      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3fc2:	9343      	ld.w      	r2, (r3, 0xc)
+    3fc4:	3108      	movi      	r1, 8
+    3fc6:	6884      	and      	r2, r1
+    3fc8:	3a40      	cmpnei      	r2, 0
+    3fca:	0c03      	bf      	0x3fd0	// 3fd0 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    3fcc:	b323      	st.w      	r1, (r3, 0xc)
+    3fce:	07e4      	br      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3fd0:	9343      	ld.w      	r2, (r3, 0xc)
+    3fd2:	3104      	movi      	r1, 4
+    3fd4:	6884      	and      	r2, r1
+    3fd6:	3a40      	cmpnei      	r2, 0
+    3fd8:	0bfa      	bt      	0x3fcc	// 3fcc <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    3fda:	3180      	movi      	r1, 128
+    3fdc:	9303      	ld.w      	r0, (r3, 0xc)
+    3fde:	412c      	lsli      	r1, r1, 12
+    3fe0:	6804      	and      	r0, r1
+    3fe2:	3840      	cmpnei      	r0, 0
+    3fe4:	0fd9      	bf      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    3fe6:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    3fe8:	1065      	lrw      	r3, 0x200000bc	// 3ffc <UART2IntHandler+0x84>
+    3fea:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fec:	1065      	lrw      	r3, 0x200000c0	// 4000 <UART2IntHandler+0x88>
+    3fee:	9360      	ld.w      	r3, (r3, 0x0)
+    3ff0:	3b41      	cmpnei      	r3, 1
+    3ff2:	0bd2      	bt      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    3ff4:	1045      	lrw      	r2, 0x200000c8	// 4008 <UART2IntHandler+0x90>
+    3ff6:	07e2      	br      	0x3fba	// 3fba <UART2IntHandler+0x42>
+    3ff8:	20000038 	.long	0x20000038
+    3ffc:	200000bc 	.long	0x200000bc
+    4000:	200000c0 	.long	0x200000c0
+    4004:	200000c4 	.long	0x200000c4
+    4008:	200000c8 	.long	0x200000c8
+
+Disassembly of section .text.SPI0IntHandler:
+
+0000400c <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    400c:	1460      	nie
+    400e:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    4010:	1178      	lrw      	r3, 0x20000034	// 40f0 <SPI0IntHandler+0xe4>
+    4012:	3101      	movi      	r1, 1
+    4014:	9360      	ld.w      	r3, (r3, 0x0)
+    4016:	9347      	ld.w      	r2, (r3, 0x1c)
+    4018:	6884      	and      	r2, r1
+    401a:	3a40      	cmpnei      	r2, 0
+    401c:	0c03      	bf      	0x4022	// 4022 <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    401e:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    4020:	0407      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    4022:	9347      	ld.w      	r2, (r3, 0x1c)
+    4024:	3002      	movi      	r0, 2
+    4026:	6880      	and      	r2, r0
+    4028:	3a40      	cmpnei      	r2, 0
+    402a:	0c04      	bf      	0x4032	// 4032 <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    402c:	b308      	st.w      	r0, (r3, 0x20)
+}
+    402e:	1463      	ipop
+    4030:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    4032:	9347      	ld.w      	r2, (r3, 0x1c)
+    4034:	3004      	movi      	r0, 4
+    4036:	6880      	and      	r2, r0
+    4038:	3a40      	cmpnei      	r2, 0
+    403a:	0c55      	bf      	0x40e4	// 40e4 <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    403c:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    403e:	9302      	ld.w      	r0, (r3, 0x8)
+    4040:	32aa      	movi      	r2, 170
+    4042:	6482      	cmpne      	r0, r2
+    4044:	083e      	bt      	0x40c0	// 40c0 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4046:	3102      	movi      	r1, 2
+    4048:	9343      	ld.w      	r2, (r3, 0xc)
+    404a:	6884      	and      	r2, r1
+    404c:	3a40      	cmpnei      	r2, 0
+    404e:	0ffd      	bf      	0x4048	// 4048 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    4050:	3211      	movi      	r2, 17
+    4052:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4054:	3110      	movi      	r1, 16
+    4056:	9343      	ld.w      	r2, (r3, 0xc)
+    4058:	6884      	and      	r2, r1
+    405a:	3a40      	cmpnei      	r2, 0
+    405c:	0bfd      	bt      	0x4056	// 4056 <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    405e:	3102      	movi      	r1, 2
+    4060:	9343      	ld.w      	r2, (r3, 0xc)
+    4062:	6884      	and      	r2, r1
+    4064:	3a40      	cmpnei      	r2, 0
+    4066:	0ffd      	bf      	0x4060	// 4060 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    4068:	3212      	movi      	r2, 18
+    406a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    406c:	3110      	movi      	r1, 16
+    406e:	9343      	ld.w      	r2, (r3, 0xc)
+    4070:	6884      	and      	r2, r1
+    4072:	3a40      	cmpnei      	r2, 0
+    4074:	0bfd      	bt      	0x406e	// 406e <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4076:	3102      	movi      	r1, 2
+    4078:	9343      	ld.w      	r2, (r3, 0xc)
+    407a:	6884      	and      	r2, r1
+    407c:	3a40      	cmpnei      	r2, 0
+    407e:	0ffd      	bf      	0x4078	// 4078 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    4080:	3213      	movi      	r2, 19
+    4082:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4084:	3110      	movi      	r1, 16
+    4086:	9343      	ld.w      	r2, (r3, 0xc)
+    4088:	6884      	and      	r2, r1
+    408a:	3a40      	cmpnei      	r2, 0
+    408c:	0bfd      	bt      	0x4086	// 4086 <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    408e:	3102      	movi      	r1, 2
+    4090:	9343      	ld.w      	r2, (r3, 0xc)
+    4092:	6884      	and      	r2, r1
+    4094:	3a40      	cmpnei      	r2, 0
+    4096:	0ffd      	bf      	0x4090	// 4090 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    4098:	3214      	movi      	r2, 20
+    409a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    409c:	3110      	movi      	r1, 16
+    409e:	9343      	ld.w      	r2, (r3, 0xc)
+    40a0:	6884      	and      	r2, r1
+    40a2:	3a40      	cmpnei      	r2, 0
+    40a4:	0bfd      	bt      	0x409e	// 409e <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    40a6:	3102      	movi      	r1, 2
+    40a8:	9343      	ld.w      	r2, (r3, 0xc)
+    40aa:	6884      	and      	r2, r1
+    40ac:	3a40      	cmpnei      	r2, 0
+    40ae:	0ffd      	bf      	0x40a8	// 40a8 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    40b0:	3215      	movi      	r2, 21
+    40b2:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    40b4:	3110      	movi      	r1, 16
+    40b6:	9343      	ld.w      	r2, (r3, 0xc)
+    40b8:	6884      	and      	r2, r1
+    40ba:	3a40      	cmpnei      	r2, 0
+    40bc:	0bfd      	bt      	0x40b6	// 40b6 <SPI0IntHandler+0xaa>
+    40be:	07b8      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    40c0:	9343      	ld.w      	r2, (r3, 0xc)
+    40c2:	6884      	and      	r2, r1
+    40c4:	3a40      	cmpnei      	r2, 0
+    40c6:	0bb4      	bt      	0x402e	// 402e <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    40c8:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40ca:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    40cc:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ce:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d0:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d2:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d8:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40da:	9343      	ld.w      	r2, (r3, 0xc)
+    40dc:	6884      	and      	r2, r1
+    40de:	3a40      	cmpnei      	r2, 0
+    40e0:	0bfd      	bt      	0x40da	// 40da <SPI0IntHandler+0xce>
+    40e2:	07a6      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    40e4:	9347      	ld.w      	r2, (r3, 0x1c)
+    40e6:	3108      	movi      	r1, 8
+    40e8:	6884      	and      	r2, r1
+    40ea:	3a40      	cmpnei      	r2, 0
+    40ec:	0b99      	bt      	0x401e	// 401e <SPI0IntHandler+0x12>
+    40ee:	07a0      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+    40f0:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+000040f4 <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    40f4:	1460      	nie
+    40f6:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    40f8:	1073      	lrw      	r3, 0x2000002c	// 4144 <SIO0IntHandler+0x50>
+    40fa:	3104      	movi      	r1, 4
+    40fc:	9360      	ld.w      	r3, (r3, 0x0)
+    40fe:	9349      	ld.w      	r2, (r3, 0x24)
+    4100:	6884      	and      	r2, r1
+    4102:	3a40      	cmpnei      	r2, 0
+    4104:	0c02      	bf      	0x4108	// 4108 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    4106:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    4108:	9349      	ld.w      	r2, (r3, 0x24)
+    410a:	3101      	movi      	r1, 1
+    410c:	6884      	and      	r2, r1
+    410e:	3a40      	cmpnei      	r2, 0
+    4110:	0c02      	bf      	0x4114	// 4114 <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    4112:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    4114:	9349      	ld.w      	r2, (r3, 0x24)
+    4116:	3102      	movi      	r1, 2
+    4118:	6884      	and      	r2, r1
+    411a:	3a40      	cmpnei      	r2, 0
+    411c:	0c03      	bf      	0x4122	// 4122 <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    411e:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    4120:	0410      	br      	0x4140	// 4140 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    4122:	9349      	ld.w      	r2, (r3, 0x24)
+    4124:	3108      	movi      	r1, 8
+    4126:	6884      	and      	r2, r1
+    4128:	3a40      	cmpnei      	r2, 0
+    412a:	0bfa      	bt      	0x411e	// 411e <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    412c:	9349      	ld.w      	r2, (r3, 0x24)
+    412e:	3110      	movi      	r1, 16
+    4130:	6884      	and      	r2, r1
+    4132:	3a40      	cmpnei      	r2, 0
+    4134:	0bf5      	bt      	0x411e	// 411e <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    4136:	9349      	ld.w      	r2, (r3, 0x24)
+    4138:	3120      	movi      	r1, 32
+    413a:	6884      	and      	r2, r1
+    413c:	3a40      	cmpnei      	r2, 0
+    413e:	0bf0      	bt      	0x411e	// 411e <SIO0IntHandler+0x2a>
+}
+    4140:	1463      	ipop
+    4142:	1461      	nir
+    4144:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00004148 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    4148:	1460      	nie
+    414a:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    414c:	106a      	lrw      	r3, 0x2000005c	// 4174 <EXI0IntHandler+0x2c>
+    414e:	3101      	movi      	r1, 1
+    4150:	9360      	ld.w      	r3, (r3, 0x0)
+    4152:	237f      	addi      	r3, 128
+    4154:	934c      	ld.w      	r2, (r3, 0x30)
+    4156:	6884      	and      	r2, r1
+    4158:	3a40      	cmpnei      	r2, 0
+    415a:	0c04      	bf      	0x4162	// 4162 <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    415c:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    415e:	1463      	ipop
+    4160:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    4162:	3280      	movi      	r2, 128
+    4164:	932c      	ld.w      	r1, (r3, 0x30)
+    4166:	4249      	lsli      	r2, r2, 9
+    4168:	6848      	and      	r1, r2
+    416a:	3940      	cmpnei      	r1, 0
+    416c:	0ff9      	bf      	0x415e	// 415e <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    416e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4170:	07f7      	br      	0x415e	// 415e <EXI0IntHandler+0x16>
+    4172:	0000      	bkpt
+    4174:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00004178 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    4178:	1460      	nie
+    417a:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    417c:	106a      	lrw      	r3, 0x2000005c	// 41a4 <EXI1IntHandler+0x2c>
+    417e:	3102      	movi      	r1, 2
+    4180:	9360      	ld.w      	r3, (r3, 0x0)
+    4182:	237f      	addi      	r3, 128
+    4184:	934c      	ld.w      	r2, (r3, 0x30)
+    4186:	6884      	and      	r2, r1
+    4188:	3a40      	cmpnei      	r2, 0
+    418a:	0c04      	bf      	0x4192	// 4192 <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    418c:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    418e:	1463      	ipop
+    4190:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    4192:	3280      	movi      	r2, 128
+    4194:	932c      	ld.w      	r1, (r3, 0x30)
+    4196:	424a      	lsli      	r2, r2, 10
+    4198:	6848      	and      	r1, r2
+    419a:	3940      	cmpnei      	r1, 0
+    419c:	0ff9      	bf      	0x418e	// 418e <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    419e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41a0:	07f7      	br      	0x418e	// 418e <EXI1IntHandler+0x16>
+    41a2:	0000      	bkpt
+    41a4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+000041a8 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    41a8:	1460      	nie
+    41aa:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    41ac:	1070      	lrw      	r3, 0x2000005c	// 41ec <EXI2to3IntHandler+0x44>
+    41ae:	3104      	movi      	r1, 4
+    41b0:	9360      	ld.w      	r3, (r3, 0x0)
+    41b2:	237f      	addi      	r3, 128
+    41b4:	934c      	ld.w      	r2, (r3, 0x30)
+    41b6:	6884      	and      	r2, r1
+    41b8:	3a40      	cmpnei      	r2, 0
+    41ba:	0c04      	bf      	0x41c2	// 41c2 <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    41bc:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    41be:	1463      	ipop
+    41c0:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    41c2:	934c      	ld.w      	r2, (r3, 0x30)
+    41c4:	3108      	movi      	r1, 8
+    41c6:	6884      	and      	r2, r1
+    41c8:	3a40      	cmpnei      	r2, 0
+    41ca:	0bf9      	bt      	0x41bc	// 41bc <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    41cc:	3280      	movi      	r2, 128
+    41ce:	932c      	ld.w      	r1, (r3, 0x30)
+    41d0:	424b      	lsli      	r2, r2, 11
+    41d2:	6848      	and      	r1, r2
+    41d4:	3940      	cmpnei      	r1, 0
+    41d6:	0c03      	bf      	0x41dc	// 41dc <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    41d8:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41da:	07f2      	br      	0x41be	// 41be <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    41dc:	3280      	movi      	r2, 128
+    41de:	932c      	ld.w      	r1, (r3, 0x30)
+    41e0:	424c      	lsli      	r2, r2, 12
+    41e2:	6848      	and      	r1, r2
+    41e4:	3940      	cmpnei      	r1, 0
+    41e6:	0bf9      	bt      	0x41d8	// 41d8 <EXI2to3IntHandler+0x30>
+    41e8:	07eb      	br      	0x41be	// 41be <EXI2to3IntHandler+0x16>
+    41ea:	0000      	bkpt
+    41ec:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+000041f0 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    41f0:	1460      	nie
+    41f2:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    41f4:	1075      	lrw      	r3, 0x2000005c	// 4248 <EXI4to9IntHandler+0x58>
+    41f6:	3280      	movi      	r2, 128
+    41f8:	9360      	ld.w      	r3, (r3, 0x0)
+    41fa:	60c8      	addu      	r3, r2
+    41fc:	932c      	ld.w      	r1, (r3, 0x30)
+    41fe:	3010      	movi      	r0, 16
+    4200:	6840      	and      	r1, r0
+    4202:	3940      	cmpnei      	r1, 0
+    4204:	0c04      	bf      	0x420c	// 420c <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    4206:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    4208:	1463      	ipop
+    420a:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    420c:	932c      	ld.w      	r1, (r3, 0x30)
+    420e:	3020      	movi      	r0, 32
+    4210:	6840      	and      	r1, r0
+    4212:	3940      	cmpnei      	r1, 0
+    4214:	0bf9      	bt      	0x4206	// 4206 <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    4216:	932c      	ld.w      	r1, (r3, 0x30)
+    4218:	3040      	movi      	r0, 64
+    421a:	6840      	and      	r1, r0
+    421c:	3940      	cmpnei      	r1, 0
+    421e:	0bf4      	bt      	0x4206	// 4206 <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    4220:	932c      	ld.w      	r1, (r3, 0x30)
+    4222:	6848      	and      	r1, r2
+    4224:	3940      	cmpnei      	r1, 0
+    4226:	0c03      	bf      	0x422c	// 422c <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    4228:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    422a:	07ef      	br      	0x4208	// 4208 <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    422c:	3280      	movi      	r2, 128
+    422e:	932c      	ld.w      	r1, (r3, 0x30)
+    4230:	4241      	lsli      	r2, r2, 1
+    4232:	6848      	and      	r1, r2
+    4234:	3940      	cmpnei      	r1, 0
+    4236:	0bf9      	bt      	0x4228	// 4228 <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    4238:	3280      	movi      	r2, 128
+    423a:	932c      	ld.w      	r1, (r3, 0x30)
+    423c:	4242      	lsli      	r2, r2, 2
+    423e:	6848      	and      	r1, r2
+    4240:	3940      	cmpnei      	r1, 0
+    4242:	0bf3      	bt      	0x4228	// 4228 <EXI4to9IntHandler+0x38>
+    4244:	07e2      	br      	0x4208	// 4208 <EXI4to9IntHandler+0x18>
+    4246:	0000      	bkpt
+    4248:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+0000424c <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    424c:	1460      	nie
+    424e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    4250:	1076      	lrw      	r3, 0x2000005c	// 42a8 <EXI10to15IntHandler+0x5c>
+    4252:	3280      	movi      	r2, 128
+    4254:	9360      	ld.w      	r3, (r3, 0x0)
+    4256:	237f      	addi      	r3, 128
+    4258:	932c      	ld.w      	r1, (r3, 0x30)
+    425a:	4243      	lsli      	r2, r2, 3
+    425c:	6848      	and      	r1, r2
+    425e:	3940      	cmpnei      	r1, 0
+    4260:	0c03      	bf      	0x4266	// 4266 <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    4262:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    4264:	041f      	br      	0x42a2	// 42a2 <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    4266:	3280      	movi      	r2, 128
+    4268:	932c      	ld.w      	r1, (r3, 0x30)
+    426a:	4244      	lsli      	r2, r2, 4
+    426c:	6848      	and      	r1, r2
+    426e:	3940      	cmpnei      	r1, 0
+    4270:	0bf9      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    4272:	3280      	movi      	r2, 128
+    4274:	932c      	ld.w      	r1, (r3, 0x30)
+    4276:	4245      	lsli      	r2, r2, 5
+    4278:	6848      	and      	r1, r2
+    427a:	3940      	cmpnei      	r1, 0
+    427c:	0bf3      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    427e:	3280      	movi      	r2, 128
+    4280:	932c      	ld.w      	r1, (r3, 0x30)
+    4282:	4246      	lsli      	r2, r2, 6
+    4284:	6848      	and      	r1, r2
+    4286:	3940      	cmpnei      	r1, 0
+    4288:	0bed      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    428a:	3280      	movi      	r2, 128
+    428c:	932c      	ld.w      	r1, (r3, 0x30)
+    428e:	4247      	lsli      	r2, r2, 7
+    4290:	6848      	and      	r1, r2
+    4292:	3940      	cmpnei      	r1, 0
+    4294:	0be7      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    4296:	3280      	movi      	r2, 128
+    4298:	932c      	ld.w      	r1, (r3, 0x30)
+    429a:	4248      	lsli      	r2, r2, 8
+    429c:	6848      	and      	r1, r2
+    429e:	3940      	cmpnei      	r1, 0
+    42a0:	0be1      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+}
+    42a2:	1463      	ipop
+    42a4:	1461      	nir
+    42a6:	0000      	bkpt
+    42a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+000042ac <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    42ac:	1460      	nie
+    42ae:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    42b0:	106b      	lrw      	r3, 0x20000014	// 42dc <LPTIntHandler+0x30>
+    42b2:	3101      	movi      	r1, 1
+    42b4:	9360      	ld.w      	r3, (r3, 0x0)
+    42b6:	934e      	ld.w      	r2, (r3, 0x38)
+    42b8:	6884      	and      	r2, r1
+    42ba:	3a40      	cmpnei      	r2, 0
+    42bc:	0c03      	bf      	0x42c2	// 42c2 <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    42be:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    42c0:	040b      	br      	0x42d6	// 42d6 <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    42c2:	934e      	ld.w      	r2, (r3, 0x38)
+    42c4:	3102      	movi      	r1, 2
+    42c6:	6884      	and      	r2, r1
+    42c8:	3a40      	cmpnei      	r2, 0
+    42ca:	0bfa      	bt      	0x42be	// 42be <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    42cc:	934e      	ld.w      	r2, (r3, 0x38)
+    42ce:	3104      	movi      	r1, 4
+    42d0:	6884      	and      	r2, r1
+    42d2:	3a40      	cmpnei      	r2, 0
+    42d4:	0bf5      	bt      	0x42be	// 42be <LPTIntHandler+0x12>
+}
+    42d6:	1463      	ipop
+    42d8:	1461      	nir
+    42da:	0000      	bkpt
+    42dc:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+000042e0 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    42e0:	1460      	nie
+    42e2:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    42e4:	1071      	lrw      	r3, 0x2000000c	// 4328 <BT0IntHandler+0x48>
+    42e6:	3101      	movi      	r1, 1
+    42e8:	9360      	ld.w      	r3, (r3, 0x0)
+    42ea:	934c      	ld.w      	r2, (r3, 0x30)
+    42ec:	6884      	and      	r2, r1
+    42ee:	3a40      	cmpnei      	r2, 0
+    42f0:	0c0a      	bf      	0x4304	// 4304 <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    42f2:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    42f4:	9341      	ld.w      	r2, (r3, 0x4)
+    42f6:	3a86      	bclri      	r2, 6
+    42f8:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    42fa:	9340      	ld.w      	r2, (r3, 0x0)
+    42fc:	3200      	movi      	r2, 0
+    42fe:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    4300:	1463      	ipop
+    4302:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    4304:	934c      	ld.w      	r2, (r3, 0x30)
+    4306:	3102      	movi      	r1, 2
+    4308:	6884      	and      	r2, r1
+    430a:	3a40      	cmpnei      	r2, 0
+    430c:	0c03      	bf      	0x4312	// 4312 <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    430e:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    4310:	07f8      	br      	0x4300	// 4300 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    4312:	934c      	ld.w      	r2, (r3, 0x30)
+    4314:	3104      	movi      	r1, 4
+    4316:	6884      	and      	r2, r1
+    4318:	3a40      	cmpnei      	r2, 0
+    431a:	0bfa      	bt      	0x430e	// 430e <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    431c:	934c      	ld.w      	r2, (r3, 0x30)
+    431e:	3108      	movi      	r1, 8
+    4320:	6884      	and      	r2, r1
+    4322:	3a40      	cmpnei      	r2, 0
+    4324:	0bf5      	bt      	0x430e	// 430e <BT0IntHandler+0x2e>
+    4326:	07ed      	br      	0x4300	// 4300 <BT0IntHandler+0x20>
+    4328:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+0000432c <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    432c:	1460      	nie
+    432e:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    4330:	1076      	lrw      	r3, 0x20000008	// 4388 <BT1IntHandler+0x5c>
+    4332:	3101      	movi      	r1, 1
+    4334:	9360      	ld.w      	r3, (r3, 0x0)
+    4336:	934c      	ld.w      	r2, (r3, 0x30)
+    4338:	6884      	and      	r2, r1
+    433a:	3a40      	cmpnei      	r2, 0
+    433c:	0c03      	bf      	0x4342	// 4342 <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    433e:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    4340:	0416      	br      	0x436c	// 436c <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    4342:	934c      	ld.w      	r2, (r3, 0x30)
+    4344:	3102      	movi      	r1, 2
+    4346:	6884      	and      	r2, r1
+    4348:	3a40      	cmpnei      	r2, 0
+    434a:	0c13      	bf      	0x4370	// 4370 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    434c:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    434e:	1070      	lrw      	r3, 0x200000b0	// 438c <BT1IntHandler+0x60>
+    4350:	8340      	ld.b      	r2, (r3, 0x0)
+    4352:	2200      	addi      	r2, 1
+    4354:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    4356:	9321      	ld.w      	r1, (r3, 0x4)
+    4358:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    435a:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    435c:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    435e:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    4360:	0c06      	bf      	0x436c	// 436c <BT1IntHandler+0x40>
+			NUM = 0;
+    4362:	3200      	movi      	r2, 0
+    4364:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    4366:	9342      	ld.w      	r2, (r3, 0x8)
+    4368:	2200      	addi      	r2, 1
+    436a:	b342      	st.w      	r2, (r3, 0x8)
+}
+    436c:	1463      	ipop
+    436e:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    4370:	934c      	ld.w      	r2, (r3, 0x30)
+    4372:	3104      	movi      	r1, 4
+    4374:	6884      	and      	r2, r1
+    4376:	3a40      	cmpnei      	r2, 0
+    4378:	0be3      	bt      	0x433e	// 433e <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    437a:	934c      	ld.w      	r2, (r3, 0x30)
+    437c:	3108      	movi      	r1, 8
+    437e:	6884      	and      	r2, r1
+    4380:	3a40      	cmpnei      	r2, 0
+    4382:	0bde      	bt      	0x433e	// 433e <BT1IntHandler+0x12>
+    4384:	07f4      	br      	0x436c	// 436c <BT1IntHandler+0x40>
+    4386:	0000      	bkpt
+    4388:	20000008 	.long	0x20000008
+    438c:	200000b0 	.long	0x200000b0
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00004390 <PriviledgeVioHandler>:
+    4390:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00004392 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    4392:	1460      	nie
+    4394:	1462      	ipush
+    // ISR content ...
+
+}
+    4396:	1463      	ipop
+    4398:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+0000439a <Trap3Handler>:
+    439a:	1460      	nie
+    439c:	1462      	ipush
+    439e:	1463      	ipop
+    43a0:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+000043a2 <Trap2Handler>:
+    43a2:	1460      	nie
+    43a4:	1462      	ipush
+    43a6:	1463      	ipop
+    43a8:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+000043aa <Trap1Handler>:
+    43aa:	1460      	nie
+    43ac:	1462      	ipush
+    43ae:	1463      	ipop
+    43b0:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+000043b2 <Trap0Handler>:
+    43b2:	1460      	nie
+    43b4:	1462      	ipush
+    43b6:	1463      	ipop
+    43b8:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+000043ba <UnrecExecpHandler>:
+    43ba:	1460      	nie
+    43bc:	1462      	ipush
+    43be:	1463      	ipop
+    43c0:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+000043c2 <BreakPointHandler>:
+    43c2:	1460      	nie
+    43c4:	1462      	ipush
+    43c6:	1463      	ipop
+    43c8:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+000043ca <AccessErrHandler>:
+    43ca:	1460      	nie
+    43cc:	1462      	ipush
+    43ce:	1463      	ipop
+    43d0:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+000043d2 <IllegalInstrHandler>:
+    43d2:	1460      	nie
+    43d4:	1462      	ipush
+    43d6:	1463      	ipop
+    43d8:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+000043da <MisalignedHandler>:
+    43da:	1460      	nie
+    43dc:	1462      	ipush
+    43de:	1463      	ipop
+    43e0:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+000043e2 <CNTAIntHandler>:
+    43e2:	1460      	nie
+    43e4:	1462      	ipush
+    43e6:	1463      	ipop
+    43e8:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+000043ea <I2CIntHandler>:
+    43ea:	1460      	nie
+    43ec:	1462      	ipush
+    43ee:	1463      	ipop
+    43f0:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000043f4 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    43f4:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    43f6:	c0006023 	mfcr      	r3, cr<0, 0>
+    43fa:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    43fe:	1046      	lrw      	r2, 0x20000000	// 4414 <__divsi3+0x20>
+    4400:	3400      	movi      	r4, 0
+    4402:	9240      	ld.w      	r2, (r2, 0x0)
+    4404:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4406:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4408:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    440a:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    440c:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    4410:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    4412:	1481      	pop      	r4
+    4414:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00004418 <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    4418:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    441a:	c0006023 	mfcr      	r3, cr<0, 0>
+    441e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    4422:	1046      	lrw      	r2, 0x20000000	// 4438 <__udivsi3+0x20>
+    4424:	3401      	movi      	r4, 1
+    4426:	9240      	ld.w      	r2, (r2, 0x0)
+    4428:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    442a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    442c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    442e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4430:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    4434:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    4436:	1481      	pop      	r4
+    4438:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__modsi3:
+
+0000443c <__modsi3>:
+
+int __modsi3 ( int a,  int b)
+{   
+    443c:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    443e:	c0006023 	mfcr      	r3, cr<0, 0>
+    4442:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 0;
+    4446:	1046      	lrw      	r2, 0x20000000	// 445c <__modsi3+0x20>
+    4448:	3400      	movi      	r4, 0
+    444a:	9240      	ld.w      	r2, (r2, 0x0)
+    444c:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    444e:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4450:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4452:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4454:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4458:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    445a:	1481      	pop      	r4
+    445c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+00004460 <__umodsi3>:
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    4460:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4462:	c0006023 	mfcr      	r3, cr<0, 0>
+    4466:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    446a:	1046      	lrw      	r2, 0x20000000	// 4480 <__umodsi3+0x20>
+    446c:	3401      	movi      	r4, 1
+    446e:	9240      	ld.w      	r2, (r2, 0x0)
+    4470:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4472:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4474:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4476:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4478:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    447c:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    447e:	1481      	pop      	r4
+    4480:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00004484 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    4484:	c1807420 	psrset      	ee, ie
+}
+    4488:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+0000448c <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    448c:	14d1      	push      	r4, r15
+	switch(uart_id){
+    448e:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4490:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    4492:	0c1a      	bf      	0x44c6	// 44c6 <UARTx_Init+0x3a>
+    4494:	3840      	cmpnei      	r0, 0
+    4496:	0c04      	bf      	0x449e	// 449e <UARTx_Init+0x12>
+    4498:	3842      	cmpnei      	r0, 2
+    449a:	0c2a      	bf      	0x44ee	// 44ee <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    449c:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    449e:	e3fff8d9 	bsr      	0x3650	// 3650 <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44a2:	118a      	lrw      	r4, 0x20000040	// 4548 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    44a4:	3100      	movi      	r1, 0
+    44a6:	3000      	movi      	r0, 0
+    44a8:	e3fff914 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44ac:	9400      	ld.w      	r0, (r4, 0x0)
+    44ae:	3200      	movi      	r2, 0
+    44b0:	1127      	lrw      	r1, 0x2710	// 454c <UARTx_Init+0xc0>
+    44b2:	e3fff985 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    44b6:	9400      	ld.w      	r0, (r4, 0x0)
+    44b8:	3200      	movi      	r2, 0
+    44ba:	1125      	lrw      	r1, 0x2710	// 454c <UARTx_Init+0xc0>
+    44bc:	e3fff988 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    44c0:	e3fff8ec 	bsr      	0x3698	// 3698 <UART0_Int_Enable>
+			break;
+    44c4:	07ec      	br      	0x449c	// 449c <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    44c6:	e3fff8d1 	bsr      	0x3668	// 3668 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44ca:	3102      	movi      	r1, 2
+    44cc:	3001      	movi      	r0, 1
+    44ce:	e3fff901 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    44d2:	1180      	lrw      	r4, 0x2000003c	// 4550 <UARTx_Init+0xc4>
+    44d4:	31d0      	movi      	r1, 208
+    44d6:	9400      	ld.w      	r0, (r4, 0x0)
+    44d8:	3200      	movi      	r2, 0
+    44da:	4121      	lsli      	r1, r1, 1
+    44dc:	e3fff970 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44e0:	31d0      	movi      	r1, 208
+    44e2:	9400      	ld.w      	r0, (r4, 0x0)
+    44e4:	3200      	movi      	r2, 0
+    44e6:	4121      	lsli      	r1, r1, 1
+    44e8:	e3fff972 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			break;
+    44ec:	07d8      	br      	0x449c	// 449c <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    44ee:	e3fff8c9 	bsr      	0x3680	// 3680 <UART2_DeInit>
+			UART_IO_Init(IO_UART2,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44f2:	3102      	movi      	r1, 2
+    44f4:	3002      	movi      	r0, 2
+    44f6:	e3fff8ed 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44fa:	1077      	lrw      	r3, 0x20000038	// 4554 <UARTx_Init+0xc8>
+    44fc:	31d0      	movi      	r1, 208
+    44fe:	9300      	ld.w      	r0, (r3, 0x0)
+    4500:	3200      	movi      	r2, 0
+    4502:	4121      	lsli      	r1, r1, 1
+    4504:	e3fff964 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    4508:	e3fff8d6 	bsr      	0x36b4	// 36b4 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    450c:	3273      	movi      	r2, 115
+    450e:	3100      	movi      	r1, 0
+    4510:	1012      	lrw      	r0, 0x200003b4	// 4558 <UARTx_Init+0xcc>
+    4512:	e3ffea85 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    4516:	1072      	lrw      	r3, 0x2000041b	// 455c <UARTx_Init+0xd0>
+    4518:	3203      	movi      	r2, 3
+    451a:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    451c:	4c48      	lsri      	r2, r4, 8
+    451e:	a388      	st.b      	r4, (r3, 0x8)
+    4520:	a349      	st.b      	r2, (r3, 0x9)
+    4522:	4c50      	lsri      	r2, r4, 16
+    4524:	4c98      	lsri      	r4, r4, 24
+    4526:	a38b      	st.b      	r4, (r3, 0xb)
+    4528:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    452a:	3103      	movi      	r1, 3
+    452c:	108d      	lrw      	r4, 0x20000048	// 4560 <UARTx_Init+0xd4>
+    452e:	3200      	movi      	r2, 0
+    4530:	9400      	ld.w      	r0, (r4, 0x0)
+    4532:	e3fff68d 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    4536:	9400      	ld.w      	r0, (r4, 0x0)
+    4538:	3103      	movi      	r1, 3
+    453a:	e3fff703 	bsr      	0x3340	// 3340 <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    453e:	9400      	ld.w      	r0, (r4, 0x0)
+    4540:	3103      	movi      	r1, 3
+    4542:	e3fff70a 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    4546:	07ab      	br      	0x449c	// 449c <UARTx_Init+0x10>
+    4548:	20000040 	.long	0x20000040
+    454c:	00002710 	.long	0x00002710
+    4550:	2000003c 	.long	0x2000003c
+    4554:	20000038 	.long	0x20000038
+    4558:	200003b4 	.long	0x200003b4
+    455c:	2000041b 	.long	0x2000041b
+    4560:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+00004564 <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    4564:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    4566:	1075      	lrw      	r3, 0x20000414	// 45b8 <UART2_RecvINT_Processing+0x54>
+    4568:	8346      	ld.b      	r2, (r3, 0x6)
+    456a:	8325      	ld.b      	r1, (r3, 0x5)
+    456c:	4248      	lsli      	r2, r2, 8
+    456e:	6c84      	or      	r2, r1
+    4570:	3162      	movi      	r1, 98
+    4572:	10b3      	lrw      	r5, 0x200003b4	// 45bc <UART2_RecvINT_Processing+0x58>
+    4574:	3440      	movi      	r4, 64
+    4576:	6485      	cmplt      	r1, r2
+    4578:	6114      	addu      	r4, r5
+    457a:	0c06      	bf      	0x4586	// 4586 <UART2_RecvINT_Processing+0x22>
+    457c:	3225      	movi      	r2, 37
+    457e:	6090      	addu      	r2, r4
+    4580:	3100      	movi      	r1, 0
+    4582:	a220      	st.b      	r1, (r2, 0x0)
+    4584:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    4586:	8346      	ld.b      	r2, (r3, 0x6)
+    4588:	8325      	ld.b      	r1, (r3, 0x5)
+    458a:	4248      	lsli      	r2, r2, 8
+    458c:	6c84      	or      	r2, r1
+    458e:	5a22      	addi      	r1, r2, 1
+    4590:	6094      	addu      	r2, r5
+    4592:	a200      	st.b      	r0, (r2, 0x0)
+    4594:	2424      	addi      	r4, 37
+    4596:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4598:	104a      	lrw      	r2, 0x200000b8	// 45c0 <UART2_RecvINT_Processing+0x5c>
+    459a:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    459c:	a420      	st.b      	r1, (r4, 0x0)
+    459e:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45a0:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    45a2:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45a4:	1028      	lrw      	r1, 0x2000041f	// 45c4 <UART2_RecvINT_Processing+0x60>
+    45a6:	a140      	st.b      	r2, (r1, 0x0)
+    45a8:	a101      	st.b      	r0, (r1, 0x1)
+    45aa:	4a10      	lsri      	r0, r2, 16
+    45ac:	4a58      	lsri      	r2, r2, 24
+    45ae:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    45b0:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45b2:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    45b4:	a344      	st.b      	r2, (r3, 0x4)
+}
+    45b6:	1482      	pop      	r4-r5
+    45b8:	20000414 	.long	0x20000414
+    45bc:	200003b4 	.long	0x200003b4
+    45c0:	200000b8 	.long	0x200000b8
+    45c4:	2000041f 	.long	0x2000041f
+
+Disassembly of section .text.Dbg_Println:
+
+000045c8 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    45c8:	1423      	subi      	r14, r14, 12
+    45ca:	b862      	st.w      	r3, (r14, 0x8)
+    45cc:	b841      	st.w      	r2, (r14, 0x4)
+    45ce:	b820      	st.w      	r1, (r14, 0x0)
+    45d0:	14d2      	push      	r4-r5, r15
+    45d2:	1422      	subi      	r14, r14, 8
+    45d4:	9865      	ld.w      	r3, (r14, 0x14)
+    45d6:	b861      	st.w      	r3, (r14, 0x4)
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+    45d8:	3301      	movi      	r3, 1
+    45da:	105c      	lrw      	r2, 0x20000068	// 4648 <Dbg_Println+0x80>
+    45dc:	70c0      	lsl      	r3, r0
+    45de:	9240      	ld.w      	r2, (r2, 0x0)
+    45e0:	68c8      	and      	r3, r2
+    45e2:	3b40      	cmpnei      	r3, 0
+    45e4:	0c2b      	bf      	0x463a	// 463a <Dbg_Println+0x72>
+        SysTick_Now = SysTick_1ms;
+    45e6:	109a      	lrw      	r4, 0x200000bc	// 464c <Dbg_Println+0x84>
+    45e8:	107a      	lrw      	r3, 0x200000b8	// 4650 <Dbg_Println+0x88>
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ea:	9445      	ld.w      	r2, (r4, 0x14)
+        SysTick_Now = SysTick_1ms;
+    45ec:	9360      	ld.w      	r3, (r3, 0x0)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ee:	5b49      	subu      	r2, r3, r2
+        SysTick_Now = SysTick_1ms;
+    45f0:	b464      	st.w      	r3, (r4, 0x10)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45f2:	b446      	st.w      	r2, (r4, 0x18)
+        SysTick_Last = SysTick_Now;
+    45f4:	b465      	st.w      	r3, (r4, 0x14)
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+    45f6:	3180      	movi      	r1, 128
+    45f8:	301c      	movi      	r0, 28
+    45fa:	b840      	st.w      	r2, (r14, 0x0)
+    45fc:	4122      	lsli      	r1, r1, 2
+    45fe:	1056      	lrw      	r2, 0x5f67	// 4654 <Dbg_Println+0x8c>
+    4600:	6010      	addu      	r0, r4
+    4602:	e3ffe9b1 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    4606:	10b5      	lrw      	r5, 0x20000038	// 4658 <Dbg_Println+0x90>
+    4608:	311c      	movi      	r1, 28
+    460a:	7481      	zexth      	r2, r0
+    460c:	6050      	addu      	r1, r4
+    460e:	9500      	ld.w      	r0, (r5, 0x0)
+    4610:	e3fff8e6 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+    4614:	3180      	movi      	r1, 128
+    4616:	301c      	movi      	r0, 28
+    4618:	1b06      	addi      	r3, r14, 24
+    461a:	9841      	ld.w      	r2, (r14, 0x4)
+    461c:	4122      	lsli      	r1, r1, 2
+    461e:	6010      	addu      	r0, r4
+    4620:	e3ffe9d1 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+    4624:	6c53      	mov      	r1, r4
+    4626:	7481      	zexth      	r2, r0
+    4628:	211b      	addi      	r1, 28
+    462a:	9500      	ld.w      	r0, (r5, 0x0)
+    462c:	e3fff8d8 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		DBG_Printf("\r\n",2);
+    4630:	9500      	ld.w      	r0, (r5, 0x0)
+    4632:	3202      	movi      	r2, 2
+    4634:	102a      	lrw      	r1, 0x5f75	// 465c <Dbg_Println+0x94>
+    4636:	e3fff8d3 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		
+    }
+
+#endif	
+}
+    463a:	1402      	addi      	r14, r14, 8
+    463c:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    4640:	98a1      	ld.w      	r5, (r14, 0x4)
+    4642:	9880      	ld.w      	r4, (r14, 0x0)
+    4644:	1406      	addi      	r14, r14, 24
+    4646:	783c      	jmp      	r15
+    4648:	20000068 	.long	0x20000068
+    464c:	200000bc 	.long	0x200000bc
+    4650:	200000b8 	.long	0x200000b8
+    4654:	00005f67 	.long	0x00005f67
+    4658:	20000038 	.long	0x20000038
+    465c:	00005f75 	.long	0x00005f75
+
+Disassembly of section .text.RC522_Delay:
+
+00004660 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    4660:	3300      	movi      	r3, 0
+    4662:	640e      	cmpne      	r3, r0
+    4664:	0802      	bt      	0x4668	// 4668 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    4666:	783c      	jmp      	r15
+        nop;
+    4668:	6c03      	mov      	r0, r0
+        nop;
+    466a:	6c03      	mov      	r0, r0
+        nop;
+    466c:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    466e:	2300      	addi      	r3, 1
+    4670:	07f9      	br      	0x4662	// 4662 <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+00004674 <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    4674:	14d4      	push      	r4-r7, r15
+    4676:	6d83      	mov      	r6, r0
+    4678:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    467a:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    467c:	10f2      	lrw      	r7, 0x2000004c	// 46c4 <RC522_ReadWriteOneByte+0x50>
+    467e:	3109      	movi      	r1, 9
+    4680:	9700      	ld.w      	r0, (r7, 0x0)
+    4682:	e3fff66a 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    4686:	74da      	sextb      	r3, r6
+    4688:	3bdf      	btsti      	r3, 31
+    468a:	310a      	movi      	r1, 10
+    468c:	9700      	ld.w      	r0, (r7, 0x0)
+    468e:	0c18      	bf      	0x46be	// 46be <RC522_ReadWriteOneByte+0x4a>
+    4690:	e3fff65f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    4694:	3109      	movi      	r1, 9
+    4696:	9700      	ld.w      	r0, (r7, 0x0)
+    4698:	e3fff65b 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    469c:	310b      	movi      	r1, 11
+    469e:	9700      	ld.w      	r0, (r7, 0x0)
+    46a0:	e3fff66a 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+        tx_data<<=1;
+    46a4:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    46a6:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46a8:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    46aa:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    46ac:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    46ae:	0c02      	bf      	0x46b2	// 46b2 <RC522_ReadWriteOneByte+0x3e>
+    46b0:	3ca0      	bseti      	r4, 0
+    46b2:	2d00      	subi      	r5, 1
+    46b4:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    46b6:	3d40      	cmpnei      	r5, 0
+    46b8:	0be3      	bt      	0x467e	// 467e <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    46ba:	6c13      	mov      	r0, r4
+    46bc:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    46be:	e3fff64c 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    46c2:	07e9      	br      	0x4694	// 4694 <RC522_ReadWriteOneByte+0x20>
+    46c4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+000046c8 <RC522_ReadRawRC>:
+{
+    46c8:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    46ca:	10ad      	lrw      	r5, 0x2000004c	// 46fc <RC522_ReadRawRC+0x34>
+    46cc:	310d      	movi      	r1, 13
+{
+    46ce:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    46d0:	9500      	ld.w      	r0, (r5, 0x0)
+    46d2:	e3fff642 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    46d6:	4401      	lsli      	r0, r4, 1
+    46d8:	347e      	movi      	r4, 126
+    46da:	6810      	and      	r0, r4
+    46dc:	3400      	movi      	r4, 0
+    46de:	2c7f      	subi      	r4, 128
+    46e0:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    46e2:	7400      	zextb      	r0, r0
+    46e4:	e3ffffc8 	bsr      	0x4674	// 4674 <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    46e8:	3000      	movi      	r0, 0
+    46ea:	e3ffffc5 	bsr      	0x4674	// 4674 <RC522_ReadWriteOneByte>
+    46ee:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    46f0:	310d      	movi      	r1, 13
+    46f2:	9500      	ld.w      	r0, (r5, 0x0)
+    46f4:	e3fff62d 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    46f8:	6c13      	mov      	r0, r4
+    46fa:	1492      	pop      	r4-r5, r15
+    46fc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+00004700 <RC522_WriteRawRC>:
+{
+    4700:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    4702:	10ab      	lrw      	r5, 0x2000004c	// 472c <RC522_WriteRawRC+0x2c>
+{
+    4704:	6d87      	mov      	r6, r1
+    4706:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    4708:	310d      	movi      	r1, 13
+    470a:	9500      	ld.w      	r0, (r5, 0x0)
+    470c:	e3fff625 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    4710:	4481      	lsli      	r4, r4, 1
+    4712:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    4714:	6810      	and      	r0, r4
+    4716:	e3ffffaf 	bsr      	0x4674	// 4674 <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    471a:	6c1b      	mov      	r0, r6
+    471c:	e3ffffac 	bsr      	0x4674	// 4674 <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    4720:	9500      	ld.w      	r0, (r5, 0x0)
+    4722:	310d      	movi      	r1, 13
+    4724:	e3fff615 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4728:	1493      	pop      	r4-r6, r15
+    472a:	0000      	bkpt
+    472c:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_PcdReset:
+
+00004730 <RC522_PcdReset>:
+{
+    4730:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    4732:	310f      	movi      	r1, 15
+    4734:	3001      	movi      	r0, 1
+    4736:	e3ffffe5 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    473a:	310f      	movi      	r1, 15
+    473c:	3001      	movi      	r0, 1
+    473e:	e3ffffe1 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    4742:	300a      	movi      	r0, 10
+    4744:	e3ffff8e 	bsr      	0x4660	// 4660 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    4748:	313d      	movi      	r1, 61
+    474a:	3011      	movi      	r0, 17
+    474c:	e3ffffda 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    4750:	311e      	movi      	r1, 30
+    4752:	302d      	movi      	r0, 45
+    4754:	e3ffffd6 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    4758:	3100      	movi      	r1, 0
+    475a:	302c      	movi      	r0, 44
+    475c:	e3ffffd2 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    4760:	318d      	movi      	r1, 141
+    4762:	302a      	movi      	r0, 42
+    4764:	e3ffffce 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    4768:	313e      	movi      	r1, 62
+    476a:	302b      	movi      	r0, 43
+    476c:	e3ffffca 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    4770:	3140      	movi      	r1, 64
+    4772:	3015      	movi      	r0, 21
+    4774:	e3ffffc6 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+}
+    4778:	3000      	movi      	r0, 0
+    477a:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+0000477c <RC522_SetBitMask>:
+{
+    477c:	14d2      	push      	r4-r5, r15
+    477e:	6d47      	mov      	r5, r1
+    4780:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    4782:	e3ffffa3 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    4786:	6c43      	mov      	r1, r0
+    4788:	6c54      	or      	r1, r5
+    478a:	7444      	zextb      	r1, r1
+    478c:	6c13      	mov      	r0, r4
+    478e:	e3ffffb9 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+}
+    4792:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+00004794 <RC522_PcdAntennaOn>:
+{
+    4794:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    4796:	3014      	movi      	r0, 20
+    4798:	e3ffff98 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    479c:	3303      	movi      	r3, 3
+    479e:	680c      	and      	r0, r3
+    47a0:	3840      	cmpnei      	r0, 0
+    47a2:	0805      	bt      	0x47ac	// 47ac <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    47a4:	3103      	movi      	r1, 3
+    47a6:	3014      	movi      	r0, 20
+    47a8:	e3ffffea 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+}
+    47ac:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000047ae <RC522_ClearBitMask>:
+{
+    47ae:	14d2      	push      	r4-r5, r15
+    47b0:	6d47      	mov      	r5, r1
+    47b2:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    47b4:	e3ffff8a 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    47b8:	6815      	andn      	r0, r5
+    47ba:	7440      	zextb      	r1, r0
+    47bc:	6c13      	mov      	r0, r4
+    47be:	e3ffffa1 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+}
+    47c2:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+000047c4 <RC522_PcdAntennaOff>:
+{
+    47c4:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    47c6:	3103      	movi      	r1, 3
+    47c8:	3014      	movi      	r0, 20
+    47ca:	e3fffff2 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+}
+    47ce:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Reset:
+
+000047d0 <RC522_Reset>:
+void RC522_Reset(void){
+    47d0:	14d0      	push      	r15
+  RC522_PcdReset();                //复位RC522
+    47d2:	e3ffffaf 	bsr      	0x4730	// 4730 <RC522_PcdReset>
+  RC522_PcdAntennaOff();    //关闭天线
+    47d6:	e3fffff7 	bsr      	0x47c4	// 47c4 <RC522_PcdAntennaOff>
+  RC522_Delay(2);         //延时2毫秒
+    47da:	3002      	movi      	r0, 2
+    47dc:	e3ffff42 	bsr      	0x4660	// 4660 <RC522_Delay>
+  RC522_PcdAntennaOn();     //开启天线
+    47e0:	e3ffffda 	bsr      	0x4794	// 4794 <RC522_PcdAntennaOn>
+}
+    47e4:	1490      	pop      	r15
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+000047e6 <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    47e6:	14d0      	push      	r15
+		RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    47e8:	3108      	movi      	r1, 8
+    47ea:	3008      	movi      	r0, 8
+    47ec:	e3ffffe1 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+		RC522_SetBitMask(ComIEnReg,BIT7);
+    47f0:	3180      	movi      	r1, 128
+    47f2:	3002      	movi      	r0, 2
+    47f4:	e3ffffc4 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+		RC522_WriteRawRC(ModeReg,0x3D);
+    47f8:	313d      	movi      	r1, 61
+    47fa:	3011      	movi      	r0, 17
+    47fc:	e3ffff82 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxModeReg,0x00);     //设定数据发送传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    4800:	3100      	movi      	r1, 0
+    4802:	3012      	movi      	r0, 18
+    4804:	e3ffff7e 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxModeReg,0x00);     //设定数据接收传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    4808:	3100      	movi      	r1, 0
+    480a:	3013      	movi      	r0, 19
+    480c:	e3ffff7a 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModWidthReg,MODWIDTH);    //调制宽度为reset值
+    4810:	3126      	movi      	r1, 38
+    4812:	3024      	movi      	r0, 36
+    4814:	e3ffff76 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModeReg,0x3D);      //3D--CRC预设值为6363
+    4818:	313d      	movi      	r1, 61
+    481a:	3011      	movi      	r0, 17
+    481c:	e3ffff72 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxThresholdReg,(MINLEVEL_A<<4) | COLLLEVEL_A);  //选择位译码器的阈值
+    4820:	3164      	movi      	r1, 100
+    4822:	3018      	movi      	r0, 24
+    4824:	e3ffff6e 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RFCfgReg,0x7F);   // 接收增益
+    4828:	317f      	movi      	r1, 127
+    482a:	3026      	movi      	r0, 38
+    482c:	e3ffff6a 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxAutoReg,0x40);  //100%ASK传送
+    4830:	3140      	movi      	r1, 64
+    4832:	3015      	movi      	r0, 21
+    4834:	e3ffff66 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ControlReg,0x10);  //接收的最后一个字节所有比特有效
+    4838:	3110      	movi      	r1, 16
+    483a:	300c      	movi      	r0, 12
+    483c:	e3ffff62 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegL,0x64);    //16bit定时器重载值（低位）
+    4840:	3164      	movi      	r1, 100
+    4842:	302d      	movi      	r0, 45
+    4844:	e3ffff5e 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegH,0);     //16bit定时器重载值（高位）
+    4848:	3100      	movi      	r1, 0
+    484a:	302c      	movi      	r0, 44
+    484c:	e3ffff5a 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TModeReg,0x8D);     //预分频器开启自动定时器，向下计数，预分频与TPrescalerReg一起决定12bit
+    4850:	318d      	movi      	r1, 141
+    4852:	302a      	movi      	r0, 42
+    4854:	e3ffff56 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TPrescalerReg,0x3e);  //12bit  1101 0011 1110    定时器频率2KHz*//*
+    4858:	313e      	movi      	r1, 62
+    485a:	302b      	movi      	r0, 43
+    485c:	e3ffff52 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+}
+    4860:	3000      	movi      	r0, 0
+    4862:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+00004864 <RC522_Init>:
+{
+    4864:	14d1      	push      	r4, r15
+	nop;
+    4866:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    4868:	1183      	lrw      	r4, 0x2000004c	// 48f4 <RC522_Init+0x90>
+    486a:	3200      	movi      	r2, 0
+    486c:	9400      	ld.w      	r0, (r4, 0x0)
+    486e:	3109      	movi      	r1, 9
+    4870:	e3fff4ee 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    4874:	3200      	movi      	r2, 0
+    4876:	9400      	ld.w      	r0, (r4, 0x0)
+    4878:	310a      	movi      	r1, 10
+    487a:	e3fff4e9 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    487e:	9400      	ld.w      	r0, (r4, 0x0)
+    4880:	310b      	movi      	r1, 11
+    4882:	e3fff555 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    4886:	9400      	ld.w      	r0, (r4, 0x0)
+    4888:	3201      	movi      	r2, 1
+    488a:	310b      	movi      	r1, 11
+    488c:	e3fff4e0 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,13,Output);			//CS
+    4890:	9400      	ld.w      	r0, (r4, 0x0)
+    4892:	3200      	movi      	r2, 0
+    4894:	310d      	movi      	r1, 13
+    4896:	e3fff4db 	bsr      	0x324c	// 324c <GPIO_Init>
+    GPIO_Init(GPIOA0,12,Output);			//RST
+    489a:	9400      	ld.w      	r0, (r4, 0x0)
+    489c:	3200      	movi      	r2, 0
+    489e:	310c      	movi      	r1, 12
+    48a0:	e3fff4d6 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,8,Intput);			//IRQ
+    48a4:	3201      	movi      	r2, 1
+    48a6:	9400      	ld.w      	r0, (r4, 0x0)
+    48a8:	3108      	movi      	r1, 8
+    48aa:	e3fff4d1 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_High(GPIOA0,13);
+    48ae:	9400      	ld.w      	r0, (r4, 0x0)
+    48b0:	310d      	movi      	r1, 13
+    48b2:	e3fff54e 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    GPIO_Write_High(GPIOA0,12);
+    48b6:	310c      	movi      	r1, 12
+    48b8:	9400      	ld.w      	r0, (r4, 0x0)
+    48ba:	e3fff54a 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    48be:	e3ffff39 	bsr      	0x4730	// 4730 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    48c2:	e3ffff81 	bsr      	0x47c4	// 47c4 <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    48c6:	3002      	movi      	r0, 2
+    48c8:	e3fffecc 	bsr      	0x4660	// 4660 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    48cc:	e3ffff64 	bsr      	0x4794	// 4794 <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    48d0:	108a      	lrw      	r4, 0x20000428	// 48f8 <RC522_Init+0x94>
+    48d2:	e3ffff8a 	bsr      	0x47e6	// 47e6 <M500PcdConfigISOType.part.1>
+    48d6:	3234      	movi      	r2, 52
+    48d8:	3100      	movi      	r1, 0
+    48da:	6c13      	mov      	r0, r4
+    48dc:	e3ffe8a0 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    48e0:	3318      	movi      	r3, 24
+    48e2:	a468      	st.b      	r3, (r4, 0x8)
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    48e4:	3360      	movi      	r3, 96
+    48e6:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    48e8:	3300      	movi      	r3, 0
+    48ea:	2b00      	subi      	r3, 1
+    48ec:	b468      	st.w      	r3, (r4, 0x20)
+    48ee:	ac72      	st.h      	r3, (r4, 0x24)
+}
+    48f0:	1491      	pop      	r4, r15
+    48f2:	0000      	bkpt
+    48f4:	2000004c 	.long	0x2000004c
+    48f8:	20000428 	.long	0x20000428
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+000048fc <RC522_PcdComMF522>:
+{
+    48fc:	14d4      	push      	r4-r7, r15
+    48fe:	1424      	subi      	r14, r14, 16
+    4900:	b862      	st.w      	r3, (r14, 0x8)
+    switch (Command) {
+    4902:	384c      	cmpnei      	r0, 12
+{
+    4904:	9869      	ld.w      	r3, (r14, 0x24)
+    4906:	6d03      	mov      	r4, r0
+    4908:	6dc7      	mov      	r7, r1
+    490a:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    490c:	0c48      	bf      	0x499c	// 499c <RC522_PcdComMF522+0xa0>
+    490e:	384e      	cmpnei      	r0, 14
+    4910:	0c49      	bf      	0x49a2	// 49a2 <RC522_PcdComMF522+0xa6>
+    U8_T waitFor=0x00;
+    4912:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    4914:	3500      	movi      	r5, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    4916:	6c57      	mov      	r1, r5
+    4918:	39a7      	bseti      	r1, 7
+    491a:	3002      	movi      	r0, 2
+    491c:	b841      	st.w      	r2, (r14, 0x4)
+    491e:	e3fffef1 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    4922:	3180      	movi      	r1, 128
+    4924:	3004      	movi      	r0, 4
+    4926:	e3ffff44 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    492a:	3100      	movi      	r1, 0
+    492c:	3001      	movi      	r0, 1
+    492e:	e3fffee9 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    4932:	3180      	movi      	r1, 128
+    4934:	300a      	movi      	r0, 10
+    4936:	e3ffff23 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    493a:	9841      	ld.w      	r2, (r14, 0x4)
+    493c:	6cdf      	mov      	r3, r7
+    493e:	7489      	zexth      	r2, r2
+    4940:	3700      	movi      	r7, 0
+    4942:	649c      	cmphs      	r7, r2
+    4944:	0c32      	bf      	0x49a8	// 49a8 <RC522_PcdComMF522+0xac>
+	RC522_WriteRawRC(CommandReg,Command);
+    4946:	6c53      	mov      	r1, r4
+    4948:	3001      	movi      	r0, 1
+    494a:	e3fffedb 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    494e:	3c4c      	cmpnei      	r4, 12
+    4950:	0805      	bt      	0x495a	// 495a <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    4952:	3180      	movi      	r1, 128
+    4954:	300d      	movi      	r0, 13
+    4956:	e3ffff13 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    495a:	37fa      	movi      	r7, 250
+    495c:	47e3      	lsli      	r7, r7, 3
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    495e:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4960:	3004      	movi      	r0, 4
+    4962:	e3fffeb3 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+		i--;
+    4966:	5f63      	subi      	r3, r7, 1
+    4968:	75cd      	zexth      	r7, r3
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    496a:	3f40      	cmpnei      	r7, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    496c:	b801      	st.w      	r0, (r14, 0x4)
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    496e:	0c05      	bf      	0x4978	// 4978 <RC522_PcdComMF522+0x7c>
+    4970:	6c83      	mov      	r2, r0
+    4972:	6898      	and      	r2, r6
+    4974:	3a40      	cmpnei      	r2, 0
+    4976:	0ff5      	bf      	0x4960	// 4960 <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    4978:	3180      	movi      	r1, 128
+    497a:	300d      	movi      	r0, 13
+    497c:	e3ffff19 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+	if(i!=0)
+    4980:	3f40      	cmpnei      	r7, 0
+    4982:	081f      	bt      	0x49c0	// 49c0 <RC522_PcdComMF522+0xc4>
+    char stats=MI_ERR;
+    4984:	3502      	movi      	r5, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    4986:	3180      	movi      	r1, 128
+    4988:	300c      	movi      	r0, 12
+    498a:	e3fffef9 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    498e:	3100      	movi      	r1, 0
+    4990:	3001      	movi      	r0, 1
+    4992:	e3fffeb7 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+}
+    4996:	6c17      	mov      	r0, r5
+    4998:	1404      	addi      	r14, r14, 16
+    499a:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    499c:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    499e:	3577      	movi      	r5, 119
+        break;
+    49a0:	07bb      	br      	0x4916	// 4916 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    49a2:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    49a4:	3512      	movi      	r5, 18
+    49a6:	07b8      	br      	0x4916	// 4916 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49a8:	8320      	ld.b      	r1, (r3, 0x0)
+    49aa:	3009      	movi      	r0, 9
+    49ac:	b843      	st.w      	r2, (r14, 0xc)
+    49ae:	b861      	st.w      	r3, (r14, 0x4)
+    for(i=0;i<InLenByte;i++)
+    49b0:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    49b2:	e3fffea7 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    49b6:	9861      	ld.w      	r3, (r14, 0x4)
+    for(i=0;i<InLenByte;i++)
+    49b8:	75dd      	zexth      	r7, r7
+    49ba:	2300      	addi      	r3, 1
+    49bc:	9843      	ld.w      	r2, (r14, 0xc)
+    49be:	07c2      	br      	0x4942	// 4942 <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    49c0:	3006      	movi      	r0, 6
+    49c2:	e3fffe83 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    49c6:	331b      	movi      	r3, 27
+    49c8:	680c      	and      	r0, r3
+    49ca:	3840      	cmpnei      	r0, 0
+    49cc:	0bdc      	bt      	0x4984	// 4984 <RC522_PcdComMF522+0x88>
+            if(n&irqEn&0x01)
+    49ce:	3301      	movi      	r3, 1
+    49d0:	694c      	and      	r5, r3
+    49d2:	9861      	ld.w      	r3, (r14, 0x4)
+    49d4:	68d4      	and      	r3, r5
+    49d6:	3b40      	cmpnei      	r3, 0
+    49d8:	0817      	bt      	0x4a06	// 4a06 <RC522_PcdComMF522+0x10a>
+            if(Command==PCD_TRANSCEIVE)
+    49da:	3c4c      	cmpnei      	r4, 12
+    49dc:	0c19      	bf      	0x4a0e	// 4a0e <RC522_PcdComMF522+0x112>
+            stats=MI_OK;
+    49de:	3500      	movi      	r5, 0
+    49e0:	07d3      	br      	0x4986	// 4986 <RC522_PcdComMF522+0x8a>
+                    *pOutLenBit=n*8;
+    49e2:	4463      	lsli      	r3, r4, 3
+    49e4:	9840      	ld.w      	r2, (r14, 0x0)
+    49e6:	a260      	st.b      	r3, (r2, 0x0)
+    49e8:	042b      	br      	0x4a3e	// 4a3e <RC522_PcdComMF522+0x142>
+                if(n==0)n=1;
+    49ea:	3301      	movi      	r3, 1
+    49ec:	0430      	br      	0x4a4c	// 4a4c <RC522_PcdComMF522+0x150>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    49ee:	300a      	movi      	r0, 10
+    49f0:	e3fffe6c 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    49f4:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    49f6:	300c      	movi      	r0, 12
+    49f8:	e3fffe68 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    49fc:	3307      	movi      	r3, 7
+    49fe:	680c      	and      	r0, r3
+                stats=MI_NOTAGERR;
+    4a00:	3501      	movi      	r5, 1
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    4a02:	3c40      	cmpnei      	r4, 0
+    4a04:	0412      	br      	0x4a28	// 4a28 <RC522_PcdComMF522+0x12c>
+            if(Command==PCD_TRANSCEIVE)
+    4a06:	3c4c      	cmpnei      	r4, 12
+    4a08:	0ff3      	bf      	0x49ee	// 49ee <RC522_PcdComMF522+0xf2>
+                stats=MI_NOTAGERR;
+    4a0a:	3501      	movi      	r5, 1
+    4a0c:	07bd      	br      	0x4986	// 4986 <RC522_PcdComMF522+0x8a>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    4a0e:	300a      	movi      	r0, 10
+    4a10:	e3fffe5c 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    4a14:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4a16:	300c      	movi      	r0, 12
+    4a18:	e3fffe58 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+    4a1c:	3307      	movi      	r3, 7
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    4a1e:	3c42      	cmpnei      	r4, 2
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4a20:	680c      	and      	r0, r3
+            stats=MI_OK;
+    4a22:	3500      	movi      	r5, 0
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    4a24:	0c06      	bf      	0x4a30	// 4a30 <RC522_PcdComMF522+0x134>
+    4a26:	3c45      	cmpnei      	r4, 5
+    4a28:	0c04      	bf      	0x4a30	// 4a30 <RC522_PcdComMF522+0x134>
+					FIFOLevelReg_flag = 1;
+    4a2a:	1070      	lrw      	r3, 0x200002d8	// 4a68 <RC522_PcdComMF522+0x16c>
+    4a2c:	3201      	movi      	r2, 1
+    4a2e:	a340      	st.b      	r2, (r3, 0x0)
+                if(lastBits)
+    4a30:	3840      	cmpnei      	r0, 0
+    4a32:	0fd8      	bf      	0x49e2	// 49e2 <RC522_PcdComMF522+0xe6>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    4a34:	5c63      	subi      	r3, r4, 1
+    4a36:	4363      	lsli      	r3, r3, 3
+    4a38:	600c      	addu      	r0, r3
+    4a3a:	9860      	ld.w      	r3, (r14, 0x0)
+    4a3c:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    4a3e:	3c40      	cmpnei      	r4, 0
+    4a40:	0fd5      	bf      	0x49ea	// 49ea <RC522_PcdComMF522+0xee>
+    4a42:	3c12      	cmphsi      	r4, 19
+    4a44:	6cd3      	mov      	r3, r4
+    4a46:	0c02      	bf      	0x4a4a	// 4a4a <RC522_PcdComMF522+0x14e>
+    4a48:	3312      	movi      	r3, 18
+    4a4a:	74cc      	zextb      	r3, r3
+    4a4c:	98e2      	ld.w      	r7, (r14, 0x8)
+                for(i=0; i<n; i++)
+    4a4e:	3600      	movi      	r6, 0
+    4a50:	750d      	zexth      	r4, r3
+    4a52:	6518      	cmphs      	r6, r4
+    4a54:	0b99      	bt      	0x4986	// 4986 <RC522_PcdComMF522+0x8a>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a56:	3009      	movi      	r0, 9
+    4a58:	e3fffe38 	bsr      	0x46c8	// 46c8 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    4a5c:	2600      	addi      	r6, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4a5e:	a700      	st.b      	r0, (r7, 0x0)
+                for(i=0; i<n; i++)
+    4a60:	7599      	zexth      	r6, r6
+    4a62:	2700      	addi      	r7, 1
+    4a64:	07f7      	br      	0x4a52	// 4a52 <RC522_PcdComMF522+0x156>
+    4a66:	0000      	bkpt
+    4a68:	200002d8 	.long	0x200002d8
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00004a6c <RC522_PcdRequest>:
+{
+    4a6c:	14d3      	push      	r4-r6, r15
+    4a6e:	1427      	subi      	r14, r14, 28
+    4a70:	6d03      	mov      	r4, r0
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4a72:	3212      	movi      	r2, 18
+{
+    4a74:	6d47      	mov      	r5, r1
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4a76:	1802      	addi      	r0, r14, 8
+    4a78:	3100      	movi      	r1, 0
+    4a7a:	e3ffe7d1 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    4a7e:	3108      	movi      	r1, 8
+    4a80:	3008      	movi      	r0, 8
+    4a82:	e3fffe96 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    4a86:	3107      	movi      	r1, 7
+    4a88:	300d      	movi      	r0, 13
+    4a8a:	e3fffe3b 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4a8e:	3607      	movi      	r6, 7
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    4a90:	3103      	movi      	r1, 3
+    4a92:	3014      	movi      	r0, 20
+    4a94:	e3fffe74 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4a98:	61b8      	addu      	r6, r14
+    4a9a:	1b02      	addi      	r3, r14, 8
+    4a9c:	b8c0      	st.w      	r6, (r14, 0x0)
+    4a9e:	3201      	movi      	r2, 1
+    4aa0:	6c4f      	mov      	r1, r3
+    4aa2:	300c      	movi      	r0, 12
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    4aa4:	dc8e0008 	st.b      	r4, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4aa8:	e3ffff2a 	bsr      	0x48fc	// 48fc <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    4aac:	3840      	cmpnei      	r0, 0
+    4aae:	081b      	bt      	0x4ae4	// 4ae4 <RC522_PcdRequest+0x78>
+    4ab0:	8660      	ld.b      	r3, (r6, 0x0)
+    4ab2:	3b50      	cmpnei      	r3, 16
+    4ab4:	0818      	bt      	0x4ae4	// 4ae4 <RC522_PcdRequest+0x78>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    4ab6:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4aba:	a560      	st.b      	r3, (r5, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    4abc:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4ac0:	a561      	st.b      	r3, (r5, 0x1)
+		if ((ucComMF522Buf[0] == req_code)&&(CardInfo.RC522_Reset_Falg == 0)) {
+    4ac2:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4ac6:	650e      	cmpne      	r3, r4
+    4ac8:	3220      	movi      	r2, 32
+    4aca:	1069      	lrw      	r3, 0x20000428	// 4aec <RC522_PcdRequest+0x80>
+    4acc:	608c      	addu      	r2, r3
+    4ace:	080d      	bt      	0x4ae8	// 4ae8 <RC522_PcdRequest+0x7c>
+    4ad0:	8228      	ld.b      	r1, (r2, 0x8)
+    4ad2:	3940      	cmpnei      	r1, 0
+    4ad4:	0806      	bt      	0x4ae0	// 4ae0 <RC522_PcdRequest+0x74>
+			CardInfo.RC522_Reset_Falg = 1;
+    4ad6:	3101      	movi      	r1, 1
+			CardInfo.RC522_Reset_Falg = 0;
+    4ad8:	a228      	st.b      	r1, (r2, 0x8)
+			CardInfo.Reset_Tick = SysTick_1ms;
+    4ada:	1046      	lrw      	r2, 0x200000b8	// 4af0 <RC522_PcdRequest+0x84>
+    4adc:	9240      	ld.w      	r2, (r2, 0x0)
+    4ade:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4ae0:	1407      	addi      	r14, r14, 28
+    4ae2:	1493      	pop      	r4-r6, r15
+        stats = MI_ERR;
+    4ae4:	3002      	movi      	r0, 2
+    4ae6:	07ee      	br      	0x4ac2	// 4ac2 <RC522_PcdRequest+0x56>
+			CardInfo.RC522_Reset_Falg = 0;
+    4ae8:	3100      	movi      	r1, 0
+    4aea:	07f7      	br      	0x4ad8	// 4ad8 <RC522_PcdRequest+0x6c>
+    4aec:	20000428 	.long	0x20000428
+    4af0:	200000b8 	.long	0x200000b8
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00004af4 <RC522_PcdAnticoll>:
+{
+    4af4:	14d2      	push      	r4-r5, r15
+    4af6:	1427      	subi      	r14, r14, 28
+    4af8:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    4afa:	3108      	movi      	r1, 8
+    4afc:	3008      	movi      	r0, 8
+    4afe:	e3fffe58 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    4b02:	3100      	movi      	r1, 0
+    4b04:	300d      	movi      	r0, 13
+    4b06:	e3fffdfd 	bsr      	0x4700	// 4700 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    4b0a:	3180      	movi      	r1, 128
+    4b0c:	300e      	movi      	r0, 14
+    4b0e:	e3fffe50 	bsr      	0x47ae	// 47ae <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    4b12:	3300      	movi      	r3, 0
+    4b14:	2b6c      	subi      	r3, 109
+    4b16:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    4b1a:	3320      	movi      	r3, 32
+    4b1c:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4b20:	3307      	movi      	r3, 7
+    4b22:	60f8      	addu      	r3, r14
+    4b24:	b860      	st.w      	r3, (r14, 0x0)
+    4b26:	1b02      	addi      	r3, r14, 8
+    4b28:	3202      	movi      	r2, 2
+    4b2a:	6c4f      	mov      	r1, r3
+    4b2c:	300c      	movi      	r0, 12
+    4b2e:	e3fffee7 	bsr      	0x48fc	// 48fc <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    4b32:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4b34:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    4b36:	0812      	bt      	0x4b5a	// 4b5a <RC522_PcdAnticoll+0x66>
+    4b38:	3300      	movi      	r3, 0
+    4b3a:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    4b3c:	1902      	addi      	r1, r14, 8
+    4b3e:	604c      	addu      	r1, r3
+    4b40:	8120      	ld.b      	r1, (r1, 0x0)
+    4b42:	5d0c      	addu      	r0, r5, r3
+    4b44:	2300      	addi      	r3, 1
+    4b46:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    4b48:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    4b4a:	6c49      	xor      	r1, r2
+    4b4c:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    4b4e:	0bf7      	bt      	0x4b3c	// 4b3c <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    4b50:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    4b54:	644e      	cmpne      	r3, r1
+    4b56:	0c02      	bf      	0x4b5a	// 4b5a <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    4b58:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    4b5a:	3180      	movi      	r1, 128
+    4b5c:	300e      	movi      	r0, 14
+    4b5e:	e3fffe0f 	bsr      	0x477c	// 477c <RC522_SetBitMask>
+}
+    4b62:	6c13      	mov      	r0, r4
+    4b64:	1407      	addi      	r14, r14, 28
+    4b66:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+00004b68 <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    4b68:	14d3      	push      	r4-r6, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    4b6a:	11a5      	lrw      	r5, 0x200000b8	// 4bfc <Card_Read_TasK+0x94>
+    4b6c:	1145      	lrw      	r2, 0x200002d8	// 4c00 <Card_Read_TasK+0x98>
+    4b6e:	1186      	lrw      	r4, 0x20000428	// 4c04 <Card_Read_TasK+0x9c>
+    4b70:	9221      	ld.w      	r1, (r2, 0x4)
+    4b72:	9560      	ld.w      	r3, (r5, 0x0)
+    4b74:	60c6      	subu      	r3, r1
+    4b76:	3163      	movi      	r1, 99
+    4b78:	64c4      	cmphs      	r1, r3
+    4b7a:	081a      	bt      	0x4bae	// 4bae <Card_Read_TasK+0x46>
+		//Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,Card Read",SysTick_1ms);
+
+		
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4b7c:	3119      	movi      	r1, 25
+        scan_tick = SysTick_1ms;
+    4b7e:	9560      	ld.w      	r3, (r5, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4b80:	6050      	addu      	r1, r4
+    4b82:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    4b84:	b261      	st.w      	r3, (r2, 0x4)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4b86:	e3ffff73 	bsr      	0x4a6c	// 4a6c <RC522_PcdRequest>
+    4b8a:	3620      	movi      	r6, 32
+    4b8c:	3840      	cmpnei      	r0, 0
+    4b8e:	6190      	addu      	r6, r4
+    4b90:	0829      	bt      	0x4be2	// 4be2 <Card_Read_TasK+0x7a>
+			    //消抖
+            //Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_SUCC",SysTick_1ms);
+			
+			
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4b92:	301b      	movi      	r0, 27
+            CardInfo.FailNum = 0x00;
+    4b94:	3300      	movi      	r3, 0
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4b96:	6010      	addu      	r0, r4
+            CardInfo.FailNum = 0x00;
+    4b98:	a666      	st.b      	r3, (r6, 0x6)
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4b9a:	e3ffffad 	bsr      	0x4af4	// 4af4 <RC522_PcdAnticoll>
+    4b9e:	3840      	cmpnei      	r0, 0
+    4ba0:	081c      	bt      	0x4bd8	// 4bd8 <Card_Read_TasK+0x70>
+				
+			
+				CardInfo.SuccNum++;
+				if(CardInfo.SuccNum >= 1)
+    4ba2:	8647      	ld.b      	r2, (r6, 0x7)
+    4ba4:	33ff      	movi      	r3, 255
+    4ba6:	64ca      	cmpne      	r2, r3
+				{
+					CardInfo.SuccNum = 0 ;
+    4ba8:	3300      	movi      	r3, 0
+    4baa:	a667      	st.b      	r3, (r6, 0x7)
+				if(CardInfo.SuccNum >= 1)
+    4bac:	080e      	bt      	0x4bc8	// 4bc8 <Card_Read_TasK+0x60>
+            }
+        }
+		//}
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    4bae:	8467      	ld.b      	r3, (r4, 0x7)
+    4bb0:	8446      	ld.b      	r2, (r4, 0x6)
+    4bb2:	64ca      	cmpne      	r2, r3
+    4bb4:	0c09      	bf      	0x4bc6	// 4bc6 <Card_Read_TasK+0x5e>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4bb6:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    4bb8:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4bba:	0c06      	bf      	0x4bc6	// 4bc6 <Card_Read_TasK+0x5e>
+            
+			//Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+			
+			
+        }else {
+            Card_Tick = SysTick_1ms;
+    4bbc:	9540      	ld.w      	r2, (r5, 0x0)
+    4bbe:	1073      	lrw      	r3, 0x200000a4	// 4c08 <Card_Read_TasK+0xa0>
+    4bc0:	b340      	st.w      	r2, (r3, 0x0)
+			CardInfo.reset_tick = SysTick_1ms;
+    4bc2:	9560      	ld.w      	r3, (r5, 0x0)
+    4bc4:	b46c      	st.w      	r3, (r4, 0x30)
+        }
+    }
+
+
+}
+    4bc6:	1493      	pop      	r4-r6, r15
+					CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    4bc8:	3301      	movi      	r3, 1
+    4bca:	a467      	st.b      	r3, (r4, 0x7)
+					Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d  Card Block_SUCC",SysTick_1ms);
+    4bcc:	9540      	ld.w      	r2, (r5, 0x0)
+    4bce:	1030      	lrw      	r1, 0x5f99	// 4c0c <Card_Read_TasK+0xa4>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_FAILD",SysTick_1ms);
+    4bd0:	3000      	movi      	r0, 0
+    4bd2:	e3fffcfb 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    4bd6:	07ec      	br      	0x4bae	// 4bae <Card_Read_TasK+0x46>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4bd8:	102e      	lrw      	r1, 0x5fb9	// 4c10 <Card_Read_TasK+0xa8>
+    4bda:	3000      	movi      	r0, 0
+    4bdc:	e3fffcf6 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    4be0:	07e7      	br      	0x4bae	// 4bae <Card_Read_TasK+0x46>
+            if(CardInfo.FailNum >= 5)
+    4be2:	8666      	ld.b      	r3, (r6, 0x6)
+    4be4:	3b04      	cmphsi      	r3, 5
+    4be6:	0c08      	bf      	0x4bf6	// 4bf6 <Card_Read_TasK+0x8e>
+                CardInfo.FailNum = 0;
+    4be8:	3300      	movi      	r3, 0
+    4bea:	a666      	st.b      	r3, (r6, 0x6)
+				CardInfo.SuccNum = 0;
+    4bec:	a667      	st.b      	r3, (r6, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    4bee:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_FAILD",SysTick_1ms);
+    4bf0:	9540      	ld.w      	r2, (r5, 0x0)
+    4bf2:	1029      	lrw      	r1, 0x5fcb	// 4c14 <Card_Read_TasK+0xac>
+    4bf4:	07ee      	br      	0x4bd0	// 4bd0 <Card_Read_TasK+0x68>
+                CardInfo.FailNum++;
+    4bf6:	2300      	addi      	r3, 1
+    4bf8:	a666      	st.b      	r3, (r6, 0x6)
+    4bfa:	07da      	br      	0x4bae	// 4bae <Card_Read_TasK+0x46>
+    4bfc:	200000b8 	.long	0x200000b8
+    4c00:	200002d8 	.long	0x200002d8
+    4c04:	20000428 	.long	0x20000428
+    4c08:	200000a4 	.long	0x200000a4
+    4c0c:	00005f99 	.long	0x00005f99
+    4c10:	00005fb9 	.long	0x00005fb9
+    4c14:	00005fcb 	.long	0x00005fcb
+
+Disassembly of section .text.Detect_SPI_task:
+
+00004c18 <Detect_SPI_task>:
+U32_T HL_tick =0;
+void Detect_SPI_task(void){
+    4c18:	14d1      	push      	r4, r15
+
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    4c1a:	109f      	lrw      	r4, 0x20000428	// 4c94 <Detect_SPI_task+0x7c>
+    4c1c:	3320      	movi      	r3, 32
+    4c1e:	60d0      	addu      	r3, r4
+    4c20:	8368      	ld.b      	r3, (r3, 0x8)
+    4c22:	3b41      	cmpnei      	r3, 1
+    4c24:	0810      	bt      	0x4c44	// 4c44 <Detect_SPI_task+0x2c>
+		if (SysTick_1ms - CardInfo.Reset_Tick >= 1000) {
+    4c26:	105d      	lrw      	r2, 0x200000b8	// 4c98 <Detect_SPI_task+0x80>
+    4c28:	9260      	ld.w      	r3, (r2, 0x0)
+    4c2a:	942b      	ld.w      	r1, (r4, 0x2c)
+    4c2c:	60c6      	subu      	r3, r1
+    4c2e:	103c      	lrw      	r1, 0x3e7	// 4c9c <Detect_SPI_task+0x84>
+    4c30:	64c4      	cmphs      	r1, r3
+    4c32:	0809      	bt      	0x4c44	// 4c44 <Detect_SPI_task+0x2c>
+			CardInfo.Reset_Tick = SysTick_1ms;
+    4c34:	9260      	ld.w      	r3, (r2, 0x0)
+    4c36:	b46b      	st.w      	r3, (r4, 0x2c)
+			RC522_Reset();
+    4c38:	e3fffdcc 	bsr      	0x47d0	// 47d0 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "SPI INIT");
+    4c3c:	1039      	lrw      	r1, 0x5feb	// 4ca0 <Detect_SPI_task+0x88>
+    4c3e:	3000      	movi      	r0, 0
+    4c40:	e3fffcc4 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+	}
+	
+	if(1==FIFOLevelReg_flag){
+    4c44:	1078      	lrw      	r3, 0x200002d8	// 4ca4 <Detect_SPI_task+0x8c>
+    4c46:	8340      	ld.b      	r2, (r3, 0x0)
+    4c48:	3a41      	cmpnei      	r2, 1
+    4c4a:	0812      	bt      	0x4c6e	// 4c6e <Detect_SPI_task+0x56>
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "FIFO INIT one");
+		if (SysTick_1ms - HL_tick >= 1000) {
+    4c4c:	1033      	lrw      	r1, 0x200000b8	// 4c98 <Detect_SPI_task+0x80>
+    4c4e:	9140      	ld.w      	r2, (r1, 0x0)
+    4c50:	9302      	ld.w      	r0, (r3, 0x8)
+    4c52:	6082      	subu      	r2, r0
+    4c54:	1012      	lrw      	r0, 0x3e7	// 4c9c <Detect_SPI_task+0x84>
+    4c56:	6480      	cmphs      	r0, r2
+    4c58:	080b      	bt      	0x4c6e	// 4c6e <Detect_SPI_task+0x56>
+			HL_tick = SysTick_1ms;
+    4c5a:	9140      	ld.w      	r2, (r1, 0x0)
+    4c5c:	b342      	st.w      	r2, (r3, 0x8)
+			FIFOLevelReg_flag = 0;
+    4c5e:	3200      	movi      	r2, 0
+    4c60:	a340      	st.b      	r2, (r3, 0x0)
+//			Reset_RC522_num2++;
+			RC522_Reset();
+    4c62:	e3fffdb7 	bsr      	0x47d0	// 47d0 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "FIFO INIT");
+    4c66:	1031      	lrw      	r1, 0x5ff4	// 4ca8 <Detect_SPI_task+0x90>
+    4c68:	3000      	movi      	r0, 0
+    4c6a:	e3fffcaf 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+	}
+	
+	//每10s读不到卡便复位并初始化rc522
+	if((CardInfo.BlockSucc == BLOCK_READ_FAILD)&&(SysTick_1ms - CardInfo.reset_tick>= 10000)) {
+    4c6e:	8467      	ld.b      	r3, (r4, 0x7)
+    4c70:	3b40      	cmpnei      	r3, 0
+    4c72:	0810      	bt      	0x4c92	// 4c92 <Detect_SPI_task+0x7a>
+    4c74:	1049      	lrw      	r2, 0x200000b8	// 4c98 <Detect_SPI_task+0x80>
+    4c76:	9260      	ld.w      	r3, (r2, 0x0)
+    4c78:	942c      	ld.w      	r1, (r4, 0x30)
+    4c7a:	60c6      	subu      	r3, r1
+    4c7c:	102c      	lrw      	r1, 0x270f	// 4cac <Detect_SPI_task+0x94>
+    4c7e:	64c4      	cmphs      	r1, r3
+    4c80:	0809      	bt      	0x4c92	// 4c92 <Detect_SPI_task+0x7a>
+		CardInfo.reset_tick = SysTick_1ms;
+    4c82:	9260      	ld.w      	r3, (r2, 0x0)
+    4c84:	b46c      	st.w      	r3, (r4, 0x30)
+		RC522_Reset();
+    4c86:	e3fffda5 	bsr      	0x47d0	// 47d0 <RC522_Reset>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "not read for 10 seconds");
+    4c8a:	102a      	lrw      	r1, 0x5ffe	// 4cb0 <Detect_SPI_task+0x98>
+    4c8c:	3000      	movi      	r0, 0
+    4c8e:	e3fffc9d 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+	}
+
+
+}
+    4c92:	1491      	pop      	r4, r15
+    4c94:	20000428 	.long	0x20000428
+    4c98:	200000b8 	.long	0x200000b8
+    4c9c:	000003e7 	.long	0x000003e7
+    4ca0:	00005feb 	.long	0x00005feb
+    4ca4:	200002d8 	.long	0x200002d8
+    4ca8:	00005ff4 	.long	0x00005ff4
+    4cac:	0000270f 	.long	0x0000270f
+    4cb0:	00005ffe 	.long	0x00005ffe
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00004cb4 <RLY_Light_Ctrl>:
+}
+
+volatile U32_T Tim_Flag = 0;
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+{
+    4cb4:	14d0      	push      	r15
+	if(state == 0x01)
+    4cb6:	3841      	cmpnei      	r0, 1
+    4cb8:	0807      	bt      	0x4cc6	// 4cc6 <RLY_Light_Ctrl+0x12>
+	{
+//		CTRL_RLY_ON;
+		GPIO_Write_High(GPIOA0,0);
+    4cba:	106e      	lrw      	r3, 0x2000004c	// 4cf0 <RLY_Light_Ctrl+0x3c>
+    4cbc:	3100      	movi      	r1, 0
+    4cbe:	9300      	ld.w      	r0, (r3, 0x0)
+    4cc0:	e3fff347 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		else{
+			GPIO_Write_Low(GPIOA0,0);
+		}
+//		CTRL_RLY_OFF;
+	}
+}
+    4cc4:	1490      	pop      	r15
+	else if(state == 0x00){
+    4cc6:	3840      	cmpnei      	r0, 0
+    4cc8:	0bfe      	bt      	0x4cc4	// 4cc4 <RLY_Light_Ctrl+0x10>
+		if(CardInfo.CTR_PLYFlag == 1)
+    4cca:	106b      	lrw      	r3, 0x20000428	// 4cf4 <RLY_Light_Ctrl+0x40>
+    4ccc:	8360      	ld.b      	r3, (r3, 0x0)
+    4cce:	3b41      	cmpnei      	r3, 1
+    4cd0:	0809      	bt      	0x4ce2	// 4ce2 <RLY_Light_Ctrl+0x2e>
+			if(SysTick_1ms - Tim_Flag >= CTR_State_Tick)
+    4cd2:	106a      	lrw      	r3, 0x200000b8	// 4cf8 <RLY_Light_Ctrl+0x44>
+    4cd4:	104a      	lrw      	r2, 0x200002e4	// 4cfc <RLY_Light_Ctrl+0x48>
+    4cd6:	9360      	ld.w      	r3, (r3, 0x0)
+    4cd8:	9240      	ld.w      	r2, (r2, 0x0)
+    4cda:	60ca      	subu      	r3, r2
+    4cdc:	1049      	lrw      	r2, 0x752f	// 4d00 <RLY_Light_Ctrl+0x4c>
+    4cde:	64c8      	cmphs      	r2, r3
+    4ce0:	0bf2      	bt      	0x4cc4	// 4cc4 <RLY_Light_Ctrl+0x10>
+				GPIO_Write_Low(GPIOA0,0);
+    4ce2:	1064      	lrw      	r3, 0x2000004c	// 4cf0 <RLY_Light_Ctrl+0x3c>
+    4ce4:	3100      	movi      	r1, 0
+    4ce6:	9300      	ld.w      	r0, (r3, 0x0)
+    4ce8:	e3fff337 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    4cec:	07ec      	br      	0x4cc4	// 4cc4 <RLY_Light_Ctrl+0x10>
+    4cee:	0000      	bkpt
+    4cf0:	2000004c 	.long	0x2000004c
+    4cf4:	20000428 	.long	0x20000428
+    4cf8:	200000b8 	.long	0x200000b8
+    4cfc:	200002e4 	.long	0x200002e4
+    4d00:	0000752f 	.long	0x0000752f
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00004d04 <KEY1_LONG_PRESS_RELEASE_Handler>:
+}
+
+
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    4d04:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    4d06:	1033      	lrw      	r1, 0x6016	// 4d50 <KEY1_LONG_PRESS_RELEASE_Handler+0x4c>
+    4d08:	3000      	movi      	r0, 0
+    4d0a:	e3fffc5f 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4d0e:	1072      	lrw      	r3, 0x20000428	// 4d54 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    4d10:	8367      	ld.b      	r3, (r3, 0x7)
+    4d12:	3b40      	cmpnei      	r3, 0
+    4d14:	1091      	lrw      	r4, 0x20000494	// 4d58 <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    4d16:	0819      	bt      	0x4d48	// 4d48 <KEY1_LONG_PRESS_RELEASE_Handler+0x44>
+	{
+		if(READ_RLY_STATE != 0x00)
+    4d18:	1071      	lrw      	r3, 0x20000048	// 4d5c <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    4d1a:	3100      	movi      	r1, 0
+    4d1c:	9300      	ld.w      	r0, (r3, 0x0)
+    4d1e:	e3fff333 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4d22:	3840      	cmpnei      	r0, 0
+    4d24:	0c08      	bf      	0x4d34	// 4d34 <KEY1_LONG_PRESS_RELEASE_Handler+0x30>
+		{
+			RLY_Light_Ctrl(1);
+    4d26:	3001      	movi      	r0, 1
+    4d28:	e3ffffc6 	bsr      	0x4cb4	// 4cb4 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4d2c:	102d      	lrw      	r1, 0x6031	// 4d60 <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    4d2e:	3000      	movi      	r0, 0
+    4d30:	e3fffc4c 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    4d34:	106c      	lrw      	r3, 0x200000b8	// 4d64 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    4d36:	104d      	lrw      	r2, 0x20000495	// 4d68 <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    4d38:	9360      	ld.w      	r3, (r3, 0x0)
+    4d3a:	4b28      	lsri      	r1, r3, 8
+    4d3c:	a461      	st.b      	r3, (r4, 0x1)
+    4d3e:	a221      	st.b      	r1, (r2, 0x1)
+    4d40:	4b30      	lsri      	r1, r3, 16
+    4d42:	4b78      	lsri      	r3, r3, 24
+    4d44:	a222      	st.b      	r1, (r2, 0x2)
+    4d46:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    4d48:	3302      	movi      	r3, 2
+    4d4a:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4d4c:	1491      	pop      	r4, r15
+    4d4e:	0000      	bkpt
+    4d50:	00006016 	.long	0x00006016
+    4d54:	20000428 	.long	0x20000428
+    4d58:	20000494 	.long	0x20000494
+    4d5c:	20000048 	.long	0x20000048
+    4d60:	00006031 	.long	0x00006031
+    4d64:	200000b8 	.long	0x200000b8
+    4d68:	20000495 	.long	0x20000495
+
+Disassembly of section .text.LogicCtrl_Init:
+
+00004d6c <LogicCtrl_Init>:
+{
+    4d6c:	14d2      	push      	r4-r5, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    4d6e:	108d      	lrw      	r4, 0x20000048	// 4da0 <LogicCtrl_Init+0x34>
+    4d70:	3200      	movi      	r2, 0
+    4d72:	9400      	ld.w      	r0, (r4, 0x0)
+    4d74:	3101      	movi      	r1, 1
+    4d76:	e3fff26b 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4d7a:	10ab      	lrw      	r5, 0x2000004c	// 4da4 <LogicCtrl_Init+0x38>
+	CTRL_CARD_OUT;
+    4d7c:	3101      	movi      	r1, 1
+    4d7e:	9400      	ld.w      	r0, (r4, 0x0)
+    4d80:	e3fff2eb 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4d84:	3200      	movi      	r2, 0
+    4d86:	9500      	ld.w      	r0, (r5, 0x0)
+    4d88:	3101      	movi      	r1, 1
+    4d8a:	e3fff261 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4d8e:	9500      	ld.w      	r0, (r5, 0x0)
+    4d90:	3101      	movi      	r1, 1
+    4d92:	e3fff2e2 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	CTRL_RLY_OFF;
+    4d96:	9400      	ld.w      	r0, (r4, 0x0)
+    4d98:	3100      	movi      	r1, 0
+    4d9a:	e3fff2da 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4d9e:	1492      	pop      	r4-r5, r15
+    4da0:	20000048 	.long	0x20000048
+    4da4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+00004da8 <LogicCtrl_Task>:
+{
+    4da8:	14d4      	push      	r4-r7, r15
+	if (start_light == 0){
+    4daa:	1195      	lrw      	r4, 0x200002e4	// 4e7c <LogicCtrl_Task+0xd4>
+    4dac:	8464      	ld.b      	r3, (r4, 0x4)
+    4dae:	3b40      	cmpnei      	r3, 0
+    4db0:	11b4      	lrw      	r5, 0x20000428	// 4e80 <LogicCtrl_Task+0xd8>
+    4db2:	0813      	bt      	0x4dd8	// 4dd8 <LogicCtrl_Task+0x30>
+		start_light++;									//start_light == 1,表示上电后首次进入（有插卡）
+    4db4:	3301      	movi      	r3, 1
+    4db6:	a464      	st.b      	r3, (r4, 0x4)
+		if (CardInfo.BlockSucc==BLOCK_READ_FAILD){
+    4db8:	8567      	ld.b      	r3, (r5, 0x7)
+    4dba:	3b40      	cmpnei      	r3, 0
+    4dbc:	080e      	bt      	0x4dd8	// 4dd8 <LogicCtrl_Task+0x30>
+			GPIO_Init(GPIOA0,0,Output);
+    4dbe:	11d2      	lrw      	r6, 0x2000004c	// 4e84 <LogicCtrl_Task+0xdc>
+    4dc0:	3200      	movi      	r2, 0
+    4dc2:	3100      	movi      	r1, 0
+    4dc4:	9600      	ld.w      	r0, (r6, 0x0)
+    4dc6:	e3fff243 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_Write_High(GPIOA0,0);
+    4dca:	9600      	ld.w      	r0, (r6, 0x0)
+    4dcc:	3100      	movi      	r1, 0
+    4dce:	e3fff2c0 	bsr      	0x334e	// 334e <GPIO_Write_High>
+			start_light++;								//start_light == 2,表示上电后首次进入时未插卡     目前可能上电时有插卡也意外进入
+    4dd2:	8464      	ld.b      	r3, (r4, 0x4)
+    4dd4:	2300      	addi      	r3, 1
+    4dd6:	a464      	st.b      	r3, (r4, 0x4)
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 0))
+    4dd8:	8567      	ld.b      	r3, (r5, 0x7)
+    4dda:	3b41      	cmpnei      	r3, 1
+    4ddc:	0836      	bt      	0x4e48	// 4e48 <LogicCtrl_Task+0xa0>
+    4dde:	11cb      	lrw      	r6, 0x20000048	// 4e88 <LogicCtrl_Task+0xe0>
+    4de0:	3101      	movi      	r1, 1
+    4de2:	9600      	ld.w      	r0, (r6, 0x0)
+    4de4:	e3fff2d0 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4de8:	3840      	cmpnei      	r0, 0
+    4dea:	082f      	bt      	0x4e48	// 4e48 <LogicCtrl_Task+0xa0>
+		CTRL_CARD_IN;
+    4dec:	3101      	movi      	r1, 1
+    4dee:	9600      	ld.w      	r0, (r6, 0x0)
+    4df0:	e3fff2af 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_IN,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    4df4:	1166      	lrw      	r3, 0x200000b8	// 4e8c <LogicCtrl_Task+0xe4>
+    4df6:	3101      	movi      	r1, 1
+    4df8:	9600      	ld.w      	r0, (r6, 0x0)
+    4dfa:	93e0      	ld.w      	r7, (r3, 0x0)
+    4dfc:	e3fff2c4 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e00:	6cc3      	mov      	r3, r0
+    4e02:	6c9f      	mov      	r2, r7
+    4e04:	1123      	lrw      	r1, 0x6043	// 4e90 <LogicCtrl_Task+0xe8>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_OUT,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    4e06:	3000      	movi      	r0, 0
+    4e08:	e3fffbe0 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+	if ((CardInfo.BlockSucc==BLOCK_READ_SUCC)&&(start_light > 0)&&(start_light <= 2)){ 
+    4e0c:	8567      	ld.b      	r3, (r5, 0x7)
+    4e0e:	3b41      	cmpnei      	r3, 1
+    4e10:	080a      	bt      	0x4e24	// 4e24 <LogicCtrl_Task+0x7c>
+    4e12:	8444      	ld.b      	r2, (r4, 0x4)
+    4e14:	5a63      	subi      	r3, r2, 1
+    4e16:	74cc      	zextb      	r3, r3
+    4e18:	3b01      	cmphsi      	r3, 2
+    4e1a:	0805      	bt      	0x4e24	// 4e24 <LogicCtrl_Task+0x7c>
+		if (start_light > 1){       //上电后首次进入时未插卡 
+    4e1c:	3a42      	cmpnei      	r2, 2
+    4e1e:	082d      	bt      	0x4e78	// 4e78 <LogicCtrl_Task+0xd0>
+			start_light = 3;							//start_light == 3,表示从上电后首次进入未插卡状态转为有插卡状态
+    4e20:	3303      	movi      	r3, 3
+			start_light = 10;							//start_light == 10,表示从首次上电时有插卡，变成这个值后不再进入上电判断
+    4e22:	a464      	st.b      	r3, (r4, 0x4)
+	if ((start_light>=3)&&(start_light<=6)){
+    4e24:	8464      	ld.b      	r3, (r4, 0x4)
+    4e26:	5b4b      	subi      	r2, r3, 3
+    4e28:	7488      	zextb      	r2, r2
+    4e2a:	3a03      	cmphsi      	r2, 4
+    4e2c:	080d      	bt      	0x4e46	// 4e46 <LogicCtrl_Task+0x9e>
+		start_light++;										
+    4e2e:	2300      	addi      	r3, 1
+    4e30:	74cc      	zextb      	r3, r3
+		if (start_light>5){								//延时进入
+    4e32:	3b05      	cmphsi      	r3, 6
+		start_light++;										
+    4e34:	a464      	st.b      	r3, (r4, 0x4)
+		if (start_light>5){								//延时进入
+    4e36:	0c08      	bf      	0x4e46	// 4e46 <LogicCtrl_Task+0x9e>
+			GPIO_Write_Low(GPIOA0,0);
+    4e38:	1073      	lrw      	r3, 0x2000004c	// 4e84 <LogicCtrl_Task+0xdc>
+    4e3a:	3100      	movi      	r1, 0
+    4e3c:	9300      	ld.w      	r0, (r3, 0x0)
+    4e3e:	e3fff28c 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+			start_light = 11;							//start_light == 11,表示从上电后首次进入未插卡状态转为有插卡状态
+    4e42:	330b      	movi      	r3, 11
+    4e44:	a464      	st.b      	r3, (r4, 0x4)
+}
+    4e46:	1494      	pop      	r4-r7, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 1))
+    4e48:	8567      	ld.b      	r3, (r5, 0x7)
+    4e4a:	3b40      	cmpnei      	r3, 0
+    4e4c:	0be0      	bt      	0x4e0c	// 4e0c <LogicCtrl_Task+0x64>
+    4e4e:	10cf      	lrw      	r6, 0x20000048	// 4e88 <LogicCtrl_Task+0xe0>
+    4e50:	3101      	movi      	r1, 1
+    4e52:	9600      	ld.w      	r0, (r6, 0x0)
+    4e54:	e3fff298 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e58:	3841      	cmpnei      	r0, 1
+    4e5a:	0bd9      	bt      	0x4e0c	// 4e0c <LogicCtrl_Task+0x64>
+		CTRL_CARD_OUT;
+    4e5c:	3101      	movi      	r1, 1
+    4e5e:	9600      	ld.w      	r0, (r6, 0x0)
+    4e60:	e3fff27b 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_OUT,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    4e64:	106a      	lrw      	r3, 0x200000b8	// 4e8c <LogicCtrl_Task+0xe4>
+    4e66:	3101      	movi      	r1, 1
+    4e68:	9600      	ld.w      	r0, (r6, 0x0)
+    4e6a:	93e0      	ld.w      	r7, (r3, 0x0)
+    4e6c:	e3fff28c 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4e70:	6cc3      	mov      	r3, r0
+    4e72:	6c9f      	mov      	r2, r7
+    4e74:	1028      	lrw      	r1, 0x6071	// 4e94 <LogicCtrl_Task+0xec>
+    4e76:	07c8      	br      	0x4e06	// 4e06 <LogicCtrl_Task+0x5e>
+			start_light = 10;							//start_light == 10,表示从首次上电时有插卡，变成这个值后不再进入上电判断
+    4e78:	330a      	movi      	r3, 10
+    4e7a:	07d4      	br      	0x4e22	// 4e22 <LogicCtrl_Task+0x7a>
+    4e7c:	200002e4 	.long	0x200002e4
+    4e80:	20000428 	.long	0x20000428
+    4e84:	2000004c 	.long	0x2000004c
+    4e88:	20000048 	.long	0x20000048
+    4e8c:	200000b8 	.long	0x200000b8
+    4e90:	00006043 	.long	0x00006043
+    4e94:	00006071 	.long	0x00006071
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00004e98 <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    4e98:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,RLY_OUT_PIN,Output);			
+    4e9a:	109c      	lrw      	r4, 0x20000048	// 4f08 <LogicCtrl_NoRF_Init+0x70>
+    4e9c:	3200      	movi      	r2, 0
+    4e9e:	9400      	ld.w      	r0, (r4, 0x0)
+    4ea0:	3100      	movi      	r1, 0
+    4ea2:	e3fff1d5 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_RLY_OFF;
+    4ea6:	9400      	ld.w      	r0, (r4, 0x0)
+    4ea8:	3100      	movi      	r1, 0
+    4eaa:	e3fff252 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    4eae:	1098      	lrw      	r4, 0x2000004c	// 4f0c <LogicCtrl_NoRF_Init+0x74>
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    4eb0:	3209      	movi      	r2, 9
+    4eb2:	3100      	movi      	r1, 0
+    4eb4:	1017      	lrw      	r0, 0x20000494	// 4f10 <LogicCtrl_NoRF_Init+0x78>
+    4eb6:	e3ffe5b3 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    4eba:	9400      	ld.w      	r0, (r4, 0x0)
+    4ebc:	3201      	movi      	r2, 1
+    4ebe:	3103      	movi      	r1, 3
+    4ec0:	e3fff1c6 	bsr      	0x324c	// 324c <GPIO_Init>
+	
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4ec4:	3200      	movi      	r2, 0
+    4ec6:	9400      	ld.w      	r0, (r4, 0x0)
+    4ec8:	3101      	movi      	r1, 1
+    4eca:	e3fff1c1 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4ece:	9400      	ld.w      	r0, (r4, 0x0)
+    4ed0:	3101      	movi      	r1, 1
+    4ed2:	e3fff242 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	
+	
+	GPIO_Init(GPIOA0,0,Output);			//继电器，//light
+    4ed6:	3200      	movi      	r2, 0
+    4ed8:	9400      	ld.w      	r0, (r4, 0x0)
+    4eda:	3100      	movi      	r1, 0
+    4edc:	e3fff1b8 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,0);			//初始拉低断开，插卡拉高打开
+    4ee0:	9400      	ld.w      	r0, (r4, 0x0)
+    4ee2:	3100      	movi      	r1, 0
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4ee4:	108c      	lrw      	r4, 0x20000464	// 4f14 <LogicCtrl_NoRF_Init+0x7c>
+	GPIO_Write_Low(GPIOA0,0);			//初始拉低断开，插卡拉高打开
+    4ee6:	e3fff238 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    4eea:	3303      	movi      	r3, 3
+    4eec:	6c13      	mov      	r0, r4
+    4eee:	3200      	movi      	r2, 0
+    4ef0:	102a      	lrw      	r1, 0x52b4	// 4f18 <LogicCtrl_NoRF_Init+0x80>
+    4ef2:	e000010f 	bsr      	0x5110	// 5110 <button_init>
+	
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    4ef6:	104a      	lrw      	r2, 0x4d04	// 4f1c <LogicCtrl_NoRF_Init+0x84>
+    4ef8:	3107      	movi      	r1, 7
+    4efa:	6c13      	mov      	r0, r4
+    4efc:	e0000127 	bsr      	0x514a	// 514a <button_attach>
+	button_start(&KEY1);
+    4f00:	6c13      	mov      	r0, r4
+    4f02:	e00001b9 	bsr      	0x5274	// 5274 <button_start>
+}
+    4f06:	1491      	pop      	r4, r15
+    4f08:	20000048 	.long	0x20000048
+    4f0c:	2000004c 	.long	0x2000004c
+    4f10:	20000494 	.long	0x20000494
+    4f14:	20000464 	.long	0x20000464
+    4f18:	000052b4 	.long	0x000052b4
+    4f1c:	00004d04 	.long	0x00004d04
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+00004f20 <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    4f20:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    4f22:	3301      	movi      	r3, 1
+    4f24:	11c9      	lrw      	r6, 0x20000428	// 4fc8 <LogicCtrl_NoRF_Task+0xa8>
+	
+	if(SysTick_1ms - test_tick > 5)
+    4f26:	118a      	lrw      	r4, 0x200000b8	// 4fcc <LogicCtrl_NoRF_Task+0xac>
+    4f28:	11aa      	lrw      	r5, 0x200002e4	// 4fd0 <LogicCtrl_NoRF_Task+0xb0>
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    4f2a:	a660      	st.b      	r3, (r6, 0x0)
+	if(SysTick_1ms - test_tick > 5)
+    4f2c:	9542      	ld.w      	r2, (r5, 0x8)
+    4f2e:	9460      	ld.w      	r3, (r4, 0x0)
+    4f30:	60ca      	subu      	r3, r2
+    4f32:	3b05      	cmphsi      	r3, 6
+    4f34:	0c05      	bf      	0x4f3e	// 4f3e <LogicCtrl_NoRF_Task+0x1e>
+	{
+		test_tick = SysTick_1ms;
+    4f36:	9460      	ld.w      	r3, (r4, 0x0)
+    4f38:	b562      	st.w      	r3, (r5, 0x8)
+		button_ticks();
+    4f3a:	e00001af 	bsr      	0x5298	// 5298 <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    4f3e:	8667      	ld.b      	r3, (r6, 0x7)
+    4f40:	3b41      	cmpnei      	r3, 1
+    4f42:	0830      	bt      	0x4fa2	// 4fa2 <LogicCtrl_NoRF_Task+0x82>
+	{
+		RLY_Light_Ctrl(1);
+    4f44:	3001      	movi      	r0, 1
+    4f46:	e3fffeb7 	bsr      	0x4cb4	// 4cb4 <RLY_Light_Ctrl>
+		card_tick = SysTick_1ms;
+    4f4a:	9460      	ld.w      	r3, (r4, 0x0)
+    4f4c:	b563      	st.w      	r3, (r5, 0xc)
+		dm_in.DM_State = 0x00;
+    4f4e:	3200      	movi      	r2, 0
+    4f50:	1161      	lrw      	r3, 0x20000494	// 4fd4 <LogicCtrl_NoRF_Task+0xb4>
+    4f52:	a340      	st.b      	r2, (r3, 0x0)
+		card_tick = SysTick_1ms;
+		RLY_Light_Ctrl(0);
+		 
+	}
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4f54:	8667      	ld.b      	r3, (r6, 0x7)
+    4f56:	3b40      	cmpnei      	r3, 0
+    4f58:	0824      	bt      	0x4fa0	// 4fa0 <LogicCtrl_NoRF_Task+0x80>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    4f5a:	107f      	lrw      	r3, 0x20000494	// 4fd4 <LogicCtrl_NoRF_Task+0xb4>
+    4f5c:	8340      	ld.b      	r2, (r3, 0x0)
+    4f5e:	3a42      	cmpnei      	r2, 2
+    4f60:	0820      	bt      	0x4fa0	// 4fa0 <LogicCtrl_NoRF_Task+0x80>
+    4f62:	8322      	ld.b      	r1, (r3, 0x2)
+    4f64:	8341      	ld.b      	r2, (r3, 0x1)
+    4f66:	4128      	lsli      	r1, r1, 8
+    4f68:	6c48      	or      	r1, r2
+    4f6a:	8343      	ld.b      	r2, (r3, 0x3)
+    4f6c:	4250      	lsli      	r2, r2, 16
+    4f6e:	6c48      	or      	r1, r2
+    4f70:	8344      	ld.b      	r2, (r3, 0x4)
+    4f72:	4258      	lsli      	r2, r2, 24
+    4f74:	6c84      	or      	r2, r1
+    4f76:	9400      	ld.w      	r0, (r4, 0x0)
+    4f78:	600a      	subu      	r0, r2
+    4f7a:	1058      	lrw      	r2, 0x752f	// 4fd8 <LogicCtrl_NoRF_Task+0xb8>
+    4f7c:	6408      	cmphs      	r2, r0
+    4f7e:	0811      	bt      	0x4fa0	// 4fa0 <LogicCtrl_NoRF_Task+0x80>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    4f80:	9440      	ld.w      	r2, (r4, 0x0)
+    4f82:	5b22      	addi      	r1, r3, 1
+    4f84:	a341      	st.b      	r2, (r3, 0x1)
+    4f86:	4a68      	lsri      	r3, r2, 8
+    4f88:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    4f8a:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    4f8c:	4a70      	lsri      	r3, r2, 16
+    4f8e:	4a58      	lsri      	r2, r2, 24
+    4f90:	a162      	st.b      	r3, (r1, 0x2)
+    4f92:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    4f94:	e3fffe90 	bsr      	0x4cb4	// 4cb4 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    4f98:	1031      	lrw      	r1, 0x60b3	// 4fdc <LogicCtrl_NoRF_Task+0xbc>
+    4f9a:	3000      	movi      	r0, 0
+    4f9c:	e3fffb16 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+	}
+}
+    4fa0:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= CTR_State_Tick))
+    4fa2:	3b40      	cmpnei      	r3, 0
+    4fa4:	0bd8      	bt      	0x4f54	// 4f54 <LogicCtrl_NoRF_Task+0x34>
+    4fa6:	106c      	lrw      	r3, 0x20000494	// 4fd4 <LogicCtrl_NoRF_Task+0xb4>
+    4fa8:	8360      	ld.b      	r3, (r3, 0x0)
+    4faa:	3b40      	cmpnei      	r3, 0
+    4fac:	0bd4      	bt      	0x4f54	// 4f54 <LogicCtrl_NoRF_Task+0x34>
+    4fae:	9543      	ld.w      	r2, (r5, 0xc)
+    4fb0:	9460      	ld.w      	r3, (r4, 0x0)
+    4fb2:	60ca      	subu      	r3, r2
+    4fb4:	1049      	lrw      	r2, 0x752f	// 4fd8 <LogicCtrl_NoRF_Task+0xb8>
+    4fb6:	64c8      	cmphs      	r2, r3
+    4fb8:	0bce      	bt      	0x4f54	// 4f54 <LogicCtrl_NoRF_Task+0x34>
+		card_tick = SysTick_1ms;
+    4fba:	9460      	ld.w      	r3, (r4, 0x0)
+		RLY_Light_Ctrl(0);
+    4fbc:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    4fbe:	b563      	st.w      	r3, (r5, 0xc)
+		RLY_Light_Ctrl(0);
+    4fc0:	e3fffe7a 	bsr      	0x4cb4	// 4cb4 <RLY_Light_Ctrl>
+    4fc4:	07c8      	br      	0x4f54	// 4f54 <LogicCtrl_NoRF_Task+0x34>
+    4fc6:	0000      	bkpt
+    4fc8:	20000428 	.long	0x20000428
+    4fcc:	200000b8 	.long	0x200000b8
+    4fd0:	200002e4 	.long	0x200002e4
+    4fd4:	20000494 	.long	0x20000494
+    4fd8:	0000752f 	.long	0x0000752f
+    4fdc:	000060b3 	.long	0x000060b3
+
+Disassembly of section .text.BackLight_Task:
+
+00004fe0 <BackLight_Task>:
+
+void BackLight_Task(void){
+	if (CardInfo.BlockSucc == BLOCK_READ_SUCC) 
+    4fe0:	1067      	lrw      	r3, 0x20000428	// 4ffc <BackLight_Task+0x1c>
+    4fe2:	8367      	ld.b      	r3, (r3, 0x7)
+    4fe4:	3b41      	cmpnei      	r3, 1
+    4fe6:	1067      	lrw      	r3, 0x20000024	// 5000 <BackLight_Task+0x20>
+    4fe8:	0806      	bt      	0x4ff4	// 4ff4 <BackLight_Task+0x14>
+        GPT0->CMPA = 2000;
+    4fea:	9340      	ld.w      	r2, (r3, 0x0)
+    4fec:	33fa      	movi      	r3, 250
+    4fee:	4363      	lsli      	r3, r3, 3
+    4ff0:	b26b      	st.w      	r3, (r2, 0x2c)
+	}else 
+	{
+		Ctrl_Backlight(0);//开背光
+		//Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay led on");
+	}
+}
+    4ff2:	783c      	jmp      	r15
+        GPT0->CMPA = 0;
+    4ff4:	9360      	ld.w      	r3, (r3, 0x0)
+    4ff6:	3200      	movi      	r2, 0
+    4ff8:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4ffa:	07fc      	br      	0x4ff2	// 4ff2 <BackLight_Task+0x12>
+    4ffc:	20000428 	.long	0x20000428
+    5000:	20000024 	.long	0x20000024
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+00005004 <Detect_WIFI_Task>:
+//检测有无WIFI模组，判断10次，每次间隔10ms
+void Detect_WIFI_Task(void){
+    5004:	14d1      	push      	r4, r15
+
+	if (finish_flag == 1) return;
+    5006:	107c      	lrw      	r3, 0x200000a2	// 5074 <Detect_WIFI_Task+0x70>
+    5008:	8340      	ld.b      	r2, (r3, 0x0)
+    500a:	3a41      	cmpnei      	r2, 1
+    500c:	0c1c      	bf      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+	
+	if (detect_count <10) {
+    500e:	109b      	lrw      	r4, 0x200000ac	// 5078 <Detect_WIFI_Task+0x74>
+    5010:	8440      	ld.b      	r2, (r4, 0x0)
+    5012:	3a09      	cmphsi      	r2, 10
+    5014:	081c      	bt      	0x504c	// 504c <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    5016:	103a      	lrw      	r1, 0x200000b8	// 507c <Detect_WIFI_Task+0x78>
+    5018:	105a      	lrw      	r2, 0x200000a8	// 5080 <Detect_WIFI_Task+0x7c>
+    501a:	9160      	ld.w      	r3, (r1, 0x0)
+    501c:	9200      	ld.w      	r0, (r2, 0x0)
+    501e:	60c2      	subu      	r3, r0
+    5020:	3b09      	cmphsi      	r3, 10
+    5022:	0c11      	bf      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    5024:	9160      	ld.w      	r3, (r1, 0x0)
+    5026:	b260      	st.w      	r3, (r2, 0x0)
+			
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    5028:	3102      	movi      	r1, 2
+    502a:	1077      	lrw      	r3, 0x20000048	// 5084 <Detect_WIFI_Task+0x80>
+    502c:	9300      	ld.w      	r0, (r3, 0x0)
+    502e:	e3fff1a3 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    5032:	1076      	lrw      	r3, 0x200000a0	// 5088 <Detect_WIFI_Task+0x84>
+    5034:	a300      	st.b      	r0, (r3, 0x0)
+			
+			if (last_state != rf_exist) {
+    5036:	1076      	lrw      	r3, 0x200000a1	// 508c <Detect_WIFI_Task+0x88>
+    5038:	8340      	ld.b      	r2, (r3, 0x0)
+    503a:	640a      	cmpne      	r2, r0
+    503c:	0c05      	bf      	0x5046	// 5046 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    503e:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    5040:	3300      	movi      	r3, 0
+			}else {
+				detect_count++;
+    5042:	a460      	st.b      	r3, (r4, 0x0)
+		{
+			LogicCtrl_Init();   
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+		}
+	}
+}
+    5044:	1491      	pop      	r4, r15
+				detect_count++;
+    5046:	8460      	ld.b      	r3, (r4, 0x0)
+    5048:	2300      	addi      	r3, 1
+    504a:	07fc      	br      	0x5042	// 5042 <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    504c:	3201      	movi      	r2, 1
+    504e:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    5050:	106e      	lrw      	r3, 0x200000a0	// 5088 <Detect_WIFI_Task+0x84>
+    5052:	8360      	ld.b      	r3, (r3, 0x0)
+    5054:	3b41      	cmpnei      	r3, 1
+    5056:	0808      	bt      	0x5066	// 5066 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    5058:	e3ffff20 	bsr      	0x4e98	// 4e98 <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    505c:	102d      	lrw      	r1, 0x60c4	// 5090 <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    505e:	3000      	movi      	r0, 0
+    5060:	e3fffab4 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    5064:	07f0      	br      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    5066:	3b40      	cmpnei      	r3, 0
+    5068:	0bee      	bt      	0x5044	// 5044 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    506a:	e3fffe81 	bsr      	0x4d6c	// 4d6c <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    506e:	102a      	lrw      	r1, 0x60c6	// 5094 <Detect_WIFI_Task+0x90>
+    5070:	07f7      	br      	0x505e	// 505e <Detect_WIFI_Task+0x5a>
+    5072:	0000      	bkpt
+    5074:	200000a2 	.long	0x200000a2
+    5078:	200000ac 	.long	0x200000ac
+    507c:	200000b8 	.long	0x200000b8
+    5080:	200000a8 	.long	0x200000a8
+    5084:	20000048 	.long	0x20000048
+    5088:	200000a0 	.long	0x200000a0
+    508c:	200000a1 	.long	0x200000a1
+    5090:	000060c4 	.long	0x000060c4
+    5094:	000060c6 	.long	0x000060c6
+
+Disassembly of section .text.Led_Task:
+
+00005098 <Led_Task>:
+	
+}
+
+
+
+void Led_Task(void){
+    5098:	14d1      	push      	r4, r15
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    509a:	1079      	lrw      	r3, 0x20000428	// 50fc <Led_Task+0x64>
+    509c:	8347      	ld.b      	r2, (r3, 0x7)
+    509e:	3a41      	cmpnei      	r2, 1
+    50a0:	0807      	bt      	0x50ae	// 50ae <Led_Task+0x16>
+	{
+		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    50a2:	1078      	lrw      	r3, 0x2000004c	// 5100 <Led_Task+0x68>
+    50a4:	3101      	movi      	r1, 1
+    50a6:	9300      	ld.w      	r0, (r3, 0x0)
+    50a8:	e3fff157 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+				dm_in.DM_Led_Tick = SysTick_1ms;
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+			}
+		}
+	}
+}
+    50ac:	1491      	pop      	r4, r15
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    50ae:	231f      	addi      	r3, 32
+    50b0:	8368      	ld.b      	r3, (r3, 0x8)
+    50b2:	3b41      	cmpnei      	r3, 1
+    50b4:	1074      	lrw      	r3, 0x20000494	// 5104 <Led_Task+0x6c>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    50b6:	8326      	ld.b      	r1, (r3, 0x6)
+    50b8:	8345      	ld.b      	r2, (r3, 0x5)
+    50ba:	4128      	lsli      	r1, r1, 8
+    50bc:	6c48      	or      	r1, r2
+    50be:	8347      	ld.b      	r2, (r3, 0x7)
+    50c0:	4250      	lsli      	r2, r2, 16
+    50c2:	6c48      	or      	r1, r2
+    50c4:	8348      	ld.b      	r2, (r3, 0x8)
+    50c6:	1011      	lrw      	r0, 0x200000b8	// 5108 <Led_Task+0x70>
+    50c8:	4258      	lsli      	r2, r2, 24
+    50ca:	9080      	ld.w      	r4, (r0, 0x0)
+    50cc:	6c84      	or      	r2, r1
+    50ce:	610a      	subu      	r4, r2
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    50d0:	0813      	bt      	0x50f6	// 50f6 <Led_Task+0x5e>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    50d2:	3263      	movi      	r2, 99
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    50d4:	6508      	cmphs      	r2, r4
+    50d6:	0beb      	bt      	0x50ac	// 50ac <Led_Task+0x14>
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    50d8:	9040      	ld.w      	r2, (r0, 0x0)
+    50da:	5b32      	addi      	r1, r3, 5
+    50dc:	a345      	st.b      	r2, (r3, 0x5)
+    50de:	4a68      	lsri      	r3, r2, 8
+    50e0:	a161      	st.b      	r3, (r1, 0x1)
+    50e2:	4a70      	lsri      	r3, r2, 16
+    50e4:	a162      	st.b      	r3, (r1, 0x2)
+    50e6:	4a58      	lsri      	r2, r2, 24
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    50e8:	1066      	lrw      	r3, 0x2000004c	// 5100 <Led_Task+0x68>
+    50ea:	9300      	ld.w      	r0, (r3, 0x0)
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    50ec:	a143      	st.b      	r2, (r1, 0x3)
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    50ee:	3101      	movi      	r1, 1
+    50f0:	e3fff137 	bsr      	0x335e	// 335e <GPIO_Reverse>
+}
+    50f4:	07dc      	br      	0x50ac	// 50ac <Led_Task+0x14>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    50f6:	1046      	lrw      	r2, 0x1f3	// 510c <Led_Task+0x74>
+    50f8:	07ee      	br      	0x50d4	// 50d4 <Led_Task+0x3c>
+    50fa:	0000      	bkpt
+    50fc:	20000428 	.long	0x20000428
+    5100:	2000004c 	.long	0x2000004c
+    5104:	20000494 	.long	0x20000494
+    5108:	200000b8 	.long	0x200000b8
+    510c:	000001f3 	.long	0x000001f3
+
+Disassembly of section .text.button_init:
+
+00005110 <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    5110:	14d4      	push      	r4-r7, r15
+    5112:	6dc7      	mov      	r7, r1
+    5114:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    5116:	3100      	movi      	r1, 0
+    5118:	3230      	movi      	r2, 48
+{
+    511a:	6d03      	mov      	r4, r0
+    511c:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    511e:	e3ffe47f 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    5122:	3300      	movi      	r3, 0
+    5124:	2b6f      	subi      	r3, 112
+    5126:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    5128:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    512a:	6c17      	mov      	r0, r5
+    512c:	7bdd      	jsr      	r7
+    512e:	8443      	ld.b      	r2, (r4, 0x3)
+    5130:	337f      	movi      	r3, 127
+    5132:	688c      	and      	r2, r3
+    5134:	4007      	lsli      	r0, r0, 7
+    5136:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    5138:	3201      	movi      	r2, 1
+    513a:	6988      	and      	r6, r2
+    513c:	7480      	zextb      	r2, r0
+    513e:	46c6      	lsli      	r6, r6, 6
+    5140:	3a86      	bclri      	r2, 6
+    5142:	6c98      	or      	r2, r6
+    5144:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    5146:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    5148:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+0000514a <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    514a:	2102      	addi      	r1, 3
+    514c:	4122      	lsli      	r1, r1, 2
+    514e:	6040      	addu      	r1, r0
+    5150:	b140      	st.w      	r2, (r1, 0x0)
+}
+    5152:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00005154 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    5154:	14d3      	push      	r4-r6, r15
+    5156:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    5158:	9462      	ld.w      	r3, (r4, 0x8)
+    515a:	8004      	ld.b      	r0, (r0, 0x4)
+    515c:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    515e:	8463      	ld.b      	r3, (r4, 0x3)
+    5160:	433d      	lsli      	r1, r3, 29
+    5162:	493d      	lsri      	r1, r1, 29
+    5164:	3940      	cmpnei      	r1, 0
+    5166:	0c04      	bf      	0x516e	// 516e <button_handler+0x1a>
+    5168:	8c40      	ld.h      	r2, (r4, 0x0)
+    516a:	2200      	addi      	r2, 1
+    516c:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    516e:	4b47      	lsri      	r2, r3, 7
+    5170:	640a      	cmpne      	r2, r0
+    5172:	0c21      	bf      	0x51b4	// 51b4 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    5174:	435a      	lsli      	r2, r3, 26
+    5176:	4a5d      	lsri      	r2, r2, 29
+    5178:	3507      	movi      	r5, 7
+    517a:	2200      	addi      	r2, 1
+    517c:	6894      	and      	r2, r5
+    517e:	7488      	zextb      	r2, r2
+    5180:	6948      	and      	r5, r2
+    5182:	45c3      	lsli      	r6, r5, 3
+    5184:	3538      	movi      	r5, 56
+    5186:	68d5      	andn      	r3, r5
+    5188:	6d8c      	or      	r6, r3
+    518a:	3a02      	cmphsi      	r2, 3
+    518c:	a4c3      	st.b      	r6, (r4, 0x3)
+    518e:	0c09      	bf      	0x51a0	// 51a0 <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    5190:	4067      	lsli      	r3, r0, 7
+    5192:	327f      	movi      	r2, 127
+    5194:	8403      	ld.b      	r0, (r4, 0x3)
+    5196:	6808      	and      	r0, r2
+    5198:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    519a:	7400      	zextb      	r0, r0
+    519c:	6815      	andn      	r0, r5
+    519e:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    51a0:	3941      	cmpnei      	r1, 1
+    51a2:	0c2f      	bf      	0x5200	// 5200 <button_handler+0xac>
+    51a4:	3940      	cmpnei      	r1, 0
+    51a6:	0c0b      	bf      	0x51bc	// 51bc <button_handler+0x68>
+    51a8:	3945      	cmpnei      	r1, 5
+    51aa:	0c53      	bf      	0x5250	// 5250 <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    51ac:	8463      	ld.b      	r3, (r4, 0x3)
+    51ae:	3207      	movi      	r2, 7
+    51b0:	68c9      	andn      	r3, r2
+    51b2:	0420      	br      	0x51f2	// 51f2 <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    51b4:	3238      	movi      	r2, 56
+    51b6:	68c9      	andn      	r3, r2
+    51b8:	a463      	st.b      	r3, (r4, 0x3)
+    51ba:	07f3      	br      	0x51a0	// 51a0 <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    51bc:	8463      	ld.b      	r3, (r4, 0x3)
+    51be:	4359      	lsli      	r2, r3, 25
+    51c0:	4a5f      	lsri      	r2, r2, 31
+    51c2:	4b67      	lsri      	r3, r3, 7
+    51c4:	648e      	cmpne      	r3, r2
+    51c6:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    51c8:	320f      	movi      	r2, 15
+    51ca:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    51cc:	0815      	bt      	0x51f6	// 51f6 <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    51ce:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    51d0:	9463      	ld.w      	r3, (r4, 0xc)
+    51d2:	3b40      	cmpnei      	r3, 0
+    51d4:	0c03      	bf      	0x51da	// 51da <button_handler+0x86>
+    51d6:	6c13      	mov      	r0, r4
+    51d8:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    51da:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    51dc:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    51de:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    51e0:	330f      	movi      	r3, 15
+    51e2:	688d      	andn      	r2, r3
+    51e4:	3101      	movi      	r1, 1
+    51e6:	6c84      	or      	r2, r1
+    51e8:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    51ea:	8463      	ld.b      	r3, (r4, 0x3)
+    51ec:	3207      	movi      	r2, 7
+    51ee:	68c9      	andn      	r3, r2
+    51f0:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    51f2:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    51f4:	0405      	br      	0x51fe	// 51fe <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    51f6:	3200      	movi      	r2, 0
+    51f8:	2a6f      	subi      	r2, 112
+    51fa:	6cc8      	or      	r3, r2
+    51fc:	a462      	st.b      	r3, (r4, 0x2)
+}
+    51fe:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    5200:	8463      	ld.b      	r3, (r4, 0x3)
+    5202:	4359      	lsli      	r2, r3, 25
+    5204:	4a5f      	lsri      	r2, r2, 31
+    5206:	4b67      	lsri      	r3, r3, 7
+    5208:	648e      	cmpne      	r3, r2
+    520a:	0c0e      	bf      	0x5226	// 5226 <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    520c:	8462      	ld.b      	r3, (r4, 0x2)
+    520e:	320f      	movi      	r2, 15
+    5210:	68c8      	and      	r3, r2
+    5212:	3ba4      	bseti      	r3, 4
+    5214:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    5216:	9464      	ld.w      	r3, (r4, 0x10)
+    5218:	3b40      	cmpnei      	r3, 0
+    521a:	0c03      	bf      	0x5220	// 5220 <button_handler+0xcc>
+    521c:	6c13      	mov      	r0, r4
+    521e:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    5220:	3300      	movi      	r3, 0
+    5222:	ac60      	st.h      	r3, (r4, 0x0)
+    5224:	07c4      	br      	0x51ac	// 51ac <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    5226:	8c40      	ld.h      	r2, (r4, 0x0)
+    5228:	33c8      	movi      	r3, 200
+    522a:	648c      	cmphs      	r3, r2
+    522c:	0be9      	bt      	0x51fe	// 51fe <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    522e:	8462      	ld.b      	r3, (r4, 0x2)
+    5230:	320f      	movi      	r2, 15
+    5232:	68c8      	and      	r3, r2
+    5234:	3ba4      	bseti      	r3, 4
+    5236:	3ba6      	bseti      	r3, 6
+    5238:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    523a:	9468      	ld.w      	r3, (r4, 0x20)
+    523c:	3b40      	cmpnei      	r3, 0
+    523e:	0c03      	bf      	0x5244	// 5244 <button_handler+0xf0>
+    5240:	6c13      	mov      	r0, r4
+    5242:	7bcd      	jsr      	r3
+			handle->state = 5;
+    5244:	8463      	ld.b      	r3, (r4, 0x3)
+    5246:	3207      	movi      	r2, 7
+    5248:	68c9      	andn      	r3, r2
+    524a:	3ba0      	bseti      	r3, 0
+    524c:	3ba2      	bseti      	r3, 2
+    524e:	07d2      	br      	0x51f2	// 51f2 <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    5250:	8463      	ld.b      	r3, (r4, 0x3)
+    5252:	4359      	lsli      	r2, r3, 25
+    5254:	4a5f      	lsri      	r2, r2, 31
+    5256:	4b67      	lsri      	r3, r3, 7
+    5258:	648e      	cmpne      	r3, r2
+    525a:	0fd2      	bf      	0x51fe	// 51fe <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    525c:	8462      	ld.b      	r3, (r4, 0x2)
+    525e:	320f      	movi      	r2, 15
+    5260:	68c8      	and      	r3, r2
+    5262:	3270      	movi      	r2, 112
+    5264:	6cc8      	or      	r3, r2
+    5266:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    5268:	946a      	ld.w      	r3, (r4, 0x28)
+    526a:	3b40      	cmpnei      	r3, 0
+    526c:	0fa0      	bf      	0x51ac	// 51ac <button_handler+0x58>
+    526e:	6c13      	mov      	r0, r4
+    5270:	7bcd      	jsr      	r3
+    5272:	079d      	br      	0x51ac	// 51ac <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00005274 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    5274:	1068      	lrw      	r3, 0x200002f8	// 5294 <button_start+0x20>
+    5276:	9320      	ld.w      	r1, (r3, 0x0)
+    5278:	6c87      	mov      	r2, r1
+	while(target) {
+    527a:	3a40      	cmpnei      	r2, 0
+    527c:	0805      	bt      	0x5286	// 5286 <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    527e:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    5280:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    5282:	3000      	movi      	r0, 0
+}
+    5284:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    5286:	640a      	cmpne      	r2, r0
+    5288:	0c03      	bf      	0x528e	// 528e <button_start+0x1a>
+		target = target->next;
+    528a:	924b      	ld.w      	r2, (r2, 0x2c)
+    528c:	07f7      	br      	0x527a	// 527a <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    528e:	3000      	movi      	r0, 0
+    5290:	2800      	subi      	r0, 1
+    5292:	07f9      	br      	0x5284	// 5284 <button_start+0x10>
+    5294:	200002f8 	.long	0x200002f8
+
+Disassembly of section .text.button_ticks:
+
+00005298 <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    5298:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    529a:	1066      	lrw      	r3, 0x200002f8	// 52b0 <button_ticks+0x18>
+    529c:	9380      	ld.w      	r4, (r3, 0x0)
+    529e:	3c40      	cmpnei      	r4, 0
+    52a0:	0802      	bt      	0x52a4	// 52a4 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    52a2:	1491      	pop      	r4, r15
+		button_handler(target);
+    52a4:	6c13      	mov      	r0, r4
+    52a6:	e3ffff57 	bsr      	0x5154	// 5154 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    52aa:	948b      	ld.w      	r4, (r4, 0x2c)
+    52ac:	07f9      	br      	0x529e	// 529e <button_ticks+0x6>
+    52ae:	0000      	bkpt
+    52b0:	200002f8 	.long	0x200002f8
+
+Disassembly of section .text.read_button_GPIO:
+
+000052b4 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    52b4:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    52b6:	1064      	lrw      	r3, 0x2000004c	// 52c4 <read_button_GPIO+0x10>
+{
+    52b8:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    52ba:	9300      	ld.w      	r0, (r3, 0x0)
+    52bc:	e3fff05c 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+	return state;
+    52c0:	1490      	pop      	r15
+    52c2:	0000      	bkpt
+    52c4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+000052c8 <TK_Sampling_prog>:
+    52c8:	14c4      	push      	r4-r7
+    52ca:	1072      	lrw      	r3, 0x20000054	// 5310 <TK_Sampling_prog+0x48>
+    52cc:	1012      	lrw      	r0, 0x20000746	// 5314 <TK_Sampling_prog+0x4c>
+    52ce:	1093      	lrw      	r4, 0x200005b7	// 5318 <TK_Sampling_prog+0x50>
+    52d0:	6d83      	mov      	r6, r0
+    52d2:	93a0      	ld.w      	r5, (r3, 0x0)
+    52d4:	3300      	movi      	r3, 0
+    52d6:	4342      	lsli      	r2, r3, 2
+    52d8:	6094      	addu      	r2, r5
+    52da:	9220      	ld.w      	r1, (r2, 0x0)
+    52dc:	4341      	lsli      	r2, r3, 1
+    52de:	6080      	addu      	r2, r0
+    52e0:	7445      	zexth      	r1, r1
+    52e2:	aa20      	st.h      	r1, (r2, 0x0)
+    52e4:	8440      	ld.b      	r2, (r4, 0x0)
+    52e6:	3a41      	cmpnei      	r2, 1
+    52e8:	080f      	bt      	0x5306	// 5306 <TK_Sampling_prog+0x3e>
+    52ea:	3300      	movi      	r3, 0
+    52ec:	10ec      	lrw      	r7, 0x200004a0	// 531c <TK_Sampling_prog+0x54>
+    52ee:	4341      	lsli      	r2, r3, 1
+    52f0:	5e28      	addu      	r1, r6, r2
+    52f2:	8920      	ld.h      	r1, (r1, 0x0)
+    52f4:	2300      	addi      	r3, 1
+    52f6:	7445      	zexth      	r1, r1
+    52f8:	609c      	addu      	r2, r7
+    52fa:	3b51      	cmpnei      	r3, 17
+    52fc:	aa20      	st.h      	r1, (r2, 0x0)
+    52fe:	0bf8      	bt      	0x52ee	// 52ee <TK_Sampling_prog+0x26>
+    5300:	3300      	movi      	r3, 0
+    5302:	a460      	st.b      	r3, (r4, 0x0)
+    5304:	3311      	movi      	r3, 17
+    5306:	2300      	addi      	r3, 1
+    5308:	74cc      	zextb      	r3, r3
+    530a:	3b10      	cmphsi      	r3, 17
+    530c:	0fe5      	bf      	0x52d6	// 52d6 <TK_Sampling_prog+0xe>
+    530e:	1484      	pop      	r4-r7
+    5310:	20000054 	.long	0x20000054
+    5314:	20000746 	.long	0x20000746
+    5318:	200005b7 	.long	0x200005b7
+    531c:	200004a0 	.long	0x200004a0
+
+Disassembly of section .text.TKEYIntHandler:
+
+00005320 <TKEYIntHandler>:
+    5320:	1460      	nie
+    5322:	1462      	ipush
+    5324:	14d1      	push      	r4, r15
+    5326:	109e      	lrw      	r4, 0x2000006c	// 539c <TKEYIntHandler+0x7c>
+    5328:	9460      	ld.w      	r3, (r4, 0x0)
+    532a:	3b40      	cmpnei      	r3, 0
+    532c:	080b      	bt      	0x5342	// 5342 <TKEYIntHandler+0x22>
+    532e:	3301      	movi      	r3, 1
+    5330:	b460      	st.w      	r3, (r4, 0x0)
+    5332:	107c      	lrw      	r3, 0x20000534	// 53a0 <TKEYIntHandler+0x80>
+    5334:	8360      	ld.b      	r3, (r3, 0x0)
+    5336:	3b41      	cmpnei      	r3, 1
+    5338:	0805      	bt      	0x5342	// 5342 <TKEYIntHandler+0x22>
+    533a:	e3ffffc7 	bsr      	0x52c8	// 52c8 <TK_Sampling_prog>
+    533e:	3301      	movi      	r3, 1
+    5340:	a464      	st.b      	r3, (r4, 0x4)
+    5342:	1079      	lrw      	r3, 0x20000058	// 53a4 <TKEYIntHandler+0x84>
+    5344:	3101      	movi      	r1, 1
+    5346:	9360      	ld.w      	r3, (r3, 0x0)
+    5348:	934a      	ld.w      	r2, (r3, 0x28)
+    534a:	6884      	and      	r2, r1
+    534c:	3a40      	cmpnei      	r2, 0
+    534e:	0c02      	bf      	0x5352	// 5352 <TKEYIntHandler+0x32>
+    5350:	b32c      	st.w      	r1, (r3, 0x30)
+    5352:	934a      	ld.w      	r2, (r3, 0x28)
+    5354:	3102      	movi      	r1, 2
+    5356:	6884      	and      	r2, r1
+    5358:	3a40      	cmpnei      	r2, 0
+    535a:	0c02      	bf      	0x535e	// 535e <TKEYIntHandler+0x3e>
+    535c:	b32c      	st.w      	r1, (r3, 0x30)
+    535e:	934a      	ld.w      	r2, (r3, 0x28)
+    5360:	3104      	movi      	r1, 4
+    5362:	6884      	and      	r2, r1
+    5364:	3a40      	cmpnei      	r2, 0
+    5366:	0c02      	bf      	0x536a	// 536a <TKEYIntHandler+0x4a>
+    5368:	b32c      	st.w      	r1, (r3, 0x30)
+    536a:	934a      	ld.w      	r2, (r3, 0x28)
+    536c:	3108      	movi      	r1, 8
+    536e:	6884      	and      	r2, r1
+    5370:	3a40      	cmpnei      	r2, 0
+    5372:	0c02      	bf      	0x5376	// 5376 <TKEYIntHandler+0x56>
+    5374:	b32c      	st.w      	r1, (r3, 0x30)
+    5376:	934a      	ld.w      	r2, (r3, 0x28)
+    5378:	3110      	movi      	r1, 16
+    537a:	6884      	and      	r2, r1
+    537c:	3a40      	cmpnei      	r2, 0
+    537e:	0c02      	bf      	0x5382	// 5382 <TKEYIntHandler+0x62>
+    5380:	b32c      	st.w      	r1, (r3, 0x30)
+    5382:	934a      	ld.w      	r2, (r3, 0x28)
+    5384:	3120      	movi      	r1, 32
+    5386:	6884      	and      	r2, r1
+    5388:	3a40      	cmpnei      	r2, 0
+    538a:	0c02      	bf      	0x538e	// 538e <TKEYIntHandler+0x6e>
+    538c:	b32c      	st.w      	r1, (r3, 0x30)
+    538e:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    5392:	9880      	ld.w      	r4, (r14, 0x0)
+    5394:	1402      	addi      	r14, r14, 8
+    5396:	1463      	ipop
+    5398:	1461      	nir
+    539a:	0000      	bkpt
+    539c:	2000006c 	.long	0x2000006c
+    53a0:	20000534 	.long	0x20000534
+    53a4:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+000053a8 <get_key_number>:
+    53a8:	14c2      	push      	r4-r5
+    53aa:	3200      	movi      	r2, 0
+    53ac:	3000      	movi      	r0, 0
+    53ae:	1088      	lrw      	r4, 0x200005d4	// 53cc <get_key_number+0x24>
+    53b0:	3501      	movi      	r5, 1
+    53b2:	3120      	movi      	r1, 32
+    53b4:	9460      	ld.w      	r3, (r4, 0x0)
+    53b6:	70c9      	lsr      	r3, r2
+    53b8:	68d4      	and      	r3, r5
+    53ba:	3b40      	cmpnei      	r3, 0
+    53bc:	0c02      	bf      	0x53c0	// 53c0 <get_key_number+0x18>
+    53be:	2000      	addi      	r0, 1
+    53c0:	2200      	addi      	r2, 1
+    53c2:	644a      	cmpne      	r2, r1
+    53c4:	0bf8      	bt      	0x53b4	// 53b4 <get_key_number+0xc>
+    53c6:	7400      	zextb      	r0, r0
+    53c8:	1482      	pop      	r4-r5
+    53ca:	0000      	bkpt
+    53cc:	200005d4 	.long	0x200005d4
+
+Disassembly of section .text.TK_Scan_Start:
+
+000053d0 <TK_Scan_Start>:
+    53d0:	1046      	lrw      	r2, 0x2000006c	// 53e8 <TK_Scan_Start+0x18>
+    53d2:	8264      	ld.b      	r3, (r2, 0x4)
+    53d4:	74cc      	zextb      	r3, r3
+    53d6:	3b41      	cmpnei      	r3, 1
+    53d8:	0807      	bt      	0x53e6	// 53e6 <TK_Scan_Start+0x16>
+    53da:	1025      	lrw      	r1, 0x20000058	// 53ec <TK_Scan_Start+0x1c>
+    53dc:	9120      	ld.w      	r1, (r1, 0x0)
+    53de:	b162      	st.w      	r3, (r1, 0x8)
+    53e0:	3300      	movi      	r3, 0
+    53e2:	b260      	st.w      	r3, (r2, 0x0)
+    53e4:	a264      	st.b      	r3, (r2, 0x4)
+    53e6:	783c      	jmp      	r15
+    53e8:	2000006c 	.long	0x2000006c
+    53ec:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000053f0 <TK_Keymap_prog>:
+    53f0:	14d4      	push      	r4-r7, r15
+    53f2:	1425      	subi      	r14, r14, 20
+    53f4:	1271      	lrw      	r3, 0x20000328	// 5538 <TK_Keymap_prog+0x148>
+    53f6:	8360      	ld.b      	r3, (r3, 0x0)
+    53f8:	b860      	st.w      	r3, (r14, 0x0)
+    53fa:	3400      	movi      	r4, 0
+    53fc:	1270      	lrw      	r3, 0x200002fc	// 553c <TK_Keymap_prog+0x14c>
+    53fe:	8360      	ld.b      	r3, (r3, 0x0)
+    5400:	b861      	st.w      	r3, (r14, 0x4)
+    5402:	12f0      	lrw      	r7, 0x2000054a	// 5540 <TK_Keymap_prog+0x150>
+    5404:	1270      	lrw      	r3, 0x20000305	// 5544 <TK_Keymap_prog+0x154>
+    5406:	83a0      	ld.b      	r5, (r3, 0x0)
+    5408:	1270      	lrw      	r3, 0x20000304	// 5548 <TK_Keymap_prog+0x158>
+    540a:	8360      	ld.b      	r3, (r3, 0x0)
+    540c:	b862      	st.w      	r3, (r14, 0x8)
+    540e:	6d9f      	mov      	r6, r7
+    5410:	126f      	lrw      	r3, 0x20000746	// 554c <TK_Keymap_prog+0x15c>
+    5412:	b863      	st.w      	r3, (r14, 0xc)
+    5414:	4461      	lsli      	r3, r4, 1
+    5416:	9843      	ld.w      	r2, (r14, 0xc)
+    5418:	608c      	addu      	r2, r3
+    541a:	122e      	lrw      	r1, 0x200004a0	// 5550 <TK_Keymap_prog+0x160>
+    541c:	604c      	addu      	r1, r3
+    541e:	8a40      	ld.h      	r2, (r2, 0x0)
+    5420:	8920      	ld.h      	r1, (r1, 0x0)
+    5422:	6086      	subu      	r2, r1
+    5424:	748b      	sexth      	r2, r2
+    5426:	5f2c      	addu      	r1, r7, r3
+    5428:	a940      	st.h      	r2, (r1, 0x0)
+    542a:	8940      	ld.h      	r2, (r1, 0x0)
+    542c:	748b      	sexth      	r2, r2
+    542e:	3adf      	btsti      	r2, 31
+    5430:	1249      	lrw      	r2, 0x20000702	// 5554 <TK_Keymap_prog+0x164>
+    5432:	608c      	addu      	r2, r3
+    5434:	0c37      	bf      	0x54a2	// 54a2 <TK_Keymap_prog+0xb2>
+    5436:	3100      	movi      	r1, 0
+    5438:	aa20      	st.h      	r1, (r2, 0x0)
+    543a:	9840      	ld.w      	r2, (r14, 0x0)
+    543c:	3a01      	cmphsi      	r2, 2
+    543e:	0c6d      	bf      	0x5518	// 5518 <TK_Keymap_prog+0x128>
+    5440:	4461      	lsli      	r3, r4, 1
+    5442:	5e2c      	addu      	r1, r6, r3
+    5444:	1205      	lrw      	r0, 0x20000356	// 5558 <TK_Keymap_prog+0x168>
+    5446:	8940      	ld.h      	r2, (r1, 0x0)
+    5448:	60c0      	addu      	r3, r0
+    544a:	748b      	sexth      	r2, r2
+    544c:	8b60      	ld.h      	r3, (r3, 0x0)
+    544e:	648d      	cmplt      	r3, r2
+    5450:	9840      	ld.w      	r2, (r14, 0x0)
+    5452:	7cc8      	mult      	r3, r2
+    5454:	0c2a      	bf      	0x54a8	// 54a8 <TK_Keymap_prog+0xb8>
+    5456:	8940      	ld.h      	r2, (r1, 0x0)
+    5458:	748b      	sexth      	r2, r2
+    545a:	64c9      	cmplt      	r2, r3
+    545c:	0c26      	bf      	0x54a8	// 54a8 <TK_Keymap_prog+0xb8>
+    545e:	1240      	lrw      	r2, 0x20000538	// 555c <TK_Keymap_prog+0x16c>
+    5460:	6090      	addu      	r2, r4
+    5462:	8260      	ld.b      	r3, (r2, 0x0)
+    5464:	2300      	addi      	r3, 1
+    5466:	74cc      	zextb      	r3, r3
+    5468:	a260      	st.b      	r3, (r2, 0x0)
+    546a:	3100      	movi      	r1, 0
+    546c:	117d      	lrw      	r3, 0x2000051e	// 5560 <TK_Keymap_prog+0x170>
+    546e:	60d0      	addu      	r3, r4
+    5470:	a320      	st.b      	r1, (r3, 0x0)
+    5472:	117d      	lrw      	r3, 0x200005fa	// 5564 <TK_Keymap_prog+0x174>
+    5474:	60d0      	addu      	r3, r4
+    5476:	a320      	st.b      	r1, (r3, 0x0)
+    5478:	117c      	lrw      	r3, 0x20000674	// 5568 <TK_Keymap_prog+0x178>
+    547a:	60d0      	addu      	r3, r4
+    547c:	a320      	st.b      	r1, (r3, 0x0)
+    547e:	8260      	ld.b      	r3, (r2, 0x0)
+    5480:	9821      	ld.w      	r1, (r14, 0x4)
+    5482:	64c4      	cmphs      	r1, r3
+    5484:	081f      	bt      	0x54c2	// 54c2 <TK_Keymap_prog+0xd2>
+    5486:	3d40      	cmpnei      	r5, 0
+    5488:	0852      	bt      	0x552c	// 552c <TK_Keymap_prog+0x13c>
+    548a:	1139      	lrw      	r1, 0x20000530	// 556c <TK_Keymap_prog+0x17c>
+    548c:	9160      	ld.w      	r3, (r1, 0x0)
+    548e:	3b40      	cmpnei      	r3, 0
+    5490:	0806      	bt      	0x549c	// 549c <TK_Keymap_prog+0xac>
+    5492:	9100      	ld.w      	r0, (r1, 0x0)
+    5494:	3301      	movi      	r3, 1
+    5496:	70d0      	lsl      	r3, r4
+    5498:	6cc0      	or      	r3, r0
+    549a:	b160      	st.w      	r3, (r1, 0x0)
+    549c:	3300      	movi      	r3, 0
+    549e:	a260      	st.b      	r3, (r2, 0x0)
+    54a0:	0411      	br      	0x54c2	// 54c2 <TK_Keymap_prog+0xd2>
+    54a2:	8920      	ld.h      	r1, (r1, 0x0)
+    54a4:	7445      	zexth      	r1, r1
+    54a6:	07c9      	br      	0x5438	// 5438 <TK_Keymap_prog+0x48>
+    54a8:	4441      	lsli      	r2, r4, 1
+    54aa:	6098      	addu      	r2, r6
+    54ac:	8a40      	ld.h      	r2, (r2, 0x0)
+    54ae:	748b      	sexth      	r2, r2
+    54b0:	648d      	cmplt      	r3, r2
+    54b2:	0c08      	bf      	0x54c2	// 54c2 <TK_Keymap_prog+0xd2>
+    54b4:	3300      	movi      	r3, 0
+    54b6:	114e      	lrw      	r2, 0x20000530	// 556c <TK_Keymap_prog+0x17c>
+    54b8:	2b01      	subi      	r3, 2
+    54ba:	9220      	ld.w      	r1, (r2, 0x0)
+    54bc:	70d3      	rotl      	r3, r4
+    54be:	68c4      	and      	r3, r1
+    54c0:	b260      	st.w      	r3, (r2, 0x0)
+    54c2:	4441      	lsli      	r2, r4, 1
+    54c4:	5e68      	addu      	r3, r6, r2
+    54c6:	8b60      	ld.h      	r3, (r3, 0x0)
+    54c8:	74cf      	sexth      	r3, r3
+    54ca:	b864      	st.w      	r3, (r14, 0x10)
+    54cc:	3105      	movi      	r1, 5
+    54ce:	1163      	lrw      	r3, 0x20000356	// 5558 <TK_Keymap_prog+0x168>
+    54d0:	608c      	addu      	r2, r3
+    54d2:	8a00      	ld.h      	r0, (r2, 0x0)
+    54d4:	4002      	lsli      	r0, r0, 2
+    54d6:	e3fff78f 	bsr      	0x43f4	// 43f4 <__divsi3>
+    54da:	9864      	ld.w      	r3, (r14, 0x10)
+    54dc:	640d      	cmplt      	r3, r0
+    54de:	0c18      	bf      	0x550e	// 550e <TK_Keymap_prog+0x11e>
+    54e0:	1140      	lrw      	r2, 0x2000051e	// 5560 <TK_Keymap_prog+0x170>
+    54e2:	6090      	addu      	r2, r4
+    54e4:	8260      	ld.b      	r3, (r2, 0x0)
+    54e6:	2300      	addi      	r3, 1
+    54e8:	74cc      	zextb      	r3, r3
+    54ea:	a260      	st.b      	r3, (r2, 0x0)
+    54ec:	3100      	movi      	r1, 0
+    54ee:	107c      	lrw      	r3, 0x20000538	// 555c <TK_Keymap_prog+0x16c>
+    54f0:	60d0      	addu      	r3, r4
+    54f2:	a320      	st.b      	r1, (r3, 0x0)
+    54f4:	8260      	ld.b      	r3, (r2, 0x0)
+    54f6:	9822      	ld.w      	r1, (r14, 0x8)
+    54f8:	64c4      	cmphs      	r1, r3
+    54fa:	080a      	bt      	0x550e	// 550e <TK_Keymap_prog+0x11e>
+    54fc:	3300      	movi      	r3, 0
+    54fe:	103c      	lrw      	r1, 0x20000530	// 556c <TK_Keymap_prog+0x17c>
+    5500:	2b01      	subi      	r3, 2
+    5502:	9100      	ld.w      	r0, (r1, 0x0)
+    5504:	70d3      	rotl      	r3, r4
+    5506:	68c0      	and      	r3, r0
+    5508:	b160      	st.w      	r3, (r1, 0x0)
+    550a:	3300      	movi      	r3, 0
+    550c:	a260      	st.b      	r3, (r2, 0x0)
+    550e:	2400      	addi      	r4, 1
+    5510:	3c51      	cmpnei      	r4, 17
+    5512:	0b81      	bt      	0x5414	// 5414 <TK_Keymap_prog+0x24>
+    5514:	1405      	addi      	r14, r14, 20
+    5516:	1494      	pop      	r4-r7, r15
+    5518:	60d8      	addu      	r3, r6
+    551a:	4441      	lsli      	r2, r4, 1
+    551c:	102f      	lrw      	r1, 0x20000356	// 5558 <TK_Keymap_prog+0x168>
+    551e:	8b60      	ld.h      	r3, (r3, 0x0)
+    5520:	6084      	addu      	r2, r1
+    5522:	74cf      	sexth      	r3, r3
+    5524:	8a40      	ld.h      	r2, (r2, 0x0)
+    5526:	64c9      	cmplt      	r2, r3
+    5528:	0fcd      	bf      	0x54c2	// 54c2 <TK_Keymap_prog+0xd2>
+    552a:	079a      	br      	0x545e	// 545e <TK_Keymap_prog+0x6e>
+    552c:	3d41      	cmpnei      	r5, 1
+    552e:	0bb7      	bt      	0x549c	// 549c <TK_Keymap_prog+0xac>
+    5530:	102f      	lrw      	r1, 0x20000530	// 556c <TK_Keymap_prog+0x17c>
+    5532:	6cd7      	mov      	r3, r5
+    5534:	9100      	ld.w      	r0, (r1, 0x0)
+    5536:	07b0      	br      	0x5496	// 5496 <TK_Keymap_prog+0xa6>
+    5538:	20000328 	.long	0x20000328
+    553c:	200002fc 	.long	0x200002fc
+    5540:	2000054a 	.long	0x2000054a
+    5544:	20000305 	.long	0x20000305
+    5548:	20000304 	.long	0x20000304
+    554c:	20000746 	.long	0x20000746
+    5550:	200004a0 	.long	0x200004a0
+    5554:	20000702 	.long	0x20000702
+    5558:	20000356 	.long	0x20000356
+    555c:	20000538 	.long	0x20000538
+    5560:	2000051e 	.long	0x2000051e
+    5564:	200005fa 	.long	0x200005fa
+    5568:	20000674 	.long	0x20000674
+    556c:	20000530 	.long	0x20000530
+
+Disassembly of section .text.TK_overflow_predict:
+
+00005570 <TK_overflow_predict>:
+    5570:	14d4      	push      	r4-r7, r15
+    5572:	1421      	subi      	r14, r14, 4
+    5574:	11d9      	lrw      	r6, 0x2000006c	// 5658 <TK_overflow_predict+0xe8>
+    5576:	8665      	ld.b      	r3, (r6, 0x5)
+    5578:	3b41      	cmpnei      	r3, 1
+    557a:	085f      	bt      	0x5638	// 5638 <TK_overflow_predict+0xc8>
+    557c:	1158      	lrw      	r2, 0x20000650	// 565c <TK_overflow_predict+0xec>
+    557e:	8260      	ld.b      	r3, (r2, 0x0)
+    5580:	2300      	addi      	r3, 1
+    5582:	74cc      	zextb      	r3, r3
+    5584:	a260      	st.b      	r3, (r2, 0x0)
+    5586:	8260      	ld.b      	r3, (r2, 0x0)
+    5588:	1136      	lrw      	r1, 0x20000329	// 5660 <TK_overflow_predict+0xf0>
+    558a:	8120      	ld.b      	r1, (r1, 0x0)
+    558c:	64c4      	cmphs      	r1, r3
+    558e:	0855      	bt      	0x5638	// 5638 <TK_overflow_predict+0xc8>
+    5590:	3300      	movi      	r3, 0
+    5592:	a260      	st.b      	r3, (r2, 0x0)
+    5594:	3500      	movi      	r5, 0
+    5596:	11f4      	lrw      	r7, 0x2000032c	// 5664 <TK_overflow_predict+0xf4>
+    5598:	2605      	addi      	r6, 6
+    559a:	9760      	ld.w      	r3, (r7, 0x0)
+    559c:	70d5      	lsr      	r3, r5
+    559e:	3201      	movi      	r2, 1
+    55a0:	68c8      	and      	r3, r2
+    55a2:	3b40      	cmpnei      	r3, 0
+    55a4:	0c34      	bf      	0x560c	// 560c <TK_overflow_predict+0x9c>
+    55a6:	4581      	lsli      	r4, r5, 1
+    55a8:	5e70      	addu      	r3, r6, r4
+    55aa:	8b00      	ld.h      	r0, (r3, 0x0)
+    55ac:	e3ffdffa 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    55b0:	6cc7      	mov      	r3, r1
+    55b2:	3180      	movi      	r1, 128
+    55b4:	6c83      	mov      	r2, r0
+    55b6:	4137      	lsli      	r1, r1, 23
+    55b8:	3000      	movi      	r0, 0
+    55ba:	e3ffd5fd 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    55be:	116b      	lrw      	r3, 0x20000332	// 5668 <TK_overflow_predict+0xf8>
+    55c0:	60d0      	addu      	r3, r4
+    55c2:	8b60      	ld.h      	r3, (r3, 0x0)
+    55c4:	4364      	lsli      	r3, r3, 4
+    55c6:	230e      	addi      	r3, 15
+    55c8:	b860      	st.w      	r3, (r14, 0x0)
+    55ca:	e3ffdba3 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    55ce:	9860      	ld.w      	r3, (r14, 0x0)
+    55d0:	7cc0      	mult      	r3, r0
+    55d2:	1147      	lrw      	r2, 0x200006e0	// 566c <TK_overflow_predict+0xfc>
+    55d4:	740d      	zexth      	r0, r3
+    55d6:	6090      	addu      	r2, r4
+    55d8:	1166      	lrw      	r3, 0x20000746	// 5670 <TK_overflow_predict+0x100>
+    55da:	60d0      	addu      	r3, r4
+    55dc:	aa00      	st.h      	r0, (r2, 0x0)
+    55de:	8b60      	ld.h      	r3, (r3, 0x0)
+    55e0:	8a00      	ld.h      	r0, (r2, 0x0)
+    55e2:	7401      	zexth      	r0, r0
+    55e4:	325f      	movi      	r2, 95
+    55e6:	74cd      	zexth      	r3, r3
+    55e8:	7c08      	mult      	r0, r2
+    55ea:	3164      	movi      	r1, 100
+    55ec:	b860      	st.w      	r3, (r14, 0x0)
+    55ee:	e3fff703 	bsr      	0x43f4	// 43f4 <__divsi3>
+    55f2:	9860      	ld.w      	r3, (r14, 0x0)
+    55f4:	64c1      	cmplt      	r0, r3
+    55f6:	0c0b      	bf      	0x560c	// 560c <TK_overflow_predict+0x9c>
+    55f8:	107f      	lrw      	r3, 0x20000306	// 5674 <TK_overflow_predict+0x104>
+    55fa:	610c      	addu      	r4, r3
+    55fc:	8c60      	ld.h      	r3, (r4, 0x0)
+    55fe:	3b06      	cmphsi      	r3, 7
+    5600:	0806      	bt      	0x560c	// 560c <TK_overflow_predict+0x9c>
+    5602:	2300      	addi      	r3, 1
+    5604:	ac60      	st.h      	r3, (r4, 0x0)
+    5606:	3201      	movi      	r2, 1
+    5608:	107c      	lrw      	r3, 0x200005a5	// 5678 <TK_overflow_predict+0x108>
+    560a:	a340      	st.b      	r2, (r3, 0x0)
+    560c:	2500      	addi      	r5, 1
+    560e:	3d51      	cmpnei      	r5, 17
+    5610:	0bc5      	bt      	0x559a	// 559a <TK_overflow_predict+0x2a>
+    5612:	107a      	lrw      	r3, 0x200005a5	// 5678 <TK_overflow_predict+0x108>
+    5614:	8340      	ld.b      	r2, (r3, 0x0)
+    5616:	3a41      	cmpnei      	r2, 1
+    5618:	0810      	bt      	0x5638	// 5638 <TK_overflow_predict+0xc8>
+    561a:	3200      	movi      	r2, 0
+    561c:	a340      	st.b      	r2, (r3, 0x0)
+    561e:	3200      	movi      	r2, 0
+    5620:	1077      	lrw      	r3, 0x20000058	// 567c <TK_overflow_predict+0x10c>
+    5622:	1018      	lrw      	r0, 0x20000673	// 5680 <TK_overflow_predict+0x110>
+    5624:	10b8      	lrw      	r5, 0x200006ac	// 5684 <TK_overflow_predict+0x114>
+    5626:	10d4      	lrw      	r6, 0x20000306	// 5674 <TK_overflow_predict+0x104>
+    5628:	9360      	ld.w      	r3, (r3, 0x0)
+    562a:	b342      	st.w      	r2, (r3, 0x8)
+    562c:	1077      	lrw      	r3, 0x20000054	// 5688 <TK_overflow_predict+0x118>
+    562e:	9380      	ld.w      	r4, (r3, 0x0)
+    5630:	3300      	movi      	r3, 0
+    5632:	8040      	ld.b      	r2, (r0, 0x0)
+    5634:	648c      	cmphs      	r3, r2
+    5636:	0c03      	bf      	0x563c	// 563c <TK_overflow_predict+0xcc>
+    5638:	1401      	addi      	r14, r14, 4
+    563a:	1494      	pop      	r4-r7, r15
+    563c:	5d4c      	addu      	r2, r5, r3
+    563e:	8240      	ld.b      	r2, (r2, 0x0)
+    5640:	4241      	lsli      	r2, r2, 1
+    5642:	4322      	lsli      	r1, r3, 2
+    5644:	6098      	addu      	r2, r6
+    5646:	6050      	addu      	r1, r4
+    5648:	8a40      	ld.h      	r2, (r2, 0x0)
+    564a:	91f2      	ld.w      	r7, (r1, 0x48)
+    564c:	4254      	lsli      	r2, r2, 20
+    564e:	6c9c      	or      	r2, r7
+    5650:	2300      	addi      	r3, 1
+    5652:	b152      	st.w      	r2, (r1, 0x48)
+    5654:	74cc      	zextb      	r3, r3
+    5656:	07ee      	br      	0x5632	// 5632 <TK_overflow_predict+0xc2>
+    5658:	2000006c 	.long	0x2000006c
+    565c:	20000650 	.long	0x20000650
+    5660:	20000329 	.long	0x20000329
+    5664:	2000032c 	.long	0x2000032c
+    5668:	20000332 	.long	0x20000332
+    566c:	200006e0 	.long	0x200006e0
+    5670:	20000746 	.long	0x20000746
+    5674:	20000306 	.long	0x20000306
+    5678:	200005a5 	.long	0x200005a5
+    567c:	20000058 	.long	0x20000058
+    5680:	20000673 	.long	0x20000673
+    5684:	200006ac 	.long	0x200006ac
+    5688:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+0000568c <TK_Baseline_tracking>:
+    568c:	14c4      	push      	r4-r7
+    568e:	1422      	subi      	r14, r14, 8
+    5690:	1348      	lrw      	r2, 0x200005d2	// 5830 <TK_Baseline_tracking+0x1a4>
+    5692:	8260      	ld.b      	r3, (r2, 0x0)
+    5694:	2300      	addi      	r3, 1
+    5696:	74cc      	zextb      	r3, r3
+    5698:	a260      	st.b      	r3, (r2, 0x0)
+    569a:	8260      	ld.b      	r3, (r2, 0x0)
+    569c:	1326      	lrw      	r1, 0x20000329	// 5834 <TK_Baseline_tracking+0x1a8>
+    569e:	8120      	ld.b      	r1, (r1, 0x0)
+    56a0:	644c      	cmphs      	r3, r1
+    56a2:	0cad      	bf      	0x57fc	// 57fc <TK_Baseline_tracking+0x170>
+    56a4:	3300      	movi      	r3, 0
+    56a6:	a260      	st.b      	r3, (r2, 0x0)
+    56a8:	1364      	lrw      	r3, 0x20000530	// 5838 <TK_Baseline_tracking+0x1ac>
+    56aa:	9360      	ld.w      	r3, (r3, 0x0)
+    56ac:	3b40      	cmpnei      	r3, 0
+    56ae:	08a7      	bt      	0x57fc	// 57fc <TK_Baseline_tracking+0x170>
+    56b0:	1323      	lrw      	r1, 0x2000054a	// 583c <TK_Baseline_tracking+0x1b0>
+    56b2:	6dc7      	mov      	r7, r1
+    56b4:	b820      	st.w      	r1, (r14, 0x0)
+    56b6:	3200      	movi      	r2, 0
+    56b8:	1362      	lrw      	r3, 0x20000356	// 5840 <TK_Baseline_tracking+0x1b4>
+    56ba:	1323      	lrw      	r1, 0x200004a0	// 5844 <TK_Baseline_tracking+0x1b8>
+    56bc:	4201      	lsli      	r0, r2, 1
+    56be:	9880      	ld.w      	r4, (r14, 0x0)
+    56c0:	6100      	addu      	r4, r0
+    56c2:	8c80      	ld.h      	r4, (r4, 0x0)
+    56c4:	7513      	sexth      	r4, r4
+    56c6:	3cdf      	btsti      	r4, 31
+    56c8:	0c27      	bf      	0x5716	// 5716 <TK_Baseline_tracking+0x8a>
+    56ca:	13a0      	lrw      	r5, 0x20000746	// 5848 <TK_Baseline_tracking+0x1bc>
+    56cc:	5980      	addu      	r4, r1, r0
+    56ce:	6014      	addu      	r0, r5
+    56d0:	b881      	st.w      	r4, (r14, 0x4)
+    56d2:	8c80      	ld.h      	r4, (r4, 0x0)
+    56d4:	88c0      	ld.h      	r6, (r0, 0x0)
+    56d6:	7511      	zexth      	r4, r4
+    56d8:	7599      	zexth      	r6, r6
+    56da:	8ba0      	ld.h      	r5, (r3, 0x0)
+    56dc:	611a      	subu      	r4, r6
+    56de:	6551      	cmplt      	r4, r5
+    56e0:	081b      	bt      	0x5716	// 5716 <TK_Baseline_tracking+0x8a>
+    56e2:	9881      	ld.w      	r4, (r14, 0x4)
+    56e4:	8c80      	ld.h      	r4, (r4, 0x0)
+    56e6:	8800      	ld.h      	r0, (r0, 0x0)
+    56e8:	7511      	zexth      	r4, r4
+    56ea:	7401      	zexth      	r0, r0
+    56ec:	5c01      	subu      	r0, r4, r0
+    56ee:	4581      	lsli      	r4, r5, 1
+    56f0:	6150      	addu      	r5, r4
+    56f2:	6541      	cmplt      	r0, r5
+    56f4:	0c11      	bf      	0x5716	// 5716 <TK_Baseline_tracking+0x8a>
+    56f6:	1296      	lrw      	r4, 0x20000674	// 584c <TK_Baseline_tracking+0x1c0>
+    56f8:	6108      	addu      	r4, r2
+    56fa:	8400      	ld.b      	r0, (r4, 0x0)
+    56fc:	2000      	addi      	r0, 1
+    56fe:	7400      	zextb      	r0, r0
+    5700:	a400      	st.b      	r0, (r4, 0x0)
+    5702:	1214      	lrw      	r0, 0x2000008c	// 5850 <TK_Baseline_tracking+0x1c4>
+    5704:	84a0      	ld.b      	r5, (r4, 0x0)
+    5706:	8008      	ld.b      	r0, (r0, 0x8)
+    5708:	6540      	cmphs      	r0, r5
+    570a:	0806      	bt      	0x5716	// 5716 <TK_Baseline_tracking+0x8a>
+    570c:	1212      	lrw      	r0, 0x200005b7	// 5854 <TK_Baseline_tracking+0x1c8>
+    570e:	3501      	movi      	r5, 1
+    5710:	a0a0      	st.b      	r5, (r0, 0x0)
+    5712:	3000      	movi      	r0, 0
+    5714:	a400      	st.b      	r0, (r4, 0x0)
+    5716:	4201      	lsli      	r0, r2, 1
+    5718:	5f80      	addu      	r4, r7, r0
+    571a:	8c80      	ld.h      	r4, (r4, 0x0)
+    571c:	7513      	sexth      	r4, r4
+    571e:	3c20      	cmplti      	r4, 1
+    5720:	0870      	bt      	0x5800	// 5800 <TK_Baseline_tracking+0x174>
+    5722:	128a      	lrw      	r4, 0x20000746	// 5848 <TK_Baseline_tracking+0x1bc>
+    5724:	6100      	addu      	r4, r0
+    5726:	59a0      	addu      	r5, r1, r0
+    5728:	8c80      	ld.h      	r4, (r4, 0x0)
+    572a:	8da0      	ld.h      	r5, (r5, 0x0)
+    572c:	7555      	zexth      	r5, r5
+    572e:	7511      	zexth      	r4, r4
+    5730:	6116      	subu      	r4, r5
+    5732:	8ba0      	ld.h      	r5, (r3, 0x0)
+    5734:	45a2      	lsli      	r5, r5, 2
+    5736:	6551      	cmplt      	r4, r5
+    5738:	0864      	bt      	0x5800	// 5800 <TK_Baseline_tracking+0x174>
+    573a:	1288      	lrw      	r4, 0x200005fa	// 5858 <TK_Baseline_tracking+0x1cc>
+    573c:	6108      	addu      	r4, r2
+    573e:	84a0      	ld.b      	r5, (r4, 0x0)
+    5740:	2500      	addi      	r5, 1
+    5742:	7554      	zextb      	r5, r5
+    5744:	a4a0      	st.b      	r5, (r4, 0x0)
+    5746:	12a3      	lrw      	r5, 0x2000008c	// 5850 <TK_Baseline_tracking+0x1c4>
+    5748:	84c0      	ld.b      	r6, (r4, 0x0)
+    574a:	85a9      	ld.b      	r5, (r5, 0x9)
+    574c:	6594      	cmphs      	r5, r6
+    574e:	0806      	bt      	0x575a	// 575a <TK_Baseline_tracking+0xce>
+    5750:	12a1      	lrw      	r5, 0x200005b7	// 5854 <TK_Baseline_tracking+0x1c8>
+    5752:	3601      	movi      	r6, 1
+    5754:	a5c0      	st.b      	r6, (r5, 0x0)
+    5756:	3500      	movi      	r5, 0
+    5758:	a4a0      	st.b      	r5, (r4, 0x0)
+    575a:	5f80      	addu      	r4, r7, r0
+    575c:	8c80      	ld.h      	r4, (r4, 0x0)
+    575e:	7513      	sexth      	r4, r4
+    5760:	3cdf      	btsti      	r4, 31
+    5762:	0c10      	bf      	0x5782	// 5782 <TK_Baseline_tracking+0xf6>
+    5764:	11d9      	lrw      	r6, 0x20000746	// 5848 <TK_Baseline_tracking+0x1bc>
+    5766:	59a0      	addu      	r5, r1, r0
+    5768:	6180      	addu      	r6, r0
+    576a:	8d80      	ld.h      	r4, (r5, 0x0)
+    576c:	8ec0      	ld.h      	r6, (r6, 0x0)
+    576e:	7599      	zexth      	r6, r6
+    5770:	7511      	zexth      	r4, r4
+    5772:	611a      	subu      	r4, r6
+    5774:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5776:	6591      	cmplt      	r4, r6
+    5778:	0c05      	bf      	0x5782	// 5782 <TK_Baseline_tracking+0xf6>
+    577a:	8d80      	ld.h      	r4, (r5, 0x0)
+    577c:	2c00      	subi      	r4, 1
+    577e:	7511      	zexth      	r4, r4
+    5780:	ad80      	st.h      	r4, (r5, 0x0)
+    5782:	5f80      	addu      	r4, r7, r0
+    5784:	8c80      	ld.h      	r4, (r4, 0x0)
+    5786:	7513      	sexth      	r4, r4
+    5788:	3cdf      	btsti      	r4, 31
+    578a:	0c11      	bf      	0x57ac	// 57ac <TK_Baseline_tracking+0x120>
+    578c:	11cf      	lrw      	r6, 0x20000746	// 5848 <TK_Baseline_tracking+0x1bc>
+    578e:	59a0      	addu      	r5, r1, r0
+    5790:	6180      	addu      	r6, r0
+    5792:	8d80      	ld.h      	r4, (r5, 0x0)
+    5794:	8ec0      	ld.h      	r6, (r6, 0x0)
+    5796:	7599      	zexth      	r6, r6
+    5798:	7511      	zexth      	r4, r4
+    579a:	611a      	subu      	r4, r6
+    579c:	8bc0      	ld.h      	r6, (r3, 0x0)
+    579e:	4ec1      	lsri      	r6, r6, 1
+    57a0:	6591      	cmplt      	r4, r6
+    57a2:	0805      	bt      	0x57ac	// 57ac <TK_Baseline_tracking+0x120>
+    57a4:	8d80      	ld.h      	r4, (r5, 0x0)
+    57a6:	2c01      	subi      	r4, 2
+    57a8:	7511      	zexth      	r4, r4
+    57aa:	ad80      	st.h      	r4, (r5, 0x0)
+    57ac:	5fa0      	addu      	r5, r7, r0
+    57ae:	8d80      	ld.h      	r4, (r5, 0x0)
+    57b0:	7513      	sexth      	r4, r4
+    57b2:	3c20      	cmplti      	r4, 1
+    57b4:	080c      	bt      	0x57cc	// 57cc <TK_Baseline_tracking+0x140>
+    57b6:	8da0      	ld.h      	r5, (r5, 0x0)
+    57b8:	8b80      	ld.h      	r4, (r3, 0x0)
+    57ba:	7557      	sexth      	r5, r5
+    57bc:	4c81      	lsri      	r4, r4, 1
+    57be:	6515      	cmplt      	r5, r4
+    57c0:	0c06      	bf      	0x57cc	// 57cc <TK_Baseline_tracking+0x140>
+    57c2:	59a0      	addu      	r5, r1, r0
+    57c4:	8d80      	ld.h      	r4, (r5, 0x0)
+    57c6:	2400      	addi      	r4, 1
+    57c8:	7511      	zexth      	r4, r4
+    57ca:	ad80      	st.h      	r4, (r5, 0x0)
+    57cc:	5fa0      	addu      	r5, r7, r0
+    57ce:	8d80      	ld.h      	r4, (r5, 0x0)
+    57d0:	7513      	sexth      	r4, r4
+    57d2:	3c20      	cmplti      	r4, 1
+    57d4:	0810      	bt      	0x57f4	// 57f4 <TK_Baseline_tracking+0x168>
+    57d6:	8dc0      	ld.h      	r6, (r5, 0x0)
+    57d8:	759b      	sexth      	r6, r6
+    57da:	8b80      	ld.h      	r4, (r3, 0x0)
+    57dc:	6519      	cmplt      	r6, r4
+    57de:	0c0b      	bf      	0x57f4	// 57f4 <TK_Baseline_tracking+0x168>
+    57e0:	8da0      	ld.h      	r5, (r5, 0x0)
+    57e2:	7557      	sexth      	r5, r5
+    57e4:	4c81      	lsri      	r4, r4, 1
+    57e6:	6515      	cmplt      	r5, r4
+    57e8:	0806      	bt      	0x57f4	// 57f4 <TK_Baseline_tracking+0x168>
+    57ea:	6004      	addu      	r0, r1
+    57ec:	8880      	ld.h      	r4, (r0, 0x0)
+    57ee:	2401      	addi      	r4, 2
+    57f0:	7511      	zexth      	r4, r4
+    57f2:	a880      	st.h      	r4, (r0, 0x0)
+    57f4:	2200      	addi      	r2, 1
+    57f6:	3a51      	cmpnei      	r2, 17
+    57f8:	2301      	addi      	r3, 2
+    57fa:	0b61      	bt      	0x56bc	// 56bc <TK_Baseline_tracking+0x30>
+    57fc:	1402      	addi      	r14, r14, 8
+    57fe:	1484      	pop      	r4-r7
+    5800:	5f80      	addu      	r4, r7, r0
+    5802:	8c80      	ld.h      	r4, (r4, 0x0)
+    5804:	7513      	sexth      	r4, r4
+    5806:	3cdf      	btsti      	r4, 31
+    5808:	0fa9      	bf      	0x575a	// 575a <TK_Baseline_tracking+0xce>
+    580a:	10b0      	lrw      	r5, 0x20000746	// 5848 <TK_Baseline_tracking+0x1bc>
+    580c:	5980      	addu      	r4, r1, r0
+    580e:	6140      	addu      	r5, r0
+    5810:	8c80      	ld.h      	r4, (r4, 0x0)
+    5812:	8da0      	ld.h      	r5, (r5, 0x0)
+    5814:	7555      	zexth      	r5, r5
+    5816:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5818:	7511      	zexth      	r4, r4
+    581a:	6116      	subu      	r4, r5
+    581c:	46a1      	lsli      	r5, r6, 1
+    581e:	6158      	addu      	r5, r6
+    5820:	6551      	cmplt      	r4, r5
+    5822:	0b9c      	bt      	0x575a	// 575a <TK_Baseline_tracking+0xce>
+    5824:	108c      	lrw      	r4, 0x200005b7	// 5854 <TK_Baseline_tracking+0x1c8>
+    5826:	3501      	movi      	r5, 1
+    5828:	a4a0      	st.b      	r5, (r4, 0x0)
+    582a:	6c03      	mov      	r0, r0
+    582c:	0797      	br      	0x575a	// 575a <TK_Baseline_tracking+0xce>
+    582e:	0000      	bkpt
+    5830:	200005d2 	.long	0x200005d2
+    5834:	20000329 	.long	0x20000329
+    5838:	20000530 	.long	0x20000530
+    583c:	2000054a 	.long	0x2000054a
+    5840:	20000356 	.long	0x20000356
+    5844:	200004a0 	.long	0x200004a0
+    5848:	20000746 	.long	0x20000746
+    584c:	20000674 	.long	0x20000674
+    5850:	2000008c 	.long	0x2000008c
+    5854:	200005b7 	.long	0x200005b7
+    5858:	200005fa 	.long	0x200005fa
+
+Disassembly of section .text.TK_result_prog:
+
+0000585c <TK_result_prog>:
+    585c:	14d2      	push      	r4-r5, r15
+    585e:	1050      	lrw      	r2, 0x20000530	// 589c <TK_result_prog+0x40>
+    5860:	1090      	lrw      	r4, 0x200005d4	// 58a0 <TK_result_prog+0x44>
+    5862:	9260      	ld.w      	r3, (r2, 0x0)
+    5864:	3b40      	cmpnei      	r3, 0
+    5866:	0c02      	bf      	0x586a	// 586a <TK_result_prog+0xe>
+    5868:	9260      	ld.w      	r3, (r2, 0x0)
+    586a:	b460      	st.w      	r3, (r4, 0x0)
+    586c:	9460      	ld.w      	r3, (r4, 0x0)
+    586e:	3b40      	cmpnei      	r3, 0
+    5870:	10ad      	lrw      	r5, 0x200006a8	// 58a4 <TK_result_prog+0x48>
+    5872:	0c11      	bf      	0x5894	// 5894 <TK_result_prog+0x38>
+    5874:	9440      	ld.w      	r2, (r4, 0x0)
+    5876:	9560      	ld.w      	r3, (r5, 0x0)
+    5878:	64ca      	cmpne      	r2, r3
+    587a:	0c03      	bf      	0x5880	// 5880 <TK_result_prog+0x24>
+    587c:	9460      	ld.w      	r3, (r4, 0x0)
+    587e:	b560      	st.w      	r3, (r5, 0x0)
+    5880:	e3fffd94 	bsr      	0x53a8	// 53a8 <get_key_number>
+    5884:	1069      	lrw      	r3, 0x20000330	// 58a8 <TK_result_prog+0x4c>
+    5886:	8360      	ld.b      	r3, (r3, 0x0)
+    5888:	640c      	cmphs      	r3, r0
+    588a:	0804      	bt      	0x5892	// 5892 <TK_result_prog+0x36>
+    588c:	3300      	movi      	r3, 0
+    588e:	b460      	st.w      	r3, (r4, 0x0)
+    5890:	b560      	st.w      	r3, (r5, 0x0)
+    5892:	1492      	pop      	r4-r5, r15
+    5894:	1046      	lrw      	r2, 0x200005cc	// 58ac <TK_result_prog+0x50>
+    5896:	b560      	st.w      	r3, (r5, 0x0)
+    5898:	b260      	st.w      	r3, (r2, 0x0)
+    589a:	07fc      	br      	0x5892	// 5892 <TK_result_prog+0x36>
+    589c:	20000530 	.long	0x20000530
+    58a0:	200005d4 	.long	0x200005d4
+    58a4:	200006a8 	.long	0x200006a8
+    58a8:	20000330 	.long	0x20000330
+    58ac:	200005cc 	.long	0x200005cc
+
+Disassembly of section .text.CORETHandler:
+
+000058b0 <CORETHandler>:
+    58b0:	1460      	nie
+    58b2:	1462      	ipush
+    58b4:	14d1      	push      	r4, r15
+    58b6:	1077      	lrw      	r3, 0x20000064	// 5910 <CORETHandler+0x60>
+    58b8:	3400      	movi      	r4, 0
+    58ba:	9360      	ld.w      	r3, (r3, 0x0)
+    58bc:	b386      	st.w      	r4, (r3, 0x18)
+    58be:	1076      	lrw      	r3, 0x20000534	// 5914 <CORETHandler+0x64>
+    58c0:	8360      	ld.b      	r3, (r3, 0x0)
+    58c2:	3b41      	cmpnei      	r3, 1
+    58c4:	0820      	bt      	0x5904	// 5904 <CORETHandler+0x54>
+    58c6:	e3fffd85 	bsr      	0x53d0	// 53d0 <TK_Scan_Start>
+    58ca:	e3fffd93 	bsr      	0x53f0	// 53f0 <TK_Keymap_prog>
+    58ce:	e3fffe51 	bsr      	0x5570	// 5570 <TK_overflow_predict>
+    58d2:	e3fffedd 	bsr      	0x568c	// 568c <TK_Baseline_tracking>
+    58d6:	e3ffffc3 	bsr      	0x585c	// 585c <TK_result_prog>
+    58da:	1070      	lrw      	r3, 0x200005d4	// 5918 <CORETHandler+0x68>
+    58dc:	9360      	ld.w      	r3, (r3, 0x0)
+    58de:	3b40      	cmpnei      	r3, 0
+    58e0:	0c12      	bf      	0x5904	// 5904 <CORETHandler+0x54>
+    58e2:	106f      	lrw      	r3, 0x20000300	// 591c <CORETHandler+0x6c>
+    58e4:	9340      	ld.w      	r2, (r3, 0x0)
+    58e6:	3a40      	cmpnei      	r2, 0
+    58e8:	0c0e      	bf      	0x5904	// 5904 <CORETHandler+0x54>
+    58ea:	106e      	lrw      	r3, 0x200005cc	// 5920 <CORETHandler+0x70>
+    58ec:	3064      	movi      	r0, 100
+    58ee:	9320      	ld.w      	r1, (r3, 0x0)
+    58f0:	2100      	addi      	r1, 1
+    58f2:	b320      	st.w      	r1, (r3, 0x0)
+    58f4:	9320      	ld.w      	r1, (r3, 0x0)
+    58f6:	7c80      	mult      	r2, r0
+    58f8:	6448      	cmphs      	r2, r1
+    58fa:	0805      	bt      	0x5904	// 5904 <CORETHandler+0x54>
+    58fc:	104a      	lrw      	r2, 0x200005b7	// 5924 <CORETHandler+0x74>
+    58fe:	3101      	movi      	r1, 1
+    5900:	a220      	st.b      	r1, (r2, 0x0)
+    5902:	b380      	st.w      	r4, (r3, 0x0)
+    5904:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    5908:	9880      	ld.w      	r4, (r14, 0x0)
+    590a:	1402      	addi      	r14, r14, 8
+    590c:	1463      	ipop
+    590e:	1461      	nir
+    5910:	20000064 	.long	0x20000064
+    5914:	20000534 	.long	0x20000534
+    5918:	200005d4 	.long	0x200005d4
+    591c:	20000300 	.long	0x20000300
+    5920:	200005cc 	.long	0x200005cc
+    5924:	200005b7 	.long	0x200005b7
+
+Disassembly of section .text.std_clk_calib:
+
+00005928 <std_clk_calib>:
+    5928:	14d4      	push      	r4-r7, r15
+    592a:	142d      	subi      	r14, r14, 52
+    592c:	3201      	movi      	r2, 1
+    592e:	03ce      	lrw      	r6, 0x2000005c	// 5b70 <std_clk_calib+0x248>
+    5930:	6cc3      	mov      	r3, r0
+    5932:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    5936:	9640      	ld.w      	r2, (r6, 0x0)
+    5938:	9247      	ld.w      	r2, (r2, 0x1c)
+    593a:	7488      	zextb      	r2, r2
+    593c:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    5940:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5944:	3a40      	cmpnei      	r2, 0
+    5946:	0c08      	bf      	0x5956	// 5956 <std_clk_calib+0x2e>
+    5948:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    594c:	3a42      	cmpnei      	r2, 2
+    594e:	0c04      	bf      	0x5956	// 5956 <std_clk_calib+0x2e>
+    5950:	3000      	movi      	r0, 0
+    5952:	140d      	addi      	r14, r14, 52
+    5954:	1494      	pop      	r4-r7, r15
+    5956:	0397      	lrw      	r4, 0x2000000c	// 5b74 <std_clk_calib+0x24c>
+    5958:	3209      	movi      	r2, 9
+    595a:	9400      	ld.w      	r0, (r4, 0x0)
+    595c:	3b40      	cmpnei      	r3, 0
+    595e:	b041      	st.w      	r2, (r0, 0x4)
+    5960:	0857      	bt      	0x5a0e	// 5a0e <std_clk_calib+0xe6>
+    5962:	3307      	movi      	r3, 7
+    5964:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5968:	037b      	lrw      	r3, 0x2dc6c00	// 5b78 <std_clk_calib+0x250>
+    596a:	b863      	st.w      	r3, (r14, 0xc)
+    596c:	3380      	movi      	r3, 128
+    596e:	4362      	lsli      	r3, r3, 2
+    5970:	b867      	st.w      	r3, (r14, 0x1c)
+    5972:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    5976:	74cc      	zextb      	r3, r3
+    5978:	b062      	st.w      	r3, (r0, 0x8)
+    597a:	037e      	lrw      	r3, 0xffff	// 5b7c <std_clk_calib+0x254>
+    597c:	b063      	st.w      	r3, (r0, 0xc)
+    597e:	3201      	movi      	r2, 1
+    5980:	3101      	movi      	r1, 1
+    5982:	03bf      	lrw      	r5, 0x20000014	// 5b80 <std_clk_calib+0x258>
+    5984:	e3ffed56 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+    5988:	95e0      	ld.w      	r7, (r5, 0x0)
+    598a:	137f      	lrw      	r3, 0xbe9c0005	// 5b84 <std_clk_calib+0x25c>
+    598c:	b760      	st.w      	r3, (r7, 0x0)
+    598e:	135f      	lrw      	r2, 0x30010	// 5b88 <std_clk_calib+0x260>
+    5990:	3300      	movi      	r3, 0
+    5992:	b762      	st.w      	r3, (r7, 0x8)
+    5994:	b743      	st.w      	r2, (r7, 0xc)
+    5996:	32d8      	movi      	r2, 216
+    5998:	b745      	st.w      	r2, (r7, 0x14)
+    599a:	974f      	ld.w      	r2, (r7, 0x3c)
+    599c:	3aa2      	bseti      	r2, 2
+    599e:	b74f      	st.w      	r2, (r7, 0x3c)
+    59a0:	9803      	ld.w      	r0, (r14, 0xc)
+    59a2:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    59a6:	327d      	movi      	r2, 125
+    59a8:	2100      	addi      	r1, 1
+    59aa:	7c48      	mult      	r1, r2
+    59ac:	b861      	st.w      	r3, (r14, 0x4)
+    59ae:	e3fff535 	bsr      	0x4418	// 4418 <__udivsi3>
+    59b2:	b804      	st.w      	r0, (r14, 0x10)
+    59b4:	32fa      	movi      	r2, 250
+    59b6:	9824      	ld.w      	r1, (r14, 0x10)
+    59b8:	4242      	lsli      	r2, r2, 2
+    59ba:	6448      	cmphs      	r2, r1
+    59bc:	0bca      	bt      	0x5950	// 5950 <std_clk_calib+0x28>
+    59be:	9844      	ld.w      	r2, (r14, 0x10)
+    59c0:	3178      	movi      	r1, 120
+    59c2:	9804      	ld.w      	r0, (r14, 0x10)
+    59c4:	b840      	st.w      	r2, (r14, 0x0)
+    59c6:	e3fff529 	bsr      	0x4418	// 4418 <__udivsi3>
+    59ca:	9840      	ld.w      	r2, (r14, 0x0)
+    59cc:	6082      	subu      	r2, r0
+    59ce:	b845      	st.w      	r2, (r14, 0x14)
+    59d0:	9804      	ld.w      	r0, (r14, 0x10)
+    59d2:	3178      	movi      	r1, 120
+    59d4:	9844      	ld.w      	r2, (r14, 0x10)
+    59d6:	b840      	st.w      	r2, (r14, 0x0)
+    59d8:	e3fff520 	bsr      	0x4418	// 4418 <__udivsi3>
+    59dc:	9840      	ld.w      	r2, (r14, 0x0)
+    59de:	6008      	addu      	r0, r2
+    59e0:	b806      	st.w      	r0, (r14, 0x18)
+    59e2:	c0807020 	psrclr      	ie
+    59e6:	9640      	ld.w      	r2, (r6, 0x0)
+    59e8:	9254      	ld.w      	r2, (r2, 0x50)
+    59ea:	b848      	st.w      	r2, (r14, 0x20)
+    59ec:	9861      	ld.w      	r3, (r14, 0x4)
+    59ee:	9440      	ld.w      	r2, (r4, 0x0)
+    59f0:	b260      	st.w      	r3, (r2, 0x0)
+    59f2:	b761      	st.w      	r3, (r7, 0x4)
+    59f4:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    59f8:	3b40      	cmpnei      	r3, 0
+    59fa:	083e      	bt      	0x5a76	// 5a76 <std_clk_calib+0x14e>
+    59fc:	e3ffeccc 	bsr      	0x3394	// 3394 <LPT_Soft_Reset>
+    5a00:	9400      	ld.w      	r0, (r4, 0x0)
+    5a02:	e3ffeced 	bsr      	0x33dc	// 33dc <BT_Soft_Reset>
+    5a06:	c1807420 	psrset      	ee, ie
+    5a0a:	3001      	movi      	r0, 1
+    5a0c:	07a3      	br      	0x5952	// 5952 <std_clk_calib+0x2a>
+    5a0e:	3b41      	cmpnei      	r3, 1
+    5a10:	0806      	bt      	0x5a1c	// 5a1c <std_clk_calib+0xf4>
+    5a12:	3303      	movi      	r3, 3
+    5a14:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a18:	127d      	lrw      	r3, 0x16e3600	// 5b8c <std_clk_calib+0x264>
+    5a1a:	07a8      	br      	0x596a	// 596a <std_clk_calib+0x42>
+    5a1c:	3b42      	cmpnei      	r3, 2
+    5a1e:	0806      	bt      	0x5a2a	// 5a2a <std_clk_calib+0x102>
+    5a20:	3301      	movi      	r3, 1
+    5a22:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a26:	127b      	lrw      	r3, 0xb71b00	// 5b90 <std_clk_calib+0x268>
+    5a28:	07a1      	br      	0x596a	// 596a <std_clk_calib+0x42>
+    5a2a:	3b43      	cmpnei      	r3, 3
+    5a2c:	0806      	bt      	0x5a38	// 5a38 <std_clk_calib+0x110>
+    5a2e:	3300      	movi      	r3, 0
+    5a30:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a34:	1278      	lrw      	r3, 0x5b8d80	// 5b94 <std_clk_calib+0x26c>
+    5a36:	079a      	br      	0x596a	// 596a <std_clk_calib+0x42>
+    5a38:	3b44      	cmpnei      	r3, 4
+    5a3a:	0809      	bt      	0x5a4c	// 5a4c <std_clk_calib+0x124>
+    5a3c:	3300      	movi      	r3, 0
+    5a3e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a42:	1276      	lrw      	r3, 0x54c720	// 5b98 <std_clk_calib+0x270>
+    5a44:	b863      	st.w      	r3, (r14, 0xc)
+    5a46:	3380      	movi      	r3, 128
+    5a48:	4369      	lsli      	r3, r3, 9
+    5a4a:	0793      	br      	0x5970	// 5970 <std_clk_calib+0x48>
+    5a4c:	3b45      	cmpnei      	r3, 5
+    5a4e:	0806      	bt      	0x5a5a	// 5a5a <std_clk_calib+0x132>
+    5a50:	3300      	movi      	r3, 0
+    5a52:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a56:	1272      	lrw      	r3, 0x3ffed0	// 5b9c <std_clk_calib+0x274>
+    5a58:	07f6      	br      	0x5a44	// 5a44 <std_clk_calib+0x11c>
+    5a5a:	3b46      	cmpnei      	r3, 6
+    5a5c:	0806      	bt      	0x5a68	// 5a68 <std_clk_calib+0x140>
+    5a5e:	3300      	movi      	r3, 0
+    5a60:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a64:	126f      	lrw      	r3, 0x1fff68	// 5ba0 <std_clk_calib+0x278>
+    5a66:	07ef      	br      	0x5a44	// 5a44 <std_clk_calib+0x11c>
+    5a68:	3b47      	cmpnei      	r3, 7
+    5a6a:	0b84      	bt      	0x5972	// 5972 <std_clk_calib+0x4a>
+    5a6c:	3300      	movi      	r3, 0
+    5a6e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5a72:	126d      	lrw      	r3, 0x1ffb8	// 5ba4 <std_clk_calib+0x27c>
+    5a74:	07e8      	br      	0x5a44	// 5a44 <std_clk_calib+0x11c>
+    5a76:	9560      	ld.w      	r3, (r5, 0x0)
+    5a78:	3101      	movi      	r1, 1
+    5a7a:	9440      	ld.w      	r2, (r4, 0x0)
+    5a7c:	b321      	st.w      	r1, (r3, 0x4)
+    5a7e:	b220      	st.w      	r1, (r2, 0x0)
+    5a80:	3100      	movi      	r1, 0
+    5a82:	b327      	st.w      	r1, (r3, 0x1c)
+    5a84:	3004      	movi      	r0, 4
+    5a86:	b225      	st.w      	r1, (r2, 0x14)
+    5a88:	932e      	ld.w      	r1, (r3, 0x38)
+    5a8a:	6840      	and      	r1, r0
+    5a8c:	3940      	cmpnei      	r1, 0
+    5a8e:	0ffd      	bf      	0x5a88	// 5a88 <std_clk_calib+0x160>
+    5a90:	9225      	ld.w      	r1, (r2, 0x14)
+    5a92:	b82a      	st.w      	r1, (r14, 0x28)
+    5a94:	3100      	movi      	r1, 0
+    5a96:	b310      	st.w      	r0, (r3, 0x40)
+    5a98:	b327      	st.w      	r1, (r3, 0x1c)
+    5a9a:	3004      	movi      	r0, 4
+    5a9c:	b225      	st.w      	r1, (r2, 0x14)
+    5a9e:	932e      	ld.w      	r1, (r3, 0x38)
+    5aa0:	6840      	and      	r1, r0
+    5aa2:	3940      	cmpnei      	r1, 0
+    5aa4:	0ffd      	bf      	0x5a9e	// 5a9e <std_clk_calib+0x176>
+    5aa6:	9225      	ld.w      	r1, (r2, 0x14)
+    5aa8:	b82b      	st.w      	r1, (r14, 0x2c)
+    5aaa:	3100      	movi      	r1, 0
+    5aac:	b310      	st.w      	r0, (r3, 0x40)
+    5aae:	b327      	st.w      	r1, (r3, 0x1c)
+    5ab0:	3004      	movi      	r0, 4
+    5ab2:	b225      	st.w      	r1, (r2, 0x14)
+    5ab4:	932e      	ld.w      	r1, (r3, 0x38)
+    5ab6:	6840      	and      	r1, r0
+    5ab8:	3940      	cmpnei      	r1, 0
+    5aba:	0ffd      	bf      	0x5ab4	// 5ab4 <std_clk_calib+0x18c>
+    5abc:	9225      	ld.w      	r1, (r2, 0x14)
+    5abe:	b82c      	st.w      	r1, (r14, 0x30)
+    5ac0:	b310      	st.w      	r0, (r3, 0x40)
+    5ac2:	982b      	ld.w      	r1, (r14, 0x2c)
+    5ac4:	980c      	ld.w      	r0, (r14, 0x30)
+    5ac6:	6040      	addu      	r1, r0
+    5ac8:	b829      	st.w      	r1, (r14, 0x24)
+    5aca:	9829      	ld.w      	r1, (r14, 0x24)
+    5acc:	4921      	lsri      	r1, r1, 1
+    5ace:	b829      	st.w      	r1, (r14, 0x24)
+    5ad0:	3100      	movi      	r1, 0
+    5ad2:	b321      	st.w      	r1, (r3, 0x4)
+    5ad4:	b220      	st.w      	r1, (r2, 0x0)
+    5ad6:	b327      	st.w      	r1, (r3, 0x1c)
+    5ad8:	b225      	st.w      	r1, (r2, 0x14)
+    5ada:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    5ade:	3b42      	cmpnei      	r3, 2
+    5ae0:	9849      	ld.w      	r2, (r14, 0x24)
+    5ae2:	082c      	bt      	0x5b3a	// 5b3a <std_clk_calib+0x212>
+    5ae4:	1171      	lrw      	r3, 0x7ff	// 5ba8 <std_clk_calib+0x280>
+    5ae6:	648c      	cmphs      	r3, r2
+    5ae8:	0c03      	bf      	0x5aee	// 5aee <std_clk_calib+0x1c6>
+    5aea:	3300      	movi      	r3, 0
+    5aec:	040f      	br      	0x5b0a	// 5b0a <std_clk_calib+0x1e2>
+    5aee:	9849      	ld.w      	r2, (r14, 0x24)
+    5af0:	9866      	ld.w      	r3, (r14, 0x18)
+    5af2:	648c      	cmphs      	r3, r2
+    5af4:	080e      	bt      	0x5b10	// 5b10 <std_clk_calib+0x1e8>
+    5af6:	9868      	ld.w      	r3, (r14, 0x20)
+    5af8:	9847      	ld.w      	r2, (r14, 0x1c)
+    5afa:	60ca      	subu      	r3, r2
+    5afc:	b868      	st.w      	r3, (r14, 0x20)
+    5afe:	32fe      	movi      	r2, 254
+    5b00:	9868      	ld.w      	r3, (r14, 0x20)
+    5b02:	4248      	lsli      	r2, r2, 8
+    5b04:	68c8      	and      	r3, r2
+    5b06:	3b40      	cmpnei      	r3, 0
+    5b08:	0812      	bt      	0x5b2c	// 5b2c <std_clk_calib+0x204>
+    5b0a:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5b0e:	0721      	br      	0x5950	// 5950 <std_clk_calib+0x28>
+    5b10:	9849      	ld.w      	r2, (r14, 0x24)
+    5b12:	9865      	ld.w      	r3, (r14, 0x14)
+    5b14:	64c8      	cmphs      	r2, r3
+    5b16:	0829      	bt      	0x5b68	// 5b68 <std_clk_calib+0x240>
+    5b18:	9868      	ld.w      	r3, (r14, 0x20)
+    5b1a:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b1c:	60c8      	addu      	r3, r2
+    5b1e:	b868      	st.w      	r3, (r14, 0x20)
+    5b20:	33fe      	movi      	r3, 254
+    5b22:	9848      	ld.w      	r2, (r14, 0x20)
+    5b24:	4368      	lsli      	r3, r3, 8
+    5b26:	688c      	and      	r2, r3
+    5b28:	64ca      	cmpne      	r2, r3
+    5b2a:	0fe0      	bf      	0x5aea	// 5aea <std_clk_calib+0x1c2>
+    5b2c:	9660      	ld.w      	r3, (r6, 0x0)
+    5b2e:	9848      	ld.w      	r2, (r14, 0x20)
+    5b30:	b354      	st.w      	r2, (r3, 0x50)
+    5b32:	3001      	movi      	r0, 1
+    5b34:	e3ffeeb4 	bsr      	0x389c	// 389c <delay_nms>
+    5b38:	075e      	br      	0x59f4	// 59f4 <std_clk_calib+0xcc>
+    5b3a:	9866      	ld.w      	r3, (r14, 0x18)
+    5b3c:	648c      	cmphs      	r3, r2
+    5b3e:	0809      	bt      	0x5b50	// 5b50 <std_clk_calib+0x228>
+    5b40:	9868      	ld.w      	r3, (r14, 0x20)
+    5b42:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b44:	60ca      	subu      	r3, r2
+    5b46:	b868      	st.w      	r3, (r14, 0x20)
+    5b48:	32ff      	movi      	r2, 255
+    5b4a:	9868      	ld.w      	r3, (r14, 0x20)
+    5b4c:	4250      	lsli      	r2, r2, 16
+    5b4e:	07db      	br      	0x5b04	// 5b04 <std_clk_calib+0x1dc>
+    5b50:	9849      	ld.w      	r2, (r14, 0x24)
+    5b52:	9865      	ld.w      	r3, (r14, 0x14)
+    5b54:	64c8      	cmphs      	r2, r3
+    5b56:	0809      	bt      	0x5b68	// 5b68 <std_clk_calib+0x240>
+    5b58:	9868      	ld.w      	r3, (r14, 0x20)
+    5b5a:	9847      	ld.w      	r2, (r14, 0x1c)
+    5b5c:	60c8      	addu      	r3, r2
+    5b5e:	b868      	st.w      	r3, (r14, 0x20)
+    5b60:	33ff      	movi      	r3, 255
+    5b62:	9848      	ld.w      	r2, (r14, 0x20)
+    5b64:	4370      	lsli      	r3, r3, 16
+    5b66:	07e0      	br      	0x5b26	// 5b26 <std_clk_calib+0x1fe>
+    5b68:	3300      	movi      	r3, 0
+    5b6a:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5b6e:	07e2      	br      	0x5b32	// 5b32 <std_clk_calib+0x20a>
+    5b70:	2000005c 	.long	0x2000005c
+    5b74:	2000000c 	.long	0x2000000c
+    5b78:	02dc6c00 	.long	0x02dc6c00
+    5b7c:	0000ffff 	.long	0x0000ffff
+    5b80:	20000014 	.long	0x20000014
+    5b84:	be9c0005 	.long	0xbe9c0005
+    5b88:	00030010 	.long	0x00030010
+    5b8c:	016e3600 	.long	0x016e3600
+    5b90:	00b71b00 	.long	0x00b71b00
+    5b94:	005b8d80 	.long	0x005b8d80
+    5b98:	0054c720 	.long	0x0054c720
+    5b9c:	003ffed0 	.long	0x003ffed0
+    5ba0:	001fff68 	.long	0x001fff68
+    5ba4:	0001ffb8 	.long	0x0001ffb8
+    5ba8:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/TRF_TM_CR_V02_20241030.map b/Source/Lst/TRF_TM_CR_V02_20241030.map
new file mode 100644
index 0000000..fea1b4e
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V02_20241030.map
@@ -0,0 +1,2416 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          327412 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         161
+  Section header string table index: 158
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 002f12 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00002f14 003f14 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00002f4c 003f4c 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00002fc0 003fc0 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        0000300c 00400c 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        0000303c 00403c 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        000030c4 0040c4 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        000030ec 0040ec 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00003128 004128 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        0000313c 00413c 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00003154 004154 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00003174 004174 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00003190 004190 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        000031ac 0041ac 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        000031ec 0041ec 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        000031f8 0041f8 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        0000321c 00421c 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        0000324c 00424c 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        0000332c 00432c 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00003340 004340 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        0000334e 00434e 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00003356 004356 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        0000335e 00435e 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00003374 004374 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00003384 004384 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00003394 004394 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        000033a8 0043a8 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        000033b8 0043b8 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        000033d4 0043d4 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        000033dc 0043dc 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        000033e6 0043e6 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        000033fe 0043fe 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        0000342a 00442a 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00003430 004430 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00003444 004444 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00003454 004454 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        000034f4 0044f4 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00003508 004508 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        0000354c 00454c 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        00003560 004560 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00003614 004614 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00003624 004624 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00003634 004634 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        00003650 004650 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        00003668 004668 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        00003680 004680 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        00003698 004698 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000036b4 0046b4 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        000036d0 0046d0 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000037bc 0047bc 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        000037cc 0047cc 000010 00  AX  0   0  4
+  [52] .text.UARTTransmi PROGBITS        000037dc 0047dc 00001e 00  AX  0   0  2
+  [53] .text.EPT_Stop    PROGBITS        000037fc 0047fc 000028 00  AX  0   0  4
+  [54] .text.startup.mai PROGBITS        00003824 004824 000078 00  AX  0   0  4
+  [55] .text.delay_nms   PROGBITS        0000389c 00489c 00002c 00  AX  0   0  2
+  [56] .text.GPT0_CONFIG PROGBITS        000038c8 0048c8 000094 00  AX  0   0  4
+  [57] .text.BT_CONFIG   PROGBITS        0000395c 00495c 000060 00  AX  0   0  4
+  [58] .text.SYSCON_CONF PROGBITS        000039bc 0049bc 000062 00  AX  0   0  2
+  [59] .text.APT32F102_i PROGBITS        00003a20 004a20 000050 00  AX  0   0  4
+  [60] .text.SYSCONIntHa PROGBITS        00003a70 004a70 0000f0 00  AX  0   0  4
+  [61] .text.IFCIntHandl PROGBITS        00003b60 004b60 000068 00  AX  0   0  4
+  [62] .text.ADCIntHandl PROGBITS        00003bc8 004bc8 000068 00  AX  0   0  4
+  [63] .text.EPT0IntHand PROGBITS        00003c30 004c30 0001ac 00  AX  0   0  4
+  [64] .text.WWDTHandler PROGBITS        00003ddc 004ddc 000034 00  AX  0   0  4
+  [65] .text.GPT0IntHand PROGBITS        00003e10 004e10 000080 00  AX  0   0  4
+  [66] .text.RTCIntHandl PROGBITS        00003e90 004e90 000070 00  AX  0   0  4
+  [67] .text.UART0IntHan PROGBITS        00003f00 004f00 00003c 00  AX  0   0  4
+  [68] .text.UART1IntHan PROGBITS        00003f3c 004f3c 00003c 00  AX  0   0  4
+  [69] .text.UART2IntHan PROGBITS        00003f78 004f78 000094 00  AX  0   0  4
+  [70] .text.SPI0IntHand PROGBITS        0000400c 00500c 0000e8 00  AX  0   0  4
+  [71] .text.SIO0IntHand PROGBITS        000040f4 0050f4 000054 00  AX  0   0  4
+  [72] .text.EXI0IntHand PROGBITS        00004148 005148 000030 00  AX  0   0  4
+  [73] .text.EXI1IntHand PROGBITS        00004178 005178 000030 00  AX  0   0  4
+  [74] .text.EXI2to3IntH PROGBITS        000041a8 0051a8 000048 00  AX  0   0  4
+  [75] .text.EXI4to9IntH PROGBITS        000041f0 0051f0 00005c 00  AX  0   0  4
+  [76] .text.EXI10to15In PROGBITS        0000424c 00524c 000060 00  AX  0   0  4
+  [77] .text.LPTIntHandl PROGBITS        000042ac 0052ac 000034 00  AX  0   0  4
+  [78] .text.BT0IntHandl PROGBITS        000042e0 0052e0 00004c 00  AX  0   0  4
+  [79] .text.BT1IntHandl PROGBITS        0000432c 00532c 000064 00  AX  0   0  4
+  [80] .text.PriviledgeV PROGBITS        00004390 005390 000002 00  AX  0   0  2
+  [81] .text.PendTrapHan PROGBITS        00004392 005392 000008 00  AX  0   0  2
+  [82] .text.Trap3Handle PROGBITS        0000439a 00539a 000008 00  AX  0   0  2
+  [83] .text.Trap2Handle PROGBITS        000043a2 0053a2 000008 00  AX  0   0  2
+  [84] .text.Trap1Handle PROGBITS        000043aa 0053aa 000008 00  AX  0   0  2
+  [85] .text.Trap0Handle PROGBITS        000043b2 0053b2 000008 00  AX  0   0  2
+  [86] .text.UnrecExecpH PROGBITS        000043ba 0053ba 000008 00  AX  0   0  2
+  [87] .text.BreakPointH PROGBITS        000043c2 0053c2 000008 00  AX  0   0  2
+  [88] .text.AccessErrHa PROGBITS        000043ca 0053ca 000008 00  AX  0   0  2
+  [89] .text.IllegalInst PROGBITS        000043d2 0053d2 000008 00  AX  0   0  2
+  [90] .text.MisalignedH PROGBITS        000043da 0053da 000008 00  AX  0   0  2
+  [91] .text.CNTAIntHand PROGBITS        000043e2 0053e2 000008 00  AX  0   0  2
+  [92] .text.I2CIntHandl PROGBITS        000043ea 0053ea 000008 00  AX  0   0  2
+  [93] .text.__divsi3    PROGBITS        000043f4 0053f4 000024 00  AX  0   0  4
+  [94] .text.__udivsi3   PROGBITS        00004418 005418 000024 00  AX  0   0  4
+  [95] .text.__modsi3    PROGBITS        0000443c 00543c 000024 00  AX  0   0  4
+  [96] .text.__umodsi3   PROGBITS        00004460 005460 000024 00  AX  0   0  4
+  [97] .text.CK_CPU_EnAl PROGBITS        00004484 005484 000006 00  AX  0   0  2
+  [98] .text.UARTx_Init  PROGBITS        0000448c 00548c 0000d8 00  AX  0   0  4
+  [99] .text.UART2_RecvI PROGBITS        00004564 005564 000064 00  AX  0   0  4
+  [100] .text.Dbg_Println PROGBITS        000045c8 0055c8 000098 00  AX  0   0  4
+  [101] .text.RC522_Delay PROGBITS        00004660 005660 000012 00  AX  0   0  2
+  [102] .text.RC522_ReadW PROGBITS        00004674 005674 000054 00  AX  0   0  4
+  [103] .text.RC522_ReadR PROGBITS        000046c8 0056c8 000038 00  AX  0   0  4
+  [104] .text.RC522_Write PROGBITS        00004700 005700 000030 00  AX  0   0  4
+  [105] .text.RC522_PcdRe PROGBITS        00004730 005730 00004c 00  AX  0   0  2
+  [106] .text.RC522_SetBi PROGBITS        0000477c 00577c 000018 00  AX  0   0  2
+  [107] .text.RC522_PcdAn PROGBITS        00004794 005794 00001a 00  AX  0   0  2
+  [108] .text.RC522_Clear PROGBITS        000047ae 0057ae 000016 00  AX  0   0  2
+  [109] .text.RC522_PcdAn PROGBITS        000047c4 0057c4 00000c 00  AX  0   0  2
+  [110] .text.RC522_Reset PROGBITS        000047d0 0057d0 000016 00  AX  0   0  2
+  [111] .text.M500PcdConf PROGBITS        000047e6 0057e6 00007e 00  AX  0   0  2
+  [112] .text.RC522_Init  PROGBITS        00004864 005864 000098 00  AX  0   0  4
+  [113] .text.RC522_PcdCo PROGBITS        000048fc 0058fc 000170 00  AX  0   0  4
+  [114] .text.RC522_PcdRe PROGBITS        00004a6c 005a6c 000088 00  AX  0   0  4
+  [115] .text.RC522_PcdAn PROGBITS        00004af4 005af4 000074 00  AX  0   0  2
+  [116] .text.Card_Read_T PROGBITS        00004b68 005b68 0000b0 00  AX  0   0  4
+  [117] .text.Detect_SPI_ PROGBITS        00004c18 005c18 00009c 00  AX  0   0  4
+  [118] .text.RLY_Light_C PROGBITS        00004cb4 005cb4 000050 00  AX  0   0  4
+  [119] .text.KEY1_LONG_P PROGBITS        00004d04 005d04 000068 00  AX  0   0  4
+  [120] .text.LogicCtrl_I PROGBITS        00004d6c 005d6c 00003c 00  AX  0   0  4
+  [121] .text.LogicCtrl_T PROGBITS        00004da8 005da8 0000f0 00  AX  0   0  4
+  [122] .text.LogicCtrl_N PROGBITS        00004e98 005e98 000088 00  AX  0   0  4
+  [123] .text.LogicCtrl_N PROGBITS        00004f20 005f20 0000c0 00  AX  0   0  4
+  [124] .text.BackLight_T PROGBITS        00004fe0 005fe0 000024 00  AX  0   0  4
+  [125] .text.Detect_WIFI PROGBITS        00005004 006004 000094 00  AX  0   0  4
+  [126] .text.Led_Task    PROGBITS        00005098 006098 000078 00  AX  0   0  4
+  [127] .text.button_init PROGBITS        00005110 006110 00003a 00  AX  0   0  2
+  [128] .text.button_atta PROGBITS        0000514a 00614a 00000a 00  AX  0   0  2
+  [129] .text.button_hand PROGBITS        00005154 006154 000120 00  AX  0   0  2
+  [130] .text.button_star PROGBITS        00005274 006274 000024 00  AX  0   0  4
+  [131] .text.button_tick PROGBITS        00005298 006298 00001c 00  AX  0   0  4
+  [132] .text.read_button PROGBITS        000052b4 0062b4 000014 00  AX  0   0  4
+  [133] .text.TK_Sampling PROGBITS        000052c8 0062c8 000058 00  AX  0   0  4
+  [134] .text.TKEYIntHand PROGBITS        00005320 006320 000088 00  AX  0   0  4
+  [135] .text.get_key_num PROGBITS        000053a8 0063a8 000028 00  AX  0   0  4
+  [136] .text.TK_Scan_Sta PROGBITS        000053d0 0063d0 000020 00  AX  0   0  4
+  [137] .text.TK_Keymap_p PROGBITS        000053f0 0063f0 000180 00  AX  0   0  4
+  [138] .text.TK_overflow PROGBITS        00005570 006570 00011c 00  AX  0   0  4
+  [139] .text.TK_Baseline PROGBITS        0000568c 00668c 0001d0 00  AX  0   0  4
+  [140] .text.TK_result_p PROGBITS        0000585c 00685c 000054 00  AX  0   0  4
+  [141] .text.CORETHandle PROGBITS        000058b0 0068b0 000078 00  AX  0   0  4
+  [142] .text.std_clk_cal PROGBITS        00005928 006928 000284 00  AX  0   0  4
+  [143] .RomCode          PROGBITS        00005bac 0080a0 000000 00   W  0   0  1
+  [144] .rodata           PROGBITS        00005bac 006bac 000cd0 00   A  0   0  4
+  [145] .data             PROGBITS        20000000 008000 0000a0 00  WA  0   0  4
+  [146] .bss              NOBITS          200000a0 0080a0 0006d0 00  WA  0   0  4
+  [147] .csky.attributes  CSKY_ATTRIBUTES 00000000 0080a0 000022 00      0   0  1
+  [148] .comment          PROGBITS        00000000 0080c2 000042 01  MS  0   0  1
+  [149] .csky_stack_size  PROGBITS        00000000 008110 0008cc 00      0   0 16
+  [150] .debug_line       PROGBITS        00000000 0089dc 003a15 00      0   0  1
+  [151] .debug_info       PROGBITS        00000000 00c3f1 02bf85 00      0   0  1
+  [152] .debug_abbrev     PROGBITS        00000000 038376 0028cf 00      0   0  1
+  [153] .debug_aranges    PROGBITS        00000000 03ac48 000cc8 00      0   0  8
+  [154] .debug_ranges     PROGBITS        00000000 03b910 000bf8 00      0   0  1
+  [155] .debug_str        PROGBITS        00000000 03c508 0088c3 01  MS  0   0  1
+  [156] .debug_frame      PROGBITS        00000000 044dcc 001e14 00      0   0  4
+  [157] .debug_loc        PROGBITS        00000000 046be0 002f3e 00      0   0  1
+  [158] .shstrtab         STRTAB          00000000 04f1ff 000cf3 00      0   0  1
+  [159] .symtab           SYMTAB          00000000 049b20 0041a0 10     160 719  4
+  [160] .strtab           STRTAB          00000000 04dcc0 00153f 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x0687c 0x0687c R E 0x1000
+  LOAD           0x008000 0x20000000 0x0000687c 0x000a0 0x00770 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__modsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_Reset .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.Detect_SPI_task .text.RLY_Light_Ctrl .text.KEY1_LONG_PRESS_RELEASE_Handler .text.LogicCtrl_Init .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.BackLight_Task .text.Detect_WIFI_Task .text.Led_Task .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__modsi3) for __modsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_rc522.o(.text.RC522_Reset) for RC522_Reset
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) for Detect_SPI_task
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.BackLight_Task) for BackLight_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) for Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	__dtostr.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	__dtostr.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	__dtostr.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	__dtostr.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	__dtostr.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_eq_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_lt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_eq_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_lt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to snprintf_required.o(.text) for __cskyvprintfsnprintf
+	snprintf_required.o(.text) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	vsnprintf_required.o(.text) refers to memcpy_fast.o(.text) for memcpy
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	vsnprintf_required.o(.text) refers to __v2_printfDFHLlMOPpSSsWp.o(.text) for __v2_printf
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _udivdi3.o(.text) for __udivdi3
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _umoddi3.o(.text) for __umoddi3
+	__dtostr.o(.text) refers to __dtostr.o(.text) for __GI___dtostr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to __dtostr.o(.text) for __dtostr
+	__dtostr.o(.text) refers to __isnan.o(.text) for __isnan
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strlen_fast.o(.text) for strlen
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strcpy_fast.o(.text) for strcpy
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strchr.o(.text) for strchr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strerror.o(.text) for strerror
+	__dtostr.o(.text) refers to __isinf.o(.text) for __isinf
+	__dtostr.o(.text) refers to _eq_df.o(.text) for __eqdf2
+	__dtostr.o(.text) refers to _lt_df.o(.text) for __ltdf2
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (491 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2911 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3105 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3422 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3167 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4135 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3538 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3654 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
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+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4854 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
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+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
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+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4962 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
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+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7611 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2860 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
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+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text.CK_CPU_DisAllNormalIrq(Obj/drivers_apt32f102_ck801.o), (6 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
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+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (136 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (140 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (156 bytes).
+	Removing .text.UART1_TASK(Obj/SYSTEM_uart.o), (188 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (188 bytes).
+	Removing .text(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_rc522.o), (0 bytes).
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+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdSelect(Obj/SYSTEM_rc522.o), (106 bytes).
+	Removing .text.RC522_PcdAuthState(Obj/SYSTEM_rc522.o), (88 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.Debounce_Task(Obj/SYSTEM_logic_ctrl.o), (2 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text.Ctrl_Led_Mode(Obj/SYSTEM_logic_ctrl.o), (2 bytes).
+	Removing .text(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_button.o), (0 bytes).
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+	Removing .text.button_stop(Obj/SYSTEM_button.o), (32 bytes).
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+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
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+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
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+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
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+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
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+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
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+	Removing .bss(pow.o), (0 bytes).
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+	Removing .bss(_csky_case_uqi.o), (0 bytes).
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+	Removing .bss(_addsub_df.o), (0 bytes).
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+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
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+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
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+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(snprintf_required.o), (0 bytes).
+	Removing .bss(snprintf_required.o), (0 bytes).
+	Removing .data(vsnprintf_required.o), (0 bytes).
+	Removing .bss(vsnprintf_required.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+	Removing .data(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
+	Removing .bss(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
+	Removing .data(_udivdi3.o), (0 bytes).
+	Removing .bss(_udivdi3.o), (0 bytes).
+	Removing .data(_umoddi3.o), (0 bytes).
+	Removing .bss(_umoddi3.o), (0 bytes).
+	Removing .text(minilibc_init.o), (60 bytes).
+	Removing .data(minilibc_init.o), (0 bytes).
+	Removing .bss(minilibc_init.o), (0 bytes).
+	Removing .text(critical.o), (16 bytes).
+	Removing .data(critical.o), (0 bytes).
+	Removing .bss(critical.o), (0 bytes).
+	Removing .comment(critical.o), (67 bytes).
+	Removing .csky.attributes(critical.o), (32 bytes).
+	Removing .data(__dtostr.o), (0 bytes).
+	Removing .bss(__dtostr.o), (0 bytes).
+	Removing .data(__isnan.o), (0 bytes).
+	Removing .bss(__isnan.o), (0 bytes).
+	Removing .text(stdinit.o), (0 bytes).
+	Removing .data(stdinit.o), (96 bytes).
+	Removing .bss(stdinit.o), (0 bytes).
+	Removing .comment(stdinit.o), (67 bytes).
+	Removing .csky.attributes(stdinit.o), (32 bytes).
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+	Removing .bss(strlen_fast.o), (0 bytes).
+	Removing .data(strcpy_fast.o), (0 bytes).
+	Removing .bss(strcpy_fast.o), (0 bytes).
+	Removing .data(strchr.o), (0 bytes).
+	Removing .bss(strchr.o), (0 bytes).
+	Removing .data(strerror.o), (0 bytes).
+	Removing .bss(strerror.o), (0 bytes).
+	Removing .data(__isinf.o), (0 bytes).
+	Removing .bss(__isinf.o), (0 bytes).
+	Removing .data(_eq_df.o), (0 bytes).
+	Removing .bss(_eq_df.o), (0 bytes).
+	Removing .data(_lt_df.o), (0 bytes).
+	Removing .bss(_lt_df.o), (0 bytes).
+
+655 unused seciton(s) (total 180335 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
+	Symbol Name                        Value        Type   Size  Section
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+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
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+	__main                             0x00002f14      F       56  .text.__main
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+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x0000303c      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x000030c4      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x000030ec      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00003128      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x0000313c      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00003154      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00003174      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00003190      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x000031ac      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x000031ec      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x000031f8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x0000321c      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x0000324c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x0000332c      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00003340      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x0000334e      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00003356      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x0000335e      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x00003374      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00003384      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00003394      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x000033a8      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x000033b8      F       28  .text.BT_DeInit
+	BT_Start                           0x000033d4      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x000033dc      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000033e6      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000033fe      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x0000342a      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00003430      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00003444      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00003454      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000034f4      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00003508      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x0000354c      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x00003560      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00003614      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00003624      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00003634      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x00003650      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00003668      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x00003680      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x00003698      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000036b4      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x000036d0      F      236  .text.UART_IO_Init
+	UARTInit                           0x000037bc      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x000037cc      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x000037dc      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000037fc      F       40  .text.EPT_Stop
+	main                               0x00003824      F      120  .text.startup.main
+	delay_nms                          0x0000389c      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000038c8      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x0000395c      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000039bc      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00003a20      F       80  .text.APT32F102_init
+	SYSCONIntHandler                   0x00003a70      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00003b60      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00003bc8      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00003c30      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00003ddc      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00003e10      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00003e90      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00003f00      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00003f3c      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00003f78      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x0000400c      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x000040f4      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00004148      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00004178      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x000041a8      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x000041f0      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x0000424c      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x000042ac      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x000042e0      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x0000432c      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00004390      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00004392      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x0000439a      F        8  .text.Trap3Handler
+	Trap2Handler                       0x000043a2      F        8  .text.Trap2Handler
+	Trap1Handler                       0x000043aa      F        8  .text.Trap1Handler
+	Trap0Handler                       0x000043b2      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x000043ba      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x000043c2      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x000043ca      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x000043d2      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x000043da      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x000043e2      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x000043ea      F        8  .text.I2CIntHandler
+	__divsi3                           0x000043f4      F       36  .text.__divsi3
+	__udivsi3                          0x00004418      F       36  .text.__udivsi3
+	__modsi3                           0x0000443c      F       36  .text.__modsi3
+	__umodsi3                          0x00004460      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x00004484      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x0000448c      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x00004564      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x000045c8      F      152  .text.Dbg_Println
+	RC522_Delay                        0x00004660      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x00004674      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x000046c8      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x00004700      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00004730      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x0000477c      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x00004794      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000047ae      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x000047c4      F       12  .text.RC522_PcdAntennaOff
+	RC522_Reset                        0x000047d0      F       22  .text.RC522_Reset
+	RC522_Init                         0x00004864      F      152  .text.RC522_Init
+	RC522_PcdComMF522                  0x000048fc      F      368  .text.RC522_PcdComMF522
+	RC522_PcdRequest                   0x00004a6c      F      136  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00004af4      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x00004b68      F      176  .text.Card_Read_TasK
+	Detect_SPI_task                    0x00004c18      F      156  .text.Detect_SPI_task
+	RLY_Light_Ctrl                     0x00004cb4      F       80  .text.RLY_Light_Ctrl
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00004d04      F      104  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	LogicCtrl_Init                     0x00004d6c      F       60  .text.LogicCtrl_Init
+	LogicCtrl_Task                     0x00004da8      F      240  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00004e98      F      136  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x00004f20      F      192  .text.LogicCtrl_NoRF_Task
+	BackLight_Task                     0x00004fe0      F       36  .text.BackLight_Task
+	Detect_WIFI_Task                   0x00005004      F      148  .text.Detect_WIFI_Task
+	Led_Task                           0x00005098      F      120  .text.Led_Task
+	button_init                        0x00005110      F       58  .text.button_init
+	button_attach                      0x0000514a      F       10  .text.button_attach
+	button_handler                     0x00005154      F      288  .text.button_handler
+	button_start                       0x00005274      F       36  .text.button_start
+	button_ticks                       0x00005298      F       28  .text.button_ticks
+	read_button_GPIO                   0x000052b4      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x000052c8      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x00005320      F      136  .text.TKEYIntHandler
+	get_key_number                     0x000053a8      F       40  .text.get_key_number
+	TK_Scan_Start                      0x000053d0      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000053f0      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00005570      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x0000568c      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x0000585c      F       84  .text.TK_result_prog
+	CORETHandler                       0x000058b0      F      120  .text.CORETHandler
+	std_clk_calib                      0x00005928      F      644  .text.std_clk_calib
+	__thenan_df                        0x00005bdc      O       20  .rodata
+	__clz_tab                          0x00005bf0      O      256  .rodata
+	_end_rodata                        0x0000687c               0  .rodata
+	HWD                                0x20000000      O        4  .data
+	_start_data                        0x20000000               0  .data
+	CRC                                0x20000004      O        4  .data
+	BT1                                0x20000008      O        4  .data
+	BT0                                0x2000000c      O        4  .data
+	WWDT                               0x20000010      O        4  .data
+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
+	EPT0                               0x20000020      O        4  .data
+	GPT0                               0x20000024      O        4  .data
+	CA0                                0x20000028      O        4  .data
+	SIO0                               0x2000002c      O        4  .data
+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	Dbg_Switch                         0x20000068      O        4  .data
+	s_tkey                             0x2000006c      O        4  .data
+	samp_setover_f                     0x20000070      O        1  .data
+	tk_overflow_en                     0x20000071      O        1  .data
+	tk_div                             0x20000072      O       34  .data
+	neg_build_bounce                   0x20000094      O        1  .data
+	pos_build_bounce                   0x20000095      O        1  .data
+	tk_scan_para0                      0x20000098      O        4  .data
+	scan_step_temp                     0x2000009c      O        1  .data
+	_end_data                          0x200000a0               0  .data
+	_bss_start                         0x200000a0               0  .bss
+	rf_exist                           0x200000a0      O        1  .bss
+	last_state                         0x200000a1      O        1  .bss
+	finish_flag                        0x200000a2      O        1  .bss
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+	detect_tick                        0x200000a8      O        4  .bss
+	detect_count                       0x200000ac      O        1  .bss
+	test_state                         0x200000ad      O        1  .bss
+	SysTick_100us                      0x200000b4      O        4  .bss
+	SysTick_1ms                        0x200000b8      O        4  .bss
+	RS485_Comming                      0x200000bc      O        4  .bss
+	RS485_Comm_Flag                    0x200000c0      O        4  .bss
+	RS485_Comm_Start                   0x200000c4      O        4  .bss
+	RS485_Comm_End                     0x200000c8      O        4  .bss
+	SysTick_Now                        0x200000cc      O        4  .bss
+	SysTick_Last                       0x200000d0      O        4  .bss
+	SysTick_Diff                       0x200000d4      O        4  .bss
+	Dbg_Buffer                         0x200000d8      O      512  .bss
+	FIFOLevelReg_flag                  0x200002d8      O        1  .bss
+	scan_tick                          0x200002dc      O        4  .bss
+	HL_tick                            0x200002e0      O        4  .bss
+	Tim_Flag                           0x200002e4      O        4  .bss
+	start_light                        0x200002e8      O        1  .bss
+	power_tick                         0x200002f4      O        4  .bss
+	Press_debounce_data                0x200002fc      O        1  .bss
+	TK_Lowpower_mode                   0x200002fd      O        1  .bss
+	TK_Lowpower_level                  0x200002fe      O        1  .bss
+	TK_longpress_time                  0x20000300      O        4  .bss
+	Release_debounce_data              0x20000304      O        1  .bss
+	Key_mode                           0x20000305      O        1  .bss
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+	MultiTimes_Filter                  0x20000328      O        1  .bss
+	Base_Speed                         0x20000329      O        1  .bss
+	TK_IO_ENABLE                       0x2000032c      O        4  .bss
+	Valid_Key_Num                      0x20000330      O        1  .bss
+	TK_senprd                          0x20000332      O       34  .bss
+	TK_Wakeup_level                    0x20000354      O        1  .bss
+	TK_Triggerlevel                    0x20000356      O       34  .bss
+	TK_EC_LEVEL                        0x20000378      O        2  .bss
+	TK_FVR_LEVEL                       0x2000037a      O        2  .bss
+	TK_BaseCnt                         0x2000037c      O        4  .bss
+	TK_PSEL_MODE                       0x20000380      O        2  .bss
+	R_CMPB_BUF                         0x20000384      O        4  .bss
+	R_CMPA_BUF                         0x20000388      O        4  .bss
+	R_SIORX_buf                        0x2000038c      O       40  .bss
+	g_uart                             0x200003b4      O      115  .bss
+	CardInfo                           0x20000428      O       52  .bss
+	g_read                             0x2000045c      O        8  .bss
+	KEY1                               0x20000464      O       48  .bss
+	dm_in                              0x20000494      O        9  .bss
+	baseline_data0                     0x200004a0      O       34  .bss
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+	scan_f                             0x200004fa      O        1  .bss
+	offset_data1_abs                   0x200004fc      O       34  .bss
+	Release_debounce0                  0x2000051e      O       17  .bss
+	Key_Map0                           0x20000530      O        4  .bss
+	bsae_over_f                        0x20000534      O        1  .bss
+	scan_cnt                           0x20000536      O        2  .bss
+	Press_debounce0                    0x20000538      O       17  .bss
+	offset_data0                       0x2000054a      O       34  .bss
+	sampling_data1                     0x2000056c      O       34  .bss
+	Key_Map2                           0x20000590      O        4  .bss
+	Release_debounce1                  0x20000594      O       17  .bss
+	tk_overflow_f                      0x200005a5      O        1  .bss
+	TK_Negtive_build2                  0x200005a6      O       17  .bss
+	base_update_f                      0x200005b7      O        1  .bss
+	TK_Postive_build1                  0x200005b8      O       17  .bss
+	time_cnt                           0x200005cc      O        4  .bss
+	lpt_scan_pend_cnt                  0x200005d0      O        2  .bss
+	TK_track_cnt                       0x200005d2      O        1  .bss
+	Key_Map                            0x200005d4      O        4  .bss
+	baseline_data1                     0x200005d8      O       34  .bss
+	TK_Postive_build0                  0x200005fa      O       17  .bss
+	sampling_data2                     0x2000060c      O       34  .bss
+	offset_data1                       0x2000062e      O       34  .bss
+	TK_ovrdect_cnt                     0x20000650      O        1  .bss
+	Press_debounce2                    0x20000651      O       17  .bss
+	TK_Negtive_build1                  0x20000662      O       17  .bss
+	tk_num                             0x20000673      O        1  .bss
+	TK_Negtive_build0                  0x20000674      O       17  .bss
+	Press_debounce1                    0x20000685      O       17  .bss
+	Release_debounce2                  0x20000696      O       17  .bss
+	r_Key_Map_Temp                     0x200006a8      O        4  .bss
+	tk_seque                           0x200006ac      O       17  .bss
+	scan_step                          0x200006bd      O        1  .bss
+	baseline_data2                     0x200006be      O       34  .bss
+	tk_sampling_max                    0x200006e0      O       34  .bss
+	offset_data0_abs                   0x20000702      O       34  .bss
+	offset_data2                       0x20000724      O       34  .bss
+	sampling_data0                     0x20000746      O       34  .bss
+	errno                              0x20000768      O        4  .bss
+	__malloc_lock                      0x2000076c      O        4  .bss
+	_ebss                              0x20000770               0  .bss
+	_end                               0x20000770               0  .bss
+	end                                0x20000770               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x0000687c, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1012  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1020  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1026  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1033  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1044  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1049  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1056  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1063  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1070  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1077  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1084  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1091  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1098  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1105  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1119  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1126  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1133  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1139  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1146  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1153  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000020   Code   RO       1174  .text          	snprintf_required.o
+    0x00001984   0x00000098   Code   RO       1181  .text          	vsnprintf_required.o
+    0x00001a1c   0x00000088   Code   RO       1188  .text          	memset_fast.o
+    0x00001aa4   0x00000064   Code   RO       1193  .text          	memcpy_fast.o
+    0x00001b08   0x00000758   Code   RO       1351  .text          	__v2_printfDFHLlMOPpSSsWp.o
+    0x00002260   0x000003ac   Code   RO       1410  .text          	_udivdi3.o
+    0x0000260c   0x000003a0   Code   RO       1417  .text          	_umoddi3.o
+    0x000029ac   0x00000360   Code   RO       1438  .text          	__dtostr.o
+    0x00002d0c   0x0000002c   Code   RO       1446  .text          	__isnan.o
+    0x00002d38   0x00000052   Code   RO       1458  .text          	strlen_fast.o
+    0x00002d8a   0x00000002   PAD
+    0x00002d8c   0x000000b0   Code   RO       1463  .text          	strcpy_fast.o
+    0x00002e3c   0x00000012   Code   RO       1468  .text          	strchr.o
+    0x00002e4e   0x00000002   PAD
+    0x00002e50   0x0000001c   Code   RO       1473  .text          	strerror.o
+    0x00002e6c   0x00000030   Code   RO       1481  .text          	__isinf.o
+    0x00002e9c   0x0000003a   Code   RO       1487  .text          	_eq_df.o
+    0x00002ed6   0x00000002   PAD
+    0x00002ed8   0x0000003a   Code   RO       1494  .text          	_lt_df.o
+    0x00002f14   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00002f4c   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00002fc0   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x0000300c   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x0000303c   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x000030c4   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x000030ec   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00003128   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x0000313c   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003154   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003174   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00003190   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031ac   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x000031ec   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031f8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000321c   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000324c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x0000332c   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00003340   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x0000334e   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00003356   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x0000335e   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00003374   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00003384   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00003394   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x000033a8   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x000033b8   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x000033d4   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x000033dc   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x000033e6   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000033fe   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x0000342a   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00003430   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00003444   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00003454   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x000034f4   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003508   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000354c   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003560   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00003614   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x00003624   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00003634   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x00003650   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003668   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003680   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00003698   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036b4   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000036d0   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000037bc   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x000037cc   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x000037dc   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x000037fc   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x00003824   0x00000078   Code   RO        690  .text.startup.main	Obj/main.o
+    0x0000389c   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000038c8   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x0000395c   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x000039bc   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00003a20   0x00000050   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00003a70   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00003b60   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x00003bc8   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00003c30   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003ddc   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00003e10   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00003e90   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00003f00   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00003f3c   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00003f78   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x0000400c   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x000040f4   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00004148   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00004178   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x000041a8   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x000041f0   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x0000424c   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x000042ac   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x000042e0   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x0000432c   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00004390   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x00004392   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x0000439a   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x000043a2   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x000043aa   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x000043b2   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x000043ba   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x000043c2   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x000043ca   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x000043d2   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x000043da   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x000043e2   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x000043ea   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x000043f4   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00004418   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x0000443c   0x00000024   Code   RO        787  .text.__modsi3 	Obj/drivers_apt32f102.o
+    0x00004460   0x00000024   Code   RO        788  .text.__umodsi3	Obj/drivers_apt32f102.o
+    0x00004484   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x0000448c   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x00004564   0x00000064   Code   RO        822  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x000045c8   0x00000098   Code   RO        827  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00004660   0x00000012   Code   RO        848  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x00004674   0x00000054   Code   RO        849  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x000046c8   0x00000038   Code   RO        850  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x00004700   0x00000030   Code   RO        851  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00004730   0x0000004c   Code   RO        852  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x0000477c   0x00000018   Code   RO        853  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x00004794   0x0000001a   Code   RO        854  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000047ae   0x00000016   Code   RO        855  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x000047c4   0x0000000c   Code   RO        856  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x000047d0   0x00000016   Code   RO        857  .text.RC522_Reset	Obj/SYSTEM_rc522.o
+    0x000047e6   0x0000007e   Code   RO        859  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x00004864   0x00000098   Code   RO        861  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x000048fc   0x00000170   Code   RO        862  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x00004a6c   0x00000088   Code   RO        868  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x00004af4   0x00000074   Code   RO        869  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x00004b68   0x000000b0   Code   RO        870  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x00004c18   0x0000009c   Code   RO        871  .text.Detect_SPI_task	Obj/SYSTEM_rc522.o
+    0x00004cb4   0x00000050   Code   RO        890  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x00004d04   0x00000068   Code   RO        891  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x00004d6c   0x0000003c   Code   RO        892  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004da8   0x000000f0   Code   RO        893  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004e98   0x00000088   Code   RO        896  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00004f20   0x000000c0   Code   RO        897  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00004fe0   0x00000024   Code   RO        898  .text.BackLight_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00005004   0x00000094   Code   RO        899  .text.Detect_WIFI_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00005098   0x00000078   Code   RO        901  .text.Led_Task 	Obj/SYSTEM_logic_ctrl.o
+    0x00005110   0x0000003a   Code   RO        919  .text.button_init	Obj/SYSTEM_button.o
+    0x0000514a   0x0000000a   Code   RO        920  .text.button_attach	Obj/SYSTEM_button.o
+    0x00005154   0x00000120   Code   RO        922  .text.button_handler	Obj/SYSTEM_button.o
+    0x00005274   0x00000024   Code   RO        923  .text.button_start	Obj/SYSTEM_button.o
+    0x00005298   0x0000001c   Code   RO        925  .text.button_ticks	Obj/SYSTEM_button.o
+    0x000052b4   0x00000014   Code   RO        926  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x000052c8   0x00000058   Code   RO        958  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005320   0x00000088   Code   RO        962  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053a8   0x00000028   Code   RO        963  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053d0   0x00000020   Code   RO        965  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x000053f0   0x00000180   Code   RO        966  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005570   0x0000011c   Code   RO        967  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000568c   0x000001d0   Code   RO        968  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000585c   0x00000054   Code   RO        969  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x000058b0   0x00000078   Code   RO        970  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00005928   0x00000284   Code   RO        992  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00005bac   0x00000030   Data   RO       1015  .rodata        	pow.o
+    0x00005bdc   0x00000014   Data   RO       1115  .rodata        	_thenan_df.o
+    0x00005bf0   0x00000100   Data   RO       1163  .rodata        	_clz.o
+    0x00005cf0   0x00000020   Data   RO       1354  .rodata        	__v2_printfDFHLlMOPpSSsWp.o
+    0x00005d10   0x00000240   Data   RO       1476  .rodata        	strerror.o
+    0x00005f50   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x00005f5b   0x0000003e   Data   RO        831  .rodata.str1.1 	Obj/SYSTEM_uart.o
+    0x00005f99   0x0000007d   Data   RO        872  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x00006016   0x000000b3   Data   RO        902  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+    0x000060c9   0x00000022   Data   RO       1355  .rodata.str1.1 	__v2_printfDFHLlMOPpSSsWp.o
+    0x000060eb   0x00000008   Data   RO       1441  .rodata.str1.1 	__dtostr.o
+    0x000060f3   0x00000787   Data   RO       1477  .rodata.str1.1 	strerror.o
+    0x0000687a   0x00000002   PAD
+
+    Region RAM (Base: 0x20000000, Size: 0x00000770, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000004   Data   RW        819  .data          	Obj/SYSTEM_uart.o
+    0x2000006c   0x00000031   Data   RW        949  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x2000009d   0x00000003   PAD
+    0x200000a0   0x0000000e   Zero   RW        689  .bss           	Obj/main.o
+    0x200000ae   0x00000002   PAD
+    0x200000b0   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000bc   0x0000021c   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200002d8   0x0000000c   Zero   RW        847  .bss           	Obj/SYSTEM_rc522.o
+    0x200002e4   0x00000014   Zero   RW        888  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200002f8   0x00000004   Zero   RW        918  .bss           	Obj/SYSTEM_button.o
+    0x200002fc   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000382   0x00000002   PAD
+    0x20000384   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x200003b4   0x00000073   Zero   RW        844  COMMON         	Obj/SYSTEM_uart.o
+    0x20000427   0x00000001   PAD
+    0x20000428   0x00000034   Zero   RW        885  COMMON         	Obj/SYSTEM_rc522.o
+    0x2000045c   0x00000041   Zero   RW        915  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x2000049d   0x00000003   PAD
+    0x200004a0   0x000002c8   Zero   RW        988  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000768   0x00000008   Zero   RW       1431  COMMON         	minilibc_init.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        286   Obj/arch_crt0.o
+         56          0          0          0        822   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
+        328          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        426          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+        120         11          0        148      11011   Obj/main.o
+        466          0          0          0      16155   Obj/mcu_initial.o
+       2434          0          0         60      14290   Obj/mcu_interrupt.o
+        144          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        468         62          4        655      13107   Obj/SYSTEM_uart.o
+       1618        125          0         64      16103   Obj/SYSTEM_rc522.o
+       1116        179          0         85      12316   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11568   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       9564        377        108       1016     241544   Object Totals
+         10          2          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16339   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16339   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+        940          0          0          0          0   _udivdi3.o
+        928          0          0          0          0   _umoddi3.o
+	------------------------------------------------------------
+       5040        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         32          0          0          0          0   snprintf_required.o
+        152          0          0          0          0   vsnprintf_required.o
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+       1880         66          0          0          0   __v2_printfDFHLlMOPpSSsWp.o
+          0          0          0          8          0   minilibc_init.o
+          0          0          0          0          0   critical.o
+        864          8          0          0          0   __dtostr.o
+         44          0          0          0          0   __isnan.o
+          0          0          0          0          0   stdinit.o
+         82          0          0          0          0   strlen_fast.o
+        176          0          0          0          0   strcpy_fast.o
+         18          0          0          0          0   strchr.o
+         28       2503          0          0          0   strerror.o
+         48          0          0          0          0   __isinf.o
+	------------------------------------------------------------
+       3560       2577          0          8          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         58          0          0          0          0   _eq_df.o
+         58          0          0          0          0   _lt_df.o
+	------------------------------------------------------------
+        116          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      23454       3280        160       1744     266558   Grand Totals
+      23454       3280        160       1744     266558   Elf Image Totals
+      23454       3280        160          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				26734 (  26.11kB)
+Total	RW	Size (RW Data + ZI Data)			1904 (  1.86kB)
+Total	ROM	Size (Code + RO Data + RW Data)		26894 (  26.26kB)
+
+======================================================================
diff --git a/Source/Lst/TRF_TM_CR_V02_20250102.asm b/Source/Lst/TRF_TM_CR_V02_20250102.asm
new file mode 100644
index 0000000..46ba2bf
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V02_20250102.asm
@@ -0,0 +1,14304 @@
+
+.//Obj/TRF_TM_CR_V02_20250102.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	000043da 	.long	0x000043da
+       8:	000043ca 	.long	0x000043ca
+       c:	00000184 	.long	0x00000184
+      10:	000043d2 	.long	0x000043d2
+      14:	00004390 	.long	0x00004390
+      18:	00000184 	.long	0x00000184
+      1c:	000043c2 	.long	0x000043c2
+      20:	000043ba 	.long	0x000043ba
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	000043b2 	.long	0x000043b2
+      44:	000043aa 	.long	0x000043aa
+      48:	000043a2 	.long	0x000043a2
+      4c:	0000439a 	.long	0x0000439a
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00004392 	.long	0x00004392
+      80:	00005b84 	.long	0x00005b84
+      84:	00003a70 	.long	0x00003a70
+      88:	00003b60 	.long	0x00003b60
+      8c:	00003bc8 	.long	0x00003bc8
+      90:	00003c30 	.long	0x00003c30
+      94:	00000184 	.long	0x00000184
+      98:	00003ddc 	.long	0x00003ddc
+      9c:	00004148 	.long	0x00004148
+      a0:	00004178 	.long	0x00004178
+      a4:	00003e10 	.long	0x00003e10
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00003e90 	.long	0x00003e90
+      b4:	00003f00 	.long	0x00003f00
+      b8:	00003f3c 	.long	0x00003f3c
+      bc:	00003f78 	.long	0x00003f78
+      c0:	00000184 	.long	0x00000184
+      c4:	000043ea 	.long	0x000043ea
+      c8:	00000184 	.long	0x00000184
+      cc:	0000400c 	.long	0x0000400c
+      d0:	000040f4 	.long	0x000040f4
+      d4:	000041a8 	.long	0x000041a8
+      d8:	000041f0 	.long	0x000041f0
+      dc:	0000424c 	.long	0x0000424c
+      e0:	000043e2 	.long	0x000043e2
+      e4:	000055f4 	.long	0x000055f4
+      e8:	000042ac 	.long	0x000042ac
+      ec:	00000184 	.long	0x00000184
+      f0:	000042e0 	.long	0x000042e0
+      f4:	0000432c 	.long	0x0000432c
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x2f14	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x3824	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00002f14 	.long	0x00002f14
+     198:	00000160 	.long	0x00000160
+     19c:	00003824 	.long	0x00003824
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x5e80	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00005e80 	.long	0x00005e80
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x5e80	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x5e80	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00005e80 	.long	0x00005e80
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x5eb0	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00005eb0 	.long	0x00005eb0
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x5eb0	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00005eb0 	.long	0x00005eb0
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x5eb0	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00005eb0 	.long	0x00005eb0
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x5ec4	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	00005ec4 	.long	0x00005ec4
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__cskyvprintfsnprintf>:
+    1964:	1422      	subi      	r14, r14, 8
+    1966:	b861      	st.w      	r3, (r14, 0x4)
+    1968:	b840      	st.w      	r2, (r14, 0x0)
+    196a:	14d0      	push      	r15
+    196c:	1421      	subi      	r14, r14, 4
+    196e:	9862      	ld.w      	r3, (r14, 0x8)
+    1970:	b860      	st.w      	r3, (r14, 0x0)
+    1972:	9840      	ld.w      	r2, (r14, 0x0)
+    1974:	1b03      	addi      	r3, r14, 12
+    1976:	e0000026 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+    197a:	1401      	addi      	r14, r14, 4
+    197c:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    1980:	1403      	addi      	r14, r14, 12
+    1982:	783c      	jmp      	r15
+
+00001984 <swrite>:
+    1984:	14d3      	push      	r4-r6, r15
+    1986:	6d4b      	mov      	r5, r2
+    1988:	9582      	ld.w      	r4, (r5, 0x8)
+    198a:	9241      	ld.w      	r2, (r2, 0x4)
+    198c:	610a      	subu      	r4, r2
+    198e:	3c40      	cmpnei      	r4, 0
+    1990:	6d87      	mov      	r6, r1
+    1992:	0c16      	bf      	0x19be	// 19be <swrite+0x3a>
+    1994:	6504      	cmphs      	r1, r4
+    1996:	0802      	bt      	0x199a	// 199a <swrite+0x16>
+    1998:	6d07      	mov      	r4, r1
+    199a:	9560      	ld.w      	r3, (r5, 0x0)
+    199c:	3b40      	cmpnei      	r3, 0
+    199e:	0c0d      	bf      	0x19b8	// 19b8 <swrite+0x34>
+    19a0:	60c8      	addu      	r3, r2
+    19a2:	6c43      	mov      	r1, r0
+    19a4:	6c93      	mov      	r2, r4
+    19a6:	6c0f      	mov      	r0, r3
+    19a8:	e000007e 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+    19ac:	9500      	ld.w      	r0, (r5, 0x0)
+    19ae:	9521      	ld.w      	r1, (r5, 0x4)
+    19b0:	6010      	addu      	r0, r4
+    19b2:	6004      	addu      	r0, r1
+    19b4:	3200      	movi      	r2, 0
+    19b6:	a040      	st.b      	r2, (r0, 0x0)
+    19b8:	9561      	ld.w      	r3, (r5, 0x4)
+    19ba:	610c      	addu      	r4, r3
+    19bc:	b581      	st.w      	r4, (r5, 0x4)
+    19be:	6c1b      	mov      	r0, r6
+    19c0:	1493      	pop      	r4-r6, r15
+
+000019c2 <__cskyvprintfvsnprintf>:
+    19c2:	14d3      	push      	r4-r6, r15
+    19c4:	1425      	subi      	r14, r14, 20
+    19c6:	6d07      	mov      	r4, r1
+    19c8:	6d43      	mov      	r5, r0
+    19ca:	6c4b      	mov      	r1, r2
+    19cc:	1802      	addi      	r0, r14, 8
+    19ce:	3200      	movi      	r2, 0
+    19d0:	3c40      	cmpnei      	r4, 0
+    19d2:	b0a0      	st.w      	r5, (r0, 0x0)
+    19d4:	b041      	st.w      	r2, (r0, 0x4)
+    19d6:	0c1c      	bf      	0x1a0e	// 1a0e <__cskyvprintfvsnprintf+0x4c>
+    19d8:	5cc3      	subi      	r6, r4, 1
+    19da:	b0c2      	st.w      	r6, (r0, 0x8)
+    19dc:	b800      	st.w      	r0, (r14, 0x0)
+    19de:	6c8f      	mov      	r2, r3
+    19e0:	100e      	lrw      	r0, 0x1984	// 1a18 <__cskyvprintfvsnprintf+0x56>
+    19e2:	b801      	st.w      	r0, (r14, 0x4)
+    19e4:	6c3b      	mov      	r0, r14
+    19e6:	e00000ab 	bsr      	0x1b3c	// 1b3c <__v2_printf>
+    19ea:	3d40      	cmpnei      	r5, 0
+    19ec:	0c0f      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19ee:	3c40      	cmpnei      	r4, 0
+    19f0:	0c0d      	bf      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f2:	38df      	btsti      	r0, 31
+    19f4:	080b      	bt      	0x1a0a	// 1a0a <__cskyvprintfvsnprintf+0x48>
+    19f6:	3300      	movi      	r3, 0
+    19f8:	2b00      	subi      	r3, 1
+    19fa:	64d2      	cmpne      	r4, r3
+    19fc:	0c0b      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    19fe:	6500      	cmphs      	r0, r4
+    1a00:	0c09      	bf      	0x1a12	// 1a12 <__cskyvprintfvsnprintf+0x50>
+    1a02:	6114      	addu      	r4, r5
+    1a04:	2c00      	subi      	r4, 1
+    1a06:	3100      	movi      	r1, 0
+    1a08:	a420      	st.b      	r1, (r4, 0x0)
+    1a0a:	1405      	addi      	r14, r14, 20
+    1a0c:	1493      	pop      	r4-r6, r15
+    1a0e:	3600      	movi      	r6, 0
+    1a10:	07e5      	br      	0x19da	// 19da <__cskyvprintfvsnprintf+0x18>
+    1a12:	5d80      	addu      	r4, r5, r0
+    1a14:	07f9      	br      	0x1a06	// 1a06 <__cskyvprintfvsnprintf+0x44>
+    1a16:	0000      	bkpt
+    1a18:	00001984 	.long	0x00001984
+
+00001a1c <__memset_fast>:
+    1a1c:	14c3      	push      	r4-r6
+    1a1e:	7444      	zextb      	r1, r1
+    1a20:	3a40      	cmpnei      	r2, 0
+    1a22:	0c1f      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a24:	6d43      	mov      	r5, r0
+    1a26:	6d03      	mov      	r4, r0
+    1a28:	3603      	movi      	r6, 3
+    1a2a:	6918      	and      	r4, r6
+    1a2c:	3c40      	cmpnei      	r4, 0
+    1a2e:	0c1a      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a30:	a520      	st.b      	r1, (r5, 0x0)
+    1a32:	2a00      	subi      	r2, 1
+    1a34:	3a40      	cmpnei      	r2, 0
+    1a36:	0c15      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a38:	2500      	addi      	r5, 1
+    1a3a:	6d17      	mov      	r4, r5
+    1a3c:	3603      	movi      	r6, 3
+    1a3e:	6918      	and      	r4, r6
+    1a40:	3c40      	cmpnei      	r4, 0
+    1a42:	0c10      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a44:	a520      	st.b      	r1, (r5, 0x0)
+    1a46:	2a00      	subi      	r2, 1
+    1a48:	3a40      	cmpnei      	r2, 0
+    1a4a:	0c0b      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a4c:	2500      	addi      	r5, 1
+    1a4e:	6d17      	mov      	r4, r5
+    1a50:	3603      	movi      	r6, 3
+    1a52:	6918      	and      	r4, r6
+    1a54:	3c40      	cmpnei      	r4, 0
+    1a56:	0c06      	bf      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a58:	a520      	st.b      	r1, (r5, 0x0)
+    1a5a:	2a00      	subi      	r2, 1
+    1a5c:	2500      	addi      	r5, 1
+    1a5e:	0402      	br      	0x1a62	// 1a62 <__memset_fast+0x46>
+    1a60:	1483      	pop      	r4-r6
+    1a62:	4168      	lsli      	r3, r1, 8
+    1a64:	6c4c      	or      	r1, r3
+    1a66:	4170      	lsli      	r3, r1, 16
+    1a68:	6c4c      	or      	r1, r3
+    1a6a:	3a2f      	cmplti      	r2, 16
+    1a6c:	0809      	bt      	0x1a7e	// 1a7e <__memset_fast+0x62>
+    1a6e:	b520      	st.w      	r1, (r5, 0x0)
+    1a70:	b521      	st.w      	r1, (r5, 0x4)
+    1a72:	b522      	st.w      	r1, (r5, 0x8)
+    1a74:	b523      	st.w      	r1, (r5, 0xc)
+    1a76:	2a0f      	subi      	r2, 16
+    1a78:	250f      	addi      	r5, 16
+    1a7a:	3a2f      	cmplti      	r2, 16
+    1a7c:	0ff9      	bf      	0x1a6e	// 1a6e <__memset_fast+0x52>
+    1a7e:	3a23      	cmplti      	r2, 4
+    1a80:	0806      	bt      	0x1a8c	// 1a8c <__memset_fast+0x70>
+    1a82:	2a03      	subi      	r2, 4
+    1a84:	b520      	st.w      	r1, (r5, 0x0)
+    1a86:	2503      	addi      	r5, 4
+    1a88:	3a23      	cmplti      	r2, 4
+    1a8a:	0ffc      	bf      	0x1a82	// 1a82 <__memset_fast+0x66>
+    1a8c:	3a40      	cmpnei      	r2, 0
+    1a8e:	0fe9      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a90:	2a00      	subi      	r2, 1
+    1a92:	a520      	st.b      	r1, (r5, 0x0)
+    1a94:	3a40      	cmpnei      	r2, 0
+    1a96:	0fe5      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1a98:	2a00      	subi      	r2, 1
+    1a9a:	a521      	st.b      	r1, (r5, 0x1)
+    1a9c:	3a40      	cmpnei      	r2, 0
+    1a9e:	0fe1      	bf      	0x1a60	// 1a60 <__memset_fast+0x44>
+    1aa0:	a522      	st.b      	r1, (r5, 0x2)
+    1aa2:	1483      	pop      	r4-r6
+
+00001aa4 <__memcpy_fast>:
+    1aa4:	14c3      	push      	r4-r6
+    1aa6:	6d83      	mov      	r6, r0
+    1aa8:	6d07      	mov      	r4, r1
+    1aaa:	6d18      	or      	r4, r6
+    1aac:	3303      	movi      	r3, 3
+    1aae:	690c      	and      	r4, r3
+    1ab0:	3c40      	cmpnei      	r4, 0
+    1ab2:	0c0b      	bf      	0x1ac8	// 1ac8 <__memcpy_fast+0x24>
+    1ab4:	3a40      	cmpnei      	r2, 0
+    1ab6:	0c08      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1ab8:	8160      	ld.b      	r3, (r1, 0x0)
+    1aba:	2100      	addi      	r1, 1
+    1abc:	2a00      	subi      	r2, 1
+    1abe:	a660      	st.b      	r3, (r6, 0x0)
+    1ac0:	2600      	addi      	r6, 1
+    1ac2:	3a40      	cmpnei      	r2, 0
+    1ac4:	0bfa      	bt      	0x1ab8	// 1ab8 <__memcpy_fast+0x14>
+    1ac6:	1483      	pop      	r4-r6
+    1ac8:	3a2f      	cmplti      	r2, 16
+    1aca:	080e      	bt      	0x1ae6	// 1ae6 <__memcpy_fast+0x42>
+    1acc:	91a0      	ld.w      	r5, (r1, 0x0)
+    1ace:	9161      	ld.w      	r3, (r1, 0x4)
+    1ad0:	9182      	ld.w      	r4, (r1, 0x8)
+    1ad2:	b6a0      	st.w      	r5, (r6, 0x0)
+    1ad4:	91a3      	ld.w      	r5, (r1, 0xc)
+    1ad6:	b661      	st.w      	r3, (r6, 0x4)
+    1ad8:	b682      	st.w      	r4, (r6, 0x8)
+    1ada:	b6a3      	st.w      	r5, (r6, 0xc)
+    1adc:	2a0f      	subi      	r2, 16
+    1ade:	210f      	addi      	r1, 16
+    1ae0:	260f      	addi      	r6, 16
+    1ae2:	3a2f      	cmplti      	r2, 16
+    1ae4:	0ff4      	bf      	0x1acc	// 1acc <__memcpy_fast+0x28>
+    1ae6:	3a23      	cmplti      	r2, 4
+    1ae8:	0808      	bt      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+    1aea:	9160      	ld.w      	r3, (r1, 0x0)
+    1aec:	2a03      	subi      	r2, 4
+    1aee:	2103      	addi      	r1, 4
+    1af0:	b660      	st.w      	r3, (r6, 0x0)
+    1af2:	2603      	addi      	r6, 4
+    1af4:	3a23      	cmplti      	r2, 4
+    1af6:	0ffa      	bf      	0x1aea	// 1aea <__memcpy_fast+0x46>
+    1af8:	3a40      	cmpnei      	r2, 0
+    1afa:	0fe6      	bf      	0x1ac6	// 1ac6 <__memcpy_fast+0x22>
+    1afc:	8160      	ld.b      	r3, (r1, 0x0)
+    1afe:	2100      	addi      	r1, 1
+    1b00:	2a00      	subi      	r2, 1
+    1b02:	a660      	st.b      	r3, (r6, 0x0)
+    1b04:	2600      	addi      	r6, 1
+    1b06:	07f9      	br      	0x1af8	// 1af8 <__memcpy_fast+0x54>
+
+00001b08 <PAD.1851>:
+    1b08:	14d4      	push      	r4-r7, r15
+    1b0a:	3820      	cmplti      	r0, 1
+    1b0c:	6d03      	mov      	r4, r0
+    1b0e:	6d47      	mov      	r5, r1
+    1b10:	6df7      	mov      	r7, r13
+    1b12:	080d      	bt      	0x1b2c	// 1b2c <PAD.1851+0x24>
+    1b14:	6d83      	mov      	r6, r0
+    1b16:	3e30      	cmplti      	r6, 17
+    1b18:	9700      	ld.w      	r0, (r7, 0x0)
+    1b1a:	0c0a      	bf      	0x1b2e	// 1b2e <PAD.1851+0x26>
+    1b1c:	5c63      	subi      	r3, r4, 1
+    1b1e:	4b24      	lsri      	r1, r3, 4
+    1b20:	4164      	lsli      	r3, r1, 4
+    1b22:	9040      	ld.w      	r2, (r0, 0x0)
+    1b24:	5c2d      	subu      	r1, r4, r3
+    1b26:	9081      	ld.w      	r4, (r0, 0x4)
+    1b28:	6c17      	mov      	r0, r5
+    1b2a:	7bd1      	jsr      	r4
+    1b2c:	1494      	pop      	r4-r7, r15
+    1b2e:	9040      	ld.w      	r2, (r0, 0x0)
+    1b30:	9061      	ld.w      	r3, (r0, 0x4)
+    1b32:	3110      	movi      	r1, 16
+    1b34:	6c17      	mov      	r0, r5
+    1b36:	7bcd      	jsr      	r3
+    1b38:	2e0f      	subi      	r6, 16
+    1b3a:	07ee      	br      	0x1b16	// 1b16 <PAD.1851+0xe>
+
+00001b3c <__v2_printf>:
+    1b3c:	14d4      	push      	r4-r7, r15
+    1b3e:	143c      	subi      	r14, r14, 112
+    1b40:	b826      	st.w      	r1, (r14, 0x18)
+    1b42:	1912      	addi      	r1, r14, 72
+    1b44:	1b21      	addi      	r3, r14, 132
+    1b46:	b810      	st.w      	r0, (r14, 0x40)
+    1b48:	2100      	addi      	r1, 1
+    1b4a:	3000      	movi      	r0, 0
+    1b4c:	6d4b      	mov      	r5, r2
+    1b4e:	b871      	st.w      	r3, (r14, 0x44)
+    1b50:	b80a      	st.w      	r0, (r14, 0x28)
+    1b52:	b809      	st.w      	r0, (r14, 0x24)
+    1b54:	b82d      	st.w      	r1, (r14, 0x34)
+    1b56:	9886      	ld.w      	r4, (r14, 0x18)
+    1b58:	3325      	movi      	r3, 37
+    1b5a:	84c0      	ld.b      	r6, (r4, 0x0)
+    1b5c:	3e40      	cmpnei      	r6, 0
+    1b5e:	0c03      	bf      	0x1b64	// 1b64 <__v2_printf+0x28>
+    1b60:	64da      	cmpne      	r6, r3
+    1b62:	0845      	bt      	0x1bec	// 1bec <__v2_printf+0xb0>
+    1b64:	9846      	ld.w      	r2, (r14, 0x18)
+    1b66:	5cc9      	subu      	r6, r4, r2
+    1b68:	3e40      	cmpnei      	r6, 0
+    1b6a:	0c0a      	bf      	0x1b7e	// 1b7e <__v2_printf+0x42>
+    1b6c:	9870      	ld.w      	r3, (r14, 0x40)
+    1b6e:	9340      	ld.w      	r2, (r3, 0x0)
+    1b70:	6c5b      	mov      	r1, r6
+    1b72:	9361      	ld.w      	r3, (r3, 0x4)
+    1b74:	9806      	ld.w      	r0, (r14, 0x18)
+    1b76:	7bcd      	jsr      	r3
+    1b78:	9809      	ld.w      	r0, (r14, 0x24)
+    1b7a:	6018      	addu      	r0, r6
+    1b7c:	b809      	st.w      	r0, (r14, 0x24)
+    1b7e:	8420      	ld.b      	r1, (r4, 0x0)
+    1b80:	3940      	cmpnei      	r1, 0
+    1b82:	0803      	bt      	0x1b88	// 1b88 <__v2_printf+0x4c>
+    1b84:	e8000367 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1b88:	3637      	movi      	r6, 55
+    1b8a:	1a01      	addi      	r2, r14, 4
+    1b8c:	3700      	movi      	r7, 0
+    1b8e:	6188      	addu      	r6, r2
+    1b90:	a6e0      	st.b      	r7, (r6, 0x0)
+    1b92:	3300      	movi      	r3, 0
+    1b94:	3600      	movi      	r6, 0
+    1b96:	2400      	addi      	r4, 1
+    1b98:	3000      	movi      	r0, 0
+    1b9a:	3100      	movi      	r1, 0
+    1b9c:	2e00      	subi      	r6, 1
+    1b9e:	b867      	st.w      	r3, (r14, 0x1c)
+    1ba0:	3700      	movi      	r7, 0
+    1ba2:	5c42      	addi      	r2, r4, 1
+    1ba4:	b846      	st.w      	r2, (r14, 0x18)
+    1ba6:	8480      	ld.b      	r4, (r4, 0x0)
+    1ba8:	3364      	movi      	r3, 100
+    1baa:	64d2      	cmpne      	r4, r3
+    1bac:	0d90      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1bae:	650d      	cmplt      	r3, r4
+    1bb0:	084e      	bt      	0x1c4c	// 1c4c <__v2_printf+0x110>
+    1bb2:	322e      	movi      	r2, 46
+    1bb4:	6492      	cmpne      	r4, r2
+    1bb6:	0d41      	bf      	0x1e38	// 1e38 <__v2_printf+0x2fc>
+    1bb8:	6509      	cmplt      	r2, r4
+    1bba:	0829      	bt      	0x1c0c	// 1c0c <__v2_printf+0xd0>
+    1bbc:	332a      	movi      	r3, 42
+    1bbe:	64d2      	cmpne      	r4, r3
+    1bc0:	0d31      	bf      	0x1e22	// 1e22 <__v2_printf+0x2e6>
+    1bc2:	650d      	cmplt      	r3, r4
+    1bc4:	081c      	bt      	0x1bfc	// 1bfc <__v2_printf+0xc0>
+    1bc6:	3220      	movi      	r2, 32
+    1bc8:	6492      	cmpne      	r4, r2
+    1bca:	0d25      	bf      	0x1e14	// 1e14 <__v2_printf+0x2d8>
+    1bcc:	3323      	movi      	r3, 35
+    1bce:	64d2      	cmpne      	r4, r3
+    1bd0:	0d27      	bf      	0x1e1e	// 1e1e <__v2_printf+0x2e2>
+    1bd2:	3c40      	cmpnei      	r4, 0
+    1bd4:	0803      	bt      	0x1bda	// 1bda <__v2_printf+0x9e>
+    1bd6:	e800033e 	br      	0x2252	// 2252 <__v2_printf+0x716>
+    1bda:	1e12      	addi      	r6, r14, 72
+    1bdc:	3037      	movi      	r0, 55
+    1bde:	1a01      	addi      	r2, r14, 4
+    1be0:	a680      	st.b      	r4, (r6, 0x0)
+    1be2:	6008      	addu      	r0, r2
+    1be4:	3400      	movi      	r4, 0
+    1be6:	a080      	st.b      	r4, (r0, 0x0)
+    1be8:	b8a5      	st.w      	r5, (r14, 0x14)
+    1bea:	042c      	br      	0x1c42	// 1c42 <__v2_printf+0x106>
+    1bec:	2400      	addi      	r4, 1
+    1bee:	07b6      	br      	0x1b5a	// 1b5a <__v2_printf+0x1e>
+    1bf0:	3001      	movi      	r0, 1
+    1bf2:	312b      	movi      	r1, 43
+    1bf4:	9886      	ld.w      	r4, (r14, 0x18)
+    1bf6:	07d6      	br      	0x1ba2	// 1ba2 <__v2_printf+0x66>
+    1bf8:	6d4f      	mov      	r5, r3
+    1bfa:	07fd      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1bfc:	322b      	movi      	r2, 43
+    1bfe:	6492      	cmpne      	r4, r2
+    1c00:	0ff8      	bf      	0x1bf0	// 1bf0 <__v2_printf+0xb4>
+    1c02:	332d      	movi      	r3, 45
+    1c04:	64d2      	cmpne      	r4, r3
+    1c06:	0be6      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c08:	3fa2      	bseti      	r7, 2
+    1c0a:	07f5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c0c:	3339      	movi      	r3, 57
+    1c0e:	650d      	cmplt      	r3, r4
+    1c10:	0809      	bt      	0x1c22	// 1c22 <__v2_printf+0xe6>
+    1c12:	3231      	movi      	r2, 49
+    1c14:	6491      	cmplt      	r4, r2
+    1c16:	0d34      	bf      	0x1e7e	// 1e7e <__v2_printf+0x342>
+    1c18:	3330      	movi      	r3, 48
+    1c1a:	64d2      	cmpne      	r4, r3
+    1c1c:	0bdb      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c1e:	3fa7      	bseti      	r7, 7
+    1c20:	07ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1c22:	3258      	movi      	r2, 88
+    1c24:	6492      	cmpne      	r4, r2
+    1c26:	0cd3      	bf      	0x1dcc	// 1dcc <__v2_printf+0x290>
+    1c28:	3063      	movi      	r0, 99
+    1c2a:	6412      	cmpne      	r4, r0
+    1c2c:	0bd3      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c2e:	3337      	movi      	r3, 55
+    1c30:	1a01      	addi      	r2, r14, 4
+    1c32:	5d2e      	addi      	r1, r5, 4
+    1c34:	85c0      	ld.b      	r6, (r5, 0x0)
+    1c36:	3400      	movi      	r4, 0
+    1c38:	1d12      	addi      	r5, r14, 72
+    1c3a:	60c8      	addu      	r3, r2
+    1c3c:	b825      	st.w      	r1, (r14, 0x14)
+    1c3e:	a5c0      	st.b      	r6, (r5, 0x0)
+    1c40:	a380      	st.b      	r4, (r3, 0x0)
+    1c42:	3601      	movi      	r6, 1
+    1c44:	3500      	movi      	r5, 0
+    1c46:	1c12      	addi      	r4, r14, 72
+    1c48:	e8000295 	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1c4c:	336d      	movi      	r3, 109
+    1c4e:	64d2      	cmpne      	r4, r3
+    1c50:	0d2d      	bf      	0x1eaa	// 1eaa <__v2_printf+0x36e>
+    1c52:	650d      	cmplt      	r3, r4
+    1c54:	0883      	bt      	0x1d5a	// 1d5a <__v2_printf+0x21e>
+    1c56:	3268      	movi      	r2, 104
+    1c58:	6492      	cmpne      	r4, r2
+    1c5a:	0d24      	bf      	0x1ea2	// 1ea2 <__v2_printf+0x366>
+    1c5c:	6509      	cmplt      	r2, r4
+    1c5e:	086f      	bt      	0x1d3c	// 1d3c <__v2_printf+0x200>
+    1c60:	3366      	movi      	r3, 102
+    1c62:	64d1      	cmplt      	r4, r3
+    1c64:	0bb7      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1c66:	3840      	cmpnei      	r0, 0
+    1c68:	0c05      	bf      	0x1c72	// 1c72 <__v2_printf+0x136>
+    1c6a:	3037      	movi      	r0, 55
+    1c6c:	1a01      	addi      	r2, r14, 4
+    1c6e:	6008      	addu      	r0, r2
+    1c70:	a020      	st.b      	r1, (r0, 0x0)
+    1c72:	5d3e      	addi      	r1, r5, 8
+    1c74:	b825      	st.w      	r1, (r14, 0x14)
+    1c76:	9500      	ld.w      	r0, (r5, 0x0)
+    1c78:	9521      	ld.w      	r1, (r5, 0x4)
+    1c7a:	98a7      	ld.w      	r5, (r14, 0x1c)
+    1c7c:	3d40      	cmpnei      	r5, 0
+    1c7e:	0803      	bt      	0x1c84	// 1c84 <__v2_printf+0x148>
+    1c80:	3301      	movi      	r3, 1
+    1c82:	b867      	st.w      	r3, (r14, 0x1c)
+    1c84:	3200      	movi      	r2, 0
+    1c86:	2a00      	subi      	r2, 1
+    1c88:	649a      	cmpne      	r6, r2
+    1c8a:	0d58      	bf      	0x1f3a	// 1f3a <__v2_printf+0x3fe>
+    1c8c:	6d5b      	mov      	r5, r6
+    1c8e:	9867      	ld.w      	r3, (r14, 0x1c)
+    1c90:	b860      	st.w      	r3, (r14, 0x0)
+    1c92:	b8a1      	st.w      	r5, (r14, 0x4)
+    1c94:	3328      	movi      	r3, 40
+    1c96:	1a12      	addi      	r2, r14, 72
+    1c98:	e000069d 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    1c9c:	3100      	movi      	r1, 0
+    1c9e:	2900      	subi      	r1, 1
+    1ca0:	645a      	cmpne      	r6, r1
+    1ca2:	b808      	st.w      	r0, (r14, 0x20)
+    1ca4:	0c1a      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1ca6:	312e      	movi      	r1, 46
+    1ca8:	980d      	ld.w      	r0, (r14, 0x34)
+    1caa:	e00008c9 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cae:	3840      	cmpnei      	r0, 0
+    1cb0:	98c8      	ld.w      	r6, (r14, 0x20)
+    1cb2:	0d48      	bf      	0x1f42	// 1f42 <__v2_printf+0x406>
+    1cb4:	3d40      	cmpnei      	r5, 0
+    1cb6:	0805      	bt      	0x1cc0	// 1cc0 <__v2_printf+0x184>
+    1cb8:	3101      	movi      	r1, 1
+    1cba:	685c      	and      	r1, r7
+    1cbc:	3940      	cmpnei      	r1, 0
+    1cbe:	0d40      	bf      	0x1f3e	// 1f3e <__v2_printf+0x402>
+    1cc0:	58c2      	addi      	r6, r0, 1
+    1cc2:	2500      	addi      	r5, 1
+    1cc4:	5d59      	subu      	r2, r5, r6
+    1cc6:	6080      	addu      	r2, r0
+    1cc8:	3a20      	cmplti      	r2, 1
+    1cca:	0805      	bt      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1ccc:	2600      	addi      	r6, 1
+    1cce:	8660      	ld.b      	r3, (r6, 0x0)
+    1cd0:	3b40      	cmpnei      	r3, 0
+    1cd2:	0bf9      	bt      	0x1cc4	// 1cc4 <__v2_printf+0x188>
+    1cd4:	3500      	movi      	r5, 0
+    1cd6:	a6a0      	st.b      	r5, (r6, 0x0)
+    1cd8:	3067      	movi      	r0, 103
+    1cda:	6412      	cmpne      	r4, r0
+    1cdc:	0822      	bt      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cde:	312e      	movi      	r1, 46
+    1ce0:	1812      	addi      	r0, r14, 72
+    1ce2:	e00008ad 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1ce6:	3840      	cmpnei      	r0, 0
+    1ce8:	6d03      	mov      	r4, r0
+    1cea:	0c1b      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1cec:	3165      	movi      	r1, 101
+    1cee:	e00008a7 	bsr      	0x2e3c	// 2e3c <__GI_strchr>
+    1cf2:	6c43      	mov      	r1, r0
+    1cf4:	84c0      	ld.b      	r6, (r4, 0x0)
+    1cf6:	3e40      	cmpnei      	r6, 0
+    1cf8:	0930      	bt      	0x1f58	// 1f58 <__v2_printf+0x41c>
+    1cfa:	3940      	cmpnei      	r1, 0
+    1cfc:	0c02      	bf      	0x1d00	// 1d00 <__v2_printf+0x1c4>
+    1cfe:	6d07      	mov      	r4, r1
+    1d00:	3630      	movi      	r6, 48
+    1d02:	5c63      	subi      	r3, r4, 1
+    1d04:	8340      	ld.b      	r2, (r3, 0x0)
+    1d06:	658a      	cmpne      	r2, r6
+    1d08:	0d2a      	bf      	0x1f5c	// 1f5c <__v2_printf+0x420>
+    1d0a:	352e      	movi      	r5, 46
+    1d0c:	654a      	cmpne      	r2, r5
+    1d0e:	0802      	bt      	0x1d12	// 1d12 <__v2_printf+0x1d6>
+    1d10:	6d0f      	mov      	r4, r3
+    1d12:	3000      	movi      	r0, 0
+    1d14:	3940      	cmpnei      	r1, 0
+    1d16:	a400      	st.b      	r0, (r4, 0x0)
+    1d18:	0c04      	bf      	0x1d20	// 1d20 <__v2_printf+0x1e4>
+    1d1a:	6c13      	mov      	r0, r4
+    1d1c:	e0000838 	bsr      	0x2d8c	// 2d8c <__strcpy_fast>
+    1d20:	1912      	addi      	r1, r14, 72
+    1d22:	81c0      	ld.b      	r6, (r1, 0x0)
+    1d24:	332d      	movi      	r3, 45
+    1d26:	64da      	cmpne      	r6, r3
+    1d28:	0c02      	bf      	0x1d2c	// 1d2c <__v2_printf+0x1f0>
+    1d2a:	05ef      	br      	0x2108	// 2108 <__v2_printf+0x5cc>
+    1d2c:	3437      	movi      	r4, 55
+    1d2e:	1801      	addi      	r0, r14, 4
+    1d30:	352d      	movi      	r5, 45
+    1d32:	6100      	addu      	r4, r0
+    1d34:	a4a0      	st.b      	r5, (r4, 0x0)
+    1d36:	1912      	addi      	r1, r14, 72
+    1d38:	5982      	addi      	r4, r1, 1
+    1d3a:	05ec      	br      	0x2112	// 2112 <__v2_printf+0x5d6>
+    1d3c:	3369      	movi      	r3, 105
+    1d3e:	64d2      	cmpne      	r4, r3
+    1d40:	0cc6      	bf      	0x1ecc	// 1ecc <__v2_printf+0x390>
+    1d42:	326c      	movi      	r2, 108
+    1d44:	6492      	cmpne      	r4, r2
+    1d46:	0b46      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d48:	9866      	ld.w      	r3, (r14, 0x18)
+    1d4a:	8340      	ld.b      	r2, (r3, 0x0)
+    1d4c:	650a      	cmpne      	r2, r4
+    1d4e:	08ac      	bt      	0x1ea6	// 1ea6 <__v2_printf+0x36a>
+    1d50:	9886      	ld.w      	r4, (r14, 0x18)
+    1d52:	2400      	addi      	r4, 1
+    1d54:	b886      	st.w      	r4, (r14, 0x18)
+    1d56:	3fa5      	bseti      	r7, 5
+    1d58:	074e      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1d5a:	3371      	movi      	r3, 113
+    1d5c:	64d2      	cmpne      	r4, r3
+    1d5e:	0ffc      	bf      	0x1d56	// 1d56 <__v2_printf+0x21a>
+    1d60:	650d      	cmplt      	r3, r4
+    1d62:	081a      	bt      	0x1d96	// 1d96 <__v2_printf+0x25a>
+    1d64:	306f      	movi      	r0, 111
+    1d66:	6412      	cmpne      	r4, r0
+    1d68:	0cfc      	bf      	0x1f60	// 1f60 <__v2_printf+0x424>
+    1d6a:	3170      	movi      	r1, 112
+    1d6c:	6452      	cmpne      	r4, r1
+    1d6e:	0b32      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1d70:	5d4e      	addi      	r2, r5, 4
+    1d72:	3400      	movi      	r4, 0
+    1d74:	95a0      	ld.w      	r5, (r5, 0x0)
+    1d76:	b845      	st.w      	r2, (r14, 0x14)
+    1d78:	1901      	addi      	r1, r14, 4
+    1d7a:	3239      	movi      	r2, 57
+    1d7c:	b8a3      	st.w      	r5, (r14, 0xc)
+    1d7e:	b884      	st.w      	r4, (r14, 0x10)
+    1d80:	3330      	movi      	r3, 48
+    1d82:	180f      	addi      	r0, r14, 60
+    1d84:	3578      	movi      	r5, 120
+    1d86:	6084      	addu      	r2, r1
+    1d88:	0195      	lrw      	r4, 0x6415	// 20b0 <__v2_printf+0x574>
+    1d8a:	3fa1      	bseti      	r7, 1
+    1d8c:	a060      	st.b      	r3, (r0, 0x0)
+    1d8e:	a2a0      	st.b      	r5, (r2, 0x0)
+    1d90:	b88a      	st.w      	r4, (r14, 0x28)
+    1d92:	3402      	movi      	r4, 2
+    1d94:	04f1      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1d96:	3275      	movi      	r2, 117
+    1d98:	6492      	cmpne      	r4, r2
+    1d9a:	0d28      	bf      	0x1fea	// 1fea <__v2_printf+0x4ae>
+    1d9c:	3378      	movi      	r3, 120
+    1d9e:	64d2      	cmpne      	r4, r3
+    1da0:	0d44      	bf      	0x2028	// 2028 <__v2_printf+0x4ec>
+    1da2:	3173      	movi      	r1, 115
+    1da4:	6452      	cmpne      	r4, r1
+    1da6:	0b16      	bt      	0x1bd2	// 1bd2 <__v2_printf+0x96>
+    1da8:	3200      	movi      	r2, 0
+    1daa:	3037      	movi      	r0, 55
+    1dac:	1901      	addi      	r1, r14, 4
+    1dae:	2a00      	subi      	r2, 1
+    1db0:	5d6e      	addi      	r3, r5, 4
+    1db2:	9580      	ld.w      	r4, (r5, 0x0)
+    1db4:	6004      	addu      	r0, r1
+    1db6:	3500      	movi      	r5, 0
+    1db8:	649a      	cmpne      	r6, r2
+    1dba:	b865      	st.w      	r3, (r14, 0x14)
+    1dbc:	a0a0      	st.b      	r5, (r0, 0x0)
+    1dbe:	090b      	bt      	0x1fd4	// 1fd4 <__v2_printf+0x498>
+    1dc0:	6cd3      	mov      	r3, r4
+    1dc2:	83c0      	ld.b      	r6, (r3, 0x0)
+    1dc4:	3e40      	cmpnei      	r6, 0
+    1dc6:	0910      	bt      	0x1fe6	// 1fe6 <__v2_printf+0x4aa>
+    1dc8:	5bd1      	subu      	r6, r3, r4
+    1dca:	047f      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1dcc:	3840      	cmpnei      	r0, 0
+    1dce:	0c05      	bf      	0x1dd8	// 1dd8 <__v2_printf+0x29c>
+    1dd0:	3037      	movi      	r0, 55
+    1dd2:	1b01      	addi      	r3, r14, 4
+    1dd4:	600c      	addu      	r0, r3
+    1dd6:	a020      	st.b      	r1, (r0, 0x0)
+    1dd8:	0228      	lrw      	r1, 0x6404	// 20b4 <__v2_printf+0x578>
+    1dda:	3020      	movi      	r0, 32
+    1ddc:	681c      	and      	r0, r7
+    1dde:	3840      	cmpnei      	r0, 0
+    1de0:	b82a      	st.w      	r1, (r14, 0x28)
+    1de2:	0d2b      	bf      	0x2038	// 2038 <__v2_printf+0x4fc>
+    1de4:	5d5e      	addi      	r2, r5, 8
+    1de6:	b845      	st.w      	r2, (r14, 0x14)
+    1de8:	9520      	ld.w      	r1, (r5, 0x0)
+    1dea:	9541      	ld.w      	r2, (r5, 0x4)
+    1dec:	b823      	st.w      	r1, (r14, 0xc)
+    1dee:	b844      	st.w      	r2, (r14, 0x10)
+    1df0:	3001      	movi      	r0, 1
+    1df2:	681c      	and      	r0, r7
+    1df4:	3840      	cmpnei      	r0, 0
+    1df6:	0fce      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1df8:	98a3      	ld.w      	r5, (r14, 0xc)
+    1dfa:	9864      	ld.w      	r3, (r14, 0x10)
+    1dfc:	6d4c      	or      	r5, r3
+    1dfe:	3d40      	cmpnei      	r5, 0
+    1e00:	0fc9      	bf      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e02:	3039      	movi      	r0, 57
+    1e04:	1d01      	addi      	r5, r14, 4
+    1e06:	3130      	movi      	r1, 48
+    1e08:	1a0f      	addi      	r2, r14, 60
+    1e0a:	6014      	addu      	r0, r5
+    1e0c:	a220      	st.b      	r1, (r2, 0x0)
+    1e0e:	a080      	st.b      	r4, (r0, 0x0)
+    1e10:	3fa1      	bseti      	r7, 1
+    1e12:	07c0      	br      	0x1d92	// 1d92 <__v2_printf+0x256>
+    1e14:	3940      	cmpnei      	r1, 0
+    1e16:	0aef      	bt      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e18:	3001      	movi      	r0, 1
+    1e1a:	3120      	movi      	r1, 32
+    1e1c:	06ec      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e1e:	3fa0      	bseti      	r7, 0
+    1e20:	06ea      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e22:	9580      	ld.w      	r4, (r5, 0x0)
+    1e24:	3cdf      	btsti      	r4, 31
+    1e26:	5d6e      	addi      	r3, r5, 4
+    1e28:	b887      	st.w      	r4, (r14, 0x1c)
+    1e2a:	0ee7      	bf      	0x1bf8	// 1bf8 <__v2_printf+0xbc>
+    1e2c:	9847      	ld.w      	r2, (r14, 0x1c)
+    1e2e:	3500      	movi      	r5, 0
+    1e30:	614a      	subu      	r5, r2
+    1e32:	b8a7      	st.w      	r5, (r14, 0x1c)
+    1e34:	6d4f      	mov      	r5, r3
+    1e36:	06e9      	br      	0x1c08	// 1c08 <__v2_printf+0xcc>
+    1e38:	98c6      	ld.w      	r6, (r14, 0x18)
+    1e3a:	8680      	ld.b      	r4, (r6, 0x0)
+    1e3c:	322a      	movi      	r2, 42
+    1e3e:	9866      	ld.w      	r3, (r14, 0x18)
+    1e40:	6492      	cmpne      	r4, r2
+    1e42:	2300      	addi      	r3, 1
+    1e44:	0c0b      	bf      	0x1e5a	// 1e5a <__v2_printf+0x31e>
+    1e46:	b865      	st.w      	r3, (r14, 0x14)
+    1e48:	3600      	movi      	r6, 0
+    1e4a:	3300      	movi      	r3, 0
+    1e4c:	2b2f      	subi      	r3, 48
+    1e4e:	60d0      	addu      	r3, r4
+    1e50:	3b09      	cmphsi      	r3, 10
+    1e52:	9845      	ld.w      	r2, (r14, 0x14)
+    1e54:	0c0c      	bf      	0x1e6c	// 1e6c <__v2_printf+0x330>
+    1e56:	b846      	st.w      	r2, (r14, 0x18)
+    1e58:	06a8      	br      	0x1ba8	// 1ba8 <__v2_printf+0x6c>
+    1e5a:	95c0      	ld.w      	r6, (r5, 0x0)
+    1e5c:	3edf      	btsti      	r6, 31
+    1e5e:	5d8e      	addi      	r4, r5, 4
+    1e60:	0c03      	bf      	0x1e66	// 1e66 <__v2_printf+0x32a>
+    1e62:	3600      	movi      	r6, 0
+    1e64:	2e00      	subi      	r6, 1
+    1e66:	6d53      	mov      	r5, r4
+    1e68:	b866      	st.w      	r3, (r14, 0x18)
+    1e6a:	06c5      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1e6c:	340a      	movi      	r4, 10
+    1e6e:	7d18      	mult      	r4, r6
+    1e70:	9845      	ld.w      	r2, (r14, 0x14)
+    1e72:	6d8f      	mov      	r6, r3
+    1e74:	6190      	addu      	r6, r4
+    1e76:	8280      	ld.b      	r4, (r2, 0x0)
+    1e78:	2200      	addi      	r2, 1
+    1e7a:	b845      	st.w      	r2, (r14, 0x14)
+    1e7c:	07e7      	br      	0x1e4a	// 1e4a <__v2_printf+0x30e>
+    1e7e:	3200      	movi      	r2, 0
+    1e80:	b847      	st.w      	r2, (r14, 0x1c)
+    1e82:	9867      	ld.w      	r3, (r14, 0x1c)
+    1e84:	320a      	movi      	r2, 10
+    1e86:	7cc8      	mult      	r3, r2
+    1e88:	2c2f      	subi      	r4, 48
+    1e8a:	610c      	addu      	r4, r3
+    1e8c:	b887      	st.w      	r4, (r14, 0x1c)
+    1e8e:	3300      	movi      	r3, 0
+    1e90:	9886      	ld.w      	r4, (r14, 0x18)
+    1e92:	5c42      	addi      	r2, r4, 1
+    1e94:	2b2f      	subi      	r3, 48
+    1e96:	8480      	ld.b      	r4, (r4, 0x0)
+    1e98:	60d0      	addu      	r3, r4
+    1e9a:	3b09      	cmphsi      	r3, 10
+    1e9c:	b846      	st.w      	r2, (r14, 0x18)
+    1e9e:	0ff2      	bf      	0x1e82	// 1e82 <__v2_printf+0x346>
+    1ea0:	07db      	br      	0x1e56	// 1e56 <__v2_printf+0x31a>
+    1ea2:	3fa6      	bseti      	r7, 6
+    1ea4:	06a8      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1ea6:	3fa4      	bseti      	r7, 4
+    1ea8:	06a6      	br      	0x1bf4	// 1bf4 <__v2_printf+0xb8>
+    1eaa:	3840      	cmpnei      	r0, 0
+    1eac:	0c05      	bf      	0x1eb6	// 1eb6 <__v2_printf+0x37a>
+    1eae:	3637      	movi      	r6, 55
+    1eb0:	1b01      	addi      	r3, r14, 4
+    1eb2:	618c      	addu      	r6, r3
+    1eb4:	a620      	st.b      	r1, (r6, 0x0)
+    1eb6:	033e      	lrw      	r1, 0x20000768	// 20b8 <__v2_printf+0x57c>
+    1eb8:	9100      	ld.w      	r0, (r1, 0x0)
+    1eba:	e00007cb 	bsr      	0x2e50	// 2e50 <__GI_strerror>
+    1ebe:	6d03      	mov      	r4, r0
+    1ec0:	e000073c 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    1ec4:	6d83      	mov      	r6, r0
+    1ec6:	b8a5      	st.w      	r5, (r14, 0x14)
+    1ec8:	3500      	movi      	r5, 0
+    1eca:	0554      	br      	0x2172	// 2172 <__v2_printf+0x636>
+    1ecc:	3840      	cmpnei      	r0, 0
+    1ece:	0c05      	bf      	0x1ed8	// 1ed8 <__v2_printf+0x39c>
+    1ed0:	3037      	movi      	r0, 55
+    1ed2:	1a01      	addi      	r2, r14, 4
+    1ed4:	6008      	addu      	r0, r2
+    1ed6:	a020      	st.b      	r1, (r0, 0x0)
+    1ed8:	3420      	movi      	r4, 32
+    1eda:	691c      	and      	r4, r7
+    1edc:	3c40      	cmpnei      	r4, 0
+    1ede:	0c1a      	bf      	0x1f12	// 1f12 <__v2_printf+0x3d6>
+    1ee0:	5d7e      	addi      	r3, r5, 8
+    1ee2:	9520      	ld.w      	r1, (r5, 0x0)
+    1ee4:	9541      	ld.w      	r2, (r5, 0x4)
+    1ee6:	b865      	st.w      	r3, (r14, 0x14)
+    1ee8:	b823      	st.w      	r1, (r14, 0xc)
+    1eea:	b844      	st.w      	r2, (r14, 0x10)
+    1eec:	9804      	ld.w      	r0, (r14, 0x10)
+    1eee:	38df      	btsti      	r0, 31
+    1ef0:	0c0f      	bf      	0x1f0e	// 1f0e <__v2_printf+0x3d2>
+    1ef2:	9883      	ld.w      	r4, (r14, 0xc)
+    1ef4:	98a4      	ld.w      	r5, (r14, 0x10)
+    1ef6:	3200      	movi      	r2, 0
+    1ef8:	3300      	movi      	r3, 0
+    1efa:	6488      	cmphs      	r2, r2
+    1efc:	6093      	subc      	r2, r4
+    1efe:	60d7      	subc      	r3, r5
+    1f00:	b843      	st.w      	r2, (r14, 0xc)
+    1f02:	b864      	st.w      	r3, (r14, 0x10)
+    1f04:	3237      	movi      	r2, 55
+    1f06:	1b01      	addi      	r3, r14, 4
+    1f08:	352d      	movi      	r5, 45
+    1f0a:	608c      	addu      	r2, r3
+    1f0c:	a2a0      	st.b      	r5, (r2, 0x0)
+    1f0e:	3401      	movi      	r4, 1
+    1f10:	0438      	br      	0x1f80	// 1f80 <__v2_printf+0x444>
+    1f12:	3310      	movi      	r3, 16
+    1f14:	68dc      	and      	r3, r7
+    1f16:	3b40      	cmpnei      	r3, 0
+    1f18:	0c08      	bf      	0x1f28	// 1f28 <__v2_printf+0x3ec>
+    1f1a:	5d4e      	addi      	r2, r5, 4
+    1f1c:	b845      	st.w      	r2, (r14, 0x14)
+    1f1e:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f20:	559f      	asri      	r4, r5, 31
+    1f22:	b8a3      	st.w      	r5, (r14, 0xc)
+    1f24:	b884      	st.w      	r4, (r14, 0x10)
+    1f26:	07e3      	br      	0x1eec	// 1eec <__v2_printf+0x3b0>
+    1f28:	3140      	movi      	r1, 64
+    1f2a:	685c      	and      	r1, r7
+    1f2c:	5d0e      	addi      	r0, r5, 4
+    1f2e:	3940      	cmpnei      	r1, 0
+    1f30:	95a0      	ld.w      	r5, (r5, 0x0)
+    1f32:	b805      	st.w      	r0, (r14, 0x14)
+    1f34:	0ff6      	bf      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f36:	7557      	sexth      	r5, r5
+    1f38:	07f4      	br      	0x1f20	// 1f20 <__v2_printf+0x3e4>
+    1f3a:	3506      	movi      	r5, 6
+    1f3c:	06a9      	br      	0x1c8e	// 1c8e <__v2_printf+0x152>
+    1f3e:	6d83      	mov      	r6, r0
+    1f40:	06ca      	br      	0x1cd4	// 1cd4 <__v2_printf+0x198>
+    1f42:	3201      	movi      	r2, 1
+    1f44:	689c      	and      	r2, r7
+    1f46:	3a40      	cmpnei      	r2, 0
+    1f48:	0ec8      	bf      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f4a:	1d12      	addi      	r5, r14, 72
+    1f4c:	6158      	addu      	r5, r6
+    1f4e:	332e      	movi      	r3, 46
+    1f50:	3000      	movi      	r0, 0
+    1f52:	a560      	st.b      	r3, (r5, 0x0)
+    1f54:	a501      	st.b      	r0, (r5, 0x1)
+    1f56:	06c1      	br      	0x1cd8	// 1cd8 <__v2_printf+0x19c>
+    1f58:	2400      	addi      	r4, 1
+    1f5a:	06cd      	br      	0x1cf4	// 1cf4 <__v2_printf+0x1b8>
+    1f5c:	6d0f      	mov      	r4, r3
+    1f5e:	06d2      	br      	0x1d02	// 1d02 <__v2_printf+0x1c6>
+    1f60:	3320      	movi      	r3, 32
+    1f62:	68dc      	and      	r3, r7
+    1f64:	3b40      	cmpnei      	r3, 0
+    1f66:	0c24      	bf      	0x1fae	// 1fae <__v2_printf+0x472>
+    1f68:	5d7e      	addi      	r3, r5, 8
+    1f6a:	9500      	ld.w      	r0, (r5, 0x0)
+    1f6c:	9521      	ld.w      	r1, (r5, 0x4)
+    1f6e:	b865      	st.w      	r3, (r14, 0x14)
+    1f70:	b803      	st.w      	r0, (r14, 0xc)
+    1f72:	b824      	st.w      	r1, (r14, 0x10)
+    1f74:	3400      	movi      	r4, 0
+    1f76:	3537      	movi      	r5, 55
+    1f78:	1801      	addi      	r0, r14, 4
+    1f7a:	3200      	movi      	r2, 0
+    1f7c:	6140      	addu      	r5, r0
+    1f7e:	a540      	st.b      	r2, (r5, 0x0)
+    1f80:	3100      	movi      	r1, 0
+    1f82:	2900      	subi      	r1, 1
+    1f84:	9803      	ld.w      	r0, (r14, 0xc)
+    1f86:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f88:	645a      	cmpne      	r6, r1
+    1f8a:	6c14      	or      	r0, r5
+    1f8c:	0cc8      	bf      	0x211c	// 211c <__v2_printf+0x5e0>
+    1f8e:	6c9f      	mov      	r2, r7
+    1f90:	3a87      	bclri      	r2, 7
+    1f92:	3840      	cmpnei      	r0, 0
+    1f94:	b848      	st.w      	r2, (r14, 0x20)
+    1f96:	08c6      	bt      	0x2122	// 2122 <__v2_printf+0x5e6>
+    1f98:	3e40      	cmpnei      	r6, 0
+    1f9a:	0cac      	bf      	0x20f2	// 20f2 <__v2_printf+0x5b6>
+    1f9c:	3c41      	cmpnei      	r4, 1
+    1f9e:	0c68      	bf      	0x206e	// 206e <__v2_printf+0x532>
+    1fa0:	3c42      	cmpnei      	r4, 2
+    1fa2:	0c8d      	bf      	0x20bc	// 20bc <__v2_printf+0x580>
+    1fa4:	3300      	movi      	r3, 0
+    1fa6:	3400      	movi      	r4, 0
+    1fa8:	b863      	st.w      	r3, (r14, 0xc)
+    1faa:	b884      	st.w      	r4, (r14, 0x10)
+    1fac:	04bf      	br      	0x212a	// 212a <__v2_printf+0x5ee>
+    1fae:	3010      	movi      	r0, 16
+    1fb0:	681c      	and      	r0, r7
+    1fb2:	3840      	cmpnei      	r0, 0
+    1fb4:	0c05      	bf      	0x1fbe	// 1fbe <__v2_printf+0x482>
+    1fb6:	5d8e      	addi      	r4, r5, 4
+    1fb8:	b885      	st.w      	r4, (r14, 0x14)
+    1fba:	95a0      	ld.w      	r5, (r5, 0x0)
+    1fbc:	0408      	br      	0x1fcc	// 1fcc <__v2_printf+0x490>
+    1fbe:	3240      	movi      	r2, 64
+    1fc0:	689c      	and      	r2, r7
+    1fc2:	5d2e      	addi      	r1, r5, 4
+    1fc4:	3a40      	cmpnei      	r2, 0
+    1fc6:	b825      	st.w      	r1, (r14, 0x14)
+    1fc8:	0ff9      	bf      	0x1fba	// 1fba <__v2_printf+0x47e>
+    1fca:	8da0      	ld.h      	r5, (r5, 0x0)
+    1fcc:	3400      	movi      	r4, 0
+    1fce:	b8a3      	st.w      	r5, (r14, 0xc)
+    1fd0:	b884      	st.w      	r4, (r14, 0x10)
+    1fd2:	07d2      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    1fd4:	5cb8      	addu      	r5, r4, r6
+    1fd6:	6cd3      	mov      	r3, r4
+    1fd8:	654e      	cmpne      	r3, r5
+    1fda:	0f77      	bf      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    1fdc:	8300      	ld.b      	r0, (r3, 0x0)
+    1fde:	3840      	cmpnei      	r0, 0
+    1fe0:	0ef4      	bf      	0x1dc8	// 1dc8 <__v2_printf+0x28c>
+    1fe2:	2300      	addi      	r3, 1
+    1fe4:	07fa      	br      	0x1fd8	// 1fd8 <__v2_printf+0x49c>
+    1fe6:	2300      	addi      	r3, 1
+    1fe8:	06ed      	br      	0x1dc2	// 1dc2 <__v2_printf+0x286>
+    1fea:	3420      	movi      	r4, 32
+    1fec:	691c      	and      	r4, r7
+    1fee:	3c40      	cmpnei      	r4, 0
+    1ff0:	0c09      	bf      	0x2002	// 2002 <__v2_printf+0x4c6>
+    1ff2:	5d7e      	addi      	r3, r5, 8
+    1ff4:	9520      	ld.w      	r1, (r5, 0x0)
+    1ff6:	9541      	ld.w      	r2, (r5, 0x4)
+    1ff8:	b865      	st.w      	r3, (r14, 0x14)
+    1ffa:	b823      	st.w      	r1, (r14, 0xc)
+    1ffc:	b844      	st.w      	r2, (r14, 0x10)
+    1ffe:	3401      	movi      	r4, 1
+    2000:	07bb      	br      	0x1f76	// 1f76 <__v2_printf+0x43a>
+    2002:	3310      	movi      	r3, 16
+    2004:	68dc      	and      	r3, r7
+    2006:	3b40      	cmpnei      	r3, 0
+    2008:	0c05      	bf      	0x2012	// 2012 <__v2_printf+0x4d6>
+    200a:	5d0e      	addi      	r0, r5, 4
+    200c:	b805      	st.w      	r0, (r14, 0x14)
+    200e:	95a0      	ld.w      	r5, (r5, 0x0)
+    2010:	0408      	br      	0x2020	// 2020 <__v2_printf+0x4e4>
+    2012:	3140      	movi      	r1, 64
+    2014:	685c      	and      	r1, r7
+    2016:	5d4e      	addi      	r2, r5, 4
+    2018:	3940      	cmpnei      	r1, 0
+    201a:	b845      	st.w      	r2, (r14, 0x14)
+    201c:	0ff9      	bf      	0x200e	// 200e <__v2_printf+0x4d2>
+    201e:	8da0      	ld.h      	r5, (r5, 0x0)
+    2020:	3400      	movi      	r4, 0
+    2022:	b8a3      	st.w      	r5, (r14, 0xc)
+    2024:	b884      	st.w      	r4, (r14, 0x10)
+    2026:	07ec      	br      	0x1ffe	// 1ffe <__v2_printf+0x4c2>
+    2028:	3840      	cmpnei      	r0, 0
+    202a:	0c05      	bf      	0x2034	// 2034 <__v2_printf+0x4f8>
+    202c:	3337      	movi      	r3, 55
+    202e:	1a01      	addi      	r2, r14, 4
+    2030:	60c8      	addu      	r3, r2
+    2032:	a320      	st.b      	r1, (r3, 0x0)
+    2034:	103f      	lrw      	r1, 0x6415	// 20b0 <__v2_printf+0x574>
+    2036:	06d2      	br      	0x1dda	// 1dda <__v2_printf+0x29e>
+    2038:	3310      	movi      	r3, 16
+    203a:	68dc      	and      	r3, r7
+    203c:	3b40      	cmpnei      	r3, 0
+    203e:	0c05      	bf      	0x2048	// 2048 <__v2_printf+0x50c>
+    2040:	5d0e      	addi      	r0, r5, 4
+    2042:	b805      	st.w      	r0, (r14, 0x14)
+    2044:	95a0      	ld.w      	r5, (r5, 0x0)
+    2046:	0408      	br      	0x2056	// 2056 <__v2_printf+0x51a>
+    2048:	3240      	movi      	r2, 64
+    204a:	689c      	and      	r2, r7
+    204c:	5d2e      	addi      	r1, r5, 4
+    204e:	3a40      	cmpnei      	r2, 0
+    2050:	b825      	st.w      	r1, (r14, 0x14)
+    2052:	0ff9      	bf      	0x2044	// 2044 <__v2_printf+0x508>
+    2054:	8da0      	ld.h      	r5, (r5, 0x0)
+    2056:	3300      	movi      	r3, 0
+    2058:	b8a3      	st.w      	r5, (r14, 0xc)
+    205a:	b864      	st.w      	r3, (r14, 0x10)
+    205c:	06ca      	br      	0x1df0	// 1df0 <__v2_printf+0x2b4>
+    205e:	6cd3      	mov      	r3, r4
+    2060:	0467      	br      	0x212e	// 212e <__v2_printf+0x5f2>
+    2062:	9884      	ld.w      	r4, (r14, 0x10)
+    2064:	3c40      	cmpnei      	r4, 0
+    2066:	080b      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    2068:	9843      	ld.w      	r2, (r14, 0xc)
+    206a:	3a09      	cmphsi      	r2, 10
+    206c:	0808      	bt      	0x207c	// 207c <__v2_printf+0x540>
+    206e:	9883      	ld.w      	r4, (r14, 0xc)
+    2070:	242f      	addi      	r4, 48
+    2072:	1f1a      	addi      	r7, r14, 104
+    2074:	a787      	st.b      	r4, (r7, 0x7)
+    2076:	1c12      	addi      	r4, r14, 72
+    2078:	2426      	addi      	r4, 39
+    207a:	0478      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    207c:	1c1c      	addi      	r4, r14, 112
+    207e:	3530      	movi      	r5, 48
+    2080:	320a      	movi      	r2, 10
+    2082:	3300      	movi      	r3, 0
+    2084:	9803      	ld.w      	r0, (r14, 0xc)
+    2086:	9824      	ld.w      	r1, (r14, 0x10)
+    2088:	e00002c2 	bsr      	0x260c	// 260c <__umoddi3>
+    208c:	6014      	addu      	r0, r5
+    208e:	2c00      	subi      	r4, 1
+    2090:	a400      	st.b      	r0, (r4, 0x0)
+    2092:	320a      	movi      	r2, 10
+    2094:	9803      	ld.w      	r0, (r14, 0xc)
+    2096:	9824      	ld.w      	r1, (r14, 0x10)
+    2098:	3300      	movi      	r3, 0
+    209a:	e00000e3 	bsr      	0x2260	// 2260 <__udivdi3>
+    209e:	b803      	st.w      	r0, (r14, 0xc)
+    20a0:	b824      	st.w      	r1, (r14, 0x10)
+    20a2:	9823      	ld.w      	r1, (r14, 0xc)
+    20a4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20a6:	6c5c      	or      	r1, r7
+    20a8:	3940      	cmpnei      	r1, 0
+    20aa:	0beb      	bt      	0x2080	// 2080 <__v2_printf+0x544>
+    20ac:	045f      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20ae:	0000      	bkpt
+    20b0:	00006415 	.long	0x00006415
+    20b4:	00006404 	.long	0x00006404
+    20b8:	20000768 	.long	0x20000768
+    20bc:	3300      	movi      	r3, 0
+    20be:	3400      	movi      	r4, 0
+    20c0:	b863      	st.w      	r3, (r14, 0xc)
+    20c2:	b884      	st.w      	r4, (r14, 0x10)
+    20c4:	1c1c      	addi      	r4, r14, 112
+    20c6:	320f      	movi      	r2, 15
+    20c8:	9803      	ld.w      	r0, (r14, 0xc)
+    20ca:	982a      	ld.w      	r1, (r14, 0x28)
+    20cc:	6808      	and      	r0, r2
+    20ce:	6004      	addu      	r0, r1
+    20d0:	80a0      	ld.b      	r5, (r0, 0x0)
+    20d2:	2c00      	subi      	r4, 1
+    20d4:	98e4      	ld.w      	r7, (r14, 0x10)
+    20d6:	a4a0      	st.b      	r5, (r4, 0x0)
+    20d8:	98a4      	ld.w      	r5, (r14, 0x10)
+    20da:	9863      	ld.w      	r3, (r14, 0xc)
+    20dc:	471c      	lsli      	r0, r7, 28
+    20de:	4de4      	lsri      	r7, r5, 4
+    20e0:	4b24      	lsri      	r1, r3, 4
+    20e2:	b8e4      	st.w      	r7, (r14, 0x10)
+    20e4:	6c04      	or      	r0, r1
+    20e6:	9864      	ld.w      	r3, (r14, 0x10)
+    20e8:	b803      	st.w      	r0, (r14, 0xc)
+    20ea:	6c0c      	or      	r0, r3
+    20ec:	3840      	cmpnei      	r0, 0
+    20ee:	0bed      	bt      	0x20c8	// 20c8 <__v2_printf+0x58c>
+    20f0:	043d      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    20f2:	3c40      	cmpnei      	r4, 0
+    20f4:	0808      	bt      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20f6:	3301      	movi      	r3, 1
+    20f8:	68dc      	and      	r3, r7
+    20fa:	3b40      	cmpnei      	r3, 0
+    20fc:	0c04      	bf      	0x2104	// 2104 <__v2_printf+0x5c8>
+    20fe:	1f1a      	addi      	r7, r14, 104
+    2100:	3430      	movi      	r4, 48
+    2102:	07b9      	br      	0x2074	// 2074 <__v2_printf+0x538>
+    2104:	1c1c      	addi      	r4, r14, 112
+    2106:	0432      	br      	0x216a	// 216a <__v2_printf+0x62e>
+    2108:	322b      	movi      	r2, 43
+    210a:	649a      	cmpne      	r6, r2
+    210c:	0802      	bt      	0x2110	// 2110 <__v2_printf+0x5d4>
+    210e:	0614      	br      	0x1d36	// 1d36 <__v2_printf+0x1fa>
+    2110:	1c12      	addi      	r4, r14, 72
+    2112:	6c13      	mov      	r0, r4
+    2114:	e0000612 	bsr      	0x2d38	// 2d38 <__strlen_fast>
+    2118:	6d83      	mov      	r6, r0
+    211a:	06d7      	br      	0x1ec8	// 1ec8 <__v2_printf+0x38c>
+    211c:	3840      	cmpnei      	r0, 0
+    211e:	b8e8      	st.w      	r7, (r14, 0x20)
+    2120:	0f3e      	bf      	0x1f9c	// 1f9c <__v2_printf+0x460>
+    2122:	3c41      	cmpnei      	r4, 1
+    2124:	0f9f      	bf      	0x2062	// 2062 <__v2_printf+0x526>
+    2126:	3c42      	cmpnei      	r4, 2
+    2128:	0fce      	bf      	0x20c4	// 20c4 <__v2_printf+0x588>
+    212a:	1b1c      	addi      	r3, r14, 112
+    212c:	3707      	movi      	r7, 7
+    212e:	9823      	ld.w      	r1, (r14, 0xc)
+    2130:	685c      	and      	r1, r7
+    2132:	212f      	addi      	r1, 48
+    2134:	9804      	ld.w      	r0, (r14, 0x10)
+    2136:	7484      	zextb      	r2, r1
+    2138:	9823      	ld.w      	r1, (r14, 0xc)
+    213a:	40bd      	lsli      	r5, r0, 29
+    213c:	4903      	lsri      	r0, r1, 3
+    213e:	9824      	ld.w      	r1, (r14, 0x10)
+    2140:	4923      	lsri      	r1, r1, 3
+    2142:	b824      	st.w      	r1, (r14, 0x10)
+    2144:	6d40      	or      	r5, r0
+    2146:	9804      	ld.w      	r0, (r14, 0x10)
+    2148:	b8a3      	st.w      	r5, (r14, 0xc)
+    214a:	6d40      	or      	r5, r0
+    214c:	5b83      	subi      	r4, r3, 1
+    214e:	3d40      	cmpnei      	r5, 0
+    2150:	a440      	st.b      	r2, (r4, 0x0)
+    2152:	0b86      	bt      	0x205e	// 205e <__v2_printf+0x522>
+    2154:	3701      	movi      	r7, 1
+    2156:	9828      	ld.w      	r1, (r14, 0x20)
+    2158:	69c4      	and      	r7, r1
+    215a:	3f40      	cmpnei      	r7, 0
+    215c:	0c07      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    215e:	3530      	movi      	r5, 48
+    2160:	654a      	cmpne      	r2, r5
+    2162:	0c04      	bf      	0x216a	// 216a <__v2_printf+0x62e>
+    2164:	5b87      	subi      	r4, r3, 2
+    2166:	3330      	movi      	r3, 48
+    2168:	a460      	st.b      	r3, (r4, 0x0)
+    216a:	6d5b      	mov      	r5, r6
+    216c:	1e1c      	addi      	r6, r14, 112
+    216e:	6192      	subu      	r6, r4
+    2170:	98e8      	ld.w      	r7, (r14, 0x20)
+    2172:	6595      	cmplt      	r5, r6
+    2174:	b8a8      	st.w      	r5, (r14, 0x20)
+    2176:	0c02      	bf      	0x217a	// 217a <__v2_printf+0x63e>
+    2178:	b8c8      	st.w      	r6, (r14, 0x20)
+    217a:	3037      	movi      	r0, 55
+    217c:	1b01      	addi      	r3, r14, 4
+    217e:	600c      	addu      	r0, r3
+    2180:	8040      	ld.b      	r2, (r0, 0x0)
+    2182:	3a40      	cmpnei      	r2, 0
+    2184:	0c04      	bf      	0x218c	// 218c <__v2_printf+0x650>
+    2186:	9828      	ld.w      	r1, (r14, 0x20)
+    2188:	2100      	addi      	r1, 1
+    218a:	b828      	st.w      	r1, (r14, 0x20)
+    218c:	3002      	movi      	r0, 2
+    218e:	681c      	and      	r0, r7
+    2190:	3840      	cmpnei      	r0, 0
+    2192:	b80b      	st.w      	r0, (r14, 0x2c)
+    2194:	0c04      	bf      	0x219c	// 219c <__v2_printf+0x660>
+    2196:	9868      	ld.w      	r3, (r14, 0x20)
+    2198:	2301      	addi      	r3, 2
+    219a:	b868      	st.w      	r3, (r14, 0x20)
+    219c:	3284      	movi      	r2, 132
+    219e:	689c      	and      	r2, r7
+    21a0:	3a40      	cmpnei      	r2, 0
+    21a2:	b84c      	st.w      	r2, (r14, 0x30)
+    21a4:	080b      	bt      	0x21ba	// 21ba <__v2_printf+0x67e>
+    21a6:	3310      	movi      	r3, 16
+    21a8:	1a0c      	addi      	r2, r14, 48
+    21aa:	9827      	ld.w      	r1, (r14, 0x1c)
+    21ac:	9808      	ld.w      	r0, (r14, 0x20)
+    21ae:	60c8      	addu      	r3, r2
+    21b0:	5901      	subu      	r0, r1, r0
+    21b2:	6f4f      	mov      	r13, r3
+    21b4:	1129      	lrw      	r1, 0x5fc4	// 2258 <__v2_printf+0x71c>
+    21b6:	e3fffca9 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    21ba:	3137      	movi      	r1, 55
+    21bc:	1801      	addi      	r0, r14, 4
+    21be:	6040      	addu      	r1, r0
+    21c0:	8160      	ld.b      	r3, (r1, 0x0)
+    21c2:	3b40      	cmpnei      	r3, 0
+    21c4:	0c0b      	bf      	0x21da	// 21da <__v2_printf+0x69e>
+    21c6:	9830      	ld.w      	r1, (r14, 0x40)
+    21c8:	9101      	ld.w      	r0, (r1, 0x4)
+    21ca:	b802      	st.w      	r0, (r14, 0x8)
+    21cc:	1b0c      	addi      	r3, r14, 48
+    21ce:	300b      	movi      	r0, 11
+    21d0:	9140      	ld.w      	r2, (r1, 0x0)
+    21d2:	600c      	addu      	r0, r3
+    21d4:	3101      	movi      	r1, 1
+    21d6:	9862      	ld.w      	r3, (r14, 0x8)
+    21d8:	7bcd      	jsr      	r3
+    21da:	984b      	ld.w      	r2, (r14, 0x2c)
+    21dc:	3a40      	cmpnei      	r2, 0
+    21de:	0c07      	bf      	0x21ec	// 21ec <__v2_printf+0x6b0>
+    21e0:	9830      	ld.w      	r1, (r14, 0x40)
+    21e2:	9140      	ld.w      	r2, (r1, 0x0)
+    21e4:	9161      	ld.w      	r3, (r1, 0x4)
+    21e6:	180f      	addi      	r0, r14, 60
+    21e8:	3102      	movi      	r1, 2
+    21ea:	7bcd      	jsr      	r3
+    21ec:	3080      	movi      	r0, 128
+    21ee:	984c      	ld.w      	r2, (r14, 0x30)
+    21f0:	640a      	cmpne      	r2, r0
+    21f2:	080b      	bt      	0x2208	// 2208 <__v2_printf+0x6cc>
+    21f4:	9827      	ld.w      	r1, (r14, 0x1c)
+    21f6:	9868      	ld.w      	r3, (r14, 0x20)
+    21f8:	590d      	subu      	r0, r1, r3
+    21fa:	1a0c      	addi      	r2, r14, 48
+    21fc:	3110      	movi      	r1, 16
+    21fe:	6048      	addu      	r1, r2
+    2200:	6f47      	mov      	r13, r1
+    2202:	1037      	lrw      	r1, 0x5fd4	// 225c <__v2_printf+0x720>
+    2204:	e3fffc82 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    2208:	5d19      	subu      	r0, r5, r6
+    220a:	1b0c      	addi      	r3, r14, 48
+    220c:	3510      	movi      	r5, 16
+    220e:	614c      	addu      	r5, r3
+    2210:	6f57      	mov      	r13, r5
+    2212:	6d77      	mov      	r5, r13
+    2214:	1032      	lrw      	r1, 0x5fd4	// 225c <__v2_printf+0x720>
+    2216:	e3fffc79 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    221a:	9500      	ld.w      	r0, (r5, 0x0)
+    221c:	9040      	ld.w      	r2, (r0, 0x0)
+    221e:	9061      	ld.w      	r3, (r0, 0x4)
+    2220:	6c13      	mov      	r0, r4
+    2222:	3404      	movi      	r4, 4
+    2224:	6c5b      	mov      	r1, r6
+    2226:	691c      	and      	r4, r7
+    2228:	7bcd      	jsr      	r3
+    222a:	3c40      	cmpnei      	r4, 0
+    222c:	0c08      	bf      	0x223c	// 223c <__v2_printf+0x700>
+    222e:	9828      	ld.w      	r1, (r14, 0x20)
+    2230:	98c7      	ld.w      	r6, (r14, 0x1c)
+    2232:	5e05      	subu      	r0, r6, r1
+    2234:	6f57      	mov      	r13, r5
+    2236:	1029      	lrw      	r1, 0x5fc4	// 2258 <__v2_printf+0x71c>
+    2238:	e3fffc68 	bsr      	0x1b08	// 1b08 <PAD.1851>
+    223c:	98a7      	ld.w      	r5, (r14, 0x1c)
+    223e:	9848      	ld.w      	r2, (r14, 0x20)
+    2240:	6495      	cmplt      	r5, r2
+    2242:	0c02      	bf      	0x2246	// 2246 <__v2_printf+0x70a>
+    2244:	6d4b      	mov      	r5, r2
+    2246:	9809      	ld.w      	r0, (r14, 0x24)
+    2248:	6014      	addu      	r0, r5
+    224a:	b809      	st.w      	r0, (r14, 0x24)
+    224c:	98a5      	ld.w      	r5, (r14, 0x14)
+    224e:	e800fc84 	br      	0x1b56	// 1b56 <__v2_printf+0x1a>
+    2252:	9809      	ld.w      	r0, (r14, 0x24)
+    2254:	141c      	addi      	r14, r14, 112
+    2256:	1494      	pop      	r4-r7, r15
+    2258:	00005fc4 	.long	0x00005fc4
+    225c:	00005fd4 	.long	0x00005fd4
+
+00002260 <__udivdi3>:
+    2260:	14d4      	push      	r4-r7, r15
+    2262:	1426      	subi      	r14, r14, 24
+    2264:	6dc7      	mov      	r7, r1
+    2266:	3b40      	cmpnei      	r3, 0
+    2268:	6d03      	mov      	r4, r0
+    226a:	6c4f      	mov      	r1, r3
+    226c:	6d8b      	mov      	r6, r2
+    226e:	b800      	st.w      	r0, (r14, 0x0)
+    2270:	6d5f      	mov      	r5, r7
+    2272:	085b      	bt      	0x2328	// 2328 <__udivdi3+0xc8>
+    2274:	649c      	cmphs      	r7, r2
+    2276:	0874      	bt      	0x235e	// 235e <__udivdi3+0xfe>
+    2278:	003d      	lrw      	r1, 0xffff	// 2600 <__udivdi3+0x3a0>
+    227a:	6484      	cmphs      	r1, r2
+    227c:	0cdc      	bf      	0x2434	// 2434 <__udivdi3+0x1d4>
+    227e:	31ff      	movi      	r1, 255
+    2280:	6484      	cmphs      	r1, r2
+    2282:	0802      	bt      	0x2286	// 2286 <__udivdi3+0x26>
+    2284:	3308      	movi      	r3, 8
+    2286:	6c4b      	mov      	r1, r2
+    2288:	704d      	lsr      	r1, r3
+    228a:	0100      	lrw      	r0, 0x5ec4	// 2604 <__udivdi3+0x3a4>
+    228c:	6040      	addu      	r1, r0
+    228e:	8120      	ld.b      	r1, (r1, 0x0)
+    2290:	60c4      	addu      	r3, r1
+    2292:	3120      	movi      	r1, 32
+    2294:	604e      	subu      	r1, r3
+    2296:	3940      	cmpnei      	r1, 0
+    2298:	0c09      	bf      	0x22aa	// 22aa <__udivdi3+0x4a>
+    229a:	6d53      	mov      	r5, r4
+    229c:	7084      	lsl      	r2, r1
+    229e:	71c4      	lsl      	r7, r1
+    22a0:	714d      	lsr      	r5, r3
+    22a2:	7104      	lsl      	r4, r1
+    22a4:	6d8b      	mov      	r6, r2
+    22a6:	6d5c      	or      	r5, r7
+    22a8:	b880      	st.w      	r4, (r14, 0x0)
+    22aa:	4e90      	lsri      	r4, r6, 16
+    22ac:	6c53      	mov      	r1, r4
+    22ae:	6c17      	mov      	r0, r5
+    22b0:	e00010d8 	bsr      	0x4460	// 4460 <__umodsi3>
+    22b4:	b801      	st.w      	r0, (r14, 0x4)
+    22b6:	6c53      	mov      	r1, r4
+    22b8:	6c17      	mov      	r0, r5
+    22ba:	e00010af 	bsr      	0x4418	// 4418 <__udivsi3>
+    22be:	75d9      	zexth      	r7, r6
+    22c0:	9861      	ld.w      	r3, (r14, 0x4)
+    22c2:	9820      	ld.w      	r1, (r14, 0x0)
+    22c4:	6c9f      	mov      	r2, r7
+    22c6:	4370      	lsli      	r3, r3, 16
+    22c8:	4930      	lsri      	r1, r1, 16
+    22ca:	7c80      	mult      	r2, r0
+    22cc:	6cc4      	or      	r3, r1
+    22ce:	648c      	cmphs      	r3, r2
+    22d0:	6d43      	mov      	r5, r0
+    22d2:	0808      	bt      	0x22e2	// 22e2 <__udivdi3+0x82>
+    22d4:	60d8      	addu      	r3, r6
+    22d6:	658c      	cmphs      	r3, r6
+    22d8:	5823      	subi      	r1, r0, 1
+    22da:	0c03      	bf      	0x22e0	// 22e0 <__udivdi3+0x80>
+    22dc:	648c      	cmphs      	r3, r2
+    22de:	0d8e      	bf      	0x25fa	// 25fa <__udivdi3+0x39a>
+    22e0:	6d47      	mov      	r5, r1
+    22e2:	60ca      	subu      	r3, r2
+    22e4:	6c53      	mov      	r1, r4
+    22e6:	6c0f      	mov      	r0, r3
+    22e8:	b862      	st.w      	r3, (r14, 0x8)
+    22ea:	e00010bb 	bsr      	0x4460	// 4460 <__umodsi3>
+    22ee:	9862      	ld.w      	r3, (r14, 0x8)
+    22f0:	b801      	st.w      	r0, (r14, 0x4)
+    22f2:	6c53      	mov      	r1, r4
+    22f4:	6c0f      	mov      	r0, r3
+    22f6:	e0001091 	bsr      	0x4418	// 4418 <__udivsi3>
+    22fa:	9841      	ld.w      	r2, (r14, 0x4)
+    22fc:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2300:	4250      	lsli      	r2, r2, 16
+    2302:	74cd      	zexth      	r3, r3
+    2304:	7dc0      	mult      	r7, r0
+    2306:	6c8c      	or      	r2, r3
+    2308:	65c8      	cmphs      	r2, r7
+    230a:	6d03      	mov      	r4, r0
+    230c:	0808      	bt      	0x231c	// 231c <__udivdi3+0xbc>
+    230e:	6098      	addu      	r2, r6
+    2310:	6588      	cmphs      	r2, r6
+    2312:	5863      	subi      	r3, r0, 1
+    2314:	0d4d      	bf      	0x25ae	// 25ae <__udivdi3+0x34e>
+    2316:	65c8      	cmphs      	r2, r7
+    2318:	094b      	bt      	0x25ae	// 25ae <__udivdi3+0x34e>
+    231a:	2c01      	subi      	r4, 2
+    231c:	4510      	lsli      	r0, r5, 16
+    231e:	3700      	movi      	r7, 0
+    2320:	6c10      	or      	r0, r4
+    2322:	6c5f      	mov      	r1, r7
+    2324:	1406      	addi      	r14, r14, 24
+    2326:	1494      	pop      	r4-r7, r15
+    2328:	64dc      	cmphs      	r7, r3
+    232a:	0c76      	bf      	0x2416	// 2416 <__udivdi3+0x1b6>
+    232c:	026a      	lrw      	r3, 0xffff	// 2600 <__udivdi3+0x3a0>
+    232e:	644c      	cmphs      	r3, r1
+    2330:	0878      	bt      	0x2420	// 2420 <__udivdi3+0x1c0>
+    2332:	0269      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2334:	644c      	cmphs      	r3, r1
+    2336:	0d48      	bf      	0x25c6	// 25c6 <__udivdi3+0x366>
+    2338:	3610      	movi      	r6, 16
+    233a:	6cc7      	mov      	r3, r1
+    233c:	70d9      	lsr      	r3, r6
+    233e:	020d      	lrw      	r0, 0x5ec4	// 2604 <__udivdi3+0x3a4>
+    2340:	60c0      	addu      	r3, r0
+    2342:	8360      	ld.b      	r3, (r3, 0x0)
+    2344:	618c      	addu      	r6, r3
+    2346:	3020      	movi      	r0, 32
+    2348:	5879      	subu      	r3, r0, r6
+    234a:	3b40      	cmpnei      	r3, 0
+    234c:	b860      	st.w      	r3, (r14, 0x0)
+    234e:	0878      	bt      	0x243e	// 243e <__udivdi3+0x1de>
+    2350:	65c4      	cmphs      	r1, r7
+    2352:	0d40      	bf      	0x25d2	// 25d2 <__udivdi3+0x372>
+    2354:	6490      	cmphs      	r4, r2
+    2356:	6c0f      	mov      	r0, r3
+    2358:	600d      	addc      	r0, r3
+    235a:	3700      	movi      	r7, 0
+    235c:	045f      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    235e:	3a40      	cmpnei      	r2, 0
+    2360:	0808      	bt      	0x2370	// 2370 <__udivdi3+0x110>
+    2362:	3100      	movi      	r1, 0
+    2364:	3001      	movi      	r0, 1
+    2366:	b861      	st.w      	r3, (r14, 0x4)
+    2368:	e0001058 	bsr      	0x4418	// 4418 <__udivsi3>
+    236c:	6d83      	mov      	r6, r0
+    236e:	9861      	ld.w      	r3, (r14, 0x4)
+    2370:	025b      	lrw      	r2, 0xffff	// 2600 <__udivdi3+0x3a0>
+    2372:	6588      	cmphs      	r2, r6
+    2374:	085b      	bt      	0x242a	// 242a <__udivdi3+0x1ca>
+    2376:	027a      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2378:	658c      	cmphs      	r3, r6
+    237a:	0d28      	bf      	0x25ca	// 25ca <__udivdi3+0x36a>
+    237c:	3310      	movi      	r3, 16
+    237e:	6c9b      	mov      	r2, r6
+    2380:	023e      	lrw      	r1, 0x5ec4	// 2604 <__udivdi3+0x3a4>
+    2382:	708d      	lsr      	r2, r3
+    2384:	6084      	addu      	r2, r1
+    2386:	8240      	ld.b      	r2, (r2, 0x0)
+    2388:	5a2c      	addu      	r1, r2, r3
+    238a:	3220      	movi      	r2, 32
+    238c:	6086      	subu      	r2, r1
+    238e:	3a40      	cmpnei      	r2, 0
+    2390:	08c0      	bt      	0x2510	// 2510 <__udivdi3+0x2b0>
+    2392:	74d9      	zexth      	r3, r6
+    2394:	5f99      	subu      	r4, r7, r6
+    2396:	4eb0      	lsri      	r5, r6, 16
+    2398:	b861      	st.w      	r3, (r14, 0x4)
+    239a:	3701      	movi      	r7, 1
+    239c:	6c57      	mov      	r1, r5
+    239e:	6c13      	mov      	r0, r4
+    23a0:	e0001060 	bsr      	0x4460	// 4460 <__umodsi3>
+    23a4:	b802      	st.w      	r0, (r14, 0x8)
+    23a6:	6c57      	mov      	r1, r5
+    23a8:	6c13      	mov      	r0, r4
+    23aa:	e0001037 	bsr      	0x4418	// 4418 <__udivsi3>
+    23ae:	9862      	ld.w      	r3, (r14, 0x8)
+    23b0:	4330      	lsli      	r1, r3, 16
+    23b2:	9860      	ld.w      	r3, (r14, 0x0)
+    23b4:	9841      	ld.w      	r2, (r14, 0x4)
+    23b6:	4b70      	lsri      	r3, r3, 16
+    23b8:	7c80      	mult      	r2, r0
+    23ba:	6cc4      	or      	r3, r1
+    23bc:	648c      	cmphs      	r3, r2
+    23be:	6d03      	mov      	r4, r0
+    23c0:	0808      	bt      	0x23d0	// 23d0 <__udivdi3+0x170>
+    23c2:	60d8      	addu      	r3, r6
+    23c4:	658c      	cmphs      	r3, r6
+    23c6:	5823      	subi      	r1, r0, 1
+    23c8:	0c03      	bf      	0x23ce	// 23ce <__udivdi3+0x16e>
+    23ca:	648c      	cmphs      	r3, r2
+    23cc:	0d14      	bf      	0x25f4	// 25f4 <__udivdi3+0x394>
+    23ce:	6d07      	mov      	r4, r1
+    23d0:	60ca      	subu      	r3, r2
+    23d2:	6c57      	mov      	r1, r5
+    23d4:	6c0f      	mov      	r0, r3
+    23d6:	b863      	st.w      	r3, (r14, 0xc)
+    23d8:	e0001044 	bsr      	0x4460	// 4460 <__umodsi3>
+    23dc:	9863      	ld.w      	r3, (r14, 0xc)
+    23de:	6c57      	mov      	r1, r5
+    23e0:	b802      	st.w      	r0, (r14, 0x8)
+    23e2:	6c0f      	mov      	r0, r3
+    23e4:	e000101a 	bsr      	0x4418	// 4418 <__udivsi3>
+    23e8:	9842      	ld.w      	r2, (r14, 0x8)
+    23ea:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    23ee:	9821      	ld.w      	r1, (r14, 0x4)
+    23f0:	4250      	lsli      	r2, r2, 16
+    23f2:	74cd      	zexth      	r3, r3
+    23f4:	7c40      	mult      	r1, r0
+    23f6:	6cc8      	or      	r3, r2
+    23f8:	644c      	cmphs      	r3, r1
+    23fa:	6d43      	mov      	r5, r0
+    23fc:	0808      	bt      	0x240c	// 240c <__udivdi3+0x1ac>
+    23fe:	60d8      	addu      	r3, r6
+    2400:	658c      	cmphs      	r3, r6
+    2402:	5843      	subi      	r2, r0, 1
+    2404:	0cd3      	bf      	0x25aa	// 25aa <__udivdi3+0x34a>
+    2406:	644c      	cmphs      	r3, r1
+    2408:	08d1      	bt      	0x25aa	// 25aa <__udivdi3+0x34a>
+    240a:	2d01      	subi      	r5, 2
+    240c:	4410      	lsli      	r0, r4, 16
+    240e:	6c14      	or      	r0, r5
+    2410:	6c5f      	mov      	r1, r7
+    2412:	1406      	addi      	r14, r14, 24
+    2414:	1494      	pop      	r4-r7, r15
+    2416:	3700      	movi      	r7, 0
+    2418:	3000      	movi      	r0, 0
+    241a:	6c5f      	mov      	r1, r7
+    241c:	1406      	addi      	r14, r14, 24
+    241e:	1494      	pop      	r4-r7, r15
+    2420:	33ff      	movi      	r3, 255
+    2422:	644c      	cmphs      	r3, r1
+    2424:	6583      	mvcv      	r6
+    2426:	46c3      	lsli      	r6, r6, 3
+    2428:	0789      	br      	0x233a	// 233a <__udivdi3+0xda>
+    242a:	32ff      	movi      	r2, 255
+    242c:	6588      	cmphs      	r2, r6
+    242e:	0ba8      	bt      	0x237e	// 237e <__udivdi3+0x11e>
+    2430:	3308      	movi      	r3, 8
+    2432:	07a6      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    2434:	1375      	lrw      	r3, 0xffffff	// 2608 <__udivdi3+0x3a8>
+    2436:	648c      	cmphs      	r3, r2
+    2438:	0ccb      	bf      	0x25ce	// 25ce <__udivdi3+0x36e>
+    243a:	3310      	movi      	r3, 16
+    243c:	0725      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    243e:	9800      	ld.w      	r0, (r14, 0x0)
+    2440:	6ccb      	mov      	r3, r2
+    2442:	6d4b      	mov      	r5, r2
+    2444:	7040      	lsl      	r1, r0
+    2446:	7140      	lsl      	r5, r0
+    2448:	70d9      	lsr      	r3, r6
+    244a:	6cc4      	or      	r3, r1
+    244c:	b8a3      	st.w      	r5, (r14, 0xc)
+    244e:	6d53      	mov      	r5, r4
+    2450:	6c4f      	mov      	r1, r3
+    2452:	7159      	lsr      	r5, r6
+    2454:	6cdf      	mov      	r3, r7
+    2456:	71c0      	lsl      	r7, r0
+    2458:	6d5c      	or      	r5, r7
+    245a:	70d9      	lsr      	r3, r6
+    245c:	b8a1      	st.w      	r5, (r14, 0x4)
+    245e:	49b0      	lsri      	r5, r1, 16
+    2460:	b822      	st.w      	r1, (r14, 0x8)
+    2462:	75c5      	zexth      	r7, r1
+    2464:	6c0f      	mov      	r0, r3
+    2466:	6c57      	mov      	r1, r5
+    2468:	b864      	st.w      	r3, (r14, 0x10)
+    246a:	e0000ffb 	bsr      	0x4460	// 4460 <__umodsi3>
+    246e:	9864      	ld.w      	r3, (r14, 0x10)
+    2470:	6d83      	mov      	r6, r0
+    2472:	6c57      	mov      	r1, r5
+    2474:	6c0f      	mov      	r0, r3
+    2476:	e0000fd1 	bsr      	0x4418	// 4418 <__udivsi3>
+    247a:	6c5f      	mov      	r1, r7
+    247c:	7c40      	mult      	r1, r0
+    247e:	6c87      	mov      	r2, r1
+    2480:	4630      	lsli      	r1, r6, 16
+    2482:	98c1      	ld.w      	r6, (r14, 0x4)
+    2484:	4ed0      	lsri      	r6, r6, 16
+    2486:	6d84      	or      	r6, r1
+    2488:	6498      	cmphs      	r6, r2
+    248a:	6cc3      	mov      	r3, r0
+    248c:	0807      	bt      	0x249a	// 249a <__udivdi3+0x23a>
+    248e:	5823      	subi      	r1, r0, 1
+    2490:	9802      	ld.w      	r0, (r14, 0x8)
+    2492:	6180      	addu      	r6, r0
+    2494:	6418      	cmphs      	r6, r0
+    2496:	08a6      	bt      	0x25e2	// 25e2 <__udivdi3+0x382>
+    2498:	6cc7      	mov      	r3, r1
+    249a:	618a      	subu      	r6, r2
+    249c:	6c57      	mov      	r1, r5
+    249e:	6c1b      	mov      	r0, r6
+    24a0:	b865      	st.w      	r3, (r14, 0x14)
+    24a2:	e0000fdf 	bsr      	0x4460	// 4460 <__umodsi3>
+    24a6:	b804      	st.w      	r0, (r14, 0x10)
+    24a8:	6c57      	mov      	r1, r5
+    24aa:	6c1b      	mov      	r0, r6
+    24ac:	e0000fb6 	bsr      	0x4418	// 4418 <__udivsi3>
+    24b0:	9864      	ld.w      	r3, (r14, 0x10)
+    24b2:	6c9f      	mov      	r2, r7
+    24b4:	43f0      	lsli      	r7, r3, 16
+    24b6:	d86e1002 	ld.h      	r3, (r14, 0x4)
+    24ba:	744d      	zexth      	r1, r3
+    24bc:	7c80      	mult      	r2, r0
+    24be:	6dc4      	or      	r7, r1
+    24c0:	649c      	cmphs      	r7, r2
+    24c2:	9865      	ld.w      	r3, (r14, 0x14)
+    24c4:	0807      	bt      	0x24d2	// 24d2 <__udivdi3+0x272>
+    24c6:	98a2      	ld.w      	r5, (r14, 0x8)
+    24c8:	61d4      	addu      	r7, r5
+    24ca:	655c      	cmphs      	r7, r5
+    24cc:	5823      	subi      	r1, r0, 1
+    24ce:	0885      	bt      	0x25d8	// 25d8 <__udivdi3+0x378>
+    24d0:	6c07      	mov      	r0, r1
+    24d2:	4370      	lsli      	r3, r3, 16
+    24d4:	6c0c      	or      	r0, r3
+    24d6:	74c1      	zexth      	r3, r0
+    24d8:	61ca      	subu      	r7, r2
+    24da:	9843      	ld.w      	r2, (r14, 0xc)
+    24dc:	7549      	zexth      	r5, r2
+    24de:	4830      	lsri      	r1, r0, 16
+    24e0:	4a50      	lsri      	r2, r2, 16
+    24e2:	6d8f      	mov      	r6, r3
+    24e4:	7d94      	mult      	r6, r5
+    24e6:	7cc8      	mult      	r3, r2
+    24e8:	7d44      	mult      	r5, r1
+    24ea:	60d4      	addu      	r3, r5
+    24ec:	7c48      	mult      	r1, r2
+    24ee:	4e50      	lsri      	r2, r6, 16
+    24f0:	60c8      	addu      	r3, r2
+    24f2:	654c      	cmphs      	r3, r5
+    24f4:	0804      	bt      	0x24fc	// 24fc <__udivdi3+0x29c>
+    24f6:	3280      	movi      	r2, 128
+    24f8:	4249      	lsli      	r2, r2, 9
+    24fa:	6048      	addu      	r1, r2
+    24fc:	4b50      	lsri      	r2, r3, 16
+    24fe:	6048      	addu      	r1, r2
+    2500:	645c      	cmphs      	r7, r1
+    2502:	0c5f      	bf      	0x25c0	// 25c0 <__udivdi3+0x360>
+    2504:	645e      	cmpne      	r7, r1
+    2506:	0c56      	bf      	0x25b2	// 25b2 <__udivdi3+0x352>
+    2508:	3700      	movi      	r7, 0
+    250a:	6c5f      	mov      	r1, r7
+    250c:	1406      	addi      	r14, r14, 24
+    250e:	1494      	pop      	r4-r7, r15
+    2510:	6d53      	mov      	r5, r4
+    2512:	6cdf      	mov      	r3, r7
+    2514:	7145      	lsr      	r5, r1
+    2516:	71c8      	lsl      	r7, r2
+    2518:	7188      	lsl      	r6, r2
+    251a:	6d5c      	or      	r5, r7
+    251c:	70c5      	lsr      	r3, r1
+    251e:	6dd7      	mov      	r7, r5
+    2520:	b8a3      	st.w      	r5, (r14, 0xc)
+    2522:	4eb0      	lsri      	r5, r6, 16
+    2524:	7108      	lsl      	r4, r2
+    2526:	6c57      	mov      	r1, r5
+    2528:	7499      	zexth      	r2, r6
+    252a:	6c0f      	mov      	r0, r3
+    252c:	b841      	st.w      	r2, (r14, 0x4)
+    252e:	b880      	st.w      	r4, (r14, 0x0)
+    2530:	b862      	st.w      	r3, (r14, 0x8)
+    2532:	e0000f97 	bsr      	0x4460	// 4460 <__umodsi3>
+    2536:	9862      	ld.w      	r3, (r14, 0x8)
+    2538:	6d03      	mov      	r4, r0
+    253a:	6c57      	mov      	r1, r5
+    253c:	6c0f      	mov      	r0, r3
+    253e:	e0000f6d 	bsr      	0x4418	// 4418 <__udivsi3>
+    2542:	6cc3      	mov      	r3, r0
+    2544:	7499      	zexth      	r2, r6
+    2546:	7cc8      	mult      	r3, r2
+    2548:	4450      	lsli      	r2, r4, 16
+    254a:	4f90      	lsri      	r4, r7, 16
+    254c:	6d08      	or      	r4, r2
+    254e:	64d0      	cmphs      	r4, r3
+    2550:	6c43      	mov      	r1, r0
+    2552:	b802      	st.w      	r0, (r14, 0x8)
+    2554:	080b      	bt      	0x256a	// 256a <__udivdi3+0x30a>
+    2556:	6118      	addu      	r4, r6
+    2558:	6c87      	mov      	r2, r1
+    255a:	6590      	cmphs      	r4, r6
+    255c:	2a00      	subi      	r2, 1
+    255e:	0c49      	bf      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2560:	64d0      	cmphs      	r4, r3
+    2562:	0847      	bt      	0x25f0	// 25f0 <__udivdi3+0x390>
+    2564:	2a00      	subi      	r2, 1
+    2566:	b842      	st.w      	r2, (r14, 0x8)
+    2568:	6118      	addu      	r4, r6
+    256a:	610e      	subu      	r4, r3
+    256c:	6c57      	mov      	r1, r5
+    256e:	6c13      	mov      	r0, r4
+    2570:	e0000f78 	bsr      	0x4460	// 4460 <__umodsi3>
+    2574:	6dc3      	mov      	r7, r0
+    2576:	6c57      	mov      	r1, r5
+    2578:	6c13      	mov      	r0, r4
+    257a:	e0000f4f 	bsr      	0x4418	// 4418 <__udivsi3>
+    257e:	d84e1006 	ld.h      	r2, (r14, 0xc)
+    2582:	74d9      	zexth      	r3, r6
+    2584:	47f0      	lsli      	r7, r7, 16
+    2586:	7509      	zexth      	r4, r2
+    2588:	7cc0      	mult      	r3, r0
+    258a:	6dd0      	or      	r7, r4
+    258c:	64dc      	cmphs      	r7, r3
+    258e:	0809      	bt      	0x25a0	// 25a0 <__udivdi3+0x340>
+    2590:	61d8      	addu      	r7, r6
+    2592:	659c      	cmphs      	r7, r6
+    2594:	5843      	subi      	r2, r0, 1
+    2596:	0c2b      	bf      	0x25ec	// 25ec <__udivdi3+0x38c>
+    2598:	64dc      	cmphs      	r7, r3
+    259a:	0829      	bt      	0x25ec	// 25ec <__udivdi3+0x38c>
+    259c:	2801      	subi      	r0, 2
+    259e:	61d8      	addu      	r7, r6
+    25a0:	5f8d      	subu      	r4, r7, r3
+    25a2:	9862      	ld.w      	r3, (r14, 0x8)
+    25a4:	43f0      	lsli      	r7, r3, 16
+    25a6:	6dc0      	or      	r7, r0
+    25a8:	06fa      	br      	0x239c	// 239c <__udivdi3+0x13c>
+    25aa:	6d4b      	mov      	r5, r2
+    25ac:	0730      	br      	0x240c	// 240c <__udivdi3+0x1ac>
+    25ae:	6d0f      	mov      	r4, r3
+    25b0:	06b6      	br      	0x231c	// 231c <__udivdi3+0xbc>
+    25b2:	9840      	ld.w      	r2, (r14, 0x0)
+    25b4:	4370      	lsli      	r3, r3, 16
+    25b6:	7599      	zexth      	r6, r6
+    25b8:	7108      	lsl      	r4, r2
+    25ba:	60d8      	addu      	r3, r6
+    25bc:	64d0      	cmphs      	r4, r3
+    25be:	0ba5      	bt      	0x2508	// 2508 <__udivdi3+0x2a8>
+    25c0:	2800      	subi      	r0, 1
+    25c2:	3700      	movi      	r7, 0
+    25c4:	07a3      	br      	0x250a	// 250a <__udivdi3+0x2aa>
+    25c6:	3618      	movi      	r6, 24
+    25c8:	06b9      	br      	0x233a	// 233a <__udivdi3+0xda>
+    25ca:	3318      	movi      	r3, 24
+    25cc:	06d9      	br      	0x237e	// 237e <__udivdi3+0x11e>
+    25ce:	3318      	movi      	r3, 24
+    25d0:	065b      	br      	0x2286	// 2286 <__udivdi3+0x26>
+    25d2:	3700      	movi      	r7, 0
+    25d4:	3001      	movi      	r0, 1
+    25d6:	0722      	br      	0x241a	// 241a <__udivdi3+0x1ba>
+    25d8:	649c      	cmphs      	r7, r2
+    25da:	0b7b      	bt      	0x24d0	// 24d0 <__udivdi3+0x270>
+    25dc:	2801      	subi      	r0, 2
+    25de:	61d4      	addu      	r7, r5
+    25e0:	0779      	br      	0x24d2	// 24d2 <__udivdi3+0x272>
+    25e2:	6498      	cmphs      	r6, r2
+    25e4:	0b5a      	bt      	0x2498	// 2498 <__udivdi3+0x238>
+    25e6:	2b01      	subi      	r3, 2
+    25e8:	6180      	addu      	r6, r0
+    25ea:	0758      	br      	0x249a	// 249a <__udivdi3+0x23a>
+    25ec:	6c0b      	mov      	r0, r2
+    25ee:	07d9      	br      	0x25a0	// 25a0 <__udivdi3+0x340>
+    25f0:	b842      	st.w      	r2, (r14, 0x8)
+    25f2:	07bc      	br      	0x256a	// 256a <__udivdi3+0x30a>
+    25f4:	2c01      	subi      	r4, 2
+    25f6:	60d8      	addu      	r3, r6
+    25f8:	06ec      	br      	0x23d0	// 23d0 <__udivdi3+0x170>
+    25fa:	2d01      	subi      	r5, 2
+    25fc:	60d8      	addu      	r3, r6
+    25fe:	0672      	br      	0x22e2	// 22e2 <__udivdi3+0x82>
+    2600:	0000ffff 	.long	0x0000ffff
+    2604:	00005ec4 	.long	0x00005ec4
+    2608:	00ffffff 	.long	0x00ffffff
+
+0000260c <__umoddi3>:
+    260c:	14d4      	push      	r4-r7, r15
+    260e:	1427      	subi      	r14, r14, 28
+    2610:	6d07      	mov      	r4, r1
+    2612:	6c4f      	mov      	r1, r3
+    2614:	6d43      	mov      	r5, r0
+    2616:	3940      	cmpnei      	r1, 0
+    2618:	6dcf      	mov      	r7, r3
+    261a:	6c0b      	mov      	r0, r2
+    261c:	b8a0      	st.w      	r5, (r14, 0x0)
+    261e:	6cd3      	mov      	r3, r4
+    2620:	085a      	bt      	0x26d4	// 26d4 <__umoddi3+0xc8>
+    2622:	6490      	cmphs      	r4, r2
+    2624:	0877      	bt      	0x2712	// 2712 <__umoddi3+0x106>
+    2626:	0120      	lrw      	r1, 0xffff	// 29a0 <__umoddi3+0x394>
+    2628:	6484      	cmphs      	r1, r2
+    262a:	0cd2      	bf      	0x27ce	// 27ce <__umoddi3+0x1c2>
+    262c:	31ff      	movi      	r1, 255
+    262e:	6484      	cmphs      	r1, r2
+    2630:	0802      	bt      	0x2634	// 2634 <__umoddi3+0x28>
+    2632:	3708      	movi      	r7, 8
+    2634:	6c43      	mov      	r1, r0
+    2636:	705d      	lsr      	r1, r7
+    2638:	01c4      	lrw      	r6, 0x5ec4	// 29a4 <__umoddi3+0x398>
+    263a:	6058      	addu      	r1, r6
+    263c:	8120      	ld.b      	r1, (r1, 0x0)
+    263e:	61c4      	addu      	r7, r1
+    2640:	3120      	movi      	r1, 32
+    2642:	605e      	subu      	r1, r7
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	b821      	st.w      	r1, (r14, 0x4)
+    2648:	0c09      	bf      	0x265a	// 265a <__umoddi3+0x4e>
+    264a:	6cd7      	mov      	r3, r5
+    264c:	6c83      	mov      	r2, r0
+    264e:	7104      	lsl      	r4, r1
+    2650:	70dd      	lsr      	r3, r7
+    2652:	7144      	lsl      	r5, r1
+    2654:	7084      	lsl      	r2, r1
+    2656:	6cd0      	or      	r3, r4
+    2658:	b8a0      	st.w      	r5, (r14, 0x0)
+    265a:	4a90      	lsri      	r4, r2, 16
+    265c:	6c53      	mov      	r1, r4
+    265e:	6c0f      	mov      	r0, r3
+    2660:	75c9      	zexth      	r7, r2
+    2662:	b843      	st.w      	r2, (r14, 0xc)
+    2664:	b862      	st.w      	r3, (r14, 0x8)
+    2666:	e0000efd 	bsr      	0x4460	// 4460 <__umodsi3>
+    266a:	9862      	ld.w      	r3, (r14, 0x8)
+    266c:	6d43      	mov      	r5, r0
+    266e:	6c53      	mov      	r1, r4
+    2670:	6c0f      	mov      	r0, r3
+    2672:	e0000ed3 	bsr      	0x4418	// 4418 <__udivsi3>
+    2676:	9840      	ld.w      	r2, (r14, 0x0)
+    2678:	4570      	lsli      	r3, r5, 16
+    267a:	4ab0      	lsri      	r5, r2, 16
+    267c:	7c1c      	mult      	r0, r7
+    267e:	6cd4      	or      	r3, r5
+    2680:	640c      	cmphs      	r3, r0
+    2682:	9843      	ld.w      	r2, (r14, 0xc)
+    2684:	0806      	bt      	0x2690	// 2690 <__umoddi3+0x84>
+    2686:	60c8      	addu      	r3, r2
+    2688:	648c      	cmphs      	r3, r2
+    268a:	0c03      	bf      	0x2690	// 2690 <__umoddi3+0x84>
+    268c:	640c      	cmphs      	r3, r0
+    268e:	0d7d      	bf      	0x2988	// 2988 <__umoddi3+0x37c>
+    2690:	60c2      	subu      	r3, r0
+    2692:	6c53      	mov      	r1, r4
+    2694:	6c0f      	mov      	r0, r3
+    2696:	b843      	st.w      	r2, (r14, 0xc)
+    2698:	b862      	st.w      	r3, (r14, 0x8)
+    269a:	e0000ee3 	bsr      	0x4460	// 4460 <__umodsi3>
+    269e:	9862      	ld.w      	r3, (r14, 0x8)
+    26a0:	6d43      	mov      	r5, r0
+    26a2:	6c53      	mov      	r1, r4
+    26a4:	6c0f      	mov      	r0, r3
+    26a6:	e0000eb9 	bsr      	0x4418	// 4418 <__udivsi3>
+    26aa:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    26ae:	7dc0      	mult      	r7, r0
+    26b0:	45b0      	lsli      	r5, r5, 16
+    26b2:	740d      	zexth      	r0, r3
+    26b4:	6d40      	or      	r5, r0
+    26b6:	65d4      	cmphs      	r5, r7
+    26b8:	0807      	bt      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26ba:	9843      	ld.w      	r2, (r14, 0xc)
+    26bc:	6148      	addu      	r5, r2
+    26be:	6494      	cmphs      	r5, r2
+    26c0:	0c03      	bf      	0x26c6	// 26c6 <__umoddi3+0xba>
+    26c2:	65d4      	cmphs      	r5, r7
+    26c4:	0d5e      	bf      	0x2980	// 2980 <__umoddi3+0x374>
+    26c6:	615e      	subu      	r5, r7
+    26c8:	6c17      	mov      	r0, r5
+    26ca:	9861      	ld.w      	r3, (r14, 0x4)
+    26cc:	700d      	lsr      	r0, r3
+    26ce:	3100      	movi      	r1, 0
+    26d0:	1407      	addi      	r14, r14, 28
+    26d2:	1494      	pop      	r4-r7, r15
+    26d4:	6450      	cmphs      	r4, r1
+    26d6:	0c6e      	bf      	0x27b2	// 27b2 <__umoddi3+0x1a6>
+    26d8:	024d      	lrw      	r2, 0xffff	// 29a0 <__umoddi3+0x394>
+    26da:	6448      	cmphs      	r2, r1
+    26dc:	086f      	bt      	0x27ba	// 27ba <__umoddi3+0x1ae>
+    26de:	024c      	lrw      	r2, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    26e0:	6448      	cmphs      	r2, r1
+    26e2:	0d3f      	bf      	0x2960	// 2960 <__umoddi3+0x354>
+    26e4:	3610      	movi      	r6, 16
+    26e6:	6c87      	mov      	r2, r1
+    26e8:	7099      	lsr      	r2, r6
+    26ea:	02f0      	lrw      	r7, 0x5ec4	// 29a4 <__umoddi3+0x398>
+    26ec:	609c      	addu      	r2, r7
+    26ee:	8240      	ld.b      	r2, (r2, 0x0)
+    26f0:	6188      	addu      	r6, r2
+    26f2:	3720      	movi      	r7, 32
+    26f4:	61da      	subu      	r7, r6
+    26f6:	3f40      	cmpnei      	r7, 0
+    26f8:	0870      	bt      	0x27d8	// 27d8 <__umoddi3+0x1cc>
+    26fa:	6504      	cmphs      	r1, r4
+    26fc:	0c03      	bf      	0x2702	// 2702 <__umoddi3+0xf6>
+    26fe:	6414      	cmphs      	r5, r0
+    2700:	0d46      	bf      	0x298c	// 298c <__umoddi3+0x380>
+    2702:	5d01      	subu      	r0, r5, r0
+    2704:	6414      	cmphs      	r5, r0
+    2706:	6106      	subu      	r4, r1
+    2708:	6483      	mvcv      	r2
+    270a:	5c69      	subu      	r3, r4, r2
+    270c:	6c4f      	mov      	r1, r3
+    270e:	1407      	addi      	r14, r14, 28
+    2710:	1494      	pop      	r4-r7, r15
+    2712:	3a40      	cmpnei      	r2, 0
+    2714:	0806      	bt      	0x2720	// 2720 <__umoddi3+0x114>
+    2716:	3100      	movi      	r1, 0
+    2718:	3001      	movi      	r0, 1
+    271a:	e0000e7f 	bsr      	0x4418	// 4418 <__udivsi3>
+    271e:	6c83      	mov      	r2, r0
+    2720:	027f      	lrw      	r3, 0xffff	// 29a0 <__umoddi3+0x394>
+    2722:	648c      	cmphs      	r3, r2
+    2724:	0850      	bt      	0x27c4	// 27c4 <__umoddi3+0x1b8>
+    2726:	027e      	lrw      	r3, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    2728:	648c      	cmphs      	r3, r2
+    272a:	0d1d      	bf      	0x2964	// 2964 <__umoddi3+0x358>
+    272c:	3710      	movi      	r7, 16
+    272e:	6ccb      	mov      	r3, r2
+    2730:	70dd      	lsr      	r3, r7
+    2732:	0322      	lrw      	r1, 0x5ec4	// 29a4 <__umoddi3+0x398>
+    2734:	60c4      	addu      	r3, r1
+    2736:	8360      	ld.b      	r3, (r3, 0x0)
+    2738:	61cc      	addu      	r7, r3
+    273a:	3320      	movi      	r3, 32
+    273c:	60de      	subu      	r3, r7
+    273e:	3b40      	cmpnei      	r3, 0
+    2740:	b861      	st.w      	r3, (r14, 0x4)
+    2742:	08c2      	bt      	0x28c6	// 28c6 <__umoddi3+0x2ba>
+    2744:	74c9      	zexth      	r3, r2
+    2746:	610a      	subu      	r4, r2
+    2748:	4af0      	lsri      	r7, r2, 16
+    274a:	6d8f      	mov      	r6, r3
+    274c:	6c5f      	mov      	r1, r7
+    274e:	6c13      	mov      	r0, r4
+    2750:	b842      	st.w      	r2, (r14, 0x8)
+    2752:	e0000e87 	bsr      	0x4460	// 4460 <__umodsi3>
+    2756:	6d43      	mov      	r5, r0
+    2758:	6c5f      	mov      	r1, r7
+    275a:	6c13      	mov      	r0, r4
+    275c:	e0000e5e 	bsr      	0x4418	// 4418 <__udivsi3>
+    2760:	9860      	ld.w      	r3, (r14, 0x0)
+    2762:	4590      	lsli      	r4, r5, 16
+    2764:	4bb0      	lsri      	r5, r3, 16
+    2766:	7c18      	mult      	r0, r6
+    2768:	6d14      	or      	r4, r5
+    276a:	6410      	cmphs      	r4, r0
+    276c:	9842      	ld.w      	r2, (r14, 0x8)
+    276e:	0806      	bt      	0x277a	// 277a <__umoddi3+0x16e>
+    2770:	6108      	addu      	r4, r2
+    2772:	6490      	cmphs      	r4, r2
+    2774:	0c03      	bf      	0x277a	// 277a <__umoddi3+0x16e>
+    2776:	6410      	cmphs      	r4, r0
+    2778:	0d06      	bf      	0x2984	// 2984 <__umoddi3+0x378>
+    277a:	6102      	subu      	r4, r0
+    277c:	6c5f      	mov      	r1, r7
+    277e:	6c13      	mov      	r0, r4
+    2780:	b842      	st.w      	r2, (r14, 0x8)
+    2782:	e0000e6f 	bsr      	0x4460	// 4460 <__umodsi3>
+    2786:	6d43      	mov      	r5, r0
+    2788:	6c5f      	mov      	r1, r7
+    278a:	6c13      	mov      	r0, r4
+    278c:	e0000e46 	bsr      	0x4418	// 4418 <__udivsi3>
+    2790:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2794:	7c18      	mult      	r0, r6
+    2796:	45b0      	lsli      	r5, r5, 16
+    2798:	758d      	zexth      	r6, r3
+    279a:	6d58      	or      	r5, r6
+    279c:	6414      	cmphs      	r5, r0
+    279e:	0808      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a0:	9842      	ld.w      	r2, (r14, 0x8)
+    27a2:	6148      	addu      	r5, r2
+    27a4:	6494      	cmphs      	r5, r2
+    27a6:	0c04      	bf      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27a8:	6414      	cmphs      	r5, r0
+    27aa:	0802      	bt      	0x27ae	// 27ae <__umoddi3+0x1a2>
+    27ac:	6148      	addu      	r5, r2
+    27ae:	6142      	subu      	r5, r0
+    27b0:	078c      	br      	0x26c8	// 26c8 <__umoddi3+0xbc>
+    27b2:	6c17      	mov      	r0, r5
+    27b4:	6c53      	mov      	r1, r4
+    27b6:	1407      	addi      	r14, r14, 28
+    27b8:	1494      	pop      	r4-r7, r15
+    27ba:	32ff      	movi      	r2, 255
+    27bc:	6448      	cmphs      	r2, r1
+    27be:	6583      	mvcv      	r6
+    27c0:	46c3      	lsli      	r6, r6, 3
+    27c2:	0792      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    27c4:	33ff      	movi      	r3, 255
+    27c6:	648c      	cmphs      	r3, r2
+    27c8:	0bb3      	bt      	0x272e	// 272e <__umoddi3+0x122>
+    27ca:	3708      	movi      	r7, 8
+    27cc:	07b1      	br      	0x272e	// 272e <__umoddi3+0x122>
+    27ce:	1337      	lrw      	r1, 0xffffff	// 29a8 <__umoddi3+0x39c>
+    27d0:	6484      	cmphs      	r1, r2
+    27d2:	0ccb      	bf      	0x2968	// 2968 <__umoddi3+0x35c>
+    27d4:	3710      	movi      	r7, 16
+    27d6:	072f      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    27d8:	6cc3      	mov      	r3, r0
+    27da:	705c      	lsl      	r1, r7
+    27dc:	70d9      	lsr      	r3, r6
+    27de:	6cc4      	or      	r3, r1
+    27e0:	6c57      	mov      	r1, r5
+    27e2:	6c93      	mov      	r2, r4
+    27e4:	7059      	lsr      	r1, r6
+    27e6:	711c      	lsl      	r4, r7
+    27e8:	7099      	lsr      	r2, r6
+    27ea:	6c50      	or      	r1, r4
+    27ec:	701c      	lsl      	r0, r7
+    27ee:	4b90      	lsri      	r4, r3, 16
+    27f0:	715c      	lsl      	r5, r7
+    27f2:	b803      	st.w      	r0, (r14, 0xc)
+    27f4:	b820      	st.w      	r1, (r14, 0x0)
+    27f6:	b8a4      	st.w      	r5, (r14, 0x10)
+    27f8:	6c53      	mov      	r1, r4
+    27fa:	754d      	zexth      	r5, r3
+    27fc:	6c0b      	mov      	r0, r2
+    27fe:	b862      	st.w      	r3, (r14, 0x8)
+    2800:	b8a1      	st.w      	r5, (r14, 0x4)
+    2802:	b846      	st.w      	r2, (r14, 0x18)
+    2804:	e0000e2e 	bsr      	0x4460	// 4460 <__umodsi3>
+    2808:	9846      	ld.w      	r2, (r14, 0x18)
+    280a:	b805      	st.w      	r0, (r14, 0x14)
+    280c:	6c53      	mov      	r1, r4
+    280e:	6c0b      	mov      	r0, r2
+    2810:	e0000e04 	bsr      	0x4418	// 4418 <__udivsi3>
+    2814:	9841      	ld.w      	r2, (r14, 0x4)
+    2816:	7c80      	mult      	r2, r0
+    2818:	9865      	ld.w      	r3, (r14, 0x14)
+    281a:	6d43      	mov      	r5, r0
+    281c:	9800      	ld.w      	r0, (r14, 0x0)
+    281e:	4330      	lsli      	r1, r3, 16
+    2820:	4870      	lsri      	r3, r0, 16
+    2822:	6cc4      	or      	r3, r1
+    2824:	648c      	cmphs      	r3, r2
+    2826:	0807      	bt      	0x2834	// 2834 <__umoddi3+0x228>
+    2828:	9802      	ld.w      	r0, (r14, 0x8)
+    282a:	60c0      	addu      	r3, r0
+    282c:	640c      	cmphs      	r3, r0
+    282e:	5d23      	subi      	r1, r5, 1
+    2830:	08a3      	bt      	0x2976	// 2976 <__umoddi3+0x36a>
+    2832:	6d47      	mov      	r5, r1
+    2834:	60ca      	subu      	r3, r2
+    2836:	6c53      	mov      	r1, r4
+    2838:	6c0f      	mov      	r0, r3
+    283a:	b866      	st.w      	r3, (r14, 0x18)
+    283c:	e0000e12 	bsr      	0x4460	// 4460 <__umodsi3>
+    2840:	9866      	ld.w      	r3, (r14, 0x18)
+    2842:	6c53      	mov      	r1, r4
+    2844:	b805      	st.w      	r0, (r14, 0x14)
+    2846:	6c0f      	mov      	r0, r3
+    2848:	e0000de8 	bsr      	0x4418	// 4418 <__udivsi3>
+    284c:	9845      	ld.w      	r2, (r14, 0x14)
+    284e:	d86e1000 	ld.h      	r3, (r14, 0x0)
+    2852:	9821      	ld.w      	r1, (r14, 0x4)
+    2854:	4250      	lsli      	r2, r2, 16
+    2856:	750d      	zexth      	r4, r3
+    2858:	7c40      	mult      	r1, r0
+    285a:	6c90      	or      	r2, r4
+    285c:	6448      	cmphs      	r2, r1
+    285e:	0807      	bt      	0x286c	// 286c <__umoddi3+0x260>
+    2860:	9882      	ld.w      	r4, (r14, 0x8)
+    2862:	6090      	addu      	r2, r4
+    2864:	6508      	cmphs      	r2, r4
+    2866:	5863      	subi      	r3, r0, 1
+    2868:	0882      	bt      	0x296c	// 296c <__umoddi3+0x360>
+    286a:	6c0f      	mov      	r0, r3
+    286c:	45b0      	lsli      	r5, r5, 16
+    286e:	6d40      	or      	r5, r0
+    2870:	74d5      	zexth      	r3, r5
+    2872:	9803      	ld.w      	r0, (r14, 0xc)
+    2874:	4db0      	lsri      	r5, r5, 16
+    2876:	6d0f      	mov      	r4, r3
+    2878:	6086      	subu      	r2, r1
+    287a:	7441      	zexth      	r1, r0
+    287c:	4810      	lsri      	r0, r0, 16
+    287e:	7d04      	mult      	r4, r1
+    2880:	7cc0      	mult      	r3, r0
+    2882:	7c54      	mult      	r1, r5
+    2884:	60c4      	addu      	r3, r1
+    2886:	7d40      	mult      	r5, r0
+    2888:	4c10      	lsri      	r0, r4, 16
+    288a:	60c0      	addu      	r3, r0
+    288c:	644c      	cmphs      	r3, r1
+    288e:	0804      	bt      	0x2896	// 2896 <__umoddi3+0x28a>
+    2890:	3180      	movi      	r1, 128
+    2892:	4129      	lsli      	r1, r1, 9
+    2894:	6144      	addu      	r5, r1
+    2896:	4b30      	lsri      	r1, r3, 16
+    2898:	6144      	addu      	r5, r1
+    289a:	4370      	lsli      	r3, r3, 16
+    289c:	7511      	zexth      	r4, r4
+    289e:	6548      	cmphs      	r2, r5
+    28a0:	60d0      	addu      	r3, r4
+    28a2:	0c56      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    28a4:	654a      	cmpne      	r2, r5
+    28a6:	0c76      	bf      	0x2992	// 2992 <__umoddi3+0x386>
+    28a8:	5a35      	subu      	r1, r2, r5
+    28aa:	6c0f      	mov      	r0, r3
+    28ac:	9864      	ld.w      	r3, (r14, 0x10)
+    28ae:	5b01      	subu      	r0, r3, r0
+    28b0:	640c      	cmphs      	r3, r0
+    28b2:	64c3      	mvcv      	r3
+    28b4:	598d      	subu      	r4, r1, r3
+    28b6:	6d53      	mov      	r5, r4
+    28b8:	7158      	lsl      	r5, r6
+    28ba:	701d      	lsr      	r0, r7
+    28bc:	6c53      	mov      	r1, r4
+    28be:	6c14      	or      	r0, r5
+    28c0:	705d      	lsr      	r1, r7
+    28c2:	1407      	addi      	r14, r14, 28
+    28c4:	1494      	pop      	r4-r7, r15
+    28c6:	9801      	ld.w      	r0, (r14, 0x4)
+    28c8:	6c57      	mov      	r1, r5
+    28ca:	6cd3      	mov      	r3, r4
+    28cc:	705d      	lsr      	r1, r7
+    28ce:	7100      	lsl      	r4, r0
+    28d0:	7080      	lsl      	r2, r0
+    28d2:	6c50      	or      	r1, r4
+    28d4:	70dd      	lsr      	r3, r7
+    28d6:	6d07      	mov      	r4, r1
+    28d8:	4af0      	lsri      	r7, r2, 16
+    28da:	b822      	st.w      	r1, (r14, 0x8)
+    28dc:	7449      	zexth      	r1, r2
+    28de:	7140      	lsl      	r5, r0
+    28e0:	6d87      	mov      	r6, r1
+    28e2:	6c0f      	mov      	r0, r3
+    28e4:	6c5f      	mov      	r1, r7
+    28e6:	b844      	st.w      	r2, (r14, 0x10)
+    28e8:	b8a0      	st.w      	r5, (r14, 0x0)
+    28ea:	b863      	st.w      	r3, (r14, 0xc)
+    28ec:	e0000dba 	bsr      	0x4460	// 4460 <__umodsi3>
+    28f0:	9863      	ld.w      	r3, (r14, 0xc)
+    28f2:	6d43      	mov      	r5, r0
+    28f4:	6c5f      	mov      	r1, r7
+    28f6:	6c0f      	mov      	r0, r3
+    28f8:	e0000d90 	bsr      	0x4418	// 4418 <__udivsi3>
+    28fc:	45b0      	lsli      	r5, r5, 16
+    28fe:	4c70      	lsri      	r3, r4, 16
+    2900:	7c18      	mult      	r0, r6
+    2902:	6d4c      	or      	r5, r3
+    2904:	6414      	cmphs      	r5, r0
+    2906:	9844      	ld.w      	r2, (r14, 0x10)
+    2908:	0807      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    290a:	6148      	addu      	r5, r2
+    290c:	6494      	cmphs      	r5, r2
+    290e:	0c04      	bf      	0x2916	// 2916 <__umoddi3+0x30a>
+    2910:	6414      	cmphs      	r5, r0
+    2912:	0802      	bt      	0x2916	// 2916 <__umoddi3+0x30a>
+    2914:	6148      	addu      	r5, r2
+    2916:	6142      	subu      	r5, r0
+    2918:	6c5f      	mov      	r1, r7
+    291a:	6c17      	mov      	r0, r5
+    291c:	b843      	st.w      	r2, (r14, 0xc)
+    291e:	e0000da1 	bsr      	0x4460	// 4460 <__umodsi3>
+    2922:	6d03      	mov      	r4, r0
+    2924:	6c5f      	mov      	r1, r7
+    2926:	6c17      	mov      	r0, r5
+    2928:	e0000d78 	bsr      	0x4418	// 4418 <__udivsi3>
+    292c:	d86e1004 	ld.h      	r3, (r14, 0x8)
+    2930:	4490      	lsli      	r4, r4, 16
+    2932:	744d      	zexth      	r1, r3
+    2934:	7c18      	mult      	r0, r6
+    2936:	6d04      	or      	r4, r1
+    2938:	6410      	cmphs      	r4, r0
+    293a:	9843      	ld.w      	r2, (r14, 0xc)
+    293c:	0807      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    293e:	6108      	addu      	r4, r2
+    2940:	6490      	cmphs      	r4, r2
+    2942:	0c04      	bf      	0x294a	// 294a <__umoddi3+0x33e>
+    2944:	6410      	cmphs      	r4, r0
+    2946:	0802      	bt      	0x294a	// 294a <__umoddi3+0x33e>
+    2948:	6108      	addu      	r4, r2
+    294a:	6102      	subu      	r4, r0
+    294c:	0700      	br      	0x274c	// 274c <__umoddi3+0x140>
+    294e:	9823      	ld.w      	r1, (r14, 0xc)
+    2950:	5b05      	subu      	r0, r3, r1
+    2952:	640c      	cmphs      	r3, r0
+    2954:	9822      	ld.w      	r1, (r14, 0x8)
+    2956:	6146      	subu      	r5, r1
+    2958:	64c3      	mvcv      	r3
+    295a:	614e      	subu      	r5, r3
+    295c:	5a35      	subu      	r1, r2, r5
+    295e:	07a7      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    2960:	3618      	movi      	r6, 24
+    2962:	06c2      	br      	0x26e6	// 26e6 <__umoddi3+0xda>
+    2964:	3718      	movi      	r7, 24
+    2966:	06e4      	br      	0x272e	// 272e <__umoddi3+0x122>
+    2968:	3718      	movi      	r7, 24
+    296a:	0665      	br      	0x2634	// 2634 <__umoddi3+0x28>
+    296c:	6448      	cmphs      	r2, r1
+    296e:	0b7e      	bt      	0x286a	// 286a <__umoddi3+0x25e>
+    2970:	2801      	subi      	r0, 2
+    2972:	6090      	addu      	r2, r4
+    2974:	077c      	br      	0x286c	// 286c <__umoddi3+0x260>
+    2976:	648c      	cmphs      	r3, r2
+    2978:	0b5d      	bt      	0x2832	// 2832 <__umoddi3+0x226>
+    297a:	2d01      	subi      	r5, 2
+    297c:	60c0      	addu      	r3, r0
+    297e:	075b      	br      	0x2834	// 2834 <__umoddi3+0x228>
+    2980:	6148      	addu      	r5, r2
+    2982:	06a2      	br      	0x26c6	// 26c6 <__umoddi3+0xba>
+    2984:	6108      	addu      	r4, r2
+    2986:	06fa      	br      	0x277a	// 277a <__umoddi3+0x16e>
+    2988:	60c8      	addu      	r3, r2
+    298a:	0683      	br      	0x2690	// 2690 <__umoddi3+0x84>
+    298c:	6c17      	mov      	r0, r5
+    298e:	6c4f      	mov      	r1, r3
+    2990:	06bf      	br      	0x270e	// 270e <__umoddi3+0x102>
+    2992:	9824      	ld.w      	r1, (r14, 0x10)
+    2994:	64c4      	cmphs      	r1, r3
+    2996:	0fdc      	bf      	0x294e	// 294e <__umoddi3+0x342>
+    2998:	6c0f      	mov      	r0, r3
+    299a:	3100      	movi      	r1, 0
+    299c:	0788      	br      	0x28ac	// 28ac <__umoddi3+0x2a0>
+    299e:	0000      	bkpt
+    29a0:	0000ffff 	.long	0x0000ffff
+    29a4:	00005ec4 	.long	0x00005ec4
+    29a8:	00ffffff 	.long	0x00ffffff
+
+000029ac <copystring>:
+    29ac:	14c2      	push      	r4-r5
+    29ae:	3300      	movi      	r3, 0
+    29b0:	644d      	cmplt      	r3, r1
+    29b2:	0803      	bt      	0x29b8	// 29b8 <copystring+0xc>
+    29b4:	6c0f      	mov      	r0, r3
+    29b6:	1482      	pop      	r4-r5
+    29b8:	5aac      	addu      	r5, r2, r3
+    29ba:	588c      	addu      	r4, r0, r3
+    29bc:	2300      	addi      	r3, 1
+    29be:	85a0      	ld.b      	r5, (r5, 0x0)
+    29c0:	3b43      	cmpnei      	r3, 3
+    29c2:	a4a0      	st.b      	r5, (r4, 0x0)
+    29c4:	0bf6      	bt      	0x29b0	// 29b0 <copystring+0x4>
+    29c6:	3923      	cmplti      	r1, 4
+    29c8:	0bf6      	bt      	0x29b4	// 29b4 <copystring+0x8>
+    29ca:	3300      	movi      	r3, 0
+    29cc:	a063      	st.b      	r3, (r0, 0x3)
+    29ce:	3304      	movi      	r3, 4
+    29d0:	07f2      	br      	0x29b4	// 29b4 <copystring+0x8>
+
+000029d2 <__GI___dtostr>:
+    29d2:	14d4      	push      	r4-r7, r15
+    29d4:	142c      	subi      	r14, r14, 48
+    29d6:	6d8f      	mov      	r6, r3
+    29d8:	9871      	ld.w      	r3, (r14, 0x44)
+    29da:	b80a      	st.w      	r0, (r14, 0x28)
+    29dc:	b824      	st.w      	r1, (r14, 0x10)
+    29de:	b842      	st.w      	r2, (r14, 0x8)
+    29e0:	b86b      	st.w      	r3, (r14, 0x2c)
+    29e2:	98f2      	ld.w      	r7, (r14, 0x48)
+    29e4:	e0000244 	bsr      	0x2e6c	// 2e6c <__isinf>
+    29e8:	3840      	cmpnei      	r0, 0
+    29ea:	0c0a      	bf      	0x29fe	// 29fe <__GI___dtostr+0x2c>
+    29ec:	0244      	lrw      	r2, 0x6426	// 2cd8 <__GI___dtostr+0x306>
+    29ee:	6c5b      	mov      	r1, r6
+    29f0:	9802      	ld.w      	r0, (r14, 0x8)
+    29f2:	e3ffffdd 	bsr      	0x29ac	// 29ac <copystring>
+    29f6:	b809      	st.w      	r0, (r14, 0x24)
+    29f8:	9809      	ld.w      	r0, (r14, 0x24)
+    29fa:	140c      	addi      	r14, r14, 48
+    29fc:	1494      	pop      	r4-r7, r15
+    29fe:	980a      	ld.w      	r0, (r14, 0x28)
+    2a00:	9824      	ld.w      	r1, (r14, 0x10)
+    2a02:	e0000185 	bsr      	0x2d0c	// 2d0c <__isnan>
+    2a06:	3840      	cmpnei      	r0, 0
+    2a08:	b809      	st.w      	r0, (r14, 0x24)
+    2a0a:	0c03      	bf      	0x2a10	// 2a10 <__GI___dtostr+0x3e>
+    2a0c:	024b      	lrw      	r2, 0x642a	// 2cdc <__GI___dtostr+0x30a>
+    2a0e:	07f0      	br      	0x29ee	// 29ee <__GI___dtostr+0x1c>
+    2a10:	3200      	movi      	r2, 0
+    2a12:	3300      	movi      	r3, 0
+    2a14:	980a      	ld.w      	r0, (r14, 0x28)
+    2a16:	9824      	ld.w      	r1, (r14, 0x10)
+    2a18:	e0000242 	bsr      	0x2e9c	// 2e9c <__eqdf2>
+    2a1c:	3840      	cmpnei      	r0, 0
+    2a1e:	082d      	bt      	0x2a78	// 2a78 <__GI___dtostr+0xa6>
+    2a20:	3f40      	cmpnei      	r7, 0
+    2a22:	0d57      	bf      	0x2cd0	// 2cd0 <__GI___dtostr+0x2fe>
+    2a24:	5fa6      	addi      	r5, r7, 2
+    2a26:	6558      	cmphs      	r6, r5
+    2a28:	0d56      	bf      	0x2cd4	// 2cd4 <__GI___dtostr+0x302>
+    2a2a:	3d40      	cmpnei      	r5, 0
+    2a2c:	0c0b      	bf      	0x2a42	// 2a42 <__GI___dtostr+0x70>
+    2a2e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a30:	39df      	btsti      	r1, 31
+    2a32:	0c1a      	bf      	0x2a66	// 2a66 <__GI___dtostr+0x94>
+    2a34:	9802      	ld.w      	r0, (r14, 0x8)
+    2a36:	322d      	movi      	r2, 45
+    2a38:	a040      	st.b      	r2, (r0, 0x0)
+    2a3a:	5d02      	addi      	r0, r5, 1
+    2a3c:	3501      	movi      	r5, 1
+    2a3e:	6414      	cmphs      	r5, r0
+    2a40:	0c16      	bf      	0x2a6c	// 2a6c <__GI___dtostr+0x9a>
+    2a42:	9882      	ld.w      	r4, (r14, 0x8)
+    2a44:	8420      	ld.b      	r1, (r4, 0x0)
+    2a46:	3330      	movi      	r3, 48
+    2a48:	64c6      	cmpne      	r1, r3
+    2a4a:	3000      	movi      	r0, 0
+    2a4c:	6001      	addc      	r0, r0
+    2a4e:	9842      	ld.w      	r2, (r14, 0x8)
+    2a50:	9822      	ld.w      	r1, (r14, 0x8)
+    2a52:	6008      	addu      	r0, r2
+    2a54:	342e      	movi      	r4, 46
+    2a56:	6054      	addu      	r1, r5
+    2a58:	3300      	movi      	r3, 0
+    2a5a:	a081      	st.b      	r4, (r0, 0x1)
+    2a5c:	b8a9      	st.w      	r5, (r14, 0x24)
+    2a5e:	a160      	st.b      	r3, (r1, 0x0)
+    2a60:	07cc      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2a62:	3501      	movi      	r5, 1
+    2a64:	07e5      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2a66:	6c17      	mov      	r0, r5
+    2a68:	3500      	movi      	r5, 0
+    2a6a:	07ea      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a6c:	9842      	ld.w      	r2, (r14, 0x8)
+    2a6e:	6094      	addu      	r2, r5
+    2a70:	3430      	movi      	r4, 48
+    2a72:	a280      	st.b      	r4, (r2, 0x0)
+    2a74:	2500      	addi      	r5, 1
+    2a76:	07e4      	br      	0x2a3e	// 2a3e <__GI___dtostr+0x6c>
+    2a78:	3200      	movi      	r2, 0
+    2a7a:	3300      	movi      	r3, 0
+    2a7c:	980a      	ld.w      	r0, (r14, 0x28)
+    2a7e:	9824      	ld.w      	r1, (r14, 0x10)
+    2a80:	e000022c 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2a84:	38df      	btsti      	r0, 31
+    2a86:	0c8e      	bf      	0x2ba2	// 2ba2 <__GI___dtostr+0x1d0>
+    2a88:	3180      	movi      	r1, 128
+    2a8a:	98a2      	ld.w      	r5, (r14, 0x8)
+    2a8c:	9884      	ld.w      	r4, (r14, 0x10)
+    2a8e:	4158      	lsli      	r2, r1, 24
+    2a90:	332d      	movi      	r3, 45
+    2a92:	a560      	st.b      	r3, (r5, 0x0)
+    2a94:	6108      	addu      	r4, r2
+    2a96:	2e00      	subi      	r6, 1
+    2a98:	2500      	addi      	r5, 1
+    2a9a:	3000      	movi      	r0, 0
+    2a9c:	032e      	lrw      	r1, 0x3fe00000	// 2ce0 <__GI___dtostr+0x30e>
+    2a9e:	3300      	movi      	r3, 0
+    2aa0:	b865      	st.w      	r3, (r14, 0x14)
+    2aa2:	9845      	ld.w      	r2, (r14, 0x14)
+    2aa4:	65ca      	cmpne      	r2, r7
+    2aa6:	0881      	bt      	0x2ba8	// 2ba8 <__GI___dtostr+0x1d6>
+    2aa8:	6c83      	mov      	r2, r0
+    2aaa:	6cc7      	mov      	r3, r1
+    2aac:	980a      	ld.w      	r0, (r14, 0x28)
+    2aae:	6c53      	mov      	r1, r4
+    2ab0:	e3fff2b6 	bsr      	0x101c	// 101c <__adddf3>
+    2ab4:	3200      	movi      	r2, 0
+    2ab6:	0373      	lrw      	r3, 0x3ff00000	// 2ce4 <__GI___dtostr+0x312>
+    2ab8:	b806      	st.w      	r0, (r14, 0x18)
+    2aba:	b827      	st.w      	r1, (r14, 0x1c)
+    2abc:	e000020e 	bsr      	0x2ed8	// 2ed8 <__ltdf2>
+    2ac0:	38df      	btsti      	r0, 31
+    2ac2:	0c05      	bf      	0x2acc	// 2acc <__GI___dtostr+0xfa>
+    2ac4:	3430      	movi      	r4, 48
+    2ac6:	a580      	st.b      	r4, (r5, 0x0)
+    2ac8:	2e00      	subi      	r6, 1
+    2aca:	2500      	addi      	r5, 1
+    2acc:	9804      	ld.w      	r0, (r14, 0x10)
+    2ace:	4021      	lsli      	r1, r0, 1
+    2ad0:	0379      	lrw      	r3, 0xfffffc01	// 2ce8 <__GI___dtostr+0x316>
+    2ad2:	4915      	lsri      	r0, r1, 21
+    2ad4:	600c      	addu      	r0, r3
+    2ad6:	e3fff4f5 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2ada:	035a      	lrw      	r2, 0x509f79ff	// 2cec <__GI___dtostr+0x31a>
+    2adc:	037a      	lrw      	r3, 0x3fd34413	// 2cf0 <__GI___dtostr+0x31e>
+    2ade:	e3fff2d3 	bsr      	0x1084	// 1084 <__muldf3>
+    2ae2:	e3fff527 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2ae6:	5842      	addi      	r2, r0, 1
+    2ae8:	3a20      	cmplti      	r2, 1
+    2aea:	b848      	st.w      	r2, (r14, 0x20)
+    2aec:	08e7      	bt      	0x2cba	// 2cba <__GI___dtostr+0x2e8>
+    2aee:	033d      	lrw      	r1, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2af0:	6dcb      	mov      	r7, r2
+    2af2:	3400      	movi      	r4, 0
+    2af4:	b823      	st.w      	r1, (r14, 0xc)
+    2af6:	3f0a      	cmphsi      	r7, 11
+    2af8:	085f      	bt      	0x2bb6	// 2bb6 <__GI___dtostr+0x1e4>
+    2afa:	3f41      	cmpnei      	r7, 1
+    2afc:	0868      	bt      	0x2bcc	// 2bcc <__GI___dtostr+0x1fa>
+    2afe:	135f      	lrw      	r2, 0xcccccccd	// 2cf8 <__GI___dtostr+0x326>
+    2b00:	137f      	lrw      	r3, 0x3feccccc	// 2cfc <__GI___dtostr+0x32a>
+    2b02:	6c13      	mov      	r0, r4
+    2b04:	9823      	ld.w      	r1, (r14, 0xc)
+    2b06:	e3fff483 	bsr      	0x140c	// 140c <__gtdf2>
+    2b0a:	3820      	cmplti      	r0, 1
+    2b0c:	0c6a      	bf      	0x2be0	// 2be0 <__GI___dtostr+0x20e>
+    2b0e:	9862      	ld.w      	r3, (r14, 0x8)
+    2b10:	64d6      	cmpne      	r5, r3
+    2b12:	0807      	bt      	0x2b20	// 2b20 <__GI___dtostr+0x14e>
+    2b14:	3e40      	cmpnei      	r6, 0
+    2b16:	0f71      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b18:	3230      	movi      	r2, 48
+    2b1a:	a540      	st.b      	r2, (r5, 0x0)
+    2b1c:	2e00      	subi      	r6, 1
+    2b1e:	2500      	addi      	r5, 1
+    2b20:	9805      	ld.w      	r0, (r14, 0x14)
+    2b22:	3840      	cmpnei      	r0, 0
+    2b24:	08cf      	bt      	0x2cc2	// 2cc2 <__GI___dtostr+0x2f0>
+    2b26:	9822      	ld.w      	r1, (r14, 0x8)
+    2b28:	5d65      	subu      	r3, r5, r1
+    2b2a:	2300      	addi      	r3, 1
+    2b2c:	984b      	ld.w      	r2, (r14, 0x2c)
+    2b2e:	648c      	cmphs      	r3, r2
+    2b30:	08a5      	bt      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b32:	3e40      	cmpnei      	r6, 0
+    2b34:	0f62      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b36:	372e      	movi      	r7, 46
+    2b38:	a5e0      	st.b      	r7, (r5, 0x0)
+    2b3a:	980b      	ld.w      	r0, (r14, 0x2c)
+    2b3c:	5de2      	addi      	r7, r5, 1
+    2b3e:	9822      	ld.w      	r1, (r14, 0x8)
+    2b40:	2000      	addi      	r0, 1
+    2b42:	5f65      	subu      	r3, r7, r1
+    2b44:	584d      	subu      	r2, r0, r3
+    2b46:	2e00      	subi      	r6, 1
+    2b48:	b845      	st.w      	r2, (r14, 0x14)
+    2b4a:	9805      	ld.w      	r0, (r14, 0x14)
+    2b4c:	6418      	cmphs      	r6, r0
+    2b4e:	0f55      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2b50:	6d43      	mov      	r5, r0
+    2b52:	615c      	addu      	r5, r7
+    2b54:	36ff      	movi      	r6, 255
+    2b56:	655e      	cmpne      	r7, r5
+    2b58:	0c91      	bf      	0x2c7a	// 2c7a <__GI___dtostr+0x2a8>
+    2b5a:	6c93      	mov      	r2, r4
+    2b5c:	9863      	ld.w      	r3, (r14, 0xc)
+    2b5e:	9806      	ld.w      	r0, (r14, 0x18)
+    2b60:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b62:	e3fff3ab 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b66:	e3fff4e5 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2b6a:	3130      	movi      	r1, 48
+    2b6c:	6040      	addu      	r1, r0
+    2b6e:	a720      	st.b      	r1, (r7, 0x0)
+    2b70:	6818      	and      	r0, r6
+    2b72:	e3fff4a7 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2b76:	6c93      	mov      	r2, r4
+    2b78:	9863      	ld.w      	r3, (r14, 0xc)
+    2b7a:	e3fff285 	bsr      	0x1084	// 1084 <__muldf3>
+    2b7e:	6c83      	mov      	r2, r0
+    2b80:	6cc7      	mov      	r3, r1
+    2b82:	9806      	ld.w      	r0, (r14, 0x18)
+    2b84:	9827      	ld.w      	r1, (r14, 0x1c)
+    2b86:	e3fff263 	bsr      	0x104c	// 104c <__subdf3>
+    2b8a:	b806      	st.w      	r0, (r14, 0x18)
+    2b8c:	b827      	st.w      	r1, (r14, 0x1c)
+    2b8e:	6c13      	mov      	r0, r4
+    2b90:	9823      	ld.w      	r1, (r14, 0xc)
+    2b92:	3200      	movi      	r2, 0
+    2b94:	1278      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2b96:	e3fff391 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2b9a:	2700      	addi      	r7, 1
+    2b9c:	6d03      	mov      	r4, r0
+    2b9e:	b823      	st.w      	r1, (r14, 0xc)
+    2ba0:	07db      	br      	0x2b56	// 2b56 <__GI___dtostr+0x184>
+    2ba2:	98a2      	ld.w      	r5, (r14, 0x8)
+    2ba4:	9884      	ld.w      	r4, (r14, 0x10)
+    2ba6:	077a      	br      	0x2a9a	// 2a9a <__GI___dtostr+0xc8>
+    2ba8:	1276      	lrw      	r3, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2baa:	1257      	lrw      	r2, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2bac:	e3fff26c 	bsr      	0x1084	// 1084 <__muldf3>
+    2bb0:	9865      	ld.w      	r3, (r14, 0x14)
+    2bb2:	2300      	addi      	r3, 1
+    2bb4:	0776      	br      	0x2aa0	// 2aa0 <__GI___dtostr+0xce>
+    2bb6:	3080      	movi      	r0, 128
+    2bb8:	4056      	lsli      	r2, r0, 22
+    2bba:	9823      	ld.w      	r1, (r14, 0xc)
+    2bbc:	6c13      	mov      	r0, r4
+    2bbe:	1273      	lrw      	r3, 0x4202a05f	// 2d08 <__GI___dtostr+0x336>
+    2bc0:	e3fff262 	bsr      	0x1084	// 1084 <__muldf3>
+    2bc4:	6d03      	mov      	r4, r0
+    2bc6:	b823      	st.w      	r1, (r14, 0xc)
+    2bc8:	2f09      	subi      	r7, 10
+    2bca:	0796      	br      	0x2af6	// 2af6 <__GI___dtostr+0x124>
+    2bcc:	6c13      	mov      	r0, r4
+    2bce:	9823      	ld.w      	r1, (r14, 0xc)
+    2bd0:	3200      	movi      	r2, 0
+    2bd2:	1269      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2bd4:	e3fff258 	bsr      	0x1084	// 1084 <__muldf3>
+    2bd8:	6d03      	mov      	r4, r0
+    2bda:	b823      	st.w      	r1, (r14, 0xc)
+    2bdc:	2f00      	subi      	r7, 1
+    2bde:	078e      	br      	0x2afa	// 2afa <__GI___dtostr+0x128>
+    2be0:	9863      	ld.w      	r3, (r14, 0xc)
+    2be2:	6c93      	mov      	r2, r4
+    2be4:	9806      	ld.w      	r0, (r14, 0x18)
+    2be6:	9827      	ld.w      	r1, (r14, 0x1c)
+    2be8:	e3fff368 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2bec:	e3fff4a2 	bsr      	0x1530	// 1530 <__fixdfsi>
+    2bf0:	3f40      	cmpnei      	r7, 0
+    2bf2:	74c0      	zextb      	r3, r0
+    2bf4:	0c03      	bf      	0x2bfa	// 2bfa <__GI___dtostr+0x228>
+    2bf6:	3b40      	cmpnei      	r3, 0
+    2bf8:	0c58      	bf      	0x2ca8	// 2ca8 <__GI___dtostr+0x2d6>
+    2bfa:	232f      	addi      	r3, 48
+    2bfc:	3e40      	cmpnei      	r6, 0
+    2bfe:	a560      	st.b      	r3, (r5, 0x0)
+    2c00:	2500      	addi      	r5, 1
+    2c02:	0842      	bt      	0x2c86	// 2c86 <__GI___dtostr+0x2b4>
+    2c04:	6c93      	mov      	r2, r4
+    2c06:	9863      	ld.w      	r3, (r14, 0xc)
+    2c08:	980a      	ld.w      	r0, (r14, 0x28)
+    2c0a:	9824      	ld.w      	r1, (r14, 0x10)
+    2c0c:	e3fff356 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2c10:	9845      	ld.w      	r2, (r14, 0x14)
+    2c12:	988b      	ld.w      	r4, (r14, 0x2c)
+    2c14:	b841      	st.w      	r2, (r14, 0x4)
+    2c16:	b880      	st.w      	r4, (r14, 0x0)
+    2c18:	3300      	movi      	r3, 0
+    2c1a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c1c:	e3fffedb 	bsr      	0x29d2	// 29d2 <__GI___dtostr>
+    2c20:	3840      	cmpnei      	r0, 0
+    2c22:	0eeb      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c24:	5dc0      	addu      	r6, r5, r0
+    2c26:	37fa      	movi      	r7, 250
+    2c28:	3565      	movi      	r5, 101
+    2c2a:	6c02      	nor      	r0, r0
+    2c2c:	a6a0      	st.b      	r5, (r6, 0x0)
+    2c2e:	6d03      	mov      	r4, r0
+    2c30:	5ea2      	addi      	r5, r6, 1
+    2c32:	3101      	movi      	r1, 1
+    2c34:	3604      	movi      	r6, 4
+    2c36:	47e2      	lsli      	r7, r7, 2
+    2c38:	9808      	ld.w      	r0, (r14, 0x20)
+    2c3a:	65c1      	cmplt      	r0, r7
+    2c3c:	0c03      	bf      	0x2c42	// 2c42 <__GI___dtostr+0x270>
+    2c3e:	3940      	cmpnei      	r1, 0
+    2c40:	0811      	bt      	0x2c62	// 2c62 <__GI___dtostr+0x290>
+    2c42:	3c40      	cmpnei      	r4, 0
+    2c44:	0c08      	bf      	0x2c54	// 2c54 <__GI___dtostr+0x282>
+    2c46:	6c5f      	mov      	r1, r7
+    2c48:	9808      	ld.w      	r0, (r14, 0x20)
+    2c4a:	e0000bd5 	bsr      	0x43f4	// 43f4 <__divsi3>
+    2c4e:	202f      	addi      	r0, 48
+    2c50:	a500      	st.b      	r0, (r5, 0x0)
+    2c52:	2500      	addi      	r5, 1
+    2c54:	6c5f      	mov      	r1, r7
+    2c56:	9808      	ld.w      	r0, (r14, 0x20)
+    2c58:	e0000bf2 	bsr      	0x443c	// 443c <__modsi3>
+    2c5c:	2c00      	subi      	r4, 1
+    2c5e:	b808      	st.w      	r0, (r14, 0x20)
+    2c60:	3100      	movi      	r1, 0
+    2c62:	b823      	st.w      	r1, (r14, 0xc)
+    2c64:	6c1f      	mov      	r0, r7
+    2c66:	310a      	movi      	r1, 10
+    2c68:	2e00      	subi      	r6, 1
+    2c6a:	e0000bc5 	bsr      	0x43f4	// 43f4 <__divsi3>
+    2c6e:	3e40      	cmpnei      	r6, 0
+    2c70:	6dc3      	mov      	r7, r0
+    2c72:	9823      	ld.w      	r1, (r14, 0xc)
+    2c74:	0be2      	bt      	0x2c38	// 2c38 <__GI___dtostr+0x266>
+    2c76:	3c40      	cmpnei      	r4, 0
+    2c78:	0ec0      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c7a:	9842      	ld.w      	r2, (r14, 0x8)
+    2c7c:	3300      	movi      	r3, 0
+    2c7e:	5d89      	subu      	r4, r5, r2
+    2c80:	a560      	st.b      	r3, (r5, 0x0)
+    2c82:	b889      	st.w      	r4, (r14, 0x24)
+    2c84:	06ba      	br      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2c86:	7400      	zextb      	r0, r0
+    2c88:	e3fff41c 	bsr      	0x14c0	// 14c0 <__floatsidf>
+    2c8c:	6c93      	mov      	r2, r4
+    2c8e:	9863      	ld.w      	r3, (r14, 0xc)
+    2c90:	e3fff1fa 	bsr      	0x1084	// 1084 <__muldf3>
+    2c94:	6c83      	mov      	r2, r0
+    2c96:	6cc7      	mov      	r3, r1
+    2c98:	9806      	ld.w      	r0, (r14, 0x18)
+    2c9a:	9827      	ld.w      	r1, (r14, 0x1c)
+    2c9c:	e3fff1d8 	bsr      	0x104c	// 104c <__subdf3>
+    2ca0:	b806      	st.w      	r0, (r14, 0x18)
+    2ca2:	b827      	st.w      	r1, (r14, 0x1c)
+    2ca4:	2e00      	subi      	r6, 1
+    2ca6:	3700      	movi      	r7, 0
+    2ca8:	6c13      	mov      	r0, r4
+    2caa:	9823      	ld.w      	r1, (r14, 0xc)
+    2cac:	3200      	movi      	r2, 0
+    2cae:	1072      	lrw      	r3, 0x40240000	// 2cf4 <__GI___dtostr+0x322>
+    2cb0:	e3fff304 	bsr      	0x12b8	// 12b8 <__divdf3>
+    2cb4:	6d03      	mov      	r4, r0
+    2cb6:	b823      	st.w      	r1, (r14, 0xc)
+    2cb8:	0723      	br      	0x2afe	// 2afe <__GI___dtostr+0x12c>
+    2cba:	1012      	lrw      	r0, 0x3fb99999	// 2d00 <__GI___dtostr+0x32e>
+    2cbc:	1092      	lrw      	r4, 0x9999999a	// 2d04 <__GI___dtostr+0x332>
+    2cbe:	b803      	st.w      	r0, (r14, 0xc)
+    2cc0:	0727      	br      	0x2b0e	// 2b0e <__GI___dtostr+0x13c>
+    2cc2:	3e40      	cmpnei      	r6, 0
+    2cc4:	0e9a      	bf      	0x29f8	// 29f8 <__GI___dtostr+0x26>
+    2cc6:	372e      	movi      	r7, 46
+    2cc8:	a5e0      	st.b      	r7, (r5, 0x0)
+    2cca:	2e00      	subi      	r6, 1
+    2ccc:	5de2      	addi      	r7, r5, 1
+    2cce:	073e      	br      	0x2b4a	// 2b4a <__GI___dtostr+0x178>
+    2cd0:	3e40      	cmpnei      	r6, 0
+    2cd2:	0ac8      	bt      	0x2a62	// 2a62 <__GI___dtostr+0x90>
+    2cd4:	3508      	movi      	r5, 8
+    2cd6:	06ac      	br      	0x2a2e	// 2a2e <__GI___dtostr+0x5c>
+    2cd8:	00006426 	.long	0x00006426
+    2cdc:	0000642a 	.long	0x0000642a
+    2ce0:	3fe00000 	.long	0x3fe00000
+    2ce4:	3ff00000 	.long	0x3ff00000
+    2ce8:	fffffc01 	.long	0xfffffc01
+    2cec:	509f79ff 	.long	0x509f79ff
+    2cf0:	3fd34413 	.long	0x3fd34413
+    2cf4:	40240000 	.long	0x40240000
+    2cf8:	cccccccd 	.long	0xcccccccd
+    2cfc:	3feccccc 	.long	0x3feccccc
+    2d00:	3fb99999 	.long	0x3fb99999
+    2d04:	9999999a 	.long	0x9999999a
+    2d08:	4202a05f 	.long	0x4202a05f
+
+00002d0c <__isnan>:
+    2d0c:	416c      	lsli      	r3, r1, 12
+    2d0e:	4b4c      	lsri      	r2, r3, 12
+    2d10:	6c08      	or      	r0, r2
+    2d12:	3840      	cmpnei      	r0, 0
+    2d14:	0c0e      	bf      	0x2d30	// 2d30 <__isnan+0x24>
+    2d16:	1008      	lrw      	r0, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d18:	6840      	and      	r1, r0
+    2d1a:	6cc7      	mov      	r3, r1
+    2d1c:	3000      	movi      	r0, 0
+    2d1e:	1026      	lrw      	r1, 0x7ff00000	// 2d34 <__isnan+0x28>
+    2d20:	3200      	movi      	r2, 0
+    2d22:	6c81      	xor      	r2, r0
+    2d24:	6cc5      	xor      	r3, r1
+    2d26:	6c8c      	or      	r2, r3
+    2d28:	3a40      	cmpnei      	r2, 0
+    2d2a:	6443      	mvcv      	r1
+    2d2c:	7404      	zextb      	r0, r1
+    2d2e:	783c      	jmp      	r15
+    2d30:	3000      	movi      	r0, 0
+    2d32:	07fe      	br      	0x2d2e	// 2d2e <__isnan+0x22>
+    2d34:	7ff00000 	.long	0x7ff00000
+
+00002d38 <__strlen_fast>:
+    2d38:	6c43      	mov      	r1, r0
+    2d3a:	3203      	movi      	r2, 3
+    2d3c:	6808      	and      	r0, r2
+    2d3e:	3840      	cmpnei      	r0, 0
+    2d40:	0c08      	bf      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d42:	3000      	movi      	r0, 0
+    2d44:	8140      	ld.b      	r2, (r1, 0x0)
+    2d46:	3a40      	cmpnei      	r2, 0
+    2d48:	0c20      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d4a:	2100      	addi      	r1, 1
+    2d4c:	2000      	addi      	r0, 1
+    2d4e:	07fb      	br      	0x2d44	// 2d44 <__strlen_fast+0xc>
+    2d50:	9140      	ld.w      	r2, (r1, 0x0)
+    2d52:	680b      	tstnbz      	r2
+    2d54:	0c04      	bf      	0x2d5c	// 2d5c <__strlen_fast+0x24>
+    2d56:	2103      	addi      	r1, 4
+    2d58:	2003      	addi      	r0, 4
+    2d5a:	07fb      	br      	0x2d50	// 2d50 <__strlen_fast+0x18>
+    2d5c:	31ff      	movi      	r1, 255
+    2d5e:	6ccb      	mov      	r3, r2
+    2d60:	68c4      	and      	r3, r1
+    2d62:	3b40      	cmpnei      	r3, 0
+    2d64:	0c12      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d66:	2000      	addi      	r0, 1
+    2d68:	3110      	movi      	r1, 16
+    2d6a:	6ccb      	mov      	r3, r2
+    2d6c:	70c4      	lsl      	r3, r1
+    2d6e:	3118      	movi      	r1, 24
+    2d70:	70c5      	lsr      	r3, r1
+    2d72:	3b40      	cmpnei      	r3, 0
+    2d74:	0c0a      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d76:	2000      	addi      	r0, 1
+    2d78:	3108      	movi      	r1, 8
+    2d7a:	6ccb      	mov      	r3, r2
+    2d7c:	70c4      	lsl      	r3, r1
+    2d7e:	3118      	movi      	r1, 24
+    2d80:	70c5      	lsr      	r3, r1
+    2d82:	3b40      	cmpnei      	r3, 0
+    2d84:	0c02      	bf      	0x2d88	// 2d88 <__strlen_fast+0x50>
+    2d86:	2000      	addi      	r0, 1
+    2d88:	783c      	jmp      	r15
+	...
+
+00002d8c <__strcpy_fast>:
+    2d8c:	14c1      	push      	r4
+    2d8e:	6d03      	mov      	r4, r0
+    2d90:	6c87      	mov      	r2, r1
+    2d92:	6c90      	or      	r2, r4
+    2d94:	3303      	movi      	r3, 3
+    2d96:	688c      	and      	r2, r3
+    2d98:	3a40      	cmpnei      	r2, 0
+    2d9a:	0c08      	bf      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2d9c:	8160      	ld.b      	r3, (r1, 0x0)
+    2d9e:	a460      	st.b      	r3, (r4, 0x0)
+    2da0:	2100      	addi      	r1, 1
+    2da2:	2400      	addi      	r4, 1
+    2da4:	3b40      	cmpnei      	r3, 0
+    2da6:	0bfb      	bt      	0x2d9c	// 2d9c <__strcpy_fast+0x10>
+    2da8:	1481      	pop      	r4
+    2daa:	9160      	ld.w      	r3, (r1, 0x0)
+    2dac:	680f      	tstnbz      	r3
+    2dae:	0c2e      	bf      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2db0:	b460      	st.w      	r3, (r4, 0x0)
+    2db2:	9161      	ld.w      	r3, (r1, 0x4)
+    2db4:	680f      	tstnbz      	r3
+    2db6:	0c1d      	bf      	0x2df0	// 2df0 <__strcpy_fast+0x64>
+    2db8:	b461      	st.w      	r3, (r4, 0x4)
+    2dba:	9162      	ld.w      	r3, (r1, 0x8)
+    2dbc:	680f      	tstnbz      	r3
+    2dbe:	0c1b      	bf      	0x2df4	// 2df4 <__strcpy_fast+0x68>
+    2dc0:	b462      	st.w      	r3, (r4, 0x8)
+    2dc2:	9163      	ld.w      	r3, (r1, 0xc)
+    2dc4:	680f      	tstnbz      	r3
+    2dc6:	0c19      	bf      	0x2df8	// 2df8 <__strcpy_fast+0x6c>
+    2dc8:	b463      	st.w      	r3, (r4, 0xc)
+    2dca:	9164      	ld.w      	r3, (r1, 0x10)
+    2dcc:	680f      	tstnbz      	r3
+    2dce:	0c17      	bf      	0x2dfc	// 2dfc <__strcpy_fast+0x70>
+    2dd0:	b464      	st.w      	r3, (r4, 0x10)
+    2dd2:	9165      	ld.w      	r3, (r1, 0x14)
+    2dd4:	680f      	tstnbz      	r3
+    2dd6:	0c15      	bf      	0x2e00	// 2e00 <__strcpy_fast+0x74>
+    2dd8:	b465      	st.w      	r3, (r4, 0x14)
+    2dda:	9166      	ld.w      	r3, (r1, 0x18)
+    2ddc:	680f      	tstnbz      	r3
+    2dde:	0c13      	bf      	0x2e04	// 2e04 <__strcpy_fast+0x78>
+    2de0:	b466      	st.w      	r3, (r4, 0x18)
+    2de2:	9167      	ld.w      	r3, (r1, 0x1c)
+    2de4:	680f      	tstnbz      	r3
+    2de6:	0c11      	bf      	0x2e08	// 2e08 <__strcpy_fast+0x7c>
+    2de8:	b467      	st.w      	r3, (r4, 0x1c)
+    2dea:	241f      	addi      	r4, 32
+    2dec:	211f      	addi      	r1, 32
+    2dee:	07de      	br      	0x2daa	// 2daa <__strcpy_fast+0x1e>
+    2df0:	2403      	addi      	r4, 4
+    2df2:	040c      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df4:	2407      	addi      	r4, 8
+    2df6:	040a      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2df8:	240b      	addi      	r4, 12
+    2dfa:	0408      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2dfc:	240f      	addi      	r4, 16
+    2dfe:	0406      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e00:	2413      	addi      	r4, 20
+    2e02:	0404      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e04:	2417      	addi      	r4, 24
+    2e06:	0402      	br      	0x2e0a	// 2e0a <__strcpy_fast+0x7e>
+    2e08:	241b      	addi      	r4, 28
+    2e0a:	3118      	movi      	r1, 24
+    2e0c:	6c8f      	mov      	r2, r3
+    2e0e:	7084      	lsl      	r2, r1
+    2e10:	7085      	lsr      	r2, r1
+    2e12:	a440      	st.b      	r2, (r4, 0x0)
+    2e14:	3a40      	cmpnei      	r2, 0
+    2e16:	0c12      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e18:	3110      	movi      	r1, 16
+    2e1a:	6c8f      	mov      	r2, r3
+    2e1c:	7084      	lsl      	r2, r1
+    2e1e:	3118      	movi      	r1, 24
+    2e20:	7085      	lsr      	r2, r1
+    2e22:	a441      	st.b      	r2, (r4, 0x1)
+    2e24:	3a40      	cmpnei      	r2, 0
+    2e26:	0c0a      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e28:	3108      	movi      	r1, 8
+    2e2a:	6c8f      	mov      	r2, r3
+    2e2c:	7084      	lsl      	r2, r1
+    2e2e:	3118      	movi      	r1, 24
+    2e30:	7085      	lsr      	r2, r1
+    2e32:	a442      	st.b      	r2, (r4, 0x2)
+    2e34:	3a40      	cmpnei      	r2, 0
+    2e36:	0c02      	bf      	0x2e3a	// 2e3a <__strcpy_fast+0xae>
+    2e38:	b460      	st.w      	r3, (r4, 0x0)
+    2e3a:	1481      	pop      	r4
+
+00002e3c <__GI_strchr>:
+    2e3c:	8040      	ld.b      	r2, (r0, 0x0)
+    2e3e:	644a      	cmpne      	r2, r1
+    2e40:	0c06      	bf      	0x2e4c	// 2e4c <__GI_strchr+0x10>
+    2e42:	3a40      	cmpnei      	r2, 0
+    2e44:	0c03      	bf      	0x2e4a	// 2e4a <__GI_strchr+0xe>
+    2e46:	2000      	addi      	r0, 1
+    2e48:	07fa      	br      	0x2e3c	// 2e3c <__GI_strchr>
+    2e4a:	6c0b      	mov      	r0, r2
+    2e4c:	783c      	jmp      	r15
+	...
+
+00002e50 <__GI_strerror>:
+    2e50:	338f      	movi      	r3, 143
+    2e52:	640c      	cmphs      	r3, r0
+    2e54:	0c06      	bf      	0x2e60	// 2e60 <__GI_strerror+0x10>
+    2e56:	4002      	lsli      	r0, r0, 2
+    2e58:	1023      	lrw      	r1, 0x5fe4	// 2e64 <__GI_strerror+0x14>
+    2e5a:	6004      	addu      	r0, r1
+    2e5c:	9000      	ld.w      	r0, (r0, 0x0)
+    2e5e:	783c      	jmp      	r15
+    2e60:	1002      	lrw      	r0, 0x624b	// 2e68 <__GI_strerror+0x18>
+    2e62:	07fe      	br      	0x2e5e	// 2e5e <__GI_strerror+0xe>
+    2e64:	00005fe4 	.long	0x00005fe4
+    2e68:	0000624b 	.long	0x0000624b
+
+00002e6c <__isinf>:
+    2e6c:	3840      	cmpnei      	r0, 0
+    2e6e:	6c83      	mov      	r2, r0
+    2e70:	6cc7      	mov      	r3, r1
+    2e72:	0804      	bt      	0x2e7a	// 2e7a <__isinf+0xe>
+    2e74:	1028      	lrw      	r1, 0x7ff00000	// 2e94 <__isinf+0x28>
+    2e76:	644e      	cmpne      	r3, r1
+    2e78:	0c0b      	bf      	0x2e8e	// 2e8e <__isinf+0x22>
+    2e7a:	3000      	movi      	r0, 0
+    2e7c:	1027      	lrw      	r1, 0xfff00000	// 2e98 <__isinf+0x2c>
+    2e7e:	6c81      	xor      	r2, r0
+    2e80:	6cc5      	xor      	r3, r1
+    2e82:	6c8c      	or      	r2, r3
+    2e84:	3a40      	cmpnei      	r2, 0
+    2e86:	64c3      	mvcv      	r3
+    2e88:	3000      	movi      	r0, 0
+    2e8a:	600e      	subu      	r0, r3
+    2e8c:	783c      	jmp      	r15
+    2e8e:	3001      	movi      	r0, 1
+    2e90:	07fe      	br      	0x2e8c	// 2e8c <__isinf+0x20>
+    2e92:	0000      	bkpt
+    2e94:	7ff00000 	.long	0x7ff00000
+    2e98:	fff00000 	.long	0xfff00000
+
+00002e9c <__eqdf2>:
+    2e9c:	14d0      	push      	r15
+    2e9e:	142e      	subi      	r14, r14, 56
+    2ea0:	b800      	st.w      	r0, (r14, 0x0)
+    2ea2:	b821      	st.w      	r1, (r14, 0x4)
+    2ea4:	6c3b      	mov      	r0, r14
+    2ea6:	1904      	addi      	r1, r14, 16
+    2ea8:	b863      	st.w      	r3, (r14, 0xc)
+    2eaa:	b842      	st.w      	r2, (r14, 0x8)
+    2eac:	e3fff4b4 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb0:	1909      	addi      	r1, r14, 36
+    2eb2:	1802      	addi      	r0, r14, 8
+    2eb4:	e3fff4b0 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eb8:	9864      	ld.w      	r3, (r14, 0x10)
+    2eba:	3b01      	cmphsi      	r3, 2
+    2ebc:	0c0a      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ebe:	9869      	ld.w      	r3, (r14, 0x24)
+    2ec0:	3b01      	cmphsi      	r3, 2
+    2ec2:	0c07      	bf      	0x2ed0	// 2ed0 <__eqdf2+0x34>
+    2ec4:	1909      	addi      	r1, r14, 36
+    2ec6:	1804      	addi      	r0, r14, 16
+    2ec8:	e3fff508 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2ecc:	140e      	addi      	r14, r14, 56
+    2ece:	1490      	pop      	r15
+    2ed0:	3001      	movi      	r0, 1
+    2ed2:	140e      	addi      	r14, r14, 56
+    2ed4:	1490      	pop      	r15
+	...
+
+00002ed8 <__ltdf2>:
+    2ed8:	14d0      	push      	r15
+    2eda:	142e      	subi      	r14, r14, 56
+    2edc:	b800      	st.w      	r0, (r14, 0x0)
+    2ede:	b821      	st.w      	r1, (r14, 0x4)
+    2ee0:	6c3b      	mov      	r0, r14
+    2ee2:	1904      	addi      	r1, r14, 16
+    2ee4:	b863      	st.w      	r3, (r14, 0xc)
+    2ee6:	b842      	st.w      	r2, (r14, 0x8)
+    2ee8:	e3fff496 	bsr      	0x1814	// 1814 <__unpack_d>
+    2eec:	1909      	addi      	r1, r14, 36
+    2eee:	1802      	addi      	r0, r14, 8
+    2ef0:	e3fff492 	bsr      	0x1814	// 1814 <__unpack_d>
+    2ef4:	9864      	ld.w      	r3, (r14, 0x10)
+    2ef6:	3b01      	cmphsi      	r3, 2
+    2ef8:	0c0a      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2efa:	9869      	ld.w      	r3, (r14, 0x24)
+    2efc:	3b01      	cmphsi      	r3, 2
+    2efe:	0c07      	bf      	0x2f0c	// 2f0c <__ltdf2+0x34>
+    2f00:	1909      	addi      	r1, r14, 36
+    2f02:	1804      	addi      	r0, r14, 16
+    2f04:	e3fff4ea 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    2f08:	140e      	addi      	r14, r14, 56
+    2f0a:	1490      	pop      	r15
+    2f0c:	3001      	movi      	r0, 1
+    2f0e:	140e      	addi      	r14, r14, 56
+    2f10:	1490      	pop      	r15
+
+Disassembly of section .text.__main:
+
+00002f14 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    2f14:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    2f16:	1009      	lrw      	r0, 0x20000000	// 2f38 <__main+0x24>
+    2f18:	1029      	lrw      	r1, 0x6bb8	// 2f3c <__main+0x28>
+    2f1a:	6442      	cmpne      	r0, r1
+    2f1c:	0c05      	bf      	0x2f26	// 2f26 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    2f1e:	1049      	lrw      	r2, 0x200000a0	// 2f40 <__main+0x2c>
+    2f20:	6082      	subu      	r2, r0
+    2f22:	e3fff5c1 	bsr      	0x1aa4	// 1aa4 <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    2f26:	1048      	lrw      	r2, 0x20000770	// 2f44 <__main+0x30>
+    2f28:	1008      	lrw      	r0, 0x200000a0	// 2f48 <__main+0x34>
+    2f2a:	640a      	cmpne      	r2, r0
+    2f2c:	0c05      	bf      	0x2f36	// 2f36 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    2f2e:	6082      	subu      	r2, r0
+    2f30:	3100      	movi      	r1, 0
+    2f32:	e3fff575 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+  }
+
+	
+}
+    2f36:	1490      	pop      	r15
+    2f38:	20000000 	.long	0x20000000
+    2f3c:	00006bb8 	.long	0x00006bb8
+    2f40:	200000a0 	.long	0x200000a0
+    2f44:	20000770 	.long	0x20000770
+    2f48:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00002f4c <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    2f4c:	3848      	cmpnei      	r0, 8
+    2f4e:	080a      	bt      	0x2f62	// 2f62 <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    2f50:	107a      	lrw      	r3, 0x2000004c	// 2fb8 <SYSCON_General_CMD.part.0+0x6c>
+    2f52:	32ff      	movi      	r2, 255
+    2f54:	9320      	ld.w      	r1, (r3, 0x0)
+    2f56:	9160      	ld.w      	r3, (r1, 0x0)
+    2f58:	424c      	lsli      	r2, r2, 12
+    2f5a:	68c9      	andn      	r3, r2
+    2f5c:	3bae      	bseti      	r3, 14
+    2f5e:	3bb2      	bseti      	r3, 18
+    2f60:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    2f62:	1077      	lrw      	r3, 0x2000005c	// 2fbc <SYSCON_General_CMD.part.0+0x70>
+    2f64:	9360      	ld.w      	r3, (r3, 0x0)
+    2f66:	9341      	ld.w      	r2, (r3, 0x4)
+    2f68:	6c80      	or      	r2, r0
+    2f6a:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    2f6c:	9343      	ld.w      	r2, (r3, 0xc)
+    2f6e:	6880      	and      	r2, r0
+    2f70:	3a40      	cmpnei      	r2, 0
+    2f72:	0ffd      	bf      	0x2f6c	// 2f6c <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    2f74:	3842      	cmpnei      	r0, 2
+    2f76:	0807      	bt      	0x2f84	// 2f84 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    2f78:	3102      	movi      	r1, 2
+    2f7a:	9344      	ld.w      	r2, (r3, 0x10)
+    2f7c:	6884      	and      	r2, r1
+    2f7e:	3a40      	cmpnei      	r2, 0
+    2f80:	0ffd      	bf      	0x2f7a	// 2f7a <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    2f82:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    2f84:	3802      	cmphsi      	r0, 3
+    2f86:	0809      	bt      	0x2f98	// 2f98 <SYSCON_General_CMD.part.0+0x4c>
+    2f88:	3841      	cmpnei      	r0, 1
+    2f8a:	0bfc      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    2f8c:	3101      	movi      	r1, 1
+    2f8e:	9344      	ld.w      	r2, (r3, 0x10)
+    2f90:	6884      	and      	r2, r1
+    2f92:	3a40      	cmpnei      	r2, 0
+    2f94:	0ffd      	bf      	0x2f8e	// 2f8e <SYSCON_General_CMD.part.0+0x42>
+    2f96:	07f6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2f98:	3848      	cmpnei      	r0, 8
+    2f9a:	0807      	bt      	0x2fa8	// 2fa8 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    2f9c:	3108      	movi      	r1, 8
+    2f9e:	9344      	ld.w      	r2, (r3, 0x10)
+    2fa0:	6884      	and      	r2, r1
+    2fa2:	3a40      	cmpnei      	r2, 0
+    2fa4:	0ffd      	bf      	0x2f9e	// 2f9e <SYSCON_General_CMD.part.0+0x52>
+    2fa6:	07ee      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    2fa8:	3850      	cmpnei      	r0, 16
+    2faa:	0bec      	bt      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    2fac:	3110      	movi      	r1, 16
+    2fae:	9344      	ld.w      	r2, (r3, 0x10)
+    2fb0:	6884      	and      	r2, r1
+    2fb2:	3a40      	cmpnei      	r2, 0
+    2fb4:	0ffd      	bf      	0x2fae	// 2fae <SYSCON_General_CMD.part.0+0x62>
+    2fb6:	07e6      	br      	0x2f82	// 2f82 <SYSCON_General_CMD.part.0+0x36>
+    2fb8:	2000004c 	.long	0x2000004c
+    2fbc:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00002fc0 <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    2fc0:	106c      	lrw      	r3, 0x2000005c	// 2ff0 <SYSCON_RST_VALUE+0x30>
+    2fc2:	104d      	lrw      	r2, 0xffff	// 2ff4 <SYSCON_RST_VALUE+0x34>
+    2fc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2fc6:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    2fc8:	104c      	lrw      	r2, 0xffffff	// 2ff8 <SYSCON_RST_VALUE+0x38>
+    2fca:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    2fcc:	104c      	lrw      	r2, 0xd22d0000	// 2ffc <SYSCON_RST_VALUE+0x3c>
+    2fce:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    2fd0:	104c      	lrw      	r2, 0x70ff3bff	// 3000 <SYSCON_RST_VALUE+0x40>
+    2fd2:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    2fd4:	320a      	movi      	r2, 10
+    2fd6:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fd8:	102b      	lrw      	r1, 0x70c	// 3004 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    2fda:	237f      	addi      	r3, 128
+    2fdc:	3200      	movi      	r2, 0
+    2fde:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    2fe0:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    2fe2:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    2fe4:	1029      	lrw      	r1, 0x3fe	// 3008 <SYSCON_RST_VALUE+0x48>
+    2fe6:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    2fe8:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    2fea:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    2fec:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    2fee:	783c      	jmp      	r15
+    2ff0:	2000005c 	.long	0x2000005c
+    2ff4:	0000ffff 	.long	0x0000ffff
+    2ff8:	00ffffff 	.long	0x00ffffff
+    2ffc:	d22d0000 	.long	0xd22d0000
+    3000:	70ff3bff 	.long	0x70ff3bff
+    3004:	0000070c 	.long	0x0000070c
+    3008:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+0000300c <SYSCON_General_CMD>:
+{
+    300c:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    300e:	3840      	cmpnei      	r0, 0
+    3010:	0c05      	bf      	0x301a	// 301a <SYSCON_General_CMD+0xe>
+    3012:	6c07      	mov      	r0, r1
+    3014:	e3ffff9c 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+}
+    3018:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    301a:	1068      	lrw      	r3, 0x2000005c	// 3038 <SYSCON_General_CMD+0x2c>
+    301c:	9360      	ld.w      	r3, (r3, 0x0)
+    301e:	9342      	ld.w      	r2, (r3, 0x8)
+    3020:	6c84      	or      	r2, r1
+    3022:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    3024:	9343      	ld.w      	r2, (r3, 0xc)
+    3026:	6884      	and      	r2, r1
+    3028:	3a40      	cmpnei      	r2, 0
+    302a:	0bfd      	bt      	0x3024	// 3024 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    302c:	237f      	addi      	r3, 128
+    302e:	9301      	ld.w      	r0, (r3, 0x4)
+    3030:	6c40      	or      	r1, r0
+    3032:	b321      	st.w      	r1, (r3, 0x4)
+}
+    3034:	07f2      	br      	0x3018	// 3018 <SYSCON_General_CMD+0xc>
+    3036:	0000      	bkpt
+    3038:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+0000303c <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    303c:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    303e:	3b48      	cmpnei      	r3, 8
+    3040:	0828      	bt      	0x3090	// 3090 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    3042:	109d      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3044:	3501      	movi      	r5, 1
+    3046:	9480      	ld.w      	r4, (r4, 0x0)
+    3048:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    304a:	3504      	movi      	r5, 4
+    304c:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    304e:	5b83      	subi      	r4, r3, 1
+    3050:	3c01      	cmphsi      	r4, 2
+    3052:	0c2b      	bf      	0x30a8	// 30a8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    3054:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    3056:	3c04      	cmphsi      	r4, 5
+    3058:	0c03      	bf      	0x305e	// 305e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    305a:	3b4b      	cmpnei      	r3, 11
+    305c:	0807      	bt      	0x306a	// 306a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    305e:	1076      	lrw      	r3, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    3060:	3401      	movi      	r4, 1
+    3062:	9360      	ld.w      	r3, (r3, 0x0)
+    3064:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    3066:	3400      	movi      	r4, 0
+    3068:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    306a:	1094      	lrw      	r4, 0xd22d0000	// 30b8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    306c:	6c10      	or      	r0, r4
+    306e:	1074      	lrw      	r3, 0x2000005c	// 30bc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    3070:	6c40      	or      	r1, r0
+    3072:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3074:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    3076:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    3078:	4001      	lsli      	r0, r0, 1
+    307a:	9324      	ld.w      	r1, (r3, 0x10)
+    307c:	6840      	and      	r1, r0
+    307e:	3940      	cmpnei      	r1, 0
+    3080:	0ffd      	bf      	0x307a	// 307a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    3082:	1030      	lrw      	r1, 0xc33c0000	// 30c0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    3084:	6c48      	or      	r1, r2
+    3086:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    3088:	9328      	ld.w      	r1, (r3, 0x20)
+    308a:	644a      	cmpne      	r2, r1
+    308c:	0bfe      	bt      	0x3088	// 3088 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    308e:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    3090:	3b40      	cmpnei      	r3, 0
+    3092:	0c03      	bf      	0x3098	// 3098 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    3094:	3b49      	cmpnei      	r3, 9
+    3096:	0807      	bt      	0x30a4	// 30a4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    3098:	1087      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    309a:	3501      	movi      	r5, 1
+    309c:	9480      	ld.w      	r4, (r4, 0x0)
+    309e:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    30a0:	3502      	movi      	r5, 2
+    30a2:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    30a4:	3b4a      	cmpnei      	r3, 10
+    30a6:	0bd4      	bt      	0x304e	// 304e <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    30a8:	1083      	lrw      	r4, 0x20000060	// 30b4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    30aa:	3501      	movi      	r5, 1
+    30ac:	9480      	ld.w      	r4, (r4, 0x0)
+    30ae:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    30b0:	b4a5      	st.w      	r5, (r4, 0x14)
+    30b2:	07d1      	br      	0x3054	// 3054 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    30b4:	20000060 	.long	0x20000060
+    30b8:	d22d0000 	.long	0xd22d0000
+    30bc:	2000005c 	.long	0x2000005c
+    30c0:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+000030c4 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    30c4:	14d1      	push      	r4, r15
+    30c6:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    30c8:	3110      	movi      	r1, 16
+    30ca:	3000      	movi      	r0, 0
+    30cc:	e3ffffa0 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    30d0:	1066      	lrw      	r3, 0x2000005c	// 30e8 <SYSCON_HFOSC_SELECTE+0x24>
+    30d2:	9360      	ld.w      	r3, (r3, 0x0)
+    30d4:	9319      	ld.w      	r0, (r3, 0x64)
+    30d6:	3884      	bclri      	r0, 4
+    30d8:	3885      	bclri      	r0, 5
+    30da:	6c10      	or      	r0, r4
+    30dc:	b319      	st.w      	r0, (r3, 0x64)
+    30de:	3010      	movi      	r0, 16
+    30e0:	e3ffff36 	bsr      	0x2f4c	// 2f4c <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    30e4:	1491      	pop      	r4, r15
+    30e6:	0000      	bkpt
+    30e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+000030ec <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    30ec:	106c      	lrw      	r3, 0x2000005c	// 311c <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    30ee:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f0:	9360      	ld.w      	r3, (r3, 0x0)
+    30f2:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    30f4:	0c0a      	bf      	0x3108	// 3108 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30f6:	104b      	lrw      	r2, 0x78870000	// 3120 <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30f8:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    30fa:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    30fc:	4125      	lsli      	r1, r1, 5
+    30fe:	934d      	ld.w      	r2, (r3, 0x34)
+    3100:	6884      	and      	r2, r1
+    3102:	3a40      	cmpnei      	r2, 0
+    3104:	0ffd      	bf      	0x30fe	// 30fe <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    3106:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    3108:	1047      	lrw      	r2, 0x788755aa	// 3124 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310a:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    310c:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    310e:	4125      	lsli      	r1, r1, 5
+    3110:	934d      	ld.w      	r2, (r3, 0x34)
+    3112:	6884      	and      	r2, r1
+    3114:	3a40      	cmpnei      	r2, 0
+    3116:	0bfd      	bt      	0x3110	// 3110 <SYSCON_WDT_CMD+0x24>
+    3118:	07f7      	br      	0x3106	// 3106 <SYSCON_WDT_CMD+0x1a>
+    311a:	0000      	bkpt
+    311c:	2000005c 	.long	0x2000005c
+    3120:	78870000 	.long	0x78870000
+    3124:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00003128 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    3128:	1064      	lrw      	r3, 0x2000005c	// 3138 <SYSCON_IWDCNT_Reload+0x10>
+    312a:	32b4      	movi      	r2, 180
+    312c:	9360      	ld.w      	r3, (r3, 0x0)
+    312e:	237f      	addi      	r3, 128
+    3130:	4257      	lsli      	r2, r2, 23
+    3132:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    3134:	783c      	jmp      	r15
+    3136:	0000      	bkpt
+    3138:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+0000313c <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    313c:	1044      	lrw      	r2, 0x87780000	// 314c <SYSCON_IWDCNT_Config+0x10>
+    313e:	1065      	lrw      	r3, 0x2000005c	// 3150 <SYSCON_IWDCNT_Config+0x14>
+    3140:	6c48      	or      	r1, r2
+    3142:	9360      	ld.w      	r3, (r3, 0x0)
+    3144:	6c04      	or      	r0, r1
+    3146:	237f      	addi      	r3, 128
+    3148:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    314a:	783c      	jmp      	r15
+    314c:	87780000 	.long	0x87780000
+    3150:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00003154 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    3154:	14c3      	push      	r4-r6
+    3156:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    3158:	10c5      	lrw      	r6, 0xb44b0000	// 316c <SYSCON_LVD_Config+0x18>
+    315a:	6d18      	or      	r4, r6
+    315c:	6cd0      	or      	r3, r4
+    315e:	6c8c      	or      	r2, r3
+    3160:	6c48      	or      	r1, r2
+    3162:	10a4      	lrw      	r5, 0x2000005c	// 3170 <SYSCON_LVD_Config+0x1c>
+    3164:	6c04      	or      	r0, r1
+    3166:	95a0      	ld.w      	r5, (r5, 0x0)
+    3168:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    316a:	1483      	pop      	r4-r6
+    316c:	b44b0000 	.long	0xb44b0000
+    3170:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00003174 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    3174:	1066      	lrw      	r3, 0x2000005c	// 318c <LVD_Int_Enable+0x18>
+    3176:	3180      	movi      	r1, 128
+    3178:	9360      	ld.w      	r3, (r3, 0x0)
+    317a:	3280      	movi      	r2, 128
+    317c:	604c      	addu      	r1, r3
+    317e:	4244      	lsli      	r2, r2, 4
+    3180:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    3182:	935d      	ld.w      	r2, (r3, 0x74)
+    3184:	3aab      	bseti      	r2, 11
+    3186:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    3188:	783c      	jmp      	r15
+    318a:	0000      	bkpt
+    318c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00003190 <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    3190:	1066      	lrw      	r3, 0x2000005c	// 31a8 <IWDT_Int_Enable+0x18>
+    3192:	3180      	movi      	r1, 128
+    3194:	9360      	ld.w      	r3, (r3, 0x0)
+    3196:	3280      	movi      	r2, 128
+    3198:	604c      	addu      	r1, r3
+    319a:	4241      	lsli      	r2, r2, 1
+    319c:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    319e:	935d      	ld.w      	r2, (r3, 0x74)
+    31a0:	3aa8      	bseti      	r2, 8
+    31a2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    31a4:	783c      	jmp      	r15
+    31a6:	0000      	bkpt
+    31a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+000031ac <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    31ac:	3a40      	cmpnei      	r2, 0
+    31ae:	0c04      	bf      	0x31b6	// 31b6 <EXTI_trigger_CMD+0xa>
+    31b0:	3a41      	cmpnei      	r2, 1
+    31b2:	0c0e      	bf      	0x31ce	// 31ce <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    31b4:	783c      	jmp      	r15
+    31b6:	106d      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31b8:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    31ba:	9360      	ld.w      	r3, (r3, 0x0)
+    31bc:	237f      	addi      	r3, 128
+    31be:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    31c0:	0c04      	bf      	0x31c8	// 31c8 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    31c2:	6c48      	or      	r1, r2
+    31c4:	b325      	st.w      	r1, (r3, 0x14)
+    31c6:	07f7      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    31c8:	6885      	andn      	r2, r1
+    31ca:	b345      	st.w      	r2, (r3, 0x14)
+    31cc:	07f4      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31ce:	1067      	lrw      	r3, 0x2000005c	// 31e8 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    31d0:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    31d2:	9360      	ld.w      	r3, (r3, 0x0)
+    31d4:	237f      	addi      	r3, 128
+    31d6:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    31d8:	0c04      	bf      	0x31e0	// 31e0 <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    31da:	6c48      	or      	r1, r2
+    31dc:	b326      	st.w      	r1, (r3, 0x18)
+    31de:	07eb      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    31e0:	6885      	andn      	r2, r1
+    31e2:	b346      	st.w      	r2, (r3, 0x18)
+}
+    31e4:	07e8      	br      	0x31b4	// 31b4 <EXTI_trigger_CMD+0x8>
+    31e6:	0000      	bkpt
+    31e8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+000031ec <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    31ec:	3202      	movi      	r2, 2
+    31ee:	1062      	lrw      	r3, 0xe000e100	// 31f4 <SYSCON_Int_Enable+0x8>
+    31f0:	b340      	st.w      	r2, (r3, 0x0)
+}
+    31f2:	783c      	jmp      	r15
+    31f4:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+000031f8 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31f8:	1066      	lrw      	r3, 0xe000e400	// 3210 <SYSCON_INT_Priority+0x18>
+    31fa:	1047      	lrw      	r2, 0xc0c0c0c0	// 3214 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    31fc:	1027      	lrw      	r1, 0xc0c000c0	// 3218 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    31fe:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    3200:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    3202:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    3204:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    3206:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    3208:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    320a:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    320c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    320e:	783c      	jmp      	r15
+    3210:	e000e400 	.long	0xe000e400
+    3214:	c0c0c0c0 	.long	0xc0c0c0c0
+    3218:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+0000321c <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    321c:	14c1      	push      	r4
+    321e:	4862      	lsri      	r3, r0, 2
+    3220:	4342      	lsli      	r2, r3, 2
+    3222:	106a      	lrw      	r3, 0x20000064	// 3248 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    3224:	3403      	movi      	r4, 3
+    3226:	9360      	ld.w      	r3, (r3, 0x0)
+    3228:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    322a:	3280      	movi      	r2, 128
+    322c:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    322e:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    3230:	60c8      	addu      	r3, r2
+    3232:	4003      	lsli      	r0, r0, 3
+    3234:	34ff      	movi      	r4, 255
+    3236:	9340      	ld.w      	r2, (r3, 0x0)
+    3238:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323a:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    323c:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    323e:	7040      	lsl      	r1, r0
+    3240:	6c48      	or      	r1, r2
+    3242:	b320      	st.w      	r1, (r3, 0x0)
+}
+    3244:	1481      	pop      	r4
+    3246:	0000      	bkpt
+    3248:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+0000324c <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    324c:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    324e:	3907      	cmphsi      	r1, 8
+{
+    3250:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    3252:	0830      	bt      	0x32b2	// 32b2 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    3254:	5903      	subi      	r0, r1, 1
+    3256:	3806      	cmphsi      	r0, 7
+    3258:	0827      	bt      	0x32a6	// 32a6 <GPIO_Init+0x5a>
+    325a:	e3ffed51 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    325e:	1004      	.short	0x1004
+    3260:	1d1a1613 	.long	0x1d1a1613
+    3264:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    3266:	3300      	movi      	r3, 0
+    3268:	3104      	movi      	r1, 4
+    326a:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    326c:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    326e:	9440      	ld.w      	r2, (r4, 0x0)
+    3270:	68c8      	and      	r3, r2
+        if (Dir)
+    3272:	0c1e      	bf      	0x32ae	// 32ae <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    3274:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    3276:	7084      	lsl      	r2, r1
+    3278:	6cc8      	or      	r3, r2
+    327a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    327c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    327e:	3108      	movi      	r1, 8
+    3280:	1166      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    3282:	07f5      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    3284:	310c      	movi      	r1, 12
+    3286:	1166      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    3288:	07f2      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    328a:	3110      	movi      	r1, 16
+    328c:	1165      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    328e:	2b00      	subi      	r3, 1
+    3290:	07ee      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    3292:	3114      	movi      	r1, 20
+    3294:	1164      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    3296:	07fc      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    3298:	33f1      	movi      	r3, 241
+    329a:	3118      	movi      	r1, 24
+    329c:	4378      	lsli      	r3, r3, 24
+    329e:	07f8      	br      	0x328e	// 328e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    32a0:	311c      	movi      	r1, 28
+    32a2:	1162      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    32a4:	07e4      	br      	0x326c	// 326c <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    32a6:	3300      	movi      	r3, 0
+    32a8:	3100      	movi      	r1, 0
+    32aa:	2b0f      	subi      	r3, 16
+    32ac:	07e0      	br      	0x326c	// 326c <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    32ae:	3202      	movi      	r2, 2
+    32b0:	07e3      	br      	0x3276	// 3276 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    32b2:	390f      	cmphsi      	r1, 16
+    32b4:	0be4      	bt      	0x327c	// 327c <GPIO_Init+0x30>
+        switch (PinNum)
+    32b6:	2908      	subi      	r1, 9
+    32b8:	3906      	cmphsi      	r1, 7
+    32ba:	6c07      	mov      	r0, r1
+    32bc:	0827      	bt      	0x330a	// 330a <GPIO_Init+0xbe>
+    32be:	e3ffed1f 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    32c2:	1004      	.short	0x1004
+    32c4:	1d1a1613 	.long	0x1d1a1613
+    32c8:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    32ca:	3300      	movi      	r3, 0
+    32cc:	3104      	movi      	r1, 4
+    32ce:	2bf0      	subi      	r3, 241
+      if (Dir)
+    32d0:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d2:	9441      	ld.w      	r2, (r4, 0x4)
+    32d4:	68c8      	and      	r3, r2
+      if (Dir)
+    32d6:	0c1e      	bf      	0x3312	// 3312 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    32d8:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    32da:	7084      	lsl      	r2, r1
+    32dc:	6cc8      	or      	r3, r2
+    32de:	b461      	st.w      	r3, (r4, 0x4)
+}
+    32e0:	07ce      	br      	0x327c	// 327c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    32e2:	3108      	movi      	r1, 8
+    32e4:	106d      	lrw      	r3, 0xfffff0ff	// 3318 <GPIO_Init+0xcc>
+    32e6:	07f5      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    32e8:	310c      	movi      	r1, 12
+    32ea:	106d      	lrw      	r3, 0xffff0fff	// 331c <GPIO_Init+0xd0>
+    32ec:	07f2      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    32ee:	3110      	movi      	r1, 16
+    32f0:	106c      	lrw      	r3, 0xfff10000	// 3320 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32f2:	2b00      	subi      	r3, 1
+    32f4:	07ee      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    32f6:	3114      	movi      	r1, 20
+    32f8:	106b      	lrw      	r3, 0xff100000	// 3324 <GPIO_Init+0xd8>
+    32fa:	07fc      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    32fc:	33f1      	movi      	r3, 241
+    32fe:	3118      	movi      	r1, 24
+    3300:	4378      	lsli      	r3, r3, 24
+    3302:	07f8      	br      	0x32f2	// 32f2 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    3304:	311c      	movi      	r1, 28
+    3306:	1069      	lrw      	r3, 0xfffffff	// 3328 <GPIO_Init+0xdc>
+    3308:	07e4      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    330a:	3300      	movi      	r3, 0
+    330c:	3100      	movi      	r1, 0
+    330e:	2b0f      	subi      	r3, 16
+    3310:	07e0      	br      	0x32d0	// 32d0 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    3312:	3202      	movi      	r2, 2
+    3314:	07e3      	br      	0x32da	// 32da <GPIO_Init+0x8e>
+    3316:	0000      	bkpt
+    3318:	fffff0ff 	.long	0xfffff0ff
+    331c:	ffff0fff 	.long	0xffff0fff
+    3320:	fff10000 	.long	0xfff10000
+    3324:	ff100000 	.long	0xff100000
+    3328:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+0000332c <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    332c:	4121      	lsli      	r1, r1, 1
+    332e:	3203      	movi      	r2, 3
+    3330:	9068      	ld.w      	r3, (r0, 0x20)
+    3332:	7084      	lsl      	r2, r1
+    3334:	68c9      	andn      	r3, r2
+    3336:	3201      	movi      	r2, 1
+    3338:	7084      	lsl      	r2, r1
+    333a:	6cc8      	or      	r3, r2
+    333c:	b068      	st.w      	r3, (r0, 0x20)
+}
+    333e:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00003340 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    3340:	4121      	lsli      	r1, r1, 1
+    3342:	3301      	movi      	r3, 1
+    3344:	9049      	ld.w      	r2, (r0, 0x24)
+    3346:	70c4      	lsl      	r3, r1
+    3348:	6cc8      	or      	r3, r2
+    334a:	b069      	st.w      	r3, (r0, 0x24)
+}
+    334c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+0000334e <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    334e:	3301      	movi      	r3, 1
+    3350:	70c4      	lsl      	r3, r1
+    3352:	b063      	st.w      	r3, (r0, 0xc)
+}
+    3354:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00003356 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    3356:	3301      	movi      	r3, 1
+    3358:	70c4      	lsl      	r3, r1
+    335a:	b064      	st.w      	r3, (r0, 0x10)
+}
+    335c:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+0000335e <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    335e:	9045      	ld.w      	r2, (r0, 0x14)
+    3360:	3301      	movi      	r3, 1
+    3362:	7085      	lsr      	r2, r1
+    3364:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    3366:	3a40      	cmpnei      	r2, 0
+    3368:	70c4      	lsl      	r3, r1
+    336a:	0c03      	bf      	0x3370	// 3370 <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    336c:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    336e:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    3370:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    3372:	07fe      	br      	0x336e	// 336e <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00003374 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    3374:	3301      	movi      	r3, 1
+    3376:	9046      	ld.w      	r2, (r0, 0x18)
+    3378:	70c4      	lsl      	r3, r1
+    337a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    337c:	64ca      	cmpne      	r2, r3
+    337e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3380:	7400      	zextb      	r0, r0
+}
+    3382:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00003384 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    3384:	3301      	movi      	r3, 1
+    3386:	9045      	ld.w      	r2, (r0, 0x14)
+    3388:	70c4      	lsl      	r3, r1
+    338a:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    338c:	64ca      	cmpne      	r2, r3
+    338e:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    3390:	7400      	zextb      	r0, r0
+}
+    3392:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00003394 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    3394:	1064      	lrw      	r3, 0x20000014	// 33a4 <LPT_Soft_Reset+0x10>
+    3396:	9340      	ld.w      	r2, (r3, 0x0)
+    3398:	9261      	ld.w      	r3, (r2, 0x4)
+    339a:	3bac      	bseti      	r3, 12
+    339c:	3bae      	bseti      	r3, 14
+    339e:	b261      	st.w      	r3, (r2, 0x4)
+}
+    33a0:	783c      	jmp      	r15
+    33a2:	0000      	bkpt
+    33a4:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+000033a8 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    33a8:	1063      	lrw      	r3, 0x20000010	// 33b4 <WWDT_CNT_Load+0xc>
+    33aa:	9360      	ld.w      	r3, (r3, 0x0)
+    33ac:	9340      	ld.w      	r2, (r3, 0x0)
+    33ae:	6c08      	or      	r0, r2
+    33b0:	b300      	st.w      	r0, (r3, 0x0)
+}
+    33b2:	783c      	jmp      	r15
+    33b4:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+000033b8 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    33b8:	3300      	movi      	r3, 0
+    33ba:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    33bc:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    33be:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    33c0:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    33c2:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    33c4:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    33c6:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    33c8:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    33ca:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    33cc:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    33ce:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    33d0:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    33d2:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+000033d4 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    33d4:	9060      	ld.w      	r3, (r0, 0x0)
+    33d6:	3ba0      	bseti      	r3, 0
+    33d8:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33da:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+000033dc <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    33dc:	9060      	ld.w      	r3, (r0, 0x0)
+    33de:	3bac      	bseti      	r3, 12
+    33e0:	3bae      	bseti      	r3, 14
+    33e2:	b060      	st.w      	r3, (r0, 0x0)
+}
+    33e4:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+000033e6 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    33e6:	14c3      	push      	r4-r6
+    33e8:	98a4      	ld.w      	r5, (r14, 0x10)
+    33ea:	6d97      	mov      	r6, r5
+    33ec:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    33ee:	6d18      	or      	r4, r6
+    33f0:	6cd0      	or      	r3, r4
+    33f2:	90a1      	ld.w      	r5, (r0, 0x4)
+    33f4:	6c4c      	or      	r1, r3
+    33f6:	6c54      	or      	r1, r5
+    33f8:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    33fa:	b042      	st.w      	r2, (r0, 0x8)
+}
+    33fc:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+000033fe <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    33fe:	14c4      	push      	r4-r7
+    3400:	1421      	subi      	r14, r14, 4
+    3402:	9885      	ld.w      	r4, (r14, 0x14)
+    3404:	6dd3      	mov      	r7, r4
+    3406:	9886      	ld.w      	r4, (r14, 0x18)
+    3408:	b880      	st.w      	r4, (r14, 0x0)
+    340a:	9887      	ld.w      	r4, (r14, 0x1c)
+    340c:	6d93      	mov      	r6, r4
+    340e:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    3410:	6d58      	or      	r5, r6
+    3412:	98c0      	ld.w      	r6, (r14, 0x0)
+    3414:	6d58      	or      	r5, r6
+    3416:	6d5c      	or      	r5, r7
+    3418:	6cd4      	or      	r3, r5
+    341a:	6c8c      	or      	r2, r3
+    341c:	9081      	ld.w      	r4, (r0, 0x4)
+    341e:	6c48      	or      	r1, r2
+    3420:	6d04      	or      	r4, r1
+    3422:	6d9f      	mov      	r6, r7
+    3424:	b081      	st.w      	r4, (r0, 0x4)
+}
+    3426:	1401      	addi      	r14, r14, 4
+    3428:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+0000342a <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    342a:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    342c:	b044      	st.w      	r2, (r0, 0x10)
+}
+    342e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00003430 <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    3430:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3432:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    3434:	0c04      	bf      	0x343c	// 343c <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    3436:	6c8c      	or      	r2, r3
+    3438:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    343a:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    343c:	68c9      	andn      	r3, r2
+    343e:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    3440:	07fd      	br      	0x343a	// 343a <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00003444 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    3444:	3380      	movi      	r3, 128
+    3446:	4376      	lsli      	r3, r3, 22
+    3448:	1042      	lrw      	r2, 0xe000e100	// 3450 <BT1_INT_ENABLE+0xc>
+    344a:	b260      	st.w      	r3, (r2, 0x0)
+}
+    344c:	783c      	jmp      	r15
+    344e:	0000      	bkpt
+    3450:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00003454 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    3454:	3840      	cmpnei      	r0, 0
+    3456:	080a      	bt      	0x346a	// 346a <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    3458:	1165      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    345a:	31f0      	movi      	r1, 240
+    345c:	9340      	ld.w      	r2, (r3, 0x0)
+    345e:	9260      	ld.w      	r3, (r2, 0x0)
+    3460:	68c5      	andn      	r3, r1
+    3462:	3ba4      	bseti      	r3, 4
+    3464:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    3466:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    3468:	040b      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    346a:	3841      	cmpnei      	r0, 1
+    346c:	080a      	bt      	0x3480	// 3480 <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    346e:	1161      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3470:	31f0      	movi      	r1, 240
+    3472:	9340      	ld.w      	r2, (r3, 0x0)
+    3474:	9261      	ld.w      	r3, (r2, 0x4)
+    3476:	68c5      	andn      	r3, r1
+    3478:	3ba4      	bseti      	r3, 4
+    347a:	3ba6      	bseti      	r3, 6
+    347c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    347e:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    3480:	3842      	cmpnei      	r0, 2
+    3482:	080b      	bt      	0x3498	// 3498 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    3484:	107b      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    3486:	32f0      	movi      	r2, 240
+    3488:	9320      	ld.w      	r1, (r3, 0x0)
+    348a:	9161      	ld.w      	r3, (r1, 0x4)
+    348c:	4244      	lsli      	r2, r2, 4
+    348e:	68c9      	andn      	r3, r2
+    3490:	3ba9      	bseti      	r3, 9
+    3492:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    3494:	b161      	st.w      	r3, (r1, 0x4)
+    3496:	07f4      	br      	0x347e	// 347e <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    3498:	3843      	cmpnei      	r0, 3
+    349a:	080b      	bt      	0x34b0	// 34b0 <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    349c:	1075      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    349e:	32f0      	movi      	r2, 240
+    34a0:	9320      	ld.w      	r1, (r3, 0x0)
+    34a2:	4244      	lsli      	r2, r2, 4
+    34a4:	9161      	ld.w      	r3, (r1, 0x4)
+    34a6:	68c9      	andn      	r3, r2
+    34a8:	32e0      	movi      	r2, 224
+    34aa:	4243      	lsli      	r2, r2, 3
+    34ac:	6cc8      	or      	r3, r2
+    34ae:	07f3      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    34b0:	3844      	cmpnei      	r0, 4
+    34b2:	080a      	bt      	0x34c6	// 34c6 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    34b4:	106f      	lrw      	r3, 0x2000004c	// 34f0 <GPT_IO_Init+0x9c>
+    34b6:	32f0      	movi      	r2, 240
+    34b8:	9320      	ld.w      	r1, (r3, 0x0)
+    34ba:	9161      	ld.w      	r3, (r1, 0x4)
+    34bc:	4248      	lsli      	r2, r2, 8
+    34be:	68c9      	andn      	r3, r2
+    34c0:	3bad      	bseti      	r3, 13
+    34c2:	3bae      	bseti      	r3, 14
+    34c4:	07e8      	br      	0x3494	// 3494 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    34c6:	3845      	cmpnei      	r0, 5
+    34c8:	0808      	bt      	0x34d8	// 34d8 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    34ca:	1069      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34cc:	310f      	movi      	r1, 15
+    34ce:	9340      	ld.w      	r2, (r3, 0x0)
+    34d0:	9260      	ld.w      	r3, (r2, 0x0)
+    34d2:	68c5      	andn      	r3, r1
+    34d4:	3ba2      	bseti      	r3, 2
+    34d6:	07c8      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    34d8:	3846      	cmpnei      	r0, 6
+    34da:	0bd2      	bt      	0x347e	// 347e <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    34dc:	1064      	lrw      	r3, 0x20000048	// 34ec <GPT_IO_Init+0x98>
+    34de:	31f0      	movi      	r1, 240
+    34e0:	9340      	ld.w      	r2, (r3, 0x0)
+    34e2:	9260      	ld.w      	r3, (r2, 0x0)
+    34e4:	68c5      	andn      	r3, r1
+    34e6:	3ba5      	bseti      	r3, 5
+    34e8:	3ba6      	bseti      	r3, 6
+    34ea:	07be      	br      	0x3466	// 3466 <GPT_IO_Init+0x12>
+    34ec:	20000048 	.long	0x20000048
+    34f0:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+000034f4 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    34f4:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    34f6:	6c48      	or      	r1, r2
+    34f8:	1083      	lrw      	r4, 0x20000024	// 3504 <GPT_Configure+0x10>
+    34fa:	6c04      	or      	r0, r1
+    34fc:	9480      	ld.w      	r4, (r4, 0x0)
+    34fe:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    3500:	b462      	st.w      	r3, (r4, 0x8)
+}
+    3502:	1481      	pop      	r4
+    3504:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00003508 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    3508:	14c4      	push      	r4-r7
+    350a:	1423      	subi      	r14, r14, 12
+    350c:	9887      	ld.w      	r4, (r14, 0x1c)
+    350e:	6dd3      	mov      	r7, r4
+    3510:	9888      	ld.w      	r4, (r14, 0x20)
+    3512:	b880      	st.w      	r4, (r14, 0x0)
+    3514:	9889      	ld.w      	r4, (r14, 0x24)
+    3516:	b881      	st.w      	r4, (r14, 0x4)
+    3518:	988a      	ld.w      	r4, (r14, 0x28)
+    351a:	b882      	st.w      	r4, (r14, 0x8)
+    351c:	988b      	ld.w      	r4, (r14, 0x2c)
+    351e:	6d93      	mov      	r6, r4
+    3520:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    3522:	3cb2      	bseti      	r4, 18
+    3524:	6d18      	or      	r4, r6
+    3526:	98c2      	ld.w      	r6, (r14, 0x8)
+    3528:	6d18      	or      	r4, r6
+    352a:	98c1      	ld.w      	r6, (r14, 0x4)
+    352c:	6d18      	or      	r4, r6
+    352e:	98c0      	ld.w      	r6, (r14, 0x0)
+    3530:	6d18      	or      	r4, r6
+    3532:	6d1c      	or      	r4, r7
+    3534:	6cd0      	or      	r3, r4
+    3536:	6c8c      	or      	r2, r3
+    3538:	6c48      	or      	r1, r2
+    353a:	10a4      	lrw      	r5, 0x20000024	// 3548 <GPT_WaveCtrl_Configure+0x40>
+    353c:	6c04      	or      	r0, r1
+    353e:	95a0      	ld.w      	r5, (r5, 0x0)
+    3540:	6d9f      	mov      	r6, r7
+    3542:	b503      	st.w      	r0, (r5, 0xc)
+}
+    3544:	1403      	addi      	r14, r14, 12
+    3546:	1484      	pop      	r4-r7
+    3548:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+0000354c <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    354c:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    354e:	6c8c      	or      	r2, r3
+    3550:	6c48      	or      	r1, r2
+    3552:	1083      	lrw      	r4, 0x20000024	// 355c <GPT_WaveLoad_Configure+0x10>
+    3554:	6c04      	or      	r0, r1
+    3556:	9480      	ld.w      	r4, (r4, 0x0)
+    3558:	b411      	st.w      	r0, (r4, 0x44)
+}
+    355a:	1481      	pop      	r4
+    355c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+00003560 <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    3560:	14c4      	push      	r4-r7
+    3562:	1425      	subi      	r14, r14, 20
+    3564:	1c09      	addi      	r4, r14, 36
+    3566:	8480      	ld.b      	r4, (r4, 0x0)
+    3568:	b880      	st.w      	r4, (r14, 0x0)
+    356a:	1c0a      	addi      	r4, r14, 40
+    356c:	8480      	ld.b      	r4, (r4, 0x0)
+    356e:	b881      	st.w      	r4, (r14, 0x4)
+    3570:	1c0b      	addi      	r4, r14, 44
+    3572:	8480      	ld.b      	r4, (r4, 0x0)
+    3574:	b882      	st.w      	r4, (r14, 0x8)
+    3576:	1c0c      	addi      	r4, r14, 48
+    3578:	8480      	ld.b      	r4, (r4, 0x0)
+    357a:	b883      	st.w      	r4, (r14, 0xc)
+    357c:	1c0d      	addi      	r4, r14, 52
+    357e:	8480      	ld.b      	r4, (r4, 0x0)
+    3580:	1e10      	addi      	r6, r14, 64
+    3582:	b884      	st.w      	r4, (r14, 0x10)
+    3584:	1d0f      	addi      	r5, r14, 60
+    3586:	1c0e      	addi      	r4, r14, 56
+    3588:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    358a:	3840      	cmpnei      	r0, 0
+{
+    358c:	1e11      	addi      	r6, r14, 68
+    358e:	8480      	ld.b      	r4, (r4, 0x0)
+    3590:	85a0      	ld.b      	r5, (r5, 0x0)
+    3592:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    3594:	081f      	bt      	0x35d2	// 35d2 <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    3596:	47f0      	lsli      	r7, r7, 16
+    3598:	46d2      	lsli      	r6, r6, 18
+    359a:	45ae      	lsli      	r5, r5, 14
+    359c:	6dd8      	or      	r7, r6
+    359e:	6dd4      	or      	r7, r5
+    35a0:	448c      	lsli      	r4, r4, 12
+    35a2:	6dd0      	or      	r7, r4
+    35a4:	9884      	ld.w      	r4, (r14, 0x10)
+    35a6:	448a      	lsli      	r4, r4, 10
+    35a8:	6dd0      	or      	r7, r4
+    35aa:	9883      	ld.w      	r4, (r14, 0xc)
+    35ac:	4488      	lsli      	r4, r4, 8
+    35ae:	98a2      	ld.w      	r5, (r14, 0x8)
+    35b0:	6d1c      	or      	r4, r7
+    35b2:	45e6      	lsli      	r7, r5, 6
+    35b4:	6d1c      	or      	r4, r7
+    35b6:	6c90      	or      	r2, r4
+    35b8:	6cc8      	or      	r3, r2
+    35ba:	9841      	ld.w      	r2, (r14, 0x4)
+    35bc:	4244      	lsli      	r2, r2, 4
+    35be:	6cc8      	or      	r3, r2
+    35c0:	6c4c      	or      	r1, r3
+    35c2:	9860      	ld.w      	r3, (r14, 0x0)
+    35c4:	4362      	lsli      	r3, r3, 2
+    35c6:	1013      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    35c8:	6c4c      	or      	r1, r3
+    35ca:	9000      	ld.w      	r0, (r0, 0x0)
+    35cc:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    35ce:	1405      	addi      	r14, r14, 20
+    35d0:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    35d2:	3841      	cmpnei      	r0, 1
+    35d4:	0bfd      	bt      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    35d6:	47f0      	lsli      	r7, r7, 16
+    35d8:	46d2      	lsli      	r6, r6, 18
+    35da:	45ae      	lsli      	r5, r5, 14
+    35dc:	6dd8      	or      	r7, r6
+    35de:	6dd4      	or      	r7, r5
+    35e0:	448c      	lsli      	r4, r4, 12
+    35e2:	6dd0      	or      	r7, r4
+    35e4:	9884      	ld.w      	r4, (r14, 0x10)
+    35e6:	448a      	lsli      	r4, r4, 10
+    35e8:	6dd0      	or      	r7, r4
+    35ea:	9883      	ld.w      	r4, (r14, 0xc)
+    35ec:	4488      	lsli      	r4, r4, 8
+    35ee:	98a2      	ld.w      	r5, (r14, 0x8)
+    35f0:	6d1c      	or      	r4, r7
+    35f2:	45e6      	lsli      	r7, r5, 6
+    35f4:	6d1c      	or      	r4, r7
+    35f6:	6c90      	or      	r2, r4
+    35f8:	6cc8      	or      	r3, r2
+    35fa:	9841      	ld.w      	r2, (r14, 0x4)
+    35fc:	4244      	lsli      	r2, r2, 4
+    35fe:	6cc8      	or      	r3, r2
+    3600:	6c4c      	or      	r1, r3
+    3602:	9860      	ld.w      	r3, (r14, 0x0)
+    3604:	4362      	lsli      	r3, r3, 2
+    3606:	1003      	lrw      	r0, 0x20000024	// 3610 <GPT_WaveOut_Configure+0xb0>
+    3608:	6c4c      	or      	r1, r3
+    360a:	9000      	ld.w      	r0, (r0, 0x0)
+    360c:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    360e:	07e0      	br      	0x35ce	// 35ce <GPT_WaveOut_Configure+0x6e>
+    3610:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00003614 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    3614:	1063      	lrw      	r3, 0x20000024	// 3620 <GPT_Start+0xc>
+    3616:	9340      	ld.w      	r2, (r3, 0x0)
+    3618:	9261      	ld.w      	r3, (r2, 0x4)
+    361a:	3ba0      	bseti      	r3, 0
+    361c:	b261      	st.w      	r3, (r2, 0x4)
+}
+    361e:	783c      	jmp      	r15
+    3620:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00003624 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    3624:	1063      	lrw      	r3, 0x20000024	// 3630 <GPT_Period_CMP_Write+0xc>
+    3626:	9360      	ld.w      	r3, (r3, 0x0)
+    3628:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    362a:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    362c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    362e:	783c      	jmp      	r15
+    3630:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00003634 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    3634:	1066      	lrw      	r3, 0x20000024	// 364c <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    3636:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3638:	9360      	ld.w      	r3, (r3, 0x0)
+    363a:	237f      	addi      	r3, 128
+    363c:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    363e:	0c04      	bf      	0x3646	// 3646 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    3640:	6c48      	or      	r1, r2
+    3642:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    3644:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    3646:	6885      	andn      	r2, r1
+    3648:	b356      	st.w      	r2, (r3, 0x58)
+}
+    364a:	07fd      	br      	0x3644	// 3644 <GPT_ConfigInterrupt_CMD+0x10>
+    364c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+00003650 <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    3650:	1065      	lrw      	r3, 0x20000040	// 3664 <UART0_DeInit+0x14>
+    3652:	3200      	movi      	r2, 0
+    3654:	9360      	ld.w      	r3, (r3, 0x0)
+    3656:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    3658:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    365a:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    365c:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    365e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3660:	783c      	jmp      	r15
+    3662:	0000      	bkpt
+    3664:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+00003668 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    3668:	1065      	lrw      	r3, 0x2000003c	// 367c <UART1_DeInit+0x14>
+    366a:	3200      	movi      	r2, 0
+    366c:	9360      	ld.w      	r3, (r3, 0x0)
+    366e:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    3670:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    3672:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    3674:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    3676:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3678:	783c      	jmp      	r15
+    367a:	0000      	bkpt
+    367c:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+00003680 <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    3680:	1065      	lrw      	r3, 0x20000038	// 3694 <UART2_DeInit+0x14>
+    3682:	3200      	movi      	r2, 0
+    3684:	9360      	ld.w      	r3, (r3, 0x0)
+    3686:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    3688:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    368a:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    368c:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    368e:	b344      	st.w      	r2, (r3, 0x10)
+}
+    3690:	783c      	jmp      	r15
+    3692:	0000      	bkpt
+    3694:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+00003698 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    3698:	1065      	lrw      	r3, 0x20000040	// 36ac <UART0_Int_Enable+0x14>
+    369a:	320f      	movi      	r2, 15
+    369c:	9360      	ld.w      	r3, (r3, 0x0)
+    369e:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36a0:	3380      	movi      	r3, 128
+    36a2:	4366      	lsli      	r3, r3, 6
+    36a4:	1043      	lrw      	r2, 0xe000e100	// 36b0 <UART0_Int_Enable+0x18>
+    36a6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36a8:	783c      	jmp      	r15
+    36aa:	0000      	bkpt
+    36ac:	20000040 	.long	0x20000040
+    36b0:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000036b4 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    36b4:	1065      	lrw      	r3, 0x20000038	// 36c8 <UART2_Int_Enable+0x14>
+    36b6:	320f      	movi      	r2, 15
+    36b8:	9360      	ld.w      	r3, (r3, 0x0)
+    36ba:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    36bc:	3380      	movi      	r3, 128
+    36be:	4368      	lsli      	r3, r3, 8
+    36c0:	1043      	lrw      	r2, 0xe000e100	// 36cc <UART2_Int_Enable+0x18>
+    36c2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    36c4:	783c      	jmp      	r15
+    36c6:	0000      	bkpt
+    36c8:	20000038 	.long	0x20000038
+    36cc:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+000036d0 <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    36d0:	3840      	cmpnei      	r0, 0
+    36d2:	0821      	bt      	0x3714	// 3714 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    36d4:	3940      	cmpnei      	r1, 0
+    36d6:	080a      	bt      	0x36ea	// 36ea <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    36d8:	1177      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36da:	31ff      	movi      	r1, 255
+    36dc:	9340      	ld.w      	r2, (r3, 0x0)
+    36de:	9260      	ld.w      	r3, (r2, 0x0)
+    36e0:	68c5      	andn      	r3, r1
+    36e2:	3ba2      	bseti      	r3, 2
+    36e4:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    36e6:	b260      	st.w      	r3, (r2, 0x0)
+    36e8:	0415      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    36ea:	3941      	cmpnei      	r1, 1
+    36ec:	0813      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    36ee:	1172      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    36f0:	31f0      	movi      	r1, 240
+    36f2:	9340      	ld.w      	r2, (r3, 0x0)
+    36f4:	9260      	ld.w      	r3, (r2, 0x0)
+    36f6:	4130      	lsli      	r1, r1, 16
+    36f8:	68c5      	andn      	r3, r1
+    36fa:	31e0      	movi      	r1, 224
+    36fc:	412f      	lsli      	r1, r1, 15
+    36fe:	6cc4      	or      	r3, r1
+    3700:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    3702:	31f0      	movi      	r1, 240
+    3704:	9261      	ld.w      	r3, (r2, 0x4)
+    3706:	412c      	lsli      	r1, r1, 12
+    3708:	68c5      	andn      	r3, r1
+    370a:	31e0      	movi      	r1, 224
+    370c:	412b      	lsli      	r1, r1, 11
+    370e:	6cc4      	or      	r3, r1
+    3710:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    3712:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    3714:	3841      	cmpnei      	r0, 1
+    3716:	082d      	bt      	0x3770	// 3770 <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    3718:	3940      	cmpnei      	r1, 0
+    371a:	0814      	bt      	0x3742	// 3742 <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    371c:	1167      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    371e:	310f      	movi      	r1, 15
+    3720:	9340      	ld.w      	r2, (r3, 0x0)
+    3722:	9260      	ld.w      	r3, (r2, 0x0)
+    3724:	68c5      	andn      	r3, r1
+    3726:	3107      	movi      	r1, 7
+    3728:	6cc4      	or      	r3, r1
+    372a:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    372c:	32f0      	movi      	r2, 240
+    372e:	1162      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3730:	4250      	lsli      	r2, r2, 16
+    3732:	9320      	ld.w      	r1, (r3, 0x0)
+    3734:	9161      	ld.w      	r3, (r1, 0x4)
+    3736:	68c9      	andn      	r3, r2
+    3738:	32e0      	movi      	r2, 224
+    373a:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    373c:	6cc8      	or      	r3, r2
+    373e:	b161      	st.w      	r3, (r1, 0x4)
+    3740:	07e9      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    3742:	3941      	cmpnei      	r1, 1
+    3744:	080c      	bt      	0x375c	// 375c <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    3746:	107c      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3748:	32ff      	movi      	r2, 255
+    374a:	9320      	ld.w      	r1, (r3, 0x0)
+    374c:	424c      	lsli      	r2, r2, 12
+    374e:	9160      	ld.w      	r3, (r1, 0x0)
+    3750:	68c9      	andn      	r3, r2
+    3752:	32ee      	movi      	r2, 238
+    3754:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    3756:	6cc8      	or      	r3, r2
+    3758:	b160      	st.w      	r3, (r1, 0x0)
+}
+    375a:	07dc      	br      	0x3712	// 3712 <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    375c:	3942      	cmpnei      	r1, 2
+    375e:	0bda      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    3760:	1075      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    3762:	32ee      	movi      	r2, 238
+    3764:	9320      	ld.w      	r1, (r3, 0x0)
+    3766:	9161      	ld.w      	r3, (r1, 0x4)
+    3768:	4368      	lsli      	r3, r3, 8
+    376a:	4b68      	lsri      	r3, r3, 8
+    376c:	4257      	lsli      	r2, r2, 23
+    376e:	07e7      	br      	0x373c	// 373c <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    3770:	3842      	cmpnei      	r0, 2
+    3772:	0bd0      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    3774:	3940      	cmpnei      	r1, 0
+    3776:	0809      	bt      	0x3788	// 3788 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    3778:	106f      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    377a:	31ff      	movi      	r1, 255
+    377c:	9340      	ld.w      	r2, (r3, 0x0)
+    377e:	9260      	ld.w      	r3, (r2, 0x0)
+    3780:	68c5      	andn      	r3, r1
+    3782:	3177      	movi      	r1, 119
+    3784:	6cc4      	or      	r3, r1
+    3786:	07b0      	br      	0x36e6	// 36e6 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    3788:	3941      	cmpnei      	r1, 1
+    378a:	0809      	bt      	0x379c	// 379c <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    378c:	106a      	lrw      	r3, 0x2000004c	// 37b4 <UART_IO_Init+0xe4>
+    378e:	32ee      	movi      	r2, 238
+    3790:	9320      	ld.w      	r1, (r3, 0x0)
+    3792:	9160      	ld.w      	r3, (r1, 0x0)
+    3794:	4368      	lsli      	r3, r3, 8
+    3796:	4b68      	lsri      	r3, r3, 8
+    3798:	4257      	lsli      	r2, r2, 23
+    379a:	07de      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    379c:	3942      	cmpnei      	r1, 2
+    379e:	0bba      	bt      	0x3712	// 3712 <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    37a0:	1066      	lrw      	r3, 0x20000048	// 37b8 <UART_IO_Init+0xe8>
+    37a2:	32ff      	movi      	r2, 255
+    37a4:	9320      	ld.w      	r1, (r3, 0x0)
+    37a6:	4250      	lsli      	r2, r2, 16
+    37a8:	9160      	ld.w      	r3, (r1, 0x0)
+    37aa:	68c9      	andn      	r3, r2
+    37ac:	32cc      	movi      	r2, 204
+    37ae:	424f      	lsli      	r2, r2, 15
+    37b0:	07d3      	br      	0x3756	// 3756 <UART_IO_Init+0x86>
+    37b2:	0000      	bkpt
+    37b4:	2000004c 	.long	0x2000004c
+    37b8:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000037bc <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    37bc:	1063      	lrw      	r3, 0x80003	// 37c8 <UARTInit+0xc>
+    37be:	6c8c      	or      	r2, r3
+    37c0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37c2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37c4:	783c      	jmp      	r15
+    37c6:	0000      	bkpt
+    37c8:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+000037cc <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    37cc:	1063      	lrw      	r3, 0x8000f	// 37d8 <UARTInitRxTxIntEn+0xc>
+    37ce:	6c8c      	or      	r2, r3
+    37d0:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    37d2:	b024      	st.w      	r1, (r0, 0x10)
+}
+    37d4:	783c      	jmp      	r15
+    37d6:	0000      	bkpt
+    37d8:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+000037dc <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    37dc:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37de:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    37e0:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    37e2:	5b85      	subu      	r4, r3, r1
+    37e4:	6490      	cmphs      	r4, r2
+    37e6:	0c02      	bf      	0x37ea	// 37ea <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    37e8:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    37ea:	8380      	ld.b      	r4, (r3, 0x0)
+    37ec:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    37ee:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    37f0:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    37f2:	3c40      	cmpnei      	r4, 0
+    37f4:	0bfd      	bt      	0x37ee	// 37ee <UARTTransmit+0x12>
+    37f6:	2300      	addi      	r3, 1
+    37f8:	07f5      	br      	0x37e2	// 37e2 <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+000037fc <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    37fc:	1068      	lrw      	r3, 0x20000020	// 381c <EPT_Stop+0x20>
+    37fe:	3280      	movi      	r2, 128
+    3800:	9360      	ld.w      	r3, (r3, 0x0)
+    3802:	608c      	addu      	r2, r3
+    3804:	1027      	lrw      	r1, 0xa55ac73a	// 3820 <EPT_Stop+0x24>
+    3806:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    3808:	9341      	ld.w      	r2, (r3, 0x4)
+    380a:	31fe      	movi      	r1, 254
+    380c:	6884      	and      	r2, r1
+    380e:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    3810:	3101      	movi      	r1, 1
+    3812:	9341      	ld.w      	r2, (r3, 0x4)
+    3814:	6884      	and      	r2, r1
+    3816:	3a40      	cmpnei      	r2, 0
+    3818:	0bfd      	bt      	0x3812	// 3812 <EPT_Stop+0x16>
+}
+    381a:	783c      	jmp      	r15
+    381c:	20000020 	.long	0x20000020
+    3820:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00003824 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    3824:	14d1      	push      	r4, r15
+	delay_nms(2000);
+    3826:	30fa      	movi      	r0, 250
+	
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3828:	109b      	lrw      	r4, 0x20000048	// 3894 <main+0x70>
+	delay_nms(2000);
+    382a:	4003      	lsli      	r0, r0, 3
+    382c:	e000003a 	bsr      	0x38a0	// 38a0 <delay_nms>
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    3830:	3201      	movi      	r2, 1
+    3832:	9400      	ld.w      	r0, (r4, 0x0)
+    3834:	3102      	movi      	r1, 2
+    3836:	e3fffd0b 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    383a:	9400      	ld.w      	r0, (r4, 0x0)
+    383c:	3102      	movi      	r1, 2
+    383e:	e3fffd77 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3842:	3102      	movi      	r1, 2
+    3844:	9400      	ld.w      	r0, (r4, 0x0)
+    3846:	e3fffd97 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    384a:	1094      	lrw      	r4, 0x200000a0	// 3898 <main+0x74>
+	last_state = rf_exist;
+    384c:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    384e:	a400      	st.b      	r0, (r4, 0x0)
+	
+	APT32F102_init();							//102 initial
+    3850:	e00000ea 	bsr      	0x3a24	// 3a24 <APT32F102_init>
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    3854:	1032      	lrw      	r1, 0x6224	// 389c <main+0x78>
+    3856:	3000      	movi      	r0, 0
+    3858:	e00006b8 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    385c:	e3fffc66 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+
+		UART2_TASK();
+    3860:	e000074e 	bsr      	0x46fc	// 46fc <UART2_TASK>
+		
+		Detect_WIFI_Task();
+    3864:	e0000ca8 	bsr      	0x51b4	// 51b4 <Detect_WIFI_Task>
+		
+		Detect_SPI_task();
+    3868:	e0000ab0 	bsr      	0x4dc8	// 4dc8 <Detect_SPI_task>
+		
+		Led_Task();
+    386c:	e0000cee 	bsr      	0x5248	// 5248 <Led_Task>
+		
+		if (finish_flag == 1) {
+    3870:	8462      	ld.b      	r3, (r4, 0x2)
+    3872:	3b41      	cmpnei      	r3, 1
+    3874:	0bf4      	bt      	0x385c	// 385c <main+0x38>
+			Card_Read_TasK();
+    3876:	e0000a51 	bsr      	0x4d18	// 4d18 <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    387a:	8460      	ld.b      	r3, (r4, 0x0)
+    387c:	3b41      	cmpnei      	r3, 1
+    387e:	0806      	bt      	0x388a	// 388a <main+0x66>
+			{
+				BackLight_Task();
+    3880:	e0000c88 	bsr      	0x5190	// 5190 <BackLight_Task>
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    3884:	e0000c26 	bsr      	0x50d0	// 50d0 <LogicCtrl_NoRF_Task>
+    3888:	07ea      	br      	0x385c	// 385c <main+0x38>
+				//Dbg_Println(DBG_BIT_SYS_STATUS,"no rf!");
+			}
+			else if(rf_exist == 0x00)
+    388a:	3b40      	cmpnei      	r3, 0
+    388c:	0be8      	bt      	0x385c	// 385c <main+0x38>
+			{
+//				Debounce_Task();
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    388e:	e0000b65 	bsr      	0x4f58	// 4f58 <LogicCtrl_Task>
+    3892:	07e5      	br      	0x385c	// 385c <main+0x38>
+    3894:	20000048 	.long	0x20000048
+    3898:	200000a0 	.long	0x200000a0
+    389c:	00006224 	.long	0x00006224
+
+Disassembly of section .text.delay_nms:
+
+000038a0 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    38a0:	14d0      	push      	r15
+    38a2:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    38a4:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    38a6:	3300      	movi      	r3, 0
+    j = 50* t;
+    38a8:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    38aa:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    38ac:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    38ae:	b860      	st.w      	r3, (r14, 0x0)
+    38b0:	9840      	ld.w      	r2, (r14, 0x0)
+    38b2:	9861      	ld.w      	r3, (r14, 0x4)
+    38b4:	64c8      	cmphs      	r2, r3
+    38b6:	0c03      	bf      	0x38bc	// 38bc <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    38b8:	1403      	addi      	r14, r14, 12
+    38ba:	1490      	pop      	r15
+        k++;
+    38bc:	9862      	ld.w      	r3, (r14, 0x8)
+    38be:	2300      	addi      	r3, 1
+    38c0:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    38c2:	e3fffc33 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    38c6:	9860      	ld.w      	r3, (r14, 0x0)
+    38c8:	2300      	addi      	r3, 1
+    38ca:	07f2      	br      	0x38ae	// 38ae <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+000038cc <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    38cc:	14d0      	push      	r15
+    38ce:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    38d0:	3000      	movi      	r0, 0
+    38d2:	e3fffdc1 	bsr      	0x3454	// 3454 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    38d6:	3300      	movi      	r3, 0
+    38d8:	3240      	movi      	r2, 64
+    38da:	3100      	movi      	r1, 0
+    38dc:	3001      	movi      	r0, 1
+    38de:	e3fffe0b 	bsr      	0x34f4	// 34f4 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    38e2:	3300      	movi      	r3, 0
+    38e4:	b865      	st.w      	r3, (r14, 0x14)
+    38e6:	b864      	st.w      	r3, (r14, 0x10)
+    38e8:	b863      	st.w      	r3, (r14, 0xc)
+    38ea:	b862      	st.w      	r3, (r14, 0x8)
+    38ec:	b861      	st.w      	r3, (r14, 0x4)
+    38ee:	b860      	st.w      	r3, (r14, 0x0)
+    38f0:	3208      	movi      	r2, 8
+    38f2:	3100      	movi      	r1, 0
+    38f4:	3000      	movi      	r0, 0
+    38f6:	e3fffe09 	bsr      	0x3508	// 3508 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    38fa:	1079      	lrw      	r3, 0x200000a0	// 395c <GPT0_CONFIG+0x90>
+    38fc:	8360      	ld.b      	r3, (r3, 0x0)
+    38fe:	3b41      	cmpnei      	r3, 1
+    3900:	0827      	bt      	0x394e	// 394e <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    3902:	31fa      	movi      	r1, 250
+    3904:	4123      	lsli      	r1, r1, 3
+    3906:	3200      	movi      	r2, 0
+    3908:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    390a:	e3fffe8d 	bsr      	0x3624	// 3624 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    390e:	3320      	movi      	r3, 32
+    3910:	3204      	movi      	r2, 4
+    3912:	3100      	movi      	r1, 0
+    3914:	3001      	movi      	r0, 1
+    3916:	e3fffe1b 	bsr      	0x354c	// 354c <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    391a:	3300      	movi      	r3, 0
+    391c:	3201      	movi      	r2, 1
+    391e:	b868      	st.w      	r3, (r14, 0x20)
+    3920:	b867      	st.w      	r3, (r14, 0x1c)
+    3922:	b866      	st.w      	r3, (r14, 0x18)
+    3924:	b865      	st.w      	r3, (r14, 0x14)
+    3926:	b864      	st.w      	r3, (r14, 0x10)
+    3928:	b863      	st.w      	r3, (r14, 0xc)
+    392a:	b842      	st.w      	r2, (r14, 0x8)
+    392c:	b841      	st.w      	r2, (r14, 0x4)
+    392e:	b860      	st.w      	r3, (r14, 0x0)
+    3930:	3200      	movi      	r2, 0
+    3932:	3302      	movi      	r3, 2
+    3934:	3100      	movi      	r1, 0
+    3936:	3000      	movi      	r0, 0
+    3938:	e3fffe14 	bsr      	0x3560	// 3560 <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    393c:	e3fffe6c 	bsr      	0x3614	// 3614 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    3940:	3180      	movi      	r1, 128
+    3942:	4129      	lsli      	r1, r1, 9
+    3944:	3001      	movi      	r0, 1
+    3946:	e3fffe77 	bsr      	0x3634	// 3634 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    394a:	1409      	addi      	r14, r14, 36
+    394c:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    394e:	3b40      	cmpnei      	r3, 0
+    3950:	0bdf      	bt      	0x390e	// 390e <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    3952:	30fa      	movi      	r0, 250
+    3954:	3200      	movi      	r2, 0
+    3956:	3100      	movi      	r1, 0
+    3958:	4003      	lsli      	r0, r0, 3
+    395a:	07d8      	br      	0x390a	// 390a <GPT0_CONFIG+0x3e>
+    395c:	200000a0 	.long	0x200000a0
+
+Disassembly of section .text.BT_CONFIG:
+
+00003960 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    3960:	14d2      	push      	r4-r5, r15
+    3962:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    3964:	1095      	lrw      	r4, 0x20000008	// 39b8 <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    3966:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    3968:	9400      	ld.w      	r0, (r4, 0x0)
+    396a:	e3fffd27 	bsr      	0x33b8	// 33b8 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    396e:	9400      	ld.w      	r0, (r4, 0x0)
+    3970:	b8a1      	st.w      	r5, (r14, 0x4)
+    3972:	b8a0      	st.w      	r5, (r14, 0x0)
+    3974:	3308      	movi      	r3, 8
+    3976:	3200      	movi      	r2, 0
+    3978:	3101      	movi      	r1, 1
+    397a:	e3fffd36 	bsr      	0x33e6	// 33e6 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    397e:	3380      	movi      	r3, 128
+    3980:	4363      	lsli      	r3, r3, 3
+    3982:	b861      	st.w      	r3, (r14, 0x4)
+    3984:	9400      	ld.w      	r0, (r4, 0x0)
+    3986:	3300      	movi      	r3, 0
+    3988:	b8a3      	st.w      	r5, (r14, 0xc)
+    398a:	b8a2      	st.w      	r5, (r14, 0x8)
+    398c:	b8a0      	st.w      	r5, (r14, 0x0)
+    398e:	3200      	movi      	r2, 0
+    3990:	3180      	movi      	r1, 128
+    3992:	e3fffd36 	bsr      	0x33fe	// 33fe <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    3996:	3201      	movi      	r2, 1
+    3998:	1029      	lrw      	r1, 0x12ac	// 39bc <BT_CONFIG+0x5c>
+    399a:	9400      	ld.w      	r0, (r4, 0x0)
+    399c:	e3fffd47 	bsr      	0x342a	// 342a <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    39a0:	9400      	ld.w      	r0, (r4, 0x0)
+    39a2:	e3fffd19 	bsr      	0x33d4	// 33d4 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    39a6:	9400      	ld.w      	r0, (r4, 0x0)
+    39a8:	3202      	movi      	r2, 2
+    39aa:	3101      	movi      	r1, 1
+    39ac:	e3fffd42 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    39b0:	e3fffd4a 	bsr      	0x3444	// 3444 <BT1_INT_ENABLE>
+	
+}
+    39b4:	1404      	addi      	r14, r14, 16
+    39b6:	1492      	pop      	r4-r5, r15
+    39b8:	20000008 	.long	0x20000008
+    39bc:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+000039c0 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    39c0:	14d0      	push      	r15
+    39c2:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    39c4:	e3fffafe 	bsr      	0x2fc0	// 2fc0 <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    39c8:	3101      	movi      	r1, 1
+    39ca:	3001      	movi      	r0, 1
+    39cc:	e3fffb20 	bsr      	0x300c	// 300c <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    39d0:	3000      	movi      	r0, 0
+    39d2:	e3fffb79 	bsr      	0x30c4	// 30c4 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    39d6:	3180      	movi      	r1, 128
+    39d8:	3308      	movi      	r3, 8
+    39da:	3200      	movi      	r2, 0
+    39dc:	4121      	lsli      	r1, r1, 1
+    39de:	3002      	movi      	r0, 2
+    39e0:	e3fffb2e 	bsr      	0x303c	// 303c <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    39e4:	3080      	movi      	r0, 128
+    39e6:	3118      	movi      	r1, 24
+    39e8:	4002      	lsli      	r0, r0, 2
+    39ea:	e3fffba9 	bsr      	0x313c	// 313c <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    39ee:	3001      	movi      	r0, 1
+    39f0:	e3fffb7e 	bsr      	0x30ec	// 30ec <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    39f4:	e3fffb9a 	bsr      	0x3128	// 3128 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    39f8:	e3fffbcc 	bsr      	0x3190	// 3190 <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    39fc:	3340      	movi      	r3, 64
+    39fe:	b860      	st.w      	r3, (r14, 0x0)
+    3a00:	31c0      	movi      	r1, 192
+    3a02:	3380      	movi      	r3, 128
+    3a04:	4364      	lsli      	r3, r3, 4
+    3a06:	3200      	movi      	r2, 0
+    3a08:	4123      	lsli      	r1, r1, 3
+    3a0a:	3000      	movi      	r0, 0
+    3a0c:	e3fffba4 	bsr      	0x3154	// 3154 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    3a10:	e3fffbb2 	bsr      	0x3174	// 3174 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    3a14:	e3fffbec 	bsr      	0x31ec	// 31ec <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    3a18:	3000      	movi      	r0, 0
+    3a1a:	e00010f1 	bsr      	0x5bfc	// 5bfc <std_clk_calib>
+	
+}
+    3a1e:	1401      	addi      	r14, r14, 4
+    3a20:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00003a24 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    3a24:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a26:	1070      	lrw      	r3, 0x2000005c	// 3a64 <APT32F102_init+0x40>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a28:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    3a2a:	9340      	ld.w      	r2, (r3, 0x0)
+    3a2c:	106f      	lrw      	r3, 0xfffffff	// 3a68 <APT32F102_init+0x44>
+    3a2e:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    3a30:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    3a32:	926c      	ld.w      	r3, (r2, 0x30)
+    3a34:	68c4      	and      	r3, r1
+    3a36:	3b40      	cmpnei      	r3, 0
+    3a38:	0ffd      	bf      	0x3a32	// 3a32 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    3a3a:	e3ffffc3 	bsr      	0x39c0	// 39c0 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    3a3e:	e0000523 	bsr      	0x4484	// 4484 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    3a42:	e3fffbdb 	bsr      	0x31f8	// 31f8 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    3a46:	3101      	movi      	r1, 1
+    3a48:	300f      	movi      	r0, 15
+    3a4a:	e3fffbe9 	bsr      	0x321c	// 321c <Set_INT_Priority>
+//	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    3a4e:	e3ffff89 	bsr      	0x3960	// 3960 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    3a52:	e3ffff3d 	bsr      	0x38cc	// 38cc <GPT0_CONFIG>
+	
+	UARTx_Init(UART_2,Card_Recv_Pro);
+    3a56:	1026      	lrw      	r1, 0x5358	// 3a6c <APT32F102_init+0x48>
+    3a58:	3002      	movi      	r0, 2
+    3a5a:	e0000519 	bsr      	0x448c	// 448c <UARTx_Init>
+	
+	RC522_Init();
+    3a5e:	e00007c7 	bsr      	0x49ec	// 49ec <RC522_Init>
+	
+}
+    3a62:	1490      	pop      	r15
+    3a64:	2000005c 	.long	0x2000005c
+    3a68:	0fffffff 	.long	0x0fffffff
+    3a6c:	00005358 	.long	0x00005358
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00003a70 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    3a70:	1460      	nie
+    3a72:	1462      	ipush
+    // ISR content ...
+	nop;
+    3a74:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    3a76:	117a      	lrw      	r3, 0x2000005c	// 3b5c <SYSCONIntHandler+0xec>
+    3a78:	3280      	movi      	r2, 128
+    3a7a:	9360      	ld.w      	r3, (r3, 0x0)
+    3a7c:	60c8      	addu      	r3, r2
+    3a7e:	9323      	ld.w      	r1, (r3, 0xc)
+    3a80:	3001      	movi      	r0, 1
+    3a82:	6840      	and      	r1, r0
+    3a84:	3940      	cmpnei      	r1, 0
+    3a86:	0c04      	bf      	0x3a8e	// 3a8e <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    3a88:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    3a8a:	1463      	ipop
+    3a8c:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    3a8e:	9323      	ld.w      	r1, (r3, 0xc)
+    3a90:	3002      	movi      	r0, 2
+    3a92:	6840      	and      	r1, r0
+    3a94:	3940      	cmpnei      	r1, 0
+    3a96:	0bf9      	bt      	0x3a88	// 3a88 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    3a98:	9323      	ld.w      	r1, (r3, 0xc)
+    3a9a:	3008      	movi      	r0, 8
+    3a9c:	6840      	and      	r1, r0
+    3a9e:	3940      	cmpnei      	r1, 0
+    3aa0:	0bf4      	bt      	0x3a88	// 3a88 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    3aa2:	9323      	ld.w      	r1, (r3, 0xc)
+    3aa4:	3010      	movi      	r0, 16
+    3aa6:	6840      	and      	r1, r0
+    3aa8:	3940      	cmpnei      	r1, 0
+    3aaa:	0bef      	bt      	0x3a88	// 3a88 <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    3aac:	9323      	ld.w      	r1, (r3, 0xc)
+    3aae:	6848      	and      	r1, r2
+    3ab0:	3940      	cmpnei      	r1, 0
+    3ab2:	0c03      	bf      	0x3ab8	// 3ab8 <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    3ab4:	b341      	st.w      	r2, (r3, 0x4)
+}
+    3ab6:	07ea      	br      	0x3a8a	// 3a8a <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    3ab8:	3280      	movi      	r2, 128
+    3aba:	9323      	ld.w      	r1, (r3, 0xc)
+    3abc:	4241      	lsli      	r2, r2, 1
+    3abe:	6848      	and      	r1, r2
+    3ac0:	3940      	cmpnei      	r1, 0
+    3ac2:	0bf9      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    3ac4:	3280      	movi      	r2, 128
+    3ac6:	9323      	ld.w      	r1, (r3, 0xc)
+    3ac8:	4242      	lsli      	r2, r2, 2
+    3aca:	6848      	and      	r1, r2
+    3acc:	3940      	cmpnei      	r1, 0
+    3ace:	0bf3      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    3ad0:	3280      	movi      	r2, 128
+    3ad2:	9323      	ld.w      	r1, (r3, 0xc)
+    3ad4:	4243      	lsli      	r2, r2, 3
+    3ad6:	6848      	and      	r1, r2
+    3ad8:	3940      	cmpnei      	r1, 0
+    3ada:	0bed      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    3adc:	3280      	movi      	r2, 128
+    3ade:	9323      	ld.w      	r1, (r3, 0xc)
+    3ae0:	4244      	lsli      	r2, r2, 4
+    3ae2:	6848      	and      	r1, r2
+    3ae4:	3940      	cmpnei      	r1, 0
+    3ae6:	0c03      	bf      	0x3aec	// 3aec <SYSCONIntHandler+0x7c>
+		nop;
+    3ae8:	6c03      	mov      	r0, r0
+    3aea:	07e5      	br      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    3aec:	3280      	movi      	r2, 128
+    3aee:	9323      	ld.w      	r1, (r3, 0xc)
+    3af0:	4245      	lsli      	r2, r2, 5
+    3af2:	6848      	and      	r1, r2
+    3af4:	3940      	cmpnei      	r1, 0
+    3af6:	0bdf      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    3af8:	3280      	movi      	r2, 128
+    3afa:	9323      	ld.w      	r1, (r3, 0xc)
+    3afc:	4246      	lsli      	r2, r2, 6
+    3afe:	6848      	and      	r1, r2
+    3b00:	3940      	cmpnei      	r1, 0
+    3b02:	0bd9      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    3b04:	3280      	movi      	r2, 128
+    3b06:	9323      	ld.w      	r1, (r3, 0xc)
+    3b08:	4247      	lsli      	r2, r2, 7
+    3b0a:	6848      	and      	r1, r2
+    3b0c:	3940      	cmpnei      	r1, 0
+    3b0e:	0bd3      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    3b10:	3280      	movi      	r2, 128
+    3b12:	9323      	ld.w      	r1, (r3, 0xc)
+    3b14:	424b      	lsli      	r2, r2, 11
+    3b16:	6848      	and      	r1, r2
+    3b18:	3940      	cmpnei      	r1, 0
+    3b1a:	0bcd      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    3b1c:	3280      	movi      	r2, 128
+    3b1e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b20:	424c      	lsli      	r2, r2, 12
+    3b22:	6848      	and      	r1, r2
+    3b24:	3940      	cmpnei      	r1, 0
+    3b26:	0bc7      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    3b28:	3280      	movi      	r2, 128
+    3b2a:	9323      	ld.w      	r1, (r3, 0xc)
+    3b2c:	424d      	lsli      	r2, r2, 13
+    3b2e:	6848      	and      	r1, r2
+    3b30:	3940      	cmpnei      	r1, 0
+    3b32:	0bc1      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    3b34:	3280      	movi      	r2, 128
+    3b36:	9323      	ld.w      	r1, (r3, 0xc)
+    3b38:	424e      	lsli      	r2, r2, 14
+    3b3a:	6848      	and      	r1, r2
+    3b3c:	3940      	cmpnei      	r1, 0
+    3b3e:	0bbb      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    3b40:	3280      	movi      	r2, 128
+    3b42:	9323      	ld.w      	r1, (r3, 0xc)
+    3b44:	424f      	lsli      	r2, r2, 15
+    3b46:	6848      	and      	r1, r2
+    3b48:	3940      	cmpnei      	r1, 0
+    3b4a:	0bb5      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    3b4c:	3280      	movi      	r2, 128
+    3b4e:	9323      	ld.w      	r1, (r3, 0xc)
+    3b50:	4256      	lsli      	r2, r2, 22
+    3b52:	6848      	and      	r1, r2
+    3b54:	3940      	cmpnei      	r1, 0
+    3b56:	0baf      	bt      	0x3ab4	// 3ab4 <SYSCONIntHandler+0x44>
+    3b58:	0799      	br      	0x3a8a	// 3a8a <SYSCONIntHandler+0x1a>
+    3b5a:	0000      	bkpt
+    3b5c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00003b60 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    3b60:	1460      	nie
+    3b62:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    3b64:	1078      	lrw      	r3, 0x20000060	// 3bc4 <IFCIntHandler+0x64>
+    3b66:	3101      	movi      	r1, 1
+    3b68:	9360      	ld.w      	r3, (r3, 0x0)
+    3b6a:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b6c:	6884      	and      	r2, r1
+    3b6e:	3a40      	cmpnei      	r2, 0
+    3b70:	0c04      	bf      	0x3b78	// 3b78 <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    3b72:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    3b74:	1463      	ipop
+    3b76:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    3b78:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b7a:	3102      	movi      	r1, 2
+    3b7c:	6884      	and      	r2, r1
+    3b7e:	3a40      	cmpnei      	r2, 0
+    3b80:	0bf9      	bt      	0x3b72	// 3b72 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    3b82:	934b      	ld.w      	r2, (r3, 0x2c)
+    3b84:	3104      	movi      	r1, 4
+    3b86:	6884      	and      	r2, r1
+    3b88:	3a40      	cmpnei      	r2, 0
+    3b8a:	0bf4      	bt      	0x3b72	// 3b72 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    3b8c:	3280      	movi      	r2, 128
+    3b8e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3b90:	4245      	lsli      	r2, r2, 5
+    3b92:	6848      	and      	r1, r2
+    3b94:	3940      	cmpnei      	r1, 0
+    3b96:	0c03      	bf      	0x3b9c	// 3b9c <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    3b98:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    3b9a:	07ed      	br      	0x3b74	// 3b74 <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    3b9c:	3280      	movi      	r2, 128
+    3b9e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3ba0:	4246      	lsli      	r2, r2, 6
+    3ba2:	6848      	and      	r1, r2
+    3ba4:	3940      	cmpnei      	r1, 0
+    3ba6:	0bf9      	bt      	0x3b98	// 3b98 <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    3ba8:	3280      	movi      	r2, 128
+    3baa:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bac:	4247      	lsli      	r2, r2, 7
+    3bae:	6848      	and      	r1, r2
+    3bb0:	3940      	cmpnei      	r1, 0
+    3bb2:	0bf3      	bt      	0x3b98	// 3b98 <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    3bb4:	3280      	movi      	r2, 128
+    3bb6:	932b      	ld.w      	r1, (r3, 0x2c)
+    3bb8:	4248      	lsli      	r2, r2, 8
+    3bba:	6848      	and      	r1, r2
+    3bbc:	3940      	cmpnei      	r1, 0
+    3bbe:	0bed      	bt      	0x3b98	// 3b98 <IFCIntHandler+0x38>
+    3bc0:	07da      	br      	0x3b74	// 3b74 <IFCIntHandler+0x14>
+    3bc2:	0000      	bkpt
+    3bc4:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+00003bc8 <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    3bc8:	1460      	nie
+    3bca:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    3bcc:	1078      	lrw      	r3, 0x20000050	// 3c2c <ADCIntHandler+0x64>
+    3bce:	3101      	movi      	r1, 1
+    3bd0:	9360      	ld.w      	r3, (r3, 0x0)
+    3bd2:	9348      	ld.w      	r2, (r3, 0x20)
+    3bd4:	6884      	and      	r2, r1
+    3bd6:	3a40      	cmpnei      	r2, 0
+    3bd8:	0c04      	bf      	0x3be0	// 3be0 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    3bda:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    3bdc:	1463      	ipop
+    3bde:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    3be0:	9348      	ld.w      	r2, (r3, 0x20)
+    3be2:	3102      	movi      	r1, 2
+    3be4:	6884      	and      	r2, r1
+    3be6:	3a40      	cmpnei      	r2, 0
+    3be8:	0bf9      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    3bea:	9348      	ld.w      	r2, (r3, 0x20)
+    3bec:	3104      	movi      	r1, 4
+    3bee:	6884      	and      	r2, r1
+    3bf0:	3a40      	cmpnei      	r2, 0
+    3bf2:	0bf4      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    3bf4:	9348      	ld.w      	r2, (r3, 0x20)
+    3bf6:	3110      	movi      	r1, 16
+    3bf8:	6884      	and      	r2, r1
+    3bfa:	3a40      	cmpnei      	r2, 0
+    3bfc:	0bef      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    3bfe:	9348      	ld.w      	r2, (r3, 0x20)
+    3c00:	3120      	movi      	r1, 32
+    3c02:	6884      	and      	r2, r1
+    3c04:	3a40      	cmpnei      	r2, 0
+    3c06:	0bea      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    3c08:	9348      	ld.w      	r2, (r3, 0x20)
+    3c0a:	3140      	movi      	r1, 64
+    3c0c:	6884      	and      	r2, r1
+    3c0e:	3a40      	cmpnei      	r2, 0
+    3c10:	0be5      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    3c12:	9348      	ld.w      	r2, (r3, 0x20)
+    3c14:	3180      	movi      	r1, 128
+    3c16:	6884      	and      	r2, r1
+    3c18:	3a40      	cmpnei      	r2, 0
+    3c1a:	0be0      	bt      	0x3bda	// 3bda <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    3c1c:	3280      	movi      	r2, 128
+    3c1e:	9328      	ld.w      	r1, (r3, 0x20)
+    3c20:	4249      	lsli      	r2, r2, 9
+    3c22:	6848      	and      	r1, r2
+    3c24:	3940      	cmpnei      	r1, 0
+    3c26:	0fdb      	bf      	0x3bdc	// 3bdc <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    3c28:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    3c2a:	07d9      	br      	0x3bdc	// 3bdc <ADCIntHandler+0x14>
+    3c2c:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00003c30 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    3c30:	1460      	nie
+    3c32:	1462      	ipush
+    3c34:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    3c36:	1387      	lrw      	r4, 0x20000020	// 3dd0 <EPT0IntHandler+0x1a0>
+    3c38:	3280      	movi      	r2, 128
+    3c3a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c3c:	60c8      	addu      	r3, r2
+    3c3e:	9335      	ld.w      	r1, (r3, 0x54)
+    3c40:	3001      	movi      	r0, 1
+    3c42:	6840      	and      	r1, r0
+    3c44:	3940      	cmpnei      	r1, 0
+    3c46:	0c03      	bf      	0x3c4c	// 3c4c <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    3c48:	b317      	st.w      	r0, (r3, 0x5c)
+    3c4a:	0424      	br      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    3c4c:	9335      	ld.w      	r1, (r3, 0x54)
+    3c4e:	3002      	movi      	r0, 2
+    3c50:	6840      	and      	r1, r0
+    3c52:	3940      	cmpnei      	r1, 0
+    3c54:	0bfa      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    3c56:	9335      	ld.w      	r1, (r3, 0x54)
+    3c58:	3004      	movi      	r0, 4
+    3c5a:	6840      	and      	r1, r0
+    3c5c:	3940      	cmpnei      	r1, 0
+    3c5e:	0bf5      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    3c60:	9335      	ld.w      	r1, (r3, 0x54)
+    3c62:	3008      	movi      	r0, 8
+    3c64:	6840      	and      	r1, r0
+    3c66:	3940      	cmpnei      	r1, 0
+    3c68:	0bf0      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    3c6a:	9335      	ld.w      	r1, (r3, 0x54)
+    3c6c:	3010      	movi      	r0, 16
+    3c6e:	6840      	and      	r1, r0
+    3c70:	3940      	cmpnei      	r1, 0
+    3c72:	0c1f      	bf      	0x3cb0	// 3cb0 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    3c74:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    3c76:	3200      	movi      	r2, 0
+    3c78:	3101      	movi      	r1, 1
+    3c7a:	3000      	movi      	r0, 0
+    3c7c:	e3fffa98 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    3c80:	3201      	movi      	r2, 1
+    3c82:	3101      	movi      	r1, 1
+    3c84:	3001      	movi      	r0, 1
+    3c86:	e3fffa93 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    3c8a:	9460      	ld.w      	r3, (r4, 0x0)
+    3c8c:	934b      	ld.w      	r2, (r3, 0x2c)
+    3c8e:	1272      	lrw      	r3, 0x20000388	// 3dd4 <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3c90:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    3c92:	9460      	ld.w      	r3, (r4, 0x0)
+    3c94:	3280      	movi      	r2, 128
+    3c96:	60c8      	addu      	r3, r2
+    3c98:	932b      	ld.w      	r1, (r3, 0x2c)
+    3c9a:	3001      	movi      	r0, 1
+    3c9c:	6840      	and      	r1, r0
+    3c9e:	3940      	cmpnei      	r1, 0
+    3ca0:	0c61      	bf      	0x3d62	// 3d62 <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    3ca2:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    3ca4:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3ca8:	9880      	ld.w      	r4, (r14, 0x0)
+    3caa:	1402      	addi      	r14, r14, 8
+    3cac:	1463      	ipop
+    3cae:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    3cb0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cb2:	3020      	movi      	r0, 32
+    3cb4:	6840      	and      	r1, r0
+    3cb6:	3940      	cmpnei      	r1, 0
+    3cb8:	0c10      	bf      	0x3cd8	// 3cd8 <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    3cba:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    3cbc:	3200      	movi      	r2, 0
+    3cbe:	3101      	movi      	r1, 1
+    3cc0:	3001      	movi      	r0, 1
+    3cc2:	e3fffa75 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    3cc6:	3201      	movi      	r2, 1
+    3cc8:	3101      	movi      	r1, 1
+    3cca:	3000      	movi      	r0, 0
+    3ccc:	e3fffa70 	bsr      	0x31ac	// 31ac <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    3cd0:	9460      	ld.w      	r3, (r4, 0x0)
+    3cd2:	934c      	ld.w      	r2, (r3, 0x30)
+    3cd4:	1261      	lrw      	r3, 0x20000384	// 3dd8 <EPT0IntHandler+0x1a8>
+    3cd6:	07dd      	br      	0x3c90	// 3c90 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    3cd8:	9335      	ld.w      	r1, (r3, 0x54)
+    3cda:	3040      	movi      	r0, 64
+    3cdc:	6840      	and      	r1, r0
+    3cde:	3940      	cmpnei      	r1, 0
+    3ce0:	0bb4      	bt      	0x3c48	// 3c48 <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    3ce2:	9335      	ld.w      	r1, (r3, 0x54)
+    3ce4:	6848      	and      	r1, r2
+    3ce6:	3940      	cmpnei      	r1, 0
+    3ce8:	0c03      	bf      	0x3cee	// 3cee <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    3cea:	b357      	st.w      	r2, (r3, 0x5c)
+    3cec:	07d3      	br      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    3cee:	3280      	movi      	r2, 128
+    3cf0:	9335      	ld.w      	r1, (r3, 0x54)
+    3cf2:	4241      	lsli      	r2, r2, 1
+    3cf4:	6848      	and      	r1, r2
+    3cf6:	3940      	cmpnei      	r1, 0
+    3cf8:	0bf9      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    3cfa:	3280      	movi      	r2, 128
+    3cfc:	9335      	ld.w      	r1, (r3, 0x54)
+    3cfe:	4242      	lsli      	r2, r2, 2
+    3d00:	6848      	and      	r1, r2
+    3d02:	3940      	cmpnei      	r1, 0
+    3d04:	0bf3      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    3d06:	3280      	movi      	r2, 128
+    3d08:	9335      	ld.w      	r1, (r3, 0x54)
+    3d0a:	4243      	lsli      	r2, r2, 3
+    3d0c:	6848      	and      	r1, r2
+    3d0e:	3940      	cmpnei      	r1, 0
+    3d10:	0bed      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    3d12:	3280      	movi      	r2, 128
+    3d14:	9335      	ld.w      	r1, (r3, 0x54)
+    3d16:	4244      	lsli      	r2, r2, 4
+    3d18:	6848      	and      	r1, r2
+    3d1a:	3940      	cmpnei      	r1, 0
+    3d1c:	0be7      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    3d1e:	3280      	movi      	r2, 128
+    3d20:	9335      	ld.w      	r1, (r3, 0x54)
+    3d22:	4245      	lsli      	r2, r2, 5
+    3d24:	6848      	and      	r1, r2
+    3d26:	3940      	cmpnei      	r1, 0
+    3d28:	0be1      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    3d2a:	3280      	movi      	r2, 128
+    3d2c:	9335      	ld.w      	r1, (r3, 0x54)
+    3d2e:	4246      	lsli      	r2, r2, 6
+    3d30:	6848      	and      	r1, r2
+    3d32:	3940      	cmpnei      	r1, 0
+    3d34:	0bdb      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    3d36:	3280      	movi      	r2, 128
+    3d38:	9335      	ld.w      	r1, (r3, 0x54)
+    3d3a:	4247      	lsli      	r2, r2, 7
+    3d3c:	6848      	and      	r1, r2
+    3d3e:	3940      	cmpnei      	r1, 0
+    3d40:	0bd5      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    3d42:	3280      	movi      	r2, 128
+    3d44:	9335      	ld.w      	r1, (r3, 0x54)
+    3d46:	4248      	lsli      	r2, r2, 8
+    3d48:	6848      	and      	r1, r2
+    3d4a:	3940      	cmpnei      	r1, 0
+    3d4c:	0bcf      	bt      	0x3cea	// 3cea <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    3d4e:	3280      	movi      	r2, 128
+    3d50:	9335      	ld.w      	r1, (r3, 0x54)
+    3d52:	4249      	lsli      	r2, r2, 9
+    3d54:	6848      	and      	r1, r2
+    3d56:	3940      	cmpnei      	r1, 0
+    3d58:	0f9d      	bf      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    3d5a:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    3d5c:	e3fffd50 	bsr      	0x37fc	// 37fc <EPT_Stop>
+    3d60:	0799      	br      	0x3c92	// 3c92 <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    3d62:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d64:	3002      	movi      	r0, 2
+    3d66:	6840      	and      	r1, r0
+    3d68:	3940      	cmpnei      	r1, 0
+    3d6a:	0b9c      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    3d6c:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d6e:	3004      	movi      	r0, 4
+    3d70:	6840      	and      	r1, r0
+    3d72:	3940      	cmpnei      	r1, 0
+    3d74:	0b97      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    3d76:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d78:	3008      	movi      	r0, 8
+    3d7a:	6840      	and      	r1, r0
+    3d7c:	3940      	cmpnei      	r1, 0
+    3d7e:	0b92      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    3d80:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d82:	3010      	movi      	r0, 16
+    3d84:	6840      	and      	r1, r0
+    3d86:	3940      	cmpnei      	r1, 0
+    3d88:	0b8d      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    3d8a:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d8c:	3020      	movi      	r0, 32
+    3d8e:	6840      	and      	r1, r0
+    3d90:	3940      	cmpnei      	r1, 0
+    3d92:	0b88      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    3d94:	932b      	ld.w      	r1, (r3, 0x2c)
+    3d96:	3040      	movi      	r0, 64
+    3d98:	6840      	and      	r1, r0
+    3d9a:	3940      	cmpnei      	r1, 0
+    3d9c:	0b83      	bt      	0x3ca2	// 3ca2 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    3d9e:	932b      	ld.w      	r1, (r3, 0x2c)
+    3da0:	6848      	and      	r1, r2
+    3da2:	3940      	cmpnei      	r1, 0
+    3da4:	0c03      	bf      	0x3daa	// 3daa <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    3da6:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    3da8:	077e      	br      	0x3ca4	// 3ca4 <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    3daa:	3280      	movi      	r2, 128
+    3dac:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dae:	4241      	lsli      	r2, r2, 1
+    3db0:	6848      	and      	r1, r2
+    3db2:	3940      	cmpnei      	r1, 0
+    3db4:	0bf9      	bt      	0x3da6	// 3da6 <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    3db6:	3280      	movi      	r2, 128
+    3db8:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dba:	4242      	lsli      	r2, r2, 2
+    3dbc:	6848      	and      	r1, r2
+    3dbe:	3940      	cmpnei      	r1, 0
+    3dc0:	0bf3      	bt      	0x3da6	// 3da6 <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    3dc2:	3280      	movi      	r2, 128
+    3dc4:	932b      	ld.w      	r1, (r3, 0x2c)
+    3dc6:	4243      	lsli      	r2, r2, 3
+    3dc8:	6848      	and      	r1, r2
+    3dca:	3940      	cmpnei      	r1, 0
+    3dcc:	0bed      	bt      	0x3da6	// 3da6 <EPT0IntHandler+0x176>
+    3dce:	076b      	br      	0x3ca4	// 3ca4 <EPT0IntHandler+0x74>
+    3dd0:	20000020 	.long	0x20000020
+    3dd4:	20000388 	.long	0x20000388
+    3dd8:	20000384 	.long	0x20000384
+
+Disassembly of section .text.WWDTHandler:
+
+00003ddc <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    3ddc:	1460      	nie
+    3dde:	1462      	ipush
+    3de0:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    3de2:	10ab      	lrw      	r5, 0x20000010	// 3e0c <WWDTHandler+0x30>
+    3de4:	3401      	movi      	r4, 1
+    3de6:	9560      	ld.w      	r3, (r5, 0x0)
+    3de8:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    3dea:	30ff      	movi      	r0, 255
+    3dec:	e3fffade 	bsr      	0x33a8	// 33a8 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    3df0:	9540      	ld.w      	r2, (r5, 0x0)
+    3df2:	9263      	ld.w      	r3, (r2, 0xc)
+    3df4:	68d0      	and      	r3, r4
+    3df6:	3b40      	cmpnei      	r3, 0
+    3df8:	0c02      	bf      	0x3dfc	// 3dfc <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    3dfa:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    3dfc:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    3e00:	98a1      	ld.w      	r5, (r14, 0x4)
+    3e02:	9880      	ld.w      	r4, (r14, 0x0)
+    3e04:	1403      	addi      	r14, r14, 12
+    3e06:	1463      	ipop
+    3e08:	1461      	nir
+    3e0a:	0000      	bkpt
+    3e0c:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00003e10 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    3e10:	1460      	nie
+    3e12:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    3e14:	107e      	lrw      	r3, 0x20000024	// 3e8c <GPT0IntHandler+0x7c>
+    3e16:	3101      	movi      	r1, 1
+    3e18:	9360      	ld.w      	r3, (r3, 0x0)
+    3e1a:	237f      	addi      	r3, 128
+    3e1c:	9355      	ld.w      	r2, (r3, 0x54)
+    3e1e:	6884      	and      	r2, r1
+    3e20:	3a40      	cmpnei      	r2, 0
+    3e22:	0c04      	bf      	0x3e2a	// 3e2a <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    3e24:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    3e26:	1463      	ipop
+    3e28:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    3e2a:	9355      	ld.w      	r2, (r3, 0x54)
+    3e2c:	3102      	movi      	r1, 2
+    3e2e:	6884      	and      	r2, r1
+    3e30:	3a40      	cmpnei      	r2, 0
+    3e32:	0bf9      	bt      	0x3e24	// 3e24 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    3e34:	9355      	ld.w      	r2, (r3, 0x54)
+    3e36:	3110      	movi      	r1, 16
+    3e38:	6884      	and      	r2, r1
+    3e3a:	3a40      	cmpnei      	r2, 0
+    3e3c:	0bf4      	bt      	0x3e24	// 3e24 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    3e3e:	9355      	ld.w      	r2, (r3, 0x54)
+    3e40:	3120      	movi      	r1, 32
+    3e42:	6884      	and      	r2, r1
+    3e44:	3a40      	cmpnei      	r2, 0
+    3e46:	0bef      	bt      	0x3e24	// 3e24 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    3e48:	3280      	movi      	r2, 128
+    3e4a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e4c:	4241      	lsli      	r2, r2, 1
+    3e4e:	6848      	and      	r1, r2
+    3e50:	3940      	cmpnei      	r1, 0
+    3e52:	0c03      	bf      	0x3e58	// 3e58 <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    3e54:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    3e56:	07e8      	br      	0x3e26	// 3e26 <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    3e58:	3280      	movi      	r2, 128
+    3e5a:	9335      	ld.w      	r1, (r3, 0x54)
+    3e5c:	4242      	lsli      	r2, r2, 2
+    3e5e:	6848      	and      	r1, r2
+    3e60:	3940      	cmpnei      	r1, 0
+    3e62:	0bf9      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    3e64:	3280      	movi      	r2, 128
+    3e66:	9335      	ld.w      	r1, (r3, 0x54)
+    3e68:	4243      	lsli      	r2, r2, 3
+    3e6a:	6848      	and      	r1, r2
+    3e6c:	3940      	cmpnei      	r1, 0
+    3e6e:	0bf3      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    3e70:	3280      	movi      	r2, 128
+    3e72:	9335      	ld.w      	r1, (r3, 0x54)
+    3e74:	4244      	lsli      	r2, r2, 4
+    3e76:	6848      	and      	r1, r2
+    3e78:	3940      	cmpnei      	r1, 0
+    3e7a:	0bed      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    3e7c:	3280      	movi      	r2, 128
+    3e7e:	9335      	ld.w      	r1, (r3, 0x54)
+    3e80:	4249      	lsli      	r2, r2, 9
+    3e82:	6848      	and      	r1, r2
+    3e84:	3940      	cmpnei      	r1, 0
+    3e86:	0be7      	bt      	0x3e54	// 3e54 <GPT0IntHandler+0x44>
+    3e88:	07cf      	br      	0x3e26	// 3e26 <GPT0IntHandler+0x16>
+    3e8a:	0000      	bkpt
+    3e8c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00003e90 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    3e90:	1460      	nie
+    3e92:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    3e94:	1079      	lrw      	r3, 0x20000018	// 3ef8 <RTCIntHandler+0x68>
+    3e96:	3101      	movi      	r1, 1
+    3e98:	9360      	ld.w      	r3, (r3, 0x0)
+    3e9a:	934a      	ld.w      	r2, (r3, 0x28)
+    3e9c:	6884      	and      	r2, r1
+    3e9e:	3a40      	cmpnei      	r2, 0
+    3ea0:	0c14      	bf      	0x3ec8	// 3ec8 <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    3ea2:	1057      	lrw      	r2, 0xca53	// 3efc <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    3ea4:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    3ea6:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    3ea8:	9342      	ld.w      	r2, (r3, 0x8)
+    3eaa:	6c84      	or      	r2, r1
+    3eac:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    3eae:	3280      	movi      	r2, 128
+    3eb0:	424d      	lsli      	r2, r2, 13
+    3eb2:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    3eb4:	3102      	movi      	r1, 2
+    3eb6:	9342      	ld.w      	r2, (r3, 0x8)
+    3eb8:	6884      	and      	r2, r1
+    3eba:	3a40      	cmpnei      	r2, 0
+    3ebc:	0bfd      	bt      	0x3eb6	// 3eb6 <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    3ebe:	9342      	ld.w      	r2, (r3, 0x8)
+    3ec0:	3a80      	bclri      	r2, 0
+    3ec2:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    3ec4:	1463      	ipop
+    3ec6:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    3ec8:	934a      	ld.w      	r2, (r3, 0x28)
+    3eca:	3102      	movi      	r1, 2
+    3ecc:	6884      	and      	r2, r1
+    3ece:	3a40      	cmpnei      	r2, 0
+    3ed0:	0c03      	bf      	0x3ed6	// 3ed6 <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    3ed2:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    3ed4:	07f8      	br      	0x3ec4	// 3ec4 <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    3ed6:	934a      	ld.w      	r2, (r3, 0x28)
+    3ed8:	3104      	movi      	r1, 4
+    3eda:	6884      	and      	r2, r1
+    3edc:	3a40      	cmpnei      	r2, 0
+    3ede:	0bfa      	bt      	0x3ed2	// 3ed2 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    3ee0:	934a      	ld.w      	r2, (r3, 0x28)
+    3ee2:	3108      	movi      	r1, 8
+    3ee4:	6884      	and      	r2, r1
+    3ee6:	3a40      	cmpnei      	r2, 0
+    3ee8:	0bf5      	bt      	0x3ed2	// 3ed2 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    3eea:	934a      	ld.w      	r2, (r3, 0x28)
+    3eec:	3110      	movi      	r1, 16
+    3eee:	6884      	and      	r2, r1
+    3ef0:	3a40      	cmpnei      	r2, 0
+    3ef2:	0bf0      	bt      	0x3ed2	// 3ed2 <RTCIntHandler+0x42>
+    3ef4:	07e8      	br      	0x3ec4	// 3ec4 <RTCIntHandler+0x34>
+    3ef6:	0000      	bkpt
+    3ef8:	20000018 	.long	0x20000018
+    3efc:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00003f00 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    3f00:	1460      	nie
+    3f02:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f04:	106d      	lrw      	r3, 0x20000040	// 3f38 <UART0IntHandler+0x38>
+    3f06:	3102      	movi      	r1, 2
+    3f08:	9360      	ld.w      	r3, (r3, 0x0)
+    3f0a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f0c:	6884      	and      	r2, r1
+    3f0e:	3a40      	cmpnei      	r2, 0
+    3f10:	0c03      	bf      	0x3f16	// 3f16 <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    3f12:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f14:	0410      	br      	0x3f34	// 3f34 <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f16:	9343      	ld.w      	r2, (r3, 0xc)
+    3f18:	3101      	movi      	r1, 1
+    3f1a:	6884      	and      	r2, r1
+    3f1c:	3a40      	cmpnei      	r2, 0
+    3f1e:	0bfa      	bt      	0x3f12	// 3f12 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f20:	9343      	ld.w      	r2, (r3, 0xc)
+    3f22:	3108      	movi      	r1, 8
+    3f24:	6884      	and      	r2, r1
+    3f26:	3a40      	cmpnei      	r2, 0
+    3f28:	0bf5      	bt      	0x3f12	// 3f12 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f2a:	9343      	ld.w      	r2, (r3, 0xc)
+    3f2c:	3104      	movi      	r1, 4
+    3f2e:	6884      	and      	r2, r1
+    3f30:	3a40      	cmpnei      	r2, 0
+    3f32:	0bf0      	bt      	0x3f12	// 3f12 <UART0IntHandler+0x12>
+}
+    3f34:	1463      	ipop
+    3f36:	1461      	nir
+    3f38:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00003f3c <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    3f3c:	1460      	nie
+    3f3e:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f40:	106d      	lrw      	r3, 0x2000003c	// 3f74 <UART1IntHandler+0x38>
+    3f42:	3102      	movi      	r1, 2
+    3f44:	9360      	ld.w      	r3, (r3, 0x0)
+    3f46:	9343      	ld.w      	r2, (r3, 0xc)
+    3f48:	6884      	and      	r2, r1
+    3f4a:	3a40      	cmpnei      	r2, 0
+    3f4c:	0c03      	bf      	0x3f52	// 3f52 <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    3f4e:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    3f50:	0410      	br      	0x3f70	// 3f70 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3f52:	9343      	ld.w      	r2, (r3, 0xc)
+    3f54:	3101      	movi      	r1, 1
+    3f56:	6884      	and      	r2, r1
+    3f58:	3a40      	cmpnei      	r2, 0
+    3f5a:	0bfa      	bt      	0x3f4e	// 3f4e <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3f5c:	9343      	ld.w      	r2, (r3, 0xc)
+    3f5e:	3108      	movi      	r1, 8
+    3f60:	6884      	and      	r2, r1
+    3f62:	3a40      	cmpnei      	r2, 0
+    3f64:	0bf5      	bt      	0x3f4e	// 3f4e <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3f66:	9343      	ld.w      	r2, (r3, 0xc)
+    3f68:	3104      	movi      	r1, 4
+    3f6a:	6884      	and      	r2, r1
+    3f6c:	3a40      	cmpnei      	r2, 0
+    3f6e:	0bf0      	bt      	0x3f4e	// 3f4e <UART1IntHandler+0x12>
+}
+    3f70:	1463      	ipop
+    3f72:	1461      	nir
+    3f74:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00003f78 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    3f78:	1460      	nie
+    3f7a:	1462      	ipush
+    3f7c:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    3f7e:	107f      	lrw      	r3, 0x20000038	// 3ff8 <UART2IntHandler+0x80>
+    3f80:	3102      	movi      	r1, 2
+    3f82:	9360      	ld.w      	r3, (r3, 0x0)
+    3f84:	9343      	ld.w      	r2, (r3, 0xc)
+    3f86:	6884      	and      	r2, r1
+    3f88:	3a40      	cmpnei      	r2, 0
+    3f8a:	0c0b      	bf      	0x3fa0	// 3fa0 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    3f8c:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    3f8e:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    3f90:	7400      	zextb      	r0, r0
+    3f92:	e00002e9 	bsr      	0x4564	// 4564 <UART2_RecvINT_Processing>
+			RS485_Comm_End ++;
+		}
+		
+	}
+	
+}
+    3f96:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    3f9a:	1401      	addi      	r14, r14, 4
+    3f9c:	1463      	ipop
+    3f9e:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    3fa0:	9323      	ld.w      	r1, (r3, 0xc)
+    3fa2:	3201      	movi      	r2, 1
+    3fa4:	6848      	and      	r1, r2
+    3fa6:	3940      	cmpnei      	r1, 0
+    3fa8:	0c0d      	bf      	0x3fc2	// 3fc2 <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    3faa:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    3fac:	1074      	lrw      	r3, 0x200000bc	// 3ffc <UART2IntHandler+0x84>
+    3fae:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fb0:	1074      	lrw      	r3, 0x200000c0	// 4000 <UART2IntHandler+0x88>
+    3fb2:	9360      	ld.w      	r3, (r3, 0x0)
+    3fb4:	3b41      	cmpnei      	r3, 1
+    3fb6:	0bf0      	bt      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    3fb8:	1053      	lrw      	r2, 0x200000c4	// 4004 <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    3fba:	9260      	ld.w      	r3, (r2, 0x0)
+    3fbc:	2300      	addi      	r3, 1
+    3fbe:	b260      	st.w      	r3, (r2, 0x0)
+}
+    3fc0:	07eb      	br      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    3fc2:	9343      	ld.w      	r2, (r3, 0xc)
+    3fc4:	3108      	movi      	r1, 8
+    3fc6:	6884      	and      	r2, r1
+    3fc8:	3a40      	cmpnei      	r2, 0
+    3fca:	0c03      	bf      	0x3fd0	// 3fd0 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    3fcc:	b323      	st.w      	r1, (r3, 0xc)
+    3fce:	07e4      	br      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    3fd0:	9343      	ld.w      	r2, (r3, 0xc)
+    3fd2:	3104      	movi      	r1, 4
+    3fd4:	6884      	and      	r2, r1
+    3fd6:	3a40      	cmpnei      	r2, 0
+    3fd8:	0bfa      	bt      	0x3fcc	// 3fcc <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    3fda:	3180      	movi      	r1, 128
+    3fdc:	9303      	ld.w      	r0, (r3, 0xc)
+    3fde:	412c      	lsli      	r1, r1, 12
+    3fe0:	6804      	and      	r0, r1
+    3fe2:	3840      	cmpnei      	r0, 0
+    3fe4:	0fd9      	bf      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    3fe6:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    3fe8:	1065      	lrw      	r3, 0x200000bc	// 3ffc <UART2IntHandler+0x84>
+    3fea:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    3fec:	1065      	lrw      	r3, 0x200000c0	// 4000 <UART2IntHandler+0x88>
+    3fee:	9360      	ld.w      	r3, (r3, 0x0)
+    3ff0:	3b41      	cmpnei      	r3, 1
+    3ff2:	0bd2      	bt      	0x3f96	// 3f96 <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    3ff4:	1045      	lrw      	r2, 0x200000c8	// 4008 <UART2IntHandler+0x90>
+    3ff6:	07e2      	br      	0x3fba	// 3fba <UART2IntHandler+0x42>
+    3ff8:	20000038 	.long	0x20000038
+    3ffc:	200000bc 	.long	0x200000bc
+    4000:	200000c0 	.long	0x200000c0
+    4004:	200000c4 	.long	0x200000c4
+    4008:	200000c8 	.long	0x200000c8
+
+Disassembly of section .text.SPI0IntHandler:
+
+0000400c <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    400c:	1460      	nie
+    400e:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    4010:	1178      	lrw      	r3, 0x20000034	// 40f0 <SPI0IntHandler+0xe4>
+    4012:	3101      	movi      	r1, 1
+    4014:	9360      	ld.w      	r3, (r3, 0x0)
+    4016:	9347      	ld.w      	r2, (r3, 0x1c)
+    4018:	6884      	and      	r2, r1
+    401a:	3a40      	cmpnei      	r2, 0
+    401c:	0c03      	bf      	0x4022	// 4022 <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    401e:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    4020:	0407      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    4022:	9347      	ld.w      	r2, (r3, 0x1c)
+    4024:	3002      	movi      	r0, 2
+    4026:	6880      	and      	r2, r0
+    4028:	3a40      	cmpnei      	r2, 0
+    402a:	0c04      	bf      	0x4032	// 4032 <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    402c:	b308      	st.w      	r0, (r3, 0x20)
+}
+    402e:	1463      	ipop
+    4030:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    4032:	9347      	ld.w      	r2, (r3, 0x1c)
+    4034:	3004      	movi      	r0, 4
+    4036:	6880      	and      	r2, r0
+    4038:	3a40      	cmpnei      	r2, 0
+    403a:	0c55      	bf      	0x40e4	// 40e4 <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    403c:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    403e:	9302      	ld.w      	r0, (r3, 0x8)
+    4040:	32aa      	movi      	r2, 170
+    4042:	6482      	cmpne      	r0, r2
+    4044:	083e      	bt      	0x40c0	// 40c0 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4046:	3102      	movi      	r1, 2
+    4048:	9343      	ld.w      	r2, (r3, 0xc)
+    404a:	6884      	and      	r2, r1
+    404c:	3a40      	cmpnei      	r2, 0
+    404e:	0ffd      	bf      	0x4048	// 4048 <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    4050:	3211      	movi      	r2, 17
+    4052:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4054:	3110      	movi      	r1, 16
+    4056:	9343      	ld.w      	r2, (r3, 0xc)
+    4058:	6884      	and      	r2, r1
+    405a:	3a40      	cmpnei      	r2, 0
+    405c:	0bfd      	bt      	0x4056	// 4056 <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    405e:	3102      	movi      	r1, 2
+    4060:	9343      	ld.w      	r2, (r3, 0xc)
+    4062:	6884      	and      	r2, r1
+    4064:	3a40      	cmpnei      	r2, 0
+    4066:	0ffd      	bf      	0x4060	// 4060 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    4068:	3212      	movi      	r2, 18
+    406a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    406c:	3110      	movi      	r1, 16
+    406e:	9343      	ld.w      	r2, (r3, 0xc)
+    4070:	6884      	and      	r2, r1
+    4072:	3a40      	cmpnei      	r2, 0
+    4074:	0bfd      	bt      	0x406e	// 406e <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    4076:	3102      	movi      	r1, 2
+    4078:	9343      	ld.w      	r2, (r3, 0xc)
+    407a:	6884      	and      	r2, r1
+    407c:	3a40      	cmpnei      	r2, 0
+    407e:	0ffd      	bf      	0x4078	// 4078 <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    4080:	3213      	movi      	r2, 19
+    4082:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    4084:	3110      	movi      	r1, 16
+    4086:	9343      	ld.w      	r2, (r3, 0xc)
+    4088:	6884      	and      	r2, r1
+    408a:	3a40      	cmpnei      	r2, 0
+    408c:	0bfd      	bt      	0x4086	// 4086 <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    408e:	3102      	movi      	r1, 2
+    4090:	9343      	ld.w      	r2, (r3, 0xc)
+    4092:	6884      	and      	r2, r1
+    4094:	3a40      	cmpnei      	r2, 0
+    4096:	0ffd      	bf      	0x4090	// 4090 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    4098:	3214      	movi      	r2, 20
+    409a:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    409c:	3110      	movi      	r1, 16
+    409e:	9343      	ld.w      	r2, (r3, 0xc)
+    40a0:	6884      	and      	r2, r1
+    40a2:	3a40      	cmpnei      	r2, 0
+    40a4:	0bfd      	bt      	0x409e	// 409e <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    40a6:	3102      	movi      	r1, 2
+    40a8:	9343      	ld.w      	r2, (r3, 0xc)
+    40aa:	6884      	and      	r2, r1
+    40ac:	3a40      	cmpnei      	r2, 0
+    40ae:	0ffd      	bf      	0x40a8	// 40a8 <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    40b0:	3215      	movi      	r2, 21
+    40b2:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    40b4:	3110      	movi      	r1, 16
+    40b6:	9343      	ld.w      	r2, (r3, 0xc)
+    40b8:	6884      	and      	r2, r1
+    40ba:	3a40      	cmpnei      	r2, 0
+    40bc:	0bfd      	bt      	0x40b6	// 40b6 <SPI0IntHandler+0xaa>
+    40be:	07b8      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    40c0:	9343      	ld.w      	r2, (r3, 0xc)
+    40c2:	6884      	and      	r2, r1
+    40c4:	3a40      	cmpnei      	r2, 0
+    40c6:	0bb4      	bt      	0x402e	// 402e <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    40c8:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40ca:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    40cc:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40ce:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d0:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d2:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d4:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d6:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    40d8:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    40da:	9343      	ld.w      	r2, (r3, 0xc)
+    40dc:	6884      	and      	r2, r1
+    40de:	3a40      	cmpnei      	r2, 0
+    40e0:	0bfd      	bt      	0x40da	// 40da <SPI0IntHandler+0xce>
+    40e2:	07a6      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    40e4:	9347      	ld.w      	r2, (r3, 0x1c)
+    40e6:	3108      	movi      	r1, 8
+    40e8:	6884      	and      	r2, r1
+    40ea:	3a40      	cmpnei      	r2, 0
+    40ec:	0b99      	bt      	0x401e	// 401e <SPI0IntHandler+0x12>
+    40ee:	07a0      	br      	0x402e	// 402e <SPI0IntHandler+0x22>
+    40f0:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+000040f4 <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    40f4:	1460      	nie
+    40f6:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    40f8:	1073      	lrw      	r3, 0x2000002c	// 4144 <SIO0IntHandler+0x50>
+    40fa:	3104      	movi      	r1, 4
+    40fc:	9360      	ld.w      	r3, (r3, 0x0)
+    40fe:	9349      	ld.w      	r2, (r3, 0x24)
+    4100:	6884      	and      	r2, r1
+    4102:	3a40      	cmpnei      	r2, 0
+    4104:	0c02      	bf      	0x4108	// 4108 <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    4106:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    4108:	9349      	ld.w      	r2, (r3, 0x24)
+    410a:	3101      	movi      	r1, 1
+    410c:	6884      	and      	r2, r1
+    410e:	3a40      	cmpnei      	r2, 0
+    4110:	0c02      	bf      	0x4114	// 4114 <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    4112:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    4114:	9349      	ld.w      	r2, (r3, 0x24)
+    4116:	3102      	movi      	r1, 2
+    4118:	6884      	and      	r2, r1
+    411a:	3a40      	cmpnei      	r2, 0
+    411c:	0c03      	bf      	0x4122	// 4122 <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    411e:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    4120:	0410      	br      	0x4140	// 4140 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    4122:	9349      	ld.w      	r2, (r3, 0x24)
+    4124:	3108      	movi      	r1, 8
+    4126:	6884      	and      	r2, r1
+    4128:	3a40      	cmpnei      	r2, 0
+    412a:	0bfa      	bt      	0x411e	// 411e <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    412c:	9349      	ld.w      	r2, (r3, 0x24)
+    412e:	3110      	movi      	r1, 16
+    4130:	6884      	and      	r2, r1
+    4132:	3a40      	cmpnei      	r2, 0
+    4134:	0bf5      	bt      	0x411e	// 411e <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    4136:	9349      	ld.w      	r2, (r3, 0x24)
+    4138:	3120      	movi      	r1, 32
+    413a:	6884      	and      	r2, r1
+    413c:	3a40      	cmpnei      	r2, 0
+    413e:	0bf0      	bt      	0x411e	// 411e <SIO0IntHandler+0x2a>
+}
+    4140:	1463      	ipop
+    4142:	1461      	nir
+    4144:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00004148 <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    4148:	1460      	nie
+    414a:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    414c:	106a      	lrw      	r3, 0x2000005c	// 4174 <EXI0IntHandler+0x2c>
+    414e:	3101      	movi      	r1, 1
+    4150:	9360      	ld.w      	r3, (r3, 0x0)
+    4152:	237f      	addi      	r3, 128
+    4154:	934c      	ld.w      	r2, (r3, 0x30)
+    4156:	6884      	and      	r2, r1
+    4158:	3a40      	cmpnei      	r2, 0
+    415a:	0c04      	bf      	0x4162	// 4162 <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    415c:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    415e:	1463      	ipop
+    4160:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    4162:	3280      	movi      	r2, 128
+    4164:	932c      	ld.w      	r1, (r3, 0x30)
+    4166:	4249      	lsli      	r2, r2, 9
+    4168:	6848      	and      	r1, r2
+    416a:	3940      	cmpnei      	r1, 0
+    416c:	0ff9      	bf      	0x415e	// 415e <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    416e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4170:	07f7      	br      	0x415e	// 415e <EXI0IntHandler+0x16>
+    4172:	0000      	bkpt
+    4174:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00004178 <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    4178:	1460      	nie
+    417a:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    417c:	106a      	lrw      	r3, 0x2000005c	// 41a4 <EXI1IntHandler+0x2c>
+    417e:	3102      	movi      	r1, 2
+    4180:	9360      	ld.w      	r3, (r3, 0x0)
+    4182:	237f      	addi      	r3, 128
+    4184:	934c      	ld.w      	r2, (r3, 0x30)
+    4186:	6884      	and      	r2, r1
+    4188:	3a40      	cmpnei      	r2, 0
+    418a:	0c04      	bf      	0x4192	// 4192 <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    418c:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    418e:	1463      	ipop
+    4190:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    4192:	3280      	movi      	r2, 128
+    4194:	932c      	ld.w      	r1, (r3, 0x30)
+    4196:	424a      	lsli      	r2, r2, 10
+    4198:	6848      	and      	r1, r2
+    419a:	3940      	cmpnei      	r1, 0
+    419c:	0ff9      	bf      	0x418e	// 418e <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    419e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41a0:	07f7      	br      	0x418e	// 418e <EXI1IntHandler+0x16>
+    41a2:	0000      	bkpt
+    41a4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+000041a8 <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    41a8:	1460      	nie
+    41aa:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    41ac:	1070      	lrw      	r3, 0x2000005c	// 41ec <EXI2to3IntHandler+0x44>
+    41ae:	3104      	movi      	r1, 4
+    41b0:	9360      	ld.w      	r3, (r3, 0x0)
+    41b2:	237f      	addi      	r3, 128
+    41b4:	934c      	ld.w      	r2, (r3, 0x30)
+    41b6:	6884      	and      	r2, r1
+    41b8:	3a40      	cmpnei      	r2, 0
+    41ba:	0c04      	bf      	0x41c2	// 41c2 <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    41bc:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    41be:	1463      	ipop
+    41c0:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    41c2:	934c      	ld.w      	r2, (r3, 0x30)
+    41c4:	3108      	movi      	r1, 8
+    41c6:	6884      	and      	r2, r1
+    41c8:	3a40      	cmpnei      	r2, 0
+    41ca:	0bf9      	bt      	0x41bc	// 41bc <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    41cc:	3280      	movi      	r2, 128
+    41ce:	932c      	ld.w      	r1, (r3, 0x30)
+    41d0:	424b      	lsli      	r2, r2, 11
+    41d2:	6848      	and      	r1, r2
+    41d4:	3940      	cmpnei      	r1, 0
+    41d6:	0c03      	bf      	0x41dc	// 41dc <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    41d8:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    41da:	07f2      	br      	0x41be	// 41be <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    41dc:	3280      	movi      	r2, 128
+    41de:	932c      	ld.w      	r1, (r3, 0x30)
+    41e0:	424c      	lsli      	r2, r2, 12
+    41e2:	6848      	and      	r1, r2
+    41e4:	3940      	cmpnei      	r1, 0
+    41e6:	0bf9      	bt      	0x41d8	// 41d8 <EXI2to3IntHandler+0x30>
+    41e8:	07eb      	br      	0x41be	// 41be <EXI2to3IntHandler+0x16>
+    41ea:	0000      	bkpt
+    41ec:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+000041f0 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    41f0:	1460      	nie
+    41f2:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    41f4:	1075      	lrw      	r3, 0x2000005c	// 4248 <EXI4to9IntHandler+0x58>
+    41f6:	3280      	movi      	r2, 128
+    41f8:	9360      	ld.w      	r3, (r3, 0x0)
+    41fa:	60c8      	addu      	r3, r2
+    41fc:	932c      	ld.w      	r1, (r3, 0x30)
+    41fe:	3010      	movi      	r0, 16
+    4200:	6840      	and      	r1, r0
+    4202:	3940      	cmpnei      	r1, 0
+    4204:	0c04      	bf      	0x420c	// 420c <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    4206:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    4208:	1463      	ipop
+    420a:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    420c:	932c      	ld.w      	r1, (r3, 0x30)
+    420e:	3020      	movi      	r0, 32
+    4210:	6840      	and      	r1, r0
+    4212:	3940      	cmpnei      	r1, 0
+    4214:	0bf9      	bt      	0x4206	// 4206 <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    4216:	932c      	ld.w      	r1, (r3, 0x30)
+    4218:	3040      	movi      	r0, 64
+    421a:	6840      	and      	r1, r0
+    421c:	3940      	cmpnei      	r1, 0
+    421e:	0bf4      	bt      	0x4206	// 4206 <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    4220:	932c      	ld.w      	r1, (r3, 0x30)
+    4222:	6848      	and      	r1, r2
+    4224:	3940      	cmpnei      	r1, 0
+    4226:	0c03      	bf      	0x422c	// 422c <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    4228:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    422a:	07ef      	br      	0x4208	// 4208 <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    422c:	3280      	movi      	r2, 128
+    422e:	932c      	ld.w      	r1, (r3, 0x30)
+    4230:	4241      	lsli      	r2, r2, 1
+    4232:	6848      	and      	r1, r2
+    4234:	3940      	cmpnei      	r1, 0
+    4236:	0bf9      	bt      	0x4228	// 4228 <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    4238:	3280      	movi      	r2, 128
+    423a:	932c      	ld.w      	r1, (r3, 0x30)
+    423c:	4242      	lsli      	r2, r2, 2
+    423e:	6848      	and      	r1, r2
+    4240:	3940      	cmpnei      	r1, 0
+    4242:	0bf3      	bt      	0x4228	// 4228 <EXI4to9IntHandler+0x38>
+    4244:	07e2      	br      	0x4208	// 4208 <EXI4to9IntHandler+0x18>
+    4246:	0000      	bkpt
+    4248:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+0000424c <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    424c:	1460      	nie
+    424e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    4250:	1076      	lrw      	r3, 0x2000005c	// 42a8 <EXI10to15IntHandler+0x5c>
+    4252:	3280      	movi      	r2, 128
+    4254:	9360      	ld.w      	r3, (r3, 0x0)
+    4256:	237f      	addi      	r3, 128
+    4258:	932c      	ld.w      	r1, (r3, 0x30)
+    425a:	4243      	lsli      	r2, r2, 3
+    425c:	6848      	and      	r1, r2
+    425e:	3940      	cmpnei      	r1, 0
+    4260:	0c03      	bf      	0x4266	// 4266 <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    4262:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    4264:	041f      	br      	0x42a2	// 42a2 <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    4266:	3280      	movi      	r2, 128
+    4268:	932c      	ld.w      	r1, (r3, 0x30)
+    426a:	4244      	lsli      	r2, r2, 4
+    426c:	6848      	and      	r1, r2
+    426e:	3940      	cmpnei      	r1, 0
+    4270:	0bf9      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    4272:	3280      	movi      	r2, 128
+    4274:	932c      	ld.w      	r1, (r3, 0x30)
+    4276:	4245      	lsli      	r2, r2, 5
+    4278:	6848      	and      	r1, r2
+    427a:	3940      	cmpnei      	r1, 0
+    427c:	0bf3      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    427e:	3280      	movi      	r2, 128
+    4280:	932c      	ld.w      	r1, (r3, 0x30)
+    4282:	4246      	lsli      	r2, r2, 6
+    4284:	6848      	and      	r1, r2
+    4286:	3940      	cmpnei      	r1, 0
+    4288:	0bed      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    428a:	3280      	movi      	r2, 128
+    428c:	932c      	ld.w      	r1, (r3, 0x30)
+    428e:	4247      	lsli      	r2, r2, 7
+    4290:	6848      	and      	r1, r2
+    4292:	3940      	cmpnei      	r1, 0
+    4294:	0be7      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    4296:	3280      	movi      	r2, 128
+    4298:	932c      	ld.w      	r1, (r3, 0x30)
+    429a:	4248      	lsli      	r2, r2, 8
+    429c:	6848      	and      	r1, r2
+    429e:	3940      	cmpnei      	r1, 0
+    42a0:	0be1      	bt      	0x4262	// 4262 <EXI10to15IntHandler+0x16>
+}
+    42a2:	1463      	ipop
+    42a4:	1461      	nir
+    42a6:	0000      	bkpt
+    42a8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+000042ac <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    42ac:	1460      	nie
+    42ae:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    42b0:	106b      	lrw      	r3, 0x20000014	// 42dc <LPTIntHandler+0x30>
+    42b2:	3101      	movi      	r1, 1
+    42b4:	9360      	ld.w      	r3, (r3, 0x0)
+    42b6:	934e      	ld.w      	r2, (r3, 0x38)
+    42b8:	6884      	and      	r2, r1
+    42ba:	3a40      	cmpnei      	r2, 0
+    42bc:	0c03      	bf      	0x42c2	// 42c2 <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    42be:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    42c0:	040b      	br      	0x42d6	// 42d6 <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    42c2:	934e      	ld.w      	r2, (r3, 0x38)
+    42c4:	3102      	movi      	r1, 2
+    42c6:	6884      	and      	r2, r1
+    42c8:	3a40      	cmpnei      	r2, 0
+    42ca:	0bfa      	bt      	0x42be	// 42be <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    42cc:	934e      	ld.w      	r2, (r3, 0x38)
+    42ce:	3104      	movi      	r1, 4
+    42d0:	6884      	and      	r2, r1
+    42d2:	3a40      	cmpnei      	r2, 0
+    42d4:	0bf5      	bt      	0x42be	// 42be <LPTIntHandler+0x12>
+}
+    42d6:	1463      	ipop
+    42d8:	1461      	nir
+    42da:	0000      	bkpt
+    42dc:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+000042e0 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    42e0:	1460      	nie
+    42e2:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    42e4:	1071      	lrw      	r3, 0x2000000c	// 4328 <BT0IntHandler+0x48>
+    42e6:	3101      	movi      	r1, 1
+    42e8:	9360      	ld.w      	r3, (r3, 0x0)
+    42ea:	934c      	ld.w      	r2, (r3, 0x30)
+    42ec:	6884      	and      	r2, r1
+    42ee:	3a40      	cmpnei      	r2, 0
+    42f0:	0c0a      	bf      	0x4304	// 4304 <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    42f2:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    42f4:	9341      	ld.w      	r2, (r3, 0x4)
+    42f6:	3a86      	bclri      	r2, 6
+    42f8:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    42fa:	9340      	ld.w      	r2, (r3, 0x0)
+    42fc:	3200      	movi      	r2, 0
+    42fe:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    4300:	1463      	ipop
+    4302:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    4304:	934c      	ld.w      	r2, (r3, 0x30)
+    4306:	3102      	movi      	r1, 2
+    4308:	6884      	and      	r2, r1
+    430a:	3a40      	cmpnei      	r2, 0
+    430c:	0c03      	bf      	0x4312	// 4312 <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    430e:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    4310:	07f8      	br      	0x4300	// 4300 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    4312:	934c      	ld.w      	r2, (r3, 0x30)
+    4314:	3104      	movi      	r1, 4
+    4316:	6884      	and      	r2, r1
+    4318:	3a40      	cmpnei      	r2, 0
+    431a:	0bfa      	bt      	0x430e	// 430e <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    431c:	934c      	ld.w      	r2, (r3, 0x30)
+    431e:	3108      	movi      	r1, 8
+    4320:	6884      	and      	r2, r1
+    4322:	3a40      	cmpnei      	r2, 0
+    4324:	0bf5      	bt      	0x430e	// 430e <BT0IntHandler+0x2e>
+    4326:	07ed      	br      	0x4300	// 4300 <BT0IntHandler+0x20>
+    4328:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+0000432c <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    432c:	1460      	nie
+    432e:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    4330:	1076      	lrw      	r3, 0x20000008	// 4388 <BT1IntHandler+0x5c>
+    4332:	3101      	movi      	r1, 1
+    4334:	9360      	ld.w      	r3, (r3, 0x0)
+    4336:	934c      	ld.w      	r2, (r3, 0x30)
+    4338:	6884      	and      	r2, r1
+    433a:	3a40      	cmpnei      	r2, 0
+    433c:	0c03      	bf      	0x4342	// 4342 <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    433e:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    4340:	0416      	br      	0x436c	// 436c <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    4342:	934c      	ld.w      	r2, (r3, 0x30)
+    4344:	3102      	movi      	r1, 2
+    4346:	6884      	and      	r2, r1
+    4348:	3a40      	cmpnei      	r2, 0
+    434a:	0c13      	bf      	0x4370	// 4370 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    434c:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    434e:	1070      	lrw      	r3, 0x200000b0	// 438c <BT1IntHandler+0x60>
+    4350:	8340      	ld.b      	r2, (r3, 0x0)
+    4352:	2200      	addi      	r2, 1
+    4354:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    4356:	9321      	ld.w      	r1, (r3, 0x4)
+    4358:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    435a:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    435c:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    435e:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    4360:	0c06      	bf      	0x436c	// 436c <BT1IntHandler+0x40>
+			NUM = 0;
+    4362:	3200      	movi      	r2, 0
+    4364:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    4366:	9342      	ld.w      	r2, (r3, 0x8)
+    4368:	2200      	addi      	r2, 1
+    436a:	b342      	st.w      	r2, (r3, 0x8)
+}
+    436c:	1463      	ipop
+    436e:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    4370:	934c      	ld.w      	r2, (r3, 0x30)
+    4372:	3104      	movi      	r1, 4
+    4374:	6884      	and      	r2, r1
+    4376:	3a40      	cmpnei      	r2, 0
+    4378:	0be3      	bt      	0x433e	// 433e <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    437a:	934c      	ld.w      	r2, (r3, 0x30)
+    437c:	3108      	movi      	r1, 8
+    437e:	6884      	and      	r2, r1
+    4380:	3a40      	cmpnei      	r2, 0
+    4382:	0bde      	bt      	0x433e	// 433e <BT1IntHandler+0x12>
+    4384:	07f4      	br      	0x436c	// 436c <BT1IntHandler+0x40>
+    4386:	0000      	bkpt
+    4388:	20000008 	.long	0x20000008
+    438c:	200000b0 	.long	0x200000b0
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00004390 <PriviledgeVioHandler>:
+    4390:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00004392 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    4392:	1460      	nie
+    4394:	1462      	ipush
+    // ISR content ...
+
+}
+    4396:	1463      	ipop
+    4398:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+0000439a <Trap3Handler>:
+    439a:	1460      	nie
+    439c:	1462      	ipush
+    439e:	1463      	ipop
+    43a0:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+000043a2 <Trap2Handler>:
+    43a2:	1460      	nie
+    43a4:	1462      	ipush
+    43a6:	1463      	ipop
+    43a8:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+000043aa <Trap1Handler>:
+    43aa:	1460      	nie
+    43ac:	1462      	ipush
+    43ae:	1463      	ipop
+    43b0:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+000043b2 <Trap0Handler>:
+    43b2:	1460      	nie
+    43b4:	1462      	ipush
+    43b6:	1463      	ipop
+    43b8:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+000043ba <UnrecExecpHandler>:
+    43ba:	1460      	nie
+    43bc:	1462      	ipush
+    43be:	1463      	ipop
+    43c0:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+000043c2 <BreakPointHandler>:
+    43c2:	1460      	nie
+    43c4:	1462      	ipush
+    43c6:	1463      	ipop
+    43c8:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+000043ca <AccessErrHandler>:
+    43ca:	1460      	nie
+    43cc:	1462      	ipush
+    43ce:	1463      	ipop
+    43d0:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+000043d2 <IllegalInstrHandler>:
+    43d2:	1460      	nie
+    43d4:	1462      	ipush
+    43d6:	1463      	ipop
+    43d8:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+000043da <MisalignedHandler>:
+    43da:	1460      	nie
+    43dc:	1462      	ipush
+    43de:	1463      	ipop
+    43e0:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+000043e2 <CNTAIntHandler>:
+    43e2:	1460      	nie
+    43e4:	1462      	ipush
+    43e6:	1463      	ipop
+    43e8:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+000043ea <I2CIntHandler>:
+    43ea:	1460      	nie
+    43ec:	1462      	ipush
+    43ee:	1463      	ipop
+    43f0:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+000043f4 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    43f4:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    43f6:	c0006023 	mfcr      	r3, cr<0, 0>
+    43fa:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    43fe:	1046      	lrw      	r2, 0x20000000	// 4414 <__divsi3+0x20>
+    4400:	3400      	movi      	r4, 0
+    4402:	9240      	ld.w      	r2, (r2, 0x0)
+    4404:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4406:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4408:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    440a:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    440c:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    4410:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    4412:	1481      	pop      	r4
+    4414:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00004418 <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    4418:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    441a:	c0006023 	mfcr      	r3, cr<0, 0>
+    441e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    4422:	1046      	lrw      	r2, 0x20000000	// 4438 <__udivsi3+0x20>
+    4424:	3401      	movi      	r4, 1
+    4426:	9240      	ld.w      	r2, (r2, 0x0)
+    4428:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    442a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    442c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    442e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4430:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    4434:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    4436:	1481      	pop      	r4
+    4438:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__modsi3:
+
+0000443c <__modsi3>:
+
+int __modsi3 ( int a,  int b)
+{   
+    443c:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    443e:	c0006023 	mfcr      	r3, cr<0, 0>
+    4442:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 0;
+    4446:	1046      	lrw      	r2, 0x20000000	// 445c <__modsi3+0x20>
+    4448:	3400      	movi      	r4, 0
+    444a:	9240      	ld.w      	r2, (r2, 0x0)
+    444c:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    444e:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4450:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4452:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4454:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    4458:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    445a:	1481      	pop      	r4
+    445c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+00004460 <__umodsi3>:
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    4460:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    4462:	c0006023 	mfcr      	r3, cr<0, 0>
+    4466:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    446a:	1046      	lrw      	r2, 0x20000000	// 4480 <__umodsi3+0x20>
+    446c:	3401      	movi      	r4, 1
+    446e:	9240      	ld.w      	r2, (r2, 0x0)
+    4470:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    4472:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    4474:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    4476:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    4478:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    447c:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    447e:	1481      	pop      	r4
+    4480:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00004484 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    4484:	c1807420 	psrset      	ee, ie
+}
+    4488:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+0000448c <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    448c:	14d1      	push      	r4, r15
+	switch(uart_id){
+    448e:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    4490:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    4492:	0c1a      	bf      	0x44c6	// 44c6 <UARTx_Init+0x3a>
+    4494:	3840      	cmpnei      	r0, 0
+    4496:	0c04      	bf      	0x449e	// 449e <UARTx_Init+0x12>
+    4498:	3842      	cmpnei      	r0, 2
+    449a:	0c2a      	bf      	0x44ee	// 44ee <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    449c:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    449e:	e3fff8d9 	bsr      	0x3650	// 3650 <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44a2:	118a      	lrw      	r4, 0x20000040	// 4548 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    44a4:	3100      	movi      	r1, 0
+    44a6:	3000      	movi      	r0, 0
+    44a8:	e3fff914 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    44ac:	9400      	ld.w      	r0, (r4, 0x0)
+    44ae:	3200      	movi      	r2, 0
+    44b0:	1127      	lrw      	r1, 0x2710	// 454c <UARTx_Init+0xc0>
+    44b2:	e3fff985 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    44b6:	9400      	ld.w      	r0, (r4, 0x0)
+    44b8:	3200      	movi      	r2, 0
+    44ba:	1125      	lrw      	r1, 0x2710	// 454c <UARTx_Init+0xc0>
+    44bc:	e3fff988 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    44c0:	e3fff8ec 	bsr      	0x3698	// 3698 <UART0_Int_Enable>
+			break;
+    44c4:	07ec      	br      	0x449c	// 449c <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    44c6:	e3fff8d1 	bsr      	0x3668	// 3668 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44ca:	3102      	movi      	r1, 2
+    44cc:	3001      	movi      	r0, 1
+    44ce:	e3fff901 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    44d2:	1180      	lrw      	r4, 0x2000003c	// 4550 <UARTx_Init+0xc4>
+    44d4:	31d0      	movi      	r1, 208
+    44d6:	9400      	ld.w      	r0, (r4, 0x0)
+    44d8:	3200      	movi      	r2, 0
+    44da:	4121      	lsli      	r1, r1, 1
+    44dc:	e3fff970 	bsr      	0x37bc	// 37bc <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44e0:	31d0      	movi      	r1, 208
+    44e2:	9400      	ld.w      	r0, (r4, 0x0)
+    44e4:	3200      	movi      	r2, 0
+    44e6:	4121      	lsli      	r1, r1, 1
+    44e8:	e3fff972 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			break;
+    44ec:	07d8      	br      	0x449c	// 449c <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    44ee:	e3fff8c9 	bsr      	0x3680	// 3680 <UART2_DeInit>
+			UART_IO_Init(IO_UART2,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    44f2:	3102      	movi      	r1, 2
+    44f4:	3002      	movi      	r0, 2
+    44f6:	e3fff8ed 	bsr      	0x36d0	// 36d0 <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    44fa:	1077      	lrw      	r3, 0x20000038	// 4554 <UARTx_Init+0xc8>
+    44fc:	31d0      	movi      	r1, 208
+    44fe:	9300      	ld.w      	r0, (r3, 0x0)
+    4500:	3200      	movi      	r2, 0
+    4502:	4121      	lsli      	r1, r1, 1
+    4504:	e3fff964 	bsr      	0x37cc	// 37cc <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    4508:	e3fff8d6 	bsr      	0x36b4	// 36b4 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    450c:	3273      	movi      	r2, 115
+    450e:	3100      	movi      	r1, 0
+    4510:	1012      	lrw      	r0, 0x200003b4	// 4558 <UARTx_Init+0xcc>
+    4512:	e3ffea85 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    4516:	1072      	lrw      	r3, 0x2000041b	// 455c <UARTx_Init+0xd0>
+    4518:	3203      	movi      	r2, 3
+    451a:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    451c:	4c48      	lsri      	r2, r4, 8
+    451e:	a388      	st.b      	r4, (r3, 0x8)
+    4520:	a349      	st.b      	r2, (r3, 0x9)
+    4522:	4c50      	lsri      	r2, r4, 16
+    4524:	4c98      	lsri      	r4, r4, 24
+    4526:	a38b      	st.b      	r4, (r3, 0xb)
+    4528:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    452a:	3103      	movi      	r1, 3
+    452c:	108d      	lrw      	r4, 0x20000048	// 4560 <UARTx_Init+0xd4>
+    452e:	3200      	movi      	r2, 0
+    4530:	9400      	ld.w      	r0, (r4, 0x0)
+    4532:	e3fff68d 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    4536:	9400      	ld.w      	r0, (r4, 0x0)
+    4538:	3103      	movi      	r1, 3
+    453a:	e3fff703 	bsr      	0x3340	// 3340 <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    453e:	9400      	ld.w      	r0, (r4, 0x0)
+    4540:	3103      	movi      	r1, 3
+    4542:	e3fff70a 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    4546:	07ab      	br      	0x449c	// 449c <UARTx_Init+0x10>
+    4548:	20000040 	.long	0x20000040
+    454c:	00002710 	.long	0x00002710
+    4550:	2000003c 	.long	0x2000003c
+    4554:	20000038 	.long	0x20000038
+    4558:	200003b4 	.long	0x200003b4
+    455c:	2000041b 	.long	0x2000041b
+    4560:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+00004564 <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    4564:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    4566:	1075      	lrw      	r3, 0x20000414	// 45b8 <UART2_RecvINT_Processing+0x54>
+    4568:	8346      	ld.b      	r2, (r3, 0x6)
+    456a:	8325      	ld.b      	r1, (r3, 0x5)
+    456c:	4248      	lsli      	r2, r2, 8
+    456e:	6c84      	or      	r2, r1
+    4570:	3162      	movi      	r1, 98
+    4572:	10b3      	lrw      	r5, 0x200003b4	// 45bc <UART2_RecvINT_Processing+0x58>
+    4574:	3440      	movi      	r4, 64
+    4576:	6485      	cmplt      	r1, r2
+    4578:	6114      	addu      	r4, r5
+    457a:	0c06      	bf      	0x4586	// 4586 <UART2_RecvINT_Processing+0x22>
+    457c:	3225      	movi      	r2, 37
+    457e:	6090      	addu      	r2, r4
+    4580:	3100      	movi      	r1, 0
+    4582:	a220      	st.b      	r1, (r2, 0x0)
+    4584:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    4586:	8346      	ld.b      	r2, (r3, 0x6)
+    4588:	8325      	ld.b      	r1, (r3, 0x5)
+    458a:	4248      	lsli      	r2, r2, 8
+    458c:	6c84      	or      	r2, r1
+    458e:	5a22      	addi      	r1, r2, 1
+    4590:	6094      	addu      	r2, r5
+    4592:	a200      	st.b      	r0, (r2, 0x0)
+    4594:	2424      	addi      	r4, 37
+    4596:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    4598:	104a      	lrw      	r2, 0x200000b8	// 45c0 <UART2_RecvINT_Processing+0x5c>
+    459a:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    459c:	a420      	st.b      	r1, (r4, 0x0)
+    459e:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45a0:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    45a2:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45a4:	1028      	lrw      	r1, 0x2000041f	// 45c4 <UART2_RecvINT_Processing+0x60>
+    45a6:	a140      	st.b      	r2, (r1, 0x0)
+    45a8:	a101      	st.b      	r0, (r1, 0x1)
+    45aa:	4a10      	lsri      	r0, r2, 16
+    45ac:	4a58      	lsri      	r2, r2, 24
+    45ae:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    45b0:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    45b2:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    45b4:	a344      	st.b      	r2, (r3, 0x4)
+}
+    45b6:	1482      	pop      	r4-r5
+    45b8:	20000414 	.long	0x20000414
+    45bc:	200003b4 	.long	0x200003b4
+    45c0:	200000b8 	.long	0x200000b8
+    45c4:	2000041f 	.long	0x2000041f
+
+Disassembly of section .text.Dbg_Println:
+
+000045c8 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    45c8:	1423      	subi      	r14, r14, 12
+    45ca:	b862      	st.w      	r3, (r14, 0x8)
+    45cc:	b841      	st.w      	r2, (r14, 0x4)
+    45ce:	b820      	st.w      	r1, (r14, 0x0)
+    45d0:	14d2      	push      	r4-r5, r15
+    45d2:	1422      	subi      	r14, r14, 8
+    45d4:	9865      	ld.w      	r3, (r14, 0x14)
+    45d6:	b861      	st.w      	r3, (r14, 0x4)
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+    45d8:	3301      	movi      	r3, 1
+    45da:	105c      	lrw      	r2, 0x20000068	// 4648 <Dbg_Println+0x80>
+    45dc:	70c0      	lsl      	r3, r0
+    45de:	9240      	ld.w      	r2, (r2, 0x0)
+    45e0:	68c8      	and      	r3, r2
+    45e2:	3b40      	cmpnei      	r3, 0
+    45e4:	0c2b      	bf      	0x463a	// 463a <Dbg_Println+0x72>
+        SysTick_Now = SysTick_1ms;
+    45e6:	109a      	lrw      	r4, 0x200000bc	// 464c <Dbg_Println+0x84>
+    45e8:	107a      	lrw      	r3, 0x200000b8	// 4650 <Dbg_Println+0x88>
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ea:	9445      	ld.w      	r2, (r4, 0x14)
+        SysTick_Now = SysTick_1ms;
+    45ec:	9360      	ld.w      	r3, (r3, 0x0)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45ee:	5b49      	subu      	r2, r3, r2
+        SysTick_Now = SysTick_1ms;
+    45f0:	b464      	st.w      	r3, (r4, 0x10)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    45f2:	b446      	st.w      	r2, (r4, 0x18)
+        SysTick_Last = SysTick_Now;
+    45f4:	b465      	st.w      	r3, (r4, 0x14)
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+    45f6:	3180      	movi      	r1, 128
+    45f8:	301c      	movi      	r0, 28
+    45fa:	b840      	st.w      	r2, (r14, 0x0)
+    45fc:	4122      	lsli      	r1, r1, 2
+    45fe:	1056      	lrw      	r2, 0x623b	// 4654 <Dbg_Println+0x8c>
+    4600:	6010      	addu      	r0, r4
+    4602:	e3ffe9b1 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    4606:	10b5      	lrw      	r5, 0x20000038	// 4658 <Dbg_Println+0x90>
+    4608:	311c      	movi      	r1, 28
+    460a:	7481      	zexth      	r2, r0
+    460c:	6050      	addu      	r1, r4
+    460e:	9500      	ld.w      	r0, (r5, 0x0)
+    4610:	e3fff8e6 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+    4614:	3180      	movi      	r1, 128
+    4616:	301c      	movi      	r0, 28
+    4618:	1b06      	addi      	r3, r14, 24
+    461a:	9841      	ld.w      	r2, (r14, 0x4)
+    461c:	4122      	lsli      	r1, r1, 2
+    461e:	6010      	addu      	r0, r4
+    4620:	e3ffe9d1 	bsr      	0x19c2	// 19c2 <__cskyvprintfvsnprintf>
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+    4624:	6c53      	mov      	r1, r4
+    4626:	7481      	zexth      	r2, r0
+    4628:	211b      	addi      	r1, 28
+    462a:	9500      	ld.w      	r0, (r5, 0x0)
+    462c:	e3fff8d8 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		DBG_Printf("\r\n",2);
+    4630:	9500      	ld.w      	r0, (r5, 0x0)
+    4632:	3202      	movi      	r2, 2
+    4634:	102a      	lrw      	r1, 0x6249	// 465c <Dbg_Println+0x94>
+    4636:	e3fff8d3 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+		
+    }
+
+#endif	
+}
+    463a:	1402      	addi      	r14, r14, 8
+    463c:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    4640:	98a1      	ld.w      	r5, (r14, 0x4)
+    4642:	9880      	ld.w      	r4, (r14, 0x0)
+    4644:	1406      	addi      	r14, r14, 24
+    4646:	783c      	jmp      	r15
+    4648:	20000068 	.long	0x20000068
+    464c:	200000bc 	.long	0x200000bc
+    4650:	200000b8 	.long	0x200000b8
+    4654:	0000623b 	.long	0x0000623b
+    4658:	20000038 	.long	0x20000038
+    465c:	00006249 	.long	0x00006249
+
+Disassembly of section .text.Dbg_Print_Buff:
+
+00004660 <Dbg_Print_Buff>:
+
+
+void Dbg_Print_Buff(int DbgOptBit, const char *cmd, U8_T *buff,U16_T len){
+    4660:	14d4      	push      	r4-r7, r15
+    4662:	1423      	subi      	r14, r14, 12
+    4664:	6dcb      	mov      	r7, r2
+    4666:	b861      	st.w      	r3, (r14, 0x4)
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+    4668:	3301      	movi      	r3, 1
+    466a:	105e      	lrw      	r2, 0x20000068	// 46e0 <Dbg_Print_Buff+0x80>
+    466c:	70c0      	lsl      	r3, r0
+    466e:	9240      	ld.w      	r2, (r2, 0x0)
+    4670:	68c8      	and      	r3, r2
+    4672:	3b40      	cmpnei      	r3, 0
+    4674:	0c25      	bf      	0x46be	// 46be <Dbg_Print_Buff+0x5e>
+        SysTick_Now = SysTick_1ms;
+    4676:	109c      	lrw      	r4, 0x200000bc	// 46e4 <Dbg_Print_Buff+0x84>
+    4678:	107c      	lrw      	r3, 0x200000b8	// 46e8 <Dbg_Print_Buff+0x88>
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    467a:	9445      	ld.w      	r2, (r4, 0x14)
+        SysTick_Now = SysTick_1ms;
+    467c:	9360      	ld.w      	r3, (r3, 0x0)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    467e:	5b49      	subu      	r2, r3, r2
+        SysTick_Now = SysTick_1ms;
+    4680:	b464      	st.w      	r3, (r4, 0x10)
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+    4682:	b446      	st.w      	r2, (r4, 0x18)
+        SysTick_Last = SysTick_Now;
+    4684:	b465      	st.w      	r3, (r4, 0x14)
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+    4686:	3180      	movi      	r1, 128
+    4688:	301c      	movi      	r0, 28
+    468a:	b840      	st.w      	r2, (r14, 0x0)
+    468c:	4122      	lsli      	r1, r1, 2
+    468e:	1058      	lrw      	r2, 0x623b	// 46ec <Dbg_Print_Buff+0x8c>
+    4690:	6010      	addu      	r0, r4
+    4692:	e3ffe969 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    4696:	10b7      	lrw      	r5, 0x20000038	// 46f0 <Dbg_Print_Buff+0x90>
+    4698:	311c      	movi      	r1, 28
+    469a:	7481      	zexth      	r2, r0
+    469c:	6050      	addu      	r1, r4
+    469e:	9500      	ld.w      	r0, (r5, 0x0)
+    46a0:	e3fff89e 	bsr      	0x37dc	// 37dc <UARTTransmit>
+		
+        for (uint32_t i = 0; i < len; i++) {
+			str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%02X ", buff[i]);
+    46a4:	1074      	lrw      	r3, 0x624c	// 46f4 <Dbg_Print_Buff+0x94>
+		DBG_Printf(Dbg_Buffer,str_offset);
+    46a6:	6d9f      	mov      	r6, r7
+			str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%02X ", buff[i]);
+    46a8:	b862      	st.w      	r3, (r14, 0x8)
+    46aa:	241b      	addi      	r4, 28
+        for (uint32_t i = 0; i < len; i++) {
+    46ac:	5e7d      	subu      	r3, r6, r7
+    46ae:	9841      	ld.w      	r2, (r14, 0x4)
+    46b0:	648c      	cmphs      	r3, r2
+    46b2:	0c08      	bf      	0x46c2	// 46c2 <Dbg_Print_Buff+0x62>
+            DBG_Printf(Dbg_Buffer,str_offset);
+        }
+		
+		DBG_Printf("\r\n",2);
+    46b4:	9500      	ld.w      	r0, (r5, 0x0)
+    46b6:	3202      	movi      	r2, 2
+    46b8:	1030      	lrw      	r1, 0x6249	// 46f8 <Dbg_Print_Buff+0x98>
+    46ba:	e3fff891 	bsr      	0x37dc	// 37dc <UARTTransmit>
+    }
+
+#endif	
+}
+    46be:	1403      	addi      	r14, r14, 12
+    46c0:	1494      	pop      	r4-r7, r15
+			str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%02X ", buff[i]);
+    46c2:	3180      	movi      	r1, 128
+    46c4:	8660      	ld.b      	r3, (r6, 0x0)
+    46c6:	9842      	ld.w      	r2, (r14, 0x8)
+    46c8:	4122      	lsli      	r1, r1, 2
+    46ca:	6c13      	mov      	r0, r4
+    46cc:	e3ffe94c 	bsr      	0x1964	// 1964 <__cskyvprintfsnprintf>
+            DBG_Printf(Dbg_Buffer,str_offset);
+    46d0:	7481      	zexth      	r2, r0
+    46d2:	6c53      	mov      	r1, r4
+    46d4:	9500      	ld.w      	r0, (r5, 0x0)
+    46d6:	e3fff883 	bsr      	0x37dc	// 37dc <UARTTransmit>
+    46da:	2600      	addi      	r6, 1
+    46dc:	07e8      	br      	0x46ac	// 46ac <Dbg_Print_Buff+0x4c>
+    46de:	0000      	bkpt
+    46e0:	20000068 	.long	0x20000068
+    46e4:	200000bc 	.long	0x200000bc
+    46e8:	200000b8 	.long	0x200000b8
+    46ec:	0000623b 	.long	0x0000623b
+    46f0:	20000038 	.long	0x20000038
+    46f4:	0000624c 	.long	0x0000624c
+    46f8:	00006249 	.long	0x00006249
+
+Disassembly of section .text.UART2_TASK:
+
+000046fc <UART2_TASK>:
+void UART2_TASK(void){
+    46fc:	14d1      	push      	r4, r15
+	if(g_uart.Receiving == 0x01){
+    46fe:	1189      	lrw      	r4, 0x20000414	// 47a0 <UART2_TASK+0xa4>
+    4700:	8464      	ld.b      	r3, (r4, 0x4)
+    4702:	3b41      	cmpnei      	r3, 1
+    4704:	084d      	bt      	0x479e	// 479e <UART2_TASK+0xa2>
+		if(SysTick_1ms - g_uart.RecvIdleTiming > g_uart.RecvTimeout){
+    4706:	844c      	ld.b      	r2, (r4, 0xc)
+    4708:	846b      	ld.b      	r3, (r4, 0xb)
+    470a:	4248      	lsli      	r2, r2, 8
+    470c:	6c8c      	or      	r2, r3
+    470e:	846d      	ld.b      	r3, (r4, 0xd)
+    4710:	4370      	lsli      	r3, r3, 16
+    4712:	6c8c      	or      	r2, r3
+    4714:	846e      	ld.b      	r3, (r4, 0xe)
+    4716:	1104      	lrw      	r0, 0x200000b8	// 47a4 <UART2_TASK+0xa8>
+    4718:	4378      	lsli      	r3, r3, 24
+    471a:	6cc8      	or      	r3, r2
+    471c:	9020      	ld.w      	r1, (r0, 0x0)
+    471e:	8448      	ld.b      	r2, (r4, 0x8)
+    4720:	604e      	subu      	r1, r3
+    4722:	4248      	lsli      	r2, r2, 8
+    4724:	8467      	ld.b      	r3, (r4, 0x7)
+    4726:	6c8c      	or      	r2, r3
+    4728:	8469      	ld.b      	r3, (r4, 0x9)
+    472a:	4370      	lsli      	r3, r3, 16
+    472c:	6c8c      	or      	r2, r3
+    472e:	846a      	ld.b      	r3, (r4, 0xa)
+    4730:	4378      	lsli      	r3, r3, 24
+    4732:	6cc8      	or      	r3, r2
+    4734:	644c      	cmphs      	r3, r1
+    4736:	0834      	bt      	0x479e	// 479e <UART2_TASK+0xa2>
+			g_uart.RecvIdleTiming = SysTick_1ms;
+    4738:	9060      	ld.w      	r3, (r0, 0x0)
+    473a:	320b      	movi      	r2, 11
+    473c:	6090      	addu      	r2, r4
+    473e:	4b28      	lsri      	r1, r3, 8
+    4740:	a260      	st.b      	r3, (r2, 0x0)
+    4742:	a221      	st.b      	r1, (r2, 0x1)
+    4744:	4b30      	lsri      	r1, r3, 16
+    4746:	4b78      	lsri      	r3, r3, 24
+    4748:	a222      	st.b      	r1, (r2, 0x2)
+    474a:	a263      	st.b      	r3, (r2, 0x3)
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART recv Len %d", g_uart.RecvLen);
+    474c:	8446      	ld.b      	r2, (r4, 0x6)
+    474e:	8465      	ld.b      	r3, (r4, 0x5)
+    4750:	4248      	lsli      	r2, r2, 8
+    4752:	6c8c      	or      	r2, r3
+    4754:	1035      	lrw      	r1, 0x6252	// 47a8 <UART2_TASK+0xac>
+    4756:	3000      	movi      	r0, 0
+    4758:	e3ffff38 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART buff",g_uart.RecvBuffer,g_uart.RecvLen);
+    475c:	8466      	ld.b      	r3, (r4, 0x6)
+    475e:	8445      	ld.b      	r2, (r4, 0x5)
+    4760:	4368      	lsli      	r3, r3, 8
+    4762:	6cc8      	or      	r3, r2
+    4764:	1032      	lrw      	r1, 0x6263	// 47ac <UART2_TASK+0xb0>
+    4766:	1053      	lrw      	r2, 0x200003b4	// 47b0 <UART2_TASK+0xb4>
+    4768:	3000      	movi      	r0, 0
+    476a:	e3ffff7b 	bsr      	0x4660	// 4660 <Dbg_Print_Buff>
+			if(g_uart.processing_cf != NULL){
+    476e:	8450      	ld.b      	r2, (r4, 0x10)
+    4770:	846f      	ld.b      	r3, (r4, 0xf)
+    4772:	4248      	lsli      	r2, r2, 8
+    4774:	6c8c      	or      	r2, r3
+    4776:	8471      	ld.b      	r3, (r4, 0x11)
+    4778:	4370      	lsli      	r3, r3, 16
+    477a:	6c8c      	or      	r2, r3
+    477c:	8472      	ld.b      	r3, (r4, 0x12)
+    477e:	4378      	lsli      	r3, r3, 24
+    4780:	6cc8      	or      	r3, r2
+    4782:	3b40      	cmpnei      	r3, 0
+    4784:	0c07      	bf      	0x4792	// 4792 <UART2_TASK+0x96>
+                rev = g_uart.processing_cf(g_uart.RecvBuffer,g_uart.RecvLen);
+    4786:	8426      	ld.b      	r1, (r4, 0x6)
+    4788:	8445      	ld.b      	r2, (r4, 0x5)
+    478a:	4128      	lsli      	r1, r1, 8
+    478c:	6c48      	or      	r1, r2
+    478e:	1009      	lrw      	r0, 0x200003b4	// 47b0 <UART2_TASK+0xb4>
+    4790:	7bcd      	jsr      	r3
+            g_uart.RecvLen = 0;
+    4792:	1069      	lrw      	r3, 0x20000419	// 47b4 <UART2_TASK+0xb8>
+    4794:	3200      	movi      	r2, 0
+    4796:	a340      	st.b      	r2, (r3, 0x0)
+    4798:	a341      	st.b      	r2, (r3, 0x1)
+            g_uart.Receiving = 0;
+    479a:	3300      	movi      	r3, 0
+    479c:	a464      	st.b      	r3, (r4, 0x4)
+}
+    479e:	1491      	pop      	r4, r15
+    47a0:	20000414 	.long	0x20000414
+    47a4:	200000b8 	.long	0x200000b8
+    47a8:	00006252 	.long	0x00006252
+    47ac:	00006263 	.long	0x00006263
+    47b0:	200003b4 	.long	0x200003b4
+    47b4:	20000419 	.long	0x20000419
+
+Disassembly of section .text.RC522_Delay:
+
+000047b8 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    47b8:	3300      	movi      	r3, 0
+    47ba:	640e      	cmpne      	r3, r0
+    47bc:	0802      	bt      	0x47c0	// 47c0 <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    47be:	783c      	jmp      	r15
+        nop;
+    47c0:	6c03      	mov      	r0, r0
+        nop;
+    47c2:	6c03      	mov      	r0, r0
+        nop;
+    47c4:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    47c6:	2300      	addi      	r3, 1
+    47c8:	07f9      	br      	0x47ba	// 47ba <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+000047cc <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    47cc:	14d4      	push      	r4-r7, r15
+    47ce:	6d83      	mov      	r6, r0
+    47d0:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    47d2:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    47d4:	10f2      	lrw      	r7, 0x2000004c	// 481c <RC522_ReadWriteOneByte+0x50>
+    47d6:	3109      	movi      	r1, 9
+    47d8:	9700      	ld.w      	r0, (r7, 0x0)
+    47da:	e3fff5be 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    47de:	74da      	sextb      	r3, r6
+    47e0:	3bdf      	btsti      	r3, 31
+    47e2:	310a      	movi      	r1, 10
+    47e4:	9700      	ld.w      	r0, (r7, 0x0)
+    47e6:	0c18      	bf      	0x4816	// 4816 <RC522_ReadWriteOneByte+0x4a>
+    47e8:	e3fff5b3 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    47ec:	3109      	movi      	r1, 9
+    47ee:	9700      	ld.w      	r0, (r7, 0x0)
+    47f0:	e3fff5af 	bsr      	0x334e	// 334e <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    47f4:	310b      	movi      	r1, 11
+    47f6:	9700      	ld.w      	r0, (r7, 0x0)
+    47f8:	e3fff5be 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+        tx_data<<=1;
+    47fc:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    47fe:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    4800:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    4802:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    4804:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    4806:	0c02      	bf      	0x480a	// 480a <RC522_ReadWriteOneByte+0x3e>
+    4808:	3ca0      	bseti      	r4, 0
+    480a:	2d00      	subi      	r5, 1
+    480c:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    480e:	3d40      	cmpnei      	r5, 0
+    4810:	0be3      	bt      	0x47d6	// 47d6 <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    4812:	6c13      	mov      	r0, r4
+    4814:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    4816:	e3fff5a0 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    481a:	07e9      	br      	0x47ec	// 47ec <RC522_ReadWriteOneByte+0x20>
+    481c:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+00004820 <RC522_ReadRawRC>:
+{
+    4820:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    4822:	10ad      	lrw      	r5, 0x2000004c	// 4854 <RC522_ReadRawRC+0x34>
+    4824:	310d      	movi      	r1, 13
+{
+    4826:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    4828:	9500      	ld.w      	r0, (r5, 0x0)
+    482a:	e3fff596 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    482e:	4401      	lsli      	r0, r4, 1
+    4830:	347e      	movi      	r4, 126
+    4832:	6810      	and      	r0, r4
+    4834:	3400      	movi      	r4, 0
+    4836:	2c7f      	subi      	r4, 128
+    4838:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    483a:	7400      	zextb      	r0, r0
+    483c:	e3ffffc8 	bsr      	0x47cc	// 47cc <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    4840:	3000      	movi      	r0, 0
+    4842:	e3ffffc5 	bsr      	0x47cc	// 47cc <RC522_ReadWriteOneByte>
+    4846:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    4848:	310d      	movi      	r1, 13
+    484a:	9500      	ld.w      	r0, (r5, 0x0)
+    484c:	e3fff581 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4850:	6c13      	mov      	r0, r4
+    4852:	1492      	pop      	r4-r5, r15
+    4854:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+00004858 <RC522_WriteRawRC>:
+{
+    4858:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    485a:	10ab      	lrw      	r5, 0x2000004c	// 4884 <RC522_WriteRawRC+0x2c>
+{
+    485c:	6d87      	mov      	r6, r1
+    485e:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    4860:	310d      	movi      	r1, 13
+    4862:	9500      	ld.w      	r0, (r5, 0x0)
+    4864:	e3fff579 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    4868:	4481      	lsli      	r4, r4, 1
+    486a:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    486c:	6810      	and      	r0, r4
+    486e:	e3ffffaf 	bsr      	0x47cc	// 47cc <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    4872:	6c1b      	mov      	r0, r6
+    4874:	e3ffffac 	bsr      	0x47cc	// 47cc <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    4878:	9500      	ld.w      	r0, (r5, 0x0)
+    487a:	310d      	movi      	r1, 13
+    487c:	e3fff569 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4880:	1493      	pop      	r4-r6, r15
+    4882:	0000      	bkpt
+    4884:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_PcdReset:
+
+00004888 <RC522_PcdReset>:
+{
+    4888:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    488a:	310f      	movi      	r1, 15
+    488c:	3001      	movi      	r0, 1
+    488e:	e3ffffe5 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    4892:	310f      	movi      	r1, 15
+    4894:	3001      	movi      	r0, 1
+    4896:	e3ffffe1 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    489a:	300a      	movi      	r0, 10
+    489c:	e3ffff8e 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    48a0:	313d      	movi      	r1, 61
+    48a2:	3011      	movi      	r0, 17
+    48a4:	e3ffffda 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    48a8:	311e      	movi      	r1, 30
+    48aa:	302d      	movi      	r0, 45
+    48ac:	e3ffffd6 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    48b0:	3100      	movi      	r1, 0
+    48b2:	302c      	movi      	r0, 44
+    48b4:	e3ffffd2 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    48b8:	318d      	movi      	r1, 141
+    48ba:	302a      	movi      	r0, 42
+    48bc:	e3ffffce 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    48c0:	313e      	movi      	r1, 62
+    48c2:	302b      	movi      	r0, 43
+    48c4:	e3ffffca 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    48c8:	3140      	movi      	r1, 64
+    48ca:	3015      	movi      	r0, 21
+    48cc:	e3ffffc6 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+}
+    48d0:	3000      	movi      	r0, 0
+    48d2:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+000048d4 <RC522_SetBitMask>:
+{
+    48d4:	14d2      	push      	r4-r5, r15
+    48d6:	6d47      	mov      	r5, r1
+    48d8:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    48da:	e3ffffa3 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    48de:	6c43      	mov      	r1, r0
+    48e0:	6c54      	or      	r1, r5
+    48e2:	7444      	zextb      	r1, r1
+    48e4:	6c13      	mov      	r0, r4
+    48e6:	e3ffffb9 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+}
+    48ea:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+000048ec <RC522_PcdAntennaOn>:
+{
+    48ec:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    48ee:	3014      	movi      	r0, 20
+    48f0:	e3ffff98 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    if(!(i&0x03))
+    48f4:	3303      	movi      	r3, 3
+    48f6:	680c      	and      	r0, r3
+    48f8:	3840      	cmpnei      	r0, 0
+    48fa:	0805      	bt      	0x4904	// 4904 <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    48fc:	3103      	movi      	r1, 3
+    48fe:	3014      	movi      	r0, 20
+    4900:	e3ffffea 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+}
+    4904:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+00004906 <RC522_ClearBitMask>:
+{
+    4906:	14d2      	push      	r4-r5, r15
+    4908:	6d47      	mov      	r5, r1
+    490a:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    490c:	e3ffff8a 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    4910:	6815      	andn      	r0, r5
+    4912:	7440      	zextb      	r1, r0
+    4914:	6c13      	mov      	r0, r4
+    4916:	e3ffffa1 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+}
+    491a:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+0000491c <RC522_PcdAntennaOff>:
+{
+    491c:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    491e:	3103      	movi      	r1, 3
+    4920:	3014      	movi      	r0, 20
+    4922:	e3fffff2 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+}
+    4926:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Reset:
+
+00004928 <RC522_Reset>:
+void RC522_Reset(void){
+    4928:	14d1      	push      	r4, r15
+	RC522_RST_HIGH;			//NRSTPD引脚高电平
+    492a:	1090      	lrw      	r4, 0x2000004c	// 4968 <RC522_Reset+0x40>
+    492c:	310c      	movi      	r1, 12
+    492e:	9400      	ld.w      	r0, (r4, 0x0)
+    4930:	e3fff50f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	RC522_Delay(1000);		//大概时间为850us
+    4934:	30fa      	movi      	r0, 250
+    4936:	4002      	lsli      	r0, r0, 2
+    4938:	e3ffff40 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+	RC522_RST_LOW;			//Ci522掉电
+    493c:	310c      	movi      	r1, 12
+    493e:	9400      	ld.w      	r0, (r4, 0x0)
+    4940:	e3fff50b 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	RC522_Delay(1000);		//大概时间为850us
+    4944:	30fa      	movi      	r0, 250
+    4946:	4002      	lsli      	r0, r0, 2
+    4948:	e3ffff38 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+	RC522_RST_HIGH;			//NRSTPD引脚高电平
+    494c:	310c      	movi      	r1, 12
+    494e:	9400      	ld.w      	r0, (r4, 0x0)
+    4950:	e3fff4ff 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	RC522_PcdReset();                //复位RC522
+    4954:	e3ffff9a 	bsr      	0x4888	// 4888 <RC522_PcdReset>
+	RC522_PcdAntennaOff();    //关闭天线
+    4958:	e3ffffe2 	bsr      	0x491c	// 491c <RC522_PcdAntennaOff>
+	RC522_Delay(2);         //延时2毫秒
+    495c:	3002      	movi      	r0, 2
+    495e:	e3ffff2d 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+	RC522_PcdAntennaOn();     //开启天线  
+    4962:	e3ffffc5 	bsr      	0x48ec	// 48ec <RC522_PcdAntennaOn>
+}
+    4966:	1491      	pop      	r4, r15
+    4968:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+0000496c <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    496c:	14d0      	push      	r15
+		RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    496e:	3108      	movi      	r1, 8
+    4970:	3008      	movi      	r0, 8
+    4972:	e3ffffca 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+		RC522_SetBitMask(ComIEnReg,BIT7);
+    4976:	3180      	movi      	r1, 128
+    4978:	3002      	movi      	r0, 2
+    497a:	e3ffffad 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+		RC522_WriteRawRC(ModeReg,0x3D);
+    497e:	313d      	movi      	r1, 61
+    4980:	3011      	movi      	r0, 17
+    4982:	e3ffff6b 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxModeReg,0x00);     //设定数据发送传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    4986:	3100      	movi      	r1, 0
+    4988:	3012      	movi      	r0, 18
+    498a:	e3ffff67 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxModeReg,0x00);     //设定数据接收传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    498e:	3100      	movi      	r1, 0
+    4990:	3013      	movi      	r0, 19
+    4992:	e3ffff63 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModWidthReg,MODWIDTH);    //调制宽度为reset值
+    4996:	3126      	movi      	r1, 38
+    4998:	3024      	movi      	r0, 36
+    499a:	e3ffff5f 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModeReg,0x3D);      //3D--CRC预设值为6363
+    499e:	313d      	movi      	r1, 61
+    49a0:	3011      	movi      	r0, 17
+    49a2:	e3ffff5b 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxThresholdReg,(MINLEVEL_A<<4) | COLLLEVEL_A);  //选择位译码器的阈值
+    49a6:	3164      	movi      	r1, 100
+    49a8:	3018      	movi      	r0, 24
+    49aa:	e3ffff57 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RFCfgReg,0x7F);   // 接收增益
+    49ae:	317f      	movi      	r1, 127
+    49b0:	3026      	movi      	r0, 38
+    49b2:	e3ffff53 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxAutoReg,0x40);  //100%ASK传送
+    49b6:	3140      	movi      	r1, 64
+    49b8:	3015      	movi      	r0, 21
+    49ba:	e3ffff4f 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ControlReg,0x10);  //接收的最后一个字节所有比特有效
+    49be:	3110      	movi      	r1, 16
+    49c0:	300c      	movi      	r0, 12
+    49c2:	e3ffff4b 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegL,0x64);    //16bit定时器重载值（低位）
+    49c6:	3164      	movi      	r1, 100
+    49c8:	302d      	movi      	r0, 45
+    49ca:	e3ffff47 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegH,0);     //16bit定时器重载值（高位）
+    49ce:	3100      	movi      	r1, 0
+    49d0:	302c      	movi      	r0, 44
+    49d2:	e3ffff43 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TModeReg,0x8D);     //预分频器开启自动定时器，向下计数，预分频与TPrescalerReg一起决定12bit
+    49d6:	318d      	movi      	r1, 141
+    49d8:	302a      	movi      	r0, 42
+    49da:	e3ffff3f 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TPrescalerReg,0x3e);  //12bit  1101 0011 1110    定时器频率2KHz*//*
+    49de:	313e      	movi      	r1, 62
+    49e0:	302b      	movi      	r0, 43
+    49e2:	e3ffff3b 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+}
+    49e6:	3000      	movi      	r0, 0
+    49e8:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+000049ec <RC522_Init>:
+{
+    49ec:	14d1      	push      	r4, r15
+	nop;
+    49ee:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    49f0:	118d      	lrw      	r4, 0x2000004c	// 4aa4 <RC522_Init+0xb8>
+    49f2:	3200      	movi      	r2, 0
+    49f4:	9400      	ld.w      	r0, (r4, 0x0)
+    49f6:	3109      	movi      	r1, 9
+    49f8:	e3fff42a 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    49fc:	3200      	movi      	r2, 0
+    49fe:	9400      	ld.w      	r0, (r4, 0x0)
+    4a00:	310a      	movi      	r1, 10
+    4a02:	e3fff425 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    4a06:	9400      	ld.w      	r0, (r4, 0x0)
+    4a08:	310b      	movi      	r1, 11
+    4a0a:	e3fff491 	bsr      	0x332c	// 332c <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    4a0e:	9400      	ld.w      	r0, (r4, 0x0)
+    4a10:	3201      	movi      	r2, 1
+    4a12:	310b      	movi      	r1, 11
+    4a14:	e3fff41c 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,13,Output);			//CS
+    4a18:	9400      	ld.w      	r0, (r4, 0x0)
+    4a1a:	3200      	movi      	r2, 0
+    4a1c:	310d      	movi      	r1, 13
+    4a1e:	e3fff417 	bsr      	0x324c	// 324c <GPIO_Init>
+    GPIO_Init(GPIOA0,12,Output);			//RST
+    4a22:	9400      	ld.w      	r0, (r4, 0x0)
+    4a24:	3200      	movi      	r2, 0
+    4a26:	310c      	movi      	r1, 12
+    4a28:	e3fff412 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,8,Intput);			//IRQ
+    4a2c:	3201      	movi      	r2, 1
+    4a2e:	9400      	ld.w      	r0, (r4, 0x0)
+    4a30:	3108      	movi      	r1, 8
+    4a32:	e3fff40d 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_High(GPIOA0,13);
+    4a36:	9400      	ld.w      	r0, (r4, 0x0)
+    4a38:	310d      	movi      	r1, 13
+    4a3a:	e3fff48a 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    GPIO_Write_High(GPIOA0,12);
+    4a3e:	9400      	ld.w      	r0, (r4, 0x0)
+    4a40:	310c      	movi      	r1, 12
+    4a42:	e3fff486 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	RC522_RST_HIGH;					//NRSTPD引脚高电平
+    4a46:	310c      	movi      	r1, 12
+    4a48:	9400      	ld.w      	r0, (r4, 0x0)
+    4a4a:	e3fff482 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	RC522_Delay(1000);				//大概时间为850us
+    4a4e:	30fa      	movi      	r0, 250
+    4a50:	4002      	lsli      	r0, r0, 2
+    4a52:	e3fffeb3 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+	RC522_RST_LOW;					//Ci522掉电
+    4a56:	310c      	movi      	r1, 12
+    4a58:	9400      	ld.w      	r0, (r4, 0x0)
+    4a5a:	e3fff47e 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	RC522_Delay(1000);				//大概时间为850us
+    4a5e:	30fa      	movi      	r0, 250
+    4a60:	4002      	lsli      	r0, r0, 2
+    4a62:	e3fffeab 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+	RC522_RST_HIGH;					//NRSTPD引脚高电平	
+    4a66:	310c      	movi      	r1, 12
+    4a68:	9400      	ld.w      	r0, (r4, 0x0)
+    4a6a:	e3fff472 	bsr      	0x334e	// 334e <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    4a6e:	e3ffff0d 	bsr      	0x4888	// 4888 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    4a72:	e3ffff55 	bsr      	0x491c	// 491c <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    4a76:	3002      	movi      	r0, 2
+    4a78:	e3fffea0 	bsr      	0x47b8	// 47b8 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    4a7c:	e3ffff38 	bsr      	0x48ec	// 48ec <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    4a80:	108a      	lrw      	r4, 0x20000428	// 4aa8 <RC522_Init+0xbc>
+    4a82:	e3ffff75 	bsr      	0x496c	// 496c <M500PcdConfigISOType.part.1>
+    4a86:	3234      	movi      	r2, 52
+    4a88:	3100      	movi      	r1, 0
+    4a8a:	6c13      	mov      	r0, r4
+    4a8c:	e3ffe7c8 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    4a90:	3318      	movi      	r3, 24
+    4a92:	a468      	st.b      	r3, (r4, 0x8)
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    4a94:	3360      	movi      	r3, 96
+    4a96:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    4a98:	3300      	movi      	r3, 0
+    4a9a:	2b00      	subi      	r3, 1
+    4a9c:	b468      	st.w      	r3, (r4, 0x20)
+    4a9e:	ac72      	st.h      	r3, (r4, 0x24)
+}
+    4aa0:	1491      	pop      	r4, r15
+    4aa2:	0000      	bkpt
+    4aa4:	2000004c 	.long	0x2000004c
+    4aa8:	20000428 	.long	0x20000428
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+00004aac <RC522_PcdComMF522>:
+{
+    4aac:	14d4      	push      	r4-r7, r15
+    4aae:	1424      	subi      	r14, r14, 16
+    4ab0:	b862      	st.w      	r3, (r14, 0x8)
+    switch (Command) {
+    4ab2:	384c      	cmpnei      	r0, 12
+{
+    4ab4:	9869      	ld.w      	r3, (r14, 0x24)
+    4ab6:	6d03      	mov      	r4, r0
+    4ab8:	6dc7      	mov      	r7, r1
+    4aba:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    4abc:	0c48      	bf      	0x4b4c	// 4b4c <RC522_PcdComMF522+0xa0>
+    4abe:	384e      	cmpnei      	r0, 14
+    4ac0:	0c49      	bf      	0x4b52	// 4b52 <RC522_PcdComMF522+0xa6>
+    U8_T waitFor=0x00;
+    4ac2:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    4ac4:	3500      	movi      	r5, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    4ac6:	6c57      	mov      	r1, r5
+    4ac8:	39a7      	bseti      	r1, 7
+    4aca:	3002      	movi      	r0, 2
+    4acc:	b841      	st.w      	r2, (r14, 0x4)
+    4ace:	e3fffec5 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    4ad2:	3180      	movi      	r1, 128
+    4ad4:	3004      	movi      	r0, 4
+    4ad6:	e3ffff18 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    4ada:	3100      	movi      	r1, 0
+    4adc:	3001      	movi      	r0, 1
+    4ade:	e3fffebd 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    4ae2:	3180      	movi      	r1, 128
+    4ae4:	300a      	movi      	r0, 10
+    4ae6:	e3fffef7 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    4aea:	9841      	ld.w      	r2, (r14, 0x4)
+    4aec:	6cdf      	mov      	r3, r7
+    4aee:	7489      	zexth      	r2, r2
+    4af0:	3700      	movi      	r7, 0
+    4af2:	649c      	cmphs      	r7, r2
+    4af4:	0c32      	bf      	0x4b58	// 4b58 <RC522_PcdComMF522+0xac>
+	RC522_WriteRawRC(CommandReg,Command);
+    4af6:	6c53      	mov      	r1, r4
+    4af8:	3001      	movi      	r0, 1
+    4afa:	e3fffeaf 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    4afe:	3c4c      	cmpnei      	r4, 12
+    4b00:	0805      	bt      	0x4b0a	// 4b0a <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    4b02:	3180      	movi      	r1, 128
+    4b04:	300d      	movi      	r0, 13
+    4b06:	e3fffee7 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    4b0a:	37fa      	movi      	r7, 250
+    4b0c:	47e3      	lsli      	r7, r7, 3
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4b0e:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4b10:	3004      	movi      	r0, 4
+    4b12:	e3fffe87 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+		i--;
+    4b16:	5f63      	subi      	r3, r7, 1
+    4b18:	75cd      	zexth      	r7, r3
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4b1a:	3f40      	cmpnei      	r7, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    4b1c:	b801      	st.w      	r0, (r14, 0x4)
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    4b1e:	0c05      	bf      	0x4b28	// 4b28 <RC522_PcdComMF522+0x7c>
+    4b20:	6c83      	mov      	r2, r0
+    4b22:	6898      	and      	r2, r6
+    4b24:	3a40      	cmpnei      	r2, 0
+    4b26:	0ff5      	bf      	0x4b10	// 4b10 <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    4b28:	3180      	movi      	r1, 128
+    4b2a:	300d      	movi      	r0, 13
+    4b2c:	e3fffeed 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+	if(i!=0)
+    4b30:	3f40      	cmpnei      	r7, 0
+    4b32:	081f      	bt      	0x4b70	// 4b70 <RC522_PcdComMF522+0xc4>
+    char stats=MI_ERR;
+    4b34:	3502      	movi      	r5, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    4b36:	3180      	movi      	r1, 128
+    4b38:	300c      	movi      	r0, 12
+    4b3a:	e3fffecd 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    4b3e:	3100      	movi      	r1, 0
+    4b40:	3001      	movi      	r0, 1
+    4b42:	e3fffe8b 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+}
+    4b46:	6c17      	mov      	r0, r5
+    4b48:	1404      	addi      	r14, r14, 16
+    4b4a:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    4b4c:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    4b4e:	3577      	movi      	r5, 119
+        break;
+    4b50:	07bb      	br      	0x4ac6	// 4ac6 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    4b52:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    4b54:	3512      	movi      	r5, 18
+    4b56:	07b8      	br      	0x4ac6	// 4ac6 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    4b58:	8320      	ld.b      	r1, (r3, 0x0)
+    4b5a:	3009      	movi      	r0, 9
+    4b5c:	b843      	st.w      	r2, (r14, 0xc)
+    4b5e:	b861      	st.w      	r3, (r14, 0x4)
+    for(i=0;i<InLenByte;i++)
+    4b60:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    4b62:	e3fffe7b 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    4b66:	9861      	ld.w      	r3, (r14, 0x4)
+    for(i=0;i<InLenByte;i++)
+    4b68:	75dd      	zexth      	r7, r7
+    4b6a:	2300      	addi      	r3, 1
+    4b6c:	9843      	ld.w      	r2, (r14, 0xc)
+    4b6e:	07c2      	br      	0x4af2	// 4af2 <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    4b70:	3006      	movi      	r0, 6
+    4b72:	e3fffe57 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    4b76:	331b      	movi      	r3, 27
+    4b78:	680c      	and      	r0, r3
+    4b7a:	3840      	cmpnei      	r0, 0
+    4b7c:	0bdc      	bt      	0x4b34	// 4b34 <RC522_PcdComMF522+0x88>
+            if(n&irqEn&0x01)
+    4b7e:	3301      	movi      	r3, 1
+    4b80:	694c      	and      	r5, r3
+    4b82:	9861      	ld.w      	r3, (r14, 0x4)
+    4b84:	68d4      	and      	r3, r5
+    4b86:	3b40      	cmpnei      	r3, 0
+    4b88:	0817      	bt      	0x4bb6	// 4bb6 <RC522_PcdComMF522+0x10a>
+            if(Command==PCD_TRANSCEIVE)
+    4b8a:	3c4c      	cmpnei      	r4, 12
+    4b8c:	0c19      	bf      	0x4bbe	// 4bbe <RC522_PcdComMF522+0x112>
+            stats=MI_OK;
+    4b8e:	3500      	movi      	r5, 0
+    4b90:	07d3      	br      	0x4b36	// 4b36 <RC522_PcdComMF522+0x8a>
+                    *pOutLenBit=n*8;
+    4b92:	4463      	lsli      	r3, r4, 3
+    4b94:	9840      	ld.w      	r2, (r14, 0x0)
+    4b96:	a260      	st.b      	r3, (r2, 0x0)
+    4b98:	042b      	br      	0x4bee	// 4bee <RC522_PcdComMF522+0x142>
+                if(n==0)n=1;
+    4b9a:	3301      	movi      	r3, 1
+    4b9c:	0430      	br      	0x4bfc	// 4bfc <RC522_PcdComMF522+0x150>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    4b9e:	300a      	movi      	r0, 10
+    4ba0:	e3fffe40 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    4ba4:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4ba6:	300c      	movi      	r0, 12
+    4ba8:	e3fffe3c 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    4bac:	3307      	movi      	r3, 7
+    4bae:	680c      	and      	r0, r3
+                stats=MI_NOTAGERR;
+    4bb0:	3501      	movi      	r5, 1
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    4bb2:	3c40      	cmpnei      	r4, 0
+    4bb4:	0412      	br      	0x4bd8	// 4bd8 <RC522_PcdComMF522+0x12c>
+            if(Command==PCD_TRANSCEIVE)
+    4bb6:	3c4c      	cmpnei      	r4, 12
+    4bb8:	0ff3      	bf      	0x4b9e	// 4b9e <RC522_PcdComMF522+0xf2>
+                stats=MI_NOTAGERR;
+    4bba:	3501      	movi      	r5, 1
+    4bbc:	07bd      	br      	0x4b36	// 4b36 <RC522_PcdComMF522+0x8a>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    4bbe:	300a      	movi      	r0, 10
+    4bc0:	e3fffe30 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    4bc4:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4bc6:	300c      	movi      	r0, 12
+    4bc8:	e3fffe2c 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+    4bcc:	3307      	movi      	r3, 7
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    4bce:	3c42      	cmpnei      	r4, 2
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    4bd0:	680c      	and      	r0, r3
+            stats=MI_OK;
+    4bd2:	3500      	movi      	r5, 0
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    4bd4:	0c06      	bf      	0x4be0	// 4be0 <RC522_PcdComMF522+0x134>
+    4bd6:	3c45      	cmpnei      	r4, 5
+    4bd8:	0c04      	bf      	0x4be0	// 4be0 <RC522_PcdComMF522+0x134>
+					FIFOLevelReg_flag = 1;
+    4bda:	1070      	lrw      	r3, 0x200002d8	// 4c18 <RC522_PcdComMF522+0x16c>
+    4bdc:	3201      	movi      	r2, 1
+    4bde:	a340      	st.b      	r2, (r3, 0x0)
+                if(lastBits)
+    4be0:	3840      	cmpnei      	r0, 0
+    4be2:	0fd8      	bf      	0x4b92	// 4b92 <RC522_PcdComMF522+0xe6>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    4be4:	5c63      	subi      	r3, r4, 1
+    4be6:	4363      	lsli      	r3, r3, 3
+    4be8:	600c      	addu      	r0, r3
+    4bea:	9860      	ld.w      	r3, (r14, 0x0)
+    4bec:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    4bee:	3c40      	cmpnei      	r4, 0
+    4bf0:	0fd5      	bf      	0x4b9a	// 4b9a <RC522_PcdComMF522+0xee>
+    4bf2:	3c12      	cmphsi      	r4, 19
+    4bf4:	6cd3      	mov      	r3, r4
+    4bf6:	0c02      	bf      	0x4bfa	// 4bfa <RC522_PcdComMF522+0x14e>
+    4bf8:	3312      	movi      	r3, 18
+    4bfa:	74cc      	zextb      	r3, r3
+    4bfc:	98e2      	ld.w      	r7, (r14, 0x8)
+                for(i=0; i<n; i++)
+    4bfe:	3600      	movi      	r6, 0
+    4c00:	750d      	zexth      	r4, r3
+    4c02:	6518      	cmphs      	r6, r4
+    4c04:	0b99      	bt      	0x4b36	// 4b36 <RC522_PcdComMF522+0x8a>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4c06:	3009      	movi      	r0, 9
+    4c08:	e3fffe0c 	bsr      	0x4820	// 4820 <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    4c0c:	2600      	addi      	r6, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    4c0e:	a700      	st.b      	r0, (r7, 0x0)
+                for(i=0; i<n; i++)
+    4c10:	7599      	zexth      	r6, r6
+    4c12:	2700      	addi      	r7, 1
+    4c14:	07f7      	br      	0x4c02	// 4c02 <RC522_PcdComMF522+0x156>
+    4c16:	0000      	bkpt
+    4c18:	200002d8 	.long	0x200002d8
+
+Disassembly of section .text.RC522_PcdRequest:
+
+00004c1c <RC522_PcdRequest>:
+{
+    4c1c:	14d3      	push      	r4-r6, r15
+    4c1e:	1427      	subi      	r14, r14, 28
+    4c20:	6d03      	mov      	r4, r0
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4c22:	3212      	movi      	r2, 18
+{
+    4c24:	6d47      	mov      	r5, r1
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    4c26:	1802      	addi      	r0, r14, 8
+    4c28:	3100      	movi      	r1, 0
+    4c2a:	e3ffe6f9 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    4c2e:	3108      	movi      	r1, 8
+    4c30:	3008      	movi      	r0, 8
+    4c32:	e3fffe6a 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    4c36:	3107      	movi      	r1, 7
+    4c38:	300d      	movi      	r0, 13
+    4c3a:	e3fffe0f 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4c3e:	3607      	movi      	r6, 7
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    4c40:	3103      	movi      	r1, 3
+    4c42:	3014      	movi      	r0, 20
+    4c44:	e3fffe48 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4c48:	61b8      	addu      	r6, r14
+    4c4a:	1b02      	addi      	r3, r14, 8
+    4c4c:	b8c0      	st.w      	r6, (r14, 0x0)
+    4c4e:	3201      	movi      	r2, 1
+    4c50:	6c4f      	mov      	r1, r3
+    4c52:	300c      	movi      	r0, 12
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    4c54:	dc8e0008 	st.b      	r4, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    4c58:	e3ffff2a 	bsr      	0x4aac	// 4aac <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    4c5c:	3840      	cmpnei      	r0, 0
+    4c5e:	081b      	bt      	0x4c94	// 4c94 <RC522_PcdRequest+0x78>
+    4c60:	8660      	ld.b      	r3, (r6, 0x0)
+    4c62:	3b50      	cmpnei      	r3, 16
+    4c64:	0818      	bt      	0x4c94	// 4c94 <RC522_PcdRequest+0x78>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    4c66:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4c6a:	a560      	st.b      	r3, (r5, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    4c6c:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4c70:	a561      	st.b      	r3, (r5, 0x1)
+		if ((ucComMF522Buf[0] == req_code)&&(CardInfo.RC522_Reset_Falg == 0)) {
+    4c72:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    4c76:	650e      	cmpne      	r3, r4
+    4c78:	3220      	movi      	r2, 32
+    4c7a:	1069      	lrw      	r3, 0x20000428	// 4c9c <RC522_PcdRequest+0x80>
+    4c7c:	608c      	addu      	r2, r3
+    4c7e:	080d      	bt      	0x4c98	// 4c98 <RC522_PcdRequest+0x7c>
+    4c80:	8228      	ld.b      	r1, (r2, 0x8)
+    4c82:	3940      	cmpnei      	r1, 0
+    4c84:	0806      	bt      	0x4c90	// 4c90 <RC522_PcdRequest+0x74>
+			CardInfo.RC522_Reset_Falg = 1;
+    4c86:	3101      	movi      	r1, 1
+			CardInfo.RC522_Reset_Falg = 0;
+    4c88:	a228      	st.b      	r1, (r2, 0x8)
+			CardInfo.Reset_Tick = SysTick_1ms;
+    4c8a:	1046      	lrw      	r2, 0x200000b8	// 4ca0 <RC522_PcdRequest+0x84>
+    4c8c:	9240      	ld.w      	r2, (r2, 0x0)
+    4c8e:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    4c90:	1407      	addi      	r14, r14, 28
+    4c92:	1493      	pop      	r4-r6, r15
+        stats = MI_ERR;
+    4c94:	3002      	movi      	r0, 2
+    4c96:	07ee      	br      	0x4c72	// 4c72 <RC522_PcdRequest+0x56>
+			CardInfo.RC522_Reset_Falg = 0;
+    4c98:	3100      	movi      	r1, 0
+    4c9a:	07f7      	br      	0x4c88	// 4c88 <RC522_PcdRequest+0x6c>
+    4c9c:	20000428 	.long	0x20000428
+    4ca0:	200000b8 	.long	0x200000b8
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00004ca4 <RC522_PcdAnticoll>:
+{
+    4ca4:	14d2      	push      	r4-r5, r15
+    4ca6:	1427      	subi      	r14, r14, 28
+    4ca8:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    4caa:	3108      	movi      	r1, 8
+    4cac:	3008      	movi      	r0, 8
+    4cae:	e3fffe2c 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    4cb2:	3100      	movi      	r1, 0
+    4cb4:	300d      	movi      	r0, 13
+    4cb6:	e3fffdd1 	bsr      	0x4858	// 4858 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    4cba:	3180      	movi      	r1, 128
+    4cbc:	300e      	movi      	r0, 14
+    4cbe:	e3fffe24 	bsr      	0x4906	// 4906 <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    4cc2:	3300      	movi      	r3, 0
+    4cc4:	2b6c      	subi      	r3, 109
+    4cc6:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    4cca:	3320      	movi      	r3, 32
+    4ccc:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4cd0:	3307      	movi      	r3, 7
+    4cd2:	60f8      	addu      	r3, r14
+    4cd4:	b860      	st.w      	r3, (r14, 0x0)
+    4cd6:	1b02      	addi      	r3, r14, 8
+    4cd8:	3202      	movi      	r2, 2
+    4cda:	6c4f      	mov      	r1, r3
+    4cdc:	300c      	movi      	r0, 12
+    4cde:	e3fffee7 	bsr      	0x4aac	// 4aac <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    4ce2:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    4ce4:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    4ce6:	0812      	bt      	0x4d0a	// 4d0a <RC522_PcdAnticoll+0x66>
+    4ce8:	3300      	movi      	r3, 0
+    4cea:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    4cec:	1902      	addi      	r1, r14, 8
+    4cee:	604c      	addu      	r1, r3
+    4cf0:	8120      	ld.b      	r1, (r1, 0x0)
+    4cf2:	5d0c      	addu      	r0, r5, r3
+    4cf4:	2300      	addi      	r3, 1
+    4cf6:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    4cf8:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    4cfa:	6c49      	xor      	r1, r2
+    4cfc:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    4cfe:	0bf7      	bt      	0x4cec	// 4cec <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    4d00:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    4d04:	644e      	cmpne      	r3, r1
+    4d06:	0c02      	bf      	0x4d0a	// 4d0a <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    4d08:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    4d0a:	3180      	movi      	r1, 128
+    4d0c:	300e      	movi      	r0, 14
+    4d0e:	e3fffde3 	bsr      	0x48d4	// 48d4 <RC522_SetBitMask>
+}
+    4d12:	6c13      	mov      	r0, r4
+    4d14:	1407      	addi      	r14, r14, 28
+    4d16:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+00004d18 <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    4d18:	14d3      	push      	r4-r6, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    4d1a:	11a5      	lrw      	r5, 0x200000b8	// 4dac <Card_Read_TasK+0x94>
+    4d1c:	1145      	lrw      	r2, 0x200002d8	// 4db0 <Card_Read_TasK+0x98>
+    4d1e:	1186      	lrw      	r4, 0x20000428	// 4db4 <Card_Read_TasK+0x9c>
+    4d20:	9221      	ld.w      	r1, (r2, 0x4)
+    4d22:	9560      	ld.w      	r3, (r5, 0x0)
+    4d24:	60c6      	subu      	r3, r1
+    4d26:	3163      	movi      	r1, 99
+    4d28:	64c4      	cmphs      	r1, r3
+    4d2a:	081a      	bt      	0x4d5e	// 4d5e <Card_Read_TasK+0x46>
+		//Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,Card Read",SysTick_1ms);
+
+		
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4d2c:	3119      	movi      	r1, 25
+        scan_tick = SysTick_1ms;
+    4d2e:	9560      	ld.w      	r3, (r5, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4d30:	6050      	addu      	r1, r4
+    4d32:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    4d34:	b261      	st.w      	r3, (r2, 0x4)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    4d36:	e3ffff73 	bsr      	0x4c1c	// 4c1c <RC522_PcdRequest>
+    4d3a:	3620      	movi      	r6, 32
+    4d3c:	3840      	cmpnei      	r0, 0
+    4d3e:	6190      	addu      	r6, r4
+    4d40:	0829      	bt      	0x4d92	// 4d92 <Card_Read_TasK+0x7a>
+			    //消抖
+            //Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_SUCC",SysTick_1ms);
+			
+			
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4d42:	301b      	movi      	r0, 27
+            CardInfo.FailNum = 0x00;
+    4d44:	3300      	movi      	r3, 0
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4d46:	6010      	addu      	r0, r4
+            CardInfo.FailNum = 0x00;
+    4d48:	a666      	st.b      	r3, (r6, 0x6)
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    4d4a:	e3ffffad 	bsr      	0x4ca4	// 4ca4 <RC522_PcdAnticoll>
+    4d4e:	3840      	cmpnei      	r0, 0
+    4d50:	081c      	bt      	0x4d88	// 4d88 <Card_Read_TasK+0x70>
+				
+			
+				CardInfo.SuccNum++;
+				if(CardInfo.SuccNum >= 1)
+    4d52:	8647      	ld.b      	r2, (r6, 0x7)
+    4d54:	33ff      	movi      	r3, 255
+    4d56:	64ca      	cmpne      	r2, r3
+				{
+					CardInfo.SuccNum = 0 ;
+    4d58:	3300      	movi      	r3, 0
+    4d5a:	a667      	st.b      	r3, (r6, 0x7)
+				if(CardInfo.SuccNum >= 1)
+    4d5c:	080e      	bt      	0x4d78	// 4d78 <Card_Read_TasK+0x60>
+            }
+        }
+		//}
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    4d5e:	8467      	ld.b      	r3, (r4, 0x7)
+    4d60:	8446      	ld.b      	r2, (r4, 0x6)
+    4d62:	64ca      	cmpne      	r2, r3
+    4d64:	0c09      	bf      	0x4d76	// 4d76 <Card_Read_TasK+0x5e>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4d66:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    4d68:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    4d6a:	0c06      	bf      	0x4d76	// 4d76 <Card_Read_TasK+0x5e>
+            
+			//Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+			
+			
+        }else {
+            Card_Tick = SysTick_1ms;
+    4d6c:	9540      	ld.w      	r2, (r5, 0x0)
+    4d6e:	1073      	lrw      	r3, 0x200000a4	// 4db8 <Card_Read_TasK+0xa0>
+    4d70:	b340      	st.w      	r2, (r3, 0x0)
+			CardInfo.reset_tick = SysTick_1ms;
+    4d72:	9560      	ld.w      	r3, (r5, 0x0)
+    4d74:	b46c      	st.w      	r3, (r4, 0x30)
+        }
+    }
+
+
+}
+    4d76:	1493      	pop      	r4-r6, r15
+					CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    4d78:	3301      	movi      	r3, 1
+    4d7a:	a467      	st.b      	r3, (r4, 0x7)
+					Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d  Card Block_SUCC",SysTick_1ms);
+    4d7c:	9540      	ld.w      	r2, (r5, 0x0)
+    4d7e:	1030      	lrw      	r1, 0x626d	// 4dbc <Card_Read_TasK+0xa4>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_FAILD",SysTick_1ms);
+    4d80:	3000      	movi      	r0, 0
+    4d82:	e3fffc23 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    4d86:	07ec      	br      	0x4d5e	// 4d5e <Card_Read_TasK+0x46>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    4d88:	102e      	lrw      	r1, 0x628d	// 4dc0 <Card_Read_TasK+0xa8>
+    4d8a:	3000      	movi      	r0, 0
+    4d8c:	e3fffc1e 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    4d90:	07e7      	br      	0x4d5e	// 4d5e <Card_Read_TasK+0x46>
+            if(CardInfo.FailNum >= 5)
+    4d92:	8666      	ld.b      	r3, (r6, 0x6)
+    4d94:	3b04      	cmphsi      	r3, 5
+    4d96:	0c08      	bf      	0x4da6	// 4da6 <Card_Read_TasK+0x8e>
+                CardInfo.FailNum = 0;
+    4d98:	3300      	movi      	r3, 0
+    4d9a:	a666      	st.b      	r3, (r6, 0x6)
+				CardInfo.SuccNum = 0;
+    4d9c:	a667      	st.b      	r3, (r6, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    4d9e:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_FAILD",SysTick_1ms);
+    4da0:	9540      	ld.w      	r2, (r5, 0x0)
+    4da2:	1029      	lrw      	r1, 0x629f	// 4dc4 <Card_Read_TasK+0xac>
+    4da4:	07ee      	br      	0x4d80	// 4d80 <Card_Read_TasK+0x68>
+                CardInfo.FailNum++;
+    4da6:	2300      	addi      	r3, 1
+    4da8:	a666      	st.b      	r3, (r6, 0x6)
+    4daa:	07da      	br      	0x4d5e	// 4d5e <Card_Read_TasK+0x46>
+    4dac:	200000b8 	.long	0x200000b8
+    4db0:	200002d8 	.long	0x200002d8
+    4db4:	20000428 	.long	0x20000428
+    4db8:	200000a4 	.long	0x200000a4
+    4dbc:	0000626d 	.long	0x0000626d
+    4dc0:	0000628d 	.long	0x0000628d
+    4dc4:	0000629f 	.long	0x0000629f
+
+Disassembly of section .text.Detect_SPI_task:
+
+00004dc8 <Detect_SPI_task>:
+U32_T HL_tick =0;
+void Detect_SPI_task(void){
+    4dc8:	14d1      	push      	r4, r15
+
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    4dca:	109f      	lrw      	r4, 0x20000428	// 4e44 <Detect_SPI_task+0x7c>
+    4dcc:	3320      	movi      	r3, 32
+    4dce:	60d0      	addu      	r3, r4
+    4dd0:	8368      	ld.b      	r3, (r3, 0x8)
+    4dd2:	3b41      	cmpnei      	r3, 1
+    4dd4:	0810      	bt      	0x4df4	// 4df4 <Detect_SPI_task+0x2c>
+		if (SysTick_1ms - CardInfo.Reset_Tick >= 1000) {
+    4dd6:	105d      	lrw      	r2, 0x200000b8	// 4e48 <Detect_SPI_task+0x80>
+    4dd8:	9260      	ld.w      	r3, (r2, 0x0)
+    4dda:	942b      	ld.w      	r1, (r4, 0x2c)
+    4ddc:	60c6      	subu      	r3, r1
+    4dde:	103c      	lrw      	r1, 0x3e7	// 4e4c <Detect_SPI_task+0x84>
+    4de0:	64c4      	cmphs      	r1, r3
+    4de2:	0809      	bt      	0x4df4	// 4df4 <Detect_SPI_task+0x2c>
+			CardInfo.Reset_Tick = SysTick_1ms;
+    4de4:	9260      	ld.w      	r3, (r2, 0x0)
+    4de6:	b46b      	st.w      	r3, (r4, 0x2c)
+			RC522_Reset();
+    4de8:	e3fffda0 	bsr      	0x4928	// 4928 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "SPI INIT");
+    4dec:	1039      	lrw      	r1, 0x62bf	// 4e50 <Detect_SPI_task+0x88>
+    4dee:	3000      	movi      	r0, 0
+    4df0:	e3fffbec 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+	}
+	
+	if(1==FIFOLevelReg_flag){
+    4df4:	1078      	lrw      	r3, 0x200002d8	// 4e54 <Detect_SPI_task+0x8c>
+    4df6:	8340      	ld.b      	r2, (r3, 0x0)
+    4df8:	3a41      	cmpnei      	r2, 1
+    4dfa:	0812      	bt      	0x4e1e	// 4e1e <Detect_SPI_task+0x56>
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "FIFO INIT one");
+		if (SysTick_1ms - HL_tick >= 1000) {
+    4dfc:	1033      	lrw      	r1, 0x200000b8	// 4e48 <Detect_SPI_task+0x80>
+    4dfe:	9140      	ld.w      	r2, (r1, 0x0)
+    4e00:	9302      	ld.w      	r0, (r3, 0x8)
+    4e02:	6082      	subu      	r2, r0
+    4e04:	1012      	lrw      	r0, 0x3e7	// 4e4c <Detect_SPI_task+0x84>
+    4e06:	6480      	cmphs      	r0, r2
+    4e08:	080b      	bt      	0x4e1e	// 4e1e <Detect_SPI_task+0x56>
+			HL_tick = SysTick_1ms;
+    4e0a:	9140      	ld.w      	r2, (r1, 0x0)
+    4e0c:	b342      	st.w      	r2, (r3, 0x8)
+			FIFOLevelReg_flag = 0;
+    4e0e:	3200      	movi      	r2, 0
+    4e10:	a340      	st.b      	r2, (r3, 0x0)
+
+			RC522_Reset();
+    4e12:	e3fffd8b 	bsr      	0x4928	// 4928 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "FIFO INIT");
+    4e16:	1031      	lrw      	r1, 0x62c8	// 4e58 <Detect_SPI_task+0x90>
+    4e18:	3000      	movi      	r0, 0
+    4e1a:	e3fffbd7 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+	}
+	
+	//每10s读不到卡便复位并初始化rc522
+	if((CardInfo.BlockSucc == BLOCK_READ_FAILD)&&(SysTick_1ms - CardInfo.reset_tick>= 10000)) {
+    4e1e:	8467      	ld.b      	r3, (r4, 0x7)
+    4e20:	3b40      	cmpnei      	r3, 0
+    4e22:	0810      	bt      	0x4e42	// 4e42 <Detect_SPI_task+0x7a>
+    4e24:	1049      	lrw      	r2, 0x200000b8	// 4e48 <Detect_SPI_task+0x80>
+    4e26:	9260      	ld.w      	r3, (r2, 0x0)
+    4e28:	942c      	ld.w      	r1, (r4, 0x30)
+    4e2a:	60c6      	subu      	r3, r1
+    4e2c:	102c      	lrw      	r1, 0x270f	// 4e5c <Detect_SPI_task+0x94>
+    4e2e:	64c4      	cmphs      	r1, r3
+    4e30:	0809      	bt      	0x4e42	// 4e42 <Detect_SPI_task+0x7a>
+		CardInfo.reset_tick = SysTick_1ms;
+    4e32:	9260      	ld.w      	r3, (r2, 0x0)
+    4e34:	b46c      	st.w      	r3, (r4, 0x30)
+		RC522_Reset();
+    4e36:	e3fffd79 	bsr      	0x4928	// 4928 <RC522_Reset>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "not read for 10 seconds");
+    4e3a:	102a      	lrw      	r1, 0x62d2	// 4e60 <Detect_SPI_task+0x98>
+    4e3c:	3000      	movi      	r0, 0
+    4e3e:	e3fffbc5 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		
+	}
+
+
+}
+    4e42:	1491      	pop      	r4, r15
+    4e44:	20000428 	.long	0x20000428
+    4e48:	200000b8 	.long	0x200000b8
+    4e4c:	000003e7 	.long	0x000003e7
+    4e50:	000062bf 	.long	0x000062bf
+    4e54:	200002d8 	.long	0x200002d8
+    4e58:	000062c8 	.long	0x000062c8
+    4e5c:	0000270f 	.long	0x0000270f
+    4e60:	000062d2 	.long	0x000062d2
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00004e64 <RLY_Light_Ctrl>:
+}
+
+volatile U32_T Tim_Flag = 0;
+///无RF模块继电器和背光控制函数
+void RLY_Light_Ctrl(U8_T state)
+{
+    4e64:	14d0      	push      	r15
+	if(state == 0x01)
+    4e66:	3841      	cmpnei      	r0, 1
+    4e68:	0807      	bt      	0x4e76	// 4e76 <RLY_Light_Ctrl+0x12>
+	{
+//		CTRL_RLY_ON;
+		GPIO_Write_High(GPIOA0,0);
+    4e6a:	106e      	lrw      	r3, 0x2000004c	// 4ea0 <RLY_Light_Ctrl+0x3c>
+    4e6c:	3100      	movi      	r1, 0
+    4e6e:	9300      	ld.w      	r0, (r3, 0x0)
+    4e70:	e3fff26f 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		else{
+			GPIO_Write_Low(GPIOA0,0);
+		}
+//		CTRL_RLY_OFF;
+	}
+}
+    4e74:	1490      	pop      	r15
+	else if(state == 0x00){
+    4e76:	3840      	cmpnei      	r0, 0
+    4e78:	0bfe      	bt      	0x4e74	// 4e74 <RLY_Light_Ctrl+0x10>
+		if(CardInfo.CTR_PLYFlag == 1)
+    4e7a:	106b      	lrw      	r3, 0x20000428	// 4ea4 <RLY_Light_Ctrl+0x40>
+    4e7c:	8360      	ld.b      	r3, (r3, 0x0)
+    4e7e:	3b41      	cmpnei      	r3, 1
+    4e80:	0809      	bt      	0x4e92	// 4e92 <RLY_Light_Ctrl+0x2e>
+			if(SysTick_1ms - Tim_Flag >= CTR_State_Tick)
+    4e82:	106a      	lrw      	r3, 0x200000b8	// 4ea8 <RLY_Light_Ctrl+0x44>
+    4e84:	104a      	lrw      	r2, 0x200002e4	// 4eac <RLY_Light_Ctrl+0x48>
+    4e86:	9360      	ld.w      	r3, (r3, 0x0)
+    4e88:	9240      	ld.w      	r2, (r2, 0x0)
+    4e8a:	60ca      	subu      	r3, r2
+    4e8c:	1049      	lrw      	r2, 0x752f	// 4eb0 <RLY_Light_Ctrl+0x4c>
+    4e8e:	64c8      	cmphs      	r2, r3
+    4e90:	0bf2      	bt      	0x4e74	// 4e74 <RLY_Light_Ctrl+0x10>
+				GPIO_Write_Low(GPIOA0,0);
+    4e92:	1064      	lrw      	r3, 0x2000004c	// 4ea0 <RLY_Light_Ctrl+0x3c>
+    4e94:	3100      	movi      	r1, 0
+    4e96:	9300      	ld.w      	r0, (r3, 0x0)
+    4e98:	e3fff25f 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+}
+    4e9c:	07ec      	br      	0x4e74	// 4e74 <RLY_Light_Ctrl+0x10>
+    4e9e:	0000      	bkpt
+    4ea0:	2000004c 	.long	0x2000004c
+    4ea4:	20000428 	.long	0x20000428
+    4ea8:	200000b8 	.long	0x200000b8
+    4eac:	200002e4 	.long	0x200002e4
+    4eb0:	0000752f 	.long	0x0000752f
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00004eb4 <KEY1_LONG_PRESS_RELEASE_Handler>:
+}
+
+
+///无RF模块的门磁长按释放事件
+void KEY1_LONG_PRESS_RELEASE_Handler(void* btn)
+{
+    4eb4:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    4eb6:	1033      	lrw      	r1, 0x62ea	// 4f00 <KEY1_LONG_PRESS_RELEASE_Handler+0x4c>
+    4eb8:	3000      	movi      	r0, 0
+    4eba:	e3fffb87 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    4ebe:	1072      	lrw      	r3, 0x20000428	// 4f04 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    4ec0:	8367      	ld.b      	r3, (r3, 0x7)
+    4ec2:	3b40      	cmpnei      	r3, 0
+    4ec4:	1091      	lrw      	r4, 0x20000494	// 4f08 <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    4ec6:	0819      	bt      	0x4ef8	// 4ef8 <KEY1_LONG_PRESS_RELEASE_Handler+0x44>
+	{
+		if(READ_RLY_STATE != 0x00)
+    4ec8:	1071      	lrw      	r3, 0x20000048	// 4f0c <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    4eca:	3100      	movi      	r1, 0
+    4ecc:	9300      	ld.w      	r0, (r3, 0x0)
+    4ece:	e3fff25b 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4ed2:	3840      	cmpnei      	r0, 0
+    4ed4:	0c08      	bf      	0x4ee4	// 4ee4 <KEY1_LONG_PRESS_RELEASE_Handler+0x30>
+		{
+			RLY_Light_Ctrl(1);
+    4ed6:	3001      	movi      	r0, 1
+    4ed8:	e3ffffc6 	bsr      	0x4e64	// 4e64 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    4edc:	102d      	lrw      	r1, 0x6305	// 4f10 <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    4ede:	3000      	movi      	r0, 0
+    4ee0:	e3fffb74 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+		dm_in.DM_Tick = SysTick_1ms;
+    4ee4:	106c      	lrw      	r3, 0x200000b8	// 4f14 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    4ee6:	104d      	lrw      	r2, 0x20000495	// 4f18 <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    4ee8:	9360      	ld.w      	r3, (r3, 0x0)
+    4eea:	4b28      	lsri      	r1, r3, 8
+    4eec:	a461      	st.b      	r3, (r4, 0x1)
+    4eee:	a221      	st.b      	r1, (r2, 0x1)
+    4ef0:	4b30      	lsri      	r1, r3, 16
+    4ef2:	4b78      	lsri      	r3, r3, 24
+    4ef4:	a222      	st.b      	r1, (r2, 0x2)
+    4ef6:	a263      	st.b      	r3, (r2, 0x3)
+	}
+	
+	dm_in.DM_State = 0x02;
+    4ef8:	3302      	movi      	r3, 2
+    4efa:	a460      	st.b      	r3, (r4, 0x0)
+}
+    4efc:	1491      	pop      	r4, r15
+    4efe:	0000      	bkpt
+    4f00:	000062ea 	.long	0x000062ea
+    4f04:	20000428 	.long	0x20000428
+    4f08:	20000494 	.long	0x20000494
+    4f0c:	20000048 	.long	0x20000048
+    4f10:	00006305 	.long	0x00006305
+    4f14:	200000b8 	.long	0x200000b8
+    4f18:	20000495 	.long	0x20000495
+
+Disassembly of section .text.LogicCtrl_Init:
+
+00004f1c <LogicCtrl_Init>:
+{
+    4f1c:	14d2      	push      	r4-r5, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    4f1e:	108d      	lrw      	r4, 0x20000048	// 4f50 <LogicCtrl_Init+0x34>
+    4f20:	3200      	movi      	r2, 0
+    4f22:	9400      	ld.w      	r0, (r4, 0x0)
+    4f24:	3101      	movi      	r1, 1
+    4f26:	e3fff193 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4f2a:	10ab      	lrw      	r5, 0x2000004c	// 4f54 <LogicCtrl_Init+0x38>
+	CTRL_CARD_OUT;
+    4f2c:	3101      	movi      	r1, 1
+    4f2e:	9400      	ld.w      	r0, (r4, 0x0)
+    4f30:	e3fff213 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    4f34:	3200      	movi      	r2, 0
+    4f36:	9500      	ld.w      	r0, (r5, 0x0)
+    4f38:	3101      	movi      	r1, 1
+    4f3a:	e3fff189 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    4f3e:	9500      	ld.w      	r0, (r5, 0x0)
+    4f40:	3101      	movi      	r1, 1
+    4f42:	e3fff20a 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	CTRL_RLY_OFF;
+    4f46:	9400      	ld.w      	r0, (r4, 0x0)
+    4f48:	3100      	movi      	r1, 0
+    4f4a:	e3fff202 	bsr      	0x334e	// 334e <GPIO_Write_High>
+}
+    4f4e:	1492      	pop      	r4-r5, r15
+    4f50:	20000048 	.long	0x20000048
+    4f54:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+00004f58 <LogicCtrl_Task>:
+{
+    4f58:	14d4      	push      	r4-r7, r15
+	if (start_light == 0){
+    4f5a:	1195      	lrw      	r4, 0x200002e4	// 502c <LogicCtrl_Task+0xd4>
+    4f5c:	8464      	ld.b      	r3, (r4, 0x4)
+    4f5e:	3b40      	cmpnei      	r3, 0
+    4f60:	11b4      	lrw      	r5, 0x20000428	// 5030 <LogicCtrl_Task+0xd8>
+    4f62:	0813      	bt      	0x4f88	// 4f88 <LogicCtrl_Task+0x30>
+		start_light++;									//start_light == 1,表示上电后首次进入（有插卡）
+    4f64:	3301      	movi      	r3, 1
+    4f66:	a464      	st.b      	r3, (r4, 0x4)
+		if (CardInfo.BlockSucc==BLOCK_READ_FAILD){
+    4f68:	8567      	ld.b      	r3, (r5, 0x7)
+    4f6a:	3b40      	cmpnei      	r3, 0
+    4f6c:	080e      	bt      	0x4f88	// 4f88 <LogicCtrl_Task+0x30>
+			GPIO_Init(GPIOA0,0,Output);
+    4f6e:	11d2      	lrw      	r6, 0x2000004c	// 5034 <LogicCtrl_Task+0xdc>
+    4f70:	3200      	movi      	r2, 0
+    4f72:	3100      	movi      	r1, 0
+    4f74:	9600      	ld.w      	r0, (r6, 0x0)
+    4f76:	e3fff16b 	bsr      	0x324c	// 324c <GPIO_Init>
+			GPIO_Write_High(GPIOA0,0);
+    4f7a:	9600      	ld.w      	r0, (r6, 0x0)
+    4f7c:	3100      	movi      	r1, 0
+    4f7e:	e3fff1e8 	bsr      	0x334e	// 334e <GPIO_Write_High>
+			start_light++;								//start_light == 2,表示上电后首次进入时未插卡     目前可能上电时有插卡也意外进入
+    4f82:	8464      	ld.b      	r3, (r4, 0x4)
+    4f84:	2300      	addi      	r3, 1
+    4f86:	a464      	st.b      	r3, (r4, 0x4)
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 0))
+    4f88:	8567      	ld.b      	r3, (r5, 0x7)
+    4f8a:	3b41      	cmpnei      	r3, 1
+    4f8c:	0836      	bt      	0x4ff8	// 4ff8 <LogicCtrl_Task+0xa0>
+    4f8e:	11cb      	lrw      	r6, 0x20000048	// 5038 <LogicCtrl_Task+0xe0>
+    4f90:	3101      	movi      	r1, 1
+    4f92:	9600      	ld.w      	r0, (r6, 0x0)
+    4f94:	e3fff1f8 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4f98:	3840      	cmpnei      	r0, 0
+    4f9a:	082f      	bt      	0x4ff8	// 4ff8 <LogicCtrl_Task+0xa0>
+		CTRL_CARD_IN;
+    4f9c:	3101      	movi      	r1, 1
+    4f9e:	9600      	ld.w      	r0, (r6, 0x0)
+    4fa0:	e3fff1d7 	bsr      	0x334e	// 334e <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_IN,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    4fa4:	1166      	lrw      	r3, 0x200000b8	// 503c <LogicCtrl_Task+0xe4>
+    4fa6:	3101      	movi      	r1, 1
+    4fa8:	9600      	ld.w      	r0, (r6, 0x0)
+    4faa:	93e0      	ld.w      	r7, (r3, 0x0)
+    4fac:	e3fff1ec 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    4fb0:	6cc3      	mov      	r3, r0
+    4fb2:	6c9f      	mov      	r2, r7
+    4fb4:	1123      	lrw      	r1, 0x6317	// 5040 <LogicCtrl_Task+0xe8>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_OUT,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    4fb6:	3000      	movi      	r0, 0
+    4fb8:	e3fffb08 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+	if ((CardInfo.BlockSucc==BLOCK_READ_SUCC) && ((start_light > 0)&&(start_light <= 2)) ){ 
+    4fbc:	8567      	ld.b      	r3, (r5, 0x7)
+    4fbe:	3b41      	cmpnei      	r3, 1
+    4fc0:	080a      	bt      	0x4fd4	// 4fd4 <LogicCtrl_Task+0x7c>
+    4fc2:	8444      	ld.b      	r2, (r4, 0x4)
+    4fc4:	5a63      	subi      	r3, r2, 1
+    4fc6:	74cc      	zextb      	r3, r3
+    4fc8:	3b01      	cmphsi      	r3, 2
+    4fca:	0805      	bt      	0x4fd4	// 4fd4 <LogicCtrl_Task+0x7c>
+		if (start_light > 1){       //上电后首次进入时未插卡 
+    4fcc:	3a42      	cmpnei      	r2, 2
+    4fce:	082d      	bt      	0x5028	// 5028 <LogicCtrl_Task+0xd0>
+			start_light = 3;							//start_light == 3,表示从上电后首次进入未插卡状态转为有插卡状态
+    4fd0:	3303      	movi      	r3, 3
+			start_light = 10;							//start_light == 10,表示从首次上电时有插卡，变成这个值后不再进入上电判断
+    4fd2:	a464      	st.b      	r3, (r4, 0x4)
+	if ((start_light>=3)&&(start_light<=6)){
+    4fd4:	8464      	ld.b      	r3, (r4, 0x4)
+    4fd6:	5b4b      	subi      	r2, r3, 3
+    4fd8:	7488      	zextb      	r2, r2
+    4fda:	3a03      	cmphsi      	r2, 4
+    4fdc:	080d      	bt      	0x4ff6	// 4ff6 <LogicCtrl_Task+0x9e>
+		start_light++;										
+    4fde:	2300      	addi      	r3, 1
+    4fe0:	74cc      	zextb      	r3, r3
+		if (start_light>5){								//延时进入
+    4fe2:	3b05      	cmphsi      	r3, 6
+		start_light++;										
+    4fe4:	a464      	st.b      	r3, (r4, 0x4)
+		if (start_light>5){								//延时进入
+    4fe6:	0c08      	bf      	0x4ff6	// 4ff6 <LogicCtrl_Task+0x9e>
+			GPIO_Write_Low(GPIOA0,0);
+    4fe8:	1073      	lrw      	r3, 0x2000004c	// 5034 <LogicCtrl_Task+0xdc>
+    4fea:	3100      	movi      	r1, 0
+    4fec:	9300      	ld.w      	r0, (r3, 0x0)
+    4fee:	e3fff1b4 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+			start_light = 11;							//start_light == 11,表示从上电后首次进入未插卡状态转为有插卡状态
+    4ff2:	330b      	movi      	r3, 11
+    4ff4:	a464      	st.b      	r3, (r4, 0x4)
+}
+    4ff6:	1494      	pop      	r4-r7, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 1))
+    4ff8:	8567      	ld.b      	r3, (r5, 0x7)
+    4ffa:	3b40      	cmpnei      	r3, 0
+    4ffc:	0be0      	bt      	0x4fbc	// 4fbc <LogicCtrl_Task+0x64>
+    4ffe:	10cf      	lrw      	r6, 0x20000048	// 5038 <LogicCtrl_Task+0xe0>
+    5000:	3101      	movi      	r1, 1
+    5002:	9600      	ld.w      	r0, (r6, 0x0)
+    5004:	e3fff1c0 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    5008:	3841      	cmpnei      	r0, 1
+    500a:	0bd9      	bt      	0x4fbc	// 4fbc <LogicCtrl_Task+0x64>
+		CTRL_CARD_OUT;
+    500c:	3101      	movi      	r1, 1
+    500e:	9600      	ld.w      	r0, (r6, 0x0)
+    5010:	e3fff1a3 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_OUT,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    5014:	106a      	lrw      	r3, 0x200000b8	// 503c <LogicCtrl_Task+0xe4>
+    5016:	3101      	movi      	r1, 1
+    5018:	9600      	ld.w      	r0, (r6, 0x0)
+    501a:	93e0      	ld.w      	r7, (r3, 0x0)
+    501c:	e3fff1b4 	bsr      	0x3384	// 3384 <GPIO_Read_Output>
+    5020:	6cc3      	mov      	r3, r0
+    5022:	6c9f      	mov      	r2, r7
+    5024:	1028      	lrw      	r1, 0x6345	// 5044 <LogicCtrl_Task+0xec>
+    5026:	07c8      	br      	0x4fb6	// 4fb6 <LogicCtrl_Task+0x5e>
+			start_light = 10;							//start_light == 10,表示从首次上电时有插卡，变成这个值后不再进入上电判断
+    5028:	330a      	movi      	r3, 10
+    502a:	07d4      	br      	0x4fd2	// 4fd2 <LogicCtrl_Task+0x7a>
+    502c:	200002e4 	.long	0x200002e4
+    5030:	20000428 	.long	0x20000428
+    5034:	2000004c 	.long	0x2000004c
+    5038:	20000048 	.long	0x20000048
+    503c:	200000b8 	.long	0x200000b8
+    5040:	00006317 	.long	0x00006317
+    5044:	00006345 	.long	0x00006345
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00005048 <LogicCtrl_NoRF_Init>:
+
+
+///无RF模块的初始化
+void LogicCtrl_NoRF_Init(void)
+{
+    5048:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,RLY_OUT_PIN,Output);			
+    504a:	109c      	lrw      	r4, 0x20000048	// 50b8 <LogicCtrl_NoRF_Init+0x70>
+    504c:	3200      	movi      	r2, 0
+    504e:	9400      	ld.w      	r0, (r4, 0x0)
+    5050:	3100      	movi      	r1, 0
+    5052:	e3fff0fd 	bsr      	0x324c	// 324c <GPIO_Init>
+	CTRL_RLY_OFF;
+    5056:	9400      	ld.w      	r0, (r4, 0x0)
+    5058:	3100      	movi      	r1, 0
+    505a:	e3fff17a 	bsr      	0x334e	// 334e <GPIO_Write_High>
+	
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+	
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    505e:	1098      	lrw      	r4, 0x2000004c	// 50bc <LogicCtrl_NoRF_Init+0x74>
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    5060:	3209      	movi      	r2, 9
+    5062:	3100      	movi      	r1, 0
+    5064:	1017      	lrw      	r0, 0x20000494	// 50c0 <LogicCtrl_NoRF_Init+0x78>
+    5066:	e3ffe4db 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    506a:	9400      	ld.w      	r0, (r4, 0x0)
+    506c:	3201      	movi      	r2, 1
+    506e:	3103      	movi      	r1, 3
+    5070:	e3fff0ee 	bsr      	0x324c	// 324c <GPIO_Init>
+	
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    5074:	3200      	movi      	r2, 0
+    5076:	9400      	ld.w      	r0, (r4, 0x0)
+    5078:	3101      	movi      	r1, 1
+    507a:	e3fff0e9 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    507e:	9400      	ld.w      	r0, (r4, 0x0)
+    5080:	3101      	movi      	r1, 1
+    5082:	e3fff16a 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	
+	
+	GPIO_Init(GPIOA0,0,Output);			//继电器，//light
+    5086:	3200      	movi      	r2, 0
+    5088:	9400      	ld.w      	r0, (r4, 0x0)
+    508a:	3100      	movi      	r1, 0
+    508c:	e3fff0e0 	bsr      	0x324c	// 324c <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,0);			//初始拉低断开，插卡拉高打开
+    5090:	9400      	ld.w      	r0, (r4, 0x0)
+    5092:	3100      	movi      	r1, 0
+	
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    5094:	108c      	lrw      	r4, 0x20000464	// 50c4 <LogicCtrl_NoRF_Init+0x7c>
+	GPIO_Write_Low(GPIOA0,0);			//初始拉低断开，插卡拉高打开
+    5096:	e3fff160 	bsr      	0x3356	// 3356 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    509a:	3303      	movi      	r3, 3
+    509c:	6c13      	mov      	r0, r4
+    509e:	3200      	movi      	r2, 0
+    50a0:	102a      	lrw      	r1, 0x5588	// 50c8 <LogicCtrl_NoRF_Init+0x80>
+    50a2:	e00001a1 	bsr      	0x53e4	// 53e4 <button_init>
+	
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    50a6:	104a      	lrw      	r2, 0x4eb4	// 50cc <LogicCtrl_NoRF_Init+0x84>
+    50a8:	3107      	movi      	r1, 7
+    50aa:	6c13      	mov      	r0, r4
+    50ac:	e00001b9 	bsr      	0x541e	// 541e <button_attach>
+	button_start(&KEY1);
+    50b0:	6c13      	mov      	r0, r4
+    50b2:	e000024b 	bsr      	0x5548	// 5548 <button_start>
+}
+    50b6:	1491      	pop      	r4, r15
+    50b8:	20000048 	.long	0x20000048
+    50bc:	2000004c 	.long	0x2000004c
+    50c0:	20000494 	.long	0x20000494
+    50c4:	20000464 	.long	0x20000464
+    50c8:	00005588 	.long	0x00005588
+    50cc:	00004eb4 	.long	0x00004eb4
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+000050d0 <LogicCtrl_NoRF_Task>:
+
+
+///无RF模块的轮询任务
+void LogicCtrl_NoRF_Task(void)
+{
+    50d0:	14d3      	push      	r4-r6, r15
+	static U32_T card_tick = 0;
+	static U32_T test_tick = 0;
+
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    50d2:	3301      	movi      	r3, 1
+    50d4:	11c9      	lrw      	r6, 0x20000428	// 5178 <LogicCtrl_NoRF_Task+0xa8>
+	
+	if(SysTick_1ms - test_tick > 5)
+    50d6:	118a      	lrw      	r4, 0x200000b8	// 517c <LogicCtrl_NoRF_Task+0xac>
+    50d8:	11aa      	lrw      	r5, 0x200002e4	// 5180 <LogicCtrl_NoRF_Task+0xb0>
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    50da:	a660      	st.b      	r3, (r6, 0x0)
+	if(SysTick_1ms - test_tick > 5)
+    50dc:	9542      	ld.w      	r2, (r5, 0x8)
+    50de:	9460      	ld.w      	r3, (r4, 0x0)
+    50e0:	60ca      	subu      	r3, r2
+    50e2:	3b05      	cmphsi      	r3, 6
+    50e4:	0c05      	bf      	0x50ee	// 50ee <LogicCtrl_NoRF_Task+0x1e>
+	{
+		test_tick = SysTick_1ms;
+    50e6:	9460      	ld.w      	r3, (r4, 0x0)
+    50e8:	b562      	st.w      	r3, (r5, 0x8)
+		button_ticks();
+    50ea:	e0000241 	bsr      	0x556c	// 556c <button_ticks>
+	}
+
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    50ee:	8667      	ld.b      	r3, (r6, 0x7)
+    50f0:	3b41      	cmpnei      	r3, 1
+    50f2:	0830      	bt      	0x5152	// 5152 <LogicCtrl_NoRF_Task+0x82>
+	{
+		RLY_Light_Ctrl(1);
+    50f4:	3001      	movi      	r0, 1
+    50f6:	e3fffeb7 	bsr      	0x4e64	// 4e64 <RLY_Light_Ctrl>
+		card_tick = SysTick_1ms;
+    50fa:	9460      	ld.w      	r3, (r4, 0x0)
+    50fc:	b563      	st.w      	r3, (r5, 0xc)
+		dm_in.DM_State = 0x00;
+    50fe:	3200      	movi      	r2, 0
+    5100:	1161      	lrw      	r3, 0x20000494	// 5184 <LogicCtrl_NoRF_Task+0xb4>
+    5102:	a340      	st.b      	r2, (r3, 0x0)
+		card_tick = SysTick_1ms;
+		RLY_Light_Ctrl(0);
+		 
+	}
+	
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    5104:	8667      	ld.b      	r3, (r6, 0x7)
+    5106:	3b40      	cmpnei      	r3, 0
+    5108:	0824      	bt      	0x5150	// 5150 <LogicCtrl_NoRF_Task+0x80>
+	{
+		
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    510a:	107f      	lrw      	r3, 0x20000494	// 5184 <LogicCtrl_NoRF_Task+0xb4>
+    510c:	8340      	ld.b      	r2, (r3, 0x0)
+    510e:	3a42      	cmpnei      	r2, 2
+    5110:	0820      	bt      	0x5150	// 5150 <LogicCtrl_NoRF_Task+0x80>
+    5112:	8322      	ld.b      	r1, (r3, 0x2)
+    5114:	8341      	ld.b      	r2, (r3, 0x1)
+    5116:	4128      	lsli      	r1, r1, 8
+    5118:	6c48      	or      	r1, r2
+    511a:	8343      	ld.b      	r2, (r3, 0x3)
+    511c:	4250      	lsli      	r2, r2, 16
+    511e:	6c48      	or      	r1, r2
+    5120:	8344      	ld.b      	r2, (r3, 0x4)
+    5122:	4258      	lsli      	r2, r2, 24
+    5124:	6c84      	or      	r2, r1
+    5126:	9400      	ld.w      	r0, (r4, 0x0)
+    5128:	600a      	subu      	r0, r2
+    512a:	1058      	lrw      	r2, 0x752f	// 5188 <LogicCtrl_NoRF_Task+0xb8>
+    512c:	6408      	cmphs      	r2, r0
+    512e:	0811      	bt      	0x5150	// 5150 <LogicCtrl_NoRF_Task+0x80>
+		{
+			dm_in.DM_Tick = SysTick_1ms;
+    5130:	9440      	ld.w      	r2, (r4, 0x0)
+    5132:	5b22      	addi      	r1, r3, 1
+    5134:	a341      	st.b      	r2, (r3, 0x1)
+    5136:	4a68      	lsri      	r3, r2, 8
+    5138:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    513a:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    513c:	4a70      	lsri      	r3, r2, 16
+    513e:	4a58      	lsri      	r2, r2, 24
+    5140:	a162      	st.b      	r3, (r1, 0x2)
+    5142:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    5144:	e3fffe90 	bsr      	0x4e64	// 4e64 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    5148:	1031      	lrw      	r1, 0x6387	// 518c <LogicCtrl_NoRF_Task+0xbc>
+    514a:	3000      	movi      	r0, 0
+    514c:	e3fffa3e 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+		}
+	}
+}
+    5150:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= CTR_State_Tick))
+    5152:	3b40      	cmpnei      	r3, 0
+    5154:	0bd8      	bt      	0x5104	// 5104 <LogicCtrl_NoRF_Task+0x34>
+    5156:	106c      	lrw      	r3, 0x20000494	// 5184 <LogicCtrl_NoRF_Task+0xb4>
+    5158:	8360      	ld.b      	r3, (r3, 0x0)
+    515a:	3b40      	cmpnei      	r3, 0
+    515c:	0bd4      	bt      	0x5104	// 5104 <LogicCtrl_NoRF_Task+0x34>
+    515e:	9543      	ld.w      	r2, (r5, 0xc)
+    5160:	9460      	ld.w      	r3, (r4, 0x0)
+    5162:	60ca      	subu      	r3, r2
+    5164:	1049      	lrw      	r2, 0x752f	// 5188 <LogicCtrl_NoRF_Task+0xb8>
+    5166:	64c8      	cmphs      	r2, r3
+    5168:	0bce      	bt      	0x5104	// 5104 <LogicCtrl_NoRF_Task+0x34>
+		card_tick = SysTick_1ms;
+    516a:	9460      	ld.w      	r3, (r4, 0x0)
+		RLY_Light_Ctrl(0);
+    516c:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    516e:	b563      	st.w      	r3, (r5, 0xc)
+		RLY_Light_Ctrl(0);
+    5170:	e3fffe7a 	bsr      	0x4e64	// 4e64 <RLY_Light_Ctrl>
+    5174:	07c8      	br      	0x5104	// 5104 <LogicCtrl_NoRF_Task+0x34>
+    5176:	0000      	bkpt
+    5178:	20000428 	.long	0x20000428
+    517c:	200000b8 	.long	0x200000b8
+    5180:	200002e4 	.long	0x200002e4
+    5184:	20000494 	.long	0x20000494
+    5188:	0000752f 	.long	0x0000752f
+    518c:	00006387 	.long	0x00006387
+
+Disassembly of section .text.BackLight_Task:
+
+00005190 <BackLight_Task>:
+
+void BackLight_Task(void){
+	if (CardInfo.BlockSucc == BLOCK_READ_SUCC) 
+    5190:	1067      	lrw      	r3, 0x20000428	// 51ac <BackLight_Task+0x1c>
+    5192:	8367      	ld.b      	r3, (r3, 0x7)
+    5194:	3b41      	cmpnei      	r3, 1
+    5196:	1067      	lrw      	r3, 0x20000024	// 51b0 <BackLight_Task+0x20>
+    5198:	0806      	bt      	0x51a4	// 51a4 <BackLight_Task+0x14>
+        GPT0->CMPA = 2000;
+    519a:	9340      	ld.w      	r2, (r3, 0x0)
+    519c:	33fa      	movi      	r3, 250
+    519e:	4363      	lsli      	r3, r3, 3
+    51a0:	b26b      	st.w      	r3, (r2, 0x2c)
+	}else 
+	{
+		Ctrl_Backlight(0);//开背光
+		//Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay led on");
+	}
+}
+    51a2:	783c      	jmp      	r15
+        GPT0->CMPA = 0;
+    51a4:	9360      	ld.w      	r3, (r3, 0x0)
+    51a6:	3200      	movi      	r2, 0
+    51a8:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    51aa:	07fc      	br      	0x51a2	// 51a2 <BackLight_Task+0x12>
+    51ac:	20000428 	.long	0x20000428
+    51b0:	20000024 	.long	0x20000024
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+000051b4 <Detect_WIFI_Task>:
+//检测有无WIFI模组，判断10次，每次间隔10ms
+void Detect_WIFI_Task(void){
+    51b4:	14d1      	push      	r4, r15
+
+	if (finish_flag == 1) return;
+    51b6:	107c      	lrw      	r3, 0x200000a2	// 5224 <Detect_WIFI_Task+0x70>
+    51b8:	8340      	ld.b      	r2, (r3, 0x0)
+    51ba:	3a41      	cmpnei      	r2, 1
+    51bc:	0c1c      	bf      	0x51f4	// 51f4 <Detect_WIFI_Task+0x40>
+	
+	if (detect_count <10) {
+    51be:	109b      	lrw      	r4, 0x200000ac	// 5228 <Detect_WIFI_Task+0x74>
+    51c0:	8440      	ld.b      	r2, (r4, 0x0)
+    51c2:	3a09      	cmphsi      	r2, 10
+    51c4:	081c      	bt      	0x51fc	// 51fc <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    51c6:	103a      	lrw      	r1, 0x200000b8	// 522c <Detect_WIFI_Task+0x78>
+    51c8:	105a      	lrw      	r2, 0x200000a8	// 5230 <Detect_WIFI_Task+0x7c>
+    51ca:	9160      	ld.w      	r3, (r1, 0x0)
+    51cc:	9200      	ld.w      	r0, (r2, 0x0)
+    51ce:	60c2      	subu      	r3, r0
+    51d0:	3b09      	cmphsi      	r3, 10
+    51d2:	0c11      	bf      	0x51f4	// 51f4 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    51d4:	9160      	ld.w      	r3, (r1, 0x0)
+    51d6:	b260      	st.w      	r3, (r2, 0x0)
+			
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    51d8:	3102      	movi      	r1, 2
+    51da:	1077      	lrw      	r3, 0x20000048	// 5234 <Detect_WIFI_Task+0x80>
+    51dc:	9300      	ld.w      	r0, (r3, 0x0)
+    51de:	e3fff0cb 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+    51e2:	1076      	lrw      	r3, 0x200000a0	// 5238 <Detect_WIFI_Task+0x84>
+    51e4:	a300      	st.b      	r0, (r3, 0x0)
+			
+			if (last_state != rf_exist) {
+    51e6:	1076      	lrw      	r3, 0x200000a1	// 523c <Detect_WIFI_Task+0x88>
+    51e8:	8340      	ld.b      	r2, (r3, 0x0)
+    51ea:	640a      	cmpne      	r2, r0
+    51ec:	0c05      	bf      	0x51f6	// 51f6 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    51ee:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    51f0:	3300      	movi      	r3, 0
+			}else {
+				detect_count++;
+    51f2:	a460      	st.b      	r3, (r4, 0x0)
+		{
+			LogicCtrl_Init();   
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+		}
+	}
+}
+    51f4:	1491      	pop      	r4, r15
+				detect_count++;
+    51f6:	8460      	ld.b      	r3, (r4, 0x0)
+    51f8:	2300      	addi      	r3, 1
+    51fa:	07fc      	br      	0x51f2	// 51f2 <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    51fc:	3201      	movi      	r2, 1
+    51fe:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    5200:	106e      	lrw      	r3, 0x200000a0	// 5238 <Detect_WIFI_Task+0x84>
+    5202:	8360      	ld.b      	r3, (r3, 0x0)
+    5204:	3b41      	cmpnei      	r3, 1
+    5206:	0808      	bt      	0x5216	// 5216 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    5208:	e3ffff20 	bsr      	0x5048	// 5048 <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    520c:	102d      	lrw      	r1, 0x6398	// 5240 <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    520e:	3000      	movi      	r0, 0
+    5210:	e3fff9dc 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    5214:	07f0      	br      	0x51f4	// 51f4 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    5216:	3b40      	cmpnei      	r3, 0
+    5218:	0bee      	bt      	0x51f4	// 51f4 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    521a:	e3fffe81 	bsr      	0x4f1c	// 4f1c <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    521e:	102a      	lrw      	r1, 0x639a	// 5244 <Detect_WIFI_Task+0x90>
+    5220:	07f7      	br      	0x520e	// 520e <Detect_WIFI_Task+0x5a>
+    5222:	0000      	bkpt
+    5224:	200000a2 	.long	0x200000a2
+    5228:	200000ac 	.long	0x200000ac
+    522c:	200000b8 	.long	0x200000b8
+    5230:	200000a8 	.long	0x200000a8
+    5234:	20000048 	.long	0x20000048
+    5238:	200000a0 	.long	0x200000a0
+    523c:	200000a1 	.long	0x200000a1
+    5240:	00006398 	.long	0x00006398
+    5244:	0000639a 	.long	0x0000639a
+
+Disassembly of section .text.Led_Task:
+
+00005248 <Led_Task>:
+
+
+
+
+void Led_Task(void){
+    5248:	14d1      	push      	r4, r15
+//	{
+//		GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+//	}
+//	else 
+//	{
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    524a:	1074      	lrw      	r3, 0x20000448	// 5298 <Led_Task+0x50>
+    524c:	8368      	ld.b      	r3, (r3, 0x8)
+    524e:	3b41      	cmpnei      	r3, 1
+    5250:	1073      	lrw      	r3, 0x20000494	// 529c <Led_Task+0x54>
+		{
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    5252:	8326      	ld.b      	r1, (r3, 0x6)
+    5254:	8345      	ld.b      	r2, (r3, 0x5)
+    5256:	4128      	lsli      	r1, r1, 8
+    5258:	6c48      	or      	r1, r2
+    525a:	8347      	ld.b      	r2, (r3, 0x7)
+    525c:	4250      	lsli      	r2, r2, 16
+    525e:	6c48      	or      	r1, r2
+    5260:	8348      	ld.b      	r2, (r3, 0x8)
+    5262:	1010      	lrw      	r0, 0x200000b8	// 52a0 <Led_Task+0x58>
+    5264:	4258      	lsli      	r2, r2, 24
+    5266:	9080      	ld.w      	r4, (r0, 0x0)
+    5268:	6c84      	or      	r2, r1
+    526a:	610a      	subu      	r4, r2
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    526c:	0813      	bt      	0x5292	// 5292 <Led_Task+0x4a>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    526e:	3263      	movi      	r2, 99
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);
+			}
+		}
+		else 
+		{
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    5270:	6508      	cmphs      	r2, r4
+    5272:	080f      	bt      	0x5290	// 5290 <Led_Task+0x48>
+			{
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    5274:	9040      	ld.w      	r2, (r0, 0x0)
+    5276:	5b32      	addi      	r1, r3, 5
+    5278:	a345      	st.b      	r2, (r3, 0x5)
+    527a:	4a68      	lsri      	r3, r2, 8
+    527c:	a161      	st.b      	r3, (r1, 0x1)
+    527e:	4a70      	lsri      	r3, r2, 16
+    5280:	a162      	st.b      	r3, (r1, 0x2)
+    5282:	4a58      	lsri      	r2, r2, 24
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    5284:	1068      	lrw      	r3, 0x2000004c	// 52a4 <Led_Task+0x5c>
+    5286:	9300      	ld.w      	r0, (r3, 0x0)
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    5288:	a143      	st.b      	r2, (r1, 0x3)
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    528a:	3101      	movi      	r1, 1
+    528c:	e3fff069 	bsr      	0x335e	// 335e <GPIO_Reverse>
+			}
+		}
+//	}
+}
+    5290:	1491      	pop      	r4, r15
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    5292:	1046      	lrw      	r2, 0x1f3	// 52a8 <Led_Task+0x60>
+    5294:	07ee      	br      	0x5270	// 5270 <Led_Task+0x28>
+    5296:	0000      	bkpt
+    5298:	20000448 	.long	0x20000448
+    529c:	20000494 	.long	0x20000494
+    52a0:	200000b8 	.long	0x200000b8
+    52a4:	2000004c 	.long	0x2000004c
+    52a8:	000001f3 	.long	0x000001f3
+
+Disassembly of section .text.CRC16:
+
+000052ac <CRC16>:
+
+U16_T CRC16(uint8_t *aStr ,U16_T len)
+{
+    52ac:	14c3      	push      	r4-r6
+    52ae:	6cc3      	mov      	r3, r0
+    52b0:	6040      	addu      	r1, r0
+		xda ^= aStr[i];
+		for(j=0;j<8;j++) 
+		{
+			xdabit = (U8_T)(xda & 0x01);
+			xda >>= 1;
+			if( xdabit ) xda ^= xdapoly;
+    52b2:	10ac      	lrw      	r5, 0xffffa001	// 52e0 <CRC16+0x34>
+    xda = 0xFFFF;
+    52b4:	100c      	lrw      	r0, 0xffff	// 52e4 <CRC16+0x38>
+    for(i=0;i<len;i++) 
+    52b6:	644e      	cmpne      	r3, r1
+    52b8:	0802      	bt      	0x52bc	// 52bc <CRC16+0x10>
+		}
+	}
+	return xda;
+}
+    52ba:	1483      	pop      	r4-r6
+		xda ^= aStr[i];
+    52bc:	8340      	ld.b      	r2, (r3, 0x0)
+    52be:	6c09      	xor      	r0, r2
+			xdabit = (U8_T)(xda & 0x01);
+    52c0:	3601      	movi      	r6, 1
+		xda ^= aStr[i];
+    52c2:	3208      	movi      	r2, 8
+			if( xdabit ) xda ^= xdapoly;
+    52c4:	6d03      	mov      	r4, r0
+    52c6:	6918      	and      	r4, r6
+    52c8:	3c40      	cmpnei      	r4, 0
+    52ca:	4801      	lsri      	r0, r0, 1
+    52cc:	0c03      	bf      	0x52d2	// 52d2 <CRC16+0x26>
+    52ce:	6c15      	xor      	r0, r5
+    52d0:	7401      	zexth      	r0, r0
+    52d2:	2a00      	subi      	r2, 1
+    52d4:	7489      	zexth      	r2, r2
+		for(j=0;j<8;j++) 
+    52d6:	3a40      	cmpnei      	r2, 0
+    52d8:	0bf6      	bt      	0x52c4	// 52c4 <CRC16+0x18>
+    52da:	2300      	addi      	r3, 1
+    52dc:	07ed      	br      	0x52b6	// 52b6 <CRC16+0xa>
+    52de:	0000      	bkpt
+    52e0:	ffffa001 	.long	0xffffa001
+    52e4:	0000ffff 	.long	0x0000ffff
+
+Disassembly of section .text.Read_Version_Ack:
+
+000052e8 <Read_Version_Ack>:
+
+
+///查询版本号回复
+void Read_Version_Ack(void)
+{
+    52e8:	14d1      	push      	r4, r15
+    52ea:	1423      	subi      	r14, r14, 12
+	U8_T lens = 12;
+	U8_T data[lens];
+	memset(data,0,sizeof(data));
+    52ec:	6c3b      	mov      	r0, r14
+    52ee:	320c      	movi      	r2, 12
+    52f0:	3100      	movi      	r1, 0
+    52f2:	e3ffe395 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	
+	data[0] = 0x55;
+    52f6:	3355      	movi      	r3, 85
+    52f8:	dc6e0000 	st.b      	r3, (r14, 0x0)
+	data[1] = 0x55;
+    52fc:	dc6e0001 	st.b      	r3, (r14, 0x1)
+	data[2] = 0xee;
+    5300:	3300      	movi      	r3, 0
+    5302:	2b11      	subi      	r3, 18
+    5304:	dc6e0002 	st.b      	r3, (r14, 0x2)
+	data[3] = 0x08;   //LENS
+    5308:	3308      	movi      	r3, 8
+    530a:	dc6e0003 	st.b      	r3, (r14, 0x3)
+	data[4] = 0x07;   //Type
+    530e:	3307      	movi      	r3, 7
+    5310:	dc6e0004 	st.b      	r3, (r14, 0x4)
+	data[6] = 0x05;   //Fun
+	data[7] = Project_FW_Version;
+	data[8] = Project_HW_Version;
+	data[9] = 0x00;    //所处RCU端口  2024-11-26
+	
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    5314:	3403      	movi      	r4, 3
+	data[6] = 0x05;   //Fun
+    5316:	3305      	movi      	r3, 5
+    5318:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    531c:	6138      	addu      	r4, r14
+	data[7] = Project_FW_Version;
+    531e:	3302      	movi      	r3, 2
+    5320:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    5324:	3107      	movi      	r1, 7
+	data[8] = Project_HW_Version;
+    5326:	3304      	movi      	r3, 4
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    5328:	6c13      	mov      	r0, r4
+	data[8] = Project_HW_Version;
+    532a:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    532e:	e3ffffbf 	bsr      	0x52ac	// 52ac <CRC16>
+    5332:	dc0e000a 	st.b      	r0, (r14, 0xa)
+	data[lens-1] = (CRC16(&data[3],lens-5)>>8)&0xff;
+    5336:	3107      	movi      	r1, 7
+    5338:	6c13      	mov      	r0, r4
+    533a:	e3ffffb9 	bsr      	0x52ac	// 52ac <CRC16>
+    533e:	4808      	lsri      	r0, r0, 8
+	
+	UARTTransmit(UART2,data,lens);
+    5340:	1065      	lrw      	r3, 0x20000038	// 5354 <Read_Version_Ack+0x6c>
+    5342:	320c      	movi      	r2, 12
+	data[lens-1] = (CRC16(&data[3],lens-5)>>8)&0xff;
+    5344:	dc0e000b 	st.b      	r0, (r14, 0xb)
+	UARTTransmit(UART2,data,lens);
+    5348:	6c7b      	mov      	r1, r14
+    534a:	9300      	ld.w      	r0, (r3, 0x0)
+    534c:	e3fff248 	bsr      	0x37dc	// 37dc <UARTTransmit>
+}
+    5350:	1403      	addi      	r14, r14, 12
+    5352:	1491      	pop      	r4, r15
+    5354:	20000038 	.long	0x20000038
+
+Disassembly of section .text.Card_Recv_Pro:
+
+00005358 <Card_Recv_Pro>:
+
+U8_T Card_Recv_Pro(U8_T *data,U16_T lens)
+{
+    5358:	14d2      	push      	r4-r5, r15
+	U16_T crc_temp = 0;
+	
+	if((lens <= 4) || (data[3] != (lens - 3)))       //2024-11-11         增加长度判断,避免长度错误导致卡在ＣＲＣ校验循环里最终开门狗复位             
+    535a:	3904      	cmphsi      	r1, 5
+{
+    535c:	6d03      	mov      	r4, r0
+	if((lens <= 4) || (data[3] != (lens - 3)))       //2024-11-11         增加长度判断,避免长度错误导致卡在ＣＲＣ校验循环里最终开门狗复位             
+    535e:	0c05      	bf      	0x5368	// 5368 <Card_Recv_Pro+0x10>
+    5360:	8043      	ld.b      	r2, (r0, 0x3)
+    5362:	596b      	subi      	r3, r1, 3
+    5364:	64ca      	cmpne      	r2, r3
+    5366:	0c07      	bf      	0x5374	// 5374 <Card_Recv_Pro+0x1c>
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Lens Err");
+    5368:	103b      	lrw      	r1, 0x639d	// 53d4 <Card_Recv_Pro+0x7c>
+		return 1;
+	}
+	
+	if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee))
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Head Err");
+    536a:	3000      	movi      	r0, 0
+    536c:	e3fff92e 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+	
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+	if(crc_temp != CRC16(&data[3],lens-5))
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro CRC Err: %04X  %04X",crc_temp,CRC16(&data[3],lens-5));
+		return 1;
+    5370:	3001      	movi      	r0, 1
+		case 0x05:     //查询版本号
+			Read_Version_Ack();
+		break;
+	}
+	return 0;
+}
+    5372:	1492      	pop      	r4-r5, r15
+	if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee))
+    5374:	8060      	ld.b      	r3, (r0, 0x0)
+    5376:	3255      	movi      	r2, 85
+    5378:	648e      	cmpne      	r3, r2
+    537a:	0808      	bt      	0x538a	// 538a <Card_Recv_Pro+0x32>
+    537c:	8041      	ld.b      	r2, (r0, 0x1)
+    537e:	64ca      	cmpne      	r2, r3
+    5380:	0805      	bt      	0x538a	// 538a <Card_Recv_Pro+0x32>
+    5382:	8042      	ld.b      	r2, (r0, 0x2)
+    5384:	33ee      	movi      	r3, 238
+    5386:	64ca      	cmpne      	r2, r3
+    5388:	0c03      	bf      	0x538e	// 538e <Card_Recv_Pro+0x36>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Head Err");
+    538a:	1034      	lrw      	r1, 0x63b4	// 53d8 <Card_Recv_Pro+0x80>
+    538c:	07ef      	br      	0x536a	// 536a <Card_Recv_Pro+0x12>
+	if(data[4] != 0x07)
+    538e:	8064      	ld.b      	r3, (r0, 0x4)
+    5390:	3b47      	cmpnei      	r3, 7
+    5392:	0c03      	bf      	0x5398	// 5398 <Card_Recv_Pro+0x40>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Type Err");
+    5394:	1032      	lrw      	r1, 0x63cb	// 53dc <Card_Recv_Pro+0x84>
+    5396:	07ea      	br      	0x536a	// 536a <Card_Recv_Pro+0x12>
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+    5398:	5864      	addu      	r3, r0, r1
+    539a:	5b43      	subi      	r2, r3, 1
+    539c:	82a0      	ld.b      	r5, (r2, 0x0)
+    539e:	2b01      	subi      	r3, 2
+    53a0:	8340      	ld.b      	r2, (r3, 0x0)
+    53a2:	45a8      	lsli      	r5, r5, 8
+	if(crc_temp != CRC16(&data[3],lens-5))
+    53a4:	2904      	subi      	r1, 5
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+    53a6:	6148      	addu      	r5, r2
+	if(crc_temp != CRC16(&data[3],lens-5))
+    53a8:	7445      	zexth      	r1, r1
+    53aa:	2002      	addi      	r0, 3
+    53ac:	e3ffff80 	bsr      	0x52ac	// 52ac <CRC16>
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+    53b0:	7555      	zexth      	r5, r5
+	if(crc_temp != CRC16(&data[3],lens-5))
+    53b2:	6416      	cmpne      	r5, r0
+    53b4:	6cc3      	mov      	r3, r0
+    53b6:	0c07      	bf      	0x53c4	// 53c4 <Card_Recv_Pro+0x6c>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro CRC Err: %04X  %04X",crc_temp,CRC16(&data[3],lens-5));
+    53b8:	6c97      	mov      	r2, r5
+    53ba:	102a      	lrw      	r1, 0x63e2	// 53e0 <Card_Recv_Pro+0x88>
+    53bc:	3000      	movi      	r0, 0
+    53be:	e3fff905 	bsr      	0x45c8	// 45c8 <Dbg_Println>
+    53c2:	07d7      	br      	0x5370	// 5370 <Card_Recv_Pro+0x18>
+	switch(data[6])
+    53c4:	8466      	ld.b      	r3, (r4, 0x6)
+    53c6:	3b45      	cmpnei      	r3, 5
+    53c8:	0803      	bt      	0x53ce	// 53ce <Card_Recv_Pro+0x76>
+			Read_Version_Ack();
+    53ca:	e3ffff8f 	bsr      	0x52e8	// 52e8 <Read_Version_Ack>
+	return 0;
+    53ce:	3000      	movi      	r0, 0
+    53d0:	07d1      	br      	0x5372	// 5372 <Card_Recv_Pro+0x1a>
+    53d2:	0000      	bkpt
+    53d4:	0000639d 	.long	0x0000639d
+    53d8:	000063b4 	.long	0x000063b4
+    53dc:	000063cb 	.long	0x000063cb
+    53e0:	000063e2 	.long	0x000063e2
+
+Disassembly of section .text.button_init:
+
+000053e4 <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    53e4:	14d4      	push      	r4-r7, r15
+    53e6:	6dc7      	mov      	r7, r1
+    53e8:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    53ea:	3100      	movi      	r1, 0
+    53ec:	3230      	movi      	r2, 48
+{
+    53ee:	6d03      	mov      	r4, r0
+    53f0:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    53f2:	e3ffe315 	bsr      	0x1a1c	// 1a1c <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    53f6:	3300      	movi      	r3, 0
+    53f8:	2b6f      	subi      	r3, 112
+    53fa:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    53fc:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    53fe:	6c17      	mov      	r0, r5
+    5400:	7bdd      	jsr      	r7
+    5402:	8443      	ld.b      	r2, (r4, 0x3)
+    5404:	337f      	movi      	r3, 127
+    5406:	688c      	and      	r2, r3
+    5408:	4007      	lsli      	r0, r0, 7
+    540a:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    540c:	3201      	movi      	r2, 1
+    540e:	6988      	and      	r6, r2
+    5410:	7480      	zextb      	r2, r0
+    5412:	46c6      	lsli      	r6, r6, 6
+    5414:	3a86      	bclri      	r2, 6
+    5416:	6c98      	or      	r2, r6
+    5418:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    541a:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    541c:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+0000541e <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    541e:	2102      	addi      	r1, 3
+    5420:	4122      	lsli      	r1, r1, 2
+    5422:	6040      	addu      	r1, r0
+    5424:	b140      	st.w      	r2, (r1, 0x0)
+}
+    5426:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00005428 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    5428:	14d3      	push      	r4-r6, r15
+    542a:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    542c:	9462      	ld.w      	r3, (r4, 0x8)
+    542e:	8004      	ld.b      	r0, (r0, 0x4)
+    5430:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    5432:	8463      	ld.b      	r3, (r4, 0x3)
+    5434:	433d      	lsli      	r1, r3, 29
+    5436:	493d      	lsri      	r1, r1, 29
+    5438:	3940      	cmpnei      	r1, 0
+    543a:	0c04      	bf      	0x5442	// 5442 <button_handler+0x1a>
+    543c:	8c40      	ld.h      	r2, (r4, 0x0)
+    543e:	2200      	addi      	r2, 1
+    5440:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    5442:	4b47      	lsri      	r2, r3, 7
+    5444:	640a      	cmpne      	r2, r0
+    5446:	0c21      	bf      	0x5488	// 5488 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    5448:	435a      	lsli      	r2, r3, 26
+    544a:	4a5d      	lsri      	r2, r2, 29
+    544c:	3507      	movi      	r5, 7
+    544e:	2200      	addi      	r2, 1
+    5450:	6894      	and      	r2, r5
+    5452:	7488      	zextb      	r2, r2
+    5454:	6948      	and      	r5, r2
+    5456:	45c3      	lsli      	r6, r5, 3
+    5458:	3538      	movi      	r5, 56
+    545a:	68d5      	andn      	r3, r5
+    545c:	6d8c      	or      	r6, r3
+    545e:	3a02      	cmphsi      	r2, 3
+    5460:	a4c3      	st.b      	r6, (r4, 0x3)
+    5462:	0c09      	bf      	0x5474	// 5474 <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    5464:	4067      	lsli      	r3, r0, 7
+    5466:	327f      	movi      	r2, 127
+    5468:	8403      	ld.b      	r0, (r4, 0x3)
+    546a:	6808      	and      	r0, r2
+    546c:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    546e:	7400      	zextb      	r0, r0
+    5470:	6815      	andn      	r0, r5
+    5472:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    5474:	3941      	cmpnei      	r1, 1
+    5476:	0c2f      	bf      	0x54d4	// 54d4 <button_handler+0xac>
+    5478:	3940      	cmpnei      	r1, 0
+    547a:	0c0b      	bf      	0x5490	// 5490 <button_handler+0x68>
+    547c:	3945      	cmpnei      	r1, 5
+    547e:	0c53      	bf      	0x5524	// 5524 <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    5480:	8463      	ld.b      	r3, (r4, 0x3)
+    5482:	3207      	movi      	r2, 7
+    5484:	68c9      	andn      	r3, r2
+    5486:	0420      	br      	0x54c6	// 54c6 <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    5488:	3238      	movi      	r2, 56
+    548a:	68c9      	andn      	r3, r2
+    548c:	a463      	st.b      	r3, (r4, 0x3)
+    548e:	07f3      	br      	0x5474	// 5474 <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    5490:	8463      	ld.b      	r3, (r4, 0x3)
+    5492:	4359      	lsli      	r2, r3, 25
+    5494:	4a5f      	lsri      	r2, r2, 31
+    5496:	4b67      	lsri      	r3, r3, 7
+    5498:	648e      	cmpne      	r3, r2
+    549a:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    549c:	320f      	movi      	r2, 15
+    549e:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    54a0:	0815      	bt      	0x54ca	// 54ca <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    54a2:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    54a4:	9463      	ld.w      	r3, (r4, 0xc)
+    54a6:	3b40      	cmpnei      	r3, 0
+    54a8:	0c03      	bf      	0x54ae	// 54ae <button_handler+0x86>
+    54aa:	6c13      	mov      	r0, r4
+    54ac:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    54ae:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    54b0:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    54b2:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    54b4:	330f      	movi      	r3, 15
+    54b6:	688d      	andn      	r2, r3
+    54b8:	3101      	movi      	r1, 1
+    54ba:	6c84      	or      	r2, r1
+    54bc:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    54be:	8463      	ld.b      	r3, (r4, 0x3)
+    54c0:	3207      	movi      	r2, 7
+    54c2:	68c9      	andn      	r3, r2
+    54c4:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    54c6:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    54c8:	0405      	br      	0x54d2	// 54d2 <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    54ca:	3200      	movi      	r2, 0
+    54cc:	2a6f      	subi      	r2, 112
+    54ce:	6cc8      	or      	r3, r2
+    54d0:	a462      	st.b      	r3, (r4, 0x2)
+}
+    54d2:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    54d4:	8463      	ld.b      	r3, (r4, 0x3)
+    54d6:	4359      	lsli      	r2, r3, 25
+    54d8:	4a5f      	lsri      	r2, r2, 31
+    54da:	4b67      	lsri      	r3, r3, 7
+    54dc:	648e      	cmpne      	r3, r2
+    54de:	0c0e      	bf      	0x54fa	// 54fa <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    54e0:	8462      	ld.b      	r3, (r4, 0x2)
+    54e2:	320f      	movi      	r2, 15
+    54e4:	68c8      	and      	r3, r2
+    54e6:	3ba4      	bseti      	r3, 4
+    54e8:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    54ea:	9464      	ld.w      	r3, (r4, 0x10)
+    54ec:	3b40      	cmpnei      	r3, 0
+    54ee:	0c03      	bf      	0x54f4	// 54f4 <button_handler+0xcc>
+    54f0:	6c13      	mov      	r0, r4
+    54f2:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    54f4:	3300      	movi      	r3, 0
+    54f6:	ac60      	st.h      	r3, (r4, 0x0)
+    54f8:	07c4      	br      	0x5480	// 5480 <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    54fa:	8c40      	ld.h      	r2, (r4, 0x0)
+    54fc:	33c8      	movi      	r3, 200
+    54fe:	648c      	cmphs      	r3, r2
+    5500:	0be9      	bt      	0x54d2	// 54d2 <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    5502:	8462      	ld.b      	r3, (r4, 0x2)
+    5504:	320f      	movi      	r2, 15
+    5506:	68c8      	and      	r3, r2
+    5508:	3ba4      	bseti      	r3, 4
+    550a:	3ba6      	bseti      	r3, 6
+    550c:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    550e:	9468      	ld.w      	r3, (r4, 0x20)
+    5510:	3b40      	cmpnei      	r3, 0
+    5512:	0c03      	bf      	0x5518	// 5518 <button_handler+0xf0>
+    5514:	6c13      	mov      	r0, r4
+    5516:	7bcd      	jsr      	r3
+			handle->state = 5;
+    5518:	8463      	ld.b      	r3, (r4, 0x3)
+    551a:	3207      	movi      	r2, 7
+    551c:	68c9      	andn      	r3, r2
+    551e:	3ba0      	bseti      	r3, 0
+    5520:	3ba2      	bseti      	r3, 2
+    5522:	07d2      	br      	0x54c6	// 54c6 <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    5524:	8463      	ld.b      	r3, (r4, 0x3)
+    5526:	4359      	lsli      	r2, r3, 25
+    5528:	4a5f      	lsri      	r2, r2, 31
+    552a:	4b67      	lsri      	r3, r3, 7
+    552c:	648e      	cmpne      	r3, r2
+    552e:	0fd2      	bf      	0x54d2	// 54d2 <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    5530:	8462      	ld.b      	r3, (r4, 0x2)
+    5532:	320f      	movi      	r2, 15
+    5534:	68c8      	and      	r3, r2
+    5536:	3270      	movi      	r2, 112
+    5538:	6cc8      	or      	r3, r2
+    553a:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    553c:	946a      	ld.w      	r3, (r4, 0x28)
+    553e:	3b40      	cmpnei      	r3, 0
+    5540:	0fa0      	bf      	0x5480	// 5480 <button_handler+0x58>
+    5542:	6c13      	mov      	r0, r4
+    5544:	7bcd      	jsr      	r3
+    5546:	079d      	br      	0x5480	// 5480 <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00005548 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    5548:	1068      	lrw      	r3, 0x200002f8	// 5568 <button_start+0x20>
+    554a:	9320      	ld.w      	r1, (r3, 0x0)
+    554c:	6c87      	mov      	r2, r1
+	while(target) {
+    554e:	3a40      	cmpnei      	r2, 0
+    5550:	0805      	bt      	0x555a	// 555a <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    5552:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    5554:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    5556:	3000      	movi      	r0, 0
+}
+    5558:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    555a:	640a      	cmpne      	r2, r0
+    555c:	0c03      	bf      	0x5562	// 5562 <button_start+0x1a>
+		target = target->next;
+    555e:	924b      	ld.w      	r2, (r2, 0x2c)
+    5560:	07f7      	br      	0x554e	// 554e <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    5562:	3000      	movi      	r0, 0
+    5564:	2800      	subi      	r0, 1
+    5566:	07f9      	br      	0x5558	// 5558 <button_start+0x10>
+    5568:	200002f8 	.long	0x200002f8
+
+Disassembly of section .text.button_ticks:
+
+0000556c <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    556c:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    556e:	1066      	lrw      	r3, 0x200002f8	// 5584 <button_ticks+0x18>
+    5570:	9380      	ld.w      	r4, (r3, 0x0)
+    5572:	3c40      	cmpnei      	r4, 0
+    5574:	0802      	bt      	0x5578	// 5578 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    5576:	1491      	pop      	r4, r15
+		button_handler(target);
+    5578:	6c13      	mov      	r0, r4
+    557a:	e3ffff57 	bsr      	0x5428	// 5428 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    557e:	948b      	ld.w      	r4, (r4, 0x2c)
+    5580:	07f9      	br      	0x5572	// 5572 <button_ticks+0x6>
+    5582:	0000      	bkpt
+    5584:	200002f8 	.long	0x200002f8
+
+Disassembly of section .text.read_button_GPIO:
+
+00005588 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    5588:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    558a:	1064      	lrw      	r3, 0x2000004c	// 5598 <read_button_GPIO+0x10>
+{
+    558c:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    558e:	9300      	ld.w      	r0, (r3, 0x0)
+    5590:	e3ffeef2 	bsr      	0x3374	// 3374 <GPIO_Read_Status>
+	return state;
+    5594:	1490      	pop      	r15
+    5596:	0000      	bkpt
+    5598:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+0000559c <TK_Sampling_prog>:
+    559c:	14c4      	push      	r4-r7
+    559e:	1072      	lrw      	r3, 0x20000054	// 55e4 <TK_Sampling_prog+0x48>
+    55a0:	1012      	lrw      	r0, 0x20000746	// 55e8 <TK_Sampling_prog+0x4c>
+    55a2:	1093      	lrw      	r4, 0x200005b7	// 55ec <TK_Sampling_prog+0x50>
+    55a4:	6d83      	mov      	r6, r0
+    55a6:	93a0      	ld.w      	r5, (r3, 0x0)
+    55a8:	3300      	movi      	r3, 0
+    55aa:	4342      	lsli      	r2, r3, 2
+    55ac:	6094      	addu      	r2, r5
+    55ae:	9220      	ld.w      	r1, (r2, 0x0)
+    55b0:	4341      	lsli      	r2, r3, 1
+    55b2:	6080      	addu      	r2, r0
+    55b4:	7445      	zexth      	r1, r1
+    55b6:	aa20      	st.h      	r1, (r2, 0x0)
+    55b8:	8440      	ld.b      	r2, (r4, 0x0)
+    55ba:	3a41      	cmpnei      	r2, 1
+    55bc:	080f      	bt      	0x55da	// 55da <TK_Sampling_prog+0x3e>
+    55be:	3300      	movi      	r3, 0
+    55c0:	10ec      	lrw      	r7, 0x200004a0	// 55f0 <TK_Sampling_prog+0x54>
+    55c2:	4341      	lsli      	r2, r3, 1
+    55c4:	5e28      	addu      	r1, r6, r2
+    55c6:	8920      	ld.h      	r1, (r1, 0x0)
+    55c8:	2300      	addi      	r3, 1
+    55ca:	7445      	zexth      	r1, r1
+    55cc:	609c      	addu      	r2, r7
+    55ce:	3b51      	cmpnei      	r3, 17
+    55d0:	aa20      	st.h      	r1, (r2, 0x0)
+    55d2:	0bf8      	bt      	0x55c2	// 55c2 <TK_Sampling_prog+0x26>
+    55d4:	3300      	movi      	r3, 0
+    55d6:	a460      	st.b      	r3, (r4, 0x0)
+    55d8:	3311      	movi      	r3, 17
+    55da:	2300      	addi      	r3, 1
+    55dc:	74cc      	zextb      	r3, r3
+    55de:	3b10      	cmphsi      	r3, 17
+    55e0:	0fe5      	bf      	0x55aa	// 55aa <TK_Sampling_prog+0xe>
+    55e2:	1484      	pop      	r4-r7
+    55e4:	20000054 	.long	0x20000054
+    55e8:	20000746 	.long	0x20000746
+    55ec:	200005b7 	.long	0x200005b7
+    55f0:	200004a0 	.long	0x200004a0
+
+Disassembly of section .text.TKEYIntHandler:
+
+000055f4 <TKEYIntHandler>:
+    55f4:	1460      	nie
+    55f6:	1462      	ipush
+    55f8:	14d1      	push      	r4, r15
+    55fa:	109e      	lrw      	r4, 0x2000006c	// 5670 <TKEYIntHandler+0x7c>
+    55fc:	9460      	ld.w      	r3, (r4, 0x0)
+    55fe:	3b40      	cmpnei      	r3, 0
+    5600:	080b      	bt      	0x5616	// 5616 <TKEYIntHandler+0x22>
+    5602:	3301      	movi      	r3, 1
+    5604:	b460      	st.w      	r3, (r4, 0x0)
+    5606:	107c      	lrw      	r3, 0x20000534	// 5674 <TKEYIntHandler+0x80>
+    5608:	8360      	ld.b      	r3, (r3, 0x0)
+    560a:	3b41      	cmpnei      	r3, 1
+    560c:	0805      	bt      	0x5616	// 5616 <TKEYIntHandler+0x22>
+    560e:	e3ffffc7 	bsr      	0x559c	// 559c <TK_Sampling_prog>
+    5612:	3301      	movi      	r3, 1
+    5614:	a464      	st.b      	r3, (r4, 0x4)
+    5616:	1079      	lrw      	r3, 0x20000058	// 5678 <TKEYIntHandler+0x84>
+    5618:	3101      	movi      	r1, 1
+    561a:	9360      	ld.w      	r3, (r3, 0x0)
+    561c:	934a      	ld.w      	r2, (r3, 0x28)
+    561e:	6884      	and      	r2, r1
+    5620:	3a40      	cmpnei      	r2, 0
+    5622:	0c02      	bf      	0x5626	// 5626 <TKEYIntHandler+0x32>
+    5624:	b32c      	st.w      	r1, (r3, 0x30)
+    5626:	934a      	ld.w      	r2, (r3, 0x28)
+    5628:	3102      	movi      	r1, 2
+    562a:	6884      	and      	r2, r1
+    562c:	3a40      	cmpnei      	r2, 0
+    562e:	0c02      	bf      	0x5632	// 5632 <TKEYIntHandler+0x3e>
+    5630:	b32c      	st.w      	r1, (r3, 0x30)
+    5632:	934a      	ld.w      	r2, (r3, 0x28)
+    5634:	3104      	movi      	r1, 4
+    5636:	6884      	and      	r2, r1
+    5638:	3a40      	cmpnei      	r2, 0
+    563a:	0c02      	bf      	0x563e	// 563e <TKEYIntHandler+0x4a>
+    563c:	b32c      	st.w      	r1, (r3, 0x30)
+    563e:	934a      	ld.w      	r2, (r3, 0x28)
+    5640:	3108      	movi      	r1, 8
+    5642:	6884      	and      	r2, r1
+    5644:	3a40      	cmpnei      	r2, 0
+    5646:	0c02      	bf      	0x564a	// 564a <TKEYIntHandler+0x56>
+    5648:	b32c      	st.w      	r1, (r3, 0x30)
+    564a:	934a      	ld.w      	r2, (r3, 0x28)
+    564c:	3110      	movi      	r1, 16
+    564e:	6884      	and      	r2, r1
+    5650:	3a40      	cmpnei      	r2, 0
+    5652:	0c02      	bf      	0x5656	// 5656 <TKEYIntHandler+0x62>
+    5654:	b32c      	st.w      	r1, (r3, 0x30)
+    5656:	934a      	ld.w      	r2, (r3, 0x28)
+    5658:	3120      	movi      	r1, 32
+    565a:	6884      	and      	r2, r1
+    565c:	3a40      	cmpnei      	r2, 0
+    565e:	0c02      	bf      	0x5662	// 5662 <TKEYIntHandler+0x6e>
+    5660:	b32c      	st.w      	r1, (r3, 0x30)
+    5662:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    5666:	9880      	ld.w      	r4, (r14, 0x0)
+    5668:	1402      	addi      	r14, r14, 8
+    566a:	1463      	ipop
+    566c:	1461      	nir
+    566e:	0000      	bkpt
+    5670:	2000006c 	.long	0x2000006c
+    5674:	20000534 	.long	0x20000534
+    5678:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+0000567c <get_key_number>:
+    567c:	14c2      	push      	r4-r5
+    567e:	3200      	movi      	r2, 0
+    5680:	3000      	movi      	r0, 0
+    5682:	1088      	lrw      	r4, 0x200005d4	// 56a0 <get_key_number+0x24>
+    5684:	3501      	movi      	r5, 1
+    5686:	3120      	movi      	r1, 32
+    5688:	9460      	ld.w      	r3, (r4, 0x0)
+    568a:	70c9      	lsr      	r3, r2
+    568c:	68d4      	and      	r3, r5
+    568e:	3b40      	cmpnei      	r3, 0
+    5690:	0c02      	bf      	0x5694	// 5694 <get_key_number+0x18>
+    5692:	2000      	addi      	r0, 1
+    5694:	2200      	addi      	r2, 1
+    5696:	644a      	cmpne      	r2, r1
+    5698:	0bf8      	bt      	0x5688	// 5688 <get_key_number+0xc>
+    569a:	7400      	zextb      	r0, r0
+    569c:	1482      	pop      	r4-r5
+    569e:	0000      	bkpt
+    56a0:	200005d4 	.long	0x200005d4
+
+Disassembly of section .text.TK_Scan_Start:
+
+000056a4 <TK_Scan_Start>:
+    56a4:	1046      	lrw      	r2, 0x2000006c	// 56bc <TK_Scan_Start+0x18>
+    56a6:	8264      	ld.b      	r3, (r2, 0x4)
+    56a8:	74cc      	zextb      	r3, r3
+    56aa:	3b41      	cmpnei      	r3, 1
+    56ac:	0807      	bt      	0x56ba	// 56ba <TK_Scan_Start+0x16>
+    56ae:	1025      	lrw      	r1, 0x20000058	// 56c0 <TK_Scan_Start+0x1c>
+    56b0:	9120      	ld.w      	r1, (r1, 0x0)
+    56b2:	b162      	st.w      	r3, (r1, 0x8)
+    56b4:	3300      	movi      	r3, 0
+    56b6:	b260      	st.w      	r3, (r2, 0x0)
+    56b8:	a264      	st.b      	r3, (r2, 0x4)
+    56ba:	783c      	jmp      	r15
+    56bc:	2000006c 	.long	0x2000006c
+    56c0:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000056c4 <TK_Keymap_prog>:
+    56c4:	14d4      	push      	r4-r7, r15
+    56c6:	1425      	subi      	r14, r14, 20
+    56c8:	1271      	lrw      	r3, 0x20000328	// 580c <TK_Keymap_prog+0x148>
+    56ca:	8360      	ld.b      	r3, (r3, 0x0)
+    56cc:	b860      	st.w      	r3, (r14, 0x0)
+    56ce:	3400      	movi      	r4, 0
+    56d0:	1270      	lrw      	r3, 0x200002fc	// 5810 <TK_Keymap_prog+0x14c>
+    56d2:	8360      	ld.b      	r3, (r3, 0x0)
+    56d4:	b861      	st.w      	r3, (r14, 0x4)
+    56d6:	12f0      	lrw      	r7, 0x2000054a	// 5814 <TK_Keymap_prog+0x150>
+    56d8:	1270      	lrw      	r3, 0x20000305	// 5818 <TK_Keymap_prog+0x154>
+    56da:	83a0      	ld.b      	r5, (r3, 0x0)
+    56dc:	1270      	lrw      	r3, 0x20000304	// 581c <TK_Keymap_prog+0x158>
+    56de:	8360      	ld.b      	r3, (r3, 0x0)
+    56e0:	b862      	st.w      	r3, (r14, 0x8)
+    56e2:	6d9f      	mov      	r6, r7
+    56e4:	126f      	lrw      	r3, 0x20000746	// 5820 <TK_Keymap_prog+0x15c>
+    56e6:	b863      	st.w      	r3, (r14, 0xc)
+    56e8:	4461      	lsli      	r3, r4, 1
+    56ea:	9843      	ld.w      	r2, (r14, 0xc)
+    56ec:	608c      	addu      	r2, r3
+    56ee:	122e      	lrw      	r1, 0x200004a0	// 5824 <TK_Keymap_prog+0x160>
+    56f0:	604c      	addu      	r1, r3
+    56f2:	8a40      	ld.h      	r2, (r2, 0x0)
+    56f4:	8920      	ld.h      	r1, (r1, 0x0)
+    56f6:	6086      	subu      	r2, r1
+    56f8:	748b      	sexth      	r2, r2
+    56fa:	5f2c      	addu      	r1, r7, r3
+    56fc:	a940      	st.h      	r2, (r1, 0x0)
+    56fe:	8940      	ld.h      	r2, (r1, 0x0)
+    5700:	748b      	sexth      	r2, r2
+    5702:	3adf      	btsti      	r2, 31
+    5704:	1249      	lrw      	r2, 0x20000702	// 5828 <TK_Keymap_prog+0x164>
+    5706:	608c      	addu      	r2, r3
+    5708:	0c37      	bf      	0x5776	// 5776 <TK_Keymap_prog+0xb2>
+    570a:	3100      	movi      	r1, 0
+    570c:	aa20      	st.h      	r1, (r2, 0x0)
+    570e:	9840      	ld.w      	r2, (r14, 0x0)
+    5710:	3a01      	cmphsi      	r2, 2
+    5712:	0c6d      	bf      	0x57ec	// 57ec <TK_Keymap_prog+0x128>
+    5714:	4461      	lsli      	r3, r4, 1
+    5716:	5e2c      	addu      	r1, r6, r3
+    5718:	1205      	lrw      	r0, 0x20000356	// 582c <TK_Keymap_prog+0x168>
+    571a:	8940      	ld.h      	r2, (r1, 0x0)
+    571c:	60c0      	addu      	r3, r0
+    571e:	748b      	sexth      	r2, r2
+    5720:	8b60      	ld.h      	r3, (r3, 0x0)
+    5722:	648d      	cmplt      	r3, r2
+    5724:	9840      	ld.w      	r2, (r14, 0x0)
+    5726:	7cc8      	mult      	r3, r2
+    5728:	0c2a      	bf      	0x577c	// 577c <TK_Keymap_prog+0xb8>
+    572a:	8940      	ld.h      	r2, (r1, 0x0)
+    572c:	748b      	sexth      	r2, r2
+    572e:	64c9      	cmplt      	r2, r3
+    5730:	0c26      	bf      	0x577c	// 577c <TK_Keymap_prog+0xb8>
+    5732:	1240      	lrw      	r2, 0x20000538	// 5830 <TK_Keymap_prog+0x16c>
+    5734:	6090      	addu      	r2, r4
+    5736:	8260      	ld.b      	r3, (r2, 0x0)
+    5738:	2300      	addi      	r3, 1
+    573a:	74cc      	zextb      	r3, r3
+    573c:	a260      	st.b      	r3, (r2, 0x0)
+    573e:	3100      	movi      	r1, 0
+    5740:	117d      	lrw      	r3, 0x2000051e	// 5834 <TK_Keymap_prog+0x170>
+    5742:	60d0      	addu      	r3, r4
+    5744:	a320      	st.b      	r1, (r3, 0x0)
+    5746:	117d      	lrw      	r3, 0x200005fa	// 5838 <TK_Keymap_prog+0x174>
+    5748:	60d0      	addu      	r3, r4
+    574a:	a320      	st.b      	r1, (r3, 0x0)
+    574c:	117c      	lrw      	r3, 0x20000674	// 583c <TK_Keymap_prog+0x178>
+    574e:	60d0      	addu      	r3, r4
+    5750:	a320      	st.b      	r1, (r3, 0x0)
+    5752:	8260      	ld.b      	r3, (r2, 0x0)
+    5754:	9821      	ld.w      	r1, (r14, 0x4)
+    5756:	64c4      	cmphs      	r1, r3
+    5758:	081f      	bt      	0x5796	// 5796 <TK_Keymap_prog+0xd2>
+    575a:	3d40      	cmpnei      	r5, 0
+    575c:	0852      	bt      	0x5800	// 5800 <TK_Keymap_prog+0x13c>
+    575e:	1139      	lrw      	r1, 0x20000530	// 5840 <TK_Keymap_prog+0x17c>
+    5760:	9160      	ld.w      	r3, (r1, 0x0)
+    5762:	3b40      	cmpnei      	r3, 0
+    5764:	0806      	bt      	0x5770	// 5770 <TK_Keymap_prog+0xac>
+    5766:	9100      	ld.w      	r0, (r1, 0x0)
+    5768:	3301      	movi      	r3, 1
+    576a:	70d0      	lsl      	r3, r4
+    576c:	6cc0      	or      	r3, r0
+    576e:	b160      	st.w      	r3, (r1, 0x0)
+    5770:	3300      	movi      	r3, 0
+    5772:	a260      	st.b      	r3, (r2, 0x0)
+    5774:	0411      	br      	0x5796	// 5796 <TK_Keymap_prog+0xd2>
+    5776:	8920      	ld.h      	r1, (r1, 0x0)
+    5778:	7445      	zexth      	r1, r1
+    577a:	07c9      	br      	0x570c	// 570c <TK_Keymap_prog+0x48>
+    577c:	4441      	lsli      	r2, r4, 1
+    577e:	6098      	addu      	r2, r6
+    5780:	8a40      	ld.h      	r2, (r2, 0x0)
+    5782:	748b      	sexth      	r2, r2
+    5784:	648d      	cmplt      	r3, r2
+    5786:	0c08      	bf      	0x5796	// 5796 <TK_Keymap_prog+0xd2>
+    5788:	3300      	movi      	r3, 0
+    578a:	114e      	lrw      	r2, 0x20000530	// 5840 <TK_Keymap_prog+0x17c>
+    578c:	2b01      	subi      	r3, 2
+    578e:	9220      	ld.w      	r1, (r2, 0x0)
+    5790:	70d3      	rotl      	r3, r4
+    5792:	68c4      	and      	r3, r1
+    5794:	b260      	st.w      	r3, (r2, 0x0)
+    5796:	4441      	lsli      	r2, r4, 1
+    5798:	5e68      	addu      	r3, r6, r2
+    579a:	8b60      	ld.h      	r3, (r3, 0x0)
+    579c:	74cf      	sexth      	r3, r3
+    579e:	b864      	st.w      	r3, (r14, 0x10)
+    57a0:	3105      	movi      	r1, 5
+    57a2:	1163      	lrw      	r3, 0x20000356	// 582c <TK_Keymap_prog+0x168>
+    57a4:	608c      	addu      	r2, r3
+    57a6:	8a00      	ld.h      	r0, (r2, 0x0)
+    57a8:	4002      	lsli      	r0, r0, 2
+    57aa:	e3fff625 	bsr      	0x43f4	// 43f4 <__divsi3>
+    57ae:	9864      	ld.w      	r3, (r14, 0x10)
+    57b0:	640d      	cmplt      	r3, r0
+    57b2:	0c18      	bf      	0x57e2	// 57e2 <TK_Keymap_prog+0x11e>
+    57b4:	1140      	lrw      	r2, 0x2000051e	// 5834 <TK_Keymap_prog+0x170>
+    57b6:	6090      	addu      	r2, r4
+    57b8:	8260      	ld.b      	r3, (r2, 0x0)
+    57ba:	2300      	addi      	r3, 1
+    57bc:	74cc      	zextb      	r3, r3
+    57be:	a260      	st.b      	r3, (r2, 0x0)
+    57c0:	3100      	movi      	r1, 0
+    57c2:	107c      	lrw      	r3, 0x20000538	// 5830 <TK_Keymap_prog+0x16c>
+    57c4:	60d0      	addu      	r3, r4
+    57c6:	a320      	st.b      	r1, (r3, 0x0)
+    57c8:	8260      	ld.b      	r3, (r2, 0x0)
+    57ca:	9822      	ld.w      	r1, (r14, 0x8)
+    57cc:	64c4      	cmphs      	r1, r3
+    57ce:	080a      	bt      	0x57e2	// 57e2 <TK_Keymap_prog+0x11e>
+    57d0:	3300      	movi      	r3, 0
+    57d2:	103c      	lrw      	r1, 0x20000530	// 5840 <TK_Keymap_prog+0x17c>
+    57d4:	2b01      	subi      	r3, 2
+    57d6:	9100      	ld.w      	r0, (r1, 0x0)
+    57d8:	70d3      	rotl      	r3, r4
+    57da:	68c0      	and      	r3, r0
+    57dc:	b160      	st.w      	r3, (r1, 0x0)
+    57de:	3300      	movi      	r3, 0
+    57e0:	a260      	st.b      	r3, (r2, 0x0)
+    57e2:	2400      	addi      	r4, 1
+    57e4:	3c51      	cmpnei      	r4, 17
+    57e6:	0b81      	bt      	0x56e8	// 56e8 <TK_Keymap_prog+0x24>
+    57e8:	1405      	addi      	r14, r14, 20
+    57ea:	1494      	pop      	r4-r7, r15
+    57ec:	60d8      	addu      	r3, r6
+    57ee:	4441      	lsli      	r2, r4, 1
+    57f0:	102f      	lrw      	r1, 0x20000356	// 582c <TK_Keymap_prog+0x168>
+    57f2:	8b60      	ld.h      	r3, (r3, 0x0)
+    57f4:	6084      	addu      	r2, r1
+    57f6:	74cf      	sexth      	r3, r3
+    57f8:	8a40      	ld.h      	r2, (r2, 0x0)
+    57fa:	64c9      	cmplt      	r2, r3
+    57fc:	0fcd      	bf      	0x5796	// 5796 <TK_Keymap_prog+0xd2>
+    57fe:	079a      	br      	0x5732	// 5732 <TK_Keymap_prog+0x6e>
+    5800:	3d41      	cmpnei      	r5, 1
+    5802:	0bb7      	bt      	0x5770	// 5770 <TK_Keymap_prog+0xac>
+    5804:	102f      	lrw      	r1, 0x20000530	// 5840 <TK_Keymap_prog+0x17c>
+    5806:	6cd7      	mov      	r3, r5
+    5808:	9100      	ld.w      	r0, (r1, 0x0)
+    580a:	07b0      	br      	0x576a	// 576a <TK_Keymap_prog+0xa6>
+    580c:	20000328 	.long	0x20000328
+    5810:	200002fc 	.long	0x200002fc
+    5814:	2000054a 	.long	0x2000054a
+    5818:	20000305 	.long	0x20000305
+    581c:	20000304 	.long	0x20000304
+    5820:	20000746 	.long	0x20000746
+    5824:	200004a0 	.long	0x200004a0
+    5828:	20000702 	.long	0x20000702
+    582c:	20000356 	.long	0x20000356
+    5830:	20000538 	.long	0x20000538
+    5834:	2000051e 	.long	0x2000051e
+    5838:	200005fa 	.long	0x200005fa
+    583c:	20000674 	.long	0x20000674
+    5840:	20000530 	.long	0x20000530
+
+Disassembly of section .text.TK_overflow_predict:
+
+00005844 <TK_overflow_predict>:
+    5844:	14d4      	push      	r4-r7, r15
+    5846:	1421      	subi      	r14, r14, 4
+    5848:	11d9      	lrw      	r6, 0x2000006c	// 592c <TK_overflow_predict+0xe8>
+    584a:	8665      	ld.b      	r3, (r6, 0x5)
+    584c:	3b41      	cmpnei      	r3, 1
+    584e:	085f      	bt      	0x590c	// 590c <TK_overflow_predict+0xc8>
+    5850:	1158      	lrw      	r2, 0x20000650	// 5930 <TK_overflow_predict+0xec>
+    5852:	8260      	ld.b      	r3, (r2, 0x0)
+    5854:	2300      	addi      	r3, 1
+    5856:	74cc      	zextb      	r3, r3
+    5858:	a260      	st.b      	r3, (r2, 0x0)
+    585a:	8260      	ld.b      	r3, (r2, 0x0)
+    585c:	1136      	lrw      	r1, 0x20000329	// 5934 <TK_overflow_predict+0xf0>
+    585e:	8120      	ld.b      	r1, (r1, 0x0)
+    5860:	64c4      	cmphs      	r1, r3
+    5862:	0855      	bt      	0x590c	// 590c <TK_overflow_predict+0xc8>
+    5864:	3300      	movi      	r3, 0
+    5866:	a260      	st.b      	r3, (r2, 0x0)
+    5868:	3500      	movi      	r5, 0
+    586a:	11f4      	lrw      	r7, 0x2000032c	// 5938 <TK_overflow_predict+0xf4>
+    586c:	2605      	addi      	r6, 6
+    586e:	9760      	ld.w      	r3, (r7, 0x0)
+    5870:	70d5      	lsr      	r3, r5
+    5872:	3201      	movi      	r2, 1
+    5874:	68c8      	and      	r3, r2
+    5876:	3b40      	cmpnei      	r3, 0
+    5878:	0c34      	bf      	0x58e0	// 58e0 <TK_overflow_predict+0x9c>
+    587a:	4581      	lsli      	r4, r5, 1
+    587c:	5e70      	addu      	r3, r6, r4
+    587e:	8b00      	ld.h      	r0, (r3, 0x0)
+    5880:	e3ffde90 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    5884:	6cc7      	mov      	r3, r1
+    5886:	3180      	movi      	r1, 128
+    5888:	6c83      	mov      	r2, r0
+    588a:	4137      	lsli      	r1, r1, 23
+    588c:	3000      	movi      	r0, 0
+    588e:	e3ffd493 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    5892:	116b      	lrw      	r3, 0x20000332	// 593c <TK_overflow_predict+0xf8>
+    5894:	60d0      	addu      	r3, r4
+    5896:	8b60      	ld.h      	r3, (r3, 0x0)
+    5898:	4364      	lsli      	r3, r3, 4
+    589a:	230e      	addi      	r3, 15
+    589c:	b860      	st.w      	r3, (r14, 0x0)
+    589e:	e3ffda39 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    58a2:	9860      	ld.w      	r3, (r14, 0x0)
+    58a4:	7cc0      	mult      	r3, r0
+    58a6:	1147      	lrw      	r2, 0x200006e0	// 5940 <TK_overflow_predict+0xfc>
+    58a8:	740d      	zexth      	r0, r3
+    58aa:	6090      	addu      	r2, r4
+    58ac:	1166      	lrw      	r3, 0x20000746	// 5944 <TK_overflow_predict+0x100>
+    58ae:	60d0      	addu      	r3, r4
+    58b0:	aa00      	st.h      	r0, (r2, 0x0)
+    58b2:	8b60      	ld.h      	r3, (r3, 0x0)
+    58b4:	8a00      	ld.h      	r0, (r2, 0x0)
+    58b6:	7401      	zexth      	r0, r0
+    58b8:	325f      	movi      	r2, 95
+    58ba:	74cd      	zexth      	r3, r3
+    58bc:	7c08      	mult      	r0, r2
+    58be:	3164      	movi      	r1, 100
+    58c0:	b860      	st.w      	r3, (r14, 0x0)
+    58c2:	e3fff599 	bsr      	0x43f4	// 43f4 <__divsi3>
+    58c6:	9860      	ld.w      	r3, (r14, 0x0)
+    58c8:	64c1      	cmplt      	r0, r3
+    58ca:	0c0b      	bf      	0x58e0	// 58e0 <TK_overflow_predict+0x9c>
+    58cc:	107f      	lrw      	r3, 0x20000306	// 5948 <TK_overflow_predict+0x104>
+    58ce:	610c      	addu      	r4, r3
+    58d0:	8c60      	ld.h      	r3, (r4, 0x0)
+    58d2:	3b06      	cmphsi      	r3, 7
+    58d4:	0806      	bt      	0x58e0	// 58e0 <TK_overflow_predict+0x9c>
+    58d6:	2300      	addi      	r3, 1
+    58d8:	ac60      	st.h      	r3, (r4, 0x0)
+    58da:	3201      	movi      	r2, 1
+    58dc:	107c      	lrw      	r3, 0x200005a5	// 594c <TK_overflow_predict+0x108>
+    58de:	a340      	st.b      	r2, (r3, 0x0)
+    58e0:	2500      	addi      	r5, 1
+    58e2:	3d51      	cmpnei      	r5, 17
+    58e4:	0bc5      	bt      	0x586e	// 586e <TK_overflow_predict+0x2a>
+    58e6:	107a      	lrw      	r3, 0x200005a5	// 594c <TK_overflow_predict+0x108>
+    58e8:	8340      	ld.b      	r2, (r3, 0x0)
+    58ea:	3a41      	cmpnei      	r2, 1
+    58ec:	0810      	bt      	0x590c	// 590c <TK_overflow_predict+0xc8>
+    58ee:	3200      	movi      	r2, 0
+    58f0:	a340      	st.b      	r2, (r3, 0x0)
+    58f2:	3200      	movi      	r2, 0
+    58f4:	1077      	lrw      	r3, 0x20000058	// 5950 <TK_overflow_predict+0x10c>
+    58f6:	1018      	lrw      	r0, 0x20000673	// 5954 <TK_overflow_predict+0x110>
+    58f8:	10b8      	lrw      	r5, 0x200006ac	// 5958 <TK_overflow_predict+0x114>
+    58fa:	10d4      	lrw      	r6, 0x20000306	// 5948 <TK_overflow_predict+0x104>
+    58fc:	9360      	ld.w      	r3, (r3, 0x0)
+    58fe:	b342      	st.w      	r2, (r3, 0x8)
+    5900:	1077      	lrw      	r3, 0x20000054	// 595c <TK_overflow_predict+0x118>
+    5902:	9380      	ld.w      	r4, (r3, 0x0)
+    5904:	3300      	movi      	r3, 0
+    5906:	8040      	ld.b      	r2, (r0, 0x0)
+    5908:	648c      	cmphs      	r3, r2
+    590a:	0c03      	bf      	0x5910	// 5910 <TK_overflow_predict+0xcc>
+    590c:	1401      	addi      	r14, r14, 4
+    590e:	1494      	pop      	r4-r7, r15
+    5910:	5d4c      	addu      	r2, r5, r3
+    5912:	8240      	ld.b      	r2, (r2, 0x0)
+    5914:	4241      	lsli      	r2, r2, 1
+    5916:	4322      	lsli      	r1, r3, 2
+    5918:	6098      	addu      	r2, r6
+    591a:	6050      	addu      	r1, r4
+    591c:	8a40      	ld.h      	r2, (r2, 0x0)
+    591e:	91f2      	ld.w      	r7, (r1, 0x48)
+    5920:	4254      	lsli      	r2, r2, 20
+    5922:	6c9c      	or      	r2, r7
+    5924:	2300      	addi      	r3, 1
+    5926:	b152      	st.w      	r2, (r1, 0x48)
+    5928:	74cc      	zextb      	r3, r3
+    592a:	07ee      	br      	0x5906	// 5906 <TK_overflow_predict+0xc2>
+    592c:	2000006c 	.long	0x2000006c
+    5930:	20000650 	.long	0x20000650
+    5934:	20000329 	.long	0x20000329
+    5938:	2000032c 	.long	0x2000032c
+    593c:	20000332 	.long	0x20000332
+    5940:	200006e0 	.long	0x200006e0
+    5944:	20000746 	.long	0x20000746
+    5948:	20000306 	.long	0x20000306
+    594c:	200005a5 	.long	0x200005a5
+    5950:	20000058 	.long	0x20000058
+    5954:	20000673 	.long	0x20000673
+    5958:	200006ac 	.long	0x200006ac
+    595c:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00005960 <TK_Baseline_tracking>:
+    5960:	14c4      	push      	r4-r7
+    5962:	1422      	subi      	r14, r14, 8
+    5964:	1348      	lrw      	r2, 0x200005d2	// 5b04 <TK_Baseline_tracking+0x1a4>
+    5966:	8260      	ld.b      	r3, (r2, 0x0)
+    5968:	2300      	addi      	r3, 1
+    596a:	74cc      	zextb      	r3, r3
+    596c:	a260      	st.b      	r3, (r2, 0x0)
+    596e:	8260      	ld.b      	r3, (r2, 0x0)
+    5970:	1326      	lrw      	r1, 0x20000329	// 5b08 <TK_Baseline_tracking+0x1a8>
+    5972:	8120      	ld.b      	r1, (r1, 0x0)
+    5974:	644c      	cmphs      	r3, r1
+    5976:	0cad      	bf      	0x5ad0	// 5ad0 <TK_Baseline_tracking+0x170>
+    5978:	3300      	movi      	r3, 0
+    597a:	a260      	st.b      	r3, (r2, 0x0)
+    597c:	1364      	lrw      	r3, 0x20000530	// 5b0c <TK_Baseline_tracking+0x1ac>
+    597e:	9360      	ld.w      	r3, (r3, 0x0)
+    5980:	3b40      	cmpnei      	r3, 0
+    5982:	08a7      	bt      	0x5ad0	// 5ad0 <TK_Baseline_tracking+0x170>
+    5984:	1323      	lrw      	r1, 0x2000054a	// 5b10 <TK_Baseline_tracking+0x1b0>
+    5986:	6dc7      	mov      	r7, r1
+    5988:	b820      	st.w      	r1, (r14, 0x0)
+    598a:	3200      	movi      	r2, 0
+    598c:	1362      	lrw      	r3, 0x20000356	// 5b14 <TK_Baseline_tracking+0x1b4>
+    598e:	1323      	lrw      	r1, 0x200004a0	// 5b18 <TK_Baseline_tracking+0x1b8>
+    5990:	4201      	lsli      	r0, r2, 1
+    5992:	9880      	ld.w      	r4, (r14, 0x0)
+    5994:	6100      	addu      	r4, r0
+    5996:	8c80      	ld.h      	r4, (r4, 0x0)
+    5998:	7513      	sexth      	r4, r4
+    599a:	3cdf      	btsti      	r4, 31
+    599c:	0c27      	bf      	0x59ea	// 59ea <TK_Baseline_tracking+0x8a>
+    599e:	13a0      	lrw      	r5, 0x20000746	// 5b1c <TK_Baseline_tracking+0x1bc>
+    59a0:	5980      	addu      	r4, r1, r0
+    59a2:	6014      	addu      	r0, r5
+    59a4:	b881      	st.w      	r4, (r14, 0x4)
+    59a6:	8c80      	ld.h      	r4, (r4, 0x0)
+    59a8:	88c0      	ld.h      	r6, (r0, 0x0)
+    59aa:	7511      	zexth      	r4, r4
+    59ac:	7599      	zexth      	r6, r6
+    59ae:	8ba0      	ld.h      	r5, (r3, 0x0)
+    59b0:	611a      	subu      	r4, r6
+    59b2:	6551      	cmplt      	r4, r5
+    59b4:	081b      	bt      	0x59ea	// 59ea <TK_Baseline_tracking+0x8a>
+    59b6:	9881      	ld.w      	r4, (r14, 0x4)
+    59b8:	8c80      	ld.h      	r4, (r4, 0x0)
+    59ba:	8800      	ld.h      	r0, (r0, 0x0)
+    59bc:	7511      	zexth      	r4, r4
+    59be:	7401      	zexth      	r0, r0
+    59c0:	5c01      	subu      	r0, r4, r0
+    59c2:	4581      	lsli      	r4, r5, 1
+    59c4:	6150      	addu      	r5, r4
+    59c6:	6541      	cmplt      	r0, r5
+    59c8:	0c11      	bf      	0x59ea	// 59ea <TK_Baseline_tracking+0x8a>
+    59ca:	1296      	lrw      	r4, 0x20000674	// 5b20 <TK_Baseline_tracking+0x1c0>
+    59cc:	6108      	addu      	r4, r2
+    59ce:	8400      	ld.b      	r0, (r4, 0x0)
+    59d0:	2000      	addi      	r0, 1
+    59d2:	7400      	zextb      	r0, r0
+    59d4:	a400      	st.b      	r0, (r4, 0x0)
+    59d6:	1214      	lrw      	r0, 0x2000008c	// 5b24 <TK_Baseline_tracking+0x1c4>
+    59d8:	84a0      	ld.b      	r5, (r4, 0x0)
+    59da:	8008      	ld.b      	r0, (r0, 0x8)
+    59dc:	6540      	cmphs      	r0, r5
+    59de:	0806      	bt      	0x59ea	// 59ea <TK_Baseline_tracking+0x8a>
+    59e0:	1212      	lrw      	r0, 0x200005b7	// 5b28 <TK_Baseline_tracking+0x1c8>
+    59e2:	3501      	movi      	r5, 1
+    59e4:	a0a0      	st.b      	r5, (r0, 0x0)
+    59e6:	3000      	movi      	r0, 0
+    59e8:	a400      	st.b      	r0, (r4, 0x0)
+    59ea:	4201      	lsli      	r0, r2, 1
+    59ec:	5f80      	addu      	r4, r7, r0
+    59ee:	8c80      	ld.h      	r4, (r4, 0x0)
+    59f0:	7513      	sexth      	r4, r4
+    59f2:	3c20      	cmplti      	r4, 1
+    59f4:	0870      	bt      	0x5ad4	// 5ad4 <TK_Baseline_tracking+0x174>
+    59f6:	128a      	lrw      	r4, 0x20000746	// 5b1c <TK_Baseline_tracking+0x1bc>
+    59f8:	6100      	addu      	r4, r0
+    59fa:	59a0      	addu      	r5, r1, r0
+    59fc:	8c80      	ld.h      	r4, (r4, 0x0)
+    59fe:	8da0      	ld.h      	r5, (r5, 0x0)
+    5a00:	7555      	zexth      	r5, r5
+    5a02:	7511      	zexth      	r4, r4
+    5a04:	6116      	subu      	r4, r5
+    5a06:	8ba0      	ld.h      	r5, (r3, 0x0)
+    5a08:	45a2      	lsli      	r5, r5, 2
+    5a0a:	6551      	cmplt      	r4, r5
+    5a0c:	0864      	bt      	0x5ad4	// 5ad4 <TK_Baseline_tracking+0x174>
+    5a0e:	1288      	lrw      	r4, 0x200005fa	// 5b2c <TK_Baseline_tracking+0x1cc>
+    5a10:	6108      	addu      	r4, r2
+    5a12:	84a0      	ld.b      	r5, (r4, 0x0)
+    5a14:	2500      	addi      	r5, 1
+    5a16:	7554      	zextb      	r5, r5
+    5a18:	a4a0      	st.b      	r5, (r4, 0x0)
+    5a1a:	12a3      	lrw      	r5, 0x2000008c	// 5b24 <TK_Baseline_tracking+0x1c4>
+    5a1c:	84c0      	ld.b      	r6, (r4, 0x0)
+    5a1e:	85a9      	ld.b      	r5, (r5, 0x9)
+    5a20:	6594      	cmphs      	r5, r6
+    5a22:	0806      	bt      	0x5a2e	// 5a2e <TK_Baseline_tracking+0xce>
+    5a24:	12a1      	lrw      	r5, 0x200005b7	// 5b28 <TK_Baseline_tracking+0x1c8>
+    5a26:	3601      	movi      	r6, 1
+    5a28:	a5c0      	st.b      	r6, (r5, 0x0)
+    5a2a:	3500      	movi      	r5, 0
+    5a2c:	a4a0      	st.b      	r5, (r4, 0x0)
+    5a2e:	5f80      	addu      	r4, r7, r0
+    5a30:	8c80      	ld.h      	r4, (r4, 0x0)
+    5a32:	7513      	sexth      	r4, r4
+    5a34:	3cdf      	btsti      	r4, 31
+    5a36:	0c10      	bf      	0x5a56	// 5a56 <TK_Baseline_tracking+0xf6>
+    5a38:	11d9      	lrw      	r6, 0x20000746	// 5b1c <TK_Baseline_tracking+0x1bc>
+    5a3a:	59a0      	addu      	r5, r1, r0
+    5a3c:	6180      	addu      	r6, r0
+    5a3e:	8d80      	ld.h      	r4, (r5, 0x0)
+    5a40:	8ec0      	ld.h      	r6, (r6, 0x0)
+    5a42:	7599      	zexth      	r6, r6
+    5a44:	7511      	zexth      	r4, r4
+    5a46:	611a      	subu      	r4, r6
+    5a48:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5a4a:	6591      	cmplt      	r4, r6
+    5a4c:	0c05      	bf      	0x5a56	// 5a56 <TK_Baseline_tracking+0xf6>
+    5a4e:	8d80      	ld.h      	r4, (r5, 0x0)
+    5a50:	2c00      	subi      	r4, 1
+    5a52:	7511      	zexth      	r4, r4
+    5a54:	ad80      	st.h      	r4, (r5, 0x0)
+    5a56:	5f80      	addu      	r4, r7, r0
+    5a58:	8c80      	ld.h      	r4, (r4, 0x0)
+    5a5a:	7513      	sexth      	r4, r4
+    5a5c:	3cdf      	btsti      	r4, 31
+    5a5e:	0c11      	bf      	0x5a80	// 5a80 <TK_Baseline_tracking+0x120>
+    5a60:	11cf      	lrw      	r6, 0x20000746	// 5b1c <TK_Baseline_tracking+0x1bc>
+    5a62:	59a0      	addu      	r5, r1, r0
+    5a64:	6180      	addu      	r6, r0
+    5a66:	8d80      	ld.h      	r4, (r5, 0x0)
+    5a68:	8ec0      	ld.h      	r6, (r6, 0x0)
+    5a6a:	7599      	zexth      	r6, r6
+    5a6c:	7511      	zexth      	r4, r4
+    5a6e:	611a      	subu      	r4, r6
+    5a70:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5a72:	4ec1      	lsri      	r6, r6, 1
+    5a74:	6591      	cmplt      	r4, r6
+    5a76:	0805      	bt      	0x5a80	// 5a80 <TK_Baseline_tracking+0x120>
+    5a78:	8d80      	ld.h      	r4, (r5, 0x0)
+    5a7a:	2c01      	subi      	r4, 2
+    5a7c:	7511      	zexth      	r4, r4
+    5a7e:	ad80      	st.h      	r4, (r5, 0x0)
+    5a80:	5fa0      	addu      	r5, r7, r0
+    5a82:	8d80      	ld.h      	r4, (r5, 0x0)
+    5a84:	7513      	sexth      	r4, r4
+    5a86:	3c20      	cmplti      	r4, 1
+    5a88:	080c      	bt      	0x5aa0	// 5aa0 <TK_Baseline_tracking+0x140>
+    5a8a:	8da0      	ld.h      	r5, (r5, 0x0)
+    5a8c:	8b80      	ld.h      	r4, (r3, 0x0)
+    5a8e:	7557      	sexth      	r5, r5
+    5a90:	4c81      	lsri      	r4, r4, 1
+    5a92:	6515      	cmplt      	r5, r4
+    5a94:	0c06      	bf      	0x5aa0	// 5aa0 <TK_Baseline_tracking+0x140>
+    5a96:	59a0      	addu      	r5, r1, r0
+    5a98:	8d80      	ld.h      	r4, (r5, 0x0)
+    5a9a:	2400      	addi      	r4, 1
+    5a9c:	7511      	zexth      	r4, r4
+    5a9e:	ad80      	st.h      	r4, (r5, 0x0)
+    5aa0:	5fa0      	addu      	r5, r7, r0
+    5aa2:	8d80      	ld.h      	r4, (r5, 0x0)
+    5aa4:	7513      	sexth      	r4, r4
+    5aa6:	3c20      	cmplti      	r4, 1
+    5aa8:	0810      	bt      	0x5ac8	// 5ac8 <TK_Baseline_tracking+0x168>
+    5aaa:	8dc0      	ld.h      	r6, (r5, 0x0)
+    5aac:	759b      	sexth      	r6, r6
+    5aae:	8b80      	ld.h      	r4, (r3, 0x0)
+    5ab0:	6519      	cmplt      	r6, r4
+    5ab2:	0c0b      	bf      	0x5ac8	// 5ac8 <TK_Baseline_tracking+0x168>
+    5ab4:	8da0      	ld.h      	r5, (r5, 0x0)
+    5ab6:	7557      	sexth      	r5, r5
+    5ab8:	4c81      	lsri      	r4, r4, 1
+    5aba:	6515      	cmplt      	r5, r4
+    5abc:	0806      	bt      	0x5ac8	// 5ac8 <TK_Baseline_tracking+0x168>
+    5abe:	6004      	addu      	r0, r1
+    5ac0:	8880      	ld.h      	r4, (r0, 0x0)
+    5ac2:	2401      	addi      	r4, 2
+    5ac4:	7511      	zexth      	r4, r4
+    5ac6:	a880      	st.h      	r4, (r0, 0x0)
+    5ac8:	2200      	addi      	r2, 1
+    5aca:	3a51      	cmpnei      	r2, 17
+    5acc:	2301      	addi      	r3, 2
+    5ace:	0b61      	bt      	0x5990	// 5990 <TK_Baseline_tracking+0x30>
+    5ad0:	1402      	addi      	r14, r14, 8
+    5ad2:	1484      	pop      	r4-r7
+    5ad4:	5f80      	addu      	r4, r7, r0
+    5ad6:	8c80      	ld.h      	r4, (r4, 0x0)
+    5ad8:	7513      	sexth      	r4, r4
+    5ada:	3cdf      	btsti      	r4, 31
+    5adc:	0fa9      	bf      	0x5a2e	// 5a2e <TK_Baseline_tracking+0xce>
+    5ade:	10b0      	lrw      	r5, 0x20000746	// 5b1c <TK_Baseline_tracking+0x1bc>
+    5ae0:	5980      	addu      	r4, r1, r0
+    5ae2:	6140      	addu      	r5, r0
+    5ae4:	8c80      	ld.h      	r4, (r4, 0x0)
+    5ae6:	8da0      	ld.h      	r5, (r5, 0x0)
+    5ae8:	7555      	zexth      	r5, r5
+    5aea:	8bc0      	ld.h      	r6, (r3, 0x0)
+    5aec:	7511      	zexth      	r4, r4
+    5aee:	6116      	subu      	r4, r5
+    5af0:	46a1      	lsli      	r5, r6, 1
+    5af2:	6158      	addu      	r5, r6
+    5af4:	6551      	cmplt      	r4, r5
+    5af6:	0b9c      	bt      	0x5a2e	// 5a2e <TK_Baseline_tracking+0xce>
+    5af8:	108c      	lrw      	r4, 0x200005b7	// 5b28 <TK_Baseline_tracking+0x1c8>
+    5afa:	3501      	movi      	r5, 1
+    5afc:	a4a0      	st.b      	r5, (r4, 0x0)
+    5afe:	6c03      	mov      	r0, r0
+    5b00:	0797      	br      	0x5a2e	// 5a2e <TK_Baseline_tracking+0xce>
+    5b02:	0000      	bkpt
+    5b04:	200005d2 	.long	0x200005d2
+    5b08:	20000329 	.long	0x20000329
+    5b0c:	20000530 	.long	0x20000530
+    5b10:	2000054a 	.long	0x2000054a
+    5b14:	20000356 	.long	0x20000356
+    5b18:	200004a0 	.long	0x200004a0
+    5b1c:	20000746 	.long	0x20000746
+    5b20:	20000674 	.long	0x20000674
+    5b24:	2000008c 	.long	0x2000008c
+    5b28:	200005b7 	.long	0x200005b7
+    5b2c:	200005fa 	.long	0x200005fa
+
+Disassembly of section .text.TK_result_prog:
+
+00005b30 <TK_result_prog>:
+    5b30:	14d2      	push      	r4-r5, r15
+    5b32:	1050      	lrw      	r2, 0x20000530	// 5b70 <TK_result_prog+0x40>
+    5b34:	1090      	lrw      	r4, 0x200005d4	// 5b74 <TK_result_prog+0x44>
+    5b36:	9260      	ld.w      	r3, (r2, 0x0)
+    5b38:	3b40      	cmpnei      	r3, 0
+    5b3a:	0c02      	bf      	0x5b3e	// 5b3e <TK_result_prog+0xe>
+    5b3c:	9260      	ld.w      	r3, (r2, 0x0)
+    5b3e:	b460      	st.w      	r3, (r4, 0x0)
+    5b40:	9460      	ld.w      	r3, (r4, 0x0)
+    5b42:	3b40      	cmpnei      	r3, 0
+    5b44:	10ad      	lrw      	r5, 0x200006a8	// 5b78 <TK_result_prog+0x48>
+    5b46:	0c11      	bf      	0x5b68	// 5b68 <TK_result_prog+0x38>
+    5b48:	9440      	ld.w      	r2, (r4, 0x0)
+    5b4a:	9560      	ld.w      	r3, (r5, 0x0)
+    5b4c:	64ca      	cmpne      	r2, r3
+    5b4e:	0c03      	bf      	0x5b54	// 5b54 <TK_result_prog+0x24>
+    5b50:	9460      	ld.w      	r3, (r4, 0x0)
+    5b52:	b560      	st.w      	r3, (r5, 0x0)
+    5b54:	e3fffd94 	bsr      	0x567c	// 567c <get_key_number>
+    5b58:	1069      	lrw      	r3, 0x20000330	// 5b7c <TK_result_prog+0x4c>
+    5b5a:	8360      	ld.b      	r3, (r3, 0x0)
+    5b5c:	640c      	cmphs      	r3, r0
+    5b5e:	0804      	bt      	0x5b66	// 5b66 <TK_result_prog+0x36>
+    5b60:	3300      	movi      	r3, 0
+    5b62:	b460      	st.w      	r3, (r4, 0x0)
+    5b64:	b560      	st.w      	r3, (r5, 0x0)
+    5b66:	1492      	pop      	r4-r5, r15
+    5b68:	1046      	lrw      	r2, 0x200005cc	// 5b80 <TK_result_prog+0x50>
+    5b6a:	b560      	st.w      	r3, (r5, 0x0)
+    5b6c:	b260      	st.w      	r3, (r2, 0x0)
+    5b6e:	07fc      	br      	0x5b66	// 5b66 <TK_result_prog+0x36>
+    5b70:	20000530 	.long	0x20000530
+    5b74:	200005d4 	.long	0x200005d4
+    5b78:	200006a8 	.long	0x200006a8
+    5b7c:	20000330 	.long	0x20000330
+    5b80:	200005cc 	.long	0x200005cc
+
+Disassembly of section .text.CORETHandler:
+
+00005b84 <CORETHandler>:
+    5b84:	1460      	nie
+    5b86:	1462      	ipush
+    5b88:	14d1      	push      	r4, r15
+    5b8a:	1077      	lrw      	r3, 0x20000064	// 5be4 <CORETHandler+0x60>
+    5b8c:	3400      	movi      	r4, 0
+    5b8e:	9360      	ld.w      	r3, (r3, 0x0)
+    5b90:	b386      	st.w      	r4, (r3, 0x18)
+    5b92:	1076      	lrw      	r3, 0x20000534	// 5be8 <CORETHandler+0x64>
+    5b94:	8360      	ld.b      	r3, (r3, 0x0)
+    5b96:	3b41      	cmpnei      	r3, 1
+    5b98:	0820      	bt      	0x5bd8	// 5bd8 <CORETHandler+0x54>
+    5b9a:	e3fffd85 	bsr      	0x56a4	// 56a4 <TK_Scan_Start>
+    5b9e:	e3fffd93 	bsr      	0x56c4	// 56c4 <TK_Keymap_prog>
+    5ba2:	e3fffe51 	bsr      	0x5844	// 5844 <TK_overflow_predict>
+    5ba6:	e3fffedd 	bsr      	0x5960	// 5960 <TK_Baseline_tracking>
+    5baa:	e3ffffc3 	bsr      	0x5b30	// 5b30 <TK_result_prog>
+    5bae:	1070      	lrw      	r3, 0x200005d4	// 5bec <CORETHandler+0x68>
+    5bb0:	9360      	ld.w      	r3, (r3, 0x0)
+    5bb2:	3b40      	cmpnei      	r3, 0
+    5bb4:	0c12      	bf      	0x5bd8	// 5bd8 <CORETHandler+0x54>
+    5bb6:	106f      	lrw      	r3, 0x20000300	// 5bf0 <CORETHandler+0x6c>
+    5bb8:	9340      	ld.w      	r2, (r3, 0x0)
+    5bba:	3a40      	cmpnei      	r2, 0
+    5bbc:	0c0e      	bf      	0x5bd8	// 5bd8 <CORETHandler+0x54>
+    5bbe:	106e      	lrw      	r3, 0x200005cc	// 5bf4 <CORETHandler+0x70>
+    5bc0:	3064      	movi      	r0, 100
+    5bc2:	9320      	ld.w      	r1, (r3, 0x0)
+    5bc4:	2100      	addi      	r1, 1
+    5bc6:	b320      	st.w      	r1, (r3, 0x0)
+    5bc8:	9320      	ld.w      	r1, (r3, 0x0)
+    5bca:	7c80      	mult      	r2, r0
+    5bcc:	6448      	cmphs      	r2, r1
+    5bce:	0805      	bt      	0x5bd8	// 5bd8 <CORETHandler+0x54>
+    5bd0:	104a      	lrw      	r2, 0x200005b7	// 5bf8 <CORETHandler+0x74>
+    5bd2:	3101      	movi      	r1, 1
+    5bd4:	a220      	st.b      	r1, (r2, 0x0)
+    5bd6:	b380      	st.w      	r4, (r3, 0x0)
+    5bd8:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    5bdc:	9880      	ld.w      	r4, (r14, 0x0)
+    5bde:	1402      	addi      	r14, r14, 8
+    5be0:	1463      	ipop
+    5be2:	1461      	nir
+    5be4:	20000064 	.long	0x20000064
+    5be8:	20000534 	.long	0x20000534
+    5bec:	200005d4 	.long	0x200005d4
+    5bf0:	20000300 	.long	0x20000300
+    5bf4:	200005cc 	.long	0x200005cc
+    5bf8:	200005b7 	.long	0x200005b7
+
+Disassembly of section .text.std_clk_calib:
+
+00005bfc <std_clk_calib>:
+    5bfc:	14d4      	push      	r4-r7, r15
+    5bfe:	142d      	subi      	r14, r14, 52
+    5c00:	3201      	movi      	r2, 1
+    5c02:	03ce      	lrw      	r6, 0x2000005c	// 5e44 <std_clk_calib+0x248>
+    5c04:	6cc3      	mov      	r3, r0
+    5c06:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    5c0a:	9640      	ld.w      	r2, (r6, 0x0)
+    5c0c:	9247      	ld.w      	r2, (r2, 0x1c)
+    5c0e:	7488      	zextb      	r2, r2
+    5c10:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    5c14:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5c18:	3a40      	cmpnei      	r2, 0
+    5c1a:	0c08      	bf      	0x5c2a	// 5c2a <std_clk_calib+0x2e>
+    5c1c:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    5c20:	3a42      	cmpnei      	r2, 2
+    5c22:	0c04      	bf      	0x5c2a	// 5c2a <std_clk_calib+0x2e>
+    5c24:	3000      	movi      	r0, 0
+    5c26:	140d      	addi      	r14, r14, 52
+    5c28:	1494      	pop      	r4-r7, r15
+    5c2a:	0397      	lrw      	r4, 0x2000000c	// 5e48 <std_clk_calib+0x24c>
+    5c2c:	3209      	movi      	r2, 9
+    5c2e:	9400      	ld.w      	r0, (r4, 0x0)
+    5c30:	3b40      	cmpnei      	r3, 0
+    5c32:	b041      	st.w      	r2, (r0, 0x4)
+    5c34:	0857      	bt      	0x5ce2	// 5ce2 <std_clk_calib+0xe6>
+    5c36:	3307      	movi      	r3, 7
+    5c38:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5c3c:	037b      	lrw      	r3, 0x2dc6c00	// 5e4c <std_clk_calib+0x250>
+    5c3e:	b863      	st.w      	r3, (r14, 0xc)
+    5c40:	3380      	movi      	r3, 128
+    5c42:	4362      	lsli      	r3, r3, 2
+    5c44:	b867      	st.w      	r3, (r14, 0x1c)
+    5c46:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    5c4a:	74cc      	zextb      	r3, r3
+    5c4c:	b062      	st.w      	r3, (r0, 0x8)
+    5c4e:	037e      	lrw      	r3, 0xffff	// 5e50 <std_clk_calib+0x254>
+    5c50:	b063      	st.w      	r3, (r0, 0xc)
+    5c52:	3201      	movi      	r2, 1
+    5c54:	3101      	movi      	r1, 1
+    5c56:	03bf      	lrw      	r5, 0x20000014	// 5e54 <std_clk_calib+0x258>
+    5c58:	e3ffebec 	bsr      	0x3430	// 3430 <BT_ConfigInterrupt_CMD>
+    5c5c:	95e0      	ld.w      	r7, (r5, 0x0)
+    5c5e:	137f      	lrw      	r3, 0xbe9c0005	// 5e58 <std_clk_calib+0x25c>
+    5c60:	b760      	st.w      	r3, (r7, 0x0)
+    5c62:	135f      	lrw      	r2, 0x30010	// 5e5c <std_clk_calib+0x260>
+    5c64:	3300      	movi      	r3, 0
+    5c66:	b762      	st.w      	r3, (r7, 0x8)
+    5c68:	b743      	st.w      	r2, (r7, 0xc)
+    5c6a:	32d8      	movi      	r2, 216
+    5c6c:	b745      	st.w      	r2, (r7, 0x14)
+    5c6e:	974f      	ld.w      	r2, (r7, 0x3c)
+    5c70:	3aa2      	bseti      	r2, 2
+    5c72:	b74f      	st.w      	r2, (r7, 0x3c)
+    5c74:	9803      	ld.w      	r0, (r14, 0xc)
+    5c76:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    5c7a:	327d      	movi      	r2, 125
+    5c7c:	2100      	addi      	r1, 1
+    5c7e:	7c48      	mult      	r1, r2
+    5c80:	b861      	st.w      	r3, (r14, 0x4)
+    5c82:	e3fff3cb 	bsr      	0x4418	// 4418 <__udivsi3>
+    5c86:	b804      	st.w      	r0, (r14, 0x10)
+    5c88:	32fa      	movi      	r2, 250
+    5c8a:	9824      	ld.w      	r1, (r14, 0x10)
+    5c8c:	4242      	lsli      	r2, r2, 2
+    5c8e:	6448      	cmphs      	r2, r1
+    5c90:	0bca      	bt      	0x5c24	// 5c24 <std_clk_calib+0x28>
+    5c92:	9844      	ld.w      	r2, (r14, 0x10)
+    5c94:	3178      	movi      	r1, 120
+    5c96:	9804      	ld.w      	r0, (r14, 0x10)
+    5c98:	b840      	st.w      	r2, (r14, 0x0)
+    5c9a:	e3fff3bf 	bsr      	0x4418	// 4418 <__udivsi3>
+    5c9e:	9840      	ld.w      	r2, (r14, 0x0)
+    5ca0:	6082      	subu      	r2, r0
+    5ca2:	b845      	st.w      	r2, (r14, 0x14)
+    5ca4:	9804      	ld.w      	r0, (r14, 0x10)
+    5ca6:	3178      	movi      	r1, 120
+    5ca8:	9844      	ld.w      	r2, (r14, 0x10)
+    5caa:	b840      	st.w      	r2, (r14, 0x0)
+    5cac:	e3fff3b6 	bsr      	0x4418	// 4418 <__udivsi3>
+    5cb0:	9840      	ld.w      	r2, (r14, 0x0)
+    5cb2:	6008      	addu      	r0, r2
+    5cb4:	b806      	st.w      	r0, (r14, 0x18)
+    5cb6:	c0807020 	psrclr      	ie
+    5cba:	9640      	ld.w      	r2, (r6, 0x0)
+    5cbc:	9254      	ld.w      	r2, (r2, 0x50)
+    5cbe:	b848      	st.w      	r2, (r14, 0x20)
+    5cc0:	9861      	ld.w      	r3, (r14, 0x4)
+    5cc2:	9440      	ld.w      	r2, (r4, 0x0)
+    5cc4:	b260      	st.w      	r3, (r2, 0x0)
+    5cc6:	b761      	st.w      	r3, (r7, 0x4)
+    5cc8:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    5ccc:	3b40      	cmpnei      	r3, 0
+    5cce:	083e      	bt      	0x5d4a	// 5d4a <std_clk_calib+0x14e>
+    5cd0:	e3ffeb62 	bsr      	0x3394	// 3394 <LPT_Soft_Reset>
+    5cd4:	9400      	ld.w      	r0, (r4, 0x0)
+    5cd6:	e3ffeb83 	bsr      	0x33dc	// 33dc <BT_Soft_Reset>
+    5cda:	c1807420 	psrset      	ee, ie
+    5cde:	3001      	movi      	r0, 1
+    5ce0:	07a3      	br      	0x5c26	// 5c26 <std_clk_calib+0x2a>
+    5ce2:	3b41      	cmpnei      	r3, 1
+    5ce4:	0806      	bt      	0x5cf0	// 5cf0 <std_clk_calib+0xf4>
+    5ce6:	3303      	movi      	r3, 3
+    5ce8:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5cec:	127d      	lrw      	r3, 0x16e3600	// 5e60 <std_clk_calib+0x264>
+    5cee:	07a8      	br      	0x5c3e	// 5c3e <std_clk_calib+0x42>
+    5cf0:	3b42      	cmpnei      	r3, 2
+    5cf2:	0806      	bt      	0x5cfe	// 5cfe <std_clk_calib+0x102>
+    5cf4:	3301      	movi      	r3, 1
+    5cf6:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5cfa:	127b      	lrw      	r3, 0xb71b00	// 5e64 <std_clk_calib+0x268>
+    5cfc:	07a1      	br      	0x5c3e	// 5c3e <std_clk_calib+0x42>
+    5cfe:	3b43      	cmpnei      	r3, 3
+    5d00:	0806      	bt      	0x5d0c	// 5d0c <std_clk_calib+0x110>
+    5d02:	3300      	movi      	r3, 0
+    5d04:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5d08:	1278      	lrw      	r3, 0x5b8d80	// 5e68 <std_clk_calib+0x26c>
+    5d0a:	079a      	br      	0x5c3e	// 5c3e <std_clk_calib+0x42>
+    5d0c:	3b44      	cmpnei      	r3, 4
+    5d0e:	0809      	bt      	0x5d20	// 5d20 <std_clk_calib+0x124>
+    5d10:	3300      	movi      	r3, 0
+    5d12:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5d16:	1276      	lrw      	r3, 0x54c720	// 5e6c <std_clk_calib+0x270>
+    5d18:	b863      	st.w      	r3, (r14, 0xc)
+    5d1a:	3380      	movi      	r3, 128
+    5d1c:	4369      	lsli      	r3, r3, 9
+    5d1e:	0793      	br      	0x5c44	// 5c44 <std_clk_calib+0x48>
+    5d20:	3b45      	cmpnei      	r3, 5
+    5d22:	0806      	bt      	0x5d2e	// 5d2e <std_clk_calib+0x132>
+    5d24:	3300      	movi      	r3, 0
+    5d26:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5d2a:	1272      	lrw      	r3, 0x3ffed0	// 5e70 <std_clk_calib+0x274>
+    5d2c:	07f6      	br      	0x5d18	// 5d18 <std_clk_calib+0x11c>
+    5d2e:	3b46      	cmpnei      	r3, 6
+    5d30:	0806      	bt      	0x5d3c	// 5d3c <std_clk_calib+0x140>
+    5d32:	3300      	movi      	r3, 0
+    5d34:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5d38:	126f      	lrw      	r3, 0x1fff68	// 5e74 <std_clk_calib+0x278>
+    5d3a:	07ef      	br      	0x5d18	// 5d18 <std_clk_calib+0x11c>
+    5d3c:	3b47      	cmpnei      	r3, 7
+    5d3e:	0b84      	bt      	0x5c46	// 5c46 <std_clk_calib+0x4a>
+    5d40:	3300      	movi      	r3, 0
+    5d42:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    5d46:	126d      	lrw      	r3, 0x1ffb8	// 5e78 <std_clk_calib+0x27c>
+    5d48:	07e8      	br      	0x5d18	// 5d18 <std_clk_calib+0x11c>
+    5d4a:	9560      	ld.w      	r3, (r5, 0x0)
+    5d4c:	3101      	movi      	r1, 1
+    5d4e:	9440      	ld.w      	r2, (r4, 0x0)
+    5d50:	b321      	st.w      	r1, (r3, 0x4)
+    5d52:	b220      	st.w      	r1, (r2, 0x0)
+    5d54:	3100      	movi      	r1, 0
+    5d56:	b327      	st.w      	r1, (r3, 0x1c)
+    5d58:	3004      	movi      	r0, 4
+    5d5a:	b225      	st.w      	r1, (r2, 0x14)
+    5d5c:	932e      	ld.w      	r1, (r3, 0x38)
+    5d5e:	6840      	and      	r1, r0
+    5d60:	3940      	cmpnei      	r1, 0
+    5d62:	0ffd      	bf      	0x5d5c	// 5d5c <std_clk_calib+0x160>
+    5d64:	9225      	ld.w      	r1, (r2, 0x14)
+    5d66:	b82a      	st.w      	r1, (r14, 0x28)
+    5d68:	3100      	movi      	r1, 0
+    5d6a:	b310      	st.w      	r0, (r3, 0x40)
+    5d6c:	b327      	st.w      	r1, (r3, 0x1c)
+    5d6e:	3004      	movi      	r0, 4
+    5d70:	b225      	st.w      	r1, (r2, 0x14)
+    5d72:	932e      	ld.w      	r1, (r3, 0x38)
+    5d74:	6840      	and      	r1, r0
+    5d76:	3940      	cmpnei      	r1, 0
+    5d78:	0ffd      	bf      	0x5d72	// 5d72 <std_clk_calib+0x176>
+    5d7a:	9225      	ld.w      	r1, (r2, 0x14)
+    5d7c:	b82b      	st.w      	r1, (r14, 0x2c)
+    5d7e:	3100      	movi      	r1, 0
+    5d80:	b310      	st.w      	r0, (r3, 0x40)
+    5d82:	b327      	st.w      	r1, (r3, 0x1c)
+    5d84:	3004      	movi      	r0, 4
+    5d86:	b225      	st.w      	r1, (r2, 0x14)
+    5d88:	932e      	ld.w      	r1, (r3, 0x38)
+    5d8a:	6840      	and      	r1, r0
+    5d8c:	3940      	cmpnei      	r1, 0
+    5d8e:	0ffd      	bf      	0x5d88	// 5d88 <std_clk_calib+0x18c>
+    5d90:	9225      	ld.w      	r1, (r2, 0x14)
+    5d92:	b82c      	st.w      	r1, (r14, 0x30)
+    5d94:	b310      	st.w      	r0, (r3, 0x40)
+    5d96:	982b      	ld.w      	r1, (r14, 0x2c)
+    5d98:	980c      	ld.w      	r0, (r14, 0x30)
+    5d9a:	6040      	addu      	r1, r0
+    5d9c:	b829      	st.w      	r1, (r14, 0x24)
+    5d9e:	9829      	ld.w      	r1, (r14, 0x24)
+    5da0:	4921      	lsri      	r1, r1, 1
+    5da2:	b829      	st.w      	r1, (r14, 0x24)
+    5da4:	3100      	movi      	r1, 0
+    5da6:	b321      	st.w      	r1, (r3, 0x4)
+    5da8:	b220      	st.w      	r1, (r2, 0x0)
+    5daa:	b327      	st.w      	r1, (r3, 0x1c)
+    5dac:	b225      	st.w      	r1, (r2, 0x14)
+    5dae:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    5db2:	3b42      	cmpnei      	r3, 2
+    5db4:	9849      	ld.w      	r2, (r14, 0x24)
+    5db6:	082c      	bt      	0x5e0e	// 5e0e <std_clk_calib+0x212>
+    5db8:	1171      	lrw      	r3, 0x7ff	// 5e7c <std_clk_calib+0x280>
+    5dba:	648c      	cmphs      	r3, r2
+    5dbc:	0c03      	bf      	0x5dc2	// 5dc2 <std_clk_calib+0x1c6>
+    5dbe:	3300      	movi      	r3, 0
+    5dc0:	040f      	br      	0x5dde	// 5dde <std_clk_calib+0x1e2>
+    5dc2:	9849      	ld.w      	r2, (r14, 0x24)
+    5dc4:	9866      	ld.w      	r3, (r14, 0x18)
+    5dc6:	648c      	cmphs      	r3, r2
+    5dc8:	080e      	bt      	0x5de4	// 5de4 <std_clk_calib+0x1e8>
+    5dca:	9868      	ld.w      	r3, (r14, 0x20)
+    5dcc:	9847      	ld.w      	r2, (r14, 0x1c)
+    5dce:	60ca      	subu      	r3, r2
+    5dd0:	b868      	st.w      	r3, (r14, 0x20)
+    5dd2:	32fe      	movi      	r2, 254
+    5dd4:	9868      	ld.w      	r3, (r14, 0x20)
+    5dd6:	4248      	lsli      	r2, r2, 8
+    5dd8:	68c8      	and      	r3, r2
+    5dda:	3b40      	cmpnei      	r3, 0
+    5ddc:	0812      	bt      	0x5e00	// 5e00 <std_clk_calib+0x204>
+    5dde:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5de2:	0721      	br      	0x5c24	// 5c24 <std_clk_calib+0x28>
+    5de4:	9849      	ld.w      	r2, (r14, 0x24)
+    5de6:	9865      	ld.w      	r3, (r14, 0x14)
+    5de8:	64c8      	cmphs      	r2, r3
+    5dea:	0829      	bt      	0x5e3c	// 5e3c <std_clk_calib+0x240>
+    5dec:	9868      	ld.w      	r3, (r14, 0x20)
+    5dee:	9847      	ld.w      	r2, (r14, 0x1c)
+    5df0:	60c8      	addu      	r3, r2
+    5df2:	b868      	st.w      	r3, (r14, 0x20)
+    5df4:	33fe      	movi      	r3, 254
+    5df6:	9848      	ld.w      	r2, (r14, 0x20)
+    5df8:	4368      	lsli      	r3, r3, 8
+    5dfa:	688c      	and      	r2, r3
+    5dfc:	64ca      	cmpne      	r2, r3
+    5dfe:	0fe0      	bf      	0x5dbe	// 5dbe <std_clk_calib+0x1c2>
+    5e00:	9660      	ld.w      	r3, (r6, 0x0)
+    5e02:	9848      	ld.w      	r2, (r14, 0x20)
+    5e04:	b354      	st.w      	r2, (r3, 0x50)
+    5e06:	3001      	movi      	r0, 1
+    5e08:	e3ffed4c 	bsr      	0x38a0	// 38a0 <delay_nms>
+    5e0c:	075e      	br      	0x5cc8	// 5cc8 <std_clk_calib+0xcc>
+    5e0e:	9866      	ld.w      	r3, (r14, 0x18)
+    5e10:	648c      	cmphs      	r3, r2
+    5e12:	0809      	bt      	0x5e24	// 5e24 <std_clk_calib+0x228>
+    5e14:	9868      	ld.w      	r3, (r14, 0x20)
+    5e16:	9847      	ld.w      	r2, (r14, 0x1c)
+    5e18:	60ca      	subu      	r3, r2
+    5e1a:	b868      	st.w      	r3, (r14, 0x20)
+    5e1c:	32ff      	movi      	r2, 255
+    5e1e:	9868      	ld.w      	r3, (r14, 0x20)
+    5e20:	4250      	lsli      	r2, r2, 16
+    5e22:	07db      	br      	0x5dd8	// 5dd8 <std_clk_calib+0x1dc>
+    5e24:	9849      	ld.w      	r2, (r14, 0x24)
+    5e26:	9865      	ld.w      	r3, (r14, 0x14)
+    5e28:	64c8      	cmphs      	r2, r3
+    5e2a:	0809      	bt      	0x5e3c	// 5e3c <std_clk_calib+0x240>
+    5e2c:	9868      	ld.w      	r3, (r14, 0x20)
+    5e2e:	9847      	ld.w      	r2, (r14, 0x1c)
+    5e30:	60c8      	addu      	r3, r2
+    5e32:	b868      	st.w      	r3, (r14, 0x20)
+    5e34:	33ff      	movi      	r3, 255
+    5e36:	9848      	ld.w      	r2, (r14, 0x20)
+    5e38:	4370      	lsli      	r3, r3, 16
+    5e3a:	07e0      	br      	0x5dfa	// 5dfa <std_clk_calib+0x1fe>
+    5e3c:	3300      	movi      	r3, 0
+    5e3e:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    5e42:	07e2      	br      	0x5e06	// 5e06 <std_clk_calib+0x20a>
+    5e44:	2000005c 	.long	0x2000005c
+    5e48:	2000000c 	.long	0x2000000c
+    5e4c:	02dc6c00 	.long	0x02dc6c00
+    5e50:	0000ffff 	.long	0x0000ffff
+    5e54:	20000014 	.long	0x20000014
+    5e58:	be9c0005 	.long	0xbe9c0005
+    5e5c:	00030010 	.long	0x00030010
+    5e60:	016e3600 	.long	0x016e3600
+    5e64:	00b71b00 	.long	0x00b71b00
+    5e68:	005b8d80 	.long	0x005b8d80
+    5e6c:	0054c720 	.long	0x0054c720
+    5e70:	003ffed0 	.long	0x003ffed0
+    5e74:	001fff68 	.long	0x001fff68
+    5e78:	0001ffb8 	.long	0x0001ffb8
+    5e7c:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/TRF_TM_CR_V02_20250102.map b/Source/Lst/TRF_TM_CR_V02_20250102.map
new file mode 100644
index 0000000..9e64a1d
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V02_20250102.map
@@ -0,0 +1,2457 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          328832 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         166
+  Section header string table index: 163
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 002f12 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00002f14 003f14 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00002f4c 003f4c 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00002fc0 003fc0 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        0000300c 00400c 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        0000303c 00403c 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        000030c4 0040c4 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        000030ec 0040ec 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00003128 004128 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        0000313c 00413c 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00003154 004154 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00003174 004174 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00003190 004190 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        000031ac 0041ac 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        000031ec 0041ec 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        000031f8 0041f8 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        0000321c 00421c 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        0000324c 00424c 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        0000332c 00432c 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00003340 004340 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        0000334e 00434e 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00003356 004356 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        0000335e 00435e 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00003374 004374 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00003384 004384 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00003394 004394 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        000033a8 0043a8 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        000033b8 0043b8 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        000033d4 0043d4 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        000033dc 0043dc 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        000033e6 0043e6 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        000033fe 0043fe 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        0000342a 00442a 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00003430 004430 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00003444 004444 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00003454 004454 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        000034f4 0044f4 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00003508 004508 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        0000354c 00454c 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        00003560 004560 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00003614 004614 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00003624 004624 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00003634 004634 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        00003650 004650 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        00003668 004668 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        00003680 004680 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        00003698 004698 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000036b4 0046b4 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        000036d0 0046d0 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000037bc 0047bc 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        000037cc 0047cc 000010 00  AX  0   0  4
+  [52] .text.UARTTransmi PROGBITS        000037dc 0047dc 00001e 00  AX  0   0  2
+  [53] .text.EPT_Stop    PROGBITS        000037fc 0047fc 000028 00  AX  0   0  4
+  [54] .text.startup.mai PROGBITS        00003824 004824 00007c 00  AX  0   0  4
+  [55] .text.delay_nms   PROGBITS        000038a0 0048a0 00002c 00  AX  0   0  2
+  [56] .text.GPT0_CONFIG PROGBITS        000038cc 0048cc 000094 00  AX  0   0  4
+  [57] .text.BT_CONFIG   PROGBITS        00003960 004960 000060 00  AX  0   0  4
+  [58] .text.SYSCON_CONF PROGBITS        000039c0 0049c0 000062 00  AX  0   0  2
+  [59] .text.APT32F102_i PROGBITS        00003a24 004a24 00004c 00  AX  0   0  4
+  [60] .text.SYSCONIntHa PROGBITS        00003a70 004a70 0000f0 00  AX  0   0  4
+  [61] .text.IFCIntHandl PROGBITS        00003b60 004b60 000068 00  AX  0   0  4
+  [62] .text.ADCIntHandl PROGBITS        00003bc8 004bc8 000068 00  AX  0   0  4
+  [63] .text.EPT0IntHand PROGBITS        00003c30 004c30 0001ac 00  AX  0   0  4
+  [64] .text.WWDTHandler PROGBITS        00003ddc 004ddc 000034 00  AX  0   0  4
+  [65] .text.GPT0IntHand PROGBITS        00003e10 004e10 000080 00  AX  0   0  4
+  [66] .text.RTCIntHandl PROGBITS        00003e90 004e90 000070 00  AX  0   0  4
+  [67] .text.UART0IntHan PROGBITS        00003f00 004f00 00003c 00  AX  0   0  4
+  [68] .text.UART1IntHan PROGBITS        00003f3c 004f3c 00003c 00  AX  0   0  4
+  [69] .text.UART2IntHan PROGBITS        00003f78 004f78 000094 00  AX  0   0  4
+  [70] .text.SPI0IntHand PROGBITS        0000400c 00500c 0000e8 00  AX  0   0  4
+  [71] .text.SIO0IntHand PROGBITS        000040f4 0050f4 000054 00  AX  0   0  4
+  [72] .text.EXI0IntHand PROGBITS        00004148 005148 000030 00  AX  0   0  4
+  [73] .text.EXI1IntHand PROGBITS        00004178 005178 000030 00  AX  0   0  4
+  [74] .text.EXI2to3IntH PROGBITS        000041a8 0051a8 000048 00  AX  0   0  4
+  [75] .text.EXI4to9IntH PROGBITS        000041f0 0051f0 00005c 00  AX  0   0  4
+  [76] .text.EXI10to15In PROGBITS        0000424c 00524c 000060 00  AX  0   0  4
+  [77] .text.LPTIntHandl PROGBITS        000042ac 0052ac 000034 00  AX  0   0  4
+  [78] .text.BT0IntHandl PROGBITS        000042e0 0052e0 00004c 00  AX  0   0  4
+  [79] .text.BT1IntHandl PROGBITS        0000432c 00532c 000064 00  AX  0   0  4
+  [80] .text.PriviledgeV PROGBITS        00004390 005390 000002 00  AX  0   0  2
+  [81] .text.PendTrapHan PROGBITS        00004392 005392 000008 00  AX  0   0  2
+  [82] .text.Trap3Handle PROGBITS        0000439a 00539a 000008 00  AX  0   0  2
+  [83] .text.Trap2Handle PROGBITS        000043a2 0053a2 000008 00  AX  0   0  2
+  [84] .text.Trap1Handle PROGBITS        000043aa 0053aa 000008 00  AX  0   0  2
+  [85] .text.Trap0Handle PROGBITS        000043b2 0053b2 000008 00  AX  0   0  2
+  [86] .text.UnrecExecpH PROGBITS        000043ba 0053ba 000008 00  AX  0   0  2
+  [87] .text.BreakPointH PROGBITS        000043c2 0053c2 000008 00  AX  0   0  2
+  [88] .text.AccessErrHa PROGBITS        000043ca 0053ca 000008 00  AX  0   0  2
+  [89] .text.IllegalInst PROGBITS        000043d2 0053d2 000008 00  AX  0   0  2
+  [90] .text.MisalignedH PROGBITS        000043da 0053da 000008 00  AX  0   0  2
+  [91] .text.CNTAIntHand PROGBITS        000043e2 0053e2 000008 00  AX  0   0  2
+  [92] .text.I2CIntHandl PROGBITS        000043ea 0053ea 000008 00  AX  0   0  2
+  [93] .text.__divsi3    PROGBITS        000043f4 0053f4 000024 00  AX  0   0  4
+  [94] .text.__udivsi3   PROGBITS        00004418 005418 000024 00  AX  0   0  4
+  [95] .text.__modsi3    PROGBITS        0000443c 00543c 000024 00  AX  0   0  4
+  [96] .text.__umodsi3   PROGBITS        00004460 005460 000024 00  AX  0   0  4
+  [97] .text.CK_CPU_EnAl PROGBITS        00004484 005484 000006 00  AX  0   0  2
+  [98] .text.UARTx_Init  PROGBITS        0000448c 00548c 0000d8 00  AX  0   0  4
+  [99] .text.UART2_RecvI PROGBITS        00004564 005564 000064 00  AX  0   0  4
+  [100] .text.Dbg_Println PROGBITS        000045c8 0055c8 000098 00  AX  0   0  4
+  [101] .text.Dbg_Print_B PROGBITS        00004660 005660 00009c 00  AX  0   0  4
+  [102] .text.UART2_TASK  PROGBITS        000046fc 0056fc 0000bc 00  AX  0   0  4
+  [103] .text.RC522_Delay PROGBITS        000047b8 0057b8 000012 00  AX  0   0  2
+  [104] .text.RC522_ReadW PROGBITS        000047cc 0057cc 000054 00  AX  0   0  4
+  [105] .text.RC522_ReadR PROGBITS        00004820 005820 000038 00  AX  0   0  4
+  [106] .text.RC522_Write PROGBITS        00004858 005858 000030 00  AX  0   0  4
+  [107] .text.RC522_PcdRe PROGBITS        00004888 005888 00004c 00  AX  0   0  2
+  [108] .text.RC522_SetBi PROGBITS        000048d4 0058d4 000018 00  AX  0   0  2
+  [109] .text.RC522_PcdAn PROGBITS        000048ec 0058ec 00001a 00  AX  0   0  2
+  [110] .text.RC522_Clear PROGBITS        00004906 005906 000016 00  AX  0   0  2
+  [111] .text.RC522_PcdAn PROGBITS        0000491c 00591c 00000c 00  AX  0   0  2
+  [112] .text.RC522_Reset PROGBITS        00004928 005928 000044 00  AX  0   0  4
+  [113] .text.M500PcdConf PROGBITS        0000496c 00596c 00007e 00  AX  0   0  2
+  [114] .text.RC522_Init  PROGBITS        000049ec 0059ec 0000c0 00  AX  0   0  4
+  [115] .text.RC522_PcdCo PROGBITS        00004aac 005aac 000170 00  AX  0   0  4
+  [116] .text.RC522_PcdRe PROGBITS        00004c1c 005c1c 000088 00  AX  0   0  4
+  [117] .text.RC522_PcdAn PROGBITS        00004ca4 005ca4 000074 00  AX  0   0  2
+  [118] .text.Card_Read_T PROGBITS        00004d18 005d18 0000b0 00  AX  0   0  4
+  [119] .text.Detect_SPI_ PROGBITS        00004dc8 005dc8 00009c 00  AX  0   0  4
+  [120] .text.RLY_Light_C PROGBITS        00004e64 005e64 000050 00  AX  0   0  4
+  [121] .text.KEY1_LONG_P PROGBITS        00004eb4 005eb4 000068 00  AX  0   0  4
+  [122] .text.LogicCtrl_I PROGBITS        00004f1c 005f1c 00003c 00  AX  0   0  4
+  [123] .text.LogicCtrl_T PROGBITS        00004f58 005f58 0000f0 00  AX  0   0  4
+  [124] .text.LogicCtrl_N PROGBITS        00005048 006048 000088 00  AX  0   0  4
+  [125] .text.LogicCtrl_N PROGBITS        000050d0 0060d0 0000c0 00  AX  0   0  4
+  [126] .text.BackLight_T PROGBITS        00005190 006190 000024 00  AX  0   0  4
+  [127] .text.Detect_WIFI PROGBITS        000051b4 0061b4 000094 00  AX  0   0  4
+  [128] .text.Led_Task    PROGBITS        00005248 006248 000064 00  AX  0   0  4
+  [129] .text.CRC16       PROGBITS        000052ac 0062ac 00003c 00  AX  0   0  4
+  [130] .text.Read_Versio PROGBITS        000052e8 0062e8 000070 00  AX  0   0  4
+  [131] .text.Card_Recv_P PROGBITS        00005358 006358 00008c 00  AX  0   0  4
+  [132] .text.button_init PROGBITS        000053e4 0063e4 00003a 00  AX  0   0  2
+  [133] .text.button_atta PROGBITS        0000541e 00641e 00000a 00  AX  0   0  2
+  [134] .text.button_hand PROGBITS        00005428 006428 000120 00  AX  0   0  2
+  [135] .text.button_star PROGBITS        00005548 006548 000024 00  AX  0   0  4
+  [136] .text.button_tick PROGBITS        0000556c 00656c 00001c 00  AX  0   0  4
+  [137] .text.read_button PROGBITS        00005588 006588 000014 00  AX  0   0  4
+  [138] .text.TK_Sampling PROGBITS        0000559c 00659c 000058 00  AX  0   0  4
+  [139] .text.TKEYIntHand PROGBITS        000055f4 0065f4 000088 00  AX  0   0  4
+  [140] .text.get_key_num PROGBITS        0000567c 00667c 000028 00  AX  0   0  4
+  [141] .text.TK_Scan_Sta PROGBITS        000056a4 0066a4 000020 00  AX  0   0  4
+  [142] .text.TK_Keymap_p PROGBITS        000056c4 0066c4 000180 00  AX  0   0  4
+  [143] .text.TK_overflow PROGBITS        00005844 006844 00011c 00  AX  0   0  4
+  [144] .text.TK_Baseline PROGBITS        00005960 006960 0001d0 00  AX  0   0  4
+  [145] .text.TK_result_p PROGBITS        00005b30 006b30 000054 00  AX  0   0  4
+  [146] .text.CORETHandle PROGBITS        00005b84 006b84 000078 00  AX  0   0  4
+  [147] .text.std_clk_cal PROGBITS        00005bfc 006bfc 000284 00  AX  0   0  4
+  [148] .RomCode          PROGBITS        00005e80 0080a0 000000 00   W  0   0  1
+  [149] .rodata           PROGBITS        00005e80 006e80 000d38 00   A  0   0  4
+  [150] .data             PROGBITS        20000000 008000 0000a0 00  WA  0   0  4
+  [151] .bss              NOBITS          200000a0 0080a0 0006d0 00  WA  0   0  4
+  [152] .csky.attributes  CSKY_ATTRIBUTES 00000000 0080a0 000022 00      0   0  1
+  [153] .comment          PROGBITS        00000000 0080c2 000042 01  MS  0   0  1
+  [154] .csky_stack_size  PROGBITS        00000000 008110 0008ec 00      0   0 16
+  [155] .debug_line       PROGBITS        00000000 0089fc 003a64 00      0   0  1
+  [156] .debug_info       PROGBITS        00000000 00c460 02c074 00      0   0  1
+  [157] .debug_abbrev     PROGBITS        00000000 0384d4 002945 00      0   0  1
+  [158] .debug_aranges    PROGBITS        00000000 03ae20 000cd0 00      0   0  8
+  [159] .debug_ranges     PROGBITS        00000000 03baf0 000c00 00      0   0  1
+  [160] .debug_str        PROGBITS        00000000 03c6f0 0088f7 01  MS  0   0  1
+  [161] .debug_frame      PROGBITS        00000000 044fe8 001e5c 00      0   0  4
+  [162] .debug_loc        PROGBITS        00000000 046e44 003029 00      0   0  1
+  [163] .shstrtab         STRTAB          00000000 04f72e 000d50 00      0   0  1
+  [164] .symtab           SYMTAB          00000000 049e70 004340 10     165 740  4
+  [165] .strtab           STRTAB          00000000 04e1b0 00157e 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x06bb8 0x06bb8 R E 0x1000
+  LOAD           0x008000 0x20000000 0x00006bb8 0x000a0 0x00770 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__modsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.Dbg_Println .text.Dbg_Print_Buff .text.UART2_TASK .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_Reset .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.Detect_SPI_task .text.RLY_Light_Ctrl .text.KEY1_LONG_PRESS_RELEASE_Handler .text.LogicCtrl_Init .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.BackLight_Task .text.Detect_WIFI_Task .text.Led_Task .text.CRC16 .text.Read_Version_Ack .text.Card_Recv_Pro .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/SYSTEM_uart.o(.text.Dbg_Print_Buff) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	__dtostr.o(.text) refers to Obj/drivers_apt32f102.o(.text.__modsi3) for __modsi3
+	_udivdi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	_umoddi3.o(.text) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_uart.o(.text.UART2_TASK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Card_Recv_Pro) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_uart.o(.text.UART2_TASK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Print_Buff) for Dbg_Print_Buff
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.UART2_TASK) for UART2_TASK
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_rc522.o(.text.RC522_Reset) for RC522_Reset
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) for Detect_SPI_task
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.BackLight_Task) for BackLight_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) for Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) refers to Obj/SYSTEM_logic_ctrl.o(.text.CRC16) for CRC16
+	Obj/SYSTEM_logic_ctrl.o(.text.Card_Recv_Pro) refers to Obj/SYSTEM_logic_ctrl.o(.text.CRC16) for CRC16
+	Obj/SYSTEM_logic_ctrl.o(.text.Card_Recv_Pro) refers to Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) for Read_Version_Ack
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	__dtostr.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	__dtostr.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	__dtostr.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	__dtostr.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	__dtostr.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	__dtostr.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_eq_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_lt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_eq_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_lt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to snprintf_required.o(.text) for __cskyvprintfsnprintf
+	Obj/SYSTEM_uart.o(.text.Dbg_Print_Buff) refers to snprintf_required.o(.text) for __cskyvprintfsnprintf
+	snprintf_required.o(.text) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/SYSTEM_uart.o(.text.Dbg_Println) refers to vsnprintf_required.o(.text) for __cskyvprintfvsnprintf
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	vsnprintf_required.o(.text) refers to memcpy_fast.o(.text) for memcpy
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	vsnprintf_required.o(.text) refers to __v2_printfDFHLlMOPpSSsWp.o(.text) for __v2_printf
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _udivdi3.o(.text) for __udivdi3
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to _umoddi3.o(.text) for __umoddi3
+	__dtostr.o(.text) refers to __dtostr.o(.text) for __GI___dtostr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to __dtostr.o(.text) for __dtostr
+	__dtostr.o(.text) refers to __isnan.o(.text) for __isnan
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strlen_fast.o(.text) for strlen
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strcpy_fast.o(.text) for strcpy
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strchr.o(.text) for strchr
+	__v2_printfDFHLlMOPpSSsWp.o(.text) refers to strerror.o(.text) for strerror
+	__dtostr.o(.text) refers to __isinf.o(.text) for __isinf
+	__dtostr.o(.text) refers to _eq_df.o(.text) for __eqdf2
+	__dtostr.o(.text) refers to _lt_df.o(.text) for __ltdf2
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (491 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2906 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3100 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3417 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3162 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4130 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3533 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3649 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4849 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4957 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7606 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2855 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text.CK_CPU_DisAllNormalIrq(Obj/drivers_apt32f102_ck801.o), (6 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .text.UART1_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (136 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (140 bytes).
+	Removing .text.UART1_TASK(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .text.RC522_CalulateCRC(Obj/SYSTEM_rc522.o), (102 bytes).
+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdSelect(Obj/SYSTEM_rc522.o), (106 bytes).
+	Removing .text.RC522_PcdAuthState(Obj/SYSTEM_rc522.o), (88 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.Debounce_Task(Obj/SYSTEM_logic_ctrl.o), (2 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .text.get_button_event(Obj/SYSTEM_button.o), (6 bytes).
+	Removing .text.button_stop(Obj/SYSTEM_button.o), (32 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (120 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(snprintf_required.o), (0 bytes).
+	Removing .bss(snprintf_required.o), (0 bytes).
+	Removing .data(vsnprintf_required.o), (0 bytes).
+	Removing .bss(vsnprintf_required.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+	Removing .data(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
+	Removing .bss(__v2_printfDFHLlMOPpSSsWp.o), (0 bytes).
+	Removing .data(_udivdi3.o), (0 bytes).
+	Removing .bss(_udivdi3.o), (0 bytes).
+	Removing .data(_umoddi3.o), (0 bytes).
+	Removing .bss(_umoddi3.o), (0 bytes).
+	Removing .text(minilibc_init.o), (60 bytes).
+	Removing .data(minilibc_init.o), (0 bytes).
+	Removing .bss(minilibc_init.o), (0 bytes).
+	Removing .text(critical.o), (16 bytes).
+	Removing .data(critical.o), (0 bytes).
+	Removing .bss(critical.o), (0 bytes).
+	Removing .comment(critical.o), (67 bytes).
+	Removing .csky.attributes(critical.o), (32 bytes).
+	Removing .data(__dtostr.o), (0 bytes).
+	Removing .bss(__dtostr.o), (0 bytes).
+	Removing .data(__isnan.o), (0 bytes).
+	Removing .bss(__isnan.o), (0 bytes).
+	Removing .text(stdinit.o), (0 bytes).
+	Removing .data(stdinit.o), (96 bytes).
+	Removing .bss(stdinit.o), (0 bytes).
+	Removing .comment(stdinit.o), (67 bytes).
+	Removing .csky.attributes(stdinit.o), (32 bytes).
+	Removing .data(strlen_fast.o), (0 bytes).
+	Removing .bss(strlen_fast.o), (0 bytes).
+	Removing .data(strcpy_fast.o), (0 bytes).
+	Removing .bss(strcpy_fast.o), (0 bytes).
+	Removing .data(strchr.o), (0 bytes).
+	Removing .bss(strchr.o), (0 bytes).
+	Removing .data(strerror.o), (0 bytes).
+	Removing .bss(strerror.o), (0 bytes).
+	Removing .data(__isinf.o), (0 bytes).
+	Removing .bss(__isinf.o), (0 bytes).
+	Removing .data(_eq_df.o), (0 bytes).
+	Removing .bss(_eq_df.o), (0 bytes).
+	Removing .data(_lt_df.o), (0 bytes).
+	Removing .bss(_lt_df.o), (0 bytes).
+
+652 unused seciton(s) (total 179749 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	FWlib_apt32f102_clkcalib.o         0x00000000     df        0  *ABS*
+	FWlib_apt32f102_tkey_c_1_17.o      0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_bt.o           0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_ept.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_gpio.o         0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_gpt.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_lpt.o          0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_syscon.o       0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_uart.o         0x00000000     df        0  *ABS*
+	Obj/FWlib_apt32f102_wwdt.o         0x00000000     df        0  *ABS*
+	Obj/SYSTEM_button.o                0x00000000     df        0  *ABS*
+	Obj/SYSTEM_logic_ctrl.o            0x00000000     df        0  *ABS*
+	Obj/SYSTEM_rc522.o                 0x00000000     df        0  *ABS*
+	Obj/SYSTEM_uart.o                  0x00000000     df        0  *ABS*
+	Obj/arch_crt0.o                    0x00000000     df        0  *ABS*
+	Obj/arch_mem_init.o                0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102.o            0x00000000     df        0  *ABS*
+	Obj/drivers_apt32f102_ck801.o      0x00000000     df        0  *ABS*
+	Obj/main.o                         0x00000000     df        0  *ABS*
+	Obj/mcu_initial.o                  0x00000000     df        0  *ABS*
+	Obj/mcu_interrupt.o                0x00000000     df        0  *ABS*
+	__dtostr.o                         0x00000000     df        0  *ABS*
+	__isinf.o                          0x00000000     df        0  *ABS*
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+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
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+	pow                                0x000001b4      F     2474  .text
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+	__GI_scalbn                        0x00000b64      F       32  .text
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+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
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+	__gedf2                            0x00001448      F       60  .text
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+	__floatsidf                        0x000014c0      F      112  .text
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+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
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+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__cskyvprintfsnprintf              0x00001964      F       32  .text
+	__cskyvprintfvsnprintf             0x000019c2      F       90  .text
+	__memset_fast                      0x00001a1c    w F      136  .text
+	memset                             0x00001a1c    w F      136  .text
+	__memcpy_fast                      0x00001aa4    w F      100  .text
+	memcpy                             0x00001aa4    w F      100  .text
+	__v2_printf                        0x00001b3c      F     1828  .text
+	__v2_printf$DFHLlMOPpSSsWp         0x00001b3c      F     1828  .text
+	__udivdi3                          0x00002260      F      940  .text
+	__umoddi3                          0x0000260c      F      928  .text
+	__GI___dtostr                      0x000029d2      F      826  .text
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+	__isnan                            0x00002d0c      F       44  .text
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+	strlen                             0x00002d38    w F       82  .text
+	__strcpy_fast                      0x00002d8c    w F      176  .text
+	strcpy                             0x00002d8c    w F      176  .text
+	__GI_strchr                        0x00002e3c      F       18  .text
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+	__GI_strerror                      0x00002e50      F       28  .text
+	strerror                           0x00002e50      F       28  .text
+	__isinf                            0x00002e6c      F       48  .text
+	__eqdf2                            0x00002e9c      F       58  .text
+	__ltdf2                            0x00002ed8      F       58  .text
+	__main                             0x00002f14      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00002fc0      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x0000300c      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x0000303c      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x000030c4      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x000030ec      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00003128      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x0000313c      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00003154      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00003174      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00003190      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x000031ac      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x000031ec      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x000031f8      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x0000321c      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x0000324c      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x0000332c      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00003340      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x0000334e      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00003356      F        8  .text.GPIO_Write_Low
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+	GPIO_Read_Output                   0x00003384      F       16  .text.GPIO_Read_Output
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+	WWDT_CNT_Load                      0x000033a8      F       16  .text.WWDT_CNT_Load
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+	BT_Soft_Reset                      0x000033dc      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x000033e6      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x000033fe      F       44  .text.BT_ControlSet_Configure
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+	BT_ConfigInterrupt_CMD             0x00003430      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00003444      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00003454      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x000034f4      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00003508      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x0000354c      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x00003560      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00003614      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00003624      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00003634      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x00003650      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x00003668      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x00003680      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x00003698      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000036b4      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x000036d0      F      236  .text.UART_IO_Init
+	UARTInit                           0x000037bc      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x000037cc      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x000037dc      F       30  .text.UARTTransmit
+	EPT_Stop                           0x000037fc      F       40  .text.EPT_Stop
+	main                               0x00003824      F      124  .text.startup.main
+	delay_nms                          0x000038a0      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x000038cc      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x00003960      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x000039c0      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00003a24      F       76  .text.APT32F102_init
+	SYSCONIntHandler                   0x00003a70      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00003b60      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x00003bc8      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00003c30      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00003ddc      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00003e10      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00003e90      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00003f00      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00003f3c      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00003f78      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x0000400c      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x000040f4      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00004148      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00004178      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x000041a8      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x000041f0      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x0000424c      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x000042ac      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x000042e0      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x0000432c      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00004390      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00004392      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x0000439a      F        8  .text.Trap3Handler
+	Trap2Handler                       0x000043a2      F        8  .text.Trap2Handler
+	Trap1Handler                       0x000043aa      F        8  .text.Trap1Handler
+	Trap0Handler                       0x000043b2      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x000043ba      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x000043c2      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x000043ca      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x000043d2      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x000043da      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x000043e2      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x000043ea      F        8  .text.I2CIntHandler
+	__divsi3                           0x000043f4      F       36  .text.__divsi3
+	__udivsi3                          0x00004418      F       36  .text.__udivsi3
+	__modsi3                           0x0000443c      F       36  .text.__modsi3
+	__umodsi3                          0x00004460      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x00004484      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x0000448c      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x00004564      F      100  .text.UART2_RecvINT_Processing
+	Dbg_Println                        0x000045c8      F      152  .text.Dbg_Println
+	Dbg_Print_Buff                     0x00004660      F      156  .text.Dbg_Print_Buff
+	UART2_TASK                         0x000046fc      F      188  .text.UART2_TASK
+	RC522_Delay                        0x000047b8      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x000047cc      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x00004820      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x00004858      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00004888      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x000048d4      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x000048ec      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x00004906      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x0000491c      F       12  .text.RC522_PcdAntennaOff
+	RC522_Reset                        0x00004928      F       68  .text.RC522_Reset
+	RC522_Init                         0x000049ec      F      192  .text.RC522_Init
+	RC522_PcdComMF522                  0x00004aac      F      368  .text.RC522_PcdComMF522
+	RC522_PcdRequest                   0x00004c1c      F      136  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00004ca4      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x00004d18      F      176  .text.Card_Read_TasK
+	Detect_SPI_task                    0x00004dc8      F      156  .text.Detect_SPI_task
+	RLY_Light_Ctrl                     0x00004e64      F       80  .text.RLY_Light_Ctrl
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00004eb4      F      104  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	LogicCtrl_Init                     0x00004f1c      F       60  .text.LogicCtrl_Init
+	LogicCtrl_Task                     0x00004f58      F      240  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00005048      F      136  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x000050d0      F      192  .text.LogicCtrl_NoRF_Task
+	BackLight_Task                     0x00005190      F       36  .text.BackLight_Task
+	Detect_WIFI_Task                   0x000051b4      F      148  .text.Detect_WIFI_Task
+	Led_Task                           0x00005248      F      100  .text.Led_Task
+	CRC16                              0x000052ac      F       60  .text.CRC16
+	Read_Version_Ack                   0x000052e8      F      112  .text.Read_Version_Ack
+	Card_Recv_Pro                      0x00005358      F      140  .text.Card_Recv_Pro
+	button_init                        0x000053e4      F       58  .text.button_init
+	button_attach                      0x0000541e      F       10  .text.button_attach
+	button_handler                     0x00005428      F      288  .text.button_handler
+	button_start                       0x00005548      F       36  .text.button_start
+	button_ticks                       0x0000556c      F       28  .text.button_ticks
+	read_button_GPIO                   0x00005588      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x0000559c      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x000055f4      F      136  .text.TKEYIntHandler
+	get_key_number                     0x0000567c      F       40  .text.get_key_number
+	TK_Scan_Start                      0x000056a4      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000056c4      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00005844      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00005960      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x00005b30      F       84  .text.TK_result_prog
+	CORETHandler                       0x00005b84      F      120  .text.CORETHandler
+	std_clk_calib                      0x00005bfc      F      644  .text.std_clk_calib
+	__thenan_df                        0x00005eb0      O       20  .rodata
+	__clz_tab                          0x00005ec4      O      256  .rodata
+	_end_rodata                        0x00006bb8               0  .rodata
+	HWD                                0x20000000      O        4  .data
+	_start_data                        0x20000000               0  .data
+	CRC                                0x20000004      O        4  .data
+	BT1                                0x20000008      O        4  .data
+	BT0                                0x2000000c      O        4  .data
+	WWDT                               0x20000010      O        4  .data
+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
+	EPT0                               0x20000020      O        4  .data
+	GPT0                               0x20000024      O        4  .data
+	CA0                                0x20000028      O        4  .data
+	SIO0                               0x2000002c      O        4  .data
+	I2C0                               0x20000030      O        4  .data
+	SPI0                               0x20000034      O        4  .data
+	UART2                              0x20000038      O        4  .data
+	UART1                              0x2000003c      O        4  .data
+	UART0                              0x20000040      O        4  .data
+	GPIOGRP                            0x20000044      O        4  .data
+	GPIOB0                             0x20000048      O        4  .data
+	GPIOA0                             0x2000004c      O        4  .data
+	ADC0                               0x20000050      O        4  .data
+	TKEYBUF                            0x20000054      O        4  .data
+	TKEY                               0x20000058      O        4  .data
+	SYSCON                             0x2000005c      O        4  .data
+	IFC                                0x20000060      O        4  .data
+	CK801                              0x20000064      O        4  .data
+	Dbg_Switch                         0x20000068      O        4  .data
+	s_tkey                             0x2000006c      O        4  .data
+	samp_setover_f                     0x20000070      O        1  .data
+	tk_overflow_en                     0x20000071      O        1  .data
+	tk_div                             0x20000072      O       34  .data
+	neg_build_bounce                   0x20000094      O        1  .data
+	pos_build_bounce                   0x20000095      O        1  .data
+	tk_scan_para0                      0x20000098      O        4  .data
+	scan_step_temp                     0x2000009c      O        1  .data
+	_end_data                          0x200000a0               0  .data
+	_bss_start                         0x200000a0               0  .bss
+	rf_exist                           0x200000a0      O        1  .bss
+	last_state                         0x200000a1      O        1  .bss
+	finish_flag                        0x200000a2      O        1  .bss
+	Card_Tick                          0x200000a4      O        4  .bss
+	detect_tick                        0x200000a8      O        4  .bss
+	detect_count                       0x200000ac      O        1  .bss
+	test_state                         0x200000ad      O        1  .bss
+	SysTick_100us                      0x200000b4      O        4  .bss
+	SysTick_1ms                        0x200000b8      O        4  .bss
+	RS485_Comming                      0x200000bc      O        4  .bss
+	RS485_Comm_Flag                    0x200000c0      O        4  .bss
+	RS485_Comm_Start                   0x200000c4      O        4  .bss
+	RS485_Comm_End                     0x200000c8      O        4  .bss
+	SysTick_Now                        0x200000cc      O        4  .bss
+	SysTick_Last                       0x200000d0      O        4  .bss
+	SysTick_Diff                       0x200000d4      O        4  .bss
+	Dbg_Buffer                         0x200000d8      O      512  .bss
+	FIFOLevelReg_flag                  0x200002d8      O        1  .bss
+	scan_tick                          0x200002dc      O        4  .bss
+	HL_tick                            0x200002e0      O        4  .bss
+	Tim_Flag                           0x200002e4      O        4  .bss
+	start_light                        0x200002e8      O        1  .bss
+	power_tick                         0x200002f4      O        4  .bss
+	Press_debounce_data                0x200002fc      O        1  .bss
+	TK_Lowpower_mode                   0x200002fd      O        1  .bss
+	TK_Lowpower_level                  0x200002fe      O        1  .bss
+	TK_longpress_time                  0x20000300      O        4  .bss
+	Release_debounce_data              0x20000304      O        1  .bss
+	Key_mode                           0x20000305      O        1  .bss
+	TK_icon                            0x20000306      O       34  .bss
+	MultiTimes_Filter                  0x20000328      O        1  .bss
+	Base_Speed                         0x20000329      O        1  .bss
+	TK_IO_ENABLE                       0x2000032c      O        4  .bss
+	Valid_Key_Num                      0x20000330      O        1  .bss
+	TK_senprd                          0x20000332      O       34  .bss
+	TK_Wakeup_level                    0x20000354      O        1  .bss
+	TK_Triggerlevel                    0x20000356      O       34  .bss
+	TK_EC_LEVEL                        0x20000378      O        2  .bss
+	TK_FVR_LEVEL                       0x2000037a      O        2  .bss
+	TK_BaseCnt                         0x2000037c      O        4  .bss
+	TK_PSEL_MODE                       0x20000380      O        2  .bss
+	R_CMPB_BUF                         0x20000384      O        4  .bss
+	R_CMPA_BUF                         0x20000388      O        4  .bss
+	R_SIORX_buf                        0x2000038c      O       40  .bss
+	g_uart                             0x200003b4      O      115  .bss
+	CardInfo                           0x20000428      O       52  .bss
+	g_read                             0x2000045c      O        8  .bss
+	KEY1                               0x20000464      O       48  .bss
+	dm_in                              0x20000494      O        9  .bss
+	baseline_data0                     0x200004a0      O       34  .bss
+	TK_Postive_build2                  0x200004c2      O       17  .bss
+	Key_Map1                           0x200004d4      O        4  .bss
+	offset_data2_abs                   0x200004d8      O       34  .bss
+	scan_f                             0x200004fa      O        1  .bss
+	offset_data1_abs                   0x200004fc      O       34  .bss
+	Release_debounce0                  0x2000051e      O       17  .bss
+	Key_Map0                           0x20000530      O        4  .bss
+	bsae_over_f                        0x20000534      O        1  .bss
+	scan_cnt                           0x20000536      O        2  .bss
+	Press_debounce0                    0x20000538      O       17  .bss
+	offset_data0                       0x2000054a      O       34  .bss
+	sampling_data1                     0x2000056c      O       34  .bss
+	Key_Map2                           0x20000590      O        4  .bss
+	Release_debounce1                  0x20000594      O       17  .bss
+	tk_overflow_f                      0x200005a5      O        1  .bss
+	TK_Negtive_build2                  0x200005a6      O       17  .bss
+	base_update_f                      0x200005b7      O        1  .bss
+	TK_Postive_build1                  0x200005b8      O       17  .bss
+	time_cnt                           0x200005cc      O        4  .bss
+	lpt_scan_pend_cnt                  0x200005d0      O        2  .bss
+	TK_track_cnt                       0x200005d2      O        1  .bss
+	Key_Map                            0x200005d4      O        4  .bss
+	baseline_data1                     0x200005d8      O       34  .bss
+	TK_Postive_build0                  0x200005fa      O       17  .bss
+	sampling_data2                     0x2000060c      O       34  .bss
+	offset_data1                       0x2000062e      O       34  .bss
+	TK_ovrdect_cnt                     0x20000650      O        1  .bss
+	Press_debounce2                    0x20000651      O       17  .bss
+	TK_Negtive_build1                  0x20000662      O       17  .bss
+	tk_num                             0x20000673      O        1  .bss
+	TK_Negtive_build0                  0x20000674      O       17  .bss
+	Press_debounce1                    0x20000685      O       17  .bss
+	Release_debounce2                  0x20000696      O       17  .bss
+	r_Key_Map_Temp                     0x200006a8      O        4  .bss
+	tk_seque                           0x200006ac      O       17  .bss
+	scan_step                          0x200006bd      O        1  .bss
+	baseline_data2                     0x200006be      O       34  .bss
+	tk_sampling_max                    0x200006e0      O       34  .bss
+	offset_data0_abs                   0x20000702      O       34  .bss
+	offset_data2                       0x20000724      O       34  .bss
+	sampling_data0                     0x20000746      O       34  .bss
+	errno                              0x20000768      O        4  .bss
+	__malloc_lock                      0x2000076c      O        4  .bss
+	_ebss                              0x20000770               0  .bss
+	_end                               0x20000770               0  .bss
+	end                                0x20000770               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00006bb8, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1014  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1022  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1028  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1035  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1046  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1051  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1058  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1065  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1072  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1079  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1086  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1093  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1100  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1107  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1121  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1128  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1135  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1141  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1148  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1155  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000020   Code   RO       1176  .text          	snprintf_required.o
+    0x00001984   0x00000098   Code   RO       1183  .text          	vsnprintf_required.o
+    0x00001a1c   0x00000088   Code   RO       1190  .text          	memset_fast.o
+    0x00001aa4   0x00000064   Code   RO       1195  .text          	memcpy_fast.o
+    0x00001b08   0x00000758   Code   RO       1353  .text          	__v2_printfDFHLlMOPpSSsWp.o
+    0x00002260   0x000003ac   Code   RO       1412  .text          	_udivdi3.o
+    0x0000260c   0x000003a0   Code   RO       1419  .text          	_umoddi3.o
+    0x000029ac   0x00000360   Code   RO       1440  .text          	__dtostr.o
+    0x00002d0c   0x0000002c   Code   RO       1448  .text          	__isnan.o
+    0x00002d38   0x00000052   Code   RO       1460  .text          	strlen_fast.o
+    0x00002d8a   0x00000002   PAD
+    0x00002d8c   0x000000b0   Code   RO       1465  .text          	strcpy_fast.o
+    0x00002e3c   0x00000012   Code   RO       1470  .text          	strchr.o
+    0x00002e4e   0x00000002   PAD
+    0x00002e50   0x0000001c   Code   RO       1475  .text          	strerror.o
+    0x00002e6c   0x00000030   Code   RO       1483  .text          	__isinf.o
+    0x00002e9c   0x0000003a   Code   RO       1489  .text          	_eq_df.o
+    0x00002ed6   0x00000002   PAD
+    0x00002ed8   0x0000003a   Code   RO       1496  .text          	_lt_df.o
+    0x00002f14   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00002f4c   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00002fc0   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x0000300c   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x0000303c   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x000030c4   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x000030ec   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00003128   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x0000313c   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003154   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00003174   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00003190   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031ac   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x000031ec   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x000031f8   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000321c   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x0000324c   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x0000332c   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00003340   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x0000334e   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00003356   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x0000335e   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00003374   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00003384   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00003394   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x000033a8   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
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+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+        940          0          0          0          0   _udivdi3.o
+        928          0          0          0          0   _umoddi3.o
+	------------------------------------------------------------
+       5040        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         32          0          0          0          0   snprintf_required.o
+        152          0          0          0          0   vsnprintf_required.o
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+       1880         66          0          0          0   __v2_printfDFHLlMOPpSSsWp.o
+          0          0          0          8          0   minilibc_init.o
+          0          0          0          0          0   critical.o
+        864          8          0          0          0   __dtostr.o
+         44          0          0          0          0   __isnan.o
+          0          0          0          0          0   stdinit.o
+         82          0          0          0          0   strlen_fast.o
+        176          0          0          0          0   strcpy_fast.o
+         18          0          0          0          0   strchr.o
+         28       2503          0          0          0   strerror.o
+         48          0          0          0          0   __isinf.o
+	------------------------------------------------------------
+       3560       2577          0          8          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         58          0          0          0          0   _eq_df.o
+         58          0          0          0          0   _lt_df.o
+	------------------------------------------------------------
+        116          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      24176       3384        160       1744     267369   Grand Totals
+      24176       3384        160       1744     267369   Elf Image Totals
+      24176       3384        160          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				27560 (  26.91kB)
+Total	RW	Size (RW Data + ZI Data)			1904 (  1.86kB)
+Total	ROM	Size (Code + RO Data + RW Data)		27720 (  27.07kB)
+
+======================================================================
diff --git a/Source/Lst/TRF_TM_CR_V02_20250219.asm b/Source/Lst/TRF_TM_CR_V02_20250219.asm
new file mode 100644
index 0000000..7871791
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V02_20250219.asm
@@ -0,0 +1,11484 @@
+
+.//Obj/TRF_TM_CR_V02_20250219.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	00002f1e 	.long	0x00002f1e
+       8:	00002f0e 	.long	0x00002f0e
+       c:	00000184 	.long	0x00000184
+      10:	00002f16 	.long	0x00002f16
+      14:	00002ed4 	.long	0x00002ed4
+      18:	00000184 	.long	0x00000184
+      1c:	00002f06 	.long	0x00002f06
+      20:	00002efe 	.long	0x00002efe
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	00002ef6 	.long	0x00002ef6
+      44:	00002eee 	.long	0x00002eee
+      48:	00002ee6 	.long	0x00002ee6
+      4c:	00002ede 	.long	0x00002ede
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00002ed6 	.long	0x00002ed6
+      80:	000045b0 	.long	0x000045b0
+      84:	000025b4 	.long	0x000025b4
+      88:	000026a4 	.long	0x000026a4
+      8c:	0000270c 	.long	0x0000270c
+      90:	00002774 	.long	0x00002774
+      94:	00000184 	.long	0x00000184
+      98:	00002920 	.long	0x00002920
+      9c:	00002c8c 	.long	0x00002c8c
+      a0:	00002cbc 	.long	0x00002cbc
+      a4:	00002954 	.long	0x00002954
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	000029d4 	.long	0x000029d4
+      b4:	00002a44 	.long	0x00002a44
+      b8:	00002a80 	.long	0x00002a80
+      bc:	00002abc 	.long	0x00002abc
+      c0:	00000184 	.long	0x00000184
+      c4:	00002f2e 	.long	0x00002f2e
+      c8:	00000184 	.long	0x00000184
+      cc:	00002b50 	.long	0x00002b50
+      d0:	00002c38 	.long	0x00002c38
+      d4:	00002cec 	.long	0x00002cec
+      d8:	00002d34 	.long	0x00002d34
+      dc:	00002d90 	.long	0x00002d90
+      e0:	00002f26 	.long	0x00002f26
+      e4:	00004020 	.long	0x00004020
+      e8:	00002df0 	.long	0x00002df0
+      ec:	00000184 	.long	0x00000184
+      f0:	00002e24 	.long	0x00002e24
+      f4:	00002e70 	.long	0x00002e70
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x1a50	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x2360	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00001a50 	.long	0x00001a50
+     198:	00000160 	.long	0x00000160
+     19c:	00002360 	.long	0x00002360
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x48ac	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	000048ac 	.long	0x000048ac
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x48ac	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x48ac	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	000048ac 	.long	0x000048ac
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x48dc	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	000048dc 	.long	0x000048dc
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x48dc	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	000048dc 	.long	0x000048dc
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x48dc	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	000048dc 	.long	0x000048dc
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x48f0	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	000048f0 	.long	0x000048f0
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__memset_fast>:
+    1964:	14c3      	push      	r4-r6
+    1966:	7444      	zextb      	r1, r1
+    1968:	3a40      	cmpnei      	r2, 0
+    196a:	0c1f      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    196c:	6d43      	mov      	r5, r0
+    196e:	6d03      	mov      	r4, r0
+    1970:	3603      	movi      	r6, 3
+    1972:	6918      	and      	r4, r6
+    1974:	3c40      	cmpnei      	r4, 0
+    1976:	0c1a      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    1978:	a520      	st.b      	r1, (r5, 0x0)
+    197a:	2a00      	subi      	r2, 1
+    197c:	3a40      	cmpnei      	r2, 0
+    197e:	0c15      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1980:	2500      	addi      	r5, 1
+    1982:	6d17      	mov      	r4, r5
+    1984:	3603      	movi      	r6, 3
+    1986:	6918      	and      	r4, r6
+    1988:	3c40      	cmpnei      	r4, 0
+    198a:	0c10      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    198c:	a520      	st.b      	r1, (r5, 0x0)
+    198e:	2a00      	subi      	r2, 1
+    1990:	3a40      	cmpnei      	r2, 0
+    1992:	0c0b      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1994:	2500      	addi      	r5, 1
+    1996:	6d17      	mov      	r4, r5
+    1998:	3603      	movi      	r6, 3
+    199a:	6918      	and      	r4, r6
+    199c:	3c40      	cmpnei      	r4, 0
+    199e:	0c06      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a0:	a520      	st.b      	r1, (r5, 0x0)
+    19a2:	2a00      	subi      	r2, 1
+    19a4:	2500      	addi      	r5, 1
+    19a6:	0402      	br      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a8:	1483      	pop      	r4-r6
+    19aa:	4168      	lsli      	r3, r1, 8
+    19ac:	6c4c      	or      	r1, r3
+    19ae:	4170      	lsli      	r3, r1, 16
+    19b0:	6c4c      	or      	r1, r3
+    19b2:	3a2f      	cmplti      	r2, 16
+    19b4:	0809      	bt      	0x19c6	// 19c6 <__memset_fast+0x62>
+    19b6:	b520      	st.w      	r1, (r5, 0x0)
+    19b8:	b521      	st.w      	r1, (r5, 0x4)
+    19ba:	b522      	st.w      	r1, (r5, 0x8)
+    19bc:	b523      	st.w      	r1, (r5, 0xc)
+    19be:	2a0f      	subi      	r2, 16
+    19c0:	250f      	addi      	r5, 16
+    19c2:	3a2f      	cmplti      	r2, 16
+    19c4:	0ff9      	bf      	0x19b6	// 19b6 <__memset_fast+0x52>
+    19c6:	3a23      	cmplti      	r2, 4
+    19c8:	0806      	bt      	0x19d4	// 19d4 <__memset_fast+0x70>
+    19ca:	2a03      	subi      	r2, 4
+    19cc:	b520      	st.w      	r1, (r5, 0x0)
+    19ce:	2503      	addi      	r5, 4
+    19d0:	3a23      	cmplti      	r2, 4
+    19d2:	0ffc      	bf      	0x19ca	// 19ca <__memset_fast+0x66>
+    19d4:	3a40      	cmpnei      	r2, 0
+    19d6:	0fe9      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19d8:	2a00      	subi      	r2, 1
+    19da:	a520      	st.b      	r1, (r5, 0x0)
+    19dc:	3a40      	cmpnei      	r2, 0
+    19de:	0fe5      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e0:	2a00      	subi      	r2, 1
+    19e2:	a521      	st.b      	r1, (r5, 0x1)
+    19e4:	3a40      	cmpnei      	r2, 0
+    19e6:	0fe1      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e8:	a522      	st.b      	r1, (r5, 0x2)
+    19ea:	1483      	pop      	r4-r6
+
+000019ec <__memcpy_fast>:
+    19ec:	14c3      	push      	r4-r6
+    19ee:	6d83      	mov      	r6, r0
+    19f0:	6d07      	mov      	r4, r1
+    19f2:	6d18      	or      	r4, r6
+    19f4:	3303      	movi      	r3, 3
+    19f6:	690c      	and      	r4, r3
+    19f8:	3c40      	cmpnei      	r4, 0
+    19fa:	0c0b      	bf      	0x1a10	// 1a10 <__memcpy_fast+0x24>
+    19fc:	3a40      	cmpnei      	r2, 0
+    19fe:	0c08      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a00:	8160      	ld.b      	r3, (r1, 0x0)
+    1a02:	2100      	addi      	r1, 1
+    1a04:	2a00      	subi      	r2, 1
+    1a06:	a660      	st.b      	r3, (r6, 0x0)
+    1a08:	2600      	addi      	r6, 1
+    1a0a:	3a40      	cmpnei      	r2, 0
+    1a0c:	0bfa      	bt      	0x1a00	// 1a00 <__memcpy_fast+0x14>
+    1a0e:	1483      	pop      	r4-r6
+    1a10:	3a2f      	cmplti      	r2, 16
+    1a12:	080e      	bt      	0x1a2e	// 1a2e <__memcpy_fast+0x42>
+    1a14:	91a0      	ld.w      	r5, (r1, 0x0)
+    1a16:	9161      	ld.w      	r3, (r1, 0x4)
+    1a18:	9182      	ld.w      	r4, (r1, 0x8)
+    1a1a:	b6a0      	st.w      	r5, (r6, 0x0)
+    1a1c:	91a3      	ld.w      	r5, (r1, 0xc)
+    1a1e:	b661      	st.w      	r3, (r6, 0x4)
+    1a20:	b682      	st.w      	r4, (r6, 0x8)
+    1a22:	b6a3      	st.w      	r5, (r6, 0xc)
+    1a24:	2a0f      	subi      	r2, 16
+    1a26:	210f      	addi      	r1, 16
+    1a28:	260f      	addi      	r6, 16
+    1a2a:	3a2f      	cmplti      	r2, 16
+    1a2c:	0ff4      	bf      	0x1a14	// 1a14 <__memcpy_fast+0x28>
+    1a2e:	3a23      	cmplti      	r2, 4
+    1a30:	0808      	bt      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+    1a32:	9160      	ld.w      	r3, (r1, 0x0)
+    1a34:	2a03      	subi      	r2, 4
+    1a36:	2103      	addi      	r1, 4
+    1a38:	b660      	st.w      	r3, (r6, 0x0)
+    1a3a:	2603      	addi      	r6, 4
+    1a3c:	3a23      	cmplti      	r2, 4
+    1a3e:	0ffa      	bf      	0x1a32	// 1a32 <__memcpy_fast+0x46>
+    1a40:	3a40      	cmpnei      	r2, 0
+    1a42:	0fe6      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a44:	8160      	ld.b      	r3, (r1, 0x0)
+    1a46:	2100      	addi      	r1, 1
+    1a48:	2a00      	subi      	r2, 1
+    1a4a:	a660      	st.b      	r3, (r6, 0x0)
+    1a4c:	2600      	addi      	r6, 1
+    1a4e:	07f9      	br      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+
+Disassembly of section .text.__main:
+
+00001a50 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    1a50:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    1a52:	1009      	lrw      	r0, 0x20000000	// 1a74 <__main+0x24>
+    1a54:	1029      	lrw      	r1, 0x4bb8	// 1a78 <__main+0x28>
+    1a56:	6442      	cmpne      	r0, r1
+    1a58:	0c05      	bf      	0x1a62	// 1a62 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    1a5a:	1049      	lrw      	r2, 0x2000009c	// 1a7c <__main+0x2c>
+    1a5c:	6082      	subu      	r2, r0
+    1a5e:	e3ffffc7 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    1a62:	1048      	lrw      	r2, 0x20000560	// 1a80 <__main+0x30>
+    1a64:	1008      	lrw      	r0, 0x2000009c	// 1a84 <__main+0x34>
+    1a66:	640a      	cmpne      	r2, r0
+    1a68:	0c05      	bf      	0x1a72	// 1a72 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    1a6a:	6082      	subu      	r2, r0
+    1a6c:	3100      	movi      	r1, 0
+    1a6e:	e3ffff7b 	bsr      	0x1964	// 1964 <__memset_fast>
+  }
+
+	
+}
+    1a72:	1490      	pop      	r15
+    1a74:	20000000 	.long	0x20000000
+    1a78:	00004bb8 	.long	0x00004bb8
+    1a7c:	2000009c 	.long	0x2000009c
+    1a80:	20000560 	.long	0x20000560
+    1a84:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00001a88 <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    1a88:	3848      	cmpnei      	r0, 8
+    1a8a:	080a      	bt      	0x1a9e	// 1a9e <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    1a8c:	107a      	lrw      	r3, 0x2000004c	// 1af4 <SYSCON_General_CMD.part.0+0x6c>
+    1a8e:	32ff      	movi      	r2, 255
+    1a90:	9320      	ld.w      	r1, (r3, 0x0)
+    1a92:	9160      	ld.w      	r3, (r1, 0x0)
+    1a94:	424c      	lsli      	r2, r2, 12
+    1a96:	68c9      	andn      	r3, r2
+    1a98:	3bae      	bseti      	r3, 14
+    1a9a:	3bb2      	bseti      	r3, 18
+    1a9c:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    1a9e:	1077      	lrw      	r3, 0x2000005c	// 1af8 <SYSCON_General_CMD.part.0+0x70>
+    1aa0:	9360      	ld.w      	r3, (r3, 0x0)
+    1aa2:	9341      	ld.w      	r2, (r3, 0x4)
+    1aa4:	6c80      	or      	r2, r0
+    1aa6:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    1aa8:	9343      	ld.w      	r2, (r3, 0xc)
+    1aaa:	6880      	and      	r2, r0
+    1aac:	3a40      	cmpnei      	r2, 0
+    1aae:	0ffd      	bf      	0x1aa8	// 1aa8 <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    1ab0:	3842      	cmpnei      	r0, 2
+    1ab2:	0807      	bt      	0x1ac0	// 1ac0 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    1ab4:	3102      	movi      	r1, 2
+    1ab6:	9344      	ld.w      	r2, (r3, 0x10)
+    1ab8:	6884      	and      	r2, r1
+    1aba:	3a40      	cmpnei      	r2, 0
+    1abc:	0ffd      	bf      	0x1ab6	// 1ab6 <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    1abe:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    1ac0:	3802      	cmphsi      	r0, 3
+    1ac2:	0809      	bt      	0x1ad4	// 1ad4 <SYSCON_General_CMD.part.0+0x4c>
+    1ac4:	3841      	cmpnei      	r0, 1
+    1ac6:	0bfc      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    1ac8:	3101      	movi      	r1, 1
+    1aca:	9344      	ld.w      	r2, (r3, 0x10)
+    1acc:	6884      	and      	r2, r1
+    1ace:	3a40      	cmpnei      	r2, 0
+    1ad0:	0ffd      	bf      	0x1aca	// 1aca <SYSCON_General_CMD.part.0+0x42>
+    1ad2:	07f6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ad4:	3848      	cmpnei      	r0, 8
+    1ad6:	0807      	bt      	0x1ae4	// 1ae4 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    1ad8:	3108      	movi      	r1, 8
+    1ada:	9344      	ld.w      	r2, (r3, 0x10)
+    1adc:	6884      	and      	r2, r1
+    1ade:	3a40      	cmpnei      	r2, 0
+    1ae0:	0ffd      	bf      	0x1ada	// 1ada <SYSCON_General_CMD.part.0+0x52>
+    1ae2:	07ee      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ae4:	3850      	cmpnei      	r0, 16
+    1ae6:	0bec      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    1ae8:	3110      	movi      	r1, 16
+    1aea:	9344      	ld.w      	r2, (r3, 0x10)
+    1aec:	6884      	and      	r2, r1
+    1aee:	3a40      	cmpnei      	r2, 0
+    1af0:	0ffd      	bf      	0x1aea	// 1aea <SYSCON_General_CMD.part.0+0x62>
+    1af2:	07e6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+    1af4:	2000004c 	.long	0x2000004c
+    1af8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00001afc <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    1afc:	106c      	lrw      	r3, 0x2000005c	// 1b2c <SYSCON_RST_VALUE+0x30>
+    1afe:	104d      	lrw      	r2, 0xffff	// 1b30 <SYSCON_RST_VALUE+0x34>
+    1b00:	9360      	ld.w      	r3, (r3, 0x0)
+    1b02:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    1b04:	104c      	lrw      	r2, 0xffffff	// 1b34 <SYSCON_RST_VALUE+0x38>
+    1b06:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    1b08:	104c      	lrw      	r2, 0xd22d0000	// 1b38 <SYSCON_RST_VALUE+0x3c>
+    1b0a:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    1b0c:	104c      	lrw      	r2, 0x70ff3bff	// 1b3c <SYSCON_RST_VALUE+0x40>
+    1b0e:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    1b10:	320a      	movi      	r2, 10
+    1b12:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b14:	102b      	lrw      	r1, 0x70c	// 1b40 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    1b16:	237f      	addi      	r3, 128
+    1b18:	3200      	movi      	r2, 0
+    1b1a:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    1b1c:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b1e:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    1b20:	1029      	lrw      	r1, 0x3fe	// 1b44 <SYSCON_RST_VALUE+0x48>
+    1b22:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    1b24:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    1b26:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    1b28:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    1b2a:	783c      	jmp      	r15
+    1b2c:	2000005c 	.long	0x2000005c
+    1b30:	0000ffff 	.long	0x0000ffff
+    1b34:	00ffffff 	.long	0x00ffffff
+    1b38:	d22d0000 	.long	0xd22d0000
+    1b3c:	70ff3bff 	.long	0x70ff3bff
+    1b40:	0000070c 	.long	0x0000070c
+    1b44:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+00001b48 <SYSCON_General_CMD>:
+{
+    1b48:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    1b4a:	3840      	cmpnei      	r0, 0
+    1b4c:	0c05      	bf      	0x1b56	// 1b56 <SYSCON_General_CMD+0xe>
+    1b4e:	6c07      	mov      	r0, r1
+    1b50:	e3ffff9c 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+}
+    1b54:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    1b56:	1068      	lrw      	r3, 0x2000005c	// 1b74 <SYSCON_General_CMD+0x2c>
+    1b58:	9360      	ld.w      	r3, (r3, 0x0)
+    1b5a:	9342      	ld.w      	r2, (r3, 0x8)
+    1b5c:	6c84      	or      	r2, r1
+    1b5e:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    1b60:	9343      	ld.w      	r2, (r3, 0xc)
+    1b62:	6884      	and      	r2, r1
+    1b64:	3a40      	cmpnei      	r2, 0
+    1b66:	0bfd      	bt      	0x1b60	// 1b60 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    1b68:	237f      	addi      	r3, 128
+    1b6a:	9301      	ld.w      	r0, (r3, 0x4)
+    1b6c:	6c40      	or      	r1, r0
+    1b6e:	b321      	st.w      	r1, (r3, 0x4)
+}
+    1b70:	07f2      	br      	0x1b54	// 1b54 <SYSCON_General_CMD+0xc>
+    1b72:	0000      	bkpt
+    1b74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+00001b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    1b78:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    1b7a:	3b48      	cmpnei      	r3, 8
+    1b7c:	0828      	bt      	0x1bcc	// 1bcc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b7e:	109d      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b80:	3501      	movi      	r5, 1
+    1b82:	9480      	ld.w      	r4, (r4, 0x0)
+    1b84:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    1b86:	3504      	movi      	r5, 4
+    1b88:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1b8a:	5b83      	subi      	r4, r3, 1
+    1b8c:	3c01      	cmphsi      	r4, 2
+    1b8e:	0c2b      	bf      	0x1be4	// 1be4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b90:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    1b92:	3c04      	cmphsi      	r4, 5
+    1b94:	0c03      	bf      	0x1b9a	// 1b9a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b96:	3b4b      	cmpnei      	r3, 11
+    1b98:	0807      	bt      	0x1ba6	// 1ba6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b9a:	1076      	lrw      	r3, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b9c:	3401      	movi      	r4, 1
+    1b9e:	9360      	ld.w      	r3, (r3, 0x0)
+    1ba0:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    1ba2:	3400      	movi      	r4, 0
+    1ba4:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1ba6:	1094      	lrw      	r4, 0xd22d0000	// 1bf4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    1ba8:	6c10      	or      	r0, r4
+    1baa:	1074      	lrw      	r3, 0x2000005c	// 1bf8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    1bac:	6c40      	or      	r1, r0
+    1bae:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb0:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1bb2:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb4:	4001      	lsli      	r0, r0, 1
+    1bb6:	9324      	ld.w      	r1, (r3, 0x10)
+    1bb8:	6840      	and      	r1, r0
+    1bba:	3940      	cmpnei      	r1, 0
+    1bbc:	0ffd      	bf      	0x1bb6	// 1bb6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    1bbe:	1030      	lrw      	r1, 0xc33c0000	// 1bfc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    1bc0:	6c48      	or      	r1, r2
+    1bc2:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    1bc4:	9328      	ld.w      	r1, (r3, 0x20)
+    1bc6:	644a      	cmpne      	r2, r1
+    1bc8:	0bfe      	bt      	0x1bc4	// 1bc4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    1bca:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    1bcc:	3b40      	cmpnei      	r3, 0
+    1bce:	0c03      	bf      	0x1bd4	// 1bd4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    1bd0:	3b49      	cmpnei      	r3, 9
+    1bd2:	0807      	bt      	0x1be0	// 1be0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    1bd4:	1087      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bd6:	3501      	movi      	r5, 1
+    1bd8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bda:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    1bdc:	3502      	movi      	r5, 2
+    1bde:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1be0:	3b4a      	cmpnei      	r3, 10
+    1be2:	0bd4      	bt      	0x1b8a	// 1b8a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    1be4:	1083      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1be6:	3501      	movi      	r5, 1
+    1be8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bea:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    1bec:	b4a5      	st.w      	r5, (r4, 0x14)
+    1bee:	07d1      	br      	0x1b90	// 1b90 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    1bf0:	20000060 	.long	0x20000060
+    1bf4:	d22d0000 	.long	0xd22d0000
+    1bf8:	2000005c 	.long	0x2000005c
+    1bfc:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+00001c00 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    1c00:	14d1      	push      	r4, r15
+    1c02:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    1c04:	3110      	movi      	r1, 16
+    1c06:	3000      	movi      	r0, 0
+    1c08:	e3ffffa0 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    1c0c:	1066      	lrw      	r3, 0x2000005c	// 1c24 <SYSCON_HFOSC_SELECTE+0x24>
+    1c0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c10:	9319      	ld.w      	r0, (r3, 0x64)
+    1c12:	3884      	bclri      	r0, 4
+    1c14:	3885      	bclri      	r0, 5
+    1c16:	6c10      	or      	r0, r4
+    1c18:	b319      	st.w      	r0, (r3, 0x64)
+    1c1a:	3010      	movi      	r0, 16
+    1c1c:	e3ffff36 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    1c20:	1491      	pop      	r4, r15
+    1c22:	0000      	bkpt
+    1c24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+00001c28 <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    1c28:	106c      	lrw      	r3, 0x2000005c	// 1c58 <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    1c2a:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c2c:	9360      	ld.w      	r3, (r3, 0x0)
+    1c2e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1c30:	0c0a      	bf      	0x1c44	// 1c44 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c32:	104b      	lrw      	r2, 0x78870000	// 1c5c <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c34:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c36:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c38:	4125      	lsli      	r1, r1, 5
+    1c3a:	934d      	ld.w      	r2, (r3, 0x34)
+    1c3c:	6884      	and      	r2, r1
+    1c3e:	3a40      	cmpnei      	r2, 0
+    1c40:	0ffd      	bf      	0x1c3a	// 1c3a <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    1c42:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c44:	1047      	lrw      	r2, 0x788755aa	// 1c60 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c46:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c48:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c4a:	4125      	lsli      	r1, r1, 5
+    1c4c:	934d      	ld.w      	r2, (r3, 0x34)
+    1c4e:	6884      	and      	r2, r1
+    1c50:	3a40      	cmpnei      	r2, 0
+    1c52:	0bfd      	bt      	0x1c4c	// 1c4c <SYSCON_WDT_CMD+0x24>
+    1c54:	07f7      	br      	0x1c42	// 1c42 <SYSCON_WDT_CMD+0x1a>
+    1c56:	0000      	bkpt
+    1c58:	2000005c 	.long	0x2000005c
+    1c5c:	78870000 	.long	0x78870000
+    1c60:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00001c64 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    1c64:	1064      	lrw      	r3, 0x2000005c	// 1c74 <SYSCON_IWDCNT_Reload+0x10>
+    1c66:	32b4      	movi      	r2, 180
+    1c68:	9360      	ld.w      	r3, (r3, 0x0)
+    1c6a:	237f      	addi      	r3, 128
+    1c6c:	4257      	lsli      	r2, r2, 23
+    1c6e:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    1c70:	783c      	jmp      	r15
+    1c72:	0000      	bkpt
+    1c74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+00001c78 <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    1c78:	1044      	lrw      	r2, 0x87780000	// 1c88 <SYSCON_IWDCNT_Config+0x10>
+    1c7a:	1065      	lrw      	r3, 0x2000005c	// 1c8c <SYSCON_IWDCNT_Config+0x14>
+    1c7c:	6c48      	or      	r1, r2
+    1c7e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c80:	6c04      	or      	r0, r1
+    1c82:	237f      	addi      	r3, 128
+    1c84:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    1c86:	783c      	jmp      	r15
+    1c88:	87780000 	.long	0x87780000
+    1c8c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00001c90 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    1c90:	14c3      	push      	r4-r6
+    1c92:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    1c94:	10c5      	lrw      	r6, 0xb44b0000	// 1ca8 <SYSCON_LVD_Config+0x18>
+    1c96:	6d18      	or      	r4, r6
+    1c98:	6cd0      	or      	r3, r4
+    1c9a:	6c8c      	or      	r2, r3
+    1c9c:	6c48      	or      	r1, r2
+    1c9e:	10a4      	lrw      	r5, 0x2000005c	// 1cac <SYSCON_LVD_Config+0x1c>
+    1ca0:	6c04      	or      	r0, r1
+    1ca2:	95a0      	ld.w      	r5, (r5, 0x0)
+    1ca4:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    1ca6:	1483      	pop      	r4-r6
+    1ca8:	b44b0000 	.long	0xb44b0000
+    1cac:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00001cb0 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    1cb0:	1066      	lrw      	r3, 0x2000005c	// 1cc8 <LVD_Int_Enable+0x18>
+    1cb2:	3180      	movi      	r1, 128
+    1cb4:	9360      	ld.w      	r3, (r3, 0x0)
+    1cb6:	3280      	movi      	r2, 128
+    1cb8:	604c      	addu      	r1, r3
+    1cba:	4244      	lsli      	r2, r2, 4
+    1cbc:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    1cbe:	935d      	ld.w      	r2, (r3, 0x74)
+    1cc0:	3aab      	bseti      	r2, 11
+    1cc2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1cc4:	783c      	jmp      	r15
+    1cc6:	0000      	bkpt
+    1cc8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00001ccc <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    1ccc:	1066      	lrw      	r3, 0x2000005c	// 1ce4 <IWDT_Int_Enable+0x18>
+    1cce:	3180      	movi      	r1, 128
+    1cd0:	9360      	ld.w      	r3, (r3, 0x0)
+    1cd2:	3280      	movi      	r2, 128
+    1cd4:	604c      	addu      	r1, r3
+    1cd6:	4241      	lsli      	r2, r2, 1
+    1cd8:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    1cda:	935d      	ld.w      	r2, (r3, 0x74)
+    1cdc:	3aa8      	bseti      	r2, 8
+    1cde:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1ce0:	783c      	jmp      	r15
+    1ce2:	0000      	bkpt
+    1ce4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+00001ce8 <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    1ce8:	3a40      	cmpnei      	r2, 0
+    1cea:	0c04      	bf      	0x1cf2	// 1cf2 <EXTI_trigger_CMD+0xa>
+    1cec:	3a41      	cmpnei      	r2, 1
+    1cee:	0c0e      	bf      	0x1d0a	// 1d0a <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    1cf0:	783c      	jmp      	r15
+    1cf2:	106d      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1cf4:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    1cf6:	9360      	ld.w      	r3, (r3, 0x0)
+    1cf8:	237f      	addi      	r3, 128
+    1cfa:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    1cfc:	0c04      	bf      	0x1d04	// 1d04 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    1cfe:	6c48      	or      	r1, r2
+    1d00:	b325      	st.w      	r1, (r3, 0x14)
+    1d02:	07f7      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    1d04:	6885      	andn      	r2, r1
+    1d06:	b345      	st.w      	r2, (r3, 0x14)
+    1d08:	07f4      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d0a:	1067      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d0c:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    1d0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1d10:	237f      	addi      	r3, 128
+    1d12:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    1d14:	0c04      	bf      	0x1d1c	// 1d1c <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    1d16:	6c48      	or      	r1, r2
+    1d18:	b326      	st.w      	r1, (r3, 0x18)
+    1d1a:	07eb      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    1d1c:	6885      	andn      	r2, r1
+    1d1e:	b346      	st.w      	r2, (r3, 0x18)
+}
+    1d20:	07e8      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d22:	0000      	bkpt
+    1d24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+00001d28 <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    1d28:	3202      	movi      	r2, 2
+    1d2a:	1062      	lrw      	r3, 0xe000e100	// 1d30 <SYSCON_Int_Enable+0x8>
+    1d2c:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1d2e:	783c      	jmp      	r15
+    1d30:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+00001d34 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d34:	1066      	lrw      	r3, 0xe000e400	// 1d4c <SYSCON_INT_Priority+0x18>
+    1d36:	1047      	lrw      	r2, 0xc0c0c0c0	// 1d50 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d38:	1027      	lrw      	r1, 0xc0c000c0	// 1d54 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d3a:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    1d3c:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    1d3e:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    1d40:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    1d42:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    1d44:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d46:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    1d48:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    1d4a:	783c      	jmp      	r15
+    1d4c:	e000e400 	.long	0xe000e400
+    1d50:	c0c0c0c0 	.long	0xc0c0c0c0
+    1d54:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+00001d58 <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    1d58:	14c1      	push      	r4
+    1d5a:	4862      	lsri      	r3, r0, 2
+    1d5c:	4342      	lsli      	r2, r3, 2
+    1d5e:	106a      	lrw      	r3, 0x20000064	// 1d84 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    1d60:	3403      	movi      	r4, 3
+    1d62:	9360      	ld.w      	r3, (r3, 0x0)
+    1d64:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d66:	3280      	movi      	r2, 128
+    1d68:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    1d6a:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d6c:	60c8      	addu      	r3, r2
+    1d6e:	4003      	lsli      	r0, r0, 3
+    1d70:	34ff      	movi      	r4, 255
+    1d72:	9340      	ld.w      	r2, (r3, 0x0)
+    1d74:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1d76:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1d78:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1d7a:	7040      	lsl      	r1, r0
+    1d7c:	6c48      	or      	r1, r2
+    1d7e:	b320      	st.w      	r1, (r3, 0x0)
+}
+    1d80:	1481      	pop      	r4
+    1d82:	0000      	bkpt
+    1d84:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+00001d88 <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    1d88:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    1d8a:	3907      	cmphsi      	r1, 8
+{
+    1d8c:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    1d8e:	0830      	bt      	0x1dee	// 1dee <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    1d90:	5903      	subi      	r0, r1, 1
+    1d92:	3806      	cmphsi      	r0, 7
+    1d94:	0827      	bt      	0x1de2	// 1de2 <GPIO_Init+0x5a>
+    1d96:	e3fff7b3 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1d9a:	1004      	.short	0x1004
+    1d9c:	1d1a1613 	.long	0x1d1a1613
+    1da0:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1da2:	3300      	movi      	r3, 0
+    1da4:	3104      	movi      	r1, 4
+    1da6:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    1da8:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1daa:	9440      	ld.w      	r2, (r4, 0x0)
+    1dac:	68c8      	and      	r3, r2
+        if (Dir)
+    1dae:	0c1e      	bf      	0x1dea	// 1dea <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1db0:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1db2:	7084      	lsl      	r2, r1
+    1db4:	6cc8      	or      	r3, r2
+    1db6:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    1db8:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1dba:	3108      	movi      	r1, 8
+    1dbc:	1166      	lrw      	r3, 0xfffff0ff	// 1e54 <GPIO_Init+0xcc>
+    1dbe:	07f5      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1dc0:	310c      	movi      	r1, 12
+    1dc2:	1166      	lrw      	r3, 0xffff0fff	// 1e58 <GPIO_Init+0xd0>
+    1dc4:	07f2      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1dc6:	3110      	movi      	r1, 16
+    1dc8:	1165      	lrw      	r3, 0xfff10000	// 1e5c <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1dca:	2b00      	subi      	r3, 1
+    1dcc:	07ee      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1dce:	3114      	movi      	r1, 20
+    1dd0:	1164      	lrw      	r3, 0xff100000	// 1e60 <GPIO_Init+0xd8>
+    1dd2:	07fc      	br      	0x1dca	// 1dca <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1dd4:	33f1      	movi      	r3, 241
+    1dd6:	3118      	movi      	r1, 24
+    1dd8:	4378      	lsli      	r3, r3, 24
+    1dda:	07f8      	br      	0x1dca	// 1dca <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1ddc:	311c      	movi      	r1, 28
+    1dde:	1162      	lrw      	r3, 0xfffffff	// 1e64 <GPIO_Init+0xdc>
+    1de0:	07e4      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1de2:	3300      	movi      	r3, 0
+    1de4:	3100      	movi      	r1, 0
+    1de6:	2b0f      	subi      	r3, 16
+    1de8:	07e0      	br      	0x1da8	// 1da8 <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1dea:	3202      	movi      	r2, 2
+    1dec:	07e3      	br      	0x1db2	// 1db2 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    1dee:	390f      	cmphsi      	r1, 16
+    1df0:	0be4      	bt      	0x1db8	// 1db8 <GPIO_Init+0x30>
+        switch (PinNum)
+    1df2:	2908      	subi      	r1, 9
+    1df4:	3906      	cmphsi      	r1, 7
+    1df6:	6c07      	mov      	r0, r1
+    1df8:	0827      	bt      	0x1e46	// 1e46 <GPIO_Init+0xbe>
+    1dfa:	e3fff781 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1dfe:	1004      	.short	0x1004
+    1e00:	1d1a1613 	.long	0x1d1a1613
+    1e04:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e06:	3300      	movi      	r3, 0
+    1e08:	3104      	movi      	r1, 4
+    1e0a:	2bf0      	subi      	r3, 241
+      if (Dir)
+    1e0c:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e0e:	9441      	ld.w      	r2, (r4, 0x4)
+    1e10:	68c8      	and      	r3, r2
+      if (Dir)
+    1e12:	0c1e      	bf      	0x1e4e	// 1e4e <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e14:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e16:	7084      	lsl      	r2, r1
+    1e18:	6cc8      	or      	r3, r2
+    1e1a:	b461      	st.w      	r3, (r4, 0x4)
+}
+    1e1c:	07ce      	br      	0x1db8	// 1db8 <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e1e:	3108      	movi      	r1, 8
+    1e20:	106d      	lrw      	r3, 0xfffff0ff	// 1e54 <GPIO_Init+0xcc>
+    1e22:	07f5      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e24:	310c      	movi      	r1, 12
+    1e26:	106d      	lrw      	r3, 0xffff0fff	// 1e58 <GPIO_Init+0xd0>
+    1e28:	07f2      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e2a:	3110      	movi      	r1, 16
+    1e2c:	106c      	lrw      	r3, 0xfff10000	// 1e5c <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e2e:	2b00      	subi      	r3, 1
+    1e30:	07ee      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e32:	3114      	movi      	r1, 20
+    1e34:	106b      	lrw      	r3, 0xff100000	// 1e60 <GPIO_Init+0xd8>
+    1e36:	07fc      	br      	0x1e2e	// 1e2e <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e38:	33f1      	movi      	r3, 241
+    1e3a:	3118      	movi      	r1, 24
+    1e3c:	4378      	lsli      	r3, r3, 24
+    1e3e:	07f8      	br      	0x1e2e	// 1e2e <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e40:	311c      	movi      	r1, 28
+    1e42:	1069      	lrw      	r3, 0xfffffff	// 1e64 <GPIO_Init+0xdc>
+    1e44:	07e4      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e46:	3300      	movi      	r3, 0
+    1e48:	3100      	movi      	r1, 0
+    1e4a:	2b0f      	subi      	r3, 16
+    1e4c:	07e0      	br      	0x1e0c	// 1e0c <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e4e:	3202      	movi      	r2, 2
+    1e50:	07e3      	br      	0x1e16	// 1e16 <GPIO_Init+0x8e>
+    1e52:	0000      	bkpt
+    1e54:	fffff0ff 	.long	0xfffff0ff
+    1e58:	ffff0fff 	.long	0xffff0fff
+    1e5c:	fff10000 	.long	0xfff10000
+    1e60:	ff100000 	.long	0xff100000
+    1e64:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+00001e68 <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    1e68:	4121      	lsli      	r1, r1, 1
+    1e6a:	3203      	movi      	r2, 3
+    1e6c:	9068      	ld.w      	r3, (r0, 0x20)
+    1e6e:	7084      	lsl      	r2, r1
+    1e70:	68c9      	andn      	r3, r2
+    1e72:	3201      	movi      	r2, 1
+    1e74:	7084      	lsl      	r2, r1
+    1e76:	6cc8      	or      	r3, r2
+    1e78:	b068      	st.w      	r3, (r0, 0x20)
+}
+    1e7a:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00001e7c <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    1e7c:	4121      	lsli      	r1, r1, 1
+    1e7e:	3301      	movi      	r3, 1
+    1e80:	9049      	ld.w      	r2, (r0, 0x24)
+    1e82:	70c4      	lsl      	r3, r1
+    1e84:	6cc8      	or      	r3, r2
+    1e86:	b069      	st.w      	r3, (r0, 0x24)
+}
+    1e88:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_High:
+
+00001e8a <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    1e8a:	3301      	movi      	r3, 1
+    1e8c:	70c4      	lsl      	r3, r1
+    1e8e:	b063      	st.w      	r3, (r0, 0xc)
+}
+    1e90:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+00001e92 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    1e92:	3301      	movi      	r3, 1
+    1e94:	70c4      	lsl      	r3, r1
+    1e96:	b064      	st.w      	r3, (r0, 0x10)
+}
+    1e98:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+00001e9a <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    1e9a:	9045      	ld.w      	r2, (r0, 0x14)
+    1e9c:	3301      	movi      	r3, 1
+    1e9e:	7085      	lsr      	r2, r1
+    1ea0:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    1ea2:	3a40      	cmpnei      	r2, 0
+    1ea4:	70c4      	lsl      	r3, r1
+    1ea6:	0c03      	bf      	0x1eac	// 1eac <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    1ea8:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    1eaa:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    1eac:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    1eae:	07fe      	br      	0x1eaa	// 1eaa <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+00001eb0 <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    1eb0:	3301      	movi      	r3, 1
+    1eb2:	9046      	ld.w      	r2, (r0, 0x18)
+    1eb4:	70c4      	lsl      	r3, r1
+    1eb6:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    1eb8:	64ca      	cmpne      	r2, r3
+    1eba:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    1ebc:	7400      	zextb      	r0, r0
+}
+    1ebe:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Read_Output:
+
+00001ec0 <GPIO_Read_Output>:
+/*************************************************************/
+uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->ODSR)&(1<<bit);
+    1ec0:	3301      	movi      	r3, 1
+    1ec2:	9045      	ld.w      	r2, (r0, 0x14)
+    1ec4:	70c4      	lsl      	r3, r1
+    1ec6:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    1ec8:	64ca      	cmpne      	r2, r3
+    1eca:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    1ecc:	7400      	zextb      	r0, r0
+}
+    1ece:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00001ed0 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    1ed0:	1064      	lrw      	r3, 0x20000014	// 1ee0 <LPT_Soft_Reset+0x10>
+    1ed2:	9340      	ld.w      	r2, (r3, 0x0)
+    1ed4:	9261      	ld.w      	r3, (r2, 0x4)
+    1ed6:	3bac      	bseti      	r3, 12
+    1ed8:	3bae      	bseti      	r3, 14
+    1eda:	b261      	st.w      	r3, (r2, 0x4)
+}
+    1edc:	783c      	jmp      	r15
+    1ede:	0000      	bkpt
+    1ee0:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+00001ee4 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    1ee4:	1063      	lrw      	r3, 0x20000010	// 1ef0 <WWDT_CNT_Load+0xc>
+    1ee6:	9360      	ld.w      	r3, (r3, 0x0)
+    1ee8:	9340      	ld.w      	r2, (r3, 0x0)
+    1eea:	6c08      	or      	r0, r2
+    1eec:	b300      	st.w      	r0, (r3, 0x0)
+}
+    1eee:	783c      	jmp      	r15
+    1ef0:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+00001ef4 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    1ef4:	3300      	movi      	r3, 0
+    1ef6:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    1ef8:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    1efa:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    1efc:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    1efe:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    1f00:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    1f02:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    1f04:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    1f06:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    1f08:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    1f0a:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    1f0c:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    1f0e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+00001f10 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    1f10:	9060      	ld.w      	r3, (r0, 0x0)
+    1f12:	3ba0      	bseti      	r3, 0
+    1f14:	b060      	st.w      	r3, (r0, 0x0)
+}
+    1f16:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+00001f18 <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    1f18:	9060      	ld.w      	r3, (r0, 0x0)
+    1f1a:	3bac      	bseti      	r3, 12
+    1f1c:	3bae      	bseti      	r3, 14
+    1f1e:	b060      	st.w      	r3, (r0, 0x0)
+}
+    1f20:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+00001f22 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    1f22:	14c3      	push      	r4-r6
+    1f24:	98a4      	ld.w      	r5, (r14, 0x10)
+    1f26:	6d97      	mov      	r6, r5
+    1f28:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    1f2a:	6d18      	or      	r4, r6
+    1f2c:	6cd0      	or      	r3, r4
+    1f2e:	90a1      	ld.w      	r5, (r0, 0x4)
+    1f30:	6c4c      	or      	r1, r3
+    1f32:	6c54      	or      	r1, r5
+    1f34:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    1f36:	b042      	st.w      	r2, (r0, 0x8)
+}
+    1f38:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+00001f3a <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    1f3a:	14c4      	push      	r4-r7
+    1f3c:	1421      	subi      	r14, r14, 4
+    1f3e:	9885      	ld.w      	r4, (r14, 0x14)
+    1f40:	6dd3      	mov      	r7, r4
+    1f42:	9886      	ld.w      	r4, (r14, 0x18)
+    1f44:	b880      	st.w      	r4, (r14, 0x0)
+    1f46:	9887      	ld.w      	r4, (r14, 0x1c)
+    1f48:	6d93      	mov      	r6, r4
+    1f4a:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    1f4c:	6d58      	or      	r5, r6
+    1f4e:	98c0      	ld.w      	r6, (r14, 0x0)
+    1f50:	6d58      	or      	r5, r6
+    1f52:	6d5c      	or      	r5, r7
+    1f54:	6cd4      	or      	r3, r5
+    1f56:	6c8c      	or      	r2, r3
+    1f58:	9081      	ld.w      	r4, (r0, 0x4)
+    1f5a:	6c48      	or      	r1, r2
+    1f5c:	6d04      	or      	r4, r1
+    1f5e:	6d9f      	mov      	r6, r7
+    1f60:	b081      	st.w      	r4, (r0, 0x4)
+}
+    1f62:	1401      	addi      	r14, r14, 4
+    1f64:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+00001f66 <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    1f66:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    1f68:	b044      	st.w      	r2, (r0, 0x10)
+}
+    1f6a:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+00001f6c <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    1f6c:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    1f6e:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    1f70:	0c04      	bf      	0x1f78	// 1f78 <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    1f72:	6c8c      	or      	r2, r3
+    1f74:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    1f76:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    1f78:	68c9      	andn      	r3, r2
+    1f7a:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    1f7c:	07fd      	br      	0x1f76	// 1f76 <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+00001f80 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    1f80:	3380      	movi      	r3, 128
+    1f82:	4376      	lsli      	r3, r3, 22
+    1f84:	1042      	lrw      	r2, 0xe000e100	// 1f8c <BT1_INT_ENABLE+0xc>
+    1f86:	b260      	st.w      	r3, (r2, 0x0)
+}
+    1f88:	783c      	jmp      	r15
+    1f8a:	0000      	bkpt
+    1f8c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+00001f90 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    1f90:	3840      	cmpnei      	r0, 0
+    1f92:	080a      	bt      	0x1fa6	// 1fa6 <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    1f94:	1165      	lrw      	r3, 0x20000048	// 2028 <GPT_IO_Init+0x98>
+    1f96:	31f0      	movi      	r1, 240
+    1f98:	9340      	ld.w      	r2, (r3, 0x0)
+    1f9a:	9260      	ld.w      	r3, (r2, 0x0)
+    1f9c:	68c5      	andn      	r3, r1
+    1f9e:	3ba4      	bseti      	r3, 4
+    1fa0:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    1fa2:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    1fa4:	040b      	br      	0x1fba	// 1fba <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    1fa6:	3841      	cmpnei      	r0, 1
+    1fa8:	080a      	bt      	0x1fbc	// 1fbc <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    1faa:	1161      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1fac:	31f0      	movi      	r1, 240
+    1fae:	9340      	ld.w      	r2, (r3, 0x0)
+    1fb0:	9261      	ld.w      	r3, (r2, 0x4)
+    1fb2:	68c5      	andn      	r3, r1
+    1fb4:	3ba4      	bseti      	r3, 4
+    1fb6:	3ba6      	bseti      	r3, 6
+    1fb8:	b261      	st.w      	r3, (r2, 0x4)
+}
+    1fba:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    1fbc:	3842      	cmpnei      	r0, 2
+    1fbe:	080b      	bt      	0x1fd4	// 1fd4 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    1fc0:	107b      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1fc2:	32f0      	movi      	r2, 240
+    1fc4:	9320      	ld.w      	r1, (r3, 0x0)
+    1fc6:	9161      	ld.w      	r3, (r1, 0x4)
+    1fc8:	4244      	lsli      	r2, r2, 4
+    1fca:	68c9      	andn      	r3, r2
+    1fcc:	3ba9      	bseti      	r3, 9
+    1fce:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    1fd0:	b161      	st.w      	r3, (r1, 0x4)
+    1fd2:	07f4      	br      	0x1fba	// 1fba <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    1fd4:	3843      	cmpnei      	r0, 3
+    1fd6:	080b      	bt      	0x1fec	// 1fec <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    1fd8:	1075      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1fda:	32f0      	movi      	r2, 240
+    1fdc:	9320      	ld.w      	r1, (r3, 0x0)
+    1fde:	4244      	lsli      	r2, r2, 4
+    1fe0:	9161      	ld.w      	r3, (r1, 0x4)
+    1fe2:	68c9      	andn      	r3, r2
+    1fe4:	32e0      	movi      	r2, 224
+    1fe6:	4243      	lsli      	r2, r2, 3
+    1fe8:	6cc8      	or      	r3, r2
+    1fea:	07f3      	br      	0x1fd0	// 1fd0 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    1fec:	3844      	cmpnei      	r0, 4
+    1fee:	080a      	bt      	0x2002	// 2002 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    1ff0:	106f      	lrw      	r3, 0x2000004c	// 202c <GPT_IO_Init+0x9c>
+    1ff2:	32f0      	movi      	r2, 240
+    1ff4:	9320      	ld.w      	r1, (r3, 0x0)
+    1ff6:	9161      	ld.w      	r3, (r1, 0x4)
+    1ff8:	4248      	lsli      	r2, r2, 8
+    1ffa:	68c9      	andn      	r3, r2
+    1ffc:	3bad      	bseti      	r3, 13
+    1ffe:	3bae      	bseti      	r3, 14
+    2000:	07e8      	br      	0x1fd0	// 1fd0 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    2002:	3845      	cmpnei      	r0, 5
+    2004:	0808      	bt      	0x2014	// 2014 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    2006:	1069      	lrw      	r3, 0x20000048	// 2028 <GPT_IO_Init+0x98>
+    2008:	310f      	movi      	r1, 15
+    200a:	9340      	ld.w      	r2, (r3, 0x0)
+    200c:	9260      	ld.w      	r3, (r2, 0x0)
+    200e:	68c5      	andn      	r3, r1
+    2010:	3ba2      	bseti      	r3, 2
+    2012:	07c8      	br      	0x1fa2	// 1fa2 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    2014:	3846      	cmpnei      	r0, 6
+    2016:	0bd2      	bt      	0x1fba	// 1fba <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    2018:	1064      	lrw      	r3, 0x20000048	// 2028 <GPT_IO_Init+0x98>
+    201a:	31f0      	movi      	r1, 240
+    201c:	9340      	ld.w      	r2, (r3, 0x0)
+    201e:	9260      	ld.w      	r3, (r2, 0x0)
+    2020:	68c5      	andn      	r3, r1
+    2022:	3ba5      	bseti      	r3, 5
+    2024:	3ba6      	bseti      	r3, 6
+    2026:	07be      	br      	0x1fa2	// 1fa2 <GPT_IO_Init+0x12>
+    2028:	20000048 	.long	0x20000048
+    202c:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+00002030 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    2030:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    2032:	6c48      	or      	r1, r2
+    2034:	1083      	lrw      	r4, 0x20000024	// 2040 <GPT_Configure+0x10>
+    2036:	6c04      	or      	r0, r1
+    2038:	9480      	ld.w      	r4, (r4, 0x0)
+    203a:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    203c:	b462      	st.w      	r3, (r4, 0x8)
+}
+    203e:	1481      	pop      	r4
+    2040:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00002044 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    2044:	14c4      	push      	r4-r7
+    2046:	1423      	subi      	r14, r14, 12
+    2048:	9887      	ld.w      	r4, (r14, 0x1c)
+    204a:	6dd3      	mov      	r7, r4
+    204c:	9888      	ld.w      	r4, (r14, 0x20)
+    204e:	b880      	st.w      	r4, (r14, 0x0)
+    2050:	9889      	ld.w      	r4, (r14, 0x24)
+    2052:	b881      	st.w      	r4, (r14, 0x4)
+    2054:	988a      	ld.w      	r4, (r14, 0x28)
+    2056:	b882      	st.w      	r4, (r14, 0x8)
+    2058:	988b      	ld.w      	r4, (r14, 0x2c)
+    205a:	6d93      	mov      	r6, r4
+    205c:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    205e:	3cb2      	bseti      	r4, 18
+    2060:	6d18      	or      	r4, r6
+    2062:	98c2      	ld.w      	r6, (r14, 0x8)
+    2064:	6d18      	or      	r4, r6
+    2066:	98c1      	ld.w      	r6, (r14, 0x4)
+    2068:	6d18      	or      	r4, r6
+    206a:	98c0      	ld.w      	r6, (r14, 0x0)
+    206c:	6d18      	or      	r4, r6
+    206e:	6d1c      	or      	r4, r7
+    2070:	6cd0      	or      	r3, r4
+    2072:	6c8c      	or      	r2, r3
+    2074:	6c48      	or      	r1, r2
+    2076:	10a4      	lrw      	r5, 0x20000024	// 2084 <GPT_WaveCtrl_Configure+0x40>
+    2078:	6c04      	or      	r0, r1
+    207a:	95a0      	ld.w      	r5, (r5, 0x0)
+    207c:	6d9f      	mov      	r6, r7
+    207e:	b503      	st.w      	r0, (r5, 0xc)
+}
+    2080:	1403      	addi      	r14, r14, 12
+    2082:	1484      	pop      	r4-r7
+    2084:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+00002088 <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    2088:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    208a:	6c8c      	or      	r2, r3
+    208c:	6c48      	or      	r1, r2
+    208e:	1083      	lrw      	r4, 0x20000024	// 2098 <GPT_WaveLoad_Configure+0x10>
+    2090:	6c04      	or      	r0, r1
+    2092:	9480      	ld.w      	r4, (r4, 0x0)
+    2094:	b411      	st.w      	r0, (r4, 0x44)
+}
+    2096:	1481      	pop      	r4
+    2098:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+0000209c <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    209c:	14c4      	push      	r4-r7
+    209e:	1425      	subi      	r14, r14, 20
+    20a0:	1c09      	addi      	r4, r14, 36
+    20a2:	8480      	ld.b      	r4, (r4, 0x0)
+    20a4:	b880      	st.w      	r4, (r14, 0x0)
+    20a6:	1c0a      	addi      	r4, r14, 40
+    20a8:	8480      	ld.b      	r4, (r4, 0x0)
+    20aa:	b881      	st.w      	r4, (r14, 0x4)
+    20ac:	1c0b      	addi      	r4, r14, 44
+    20ae:	8480      	ld.b      	r4, (r4, 0x0)
+    20b0:	b882      	st.w      	r4, (r14, 0x8)
+    20b2:	1c0c      	addi      	r4, r14, 48
+    20b4:	8480      	ld.b      	r4, (r4, 0x0)
+    20b6:	b883      	st.w      	r4, (r14, 0xc)
+    20b8:	1c0d      	addi      	r4, r14, 52
+    20ba:	8480      	ld.b      	r4, (r4, 0x0)
+    20bc:	1e10      	addi      	r6, r14, 64
+    20be:	b884      	st.w      	r4, (r14, 0x10)
+    20c0:	1d0f      	addi      	r5, r14, 60
+    20c2:	1c0e      	addi      	r4, r14, 56
+    20c4:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    20c6:	3840      	cmpnei      	r0, 0
+{
+    20c8:	1e11      	addi      	r6, r14, 68
+    20ca:	8480      	ld.b      	r4, (r4, 0x0)
+    20cc:	85a0      	ld.b      	r5, (r5, 0x0)
+    20ce:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    20d0:	081f      	bt      	0x210e	// 210e <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    20d2:	47f0      	lsli      	r7, r7, 16
+    20d4:	46d2      	lsli      	r6, r6, 18
+    20d6:	45ae      	lsli      	r5, r5, 14
+    20d8:	6dd8      	or      	r7, r6
+    20da:	6dd4      	or      	r7, r5
+    20dc:	448c      	lsli      	r4, r4, 12
+    20de:	6dd0      	or      	r7, r4
+    20e0:	9884      	ld.w      	r4, (r14, 0x10)
+    20e2:	448a      	lsli      	r4, r4, 10
+    20e4:	6dd0      	or      	r7, r4
+    20e6:	9883      	ld.w      	r4, (r14, 0xc)
+    20e8:	4488      	lsli      	r4, r4, 8
+    20ea:	98a2      	ld.w      	r5, (r14, 0x8)
+    20ec:	6d1c      	or      	r4, r7
+    20ee:	45e6      	lsli      	r7, r5, 6
+    20f0:	6d1c      	or      	r4, r7
+    20f2:	6c90      	or      	r2, r4
+    20f4:	6cc8      	or      	r3, r2
+    20f6:	9841      	ld.w      	r2, (r14, 0x4)
+    20f8:	4244      	lsli      	r2, r2, 4
+    20fa:	6cc8      	or      	r3, r2
+    20fc:	6c4c      	or      	r1, r3
+    20fe:	9860      	ld.w      	r3, (r14, 0x0)
+    2100:	4362      	lsli      	r3, r3, 2
+    2102:	1013      	lrw      	r0, 0x20000024	// 214c <GPT_WaveOut_Configure+0xb0>
+    2104:	6c4c      	or      	r1, r3
+    2106:	9000      	ld.w      	r0, (r0, 0x0)
+    2108:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    210a:	1405      	addi      	r14, r14, 20
+    210c:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    210e:	3841      	cmpnei      	r0, 1
+    2110:	0bfd      	bt      	0x210a	// 210a <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    2112:	47f0      	lsli      	r7, r7, 16
+    2114:	46d2      	lsli      	r6, r6, 18
+    2116:	45ae      	lsli      	r5, r5, 14
+    2118:	6dd8      	or      	r7, r6
+    211a:	6dd4      	or      	r7, r5
+    211c:	448c      	lsli      	r4, r4, 12
+    211e:	6dd0      	or      	r7, r4
+    2120:	9884      	ld.w      	r4, (r14, 0x10)
+    2122:	448a      	lsli      	r4, r4, 10
+    2124:	6dd0      	or      	r7, r4
+    2126:	9883      	ld.w      	r4, (r14, 0xc)
+    2128:	4488      	lsli      	r4, r4, 8
+    212a:	98a2      	ld.w      	r5, (r14, 0x8)
+    212c:	6d1c      	or      	r4, r7
+    212e:	45e6      	lsli      	r7, r5, 6
+    2130:	6d1c      	or      	r4, r7
+    2132:	6c90      	or      	r2, r4
+    2134:	6cc8      	or      	r3, r2
+    2136:	9841      	ld.w      	r2, (r14, 0x4)
+    2138:	4244      	lsli      	r2, r2, 4
+    213a:	6cc8      	or      	r3, r2
+    213c:	6c4c      	or      	r1, r3
+    213e:	9860      	ld.w      	r3, (r14, 0x0)
+    2140:	4362      	lsli      	r3, r3, 2
+    2142:	1003      	lrw      	r0, 0x20000024	// 214c <GPT_WaveOut_Configure+0xb0>
+    2144:	6c4c      	or      	r1, r3
+    2146:	9000      	ld.w      	r0, (r0, 0x0)
+    2148:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    214a:	07e0      	br      	0x210a	// 210a <GPT_WaveOut_Configure+0x6e>
+    214c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+00002150 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    2150:	1063      	lrw      	r3, 0x20000024	// 215c <GPT_Start+0xc>
+    2152:	9340      	ld.w      	r2, (r3, 0x0)
+    2154:	9261      	ld.w      	r3, (r2, 0x4)
+    2156:	3ba0      	bseti      	r3, 0
+    2158:	b261      	st.w      	r3, (r2, 0x4)
+}
+    215a:	783c      	jmp      	r15
+    215c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+00002160 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    2160:	1063      	lrw      	r3, 0x20000024	// 216c <GPT_Period_CMP_Write+0xc>
+    2162:	9360      	ld.w      	r3, (r3, 0x0)
+    2164:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    2166:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    2168:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    216a:	783c      	jmp      	r15
+    216c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+00002170 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    2170:	1066      	lrw      	r3, 0x20000024	// 2188 <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    2172:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    2174:	9360      	ld.w      	r3, (r3, 0x0)
+    2176:	237f      	addi      	r3, 128
+    2178:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    217a:	0c04      	bf      	0x2182	// 2182 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    217c:	6c48      	or      	r1, r2
+    217e:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    2180:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    2182:	6885      	andn      	r2, r1
+    2184:	b356      	st.w      	r2, (r3, 0x58)
+}
+    2186:	07fd      	br      	0x2180	// 2180 <GPT_ConfigInterrupt_CMD+0x10>
+    2188:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+0000218c <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    218c:	1065      	lrw      	r3, 0x20000040	// 21a0 <UART0_DeInit+0x14>
+    218e:	3200      	movi      	r2, 0
+    2190:	9360      	ld.w      	r3, (r3, 0x0)
+    2192:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    2194:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    2196:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    2198:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    219a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    219c:	783c      	jmp      	r15
+    219e:	0000      	bkpt
+    21a0:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+000021a4 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    21a4:	1065      	lrw      	r3, 0x2000003c	// 21b8 <UART1_DeInit+0x14>
+    21a6:	3200      	movi      	r2, 0
+    21a8:	9360      	ld.w      	r3, (r3, 0x0)
+    21aa:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    21ac:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    21ae:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    21b0:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    21b2:	b344      	st.w      	r2, (r3, 0x10)
+}
+    21b4:	783c      	jmp      	r15
+    21b6:	0000      	bkpt
+    21b8:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+000021bc <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    21bc:	1065      	lrw      	r3, 0x20000038	// 21d0 <UART2_DeInit+0x14>
+    21be:	3200      	movi      	r2, 0
+    21c0:	9360      	ld.w      	r3, (r3, 0x0)
+    21c2:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    21c4:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    21c6:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    21c8:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    21ca:	b344      	st.w      	r2, (r3, 0x10)
+}
+    21cc:	783c      	jmp      	r15
+    21ce:	0000      	bkpt
+    21d0:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART0_Int_Enable:
+
+000021d4 <UART0_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_Int_Enable(void)
+{
+    UART0->ISR=0x0F;									//clear UART0 INT status
+    21d4:	1065      	lrw      	r3, 0x20000040	// 21e8 <UART0_Int_Enable+0x14>
+    21d6:	320f      	movi      	r2, 15
+    21d8:	9360      	ld.w      	r3, (r3, 0x0)
+    21da:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART0_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    21dc:	3380      	movi      	r3, 128
+    21de:	4366      	lsli      	r3, r3, 6
+    21e0:	1043      	lrw      	r2, 0xe000e100	// 21ec <UART0_Int_Enable+0x18>
+    21e2:	b260      	st.w      	r3, (r2, 0x0)
+}
+    21e4:	783c      	jmp      	r15
+    21e6:	0000      	bkpt
+    21e8:	20000040 	.long	0x20000040
+    21ec:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+000021f0 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    21f0:	1065      	lrw      	r3, 0x20000038	// 2204 <UART2_Int_Enable+0x14>
+    21f2:	320f      	movi      	r2, 15
+    21f4:	9360      	ld.w      	r3, (r3, 0x0)
+    21f6:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    21f8:	3380      	movi      	r3, 128
+    21fa:	4368      	lsli      	r3, r3, 8
+    21fc:	1043      	lrw      	r2, 0xe000e100	// 2208 <UART2_Int_Enable+0x18>
+    21fe:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2200:	783c      	jmp      	r15
+    2202:	0000      	bkpt
+    2204:	20000038 	.long	0x20000038
+    2208:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+0000220c <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    220c:	3840      	cmpnei      	r0, 0
+    220e:	0821      	bt      	0x2250	// 2250 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    2210:	3940      	cmpnei      	r1, 0
+    2212:	080a      	bt      	0x2226	// 2226 <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    2214:	1177      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    2216:	31ff      	movi      	r1, 255
+    2218:	9340      	ld.w      	r2, (r3, 0x0)
+    221a:	9260      	ld.w      	r3, (r2, 0x0)
+    221c:	68c5      	andn      	r3, r1
+    221e:	3ba2      	bseti      	r3, 2
+    2220:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    2222:	b260      	st.w      	r3, (r2, 0x0)
+    2224:	0415      	br      	0x224e	// 224e <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    2226:	3941      	cmpnei      	r1, 1
+    2228:	0813      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    222a:	1172      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    222c:	31f0      	movi      	r1, 240
+    222e:	9340      	ld.w      	r2, (r3, 0x0)
+    2230:	9260      	ld.w      	r3, (r2, 0x0)
+    2232:	4130      	lsli      	r1, r1, 16
+    2234:	68c5      	andn      	r3, r1
+    2236:	31e0      	movi      	r1, 224
+    2238:	412f      	lsli      	r1, r1, 15
+    223a:	6cc4      	or      	r3, r1
+    223c:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    223e:	31f0      	movi      	r1, 240
+    2240:	9261      	ld.w      	r3, (r2, 0x4)
+    2242:	412c      	lsli      	r1, r1, 12
+    2244:	68c5      	andn      	r3, r1
+    2246:	31e0      	movi      	r1, 224
+    2248:	412b      	lsli      	r1, r1, 11
+    224a:	6cc4      	or      	r3, r1
+    224c:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    224e:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    2250:	3841      	cmpnei      	r0, 1
+    2252:	082d      	bt      	0x22ac	// 22ac <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    2254:	3940      	cmpnei      	r1, 0
+    2256:	0814      	bt      	0x227e	// 227e <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    2258:	1167      	lrw      	r3, 0x20000048	// 22f4 <UART_IO_Init+0xe8>
+    225a:	310f      	movi      	r1, 15
+    225c:	9340      	ld.w      	r2, (r3, 0x0)
+    225e:	9260      	ld.w      	r3, (r2, 0x0)
+    2260:	68c5      	andn      	r3, r1
+    2262:	3107      	movi      	r1, 7
+    2264:	6cc4      	or      	r3, r1
+    2266:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    2268:	32f0      	movi      	r2, 240
+    226a:	1162      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    226c:	4250      	lsli      	r2, r2, 16
+    226e:	9320      	ld.w      	r1, (r3, 0x0)
+    2270:	9161      	ld.w      	r3, (r1, 0x4)
+    2272:	68c9      	andn      	r3, r2
+    2274:	32e0      	movi      	r2, 224
+    2276:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    2278:	6cc8      	or      	r3, r2
+    227a:	b161      	st.w      	r3, (r1, 0x4)
+    227c:	07e9      	br      	0x224e	// 224e <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    227e:	3941      	cmpnei      	r1, 1
+    2280:	080c      	bt      	0x2298	// 2298 <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    2282:	107c      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    2284:	32ff      	movi      	r2, 255
+    2286:	9320      	ld.w      	r1, (r3, 0x0)
+    2288:	424c      	lsli      	r2, r2, 12
+    228a:	9160      	ld.w      	r3, (r1, 0x0)
+    228c:	68c9      	andn      	r3, r2
+    228e:	32ee      	movi      	r2, 238
+    2290:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    2292:	6cc8      	or      	r3, r2
+    2294:	b160      	st.w      	r3, (r1, 0x0)
+}
+    2296:	07dc      	br      	0x224e	// 224e <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    2298:	3942      	cmpnei      	r1, 2
+    229a:	0bda      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    229c:	1075      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    229e:	32ee      	movi      	r2, 238
+    22a0:	9320      	ld.w      	r1, (r3, 0x0)
+    22a2:	9161      	ld.w      	r3, (r1, 0x4)
+    22a4:	4368      	lsli      	r3, r3, 8
+    22a6:	4b68      	lsri      	r3, r3, 8
+    22a8:	4257      	lsli      	r2, r2, 23
+    22aa:	07e7      	br      	0x2278	// 2278 <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    22ac:	3842      	cmpnei      	r0, 2
+    22ae:	0bd0      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    22b0:	3940      	cmpnei      	r1, 0
+    22b2:	0809      	bt      	0x22c4	// 22c4 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    22b4:	106f      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    22b6:	31ff      	movi      	r1, 255
+    22b8:	9340      	ld.w      	r2, (r3, 0x0)
+    22ba:	9260      	ld.w      	r3, (r2, 0x0)
+    22bc:	68c5      	andn      	r3, r1
+    22be:	3177      	movi      	r1, 119
+    22c0:	6cc4      	or      	r3, r1
+    22c2:	07b0      	br      	0x2222	// 2222 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    22c4:	3941      	cmpnei      	r1, 1
+    22c6:	0809      	bt      	0x22d8	// 22d8 <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    22c8:	106a      	lrw      	r3, 0x2000004c	// 22f0 <UART_IO_Init+0xe4>
+    22ca:	32ee      	movi      	r2, 238
+    22cc:	9320      	ld.w      	r1, (r3, 0x0)
+    22ce:	9160      	ld.w      	r3, (r1, 0x0)
+    22d0:	4368      	lsli      	r3, r3, 8
+    22d2:	4b68      	lsri      	r3, r3, 8
+    22d4:	4257      	lsli      	r2, r2, 23
+    22d6:	07de      	br      	0x2292	// 2292 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    22d8:	3942      	cmpnei      	r1, 2
+    22da:	0bba      	bt      	0x224e	// 224e <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    22dc:	1066      	lrw      	r3, 0x20000048	// 22f4 <UART_IO_Init+0xe8>
+    22de:	32ff      	movi      	r2, 255
+    22e0:	9320      	ld.w      	r1, (r3, 0x0)
+    22e2:	4250      	lsli      	r2, r2, 16
+    22e4:	9160      	ld.w      	r3, (r1, 0x0)
+    22e6:	68c9      	andn      	r3, r2
+    22e8:	32cc      	movi      	r2, 204
+    22ea:	424f      	lsli      	r2, r2, 15
+    22ec:	07d3      	br      	0x2292	// 2292 <UART_IO_Init+0x86>
+    22ee:	0000      	bkpt
+    22f0:	2000004c 	.long	0x2000004c
+    22f4:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInit:
+
+000022f8 <UARTInit>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | PAR_DAT | UART_TX_DONE_INT);
+    22f8:	1063      	lrw      	r3, 0x80003	// 2304 <UARTInit+0xc>
+    22fa:	6c8c      	or      	r2, r3
+    22fc:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    22fe:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2300:	783c      	jmp      	r15
+    2302:	0000      	bkpt
+    2304:	00080003 	.long	0x00080003
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+00002308 <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    2308:	1063      	lrw      	r3, 0x8000f	// 2314 <UARTInitRxTxIntEn+0xc>
+    230a:	6c8c      	or      	r2, r3
+    230c:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    230e:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2310:	783c      	jmp      	r15
+    2312:	0000      	bkpt
+    2314:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+00002318 <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    2318:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    231a:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    231c:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    231e:	5b85      	subu      	r4, r3, r1
+    2320:	6490      	cmphs      	r4, r2
+    2322:	0c02      	bf      	0x2326	// 2326 <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    2324:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    2326:	8380      	ld.b      	r4, (r3, 0x0)
+    2328:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    232a:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    232c:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    232e:	3c40      	cmpnei      	r4, 0
+    2330:	0bfd      	bt      	0x232a	// 232a <UARTTransmit+0x12>
+    2332:	2300      	addi      	r3, 1
+    2334:	07f5      	br      	0x231e	// 231e <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+00002338 <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    2338:	1068      	lrw      	r3, 0x20000020	// 2358 <EPT_Stop+0x20>
+    233a:	3280      	movi      	r2, 128
+    233c:	9360      	ld.w      	r3, (r3, 0x0)
+    233e:	608c      	addu      	r2, r3
+    2340:	1027      	lrw      	r1, 0xa55ac73a	// 235c <EPT_Stop+0x24>
+    2342:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    2344:	9341      	ld.w      	r2, (r3, 0x4)
+    2346:	31fe      	movi      	r1, 254
+    2348:	6884      	and      	r2, r1
+    234a:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    234c:	3101      	movi      	r1, 1
+    234e:	9341      	ld.w      	r2, (r3, 0x4)
+    2350:	6884      	and      	r2, r1
+    2352:	3a40      	cmpnei      	r2, 0
+    2354:	0bfd      	bt      	0x234e	// 234e <EPT_Stop+0x16>
+}
+    2356:	783c      	jmp      	r15
+    2358:	20000020 	.long	0x20000020
+    235c:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+00002360 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    2360:	14d1      	push      	r4, r15
+	delay_nms(2000);
+    2362:	30fa      	movi      	r0, 250
+	
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    2364:	109c      	lrw      	r4, 0x20000048	// 23d4 <main+0x74>
+	delay_nms(2000);
+    2366:	4003      	lsli      	r0, r0, 3
+    2368:	e000003c 	bsr      	0x23e0	// 23e0 <delay_nms>
+	GPIO_Init(GPIOB0,DET_RF_MODULE_PIN,Intput);
+    236c:	3201      	movi      	r2, 1
+    236e:	9400      	ld.w      	r0, (r4, 0x0)
+    2370:	3102      	movi      	r1, 2
+    2372:	e3fffd0b 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOB0,DET_RF_MODULE_PIN);
+    2376:	9400      	ld.w      	r0, (r4, 0x0)
+    2378:	3102      	movi      	r1, 2
+    237a:	e3fffd77 	bsr      	0x1e68	// 1e68 <GPIO_PullHigh_Init>
+	
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    237e:	3102      	movi      	r1, 2
+    2380:	9400      	ld.w      	r0, (r4, 0x0)
+    2382:	e3fffd97 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+    2386:	1095      	lrw      	r4, 0x2000009c	// 23d8 <main+0x78>
+	last_state = rf_exist;
+    2388:	a401      	st.b      	r0, (r4, 0x1)
+	rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    238a:	a400      	st.b      	r0, (r4, 0x0)
+	
+	APT32F102_init();							//102 initial
+    238c:	e00000ec 	bsr      	0x2564	// 2564 <APT32F102_init>
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    2390:	1033      	lrw      	r1, 0x49f0	// 23dc <main+0x7c>
+    2392:	3000      	movi      	r0, 0
+    2394:	e00006e2 	bsr      	0x3158	// 3158 <Dbg_Println>
+
+	
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    2398:	e3fffc66 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+
+		UART2_TASK();
+    239c:	e0000694 	bsr      	0x30c4	// 30c4 <UART2_TASK>
+		
+		Detect_WIFI_Task();
+    23a0:	e0000be0 	bsr      	0x3b60	// 3b60 <Detect_WIFI_Task>
+		
+		Detect_SPI_task();
+    23a4:	e00009e8 	bsr      	0x3774	// 3774 <Detect_SPI_task>
+		
+		Led_Task();
+    23a8:	e0000c26 	bsr      	0x3bf4	// 3bf4 <Led_Task>
+		
+		RLY_Direct_Control();
+    23ac:	e0000d00 	bsr      	0x3dac	// 3dac <RLY_Direct_Control>
+		
+		if (finish_flag == 1) {
+    23b0:	8462      	ld.b      	r3, (r4, 0x2)
+    23b2:	3b41      	cmpnei      	r3, 1
+    23b4:	0bf2      	bt      	0x2398	// 2398 <main+0x38>
+			Card_Read_TasK();
+    23b6:	e0000987 	bsr      	0x36c4	// 36c4 <Card_Read_TasK>
+		
+			if(rf_exist == 0x01)
+    23ba:	8460      	ld.b      	r3, (r4, 0x0)
+    23bc:	3b41      	cmpnei      	r3, 1
+    23be:	0806      	bt      	0x23ca	// 23ca <main+0x6a>
+			{
+				BackLight_Task();
+    23c0:	e0000bbe 	bsr      	0x3b3c	// 3b3c <BackLight_Task>
+				LogicCtrl_NoRF_Task();    //无RF模块轮询任务
+    23c4:	e0000b5c 	bsr      	0x3a7c	// 3a7c <LogicCtrl_NoRF_Task>
+    23c8:	07e8      	br      	0x2398	// 2398 <main+0x38>
+				//Dbg_Println(DBG_BIT_SYS_STATUS,"no rf!");
+			}
+			else if(rf_exist == 0x00)
+    23ca:	3b40      	cmpnei      	r3, 0
+    23cc:	0be6      	bt      	0x2398	// 2398 <main+0x38>
+			{
+//				Debounce_Task();
+				LogicCtrl_Task();         //带RF模块执行逻辑
+    23ce:	e0000aa7 	bsr      	0x391c	// 391c <LogicCtrl_Task>
+    23d2:	07e3      	br      	0x2398	// 2398 <main+0x38>
+    23d4:	20000048 	.long	0x20000048
+    23d8:	2000009c 	.long	0x2000009c
+    23dc:	000049f0 	.long	0x000049f0
+
+Disassembly of section .text.delay_nms:
+
+000023e0 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    23e0:	14d0      	push      	r15
+    23e2:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    23e4:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    23e6:	3300      	movi      	r3, 0
+    j = 50* t;
+    23e8:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    23ea:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    23ec:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    23ee:	b860      	st.w      	r3, (r14, 0x0)
+    23f0:	9840      	ld.w      	r2, (r14, 0x0)
+    23f2:	9861      	ld.w      	r3, (r14, 0x4)
+    23f4:	64c8      	cmphs      	r2, r3
+    23f6:	0c03      	bf      	0x23fc	// 23fc <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    23f8:	1403      	addi      	r14, r14, 12
+    23fa:	1490      	pop      	r15
+        k++;
+    23fc:	9862      	ld.w      	r3, (r14, 0x8)
+    23fe:	2300      	addi      	r3, 1
+    2400:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    2402:	e3fffc31 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    2406:	9860      	ld.w      	r3, (r14, 0x0)
+    2408:	2300      	addi      	r3, 1
+    240a:	07f2      	br      	0x23ee	// 23ee <delay_nms+0xe>
+
+Disassembly of section .text.GPT0_CONFIG:
+
+0000240c <GPT0_CONFIG>:
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+    240c:	14d0      	push      	r15
+    240e:	1429      	subi      	r14, r14, 36
+	GPT_IO_Init(GPT_CHA_PB01);
+    2410:	3000      	movi      	r0, 0
+    2412:	e3fffdbf 	bsr      	0x1f90	// 1f90 <GPT_IO_Init>
+
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    2416:	3300      	movi      	r3, 0
+    2418:	3240      	movi      	r2, 64
+    241a:	3100      	movi      	r1, 0
+    241c:	3001      	movi      	r0, 1
+    241e:	e3fffe09 	bsr      	0x2030	// 2030 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    2422:	3300      	movi      	r3, 0
+    2424:	b865      	st.w      	r3, (r14, 0x14)
+    2426:	b864      	st.w      	r3, (r14, 0x10)
+    2428:	b863      	st.w      	r3, (r14, 0xc)
+    242a:	b862      	st.w      	r3, (r14, 0x8)
+    242c:	b861      	st.w      	r3, (r14, 0x4)
+    242e:	b860      	st.w      	r3, (r14, 0x0)
+    2430:	3208      	movi      	r2, 8
+    2432:	3100      	movi      	r1, 0
+    2434:	3000      	movi      	r0, 0
+    2436:	e3fffe07 	bsr      	0x2044	// 2044 <GPT_WaveCtrl_Configure>
+	if(rf_exist == 0x01)
+    243a:	1079      	lrw      	r3, 0x2000009c	// 249c <GPT0_CONFIG+0x90>
+    243c:	8360      	ld.b      	r3, (r3, 0x0)
+    243e:	3b41      	cmpnei      	r3, 1
+    2440:	0827      	bt      	0x248e	// 248e <GPT0_CONFIG+0x82>
+	{
+		GPT_Period_CMP_Write(2000,2000,0);
+    2442:	31fa      	movi      	r1, 250
+    2444:	4123      	lsli      	r1, r1, 3
+    2446:	3200      	movi      	r2, 0
+    2448:	6c07      	mov      	r0, r1
+	}
+	else if(rf_exist == 0x00)
+	{
+		GPT_Period_CMP_Write(2000,0,0);
+    244a:	e3fffe8b 	bsr      	0x2160	// 2160 <GPT_Period_CMP_Write>
+	}
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    244e:	3320      	movi      	r3, 32
+    2450:	3204      	movi      	r2, 4
+    2452:	3100      	movi      	r1, 0
+    2454:	3001      	movi      	r0, 1
+    2456:	e3fffe19 	bsr      	0x2088	// 2088 <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHA,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    245a:	3300      	movi      	r3, 0
+    245c:	3201      	movi      	r2, 1
+    245e:	b868      	st.w      	r3, (r14, 0x20)
+    2460:	b867      	st.w      	r3, (r14, 0x1c)
+    2462:	b866      	st.w      	r3, (r14, 0x18)
+    2464:	b865      	st.w      	r3, (r14, 0x14)
+    2466:	b864      	st.w      	r3, (r14, 0x10)
+    2468:	b863      	st.w      	r3, (r14, 0xc)
+    246a:	b842      	st.w      	r2, (r14, 0x8)
+    246c:	b841      	st.w      	r2, (r14, 0x4)
+    246e:	b860      	st.w      	r3, (r14, 0x0)
+    2470:	3200      	movi      	r2, 0
+    2472:	3302      	movi      	r3, 2
+    2474:	3100      	movi      	r1, 0
+    2476:	3000      	movi      	r0, 0
+    2478:	e3fffe12 	bsr      	0x209c	// 209c <GPT_WaveOut_Configure>
+	
+//	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPB,2,0,0,0,1,1,0,0,0,0);
+	//GPT_SyncSet_Configure(GPT_SYNCUSR0_EN,GPT_OST_CONTINUOUS,GPT_TXREARM_DIS,GPT_TRGO0SEL_SR0,GPT_TRG10SEL_SR0,GPT_AREARM_DIS);
+	//GPT_Trigger_Configure(GPT_SRCSEL_TRGUSR0EN,GPT_BLKINV_DIS,GPT_ALIGNMD_PRD,GPT_CROSSMD_DIS,5,5);
+	//GPT_EVTRG_Configure(GPT_TRGSRC0_PRD,GPT_TRGSRC1_PRD,GPT_ESYN0OE_EN,GPT_ESYN1OE_EN,GPT_CNT0INIT_EN,GPT_CNT1INIT_EN,3,3,3,3);
+	GPT_Start();
+    247c:	e3fffe6a 	bsr      	0x2150	// 2150 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);
+    2480:	3180      	movi      	r1, 128
+    2482:	4129      	lsli      	r1, r1, 9
+    2484:	3001      	movi      	r0, 1
+    2486:	e3fffe75 	bsr      	0x2170	// 2170 <GPT_ConfigInterrupt_CMD>
+//	GPT_INT_ENABLE();
+	//INTC_ISER_WRITE(GPT0_INT); 
+	//INTC_IWER_WRITE(GPT0_INT); 
+}
+    248a:	1409      	addi      	r14, r14, 36
+    248c:	1490      	pop      	r15
+	else if(rf_exist == 0x00)
+    248e:	3b40      	cmpnei      	r3, 0
+    2490:	0bdf      	bt      	0x244e	// 244e <GPT0_CONFIG+0x42>
+		GPT_Period_CMP_Write(2000,0,0);
+    2492:	30fa      	movi      	r0, 250
+    2494:	3200      	movi      	r2, 0
+    2496:	3100      	movi      	r1, 0
+    2498:	4003      	lsli      	r0, r0, 3
+    249a:	07d8      	br      	0x244a	// 244a <GPT0_CONFIG+0x3e>
+    249c:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.BT_CONFIG:
+
+000024a0 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    24a0:	14d2      	push      	r4-r5, r15
+    24a2:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    24a4:	1095      	lrw      	r4, 0x20000008	// 24f8 <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    24a6:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    24a8:	9400      	ld.w      	r0, (r4, 0x0)
+    24aa:	e3fffd25 	bsr      	0x1ef4	// 1ef4 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    24ae:	9400      	ld.w      	r0, (r4, 0x0)
+    24b0:	b8a1      	st.w      	r5, (r14, 0x4)
+    24b2:	b8a0      	st.w      	r5, (r14, 0x0)
+    24b4:	3308      	movi      	r3, 8
+    24b6:	3200      	movi      	r2, 0
+    24b8:	3101      	movi      	r1, 1
+    24ba:	e3fffd34 	bsr      	0x1f22	// 1f22 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    24be:	3380      	movi      	r3, 128
+    24c0:	4363      	lsli      	r3, r3, 3
+    24c2:	b861      	st.w      	r3, (r14, 0x4)
+    24c4:	9400      	ld.w      	r0, (r4, 0x0)
+    24c6:	3300      	movi      	r3, 0
+    24c8:	b8a3      	st.w      	r5, (r14, 0xc)
+    24ca:	b8a2      	st.w      	r5, (r14, 0x8)
+    24cc:	b8a0      	st.w      	r5, (r14, 0x0)
+    24ce:	3200      	movi      	r2, 0
+    24d0:	3180      	movi      	r1, 128
+    24d2:	e3fffd34 	bsr      	0x1f3a	// 1f3a <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    24d6:	3201      	movi      	r2, 1
+    24d8:	1029      	lrw      	r1, 0x12ac	// 24fc <BT_CONFIG+0x5c>
+    24da:	9400      	ld.w      	r0, (r4, 0x0)
+    24dc:	e3fffd45 	bsr      	0x1f66	// 1f66 <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    24e0:	9400      	ld.w      	r0, (r4, 0x0)
+    24e2:	e3fffd17 	bsr      	0x1f10	// 1f10 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    24e6:	9400      	ld.w      	r0, (r4, 0x0)
+    24e8:	3202      	movi      	r2, 2
+    24ea:	3101      	movi      	r1, 1
+    24ec:	e3fffd40 	bsr      	0x1f6c	// 1f6c <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    24f0:	e3fffd48 	bsr      	0x1f80	// 1f80 <BT1_INT_ENABLE>
+	
+}
+    24f4:	1404      	addi      	r14, r14, 16
+    24f6:	1492      	pop      	r4-r5, r15
+    24f8:	20000008 	.long	0x20000008
+    24fc:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+00002500 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    2500:	14d0      	push      	r15
+    2502:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    2504:	e3fffafc 	bsr      	0x1afc	// 1afc <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    2508:	3101      	movi      	r1, 1
+    250a:	3001      	movi      	r0, 1
+    250c:	e3fffb1e 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    2510:	3000      	movi      	r0, 0
+    2512:	e3fffb77 	bsr      	0x1c00	// 1c00 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    2516:	3180      	movi      	r1, 128
+    2518:	3308      	movi      	r3, 8
+    251a:	3200      	movi      	r2, 0
+    251c:	4121      	lsli      	r1, r1, 1
+    251e:	3002      	movi      	r0, 2
+    2520:	e3fffb2c 	bsr      	0x1b78	// 1b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    2524:	3080      	movi      	r0, 128
+    2526:	3118      	movi      	r1, 24
+    2528:	4002      	lsli      	r0, r0, 2
+    252a:	e3fffba7 	bsr      	0x1c78	// 1c78 <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    252e:	3001      	movi      	r0, 1
+    2530:	e3fffb7c 	bsr      	0x1c28	// 1c28 <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    2534:	e3fffb98 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    2538:	e3fffbca 	bsr      	0x1ccc	// 1ccc <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    253c:	3340      	movi      	r3, 64
+    253e:	b860      	st.w      	r3, (r14, 0x0)
+    2540:	31c0      	movi      	r1, 192
+    2542:	3380      	movi      	r3, 128
+    2544:	4364      	lsli      	r3, r3, 4
+    2546:	3200      	movi      	r2, 0
+    2548:	4123      	lsli      	r1, r1, 3
+    254a:	3000      	movi      	r0, 0
+    254c:	e3fffba2 	bsr      	0x1c90	// 1c90 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    2550:	e3fffbb0 	bsr      	0x1cb0	// 1cb0 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    2554:	e3fffbea 	bsr      	0x1d28	// 1d28 <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    2558:	3000      	movi      	r0, 0
+    255a:	e0001067 	bsr      	0x4628	// 4628 <std_clk_calib>
+	
+}
+    255e:	1401      	addi      	r14, r14, 4
+    2560:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+00002564 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    2564:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    2566:	1071      	lrw      	r3, 0x2000005c	// 25a8 <APT32F102_init+0x44>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    2568:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    256a:	9340      	ld.w      	r2, (r3, 0x0)
+    256c:	1070      	lrw      	r3, 0xfffffff	// 25ac <APT32F102_init+0x48>
+    256e:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    2570:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    2572:	926c      	ld.w      	r3, (r2, 0x30)
+    2574:	68c4      	and      	r3, r1
+    2576:	3b40      	cmpnei      	r3, 0
+    2578:	0ffd      	bf      	0x2572	// 2572 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    257a:	e3ffffc3 	bsr      	0x2500	// 2500 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    257e:	e0000501 	bsr      	0x2f80	// 2f80 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    2582:	e3fffbd9 	bsr      	0x1d34	// 1d34 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART2_IRQ,1);				//串口优先级最高
+    2586:	3101      	movi      	r1, 1
+    2588:	300f      	movi      	r0, 15
+    258a:	e3fffbe7 	bsr      	0x1d58	// 1d58 <Set_INT_Priority>
+//	Set_INT_Priority(TKEY_IRQ,2);				//触摸中断优先级
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	
+	BT_CONFIG();													//BT initial
+    258e:	e3ffff89 	bsr      	0x24a0	// 24a0 <BT_CONFIG>
+
+	GPT0_CONFIG();
+    2592:	e3ffff3d 	bsr      	0x240c	// 240c <GPT0_CONFIG>
+	
+	UARTx_Init(UART_2,Card_Recv_Pro);
+    2596:	1027      	lrw      	r1, 0x3d04	// 25b0 <APT32F102_init+0x4c>
+    2598:	3002      	movi      	r0, 2
+    259a:	e00004f7 	bsr      	0x2f88	// 2f88 <UARTx_Init>
+	
+	RC522_Init();
+    259e:	e00006fd 	bsr      	0x3398	// 3398 <RC522_Init>
+	
+	BLV_RLV_Ctrl_Init();
+    25a2:	e0000bf7 	bsr      	0x3d90	// 3d90 <BLV_RLV_Ctrl_Init>
+	
+}
+    25a6:	1490      	pop      	r15
+    25a8:	2000005c 	.long	0x2000005c
+    25ac:	0fffffff 	.long	0x0fffffff
+    25b0:	00003d04 	.long	0x00003d04
+
+Disassembly of section .text.SYSCONIntHandler:
+
+000025b4 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    25b4:	1460      	nie
+    25b6:	1462      	ipush
+    // ISR content ...
+	nop;
+    25b8:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    25ba:	117a      	lrw      	r3, 0x2000005c	// 26a0 <SYSCONIntHandler+0xec>
+    25bc:	3280      	movi      	r2, 128
+    25be:	9360      	ld.w      	r3, (r3, 0x0)
+    25c0:	60c8      	addu      	r3, r2
+    25c2:	9323      	ld.w      	r1, (r3, 0xc)
+    25c4:	3001      	movi      	r0, 1
+    25c6:	6840      	and      	r1, r0
+    25c8:	3940      	cmpnei      	r1, 0
+    25ca:	0c04      	bf      	0x25d2	// 25d2 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    25cc:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    25ce:	1463      	ipop
+    25d0:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    25d2:	9323      	ld.w      	r1, (r3, 0xc)
+    25d4:	3002      	movi      	r0, 2
+    25d6:	6840      	and      	r1, r0
+    25d8:	3940      	cmpnei      	r1, 0
+    25da:	0bf9      	bt      	0x25cc	// 25cc <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    25dc:	9323      	ld.w      	r1, (r3, 0xc)
+    25de:	3008      	movi      	r0, 8
+    25e0:	6840      	and      	r1, r0
+    25e2:	3940      	cmpnei      	r1, 0
+    25e4:	0bf4      	bt      	0x25cc	// 25cc <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    25e6:	9323      	ld.w      	r1, (r3, 0xc)
+    25e8:	3010      	movi      	r0, 16
+    25ea:	6840      	and      	r1, r0
+    25ec:	3940      	cmpnei      	r1, 0
+    25ee:	0bef      	bt      	0x25cc	// 25cc <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    25f0:	9323      	ld.w      	r1, (r3, 0xc)
+    25f2:	6848      	and      	r1, r2
+    25f4:	3940      	cmpnei      	r1, 0
+    25f6:	0c03      	bf      	0x25fc	// 25fc <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    25f8:	b341      	st.w      	r2, (r3, 0x4)
+}
+    25fa:	07ea      	br      	0x25ce	// 25ce <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    25fc:	3280      	movi      	r2, 128
+    25fe:	9323      	ld.w      	r1, (r3, 0xc)
+    2600:	4241      	lsli      	r2, r2, 1
+    2602:	6848      	and      	r1, r2
+    2604:	3940      	cmpnei      	r1, 0
+    2606:	0bf9      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    2608:	3280      	movi      	r2, 128
+    260a:	9323      	ld.w      	r1, (r3, 0xc)
+    260c:	4242      	lsli      	r2, r2, 2
+    260e:	6848      	and      	r1, r2
+    2610:	3940      	cmpnei      	r1, 0
+    2612:	0bf3      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    2614:	3280      	movi      	r2, 128
+    2616:	9323      	ld.w      	r1, (r3, 0xc)
+    2618:	4243      	lsli      	r2, r2, 3
+    261a:	6848      	and      	r1, r2
+    261c:	3940      	cmpnei      	r1, 0
+    261e:	0bed      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    2620:	3280      	movi      	r2, 128
+    2622:	9323      	ld.w      	r1, (r3, 0xc)
+    2624:	4244      	lsli      	r2, r2, 4
+    2626:	6848      	and      	r1, r2
+    2628:	3940      	cmpnei      	r1, 0
+    262a:	0c03      	bf      	0x2630	// 2630 <SYSCONIntHandler+0x7c>
+		nop;
+    262c:	6c03      	mov      	r0, r0
+    262e:	07e5      	br      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    2630:	3280      	movi      	r2, 128
+    2632:	9323      	ld.w      	r1, (r3, 0xc)
+    2634:	4245      	lsli      	r2, r2, 5
+    2636:	6848      	and      	r1, r2
+    2638:	3940      	cmpnei      	r1, 0
+    263a:	0bdf      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    263c:	3280      	movi      	r2, 128
+    263e:	9323      	ld.w      	r1, (r3, 0xc)
+    2640:	4246      	lsli      	r2, r2, 6
+    2642:	6848      	and      	r1, r2
+    2644:	3940      	cmpnei      	r1, 0
+    2646:	0bd9      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    2648:	3280      	movi      	r2, 128
+    264a:	9323      	ld.w      	r1, (r3, 0xc)
+    264c:	4247      	lsli      	r2, r2, 7
+    264e:	6848      	and      	r1, r2
+    2650:	3940      	cmpnei      	r1, 0
+    2652:	0bd3      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    2654:	3280      	movi      	r2, 128
+    2656:	9323      	ld.w      	r1, (r3, 0xc)
+    2658:	424b      	lsli      	r2, r2, 11
+    265a:	6848      	and      	r1, r2
+    265c:	3940      	cmpnei      	r1, 0
+    265e:	0bcd      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    2660:	3280      	movi      	r2, 128
+    2662:	9323      	ld.w      	r1, (r3, 0xc)
+    2664:	424c      	lsli      	r2, r2, 12
+    2666:	6848      	and      	r1, r2
+    2668:	3940      	cmpnei      	r1, 0
+    266a:	0bc7      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    266c:	3280      	movi      	r2, 128
+    266e:	9323      	ld.w      	r1, (r3, 0xc)
+    2670:	424d      	lsli      	r2, r2, 13
+    2672:	6848      	and      	r1, r2
+    2674:	3940      	cmpnei      	r1, 0
+    2676:	0bc1      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    2678:	3280      	movi      	r2, 128
+    267a:	9323      	ld.w      	r1, (r3, 0xc)
+    267c:	424e      	lsli      	r2, r2, 14
+    267e:	6848      	and      	r1, r2
+    2680:	3940      	cmpnei      	r1, 0
+    2682:	0bbb      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    2684:	3280      	movi      	r2, 128
+    2686:	9323      	ld.w      	r1, (r3, 0xc)
+    2688:	424f      	lsli      	r2, r2, 15
+    268a:	6848      	and      	r1, r2
+    268c:	3940      	cmpnei      	r1, 0
+    268e:	0bb5      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    2690:	3280      	movi      	r2, 128
+    2692:	9323      	ld.w      	r1, (r3, 0xc)
+    2694:	4256      	lsli      	r2, r2, 22
+    2696:	6848      	and      	r1, r2
+    2698:	3940      	cmpnei      	r1, 0
+    269a:	0baf      	bt      	0x25f8	// 25f8 <SYSCONIntHandler+0x44>
+    269c:	0799      	br      	0x25ce	// 25ce <SYSCONIntHandler+0x1a>
+    269e:	0000      	bkpt
+    26a0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+000026a4 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    26a4:	1460      	nie
+    26a6:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    26a8:	1078      	lrw      	r3, 0x20000060	// 2708 <IFCIntHandler+0x64>
+    26aa:	3101      	movi      	r1, 1
+    26ac:	9360      	ld.w      	r3, (r3, 0x0)
+    26ae:	934b      	ld.w      	r2, (r3, 0x2c)
+    26b0:	6884      	and      	r2, r1
+    26b2:	3a40      	cmpnei      	r2, 0
+    26b4:	0c04      	bf      	0x26bc	// 26bc <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    26b6:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    26b8:	1463      	ipop
+    26ba:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    26bc:	934b      	ld.w      	r2, (r3, 0x2c)
+    26be:	3102      	movi      	r1, 2
+    26c0:	6884      	and      	r2, r1
+    26c2:	3a40      	cmpnei      	r2, 0
+    26c4:	0bf9      	bt      	0x26b6	// 26b6 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    26c6:	934b      	ld.w      	r2, (r3, 0x2c)
+    26c8:	3104      	movi      	r1, 4
+    26ca:	6884      	and      	r2, r1
+    26cc:	3a40      	cmpnei      	r2, 0
+    26ce:	0bf4      	bt      	0x26b6	// 26b6 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    26d0:	3280      	movi      	r2, 128
+    26d2:	932b      	ld.w      	r1, (r3, 0x2c)
+    26d4:	4245      	lsli      	r2, r2, 5
+    26d6:	6848      	and      	r1, r2
+    26d8:	3940      	cmpnei      	r1, 0
+    26da:	0c03      	bf      	0x26e0	// 26e0 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    26dc:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    26de:	07ed      	br      	0x26b8	// 26b8 <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    26e0:	3280      	movi      	r2, 128
+    26e2:	932b      	ld.w      	r1, (r3, 0x2c)
+    26e4:	4246      	lsli      	r2, r2, 6
+    26e6:	6848      	and      	r1, r2
+    26e8:	3940      	cmpnei      	r1, 0
+    26ea:	0bf9      	bt      	0x26dc	// 26dc <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    26ec:	3280      	movi      	r2, 128
+    26ee:	932b      	ld.w      	r1, (r3, 0x2c)
+    26f0:	4247      	lsli      	r2, r2, 7
+    26f2:	6848      	and      	r1, r2
+    26f4:	3940      	cmpnei      	r1, 0
+    26f6:	0bf3      	bt      	0x26dc	// 26dc <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    26f8:	3280      	movi      	r2, 128
+    26fa:	932b      	ld.w      	r1, (r3, 0x2c)
+    26fc:	4248      	lsli      	r2, r2, 8
+    26fe:	6848      	and      	r1, r2
+    2700:	3940      	cmpnei      	r1, 0
+    2702:	0bed      	bt      	0x26dc	// 26dc <IFCIntHandler+0x38>
+    2704:	07da      	br      	0x26b8	// 26b8 <IFCIntHandler+0x14>
+    2706:	0000      	bkpt
+    2708:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+0000270c <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    270c:	1460      	nie
+    270e:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    2710:	1078      	lrw      	r3, 0x20000050	// 2770 <ADCIntHandler+0x64>
+    2712:	3101      	movi      	r1, 1
+    2714:	9360      	ld.w      	r3, (r3, 0x0)
+    2716:	9348      	ld.w      	r2, (r3, 0x20)
+    2718:	6884      	and      	r2, r1
+    271a:	3a40      	cmpnei      	r2, 0
+    271c:	0c04      	bf      	0x2724	// 2724 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    271e:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    2720:	1463      	ipop
+    2722:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    2724:	9348      	ld.w      	r2, (r3, 0x20)
+    2726:	3102      	movi      	r1, 2
+    2728:	6884      	and      	r2, r1
+    272a:	3a40      	cmpnei      	r2, 0
+    272c:	0bf9      	bt      	0x271e	// 271e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    272e:	9348      	ld.w      	r2, (r3, 0x20)
+    2730:	3104      	movi      	r1, 4
+    2732:	6884      	and      	r2, r1
+    2734:	3a40      	cmpnei      	r2, 0
+    2736:	0bf4      	bt      	0x271e	// 271e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    2738:	9348      	ld.w      	r2, (r3, 0x20)
+    273a:	3110      	movi      	r1, 16
+    273c:	6884      	and      	r2, r1
+    273e:	3a40      	cmpnei      	r2, 0
+    2740:	0bef      	bt      	0x271e	// 271e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    2742:	9348      	ld.w      	r2, (r3, 0x20)
+    2744:	3120      	movi      	r1, 32
+    2746:	6884      	and      	r2, r1
+    2748:	3a40      	cmpnei      	r2, 0
+    274a:	0bea      	bt      	0x271e	// 271e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    274c:	9348      	ld.w      	r2, (r3, 0x20)
+    274e:	3140      	movi      	r1, 64
+    2750:	6884      	and      	r2, r1
+    2752:	3a40      	cmpnei      	r2, 0
+    2754:	0be5      	bt      	0x271e	// 271e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    2756:	9348      	ld.w      	r2, (r3, 0x20)
+    2758:	3180      	movi      	r1, 128
+    275a:	6884      	and      	r2, r1
+    275c:	3a40      	cmpnei      	r2, 0
+    275e:	0be0      	bt      	0x271e	// 271e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    2760:	3280      	movi      	r2, 128
+    2762:	9328      	ld.w      	r1, (r3, 0x20)
+    2764:	4249      	lsli      	r2, r2, 9
+    2766:	6848      	and      	r1, r2
+    2768:	3940      	cmpnei      	r1, 0
+    276a:	0fdb      	bf      	0x2720	// 2720 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    276c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    276e:	07d9      	br      	0x2720	// 2720 <ADCIntHandler+0x14>
+    2770:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+00002774 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    2774:	1460      	nie
+    2776:	1462      	ipush
+    2778:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    277a:	1387      	lrw      	r4, 0x20000020	// 2914 <EPT0IntHandler+0x1a0>
+    277c:	3280      	movi      	r2, 128
+    277e:	9460      	ld.w      	r3, (r4, 0x0)
+    2780:	60c8      	addu      	r3, r2
+    2782:	9335      	ld.w      	r1, (r3, 0x54)
+    2784:	3001      	movi      	r0, 1
+    2786:	6840      	and      	r1, r0
+    2788:	3940      	cmpnei      	r1, 0
+    278a:	0c03      	bf      	0x2790	// 2790 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    278c:	b317      	st.w      	r0, (r3, 0x5c)
+    278e:	0424      	br      	0x27d6	// 27d6 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    2790:	9335      	ld.w      	r1, (r3, 0x54)
+    2792:	3002      	movi      	r0, 2
+    2794:	6840      	and      	r1, r0
+    2796:	3940      	cmpnei      	r1, 0
+    2798:	0bfa      	bt      	0x278c	// 278c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    279a:	9335      	ld.w      	r1, (r3, 0x54)
+    279c:	3004      	movi      	r0, 4
+    279e:	6840      	and      	r1, r0
+    27a0:	3940      	cmpnei      	r1, 0
+    27a2:	0bf5      	bt      	0x278c	// 278c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    27a4:	9335      	ld.w      	r1, (r3, 0x54)
+    27a6:	3008      	movi      	r0, 8
+    27a8:	6840      	and      	r1, r0
+    27aa:	3940      	cmpnei      	r1, 0
+    27ac:	0bf0      	bt      	0x278c	// 278c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    27ae:	9335      	ld.w      	r1, (r3, 0x54)
+    27b0:	3010      	movi      	r0, 16
+    27b2:	6840      	and      	r1, r0
+    27b4:	3940      	cmpnei      	r1, 0
+    27b6:	0c1f      	bf      	0x27f4	// 27f4 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    27b8:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    27ba:	3200      	movi      	r2, 0
+    27bc:	3101      	movi      	r1, 1
+    27be:	3000      	movi      	r0, 0
+    27c0:	e3fffa94 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    27c4:	3201      	movi      	r2, 1
+    27c6:	3101      	movi      	r1, 1
+    27c8:	3001      	movi      	r0, 1
+    27ca:	e3fffa8f 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    27ce:	9460      	ld.w      	r3, (r4, 0x0)
+    27d0:	934b      	ld.w      	r2, (r3, 0x2c)
+    27d2:	1272      	lrw      	r3, 0x20000178	// 2918 <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    27d4:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    27d6:	9460      	ld.w      	r3, (r4, 0x0)
+    27d8:	3280      	movi      	r2, 128
+    27da:	60c8      	addu      	r3, r2
+    27dc:	932b      	ld.w      	r1, (r3, 0x2c)
+    27de:	3001      	movi      	r0, 1
+    27e0:	6840      	and      	r1, r0
+    27e2:	3940      	cmpnei      	r1, 0
+    27e4:	0c61      	bf      	0x28a6	// 28a6 <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    27e6:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    27e8:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    27ec:	9880      	ld.w      	r4, (r14, 0x0)
+    27ee:	1402      	addi      	r14, r14, 8
+    27f0:	1463      	ipop
+    27f2:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    27f4:	9335      	ld.w      	r1, (r3, 0x54)
+    27f6:	3020      	movi      	r0, 32
+    27f8:	6840      	and      	r1, r0
+    27fa:	3940      	cmpnei      	r1, 0
+    27fc:	0c10      	bf      	0x281c	// 281c <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    27fe:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    2800:	3200      	movi      	r2, 0
+    2802:	3101      	movi      	r1, 1
+    2804:	3001      	movi      	r0, 1
+    2806:	e3fffa71 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    280a:	3201      	movi      	r2, 1
+    280c:	3101      	movi      	r1, 1
+    280e:	3000      	movi      	r0, 0
+    2810:	e3fffa6c 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2814:	9460      	ld.w      	r3, (r4, 0x0)
+    2816:	934c      	ld.w      	r2, (r3, 0x30)
+    2818:	1261      	lrw      	r3, 0x20000174	// 291c <EPT0IntHandler+0x1a8>
+    281a:	07dd      	br      	0x27d4	// 27d4 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    281c:	9335      	ld.w      	r1, (r3, 0x54)
+    281e:	3040      	movi      	r0, 64
+    2820:	6840      	and      	r1, r0
+    2822:	3940      	cmpnei      	r1, 0
+    2824:	0bb4      	bt      	0x278c	// 278c <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    2826:	9335      	ld.w      	r1, (r3, 0x54)
+    2828:	6848      	and      	r1, r2
+    282a:	3940      	cmpnei      	r1, 0
+    282c:	0c03      	bf      	0x2832	// 2832 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    282e:	b357      	st.w      	r2, (r3, 0x5c)
+    2830:	07d3      	br      	0x27d6	// 27d6 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    2832:	3280      	movi      	r2, 128
+    2834:	9335      	ld.w      	r1, (r3, 0x54)
+    2836:	4241      	lsli      	r2, r2, 1
+    2838:	6848      	and      	r1, r2
+    283a:	3940      	cmpnei      	r1, 0
+    283c:	0bf9      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    283e:	3280      	movi      	r2, 128
+    2840:	9335      	ld.w      	r1, (r3, 0x54)
+    2842:	4242      	lsli      	r2, r2, 2
+    2844:	6848      	and      	r1, r2
+    2846:	3940      	cmpnei      	r1, 0
+    2848:	0bf3      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    284a:	3280      	movi      	r2, 128
+    284c:	9335      	ld.w      	r1, (r3, 0x54)
+    284e:	4243      	lsli      	r2, r2, 3
+    2850:	6848      	and      	r1, r2
+    2852:	3940      	cmpnei      	r1, 0
+    2854:	0bed      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    2856:	3280      	movi      	r2, 128
+    2858:	9335      	ld.w      	r1, (r3, 0x54)
+    285a:	4244      	lsli      	r2, r2, 4
+    285c:	6848      	and      	r1, r2
+    285e:	3940      	cmpnei      	r1, 0
+    2860:	0be7      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    2862:	3280      	movi      	r2, 128
+    2864:	9335      	ld.w      	r1, (r3, 0x54)
+    2866:	4245      	lsli      	r2, r2, 5
+    2868:	6848      	and      	r1, r2
+    286a:	3940      	cmpnei      	r1, 0
+    286c:	0be1      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    286e:	3280      	movi      	r2, 128
+    2870:	9335      	ld.w      	r1, (r3, 0x54)
+    2872:	4246      	lsli      	r2, r2, 6
+    2874:	6848      	and      	r1, r2
+    2876:	3940      	cmpnei      	r1, 0
+    2878:	0bdb      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    287a:	3280      	movi      	r2, 128
+    287c:	9335      	ld.w      	r1, (r3, 0x54)
+    287e:	4247      	lsli      	r2, r2, 7
+    2880:	6848      	and      	r1, r2
+    2882:	3940      	cmpnei      	r1, 0
+    2884:	0bd5      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    2886:	3280      	movi      	r2, 128
+    2888:	9335      	ld.w      	r1, (r3, 0x54)
+    288a:	4248      	lsli      	r2, r2, 8
+    288c:	6848      	and      	r1, r2
+    288e:	3940      	cmpnei      	r1, 0
+    2890:	0bcf      	bt      	0x282e	// 282e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    2892:	3280      	movi      	r2, 128
+    2894:	9335      	ld.w      	r1, (r3, 0x54)
+    2896:	4249      	lsli      	r2, r2, 9
+    2898:	6848      	and      	r1, r2
+    289a:	3940      	cmpnei      	r1, 0
+    289c:	0f9d      	bf      	0x27d6	// 27d6 <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    289e:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    28a0:	e3fffd4c 	bsr      	0x2338	// 2338 <EPT_Stop>
+    28a4:	0799      	br      	0x27d6	// 27d6 <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    28a6:	932b      	ld.w      	r1, (r3, 0x2c)
+    28a8:	3002      	movi      	r0, 2
+    28aa:	6840      	and      	r1, r0
+    28ac:	3940      	cmpnei      	r1, 0
+    28ae:	0b9c      	bt      	0x27e6	// 27e6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    28b0:	932b      	ld.w      	r1, (r3, 0x2c)
+    28b2:	3004      	movi      	r0, 4
+    28b4:	6840      	and      	r1, r0
+    28b6:	3940      	cmpnei      	r1, 0
+    28b8:	0b97      	bt      	0x27e6	// 27e6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    28ba:	932b      	ld.w      	r1, (r3, 0x2c)
+    28bc:	3008      	movi      	r0, 8
+    28be:	6840      	and      	r1, r0
+    28c0:	3940      	cmpnei      	r1, 0
+    28c2:	0b92      	bt      	0x27e6	// 27e6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    28c4:	932b      	ld.w      	r1, (r3, 0x2c)
+    28c6:	3010      	movi      	r0, 16
+    28c8:	6840      	and      	r1, r0
+    28ca:	3940      	cmpnei      	r1, 0
+    28cc:	0b8d      	bt      	0x27e6	// 27e6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    28ce:	932b      	ld.w      	r1, (r3, 0x2c)
+    28d0:	3020      	movi      	r0, 32
+    28d2:	6840      	and      	r1, r0
+    28d4:	3940      	cmpnei      	r1, 0
+    28d6:	0b88      	bt      	0x27e6	// 27e6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    28d8:	932b      	ld.w      	r1, (r3, 0x2c)
+    28da:	3040      	movi      	r0, 64
+    28dc:	6840      	and      	r1, r0
+    28de:	3940      	cmpnei      	r1, 0
+    28e0:	0b83      	bt      	0x27e6	// 27e6 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    28e2:	932b      	ld.w      	r1, (r3, 0x2c)
+    28e4:	6848      	and      	r1, r2
+    28e6:	3940      	cmpnei      	r1, 0
+    28e8:	0c03      	bf      	0x28ee	// 28ee <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    28ea:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    28ec:	077e      	br      	0x27e8	// 27e8 <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    28ee:	3280      	movi      	r2, 128
+    28f0:	932b      	ld.w      	r1, (r3, 0x2c)
+    28f2:	4241      	lsli      	r2, r2, 1
+    28f4:	6848      	and      	r1, r2
+    28f6:	3940      	cmpnei      	r1, 0
+    28f8:	0bf9      	bt      	0x28ea	// 28ea <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    28fa:	3280      	movi      	r2, 128
+    28fc:	932b      	ld.w      	r1, (r3, 0x2c)
+    28fe:	4242      	lsli      	r2, r2, 2
+    2900:	6848      	and      	r1, r2
+    2902:	3940      	cmpnei      	r1, 0
+    2904:	0bf3      	bt      	0x28ea	// 28ea <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    2906:	3280      	movi      	r2, 128
+    2908:	932b      	ld.w      	r1, (r3, 0x2c)
+    290a:	4243      	lsli      	r2, r2, 3
+    290c:	6848      	and      	r1, r2
+    290e:	3940      	cmpnei      	r1, 0
+    2910:	0bed      	bt      	0x28ea	// 28ea <EPT0IntHandler+0x176>
+    2912:	076b      	br      	0x27e8	// 27e8 <EPT0IntHandler+0x74>
+    2914:	20000020 	.long	0x20000020
+    2918:	20000178 	.long	0x20000178
+    291c:	20000174 	.long	0x20000174
+
+Disassembly of section .text.WWDTHandler:
+
+00002920 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    2920:	1460      	nie
+    2922:	1462      	ipush
+    2924:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    2926:	10ab      	lrw      	r5, 0x20000010	// 2950 <WWDTHandler+0x30>
+    2928:	3401      	movi      	r4, 1
+    292a:	9560      	ld.w      	r3, (r5, 0x0)
+    292c:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    292e:	30ff      	movi      	r0, 255
+    2930:	e3fffada 	bsr      	0x1ee4	// 1ee4 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    2934:	9540      	ld.w      	r2, (r5, 0x0)
+    2936:	9263      	ld.w      	r3, (r2, 0xc)
+    2938:	68d0      	and      	r3, r4
+    293a:	3b40      	cmpnei      	r3, 0
+    293c:	0c02      	bf      	0x2940	// 2940 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    293e:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    2940:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    2944:	98a1      	ld.w      	r5, (r14, 0x4)
+    2946:	9880      	ld.w      	r4, (r14, 0x0)
+    2948:	1403      	addi      	r14, r14, 12
+    294a:	1463      	ipop
+    294c:	1461      	nir
+    294e:	0000      	bkpt
+    2950:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00002954 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    2954:	1460      	nie
+    2956:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    2958:	107e      	lrw      	r3, 0x20000024	// 29d0 <GPT0IntHandler+0x7c>
+    295a:	3101      	movi      	r1, 1
+    295c:	9360      	ld.w      	r3, (r3, 0x0)
+    295e:	237f      	addi      	r3, 128
+    2960:	9355      	ld.w      	r2, (r3, 0x54)
+    2962:	6884      	and      	r2, r1
+    2964:	3a40      	cmpnei      	r2, 0
+    2966:	0c04      	bf      	0x296e	// 296e <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    2968:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    296a:	1463      	ipop
+    296c:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    296e:	9355      	ld.w      	r2, (r3, 0x54)
+    2970:	3102      	movi      	r1, 2
+    2972:	6884      	and      	r2, r1
+    2974:	3a40      	cmpnei      	r2, 0
+    2976:	0bf9      	bt      	0x2968	// 2968 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    2978:	9355      	ld.w      	r2, (r3, 0x54)
+    297a:	3110      	movi      	r1, 16
+    297c:	6884      	and      	r2, r1
+    297e:	3a40      	cmpnei      	r2, 0
+    2980:	0bf4      	bt      	0x2968	// 2968 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    2982:	9355      	ld.w      	r2, (r3, 0x54)
+    2984:	3120      	movi      	r1, 32
+    2986:	6884      	and      	r2, r1
+    2988:	3a40      	cmpnei      	r2, 0
+    298a:	0bef      	bt      	0x2968	// 2968 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    298c:	3280      	movi      	r2, 128
+    298e:	9335      	ld.w      	r1, (r3, 0x54)
+    2990:	4241      	lsli      	r2, r2, 1
+    2992:	6848      	and      	r1, r2
+    2994:	3940      	cmpnei      	r1, 0
+    2996:	0c03      	bf      	0x299c	// 299c <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    2998:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    299a:	07e8      	br      	0x296a	// 296a <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    299c:	3280      	movi      	r2, 128
+    299e:	9335      	ld.w      	r1, (r3, 0x54)
+    29a0:	4242      	lsli      	r2, r2, 2
+    29a2:	6848      	and      	r1, r2
+    29a4:	3940      	cmpnei      	r1, 0
+    29a6:	0bf9      	bt      	0x2998	// 2998 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    29a8:	3280      	movi      	r2, 128
+    29aa:	9335      	ld.w      	r1, (r3, 0x54)
+    29ac:	4243      	lsli      	r2, r2, 3
+    29ae:	6848      	and      	r1, r2
+    29b0:	3940      	cmpnei      	r1, 0
+    29b2:	0bf3      	bt      	0x2998	// 2998 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    29b4:	3280      	movi      	r2, 128
+    29b6:	9335      	ld.w      	r1, (r3, 0x54)
+    29b8:	4244      	lsli      	r2, r2, 4
+    29ba:	6848      	and      	r1, r2
+    29bc:	3940      	cmpnei      	r1, 0
+    29be:	0bed      	bt      	0x2998	// 2998 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    29c0:	3280      	movi      	r2, 128
+    29c2:	9335      	ld.w      	r1, (r3, 0x54)
+    29c4:	4249      	lsli      	r2, r2, 9
+    29c6:	6848      	and      	r1, r2
+    29c8:	3940      	cmpnei      	r1, 0
+    29ca:	0be7      	bt      	0x2998	// 2998 <GPT0IntHandler+0x44>
+    29cc:	07cf      	br      	0x296a	// 296a <GPT0IntHandler+0x16>
+    29ce:	0000      	bkpt
+    29d0:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+000029d4 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    29d4:	1460      	nie
+    29d6:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    29d8:	1079      	lrw      	r3, 0x20000018	// 2a3c <RTCIntHandler+0x68>
+    29da:	3101      	movi      	r1, 1
+    29dc:	9360      	ld.w      	r3, (r3, 0x0)
+    29de:	934a      	ld.w      	r2, (r3, 0x28)
+    29e0:	6884      	and      	r2, r1
+    29e2:	3a40      	cmpnei      	r2, 0
+    29e4:	0c14      	bf      	0x2a0c	// 2a0c <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    29e6:	1057      	lrw      	r2, 0xca53	// 2a40 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    29e8:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    29ea:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    29ec:	9342      	ld.w      	r2, (r3, 0x8)
+    29ee:	6c84      	or      	r2, r1
+    29f0:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    29f2:	3280      	movi      	r2, 128
+    29f4:	424d      	lsli      	r2, r2, 13
+    29f6:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    29f8:	3102      	movi      	r1, 2
+    29fa:	9342      	ld.w      	r2, (r3, 0x8)
+    29fc:	6884      	and      	r2, r1
+    29fe:	3a40      	cmpnei      	r2, 0
+    2a00:	0bfd      	bt      	0x29fa	// 29fa <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    2a02:	9342      	ld.w      	r2, (r3, 0x8)
+    2a04:	3a80      	bclri      	r2, 0
+    2a06:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    2a08:	1463      	ipop
+    2a0a:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    2a0c:	934a      	ld.w      	r2, (r3, 0x28)
+    2a0e:	3102      	movi      	r1, 2
+    2a10:	6884      	and      	r2, r1
+    2a12:	3a40      	cmpnei      	r2, 0
+    2a14:	0c03      	bf      	0x2a1a	// 2a1a <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    2a16:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    2a18:	07f8      	br      	0x2a08	// 2a08 <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    2a1a:	934a      	ld.w      	r2, (r3, 0x28)
+    2a1c:	3104      	movi      	r1, 4
+    2a1e:	6884      	and      	r2, r1
+    2a20:	3a40      	cmpnei      	r2, 0
+    2a22:	0bfa      	bt      	0x2a16	// 2a16 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    2a24:	934a      	ld.w      	r2, (r3, 0x28)
+    2a26:	3108      	movi      	r1, 8
+    2a28:	6884      	and      	r2, r1
+    2a2a:	3a40      	cmpnei      	r2, 0
+    2a2c:	0bf5      	bt      	0x2a16	// 2a16 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    2a2e:	934a      	ld.w      	r2, (r3, 0x28)
+    2a30:	3110      	movi      	r1, 16
+    2a32:	6884      	and      	r2, r1
+    2a34:	3a40      	cmpnei      	r2, 0
+    2a36:	0bf0      	bt      	0x2a16	// 2a16 <RTCIntHandler+0x42>
+    2a38:	07e8      	br      	0x2a08	// 2a08 <RTCIntHandler+0x34>
+    2a3a:	0000      	bkpt
+    2a3c:	20000018 	.long	0x20000018
+    2a40:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00002a44 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    2a44:	1460      	nie
+    2a46:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a48:	106d      	lrw      	r3, 0x20000040	// 2a7c <UART0IntHandler+0x38>
+    2a4a:	3102      	movi      	r1, 2
+    2a4c:	9360      	ld.w      	r3, (r3, 0x0)
+    2a4e:	9343      	ld.w      	r2, (r3, 0xc)
+    2a50:	6884      	and      	r2, r1
+    2a52:	3a40      	cmpnei      	r2, 0
+    2a54:	0c03      	bf      	0x2a5a	// 2a5a <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    2a56:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2a58:	0410      	br      	0x2a78	// 2a78 <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2a5a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a5c:	3101      	movi      	r1, 1
+    2a5e:	6884      	and      	r2, r1
+    2a60:	3a40      	cmpnei      	r2, 0
+    2a62:	0bfa      	bt      	0x2a56	// 2a56 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2a64:	9343      	ld.w      	r2, (r3, 0xc)
+    2a66:	3108      	movi      	r1, 8
+    2a68:	6884      	and      	r2, r1
+    2a6a:	3a40      	cmpnei      	r2, 0
+    2a6c:	0bf5      	bt      	0x2a56	// 2a56 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2a6e:	9343      	ld.w      	r2, (r3, 0xc)
+    2a70:	3104      	movi      	r1, 4
+    2a72:	6884      	and      	r2, r1
+    2a74:	3a40      	cmpnei      	r2, 0
+    2a76:	0bf0      	bt      	0x2a56	// 2a56 <UART0IntHandler+0x12>
+}
+    2a78:	1463      	ipop
+    2a7a:	1461      	nir
+    2a7c:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00002a80 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    2a80:	1460      	nie
+    2a82:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2a84:	106d      	lrw      	r3, 0x2000003c	// 2ab8 <UART1IntHandler+0x38>
+    2a86:	3102      	movi      	r1, 2
+    2a88:	9360      	ld.w      	r3, (r3, 0x0)
+    2a8a:	9343      	ld.w      	r2, (r3, 0xc)
+    2a8c:	6884      	and      	r2, r1
+    2a8e:	3a40      	cmpnei      	r2, 0
+    2a90:	0c03      	bf      	0x2a96	// 2a96 <UART1IntHandler+0x16>
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+    2a92:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2a94:	0410      	br      	0x2ab4	// 2ab4 <UART1IntHandler+0x34>
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2a96:	9343      	ld.w      	r2, (r3, 0xc)
+    2a98:	3101      	movi      	r1, 1
+    2a9a:	6884      	and      	r2, r1
+    2a9c:	3a40      	cmpnei      	r2, 0
+    2a9e:	0bfa      	bt      	0x2a92	// 2a92 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2aa0:	9343      	ld.w      	r2, (r3, 0xc)
+    2aa2:	3108      	movi      	r1, 8
+    2aa4:	6884      	and      	r2, r1
+    2aa6:	3a40      	cmpnei      	r2, 0
+    2aa8:	0bf5      	bt      	0x2a92	// 2a92 <UART1IntHandler+0x12>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2aaa:	9343      	ld.w      	r2, (r3, 0xc)
+    2aac:	3104      	movi      	r1, 4
+    2aae:	6884      	and      	r2, r1
+    2ab0:	3a40      	cmpnei      	r2, 0
+    2ab2:	0bf0      	bt      	0x2a92	// 2a92 <UART1IntHandler+0x12>
+}
+    2ab4:	1463      	ipop
+    2ab6:	1461      	nir
+    2ab8:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2IntHandler:
+
+00002abc <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    2abc:	1460      	nie
+    2abe:	1462      	ipush
+    2ac0:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2ac2:	107f      	lrw      	r3, 0x20000038	// 2b3c <UART2IntHandler+0x80>
+    2ac4:	3102      	movi      	r1, 2
+    2ac6:	9360      	ld.w      	r3, (r3, 0x0)
+    2ac8:	9343      	ld.w      	r2, (r3, 0xc)
+    2aca:	6884      	and      	r2, r1
+    2acc:	3a40      	cmpnei      	r2, 0
+    2ace:	0c0b      	bf      	0x2ae4	// 2ae4 <UART2IntHandler+0x28>
+	{
+		UART2->ISR=UART_RX_INT_S;
+    2ad0:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART2);
+    2ad2:	9300      	ld.w      	r0, (r3, 0x0)
+		UART2_RecvINT_Processing(inchar);
+    2ad4:	7400      	zextb      	r0, r0
+    2ad6:	e00002c5 	bsr      	0x3060	// 3060 <UART2_RecvINT_Processing>
+			RS485_Comm_End ++;
+		}
+		
+	}
+	
+}
+    2ada:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2ade:	1401      	addi      	r14, r14, 4
+    2ae0:	1463      	ipop
+    2ae2:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2ae4:	9323      	ld.w      	r1, (r3, 0xc)
+    2ae6:	3201      	movi      	r2, 1
+    2ae8:	6848      	and      	r1, r2
+    2aea:	3940      	cmpnei      	r1, 0
+    2aec:	0c0d      	bf      	0x2b06	// 2b06 <UART2IntHandler+0x4a>
+		UART2->ISR=UART_TX_INT_S;
+    2aee:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    2af0:	1074      	lrw      	r3, 0x200000b8	// 2b40 <UART2IntHandler+0x84>
+    2af2:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2af4:	1074      	lrw      	r3, 0x200000bc	// 2b44 <UART2IntHandler+0x88>
+    2af6:	9360      	ld.w      	r3, (r3, 0x0)
+    2af8:	3b41      	cmpnei      	r3, 1
+    2afa:	0bf0      	bt      	0x2ada	// 2ada <UART2IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    2afc:	1053      	lrw      	r2, 0x200000c0	// 2b48 <UART2IntHandler+0x8c>
+			RS485_Comm_End ++;
+    2afe:	9260      	ld.w      	r3, (r2, 0x0)
+    2b00:	2300      	addi      	r3, 1
+    2b02:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2b04:	07eb      	br      	0x2ada	// 2ada <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2b06:	9343      	ld.w      	r2, (r3, 0xc)
+    2b08:	3108      	movi      	r1, 8
+    2b0a:	6884      	and      	r2, r1
+    2b0c:	3a40      	cmpnei      	r2, 0
+    2b0e:	0c03      	bf      	0x2b14	// 2b14 <UART2IntHandler+0x58>
+		UART2->ISR=UART_TX_IOV_S;
+    2b10:	b323      	st.w      	r1, (r3, 0xc)
+    2b12:	07e4      	br      	0x2ada	// 2ada <UART2IntHandler+0x1e>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2b14:	9343      	ld.w      	r2, (r3, 0xc)
+    2b16:	3104      	movi      	r1, 4
+    2b18:	6884      	and      	r2, r1
+    2b1a:	3a40      	cmpnei      	r2, 0
+    2b1c:	0bfa      	bt      	0x2b10	// 2b10 <UART2IntHandler+0x54>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2b1e:	3180      	movi      	r1, 128
+    2b20:	9303      	ld.w      	r0, (r3, 0xc)
+    2b22:	412c      	lsli      	r1, r1, 12
+    2b24:	6804      	and      	r0, r1
+    2b26:	3840      	cmpnei      	r0, 0
+    2b28:	0fd9      	bf      	0x2ada	// 2ada <UART2IntHandler+0x1e>
+		UART2->ISR=UART_TX_DONE_S;
+    2b2a:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    2b2c:	1065      	lrw      	r3, 0x200000b8	// 2b40 <UART2IntHandler+0x84>
+    2b2e:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2b30:	1065      	lrw      	r3, 0x200000bc	// 2b44 <UART2IntHandler+0x88>
+    2b32:	9360      	ld.w      	r3, (r3, 0x0)
+    2b34:	3b41      	cmpnei      	r3, 1
+    2b36:	0bd2      	bt      	0x2ada	// 2ada <UART2IntHandler+0x1e>
+			RS485_Comm_End ++;
+    2b38:	1045      	lrw      	r2, 0x200000c4	// 2b4c <UART2IntHandler+0x90>
+    2b3a:	07e2      	br      	0x2afe	// 2afe <UART2IntHandler+0x42>
+    2b3c:	20000038 	.long	0x20000038
+    2b40:	200000b8 	.long	0x200000b8
+    2b44:	200000bc 	.long	0x200000bc
+    2b48:	200000c0 	.long	0x200000c0
+    2b4c:	200000c4 	.long	0x200000c4
+
+Disassembly of section .text.SPI0IntHandler:
+
+00002b50 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    2b50:	1460      	nie
+    2b52:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    2b54:	1178      	lrw      	r3, 0x20000034	// 2c34 <SPI0IntHandler+0xe4>
+    2b56:	3101      	movi      	r1, 1
+    2b58:	9360      	ld.w      	r3, (r3, 0x0)
+    2b5a:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b5c:	6884      	and      	r2, r1
+    2b5e:	3a40      	cmpnei      	r2, 0
+    2b60:	0c03      	bf      	0x2b66	// 2b66 <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    2b62:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    2b64:	0407      	br      	0x2b72	// 2b72 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    2b66:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b68:	3002      	movi      	r0, 2
+    2b6a:	6880      	and      	r2, r0
+    2b6c:	3a40      	cmpnei      	r2, 0
+    2b6e:	0c04      	bf      	0x2b76	// 2b76 <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    2b70:	b308      	st.w      	r0, (r3, 0x20)
+}
+    2b72:	1463      	ipop
+    2b74:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    2b76:	9347      	ld.w      	r2, (r3, 0x1c)
+    2b78:	3004      	movi      	r0, 4
+    2b7a:	6880      	and      	r2, r0
+    2b7c:	3a40      	cmpnei      	r2, 0
+    2b7e:	0c55      	bf      	0x2c28	// 2c28 <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    2b80:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    2b82:	9302      	ld.w      	r0, (r3, 0x8)
+    2b84:	32aa      	movi      	r2, 170
+    2b86:	6482      	cmpne      	r0, r2
+    2b88:	083e      	bt      	0x2c04	// 2c04 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2b8a:	3102      	movi      	r1, 2
+    2b8c:	9343      	ld.w      	r2, (r3, 0xc)
+    2b8e:	6884      	and      	r2, r1
+    2b90:	3a40      	cmpnei      	r2, 0
+    2b92:	0ffd      	bf      	0x2b8c	// 2b8c <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    2b94:	3211      	movi      	r2, 17
+    2b96:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2b98:	3110      	movi      	r1, 16
+    2b9a:	9343      	ld.w      	r2, (r3, 0xc)
+    2b9c:	6884      	and      	r2, r1
+    2b9e:	3a40      	cmpnei      	r2, 0
+    2ba0:	0bfd      	bt      	0x2b9a	// 2b9a <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2ba2:	3102      	movi      	r1, 2
+    2ba4:	9343      	ld.w      	r2, (r3, 0xc)
+    2ba6:	6884      	and      	r2, r1
+    2ba8:	3a40      	cmpnei      	r2, 0
+    2baa:	0ffd      	bf      	0x2ba4	// 2ba4 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    2bac:	3212      	movi      	r2, 18
+    2bae:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2bb0:	3110      	movi      	r1, 16
+    2bb2:	9343      	ld.w      	r2, (r3, 0xc)
+    2bb4:	6884      	and      	r2, r1
+    2bb6:	3a40      	cmpnei      	r2, 0
+    2bb8:	0bfd      	bt      	0x2bb2	// 2bb2 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2bba:	3102      	movi      	r1, 2
+    2bbc:	9343      	ld.w      	r2, (r3, 0xc)
+    2bbe:	6884      	and      	r2, r1
+    2bc0:	3a40      	cmpnei      	r2, 0
+    2bc2:	0ffd      	bf      	0x2bbc	// 2bbc <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    2bc4:	3213      	movi      	r2, 19
+    2bc6:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2bc8:	3110      	movi      	r1, 16
+    2bca:	9343      	ld.w      	r2, (r3, 0xc)
+    2bcc:	6884      	and      	r2, r1
+    2bce:	3a40      	cmpnei      	r2, 0
+    2bd0:	0bfd      	bt      	0x2bca	// 2bca <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2bd2:	3102      	movi      	r1, 2
+    2bd4:	9343      	ld.w      	r2, (r3, 0xc)
+    2bd6:	6884      	and      	r2, r1
+    2bd8:	3a40      	cmpnei      	r2, 0
+    2bda:	0ffd      	bf      	0x2bd4	// 2bd4 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    2bdc:	3214      	movi      	r2, 20
+    2bde:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2be0:	3110      	movi      	r1, 16
+    2be2:	9343      	ld.w      	r2, (r3, 0xc)
+    2be4:	6884      	and      	r2, r1
+    2be6:	3a40      	cmpnei      	r2, 0
+    2be8:	0bfd      	bt      	0x2be2	// 2be2 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2bea:	3102      	movi      	r1, 2
+    2bec:	9343      	ld.w      	r2, (r3, 0xc)
+    2bee:	6884      	and      	r2, r1
+    2bf0:	3a40      	cmpnei      	r2, 0
+    2bf2:	0ffd      	bf      	0x2bec	// 2bec <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    2bf4:	3215      	movi      	r2, 21
+    2bf6:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2bf8:	3110      	movi      	r1, 16
+    2bfa:	9343      	ld.w      	r2, (r3, 0xc)
+    2bfc:	6884      	and      	r2, r1
+    2bfe:	3a40      	cmpnei      	r2, 0
+    2c00:	0bfd      	bt      	0x2bfa	// 2bfa <SPI0IntHandler+0xaa>
+    2c02:	07b8      	br      	0x2b72	// 2b72 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    2c04:	9343      	ld.w      	r2, (r3, 0xc)
+    2c06:	6884      	and      	r2, r1
+    2c08:	3a40      	cmpnei      	r2, 0
+    2c0a:	0bb4      	bt      	0x2b72	// 2b72 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    2c0c:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2c0e:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    2c10:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2c12:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2c14:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2c16:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2c18:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2c1a:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2c1c:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2c1e:	9343      	ld.w      	r2, (r3, 0xc)
+    2c20:	6884      	and      	r2, r1
+    2c22:	3a40      	cmpnei      	r2, 0
+    2c24:	0bfd      	bt      	0x2c1e	// 2c1e <SPI0IntHandler+0xce>
+    2c26:	07a6      	br      	0x2b72	// 2b72 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    2c28:	9347      	ld.w      	r2, (r3, 0x1c)
+    2c2a:	3108      	movi      	r1, 8
+    2c2c:	6884      	and      	r2, r1
+    2c2e:	3a40      	cmpnei      	r2, 0
+    2c30:	0b99      	bt      	0x2b62	// 2b62 <SPI0IntHandler+0x12>
+    2c32:	07a0      	br      	0x2b72	// 2b72 <SPI0IntHandler+0x22>
+    2c34:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+00002c38 <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    2c38:	1460      	nie
+    2c3a:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    2c3c:	1073      	lrw      	r3, 0x2000002c	// 2c88 <SIO0IntHandler+0x50>
+    2c3e:	3104      	movi      	r1, 4
+    2c40:	9360      	ld.w      	r3, (r3, 0x0)
+    2c42:	9349      	ld.w      	r2, (r3, 0x24)
+    2c44:	6884      	and      	r2, r1
+    2c46:	3a40      	cmpnei      	r2, 0
+    2c48:	0c02      	bf      	0x2c4c	// 2c4c <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    2c4a:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    2c4c:	9349      	ld.w      	r2, (r3, 0x24)
+    2c4e:	3101      	movi      	r1, 1
+    2c50:	6884      	and      	r2, r1
+    2c52:	3a40      	cmpnei      	r2, 0
+    2c54:	0c02      	bf      	0x2c58	// 2c58 <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    2c56:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    2c58:	9349      	ld.w      	r2, (r3, 0x24)
+    2c5a:	3102      	movi      	r1, 2
+    2c5c:	6884      	and      	r2, r1
+    2c5e:	3a40      	cmpnei      	r2, 0
+    2c60:	0c03      	bf      	0x2c66	// 2c66 <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    2c62:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    2c64:	0410      	br      	0x2c84	// 2c84 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    2c66:	9349      	ld.w      	r2, (r3, 0x24)
+    2c68:	3108      	movi      	r1, 8
+    2c6a:	6884      	and      	r2, r1
+    2c6c:	3a40      	cmpnei      	r2, 0
+    2c6e:	0bfa      	bt      	0x2c62	// 2c62 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    2c70:	9349      	ld.w      	r2, (r3, 0x24)
+    2c72:	3110      	movi      	r1, 16
+    2c74:	6884      	and      	r2, r1
+    2c76:	3a40      	cmpnei      	r2, 0
+    2c78:	0bf5      	bt      	0x2c62	// 2c62 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    2c7a:	9349      	ld.w      	r2, (r3, 0x24)
+    2c7c:	3120      	movi      	r1, 32
+    2c7e:	6884      	and      	r2, r1
+    2c80:	3a40      	cmpnei      	r2, 0
+    2c82:	0bf0      	bt      	0x2c62	// 2c62 <SIO0IntHandler+0x2a>
+}
+    2c84:	1463      	ipop
+    2c86:	1461      	nir
+    2c88:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00002c8c <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    2c8c:	1460      	nie
+    2c8e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    2c90:	106a      	lrw      	r3, 0x2000005c	// 2cb8 <EXI0IntHandler+0x2c>
+    2c92:	3101      	movi      	r1, 1
+    2c94:	9360      	ld.w      	r3, (r3, 0x0)
+    2c96:	237f      	addi      	r3, 128
+    2c98:	934c      	ld.w      	r2, (r3, 0x30)
+    2c9a:	6884      	and      	r2, r1
+    2c9c:	3a40      	cmpnei      	r2, 0
+    2c9e:	0c04      	bf      	0x2ca6	// 2ca6 <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    2ca0:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    2ca2:	1463      	ipop
+    2ca4:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    2ca6:	3280      	movi      	r2, 128
+    2ca8:	932c      	ld.w      	r1, (r3, 0x30)
+    2caa:	4249      	lsli      	r2, r2, 9
+    2cac:	6848      	and      	r1, r2
+    2cae:	3940      	cmpnei      	r1, 0
+    2cb0:	0ff9      	bf      	0x2ca2	// 2ca2 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    2cb2:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2cb4:	07f7      	br      	0x2ca2	// 2ca2 <EXI0IntHandler+0x16>
+    2cb6:	0000      	bkpt
+    2cb8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00002cbc <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    2cbc:	1460      	nie
+    2cbe:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    2cc0:	106a      	lrw      	r3, 0x2000005c	// 2ce8 <EXI1IntHandler+0x2c>
+    2cc2:	3102      	movi      	r1, 2
+    2cc4:	9360      	ld.w      	r3, (r3, 0x0)
+    2cc6:	237f      	addi      	r3, 128
+    2cc8:	934c      	ld.w      	r2, (r3, 0x30)
+    2cca:	6884      	and      	r2, r1
+    2ccc:	3a40      	cmpnei      	r2, 0
+    2cce:	0c04      	bf      	0x2cd6	// 2cd6 <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    2cd0:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    2cd2:	1463      	ipop
+    2cd4:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    2cd6:	3280      	movi      	r2, 128
+    2cd8:	932c      	ld.w      	r1, (r3, 0x30)
+    2cda:	424a      	lsli      	r2, r2, 10
+    2cdc:	6848      	and      	r1, r2
+    2cde:	3940      	cmpnei      	r1, 0
+    2ce0:	0ff9      	bf      	0x2cd2	// 2cd2 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    2ce2:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2ce4:	07f7      	br      	0x2cd2	// 2cd2 <EXI1IntHandler+0x16>
+    2ce6:	0000      	bkpt
+    2ce8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+00002cec <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    2cec:	1460      	nie
+    2cee:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    2cf0:	1070      	lrw      	r3, 0x2000005c	// 2d30 <EXI2to3IntHandler+0x44>
+    2cf2:	3104      	movi      	r1, 4
+    2cf4:	9360      	ld.w      	r3, (r3, 0x0)
+    2cf6:	237f      	addi      	r3, 128
+    2cf8:	934c      	ld.w      	r2, (r3, 0x30)
+    2cfa:	6884      	and      	r2, r1
+    2cfc:	3a40      	cmpnei      	r2, 0
+    2cfe:	0c04      	bf      	0x2d06	// 2d06 <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    2d00:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    2d02:	1463      	ipop
+    2d04:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    2d06:	934c      	ld.w      	r2, (r3, 0x30)
+    2d08:	3108      	movi      	r1, 8
+    2d0a:	6884      	and      	r2, r1
+    2d0c:	3a40      	cmpnei      	r2, 0
+    2d0e:	0bf9      	bt      	0x2d00	// 2d00 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    2d10:	3280      	movi      	r2, 128
+    2d12:	932c      	ld.w      	r1, (r3, 0x30)
+    2d14:	424b      	lsli      	r2, r2, 11
+    2d16:	6848      	and      	r1, r2
+    2d18:	3940      	cmpnei      	r1, 0
+    2d1a:	0c03      	bf      	0x2d20	// 2d20 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    2d1c:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2d1e:	07f2      	br      	0x2d02	// 2d02 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    2d20:	3280      	movi      	r2, 128
+    2d22:	932c      	ld.w      	r1, (r3, 0x30)
+    2d24:	424c      	lsli      	r2, r2, 12
+    2d26:	6848      	and      	r1, r2
+    2d28:	3940      	cmpnei      	r1, 0
+    2d2a:	0bf9      	bt      	0x2d1c	// 2d1c <EXI2to3IntHandler+0x30>
+    2d2c:	07eb      	br      	0x2d02	// 2d02 <EXI2to3IntHandler+0x16>
+    2d2e:	0000      	bkpt
+    2d30:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+00002d34 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    2d34:	1460      	nie
+    2d36:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    2d38:	1075      	lrw      	r3, 0x2000005c	// 2d8c <EXI4to9IntHandler+0x58>
+    2d3a:	3280      	movi      	r2, 128
+    2d3c:	9360      	ld.w      	r3, (r3, 0x0)
+    2d3e:	60c8      	addu      	r3, r2
+    2d40:	932c      	ld.w      	r1, (r3, 0x30)
+    2d42:	3010      	movi      	r0, 16
+    2d44:	6840      	and      	r1, r0
+    2d46:	3940      	cmpnei      	r1, 0
+    2d48:	0c04      	bf      	0x2d50	// 2d50 <EXI4to9IntHandler+0x1c>
+	{
+		SYSCON->EXICR = EXI_PIN5;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN6;
+    2d4a:	b30b      	st.w      	r0, (r3, 0x2c)
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN9;
+	} 
+
+}
+    2d4c:	1463      	ipop
+    2d4e:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+    2d50:	932c      	ld.w      	r1, (r3, 0x30)
+    2d52:	3020      	movi      	r0, 32
+    2d54:	6840      	and      	r1, r0
+    2d56:	3940      	cmpnei      	r1, 0
+    2d58:	0bf9      	bt      	0x2d4a	// 2d4a <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+    2d5a:	932c      	ld.w      	r1, (r3, 0x30)
+    2d5c:	3040      	movi      	r0, 64
+    2d5e:	6840      	and      	r1, r0
+    2d60:	3940      	cmpnei      	r1, 0
+    2d62:	0bf4      	bt      	0x2d4a	// 2d4a <EXI4to9IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+    2d64:	932c      	ld.w      	r1, (r3, 0x30)
+    2d66:	6848      	and      	r1, r2
+    2d68:	3940      	cmpnei      	r1, 0
+    2d6a:	0c03      	bf      	0x2d70	// 2d70 <EXI4to9IntHandler+0x3c>
+		SYSCON->EXICR = EXI_PIN9;
+    2d6c:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2d6e:	07ef      	br      	0x2d4c	// 2d4c <EXI4to9IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+    2d70:	3280      	movi      	r2, 128
+    2d72:	932c      	ld.w      	r1, (r3, 0x30)
+    2d74:	4241      	lsli      	r2, r2, 1
+    2d76:	6848      	and      	r1, r2
+    2d78:	3940      	cmpnei      	r1, 0
+    2d7a:	0bf9      	bt      	0x2d6c	// 2d6c <EXI4to9IntHandler+0x38>
+	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+    2d7c:	3280      	movi      	r2, 128
+    2d7e:	932c      	ld.w      	r1, (r3, 0x30)
+    2d80:	4242      	lsli      	r2, r2, 2
+    2d82:	6848      	and      	r1, r2
+    2d84:	3940      	cmpnei      	r1, 0
+    2d86:	0bf3      	bt      	0x2d6c	// 2d6c <EXI4to9IntHandler+0x38>
+    2d88:	07e2      	br      	0x2d4c	// 2d4c <EXI4to9IntHandler+0x18>
+    2d8a:	0000      	bkpt
+    2d8c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00002d90 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    2d90:	1460      	nie
+    2d92:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    2d94:	1076      	lrw      	r3, 0x2000005c	// 2dec <EXI10to15IntHandler+0x5c>
+    2d96:	3280      	movi      	r2, 128
+    2d98:	9360      	ld.w      	r3, (r3, 0x0)
+    2d9a:	237f      	addi      	r3, 128
+    2d9c:	932c      	ld.w      	r1, (r3, 0x30)
+    2d9e:	4243      	lsli      	r2, r2, 3
+    2da0:	6848      	and      	r1, r2
+    2da2:	3940      	cmpnei      	r1, 0
+    2da4:	0c03      	bf      	0x2daa	// 2daa <EXI10to15IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+    2da6:	b34b      	st.w      	r2, (r3, 0x2c)
+	}
+}
+    2da8:	041f      	br      	0x2de6	// 2de6 <EXI10to15IntHandler+0x56>
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    2daa:	3280      	movi      	r2, 128
+    2dac:	932c      	ld.w      	r1, (r3, 0x30)
+    2dae:	4244      	lsli      	r2, r2, 4
+    2db0:	6848      	and      	r1, r2
+    2db2:	3940      	cmpnei      	r1, 0
+    2db4:	0bf9      	bt      	0x2da6	// 2da6 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    2db6:	3280      	movi      	r2, 128
+    2db8:	932c      	ld.w      	r1, (r3, 0x30)
+    2dba:	4245      	lsli      	r2, r2, 5
+    2dbc:	6848      	and      	r1, r2
+    2dbe:	3940      	cmpnei      	r1, 0
+    2dc0:	0bf3      	bt      	0x2da6	// 2da6 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    2dc2:	3280      	movi      	r2, 128
+    2dc4:	932c      	ld.w      	r1, (r3, 0x30)
+    2dc6:	4246      	lsli      	r2, r2, 6
+    2dc8:	6848      	and      	r1, r2
+    2dca:	3940      	cmpnei      	r1, 0
+    2dcc:	0bed      	bt      	0x2da6	// 2da6 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    2dce:	3280      	movi      	r2, 128
+    2dd0:	932c      	ld.w      	r1, (r3, 0x30)
+    2dd2:	4247      	lsli      	r2, r2, 7
+    2dd4:	6848      	and      	r1, r2
+    2dd6:	3940      	cmpnei      	r1, 0
+    2dd8:	0be7      	bt      	0x2da6	// 2da6 <EXI10to15IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    2dda:	3280      	movi      	r2, 128
+    2ddc:	932c      	ld.w      	r1, (r3, 0x30)
+    2dde:	4248      	lsli      	r2, r2, 8
+    2de0:	6848      	and      	r1, r2
+    2de2:	3940      	cmpnei      	r1, 0
+    2de4:	0be1      	bt      	0x2da6	// 2da6 <EXI10to15IntHandler+0x16>
+}
+    2de6:	1463      	ipop
+    2de8:	1461      	nir
+    2dea:	0000      	bkpt
+    2dec:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+00002df0 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    2df0:	1460      	nie
+    2df2:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    2df4:	106b      	lrw      	r3, 0x20000014	// 2e20 <LPTIntHandler+0x30>
+    2df6:	3101      	movi      	r1, 1
+    2df8:	9360      	ld.w      	r3, (r3, 0x0)
+    2dfa:	934e      	ld.w      	r2, (r3, 0x38)
+    2dfc:	6884      	and      	r2, r1
+    2dfe:	3a40      	cmpnei      	r2, 0
+    2e00:	0c03      	bf      	0x2e06	// 2e06 <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    2e02:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    2e04:	040b      	br      	0x2e1a	// 2e1a <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    2e06:	934e      	ld.w      	r2, (r3, 0x38)
+    2e08:	3102      	movi      	r1, 2
+    2e0a:	6884      	and      	r2, r1
+    2e0c:	3a40      	cmpnei      	r2, 0
+    2e0e:	0bfa      	bt      	0x2e02	// 2e02 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    2e10:	934e      	ld.w      	r2, (r3, 0x38)
+    2e12:	3104      	movi      	r1, 4
+    2e14:	6884      	and      	r2, r1
+    2e16:	3a40      	cmpnei      	r2, 0
+    2e18:	0bf5      	bt      	0x2e02	// 2e02 <LPTIntHandler+0x12>
+}
+    2e1a:	1463      	ipop
+    2e1c:	1461      	nir
+    2e1e:	0000      	bkpt
+    2e20:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+00002e24 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    2e24:	1460      	nie
+    2e26:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    2e28:	1071      	lrw      	r3, 0x2000000c	// 2e6c <BT0IntHandler+0x48>
+    2e2a:	3101      	movi      	r1, 1
+    2e2c:	9360      	ld.w      	r3, (r3, 0x0)
+    2e2e:	934c      	ld.w      	r2, (r3, 0x30)
+    2e30:	6884      	and      	r2, r1
+    2e32:	3a40      	cmpnei      	r2, 0
+    2e34:	0c0a      	bf      	0x2e48	// 2e48 <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    2e36:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+		
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    2e38:	9341      	ld.w      	r2, (r3, 0x4)
+    2e3a:	3a86      	bclri      	r2, 6
+    2e3c:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    2e3e:	9340      	ld.w      	r2, (r3, 0x0)
+    2e40:	3200      	movi      	r2, 0
+    2e42:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    2e44:	1463      	ipop
+    2e46:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    2e48:	934c      	ld.w      	r2, (r3, 0x30)
+    2e4a:	3102      	movi      	r1, 2
+    2e4c:	6884      	and      	r2, r1
+    2e4e:	3a40      	cmpnei      	r2, 0
+    2e50:	0c03      	bf      	0x2e56	// 2e56 <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    2e52:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    2e54:	07f8      	br      	0x2e44	// 2e44 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    2e56:	934c      	ld.w      	r2, (r3, 0x30)
+    2e58:	3104      	movi      	r1, 4
+    2e5a:	6884      	and      	r2, r1
+    2e5c:	3a40      	cmpnei      	r2, 0
+    2e5e:	0bfa      	bt      	0x2e52	// 2e52 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    2e60:	934c      	ld.w      	r2, (r3, 0x30)
+    2e62:	3108      	movi      	r1, 8
+    2e64:	6884      	and      	r2, r1
+    2e66:	3a40      	cmpnei      	r2, 0
+    2e68:	0bf5      	bt      	0x2e52	// 2e52 <BT0IntHandler+0x2e>
+    2e6a:	07ed      	br      	0x2e44	// 2e44 <BT0IntHandler+0x20>
+    2e6c:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00002e70 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    2e70:	1460      	nie
+    2e72:	1462      	ipush
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    2e74:	1076      	lrw      	r3, 0x20000008	// 2ecc <BT1IntHandler+0x5c>
+    2e76:	3101      	movi      	r1, 1
+    2e78:	9360      	ld.w      	r3, (r3, 0x0)
+    2e7a:	934c      	ld.w      	r2, (r3, 0x30)
+    2e7c:	6884      	and      	r2, r1
+    2e7e:	3a40      	cmpnei      	r2, 0
+    2e80:	0c03      	bf      	0x2e86	// 2e86 <BT1IntHandler+0x16>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    2e82:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    2e84:	0416      	br      	0x2eb0	// 2eb0 <BT1IntHandler+0x40>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    2e86:	934c      	ld.w      	r2, (r3, 0x30)
+    2e88:	3102      	movi      	r1, 2
+    2e8a:	6884      	and      	r2, r1
+    2e8c:	3a40      	cmpnei      	r2, 0
+    2e8e:	0c13      	bf      	0x2eb4	// 2eb4 <BT1IntHandler+0x44>
+		BT1->ICR = BT_CMP;
+    2e90:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    2e92:	1070      	lrw      	r3, 0x200000ac	// 2ed0 <BT1IntHandler+0x60>
+    2e94:	8340      	ld.b      	r2, (r3, 0x0)
+    2e96:	2200      	addi      	r2, 1
+    2e98:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    2e9a:	9321      	ld.w      	r1, (r3, 0x4)
+    2e9c:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    2e9e:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    2ea0:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    2ea2:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    2ea4:	0c06      	bf      	0x2eb0	// 2eb0 <BT1IntHandler+0x40>
+			NUM = 0;
+    2ea6:	3200      	movi      	r2, 0
+    2ea8:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    2eaa:	9342      	ld.w      	r2, (r3, 0x8)
+    2eac:	2200      	addi      	r2, 1
+    2eae:	b342      	st.w      	r2, (r3, 0x8)
+}
+    2eb0:	1463      	ipop
+    2eb2:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    2eb4:	934c      	ld.w      	r2, (r3, 0x30)
+    2eb6:	3104      	movi      	r1, 4
+    2eb8:	6884      	and      	r2, r1
+    2eba:	3a40      	cmpnei      	r2, 0
+    2ebc:	0be3      	bt      	0x2e82	// 2e82 <BT1IntHandler+0x12>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    2ebe:	934c      	ld.w      	r2, (r3, 0x30)
+    2ec0:	3108      	movi      	r1, 8
+    2ec2:	6884      	and      	r2, r1
+    2ec4:	3a40      	cmpnei      	r2, 0
+    2ec6:	0bde      	bt      	0x2e82	// 2e82 <BT1IntHandler+0x12>
+    2ec8:	07f4      	br      	0x2eb0	// 2eb0 <BT1IntHandler+0x40>
+    2eca:	0000      	bkpt
+    2ecc:	20000008 	.long	0x20000008
+    2ed0:	200000ac 	.long	0x200000ac
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00002ed4 <PriviledgeVioHandler>:
+    2ed4:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00002ed6 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    2ed6:	1460      	nie
+    2ed8:	1462      	ipush
+    // ISR content ...
+
+}
+    2eda:	1463      	ipop
+    2edc:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+00002ede <Trap3Handler>:
+    2ede:	1460      	nie
+    2ee0:	1462      	ipush
+    2ee2:	1463      	ipop
+    2ee4:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+00002ee6 <Trap2Handler>:
+    2ee6:	1460      	nie
+    2ee8:	1462      	ipush
+    2eea:	1463      	ipop
+    2eec:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+00002eee <Trap1Handler>:
+    2eee:	1460      	nie
+    2ef0:	1462      	ipush
+    2ef2:	1463      	ipop
+    2ef4:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+00002ef6 <Trap0Handler>:
+    2ef6:	1460      	nie
+    2ef8:	1462      	ipush
+    2efa:	1463      	ipop
+    2efc:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+00002efe <UnrecExecpHandler>:
+    2efe:	1460      	nie
+    2f00:	1462      	ipush
+    2f02:	1463      	ipop
+    2f04:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+00002f06 <BreakPointHandler>:
+    2f06:	1460      	nie
+    2f08:	1462      	ipush
+    2f0a:	1463      	ipop
+    2f0c:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+00002f0e <AccessErrHandler>:
+    2f0e:	1460      	nie
+    2f10:	1462      	ipush
+    2f12:	1463      	ipop
+    2f14:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+00002f16 <IllegalInstrHandler>:
+    2f16:	1460      	nie
+    2f18:	1462      	ipush
+    2f1a:	1463      	ipop
+    2f1c:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+00002f1e <MisalignedHandler>:
+    2f1e:	1460      	nie
+    2f20:	1462      	ipush
+    2f22:	1463      	ipop
+    2f24:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+00002f26 <CNTAIntHandler>:
+    2f26:	1460      	nie
+    2f28:	1462      	ipush
+    2f2a:	1463      	ipop
+    2f2c:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+00002f2e <I2CIntHandler>:
+    2f2e:	1460      	nie
+    2f30:	1462      	ipush
+    2f32:	1463      	ipop
+    2f34:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+00002f38 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    2f38:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    2f3a:	c0006023 	mfcr      	r3, cr<0, 0>
+    2f3e:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    2f42:	1046      	lrw      	r2, 0x20000000	// 2f58 <__divsi3+0x20>
+    2f44:	3400      	movi      	r4, 0
+    2f46:	9240      	ld.w      	r2, (r2, 0x0)
+    2f48:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    2f4a:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    2f4c:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    2f4e:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    2f50:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    2f54:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    2f56:	1481      	pop      	r4
+    2f58:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+00002f5c <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    2f5c:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    2f5e:	c0006023 	mfcr      	r3, cr<0, 0>
+    2f62:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    2f66:	1046      	lrw      	r2, 0x20000000	// 2f7c <__udivsi3+0x20>
+    2f68:	3401      	movi      	r4, 1
+    2f6a:	9240      	ld.w      	r2, (r2, 0x0)
+    2f6c:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    2f6e:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    2f70:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    2f72:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    2f74:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    2f78:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    2f7a:	1481      	pop      	r4
+    2f7c:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00002f80 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    2f80:	c1807420 	psrset      	ee, ie
+}
+    2f84:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+00002f88 <UARTx_Init>:
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//目前该项目只使用串口1 进行双向通讯
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    2f88:	14d1      	push      	r4, r15
+	switch(uart_id){
+    2f8a:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    2f8c:	6d07      	mov      	r4, r1
+	switch(uart_id){
+    2f8e:	0c1a      	bf      	0x2fc2	// 2fc2 <UARTx_Init+0x3a>
+    2f90:	3840      	cmpnei      	r0, 0
+    2f92:	0c04      	bf      	0x2f9a	// 2f9a <UARTx_Init+0x12>
+    2f94:	3842      	cmpnei      	r0, 2
+    2f96:	0c2a      	bf      	0x2fea	// 2fea <UARTx_Init+0x62>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+			GPIO_Write_Low(GPIOB0,3);
+			
+			break;
+	}
+}
+    2f98:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    2f9a:	e3fff8f9 	bsr      	0x218c	// 218c <UART0_DeInit>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    2f9e:	118a      	lrw      	r4, 0x20000040	// 3044 <UARTx_Init+0xbc>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    2fa0:	3100      	movi      	r1, 0
+    2fa2:	3000      	movi      	r0, 0
+    2fa4:	e3fff934 	bsr      	0x220c	// 220c <UART_IO_Init>
+			UARTInit(UART0,10000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+    2fa8:	9400      	ld.w      	r0, (r4, 0x0)
+    2faa:	3200      	movi      	r2, 0
+    2fac:	1127      	lrw      	r1, 0x2710	// 3048 <UARTx_Init+0xc0>
+    2fae:	e3fff9a5 	bsr      	0x22f8	// 22f8 <UARTInit>
+			UARTInitRxTxIntEn(UART0,10000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    2fb2:	9400      	ld.w      	r0, (r4, 0x0)
+    2fb4:	3200      	movi      	r2, 0
+    2fb6:	1125      	lrw      	r1, 0x2710	// 3048 <UARTx_Init+0xc0>
+    2fb8:	e3fff9a8 	bsr      	0x2308	// 2308 <UARTInitRxTxIntEn>
+			UART0_Int_Enable();
+    2fbc:	e3fff90c 	bsr      	0x21d4	// 21d4 <UART0_Int_Enable>
+			break;
+    2fc0:	07ec      	br      	0x2f98	// 2f98 <UARTx_Init+0x10>
+			UART1_DeInit();                                                 //clear all UART Register
+    2fc2:	e3fff8f1 	bsr      	0x21a4	// 21a4 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    2fc6:	3102      	movi      	r1, 2
+    2fc8:	3001      	movi      	r0, 1
+    2fca:	e3fff921 	bsr      	0x220c	// 220c <UART_IO_Init>
+			UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+    2fce:	1180      	lrw      	r4, 0x2000003c	// 304c <UARTx_Init+0xc4>
+    2fd0:	31d0      	movi      	r1, 208
+    2fd2:	9400      	ld.w      	r0, (r4, 0x0)
+    2fd4:	3200      	movi      	r2, 0
+    2fd6:	4121      	lsli      	r1, r1, 1
+    2fd8:	e3fff990 	bsr      	0x22f8	// 22f8 <UARTInit>
+			UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    2fdc:	31d0      	movi      	r1, 208
+    2fde:	9400      	ld.w      	r0, (r4, 0x0)
+    2fe0:	3200      	movi      	r2, 0
+    2fe2:	4121      	lsli      	r1, r1, 1
+    2fe4:	e3fff992 	bsr      	0x2308	// 2308 <UARTInitRxTxIntEn>
+			break;
+    2fe8:	07d8      	br      	0x2f98	// 2f98 <UARTx_Init+0x10>
+			UART2_DeInit();                                                 //clear all UART Register
+    2fea:	e3fff8e9 	bsr      	0x21bc	// 21bc <UART2_DeInit>
+			UART_IO_Init(IO_UART2,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    2fee:	3102      	movi      	r1, 2
+    2ff0:	3002      	movi      	r0, 2
+    2ff2:	e3fff90d 	bsr      	0x220c	// 220c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    2ff6:	1077      	lrw      	r3, 0x20000038	// 3050 <UARTx_Init+0xc8>
+    2ff8:	31d0      	movi      	r1, 208
+    2ffa:	9300      	ld.w      	r0, (r3, 0x0)
+    2ffc:	3200      	movi      	r2, 0
+    2ffe:	4121      	lsli      	r1, r1, 1
+    3000:	e3fff984 	bsr      	0x2308	// 2308 <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    3004:	e3fff8f6 	bsr      	0x21f0	// 21f0 <UART2_Int_Enable>
+			memset(&g_uart,0,sizeof(UART_t));
+    3008:	3273      	movi      	r2, 115
+    300a:	3100      	movi      	r1, 0
+    300c:	1012      	lrw      	r0, 0x200001a4	// 3054 <UARTx_Init+0xcc>
+    300e:	e3fff4ab 	bsr      	0x1964	// 1964 <__memset_fast>
+			g_uart.RecvTimeout = Recv_115200_TimeOut;
+    3012:	1072      	lrw      	r3, 0x2000020b	// 3058 <UARTx_Init+0xd0>
+    3014:	3203      	movi      	r2, 3
+    3016:	a340      	st.b      	r2, (r3, 0x0)
+			g_uart.processing_cf = prt_cf;
+    3018:	4c48      	lsri      	r2, r4, 8
+    301a:	a388      	st.b      	r4, (r3, 0x8)
+    301c:	a349      	st.b      	r2, (r3, 0x9)
+    301e:	4c50      	lsri      	r2, r4, 16
+    3020:	4c98      	lsri      	r4, r4, 24
+    3022:	a38b      	st.b      	r4, (r3, 0xb)
+    3024:	a34a      	st.b      	r2, (r3, 0xa)
+			GPIO_Init(GPIOB0,3,Output);
+    3026:	3103      	movi      	r1, 3
+    3028:	108d      	lrw      	r4, 0x20000048	// 305c <UARTx_Init+0xd4>
+    302a:	3200      	movi      	r2, 0
+    302c:	9400      	ld.w      	r0, (r4, 0x0)
+    302e:	e3fff6ad 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOB0,3);
+    3032:	9400      	ld.w      	r0, (r4, 0x0)
+    3034:	3103      	movi      	r1, 3
+    3036:	e3fff723 	bsr      	0x1e7c	// 1e7c <GPIO_DriveStrength_EN>
+			GPIO_Write_Low(GPIOB0,3);
+    303a:	9400      	ld.w      	r0, (r4, 0x0)
+    303c:	3103      	movi      	r1, 3
+    303e:	e3fff72a 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+}
+    3042:	07ab      	br      	0x2f98	// 2f98 <UARTx_Init+0x10>
+    3044:	20000040 	.long	0x20000040
+    3048:	00002710 	.long	0x00002710
+    304c:	2000003c 	.long	0x2000003c
+    3050:	20000038 	.long	0x20000038
+    3054:	200001a4 	.long	0x200001a4
+    3058:	2000020b 	.long	0x2000020b
+    305c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UART2_RecvINT_Processing:
+
+00003060 <UART2_RecvINT_Processing>:
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+    3060:	14c2      	push      	r4-r5
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+    3062:	1075      	lrw      	r3, 0x20000204	// 30b4 <UART2_RecvINT_Processing+0x54>
+    3064:	8346      	ld.b      	r2, (r3, 0x6)
+    3066:	8325      	ld.b      	r1, (r3, 0x5)
+    3068:	4248      	lsli      	r2, r2, 8
+    306a:	6c84      	or      	r2, r1
+    306c:	3162      	movi      	r1, 98
+    306e:	10b3      	lrw      	r5, 0x200001a4	// 30b8 <UART2_RecvINT_Processing+0x58>
+    3070:	3440      	movi      	r4, 64
+    3072:	6485      	cmplt      	r1, r2
+    3074:	6114      	addu      	r4, r5
+    3076:	0c06      	bf      	0x3082	// 3082 <UART2_RecvINT_Processing+0x22>
+    3078:	3225      	movi      	r2, 37
+    307a:	6090      	addu      	r2, r4
+    307c:	3100      	movi      	r1, 0
+    307e:	a220      	st.b      	r1, (r2, 0x0)
+    3080:	a221      	st.b      	r1, (r2, 0x1)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    3082:	8346      	ld.b      	r2, (r3, 0x6)
+    3084:	8325      	ld.b      	r1, (r3, 0x5)
+    3086:	4248      	lsli      	r2, r2, 8
+    3088:	6c84      	or      	r2, r1
+    308a:	5a22      	addi      	r1, r2, 1
+    308c:	6094      	addu      	r2, r5
+    308e:	a200      	st.b      	r0, (r2, 0x0)
+    3090:	2424      	addi      	r4, 37
+    3092:	7445      	zexth      	r1, r1
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    3094:	104a      	lrw      	r2, 0x200000b4	// 30bc <UART2_RecvINT_Processing+0x5c>
+    3096:	9240      	ld.w      	r2, (r2, 0x0)
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    3098:	a420      	st.b      	r1, (r4, 0x0)
+    309a:	4928      	lsri      	r1, r1, 8
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    309c:	4a08      	lsri      	r0, r2, 8
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+    309e:	a421      	st.b      	r1, (r4, 0x1)
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    30a0:	1028      	lrw      	r1, 0x2000020f	// 30c0 <UART2_RecvINT_Processing+0x60>
+    30a2:	a140      	st.b      	r2, (r1, 0x0)
+    30a4:	a101      	st.b      	r0, (r1, 0x1)
+    30a6:	4a10      	lsri      	r0, r2, 16
+    30a8:	4a58      	lsri      	r2, r2, 24
+    30aa:	a143      	st.b      	r2, (r1, 0x3)
+	g_uart.Receiving = 0x01;
+    30ac:	3201      	movi      	r2, 1
+	g_uart.RecvIdleTiming = SysTick_1ms;
+    30ae:	a102      	st.b      	r0, (r1, 0x2)
+	g_uart.Receiving = 0x01;
+    30b0:	a344      	st.b      	r2, (r3, 0x4)
+}
+    30b2:	1482      	pop      	r4-r5
+    30b4:	20000204 	.long	0x20000204
+    30b8:	200001a4 	.long	0x200001a4
+    30bc:	200000b4 	.long	0x200000b4
+    30c0:	2000020f 	.long	0x2000020f
+
+Disassembly of section .text.UART2_TASK:
+
+000030c4 <UART2_TASK>:
+
+
+void UART2_TASK(void){
+    30c4:	14d1      	push      	r4, r15
+	U8_T rev = 0xFF;
+	if(g_uart.Receiving == 0x01){
+    30c6:	1181      	lrw      	r4, 0x20000204	// 3148 <UART2_TASK+0x84>
+    30c8:	8464      	ld.b      	r3, (r4, 0x4)
+    30ca:	3b41      	cmpnei      	r3, 1
+    30cc:	083c      	bt      	0x3144	// 3144 <UART2_TASK+0x80>
+		if(SysTick_1ms - g_uart.RecvIdleTiming > g_uart.RecvTimeout){
+    30ce:	844c      	ld.b      	r2, (r4, 0xc)
+    30d0:	846b      	ld.b      	r3, (r4, 0xb)
+    30d2:	4248      	lsli      	r2, r2, 8
+    30d4:	6c8c      	or      	r2, r3
+    30d6:	846d      	ld.b      	r3, (r4, 0xd)
+    30d8:	4370      	lsli      	r3, r3, 16
+    30da:	6c8c      	or      	r2, r3
+    30dc:	846e      	ld.b      	r3, (r4, 0xe)
+    30de:	101c      	lrw      	r0, 0x200000b4	// 314c <UART2_TASK+0x88>
+    30e0:	4378      	lsli      	r3, r3, 24
+    30e2:	6cc8      	or      	r3, r2
+    30e4:	9020      	ld.w      	r1, (r0, 0x0)
+    30e6:	8448      	ld.b      	r2, (r4, 0x8)
+    30e8:	604e      	subu      	r1, r3
+    30ea:	4248      	lsli      	r2, r2, 8
+    30ec:	8467      	ld.b      	r3, (r4, 0x7)
+    30ee:	6c8c      	or      	r2, r3
+    30f0:	8469      	ld.b      	r3, (r4, 0x9)
+    30f2:	4370      	lsli      	r3, r3, 16
+    30f4:	6c8c      	or      	r2, r3
+    30f6:	846a      	ld.b      	r3, (r4, 0xa)
+    30f8:	4378      	lsli      	r3, r3, 24
+    30fa:	6cc8      	or      	r3, r2
+    30fc:	644c      	cmphs      	r3, r1
+    30fe:	0823      	bt      	0x3144	// 3144 <UART2_TASK+0x80>
+			g_uart.RecvIdleTiming = SysTick_1ms;
+    3100:	9060      	ld.w      	r3, (r0, 0x0)
+    3102:	320b      	movi      	r2, 11
+    3104:	6090      	addu      	r2, r4
+    3106:	4b28      	lsri      	r1, r3, 8
+    3108:	a260      	st.b      	r3, (r2, 0x0)
+    310a:	a221      	st.b      	r1, (r2, 0x1)
+    310c:	4b30      	lsri      	r1, r3, 16
+    310e:	4b78      	lsri      	r3, r3, 24
+    3110:	a222      	st.b      	r1, (r2, 0x2)
+    3112:	a263      	st.b      	r3, (r2, 0x3)
+#if DBG_LOG_EN
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART recv Len %d", g_uart.RecvLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART buff",g_uart.RecvBuffer,g_uart.RecvLen);
+#endif
+			
+			if(g_uart.processing_cf != NULL){
+    3114:	8450      	ld.b      	r2, (r4, 0x10)
+    3116:	846f      	ld.b      	r3, (r4, 0xf)
+    3118:	4248      	lsli      	r2, r2, 8
+    311a:	6c8c      	or      	r2, r3
+    311c:	8471      	ld.b      	r3, (r4, 0x11)
+    311e:	4370      	lsli      	r3, r3, 16
+    3120:	6c8c      	or      	r2, r3
+    3122:	8472      	ld.b      	r3, (r4, 0x12)
+    3124:	4378      	lsli      	r3, r3, 24
+    3126:	6cc8      	or      	r3, r2
+    3128:	3b40      	cmpnei      	r3, 0
+    312a:	0c07      	bf      	0x3138	// 3138 <UART2_TASK+0x74>
+                rev = g_uart.processing_cf(g_uart.RecvBuffer,g_uart.RecvLen);
+    312c:	8426      	ld.b      	r1, (r4, 0x6)
+    312e:	8445      	ld.b      	r2, (r4, 0x5)
+    3130:	4128      	lsli      	r1, r1, 8
+    3132:	6c48      	or      	r1, r2
+    3134:	1007      	lrw      	r0, 0x200001a4	// 3150 <UART2_TASK+0x8c>
+    3136:	7bcd      	jsr      	r3
+            }
+
+            g_uart.RecvLen = 0;
+    3138:	1067      	lrw      	r3, 0x20000209	// 3154 <UART2_TASK+0x90>
+    313a:	3200      	movi      	r2, 0
+    313c:	a340      	st.b      	r2, (r3, 0x0)
+    313e:	a341      	st.b      	r2, (r3, 0x1)
+            g_uart.Receiving = 0;
+    3140:	3300      	movi      	r3, 0
+    3142:	a464      	st.b      	r3, (r4, 0x4)
+		}
+	}
+}
+    3144:	1491      	pop      	r4, r15
+    3146:	0000      	bkpt
+    3148:	20000204 	.long	0x20000204
+    314c:	200000b4 	.long	0x200000b4
+    3150:	200001a4 	.long	0x200001a4
+    3154:	20000209 	.long	0x20000209
+
+Disassembly of section .text.Dbg_Println:
+
+00003158 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    3158:	1423      	subi      	r14, r14, 12
+    315a:	b862      	st.w      	r3, (r14, 0x8)
+    315c:	b841      	st.w      	r2, (r14, 0x4)
+    315e:	b820      	st.w      	r1, (r14, 0x0)
+		
+		
+    }
+
+#endif	
+}
+    3160:	1403      	addi      	r14, r14, 12
+    3162:	783c      	jmp      	r15
+
+Disassembly of section .text.RC522_Delay:
+
+00003164 <RC522_Delay>:
+ * @brief   延时函数，纳秒级
+ * @param   ns 延时时间
+ */
+void RC522_Delay(U32_T ns){
+    U32_T i;
+    for (i = 0; i < ns; i++) {
+    3164:	3300      	movi      	r3, 0
+    3166:	640e      	cmpne      	r3, r0
+    3168:	0802      	bt      	0x316c	// 316c <RC522_Delay+0x8>
+        nop;
+        //延时一个机器周期
+        nop;
+        nop;
+    }
+}
+    316a:	783c      	jmp      	r15
+        nop;
+    316c:	6c03      	mov      	r0, r0
+        nop;
+    316e:	6c03      	mov      	r0, r0
+        nop;
+    3170:	6c03      	mov      	r0, r0
+    for (i = 0; i < ns; i++) {
+    3172:	2300      	addi      	r3, 1
+    3174:	07f9      	br      	0x3166	// 3166 <RC522_Delay+0x2>
+
+Disassembly of section .text.RC522_ReadWriteOneByte:
+
+00003178 <RC522_ReadWriteOneByte>:
+ * @brief   移植接口——SPI读写一个字节
+ * @param   tx_data：要写入的数据
+ * @return  读取的数据
+ */
+U8_T RC522_ReadWriteOneByte(U8_T tx_data)
+{
+    3178:	14d4      	push      	r4-r7, r15
+    317a:	6d83      	mov      	r6, r0
+    317c:	3508      	movi      	r5, 8
+//	delay_nus(1);
+//	rx_data = SPI0->DR;
+//	
+//	return (U8_T)(rx_data & 0xFF);
+
+	U8_T rx_data=0;
+    317e:	3400      	movi      	r4, 0
+    U8_T i;
+    for(i=0;i<8;i++)
+    {
+        RC522_SCK_LOW;
+    3180:	10f2      	lrw      	r7, 0x2000004c	// 31c8 <RC522_ReadWriteOneByte+0x50>
+    3182:	3109      	movi      	r1, 9
+    3184:	9700      	ld.w      	r0, (r7, 0x0)
+    3186:	e3fff686 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+        if(tx_data&0x80) RC522_MOSI_HIGH;
+    318a:	74da      	sextb      	r3, r6
+    318c:	3bdf      	btsti      	r3, 31
+    318e:	310a      	movi      	r1, 10
+    3190:	9700      	ld.w      	r0, (r7, 0x0)
+    3192:	0c18      	bf      	0x31c2	// 31c2 <RC522_ReadWriteOneByte+0x4a>
+    3194:	e3fff67b 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        else RC522_MOSI_LOW;
+        tx_data<<=1;
+        RC522_SCK_HIGH;
+    3198:	3109      	movi      	r1, 9
+    319a:	9700      	ld.w      	r0, (r7, 0x0)
+    319c:	e3fff677 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+        rx_data<<=1;
+        if(RC522_MISO_Read) rx_data|=0x01;
+    31a0:	310b      	movi      	r1, 11
+    31a2:	9700      	ld.w      	r0, (r7, 0x0)
+    31a4:	e3fff686 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+        tx_data<<=1;
+    31a8:	46c1      	lsli      	r6, r6, 1
+        rx_data<<=1;
+    31aa:	4481      	lsli      	r4, r4, 1
+        if(RC522_MISO_Read) rx_data|=0x01;
+    31ac:	3840      	cmpnei      	r0, 0
+        tx_data<<=1;
+    31ae:	7598      	zextb      	r6, r6
+        rx_data<<=1;
+    31b0:	7510      	zextb      	r4, r4
+        if(RC522_MISO_Read) rx_data|=0x01;
+    31b2:	0c02      	bf      	0x31b6	// 31b6 <RC522_ReadWriteOneByte+0x3e>
+    31b4:	3ca0      	bseti      	r4, 0
+    31b6:	2d00      	subi      	r5, 1
+    31b8:	7554      	zextb      	r5, r5
+    for(i=0;i<8;i++)
+    31ba:	3d40      	cmpnei      	r5, 0
+    31bc:	0be3      	bt      	0x3182	// 3182 <RC522_ReadWriteOneByte+0xa>
+    }
+    return rx_data;
+}
+    31be:	6c13      	mov      	r0, r4
+    31c0:	1494      	pop      	r4-r7, r15
+        else RC522_MOSI_LOW;
+    31c2:	e3fff668 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    31c6:	07e9      	br      	0x3198	// 3198 <RC522_ReadWriteOneByte+0x20>
+    31c8:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_ReadRawRC:
+
+000031cc <RC522_ReadRawRC>:
+{
+    31cc:	14d2      	push      	r4-r5, r15
+    RC522_CS_LOW;                     //片选选中RC522
+    31ce:	10ad      	lrw      	r5, 0x2000004c	// 3200 <RC522_ReadRawRC+0x34>
+    31d0:	310d      	movi      	r1, 13
+{
+    31d2:	6d03      	mov      	r4, r0
+    RC522_CS_LOW;                     //片选选中RC522
+    31d4:	9500      	ld.w      	r0, (r5, 0x0)
+    31d6:	e3fff65e 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E)|0x80;
+    31da:	4401      	lsli      	r0, r4, 1
+    31dc:	347e      	movi      	r4, 126
+    31de:	6810      	and      	r0, r4
+    31e0:	3400      	movi      	r4, 0
+    31e2:	2c7f      	subi      	r4, 128
+    31e4:	6c10      	or      	r0, r4
+    RC522_ReadWriteOneByte(ucAddr);       //发送命令
+    31e6:	7400      	zextb      	r0, r0
+    31e8:	e3ffffc8 	bsr      	0x3178	// 3178 <RC522_ReadWriteOneByte>
+    ucResult=RC522_ReadWriteOneByte(0); //读取RC522返回的数据
+    31ec:	3000      	movi      	r0, 0
+    31ee:	e3ffffc5 	bsr      	0x3178	// 3178 <RC522_ReadWriteOneByte>
+    31f2:	6d03      	mov      	r4, r0
+    RC522_CS_HIGH;                        //释放片选线(PF0)
+    31f4:	310d      	movi      	r1, 13
+    31f6:	9500      	ld.w      	r0, (r5, 0x0)
+    31f8:	e3fff649 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+}
+    31fc:	6c13      	mov      	r0, r4
+    31fe:	1492      	pop      	r4-r5, r15
+    3200:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_WriteRawRC:
+
+00003204 <RC522_WriteRawRC>:
+{
+    3204:	14d3      	push      	r4-r6, r15
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    3206:	10ab      	lrw      	r5, 0x2000004c	// 3230 <RC522_WriteRawRC+0x2c>
+{
+    3208:	6d87      	mov      	r6, r1
+    320a:	6d03      	mov      	r4, r0
+    RC522_CS_LOW; //PF0写 0 (SDA)(SPI1片选线，低电平有效)
+    320c:	310d      	movi      	r1, 13
+    320e:	9500      	ld.w      	r0, (r5, 0x0)
+    3210:	e3fff641 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+    ucAddr=((Address<<1)&0x7E);
+    3214:	4481      	lsli      	r4, r4, 1
+    3216:	307e      	movi      	r0, 126
+    RC522_ReadWriteOneByte(ucAddr); //SPI1发送一个字节
+    3218:	6810      	and      	r0, r4
+    321a:	e3ffffaf 	bsr      	0x3178	// 3178 <RC522_ReadWriteOneByte>
+    RC522_ReadWriteOneByte(value);  //SPI1发送一个字节
+    321e:	6c1b      	mov      	r0, r6
+    3220:	e3ffffac 	bsr      	0x3178	// 3178 <RC522_ReadWriteOneByte>
+    RC522_CS_HIGH;                                           //PF1写1(SDA)(SPI1片选线)
+    3224:	9500      	ld.w      	r0, (r5, 0x0)
+    3226:	310d      	movi      	r1, 13
+    3228:	e3fff631 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+}
+    322c:	1493      	pop      	r4-r6, r15
+    322e:	0000      	bkpt
+    3230:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.RC522_PcdReset:
+
+00003234 <RC522_PcdReset>:
+{
+    3234:	14d0      	push      	r15
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    3236:	310f      	movi      	r1, 15
+    3238:	3001      	movi      	r0, 1
+    323a:	e3ffffe5 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_WriteRawRC(CommandReg,PCD_RESETPHASE);  //写RC632寄存器，复位
+    323e:	310f      	movi      	r1, 15
+    3240:	3001      	movi      	r0, 1
+    3242:	e3ffffe1 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_Delay(10);
+    3246:	300a      	movi      	r0, 10
+    3248:	e3ffff8e 	bsr      	0x3164	// 3164 <RC522_Delay>
+    RC522_WriteRawRC(ModeReg,0x3D);             //和Mifare卡通讯，CRC初始值0x6363
+    324c:	313d      	movi      	r1, 61
+    324e:	3011      	movi      	r0, 17
+    3250:	e3ffffda 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegL,30);           //写RC632寄存器
+    3254:	311e      	movi      	r1, 30
+    3256:	302d      	movi      	r0, 45
+    3258:	e3ffffd6 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TReloadRegH,0);
+    325c:	3100      	movi      	r1, 0
+    325e:	302c      	movi      	r0, 44
+    3260:	e3ffffd2 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TModeReg,0x8D);
+    3264:	318d      	movi      	r1, 141
+    3266:	302a      	movi      	r0, 42
+    3268:	e3ffffce 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TPrescalerReg,0x3E);
+    326c:	313e      	movi      	r1, 62
+    326e:	302b      	movi      	r0, 43
+    3270:	e3ffffca 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_WriteRawRC(TxAutoReg,0x40);//必须要
+    3274:	3140      	movi      	r1, 64
+    3276:	3015      	movi      	r0, 21
+    3278:	e3ffffc6 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+}
+    327c:	3000      	movi      	r0, 0
+    327e:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_SetBitMask:
+
+00003280 <RC522_SetBitMask>:
+{
+    3280:	14d2      	push      	r4-r5, r15
+    3282:	6d47      	mov      	r5, r1
+    3284:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);                   //读RC632寄存器
+    3286:	e3ffffa3 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp|mask);   //写RC632寄存器
+    328a:	6c43      	mov      	r1, r0
+    328c:	6c54      	or      	r1, r5
+    328e:	7444      	zextb      	r1, r1
+    3290:	6c13      	mov      	r0, r4
+    3292:	e3ffffb9 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+}
+    3296:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOn:
+
+00003298 <RC522_PcdAntennaOn>:
+{
+    3298:	14d0      	push      	r15
+    i=RC522_ReadRawRC(TxControlReg);
+    329a:	3014      	movi      	r0, 20
+    329c:	e3ffff98 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    if(!(i&0x03))
+    32a0:	3303      	movi      	r3, 3
+    32a2:	680c      	and      	r0, r3
+    32a4:	3840      	cmpnei      	r0, 0
+    32a6:	0805      	bt      	0x32b0	// 32b0 <RC522_PcdAntennaOn+0x18>
+        RC522_SetBitMask(TxControlReg,0x03);
+    32a8:	3103      	movi      	r1, 3
+    32aa:	3014      	movi      	r0, 20
+    32ac:	e3ffffea 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+}
+    32b0:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_ClearBitMask:
+
+000032b2 <RC522_ClearBitMask>:
+{
+    32b2:	14d2      	push      	r4-r5, r15
+    32b4:	6d47      	mov      	r5, r1
+    32b6:	6d03      	mov      	r4, r0
+    tmp=RC522_ReadRawRC(reg);        //读RC632寄存器
+    32b8:	e3ffff8a 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    RC522_WriteRawRC(reg,tmp&~mask); // clear bit mask
+    32bc:	6815      	andn      	r0, r5
+    32be:	7440      	zextb      	r1, r0
+    32c0:	6c13      	mov      	r0, r4
+    32c2:	e3ffffa1 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+}
+    32c6:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.RC522_PcdAntennaOff:
+
+000032c8 <RC522_PcdAntennaOff>:
+{
+    32c8:	14d0      	push      	r15
+    RC522_ClearBitMask(TxControlReg,0x03); //清RC522寄存器位
+    32ca:	3103      	movi      	r1, 3
+    32cc:	3014      	movi      	r0, 20
+    32ce:	e3fffff2 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+}
+    32d2:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Reset:
+
+000032d4 <RC522_Reset>:
+void RC522_Reset(void){
+    32d4:	14d1      	push      	r4, r15
+	RC522_RST_HIGH;			//NRSTPD引脚高电平
+    32d6:	1090      	lrw      	r4, 0x2000004c	// 3314 <RC522_Reset+0x40>
+    32d8:	310c      	movi      	r1, 12
+    32da:	9400      	ld.w      	r0, (r4, 0x0)
+    32dc:	e3fff5d7 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	RC522_Delay(1000);		//大概时间为850us
+    32e0:	30fa      	movi      	r0, 250
+    32e2:	4002      	lsli      	r0, r0, 2
+    32e4:	e3ffff40 	bsr      	0x3164	// 3164 <RC522_Delay>
+	RC522_RST_LOW;			//Ci522掉电
+    32e8:	310c      	movi      	r1, 12
+    32ea:	9400      	ld.w      	r0, (r4, 0x0)
+    32ec:	e3fff5d3 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	RC522_Delay(1000);		//大概时间为850us
+    32f0:	30fa      	movi      	r0, 250
+    32f2:	4002      	lsli      	r0, r0, 2
+    32f4:	e3ffff38 	bsr      	0x3164	// 3164 <RC522_Delay>
+	RC522_RST_HIGH;			//NRSTPD引脚高电平
+    32f8:	310c      	movi      	r1, 12
+    32fa:	9400      	ld.w      	r0, (r4, 0x0)
+    32fc:	e3fff5c7 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	RC522_PcdReset();                //复位RC522
+    3300:	e3ffff9a 	bsr      	0x3234	// 3234 <RC522_PcdReset>
+	RC522_PcdAntennaOff();    //关闭天线
+    3304:	e3ffffe2 	bsr      	0x32c8	// 32c8 <RC522_PcdAntennaOff>
+	RC522_Delay(2);         //延时2毫秒
+    3308:	3002      	movi      	r0, 2
+    330a:	e3ffff2d 	bsr      	0x3164	// 3164 <RC522_Delay>
+	RC522_PcdAntennaOn();     //开启天线  
+    330e:	e3ffffc5 	bsr      	0x3298	// 3298 <RC522_PcdAntennaOn>
+}
+    3312:	1491      	pop      	r4, r15
+    3314:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.M500PcdConfigISOType.part.1:
+
+00003318 <M500PcdConfigISOType.part.1>:
+char M500PcdConfigISOType(U8_T type)
+    3318:	14d0      	push      	r15
+		RC522_ClearBitMask(Status2Reg,0x08);     //清RC522寄存器位
+    331a:	3108      	movi      	r1, 8
+    331c:	3008      	movi      	r0, 8
+    331e:	e3ffffca 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+		RC522_SetBitMask(ComIEnReg,BIT7);
+    3322:	3180      	movi      	r1, 128
+    3324:	3002      	movi      	r0, 2
+    3326:	e3ffffad 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+		RC522_WriteRawRC(ModeReg,0x3D);
+    332a:	313d      	movi      	r1, 61
+    332c:	3011      	movi      	r0, 17
+    332e:	e3ffff6b 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxModeReg,0x00);     //设定数据发送传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    3332:	3100      	movi      	r1, 0
+    3334:	3012      	movi      	r0, 18
+    3336:	e3ffff67 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxModeReg,0x00);     //设定数据接收传输速率106kbits/s，定义帧格式为ISO/IEC 14443 A/Mifare
+    333a:	3100      	movi      	r1, 0
+    333c:	3013      	movi      	r0, 19
+    333e:	e3ffff63 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModWidthReg,MODWIDTH);    //调制宽度为reset值
+    3342:	3126      	movi      	r1, 38
+    3344:	3024      	movi      	r0, 36
+    3346:	e3ffff5f 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ModeReg,0x3D);      //3D--CRC预设值为6363
+    334a:	313d      	movi      	r1, 61
+    334c:	3011      	movi      	r0, 17
+    334e:	e3ffff5b 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RxThresholdReg,(MINLEVEL_A<<4) | COLLLEVEL_A);  //选择位译码器的阈值
+    3352:	3164      	movi      	r1, 100
+    3354:	3018      	movi      	r0, 24
+    3356:	e3ffff57 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(RFCfgReg,0x7F);   // 接收增益
+    335a:	317f      	movi      	r1, 127
+    335c:	3026      	movi      	r0, 38
+    335e:	e3ffff53 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TxAutoReg,0x40);  //100%ASK传送
+    3362:	3140      	movi      	r1, 64
+    3364:	3015      	movi      	r0, 21
+    3366:	e3ffff4f 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(ControlReg,0x10);  //接收的最后一个字节所有比特有效
+    336a:	3110      	movi      	r1, 16
+    336c:	300c      	movi      	r0, 12
+    336e:	e3ffff4b 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegL,0x64);    //16bit定时器重载值（低位）
+    3372:	3164      	movi      	r1, 100
+    3374:	302d      	movi      	r0, 45
+    3376:	e3ffff47 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TReloadRegH,0);     //16bit定时器重载值（高位）
+    337a:	3100      	movi      	r1, 0
+    337c:	302c      	movi      	r0, 44
+    337e:	e3ffff43 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TModeReg,0x8D);     //预分频器开启自动定时器，向下计数，预分频与TPrescalerReg一起决定12bit
+    3382:	318d      	movi      	r1, 141
+    3384:	302a      	movi      	r0, 42
+    3386:	e3ffff3f 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+		RC522_WriteRawRC(TPrescalerReg,0x3e);  //12bit  1101 0011 1110    定时器频率2KHz*//*
+    338a:	313e      	movi      	r1, 62
+    338c:	302b      	movi      	r0, 43
+    338e:	e3ffff3b 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+}
+    3392:	3000      	movi      	r0, 0
+    3394:	1490      	pop      	r15
+
+Disassembly of section .text.RC522_Init:
+
+00003398 <RC522_Init>:
+{
+    3398:	14d1      	push      	r4, r15
+	nop;
+    339a:	6c03      	mov      	r0, r0
+	GPIO_Init(GPIOA0,9,Output);			//SCK
+    339c:	118d      	lrw      	r4, 0x2000004c	// 3450 <RC522_Init+0xb8>
+    339e:	3200      	movi      	r2, 0
+    33a0:	9400      	ld.w      	r0, (r4, 0x0)
+    33a2:	3109      	movi      	r1, 9
+    33a4:	e3fff4f2 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOA0,10,Output);		//MOSI
+    33a8:	3200      	movi      	r2, 0
+    33aa:	9400      	ld.w      	r0, (r4, 0x0)
+    33ac:	310a      	movi      	r1, 10
+    33ae:	e3fff4ed 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,11);
+    33b2:	9400      	ld.w      	r0, (r4, 0x0)
+    33b4:	310b      	movi      	r1, 11
+    33b6:	e3fff559 	bsr      	0x1e68	// 1e68 <GPIO_PullHigh_Init>
+	GPIO_Init(GPIOA0,11,Intput);		//MISO
+    33ba:	9400      	ld.w      	r0, (r4, 0x0)
+    33bc:	3201      	movi      	r2, 1
+    33be:	310b      	movi      	r1, 11
+    33c0:	e3fff4e4 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOA0,13,Output);			//CS
+    33c4:	9400      	ld.w      	r0, (r4, 0x0)
+    33c6:	3200      	movi      	r2, 0
+    33c8:	310d      	movi      	r1, 13
+    33ca:	e3fff4df 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+    GPIO_Init(GPIOA0,12,Output);			//RST
+    33ce:	9400      	ld.w      	r0, (r4, 0x0)
+    33d0:	3200      	movi      	r2, 0
+    33d2:	310c      	movi      	r1, 12
+    33d4:	e3fff4da 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOA0,8,Intput);			//IRQ
+    33d8:	3201      	movi      	r2, 1
+    33da:	9400      	ld.w      	r0, (r4, 0x0)
+    33dc:	3108      	movi      	r1, 8
+    33de:	e3fff4d5 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_High(GPIOA0,13);
+    33e2:	9400      	ld.w      	r0, (r4, 0x0)
+    33e4:	310d      	movi      	r1, 13
+    33e6:	e3fff552 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    GPIO_Write_High(GPIOA0,12);
+    33ea:	9400      	ld.w      	r0, (r4, 0x0)
+    33ec:	310c      	movi      	r1, 12
+    33ee:	e3fff54e 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	RC522_RST_HIGH;					//NRSTPD引脚高电平
+    33f2:	310c      	movi      	r1, 12
+    33f4:	9400      	ld.w      	r0, (r4, 0x0)
+    33f6:	e3fff54a 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+	RC522_Delay(1000);				//大概时间为850us
+    33fa:	30fa      	movi      	r0, 250
+    33fc:	4002      	lsli      	r0, r0, 2
+    33fe:	e3fffeb3 	bsr      	0x3164	// 3164 <RC522_Delay>
+	RC522_RST_LOW;					//Ci522掉电
+    3402:	310c      	movi      	r1, 12
+    3404:	9400      	ld.w      	r0, (r4, 0x0)
+    3406:	e3fff546 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	RC522_Delay(1000);				//大概时间为850us
+    340a:	30fa      	movi      	r0, 250
+    340c:	4002      	lsli      	r0, r0, 2
+    340e:	e3fffeab 	bsr      	0x3164	// 3164 <RC522_Delay>
+	RC522_RST_HIGH;					//NRSTPD引脚高电平	
+    3412:	310c      	movi      	r1, 12
+    3414:	9400      	ld.w      	r0, (r4, 0x0)
+    3416:	e3fff53a 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    RC522_PcdReset();               //复位RC522
+    341a:	e3ffff0d 	bsr      	0x3234	// 3234 <RC522_PcdReset>
+    RC522_PcdAntennaOff();          //关闭天线
+    341e:	e3ffff55 	bsr      	0x32c8	// 32c8 <RC522_PcdAntennaOff>
+    RC522_Delay(2);                 //延时2毫秒
+    3422:	3002      	movi      	r0, 2
+    3424:	e3fffea0 	bsr      	0x3164	// 3164 <RC522_Delay>
+    RC522_PcdAntennaOn();           //开启天线
+    3428:	e3ffff38 	bsr      	0x3298	// 3298 <RC522_PcdAntennaOn>
+    memset(&CardInfo,0x00,sizeof(CardInfo));
+    342c:	108a      	lrw      	r4, 0x20000218	// 3454 <RC522_Init+0xbc>
+    342e:	e3ffff75 	bsr      	0x3318	// 3318 <M500PcdConfigISOType.part.1>
+    3432:	3234      	movi      	r2, 52
+    3434:	3100      	movi      	r1, 0
+    3436:	6c13      	mov      	r0, r4
+    3438:	e3fff296 	bsr      	0x1964	// 1964 <__memset_fast>
+    CardInfo.BlockLoc = 0x18;            //默认6扇区0块 绝对是第24块
+    343c:	3318      	movi      	r3, 24
+    343e:	a468      	st.b      	r3, (r4, 0x8)
+    CardInfo.CardKeyType = PICC_AUTHENT1A;       //密码类型
+    3440:	3360      	movi      	r3, 96
+    3442:	a47f      	st.b      	r3, (r4, 0x1f)
+    memset(CardInfo.CardKey, 0xff, 6);     //默认密码为6个ff
+    3444:	3300      	movi      	r3, 0
+    3446:	2b00      	subi      	r3, 1
+    3448:	b468      	st.w      	r3, (r4, 0x20)
+    344a:	ac72      	st.h      	r3, (r4, 0x24)
+}
+    344c:	1491      	pop      	r4, r15
+    344e:	0000      	bkpt
+    3450:	2000004c 	.long	0x2000004c
+    3454:	20000218 	.long	0x20000218
+
+Disassembly of section .text.RC522_PcdComMF522:
+
+00003458 <RC522_PcdComMF522>:
+{
+    3458:	14d4      	push      	r4-r7, r15
+    345a:	1424      	subi      	r14, r14, 16
+    345c:	b862      	st.w      	r3, (r14, 0x8)
+    switch (Command) {
+    345e:	384c      	cmpnei      	r0, 12
+{
+    3460:	9869      	ld.w      	r3, (r14, 0x24)
+    3462:	6d03      	mov      	r4, r0
+    3464:	6dc7      	mov      	r7, r1
+    3466:	b860      	st.w      	r3, (r14, 0x0)
+    switch (Command) {
+    3468:	0c48      	bf      	0x34f8	// 34f8 <RC522_PcdComMF522+0xa0>
+    346a:	384e      	cmpnei      	r0, 14
+    346c:	0c49      	bf      	0x34fe	// 34fe <RC522_PcdComMF522+0xa6>
+    U8_T waitFor=0x00;
+    346e:	3600      	movi      	r6, 0
+    U8_T irqEn=0x00;
+    3470:	3500      	movi      	r5, 0
+    RC522_WriteRawRC(ComIEnReg,irqEn|0x80);
+    3472:	6c57      	mov      	r1, r5
+    3474:	39a7      	bseti      	r1, 7
+    3476:	3002      	movi      	r0, 2
+    3478:	b841      	st.w      	r2, (r14, 0x4)
+    347a:	e3fffec5 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_ClearBitMask(ComIrqReg,0x80);         //清所有中断位
+    347e:	3180      	movi      	r1, 128
+    3480:	3004      	movi      	r0, 4
+    3482:	e3ffff18 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    3486:	3100      	movi      	r1, 0
+    3488:	3001      	movi      	r0, 1
+    348a:	e3fffebd 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_SetBitMask(FIFOLevelReg,0x80);        //清FIFO缓存
+    348e:	3180      	movi      	r1, 128
+    3490:	300a      	movi      	r0, 10
+    3492:	e3fffef7 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    3496:	9841      	ld.w      	r2, (r14, 0x4)
+    3498:	6cdf      	mov      	r3, r7
+    349a:	7489      	zexth      	r2, r2
+    349c:	3700      	movi      	r7, 0
+    349e:	649c      	cmphs      	r7, r2
+    34a0:	0c32      	bf      	0x3504	// 3504 <RC522_PcdComMF522+0xac>
+	RC522_WriteRawRC(CommandReg,Command);
+    34a2:	6c53      	mov      	r1, r4
+    34a4:	3001      	movi      	r0, 1
+    34a6:	e3fffeaf 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+	if(Command==PCD_TRANSCEIVE)
+    34aa:	3c4c      	cmpnei      	r4, 12
+    34ac:	0805      	bt      	0x34b6	// 34b6 <RC522_PcdComMF522+0x5e>
+		RC522_SetBitMask(BitFramingReg,0x80);    //开始传送
+    34ae:	3180      	movi      	r1, 128
+    34b0:	300d      	movi      	r0, 13
+    34b2:	e3fffee7 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+    for(i=0;i<InLenByte;i++)
+    34b6:	37fa      	movi      	r7, 250
+    34b8:	47e3      	lsli      	r7, r7, 3
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    34ba:	3ea0      	bseti      	r6, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    34bc:	3004      	movi      	r0, 4
+    34be:	e3fffe87 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+		i--;
+    34c2:	5f63      	subi      	r3, r7, 1
+    34c4:	75cd      	zexth      	r7, r3
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    34c6:	3f40      	cmpnei      	r7, 0
+		n=RC522_ReadRawRC(ComIrqReg);
+    34c8:	b801      	st.w      	r0, (r14, 0x4)
+	}while((i!=0)&&!(n&0x01)&&!(n&waitFor));
+    34ca:	0c05      	bf      	0x34d4	// 34d4 <RC522_PcdComMF522+0x7c>
+    34cc:	6c83      	mov      	r2, r0
+    34ce:	6898      	and      	r2, r6
+    34d0:	3a40      	cmpnei      	r2, 0
+    34d2:	0ff5      	bf      	0x34bc	// 34bc <RC522_PcdComMF522+0x64>
+	RC522_ClearBitMask(BitFramingReg,0x80);
+    34d4:	3180      	movi      	r1, 128
+    34d6:	300d      	movi      	r0, 13
+    34d8:	e3fffeed 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+	if(i!=0)
+    34dc:	3f40      	cmpnei      	r7, 0
+    34de:	081f      	bt      	0x351c	// 351c <RC522_PcdComMF522+0xc4>
+    char stats=MI_ERR;
+    34e0:	3502      	movi      	r5, 2
+    RC522_SetBitMask(ControlReg,0x80);// stop timer now
+    34e2:	3180      	movi      	r1, 128
+    34e4:	300c      	movi      	r0, 12
+    34e6:	e3fffecd 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+    RC522_WriteRawRC(CommandReg,PCD_IDLE);
+    34ea:	3100      	movi      	r1, 0
+    34ec:	3001      	movi      	r0, 1
+    34ee:	e3fffe8b 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+}
+    34f2:	6c17      	mov      	r0, r5
+    34f4:	1404      	addi      	r14, r14, 16
+    34f6:	1494      	pop      	r4-r7, r15
+        waitFor = 0x30;
+    34f8:	3630      	movi      	r6, 48
+        irqEn = 0x77;
+    34fa:	3577      	movi      	r5, 119
+        break;
+    34fc:	07bb      	br      	0x3472	// 3472 <RC522_PcdComMF522+0x1a>
+        waitFor = 0x10;
+    34fe:	3610      	movi      	r6, 16
+        irqEn = 0x12;
+    3500:	3512      	movi      	r5, 18
+    3502:	07b8      	br      	0x3472	// 3472 <RC522_PcdComMF522+0x1a>
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    3504:	8320      	ld.b      	r1, (r3, 0x0)
+    3506:	3009      	movi      	r0, 9
+    3508:	b843      	st.w      	r2, (r14, 0xc)
+    350a:	b861      	st.w      	r3, (r14, 0x4)
+    for(i=0;i<InLenByte;i++)
+    350c:	2700      	addi      	r7, 1
+		RC522_WriteRawRC(FIFODataReg,pIn[i]);
+    350e:	e3fffe7b 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    3512:	9861      	ld.w      	r3, (r14, 0x4)
+    for(i=0;i<InLenByte;i++)
+    3514:	75dd      	zexth      	r7, r7
+    3516:	2300      	addi      	r3, 1
+    3518:	9843      	ld.w      	r2, (r14, 0xc)
+    351a:	07c2      	br      	0x349e	// 349e <RC522_PcdComMF522+0x46>
+        if(!(RC522_ReadRawRC(ErrorReg)&0x1B))
+    351c:	3006      	movi      	r0, 6
+    351e:	e3fffe57 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    3522:	331b      	movi      	r3, 27
+    3524:	680c      	and      	r0, r3
+    3526:	3840      	cmpnei      	r0, 0
+    3528:	0bdc      	bt      	0x34e0	// 34e0 <RC522_PcdComMF522+0x88>
+            if(n&irqEn&0x01)
+    352a:	3301      	movi      	r3, 1
+    352c:	694c      	and      	r5, r3
+    352e:	9861      	ld.w      	r3, (r14, 0x4)
+    3530:	68d4      	and      	r3, r5
+    3532:	3b40      	cmpnei      	r3, 0
+    3534:	0817      	bt      	0x3562	// 3562 <RC522_PcdComMF522+0x10a>
+            if(Command==PCD_TRANSCEIVE)
+    3536:	3c4c      	cmpnei      	r4, 12
+    3538:	0c19      	bf      	0x356a	// 356a <RC522_PcdComMF522+0x112>
+            stats=MI_OK;
+    353a:	3500      	movi      	r5, 0
+    353c:	07d3      	br      	0x34e2	// 34e2 <RC522_PcdComMF522+0x8a>
+                    *pOutLenBit=n*8;
+    353e:	4463      	lsli      	r3, r4, 3
+    3540:	9840      	ld.w      	r2, (r14, 0x0)
+    3542:	a260      	st.b      	r3, (r2, 0x0)
+    3544:	042b      	br      	0x359a	// 359a <RC522_PcdComMF522+0x142>
+                if(n==0)n=1;
+    3546:	3301      	movi      	r3, 1
+    3548:	0430      	br      	0x35a8	// 35a8 <RC522_PcdComMF522+0x150>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    354a:	300a      	movi      	r0, 10
+    354c:	e3fffe40 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    3550:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    3552:	300c      	movi      	r0, 12
+    3554:	e3fffe3c 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    3558:	3307      	movi      	r3, 7
+    355a:	680c      	and      	r0, r3
+                stats=MI_NOTAGERR;
+    355c:	3501      	movi      	r5, 1
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    355e:	3c40      	cmpnei      	r4, 0
+    3560:	0412      	br      	0x3584	// 3584 <RC522_PcdComMF522+0x12c>
+            if(Command==PCD_TRANSCEIVE)
+    3562:	3c4c      	cmpnei      	r4, 12
+    3564:	0ff3      	bf      	0x354a	// 354a <RC522_PcdComMF522+0xf2>
+                stats=MI_NOTAGERR;
+    3566:	3501      	movi      	r5, 1
+    3568:	07bd      	br      	0x34e2	// 34e2 <RC522_PcdComMF522+0x8a>
+                n=RC522_ReadRawRC(FIFOLevelReg);
+    356a:	300a      	movi      	r0, 10
+    356c:	e3fffe30 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    3570:	6d03      	mov      	r4, r0
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    3572:	300c      	movi      	r0, 12
+    3574:	e3fffe2c 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+    3578:	3307      	movi      	r3, 7
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    357a:	3c42      	cmpnei      	r4, 2
+                lastBits=RC522_ReadRawRC(ControlReg)&0x07;
+    357c:	680c      	and      	r0, r3
+            stats=MI_OK;
+    357e:	3500      	movi      	r5, 0
+				if (!((0 == stats && (2 == n || 5 == n))||(1 ==stats && 0 == n))){
+    3580:	0c06      	bf      	0x358c	// 358c <RC522_PcdComMF522+0x134>
+    3582:	3c45      	cmpnei      	r4, 5
+    3584:	0c04      	bf      	0x358c	// 358c <RC522_PcdComMF522+0x134>
+					FIFOLevelReg_flag = 1;
+    3586:	1070      	lrw      	r3, 0x200000c8	// 35c4 <RC522_PcdComMF522+0x16c>
+    3588:	3201      	movi      	r2, 1
+    358a:	a340      	st.b      	r2, (r3, 0x0)
+                if(lastBits)
+    358c:	3840      	cmpnei      	r0, 0
+    358e:	0fd8      	bf      	0x353e	// 353e <RC522_PcdComMF522+0xe6>
+                    *pOutLenBit=(n-1)*8+lastBits;
+    3590:	5c63      	subi      	r3, r4, 1
+    3592:	4363      	lsli      	r3, r3, 3
+    3594:	600c      	addu      	r0, r3
+    3596:	9860      	ld.w      	r3, (r14, 0x0)
+    3598:	a300      	st.b      	r0, (r3, 0x0)
+                if(n==0)n=1;
+    359a:	3c40      	cmpnei      	r4, 0
+    359c:	0fd5      	bf      	0x3546	// 3546 <RC522_PcdComMF522+0xee>
+    359e:	3c12      	cmphsi      	r4, 19
+    35a0:	6cd3      	mov      	r3, r4
+    35a2:	0c02      	bf      	0x35a6	// 35a6 <RC522_PcdComMF522+0x14e>
+    35a4:	3312      	movi      	r3, 18
+    35a6:	74cc      	zextb      	r3, r3
+    35a8:	98e2      	ld.w      	r7, (r14, 0x8)
+                for(i=0; i<n; i++)
+    35aa:	3600      	movi      	r6, 0
+    35ac:	750d      	zexth      	r4, r3
+    35ae:	6518      	cmphs      	r6, r4
+    35b0:	0b99      	bt      	0x34e2	// 34e2 <RC522_PcdComMF522+0x8a>
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    35b2:	3009      	movi      	r0, 9
+    35b4:	e3fffe0c 	bsr      	0x31cc	// 31cc <RC522_ReadRawRC>
+                for(i=0; i<n; i++)
+    35b8:	2600      	addi      	r6, 1
+                    pOut[i]=RC522_ReadRawRC(FIFODataReg);
+    35ba:	a700      	st.b      	r0, (r7, 0x0)
+                for(i=0; i<n; i++)
+    35bc:	7599      	zexth      	r6, r6
+    35be:	2700      	addi      	r7, 1
+    35c0:	07f7      	br      	0x35ae	// 35ae <RC522_PcdComMF522+0x156>
+    35c2:	0000      	bkpt
+    35c4:	200000c8 	.long	0x200000c8
+
+Disassembly of section .text.RC522_PcdRequest:
+
+000035c8 <RC522_PcdRequest>:
+{
+    35c8:	14d3      	push      	r4-r6, r15
+    35ca:	1427      	subi      	r14, r14, 28
+    35cc:	6d03      	mov      	r4, r0
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    35ce:	3212      	movi      	r2, 18
+{
+    35d0:	6d47      	mov      	r5, r1
+    U8_T ucComMF522Buf[MAXRLEN] = {0};         // MAXRLEN  18
+    35d2:	1802      	addi      	r0, r14, 8
+    35d4:	3100      	movi      	r1, 0
+    35d6:	e3fff1c7 	bsr      	0x1964	// 1964 <__memset_fast>
+    RC522_ClearBitMask(Status2Reg,0x08);    //清RC522寄存器位,/接收数据命令
+    35da:	3108      	movi      	r1, 8
+    35dc:	3008      	movi      	r0, 8
+    35de:	e3fffe6a 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x07); //写RC632寄存器
+    35e2:	3107      	movi      	r1, 7
+    35e4:	300d      	movi      	r0, 13
+    35e6:	e3fffe0f 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    35ea:	3607      	movi      	r6, 7
+    RC522_SetBitMask(TxControlReg,0x03);  //置RC522寄存器位
+    35ec:	3103      	movi      	r1, 3
+    35ee:	3014      	movi      	r0, 20
+    35f0:	e3fffe48 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    35f4:	61b8      	addu      	r6, r14
+    35f6:	1b02      	addi      	r3, r14, 8
+    35f8:	b8c0      	st.w      	r6, (r14, 0x0)
+    35fa:	3201      	movi      	r2, 1
+    35fc:	6c4f      	mov      	r1, r3
+    35fe:	300c      	movi      	r0, 12
+    ucComMF522Buf[0]=req_code;      //寻卡方式
+    3600:	dc8e0008 	st.b      	r4, (r14, 0x8)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,1,ucComMF522Buf,&unLen); //通过RC522和ISO14443卡通讯
+    3604:	e3ffff2a 	bsr      	0x3458	// 3458 <RC522_PcdComMF522>
+    if ((stats == MI_OK) && (unLen == 0x10)) {
+    3608:	3840      	cmpnei      	r0, 0
+    360a:	081b      	bt      	0x3640	// 3640 <RC522_PcdRequest+0x78>
+    360c:	8660      	ld.b      	r3, (r6, 0x0)
+    360e:	3b50      	cmpnei      	r3, 16
+    3610:	0818      	bt      	0x3640	// 3640 <RC522_PcdRequest+0x78>
+        *pTagType = ucComMF522Buf[0]; //将数组里的数据赋值给*pTagType
+    3612:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    3616:	a560      	st.b      	r3, (r5, 0x0)
+        *(pTagType + 1) = ucComMF522Buf[1];
+    3618:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    361c:	a561      	st.b      	r3, (r5, 0x1)
+		if ((ucComMF522Buf[0] == req_code)&&(CardInfo.RC522_Reset_Falg == 0)) {
+    361e:	d86e0008 	ld.b      	r3, (r14, 0x8)
+    3622:	650e      	cmpne      	r3, r4
+    3624:	3220      	movi      	r2, 32
+    3626:	1069      	lrw      	r3, 0x20000218	// 3648 <RC522_PcdRequest+0x80>
+    3628:	608c      	addu      	r2, r3
+    362a:	080d      	bt      	0x3644	// 3644 <RC522_PcdRequest+0x7c>
+    362c:	8228      	ld.b      	r1, (r2, 0x8)
+    362e:	3940      	cmpnei      	r1, 0
+    3630:	0806      	bt      	0x363c	// 363c <RC522_PcdRequest+0x74>
+			CardInfo.RC522_Reset_Falg = 1;
+    3632:	3101      	movi      	r1, 1
+			CardInfo.RC522_Reset_Falg = 0;
+    3634:	a228      	st.b      	r1, (r2, 0x8)
+			CardInfo.Reset_Tick = SysTick_1ms;
+    3636:	1046      	lrw      	r2, 0x200000b4	// 364c <RC522_PcdRequest+0x84>
+    3638:	9240      	ld.w      	r2, (r2, 0x0)
+    363a:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    363c:	1407      	addi      	r14, r14, 28
+    363e:	1493      	pop      	r4-r6, r15
+        stats = MI_ERR;
+    3640:	3002      	movi      	r0, 2
+    3642:	07ee      	br      	0x361e	// 361e <RC522_PcdRequest+0x56>
+			CardInfo.RC522_Reset_Falg = 0;
+    3644:	3100      	movi      	r1, 0
+    3646:	07f7      	br      	0x3634	// 3634 <RC522_PcdRequest+0x6c>
+    3648:	20000218 	.long	0x20000218
+    364c:	200000b4 	.long	0x200000b4
+
+Disassembly of section .text.RC522_PcdAnticoll:
+
+00003650 <RC522_PcdAnticoll>:
+{
+    3650:	14d2      	push      	r4-r5, r15
+    3652:	1427      	subi      	r14, r14, 28
+    3654:	6d43      	mov      	r5, r0
+    RC522_ClearBitMask(Status2Reg,0x08);  //清RC522寄存器位
+    3656:	3108      	movi      	r1, 8
+    3658:	3008      	movi      	r0, 8
+    365a:	e3fffe2c 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+    RC522_WriteRawRC(BitFramingReg,0x00); //写
+    365e:	3100      	movi      	r1, 0
+    3660:	300d      	movi      	r0, 13
+    3662:	e3fffdd1 	bsr      	0x3204	// 3204 <RC522_WriteRawRC>
+    RC522_ClearBitMask(CollReg,0x80);     //清
+    3666:	3180      	movi      	r1, 128
+    3668:	300e      	movi      	r0, 14
+    366a:	e3fffe24 	bsr      	0x32b2	// 32b2 <RC522_ClearBitMask>
+    ucComMF522Buf[0]=PICC_ANTICOLL1;   //PICC_ANTICOLL1 = 0x93
+    366e:	3300      	movi      	r3, 0
+    3670:	2b6c      	subi      	r3, 109
+    3672:	dc6e0008 	st.b      	r3, (r14, 0x8)
+    ucComMF522Buf[1]=0x20;
+    3676:	3320      	movi      	r3, 32
+    3678:	dc6e0009 	st.b      	r3, (r14, 0x9)
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    367c:	3307      	movi      	r3, 7
+    367e:	60f8      	addu      	r3, r14
+    3680:	b860      	st.w      	r3, (r14, 0x0)
+    3682:	1b02      	addi      	r3, r14, 8
+    3684:	3202      	movi      	r2, 2
+    3686:	6c4f      	mov      	r1, r3
+    3688:	300c      	movi      	r0, 12
+    368a:	e3fffee7 	bsr      	0x3458	// 3458 <RC522_PcdComMF522>
+    if(stats==MI_OK)
+    368e:	3840      	cmpnei      	r0, 0
+    stats=RC522_PcdComMF522(PCD_TRANSCEIVE,ucComMF522Buf,2,ucComMF522Buf,&unLen); //0x0c,通过RC522和ISO14443卡通讯
+    3690:	6d03      	mov      	r4, r0
+    if(stats==MI_OK)
+    3692:	0812      	bt      	0x36b6	// 36b6 <RC522_PcdAnticoll+0x66>
+    3694:	3300      	movi      	r3, 0
+    3696:	3200      	movi      	r2, 0
+             *(pSnr+i)=ucComMF522Buf[i];  //把读到的卡号赋值给pSnr
+    3698:	1902      	addi      	r1, r14, 8
+    369a:	604c      	addu      	r1, r3
+    369c:	8120      	ld.b      	r1, (r1, 0x0)
+    369e:	5d0c      	addu      	r0, r5, r3
+    36a0:	2300      	addi      	r3, 1
+    36a2:	a020      	st.b      	r1, (r0, 0x0)
+         for(i=0;i<4;i++)
+    36a4:	3b44      	cmpnei      	r3, 4
+             snr_check^=ucComMF522Buf[i];
+    36a6:	6c49      	xor      	r1, r2
+    36a8:	6c87      	mov      	r2, r1
+         for(i=0;i<4;i++)
+    36aa:	0bf7      	bt      	0x3698	// 3698 <RC522_PcdAnticoll+0x48>
+         if(snr_check!=ucComMF522Buf[i])
+    36ac:	d86e000c 	ld.b      	r3, (r14, 0xc)
+    36b0:	644e      	cmpne      	r3, r1
+    36b2:	0c02      	bf      	0x36b6	// 36b6 <RC522_PcdAnticoll+0x66>
+            stats = MI_ERR;
+    36b4:	3402      	movi      	r4, 2
+    RC522_SetBitMask(CollReg,0x80);
+    36b6:	3180      	movi      	r1, 128
+    36b8:	300e      	movi      	r0, 14
+    36ba:	e3fffde3 	bsr      	0x3280	// 3280 <RC522_SetBitMask>
+}
+    36be:	6c13      	mov      	r0, r4
+    36c0:	1407      	addi      	r14, r14, 28
+    36c2:	1492      	pop      	r4-r5, r15
+
+Disassembly of section .text.Card_Read_TasK:
+
+000036c4 <Card_Read_TasK>:
+
+
+
+//U32_T FailNum = 0;
+U32_T scan_tick = 0;
+void Card_Read_TasK(void){
+    36c4:	14d3      	push      	r4-r6, r15
+
+    if(SysTick_1ms - scan_tick >= 100){
+    36c6:	11a5      	lrw      	r5, 0x200000b4	// 3758 <Card_Read_TasK+0x94>
+    36c8:	1145      	lrw      	r2, 0x200000c8	// 375c <Card_Read_TasK+0x98>
+    36ca:	1186      	lrw      	r4, 0x20000218	// 3760 <Card_Read_TasK+0x9c>
+    36cc:	9221      	ld.w      	r1, (r2, 0x4)
+    36ce:	9560      	ld.w      	r3, (r5, 0x0)
+    36d0:	60c6      	subu      	r3, r1
+    36d2:	3163      	movi      	r1, 99
+    36d4:	64c4      	cmphs      	r1, r3
+    36d6:	081a      	bt      	0x370a	// 370a <Card_Read_TasK+0x46>
+		//Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,Card Read",SysTick_1ms);
+
+		
+
+        //寻卡: 识别天线范围内全部卡
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    36d8:	3119      	movi      	r1, 25
+        scan_tick = SysTick_1ms;
+    36da:	9560      	ld.w      	r3, (r5, 0x0)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    36dc:	6050      	addu      	r1, r4
+    36de:	3052      	movi      	r0, 82
+        scan_tick = SysTick_1ms;
+    36e0:	b261      	st.w      	r3, (r2, 0x4)
+        if (RC522_PcdRequest(PICC_REQALL, CardInfo.CT) == MI_OK) {
+    36e2:	e3ffff73 	bsr      	0x35c8	// 35c8 <RC522_PcdRequest>
+    36e6:	3620      	movi      	r6, 32
+    36e8:	3840      	cmpnei      	r0, 0
+    36ea:	6190      	addu      	r6, r4
+    36ec:	0829      	bt      	0x373e	// 373e <Card_Read_TasK+0x7a>
+			    //消抖
+            //Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_SUCC",SysTick_1ms);
+			
+			
+            //防冲撞:获取IC卡的卡号
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    36ee:	301b      	movi      	r0, 27
+            CardInfo.FailNum = 0x00;
+    36f0:	3300      	movi      	r3, 0
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    36f2:	6010      	addu      	r0, r4
+            CardInfo.FailNum = 0x00;
+    36f4:	a666      	st.b      	r3, (r6, 0x6)
+            if(RC522_PcdAnticoll(CardInfo.SN) == MI_OK){
+    36f6:	e3ffffad 	bsr      	0x3650	// 3650 <RC522_PcdAnticoll>
+    36fa:	3840      	cmpnei      	r0, 0
+    36fc:	081c      	bt      	0x3734	// 3734 <Card_Read_TasK+0x70>
+				
+			
+				CardInfo.SuccNum++;
+				if(CardInfo.SuccNum >= 1)
+    36fe:	8647      	ld.b      	r2, (r6, 0x7)
+    3700:	33ff      	movi      	r3, 255
+    3702:	64ca      	cmpne      	r2, r3
+				{
+					CardInfo.SuccNum = 0 ;
+    3704:	3300      	movi      	r3, 0
+    3706:	a667      	st.b      	r3, (r6, 0x7)
+				if(CardInfo.SuccNum >= 1)
+    3708:	080e      	bt      	0x3724	// 3724 <Card_Read_TasK+0x60>
+            }
+        }
+		//}
+    }
+
+    if(CardInfo.BlockSucc != CardInfo.BlockLast){
+    370a:	8467      	ld.b      	r3, (r4, 0x7)
+    370c:	8446      	ld.b      	r2, (r4, 0x6)
+    370e:	64ca      	cmpne      	r2, r3
+    3710:	0c09      	bf      	0x3722	// 3722 <Card_Read_TasK+0x5e>
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    3712:	3b41      	cmpnei      	r3, 1
+        CardInfo.BlockLast = CardInfo.BlockSucc;
+    3714:	a466      	st.b      	r3, (r4, 0x6)
+        if(CardInfo.BlockLast == BLOCK_READ_SUCC){
+    3716:	0c06      	bf      	0x3722	// 3722 <Card_Read_TasK+0x5e>
+            
+			//Dbg_Println(DBG_BIT_SYS_STATUS, "Card Read SUCC");
+			
+			
+        }else {
+            Card_Tick = SysTick_1ms;
+    3718:	9540      	ld.w      	r2, (r5, 0x0)
+    371a:	1073      	lrw      	r3, 0x200000a0	// 3764 <Card_Read_TasK+0xa0>
+    371c:	b340      	st.w      	r2, (r3, 0x0)
+			CardInfo.reset_tick = SysTick_1ms;
+    371e:	9560      	ld.w      	r3, (r5, 0x0)
+    3720:	b46c      	st.w      	r3, (r4, 0x30)
+        }
+    }
+
+
+}
+    3722:	1493      	pop      	r4-r6, r15
+					CardInfo.BlockSucc = BLOCK_READ_SUCC;
+    3724:	3301      	movi      	r3, 1
+    3726:	a467      	st.b      	r3, (r4, 0x7)
+					Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d  Card Block_SUCC",SysTick_1ms);
+    3728:	9540      	ld.w      	r2, (r5, 0x0)
+    372a:	1030      	lrw      	r1, 0x49fb	// 3768 <Card_Read_TasK+0xa4>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_FAILD",SysTick_1ms);
+    372c:	3000      	movi      	r0, 0
+    372e:	e3fffd15 	bsr      	0x3158	// 3158 <Dbg_Println>
+    3732:	07ec      	br      	0x370a	// 370a <Card_Read_TasK+0x46>
+                Dbg_Println(DBG_BIT_SYS_STATUS, "Card Get SN Error");
+    3734:	102e      	lrw      	r1, 0x4a1b	// 376c <Card_Read_TasK+0xa8>
+    3736:	3000      	movi      	r0, 0
+    3738:	e3fffd10 	bsr      	0x3158	// 3158 <Dbg_Println>
+    373c:	07e7      	br      	0x370a	// 370a <Card_Read_TasK+0x46>
+            if(CardInfo.FailNum >= 5)
+    373e:	8666      	ld.b      	r3, (r6, 0x6)
+    3740:	3b04      	cmphsi      	r3, 5
+    3742:	0c08      	bf      	0x3752	// 3752 <Card_Read_TasK+0x8e>
+                CardInfo.FailNum = 0;
+    3744:	3300      	movi      	r3, 0
+    3746:	a666      	st.b      	r3, (r6, 0x6)
+				CardInfo.SuccNum = 0;
+    3748:	a667      	st.b      	r3, (r6, 0x7)
+                CardInfo.BlockSucc = BLOCK_READ_FAILD;
+    374a:	a467      	st.b      	r3, (r4, 0x7)
+                Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d BLOCK_READ_FAILD",SysTick_1ms);
+    374c:	9540      	ld.w      	r2, (r5, 0x0)
+    374e:	1029      	lrw      	r1, 0x4a2d	// 3770 <Card_Read_TasK+0xac>
+    3750:	07ee      	br      	0x372c	// 372c <Card_Read_TasK+0x68>
+                CardInfo.FailNum++;
+    3752:	2300      	addi      	r3, 1
+    3754:	a666      	st.b      	r3, (r6, 0x6)
+    3756:	07da      	br      	0x370a	// 370a <Card_Read_TasK+0x46>
+    3758:	200000b4 	.long	0x200000b4
+    375c:	200000c8 	.long	0x200000c8
+    3760:	20000218 	.long	0x20000218
+    3764:	200000a0 	.long	0x200000a0
+    3768:	000049fb 	.long	0x000049fb
+    376c:	00004a1b 	.long	0x00004a1b
+    3770:	00004a2d 	.long	0x00004a2d
+
+Disassembly of section .text.Detect_SPI_task:
+
+00003774 <Detect_SPI_task>:
+U32_T HL_tick =0;
+void Detect_SPI_task(void){
+    3774:	14d1      	push      	r4, r15
+
+	if (CardInfo.RC522_Reset_Falg == 1) {
+    3776:	109f      	lrw      	r4, 0x20000218	// 37f0 <Detect_SPI_task+0x7c>
+    3778:	3320      	movi      	r3, 32
+    377a:	60d0      	addu      	r3, r4
+    377c:	8368      	ld.b      	r3, (r3, 0x8)
+    377e:	3b41      	cmpnei      	r3, 1
+    3780:	0810      	bt      	0x37a0	// 37a0 <Detect_SPI_task+0x2c>
+		if (SysTick_1ms - CardInfo.Reset_Tick >= 1000) {
+    3782:	105d      	lrw      	r2, 0x200000b4	// 37f4 <Detect_SPI_task+0x80>
+    3784:	9260      	ld.w      	r3, (r2, 0x0)
+    3786:	942b      	ld.w      	r1, (r4, 0x2c)
+    3788:	60c6      	subu      	r3, r1
+    378a:	103c      	lrw      	r1, 0x3e7	// 37f8 <Detect_SPI_task+0x84>
+    378c:	64c4      	cmphs      	r1, r3
+    378e:	0809      	bt      	0x37a0	// 37a0 <Detect_SPI_task+0x2c>
+			CardInfo.Reset_Tick = SysTick_1ms;
+    3790:	9260      	ld.w      	r3, (r2, 0x0)
+    3792:	b46b      	st.w      	r3, (r4, 0x2c)
+			RC522_Reset();
+    3794:	e3fffda0 	bsr      	0x32d4	// 32d4 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "SPI INIT");
+    3798:	1039      	lrw      	r1, 0x4a4d	// 37fc <Detect_SPI_task+0x88>
+    379a:	3000      	movi      	r0, 0
+    379c:	e3fffcde 	bsr      	0x3158	// 3158 <Dbg_Println>
+		}
+	}
+	
+	if(1==FIFOLevelReg_flag){
+    37a0:	1078      	lrw      	r3, 0x200000c8	// 3800 <Detect_SPI_task+0x8c>
+    37a2:	8340      	ld.b      	r2, (r3, 0x0)
+    37a4:	3a41      	cmpnei      	r2, 1
+    37a6:	0812      	bt      	0x37ca	// 37ca <Detect_SPI_task+0x56>
+//		Dbg_Println(DBG_BIT_SYS_STATUS, "FIFO INIT one");
+		if (SysTick_1ms - HL_tick >= 1000) {
+    37a8:	1033      	lrw      	r1, 0x200000b4	// 37f4 <Detect_SPI_task+0x80>
+    37aa:	9140      	ld.w      	r2, (r1, 0x0)
+    37ac:	9302      	ld.w      	r0, (r3, 0x8)
+    37ae:	6082      	subu      	r2, r0
+    37b0:	1012      	lrw      	r0, 0x3e7	// 37f8 <Detect_SPI_task+0x84>
+    37b2:	6480      	cmphs      	r0, r2
+    37b4:	080b      	bt      	0x37ca	// 37ca <Detect_SPI_task+0x56>
+			HL_tick = SysTick_1ms;
+    37b6:	9140      	ld.w      	r2, (r1, 0x0)
+    37b8:	b342      	st.w      	r2, (r3, 0x8)
+			FIFOLevelReg_flag = 0;
+    37ba:	3200      	movi      	r2, 0
+    37bc:	a340      	st.b      	r2, (r3, 0x0)
+
+			RC522_Reset();
+    37be:	e3fffd8b 	bsr      	0x32d4	// 32d4 <RC522_Reset>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "FIFO INIT");
+    37c2:	1031      	lrw      	r1, 0x4a56	// 3804 <Detect_SPI_task+0x90>
+    37c4:	3000      	movi      	r0, 0
+    37c6:	e3fffcc9 	bsr      	0x3158	// 3158 <Dbg_Println>
+		}
+	}
+	
+	//每10s读不到卡便复位并初始化rc522
+	if((CardInfo.BlockSucc == BLOCK_READ_FAILD)&&(SysTick_1ms - CardInfo.reset_tick>= 10000)) {
+    37ca:	8467      	ld.b      	r3, (r4, 0x7)
+    37cc:	3b40      	cmpnei      	r3, 0
+    37ce:	0810      	bt      	0x37ee	// 37ee <Detect_SPI_task+0x7a>
+    37d0:	1049      	lrw      	r2, 0x200000b4	// 37f4 <Detect_SPI_task+0x80>
+    37d2:	9260      	ld.w      	r3, (r2, 0x0)
+    37d4:	942c      	ld.w      	r1, (r4, 0x30)
+    37d6:	60c6      	subu      	r3, r1
+    37d8:	102c      	lrw      	r1, 0x270f	// 3808 <Detect_SPI_task+0x94>
+    37da:	64c4      	cmphs      	r1, r3
+    37dc:	0809      	bt      	0x37ee	// 37ee <Detect_SPI_task+0x7a>
+		CardInfo.reset_tick = SysTick_1ms;
+    37de:	9260      	ld.w      	r3, (r2, 0x0)
+    37e0:	b46c      	st.w      	r3, (r4, 0x30)
+		RC522_Reset();
+    37e2:	e3fffd79 	bsr      	0x32d4	// 32d4 <RC522_Reset>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "not read for 10 seconds");
+    37e6:	102a      	lrw      	r1, 0x4a60	// 380c <Detect_SPI_task+0x98>
+    37e8:	3000      	movi      	r0, 0
+    37ea:	e3fffcb7 	bsr      	0x3158	// 3158 <Dbg_Println>
+		
+	}
+
+
+}
+    37ee:	1491      	pop      	r4, r15
+    37f0:	20000218 	.long	0x20000218
+    37f4:	200000b4 	.long	0x200000b4
+    37f8:	000003e7 	.long	0x000003e7
+    37fc:	00004a4d 	.long	0x00004a4d
+    3800:	200000c8 	.long	0x200000c8
+    3804:	00004a56 	.long	0x00004a56
+    3808:	0000270f 	.long	0x0000270f
+    380c:	00004a60 	.long	0x00004a60
+
+Disassembly of section .text.BLV_RLY_Ctrl_Purpose.part.0:
+
+00003810 <BLV_RLY_Ctrl_Purpose.part.0>:
+/********************************************
+ *产生继电器控制动作检测
+ * rly_id:继电器id，state：继电器要改变的状态
+ * 
+ * ********************************************/
+void BLV_RLY_Ctrl_Purpose(U8_T rly_id,U8_T state)
+    3810:	14d1      	push      	r4, r15
+	//一个标志位，在过零信号的中断里会改变，代表有过零信号  
+	//c_rly.rly_zero
+	
+	if( !((state == Control_ON)||(state == Control_OFF))) return;
+	
+	switch(rly_id)
+    3812:	3840      	cmpnei      	r0, 0
+    3814:	1089      	lrw      	r4, 0x2000024c	// 3838 <BLV_RLY_Ctrl_Purpose.part.0+0x28>
+    3816:	080f      	bt      	0x3834	// 3834 <BLV_RLY_Ctrl_Purpose.part.0+0x24>
+	{
+		case CARD_RLY:
+
+			if(c_rly.rly_state[rly_id] != state){
+    3818:	8463      	ld.b      	r3, (r4, 0x3)
+    381a:	644e      	cmpne      	r3, r1
+    381c:	0c0b      	bf      	0x3832	// 3832 <BLV_RLY_Ctrl_Purpose.part.0+0x22>
+				c_rly.rly_state[rly_id] = state;
+    381e:	a423      	st.b      	r1, (r4, 0x3)
+				
+				Dbg_Println(DBG_BIT_SYS_STATUS,"BLV_RLY_Ctrl_Purpose1--rly_control:%d",c_rly.rly_control);
+    3820:	8442      	ld.b      	r2, (r4, 0x2)
+    3822:	1027      	lrw      	r1, 0x4a78	// 383c <BLV_RLY_Ctrl_Purpose.part.0+0x2c>
+    3824:	e3fffc9a 	bsr      	0x3158	// 3158 <Dbg_Println>
+//				g_switch.rly_control = 0x01;
+				
+				if(c_rly.rly_zero == 0){
+    3828:	8460      	ld.b      	r3, (r4, 0x0)
+					c_rly.rly_control = 0x02;
+    382a:	3b40      	cmpnei      	r3, 0
+    382c:	64c3      	mvcv      	r3
+    382e:	2300      	addi      	r3, 1
+					c_rly.rly_control = 0x01;
+				}
+			}
+		break;
+		default:
+			c_rly.rly_control = 0x00;
+    3830:	a462      	st.b      	r3, (r4, 0x2)
+		break;
+	
+	}
+	
+}
+    3832:	1491      	pop      	r4, r15
+			c_rly.rly_control = 0x00;
+    3834:	3300      	movi      	r3, 0
+    3836:	07fd      	br      	0x3830	// 3830 <BLV_RLY_Ctrl_Purpose.part.0+0x20>
+    3838:	2000024c 	.long	0x2000024c
+    383c:	00004a78 	.long	0x00004a78
+
+Disassembly of section .text.RLY_Light_Ctrl:
+
+00003840 <RLY_Light_Ctrl>:
+{
+    3840:	14d0      	push      	r15
+	if(state == 0x01)
+    3842:	3841      	cmpnei      	r0, 1
+    3844:	0806      	bt      	0x3850	// 3850 <RLY_Light_Ctrl+0x10>
+    3846:	3101      	movi      	r1, 1
+    3848:	3000      	movi      	r0, 0
+    384a:	e3ffffe3 	bsr      	0x3810	// 3810 <BLV_RLY_Ctrl_Purpose.part.0>
+}
+    384e:	1490      	pop      	r15
+	else if(state == 0x00){
+    3850:	3840      	cmpnei      	r0, 0
+    3852:	0bfe      	bt      	0x384e	// 384e <RLY_Light_Ctrl+0xe>
+		if(CardInfo.CTR_PLYFlag == 1){
+    3854:	1067      	lrw      	r3, 0x20000218	// 3870 <RLY_Light_Ctrl+0x30>
+    3856:	8360      	ld.b      	r3, (r3, 0x0)
+    3858:	3b41      	cmpnei      	r3, 1
+    385a:	0809      	bt      	0x386c	// 386c <RLY_Light_Ctrl+0x2c>
+			if(SysTick_1ms - Tim_Flag >= CTR_State_Tick)
+    385c:	1066      	lrw      	r3, 0x200000b4	// 3874 <RLY_Light_Ctrl+0x34>
+    385e:	1047      	lrw      	r2, 0x200000d4	// 3878 <RLY_Light_Ctrl+0x38>
+    3860:	9360      	ld.w      	r3, (r3, 0x0)
+    3862:	9240      	ld.w      	r2, (r2, 0x0)
+    3864:	60ca      	subu      	r3, r2
+    3866:	1046      	lrw      	r2, 0x752f	// 387c <RLY_Light_Ctrl+0x3c>
+    3868:	64c8      	cmphs      	r2, r3
+    386a:	0bf2      	bt      	0x384e	// 384e <RLY_Light_Ctrl+0xe>
+    386c:	3102      	movi      	r1, 2
+    386e:	07ed      	br      	0x3848	// 3848 <RLY_Light_Ctrl+0x8>
+    3870:	20000218 	.long	0x20000218
+    3874:	200000b4 	.long	0x200000b4
+    3878:	200000d4 	.long	0x200000d4
+    387c:	0000752f 	.long	0x0000752f
+
+Disassembly of section .text.KEY1_LONG_PRESS_RELEASE_Handler:
+
+00003880 <KEY1_LONG_PRESS_RELEASE_Handler>:
+{
+    3880:	14d1      	push      	r4, r15
+	Dbg_Println(DBG_BIT_SYS_STATUS, "LONG_PRESS_RELEASE_Handler");
+    3882:	1033      	lrw      	r1, 0x4a9e	// 38cc <KEY1_LONG_PRESS_RELEASE_Handler+0x4c>
+    3884:	3000      	movi      	r0, 0
+    3886:	e3fffc69 	bsr      	0x3158	// 3158 <Dbg_Println>
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    388a:	1072      	lrw      	r3, 0x20000218	// 38d0 <KEY1_LONG_PRESS_RELEASE_Handler+0x50>
+    388c:	8367      	ld.b      	r3, (r3, 0x7)
+    388e:	3b40      	cmpnei      	r3, 0
+    3890:	1091      	lrw      	r4, 0x2000028c	// 38d4 <KEY1_LONG_PRESS_RELEASE_Handler+0x54>
+    3892:	0819      	bt      	0x38c4	// 38c4 <KEY1_LONG_PRESS_RELEASE_Handler+0x44>
+		if(READ_RLY_STATE != 0x00)
+    3894:	1071      	lrw      	r3, 0x20000048	// 38d8 <KEY1_LONG_PRESS_RELEASE_Handler+0x58>
+    3896:	3100      	movi      	r1, 0
+    3898:	9300      	ld.w      	r0, (r3, 0x0)
+    389a:	e3fff313 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    389e:	3840      	cmpnei      	r0, 0
+    38a0:	0c08      	bf      	0x38b0	// 38b0 <KEY1_LONG_PRESS_RELEASE_Handler+0x30>
+			RLY_Light_Ctrl(1);
+    38a2:	3001      	movi      	r0, 1
+    38a4:	e3ffffce 	bsr      	0x3840	// 3840 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Release RLY ON");
+    38a8:	102d      	lrw      	r1, 0x4ab9	// 38dc <KEY1_LONG_PRESS_RELEASE_Handler+0x5c>
+    38aa:	3000      	movi      	r0, 0
+    38ac:	e3fffc56 	bsr      	0x3158	// 3158 <Dbg_Println>
+		dm_in.DM_Tick = SysTick_1ms;
+    38b0:	106c      	lrw      	r3, 0x200000b4	// 38e0 <KEY1_LONG_PRESS_RELEASE_Handler+0x60>
+    38b2:	104d      	lrw      	r2, 0x2000028d	// 38e4 <KEY1_LONG_PRESS_RELEASE_Handler+0x64>
+    38b4:	9360      	ld.w      	r3, (r3, 0x0)
+    38b6:	4b28      	lsri      	r1, r3, 8
+    38b8:	a461      	st.b      	r3, (r4, 0x1)
+    38ba:	a221      	st.b      	r1, (r2, 0x1)
+    38bc:	4b30      	lsri      	r1, r3, 16
+    38be:	4b78      	lsri      	r3, r3, 24
+    38c0:	a222      	st.b      	r1, (r2, 0x2)
+    38c2:	a263      	st.b      	r3, (r2, 0x3)
+	dm_in.DM_State = 0x02;
+    38c4:	3302      	movi      	r3, 2
+    38c6:	a460      	st.b      	r3, (r4, 0x0)
+}
+    38c8:	1491      	pop      	r4, r15
+    38ca:	0000      	bkpt
+    38cc:	00004a9e 	.long	0x00004a9e
+    38d0:	20000218 	.long	0x20000218
+    38d4:	2000028c 	.long	0x2000028c
+    38d8:	20000048 	.long	0x20000048
+    38dc:	00004ab9 	.long	0x00004ab9
+    38e0:	200000b4 	.long	0x200000b4
+    38e4:	2000028d 	.long	0x2000028d
+
+Disassembly of section .text.LogicCtrl_Init:
+
+000038e8 <LogicCtrl_Init>:
+{
+    38e8:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOB0,CARD_SENS_PIN,Output);			//CARD_SENS
+    38ea:	108b      	lrw      	r4, 0x20000048	// 3914 <LogicCtrl_Init+0x2c>
+    38ec:	3200      	movi      	r2, 0
+    38ee:	9400      	ld.w      	r0, (r4, 0x0)
+    38f0:	3101      	movi      	r1, 1
+    38f2:	e3fff24b 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	CTRL_CARD_OUT;
+    38f6:	9400      	ld.w      	r0, (r4, 0x0)
+    38f8:	3101      	movi      	r1, 1
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    38fa:	1088      	lrw      	r4, 0x2000004c	// 3918 <LogicCtrl_Init+0x30>
+	CTRL_CARD_OUT;
+    38fc:	e3fff2cb 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    3900:	3200      	movi      	r2, 0
+    3902:	9400      	ld.w      	r0, (r4, 0x0)
+    3904:	3101      	movi      	r1, 1
+    3906:	e3fff241 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    390a:	9400      	ld.w      	r0, (r4, 0x0)
+    390c:	3101      	movi      	r1, 1
+    390e:	e3fff2c2 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+}
+    3912:	1491      	pop      	r4, r15
+    3914:	20000048 	.long	0x20000048
+    3918:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.LogicCtrl_Task:
+
+0000391c <LogicCtrl_Task>:
+{
+    391c:	14d4      	push      	r4-r7, r15
+	if (start_light == 0){
+    391e:	1195      	lrw      	r4, 0x200000d4	// 39f0 <LogicCtrl_Task+0xd4>
+    3920:	8464      	ld.b      	r3, (r4, 0x4)
+    3922:	3b40      	cmpnei      	r3, 0
+    3924:	11b4      	lrw      	r5, 0x20000218	// 39f4 <LogicCtrl_Task+0xd8>
+    3926:	0813      	bt      	0x394c	// 394c <LogicCtrl_Task+0x30>
+		start_light++;									//start_light == 1,表示上电后首次进入（有插卡）
+    3928:	3301      	movi      	r3, 1
+    392a:	a464      	st.b      	r3, (r4, 0x4)
+		if (CardInfo.BlockSucc==BLOCK_READ_FAILD){
+    392c:	8567      	ld.b      	r3, (r5, 0x7)
+    392e:	3b40      	cmpnei      	r3, 0
+    3930:	080e      	bt      	0x394c	// 394c <LogicCtrl_Task+0x30>
+			GPIO_Init(GPIOA0,0,Output);
+    3932:	11d2      	lrw      	r6, 0x2000004c	// 39f8 <LogicCtrl_Task+0xdc>
+    3934:	3200      	movi      	r2, 0
+    3936:	3100      	movi      	r1, 0
+    3938:	9600      	ld.w      	r0, (r6, 0x0)
+    393a:	e3fff227 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+			GPIO_Write_High(GPIOA0,0);
+    393e:	9600      	ld.w      	r0, (r6, 0x0)
+    3940:	3100      	movi      	r1, 0
+    3942:	e3fff2a4 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+			start_light++;								//start_light == 2,表示上电后首次进入时未插卡     目前可能上电时有插卡也意外进入
+    3946:	8464      	ld.b      	r3, (r4, 0x4)
+    3948:	2300      	addi      	r3, 1
+    394a:	a464      	st.b      	r3, (r4, 0x4)
+	if((CardInfo.BlockSucc==BLOCK_READ_SUCC) && (READ_CARD_STATE == 0))
+    394c:	8567      	ld.b      	r3, (r5, 0x7)
+    394e:	3b41      	cmpnei      	r3, 1
+    3950:	0836      	bt      	0x39bc	// 39bc <LogicCtrl_Task+0xa0>
+    3952:	11cb      	lrw      	r6, 0x20000048	// 39fc <LogicCtrl_Task+0xe0>
+    3954:	3101      	movi      	r1, 1
+    3956:	9600      	ld.w      	r0, (r6, 0x0)
+    3958:	e3fff2b4 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    395c:	3840      	cmpnei      	r0, 0
+    395e:	082f      	bt      	0x39bc	// 39bc <LogicCtrl_Task+0xa0>
+		CTRL_CARD_IN;
+    3960:	3101      	movi      	r1, 1
+    3962:	9600      	ld.w      	r0, (r6, 0x0)
+    3964:	e3fff293 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_IN,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    3968:	1166      	lrw      	r3, 0x200000b4	// 3a00 <LogicCtrl_Task+0xe4>
+    396a:	3101      	movi      	r1, 1
+    396c:	9600      	ld.w      	r0, (r6, 0x0)
+    396e:	93e0      	ld.w      	r7, (r3, 0x0)
+    3970:	e3fff2a8 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    3974:	6cc3      	mov      	r3, r0
+    3976:	6c9f      	mov      	r2, r7
+    3978:	1123      	lrw      	r1, 0x4acb	// 3a04 <LogicCtrl_Task+0xe8>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_OUT,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    397a:	3000      	movi      	r0, 0
+    397c:	e3fffbee 	bsr      	0x3158	// 3158 <Dbg_Println>
+	if ((CardInfo.BlockSucc==BLOCK_READ_SUCC) && ((start_light > 0)&&(start_light <= 2)) ){ 
+    3980:	8567      	ld.b      	r3, (r5, 0x7)
+    3982:	3b41      	cmpnei      	r3, 1
+    3984:	080a      	bt      	0x3998	// 3998 <LogicCtrl_Task+0x7c>
+    3986:	8444      	ld.b      	r2, (r4, 0x4)
+    3988:	5a63      	subi      	r3, r2, 1
+    398a:	74cc      	zextb      	r3, r3
+    398c:	3b01      	cmphsi      	r3, 2
+    398e:	0805      	bt      	0x3998	// 3998 <LogicCtrl_Task+0x7c>
+		if (start_light > 1){       //上电后首次进入时未插卡 
+    3990:	3a42      	cmpnei      	r2, 2
+    3992:	082d      	bt      	0x39ec	// 39ec <LogicCtrl_Task+0xd0>
+			start_light = 3;							//start_light == 3,表示从上电后首次进入未插卡状态转为有插卡状态
+    3994:	3303      	movi      	r3, 3
+			start_light = 10;							//start_light == 10,表示从首次上电时有插卡，变成这个值后不再进入上电判断
+    3996:	a464      	st.b      	r3, (r4, 0x4)
+	if ((start_light>=3)&&(start_light<=6)){
+    3998:	8464      	ld.b      	r3, (r4, 0x4)
+    399a:	5b4b      	subi      	r2, r3, 3
+    399c:	7488      	zextb      	r2, r2
+    399e:	3a03      	cmphsi      	r2, 4
+    39a0:	080d      	bt      	0x39ba	// 39ba <LogicCtrl_Task+0x9e>
+		start_light++;										
+    39a2:	2300      	addi      	r3, 1
+    39a4:	74cc      	zextb      	r3, r3
+		if (start_light>5){								//延时进入
+    39a6:	3b05      	cmphsi      	r3, 6
+		start_light++;										
+    39a8:	a464      	st.b      	r3, (r4, 0x4)
+		if (start_light>5){								//延时进入
+    39aa:	0c08      	bf      	0x39ba	// 39ba <LogicCtrl_Task+0x9e>
+			GPIO_Write_Low(GPIOA0,0);
+    39ac:	1073      	lrw      	r3, 0x2000004c	// 39f8 <LogicCtrl_Task+0xdc>
+    39ae:	3100      	movi      	r1, 0
+    39b0:	9300      	ld.w      	r0, (r3, 0x0)
+    39b2:	e3fff270 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+			start_light = 11;							//start_light == 11,表示从上电后首次进入未插卡状态转为有插卡状态
+    39b6:	330b      	movi      	r3, 11
+    39b8:	a464      	st.b      	r3, (r4, 0x4)
+}
+    39ba:	1494      	pop      	r4-r7, r15
+	else if((CardInfo.BlockSucc==BLOCK_READ_FAILD) && (READ_CARD_STATE == 1))
+    39bc:	8567      	ld.b      	r3, (r5, 0x7)
+    39be:	3b40      	cmpnei      	r3, 0
+    39c0:	0be0      	bt      	0x3980	// 3980 <LogicCtrl_Task+0x64>
+    39c2:	10cf      	lrw      	r6, 0x20000048	// 39fc <LogicCtrl_Task+0xe0>
+    39c4:	3101      	movi      	r1, 1
+    39c6:	9600      	ld.w      	r0, (r6, 0x0)
+    39c8:	e3fff27c 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    39cc:	3841      	cmpnei      	r0, 1
+    39ce:	0bd9      	bt      	0x3980	// 3980 <LogicCtrl_Task+0x64>
+		CTRL_CARD_OUT;
+    39d0:	3101      	movi      	r1, 1
+    39d2:	9600      	ld.w      	r0, (r6, 0x0)
+    39d4:	e3fff25f 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "SysTick_1ms:%d,CTRL_CARD_OUT,Card Pin State:%d",SysTick_1ms,READ_CARD_STATE);
+    39d8:	106a      	lrw      	r3, 0x200000b4	// 3a00 <LogicCtrl_Task+0xe4>
+    39da:	3101      	movi      	r1, 1
+    39dc:	9600      	ld.w      	r0, (r6, 0x0)
+    39de:	93e0      	ld.w      	r7, (r3, 0x0)
+    39e0:	e3fff270 	bsr      	0x1ec0	// 1ec0 <GPIO_Read_Output>
+    39e4:	6cc3      	mov      	r3, r0
+    39e6:	6c9f      	mov      	r2, r7
+    39e8:	1028      	lrw      	r1, 0x4af9	// 3a08 <LogicCtrl_Task+0xec>
+    39ea:	07c8      	br      	0x397a	// 397a <LogicCtrl_Task+0x5e>
+			start_light = 10;							//start_light == 10,表示从首次上电时有插卡，变成这个值后不再进入上电判断
+    39ec:	330a      	movi      	r3, 10
+    39ee:	07d4      	br      	0x3996	// 3996 <LogicCtrl_Task+0x7a>
+    39f0:	200000d4 	.long	0x200000d4
+    39f4:	20000218 	.long	0x20000218
+    39f8:	2000004c 	.long	0x2000004c
+    39fc:	20000048 	.long	0x20000048
+    3a00:	200000b4 	.long	0x200000b4
+    3a04:	00004acb 	.long	0x00004acb
+    3a08:	00004af9 	.long	0x00004af9
+
+Disassembly of section .text.LogicCtrl_NoRF_Init:
+
+00003a0c <LogicCtrl_NoRF_Init>:
+{
+    3a0c:	14d1      	push      	r4, r15
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    3a0e:	1097      	lrw      	r4, 0x2000004c	// 3a68 <LogicCtrl_NoRF_Init+0x5c>
+	memset(&dm_in,0,sizeof(DM_IN_INF));
+    3a10:	3209      	movi      	r2, 9
+    3a12:	3100      	movi      	r1, 0
+    3a14:	1016      	lrw      	r0, 0x2000028c	// 3a6c <LogicCtrl_NoRF_Init+0x60>
+    3a16:	e3ffefa7 	bsr      	0x1964	// 1964 <__memset_fast>
+	GPIO_Init(GPIOA0,DM_IN_PIN,Intput);	        //DM_IN
+    3a1a:	9400      	ld.w      	r0, (r4, 0x0)
+    3a1c:	3201      	movi      	r2, 1
+    3a1e:	3103      	movi      	r1, 3
+    3a20:	e3fff1b4 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Init(GPIOA0,LED_INPUT_PIN,Output);	        //LED_IN
+    3a24:	3200      	movi      	r2, 0
+    3a26:	9400      	ld.w      	r0, (r4, 0x0)
+    3a28:	3101      	movi      	r1, 1
+    3a2a:	e3fff1af 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,LED_INPUT_PIN);
+    3a2e:	9400      	ld.w      	r0, (r4, 0x0)
+    3a30:	3101      	movi      	r1, 1
+    3a32:	e3fff230 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	GPIO_Init(GPIOA0,BACKLIGHT_PIN,Output);			//blacklight
+    3a36:	3200      	movi      	r2, 0
+    3a38:	9400      	ld.w      	r0, (r4, 0x0)
+    3a3a:	3100      	movi      	r1, 0
+    3a3c:	e3fff1a6 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+	GPIO_Write_Low(GPIOA0,BACKLIGHT_PIN);			//初始拉低断开，插卡拉高打开
+    3a40:	9400      	ld.w      	r0, (r4, 0x0)
+    3a42:	3100      	movi      	r1, 0
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    3a44:	108b      	lrw      	r4, 0x2000025c	// 3a70 <LogicCtrl_NoRF_Init+0x64>
+	GPIO_Write_Low(GPIOA0,BACKLIGHT_PIN);			//初始拉低断开，插卡拉高打开
+    3a46:	e3fff226 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	button_init(&KEY1, read_button_GPIO, 0, DM_IN_PIN);
+    3a4a:	3303      	movi      	r3, 3
+    3a4c:	6c13      	mov      	r0, r4
+    3a4e:	3200      	movi      	r2, 0
+    3a50:	1029      	lrw      	r1, 0x3fb4	// 3a74 <LogicCtrl_NoRF_Init+0x68>
+    3a52:	e00001df 	bsr      	0x3e10	// 3e10 <button_init>
+	button_attach(&KEY1, LONG_PRESS_RELEASE, KEY1_LONG_PRESS_RELEASE_Handler);
+    3a56:	1049      	lrw      	r2, 0x3880	// 3a78 <LogicCtrl_NoRF_Init+0x6c>
+    3a58:	3107      	movi      	r1, 7
+    3a5a:	6c13      	mov      	r0, r4
+    3a5c:	e00001f7 	bsr      	0x3e4a	// 3e4a <button_attach>
+	button_start(&KEY1);
+    3a60:	6c13      	mov      	r0, r4
+    3a62:	e0000289 	bsr      	0x3f74	// 3f74 <button_start>
+}
+    3a66:	1491      	pop      	r4, r15
+    3a68:	2000004c 	.long	0x2000004c
+    3a6c:	2000028c 	.long	0x2000028c
+    3a70:	2000025c 	.long	0x2000025c
+    3a74:	00003fb4 	.long	0x00003fb4
+    3a78:	00003880 	.long	0x00003880
+
+Disassembly of section .text.LogicCtrl_NoRF_Task:
+
+00003a7c <LogicCtrl_NoRF_Task>:
+{
+    3a7c:	14d3      	push      	r4-r6, r15
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    3a7e:	3301      	movi      	r3, 1
+    3a80:	11c9      	lrw      	r6, 0x20000218	// 3b24 <LogicCtrl_NoRF_Task+0xa8>
+	if(SysTick_1ms - test_tick > 5)
+    3a82:	118a      	lrw      	r4, 0x200000b4	// 3b28 <LogicCtrl_NoRF_Task+0xac>
+    3a84:	11aa      	lrw      	r5, 0x200000d4	// 3b2c <LogicCtrl_NoRF_Task+0xb0>
+	CardInfo.CTR_PLYFlag = CTR_State_Flag;
+    3a86:	a660      	st.b      	r3, (r6, 0x0)
+	if(SysTick_1ms - test_tick > 5)
+    3a88:	9542      	ld.w      	r2, (r5, 0x8)
+    3a8a:	9460      	ld.w      	r3, (r4, 0x0)
+    3a8c:	60ca      	subu      	r3, r2
+    3a8e:	3b05      	cmphsi      	r3, 6
+    3a90:	0c05      	bf      	0x3a9a	// 3a9a <LogicCtrl_NoRF_Task+0x1e>
+		test_tick = SysTick_1ms;
+    3a92:	9460      	ld.w      	r3, (r4, 0x0)
+    3a94:	b562      	st.w      	r3, (r5, 0x8)
+		button_ticks();
+    3a96:	e0000281 	bsr      	0x3f98	// 3f98 <button_ticks>
+	if(CardInfo.BlockSucc == BLOCK_READ_SUCC)
+    3a9a:	8667      	ld.b      	r3, (r6, 0x7)
+    3a9c:	3b41      	cmpnei      	r3, 1
+    3a9e:	0830      	bt      	0x3afe	// 3afe <LogicCtrl_NoRF_Task+0x82>
+		RLY_Light_Ctrl(1);
+    3aa0:	3001      	movi      	r0, 1
+    3aa2:	e3fffecf 	bsr      	0x3840	// 3840 <RLY_Light_Ctrl>
+		card_tick = SysTick_1ms;
+    3aa6:	9460      	ld.w      	r3, (r4, 0x0)
+    3aa8:	b563      	st.w      	r3, (r5, 0xc)
+		dm_in.DM_State = 0x00;
+    3aaa:	3200      	movi      	r2, 0
+    3aac:	1161      	lrw      	r3, 0x2000028c	// 3b30 <LogicCtrl_NoRF_Task+0xb4>
+    3aae:	a340      	st.b      	r2, (r3, 0x0)
+	if(CardInfo.BlockSucc == BLOCK_READ_FAILD)
+    3ab0:	8667      	ld.b      	r3, (r6, 0x7)
+    3ab2:	3b40      	cmpnei      	r3, 0
+    3ab4:	0824      	bt      	0x3afc	// 3afc <LogicCtrl_NoRF_Task+0x80>
+		if((dm_in.DM_State == 0x02) && (SysTick_1ms - dm_in.DM_Tick >= 30000))
+    3ab6:	107f      	lrw      	r3, 0x2000028c	// 3b30 <LogicCtrl_NoRF_Task+0xb4>
+    3ab8:	8340      	ld.b      	r2, (r3, 0x0)
+    3aba:	3a42      	cmpnei      	r2, 2
+    3abc:	0820      	bt      	0x3afc	// 3afc <LogicCtrl_NoRF_Task+0x80>
+    3abe:	8322      	ld.b      	r1, (r3, 0x2)
+    3ac0:	8341      	ld.b      	r2, (r3, 0x1)
+    3ac2:	4128      	lsli      	r1, r1, 8
+    3ac4:	6c48      	or      	r1, r2
+    3ac6:	8343      	ld.b      	r2, (r3, 0x3)
+    3ac8:	4250      	lsli      	r2, r2, 16
+    3aca:	6c48      	or      	r1, r2
+    3acc:	8344      	ld.b      	r2, (r3, 0x4)
+    3ace:	4258      	lsli      	r2, r2, 24
+    3ad0:	6c84      	or      	r2, r1
+    3ad2:	9400      	ld.w      	r0, (r4, 0x0)
+    3ad4:	600a      	subu      	r0, r2
+    3ad6:	1058      	lrw      	r2, 0x752f	// 3b34 <LogicCtrl_NoRF_Task+0xb8>
+    3ad8:	6408      	cmphs      	r2, r0
+    3ada:	0811      	bt      	0x3afc	// 3afc <LogicCtrl_NoRF_Task+0x80>
+			dm_in.DM_Tick = SysTick_1ms;
+    3adc:	9440      	ld.w      	r2, (r4, 0x0)
+    3ade:	5b22      	addi      	r1, r3, 1
+    3ae0:	a341      	st.b      	r2, (r3, 0x1)
+    3ae2:	4a68      	lsri      	r3, r2, 8
+    3ae4:	a161      	st.b      	r3, (r1, 0x1)
+			RLY_Light_Ctrl(0);
+    3ae6:	3000      	movi      	r0, 0
+			dm_in.DM_Tick = SysTick_1ms;
+    3ae8:	4a70      	lsri      	r3, r2, 16
+    3aea:	4a58      	lsri      	r2, r2, 24
+    3aec:	a162      	st.b      	r3, (r1, 0x2)
+    3aee:	a143      	st.b      	r2, (r1, 0x3)
+			RLY_Light_Ctrl(0);
+    3af0:	e3fffea8 	bsr      	0x3840	// 3840 <RLY_Light_Ctrl>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "DM Delay RLY OFF");
+    3af4:	1031      	lrw      	r1, 0x4b3b	// 3b38 <LogicCtrl_NoRF_Task+0xbc>
+    3af6:	3000      	movi      	r0, 0
+    3af8:	e3fffb30 	bsr      	0x3158	// 3158 <Dbg_Println>
+}
+    3afc:	1493      	pop      	r4-r6, r15
+	else if((CardInfo.BlockSucc == BLOCK_READ_FAILD) && (dm_in.DM_State == 0x00) && (SysTick_1ms - card_tick >= CTR_State_Tick))
+    3afe:	3b40      	cmpnei      	r3, 0
+    3b00:	0bd8      	bt      	0x3ab0	// 3ab0 <LogicCtrl_NoRF_Task+0x34>
+    3b02:	106c      	lrw      	r3, 0x2000028c	// 3b30 <LogicCtrl_NoRF_Task+0xb4>
+    3b04:	8360      	ld.b      	r3, (r3, 0x0)
+    3b06:	3b40      	cmpnei      	r3, 0
+    3b08:	0bd4      	bt      	0x3ab0	// 3ab0 <LogicCtrl_NoRF_Task+0x34>
+    3b0a:	9543      	ld.w      	r2, (r5, 0xc)
+    3b0c:	9460      	ld.w      	r3, (r4, 0x0)
+    3b0e:	60ca      	subu      	r3, r2
+    3b10:	1049      	lrw      	r2, 0x752f	// 3b34 <LogicCtrl_NoRF_Task+0xb8>
+    3b12:	64c8      	cmphs      	r2, r3
+    3b14:	0bce      	bt      	0x3ab0	// 3ab0 <LogicCtrl_NoRF_Task+0x34>
+		card_tick = SysTick_1ms;
+    3b16:	9460      	ld.w      	r3, (r4, 0x0)
+		RLY_Light_Ctrl(0);
+    3b18:	3000      	movi      	r0, 0
+		card_tick = SysTick_1ms;
+    3b1a:	b563      	st.w      	r3, (r5, 0xc)
+		RLY_Light_Ctrl(0);
+    3b1c:	e3fffe92 	bsr      	0x3840	// 3840 <RLY_Light_Ctrl>
+    3b20:	07c8      	br      	0x3ab0	// 3ab0 <LogicCtrl_NoRF_Task+0x34>
+    3b22:	0000      	bkpt
+    3b24:	20000218 	.long	0x20000218
+    3b28:	200000b4 	.long	0x200000b4
+    3b2c:	200000d4 	.long	0x200000d4
+    3b30:	2000028c 	.long	0x2000028c
+    3b34:	0000752f 	.long	0x0000752f
+    3b38:	00004b3b 	.long	0x00004b3b
+
+Disassembly of section .text.BackLight_Task:
+
+00003b3c <BackLight_Task>:
+	if (CardInfo.BlockSucc == BLOCK_READ_SUCC) 
+    3b3c:	1067      	lrw      	r3, 0x20000218	// 3b58 <BackLight_Task+0x1c>
+    3b3e:	8367      	ld.b      	r3, (r3, 0x7)
+    3b40:	3b41      	cmpnei      	r3, 1
+    3b42:	1067      	lrw      	r3, 0x20000024	// 3b5c <BackLight_Task+0x20>
+    3b44:	0806      	bt      	0x3b50	// 3b50 <BackLight_Task+0x14>
+        GPT0->CMPA = 2000;
+    3b46:	9340      	ld.w      	r2, (r3, 0x0)
+    3b48:	33fa      	movi      	r3, 250
+    3b4a:	4363      	lsli      	r3, r3, 3
+    3b4c:	b26b      	st.w      	r3, (r2, 0x2c)
+}
+    3b4e:	783c      	jmp      	r15
+        GPT0->CMPA = 0;
+    3b50:	9360      	ld.w      	r3, (r3, 0x0)
+    3b52:	3200      	movi      	r2, 0
+    3b54:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    3b56:	07fc      	br      	0x3b4e	// 3b4e <BackLight_Task+0x12>
+    3b58:	20000218 	.long	0x20000218
+    3b5c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.Detect_WIFI_Task:
+
+00003b60 <Detect_WIFI_Task>:
+void Detect_WIFI_Task(void){
+    3b60:	14d1      	push      	r4, r15
+	if (finish_flag == 1) return;
+    3b62:	107c      	lrw      	r3, 0x2000009e	// 3bd0 <Detect_WIFI_Task+0x70>
+    3b64:	8340      	ld.b      	r2, (r3, 0x0)
+    3b66:	3a41      	cmpnei      	r2, 1
+    3b68:	0c1c      	bf      	0x3ba0	// 3ba0 <Detect_WIFI_Task+0x40>
+	if (detect_count <10) {
+    3b6a:	109b      	lrw      	r4, 0x200000a8	// 3bd4 <Detect_WIFI_Task+0x74>
+    3b6c:	8440      	ld.b      	r2, (r4, 0x0)
+    3b6e:	3a09      	cmphsi      	r2, 10
+    3b70:	081c      	bt      	0x3ba8	// 3ba8 <Detect_WIFI_Task+0x48>
+		if(SysTick_1ms - detect_tick >= 10) {
+    3b72:	103a      	lrw      	r1, 0x200000b4	// 3bd8 <Detect_WIFI_Task+0x78>
+    3b74:	105a      	lrw      	r2, 0x200000a4	// 3bdc <Detect_WIFI_Task+0x7c>
+    3b76:	9160      	ld.w      	r3, (r1, 0x0)
+    3b78:	9200      	ld.w      	r0, (r2, 0x0)
+    3b7a:	60c2      	subu      	r3, r0
+    3b7c:	3b09      	cmphsi      	r3, 10
+    3b7e:	0c11      	bf      	0x3ba0	// 3ba0 <Detect_WIFI_Task+0x40>
+			detect_tick = SysTick_1ms;
+    3b80:	9160      	ld.w      	r3, (r1, 0x0)
+    3b82:	b260      	st.w      	r3, (r2, 0x0)
+			rf_exist = GPIO_Read_Status(GPIOB0,DET_RF_MODULE_PIN);
+    3b84:	3102      	movi      	r1, 2
+    3b86:	1077      	lrw      	r3, 0x20000048	// 3be0 <Detect_WIFI_Task+0x80>
+    3b88:	9300      	ld.w      	r0, (r3, 0x0)
+    3b8a:	e3fff193 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+    3b8e:	1076      	lrw      	r3, 0x2000009c	// 3be4 <Detect_WIFI_Task+0x84>
+    3b90:	a300      	st.b      	r0, (r3, 0x0)
+			if (last_state != rf_exist) {
+    3b92:	1076      	lrw      	r3, 0x2000009d	// 3be8 <Detect_WIFI_Task+0x88>
+    3b94:	8340      	ld.b      	r2, (r3, 0x0)
+    3b96:	640a      	cmpne      	r2, r0
+    3b98:	0c05      	bf      	0x3ba2	// 3ba2 <Detect_WIFI_Task+0x42>
+				last_state = rf_exist;
+    3b9a:	a300      	st.b      	r0, (r3, 0x0)
+				detect_count = 0;
+    3b9c:	3300      	movi      	r3, 0
+				detect_count++;
+    3b9e:	a460      	st.b      	r3, (r4, 0x0)
+}
+    3ba0:	1491      	pop      	r4, r15
+				detect_count++;
+    3ba2:	8460      	ld.b      	r3, (r4, 0x0)
+    3ba4:	2300      	addi      	r3, 1
+    3ba6:	07fc      	br      	0x3b9e	// 3b9e <Detect_WIFI_Task+0x3e>
+		finish_flag = 1;
+    3ba8:	3201      	movi      	r2, 1
+    3baa:	a340      	st.b      	r2, (r3, 0x0)
+		if(rf_exist == 0x01)       //不带无线模块初始化
+    3bac:	106e      	lrw      	r3, 0x2000009c	// 3be4 <Detect_WIFI_Task+0x84>
+    3bae:	8360      	ld.b      	r3, (r3, 0x0)
+    3bb0:	3b41      	cmpnei      	r3, 1
+    3bb2:	0808      	bt      	0x3bc2	// 3bc2 <Detect_WIFI_Task+0x62>
+			LogicCtrl_NoRF_Init(); 
+    3bb4:	e3ffff2c 	bsr      	0x3a0c	// 3a0c <LogicCtrl_NoRF_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "NoRF");
+    3bb8:	102d      	lrw      	r1, 0x4b4c	// 3bec <Detect_WIFI_Task+0x8c>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    3bba:	3000      	movi      	r0, 0
+    3bbc:	e3ffface 	bsr      	0x3158	// 3158 <Dbg_Println>
+    3bc0:	07f0      	br      	0x3ba0	// 3ba0 <Detect_WIFI_Task+0x40>
+		else if(rf_exist == 0x00)  //带无线模块初始化
+    3bc2:	3b40      	cmpnei      	r3, 0
+    3bc4:	0bee      	bt      	0x3ba0	// 3ba0 <Detect_WIFI_Task+0x40>
+			LogicCtrl_Init();   
+    3bc6:	e3fffe91 	bsr      	0x38e8	// 38e8 <LogicCtrl_Init>
+			Dbg_Println(DBG_BIT_SYS_STATUS, "RF");  
+    3bca:	102a      	lrw      	r1, 0x4b4e	// 3bf0 <Detect_WIFI_Task+0x90>
+    3bcc:	07f7      	br      	0x3bba	// 3bba <Detect_WIFI_Task+0x5a>
+    3bce:	0000      	bkpt
+    3bd0:	2000009e 	.long	0x2000009e
+    3bd4:	200000a8 	.long	0x200000a8
+    3bd8:	200000b4 	.long	0x200000b4
+    3bdc:	200000a4 	.long	0x200000a4
+    3be0:	20000048 	.long	0x20000048
+    3be4:	2000009c 	.long	0x2000009c
+    3be8:	2000009d 	.long	0x2000009d
+    3bec:	00004b4c 	.long	0x00004b4c
+    3bf0:	00004b4e 	.long	0x00004b4e
+
+Disassembly of section .text.Led_Task:
+
+00003bf4 <Led_Task>:
+void Led_Task(void){
+    3bf4:	14d1      	push      	r4, r15
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    3bf6:	1074      	lrw      	r3, 0x20000238	// 3c44 <Led_Task+0x50>
+    3bf8:	8368      	ld.b      	r3, (r3, 0x8)
+    3bfa:	3b41      	cmpnei      	r3, 1
+    3bfc:	1073      	lrw      	r3, 0x2000028c	// 3c48 <Led_Task+0x54>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    3bfe:	8326      	ld.b      	r1, (r3, 0x6)
+    3c00:	8345      	ld.b      	r2, (r3, 0x5)
+    3c02:	4128      	lsli      	r1, r1, 8
+    3c04:	6c48      	or      	r1, r2
+    3c06:	8347      	ld.b      	r2, (r3, 0x7)
+    3c08:	4250      	lsli      	r2, r2, 16
+    3c0a:	6c48      	or      	r1, r2
+    3c0c:	8348      	ld.b      	r2, (r3, 0x8)
+    3c0e:	1010      	lrw      	r0, 0x200000b4	// 3c4c <Led_Task+0x58>
+    3c10:	4258      	lsli      	r2, r2, 24
+    3c12:	9080      	ld.w      	r4, (r0, 0x0)
+    3c14:	6c84      	or      	r2, r1
+    3c16:	610a      	subu      	r4, r2
+		if (CardInfo.RC522_Reset_Falg == 1) 
+    3c18:	0813      	bt      	0x3c3e	// 3c3e <Led_Task+0x4a>
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 100) 
+    3c1a:	3263      	movi      	r2, 99
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    3c1c:	6508      	cmphs      	r2, r4
+    3c1e:	080f      	bt      	0x3c3c	// 3c3c <Led_Task+0x48>
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    3c20:	9040      	ld.w      	r2, (r0, 0x0)
+    3c22:	5b32      	addi      	r1, r3, 5
+    3c24:	a345      	st.b      	r2, (r3, 0x5)
+    3c26:	4a68      	lsri      	r3, r2, 8
+    3c28:	a161      	st.b      	r3, (r1, 0x1)
+    3c2a:	4a70      	lsri      	r3, r2, 16
+    3c2c:	a162      	st.b      	r3, (r1, 0x2)
+    3c2e:	4a58      	lsri      	r2, r2, 24
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    3c30:	1068      	lrw      	r3, 0x2000004c	// 3c50 <Led_Task+0x5c>
+    3c32:	9300      	ld.w      	r0, (r3, 0x0)
+				dm_in.DM_Led_Tick = SysTick_1ms;
+    3c34:	a143      	st.b      	r2, (r1, 0x3)
+				GPIO_Reverse(GPIOA0,LED_INPUT_PIN);	
+    3c36:	3101      	movi      	r1, 1
+    3c38:	e3fff131 	bsr      	0x1e9a	// 1e9a <GPIO_Reverse>
+}
+    3c3c:	1491      	pop      	r4, r15
+			if (SysTick_1ms - dm_in.DM_Led_Tick >= 500) 
+    3c3e:	1046      	lrw      	r2, 0x1f3	// 3c54 <Led_Task+0x60>
+    3c40:	07ee      	br      	0x3c1c	// 3c1c <Led_Task+0x28>
+    3c42:	0000      	bkpt
+    3c44:	20000238 	.long	0x20000238
+    3c48:	2000028c 	.long	0x2000028c
+    3c4c:	200000b4 	.long	0x200000b4
+    3c50:	2000004c 	.long	0x2000004c
+    3c54:	000001f3 	.long	0x000001f3
+
+Disassembly of section .text.CRC16:
+
+00003c58 <CRC16>:
+{
+    3c58:	14c3      	push      	r4-r6
+    3c5a:	6cc3      	mov      	r3, r0
+    3c5c:	6040      	addu      	r1, r0
+			if( xdabit ) xda ^= xdapoly;
+    3c5e:	10ac      	lrw      	r5, 0xffffa001	// 3c8c <CRC16+0x34>
+    xda = 0xFFFF;
+    3c60:	100c      	lrw      	r0, 0xffff	// 3c90 <CRC16+0x38>
+    for(i=0;i<len;i++) 
+    3c62:	644e      	cmpne      	r3, r1
+    3c64:	0802      	bt      	0x3c68	// 3c68 <CRC16+0x10>
+}
+    3c66:	1483      	pop      	r4-r6
+		xda ^= aStr[i];
+    3c68:	8340      	ld.b      	r2, (r3, 0x0)
+    3c6a:	6c09      	xor      	r0, r2
+			xdabit = (U8_T)(xda & 0x01);
+    3c6c:	3601      	movi      	r6, 1
+		xda ^= aStr[i];
+    3c6e:	3208      	movi      	r2, 8
+			if( xdabit ) xda ^= xdapoly;
+    3c70:	6d03      	mov      	r4, r0
+    3c72:	6918      	and      	r4, r6
+    3c74:	3c40      	cmpnei      	r4, 0
+    3c76:	4801      	lsri      	r0, r0, 1
+    3c78:	0c03      	bf      	0x3c7e	// 3c7e <CRC16+0x26>
+    3c7a:	6c15      	xor      	r0, r5
+    3c7c:	7401      	zexth      	r0, r0
+    3c7e:	2a00      	subi      	r2, 1
+    3c80:	7489      	zexth      	r2, r2
+		for(j=0;j<8;j++) 
+    3c82:	3a40      	cmpnei      	r2, 0
+    3c84:	0bf6      	bt      	0x3c70	// 3c70 <CRC16+0x18>
+    3c86:	2300      	addi      	r3, 1
+    3c88:	07ed      	br      	0x3c62	// 3c62 <CRC16+0xa>
+    3c8a:	0000      	bkpt
+    3c8c:	ffffa001 	.long	0xffffa001
+    3c90:	0000ffff 	.long	0x0000ffff
+
+Disassembly of section .text.Read_Version_Ack:
+
+00003c94 <Read_Version_Ack>:
+{
+    3c94:	14d1      	push      	r4, r15
+    3c96:	1423      	subi      	r14, r14, 12
+	memset(data,0,sizeof(data));
+    3c98:	6c3b      	mov      	r0, r14
+    3c9a:	320c      	movi      	r2, 12
+    3c9c:	3100      	movi      	r1, 0
+    3c9e:	e3ffee63 	bsr      	0x1964	// 1964 <__memset_fast>
+	data[0] = 0x55;
+    3ca2:	3355      	movi      	r3, 85
+    3ca4:	dc6e0000 	st.b      	r3, (r14, 0x0)
+	data[1] = 0x55;
+    3ca8:	dc6e0001 	st.b      	r3, (r14, 0x1)
+	data[2] = 0xee;
+    3cac:	3300      	movi      	r3, 0
+    3cae:	2b11      	subi      	r3, 18
+    3cb0:	dc6e0002 	st.b      	r3, (r14, 0x2)
+	data[3] = 0x08;   //LENS
+    3cb4:	3308      	movi      	r3, 8
+    3cb6:	dc6e0003 	st.b      	r3, (r14, 0x3)
+	data[4] = 0x07;   //Type
+    3cba:	3307      	movi      	r3, 7
+    3cbc:	dc6e0004 	st.b      	r3, (r14, 0x4)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    3cc0:	3403      	movi      	r4, 3
+	data[6] = 0x05;   //Fun
+    3cc2:	3305      	movi      	r3, 5
+    3cc4:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    3cc8:	6138      	addu      	r4, r14
+	data[7] = Project_FW_Version;
+    3cca:	3302      	movi      	r3, 2
+    3ccc:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    3cd0:	3107      	movi      	r1, 7
+	data[8] = Project_HW_Version;
+    3cd2:	3304      	movi      	r3, 4
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    3cd4:	6c13      	mov      	r0, r4
+	data[8] = Project_HW_Version;
+    3cd6:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	data[lens-2] = CRC16(&data[3],lens-5)&0xff;
+    3cda:	e3ffffbf 	bsr      	0x3c58	// 3c58 <CRC16>
+    3cde:	dc0e000a 	st.b      	r0, (r14, 0xa)
+	data[lens-1] = (CRC16(&data[3],lens-5)>>8)&0xff;
+    3ce2:	3107      	movi      	r1, 7
+    3ce4:	6c13      	mov      	r0, r4
+    3ce6:	e3ffffb9 	bsr      	0x3c58	// 3c58 <CRC16>
+    3cea:	4808      	lsri      	r0, r0, 8
+	UARTTransmit(UART2,data,lens);
+    3cec:	1065      	lrw      	r3, 0x20000038	// 3d00 <Read_Version_Ack+0x6c>
+    3cee:	320c      	movi      	r2, 12
+	data[lens-1] = (CRC16(&data[3],lens-5)>>8)&0xff;
+    3cf0:	dc0e000b 	st.b      	r0, (r14, 0xb)
+	UARTTransmit(UART2,data,lens);
+    3cf4:	6c7b      	mov      	r1, r14
+    3cf6:	9300      	ld.w      	r0, (r3, 0x0)
+    3cf8:	e3fff310 	bsr      	0x2318	// 2318 <UARTTransmit>
+}
+    3cfc:	1403      	addi      	r14, r14, 12
+    3cfe:	1491      	pop      	r4, r15
+    3d00:	20000038 	.long	0x20000038
+
+Disassembly of section .text.Card_Recv_Pro:
+
+00003d04 <Card_Recv_Pro>:
+{
+    3d04:	14d2      	push      	r4-r5, r15
+	if((lens <= 4) || (data[3] != (lens - 3)))       //2024-11-11         增加长度判断,避免长度错误导致卡在ＣＲＣ校验循环里最终开门狗复位             
+    3d06:	3904      	cmphsi      	r1, 5
+{
+    3d08:	6d03      	mov      	r4, r0
+	if((lens <= 4) || (data[3] != (lens - 3)))       //2024-11-11         增加长度判断,避免长度错误导致卡在ＣＲＣ校验循环里最终开门狗复位             
+    3d0a:	0c05      	bf      	0x3d14	// 3d14 <Card_Recv_Pro+0x10>
+    3d0c:	8043      	ld.b      	r2, (r0, 0x3)
+    3d0e:	596b      	subi      	r3, r1, 3
+    3d10:	64ca      	cmpne      	r2, r3
+    3d12:	0c07      	bf      	0x3d20	// 3d20 <Card_Recv_Pro+0x1c>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Lens Err");
+    3d14:	103b      	lrw      	r1, 0x4b51	// 3d80 <Card_Recv_Pro+0x7c>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Head Err");
+    3d16:	3000      	movi      	r0, 0
+    3d18:	e3fffa20 	bsr      	0x3158	// 3158 <Dbg_Println>
+		return 1;
+    3d1c:	3001      	movi      	r0, 1
+}
+    3d1e:	1492      	pop      	r4-r5, r15
+	if((data[0] != 0x55) || (data[1] != 0x55) || (data[2] != 0xee))
+    3d20:	8060      	ld.b      	r3, (r0, 0x0)
+    3d22:	3255      	movi      	r2, 85
+    3d24:	648e      	cmpne      	r3, r2
+    3d26:	0808      	bt      	0x3d36	// 3d36 <Card_Recv_Pro+0x32>
+    3d28:	8041      	ld.b      	r2, (r0, 0x1)
+    3d2a:	64ca      	cmpne      	r2, r3
+    3d2c:	0805      	bt      	0x3d36	// 3d36 <Card_Recv_Pro+0x32>
+    3d2e:	8042      	ld.b      	r2, (r0, 0x2)
+    3d30:	33ee      	movi      	r3, 238
+    3d32:	64ca      	cmpne      	r2, r3
+    3d34:	0c03      	bf      	0x3d3a	// 3d3a <Card_Recv_Pro+0x36>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Head Err");
+    3d36:	1034      	lrw      	r1, 0x4b68	// 3d84 <Card_Recv_Pro+0x80>
+    3d38:	07ef      	br      	0x3d16	// 3d16 <Card_Recv_Pro+0x12>
+	if(data[4] != 0x07)
+    3d3a:	8064      	ld.b      	r3, (r0, 0x4)
+    3d3c:	3b47      	cmpnei      	r3, 7
+    3d3e:	0c03      	bf      	0x3d44	// 3d44 <Card_Recv_Pro+0x40>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro Type Err");
+    3d40:	1032      	lrw      	r1, 0x4b7f	// 3d88 <Card_Recv_Pro+0x84>
+    3d42:	07ea      	br      	0x3d16	// 3d16 <Card_Recv_Pro+0x12>
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+    3d44:	5864      	addu      	r3, r0, r1
+    3d46:	5b43      	subi      	r2, r3, 1
+    3d48:	82a0      	ld.b      	r5, (r2, 0x0)
+    3d4a:	2b01      	subi      	r3, 2
+    3d4c:	8340      	ld.b      	r2, (r3, 0x0)
+    3d4e:	45a8      	lsli      	r5, r5, 8
+	if(crc_temp != CRC16(&data[3],lens-5))
+    3d50:	2904      	subi      	r1, 5
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+    3d52:	6148      	addu      	r5, r2
+	if(crc_temp != CRC16(&data[3],lens-5))
+    3d54:	7445      	zexth      	r1, r1
+    3d56:	2002      	addi      	r0, 3
+    3d58:	e3ffff80 	bsr      	0x3c58	// 3c58 <CRC16>
+	crc_temp = (data[lens-1]<<8) +  data[lens-2];
+    3d5c:	7555      	zexth      	r5, r5
+	if(crc_temp != CRC16(&data[3],lens-5))
+    3d5e:	6416      	cmpne      	r5, r0
+    3d60:	6cc3      	mov      	r3, r0
+    3d62:	0c07      	bf      	0x3d70	// 3d70 <Card_Recv_Pro+0x6c>
+		Dbg_Println(DBG_BIT_SYS_STATUS, "Card_Recv_Pro CRC Err: %04X  %04X",crc_temp,CRC16(&data[3],lens-5));
+    3d64:	6c97      	mov      	r2, r5
+    3d66:	102a      	lrw      	r1, 0x4b96	// 3d8c <Card_Recv_Pro+0x88>
+    3d68:	3000      	movi      	r0, 0
+    3d6a:	e3fff9f7 	bsr      	0x3158	// 3158 <Dbg_Println>
+    3d6e:	07d7      	br      	0x3d1c	// 3d1c <Card_Recv_Pro+0x18>
+	switch(data[6])
+    3d70:	8466      	ld.b      	r3, (r4, 0x6)
+    3d72:	3b45      	cmpnei      	r3, 5
+    3d74:	0803      	bt      	0x3d7a	// 3d7a <Card_Recv_Pro+0x76>
+			Read_Version_Ack();
+    3d76:	e3ffff8f 	bsr      	0x3c94	// 3c94 <Read_Version_Ack>
+	return 0;
+    3d7a:	3000      	movi      	r0, 0
+    3d7c:	07d1      	br      	0x3d1e	// 3d1e <Card_Recv_Pro+0x1a>
+    3d7e:	0000      	bkpt
+    3d80:	00004b51 	.long	0x00004b51
+    3d84:	00004b68 	.long	0x00004b68
+    3d88:	00004b7f 	.long	0x00004b7f
+    3d8c:	00004b96 	.long	0x00004b96
+
+Disassembly of section .text.BLV_RLV_Ctrl_Init:
+
+00003d90 <BLV_RLV_Ctrl_Init>:
+{
+    3d90:	14d0      	push      	r15
+	GPIO_Init(GPIOB0,RLY_OUT_PIN,Output);
+    3d92:	1066      	lrw      	r3, 0x20000048	// 3da8 <BLV_RLV_Ctrl_Init+0x18>
+    3d94:	3200      	movi      	r2, 0
+    3d96:	9300      	ld.w      	r0, (r3, 0x0)
+    3d98:	3100      	movi      	r1, 0
+    3d9a:	e3ffeff7 	bsr      	0x1d88	// 1d88 <GPIO_Init>
+    3d9e:	3102      	movi      	r1, 2
+    3da0:	3000      	movi      	r0, 0
+    3da2:	e3fffd37 	bsr      	0x3810	// 3810 <BLV_RLY_Ctrl_Purpose.part.0>
+}
+    3da6:	1490      	pop      	r15
+    3da8:	20000048 	.long	0x20000048
+
+Disassembly of section .text.RLY_Direct_Control:
+
+00003dac <RLY_Direct_Control>:
+ * 功能2：无过零信号时直接控制继电器功能
+ * 
+ * 
+ ******************************************** */
+void RLY_Direct_Control(void)
+{
+    3dac:	14d3      	push      	r4-r6, r15
+	
+	if(SysTick_1ms - c_rly.rly_ctrl_tick >= 50)// 50ms
+    3dae:	1056      	lrw      	r2, 0x200000b4	// 3e04 <RLY_Direct_Control+0x58>
+    3db0:	1096      	lrw      	r4, 0x2000024c	// 3e08 <RLY_Direct_Control+0x5c>
+    3db2:	9260      	ld.w      	r3, (r2, 0x0)
+    3db4:	9421      	ld.w      	r1, (r4, 0x4)
+    3db6:	60c6      	subu      	r3, r1
+    3db8:	3131      	movi      	r1, 49
+    3dba:	64c4      	cmphs      	r1, r3
+    3dbc:	0805      	bt      	0x3dc6	// 3dc6 <RLY_Direct_Control+0x1a>
+	{
+		c_rly.rly_ctrl_tick = SysTick_1ms;
+    3dbe:	9260      	ld.w      	r3, (r2, 0x0)
+    3dc0:	b461      	st.w      	r3, (r4, 0x4)
+		if( (c_rly.rly_zCnt >= 2)&&(c_rly.rly_zCnt <= 5)){	//有过零信号
+			c_rly.rly_zero = 1;
+			c_rly.rly_zCnt = 0;
+    3dc2:	3300      	movi      	r3, 0
+    3dc4:	a461      	st.b      	r3, (r4, 0x1)
+			c_rly.rly_zCnt = 0;			
+		}
+	}
+	
+	//测试
+	c_rly.rly_zero = 0;
+    3dc6:	3300      	movi      	r3, 0
+    3dc8:	a460      	st.b      	r3, (r4, 0x0)
+	
+	if(c_rly.rly_control != 0x02) return;
+    3dca:	8462      	ld.b      	r3, (r4, 0x2)
+    3dcc:	3b42      	cmpnei      	r3, 2
+    3dce:	0812      	bt      	0x3df2	// 3df2 <RLY_Direct_Control+0x46>
+    3dd0:	3500      	movi      	r5, 0
+		switch (i) {
+			case CARD_RLY:
+				if (c_rly.rly_state[CARD_RLY] == Control_ON) {
+					CTRL_RLY_ON;
+				}else if (c_rly.rly_state[CARD_RLY] == Control_OFF) {
+					CTRL_RLY_OFF;
+    3dd2:	10cf      	lrw      	r6, 0x20000048	// 3e0c <RLY_Direct_Control+0x60>
+		switch (i) {
+    3dd4:	3d40      	cmpnei      	r5, 0
+    3dd6:	0808      	bt      	0x3de6	// 3de6 <RLY_Direct_Control+0x3a>
+				if (c_rly.rly_state[CARD_RLY] == Control_ON) {
+    3dd8:	8463      	ld.b      	r3, (r4, 0x3)
+    3dda:	3b41      	cmpnei      	r3, 1
+    3ddc:	080c      	bt      	0x3df4	// 3df4 <RLY_Direct_Control+0x48>
+					CTRL_RLY_ON;
+    3dde:	3100      	movi      	r1, 0
+    3de0:	9600      	ld.w      	r0, (r6, 0x0)
+    3de2:	e3fff058 	bsr      	0x1e92	// 1e92 <GPIO_Write_Low>
+	for (U8_T i = 0; i < 5; i++) {
+    3de6:	2500      	addi      	r5, 1
+    3de8:	7554      	zextb      	r5, r5
+    3dea:	3d45      	cmpnei      	r5, 5
+    3dec:	0bf4      	bt      	0x3dd4	// 3dd4 <RLY_Direct_Control+0x28>
+			break;
+		}
+
+	}	
+	
+	c_rly.rly_control = 0x00;
+    3dee:	3300      	movi      	r3, 0
+    3df0:	a462      	st.b      	r3, (r4, 0x2)
+}
+    3df2:	1493      	pop      	r4-r6, r15
+				}else if (c_rly.rly_state[CARD_RLY] == Control_OFF) {
+    3df4:	3b42      	cmpnei      	r3, 2
+    3df6:	0bf8      	bt      	0x3de6	// 3de6 <RLY_Direct_Control+0x3a>
+					CTRL_RLY_OFF;
+    3df8:	3100      	movi      	r1, 0
+    3dfa:	9600      	ld.w      	r0, (r6, 0x0)
+    3dfc:	e3fff047 	bsr      	0x1e8a	// 1e8a <GPIO_Write_High>
+    3e00:	07f3      	br      	0x3de6	// 3de6 <RLY_Direct_Control+0x3a>
+    3e02:	0000      	bkpt
+    3e04:	200000b4 	.long	0x200000b4
+    3e08:	2000024c 	.long	0x2000024c
+    3e0c:	20000048 	.long	0x20000048
+
+Disassembly of section .text.button_init:
+
+00003e10 <button_init>:
+  * @param  active_level: pressed GPIO level.
+  * @param  button_id: the button id.
+  * @retval None
+  */
+void button_init(struct Button* handle, uint8_t(*pin_level)(uint8_t), uint8_t active_level, uint8_t button_id)
+{
+    3e10:	14d4      	push      	r4-r7, r15
+    3e12:	6dc7      	mov      	r7, r1
+    3e14:	6d8b      	mov      	r6, r2
+	memset(handle, 0, sizeof(struct Button));
+    3e16:	3100      	movi      	r1, 0
+    3e18:	3230      	movi      	r2, 48
+{
+    3e1a:	6d03      	mov      	r4, r0
+    3e1c:	6d4f      	mov      	r5, r3
+	memset(handle, 0, sizeof(struct Button));
+    3e1e:	e3ffeda3 	bsr      	0x1964	// 1964 <__memset_fast>
+	handle->event = (uint8_t)NONE_PRESS;
+    3e22:	3300      	movi      	r3, 0
+    3e24:	2b6f      	subi      	r3, 112
+    3e26:	a462      	st.b      	r3, (r4, 0x2)
+	handle->hal_button_Level = pin_level;
+    3e28:	b4e2      	st.w      	r7, (r4, 0x8)
+	handle->button_level = handle->hal_button_Level(button_id);
+    3e2a:	6c17      	mov      	r0, r5
+    3e2c:	7bdd      	jsr      	r7
+    3e2e:	8443      	ld.b      	r2, (r4, 0x3)
+    3e30:	337f      	movi      	r3, 127
+    3e32:	688c      	and      	r2, r3
+    3e34:	4007      	lsli      	r0, r0, 7
+    3e36:	6c08      	or      	r0, r2
+	handle->active_level = active_level;
+    3e38:	3201      	movi      	r2, 1
+    3e3a:	6988      	and      	r6, r2
+    3e3c:	7480      	zextb      	r2, r0
+    3e3e:	46c6      	lsli      	r6, r6, 6
+    3e40:	3a86      	bclri      	r2, 6
+    3e42:	6c98      	or      	r2, r6
+    3e44:	a443      	st.b      	r2, (r4, 0x3)
+	handle->button_id = button_id;
+    3e46:	a4a4      	st.b      	r5, (r4, 0x4)
+}
+    3e48:	1494      	pop      	r4-r7, r15
+
+Disassembly of section .text.button_attach:
+
+00003e4a <button_attach>:
+  * @param  cb: callback function.
+  * @retval None
+  */
+void button_attach(struct Button* handle, PressEvent event, BtnCallback cb)
+{
+	handle->cb[event] = cb;
+    3e4a:	2102      	addi      	r1, 3
+    3e4c:	4122      	lsli      	r1, r1, 2
+    3e4e:	6040      	addu      	r1, r0
+    3e50:	b140      	st.w      	r2, (r1, 0x0)
+}
+    3e52:	783c      	jmp      	r15
+
+Disassembly of section .text.button_handler:
+
+00003e54 <button_handler>:
+
+
+
+
+void button_handler(struct Button* handle)
+{
+    3e54:	14d3      	push      	r4-r6, r15
+    3e56:	6d03      	mov      	r4, r0
+	uint8_t read_gpio_level = handle->hal_button_Level(handle->button_id);
+    3e58:	9462      	ld.w      	r3, (r4, 0x8)
+    3e5a:	8004      	ld.b      	r0, (r0, 0x4)
+    3e5c:	7bcd      	jsr      	r3
+
+	//ticks counter working..
+	if((handle->state) > 0) handle->ticks++;
+    3e5e:	8463      	ld.b      	r3, (r4, 0x3)
+    3e60:	433d      	lsli      	r1, r3, 29
+    3e62:	493d      	lsri      	r1, r1, 29
+    3e64:	3940      	cmpnei      	r1, 0
+    3e66:	0c04      	bf      	0x3e6e	// 3e6e <button_handler+0x1a>
+    3e68:	8c40      	ld.h      	r2, (r4, 0x0)
+    3e6a:	2200      	addi      	r2, 1
+    3e6c:	ac40      	st.h      	r2, (r4, 0x0)
+
+	/*------------button debounce handle---------------*/
+	if(read_gpio_level != handle->button_level) { //not equal to prev one
+    3e6e:	4b47      	lsri      	r2, r3, 7
+    3e70:	640a      	cmpne      	r2, r0
+    3e72:	0c21      	bf      	0x3eb4	// 3eb4 <button_handler+0x60>
+		//continue read 3 times same new level change
+		if(++(handle->debounce_cnt) >= DEBOUNCE_TICKS) {
+    3e74:	435a      	lsli      	r2, r3, 26
+    3e76:	4a5d      	lsri      	r2, r2, 29
+    3e78:	3507      	movi      	r5, 7
+    3e7a:	2200      	addi      	r2, 1
+    3e7c:	6894      	and      	r2, r5
+    3e7e:	7488      	zextb      	r2, r2
+    3e80:	6948      	and      	r5, r2
+    3e82:	45c3      	lsli      	r6, r5, 3
+    3e84:	3538      	movi      	r5, 56
+    3e86:	68d5      	andn      	r3, r5
+    3e88:	6d8c      	or      	r6, r3
+    3e8a:	3a02      	cmphsi      	r2, 3
+    3e8c:	a4c3      	st.b      	r6, (r4, 0x3)
+    3e8e:	0c09      	bf      	0x3ea0	// 3ea0 <button_handler+0x4c>
+			handle->button_level = read_gpio_level;
+    3e90:	4067      	lsli      	r3, r0, 7
+    3e92:	327f      	movi      	r2, 127
+    3e94:	8403      	ld.b      	r0, (r4, 0x3)
+    3e96:	6808      	and      	r0, r2
+    3e98:	6c0c      	or      	r0, r3
+			handle->debounce_cnt = 0;
+    3e9a:	7400      	zextb      	r0, r0
+    3e9c:	6815      	andn      	r0, r5
+    3e9e:	a403      	st.b      	r0, (r4, 0x3)
+	} else { //leved not change ,counter reset.
+		handle->debounce_cnt = 0;
+	}
+
+	/*-----------------State machine-------------------*/
+	switch (handle->state) {
+    3ea0:	3941      	cmpnei      	r1, 1
+    3ea2:	0c2f      	bf      	0x3f00	// 3f00 <button_handler+0xac>
+    3ea4:	3940      	cmpnei      	r1, 0
+    3ea6:	0c0b      	bf      	0x3ebc	// 3ebc <button_handler+0x68>
+    3ea8:	3945      	cmpnei      	r1, 5
+    3eaa:	0c53      	bf      	0x3f50	// 3f50 <button_handler+0xfc>
+//			Dbg_Println(DBG_BIT_SYS_STATUS,"key state long press release");
+			handle->state = 0; //reset
+		}
+		break;
+    default:
+        handle->state = 0; //reset
+    3eac:	8463      	ld.b      	r3, (r4, 0x3)
+    3eae:	3207      	movi      	r2, 7
+    3eb0:	68c9      	andn      	r3, r2
+    3eb2:	0420      	br      	0x3ef2	// 3ef2 <button_handler+0x9e>
+		handle->debounce_cnt = 0;
+    3eb4:	3238      	movi      	r2, 56
+    3eb6:	68c9      	andn      	r3, r2
+    3eb8:	a463      	st.b      	r3, (r4, 0x3)
+    3eba:	07f3      	br      	0x3ea0	// 3ea0 <button_handler+0x4c>
+		if(handle->button_level == handle->active_level) {	//start press down
+    3ebc:	8463      	ld.b      	r3, (r4, 0x3)
+    3ebe:	4359      	lsli      	r2, r3, 25
+    3ec0:	4a5f      	lsri      	r2, r2, 31
+    3ec2:	4b67      	lsri      	r3, r3, 7
+    3ec4:	648e      	cmpne      	r3, r2
+    3ec6:	8462      	ld.b      	r3, (r4, 0x2)
+			handle->event = (uint8_t)PRESS_DOWN;
+    3ec8:	320f      	movi      	r2, 15
+    3eca:	68c8      	and      	r3, r2
+		if(handle->button_level == handle->active_level) {	//start press down
+    3ecc:	0815      	bt      	0x3ef6	// 3ef6 <button_handler+0xa2>
+			handle->event = (uint8_t)PRESS_DOWN;
+    3ece:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_DOWN);
+    3ed0:	9463      	ld.w      	r3, (r4, 0xc)
+    3ed2:	3b40      	cmpnei      	r3, 0
+    3ed4:	0c03      	bf      	0x3eda	// 3eda <button_handler+0x86>
+    3ed6:	6c13      	mov      	r0, r4
+    3ed8:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    3eda:	3300      	movi      	r3, 0
+			handle->repeat = 1;
+    3edc:	8442      	ld.b      	r2, (r4, 0x2)
+			handle->ticks = 0;
+    3ede:	ac60      	st.h      	r3, (r4, 0x0)
+			handle->repeat = 1;
+    3ee0:	330f      	movi      	r3, 15
+    3ee2:	688d      	andn      	r2, r3
+    3ee4:	3101      	movi      	r1, 1
+    3ee6:	6c84      	or      	r2, r1
+    3ee8:	a442      	st.b      	r2, (r4, 0x2)
+			handle->state = 1;
+    3eea:	8463      	ld.b      	r3, (r4, 0x3)
+    3eec:	3207      	movi      	r2, 7
+    3eee:	68c9      	andn      	r3, r2
+    3ef0:	6cc4      	or      	r3, r1
+        handle->state = 0; //reset
+    3ef2:	a463      	st.b      	r3, (r4, 0x3)
+        break;
+	}
+}
+    3ef4:	0405      	br      	0x3efe	// 3efe <button_handler+0xaa>
+			handle->event = (uint8_t)NONE_PRESS;
+    3ef6:	3200      	movi      	r2, 0
+    3ef8:	2a6f      	subi      	r2, 112
+    3efa:	6cc8      	or      	r3, r2
+    3efc:	a462      	st.b      	r3, (r4, 0x2)
+}
+    3efe:	1493      	pop      	r4-r6, r15
+		if(handle->button_level != handle->active_level) { //released press up
+    3f00:	8463      	ld.b      	r3, (r4, 0x3)
+    3f02:	4359      	lsli      	r2, r3, 25
+    3f04:	4a5f      	lsri      	r2, r2, 31
+    3f06:	4b67      	lsri      	r3, r3, 7
+    3f08:	648e      	cmpne      	r3, r2
+    3f0a:	0c0e      	bf      	0x3f26	// 3f26 <button_handler+0xd2>
+			handle->event = (uint8_t)PRESS_UP;
+    3f0c:	8462      	ld.b      	r3, (r4, 0x2)
+    3f0e:	320f      	movi      	r2, 15
+    3f10:	68c8      	and      	r3, r2
+    3f12:	3ba4      	bseti      	r3, 4
+    3f14:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(PRESS_UP);
+    3f16:	9464      	ld.w      	r3, (r4, 0x10)
+    3f18:	3b40      	cmpnei      	r3, 0
+    3f1a:	0c03      	bf      	0x3f20	// 3f20 <button_handler+0xcc>
+    3f1c:	6c13      	mov      	r0, r4
+    3f1e:	7bcd      	jsr      	r3
+			handle->ticks = 0;
+    3f20:	3300      	movi      	r3, 0
+    3f22:	ac60      	st.h      	r3, (r4, 0x0)
+    3f24:	07c4      	br      	0x3eac	// 3eac <button_handler+0x58>
+		} else if(handle->ticks > LONG_TICKS) {
+    3f26:	8c40      	ld.h      	r2, (r4, 0x0)
+    3f28:	33c8      	movi      	r3, 200
+    3f2a:	648c      	cmphs      	r3, r2
+    3f2c:	0be9      	bt      	0x3efe	// 3efe <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_START;
+    3f2e:	8462      	ld.b      	r3, (r4, 0x2)
+    3f30:	320f      	movi      	r2, 15
+    3f32:	68c8      	and      	r3, r2
+    3f34:	3ba4      	bseti      	r3, 4
+    3f36:	3ba6      	bseti      	r3, 6
+    3f38:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_START);
+    3f3a:	9468      	ld.w      	r3, (r4, 0x20)
+    3f3c:	3b40      	cmpnei      	r3, 0
+    3f3e:	0c03      	bf      	0x3f44	// 3f44 <button_handler+0xf0>
+    3f40:	6c13      	mov      	r0, r4
+    3f42:	7bcd      	jsr      	r3
+			handle->state = 5;
+    3f44:	8463      	ld.b      	r3, (r4, 0x3)
+    3f46:	3207      	movi      	r2, 7
+    3f48:	68c9      	andn      	r3, r2
+    3f4a:	3ba0      	bseti      	r3, 0
+    3f4c:	3ba2      	bseti      	r3, 2
+    3f4e:	07d2      	br      	0x3ef2	// 3ef2 <button_handler+0x9e>
+		if(handle->button_level == handle->active_level) {
+    3f50:	8463      	ld.b      	r3, (r4, 0x3)
+    3f52:	4359      	lsli      	r2, r3, 25
+    3f54:	4a5f      	lsri      	r2, r2, 31
+    3f56:	4b67      	lsri      	r3, r3, 7
+    3f58:	648e      	cmpne      	r3, r2
+    3f5a:	0fd2      	bf      	0x3efe	// 3efe <button_handler+0xaa>
+			handle->event = (uint8_t)LONG_PRESS_RELEASE;
+    3f5c:	8462      	ld.b      	r3, (r4, 0x2)
+    3f5e:	320f      	movi      	r2, 15
+    3f60:	68c8      	and      	r3, r2
+    3f62:	3270      	movi      	r2, 112
+    3f64:	6cc8      	or      	r3, r2
+    3f66:	a462      	st.b      	r3, (r4, 0x2)
+			EVENT_CB(LONG_PRESS_RELEASE);
+    3f68:	946a      	ld.w      	r3, (r4, 0x28)
+    3f6a:	3b40      	cmpnei      	r3, 0
+    3f6c:	0fa0      	bf      	0x3eac	// 3eac <button_handler+0x58>
+    3f6e:	6c13      	mov      	r0, r4
+    3f70:	7bcd      	jsr      	r3
+    3f72:	079d      	br      	0x3eac	// 3eac <button_handler+0x58>
+
+Disassembly of section .text.button_start:
+
+00003f74 <button_start>:
+  * @param  handle: target handle strcut.
+  * @retval 0: succeed. -1: already exist.
+  */
+int button_start(struct Button* handle)
+{
+	struct Button* target = head_handle;
+    3f74:	1068      	lrw      	r3, 0x200000e8	// 3f94 <button_start+0x20>
+    3f76:	9320      	ld.w      	r1, (r3, 0x0)
+    3f78:	6c87      	mov      	r2, r1
+	while(target) {
+    3f7a:	3a40      	cmpnei      	r2, 0
+    3f7c:	0805      	bt      	0x3f86	// 3f86 <button_start+0x12>
+		if(target == handle) return -1;	//already exist.
+		target = target->next;
+	}
+	handle->next = head_handle;
+    3f7e:	b02b      	st.w      	r1, (r0, 0x2c)
+	head_handle = handle;
+    3f80:	b300      	st.w      	r0, (r3, 0x0)
+	return 0;
+    3f82:	3000      	movi      	r0, 0
+}
+    3f84:	783c      	jmp      	r15
+		if(target == handle) return -1;	//already exist.
+    3f86:	640a      	cmpne      	r2, r0
+    3f88:	0c03      	bf      	0x3f8e	// 3f8e <button_start+0x1a>
+		target = target->next;
+    3f8a:	924b      	ld.w      	r2, (r2, 0x2c)
+    3f8c:	07f7      	br      	0x3f7a	// 3f7a <button_start+0x6>
+		if(target == handle) return -1;	//already exist.
+    3f8e:	3000      	movi      	r0, 0
+    3f90:	2800      	subi      	r0, 1
+    3f92:	07f9      	br      	0x3f84	// 3f84 <button_start+0x10>
+    3f94:	200000e8 	.long	0x200000e8
+
+Disassembly of section .text.button_ticks:
+
+00003f98 <button_ticks>:
+  * @brief  background ticks, timer repeat invoking interval 5ms.
+  * @param  None.
+  * @retval None
+  */
+void button_ticks()
+{
+    3f98:	14d1      	push      	r4, r15
+	struct Button* target;
+	for(target=head_handle; target; target=target->next) {
+    3f9a:	1066      	lrw      	r3, 0x200000e8	// 3fb0 <button_ticks+0x18>
+    3f9c:	9380      	ld.w      	r4, (r3, 0x0)
+    3f9e:	3c40      	cmpnei      	r4, 0
+    3fa0:	0802      	bt      	0x3fa4	// 3fa4 <button_ticks+0xc>
+		button_handler(target);
+	}
+}
+    3fa2:	1491      	pop      	r4, r15
+		button_handler(target);
+    3fa4:	6c13      	mov      	r0, r4
+    3fa6:	e3ffff57 	bsr      	0x3e54	// 3e54 <button_handler>
+	for(target=head_handle; target; target=target->next) {
+    3faa:	948b      	ld.w      	r4, (r4, 0x2c)
+    3fac:	07f9      	br      	0x3f9e	// 3f9e <button_ticks+0x6>
+    3fae:	0000      	bkpt
+    3fb0:	200000e8 	.long	0x200000e8
+
+Disassembly of section .text.read_button_GPIO:
+
+00003fb4 <read_button_GPIO>:
+
+////////////////////////////////////////////////////////////////////////
+
+
+uint8_t read_button_GPIO(uint8_t button_id)
+{
+    3fb4:	14d0      	push      	r15
+	uint8_t state = 0;
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    3fb6:	1064      	lrw      	r3, 0x2000004c	// 3fc4 <read_button_GPIO+0x10>
+{
+    3fb8:	6c43      	mov      	r1, r0
+	state = GPIO_Read_Status(GPIOA0,button_id);
+    3fba:	9300      	ld.w      	r0, (r3, 0x0)
+    3fbc:	e3ffef7a 	bsr      	0x1eb0	// 1eb0 <GPIO_Read_Status>
+	return state;
+    3fc0:	1490      	pop      	r15
+    3fc2:	0000      	bkpt
+    3fc4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.TK_Sampling_prog:
+
+00003fc8 <TK_Sampling_prog>:
+    3fc8:	14c4      	push      	r4-r7
+    3fca:	1072      	lrw      	r3, 0x20000054	// 4010 <TK_Sampling_prog+0x48>
+    3fcc:	1012      	lrw      	r0, 0x2000053e	// 4014 <TK_Sampling_prog+0x4c>
+    3fce:	1093      	lrw      	r4, 0x200003af	// 4018 <TK_Sampling_prog+0x50>
+    3fd0:	6d83      	mov      	r6, r0
+    3fd2:	93a0      	ld.w      	r5, (r3, 0x0)
+    3fd4:	3300      	movi      	r3, 0
+    3fd6:	4342      	lsli      	r2, r3, 2
+    3fd8:	6094      	addu      	r2, r5
+    3fda:	9220      	ld.w      	r1, (r2, 0x0)
+    3fdc:	4341      	lsli      	r2, r3, 1
+    3fde:	6080      	addu      	r2, r0
+    3fe0:	7445      	zexth      	r1, r1
+    3fe2:	aa20      	st.h      	r1, (r2, 0x0)
+    3fe4:	8440      	ld.b      	r2, (r4, 0x0)
+    3fe6:	3a41      	cmpnei      	r2, 1
+    3fe8:	080f      	bt      	0x4006	// 4006 <TK_Sampling_prog+0x3e>
+    3fea:	3300      	movi      	r3, 0
+    3fec:	10ec      	lrw      	r7, 0x20000298	// 401c <TK_Sampling_prog+0x54>
+    3fee:	4341      	lsli      	r2, r3, 1
+    3ff0:	5e28      	addu      	r1, r6, r2
+    3ff2:	8920      	ld.h      	r1, (r1, 0x0)
+    3ff4:	2300      	addi      	r3, 1
+    3ff6:	7445      	zexth      	r1, r1
+    3ff8:	609c      	addu      	r2, r7
+    3ffa:	3b51      	cmpnei      	r3, 17
+    3ffc:	aa20      	st.h      	r1, (r2, 0x0)
+    3ffe:	0bf8      	bt      	0x3fee	// 3fee <TK_Sampling_prog+0x26>
+    4000:	3300      	movi      	r3, 0
+    4002:	a460      	st.b      	r3, (r4, 0x0)
+    4004:	3311      	movi      	r3, 17
+    4006:	2300      	addi      	r3, 1
+    4008:	74cc      	zextb      	r3, r3
+    400a:	3b10      	cmphsi      	r3, 17
+    400c:	0fe5      	bf      	0x3fd6	// 3fd6 <TK_Sampling_prog+0xe>
+    400e:	1484      	pop      	r4-r7
+    4010:	20000054 	.long	0x20000054
+    4014:	2000053e 	.long	0x2000053e
+    4018:	200003af 	.long	0x200003af
+    401c:	20000298 	.long	0x20000298
+
+Disassembly of section .text.TKEYIntHandler:
+
+00004020 <TKEYIntHandler>:
+    4020:	1460      	nie
+    4022:	1462      	ipush
+    4024:	14d1      	push      	r4, r15
+    4026:	109e      	lrw      	r4, 0x20000068	// 409c <TKEYIntHandler+0x7c>
+    4028:	9460      	ld.w      	r3, (r4, 0x0)
+    402a:	3b40      	cmpnei      	r3, 0
+    402c:	080b      	bt      	0x4042	// 4042 <TKEYIntHandler+0x22>
+    402e:	3301      	movi      	r3, 1
+    4030:	b460      	st.w      	r3, (r4, 0x0)
+    4032:	107c      	lrw      	r3, 0x2000032c	// 40a0 <TKEYIntHandler+0x80>
+    4034:	8360      	ld.b      	r3, (r3, 0x0)
+    4036:	3b41      	cmpnei      	r3, 1
+    4038:	0805      	bt      	0x4042	// 4042 <TKEYIntHandler+0x22>
+    403a:	e3ffffc7 	bsr      	0x3fc8	// 3fc8 <TK_Sampling_prog>
+    403e:	3301      	movi      	r3, 1
+    4040:	a464      	st.b      	r3, (r4, 0x4)
+    4042:	1079      	lrw      	r3, 0x20000058	// 40a4 <TKEYIntHandler+0x84>
+    4044:	3101      	movi      	r1, 1
+    4046:	9360      	ld.w      	r3, (r3, 0x0)
+    4048:	934a      	ld.w      	r2, (r3, 0x28)
+    404a:	6884      	and      	r2, r1
+    404c:	3a40      	cmpnei      	r2, 0
+    404e:	0c02      	bf      	0x4052	// 4052 <TKEYIntHandler+0x32>
+    4050:	b32c      	st.w      	r1, (r3, 0x30)
+    4052:	934a      	ld.w      	r2, (r3, 0x28)
+    4054:	3102      	movi      	r1, 2
+    4056:	6884      	and      	r2, r1
+    4058:	3a40      	cmpnei      	r2, 0
+    405a:	0c02      	bf      	0x405e	// 405e <TKEYIntHandler+0x3e>
+    405c:	b32c      	st.w      	r1, (r3, 0x30)
+    405e:	934a      	ld.w      	r2, (r3, 0x28)
+    4060:	3104      	movi      	r1, 4
+    4062:	6884      	and      	r2, r1
+    4064:	3a40      	cmpnei      	r2, 0
+    4066:	0c02      	bf      	0x406a	// 406a <TKEYIntHandler+0x4a>
+    4068:	b32c      	st.w      	r1, (r3, 0x30)
+    406a:	934a      	ld.w      	r2, (r3, 0x28)
+    406c:	3108      	movi      	r1, 8
+    406e:	6884      	and      	r2, r1
+    4070:	3a40      	cmpnei      	r2, 0
+    4072:	0c02      	bf      	0x4076	// 4076 <TKEYIntHandler+0x56>
+    4074:	b32c      	st.w      	r1, (r3, 0x30)
+    4076:	934a      	ld.w      	r2, (r3, 0x28)
+    4078:	3110      	movi      	r1, 16
+    407a:	6884      	and      	r2, r1
+    407c:	3a40      	cmpnei      	r2, 0
+    407e:	0c02      	bf      	0x4082	// 4082 <TKEYIntHandler+0x62>
+    4080:	b32c      	st.w      	r1, (r3, 0x30)
+    4082:	934a      	ld.w      	r2, (r3, 0x28)
+    4084:	3120      	movi      	r1, 32
+    4086:	6884      	and      	r2, r1
+    4088:	3a40      	cmpnei      	r2, 0
+    408a:	0c02      	bf      	0x408e	// 408e <TKEYIntHandler+0x6e>
+    408c:	b32c      	st.w      	r1, (r3, 0x30)
+    408e:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    4092:	9880      	ld.w      	r4, (r14, 0x0)
+    4094:	1402      	addi      	r14, r14, 8
+    4096:	1463      	ipop
+    4098:	1461      	nir
+    409a:	0000      	bkpt
+    409c:	20000068 	.long	0x20000068
+    40a0:	2000032c 	.long	0x2000032c
+    40a4:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+000040a8 <get_key_number>:
+    40a8:	14c2      	push      	r4-r5
+    40aa:	3200      	movi      	r2, 0
+    40ac:	3000      	movi      	r0, 0
+    40ae:	1088      	lrw      	r4, 0x200003cc	// 40cc <get_key_number+0x24>
+    40b0:	3501      	movi      	r5, 1
+    40b2:	3120      	movi      	r1, 32
+    40b4:	9460      	ld.w      	r3, (r4, 0x0)
+    40b6:	70c9      	lsr      	r3, r2
+    40b8:	68d4      	and      	r3, r5
+    40ba:	3b40      	cmpnei      	r3, 0
+    40bc:	0c02      	bf      	0x40c0	// 40c0 <get_key_number+0x18>
+    40be:	2000      	addi      	r0, 1
+    40c0:	2200      	addi      	r2, 1
+    40c2:	644a      	cmpne      	r2, r1
+    40c4:	0bf8      	bt      	0x40b4	// 40b4 <get_key_number+0xc>
+    40c6:	7400      	zextb      	r0, r0
+    40c8:	1482      	pop      	r4-r5
+    40ca:	0000      	bkpt
+    40cc:	200003cc 	.long	0x200003cc
+
+Disassembly of section .text.TK_Scan_Start:
+
+000040d0 <TK_Scan_Start>:
+    40d0:	1046      	lrw      	r2, 0x20000068	// 40e8 <TK_Scan_Start+0x18>
+    40d2:	8264      	ld.b      	r3, (r2, 0x4)
+    40d4:	74cc      	zextb      	r3, r3
+    40d6:	3b41      	cmpnei      	r3, 1
+    40d8:	0807      	bt      	0x40e6	// 40e6 <TK_Scan_Start+0x16>
+    40da:	1025      	lrw      	r1, 0x20000058	// 40ec <TK_Scan_Start+0x1c>
+    40dc:	9120      	ld.w      	r1, (r1, 0x0)
+    40de:	b162      	st.w      	r3, (r1, 0x8)
+    40e0:	3300      	movi      	r3, 0
+    40e2:	b260      	st.w      	r3, (r2, 0x0)
+    40e4:	a264      	st.b      	r3, (r2, 0x4)
+    40e6:	783c      	jmp      	r15
+    40e8:	20000068 	.long	0x20000068
+    40ec:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+000040f0 <TK_Keymap_prog>:
+    40f0:	14d4      	push      	r4-r7, r15
+    40f2:	1425      	subi      	r14, r14, 20
+    40f4:	1271      	lrw      	r3, 0x20000118	// 4238 <TK_Keymap_prog+0x148>
+    40f6:	8360      	ld.b      	r3, (r3, 0x0)
+    40f8:	b860      	st.w      	r3, (r14, 0x0)
+    40fa:	3400      	movi      	r4, 0
+    40fc:	1270      	lrw      	r3, 0x200000ec	// 423c <TK_Keymap_prog+0x14c>
+    40fe:	8360      	ld.b      	r3, (r3, 0x0)
+    4100:	b861      	st.w      	r3, (r14, 0x4)
+    4102:	12f0      	lrw      	r7, 0x20000342	// 4240 <TK_Keymap_prog+0x150>
+    4104:	1270      	lrw      	r3, 0x200000f5	// 4244 <TK_Keymap_prog+0x154>
+    4106:	83a0      	ld.b      	r5, (r3, 0x0)
+    4108:	1270      	lrw      	r3, 0x200000f4	// 4248 <TK_Keymap_prog+0x158>
+    410a:	8360      	ld.b      	r3, (r3, 0x0)
+    410c:	b862      	st.w      	r3, (r14, 0x8)
+    410e:	6d9f      	mov      	r6, r7
+    4110:	126f      	lrw      	r3, 0x2000053e	// 424c <TK_Keymap_prog+0x15c>
+    4112:	b863      	st.w      	r3, (r14, 0xc)
+    4114:	4461      	lsli      	r3, r4, 1
+    4116:	9843      	ld.w      	r2, (r14, 0xc)
+    4118:	608c      	addu      	r2, r3
+    411a:	122e      	lrw      	r1, 0x20000298	// 4250 <TK_Keymap_prog+0x160>
+    411c:	604c      	addu      	r1, r3
+    411e:	8a40      	ld.h      	r2, (r2, 0x0)
+    4120:	8920      	ld.h      	r1, (r1, 0x0)
+    4122:	6086      	subu      	r2, r1
+    4124:	748b      	sexth      	r2, r2
+    4126:	5f2c      	addu      	r1, r7, r3
+    4128:	a940      	st.h      	r2, (r1, 0x0)
+    412a:	8940      	ld.h      	r2, (r1, 0x0)
+    412c:	748b      	sexth      	r2, r2
+    412e:	3adf      	btsti      	r2, 31
+    4130:	1249      	lrw      	r2, 0x200004fa	// 4254 <TK_Keymap_prog+0x164>
+    4132:	608c      	addu      	r2, r3
+    4134:	0c37      	bf      	0x41a2	// 41a2 <TK_Keymap_prog+0xb2>
+    4136:	3100      	movi      	r1, 0
+    4138:	aa20      	st.h      	r1, (r2, 0x0)
+    413a:	9840      	ld.w      	r2, (r14, 0x0)
+    413c:	3a01      	cmphsi      	r2, 2
+    413e:	0c6d      	bf      	0x4218	// 4218 <TK_Keymap_prog+0x128>
+    4140:	4461      	lsli      	r3, r4, 1
+    4142:	5e2c      	addu      	r1, r6, r3
+    4144:	1205      	lrw      	r0, 0x20000146	// 4258 <TK_Keymap_prog+0x168>
+    4146:	8940      	ld.h      	r2, (r1, 0x0)
+    4148:	60c0      	addu      	r3, r0
+    414a:	748b      	sexth      	r2, r2
+    414c:	8b60      	ld.h      	r3, (r3, 0x0)
+    414e:	648d      	cmplt      	r3, r2
+    4150:	9840      	ld.w      	r2, (r14, 0x0)
+    4152:	7cc8      	mult      	r3, r2
+    4154:	0c2a      	bf      	0x41a8	// 41a8 <TK_Keymap_prog+0xb8>
+    4156:	8940      	ld.h      	r2, (r1, 0x0)
+    4158:	748b      	sexth      	r2, r2
+    415a:	64c9      	cmplt      	r2, r3
+    415c:	0c26      	bf      	0x41a8	// 41a8 <TK_Keymap_prog+0xb8>
+    415e:	1240      	lrw      	r2, 0x20000330	// 425c <TK_Keymap_prog+0x16c>
+    4160:	6090      	addu      	r2, r4
+    4162:	8260      	ld.b      	r3, (r2, 0x0)
+    4164:	2300      	addi      	r3, 1
+    4166:	74cc      	zextb      	r3, r3
+    4168:	a260      	st.b      	r3, (r2, 0x0)
+    416a:	3100      	movi      	r1, 0
+    416c:	117d      	lrw      	r3, 0x20000316	// 4260 <TK_Keymap_prog+0x170>
+    416e:	60d0      	addu      	r3, r4
+    4170:	a320      	st.b      	r1, (r3, 0x0)
+    4172:	117d      	lrw      	r3, 0x200003f2	// 4264 <TK_Keymap_prog+0x174>
+    4174:	60d0      	addu      	r3, r4
+    4176:	a320      	st.b      	r1, (r3, 0x0)
+    4178:	117c      	lrw      	r3, 0x2000046c	// 4268 <TK_Keymap_prog+0x178>
+    417a:	60d0      	addu      	r3, r4
+    417c:	a320      	st.b      	r1, (r3, 0x0)
+    417e:	8260      	ld.b      	r3, (r2, 0x0)
+    4180:	9821      	ld.w      	r1, (r14, 0x4)
+    4182:	64c4      	cmphs      	r1, r3
+    4184:	081f      	bt      	0x41c2	// 41c2 <TK_Keymap_prog+0xd2>
+    4186:	3d40      	cmpnei      	r5, 0
+    4188:	0852      	bt      	0x422c	// 422c <TK_Keymap_prog+0x13c>
+    418a:	1139      	lrw      	r1, 0x20000328	// 426c <TK_Keymap_prog+0x17c>
+    418c:	9160      	ld.w      	r3, (r1, 0x0)
+    418e:	3b40      	cmpnei      	r3, 0
+    4190:	0806      	bt      	0x419c	// 419c <TK_Keymap_prog+0xac>
+    4192:	9100      	ld.w      	r0, (r1, 0x0)
+    4194:	3301      	movi      	r3, 1
+    4196:	70d0      	lsl      	r3, r4
+    4198:	6cc0      	or      	r3, r0
+    419a:	b160      	st.w      	r3, (r1, 0x0)
+    419c:	3300      	movi      	r3, 0
+    419e:	a260      	st.b      	r3, (r2, 0x0)
+    41a0:	0411      	br      	0x41c2	// 41c2 <TK_Keymap_prog+0xd2>
+    41a2:	8920      	ld.h      	r1, (r1, 0x0)
+    41a4:	7445      	zexth      	r1, r1
+    41a6:	07c9      	br      	0x4138	// 4138 <TK_Keymap_prog+0x48>
+    41a8:	4441      	lsli      	r2, r4, 1
+    41aa:	6098      	addu      	r2, r6
+    41ac:	8a40      	ld.h      	r2, (r2, 0x0)
+    41ae:	748b      	sexth      	r2, r2
+    41b0:	648d      	cmplt      	r3, r2
+    41b2:	0c08      	bf      	0x41c2	// 41c2 <TK_Keymap_prog+0xd2>
+    41b4:	3300      	movi      	r3, 0
+    41b6:	114e      	lrw      	r2, 0x20000328	// 426c <TK_Keymap_prog+0x17c>
+    41b8:	2b01      	subi      	r3, 2
+    41ba:	9220      	ld.w      	r1, (r2, 0x0)
+    41bc:	70d3      	rotl      	r3, r4
+    41be:	68c4      	and      	r3, r1
+    41c0:	b260      	st.w      	r3, (r2, 0x0)
+    41c2:	4441      	lsli      	r2, r4, 1
+    41c4:	5e68      	addu      	r3, r6, r2
+    41c6:	8b60      	ld.h      	r3, (r3, 0x0)
+    41c8:	74cf      	sexth      	r3, r3
+    41ca:	b864      	st.w      	r3, (r14, 0x10)
+    41cc:	3105      	movi      	r1, 5
+    41ce:	1163      	lrw      	r3, 0x20000146	// 4258 <TK_Keymap_prog+0x168>
+    41d0:	608c      	addu      	r2, r3
+    41d2:	8a00      	ld.h      	r0, (r2, 0x0)
+    41d4:	4002      	lsli      	r0, r0, 2
+    41d6:	e3fff6b1 	bsr      	0x2f38	// 2f38 <__divsi3>
+    41da:	9864      	ld.w      	r3, (r14, 0x10)
+    41dc:	640d      	cmplt      	r3, r0
+    41de:	0c18      	bf      	0x420e	// 420e <TK_Keymap_prog+0x11e>
+    41e0:	1140      	lrw      	r2, 0x20000316	// 4260 <TK_Keymap_prog+0x170>
+    41e2:	6090      	addu      	r2, r4
+    41e4:	8260      	ld.b      	r3, (r2, 0x0)
+    41e6:	2300      	addi      	r3, 1
+    41e8:	74cc      	zextb      	r3, r3
+    41ea:	a260      	st.b      	r3, (r2, 0x0)
+    41ec:	3100      	movi      	r1, 0
+    41ee:	107c      	lrw      	r3, 0x20000330	// 425c <TK_Keymap_prog+0x16c>
+    41f0:	60d0      	addu      	r3, r4
+    41f2:	a320      	st.b      	r1, (r3, 0x0)
+    41f4:	8260      	ld.b      	r3, (r2, 0x0)
+    41f6:	9822      	ld.w      	r1, (r14, 0x8)
+    41f8:	64c4      	cmphs      	r1, r3
+    41fa:	080a      	bt      	0x420e	// 420e <TK_Keymap_prog+0x11e>
+    41fc:	3300      	movi      	r3, 0
+    41fe:	103c      	lrw      	r1, 0x20000328	// 426c <TK_Keymap_prog+0x17c>
+    4200:	2b01      	subi      	r3, 2
+    4202:	9100      	ld.w      	r0, (r1, 0x0)
+    4204:	70d3      	rotl      	r3, r4
+    4206:	68c0      	and      	r3, r0
+    4208:	b160      	st.w      	r3, (r1, 0x0)
+    420a:	3300      	movi      	r3, 0
+    420c:	a260      	st.b      	r3, (r2, 0x0)
+    420e:	2400      	addi      	r4, 1
+    4210:	3c51      	cmpnei      	r4, 17
+    4212:	0b81      	bt      	0x4114	// 4114 <TK_Keymap_prog+0x24>
+    4214:	1405      	addi      	r14, r14, 20
+    4216:	1494      	pop      	r4-r7, r15
+    4218:	60d8      	addu      	r3, r6
+    421a:	4441      	lsli      	r2, r4, 1
+    421c:	102f      	lrw      	r1, 0x20000146	// 4258 <TK_Keymap_prog+0x168>
+    421e:	8b60      	ld.h      	r3, (r3, 0x0)
+    4220:	6084      	addu      	r2, r1
+    4222:	74cf      	sexth      	r3, r3
+    4224:	8a40      	ld.h      	r2, (r2, 0x0)
+    4226:	64c9      	cmplt      	r2, r3
+    4228:	0fcd      	bf      	0x41c2	// 41c2 <TK_Keymap_prog+0xd2>
+    422a:	079a      	br      	0x415e	// 415e <TK_Keymap_prog+0x6e>
+    422c:	3d41      	cmpnei      	r5, 1
+    422e:	0bb7      	bt      	0x419c	// 419c <TK_Keymap_prog+0xac>
+    4230:	102f      	lrw      	r1, 0x20000328	// 426c <TK_Keymap_prog+0x17c>
+    4232:	6cd7      	mov      	r3, r5
+    4234:	9100      	ld.w      	r0, (r1, 0x0)
+    4236:	07b0      	br      	0x4196	// 4196 <TK_Keymap_prog+0xa6>
+    4238:	20000118 	.long	0x20000118
+    423c:	200000ec 	.long	0x200000ec
+    4240:	20000342 	.long	0x20000342
+    4244:	200000f5 	.long	0x200000f5
+    4248:	200000f4 	.long	0x200000f4
+    424c:	2000053e 	.long	0x2000053e
+    4250:	20000298 	.long	0x20000298
+    4254:	200004fa 	.long	0x200004fa
+    4258:	20000146 	.long	0x20000146
+    425c:	20000330 	.long	0x20000330
+    4260:	20000316 	.long	0x20000316
+    4264:	200003f2 	.long	0x200003f2
+    4268:	2000046c 	.long	0x2000046c
+    426c:	20000328 	.long	0x20000328
+
+Disassembly of section .text.TK_overflow_predict:
+
+00004270 <TK_overflow_predict>:
+    4270:	14d4      	push      	r4-r7, r15
+    4272:	1421      	subi      	r14, r14, 4
+    4274:	11d9      	lrw      	r6, 0x20000068	// 4358 <TK_overflow_predict+0xe8>
+    4276:	8665      	ld.b      	r3, (r6, 0x5)
+    4278:	3b41      	cmpnei      	r3, 1
+    427a:	085f      	bt      	0x4338	// 4338 <TK_overflow_predict+0xc8>
+    427c:	1158      	lrw      	r2, 0x20000448	// 435c <TK_overflow_predict+0xec>
+    427e:	8260      	ld.b      	r3, (r2, 0x0)
+    4280:	2300      	addi      	r3, 1
+    4282:	74cc      	zextb      	r3, r3
+    4284:	a260      	st.b      	r3, (r2, 0x0)
+    4286:	8260      	ld.b      	r3, (r2, 0x0)
+    4288:	1136      	lrw      	r1, 0x20000119	// 4360 <TK_overflow_predict+0xf0>
+    428a:	8120      	ld.b      	r1, (r1, 0x0)
+    428c:	64c4      	cmphs      	r1, r3
+    428e:	0855      	bt      	0x4338	// 4338 <TK_overflow_predict+0xc8>
+    4290:	3300      	movi      	r3, 0
+    4292:	a260      	st.b      	r3, (r2, 0x0)
+    4294:	3500      	movi      	r5, 0
+    4296:	11f4      	lrw      	r7, 0x2000011c	// 4364 <TK_overflow_predict+0xf4>
+    4298:	2605      	addi      	r6, 6
+    429a:	9760      	ld.w      	r3, (r7, 0x0)
+    429c:	70d5      	lsr      	r3, r5
+    429e:	3201      	movi      	r2, 1
+    42a0:	68c8      	and      	r3, r2
+    42a2:	3b40      	cmpnei      	r3, 0
+    42a4:	0c34      	bf      	0x430c	// 430c <TK_overflow_predict+0x9c>
+    42a6:	4581      	lsli      	r4, r5, 1
+    42a8:	5e70      	addu      	r3, r6, r4
+    42aa:	8b00      	ld.h      	r0, (r3, 0x0)
+    42ac:	e3ffe97a 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    42b0:	6cc7      	mov      	r3, r1
+    42b2:	3180      	movi      	r1, 128
+    42b4:	6c83      	mov      	r2, r0
+    42b6:	4137      	lsli      	r1, r1, 23
+    42b8:	3000      	movi      	r0, 0
+    42ba:	e3ffdf7d 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    42be:	116b      	lrw      	r3, 0x20000122	// 4368 <TK_overflow_predict+0xf8>
+    42c0:	60d0      	addu      	r3, r4
+    42c2:	8b60      	ld.h      	r3, (r3, 0x0)
+    42c4:	4364      	lsli      	r3, r3, 4
+    42c6:	230e      	addi      	r3, 15
+    42c8:	b860      	st.w      	r3, (r14, 0x0)
+    42ca:	e3ffe523 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    42ce:	9860      	ld.w      	r3, (r14, 0x0)
+    42d0:	7cc0      	mult      	r3, r0
+    42d2:	1147      	lrw      	r2, 0x200004d8	// 436c <TK_overflow_predict+0xfc>
+    42d4:	740d      	zexth      	r0, r3
+    42d6:	6090      	addu      	r2, r4
+    42d8:	1166      	lrw      	r3, 0x2000053e	// 4370 <TK_overflow_predict+0x100>
+    42da:	60d0      	addu      	r3, r4
+    42dc:	aa00      	st.h      	r0, (r2, 0x0)
+    42de:	8b60      	ld.h      	r3, (r3, 0x0)
+    42e0:	8a00      	ld.h      	r0, (r2, 0x0)
+    42e2:	7401      	zexth      	r0, r0
+    42e4:	325f      	movi      	r2, 95
+    42e6:	74cd      	zexth      	r3, r3
+    42e8:	7c08      	mult      	r0, r2
+    42ea:	3164      	movi      	r1, 100
+    42ec:	b860      	st.w      	r3, (r14, 0x0)
+    42ee:	e3fff625 	bsr      	0x2f38	// 2f38 <__divsi3>
+    42f2:	9860      	ld.w      	r3, (r14, 0x0)
+    42f4:	64c1      	cmplt      	r0, r3
+    42f6:	0c0b      	bf      	0x430c	// 430c <TK_overflow_predict+0x9c>
+    42f8:	107f      	lrw      	r3, 0x200000f6	// 4374 <TK_overflow_predict+0x104>
+    42fa:	610c      	addu      	r4, r3
+    42fc:	8c60      	ld.h      	r3, (r4, 0x0)
+    42fe:	3b06      	cmphsi      	r3, 7
+    4300:	0806      	bt      	0x430c	// 430c <TK_overflow_predict+0x9c>
+    4302:	2300      	addi      	r3, 1
+    4304:	ac60      	st.h      	r3, (r4, 0x0)
+    4306:	3201      	movi      	r2, 1
+    4308:	107c      	lrw      	r3, 0x2000039d	// 4378 <TK_overflow_predict+0x108>
+    430a:	a340      	st.b      	r2, (r3, 0x0)
+    430c:	2500      	addi      	r5, 1
+    430e:	3d51      	cmpnei      	r5, 17
+    4310:	0bc5      	bt      	0x429a	// 429a <TK_overflow_predict+0x2a>
+    4312:	107a      	lrw      	r3, 0x2000039d	// 4378 <TK_overflow_predict+0x108>
+    4314:	8340      	ld.b      	r2, (r3, 0x0)
+    4316:	3a41      	cmpnei      	r2, 1
+    4318:	0810      	bt      	0x4338	// 4338 <TK_overflow_predict+0xc8>
+    431a:	3200      	movi      	r2, 0
+    431c:	a340      	st.b      	r2, (r3, 0x0)
+    431e:	3200      	movi      	r2, 0
+    4320:	1077      	lrw      	r3, 0x20000058	// 437c <TK_overflow_predict+0x10c>
+    4322:	1018      	lrw      	r0, 0x2000046b	// 4380 <TK_overflow_predict+0x110>
+    4324:	10b8      	lrw      	r5, 0x200004a4	// 4384 <TK_overflow_predict+0x114>
+    4326:	10d4      	lrw      	r6, 0x200000f6	// 4374 <TK_overflow_predict+0x104>
+    4328:	9360      	ld.w      	r3, (r3, 0x0)
+    432a:	b342      	st.w      	r2, (r3, 0x8)
+    432c:	1077      	lrw      	r3, 0x20000054	// 4388 <TK_overflow_predict+0x118>
+    432e:	9380      	ld.w      	r4, (r3, 0x0)
+    4330:	3300      	movi      	r3, 0
+    4332:	8040      	ld.b      	r2, (r0, 0x0)
+    4334:	648c      	cmphs      	r3, r2
+    4336:	0c03      	bf      	0x433c	// 433c <TK_overflow_predict+0xcc>
+    4338:	1401      	addi      	r14, r14, 4
+    433a:	1494      	pop      	r4-r7, r15
+    433c:	5d4c      	addu      	r2, r5, r3
+    433e:	8240      	ld.b      	r2, (r2, 0x0)
+    4340:	4241      	lsli      	r2, r2, 1
+    4342:	4322      	lsli      	r1, r3, 2
+    4344:	6098      	addu      	r2, r6
+    4346:	6050      	addu      	r1, r4
+    4348:	8a40      	ld.h      	r2, (r2, 0x0)
+    434a:	91f2      	ld.w      	r7, (r1, 0x48)
+    434c:	4254      	lsli      	r2, r2, 20
+    434e:	6c9c      	or      	r2, r7
+    4350:	2300      	addi      	r3, 1
+    4352:	b152      	st.w      	r2, (r1, 0x48)
+    4354:	74cc      	zextb      	r3, r3
+    4356:	07ee      	br      	0x4332	// 4332 <TK_overflow_predict+0xc2>
+    4358:	20000068 	.long	0x20000068
+    435c:	20000448 	.long	0x20000448
+    4360:	20000119 	.long	0x20000119
+    4364:	2000011c 	.long	0x2000011c
+    4368:	20000122 	.long	0x20000122
+    436c:	200004d8 	.long	0x200004d8
+    4370:	2000053e 	.long	0x2000053e
+    4374:	200000f6 	.long	0x200000f6
+    4378:	2000039d 	.long	0x2000039d
+    437c:	20000058 	.long	0x20000058
+    4380:	2000046b 	.long	0x2000046b
+    4384:	200004a4 	.long	0x200004a4
+    4388:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+0000438c <TK_Baseline_tracking>:
+    438c:	14c4      	push      	r4-r7
+    438e:	1422      	subi      	r14, r14, 8
+    4390:	1348      	lrw      	r2, 0x200003ca	// 4530 <TK_Baseline_tracking+0x1a4>
+    4392:	8260      	ld.b      	r3, (r2, 0x0)
+    4394:	2300      	addi      	r3, 1
+    4396:	74cc      	zextb      	r3, r3
+    4398:	a260      	st.b      	r3, (r2, 0x0)
+    439a:	8260      	ld.b      	r3, (r2, 0x0)
+    439c:	1326      	lrw      	r1, 0x20000119	// 4534 <TK_Baseline_tracking+0x1a8>
+    439e:	8120      	ld.b      	r1, (r1, 0x0)
+    43a0:	644c      	cmphs      	r3, r1
+    43a2:	0cad      	bf      	0x44fc	// 44fc <TK_Baseline_tracking+0x170>
+    43a4:	3300      	movi      	r3, 0
+    43a6:	a260      	st.b      	r3, (r2, 0x0)
+    43a8:	1364      	lrw      	r3, 0x20000328	// 4538 <TK_Baseline_tracking+0x1ac>
+    43aa:	9360      	ld.w      	r3, (r3, 0x0)
+    43ac:	3b40      	cmpnei      	r3, 0
+    43ae:	08a7      	bt      	0x44fc	// 44fc <TK_Baseline_tracking+0x170>
+    43b0:	1323      	lrw      	r1, 0x20000342	// 453c <TK_Baseline_tracking+0x1b0>
+    43b2:	6dc7      	mov      	r7, r1
+    43b4:	b820      	st.w      	r1, (r14, 0x0)
+    43b6:	3200      	movi      	r2, 0
+    43b8:	1362      	lrw      	r3, 0x20000146	// 4540 <TK_Baseline_tracking+0x1b4>
+    43ba:	1323      	lrw      	r1, 0x20000298	// 4544 <TK_Baseline_tracking+0x1b8>
+    43bc:	4201      	lsli      	r0, r2, 1
+    43be:	9880      	ld.w      	r4, (r14, 0x0)
+    43c0:	6100      	addu      	r4, r0
+    43c2:	8c80      	ld.h      	r4, (r4, 0x0)
+    43c4:	7513      	sexth      	r4, r4
+    43c6:	3cdf      	btsti      	r4, 31
+    43c8:	0c27      	bf      	0x4416	// 4416 <TK_Baseline_tracking+0x8a>
+    43ca:	13a0      	lrw      	r5, 0x2000053e	// 4548 <TK_Baseline_tracking+0x1bc>
+    43cc:	5980      	addu      	r4, r1, r0
+    43ce:	6014      	addu      	r0, r5
+    43d0:	b881      	st.w      	r4, (r14, 0x4)
+    43d2:	8c80      	ld.h      	r4, (r4, 0x0)
+    43d4:	88c0      	ld.h      	r6, (r0, 0x0)
+    43d6:	7511      	zexth      	r4, r4
+    43d8:	7599      	zexth      	r6, r6
+    43da:	8ba0      	ld.h      	r5, (r3, 0x0)
+    43dc:	611a      	subu      	r4, r6
+    43de:	6551      	cmplt      	r4, r5
+    43e0:	081b      	bt      	0x4416	// 4416 <TK_Baseline_tracking+0x8a>
+    43e2:	9881      	ld.w      	r4, (r14, 0x4)
+    43e4:	8c80      	ld.h      	r4, (r4, 0x0)
+    43e6:	8800      	ld.h      	r0, (r0, 0x0)
+    43e8:	7511      	zexth      	r4, r4
+    43ea:	7401      	zexth      	r0, r0
+    43ec:	5c01      	subu      	r0, r4, r0
+    43ee:	4581      	lsli      	r4, r5, 1
+    43f0:	6150      	addu      	r5, r4
+    43f2:	6541      	cmplt      	r0, r5
+    43f4:	0c11      	bf      	0x4416	// 4416 <TK_Baseline_tracking+0x8a>
+    43f6:	1296      	lrw      	r4, 0x2000046c	// 454c <TK_Baseline_tracking+0x1c0>
+    43f8:	6108      	addu      	r4, r2
+    43fa:	8400      	ld.b      	r0, (r4, 0x0)
+    43fc:	2000      	addi      	r0, 1
+    43fe:	7400      	zextb      	r0, r0
+    4400:	a400      	st.b      	r0, (r4, 0x0)
+    4402:	1214      	lrw      	r0, 0x20000088	// 4550 <TK_Baseline_tracking+0x1c4>
+    4404:	84a0      	ld.b      	r5, (r4, 0x0)
+    4406:	8008      	ld.b      	r0, (r0, 0x8)
+    4408:	6540      	cmphs      	r0, r5
+    440a:	0806      	bt      	0x4416	// 4416 <TK_Baseline_tracking+0x8a>
+    440c:	1212      	lrw      	r0, 0x200003af	// 4554 <TK_Baseline_tracking+0x1c8>
+    440e:	3501      	movi      	r5, 1
+    4410:	a0a0      	st.b      	r5, (r0, 0x0)
+    4412:	3000      	movi      	r0, 0
+    4414:	a400      	st.b      	r0, (r4, 0x0)
+    4416:	4201      	lsli      	r0, r2, 1
+    4418:	5f80      	addu      	r4, r7, r0
+    441a:	8c80      	ld.h      	r4, (r4, 0x0)
+    441c:	7513      	sexth      	r4, r4
+    441e:	3c20      	cmplti      	r4, 1
+    4420:	0870      	bt      	0x4500	// 4500 <TK_Baseline_tracking+0x174>
+    4422:	128a      	lrw      	r4, 0x2000053e	// 4548 <TK_Baseline_tracking+0x1bc>
+    4424:	6100      	addu      	r4, r0
+    4426:	59a0      	addu      	r5, r1, r0
+    4428:	8c80      	ld.h      	r4, (r4, 0x0)
+    442a:	8da0      	ld.h      	r5, (r5, 0x0)
+    442c:	7555      	zexth      	r5, r5
+    442e:	7511      	zexth      	r4, r4
+    4430:	6116      	subu      	r4, r5
+    4432:	8ba0      	ld.h      	r5, (r3, 0x0)
+    4434:	45a2      	lsli      	r5, r5, 2
+    4436:	6551      	cmplt      	r4, r5
+    4438:	0864      	bt      	0x4500	// 4500 <TK_Baseline_tracking+0x174>
+    443a:	1288      	lrw      	r4, 0x200003f2	// 4558 <TK_Baseline_tracking+0x1cc>
+    443c:	6108      	addu      	r4, r2
+    443e:	84a0      	ld.b      	r5, (r4, 0x0)
+    4440:	2500      	addi      	r5, 1
+    4442:	7554      	zextb      	r5, r5
+    4444:	a4a0      	st.b      	r5, (r4, 0x0)
+    4446:	12a3      	lrw      	r5, 0x20000088	// 4550 <TK_Baseline_tracking+0x1c4>
+    4448:	84c0      	ld.b      	r6, (r4, 0x0)
+    444a:	85a9      	ld.b      	r5, (r5, 0x9)
+    444c:	6594      	cmphs      	r5, r6
+    444e:	0806      	bt      	0x445a	// 445a <TK_Baseline_tracking+0xce>
+    4450:	12a1      	lrw      	r5, 0x200003af	// 4554 <TK_Baseline_tracking+0x1c8>
+    4452:	3601      	movi      	r6, 1
+    4454:	a5c0      	st.b      	r6, (r5, 0x0)
+    4456:	3500      	movi      	r5, 0
+    4458:	a4a0      	st.b      	r5, (r4, 0x0)
+    445a:	5f80      	addu      	r4, r7, r0
+    445c:	8c80      	ld.h      	r4, (r4, 0x0)
+    445e:	7513      	sexth      	r4, r4
+    4460:	3cdf      	btsti      	r4, 31
+    4462:	0c10      	bf      	0x4482	// 4482 <TK_Baseline_tracking+0xf6>
+    4464:	11d9      	lrw      	r6, 0x2000053e	// 4548 <TK_Baseline_tracking+0x1bc>
+    4466:	59a0      	addu      	r5, r1, r0
+    4468:	6180      	addu      	r6, r0
+    446a:	8d80      	ld.h      	r4, (r5, 0x0)
+    446c:	8ec0      	ld.h      	r6, (r6, 0x0)
+    446e:	7599      	zexth      	r6, r6
+    4470:	7511      	zexth      	r4, r4
+    4472:	611a      	subu      	r4, r6
+    4474:	8bc0      	ld.h      	r6, (r3, 0x0)
+    4476:	6591      	cmplt      	r4, r6
+    4478:	0c05      	bf      	0x4482	// 4482 <TK_Baseline_tracking+0xf6>
+    447a:	8d80      	ld.h      	r4, (r5, 0x0)
+    447c:	2c00      	subi      	r4, 1
+    447e:	7511      	zexth      	r4, r4
+    4480:	ad80      	st.h      	r4, (r5, 0x0)
+    4482:	5f80      	addu      	r4, r7, r0
+    4484:	8c80      	ld.h      	r4, (r4, 0x0)
+    4486:	7513      	sexth      	r4, r4
+    4488:	3cdf      	btsti      	r4, 31
+    448a:	0c11      	bf      	0x44ac	// 44ac <TK_Baseline_tracking+0x120>
+    448c:	11cf      	lrw      	r6, 0x2000053e	// 4548 <TK_Baseline_tracking+0x1bc>
+    448e:	59a0      	addu      	r5, r1, r0
+    4490:	6180      	addu      	r6, r0
+    4492:	8d80      	ld.h      	r4, (r5, 0x0)
+    4494:	8ec0      	ld.h      	r6, (r6, 0x0)
+    4496:	7599      	zexth      	r6, r6
+    4498:	7511      	zexth      	r4, r4
+    449a:	611a      	subu      	r4, r6
+    449c:	8bc0      	ld.h      	r6, (r3, 0x0)
+    449e:	4ec1      	lsri      	r6, r6, 1
+    44a0:	6591      	cmplt      	r4, r6
+    44a2:	0805      	bt      	0x44ac	// 44ac <TK_Baseline_tracking+0x120>
+    44a4:	8d80      	ld.h      	r4, (r5, 0x0)
+    44a6:	2c01      	subi      	r4, 2
+    44a8:	7511      	zexth      	r4, r4
+    44aa:	ad80      	st.h      	r4, (r5, 0x0)
+    44ac:	5fa0      	addu      	r5, r7, r0
+    44ae:	8d80      	ld.h      	r4, (r5, 0x0)
+    44b0:	7513      	sexth      	r4, r4
+    44b2:	3c20      	cmplti      	r4, 1
+    44b4:	080c      	bt      	0x44cc	// 44cc <TK_Baseline_tracking+0x140>
+    44b6:	8da0      	ld.h      	r5, (r5, 0x0)
+    44b8:	8b80      	ld.h      	r4, (r3, 0x0)
+    44ba:	7557      	sexth      	r5, r5
+    44bc:	4c81      	lsri      	r4, r4, 1
+    44be:	6515      	cmplt      	r5, r4
+    44c0:	0c06      	bf      	0x44cc	// 44cc <TK_Baseline_tracking+0x140>
+    44c2:	59a0      	addu      	r5, r1, r0
+    44c4:	8d80      	ld.h      	r4, (r5, 0x0)
+    44c6:	2400      	addi      	r4, 1
+    44c8:	7511      	zexth      	r4, r4
+    44ca:	ad80      	st.h      	r4, (r5, 0x0)
+    44cc:	5fa0      	addu      	r5, r7, r0
+    44ce:	8d80      	ld.h      	r4, (r5, 0x0)
+    44d0:	7513      	sexth      	r4, r4
+    44d2:	3c20      	cmplti      	r4, 1
+    44d4:	0810      	bt      	0x44f4	// 44f4 <TK_Baseline_tracking+0x168>
+    44d6:	8dc0      	ld.h      	r6, (r5, 0x0)
+    44d8:	759b      	sexth      	r6, r6
+    44da:	8b80      	ld.h      	r4, (r3, 0x0)
+    44dc:	6519      	cmplt      	r6, r4
+    44de:	0c0b      	bf      	0x44f4	// 44f4 <TK_Baseline_tracking+0x168>
+    44e0:	8da0      	ld.h      	r5, (r5, 0x0)
+    44e2:	7557      	sexth      	r5, r5
+    44e4:	4c81      	lsri      	r4, r4, 1
+    44e6:	6515      	cmplt      	r5, r4
+    44e8:	0806      	bt      	0x44f4	// 44f4 <TK_Baseline_tracking+0x168>
+    44ea:	6004      	addu      	r0, r1
+    44ec:	8880      	ld.h      	r4, (r0, 0x0)
+    44ee:	2401      	addi      	r4, 2
+    44f0:	7511      	zexth      	r4, r4
+    44f2:	a880      	st.h      	r4, (r0, 0x0)
+    44f4:	2200      	addi      	r2, 1
+    44f6:	3a51      	cmpnei      	r2, 17
+    44f8:	2301      	addi      	r3, 2
+    44fa:	0b61      	bt      	0x43bc	// 43bc <TK_Baseline_tracking+0x30>
+    44fc:	1402      	addi      	r14, r14, 8
+    44fe:	1484      	pop      	r4-r7
+    4500:	5f80      	addu      	r4, r7, r0
+    4502:	8c80      	ld.h      	r4, (r4, 0x0)
+    4504:	7513      	sexth      	r4, r4
+    4506:	3cdf      	btsti      	r4, 31
+    4508:	0fa9      	bf      	0x445a	// 445a <TK_Baseline_tracking+0xce>
+    450a:	10b0      	lrw      	r5, 0x2000053e	// 4548 <TK_Baseline_tracking+0x1bc>
+    450c:	5980      	addu      	r4, r1, r0
+    450e:	6140      	addu      	r5, r0
+    4510:	8c80      	ld.h      	r4, (r4, 0x0)
+    4512:	8da0      	ld.h      	r5, (r5, 0x0)
+    4514:	7555      	zexth      	r5, r5
+    4516:	8bc0      	ld.h      	r6, (r3, 0x0)
+    4518:	7511      	zexth      	r4, r4
+    451a:	6116      	subu      	r4, r5
+    451c:	46a1      	lsli      	r5, r6, 1
+    451e:	6158      	addu      	r5, r6
+    4520:	6551      	cmplt      	r4, r5
+    4522:	0b9c      	bt      	0x445a	// 445a <TK_Baseline_tracking+0xce>
+    4524:	108c      	lrw      	r4, 0x200003af	// 4554 <TK_Baseline_tracking+0x1c8>
+    4526:	3501      	movi      	r5, 1
+    4528:	a4a0      	st.b      	r5, (r4, 0x0)
+    452a:	6c03      	mov      	r0, r0
+    452c:	0797      	br      	0x445a	// 445a <TK_Baseline_tracking+0xce>
+    452e:	0000      	bkpt
+    4530:	200003ca 	.long	0x200003ca
+    4534:	20000119 	.long	0x20000119
+    4538:	20000328 	.long	0x20000328
+    453c:	20000342 	.long	0x20000342
+    4540:	20000146 	.long	0x20000146
+    4544:	20000298 	.long	0x20000298
+    4548:	2000053e 	.long	0x2000053e
+    454c:	2000046c 	.long	0x2000046c
+    4550:	20000088 	.long	0x20000088
+    4554:	200003af 	.long	0x200003af
+    4558:	200003f2 	.long	0x200003f2
+
+Disassembly of section .text.TK_result_prog:
+
+0000455c <TK_result_prog>:
+    455c:	14d2      	push      	r4-r5, r15
+    455e:	1050      	lrw      	r2, 0x20000328	// 459c <TK_result_prog+0x40>
+    4560:	1090      	lrw      	r4, 0x200003cc	// 45a0 <TK_result_prog+0x44>
+    4562:	9260      	ld.w      	r3, (r2, 0x0)
+    4564:	3b40      	cmpnei      	r3, 0
+    4566:	0c02      	bf      	0x456a	// 456a <TK_result_prog+0xe>
+    4568:	9260      	ld.w      	r3, (r2, 0x0)
+    456a:	b460      	st.w      	r3, (r4, 0x0)
+    456c:	9460      	ld.w      	r3, (r4, 0x0)
+    456e:	3b40      	cmpnei      	r3, 0
+    4570:	10ad      	lrw      	r5, 0x200004a0	// 45a4 <TK_result_prog+0x48>
+    4572:	0c11      	bf      	0x4594	// 4594 <TK_result_prog+0x38>
+    4574:	9440      	ld.w      	r2, (r4, 0x0)
+    4576:	9560      	ld.w      	r3, (r5, 0x0)
+    4578:	64ca      	cmpne      	r2, r3
+    457a:	0c03      	bf      	0x4580	// 4580 <TK_result_prog+0x24>
+    457c:	9460      	ld.w      	r3, (r4, 0x0)
+    457e:	b560      	st.w      	r3, (r5, 0x0)
+    4580:	e3fffd94 	bsr      	0x40a8	// 40a8 <get_key_number>
+    4584:	1069      	lrw      	r3, 0x20000120	// 45a8 <TK_result_prog+0x4c>
+    4586:	8360      	ld.b      	r3, (r3, 0x0)
+    4588:	640c      	cmphs      	r3, r0
+    458a:	0804      	bt      	0x4592	// 4592 <TK_result_prog+0x36>
+    458c:	3300      	movi      	r3, 0
+    458e:	b460      	st.w      	r3, (r4, 0x0)
+    4590:	b560      	st.w      	r3, (r5, 0x0)
+    4592:	1492      	pop      	r4-r5, r15
+    4594:	1046      	lrw      	r2, 0x200003c4	// 45ac <TK_result_prog+0x50>
+    4596:	b560      	st.w      	r3, (r5, 0x0)
+    4598:	b260      	st.w      	r3, (r2, 0x0)
+    459a:	07fc      	br      	0x4592	// 4592 <TK_result_prog+0x36>
+    459c:	20000328 	.long	0x20000328
+    45a0:	200003cc 	.long	0x200003cc
+    45a4:	200004a0 	.long	0x200004a0
+    45a8:	20000120 	.long	0x20000120
+    45ac:	200003c4 	.long	0x200003c4
+
+Disassembly of section .text.CORETHandler:
+
+000045b0 <CORETHandler>:
+    45b0:	1460      	nie
+    45b2:	1462      	ipush
+    45b4:	14d1      	push      	r4, r15
+    45b6:	1077      	lrw      	r3, 0x20000064	// 4610 <CORETHandler+0x60>
+    45b8:	3400      	movi      	r4, 0
+    45ba:	9360      	ld.w      	r3, (r3, 0x0)
+    45bc:	b386      	st.w      	r4, (r3, 0x18)
+    45be:	1076      	lrw      	r3, 0x2000032c	// 4614 <CORETHandler+0x64>
+    45c0:	8360      	ld.b      	r3, (r3, 0x0)
+    45c2:	3b41      	cmpnei      	r3, 1
+    45c4:	0820      	bt      	0x4604	// 4604 <CORETHandler+0x54>
+    45c6:	e3fffd85 	bsr      	0x40d0	// 40d0 <TK_Scan_Start>
+    45ca:	e3fffd93 	bsr      	0x40f0	// 40f0 <TK_Keymap_prog>
+    45ce:	e3fffe51 	bsr      	0x4270	// 4270 <TK_overflow_predict>
+    45d2:	e3fffedd 	bsr      	0x438c	// 438c <TK_Baseline_tracking>
+    45d6:	e3ffffc3 	bsr      	0x455c	// 455c <TK_result_prog>
+    45da:	1070      	lrw      	r3, 0x200003cc	// 4618 <CORETHandler+0x68>
+    45dc:	9360      	ld.w      	r3, (r3, 0x0)
+    45de:	3b40      	cmpnei      	r3, 0
+    45e0:	0c12      	bf      	0x4604	// 4604 <CORETHandler+0x54>
+    45e2:	106f      	lrw      	r3, 0x200000f0	// 461c <CORETHandler+0x6c>
+    45e4:	9340      	ld.w      	r2, (r3, 0x0)
+    45e6:	3a40      	cmpnei      	r2, 0
+    45e8:	0c0e      	bf      	0x4604	// 4604 <CORETHandler+0x54>
+    45ea:	106e      	lrw      	r3, 0x200003c4	// 4620 <CORETHandler+0x70>
+    45ec:	3064      	movi      	r0, 100
+    45ee:	9320      	ld.w      	r1, (r3, 0x0)
+    45f0:	2100      	addi      	r1, 1
+    45f2:	b320      	st.w      	r1, (r3, 0x0)
+    45f4:	9320      	ld.w      	r1, (r3, 0x0)
+    45f6:	7c80      	mult      	r2, r0
+    45f8:	6448      	cmphs      	r2, r1
+    45fa:	0805      	bt      	0x4604	// 4604 <CORETHandler+0x54>
+    45fc:	104a      	lrw      	r2, 0x200003af	// 4624 <CORETHandler+0x74>
+    45fe:	3101      	movi      	r1, 1
+    4600:	a220      	st.b      	r1, (r2, 0x0)
+    4602:	b380      	st.w      	r4, (r3, 0x0)
+    4604:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    4608:	9880      	ld.w      	r4, (r14, 0x0)
+    460a:	1402      	addi      	r14, r14, 8
+    460c:	1463      	ipop
+    460e:	1461      	nir
+    4610:	20000064 	.long	0x20000064
+    4614:	2000032c 	.long	0x2000032c
+    4618:	200003cc 	.long	0x200003cc
+    461c:	200000f0 	.long	0x200000f0
+    4620:	200003c4 	.long	0x200003c4
+    4624:	200003af 	.long	0x200003af
+
+Disassembly of section .text.std_clk_calib:
+
+00004628 <std_clk_calib>:
+    4628:	14d4      	push      	r4-r7, r15
+    462a:	142d      	subi      	r14, r14, 52
+    462c:	3201      	movi      	r2, 1
+    462e:	03ce      	lrw      	r6, 0x2000005c	// 4870 <std_clk_calib+0x248>
+    4630:	6cc3      	mov      	r3, r0
+    4632:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    4636:	9640      	ld.w      	r2, (r6, 0x0)
+    4638:	9247      	ld.w      	r2, (r2, 0x1c)
+    463a:	7488      	zextb      	r2, r2
+    463c:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    4640:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    4644:	3a40      	cmpnei      	r2, 0
+    4646:	0c08      	bf      	0x4656	// 4656 <std_clk_calib+0x2e>
+    4648:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    464c:	3a42      	cmpnei      	r2, 2
+    464e:	0c04      	bf      	0x4656	// 4656 <std_clk_calib+0x2e>
+    4650:	3000      	movi      	r0, 0
+    4652:	140d      	addi      	r14, r14, 52
+    4654:	1494      	pop      	r4-r7, r15
+    4656:	0397      	lrw      	r4, 0x2000000c	// 4874 <std_clk_calib+0x24c>
+    4658:	3209      	movi      	r2, 9
+    465a:	9400      	ld.w      	r0, (r4, 0x0)
+    465c:	3b40      	cmpnei      	r3, 0
+    465e:	b041      	st.w      	r2, (r0, 0x4)
+    4660:	0857      	bt      	0x470e	// 470e <std_clk_calib+0xe6>
+    4662:	3307      	movi      	r3, 7
+    4664:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4668:	037b      	lrw      	r3, 0x2dc6c00	// 4878 <std_clk_calib+0x250>
+    466a:	b863      	st.w      	r3, (r14, 0xc)
+    466c:	3380      	movi      	r3, 128
+    466e:	4362      	lsli      	r3, r3, 2
+    4670:	b867      	st.w      	r3, (r14, 0x1c)
+    4672:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    4676:	74cc      	zextb      	r3, r3
+    4678:	b062      	st.w      	r3, (r0, 0x8)
+    467a:	037e      	lrw      	r3, 0xffff	// 487c <std_clk_calib+0x254>
+    467c:	b063      	st.w      	r3, (r0, 0xc)
+    467e:	3201      	movi      	r2, 1
+    4680:	3101      	movi      	r1, 1
+    4682:	03bf      	lrw      	r5, 0x20000014	// 4880 <std_clk_calib+0x258>
+    4684:	e3ffec74 	bsr      	0x1f6c	// 1f6c <BT_ConfigInterrupt_CMD>
+    4688:	95e0      	ld.w      	r7, (r5, 0x0)
+    468a:	137f      	lrw      	r3, 0xbe9c0005	// 4884 <std_clk_calib+0x25c>
+    468c:	b760      	st.w      	r3, (r7, 0x0)
+    468e:	135f      	lrw      	r2, 0x30010	// 4888 <std_clk_calib+0x260>
+    4690:	3300      	movi      	r3, 0
+    4692:	b762      	st.w      	r3, (r7, 0x8)
+    4694:	b743      	st.w      	r2, (r7, 0xc)
+    4696:	32d8      	movi      	r2, 216
+    4698:	b745      	st.w      	r2, (r7, 0x14)
+    469a:	974f      	ld.w      	r2, (r7, 0x3c)
+    469c:	3aa2      	bseti      	r2, 2
+    469e:	b74f      	st.w      	r2, (r7, 0x3c)
+    46a0:	9803      	ld.w      	r0, (r14, 0xc)
+    46a2:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    46a6:	327d      	movi      	r2, 125
+    46a8:	2100      	addi      	r1, 1
+    46aa:	7c48      	mult      	r1, r2
+    46ac:	b861      	st.w      	r3, (r14, 0x4)
+    46ae:	e3fff457 	bsr      	0x2f5c	// 2f5c <__udivsi3>
+    46b2:	b804      	st.w      	r0, (r14, 0x10)
+    46b4:	32fa      	movi      	r2, 250
+    46b6:	9824      	ld.w      	r1, (r14, 0x10)
+    46b8:	4242      	lsli      	r2, r2, 2
+    46ba:	6448      	cmphs      	r2, r1
+    46bc:	0bca      	bt      	0x4650	// 4650 <std_clk_calib+0x28>
+    46be:	9844      	ld.w      	r2, (r14, 0x10)
+    46c0:	3178      	movi      	r1, 120
+    46c2:	9804      	ld.w      	r0, (r14, 0x10)
+    46c4:	b840      	st.w      	r2, (r14, 0x0)
+    46c6:	e3fff44b 	bsr      	0x2f5c	// 2f5c <__udivsi3>
+    46ca:	9840      	ld.w      	r2, (r14, 0x0)
+    46cc:	6082      	subu      	r2, r0
+    46ce:	b845      	st.w      	r2, (r14, 0x14)
+    46d0:	9804      	ld.w      	r0, (r14, 0x10)
+    46d2:	3178      	movi      	r1, 120
+    46d4:	9844      	ld.w      	r2, (r14, 0x10)
+    46d6:	b840      	st.w      	r2, (r14, 0x0)
+    46d8:	e3fff442 	bsr      	0x2f5c	// 2f5c <__udivsi3>
+    46dc:	9840      	ld.w      	r2, (r14, 0x0)
+    46de:	6008      	addu      	r0, r2
+    46e0:	b806      	st.w      	r0, (r14, 0x18)
+    46e2:	c0807020 	psrclr      	ie
+    46e6:	9640      	ld.w      	r2, (r6, 0x0)
+    46e8:	9254      	ld.w      	r2, (r2, 0x50)
+    46ea:	b848      	st.w      	r2, (r14, 0x20)
+    46ec:	9861      	ld.w      	r3, (r14, 0x4)
+    46ee:	9440      	ld.w      	r2, (r4, 0x0)
+    46f0:	b260      	st.w      	r3, (r2, 0x0)
+    46f2:	b761      	st.w      	r3, (r7, 0x4)
+    46f4:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    46f8:	3b40      	cmpnei      	r3, 0
+    46fa:	083e      	bt      	0x4776	// 4776 <std_clk_calib+0x14e>
+    46fc:	e3ffebea 	bsr      	0x1ed0	// 1ed0 <LPT_Soft_Reset>
+    4700:	9400      	ld.w      	r0, (r4, 0x0)
+    4702:	e3ffec0b 	bsr      	0x1f18	// 1f18 <BT_Soft_Reset>
+    4706:	c1807420 	psrset      	ee, ie
+    470a:	3001      	movi      	r0, 1
+    470c:	07a3      	br      	0x4652	// 4652 <std_clk_calib+0x2a>
+    470e:	3b41      	cmpnei      	r3, 1
+    4710:	0806      	bt      	0x471c	// 471c <std_clk_calib+0xf4>
+    4712:	3303      	movi      	r3, 3
+    4714:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4718:	127d      	lrw      	r3, 0x16e3600	// 488c <std_clk_calib+0x264>
+    471a:	07a8      	br      	0x466a	// 466a <std_clk_calib+0x42>
+    471c:	3b42      	cmpnei      	r3, 2
+    471e:	0806      	bt      	0x472a	// 472a <std_clk_calib+0x102>
+    4720:	3301      	movi      	r3, 1
+    4722:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4726:	127b      	lrw      	r3, 0xb71b00	// 4890 <std_clk_calib+0x268>
+    4728:	07a1      	br      	0x466a	// 466a <std_clk_calib+0x42>
+    472a:	3b43      	cmpnei      	r3, 3
+    472c:	0806      	bt      	0x4738	// 4738 <std_clk_calib+0x110>
+    472e:	3300      	movi      	r3, 0
+    4730:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4734:	1278      	lrw      	r3, 0x5b8d80	// 4894 <std_clk_calib+0x26c>
+    4736:	079a      	br      	0x466a	// 466a <std_clk_calib+0x42>
+    4738:	3b44      	cmpnei      	r3, 4
+    473a:	0809      	bt      	0x474c	// 474c <std_clk_calib+0x124>
+    473c:	3300      	movi      	r3, 0
+    473e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4742:	1276      	lrw      	r3, 0x54c720	// 4898 <std_clk_calib+0x270>
+    4744:	b863      	st.w      	r3, (r14, 0xc)
+    4746:	3380      	movi      	r3, 128
+    4748:	4369      	lsli      	r3, r3, 9
+    474a:	0793      	br      	0x4670	// 4670 <std_clk_calib+0x48>
+    474c:	3b45      	cmpnei      	r3, 5
+    474e:	0806      	bt      	0x475a	// 475a <std_clk_calib+0x132>
+    4750:	3300      	movi      	r3, 0
+    4752:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4756:	1272      	lrw      	r3, 0x3ffed0	// 489c <std_clk_calib+0x274>
+    4758:	07f6      	br      	0x4744	// 4744 <std_clk_calib+0x11c>
+    475a:	3b46      	cmpnei      	r3, 6
+    475c:	0806      	bt      	0x4768	// 4768 <std_clk_calib+0x140>
+    475e:	3300      	movi      	r3, 0
+    4760:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4764:	126f      	lrw      	r3, 0x1fff68	// 48a0 <std_clk_calib+0x278>
+    4766:	07ef      	br      	0x4744	// 4744 <std_clk_calib+0x11c>
+    4768:	3b47      	cmpnei      	r3, 7
+    476a:	0b84      	bt      	0x4672	// 4672 <std_clk_calib+0x4a>
+    476c:	3300      	movi      	r3, 0
+    476e:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4772:	126d      	lrw      	r3, 0x1ffb8	// 48a4 <std_clk_calib+0x27c>
+    4774:	07e8      	br      	0x4744	// 4744 <std_clk_calib+0x11c>
+    4776:	9560      	ld.w      	r3, (r5, 0x0)
+    4778:	3101      	movi      	r1, 1
+    477a:	9440      	ld.w      	r2, (r4, 0x0)
+    477c:	b321      	st.w      	r1, (r3, 0x4)
+    477e:	b220      	st.w      	r1, (r2, 0x0)
+    4780:	3100      	movi      	r1, 0
+    4782:	b327      	st.w      	r1, (r3, 0x1c)
+    4784:	3004      	movi      	r0, 4
+    4786:	b225      	st.w      	r1, (r2, 0x14)
+    4788:	932e      	ld.w      	r1, (r3, 0x38)
+    478a:	6840      	and      	r1, r0
+    478c:	3940      	cmpnei      	r1, 0
+    478e:	0ffd      	bf      	0x4788	// 4788 <std_clk_calib+0x160>
+    4790:	9225      	ld.w      	r1, (r2, 0x14)
+    4792:	b82a      	st.w      	r1, (r14, 0x28)
+    4794:	3100      	movi      	r1, 0
+    4796:	b310      	st.w      	r0, (r3, 0x40)
+    4798:	b327      	st.w      	r1, (r3, 0x1c)
+    479a:	3004      	movi      	r0, 4
+    479c:	b225      	st.w      	r1, (r2, 0x14)
+    479e:	932e      	ld.w      	r1, (r3, 0x38)
+    47a0:	6840      	and      	r1, r0
+    47a2:	3940      	cmpnei      	r1, 0
+    47a4:	0ffd      	bf      	0x479e	// 479e <std_clk_calib+0x176>
+    47a6:	9225      	ld.w      	r1, (r2, 0x14)
+    47a8:	b82b      	st.w      	r1, (r14, 0x2c)
+    47aa:	3100      	movi      	r1, 0
+    47ac:	b310      	st.w      	r0, (r3, 0x40)
+    47ae:	b327      	st.w      	r1, (r3, 0x1c)
+    47b0:	3004      	movi      	r0, 4
+    47b2:	b225      	st.w      	r1, (r2, 0x14)
+    47b4:	932e      	ld.w      	r1, (r3, 0x38)
+    47b6:	6840      	and      	r1, r0
+    47b8:	3940      	cmpnei      	r1, 0
+    47ba:	0ffd      	bf      	0x47b4	// 47b4 <std_clk_calib+0x18c>
+    47bc:	9225      	ld.w      	r1, (r2, 0x14)
+    47be:	b82c      	st.w      	r1, (r14, 0x30)
+    47c0:	b310      	st.w      	r0, (r3, 0x40)
+    47c2:	982b      	ld.w      	r1, (r14, 0x2c)
+    47c4:	980c      	ld.w      	r0, (r14, 0x30)
+    47c6:	6040      	addu      	r1, r0
+    47c8:	b829      	st.w      	r1, (r14, 0x24)
+    47ca:	9829      	ld.w      	r1, (r14, 0x24)
+    47cc:	4921      	lsri      	r1, r1, 1
+    47ce:	b829      	st.w      	r1, (r14, 0x24)
+    47d0:	3100      	movi      	r1, 0
+    47d2:	b321      	st.w      	r1, (r3, 0x4)
+    47d4:	b220      	st.w      	r1, (r2, 0x0)
+    47d6:	b327      	st.w      	r1, (r3, 0x1c)
+    47d8:	b225      	st.w      	r1, (r2, 0x14)
+    47da:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    47de:	3b42      	cmpnei      	r3, 2
+    47e0:	9849      	ld.w      	r2, (r14, 0x24)
+    47e2:	082c      	bt      	0x483a	// 483a <std_clk_calib+0x212>
+    47e4:	1171      	lrw      	r3, 0x7ff	// 48a8 <std_clk_calib+0x280>
+    47e6:	648c      	cmphs      	r3, r2
+    47e8:	0c03      	bf      	0x47ee	// 47ee <std_clk_calib+0x1c6>
+    47ea:	3300      	movi      	r3, 0
+    47ec:	040f      	br      	0x480a	// 480a <std_clk_calib+0x1e2>
+    47ee:	9849      	ld.w      	r2, (r14, 0x24)
+    47f0:	9866      	ld.w      	r3, (r14, 0x18)
+    47f2:	648c      	cmphs      	r3, r2
+    47f4:	080e      	bt      	0x4810	// 4810 <std_clk_calib+0x1e8>
+    47f6:	9868      	ld.w      	r3, (r14, 0x20)
+    47f8:	9847      	ld.w      	r2, (r14, 0x1c)
+    47fa:	60ca      	subu      	r3, r2
+    47fc:	b868      	st.w      	r3, (r14, 0x20)
+    47fe:	32fe      	movi      	r2, 254
+    4800:	9868      	ld.w      	r3, (r14, 0x20)
+    4802:	4248      	lsli      	r2, r2, 8
+    4804:	68c8      	and      	r3, r2
+    4806:	3b40      	cmpnei      	r3, 0
+    4808:	0812      	bt      	0x482c	// 482c <std_clk_calib+0x204>
+    480a:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    480e:	0721      	br      	0x4650	// 4650 <std_clk_calib+0x28>
+    4810:	9849      	ld.w      	r2, (r14, 0x24)
+    4812:	9865      	ld.w      	r3, (r14, 0x14)
+    4814:	64c8      	cmphs      	r2, r3
+    4816:	0829      	bt      	0x4868	// 4868 <std_clk_calib+0x240>
+    4818:	9868      	ld.w      	r3, (r14, 0x20)
+    481a:	9847      	ld.w      	r2, (r14, 0x1c)
+    481c:	60c8      	addu      	r3, r2
+    481e:	b868      	st.w      	r3, (r14, 0x20)
+    4820:	33fe      	movi      	r3, 254
+    4822:	9848      	ld.w      	r2, (r14, 0x20)
+    4824:	4368      	lsli      	r3, r3, 8
+    4826:	688c      	and      	r2, r3
+    4828:	64ca      	cmpne      	r2, r3
+    482a:	0fe0      	bf      	0x47ea	// 47ea <std_clk_calib+0x1c2>
+    482c:	9660      	ld.w      	r3, (r6, 0x0)
+    482e:	9848      	ld.w      	r2, (r14, 0x20)
+    4830:	b354      	st.w      	r2, (r3, 0x50)
+    4832:	3001      	movi      	r0, 1
+    4834:	e3ffedd6 	bsr      	0x23e0	// 23e0 <delay_nms>
+    4838:	075e      	br      	0x46f4	// 46f4 <std_clk_calib+0xcc>
+    483a:	9866      	ld.w      	r3, (r14, 0x18)
+    483c:	648c      	cmphs      	r3, r2
+    483e:	0809      	bt      	0x4850	// 4850 <std_clk_calib+0x228>
+    4840:	9868      	ld.w      	r3, (r14, 0x20)
+    4842:	9847      	ld.w      	r2, (r14, 0x1c)
+    4844:	60ca      	subu      	r3, r2
+    4846:	b868      	st.w      	r3, (r14, 0x20)
+    4848:	32ff      	movi      	r2, 255
+    484a:	9868      	ld.w      	r3, (r14, 0x20)
+    484c:	4250      	lsli      	r2, r2, 16
+    484e:	07db      	br      	0x4804	// 4804 <std_clk_calib+0x1dc>
+    4850:	9849      	ld.w      	r2, (r14, 0x24)
+    4852:	9865      	ld.w      	r3, (r14, 0x14)
+    4854:	64c8      	cmphs      	r2, r3
+    4856:	0809      	bt      	0x4868	// 4868 <std_clk_calib+0x240>
+    4858:	9868      	ld.w      	r3, (r14, 0x20)
+    485a:	9847      	ld.w      	r2, (r14, 0x1c)
+    485c:	60c8      	addu      	r3, r2
+    485e:	b868      	st.w      	r3, (r14, 0x20)
+    4860:	33ff      	movi      	r3, 255
+    4862:	9848      	ld.w      	r2, (r14, 0x20)
+    4864:	4370      	lsli      	r3, r3, 16
+    4866:	07e0      	br      	0x4826	// 4826 <std_clk_calib+0x1fe>
+    4868:	3300      	movi      	r3, 0
+    486a:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    486e:	07e2      	br      	0x4832	// 4832 <std_clk_calib+0x20a>
+    4870:	2000005c 	.long	0x2000005c
+    4874:	2000000c 	.long	0x2000000c
+    4878:	02dc6c00 	.long	0x02dc6c00
+    487c:	0000ffff 	.long	0x0000ffff
+    4880:	20000014 	.long	0x20000014
+    4884:	be9c0005 	.long	0xbe9c0005
+    4888:	00030010 	.long	0x00030010
+    488c:	016e3600 	.long	0x016e3600
+    4890:	00b71b00 	.long	0x00b71b00
+    4894:	005b8d80 	.long	0x005b8d80
+    4898:	0054c720 	.long	0x0054c720
+    489c:	003ffed0 	.long	0x003ffed0
+    48a0:	001fff68 	.long	0x001fff68
+    48a4:	0001ffb8 	.long	0x0001ffb8
+    48a8:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/TRF_TM_CR_V02_20250219.map b/Source/Lst/TRF_TM_CR_V02_20250219.map
new file mode 100644
index 0000000..07258bb
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V02_20250219.map
@@ -0,0 +1,2247 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          319808 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         166
+  Section header string table index: 163
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 001a50 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00001a50 002a50 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00001a88 002a88 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00001afc 002afc 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        00001b48 002b48 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        00001b78 002b78 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        00001c00 002c00 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        00001c28 002c28 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00001c64 002c64 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        00001c78 002c78 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00001c90 002c90 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00001cb0 002cb0 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00001ccc 002ccc 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        00001ce8 002ce8 000040 00  AX  0   0  4
+  [15] .text.SYSCON_Int_ PROGBITS        00001d28 002d28 00000c 00  AX  0   0  4
+  [16] .text.SYSCON_INT_ PROGBITS        00001d34 002d34 000024 00  AX  0   0  4
+  [17] .text.Set_INT_Pri PROGBITS        00001d58 002d58 000030 00  AX  0   0  4
+  [18] .text.GPIO_Init   PROGBITS        00001d88 002d88 0000e0 00  AX  0   0  4
+  [19] .text.GPIO_PullHi PROGBITS        00001e68 002e68 000014 00  AX  0   0  2
+  [20] .text.GPIO_DriveS PROGBITS        00001e7c 002e7c 00000e 00  AX  0   0  2
+  [21] .text.GPIO_Write_ PROGBITS        00001e8a 002e8a 000008 00  AX  0   0  2
+  [22] .text.GPIO_Write_ PROGBITS        00001e92 002e92 000008 00  AX  0   0  2
+  [23] .text.GPIO_Revers PROGBITS        00001e9a 002e9a 000016 00  AX  0   0  2
+  [24] .text.GPIO_Read_S PROGBITS        00001eb0 002eb0 000010 00  AX  0   0  2
+  [25] .text.GPIO_Read_O PROGBITS        00001ec0 002ec0 000010 00  AX  0   0  2
+  [26] .text.LPT_Soft_Re PROGBITS        00001ed0 002ed0 000014 00  AX  0   0  4
+  [27] .text.WWDT_CNT_Lo PROGBITS        00001ee4 002ee4 000010 00  AX  0   0  4
+  [28] .text.BT_DeInit   PROGBITS        00001ef4 002ef4 00001c 00  AX  0   0  2
+  [29] .text.BT_Start    PROGBITS        00001f10 002f10 000008 00  AX  0   0  2
+  [30] .text.BT_Soft_Res PROGBITS        00001f18 002f18 00000a 00  AX  0   0  2
+  [31] .text.BT_Configur PROGBITS        00001f22 002f22 000018 00  AX  0   0  2
+  [32] .text.BT_ControlS PROGBITS        00001f3a 002f3a 00002c 00  AX  0   0  2
+  [33] .text.BT_Period_C PROGBITS        00001f66 002f66 000006 00  AX  0   0  2
+  [34] .text.BT_ConfigIn PROGBITS        00001f6c 002f6c 000012 00  AX  0   0  2
+  [35] .text.BT1_INT_ENA PROGBITS        00001f80 002f80 000010 00  AX  0   0  4
+  [36] .text.GPT_IO_Init PROGBITS        00001f90 002f90 0000a0 00  AX  0   0  4
+  [37] .text.GPT_Configu PROGBITS        00002030 003030 000014 00  AX  0   0  4
+  [38] .text.GPT_WaveCtr PROGBITS        00002044 003044 000044 00  AX  0   0  4
+  [39] .text.GPT_WaveLoa PROGBITS        00002088 003088 000014 00  AX  0   0  4
+  [40] .text.GPT_WaveOut PROGBITS        0000209c 00309c 0000b4 00  AX  0   0  4
+  [41] .text.GPT_Start   PROGBITS        00002150 003150 000010 00  AX  0   0  4
+  [42] .text.GPT_Period_ PROGBITS        00002160 003160 000010 00  AX  0   0  4
+  [43] .text.GPT_ConfigI PROGBITS        00002170 003170 00001c 00  AX  0   0  4
+  [44] .text.UART0_DeIni PROGBITS        0000218c 00318c 000018 00  AX  0   0  4
+  [45] .text.UART1_DeIni PROGBITS        000021a4 0031a4 000018 00  AX  0   0  4
+  [46] .text.UART2_DeIni PROGBITS        000021bc 0031bc 000018 00  AX  0   0  4
+  [47] .text.UART0_Int_E PROGBITS        000021d4 0031d4 00001c 00  AX  0   0  4
+  [48] .text.UART2_Int_E PROGBITS        000021f0 0031f0 00001c 00  AX  0   0  4
+  [49] .text.UART_IO_Ini PROGBITS        0000220c 00320c 0000ec 00  AX  0   0  4
+  [50] .text.UARTInit    PROGBITS        000022f8 0032f8 000010 00  AX  0   0  4
+  [51] .text.UARTInitRxT PROGBITS        00002308 003308 000010 00  AX  0   0  4
+  [52] .text.UARTTransmi PROGBITS        00002318 003318 00001e 00  AX  0   0  2
+  [53] .text.EPT_Stop    PROGBITS        00002338 003338 000028 00  AX  0   0  4
+  [54] .text.startup.mai PROGBITS        00002360 003360 000080 00  AX  0   0  4
+  [55] .text.delay_nms   PROGBITS        000023e0 0033e0 00002c 00  AX  0   0  2
+  [56] .text.GPT0_CONFIG PROGBITS        0000240c 00340c 000094 00  AX  0   0  4
+  [57] .text.BT_CONFIG   PROGBITS        000024a0 0034a0 000060 00  AX  0   0  4
+  [58] .text.SYSCON_CONF PROGBITS        00002500 003500 000062 00  AX  0   0  2
+  [59] .text.APT32F102_i PROGBITS        00002564 003564 000050 00  AX  0   0  4
+  [60] .text.SYSCONIntHa PROGBITS        000025b4 0035b4 0000f0 00  AX  0   0  4
+  [61] .text.IFCIntHandl PROGBITS        000026a4 0036a4 000068 00  AX  0   0  4
+  [62] .text.ADCIntHandl PROGBITS        0000270c 00370c 000068 00  AX  0   0  4
+  [63] .text.EPT0IntHand PROGBITS        00002774 003774 0001ac 00  AX  0   0  4
+  [64] .text.WWDTHandler PROGBITS        00002920 003920 000034 00  AX  0   0  4
+  [65] .text.GPT0IntHand PROGBITS        00002954 003954 000080 00  AX  0   0  4
+  [66] .text.RTCIntHandl PROGBITS        000029d4 0039d4 000070 00  AX  0   0  4
+  [67] .text.UART0IntHan PROGBITS        00002a44 003a44 00003c 00  AX  0   0  4
+  [68] .text.UART1IntHan PROGBITS        00002a80 003a80 00003c 00  AX  0   0  4
+  [69] .text.UART2IntHan PROGBITS        00002abc 003abc 000094 00  AX  0   0  4
+  [70] .text.SPI0IntHand PROGBITS        00002b50 003b50 0000e8 00  AX  0   0  4
+  [71] .text.SIO0IntHand PROGBITS        00002c38 003c38 000054 00  AX  0   0  4
+  [72] .text.EXI0IntHand PROGBITS        00002c8c 003c8c 000030 00  AX  0   0  4
+  [73] .text.EXI1IntHand PROGBITS        00002cbc 003cbc 000030 00  AX  0   0  4
+  [74] .text.EXI2to3IntH PROGBITS        00002cec 003cec 000048 00  AX  0   0  4
+  [75] .text.EXI4to9IntH PROGBITS        00002d34 003d34 00005c 00  AX  0   0  4
+  [76] .text.EXI10to15In PROGBITS        00002d90 003d90 000060 00  AX  0   0  4
+  [77] .text.LPTIntHandl PROGBITS        00002df0 003df0 000034 00  AX  0   0  4
+  [78] .text.BT0IntHandl PROGBITS        00002e24 003e24 00004c 00  AX  0   0  4
+  [79] .text.BT1IntHandl PROGBITS        00002e70 003e70 000064 00  AX  0   0  4
+  [80] .text.PriviledgeV PROGBITS        00002ed4 003ed4 000002 00  AX  0   0  2
+  [81] .text.PendTrapHan PROGBITS        00002ed6 003ed6 000008 00  AX  0   0  2
+  [82] .text.Trap3Handle PROGBITS        00002ede 003ede 000008 00  AX  0   0  2
+  [83] .text.Trap2Handle PROGBITS        00002ee6 003ee6 000008 00  AX  0   0  2
+  [84] .text.Trap1Handle PROGBITS        00002eee 003eee 000008 00  AX  0   0  2
+  [85] .text.Trap0Handle PROGBITS        00002ef6 003ef6 000008 00  AX  0   0  2
+  [86] .text.UnrecExecpH PROGBITS        00002efe 003efe 000008 00  AX  0   0  2
+  [87] .text.BreakPointH PROGBITS        00002f06 003f06 000008 00  AX  0   0  2
+  [88] .text.AccessErrHa PROGBITS        00002f0e 003f0e 000008 00  AX  0   0  2
+  [89] .text.IllegalInst PROGBITS        00002f16 003f16 000008 00  AX  0   0  2
+  [90] .text.MisalignedH PROGBITS        00002f1e 003f1e 000008 00  AX  0   0  2
+  [91] .text.CNTAIntHand PROGBITS        00002f26 003f26 000008 00  AX  0   0  2
+  [92] .text.I2CIntHandl PROGBITS        00002f2e 003f2e 000008 00  AX  0   0  2
+  [93] .text.__divsi3    PROGBITS        00002f38 003f38 000024 00  AX  0   0  4
+  [94] .text.__udivsi3   PROGBITS        00002f5c 003f5c 000024 00  AX  0   0  4
+  [95] .text.CK_CPU_EnAl PROGBITS        00002f80 003f80 000006 00  AX  0   0  2
+  [96] .text.UARTx_Init  PROGBITS        00002f88 003f88 0000d8 00  AX  0   0  4
+  [97] .text.UART2_RecvI PROGBITS        00003060 004060 000064 00  AX  0   0  4
+  [98] .text.UART2_TASK  PROGBITS        000030c4 0040c4 000094 00  AX  0   0  4
+  [99] .text.Dbg_Println PROGBITS        00003158 004158 00000c 00  AX  0   0  2
+  [100] .text.RC522_Delay PROGBITS        00003164 004164 000012 00  AX  0   0  2
+  [101] .text.RC522_ReadW PROGBITS        00003178 004178 000054 00  AX  0   0  4
+  [102] .text.RC522_ReadR PROGBITS        000031cc 0041cc 000038 00  AX  0   0  4
+  [103] .text.RC522_Write PROGBITS        00003204 004204 000030 00  AX  0   0  4
+  [104] .text.RC522_PcdRe PROGBITS        00003234 004234 00004c 00  AX  0   0  2
+  [105] .text.RC522_SetBi PROGBITS        00003280 004280 000018 00  AX  0   0  2
+  [106] .text.RC522_PcdAn PROGBITS        00003298 004298 00001a 00  AX  0   0  2
+  [107] .text.RC522_Clear PROGBITS        000032b2 0042b2 000016 00  AX  0   0  2
+  [108] .text.RC522_PcdAn PROGBITS        000032c8 0042c8 00000c 00  AX  0   0  2
+  [109] .text.RC522_Reset PROGBITS        000032d4 0042d4 000044 00  AX  0   0  4
+  [110] .text.M500PcdConf PROGBITS        00003318 004318 00007e 00  AX  0   0  2
+  [111] .text.RC522_Init  PROGBITS        00003398 004398 0000c0 00  AX  0   0  4
+  [112] .text.RC522_PcdCo PROGBITS        00003458 004458 000170 00  AX  0   0  4
+  [113] .text.RC522_PcdRe PROGBITS        000035c8 0045c8 000088 00  AX  0   0  4
+  [114] .text.RC522_PcdAn PROGBITS        00003650 004650 000074 00  AX  0   0  2
+  [115] .text.Card_Read_T PROGBITS        000036c4 0046c4 0000b0 00  AX  0   0  4
+  [116] .text.Detect_SPI_ PROGBITS        00003774 004774 00009c 00  AX  0   0  4
+  [117] .text.BLV_RLY_Ctr PROGBITS        00003810 004810 000030 00  AX  0   0  4
+  [118] .text.RLY_Light_C PROGBITS        00003840 004840 000040 00  AX  0   0  4
+  [119] .text.KEY1_LONG_P PROGBITS        00003880 004880 000068 00  AX  0   0  4
+  [120] .text.LogicCtrl_I PROGBITS        000038e8 0048e8 000034 00  AX  0   0  4
+  [121] .text.LogicCtrl_T PROGBITS        0000391c 00491c 0000f0 00  AX  0   0  4
+  [122] .text.LogicCtrl_N PROGBITS        00003a0c 004a0c 000070 00  AX  0   0  4
+  [123] .text.LogicCtrl_N PROGBITS        00003a7c 004a7c 0000c0 00  AX  0   0  4
+  [124] .text.BackLight_T PROGBITS        00003b3c 004b3c 000024 00  AX  0   0  4
+  [125] .text.Detect_WIFI PROGBITS        00003b60 004b60 000094 00  AX  0   0  4
+  [126] .text.Led_Task    PROGBITS        00003bf4 004bf4 000064 00  AX  0   0  4
+  [127] .text.CRC16       PROGBITS        00003c58 004c58 00003c 00  AX  0   0  4
+  [128] .text.Read_Versio PROGBITS        00003c94 004c94 000070 00  AX  0   0  4
+  [129] .text.Card_Recv_P PROGBITS        00003d04 004d04 00008c 00  AX  0   0  4
+  [130] .text.BLV_RLV_Ctr PROGBITS        00003d90 004d90 00001c 00  AX  0   0  4
+  [131] .text.RLY_Direct_ PROGBITS        00003dac 004dac 000064 00  AX  0   0  4
+  [132] .text.button_init PROGBITS        00003e10 004e10 00003a 00  AX  0   0  2
+  [133] .text.button_atta PROGBITS        00003e4a 004e4a 00000a 00  AX  0   0  2
+  [134] .text.button_hand PROGBITS        00003e54 004e54 000120 00  AX  0   0  2
+  [135] .text.button_star PROGBITS        00003f74 004f74 000024 00  AX  0   0  4
+  [136] .text.button_tick PROGBITS        00003f98 004f98 00001c 00  AX  0   0  4
+  [137] .text.read_button PROGBITS        00003fb4 004fb4 000014 00  AX  0   0  4
+  [138] .text.TK_Sampling PROGBITS        00003fc8 004fc8 000058 00  AX  0   0  4
+  [139] .text.TKEYIntHand PROGBITS        00004020 005020 000088 00  AX  0   0  4
+  [140] .text.get_key_num PROGBITS        000040a8 0050a8 000028 00  AX  0   0  4
+  [141] .text.TK_Scan_Sta PROGBITS        000040d0 0050d0 000020 00  AX  0   0  4
+  [142] .text.TK_Keymap_p PROGBITS        000040f0 0050f0 000180 00  AX  0   0  4
+  [143] .text.TK_overflow PROGBITS        00004270 005270 00011c 00  AX  0   0  4
+  [144] .text.TK_Baseline PROGBITS        0000438c 00538c 0001d0 00  AX  0   0  4
+  [145] .text.TK_result_p PROGBITS        0000455c 00555c 000054 00  AX  0   0  4
+  [146] .text.CORETHandle PROGBITS        000045b0 0055b0 000078 00  AX  0   0  4
+  [147] .text.std_clk_cal PROGBITS        00004628 005628 000284 00  AX  0   0  4
+  [148] .RomCode          PROGBITS        000048ac 00609c 000000 00   W  0   0  1
+  [149] .rodata           PROGBITS        000048ac 0058ac 00030c 00   A  0   0  4
+  [150] .data             PROGBITS        20000000 006000 00009c 00  WA  0   0  4
+  [151] .bss              NOBITS          2000009c 00609c 0004c4 00  WA  0   0  4
+  [152] .csky.attributes  CSKY_ATTRIBUTES 00000000 00609c 000022 00      0   0  1
+  [153] .comment          PROGBITS        00000000 0060be 000042 01  MS  0   0  1
+  [154] .csky_stack_size  PROGBITS        00000000 006100 00083c 00      0   0 16
+  [155] .debug_line       PROGBITS        00000000 00693c 003acf 00      0   0  1
+  [156] .debug_info       PROGBITS        00000000 00a40b 02c43b 00      0   0  1
+  [157] .debug_abbrev     PROGBITS        00000000 036846 002971 00      0   0  1
+  [158] .debug_aranges    PROGBITS        00000000 0391b8 000d00 00      0   0  8
+  [159] .debug_ranges     PROGBITS        00000000 039eb8 000c40 00      0   0  1
+  [160] .debug_str        PROGBITS        00000000 03aaf8 008942 01  MS  0   0  1
+  [161] .debug_frame      PROGBITS        00000000 04343c 001ea8 00      0   0  4
+  [162] .debug_loc        PROGBITS        00000000 0452e4 002f67 00      0   0  1
+  [163] .shstrtab         STRTAB          00000000 04d3d1 000d6f 00      0   0  1
+  [164] .symtab           SYMTAB          00000000 04824c 003df0 10     165 682  4
+  [165] .strtab           STRTAB          00000000 04c03c 001395 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x04bb8 0x04bb8 R E 0x1000
+  LOAD           0x006000 0x20000000 0x00004bb8 0x0009c 0x00560 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.SYSCON_Int_Enable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.GPIO_Read_Output .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART0_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInit .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.GPT0_CONFIG .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.CK_CPU_EnAllNormalIrq .text.UARTx_Init .text.UART2_RecvINT_Processing .text.UART2_TASK .text.Dbg_Println .text.RC522_Delay .text.RC522_ReadWriteOneByte .text.RC522_ReadRawRC .text.RC522_WriteRawRC .text.RC522_PcdReset .text.RC522_SetBitMask .text.RC522_PcdAntennaOn .text.RC522_ClearBitMask .text.RC522_PcdAntennaOff .text.RC522_Reset .text.M500PcdConfigISOType.part.1 .text.RC522_Init .text.RC522_PcdComMF522 .text.RC522_PcdRequest .text.RC522_PcdAnticoll .text.Card_Read_TasK .text.Detect_SPI_task .text.BLV_RLY_Ctrl_Purpose.part.0 .text.RLY_Light_Ctrl .text.KEY1_LONG_PRESS_RELEASE_Handler .text.LogicCtrl_Init .text.LogicCtrl_Task .text.LogicCtrl_NoRF_Init .text.LogicCtrl_NoRF_Task .text.BackLight_Task .text.Detect_WIFI_Task .text.Led_Task .text.CRC16 .text.Read_Version_Ack .text.Card_Recv_Pro .text.BLV_RLV_Ctrl_Init .text.RLY_Direct_Control .text.button_init .text.button_attach .text.button_handler .text.button_start .text.button_ticks .text.read_button_GPIO .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.BLV_RLV_Ctrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Direct_Control) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.RLY_Direct_Control) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_button.o(.text.read_button_GPIO) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Output) for GPIO_Read_Output
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.GPT0_CONFIG) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_Int_Enable) for UART0_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInit) for UARTInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.GPT0_CONFIG) for GPT0_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART2IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART2_RecvINT_Processing) for UART2_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.UART2_TASK) for UART2_TASK
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.BLV_RLY_Ctrl_Purpose.part.0) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_logic_ctrl.o(.text.Card_Recv_Pro) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Delay) for RC522_Delay
+	Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadWriteOneByte) for RC522_ReadWriteOneByte
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ReadRawRC) for RC522_ReadRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_WriteRawRC) for RC522_WriteRawRC
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdReset) for RC522_PcdReset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_SetBitMask) for RC522_SetBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOn) for RC522_PcdAntennaOn
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.M500PcdConfigISOType.part.1) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_ClearBitMask) for RC522_ClearBitMask
+	Obj/SYSTEM_rc522.o(.text.RC522_Reset) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAntennaOff) for RC522_PcdAntennaOff
+	Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) refers to Obj/SYSTEM_rc522.o(.text.RC522_Reset) for RC522_Reset
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_rc522.o(.text.RC522_Init) for RC522_Init
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdComMF522) for RC522_PcdComMF522
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) for RC522_PcdRequest
+	Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) refers to Obj/SYSTEM_rc522.o(.text.RC522_PcdAnticoll) for RC522_PcdAnticoll
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Card_Read_TasK) for Card_Read_TasK
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_rc522.o(.text.Detect_SPI_task) for Detect_SPI_task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Direct_Control) for RLY_Direct_Control
+	Obj/SYSTEM_logic_ctrl.o(.text.KEY1_LONG_PRESS_RELEASE_Handler) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.RLY_Light_Ctrl) for RLY_Light_Ctrl
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Init) for LogicCtrl_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_Task) for LogicCtrl_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) for LogicCtrl_NoRF_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) for LogicCtrl_NoRF_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.BackLight_Task) for BackLight_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Detect_WIFI_Task) for Detect_WIFI_Task
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_logic_ctrl.o(.text.Led_Task) for Led_Task
+	Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) refers to Obj/SYSTEM_logic_ctrl.o(.text.CRC16) for CRC16
+	Obj/SYSTEM_logic_ctrl.o(.text.Card_Recv_Pro) refers to Obj/SYSTEM_logic_ctrl.o(.text.CRC16) for CRC16
+	Obj/SYSTEM_logic_ctrl.o(.text.Card_Recv_Pro) refers to Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) for Read_Version_Ack
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_logic_ctrl.o(.text.BLV_RLV_Ctrl_Init) for BLV_RLV_Ctrl_Init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_init) for button_init
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_attach) for button_attach
+	Obj/SYSTEM_button.o(.text.button_ticks) refers to Obj/SYSTEM_button.o(.text.button_handler) for button_handler
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to Obj/SYSTEM_button.o(.text.button_start) for button_start
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Task) refers to Obj/SYSTEM_button.o(.text.button_ticks) for button_ticks
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_rc522.o(.text.RC522_PcdRequest) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.LogicCtrl_NoRF_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_logic_ctrl.o(.text.Read_Version_Ack) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_button.o(.text.button_init) refers to memset_fast.o(.text) for memset
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (491 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2906 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.EXTI_interrupt_CMD(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.GPIO_EXTI_interrupt(Obj/FWlib_apt32f102_syscon.o), (4 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_IntGroup_Set(Obj/FWlib_apt32f102_gpio.o), (268 bytes).
+	Removing .text.GPIOA0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (252 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3100 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3417 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3162 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4130 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3533 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3649 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4849 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4957 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7606 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2855 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
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+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.delay_nus(Obj/mcu_initial.o), (34 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text.__modsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text.__umodsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text.CK_CPU_DisAllNormalIrq(Obj/drivers_apt32f102_ck801.o), (6 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_uart.o), (4 bytes).
+	Removing .text.UART1_TASK(Obj/SYSTEM_uart.o), (148 bytes).
+	Removing .text.UART1_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (136 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (2 bytes).
+	Removing .text(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_rc522.o), (0 bytes).
+	Removing .text.RC522_CalulateCRC(Obj/SYSTEM_rc522.o), (102 bytes).
+	Removing .text.M500PcdConfigISOType(Obj/SYSTEM_rc522.o), (18 bytes).
+	Removing .text.RC522_MFRC522_SelectTag(Obj/SYSTEM_rc522.o), (110 bytes).
+	Removing .text.RC522_PcdSelect(Obj/SYSTEM_rc522.o), (106 bytes).
+	Removing .text.RC522_PcdAuthState(Obj/SYSTEM_rc522.o), (88 bytes).
+	Removing .text.RC522_PcdRead(Obj/SYSTEM_rc522.o), (84 bytes).
+	Removing .text.RC522_PcdWrite(Obj/SYSTEM_rc522.o), (142 bytes).
+	Removing .text(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_logic_ctrl.o), (0 bytes).
+	Removing .text.Ctrl_Backlight(Obj/SYSTEM_logic_ctrl.o), (36 bytes).
+	Removing .text.Debounce_Task(Obj/SYSTEM_logic_ctrl.o), (2 bytes).
+	Removing .text.KEY1_LONG_PRESS_START_Handler(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text.BLV_RLY_Ctrl_Purpose(Obj/SYSTEM_logic_ctrl.o), (16 bytes).
+	Removing .text.RLY_Zero_Control(Obj/SYSTEM_logic_ctrl.o), (68 bytes).
+	Removing .text(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_button.o), (0 bytes).
+	Removing .text.get_button_event(Obj/SYSTEM_button.o), (6 bytes).
+	Removing .text.button_stop(Obj/SYSTEM_button.o), (32 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (120 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+
+617 unused seciton(s) (total 179553 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
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+	$t                                 0x00003c94               0  .text.Read_Version_Ack
+	$d                                 0x00003d00               0  .text.Read_Version_Ack
+	$d                                 0x00003d04               0  .text.Card_Recv_Pro
+	$t                                 0x00003d04               0  .text.Card_Recv_Pro
+	$d                                 0x00003d80               0  .text.Card_Recv_Pro
+	$d                                 0x00003d90               0  .text.BLV_RLV_Ctrl_Init
+	$t                                 0x00003d90               0  .text.BLV_RLV_Ctrl_Init
+	$d                                 0x00003da8               0  .text.BLV_RLV_Ctrl_Init
+	$d                                 0x00003dac               0  .text.RLY_Direct_Control
+	$t                                 0x00003dac               0  .text.RLY_Direct_Control
+	$d                                 0x00003e04               0  .text.RLY_Direct_Control
+	$d                                 0x00003e10               0  .text.button_init
+	$t                                 0x00003e10               0  .text.button_init
+	$d                                 0x00003e4a               0  .text.button_attach
+	$t                                 0x00003e4a               0  .text.button_attach
+	$d                                 0x00003e54               0  .text.button_handler
+	$t                                 0x00003e54               0  .text.button_handler
+	$d                                 0x00003f74               0  .text.button_start
+	$t                                 0x00003f74               0  .text.button_start
+	$d                                 0x00003f94               0  .text.button_start
+	$d                                 0x00003f98               0  .text.button_ticks
+	$t                                 0x00003f98               0  .text.button_ticks
+	$d                                 0x00003fb0               0  .text.button_ticks
+	$d                                 0x00003fb4               0  .text.read_button_GPIO
+	$t                                 0x00003fb4               0  .text.read_button_GPIO
+	$d                                 0x00003fc4               0  .text.read_button_GPIO
+	$d                                 0x00003fc8               0  .text.TK_Sampling_prog
+	$t                                 0x00003fc8               0  .text.TK_Sampling_prog
+	$d                                 0x00004010               0  .text.TK_Sampling_prog
+	$d                                 0x00004020               0  .text.TKEYIntHandler
+	$t                                 0x00004020               0  .text.TKEYIntHandler
+	$d                                 0x0000409c               0  .text.TKEYIntHandler
+	$d                                 0x000040a8               0  .text.get_key_number
+	$t                                 0x000040a8               0  .text.get_key_number
+	$d                                 0x000040cc               0  .text.get_key_number
+	$d                                 0x000040d0               0  .text.TK_Scan_Start
+	$t                                 0x000040d0               0  .text.TK_Scan_Start
+	$d                                 0x000040e8               0  .text.TK_Scan_Start
+	$d                                 0x000040f0               0  .text.TK_Keymap_prog
+	$t                                 0x000040f0               0  .text.TK_Keymap_prog
+	$d                                 0x00004238               0  .text.TK_Keymap_prog
+	$d                                 0x00004270               0  .text.TK_overflow_predict
+	$t                                 0x00004270               0  .text.TK_overflow_predict
+	$d                                 0x00004358               0  .text.TK_overflow_predict
+	$d                                 0x0000438c               0  .text.TK_Baseline_tracking
+	$t                                 0x0000438c               0  .text.TK_Baseline_tracking
+	$d                                 0x00004530               0  .text.TK_Baseline_tracking
+	$d                                 0x0000455c               0  .text.TK_result_prog
+	$t                                 0x0000455c               0  .text.TK_result_prog
+	$d                                 0x0000459c               0  .text.TK_result_prog
+	$d                                 0x000045b0               0  .text.CORETHandler
+	$t                                 0x000045b0               0  .text.CORETHandler
+	$d                                 0x00004610               0  .text.CORETHandler
+	$d                                 0x00004628               0  .text.std_clk_calib
+	$t                                 0x00004628               0  .text.std_clk_calib
+	$d                                 0x00004870               0  .text.std_clk_calib
+	bp                                 0x000048ac      O       16  .rodata
+	dp_l                               0x000048bc      O       16  .rodata
+	dp_h                               0x000048cc      O       16  .rodata
+	NUM.6059                           0x200000ac      O        1  .bss
+	test_tick.5984                     0x200000dc      O        4  .bss
+	card_tick.5983                     0x200000e0      O        4  .bss
+	head_handle                        0x200000e8      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
+	__fixunsdfsi                       0x00000d10      F       56  .text
+	__adddf3                           0x0000101c      F       46  .text
+	__subdf3                           0x0000104c      F       54  .text
+	__muldf3                           0x00001084      F      564  .text
+	__divdf3                           0x000012b8      F      340  .text
+	__gtdf2                            0x0000140c      F       60  .text
+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__memset_fast                      0x00001964    w F      136  .text
+	memset                             0x00001964    w F      136  .text
+	__memcpy_fast                      0x000019ec    w F      100  .text
+	memcpy                             0x000019ec    w F      100  .text
+	__main                             0x00001a50      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00001afc      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x00001b48      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x00001b78      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x00001c00      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x00001c28      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00001c64      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x00001c78      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00001c90      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00001cb0      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00001ccc      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x00001ce8      F       64  .text.EXTI_trigger_CMD
+	SYSCON_Int_Enable                  0x00001d28      F       12  .text.SYSCON_Int_Enable
+	SYSCON_INT_Priority                0x00001d34      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x00001d58      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x00001d88      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x00001e68      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00001e7c      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_Write_High                    0x00001e8a      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x00001e92      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x00001e9a      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x00001eb0      F       16  .text.GPIO_Read_Status
+	GPIO_Read_Output                   0x00001ec0      F       16  .text.GPIO_Read_Output
+	LPT_Soft_Reset                     0x00001ed0      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x00001ee4      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x00001ef4      F       28  .text.BT_DeInit
+	BT_Start                           0x00001f10      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x00001f18      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x00001f22      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x00001f3a      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x00001f66      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x00001f6c      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x00001f80      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x00001f90      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x00002030      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00002044      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x00002088      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x0000209c      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x00002150      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x00002160      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x00002170      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x0000218c      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x000021a4      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x000021bc      F       24  .text.UART2_DeInit
+	UART0_Int_Enable                   0x000021d4      F       28  .text.UART0_Int_Enable
+	UART2_Int_Enable                   0x000021f0      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x0000220c      F      236  .text.UART_IO_Init
+	UARTInit                           0x000022f8      F       16  .text.UARTInit
+	UARTInitRxTxIntEn                  0x00002308      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x00002318      F       30  .text.UARTTransmit
+	EPT_Stop                           0x00002338      F       40  .text.EPT_Stop
+	main                               0x00002360      F      128  .text.startup.main
+	delay_nms                          0x000023e0      F       44  .text.delay_nms
+	GPT0_CONFIG                        0x0000240c      F      148  .text.GPT0_CONFIG
+	BT_CONFIG                          0x000024a0      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x00002500      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x00002564      F       80  .text.APT32F102_init
+	SYSCONIntHandler                   0x000025b4      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x000026a4      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x0000270c      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x00002774      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00002920      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00002954      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x000029d4      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00002a44      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00002a80      F       60  .text.UART1IntHandler
+	UART2IntHandler                    0x00002abc      F      148  .text.UART2IntHandler
+	SPI0IntHandler                     0x00002b50      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x00002c38      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00002c8c      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00002cbc      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x00002cec      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x00002d34      F       92  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00002d90      F       96  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x00002df0      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x00002e24      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00002e70      F      100  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00002ed4      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00002ed6      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x00002ede      F        8  .text.Trap3Handler
+	Trap2Handler                       0x00002ee6      F        8  .text.Trap2Handler
+	Trap1Handler                       0x00002eee      F        8  .text.Trap1Handler
+	Trap0Handler                       0x00002ef6      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x00002efe      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x00002f06      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x00002f0e      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x00002f16      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x00002f1e      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x00002f26      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x00002f2e      F        8  .text.I2CIntHandler
+	__divsi3                           0x00002f38      F       36  .text.__divsi3
+	__udivsi3                          0x00002f5c      F       36  .text.__udivsi3
+	CK_CPU_EnAllNormalIrq              0x00002f80      F        6  .text.CK_CPU_EnAllNormalIrq
+	UARTx_Init                         0x00002f88      F      216  .text.UARTx_Init
+	UART2_RecvINT_Processing           0x00003060      F      100  .text.UART2_RecvINT_Processing
+	UART2_TASK                         0x000030c4      F      148  .text.UART2_TASK
+	Dbg_Println                        0x00003158      F       12  .text.Dbg_Println
+	RC522_Delay                        0x00003164      F       18  .text.RC522_Delay
+	RC522_ReadWriteOneByte             0x00003178      F       84  .text.RC522_ReadWriteOneByte
+	RC522_ReadRawRC                    0x000031cc      F       56  .text.RC522_ReadRawRC
+	RC522_WriteRawRC                   0x00003204      F       48  .text.RC522_WriteRawRC
+	RC522_PcdReset                     0x00003234      F       76  .text.RC522_PcdReset
+	RC522_SetBitMask                   0x00003280      F       24  .text.RC522_SetBitMask
+	RC522_PcdAntennaOn                 0x00003298      F       26  .text.RC522_PcdAntennaOn
+	RC522_ClearBitMask                 0x000032b2      F       22  .text.RC522_ClearBitMask
+	RC522_PcdAntennaOff                0x000032c8      F       12  .text.RC522_PcdAntennaOff
+	RC522_Reset                        0x000032d4      F       68  .text.RC522_Reset
+	RC522_Init                         0x00003398      F      192  .text.RC522_Init
+	RC522_PcdComMF522                  0x00003458      F      368  .text.RC522_PcdComMF522
+	RC522_PcdRequest                   0x000035c8      F      136  .text.RC522_PcdRequest
+	RC522_PcdAnticoll                  0x00003650      F      116  .text.RC522_PcdAnticoll
+	Card_Read_TasK                     0x000036c4      F      176  .text.Card_Read_TasK
+	Detect_SPI_task                    0x00003774      F      156  .text.Detect_SPI_task
+	RLY_Light_Ctrl                     0x00003840      F       64  .text.RLY_Light_Ctrl
+	KEY1_LONG_PRESS_RELEASE_Handler    0x00003880      F      104  .text.KEY1_LONG_PRESS_RELEASE_Handler
+	LogicCtrl_Init                     0x000038e8      F       52  .text.LogicCtrl_Init
+	LogicCtrl_Task                     0x0000391c      F      240  .text.LogicCtrl_Task
+	LogicCtrl_NoRF_Init                0x00003a0c      F      112  .text.LogicCtrl_NoRF_Init
+	LogicCtrl_NoRF_Task                0x00003a7c      F      192  .text.LogicCtrl_NoRF_Task
+	BackLight_Task                     0x00003b3c      F       36  .text.BackLight_Task
+	Detect_WIFI_Task                   0x00003b60      F      148  .text.Detect_WIFI_Task
+	Led_Task                           0x00003bf4      F      100  .text.Led_Task
+	CRC16                              0x00003c58      F       60  .text.CRC16
+	Read_Version_Ack                   0x00003c94      F      112  .text.Read_Version_Ack
+	Card_Recv_Pro                      0x00003d04      F      140  .text.Card_Recv_Pro
+	BLV_RLV_Ctrl_Init                  0x00003d90      F       28  .text.BLV_RLV_Ctrl_Init
+	RLY_Direct_Control                 0x00003dac      F      100  .text.RLY_Direct_Control
+	button_init                        0x00003e10      F       58  .text.button_init
+	button_attach                      0x00003e4a      F       10  .text.button_attach
+	button_handler                     0x00003e54      F      288  .text.button_handler
+	button_start                       0x00003f74      F       36  .text.button_start
+	button_ticks                       0x00003f98      F       28  .text.button_ticks
+	read_button_GPIO                   0x00003fb4      F       20  .text.read_button_GPIO
+	TK_Sampling_prog                   0x00003fc8      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x00004020      F      136  .text.TKEYIntHandler
+	get_key_number                     0x000040a8      F       40  .text.get_key_number
+	TK_Scan_Start                      0x000040d0      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x000040f0      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00004270      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x0000438c      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x0000455c      F       84  .text.TK_result_prog
+	CORETHandler                       0x000045b0      F      120  .text.CORETHandler
+	std_clk_calib                      0x00004628      F      644  .text.std_clk_calib
+	__thenan_df                        0x000048dc      O       20  .rodata
+	__clz_tab                          0x000048f0      O      256  .rodata
+	_end_rodata                        0x00004bb8               0  .rodata
+	HWD                                0x20000000      O        4  .data
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+	BT1                                0x20000008      O        4  .data
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+	LPT                                0x20000014      O        4  .data
+	RTC                                0x20000018      O        4  .data
+	ETCB                               0x2000001c      O        4  .data
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+	UART1                              0x2000003c      O        4  .data
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+	GPIOGRP                            0x20000044      O        4  .data
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+	GPIOA0                             0x2000004c      O        4  .data
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+	CK801                              0x20000064      O        4  .data
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+	neg_build_bounce                   0x20000090      O        1  .data
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+	tk_scan_para0                      0x20000094      O        4  .data
+	scan_step_temp                     0x20000098      O        1  .data
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+	_bss_start                         0x2000009c               0  .bss
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+	detect_tick                        0x200000a4      O        4  .bss
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+	test_state                         0x200000a9      O        1  .bss
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+	SysTick_1ms                        0x200000b4      O        4  .bss
+	RS485_Comming                      0x200000b8      O        4  .bss
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+	RS485_Comm_Start                   0x200000c0      O        4  .bss
+	RS485_Comm_End                     0x200000c4      O        4  .bss
+	FIFOLevelReg_flag                  0x200000c8      O        1  .bss
+	scan_tick                          0x200000cc      O        4  .bss
+	HL_tick                            0x200000d0      O        4  .bss
+	Tim_Flag                           0x200000d4      O        4  .bss
+	start_light                        0x200000d8      O        1  .bss
+	power_tick                         0x200000e4      O        4  .bss
+	Press_debounce_data                0x200000ec      O        1  .bss
+	TK_Lowpower_mode                   0x200000ed      O        1  .bss
+	TK_Lowpower_level                  0x200000ee      O        1  .bss
+	TK_longpress_time                  0x200000f0      O        4  .bss
+	Release_debounce_data              0x200000f4      O        1  .bss
+	Key_mode                           0x200000f5      O        1  .bss
+	TK_icon                            0x200000f6      O       34  .bss
+	MultiTimes_Filter                  0x20000118      O        1  .bss
+	Base_Speed                         0x20000119      O        1  .bss
+	TK_IO_ENABLE                       0x2000011c      O        4  .bss
+	Valid_Key_Num                      0x20000120      O        1  .bss
+	TK_senprd                          0x20000122      O       34  .bss
+	TK_Wakeup_level                    0x20000144      O        1  .bss
+	TK_Triggerlevel                    0x20000146      O       34  .bss
+	TK_EC_LEVEL                        0x20000168      O        2  .bss
+	TK_FVR_LEVEL                       0x2000016a      O        2  .bss
+	TK_BaseCnt                         0x2000016c      O        4  .bss
+	TK_PSEL_MODE                       0x20000170      O        2  .bss
+	R_CMPB_BUF                         0x20000174      O        4  .bss
+	R_CMPA_BUF                         0x20000178      O        4  .bss
+	R_SIORX_buf                        0x2000017c      O       40  .bss
+	g_uart                             0x200001a4      O      115  .bss
+	CardInfo                           0x20000218      O       52  .bss
+	c_rly                              0x2000024c      O        8  .bss
+	g_read                             0x20000254      O        8  .bss
+	KEY1                               0x2000025c      O       48  .bss
+	dm_in                              0x2000028c      O        9  .bss
+	baseline_data0                     0x20000298      O       34  .bss
+	TK_Postive_build2                  0x200002ba      O       17  .bss
+	Key_Map1                           0x200002cc      O        4  .bss
+	offset_data2_abs                   0x200002d0      O       34  .bss
+	scan_f                             0x200002f2      O        1  .bss
+	offset_data1_abs                   0x200002f4      O       34  .bss
+	Release_debounce0                  0x20000316      O       17  .bss
+	Key_Map0                           0x20000328      O        4  .bss
+	bsae_over_f                        0x2000032c      O        1  .bss
+	scan_cnt                           0x2000032e      O        2  .bss
+	Press_debounce0                    0x20000330      O       17  .bss
+	offset_data0                       0x20000342      O       34  .bss
+	sampling_data1                     0x20000364      O       34  .bss
+	Key_Map2                           0x20000388      O        4  .bss
+	Release_debounce1                  0x2000038c      O       17  .bss
+	tk_overflow_f                      0x2000039d      O        1  .bss
+	TK_Negtive_build2                  0x2000039e      O       17  .bss
+	base_update_f                      0x200003af      O        1  .bss
+	TK_Postive_build1                  0x200003b0      O       17  .bss
+	time_cnt                           0x200003c4      O        4  .bss
+	lpt_scan_pend_cnt                  0x200003c8      O        2  .bss
+	TK_track_cnt                       0x200003ca      O        1  .bss
+	Key_Map                            0x200003cc      O        4  .bss
+	baseline_data1                     0x200003d0      O       34  .bss
+	TK_Postive_build0                  0x200003f2      O       17  .bss
+	sampling_data2                     0x20000404      O       34  .bss
+	offset_data1                       0x20000426      O       34  .bss
+	TK_ovrdect_cnt                     0x20000448      O        1  .bss
+	Press_debounce2                    0x20000449      O       17  .bss
+	TK_Negtive_build1                  0x2000045a      O       17  .bss
+	tk_num                             0x2000046b      O        1  .bss
+	TK_Negtive_build0                  0x2000046c      O       17  .bss
+	Press_debounce1                    0x2000047d      O       17  .bss
+	Release_debounce2                  0x2000048e      O       17  .bss
+	r_Key_Map_Temp                     0x200004a0      O        4  .bss
+	tk_seque                           0x200004a4      O       17  .bss
+	scan_step                          0x200004b5      O        1  .bss
+	baseline_data2                     0x200004b6      O       34  .bss
+	tk_sampling_max                    0x200004d8      O       34  .bss
+	offset_data0_abs                   0x200004fa      O       34  .bss
+	offset_data2                       0x2000051c      O       34  .bss
+	sampling_data0                     0x2000053e      O       34  .bss
+	_ebss                              0x20000560               0  .bss
+	_end                               0x20000560               0  .bss
+	end                                0x20000560               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00004bb8, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1018  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1026  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1032  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1039  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1050  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1055  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1062  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1069  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1076  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1083  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1090  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1097  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1104  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1111  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1125  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1132  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1139  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1145  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1152  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1159  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000088   Code   RO       1180  .text          	memset_fast.o
+    0x000019ec   0x00000064   Code   RO       1185  .text          	memcpy_fast.o
+    0x00001a50   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00001a88   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00001afc   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x00001b48   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001b78   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c00   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x00001c28   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001c64   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x00001c78   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c90   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cb0   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ccc   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ce8   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d28   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d34   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001d58   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001d88   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001e68   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001e7c   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x00001e8a   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x00001e92   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x00001e9a   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x00001eb0   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00001ec0   0x00000010   Code   RO        152  .text.GPIO_Read_Output	Obj/FWlib_apt32f102_gpio.o
+    0x00001ed0   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x00001ee4   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x00001ef4   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x00001f10   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x00001f18   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x00001f22   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x00001f3a   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x00001f66   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x00001f6c   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x00001f80   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x00001f90   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x00002030   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002044   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002088   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x0000209c   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002150   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x00002160   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x00002170   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x0000218c   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021a4   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021bc   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000021d4   0x0000001c   Code   RO        438  .text.UART0_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x000021f0   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x0000220c   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x000022f8   0x00000010   Code   RO        451  .text.UARTInit 	Obj/FWlib_apt32f102_uart.o
+    0x00002308   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x00002318   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x00002338   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x00002360   0x00000080   Code   RO        690  .text.startup.main	Obj/main.o
+    0x000023e0   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x0000240c   0x00000094   Code   RO        711  .text.GPT0_CONFIG	Obj/mcu_initial.o
+    0x000024a0   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x00002500   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x00002564   0x00000050   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x000025b4   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x000026a4   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x0000270c   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x00002774   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002920   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00002954   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x000029d4   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00002a44   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00002a80   0x0000003c   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00002abc   0x00000094   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00002b50   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x00002c38   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00002c8c   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00002cbc   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x00002cec   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x00002d34   0x0000005c   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00002d90   0x00000060   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x00002df0   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x00002e24   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00002e70   0x00000064   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00002ed4   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x00002ed6   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x00002ede   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x00002ee6   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x00002eee   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x00002ef6   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x00002efe   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x00002f06   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x00002f0e   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x00002f16   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x00002f1e   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x00002f26   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x00002f2e   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x00002f38   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x00002f5c   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x00002f80   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00002f88   0x000000d8   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x00003060   0x00000064   Code   RO        823  .text.UART2_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x000030c4   0x00000094   Code   RO        825  .text.UART2_TASK	Obj/SYSTEM_uart.o
+    0x00003158   0x0000000c   Code   RO        829  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x00003164   0x00000012   Code   RO        847  .text.RC522_Delay	Obj/SYSTEM_rc522.o
+    0x00003178   0x00000054   Code   RO        848  .text.RC522_ReadWriteOneByte	Obj/SYSTEM_rc522.o
+    0x000031cc   0x00000038   Code   RO        849  .text.RC522_ReadRawRC	Obj/SYSTEM_rc522.o
+    0x00003204   0x00000030   Code   RO        850  .text.RC522_WriteRawRC	Obj/SYSTEM_rc522.o
+    0x00003234   0x0000004c   Code   RO        851  .text.RC522_PcdReset	Obj/SYSTEM_rc522.o
+    0x00003280   0x00000018   Code   RO        852  .text.RC522_SetBitMask	Obj/SYSTEM_rc522.o
+    0x00003298   0x0000001a   Code   RO        853  .text.RC522_PcdAntennaOn	Obj/SYSTEM_rc522.o
+    0x000032b2   0x00000016   Code   RO        854  .text.RC522_ClearBitMask	Obj/SYSTEM_rc522.o
+    0x000032c8   0x0000000c   Code   RO        855  .text.RC522_PcdAntennaOff	Obj/SYSTEM_rc522.o
+    0x000032d4   0x00000044   Code   RO        856  .text.RC522_Reset	Obj/SYSTEM_rc522.o
+    0x00003318   0x0000007e   Code   RO        858  .text.M500PcdConfigISOType.part.1	Obj/SYSTEM_rc522.o
+    0x00003398   0x000000c0   Code   RO        860  .text.RC522_Init	Obj/SYSTEM_rc522.o
+    0x00003458   0x00000170   Code   RO        861  .text.RC522_PcdComMF522	Obj/SYSTEM_rc522.o
+    0x000035c8   0x00000088   Code   RO        867  .text.RC522_PcdRequest	Obj/SYSTEM_rc522.o
+    0x00003650   0x00000074   Code   RO        868  .text.RC522_PcdAnticoll	Obj/SYSTEM_rc522.o
+    0x000036c4   0x000000b0   Code   RO        869  .text.Card_Read_TasK	Obj/SYSTEM_rc522.o
+    0x00003774   0x0000009c   Code   RO        870  .text.Detect_SPI_task	Obj/SYSTEM_rc522.o
+    0x00003810   0x00000030   Code   RO        888  .text.BLV_RLY_Ctrl_Purpose.part.0	Obj/SYSTEM_logic_ctrl.o
+    0x00003840   0x00000040   Code   RO        890  .text.RLY_Light_Ctrl	Obj/SYSTEM_logic_ctrl.o
+    0x00003880   0x00000068   Code   RO        891  .text.KEY1_LONG_PRESS_RELEASE_Handler	Obj/SYSTEM_logic_ctrl.o
+    0x000038e8   0x00000034   Code   RO        892  .text.LogicCtrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x0000391c   0x000000f0   Code   RO        893  .text.LogicCtrl_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003a0c   0x00000070   Code   RO        896  .text.LogicCtrl_NoRF_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00003a7c   0x000000c0   Code   RO        897  .text.LogicCtrl_NoRF_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003b3c   0x00000024   Code   RO        898  .text.BackLight_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003b60   0x00000094   Code   RO        899  .text.Detect_WIFI_Task	Obj/SYSTEM_logic_ctrl.o
+    0x00003bf4   0x00000064   Code   RO        900  .text.Led_Task 	Obj/SYSTEM_logic_ctrl.o
+    0x00003c58   0x0000003c   Code   RO        901  .text.CRC16    	Obj/SYSTEM_logic_ctrl.o
+    0x00003c94   0x00000070   Code   RO        902  .text.Read_Version_Ack	Obj/SYSTEM_logic_ctrl.o
+    0x00003d04   0x0000008c   Code   RO        903  .text.Card_Recv_Pro	Obj/SYSTEM_logic_ctrl.o
+    0x00003d90   0x0000001c   Code   RO        904  .text.BLV_RLV_Ctrl_Init	Obj/SYSTEM_logic_ctrl.o
+    0x00003dac   0x00000064   Code   RO        906  .text.RLY_Direct_Control	Obj/SYSTEM_logic_ctrl.o
+    0x00003e10   0x0000003a   Code   RO        925  .text.button_init	Obj/SYSTEM_button.o
+    0x00003e4a   0x0000000a   Code   RO        926  .text.button_attach	Obj/SYSTEM_button.o
+    0x00003e54   0x00000120   Code   RO        928  .text.button_handler	Obj/SYSTEM_button.o
+    0x00003f74   0x00000024   Code   RO        929  .text.button_start	Obj/SYSTEM_button.o
+    0x00003f98   0x0000001c   Code   RO        931  .text.button_ticks	Obj/SYSTEM_button.o
+    0x00003fb4   0x00000014   Code   RO        932  .text.read_button_GPIO	Obj/SYSTEM_button.o
+    0x00003fc8   0x00000058   Code   RO        964  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004020   0x00000088   Code   RO        968  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x000040a8   0x00000028   Code   RO        969  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x000040d0   0x00000020   Code   RO        971  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x000040f0   0x00000180   Code   RO        972  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004270   0x0000011c   Code   RO        973  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000438c   0x000001d0   Code   RO        974  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x0000455c   0x00000054   Code   RO        975  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x000045b0   0x00000078   Code   RO        976  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004628   0x00000284   Code   RO        998  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x000048ac   0x00000030   Data   RO       1021  .rodata        	pow.o
+    0x000048dc   0x00000014   Data   RO       1121  .rodata        	_thenan_df.o
+    0x000048f0   0x00000100   Data   RO       1169  .rodata        	_clz.o
+    0x000049f0   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x000049fb   0x0000007d   Data   RO        871  .rodata.str1.1 	Obj/SYSTEM_rc522.o
+    0x00004a78   0x00000140   Data   RO        908  .rodata.str1.1 	Obj/SYSTEM_logic_ctrl.o
+
+    Region RAM (Base: 0x20000000, Size: 0x00000560, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000031   Data   RW        955  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000099   0x00000003   PAD
+    0x2000009c   0x0000000e   Zero   RW        689  .bss           	Obj/main.o
+    0x200000aa   0x00000002   PAD
+    0x200000ac   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000b8   0x00000010   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200000c8   0x0000000c   Zero   RW        846  .bss           	Obj/SYSTEM_rc522.o
+    0x200000d4   0x00000014   Zero   RW        887  .bss           	Obj/SYSTEM_logic_ctrl.o
+    0x200000e8   0x00000004   Zero   RW        924  .bss           	Obj/SYSTEM_button.o
+    0x200000ec   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000172   0x00000002   PAD
+    0x20000174   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x200001a4   0x00000073   Zero   RW        843  COMMON         	Obj/SYSTEM_uart.o
+    0x20000217   0x00000001   PAD
+    0x20000218   0x00000034   Zero   RW        884  COMMON         	Obj/SYSTEM_rc522.o
+    0x2000024c   0x00000049   Zero   RW        921  COMMON         	Obj/SYSTEM_logic_ctrl.o
+    0x20000295   0x00000003   PAD
+    0x20000298   0x000002c8   Zero   RW        994  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        281   Obj/arch_crt0.o
+         56          0          0          0        817   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        768          0          0          0      21132   Obj/FWlib_apt32f102_syscon.o
+        328          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        426          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+        128         11          0        148      11254   Obj/main.o
+        466          0          0          0      16278   Obj/mcu_initial.o
+       2434          0          0         60      14440   Obj/mcu_interrupt.o
+         72          0        104          0       8379   Obj/drivers_apt32f102.o
+          6          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+        476          0          0        131      12213   Obj/SYSTEM_uart.o
+       1704        125          0         64      16271   Obj/SYSTEM_rc522.o
+       1536        320          0         93      14384   Obj/SYSTEM_logic_ctrl.o
+        440          0          0          4      11718   Obj/SYSTEM_button.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+      10014        456        104        500     243542   Object Totals
+          4          0          3          8          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16339   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16339   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+	------------------------------------------------------------
+       3172        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/c-sky/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+	------------------------------------------------------------
+        236          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      18590        780        156       1220     268556   Grand Totals
+      18590        780        156       1220     268556   Elf Image Totals
+      18590        780        156          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				19370 (  18.92kB)
+Total	RW	Size (RW Data + ZI Data)			1376 (  1.34kB)
+Total	ROM	Size (Code + RO Data + RW Data)		19526 (  19.07kB)
+
+======================================================================
diff --git a/Source/Lst/TRF_TM_CR_V03_20250221.asm b/Source/Lst/TRF_TM_CR_V03_20250221.asm
new file mode 100644
index 0000000..44d40d5
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V03_20250221.asm
@@ -0,0 +1,10850 @@
+
+.//Obj/TRF_TM_CR_V03_20250221.elf:     file format elf32-csky-little
+
+
+Disassembly of section .text:
+
+00000000 <vector_table>:
+       0:	0000010c 	.long	0x0000010c
+       4:	0000307a 	.long	0x0000307a
+       8:	0000306a 	.long	0x0000306a
+       c:	00000184 	.long	0x00000184
+      10:	00003072 	.long	0x00003072
+      14:	00003030 	.long	0x00003030
+      18:	00000184 	.long	0x00000184
+      1c:	00003062 	.long	0x00003062
+      20:	0000305a 	.long	0x0000305a
+      24:	00000184 	.long	0x00000184
+      28:	00000184 	.long	0x00000184
+      2c:	00000184 	.long	0x00000184
+      30:	00000184 	.long	0x00000184
+      34:	00000184 	.long	0x00000184
+      38:	00000184 	.long	0x00000184
+      3c:	00000184 	.long	0x00000184
+      40:	00003052 	.long	0x00003052
+      44:	0000304a 	.long	0x0000304a
+      48:	00003042 	.long	0x00003042
+      4c:	0000303a 	.long	0x0000303a
+      50:	00000184 	.long	0x00000184
+      54:	00000184 	.long	0x00000184
+      58:	00000184 	.long	0x00000184
+      5c:	00000184 	.long	0x00000184
+      60:	00000184 	.long	0x00000184
+      64:	00000184 	.long	0x00000184
+      68:	00000184 	.long	0x00000184
+      6c:	00000184 	.long	0x00000184
+      70:	00000184 	.long	0x00000184
+      74:	00000184 	.long	0x00000184
+      78:	00000184 	.long	0x00000184
+      7c:	00003032 	.long	0x00003032
+      80:	00004064 	.long	0x00004064
+      84:	00002724 	.long	0x00002724
+      88:	00002814 	.long	0x00002814
+      8c:	0000287c 	.long	0x0000287c
+      90:	000028e4 	.long	0x000028e4
+      94:	00000184 	.long	0x00000184
+      98:	00002a90 	.long	0x00002a90
+      9c:	00002e0c 	.long	0x00002e0c
+      a0:	00002e3c 	.long	0x00002e3c
+      a4:	00002ac4 	.long	0x00002ac4
+      a8:	00000184 	.long	0x00000184
+      ac:	00000184 	.long	0x00000184
+      b0:	00002b44 	.long	0x00002b44
+      b4:	00002bb4 	.long	0x00002bb4
+      b8:	00002bf0 	.long	0x00002bf0
+      bc:	00002c84 	.long	0x00002c84
+      c0:	00000184 	.long	0x00000184
+      c4:	0000308a 	.long	0x0000308a
+      c8:	00000184 	.long	0x00000184
+      cc:	00002cd0 	.long	0x00002cd0
+      d0:	00002db8 	.long	0x00002db8
+      d4:	00002e6c 	.long	0x00002e6c
+      d8:	00002eb4 	.long	0x00002eb4
+      dc:	00002ed4 	.long	0x00002ed4
+      e0:	00003082 	.long	0x00003082
+      e4:	00003ad4 	.long	0x00003ad4
+      e8:	00002f40 	.long	0x00002f40
+      ec:	00000184 	.long	0x00000184
+      f0:	00002f74 	.long	0x00002f74
+      f4:	00002fc0 	.long	0x00002fc0
+      f8:	00000184 	.long	0x00000184
+      fc:	00000184 	.long	0x00000184
+     100:	55aa0005 	.long	0x55aa0005
+	...
+
+0000010c <__start>:
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+     10c:	3000      	movi      	r0, 0
+  movi r1, 0
+     10e:	3100      	movi      	r1, 0
+  movi r2, 0
+     110:	3200      	movi      	r2, 0
+  movi r3, 0
+     112:	3300      	movi      	r3, 0
+  movi r4, 0
+     114:	3400      	movi      	r4, 0
+  movi r5, 0
+     116:	3500      	movi      	r5, 0
+  movi r6, 0
+     118:	3600      	movi      	r6, 0
+  movi r7, 0
+     11a:	3700      	movi      	r7, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+     11c:	105b      	lrw      	r2, 0x0	// 188 <DummyHandler+0x4>
+  mtcr r2, cr<1,0>
+     11e:	c0026421 	mtcr      	r2, cr<1, 0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+     122:	c0006022 	mfcr      	r2, cr<0, 0>
+  bseti r2, r2, 8
+     126:	3aa8      	bseti      	r2, 8
+  mtcr r2, cr<0,0>
+     128:	c0026420 	mtcr      	r2, cr<0, 0>
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+     12c:	1038      	lrw      	r1, 0xe000ef90	// 18c <DummyHandler+0x8>
+  movi    r2, 0x0
+     12e:	3200      	movi      	r2, 0
+  st.w    r2, (r1, 0x0)
+     130:	b140      	st.w      	r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+     132:	10f8      	lrw      	r7, 0x20000ff8	// 190 <DummyHandler+0xc>
+  mov r14,r7
+     134:	6f9f      	mov      	r14, r7
+  subi r6,r7,0x4
+     136:	5fcf      	subi      	r6, r7, 4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+     138:	3304      	movi      	r3, 4
+	
+  subu r4, r7, r3
+     13a:	5f8d      	subu      	r4, r7, r3
+  lrw  r5, 0x0
+     13c:	3500      	movi      	r5, 0
+
+0000013e <INIT_KERLE_STACK>:
+INIT_KERLE_STACK:
+  addi r4, 0x4
+     13e:	2403      	addi      	r4, 4
+  st.w r5, (r4)
+     140:	b4a0      	st.w      	r5, (r4, 0x0)
+  //cmphs r7, r4
+  cmphs r6, r4
+     142:	6518      	cmphs      	r6, r4
+  bt  INIT_KERLE_STACK
+     144:	0bfd      	bt      	0x13e	// 13e <INIT_KERLE_STACK>
+
+00000146 <__to_main>:
+        
+__to_main:
+  lrw r0,__main
+     146:	1014      	lrw      	r0, 0x1a50	// 194 <DummyHandler+0x10>
+  jsr r0
+     148:	7bc1      	jsr      	r0
+  mov r0, r0
+     14a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     14c:	6c03      	mov      	r0, r0
+
+
+  
+  lrw r15, __exit
+     14e:	ea8f0013 	lrw      	r15, 0x160	// 198 <DummyHandler+0x14>
+  lrw r0,main
+     152:	1013      	lrw      	r0, 0x25a0	// 19c <DummyHandler+0x18>
+  jmp r0
+     154:	7800      	jmp      	r0
+  mov r0, r0
+     156:	6c03      	mov      	r0, r0
+  mov r0, r0
+     158:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15a:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15c:	6c03      	mov      	r0, r0
+  mov r0, r0
+     15e:	6c03      	mov      	r0, r0
+
+00000160 <__exit>:
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+     160:	1090      	lrw      	r4, 0x20003000	// 1a0 <DummyHandler+0x1c>
+  //lrw r5, 0x0
+  mov r5, r0
+     162:	6d43      	mov      	r5, r0
+  st.w r5, (r4)
+     164:	b4a0      	st.w      	r5, (r4, 0x0)
+
+  mfcr r1, cr<0,0>
+     166:	c0006021 	mfcr      	r1, cr<0, 0>
+  lrw  r1, 0xFFFF
+     16a:	102f      	lrw      	r1, 0xffff	// 1a4 <DummyHandler+0x20>
+  mtcr r1, cr<11,0>
+     16c:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xFFF
+     170:	102e      	lrw      	r1, 0xfff	// 1a8 <DummyHandler+0x24>
+  movi    r0, 0x0
+     172:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     174:	b020      	st.w      	r1, (r0, 0x0)
+
+00000176 <__fail>:
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+     176:	102e      	lrw      	r1, 0xeeee	// 1ac <DummyHandler+0x28>
+  mtcr r1, cr<11,0>
+     178:	c001642b 	mtcr      	r1, cr<11, 0>
+  lrw     r1, 0xEEE
+     17c:	102d      	lrw      	r1, 0xeee	// 1b0 <DummyHandler+0x2c>
+  movi    r0, 0x0
+     17e:	3000      	movi      	r0, 0
+  st      r1, (r0)
+     180:	b020      	st.w      	r1, (r0, 0x0)
+
+00000182 <__dummy>:
+
+__dummy:
+  br      __fail
+     182:	07fa      	br      	0x176	// 176 <__fail>
+
+00000184 <DummyHandler>:
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+     184:	07f9      	br      	0x176	// 176 <__fail>
+     186:	0000      	.short	0x0000
+     188:	00000000 	.long	0x00000000
+     18c:	e000ef90 	.long	0xe000ef90
+     190:	20000ff8 	.long	0x20000ff8
+     194:	00001a50 	.long	0x00001a50
+     198:	00000160 	.long	0x00000160
+     19c:	000025a0 	.long	0x000025a0
+     1a0:	20003000 	.long	0x20003000
+     1a4:	0000ffff 	.long	0x0000ffff
+     1a8:	00000fff 	.long	0x00000fff
+     1ac:	0000eeee 	.long	0x0000eeee
+     1b0:	00000eee 	.long	0x00000eee
+
+000001b4 <__GI_pow>:
+     1b4:	14d4      	push      	r4-r7, r15
+     1b6:	142d      	subi      	r14, r14, 52
+     1b8:	b860      	st.w      	r3, (r14, 0x0)
+     1ba:	4361      	lsli      	r3, r3, 1
+     1bc:	4b81      	lsri      	r4, r3, 1
+     1be:	b842      	st.w      	r2, (r14, 0x8)
+     1c0:	6c90      	or      	r2, r4
+     1c2:	3a40      	cmpnei      	r2, 0
+     1c4:	6dc3      	mov      	r7, r0
+     1c6:	6d87      	mov      	r6, r1
+     1c8:	0803      	bt      	0x1ce	// 1ce <__GI_pow+0x1a>
+     1ca:	e8000462 	br      	0xa8e	// a8e <__GI_pow+0x8da>
+     1ce:	41a1      	lsli      	r5, r1, 1
+     1d0:	4da1      	lsri      	r5, r5, 1
+     1d2:	0055      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     1d4:	6549      	cmplt      	r2, r5
+     1d6:	080c      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1d8:	6496      	cmpne      	r5, r2
+     1da:	0803      	bt      	0x1e0	// 1e0 <__GI_pow+0x2c>
+     1dc:	3840      	cmpnei      	r0, 0
+     1de:	0808      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e0:	6509      	cmplt      	r2, r4
+     1e2:	0806      	bt      	0x1ee	// 1ee <__GI_pow+0x3a>
+     1e4:	6492      	cmpne      	r4, r2
+     1e6:	080e      	bt      	0x202	// 202 <__GI_pow+0x4e>
+     1e8:	9802      	ld.w      	r0, (r14, 0x8)
+     1ea:	3840      	cmpnei      	r0, 0
+     1ec:	0c0b      	bf      	0x202	// 202 <__GI_pow+0x4e>
+     1ee:	9842      	ld.w      	r2, (r14, 0x8)
+     1f0:	9860      	ld.w      	r3, (r14, 0x0)
+     1f2:	6c1f      	mov      	r0, r7
+     1f4:	6c5b      	mov      	r1, r6
+     1f6:	e0000713 	bsr      	0x101c	// 101c <__adddf3>
+     1fa:	6d03      	mov      	r4, r0
+     1fc:	6c13      	mov      	r0, r4
+     1fe:	140d      	addi      	r14, r14, 52
+     200:	1494      	pop      	r4-r7, r15
+     202:	3edf      	btsti      	r6, 31
+     204:	0c51      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     206:	0121      	lrw      	r1, 0x43400000	// 57c <__GI_pow+0x3c8>
+     208:	2900      	subi      	r1, 1
+     20a:	6505      	cmplt      	r1, r4
+     20c:	084b      	bt      	0x2a2	// 2a2 <__GI_pow+0xee>
+     20e:	0162      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     210:	2b00      	subi      	r3, 1
+     212:	650d      	cmplt      	r3, r4
+     214:	0c49      	bf      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     216:	5454      	asri      	r2, r4, 20
+     218:	0104      	lrw      	r0, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     21a:	6080      	addu      	r2, r0
+     21c:	3a34      	cmplti      	r2, 21
+     21e:	0821      	bt      	0x260	// 260 <__GI_pow+0xac>
+     220:	3334      	movi      	r3, 52
+     222:	60ca      	subu      	r3, r2
+     224:	9842      	ld.w      	r2, (r14, 0x8)
+     226:	708d      	lsr      	r2, r3
+     228:	6c4b      	mov      	r1, r2
+     22a:	704c      	lsl      	r1, r3
+     22c:	9802      	ld.w      	r0, (r14, 0x8)
+     22e:	6442      	cmpne      	r0, r1
+     230:	083b      	bt      	0x2a6	// 2a6 <__GI_pow+0xf2>
+     232:	3101      	movi      	r1, 1
+     234:	6884      	and      	r2, r1
+     236:	3302      	movi      	r3, 2
+     238:	5b49      	subu      	r2, r3, r2
+     23a:	9802      	ld.w      	r0, (r14, 0x8)
+     23c:	3840      	cmpnei      	r0, 0
+     23e:	b841      	st.w      	r2, (r14, 0x4)
+     240:	0862      	bt      	0x304	// 304 <__GI_pow+0x150>
+     242:	0151      	lrw      	r2, 0x7ff00000	// 578 <__GI_pow+0x3c4>
+     244:	6492      	cmpne      	r4, r2
+     246:	081f      	bt      	0x284	// 284 <__GI_pow+0xd0>
+     248:	012f      	lrw      	r1, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     24a:	6054      	addu      	r1, r5
+     24c:	6dc4      	or      	r7, r1
+     24e:	3f40      	cmpnei      	r7, 0
+     250:	082d      	bt      	0x2aa	// 2aa <__GI_pow+0xf6>
+     252:	9860      	ld.w      	r3, (r14, 0x0)
+     254:	3200      	movi      	r2, 0
+     256:	6c4f      	mov      	r1, r3
+     258:	3000      	movi      	r0, 0
+     25a:	e00006f9 	bsr      	0x104c	// 104c <__subdf3>
+     25e:	07ce      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     260:	9822      	ld.w      	r1, (r14, 0x8)
+     262:	3940      	cmpnei      	r1, 0
+     264:	084e      	bt      	0x300	// 300 <__GI_pow+0x14c>
+     266:	3114      	movi      	r1, 20
+     268:	604a      	subu      	r1, r2
+     26a:	6c93      	mov      	r2, r4
+     26c:	7086      	asr      	r2, r1
+     26e:	6c0b      	mov      	r0, r2
+     270:	7004      	lsl      	r0, r1
+     272:	6412      	cmpne      	r4, r0
+     274:	0c03      	bf      	0x27a	// 27a <__GI_pow+0xc6>
+     276:	e8000471 	br      	0xb58	// b58 <__GI_pow+0x9a4>
+     27a:	3101      	movi      	r1, 1
+     27c:	6884      	and      	r2, r1
+     27e:	3002      	movi      	r0, 2
+     280:	5869      	subu      	r3, r0, r2
+     282:	b861      	st.w      	r3, (r14, 0x4)
+     284:	0220      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     286:	6452      	cmpne      	r4, r1
+     288:	0825      	bt      	0x2d2	// 2d2 <__GI_pow+0x11e>
+     28a:	9880      	ld.w      	r4, (r14, 0x0)
+     28c:	3cdf      	btsti      	r4, 31
+     28e:	0803      	bt      	0x294	// 294 <__GI_pow+0xe0>
+     290:	e8000407 	br      	0xa9e	// a9e <__GI_pow+0x8ea>
+     294:	6c9f      	mov      	r2, r7
+     296:	6cdb      	mov      	r3, r6
+     298:	3000      	movi      	r0, 0
+     29a:	0225      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     29c:	e000080e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     2a0:	07ad      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2a2:	3202      	movi      	r2, 2
+     2a4:	07cb      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2a6:	3200      	movi      	r2, 0
+     2a8:	07c9      	br      	0x23a	// 23a <__GI_pow+0x86>
+     2aa:	0269      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     2ac:	2b00      	subi      	r3, 1
+     2ae:	654d      	cmplt      	r3, r5
+     2b0:	9800      	ld.w      	r0, (r14, 0x0)
+     2b2:	0c08      	bf      	0x2c2	// 2c2 <__GI_pow+0x10e>
+     2b4:	38df      	btsti      	r0, 31
+     2b6:	0803      	bt      	0x2bc	// 2bc <__GI_pow+0x108>
+     2b8:	e80003ef 	br      	0xa96	// a96 <__GI_pow+0x8e2>
+     2bc:	3400      	movi      	r4, 0
+     2be:	3100      	movi      	r1, 0
+     2c0:	079e      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2c2:	38df      	btsti      	r0, 31
+     2c4:	0ffc      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     2c6:	3400      	movi      	r4, 0
+     2c8:	6c43      	mov      	r1, r0
+     2ca:	3280      	movi      	r2, 128
+     2cc:	4278      	lsli      	r3, r2, 24
+     2ce:	604c      	addu      	r1, r3
+     2d0:	0796      	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     2d2:	3380      	movi      	r3, 128
+     2d4:	4317      	lsli      	r0, r3, 23
+     2d6:	9840      	ld.w      	r2, (r14, 0x0)
+     2d8:	640a      	cmpne      	r2, r0
+     2da:	0808      	bt      	0x2ea	// 2ea <__GI_pow+0x136>
+     2dc:	6c9f      	mov      	r2, r7
+     2de:	6cdb      	mov      	r3, r6
+     2e0:	6c1f      	mov      	r0, r7
+     2e2:	6c5b      	mov      	r1, r6
+     2e4:	e00006d0 	bsr      	0x1084	// 1084 <__muldf3>
+     2e8:	0789      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     2ea:	0276      	lrw      	r3, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     2ec:	9820      	ld.w      	r1, (r14, 0x0)
+     2ee:	64c6      	cmpne      	r1, r3
+     2f0:	080a      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f2:	3edf      	btsti      	r6, 31
+     2f4:	0808      	bt      	0x304	// 304 <__GI_pow+0x150>
+     2f6:	6c1f      	mov      	r0, r7
+     2f8:	6c5b      	mov      	r1, r6
+     2fa:	e0000445 	bsr      	0xb84	// b84 <__GI_sqrt>
+     2fe:	077e      	br      	0x1fa	// 1fa <__GI_pow+0x46>
+     300:	3300      	movi      	r3, 0
+     302:	b861      	st.w      	r3, (r14, 0x4)
+     304:	6c1f      	mov      	r0, r7
+     306:	6c5b      	mov      	r1, r6
+     308:	b883      	st.w      	r4, (r14, 0xc)
+     30a:	e000042a 	bsr      	0xb5e	// b5e <__GI_fabs>
+     30e:	3f40      	cmpnei      	r7, 0
+     310:	6d03      	mov      	r4, r0
+     312:	9863      	ld.w      	r3, (r14, 0xc)
+     314:	0826      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     316:	3d40      	cmpnei      	r5, 0
+     318:	0c05      	bf      	0x322	// 322 <__GI_pow+0x16e>
+     31a:	4642      	lsli      	r2, r6, 2
+     31c:	0302      	lrw      	r0, 0xffc00000	// 590 <__GI_pow+0x3dc>
+     31e:	640a      	cmpne      	r2, r0
+     320:	0820      	bt      	0x360	// 360 <__GI_pow+0x1ac>
+     322:	9840      	ld.w      	r2, (r14, 0x0)
+     324:	3adf      	btsti      	r2, 31
+     326:	0c08      	bf      	0x336	// 336 <__GI_pow+0x182>
+     328:	6c93      	mov      	r2, r4
+     32a:	6cc7      	mov      	r3, r1
+     32c:	3000      	movi      	r0, 0
+     32e:	032a      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     330:	e00007c4 	bsr      	0x12b8	// 12b8 <__divdf3>
+     334:	6d03      	mov      	r4, r0
+     336:	3edf      	btsti      	r6, 31
+     338:	0f62      	bf      	0x1fc	// 1fc <__GI_pow+0x48>
+     33a:	036b      	lrw      	r3, 0xc0100000	// 588 <__GI_pow+0x3d4>
+     33c:	614c      	addu      	r5, r3
+     33e:	9801      	ld.w      	r0, (r14, 0x4)
+     340:	6d40      	or      	r5, r0
+     342:	3d40      	cmpnei      	r5, 0
+     344:	080a      	bt      	0x358	// 358 <__GI_pow+0x1a4>
+     346:	6c93      	mov      	r2, r4
+     348:	6cc7      	mov      	r3, r1
+     34a:	6c0b      	mov      	r0, r2
+     34c:	6c4f      	mov      	r1, r3
+     34e:	e000067f 	bsr      	0x104c	// 104c <__subdf3>
+     352:	6c83      	mov      	r2, r0
+     354:	6cc7      	mov      	r3, r1
+     356:	07a3      	br      	0x29c	// 29c <__GI_pow+0xe8>
+     358:	9841      	ld.w      	r2, (r14, 0x4)
+     35a:	3a41      	cmpnei      	r2, 1
+     35c:	0b50      	bt      	0x1fc	// 1fc <__GI_pow+0x48>
+     35e:	07b6      	br      	0x2ca	// 2ca <__GI_pow+0x116>
+     360:	4e5f      	lsri      	r2, r6, 31
+     362:	2a00      	subi      	r2, 1
+     364:	b847      	st.w      	r2, (r14, 0x1c)
+     366:	9807      	ld.w      	r0, (r14, 0x1c)
+     368:	9841      	ld.w      	r2, (r14, 0x4)
+     36a:	6c80      	or      	r2, r0
+     36c:	3a40      	cmpnei      	r2, 0
+     36e:	0804      	bt      	0x376	// 376 <__GI_pow+0x1c2>
+     370:	6c9f      	mov      	r2, r7
+     372:	6cdb      	mov      	r3, r6
+     374:	07eb      	br      	0x34a	// 34a <__GI_pow+0x196>
+     376:	0357      	lrw      	r2, 0x41e00000	// 594 <__GI_pow+0x3e0>
+     378:	64c9      	cmplt      	r2, r3
+     37a:	0cbf      	bf      	0x4f8	// 4f8 <__GI_pow+0x344>
+     37c:	0358      	lrw      	r2, 0x43f00000	// 598 <__GI_pow+0x3e4>
+     37e:	64c9      	cmplt      	r2, r3
+     380:	037f      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     382:	0c0c      	bf      	0x39a	// 39a <__GI_pow+0x1e6>
+     384:	2b00      	subi      	r3, 1
+     386:	654d      	cmplt      	r3, r5
+     388:	080f      	bt      	0x3a6	// 3a6 <__GI_pow+0x1f2>
+     38a:	9820      	ld.w      	r1, (r14, 0x0)
+     38c:	39df      	btsti      	r1, 31
+     38e:	0f97      	bf      	0x2bc	// 2bc <__GI_pow+0x108>
+     390:	035c      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     392:	037b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     394:	6c0b      	mov      	r0, r2
+     396:	6c4f      	mov      	r1, r3
+     398:	07a6      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     39a:	2b01      	subi      	r3, 2
+     39c:	654d      	cmplt      	r3, r5
+     39e:	0ff6      	bf      	0x38a	// 38a <__GI_pow+0x1d6>
+     3a0:	1318      	lrw      	r0, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3a2:	6541      	cmplt      	r0, r5
+     3a4:	0c05      	bf      	0x3ae	// 3ae <__GI_pow+0x1fa>
+     3a6:	9800      	ld.w      	r0, (r14, 0x0)
+     3a8:	3820      	cmplti      	r0, 1
+     3aa:	0ff3      	bf      	0x390	// 390 <__GI_pow+0x1dc>
+     3ac:	0788      	br      	0x2bc	// 2bc <__GI_pow+0x108>
+     3ae:	3200      	movi      	r2, 0
+     3b0:	1374      	lrw      	r3, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     3b2:	6c1f      	mov      	r0, r7
+     3b4:	6c5b      	mov      	r1, r6
+     3b6:	36c0      	movi      	r6, 192
+     3b8:	e000064a 	bsr      	0x104c	// 104c <__subdf3>
+     3bc:	4657      	lsli      	r2, r6, 23
+     3be:	137a      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     3c0:	6d43      	mov      	r5, r0
+     3c2:	6d07      	mov      	r4, r1
+     3c4:	e0000660 	bsr      	0x1084	// 1084 <__muldf3>
+     3c8:	6dc3      	mov      	r7, r0
+     3ca:	6d87      	mov      	r6, r1
+     3cc:	1357      	lrw      	r2, 0xf85ddf44	// 5a8 <__GI_pow+0x3f4>
+     3ce:	1378      	lrw      	r3, 0x3e54ae0b	// 5ac <__GI_pow+0x3f8>
+     3d0:	6c17      	mov      	r0, r5
+     3d2:	6c53      	mov      	r1, r4
+     3d4:	e0000658 	bsr      	0x1084	// 1084 <__muldf3>
+     3d8:	b803      	st.w      	r0, (r14, 0xc)
+     3da:	b824      	st.w      	r1, (r14, 0x10)
+     3dc:	3200      	movi      	r2, 0
+     3de:	1375      	lrw      	r3, 0x3fd00000	// 5b0 <__GI_pow+0x3fc>
+     3e0:	6c17      	mov      	r0, r5
+     3e2:	6c53      	mov      	r1, r4
+     3e4:	e0000650 	bsr      	0x1084	// 1084 <__muldf3>
+     3e8:	6c83      	mov      	r2, r0
+     3ea:	6cc7      	mov      	r3, r1
+     3ec:	1312      	lrw      	r0, 0x55555555	// 5b4 <__GI_pow+0x400>
+     3ee:	1333      	lrw      	r1, 0x3fd55555	// 5b8 <__GI_pow+0x404>
+     3f0:	e000062e 	bsr      	0x104c	// 104c <__subdf3>
+     3f4:	6c97      	mov      	r2, r5
+     3f6:	6cd3      	mov      	r3, r4
+     3f8:	e0000646 	bsr      	0x1084	// 1084 <__muldf3>
+     3fc:	6c83      	mov      	r2, r0
+     3fe:	6cc7      	mov      	r3, r1
+     400:	3000      	movi      	r0, 0
+     402:	1323      	lrw      	r1, 0x3fe00000	// 58c <__GI_pow+0x3d8>
+     404:	e0000624 	bsr      	0x104c	// 104c <__subdf3>
+     408:	b805      	st.w      	r0, (r14, 0x14)
+     40a:	6c97      	mov      	r2, r5
+     40c:	6cd3      	mov      	r3, r4
+     40e:	b826      	st.w      	r1, (r14, 0x18)
+     410:	6c17      	mov      	r0, r5
+     412:	6c53      	mov      	r1, r4
+     414:	e0000638 	bsr      	0x1084	// 1084 <__muldf3>
+     418:	6c83      	mov      	r2, r0
+     41a:	6cc7      	mov      	r3, r1
+     41c:	9805      	ld.w      	r0, (r14, 0x14)
+     41e:	9826      	ld.w      	r1, (r14, 0x18)
+     420:	e0000632 	bsr      	0x1084	// 1084 <__muldf3>
+     424:	1346      	lrw      	r2, 0x652b82fe	// 5bc <__GI_pow+0x408>
+     426:	1360      	lrw      	r3, 0x3ff71547	// 5a4 <__GI_pow+0x3f0>
+     428:	e000062e 	bsr      	0x1084	// 1084 <__muldf3>
+     42c:	6c83      	mov      	r2, r0
+     42e:	6cc7      	mov      	r3, r1
+     430:	9803      	ld.w      	r0, (r14, 0xc)
+     432:	9824      	ld.w      	r1, (r14, 0x10)
+     434:	e000060c 	bsr      	0x104c	// 104c <__subdf3>
+     438:	6c83      	mov      	r2, r0
+     43a:	6cc7      	mov      	r3, r1
+     43c:	6d43      	mov      	r5, r0
+     43e:	6d07      	mov      	r4, r1
+     440:	6c1f      	mov      	r0, r7
+     442:	6c5b      	mov      	r1, r6
+     444:	e00005ec 	bsr      	0x101c	// 101c <__adddf3>
+     448:	6c9f      	mov      	r2, r7
+     44a:	6cdb      	mov      	r3, r6
+     44c:	3000      	movi      	r0, 0
+     44e:	b823      	st.w      	r1, (r14, 0xc)
+     450:	e00005fe 	bsr      	0x104c	// 104c <__subdf3>
+     454:	6c83      	mov      	r2, r0
+     456:	6cc7      	mov      	r3, r1
+     458:	6c17      	mov      	r0, r5
+     45a:	6c53      	mov      	r1, r4
+     45c:	e00005f8 	bsr      	0x104c	// 104c <__subdf3>
+     460:	6d07      	mov      	r4, r1
+     462:	9821      	ld.w      	r1, (r14, 0x4)
+     464:	2900      	subi      	r1, 1
+     466:	9847      	ld.w      	r2, (r14, 0x1c)
+     468:	6c48      	or      	r1, r2
+     46a:	3940      	cmpnei      	r1, 0
+     46c:	6d43      	mov      	r5, r0
+     46e:	0c02      	bf      	0x472	// 472 <__GI_pow+0x2be>
+     470:	05f0      	br      	0x850	// 850 <__GI_pow+0x69c>
+     472:	1274      	lrw      	r3, 0xbff00000	// 5c0 <__GI_pow+0x40c>
+     474:	b861      	st.w      	r3, (r14, 0x4)
+     476:	9860      	ld.w      	r3, (r14, 0x0)
+     478:	3200      	movi      	r2, 0
+     47a:	9802      	ld.w      	r0, (r14, 0x8)
+     47c:	6c4f      	mov      	r1, r3
+     47e:	e00005e7 	bsr      	0x104c	// 104c <__subdf3>
+     482:	9863      	ld.w      	r3, (r14, 0xc)
+     484:	3200      	movi      	r2, 0
+     486:	e00005ff 	bsr      	0x1084	// 1084 <__muldf3>
+     48a:	6dc3      	mov      	r7, r0
+     48c:	6d87      	mov      	r6, r1
+     48e:	9842      	ld.w      	r2, (r14, 0x8)
+     490:	9860      	ld.w      	r3, (r14, 0x0)
+     492:	6c17      	mov      	r0, r5
+     494:	6c53      	mov      	r1, r4
+     496:	e00005f7 	bsr      	0x1084	// 1084 <__muldf3>
+     49a:	6c83      	mov      	r2, r0
+     49c:	6cc7      	mov      	r3, r1
+     49e:	6c1f      	mov      	r0, r7
+     4a0:	6c5b      	mov      	r1, r6
+     4a2:	e00005bd 	bsr      	0x101c	// 101c <__adddf3>
+     4a6:	6dc3      	mov      	r7, r0
+     4a8:	9860      	ld.w      	r3, (r14, 0x0)
+     4aa:	6d87      	mov      	r6, r1
+     4ac:	3200      	movi      	r2, 0
+     4ae:	9823      	ld.w      	r1, (r14, 0xc)
+     4b0:	3000      	movi      	r0, 0
+     4b2:	e00005e9 	bsr      	0x1084	// 1084 <__muldf3>
+     4b6:	b802      	st.w      	r0, (r14, 0x8)
+     4b8:	b803      	st.w      	r0, (r14, 0xc)
+     4ba:	b824      	st.w      	r1, (r14, 0x10)
+     4bc:	6c83      	mov      	r2, r0
+     4be:	6cc7      	mov      	r3, r1
+     4c0:	6d47      	mov      	r5, r1
+     4c2:	6c1f      	mov      	r0, r7
+     4c4:	6c5b      	mov      	r1, r6
+     4c6:	e00005ab 	bsr      	0x101c	// 101c <__adddf3>
+     4ca:	6d07      	mov      	r4, r1
+     4cc:	113e      	lrw      	r1, 0x40900000	// 5c4 <__GI_pow+0x410>
+     4ce:	2900      	subi      	r1, 1
+     4d0:	6505      	cmplt      	r1, r4
+     4d2:	b800      	st.w      	r0, (r14, 0x0)
+     4d4:	0803      	bt      	0x4da	// 4da <__GI_pow+0x326>
+     4d6:	e80002b3 	br      	0xa3c	// a3c <__GI_pow+0x888>
+     4da:	117c      	lrw      	r3, 0xbf700000	// 5c8 <__GI_pow+0x414>
+     4dc:	60d0      	addu      	r3, r4
+     4de:	6cc0      	or      	r3, r0
+     4e0:	3b40      	cmpnei      	r3, 0
+     4e2:	0802      	bt      	0x4e6	// 4e6 <__GI_pow+0x332>
+     4e4:	05b8      	br      	0x854	// 854 <__GI_pow+0x6a0>
+     4e6:	114e      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4e8:	116e      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4ea:	3000      	movi      	r0, 0
+     4ec:	9821      	ld.w      	r1, (r14, 0x4)
+     4ee:	e00005cb 	bsr      	0x1084	// 1084 <__muldf3>
+     4f2:	114b      	lrw      	r2, 0x8800759c	// 59c <__GI_pow+0x3e8>
+     4f4:	116b      	lrw      	r3, 0x7e37e43c	// 5a0 <__GI_pow+0x3ec>
+     4f6:	06f7      	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     4f8:	11d5      	lrw      	r6, 0xfffff	// 5cc <__GI_pow+0x418>
+     4fa:	6559      	cmplt      	r6, r5
+     4fc:	09a6      	bt      	0x848	// 848 <__GI_pow+0x694>
+     4fe:	6c13      	mov      	r0, r4
+     500:	3200      	movi      	r2, 0
+     502:	107f      	lrw      	r3, 0x43400000	// 57c <__GI_pow+0x3c8>
+     504:	e00005c0 	bsr      	0x1084	// 1084 <__muldf3>
+     508:	3700      	movi      	r7, 0
+     50a:	6d03      	mov      	r4, r0
+     50c:	6d47      	mov      	r5, r1
+     50e:	2f34      	subi      	r7, 53
+     510:	5514      	asri      	r0, r5, 20
+     512:	103d      	lrw      	r1, 0xfffffc01	// 584 <__GI_pow+0x3d0>
+     514:	45ac      	lsli      	r5, r5, 12
+     516:	4d4c      	lsri      	r2, r5, 12
+     518:	6004      	addu      	r0, r1
+     51a:	116e      	lrw      	r3, 0x3988e	// 5d0 <__GI_pow+0x41c>
+     51c:	601c      	addu      	r0, r7
+     51e:	648d      	cmplt      	r3, r2
+     520:	10f8      	lrw      	r7, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     522:	b804      	st.w      	r0, (r14, 0x10)
+     524:	6dc8      	or      	r7, r2
+     526:	0c09      	bf      	0x538	// 538 <__GI_pow+0x384>
+     528:	11cb      	lrw      	r6, 0xbb679	// 5d4 <__GI_pow+0x420>
+     52a:	6499      	cmplt      	r6, r2
+     52c:	0d90      	bf      	0x84c	// 84c <__GI_pow+0x698>
+     52e:	6c83      	mov      	r2, r0
+     530:	2200      	addi      	r2, 1
+     532:	110a      	lrw      	r0, 0xfff00000	// 5d8 <__GI_pow+0x424>
+     534:	b844      	st.w      	r2, (r14, 0x10)
+     536:	61c0      	addu      	r7, r0
+     538:	3500      	movi      	r5, 0
+     53a:	45c3      	lsli      	r6, r5, 3
+     53c:	1168      	lrw      	r3, 0x4360	// 5dc <__GI_pow+0x428>
+     53e:	4523      	lsli      	r1, r5, 3
+     540:	60d8      	addu      	r3, r6
+     542:	9340      	ld.w      	r2, (r3, 0x0)
+     544:	b828      	st.w      	r1, (r14, 0x20)
+     546:	9361      	ld.w      	r3, (r3, 0x4)
+     548:	6c13      	mov      	r0, r4
+     54a:	6c5f      	mov      	r1, r7
+     54c:	b845      	st.w      	r2, (r14, 0x14)
+     54e:	b866      	st.w      	r3, (r14, 0x18)
+     550:	e000057e 	bsr      	0x104c	// 104c <__subdf3>
+     554:	b809      	st.w      	r0, (r14, 0x24)
+     556:	9845      	ld.w      	r2, (r14, 0x14)
+     558:	9866      	ld.w      	r3, (r14, 0x18)
+     55a:	b82a      	st.w      	r1, (r14, 0x28)
+     55c:	6c13      	mov      	r0, r4
+     55e:	6c5f      	mov      	r1, r7
+     560:	e000055e 	bsr      	0x101c	// 101c <__adddf3>
+     564:	6c83      	mov      	r2, r0
+     566:	6cc7      	mov      	r3, r1
+     568:	3000      	movi      	r0, 0
+     56a:	1026      	lrw      	r1, 0x3ff00000	// 580 <__GI_pow+0x3cc>
+     56c:	e00006a6 	bsr      	0x12b8	// 12b8 <__divdf3>
+     570:	6c83      	mov      	r2, r0
+     572:	6cc7      	mov      	r3, r1
+     574:	0436      	br      	0x5e0	// 5e0 <__GI_pow+0x42c>
+     576:	0000      	bkpt
+     578:	7ff00000 	.long	0x7ff00000
+     57c:	43400000 	.long	0x43400000
+     580:	3ff00000 	.long	0x3ff00000
+     584:	fffffc01 	.long	0xfffffc01
+     588:	c0100000 	.long	0xc0100000
+     58c:	3fe00000 	.long	0x3fe00000
+     590:	ffc00000 	.long	0xffc00000
+     594:	41e00000 	.long	0x41e00000
+     598:	43f00000 	.long	0x43f00000
+     59c:	8800759c 	.long	0x8800759c
+     5a0:	7e37e43c 	.long	0x7e37e43c
+     5a4:	3ff71547 	.long	0x3ff71547
+     5a8:	f85ddf44 	.long	0xf85ddf44
+     5ac:	3e54ae0b 	.long	0x3e54ae0b
+     5b0:	3fd00000 	.long	0x3fd00000
+     5b4:	55555555 	.long	0x55555555
+     5b8:	3fd55555 	.long	0x3fd55555
+     5bc:	652b82fe 	.long	0x652b82fe
+     5c0:	bff00000 	.long	0xbff00000
+     5c4:	40900000 	.long	0x40900000
+     5c8:	bf700000 	.long	0xbf700000
+     5cc:	000fffff 	.long	0x000fffff
+     5d0:	0003988e 	.long	0x0003988e
+     5d4:	000bb679 	.long	0x000bb679
+     5d8:	fff00000 	.long	0xfff00000
+     5dc:	00004360 	.long	0x00004360
+     5e0:	b80b      	st.w      	r0, (r14, 0x2c)
+     5e2:	b82c      	st.w      	r1, (r14, 0x30)
+     5e4:	9809      	ld.w      	r0, (r14, 0x24)
+     5e6:	982a      	ld.w      	r1, (r14, 0x28)
+     5e8:	e000054e 	bsr      	0x1084	// 1084 <__muldf3>
+     5ec:	b803      	st.w      	r0, (r14, 0xc)
+     5ee:	3280      	movi      	r2, 128
+     5f0:	5701      	asri      	r0, r7, 1
+     5f2:	6d87      	mov      	r6, r1
+     5f4:	38bd      	bseti      	r0, 29
+     5f6:	422c      	lsli      	r1, r2, 12
+     5f8:	6004      	addu      	r0, r1
+     5fa:	45b2      	lsli      	r5, r5, 18
+     5fc:	6140      	addu      	r5, r0
+     5fe:	6cd7      	mov      	r3, r5
+     600:	3200      	movi      	r2, 0
+     602:	6c5b      	mov      	r1, r6
+     604:	3000      	movi      	r0, 0
+     606:	e000053f 	bsr      	0x1084	// 1084 <__muldf3>
+     60a:	6c83      	mov      	r2, r0
+     60c:	6cc7      	mov      	r3, r1
+     60e:	9809      	ld.w      	r0, (r14, 0x24)
+     610:	982a      	ld.w      	r1, (r14, 0x28)
+     612:	e000051d 	bsr      	0x104c	// 104c <__subdf3>
+     616:	b809      	st.w      	r0, (r14, 0x24)
+     618:	9845      	ld.w      	r2, (r14, 0x14)
+     61a:	9866      	ld.w      	r3, (r14, 0x18)
+     61c:	b82a      	st.w      	r1, (r14, 0x28)
+     61e:	3000      	movi      	r0, 0
+     620:	6c57      	mov      	r1, r5
+     622:	e0000515 	bsr      	0x104c	// 104c <__subdf3>
+     626:	6c83      	mov      	r2, r0
+     628:	6cc7      	mov      	r3, r1
+     62a:	6c13      	mov      	r0, r4
+     62c:	6c5f      	mov      	r1, r7
+     62e:	e000050f 	bsr      	0x104c	// 104c <__subdf3>
+     632:	6cdb      	mov      	r3, r6
+     634:	3200      	movi      	r2, 0
+     636:	e0000527 	bsr      	0x1084	// 1084 <__muldf3>
+     63a:	6c83      	mov      	r2, r0
+     63c:	6cc7      	mov      	r3, r1
+     63e:	9809      	ld.w      	r0, (r14, 0x24)
+     640:	982a      	ld.w      	r1, (r14, 0x28)
+     642:	e0000505 	bsr      	0x104c	// 104c <__subdf3>
+     646:	984b      	ld.w      	r2, (r14, 0x2c)
+     648:	986c      	ld.w      	r3, (r14, 0x30)
+     64a:	e000051d 	bsr      	0x1084	// 1084 <__muldf3>
+     64e:	9843      	ld.w      	r2, (r14, 0xc)
+     650:	6cdb      	mov      	r3, r6
+     652:	b805      	st.w      	r0, (r14, 0x14)
+     654:	b826      	st.w      	r1, (r14, 0x18)
+     656:	6c0b      	mov      	r0, r2
+     658:	6c5b      	mov      	r1, r6
+     65a:	e0000515 	bsr      	0x1084	// 1084 <__muldf3>
+     65e:	ea820113 	lrw      	r2, 0x4a454eef	// aa8 <__GI_pow+0x8f4>
+     662:	ea830113 	lrw      	r3, 0x3fca7e28	// aac <__GI_pow+0x8f8>
+     666:	6d43      	mov      	r5, r0
+     668:	6d07      	mov      	r4, r1
+     66a:	e000050d 	bsr      	0x1084	// 1084 <__muldf3>
+     66e:	ea820111 	lrw      	r2, 0x93c9db65	// ab0 <__GI_pow+0x8fc>
+     672:	ea830111 	lrw      	r3, 0x3fcd864a	// ab4 <__GI_pow+0x900>
+     676:	e00004d3 	bsr      	0x101c	// 101c <__adddf3>
+     67a:	6c97      	mov      	r2, r5
+     67c:	6cd3      	mov      	r3, r4
+     67e:	e0000503 	bsr      	0x1084	// 1084 <__muldf3>
+     682:	ea82010e 	lrw      	r2, 0xa91d4101	// ab8 <__GI_pow+0x904>
+     686:	ea83010e 	lrw      	r3, 0x3fd17460	// abc <__GI_pow+0x908>
+     68a:	e00004c9 	bsr      	0x101c	// 101c <__adddf3>
+     68e:	6c97      	mov      	r2, r5
+     690:	6cd3      	mov      	r3, r4
+     692:	e00004f9 	bsr      	0x1084	// 1084 <__muldf3>
+     696:	ea82010b 	lrw      	r2, 0x518f264d	// ac0 <__GI_pow+0x90c>
+     69a:	ea83010b 	lrw      	r3, 0x3fd55555	// ac4 <__GI_pow+0x910>
+     69e:	e00004bf 	bsr      	0x101c	// 101c <__adddf3>
+     6a2:	6c97      	mov      	r2, r5
+     6a4:	6cd3      	mov      	r3, r4
+     6a6:	e00004ef 	bsr      	0x1084	// 1084 <__muldf3>
+     6aa:	ea820108 	lrw      	r2, 0xdb6fabff	// ac8 <__GI_pow+0x914>
+     6ae:	ea830108 	lrw      	r3, 0x3fdb6db6	// acc <__GI_pow+0x918>
+     6b2:	e00004b5 	bsr      	0x101c	// 101c <__adddf3>
+     6b6:	6c97      	mov      	r2, r5
+     6b8:	6cd3      	mov      	r3, r4
+     6ba:	e00004e5 	bsr      	0x1084	// 1084 <__muldf3>
+     6be:	ea820105 	lrw      	r2, 0x33333303	// ad0 <__GI_pow+0x91c>
+     6c2:	ea830105 	lrw      	r3, 0x3fe33333	// ad4 <__GI_pow+0x920>
+     6c6:	e00004ab 	bsr      	0x101c	// 101c <__adddf3>
+     6ca:	6dc3      	mov      	r7, r0
+     6cc:	6c97      	mov      	r2, r5
+     6ce:	6cd3      	mov      	r3, r4
+     6d0:	b829      	st.w      	r1, (r14, 0x24)
+     6d2:	6c17      	mov      	r0, r5
+     6d4:	6c53      	mov      	r1, r4
+     6d6:	e00004d7 	bsr      	0x1084	// 1084 <__muldf3>
+     6da:	6c83      	mov      	r2, r0
+     6dc:	6cc7      	mov      	r3, r1
+     6de:	6c1f      	mov      	r0, r7
+     6e0:	9829      	ld.w      	r1, (r14, 0x24)
+     6e2:	e00004d1 	bsr      	0x1084	// 1084 <__muldf3>
+     6e6:	6d43      	mov      	r5, r0
+     6e8:	6d07      	mov      	r4, r1
+     6ea:	6cdb      	mov      	r3, r6
+     6ec:	3200      	movi      	r2, 0
+     6ee:	9803      	ld.w      	r0, (r14, 0xc)
+     6f0:	6c5b      	mov      	r1, r6
+     6f2:	e0000495 	bsr      	0x101c	// 101c <__adddf3>
+     6f6:	9845      	ld.w      	r2, (r14, 0x14)
+     6f8:	9866      	ld.w      	r3, (r14, 0x18)
+     6fa:	e00004c5 	bsr      	0x1084	// 1084 <__muldf3>
+     6fe:	6c97      	mov      	r2, r5
+     700:	6cd3      	mov      	r3, r4
+     702:	e000048d 	bsr      	0x101c	// 101c <__adddf3>
+     706:	6d43      	mov      	r5, r0
+     708:	6cdb      	mov      	r3, r6
+     70a:	b829      	st.w      	r1, (r14, 0x24)
+     70c:	3200      	movi      	r2, 0
+     70e:	6c5b      	mov      	r1, r6
+     710:	3000      	movi      	r0, 0
+     712:	e00004b9 	bsr      	0x1084	// 1084 <__muldf3>
+     716:	3200      	movi      	r2, 0
+     718:	006f      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     71a:	6dc3      	mov      	r7, r0
+     71c:	b82a      	st.w      	r1, (r14, 0x28)
+     71e:	e000047f 	bsr      	0x101c	// 101c <__adddf3>
+     722:	6c97      	mov      	r2, r5
+     724:	9869      	ld.w      	r3, (r14, 0x24)
+     726:	e000047b 	bsr      	0x101c	// 101c <__adddf3>
+     72a:	6d07      	mov      	r4, r1
+     72c:	6cc7      	mov      	r3, r1
+     72e:	3200      	movi      	r2, 0
+     730:	6c5b      	mov      	r1, r6
+     732:	3000      	movi      	r0, 0
+     734:	e00004a8 	bsr      	0x1084	// 1084 <__muldf3>
+     738:	b80b      	st.w      	r0, (r14, 0x2c)
+     73a:	b82c      	st.w      	r1, (r14, 0x30)
+     73c:	3200      	movi      	r2, 0
+     73e:	0078      	lrw      	r3, 0x40080000	// ad8 <__GI_pow+0x924>
+     740:	6c53      	mov      	r1, r4
+     742:	3000      	movi      	r0, 0
+     744:	e0000484 	bsr      	0x104c	// 104c <__subdf3>
+     748:	6c9f      	mov      	r2, r7
+     74a:	986a      	ld.w      	r3, (r14, 0x28)
+     74c:	e0000480 	bsr      	0x104c	// 104c <__subdf3>
+     750:	6c83      	mov      	r2, r0
+     752:	6cc7      	mov      	r3, r1
+     754:	6c17      	mov      	r0, r5
+     756:	9829      	ld.w      	r1, (r14, 0x24)
+     758:	e000047a 	bsr      	0x104c	// 104c <__subdf3>
+     75c:	9843      	ld.w      	r2, (r14, 0xc)
+     75e:	6cdb      	mov      	r3, r6
+     760:	e0000492 	bsr      	0x1084	// 1084 <__muldf3>
+     764:	6d83      	mov      	r6, r0
+     766:	6d47      	mov      	r5, r1
+     768:	6cd3      	mov      	r3, r4
+     76a:	3200      	movi      	r2, 0
+     76c:	9805      	ld.w      	r0, (r14, 0x14)
+     76e:	9826      	ld.w      	r1, (r14, 0x18)
+     770:	e000048a 	bsr      	0x1084	// 1084 <__muldf3>
+     774:	6c83      	mov      	r2, r0
+     776:	6cc7      	mov      	r3, r1
+     778:	6c1b      	mov      	r0, r6
+     77a:	6c57      	mov      	r1, r5
+     77c:	e0000450 	bsr      	0x101c	// 101c <__adddf3>
+     780:	6dc3      	mov      	r7, r0
+     782:	6d87      	mov      	r6, r1
+     784:	6c83      	mov      	r2, r0
+     786:	6cc7      	mov      	r3, r1
+     788:	980b      	ld.w      	r0, (r14, 0x2c)
+     78a:	982c      	ld.w      	r1, (r14, 0x30)
+     78c:	e0000448 	bsr      	0x101c	// 101c <__adddf3>
+     790:	33e0      	movi      	r3, 224
+     792:	4358      	lsli      	r2, r3, 24
+     794:	3000      	movi      	r0, 0
+     796:	016d      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     798:	6d07      	mov      	r4, r1
+     79a:	e0000475 	bsr      	0x1084	// 1084 <__muldf3>
+     79e:	b805      	st.w      	r0, (r14, 0x14)
+     7a0:	b826      	st.w      	r1, (r14, 0x18)
+     7a2:	984b      	ld.w      	r2, (r14, 0x2c)
+     7a4:	986c      	ld.w      	r3, (r14, 0x30)
+     7a6:	6c53      	mov      	r1, r4
+     7a8:	3000      	movi      	r0, 0
+     7aa:	e0000451 	bsr      	0x104c	// 104c <__subdf3>
+     7ae:	6c83      	mov      	r2, r0
+     7b0:	6cc7      	mov      	r3, r1
+     7b2:	6c1f      	mov      	r0, r7
+     7b4:	6c5b      	mov      	r1, r6
+     7b6:	e000044b 	bsr      	0x104c	// 104c <__subdf3>
+     7ba:	0155      	lrw      	r2, 0xdc3a03fd	// ae0 <__GI_pow+0x92c>
+     7bc:	0177      	lrw      	r3, 0x3feec709	// adc <__GI_pow+0x928>
+     7be:	e0000463 	bsr      	0x1084	// 1084 <__muldf3>
+     7c2:	6dc3      	mov      	r7, r0
+     7c4:	6d47      	mov      	r5, r1
+     7c6:	0157      	lrw      	r2, 0x145b01f5	// ae4 <__GI_pow+0x930>
+     7c8:	0177      	lrw      	r3, 0xbe3e2fe0	// ae8 <__GI_pow+0x934>
+     7ca:	6c53      	mov      	r1, r4
+     7cc:	3000      	movi      	r0, 0
+     7ce:	e000045b 	bsr      	0x1084	// 1084 <__muldf3>
+     7d2:	6c83      	mov      	r2, r0
+     7d4:	6cc7      	mov      	r3, r1
+     7d6:	6c1f      	mov      	r0, r7
+     7d8:	6c57      	mov      	r1, r5
+     7da:	e0000421 	bsr      	0x101c	// 101c <__adddf3>
+     7de:	01db      	lrw      	r6, 0x4360	// aec <__GI_pow+0x938>
+     7e0:	9848      	ld.w      	r2, (r14, 0x20)
+     7e2:	6188      	addu      	r6, r2
+     7e4:	9644      	ld.w      	r2, (r6, 0x10)
+     7e6:	9665      	ld.w      	r3, (r6, 0x14)
+     7e8:	e000041a 	bsr      	0x101c	// 101c <__adddf3>
+     7ec:	b809      	st.w      	r0, (r14, 0x24)
+     7ee:	9804      	ld.w      	r0, (r14, 0x10)
+     7f0:	b82a      	st.w      	r1, (r14, 0x28)
+     7f2:	e0000667 	bsr      	0x14c0	// 14c0 <__floatsidf>
+     7f6:	6d83      	mov      	r6, r0
+     7f8:	0202      	lrw      	r0, 0x4360	// aec <__GI_pow+0x938>
+     7fa:	6d47      	mov      	r5, r1
+     7fc:	201f      	addi      	r0, 32
+     7fe:	9828      	ld.w      	r1, (r14, 0x20)
+     800:	6004      	addu      	r0, r1
+     802:	9080      	ld.w      	r4, (r0, 0x0)
+     804:	90e1      	ld.w      	r7, (r0, 0x4)
+     806:	9849      	ld.w      	r2, (r14, 0x24)
+     808:	986a      	ld.w      	r3, (r14, 0x28)
+     80a:	9805      	ld.w      	r0, (r14, 0x14)
+     80c:	9826      	ld.w      	r1, (r14, 0x18)
+     80e:	e0000407 	bsr      	0x101c	// 101c <__adddf3>
+     812:	6c93      	mov      	r2, r4
+     814:	6cdf      	mov      	r3, r7
+     816:	e0000403 	bsr      	0x101c	// 101c <__adddf3>
+     81a:	6c9b      	mov      	r2, r6
+     81c:	6cd7      	mov      	r3, r5
+     81e:	e00003ff 	bsr      	0x101c	// 101c <__adddf3>
+     822:	6c9b      	mov      	r2, r6
+     824:	6cd7      	mov      	r3, r5
+     826:	3000      	movi      	r0, 0
+     828:	b823      	st.w      	r1, (r14, 0xc)
+     82a:	e0000411 	bsr      	0x104c	// 104c <__subdf3>
+     82e:	6c93      	mov      	r2, r4
+     830:	6cdf      	mov      	r3, r7
+     832:	e000040d 	bsr      	0x104c	// 104c <__subdf3>
+     836:	9845      	ld.w      	r2, (r14, 0x14)
+     838:	9866      	ld.w      	r3, (r14, 0x18)
+     83a:	e0000409 	bsr      	0x104c	// 104c <__subdf3>
+     83e:	6c83      	mov      	r2, r0
+     840:	6cc7      	mov      	r3, r1
+     842:	9809      	ld.w      	r0, (r14, 0x24)
+     844:	982a      	ld.w      	r1, (r14, 0x28)
+     846:	060b      	br      	0x45c	// 45c <__GI_pow+0x2a8>
+     848:	3700      	movi      	r7, 0
+     84a:	0663      	br      	0x510	// 510 <__GI_pow+0x35c>
+     84c:	3501      	movi      	r5, 1
+     84e:	0676      	br      	0x53a	// 53a <__GI_pow+0x386>
+     850:	0277      	lrw      	r3, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     852:	0611      	br      	0x474	// 474 <__GI_pow+0x2c0>
+     854:	0257      	lrw      	r2, 0x652b82fe	// af4 <__GI_pow+0x940>
+     856:	0276      	lrw      	r3, 0x3c971547	// af8 <__GI_pow+0x944>
+     858:	6c1f      	mov      	r0, r7
+     85a:	6c5b      	mov      	r1, r6
+     85c:	e00003e0 	bsr      	0x101c	// 101c <__adddf3>
+     860:	b805      	st.w      	r0, (r14, 0x14)
+     862:	b826      	st.w      	r1, (r14, 0x18)
+     864:	9842      	ld.w      	r2, (r14, 0x8)
+     866:	6cd7      	mov      	r3, r5
+     868:	9800      	ld.w      	r0, (r14, 0x0)
+     86a:	6c53      	mov      	r1, r4
+     86c:	e00003f0 	bsr      	0x104c	// 104c <__subdf3>
+     870:	6c83      	mov      	r2, r0
+     872:	6cc7      	mov      	r3, r1
+     874:	9805      	ld.w      	r0, (r14, 0x14)
+     876:	9826      	ld.w      	r1, (r14, 0x18)
+     878:	e00005ca 	bsr      	0x140c	// 140c <__gtdf2>
+     87c:	3820      	cmplti      	r0, 1
+     87e:	0802      	bt      	0x882	// 882 <__GI_pow+0x6ce>
+     880:	0633      	br      	0x4e6	// 4e6 <__GI_pow+0x332>
+     882:	4421      	lsli      	r1, r4, 1
+     884:	4901      	lsri      	r0, r1, 1
+     886:	0361      	lrw      	r3, 0x3fe00000	// afc <__GI_pow+0x948>
+     888:	640d      	cmplt      	r3, r0
+     88a:	0cfd      	bf      	0xa84	// a84 <__GI_pow+0x8d0>
+     88c:	5034      	asri      	r1, r0, 20
+     88e:	0342      	lrw      	r2, 0xfffffc02	// b00 <__GI_pow+0x94c>
+     890:	3080      	movi      	r0, 128
+     892:	6048      	addu      	r1, r2
+     894:	404d      	lsli      	r2, r0, 13
+     896:	7086      	asr      	r2, r1
+     898:	6090      	addu      	r2, r4
+     89a:	4261      	lsli      	r3, r2, 1
+     89c:	4b35      	lsri      	r1, r3, 21
+     89e:	0305      	lrw      	r0, 0xfffffc01	// b04 <__GI_pow+0x950>
+     8a0:	6040      	addu      	r1, r0
+     8a2:	0365      	lrw      	r3, 0xfffff	// b08 <__GI_pow+0x954>
+     8a4:	70c6      	asr      	r3, r1
+     8a6:	6c0b      	mov      	r0, r2
+     8a8:	680d      	andn      	r0, r3
+     8aa:	424c      	lsli      	r2, r2, 12
+     8ac:	6cc3      	mov      	r3, r0
+     8ae:	4a4c      	lsri      	r2, r2, 12
+     8b0:	3014      	movi      	r0, 20
+     8b2:	3ab4      	bseti      	r2, 20
+     8b4:	5825      	subu      	r1, r0, r1
+     8b6:	7086      	asr      	r2, r1
+     8b8:	3cdf      	btsti      	r4, 31
+     8ba:	b840      	st.w      	r2, (r14, 0x0)
+     8bc:	0c05      	bf      	0x8c6	// 8c6 <__GI_pow+0x712>
+     8be:	9840      	ld.w      	r2, (r14, 0x0)
+     8c0:	3400      	movi      	r4, 0
+     8c2:	610a      	subu      	r4, r2
+     8c4:	b880      	st.w      	r4, (r14, 0x0)
+     8c6:	3200      	movi      	r2, 0
+     8c8:	9802      	ld.w      	r0, (r14, 0x8)
+     8ca:	6c57      	mov      	r1, r5
+     8cc:	e00003c0 	bsr      	0x104c	// 104c <__subdf3>
+     8d0:	b803      	st.w      	r0, (r14, 0xc)
+     8d2:	b824      	st.w      	r1, (r14, 0x10)
+     8d4:	9803      	ld.w      	r0, (r14, 0xc)
+     8d6:	6c9f      	mov      	r2, r7
+     8d8:	6cdb      	mov      	r3, r6
+     8da:	9824      	ld.w      	r1, (r14, 0x10)
+     8dc:	e00003a0 	bsr      	0x101c	// 101c <__adddf3>
+     8e0:	3200      	movi      	r2, 0
+     8e2:	0374      	lrw      	r3, 0x3fe62e43	// b0c <__GI_pow+0x958>
+     8e4:	3000      	movi      	r0, 0
+     8e6:	6d07      	mov      	r4, r1
+     8e8:	e00003ce 	bsr      	0x1084	// 1084 <__muldf3>
+     8ec:	6d47      	mov      	r5, r1
+     8ee:	9843      	ld.w      	r2, (r14, 0xc)
+     8f0:	9864      	ld.w      	r3, (r14, 0x10)
+     8f2:	b802      	st.w      	r0, (r14, 0x8)
+     8f4:	6c53      	mov      	r1, r4
+     8f6:	3000      	movi      	r0, 0
+     8f8:	e00003aa 	bsr      	0x104c	// 104c <__subdf3>
+     8fc:	6c83      	mov      	r2, r0
+     8fe:	6cc7      	mov      	r3, r1
+     900:	6c1f      	mov      	r0, r7
+     902:	6c5b      	mov      	r1, r6
+     904:	e00003a4 	bsr      	0x104c	// 104c <__subdf3>
+     908:	035d      	lrw      	r2, 0xfefa39ef	// b10 <__GI_pow+0x95c>
+     90a:	037c      	lrw      	r3, 0x3fe62e42	// b14 <__GI_pow+0x960>
+     90c:	e00003bc 	bsr      	0x1084	// 1084 <__muldf3>
+     910:	6dc3      	mov      	r7, r0
+     912:	6d87      	mov      	r6, r1
+     914:	035e      	lrw      	r2, 0xca86c39	// b18 <__GI_pow+0x964>
+     916:	037d      	lrw      	r3, 0xbe205c61	// b1c <__GI_pow+0x968>
+     918:	6c53      	mov      	r1, r4
+     91a:	3000      	movi      	r0, 0
+     91c:	e00003b4 	bsr      	0x1084	// 1084 <__muldf3>
+     920:	6c83      	mov      	r2, r0
+     922:	6cc7      	mov      	r3, r1
+     924:	6c1f      	mov      	r0, r7
+     926:	6c5b      	mov      	r1, r6
+     928:	e000037a 	bsr      	0x101c	// 101c <__adddf3>
+     92c:	6d07      	mov      	r4, r1
+     92e:	6c83      	mov      	r2, r0
+     930:	6cc7      	mov      	r3, r1
+     932:	b803      	st.w      	r0, (r14, 0xc)
+     934:	6c57      	mov      	r1, r5
+     936:	9802      	ld.w      	r0, (r14, 0x8)
+     938:	e0000372 	bsr      	0x101c	// 101c <__adddf3>
+     93c:	9842      	ld.w      	r2, (r14, 0x8)
+     93e:	6cd7      	mov      	r3, r5
+     940:	6dc3      	mov      	r7, r0
+     942:	6d87      	mov      	r6, r1
+     944:	e0000384 	bsr      	0x104c	// 104c <__subdf3>
+     948:	6c83      	mov      	r2, r0
+     94a:	6cc7      	mov      	r3, r1
+     94c:	9803      	ld.w      	r0, (r14, 0xc)
+     94e:	6c53      	mov      	r1, r4
+     950:	e000037e 	bsr      	0x104c	// 104c <__subdf3>
+     954:	b802      	st.w      	r0, (r14, 0x8)
+     956:	b823      	st.w      	r1, (r14, 0xc)
+     958:	6c9f      	mov      	r2, r7
+     95a:	6cdb      	mov      	r3, r6
+     95c:	6c1f      	mov      	r0, r7
+     95e:	6c5b      	mov      	r1, r6
+     960:	e0000392 	bsr      	0x1084	// 1084 <__muldf3>
+     964:	134f      	lrw      	r2, 0x72bea4d0	// b20 <__GI_pow+0x96c>
+     966:	1370      	lrw      	r3, 0x3e663769	// b24 <__GI_pow+0x970>
+     968:	6d43      	mov      	r5, r0
+     96a:	6d07      	mov      	r4, r1
+     96c:	e000038c 	bsr      	0x1084	// 1084 <__muldf3>
+     970:	134e      	lrw      	r2, 0xc5d26bf1	// b28 <__GI_pow+0x974>
+     972:	136f      	lrw      	r3, 0x3ebbbd41	// b2c <__GI_pow+0x978>
+     974:	e000036c 	bsr      	0x104c	// 104c <__subdf3>
+     978:	6c97      	mov      	r2, r5
+     97a:	6cd3      	mov      	r3, r4
+     97c:	e0000384 	bsr      	0x1084	// 1084 <__muldf3>
+     980:	134c      	lrw      	r2, 0xaf25de2c	// b30 <__GI_pow+0x97c>
+     982:	136d      	lrw      	r3, 0x3f11566a	// b34 <__GI_pow+0x980>
+     984:	e000034c 	bsr      	0x101c	// 101c <__adddf3>
+     988:	6c97      	mov      	r2, r5
+     98a:	6cd3      	mov      	r3, r4
+     98c:	e000037c 	bsr      	0x1084	// 1084 <__muldf3>
+     990:	134a      	lrw      	r2, 0x16bebd93	// b38 <__GI_pow+0x984>
+     992:	136b      	lrw      	r3, 0x3f66c16c	// b3c <__GI_pow+0x988>
+     994:	e000035c 	bsr      	0x104c	// 104c <__subdf3>
+     998:	6c97      	mov      	r2, r5
+     99a:	6cd3      	mov      	r3, r4
+     99c:	e0000374 	bsr      	0x1084	// 1084 <__muldf3>
+     9a0:	1348      	lrw      	r2, 0x5555553e	// b40 <__GI_pow+0x98c>
+     9a2:	1369      	lrw      	r3, 0x3fc55555	// b44 <__GI_pow+0x990>
+     9a4:	e000033c 	bsr      	0x101c	// 101c <__adddf3>
+     9a8:	6c97      	mov      	r2, r5
+     9aa:	6cd3      	mov      	r3, r4
+     9ac:	e000036c 	bsr      	0x1084	// 1084 <__muldf3>
+     9b0:	6c83      	mov      	r2, r0
+     9b2:	6cc7      	mov      	r3, r1
+     9b4:	6c1f      	mov      	r0, r7
+     9b6:	6c5b      	mov      	r1, r6
+     9b8:	e000034a 	bsr      	0x104c	// 104c <__subdf3>
+     9bc:	6d43      	mov      	r5, r0
+     9be:	6d07      	mov      	r4, r1
+     9c0:	6c83      	mov      	r2, r0
+     9c2:	6cc7      	mov      	r3, r1
+     9c4:	6c1f      	mov      	r0, r7
+     9c6:	6c5b      	mov      	r1, r6
+     9c8:	e000035e 	bsr      	0x1084	// 1084 <__muldf3>
+     9cc:	3380      	movi      	r3, 128
+     9ce:	b804      	st.w      	r0, (r14, 0x10)
+     9d0:	b825      	st.w      	r1, (r14, 0x14)
+     9d2:	3200      	movi      	r2, 0
+     9d4:	4377      	lsli      	r3, r3, 23
+     9d6:	6c17      	mov      	r0, r5
+     9d8:	6c53      	mov      	r1, r4
+     9da:	e0000339 	bsr      	0x104c	// 104c <__subdf3>
+     9de:	6c83      	mov      	r2, r0
+     9e0:	6cc7      	mov      	r3, r1
+     9e2:	9804      	ld.w      	r0, (r14, 0x10)
+     9e4:	9825      	ld.w      	r1, (r14, 0x14)
+     9e6:	e0000469 	bsr      	0x12b8	// 12b8 <__divdf3>
+     9ea:	6d07      	mov      	r4, r1
+     9ec:	6d43      	mov      	r5, r0
+     9ee:	9842      	ld.w      	r2, (r14, 0x8)
+     9f0:	9863      	ld.w      	r3, (r14, 0xc)
+     9f2:	6c1f      	mov      	r0, r7
+     9f4:	6c5b      	mov      	r1, r6
+     9f6:	e0000347 	bsr      	0x1084	// 1084 <__muldf3>
+     9fa:	9842      	ld.w      	r2, (r14, 0x8)
+     9fc:	9863      	ld.w      	r3, (r14, 0xc)
+     9fe:	e000030f 	bsr      	0x101c	// 101c <__adddf3>
+     a02:	6c83      	mov      	r2, r0
+     a04:	6cc7      	mov      	r3, r1
+     a06:	6c17      	mov      	r0, r5
+     a08:	6c53      	mov      	r1, r4
+     a0a:	e0000321 	bsr      	0x104c	// 104c <__subdf3>
+     a0e:	6c9f      	mov      	r2, r7
+     a10:	6cdb      	mov      	r3, r6
+     a12:	e000031d 	bsr      	0x104c	// 104c <__subdf3>
+     a16:	6c83      	mov      	r2, r0
+     a18:	6cc7      	mov      	r3, r1
+     a1a:	3000      	movi      	r0, 0
+     a1c:	1135      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a1e:	e0000317 	bsr      	0x104c	// 104c <__subdf3>
+     a22:	9840      	ld.w      	r2, (r14, 0x0)
+     a24:	4274      	lsli      	r3, r2, 20
+     a26:	60c4      	addu      	r3, r1
+     a28:	5394      	asri      	r4, r3, 20
+     a2a:	3c20      	cmplti      	r4, 1
+     a2c:	0c2f      	bf      	0xa8a	// a8a <__GI_pow+0x8d6>
+     a2e:	9840      	ld.w      	r2, (r14, 0x0)
+     a30:	e000009a 	bsr      	0xb64	// b64 <__GI_scalbn>
+     a34:	3200      	movi      	r2, 0
+     a36:	9861      	ld.w      	r3, (r14, 0x4)
+     a38:	e800fc56 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a3c:	4401      	lsli      	r0, r4, 1
+     a3e:	4861      	lsri      	r3, r0, 1
+     a40:	1242      	lrw      	r2, 0x4090cbff	// b48 <__GI_pow+0x994>
+     a42:	64c9      	cmplt      	r2, r3
+     a44:	0f1f      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a46:	1222      	lrw      	r1, 0x3f6f3400	// b4c <__GI_pow+0x998>
+     a48:	6050      	addu      	r1, r4
+     a4a:	9800      	ld.w      	r0, (r14, 0x0)
+     a4c:	6c40      	or      	r1, r0
+     a4e:	3940      	cmpnei      	r1, 0
+     a50:	0c0b      	bf      	0xa66	// a66 <__GI_pow+0x8b2>
+     a52:	1240      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a54:	1260      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a56:	3000      	movi      	r0, 0
+     a58:	9821      	ld.w      	r1, (r14, 0x4)
+     a5a:	e0000315 	bsr      	0x1084	// 1084 <__muldf3>
+     a5e:	115d      	lrw      	r2, 0xc2f8f359	// b50 <__GI_pow+0x99c>
+     a60:	117d      	lrw      	r3, 0x1a56e1f	// b54 <__GI_pow+0x9a0>
+     a62:	e800fc41 	br      	0x2e4	// 2e4 <__GI_pow+0x130>
+     a66:	9842      	ld.w      	r2, (r14, 0x8)
+     a68:	6cd7      	mov      	r3, r5
+     a6a:	9800      	ld.w      	r0, (r14, 0x0)
+     a6c:	6c53      	mov      	r1, r4
+     a6e:	e00002ef 	bsr      	0x104c	// 104c <__subdf3>
+     a72:	6c83      	mov      	r2, r0
+     a74:	6cc7      	mov      	r3, r1
+     a76:	6c1f      	mov      	r0, r7
+     a78:	6c5b      	mov      	r1, r6
+     a7a:	e0000505 	bsr      	0x1484	// 1484 <__ledf2>
+     a7e:	3820      	cmplti      	r0, 1
+     a80:	0f01      	bf      	0x882	// 882 <__GI_pow+0x6ce>
+     a82:	07e8      	br      	0xa52	// a52 <__GI_pow+0x89e>
+     a84:	3500      	movi      	r5, 0
+     a86:	b8a0      	st.w      	r5, (r14, 0x0)
+     a88:	0726      	br      	0x8d4	// 8d4 <__GI_pow+0x720>
+     a8a:	6c4f      	mov      	r1, r3
+     a8c:	07d4      	br      	0xa34	// a34 <__GI_pow+0x880>
+     a8e:	3400      	movi      	r4, 0
+     a90:	1038      	lrw      	r1, 0x3ff00000	// af0 <__GI_pow+0x93c>
+     a92:	e800fbb5 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a96:	3400      	movi      	r4, 0
+     a98:	9820      	ld.w      	r1, (r14, 0x0)
+     a9a:	e800fbb1 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     a9e:	6d1f      	mov      	r4, r7
+     aa0:	6c5b      	mov      	r1, r6
+     aa2:	e800fbad 	br      	0x1fc	// 1fc <__GI_pow+0x48>
+     aa6:	0000      	bkpt
+     aa8:	4a454eef 	.long	0x4a454eef
+     aac:	3fca7e28 	.long	0x3fca7e28
+     ab0:	93c9db65 	.long	0x93c9db65
+     ab4:	3fcd864a 	.long	0x3fcd864a
+     ab8:	a91d4101 	.long	0xa91d4101
+     abc:	3fd17460 	.long	0x3fd17460
+     ac0:	518f264d 	.long	0x518f264d
+     ac4:	3fd55555 	.long	0x3fd55555
+     ac8:	db6fabff 	.long	0xdb6fabff
+     acc:	3fdb6db6 	.long	0x3fdb6db6
+     ad0:	33333303 	.long	0x33333303
+     ad4:	3fe33333 	.long	0x3fe33333
+     ad8:	40080000 	.long	0x40080000
+     adc:	3feec709 	.long	0x3feec709
+     ae0:	dc3a03fd 	.long	0xdc3a03fd
+     ae4:	145b01f5 	.long	0x145b01f5
+     ae8:	be3e2fe0 	.long	0xbe3e2fe0
+     aec:	00004360 	.long	0x00004360
+     af0:	3ff00000 	.long	0x3ff00000
+     af4:	652b82fe 	.long	0x652b82fe
+     af8:	3c971547 	.long	0x3c971547
+     afc:	3fe00000 	.long	0x3fe00000
+     b00:	fffffc02 	.long	0xfffffc02
+     b04:	fffffc01 	.long	0xfffffc01
+     b08:	000fffff 	.long	0x000fffff
+     b0c:	3fe62e43 	.long	0x3fe62e43
+     b10:	fefa39ef 	.long	0xfefa39ef
+     b14:	3fe62e42 	.long	0x3fe62e42
+     b18:	0ca86c39 	.long	0x0ca86c39
+     b1c:	be205c61 	.long	0xbe205c61
+     b20:	72bea4d0 	.long	0x72bea4d0
+     b24:	3e663769 	.long	0x3e663769
+     b28:	c5d26bf1 	.long	0xc5d26bf1
+     b2c:	3ebbbd41 	.long	0x3ebbbd41
+     b30:	af25de2c 	.long	0xaf25de2c
+     b34:	3f11566a 	.long	0x3f11566a
+     b38:	16bebd93 	.long	0x16bebd93
+     b3c:	3f66c16c 	.long	0x3f66c16c
+     b40:	5555553e 	.long	0x5555553e
+     b44:	3fc55555 	.long	0x3fc55555
+     b48:	4090cbff 	.long	0x4090cbff
+     b4c:	3f6f3400 	.long	0x3f6f3400
+     b50:	c2f8f359 	.long	0xc2f8f359
+     b54:	01a56e1f 	.long	0x01a56e1f
+     b58:	3300      	movi      	r3, 0
+     b5a:	e800fb94 	br      	0x282	// 282 <__GI_pow+0xce>
+
+00000b5e <__GI_fabs>:
+     b5e:	4121      	lsli      	r1, r1, 1
+     b60:	4921      	lsri      	r1, r1, 1
+     b62:	783c      	jmp      	r15
+
+00000b64 <__GI_scalbn>:
+     b64:	14c1      	push      	r4
+     b66:	6cc7      	mov      	r3, r1
+     b68:	6cc0      	or      	r3, r0
+     b6a:	3b40      	cmpnei      	r3, 0
+     b6c:	0c08      	bf      	0xb7c	// b7c <__GI_scalbn+0x18>
+     b6e:	1065      	lrw      	r3, 0x7ff00000	// b80 <__GI_scalbn+0x1c>
+     b70:	6d07      	mov      	r4, r1
+     b72:	690c      	and      	r4, r3
+     b74:	4254      	lsli      	r2, r2, 20
+     b76:	6090      	addu      	r2, r4
+     b78:	684d      	andn      	r1, r3
+     b7a:	6c48      	or      	r1, r2
+     b7c:	1481      	pop      	r4
+     b7e:	0000      	bkpt
+     b80:	7ff00000 	.long	0x7ff00000
+
+00000b84 <__GI_sqrt>:
+     b84:	14d4      	push      	r4-r7, r15
+     b86:	1423      	subi      	r14, r14, 12
+     b88:	127a      	lrw      	r3, 0x7ff00000	// cf0 <__GI_sqrt+0x16c>
+     b8a:	6d43      	mov      	r5, r0
+     b8c:	6d07      	mov      	r4, r1
+     b8e:	6c07      	mov      	r0, r1
+     b90:	684c      	and      	r1, r3
+     b92:	64c6      	cmpne      	r1, r3
+     b94:	6c97      	mov      	r2, r5
+     b96:	0812      	bt      	0xbba	// bba <__GI_sqrt+0x36>
+     b98:	6cd3      	mov      	r3, r4
+     b9a:	6c17      	mov      	r0, r5
+     b9c:	6c53      	mov      	r1, r4
+     b9e:	e0000273 	bsr      	0x1084	// 1084 <__muldf3>
+     ba2:	6c83      	mov      	r2, r0
+     ba4:	6cc7      	mov      	r3, r1
+     ba6:	6c17      	mov      	r0, r5
+     ba8:	6c53      	mov      	r1, r4
+     baa:	e0000239 	bsr      	0x101c	// 101c <__adddf3>
+     bae:	6d43      	mov      	r5, r0
+     bb0:	6d07      	mov      	r4, r1
+     bb2:	6c17      	mov      	r0, r5
+     bb4:	6c53      	mov      	r1, r4
+     bb6:	1403      	addi      	r14, r14, 12
+     bb8:	1494      	pop      	r4-r7, r15
+     bba:	3c20      	cmplti      	r4, 1
+     bbc:	0c13      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bbe:	4461      	lsli      	r3, r4, 1
+     bc0:	4b21      	lsri      	r1, r3, 1
+     bc2:	6c54      	or      	r1, r5
+     bc4:	3940      	cmpnei      	r1, 0
+     bc6:	0ff6      	bf      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     bc8:	3c40      	cmpnei      	r4, 0
+     bca:	0c0c      	bf      	0xbe2	// be2 <__GI_sqrt+0x5e>
+     bcc:	6c97      	mov      	r2, r5
+     bce:	6cd3      	mov      	r3, r4
+     bd0:	6c17      	mov      	r0, r5
+     bd2:	6c53      	mov      	r1, r4
+     bd4:	e000023c 	bsr      	0x104c	// 104c <__subdf3>
+     bd8:	6c83      	mov      	r2, r0
+     bda:	6cc7      	mov      	r3, r1
+     bdc:	e000036e 	bsr      	0x12b8	// 12b8 <__divdf3>
+     be0:	07e7      	br      	0xbae	// bae <__GI_sqrt+0x2a>
+     be2:	5494      	asri      	r4, r4, 20
+     be4:	3c40      	cmpnei      	r4, 0
+     be6:	0812      	bt      	0xc0a	// c0a <__GI_sqrt+0x86>
+     be8:	3840      	cmpnei      	r0, 0
+     bea:	0c76      	bf      	0xcd6	// cd6 <__GI_sqrt+0x152>
+     bec:	3580      	movi      	r5, 128
+     bee:	3300      	movi      	r3, 0
+     bf0:	452d      	lsli      	r1, r5, 13
+     bf2:	6d83      	mov      	r6, r0
+     bf4:	6984      	and      	r6, r1
+     bf6:	3e40      	cmpnei      	r6, 0
+     bf8:	0c73      	bf      	0xcde	// cde <__GI_sqrt+0x15a>
+     bfa:	5b23      	subi      	r1, r3, 1
+     bfc:	3620      	movi      	r6, 32
+     bfe:	6106      	subu      	r4, r1
+     c00:	618e      	subu      	r6, r3
+     c02:	6c4b      	mov      	r1, r2
+     c04:	7059      	lsr      	r1, r6
+     c06:	6c04      	or      	r0, r1
+     c08:	708c      	lsl      	r2, r3
+     c0a:	117b      	lrw      	r3, 0xfffffc01	// cf4 <__GI_sqrt+0x170>
+     c0c:	610c      	addu      	r4, r3
+     c0e:	3601      	movi      	r6, 1
+     c10:	400c      	lsli      	r0, r0, 12
+     c12:	6990      	and      	r6, r4
+     c14:	480c      	lsri      	r0, r0, 12
+     c16:	3e40      	cmpnei      	r6, 0
+     c18:	38b4      	bseti      	r0, 20
+     c1a:	0c05      	bf      	0xc24	// c24 <__GI_sqrt+0xa0>
+     c1c:	4a3f      	lsri      	r1, r2, 31
+     c1e:	40a1      	lsli      	r5, r0, 1
+     c20:	5914      	addu      	r0, r1, r5
+     c22:	4241      	lsli      	r2, r2, 1
+     c24:	4a7f      	lsri      	r3, r2, 31
+     c26:	60c0      	addu      	r3, r0
+     c28:	5481      	asri      	r4, r4, 1
+     c2a:	3680      	movi      	r6, 128
+     c2c:	3100      	movi      	r1, 0
+     c2e:	60c0      	addu      	r3, r0
+     c30:	b882      	st.w      	r4, (r14, 0x8)
+     c32:	4241      	lsli      	r2, r2, 1
+     c34:	3516      	movi      	r5, 22
+     c36:	460e      	lsli      	r0, r6, 14
+     c38:	b820      	st.w      	r1, (r14, 0x0)
+     c3a:	5980      	addu      	r4, r1, r0
+     c3c:	650d      	cmplt      	r3, r4
+     c3e:	0806      	bt      	0xc4a	// c4a <__GI_sqrt+0xc6>
+     c40:	98c0      	ld.w      	r6, (r14, 0x0)
+     c42:	6180      	addu      	r6, r0
+     c44:	5c20      	addu      	r1, r4, r0
+     c46:	60d2      	subu      	r3, r4
+     c48:	b8c0      	st.w      	r6, (r14, 0x0)
+     c4a:	2d00      	subi      	r5, 1
+     c4c:	4a9f      	lsri      	r4, r2, 31
+     c4e:	4361      	lsli      	r3, r3, 1
+     c50:	3d40      	cmpnei      	r5, 0
+     c52:	60d0      	addu      	r3, r4
+     c54:	4241      	lsli      	r2, r2, 1
+     c56:	4801      	lsri      	r0, r0, 1
+     c58:	0bf1      	bt      	0xc3a	// c3a <__GI_sqrt+0xb6>
+     c5a:	3620      	movi      	r6, 32
+     c5c:	3480      	movi      	r4, 128
+     c5e:	3000      	movi      	r0, 0
+     c60:	b8c1      	st.w      	r6, (r14, 0x4)
+     c62:	4498      	lsli      	r4, r4, 24
+     c64:	64c5      	cmplt      	r1, r3
+     c66:	5cd4      	addu      	r6, r4, r5
+     c68:	0805      	bt      	0xc72	// c72 <__GI_sqrt+0xee>
+     c6a:	644e      	cmpne      	r3, r1
+     c6c:	0810      	bt      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c6e:	6588      	cmphs      	r2, r6
+     c70:	0c0e      	bf      	0xc8c	// c8c <__GI_sqrt+0x108>
+     c72:	3edf      	btsti      	r6, 31
+     c74:	5eb0      	addu      	r5, r6, r4
+     c76:	0c37      	bf      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c78:	3ddf      	btsti      	r5, 31
+     c7a:	0835      	bt      	0xce4	// ce4 <__GI_sqrt+0x160>
+     c7c:	59e2      	addi      	r7, r1, 1
+     c7e:	6588      	cmphs      	r2, r6
+     c80:	60c6      	subu      	r3, r1
+     c82:	0802      	bt      	0xc86	// c86 <__GI_sqrt+0x102>
+     c84:	2b00      	subi      	r3, 1
+     c86:	609a      	subu      	r2, r6
+     c88:	6010      	addu      	r0, r4
+     c8a:	6c5f      	mov      	r1, r7
+     c8c:	4adf      	lsri      	r6, r2, 31
+     c8e:	618c      	addu      	r6, r3
+     c90:	60d8      	addu      	r3, r6
+     c92:	98c1      	ld.w      	r6, (r14, 0x4)
+     c94:	2e00      	subi      	r6, 1
+     c96:	3e40      	cmpnei      	r6, 0
+     c98:	4241      	lsli      	r2, r2, 1
+     c9a:	4c81      	lsri      	r4, r4, 1
+     c9c:	b8c1      	st.w      	r6, (r14, 0x4)
+     c9e:	0be3      	bt      	0xc64	// c64 <__GI_sqrt+0xe0>
+     ca0:	6cc8      	or      	r3, r2
+     ca2:	3b40      	cmpnei      	r3, 0
+     ca4:	0c09      	bf      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     ca6:	3300      	movi      	r3, 0
+     ca8:	2b00      	subi      	r3, 1
+     caa:	64c2      	cmpne      	r0, r3
+     cac:	081e      	bt      	0xce8	// ce8 <__GI_sqrt+0x164>
+     cae:	9800      	ld.w      	r0, (r14, 0x0)
+     cb0:	2000      	addi      	r0, 1
+     cb2:	b800      	st.w      	r0, (r14, 0x0)
+     cb4:	3000      	movi      	r0, 0
+     cb6:	3401      	movi      	r4, 1
+     cb8:	9860      	ld.w      	r3, (r14, 0x0)
+     cba:	98a0      	ld.w      	r5, (r14, 0x0)
+     cbc:	690c      	and      	r4, r3
+     cbe:	5541      	asri      	r2, r5, 1
+     cc0:	102e      	lrw      	r1, 0x3fe00000	// cf8 <__GI_sqrt+0x174>
+     cc2:	3c40      	cmpnei      	r4, 0
+     cc4:	6048      	addu      	r1, r2
+     cc6:	4801      	lsri      	r0, r0, 1
+     cc8:	0c02      	bf      	0xccc	// ccc <__GI_sqrt+0x148>
+     cca:	38bf      	bseti      	r0, 31
+     ccc:	98a2      	ld.w      	r5, (r14, 0x8)
+     cce:	4594      	lsli      	r4, r5, 20
+     cd0:	6104      	addu      	r4, r1
+     cd2:	6d43      	mov      	r5, r0
+     cd4:	076f      	br      	0xbb2	// bb2 <__GI_sqrt+0x2e>
+     cd6:	4a0b      	lsri      	r0, r2, 11
+     cd8:	2c14      	subi      	r4, 21
+     cda:	4255      	lsli      	r2, r2, 21
+     cdc:	0786      	br      	0xbe8	// be8 <__GI_sqrt+0x64>
+     cde:	4001      	lsli      	r0, r0, 1
+     ce0:	2300      	addi      	r3, 1
+     ce2:	0788      	br      	0xbf2	// bf2 <__GI_sqrt+0x6e>
+     ce4:	6dc7      	mov      	r7, r1
+     ce6:	07cc      	br      	0xc7e	// c7e <__GI_sqrt+0xfa>
+     ce8:	2000      	addi      	r0, 1
+     cea:	3880      	bclri      	r0, 0
+     cec:	07e5      	br      	0xcb6	// cb6 <__GI_sqrt+0x132>
+     cee:	0000      	bkpt
+     cf0:	7ff00000 	.long	0x7ff00000
+     cf4:	fffffc01 	.long	0xfffffc01
+     cf8:	3fe00000 	.long	0x3fe00000
+
+00000cfc <___gnu_csky_case_uqi>:
+     cfc:	1421      	subi      	r14, r14, 4
+     cfe:	b820      	st.w      	r1, (r14, 0x0)
+     d00:	6c7f      	mov      	r1, r15
+     d02:	6040      	addu      	r1, r0
+     d04:	8120      	ld.b      	r1, (r1, 0x0)
+     d06:	4121      	lsli      	r1, r1, 1
+     d08:	63c4      	addu      	r15, r1
+     d0a:	9820      	ld.w      	r1, (r14, 0x0)
+     d0c:	1401      	addi      	r14, r14, 4
+     d0e:	783c      	jmp      	r15
+
+00000d10 <__fixunsdfsi>:
+     d10:	14d2      	push      	r4-r5, r15
+     d12:	3200      	movi      	r2, 0
+     d14:	106c      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d16:	6d43      	mov      	r5, r0
+     d18:	6d07      	mov      	r4, r1
+     d1a:	e0000397 	bsr      	0x1448	// 1448 <__gedf2>
+     d1e:	38df      	btsti      	r0, 31
+     d20:	0c06      	bf      	0xd2c	// d2c <__fixunsdfsi+0x1c>
+     d22:	6c17      	mov      	r0, r5
+     d24:	6c53      	mov      	r1, r4
+     d26:	e0000405 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d2a:	1492      	pop      	r4-r5, r15
+     d2c:	3200      	movi      	r2, 0
+     d2e:	1066      	lrw      	r3, 0x41e00000	// d44 <__fixunsdfsi+0x34>
+     d30:	6c17      	mov      	r0, r5
+     d32:	6c53      	mov      	r1, r4
+     d34:	e000018c 	bsr      	0x104c	// 104c <__subdf3>
+     d38:	e00003fc 	bsr      	0x1530	// 1530 <__fixdfsi>
+     d3c:	3380      	movi      	r3, 128
+     d3e:	4378      	lsli      	r3, r3, 24
+     d40:	600c      	addu      	r0, r3
+     d42:	1492      	pop      	r4-r5, r15
+     d44:	41e00000 	.long	0x41e00000
+
+00000d48 <_fpadd_parts>:
+     d48:	14c4      	push      	r4-r7
+     d4a:	142a      	subi      	r14, r14, 40
+     d4c:	9060      	ld.w      	r3, (r0, 0x0)
+     d4e:	3b01      	cmphsi      	r3, 2
+     d50:	6dcb      	mov      	r7, r2
+     d52:	0c67      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     d54:	9140      	ld.w      	r2, (r1, 0x0)
+     d56:	3a01      	cmphsi      	r2, 2
+     d58:	0c66      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d5a:	3b44      	cmpnei      	r3, 4
+     d5c:	0cde      	bf      	0xf18	// f18 <_fpadd_parts+0x1d0>
+     d5e:	3a44      	cmpnei      	r2, 4
+     d60:	0c62      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d62:	3a42      	cmpnei      	r2, 2
+     d64:	0cb7      	bf      	0xed2	// ed2 <_fpadd_parts+0x18a>
+     d66:	3b42      	cmpnei      	r3, 2
+     d68:	0c5e      	bf      	0xe24	// e24 <_fpadd_parts+0xdc>
+     d6a:	9043      	ld.w      	r2, (r0, 0xc)
+     d6c:	9064      	ld.w      	r3, (r0, 0x10)
+     d6e:	9082      	ld.w      	r4, (r0, 0x8)
+     d70:	91a2      	ld.w      	r5, (r1, 0x8)
+     d72:	b842      	st.w      	r2, (r14, 0x8)
+     d74:	b863      	st.w      	r3, (r14, 0xc)
+     d76:	9143      	ld.w      	r2, (r1, 0xc)
+     d78:	9164      	ld.w      	r3, (r1, 0x10)
+     d7a:	b840      	st.w      	r2, (r14, 0x0)
+     d7c:	b861      	st.w      	r3, (r14, 0x4)
+     d7e:	5c75      	subu      	r3, r4, r5
+     d80:	3bdf      	btsti      	r3, 31
+     d82:	6c8f      	mov      	r2, r3
+     d84:	08d2      	bt      	0xf28	// f28 <_fpadd_parts+0x1e0>
+     d86:	363f      	movi      	r6, 63
+     d88:	6499      	cmplt      	r6, r2
+     d8a:	0c50      	bf      	0xe2a	// e2a <_fpadd_parts+0xe2>
+     d8c:	6515      	cmplt      	r5, r4
+     d8e:	0cbf      	bf      	0xf0c	// f0c <_fpadd_parts+0x1c4>
+     d90:	3200      	movi      	r2, 0
+     d92:	3300      	movi      	r3, 0
+     d94:	b840      	st.w      	r2, (r14, 0x0)
+     d96:	b861      	st.w      	r3, (r14, 0x4)
+     d98:	9061      	ld.w      	r3, (r0, 0x4)
+     d9a:	9141      	ld.w      	r2, (r1, 0x4)
+     d9c:	648e      	cmpne      	r3, r2
+     d9e:	0c78      	bf      	0xe8e	// e8e <_fpadd_parts+0x146>
+     da0:	3b40      	cmpnei      	r3, 0
+     da2:	0cad      	bf      	0xefc	// efc <_fpadd_parts+0x1b4>
+     da4:	9800      	ld.w      	r0, (r14, 0x0)
+     da6:	9821      	ld.w      	r1, (r14, 0x4)
+     da8:	9842      	ld.w      	r2, (r14, 0x8)
+     daa:	9863      	ld.w      	r3, (r14, 0xc)
+     dac:	6400      	cmphs      	r0, r0
+     dae:	600b      	subc      	r0, r2
+     db0:	604f      	subc      	r1, r3
+     db2:	39df      	btsti      	r1, 31
+     db4:	08bd      	bt      	0xf2e	// f2e <_fpadd_parts+0x1e6>
+     db6:	3300      	movi      	r3, 0
+     db8:	b761      	st.w      	r3, (r7, 0x4)
+     dba:	b782      	st.w      	r4, (r7, 0x8)
+     dbc:	6c83      	mov      	r2, r0
+     dbe:	6cc7      	mov      	r3, r1
+     dc0:	b703      	st.w      	r0, (r7, 0xc)
+     dc2:	b724      	st.w      	r1, (r7, 0x10)
+     dc4:	3000      	movi      	r0, 0
+     dc6:	3100      	movi      	r1, 0
+     dc8:	2800      	subi      	r0, 1
+     dca:	2900      	subi      	r1, 1
+     dcc:	6401      	cmplt      	r0, r0
+     dce:	6009      	addc      	r0, r2
+     dd0:	604d      	addc      	r1, r3
+     dd2:	038f      	lrw      	r4, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     dd4:	6450      	cmphs      	r4, r1
+     dd6:	0c67      	bf      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     dd8:	6506      	cmpne      	r1, r4
+     dda:	0cfd      	bf      	0xfd4	// fd4 <_fpadd_parts+0x28c>
+     ddc:	3000      	movi      	r0, 0
+     dde:	9722      	ld.w      	r1, (r7, 0x8)
+     de0:	2801      	subi      	r0, 2
+     de2:	2900      	subi      	r1, 1
+     de4:	03d4      	lrw      	r6, 0xfffffff	// 1010 <_fpadd_parts+0x2c8>
+     de6:	b802      	st.w      	r0, (r14, 0x8)
+     de8:	b8e0      	st.w      	r7, (r14, 0x0)
+     dea:	0403      	br      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     dec:	6596      	cmpne      	r5, r6
+     dee:	0c83      	bf      	0xef4	// ef4 <_fpadd_parts+0x1ac>
+     df0:	4301      	lsli      	r0, r3, 1
+     df2:	4a9f      	lsri      	r4, r2, 31
+     df4:	6d00      	or      	r4, r0
+     df6:	42a1      	lsli      	r5, r2, 1
+     df8:	6c97      	mov      	r2, r5
+     dfa:	6cd3      	mov      	r3, r4
+     dfc:	3500      	movi      	r5, 0
+     dfe:	3400      	movi      	r4, 0
+     e00:	2c00      	subi      	r4, 1
+     e02:	2d00      	subi      	r5, 1
+     e04:	6511      	cmplt      	r4, r4
+     e06:	6109      	addc      	r4, r2
+     e08:	614d      	addc      	r5, r3
+     e0a:	6558      	cmphs      	r6, r5
+     e0c:	6c07      	mov      	r0, r1
+     e0e:	2900      	subi      	r1, 1
+     e10:	0bee      	bt      	0xdec	// dec <_fpadd_parts+0xa4>
+     e12:	98e0      	ld.w      	r7, (r14, 0x0)
+     e14:	b743      	st.w      	r2, (r7, 0xc)
+     e16:	b764      	st.w      	r3, (r7, 0x10)
+     e18:	3303      	movi      	r3, 3
+     e1a:	b702      	st.w      	r0, (r7, 0x8)
+     e1c:	b760      	st.w      	r3, (r7, 0x0)
+     e1e:	6c1f      	mov      	r0, r7
+     e20:	140a      	addi      	r14, r14, 40
+     e22:	1484      	pop      	r4-r7
+     e24:	6c07      	mov      	r0, r1
+     e26:	140a      	addi      	r14, r14, 40
+     e28:	1484      	pop      	r4-r7
+     e2a:	3b20      	cmplti      	r3, 1
+     e2c:	088c      	bt      	0xf44	// f44 <_fpadd_parts+0x1fc>
+     e2e:	3300      	movi      	r3, 0
+     e30:	2b1f      	subi      	r3, 32
+     e32:	60c8      	addu      	r3, r2
+     e34:	3bdf      	btsti      	r3, 31
+     e36:	b866      	st.w      	r3, (r14, 0x18)
+     e38:	08bb      	bt      	0xfae	// fae <_fpadd_parts+0x266>
+     e3a:	98a1      	ld.w      	r5, (r14, 0x4)
+     e3c:	714d      	lsr      	r5, r3
+     e3e:	b8a4      	st.w      	r5, (r14, 0x10)
+     e40:	3500      	movi      	r5, 0
+     e42:	b8a5      	st.w      	r5, (r14, 0x14)
+     e44:	9866      	ld.w      	r3, (r14, 0x18)
+     e46:	3bdf      	btsti      	r3, 31
+     e48:	3500      	movi      	r5, 0
+     e4a:	3600      	movi      	r6, 0
+     e4c:	08ad      	bt      	0xfa6	// fa6 <_fpadd_parts+0x25e>
+     e4e:	3201      	movi      	r2, 1
+     e50:	708c      	lsl      	r2, r3
+     e52:	6d8b      	mov      	r6, r2
+     e54:	3200      	movi      	r2, 0
+     e56:	3300      	movi      	r3, 0
+     e58:	2a00      	subi      	r2, 1
+     e5a:	2b00      	subi      	r3, 1
+     e5c:	6489      	cmplt      	r2, r2
+     e5e:	6095      	addc      	r2, r5
+     e60:	60d9      	addc      	r3, r6
+     e62:	98a0      	ld.w      	r5, (r14, 0x0)
+     e64:	98c1      	ld.w      	r6, (r14, 0x4)
+     e66:	6948      	and      	r5, r2
+     e68:	698c      	and      	r6, r3
+     e6a:	6c97      	mov      	r2, r5
+     e6c:	6cdb      	mov      	r3, r6
+     e6e:	6c8c      	or      	r2, r3
+     e70:	3a40      	cmpnei      	r2, 0
+     e72:	3500      	movi      	r5, 0
+     e74:	6155      	addc      	r5, r5
+     e76:	6c97      	mov      	r2, r5
+     e78:	3300      	movi      	r3, 0
+     e7a:	98a4      	ld.w      	r5, (r14, 0x10)
+     e7c:	98c5      	ld.w      	r6, (r14, 0x14)
+     e7e:	6d48      	or      	r5, r2
+     e80:	6d8c      	or      	r6, r3
+     e82:	9061      	ld.w      	r3, (r0, 0x4)
+     e84:	9141      	ld.w      	r2, (r1, 0x4)
+     e86:	648e      	cmpne      	r3, r2
+     e88:	b8a0      	st.w      	r5, (r14, 0x0)
+     e8a:	b8c1      	st.w      	r6, (r14, 0x4)
+     e8c:	0b8a      	bt      	0xda0	// da0 <_fpadd_parts+0x58>
+     e8e:	b761      	st.w      	r3, (r7, 0x4)
+     e90:	9800      	ld.w      	r0, (r14, 0x0)
+     e92:	9821      	ld.w      	r1, (r14, 0x4)
+     e94:	9842      	ld.w      	r2, (r14, 0x8)
+     e96:	9863      	ld.w      	r3, (r14, 0xc)
+     e98:	6489      	cmplt      	r2, r2
+     e9a:	6081      	addc      	r2, r0
+     e9c:	60c5      	addc      	r3, r1
+     e9e:	b782      	st.w      	r4, (r7, 0x8)
+     ea0:	b743      	st.w      	r2, (r7, 0xc)
+     ea2:	b764      	st.w      	r3, (r7, 0x10)
+     ea4:	3103      	movi      	r1, 3
+     ea6:	b720      	st.w      	r1, (r7, 0x0)
+     ea8:	123b      	lrw      	r1, 0x1fffffff	// 1014 <_fpadd_parts+0x2cc>
+     eaa:	64c4      	cmphs      	r1, r3
+     eac:	0810      	bt      	0xecc	// ecc <_fpadd_parts+0x184>
+     eae:	439f      	lsli      	r4, r3, 31
+     eb0:	4a01      	lsri      	r0, r2, 1
+     eb2:	6c10      	or      	r0, r4
+     eb4:	3500      	movi      	r5, 0
+     eb6:	3401      	movi      	r4, 1
+     eb8:	4b21      	lsri      	r1, r3, 1
+     eba:	6890      	and      	r2, r4
+     ebc:	68d4      	and      	r3, r5
+     ebe:	6c80      	or      	r2, r0
+     ec0:	6cc4      	or      	r3, r1
+     ec2:	b743      	st.w      	r2, (r7, 0xc)
+     ec4:	b764      	st.w      	r3, (r7, 0x10)
+     ec6:	9762      	ld.w      	r3, (r7, 0x8)
+     ec8:	2300      	addi      	r3, 1
+     eca:	b762      	st.w      	r3, (r7, 0x8)
+     ecc:	6c1f      	mov      	r0, r7
+     ece:	140a      	addi      	r14, r14, 40
+     ed0:	1484      	pop      	r4-r7
+     ed2:	3b42      	cmpnei      	r3, 2
+     ed4:	0ba6      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ed6:	b760      	st.w      	r3, (r7, 0x0)
+     ed8:	9061      	ld.w      	r3, (r0, 0x4)
+     eda:	b761      	st.w      	r3, (r7, 0x4)
+     edc:	9062      	ld.w      	r3, (r0, 0x8)
+     ede:	b762      	st.w      	r3, (r7, 0x8)
+     ee0:	9063      	ld.w      	r3, (r0, 0xc)
+     ee2:	b763      	st.w      	r3, (r7, 0xc)
+     ee4:	9064      	ld.w      	r3, (r0, 0x10)
+     ee6:	9141      	ld.w      	r2, (r1, 0x4)
+     ee8:	b764      	st.w      	r3, (r7, 0x10)
+     eea:	9061      	ld.w      	r3, (r0, 0x4)
+     eec:	68c8      	and      	r3, r2
+     eee:	b761      	st.w      	r3, (r7, 0x4)
+     ef0:	6c1f      	mov      	r0, r7
+     ef2:	0797      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     ef4:	98e2      	ld.w      	r7, (r14, 0x8)
+     ef6:	651c      	cmphs      	r7, r4
+     ef8:	0b7c      	bt      	0xdf0	// df0 <_fpadd_parts+0xa8>
+     efa:	078c      	br      	0xe12	// e12 <_fpadd_parts+0xca>
+     efc:	9802      	ld.w      	r0, (r14, 0x8)
+     efe:	9823      	ld.w      	r1, (r14, 0xc)
+     f00:	9840      	ld.w      	r2, (r14, 0x0)
+     f02:	9861      	ld.w      	r3, (r14, 0x4)
+     f04:	6400      	cmphs      	r0, r0
+     f06:	600b      	subc      	r0, r2
+     f08:	604f      	subc      	r1, r3
+     f0a:	0754      	br      	0xdb2	// db2 <_fpadd_parts+0x6a>
+     f0c:	3200      	movi      	r2, 0
+     f0e:	3300      	movi      	r3, 0
+     f10:	6d17      	mov      	r4, r5
+     f12:	b842      	st.w      	r2, (r14, 0x8)
+     f14:	b863      	st.w      	r3, (r14, 0xc)
+     f16:	0741      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     f18:	3a44      	cmpnei      	r2, 4
+     f1a:	0b83      	bt      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f1c:	9041      	ld.w      	r2, (r0, 0x4)
+     f1e:	9161      	ld.w      	r3, (r1, 0x4)
+     f20:	64ca      	cmpne      	r2, r3
+     f22:	0f7f      	bf      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f24:	111d      	lrw      	r0, 0x4390	// 1018 <_fpadd_parts+0x2d0>
+     f26:	077d      	br      	0xe20	// e20 <_fpadd_parts+0xd8>
+     f28:	3200      	movi      	r2, 0
+     f2a:	608e      	subu      	r2, r3
+     f2c:	072d      	br      	0xd86	// d86 <_fpadd_parts+0x3e>
+     f2e:	3301      	movi      	r3, 1
+     f30:	b761      	st.w      	r3, (r7, 0x4)
+     f32:	3200      	movi      	r2, 0
+     f34:	3300      	movi      	r3, 0
+     f36:	6488      	cmphs      	r2, r2
+     f38:	6083      	subc      	r2, r0
+     f3a:	60c7      	subc      	r3, r1
+     f3c:	b782      	st.w      	r4, (r7, 0x8)
+     f3e:	b743      	st.w      	r2, (r7, 0xc)
+     f40:	b764      	st.w      	r3, (r7, 0x10)
+     f42:	0741      	br      	0xdc4	// dc4 <_fpadd_parts+0x7c>
+     f44:	3b40      	cmpnei      	r3, 0
+     f46:	0f29      	bf      	0xd98	// d98 <_fpadd_parts+0x50>
+     f48:	3300      	movi      	r3, 0
+     f4a:	2b1f      	subi      	r3, 32
+     f4c:	60c8      	addu      	r3, r2
+     f4e:	3bdf      	btsti      	r3, 31
+     f50:	6108      	addu      	r4, r2
+     f52:	b866      	st.w      	r3, (r14, 0x18)
+     f54:	0849      	bt      	0xfe6	// fe6 <_fpadd_parts+0x29e>
+     f56:	9863      	ld.w      	r3, (r14, 0xc)
+     f58:	98a6      	ld.w      	r5, (r14, 0x18)
+     f5a:	70d5      	lsr      	r3, r5
+     f5c:	b864      	st.w      	r3, (r14, 0x10)
+     f5e:	3300      	movi      	r3, 0
+     f60:	b865      	st.w      	r3, (r14, 0x14)
+     f62:	9866      	ld.w      	r3, (r14, 0x18)
+     f64:	3bdf      	btsti      	r3, 31
+     f66:	3500      	movi      	r5, 0
+     f68:	3600      	movi      	r6, 0
+     f6a:	083a      	bt      	0xfde	// fde <_fpadd_parts+0x296>
+     f6c:	3201      	movi      	r2, 1
+     f6e:	708c      	lsl      	r2, r3
+     f70:	6d8b      	mov      	r6, r2
+     f72:	3200      	movi      	r2, 0
+     f74:	3300      	movi      	r3, 0
+     f76:	2a00      	subi      	r2, 1
+     f78:	2b00      	subi      	r3, 1
+     f7a:	6489      	cmplt      	r2, r2
+     f7c:	6095      	addc      	r2, r5
+     f7e:	60d9      	addc      	r3, r6
+     f80:	98a2      	ld.w      	r5, (r14, 0x8)
+     f82:	98c3      	ld.w      	r6, (r14, 0xc)
+     f84:	6948      	and      	r5, r2
+     f86:	698c      	and      	r6, r3
+     f88:	6c97      	mov      	r2, r5
+     f8a:	6cdb      	mov      	r3, r6
+     f8c:	6c8c      	or      	r2, r3
+     f8e:	3a40      	cmpnei      	r2, 0
+     f90:	3500      	movi      	r5, 0
+     f92:	6155      	addc      	r5, r5
+     f94:	6c97      	mov      	r2, r5
+     f96:	3300      	movi      	r3, 0
+     f98:	98a4      	ld.w      	r5, (r14, 0x10)
+     f9a:	98c5      	ld.w      	r6, (r14, 0x14)
+     f9c:	6d48      	or      	r5, r2
+     f9e:	6d8c      	or      	r6, r3
+     fa0:	b8a2      	st.w      	r5, (r14, 0x8)
+     fa2:	b8c3      	st.w      	r6, (r14, 0xc)
+     fa4:	06fa      	br      	0xd98	// d98 <_fpadd_parts+0x50>
+     fa6:	3301      	movi      	r3, 1
+     fa8:	70c8      	lsl      	r3, r2
+     faa:	6d4f      	mov      	r5, r3
+     fac:	0754      	br      	0xe54	// e54 <_fpadd_parts+0x10c>
+     fae:	9861      	ld.w      	r3, (r14, 0x4)
+     fb0:	361f      	movi      	r6, 31
+     fb2:	43a1      	lsli      	r5, r3, 1
+     fb4:	618a      	subu      	r6, r2
+     fb6:	7158      	lsl      	r5, r6
+     fb8:	b8a9      	st.w      	r5, (r14, 0x24)
+     fba:	98a0      	ld.w      	r5, (r14, 0x0)
+     fbc:	98c1      	ld.w      	r6, (r14, 0x4)
+     fbe:	b8a7      	st.w      	r5, (r14, 0x1c)
+     fc0:	b8c8      	st.w      	r6, (r14, 0x20)
+     fc2:	9867      	ld.w      	r3, (r14, 0x1c)
+     fc4:	70c9      	lsr      	r3, r2
+     fc6:	98a9      	ld.w      	r5, (r14, 0x24)
+     fc8:	6cd4      	or      	r3, r5
+     fca:	b864      	st.w      	r3, (r14, 0x10)
+     fcc:	9868      	ld.w      	r3, (r14, 0x20)
+     fce:	70c9      	lsr      	r3, r2
+     fd0:	b865      	st.w      	r3, (r14, 0x14)
+     fd2:	0739      	br      	0xe44	// e44 <_fpadd_parts+0xfc>
+     fd4:	3100      	movi      	r1, 0
+     fd6:	2901      	subi      	r1, 2
+     fd8:	6404      	cmphs      	r1, r0
+     fda:	0b01      	bt      	0xddc	// ddc <_fpadd_parts+0x94>
+     fdc:	0764      	br      	0xea4	// ea4 <_fpadd_parts+0x15c>
+     fde:	3301      	movi      	r3, 1
+     fe0:	70c8      	lsl      	r3, r2
+     fe2:	6d4f      	mov      	r5, r3
+     fe4:	07c7      	br      	0xf72	// f72 <_fpadd_parts+0x22a>
+     fe6:	9863      	ld.w      	r3, (r14, 0xc)
+     fe8:	43c1      	lsli      	r6, r3, 1
+     fea:	351f      	movi      	r5, 31
+     fec:	5d69      	subu      	r3, r5, r2
+     fee:	6d5b      	mov      	r5, r6
+     ff0:	714c      	lsl      	r5, r3
+     ff2:	b8a9      	st.w      	r5, (r14, 0x24)
+     ff4:	98a2      	ld.w      	r5, (r14, 0x8)
+     ff6:	98c3      	ld.w      	r6, (r14, 0xc)
+     ff8:	b8a7      	st.w      	r5, (r14, 0x1c)
+     ffa:	b8c8      	st.w      	r6, (r14, 0x20)
+     ffc:	9867      	ld.w      	r3, (r14, 0x1c)
+     ffe:	70c9      	lsr      	r3, r2
+    1000:	98a9      	ld.w      	r5, (r14, 0x24)
+    1002:	6cd4      	or      	r3, r5
+    1004:	b864      	st.w      	r3, (r14, 0x10)
+    1006:	9868      	ld.w      	r3, (r14, 0x20)
+    1008:	70c9      	lsr      	r3, r2
+    100a:	b865      	st.w      	r3, (r14, 0x14)
+    100c:	07ab      	br      	0xf62	// f62 <_fpadd_parts+0x21a>
+    100e:	0000      	bkpt
+    1010:	0fffffff 	.long	0x0fffffff
+    1014:	1fffffff 	.long	0x1fffffff
+    1018:	00004390 	.long	0x00004390
+
+0000101c <__adddf3>:
+    101c:	14d0      	push      	r15
+    101e:	1433      	subi      	r14, r14, 76
+    1020:	b800      	st.w      	r0, (r14, 0x0)
+    1022:	b821      	st.w      	r1, (r14, 0x4)
+    1024:	6c3b      	mov      	r0, r14
+    1026:	1904      	addi      	r1, r14, 16
+    1028:	b863      	st.w      	r3, (r14, 0xc)
+    102a:	b842      	st.w      	r2, (r14, 0x8)
+    102c:	e00003f4 	bsr      	0x1814	// 1814 <__unpack_d>
+    1030:	1909      	addi      	r1, r14, 36
+    1032:	1802      	addi      	r0, r14, 8
+    1034:	e00003f0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1038:	1a0e      	addi      	r2, r14, 56
+    103a:	1909      	addi      	r1, r14, 36
+    103c:	1804      	addi      	r0, r14, 16
+    103e:	e3fffe85 	bsr      	0xd48	// d48 <_fpadd_parts>
+    1042:	e000031b 	bsr      	0x1678	// 1678 <__pack_d>
+    1046:	1413      	addi      	r14, r14, 76
+    1048:	1490      	pop      	r15
+	...
+
+0000104c <__subdf3>:
+    104c:	14d0      	push      	r15
+    104e:	1433      	subi      	r14, r14, 76
+    1050:	b800      	st.w      	r0, (r14, 0x0)
+    1052:	b821      	st.w      	r1, (r14, 0x4)
+    1054:	6c3b      	mov      	r0, r14
+    1056:	1904      	addi      	r1, r14, 16
+    1058:	b842      	st.w      	r2, (r14, 0x8)
+    105a:	b863      	st.w      	r3, (r14, 0xc)
+    105c:	e00003dc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1060:	1909      	addi      	r1, r14, 36
+    1062:	1802      	addi      	r0, r14, 8
+    1064:	e00003d8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1068:	986a      	ld.w      	r3, (r14, 0x28)
+    106a:	3201      	movi      	r2, 1
+    106c:	6cc9      	xor      	r3, r2
+    106e:	1909      	addi      	r1, r14, 36
+    1070:	1a0e      	addi      	r2, r14, 56
+    1072:	1804      	addi      	r0, r14, 16
+    1074:	b86a      	st.w      	r3, (r14, 0x28)
+    1076:	e3fffe69 	bsr      	0xd48	// d48 <_fpadd_parts>
+    107a:	e00002ff 	bsr      	0x1678	// 1678 <__pack_d>
+    107e:	1413      	addi      	r14, r14, 76
+    1080:	1490      	pop      	r15
+	...
+
+00001084 <__muldf3>:
+    1084:	14d4      	push      	r4-r7, r15
+    1086:	143b      	subi      	r14, r14, 108
+    1088:	b808      	st.w      	r0, (r14, 0x20)
+    108a:	b829      	st.w      	r1, (r14, 0x24)
+    108c:	1808      	addi      	r0, r14, 32
+    108e:	190c      	addi      	r1, r14, 48
+    1090:	b86b      	st.w      	r3, (r14, 0x2c)
+    1092:	b84a      	st.w      	r2, (r14, 0x28)
+    1094:	e00003c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1098:	1911      	addi      	r1, r14, 68
+    109a:	180a      	addi      	r0, r14, 40
+    109c:	e00003bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    10a0:	986c      	ld.w      	r3, (r14, 0x30)
+    10a2:	3b01      	cmphsi      	r3, 2
+    10a4:	0cac      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10a6:	9851      	ld.w      	r2, (r14, 0x44)
+    10a8:	3a01      	cmphsi      	r2, 2
+    10aa:	0c9c      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10ac:	3b44      	cmpnei      	r3, 4
+    10ae:	0ca5      	bf      	0x11f8	// 11f8 <__muldf3+0x174>
+    10b0:	3a44      	cmpnei      	r2, 4
+    10b2:	0c96      	bf      	0x11de	// 11de <__muldf3+0x15a>
+    10b4:	3b42      	cmpnei      	r3, 2
+    10b6:	0ca3      	bf      	0x11fc	// 11fc <__muldf3+0x178>
+    10b8:	3a42      	cmpnei      	r2, 2
+    10ba:	0c94      	bf      	0x11e2	// 11e2 <__muldf3+0x15e>
+    10bc:	98ef      	ld.w      	r7, (r14, 0x3c)
+    10be:	98b4      	ld.w      	r5, (r14, 0x50)
+    10c0:	9875      	ld.w      	r3, (r14, 0x54)
+    10c2:	6d8f      	mov      	r6, r3
+    10c4:	6c9f      	mov      	r2, r7
+    10c6:	3300      	movi      	r3, 0
+    10c8:	6c17      	mov      	r0, r5
+    10ca:	3100      	movi      	r1, 0
+    10cc:	e0000294 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10d0:	b804      	st.w      	r0, (r14, 0x10)
+    10d2:	b825      	st.w      	r1, (r14, 0x14)
+    10d4:	6c9f      	mov      	r2, r7
+    10d6:	3300      	movi      	r3, 0
+    10d8:	6c1b      	mov      	r0, r6
+    10da:	3100      	movi      	r1, 0
+    10dc:	9890      	ld.w      	r4, (r14, 0x40)
+    10de:	b8c2      	st.w      	r6, (r14, 0x8)
+    10e0:	e000028a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10e4:	6d83      	mov      	r6, r0
+    10e6:	6dc7      	mov      	r7, r1
+    10e8:	9842      	ld.w      	r2, (r14, 0x8)
+    10ea:	3300      	movi      	r3, 0
+    10ec:	6c13      	mov      	r0, r4
+    10ee:	3100      	movi      	r1, 0
+    10f0:	e0000282 	bsr      	0x15f4	// 15f4 <__muldi3>
+    10f4:	b806      	st.w      	r0, (r14, 0x18)
+    10f6:	b827      	st.w      	r1, (r14, 0x1c)
+    10f8:	6c97      	mov      	r2, r5
+    10fa:	3300      	movi      	r3, 0
+    10fc:	6c13      	mov      	r0, r4
+    10fe:	3100      	movi      	r1, 0
+    1100:	e000027a 	bsr      	0x15f4	// 15f4 <__muldi3>
+    1104:	6401      	cmplt      	r0, r0
+    1106:	6019      	addc      	r0, r6
+    1108:	605d      	addc      	r1, r7
+    110a:	65c4      	cmphs      	r1, r7
+    110c:	0c91      	bf      	0x122e	// 122e <__muldf3+0x1aa>
+    110e:	645e      	cmpne      	r7, r1
+    1110:	0c8d      	bf      	0x122a	// 122a <__muldf3+0x1a6>
+    1112:	3300      	movi      	r3, 0
+    1114:	3400      	movi      	r4, 0
+    1116:	b862      	st.w      	r3, (r14, 0x8)
+    1118:	b883      	st.w      	r4, (r14, 0xc)
+    111a:	9884      	ld.w      	r4, (r14, 0x10)
+    111c:	98a5      	ld.w      	r5, (r14, 0x14)
+    111e:	3600      	movi      	r6, 0
+    1120:	6dc3      	mov      	r7, r0
+    1122:	6c93      	mov      	r2, r4
+    1124:	6cd7      	mov      	r3, r5
+    1126:	6489      	cmplt      	r2, r2
+    1128:	6099      	addc      	r2, r6
+    112a:	60dd      	addc      	r3, r7
+    112c:	6d8b      	mov      	r6, r2
+    112e:	6dcf      	mov      	r7, r3
+    1130:	6c93      	mov      	r2, r4
+    1132:	6cd7      	mov      	r3, r5
+    1134:	64dc      	cmphs      	r7, r3
+    1136:	0c70      	bf      	0x1216	// 1216 <__muldf3+0x192>
+    1138:	65ce      	cmpne      	r3, r7
+    113a:	0c6c      	bf      	0x1212	// 1212 <__muldf3+0x18e>
+    113c:	6c87      	mov      	r2, r1
+    113e:	3300      	movi      	r3, 0
+    1140:	9806      	ld.w      	r0, (r14, 0x18)
+    1142:	9827      	ld.w      	r1, (r14, 0x1c)
+    1144:	6401      	cmplt      	r0, r0
+    1146:	6009      	addc      	r0, r2
+    1148:	604d      	addc      	r1, r3
+    114a:	6c83      	mov      	r2, r0
+    114c:	6cc7      	mov      	r3, r1
+    114e:	9802      	ld.w      	r0, (r14, 0x8)
+    1150:	9823      	ld.w      	r1, (r14, 0xc)
+    1152:	6401      	cmplt      	r0, r0
+    1154:	6009      	addc      	r0, r2
+    1156:	604d      	addc      	r1, r3
+    1158:	6c83      	mov      	r2, r0
+    115a:	6cc7      	mov      	r3, r1
+    115c:	988e      	ld.w      	r4, (r14, 0x38)
+    115e:	9833      	ld.w      	r1, (r14, 0x4c)
+    1160:	6104      	addu      	r4, r1
+    1162:	5c2e      	addi      	r1, r4, 4
+    1164:	b838      	st.w      	r1, (r14, 0x60)
+    1166:	980d      	ld.w      	r0, (r14, 0x34)
+    1168:	9832      	ld.w      	r1, (r14, 0x48)
+    116a:	6442      	cmpne      	r0, r1
+    116c:	12b0      	lrw      	r5, 0x1fffffff	// 12ac <__muldf3+0x228>
+    116e:	3100      	movi      	r1, 0
+    1170:	6045      	addc      	r1, r1
+    1172:	64d4      	cmphs      	r5, r3
+    1174:	b837      	st.w      	r1, (r14, 0x5c)
+    1176:	0879      	bt      	0x1268	// 1268 <__muldf3+0x1e4>
+    1178:	2404      	addi      	r4, 5
+    117a:	b8a4      	st.w      	r5, (r14, 0x10)
+    117c:	3001      	movi      	r0, 1
+    117e:	3100      	movi      	r1, 0
+    1180:	6808      	and      	r0, r2
+    1182:	684c      	and      	r1, r3
+    1184:	6c04      	or      	r0, r1
+    1186:	3840      	cmpnei      	r0, 0
+    1188:	b882      	st.w      	r4, (r14, 0x8)
+    118a:	0c0e      	bf      	0x11a6	// 11a6 <__muldf3+0x122>
+    118c:	473f      	lsli      	r1, r7, 31
+    118e:	4e01      	lsri      	r0, r6, 1
+    1190:	6c04      	or      	r0, r1
+    1192:	4f21      	lsri      	r1, r7, 1
+    1194:	b800      	st.w      	r0, (r14, 0x0)
+    1196:	b821      	st.w      	r1, (r14, 0x4)
+    1198:	3180      	movi      	r1, 128
+    119a:	98c0      	ld.w      	r6, (r14, 0x0)
+    119c:	98e1      	ld.w      	r7, (r14, 0x4)
+    119e:	3000      	movi      	r0, 0
+    11a0:	4138      	lsli      	r1, r1, 24
+    11a2:	6d80      	or      	r6, r0
+    11a4:	6dc4      	or      	r7, r1
+    11a6:	4b21      	lsri      	r1, r3, 1
+    11a8:	43bf      	lsli      	r5, r3, 31
+    11aa:	4a01      	lsri      	r0, r2, 1
+    11ac:	6cc7      	mov      	r3, r1
+    11ae:	9824      	ld.w      	r1, (r14, 0x10)
+    11b0:	6d40      	or      	r5, r0
+    11b2:	64c4      	cmphs      	r1, r3
+    11b4:	6c97      	mov      	r2, r5
+    11b6:	2400      	addi      	r4, 1
+    11b8:	0fe2      	bf      	0x117c	// 117c <__muldf3+0xf8>
+    11ba:	9822      	ld.w      	r1, (r14, 0x8)
+    11bc:	b838      	st.w      	r1, (r14, 0x60)
+    11be:	30ff      	movi      	r0, 255
+    11c0:	3100      	movi      	r1, 0
+    11c2:	6808      	and      	r0, r2
+    11c4:	684c      	and      	r1, r3
+    11c6:	3480      	movi      	r4, 128
+    11c8:	6502      	cmpne      	r0, r4
+    11ca:	0c37      	bf      	0x1238	// 1238 <__muldf3+0x1b4>
+    11cc:	b859      	st.w      	r2, (r14, 0x64)
+    11ce:	b87a      	st.w      	r3, (r14, 0x68)
+    11d0:	3303      	movi      	r3, 3
+    11d2:	b876      	st.w      	r3, (r14, 0x58)
+    11d4:	1816      	addi      	r0, r14, 88
+    11d6:	e0000251 	bsr      	0x1678	// 1678 <__pack_d>
+    11da:	141b      	addi      	r14, r14, 108
+    11dc:	1494      	pop      	r4-r7, r15
+    11de:	3b42      	cmpnei      	r3, 2
+    11e0:	0c42      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11e2:	9872      	ld.w      	r3, (r14, 0x48)
+    11e4:	984d      	ld.w      	r2, (r14, 0x34)
+    11e6:	64ca      	cmpne      	r2, r3
+    11e8:	3300      	movi      	r3, 0
+    11ea:	60cd      	addc      	r3, r3
+    11ec:	1811      	addi      	r0, r14, 68
+    11ee:	b872      	st.w      	r3, (r14, 0x48)
+    11f0:	e0000244 	bsr      	0x1678	// 1678 <__pack_d>
+    11f4:	141b      	addi      	r14, r14, 108
+    11f6:	1494      	pop      	r4-r7, r15
+    11f8:	3a42      	cmpnei      	r2, 2
+    11fa:	0c35      	bf      	0x1264	// 1264 <__muldf3+0x1e0>
+    11fc:	984d      	ld.w      	r2, (r14, 0x34)
+    11fe:	9872      	ld.w      	r3, (r14, 0x48)
+    1200:	64ca      	cmpne      	r2, r3
+    1202:	3300      	movi      	r3, 0
+    1204:	60cd      	addc      	r3, r3
+    1206:	180c      	addi      	r0, r14, 48
+    1208:	b86d      	st.w      	r3, (r14, 0x34)
+    120a:	e0000237 	bsr      	0x1678	// 1678 <__pack_d>
+    120e:	141b      	addi      	r14, r14, 108
+    1210:	1494      	pop      	r4-r7, r15
+    1212:	6498      	cmphs      	r6, r2
+    1214:	0b94      	bt      	0x113c	// 113c <__muldf3+0xb8>
+    1216:	9882      	ld.w      	r4, (r14, 0x8)
+    1218:	98a3      	ld.w      	r5, (r14, 0xc)
+    121a:	3201      	movi      	r2, 1
+    121c:	3300      	movi      	r3, 0
+    121e:	6511      	cmplt      	r4, r4
+    1220:	6109      	addc      	r4, r2
+    1222:	614d      	addc      	r5, r3
+    1224:	b882      	st.w      	r4, (r14, 0x8)
+    1226:	b8a3      	st.w      	r5, (r14, 0xc)
+    1228:	078a      	br      	0x113c	// 113c <__muldf3+0xb8>
+    122a:	6580      	cmphs      	r0, r6
+    122c:	0b73      	bt      	0x1112	// 1112 <__muldf3+0x8e>
+    122e:	3300      	movi      	r3, 0
+    1230:	3401      	movi      	r4, 1
+    1232:	b862      	st.w      	r3, (r14, 0x8)
+    1234:	b883      	st.w      	r4, (r14, 0xc)
+    1236:	0772      	br      	0x111a	// 111a <__muldf3+0x96>
+    1238:	3940      	cmpnei      	r1, 0
+    123a:	0bc9      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    123c:	3180      	movi      	r1, 128
+    123e:	4121      	lsli      	r1, r1, 1
+    1240:	6848      	and      	r1, r2
+    1242:	3940      	cmpnei      	r1, 0
+    1244:	0bc4      	bt      	0x11cc	// 11cc <__muldf3+0x148>
+    1246:	6c5b      	mov      	r1, r6
+    1248:	6c5c      	or      	r1, r7
+    124a:	3940      	cmpnei      	r1, 0
+    124c:	0fc0      	bf      	0x11cc	// 11cc <__muldf3+0x148>
+    124e:	3080      	movi      	r0, 128
+    1250:	3100      	movi      	r1, 0
+    1252:	6401      	cmplt      	r0, r0
+    1254:	6009      	addc      	r0, r2
+    1256:	604d      	addc      	r1, r3
+    1258:	34ff      	movi      	r4, 255
+    125a:	6d43      	mov      	r5, r0
+    125c:	6951      	andn      	r5, r4
+    125e:	6c97      	mov      	r2, r5
+    1260:	6cc7      	mov      	r3, r1
+    1262:	07b5      	br      	0x11cc	// 11cc <__muldf3+0x148>
+    1264:	1013      	lrw      	r0, 0x4390	// 12b0 <__muldf3+0x22c>
+    1266:	07b8      	br      	0x11d6	// 11d6 <__muldf3+0x152>
+    1268:	1033      	lrw      	r1, 0xfffffff	// 12b4 <__muldf3+0x230>
+    126a:	64c4      	cmphs      	r1, r3
+    126c:	0fa9      	bf      	0x11be	// 11be <__muldf3+0x13a>
+    126e:	2402      	addi      	r4, 3
+    1270:	b822      	st.w      	r1, (r14, 0x8)
+    1272:	4a1f      	lsri      	r0, r2, 31
+    1274:	4321      	lsli      	r1, r3, 1
+    1276:	42a1      	lsli      	r5, r2, 1
+    1278:	6c04      	or      	r0, r1
+    127a:	3fdf      	btsti      	r7, 31
+    127c:	b880      	st.w      	r4, (r14, 0x0)
+    127e:	6c97      	mov      	r2, r5
+    1280:	6cc3      	mov      	r3, r0
+    1282:	0c07      	bf      	0x1290	// 1290 <__muldf3+0x20c>
+    1284:	3001      	movi      	r0, 1
+    1286:	3100      	movi      	r1, 0
+    1288:	6c08      	or      	r0, r2
+    128a:	6c4c      	or      	r1, r3
+    128c:	6c83      	mov      	r2, r0
+    128e:	6cc7      	mov      	r3, r1
+    1290:	4721      	lsli      	r1, r7, 1
+    1292:	4e1f      	lsri      	r0, r6, 31
+    1294:	6c04      	or      	r0, r1
+    1296:	9822      	ld.w      	r1, (r14, 0x8)
+    1298:	46a1      	lsli      	r5, r6, 1
+    129a:	64c4      	cmphs      	r1, r3
+    129c:	6d97      	mov      	r6, r5
+    129e:	6dc3      	mov      	r7, r0
+    12a0:	2c00      	subi      	r4, 1
+    12a2:	0be8      	bt      	0x1272	// 1272 <__muldf3+0x1ee>
+    12a4:	9820      	ld.w      	r1, (r14, 0x0)
+    12a6:	b838      	st.w      	r1, (r14, 0x60)
+    12a8:	078b      	br      	0x11be	// 11be <__muldf3+0x13a>
+    12aa:	0000      	bkpt
+    12ac:	1fffffff 	.long	0x1fffffff
+    12b0:	00004390 	.long	0x00004390
+    12b4:	0fffffff 	.long	0x0fffffff
+
+000012b8 <__divdf3>:
+    12b8:	14d4      	push      	r4-r7, r15
+    12ba:	1432      	subi      	r14, r14, 72
+    12bc:	b804      	st.w      	r0, (r14, 0x10)
+    12be:	b825      	st.w      	r1, (r14, 0x14)
+    12c0:	1804      	addi      	r0, r14, 16
+    12c2:	1908      	addi      	r1, r14, 32
+    12c4:	b867      	st.w      	r3, (r14, 0x1c)
+    12c6:	b846      	st.w      	r2, (r14, 0x18)
+    12c8:	e00002a6 	bsr      	0x1814	// 1814 <__unpack_d>
+    12cc:	190d      	addi      	r1, r14, 52
+    12ce:	1806      	addi      	r0, r14, 24
+    12d0:	e00002a2 	bsr      	0x1814	// 1814 <__unpack_d>
+    12d4:	9868      	ld.w      	r3, (r14, 0x20)
+    12d6:	3b01      	cmphsi      	r3, 2
+    12d8:	0c66      	bf      	0x13a4	// 13a4 <__divdf3+0xec>
+    12da:	982d      	ld.w      	r1, (r14, 0x34)
+    12dc:	3901      	cmphsi      	r1, 2
+    12de:	0c92      	bf      	0x1402	// 1402 <__divdf3+0x14a>
+    12e0:	9849      	ld.w      	r2, (r14, 0x24)
+    12e2:	980e      	ld.w      	r0, (r14, 0x38)
+    12e4:	6c81      	xor      	r2, r0
+    12e6:	3b44      	cmpnei      	r3, 4
+    12e8:	b849      	st.w      	r2, (r14, 0x24)
+    12ea:	0c62      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12ec:	3b42      	cmpnei      	r3, 2
+    12ee:	0c60      	bf      	0x13ae	// 13ae <__divdf3+0xf6>
+    12f0:	3944      	cmpnei      	r1, 4
+    12f2:	0c62      	bf      	0x13b6	// 13b6 <__divdf3+0xfe>
+    12f4:	3942      	cmpnei      	r1, 2
+    12f6:	0c82      	bf      	0x13fa	// 13fa <__divdf3+0x142>
+    12f8:	982a      	ld.w      	r1, (r14, 0x28)
+    12fa:	986f      	ld.w      	r3, (r14, 0x3c)
+    12fc:	604e      	subu      	r1, r3
+    12fe:	9890      	ld.w      	r4, (r14, 0x40)
+    1300:	98b1      	ld.w      	r5, (r14, 0x44)
+    1302:	984b      	ld.w      	r2, (r14, 0x2c)
+    1304:	986c      	ld.w      	r3, (r14, 0x30)
+    1306:	654c      	cmphs      	r3, r5
+    1308:	b82a      	st.w      	r1, (r14, 0x28)
+    130a:	6d93      	mov      	r6, r4
+    130c:	6dd7      	mov      	r7, r5
+    130e:	0c05      	bf      	0x1318	// 1318 <__divdf3+0x60>
+    1310:	64d6      	cmpne      	r5, r3
+    1312:	080b      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1314:	6508      	cmphs      	r2, r4
+    1316:	0809      	bt      	0x1328	// 1328 <__divdf3+0x70>
+    1318:	4a9f      	lsri      	r4, r2, 31
+    131a:	4301      	lsli      	r0, r3, 1
+    131c:	42a1      	lsli      	r5, r2, 1
+    131e:	6d00      	or      	r4, r0
+    1320:	2900      	subi      	r1, 1
+    1322:	6c97      	mov      	r2, r5
+    1324:	6cd3      	mov      	r3, r4
+    1326:	b82a      	st.w      	r1, (r14, 0x28)
+    1328:	3000      	movi      	r0, 0
+    132a:	3100      	movi      	r1, 0
+    132c:	b802      	st.w      	r0, (r14, 0x8)
+    132e:	b823      	st.w      	r1, (r14, 0xc)
+    1330:	3180      	movi      	r1, 128
+    1332:	343d      	movi      	r4, 61
+    1334:	3000      	movi      	r0, 0
+    1336:	4135      	lsli      	r1, r1, 21
+    1338:	b8c0      	st.w      	r6, (r14, 0x0)
+    133a:	b8e1      	st.w      	r7, (r14, 0x4)
+    133c:	98a0      	ld.w      	r5, (r14, 0x0)
+    133e:	98c1      	ld.w      	r6, (r14, 0x4)
+    1340:	658c      	cmphs      	r3, r6
+    1342:	0c10      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    1344:	64da      	cmpne      	r6, r3
+    1346:	0803      	bt      	0x134c	// 134c <__divdf3+0x94>
+    1348:	6548      	cmphs      	r2, r5
+    134a:	0c0c      	bf      	0x1362	// 1362 <__divdf3+0xaa>
+    134c:	98a2      	ld.w      	r5, (r14, 0x8)
+    134e:	98c3      	ld.w      	r6, (r14, 0xc)
+    1350:	6d40      	or      	r5, r0
+    1352:	6d84      	or      	r6, r1
+    1354:	b8a2      	st.w      	r5, (r14, 0x8)
+    1356:	b8c3      	st.w      	r6, (r14, 0xc)
+    1358:	98a0      	ld.w      	r5, (r14, 0x0)
+    135a:	98c1      	ld.w      	r6, (r14, 0x4)
+    135c:	6488      	cmphs      	r2, r2
+    135e:	6097      	subc      	r2, r5
+    1360:	60db      	subc      	r3, r6
+    1362:	41bf      	lsli      	r5, r1, 31
+    1364:	48e1      	lsri      	r7, r0, 1
+    1366:	6d97      	mov      	r6, r5
+    1368:	49a1      	lsri      	r5, r1, 1
+    136a:	6d9c      	or      	r6, r7
+    136c:	6c57      	mov      	r1, r5
+    136e:	4abf      	lsri      	r5, r2, 31
+    1370:	6c1b      	mov      	r0, r6
+    1372:	2c00      	subi      	r4, 1
+    1374:	6d97      	mov      	r6, r5
+    1376:	43a1      	lsli      	r5, r3, 1
+    1378:	6d94      	or      	r6, r5
+    137a:	4261      	lsli      	r3, r2, 1
+    137c:	3c40      	cmpnei      	r4, 0
+    137e:	6dcf      	mov      	r7, r3
+    1380:	6c8f      	mov      	r2, r3
+    1382:	6cdb      	mov      	r3, r6
+    1384:	0bdc      	bt      	0x133c	// 133c <__divdf3+0x84>
+    1386:	30ff      	movi      	r0, 255
+    1388:	3100      	movi      	r1, 0
+    138a:	9882      	ld.w      	r4, (r14, 0x8)
+    138c:	98a3      	ld.w      	r5, (r14, 0xc)
+    138e:	6900      	and      	r4, r0
+    1390:	6944      	and      	r5, r1
+    1392:	6c13      	mov      	r0, r4
+    1394:	6c57      	mov      	r1, r5
+    1396:	3480      	movi      	r4, 128
+    1398:	6502      	cmpne      	r0, r4
+    139a:	0c15      	bf      	0x13c4	// 13c4 <__divdf3+0x10c>
+    139c:	9862      	ld.w      	r3, (r14, 0x8)
+    139e:	9883      	ld.w      	r4, (r14, 0xc)
+    13a0:	b86b      	st.w      	r3, (r14, 0x2c)
+    13a2:	b88c      	st.w      	r4, (r14, 0x30)
+    13a4:	1808      	addi      	r0, r14, 32
+    13a6:	e0000169 	bsr      	0x1678	// 1678 <__pack_d>
+    13aa:	1412      	addi      	r14, r14, 72
+    13ac:	1494      	pop      	r4-r7, r15
+    13ae:	644e      	cmpne      	r3, r1
+    13b0:	0bfa      	bt      	0x13a4	// 13a4 <__divdf3+0xec>
+    13b2:	1016      	lrw      	r0, 0x4390	// 1408 <__divdf3+0x150>
+    13b4:	07f9      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13b6:	3300      	movi      	r3, 0
+    13b8:	3400      	movi      	r4, 0
+    13ba:	b86b      	st.w      	r3, (r14, 0x2c)
+    13bc:	b88c      	st.w      	r4, (r14, 0x30)
+    13be:	b86a      	st.w      	r3, (r14, 0x28)
+    13c0:	1808      	addi      	r0, r14, 32
+    13c2:	07f2      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    13c4:	3940      	cmpnei      	r1, 0
+    13c6:	0beb      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13c8:	3180      	movi      	r1, 128
+    13ca:	4121      	lsli      	r1, r1, 1
+    13cc:	9882      	ld.w      	r4, (r14, 0x8)
+    13ce:	98a3      	ld.w      	r5, (r14, 0xc)
+    13d0:	6850      	and      	r1, r4
+    13d2:	3940      	cmpnei      	r1, 0
+    13d4:	0be4      	bt      	0x139c	// 139c <__divdf3+0xe4>
+    13d6:	6c98      	or      	r2, r6
+    13d8:	3a40      	cmpnei      	r2, 0
+    13da:	0fe1      	bf      	0x139c	// 139c <__divdf3+0xe4>
+    13dc:	3280      	movi      	r2, 128
+    13de:	3300      	movi      	r3, 0
+    13e0:	6c13      	mov      	r0, r4
+    13e2:	6c57      	mov      	r1, r5
+    13e4:	6401      	cmplt      	r0, r0
+    13e6:	6009      	addc      	r0, r2
+    13e8:	604d      	addc      	r1, r3
+    13ea:	6c83      	mov      	r2, r0
+    13ec:	6cc7      	mov      	r3, r1
+    13ee:	6c0b      	mov      	r0, r2
+    13f0:	31ff      	movi      	r1, 255
+    13f2:	6805      	andn      	r0, r1
+    13f4:	b802      	st.w      	r0, (r14, 0x8)
+    13f6:	b863      	st.w      	r3, (r14, 0xc)
+    13f8:	07d2      	br      	0x139c	// 139c <__divdf3+0xe4>
+    13fa:	3304      	movi      	r3, 4
+    13fc:	b868      	st.w      	r3, (r14, 0x20)
+    13fe:	1808      	addi      	r0, r14, 32
+    1400:	07d3      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1402:	180d      	addi      	r0, r14, 52
+    1404:	07d1      	br      	0x13a6	// 13a6 <__divdf3+0xee>
+    1406:	0000      	bkpt
+    1408:	00004390 	.long	0x00004390
+
+0000140c <__gtdf2>:
+    140c:	14d0      	push      	r15
+    140e:	142e      	subi      	r14, r14, 56
+    1410:	b800      	st.w      	r0, (r14, 0x0)
+    1412:	b821      	st.w      	r1, (r14, 0x4)
+    1414:	6c3b      	mov      	r0, r14
+    1416:	1904      	addi      	r1, r14, 16
+    1418:	b863      	st.w      	r3, (r14, 0xc)
+    141a:	b842      	st.w      	r2, (r14, 0x8)
+    141c:	e00001fc 	bsr      	0x1814	// 1814 <__unpack_d>
+    1420:	1909      	addi      	r1, r14, 36
+    1422:	1802      	addi      	r0, r14, 8
+    1424:	e00001f8 	bsr      	0x1814	// 1814 <__unpack_d>
+    1428:	9864      	ld.w      	r3, (r14, 0x10)
+    142a:	3b01      	cmphsi      	r3, 2
+    142c:	0c0a      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    142e:	9869      	ld.w      	r3, (r14, 0x24)
+    1430:	3b01      	cmphsi      	r3, 2
+    1432:	0c07      	bf      	0x1440	// 1440 <__gtdf2+0x34>
+    1434:	1909      	addi      	r1, r14, 36
+    1436:	1804      	addi      	r0, r14, 16
+    1438:	e0000250 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    143c:	140e      	addi      	r14, r14, 56
+    143e:	1490      	pop      	r15
+    1440:	3000      	movi      	r0, 0
+    1442:	2800      	subi      	r0, 1
+    1444:	140e      	addi      	r14, r14, 56
+    1446:	1490      	pop      	r15
+
+00001448 <__gedf2>:
+    1448:	14d0      	push      	r15
+    144a:	142e      	subi      	r14, r14, 56
+    144c:	b800      	st.w      	r0, (r14, 0x0)
+    144e:	b821      	st.w      	r1, (r14, 0x4)
+    1450:	6c3b      	mov      	r0, r14
+    1452:	1904      	addi      	r1, r14, 16
+    1454:	b863      	st.w      	r3, (r14, 0xc)
+    1456:	b842      	st.w      	r2, (r14, 0x8)
+    1458:	e00001de 	bsr      	0x1814	// 1814 <__unpack_d>
+    145c:	1909      	addi      	r1, r14, 36
+    145e:	1802      	addi      	r0, r14, 8
+    1460:	e00001da 	bsr      	0x1814	// 1814 <__unpack_d>
+    1464:	9864      	ld.w      	r3, (r14, 0x10)
+    1466:	3b01      	cmphsi      	r3, 2
+    1468:	0c0a      	bf      	0x147c	// 147c <__gedf2+0x34>
+    146a:	9869      	ld.w      	r3, (r14, 0x24)
+    146c:	3b01      	cmphsi      	r3, 2
+    146e:	0c07      	bf      	0x147c	// 147c <__gedf2+0x34>
+    1470:	1909      	addi      	r1, r14, 36
+    1472:	1804      	addi      	r0, r14, 16
+    1474:	e0000232 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    1478:	140e      	addi      	r14, r14, 56
+    147a:	1490      	pop      	r15
+    147c:	3000      	movi      	r0, 0
+    147e:	2800      	subi      	r0, 1
+    1480:	140e      	addi      	r14, r14, 56
+    1482:	1490      	pop      	r15
+
+00001484 <__ledf2>:
+    1484:	14d0      	push      	r15
+    1486:	142e      	subi      	r14, r14, 56
+    1488:	b800      	st.w      	r0, (r14, 0x0)
+    148a:	b821      	st.w      	r1, (r14, 0x4)
+    148c:	6c3b      	mov      	r0, r14
+    148e:	1904      	addi      	r1, r14, 16
+    1490:	b863      	st.w      	r3, (r14, 0xc)
+    1492:	b842      	st.w      	r2, (r14, 0x8)
+    1494:	e00001c0 	bsr      	0x1814	// 1814 <__unpack_d>
+    1498:	1909      	addi      	r1, r14, 36
+    149a:	1802      	addi      	r0, r14, 8
+    149c:	e00001bc 	bsr      	0x1814	// 1814 <__unpack_d>
+    14a0:	9864      	ld.w      	r3, (r14, 0x10)
+    14a2:	3b01      	cmphsi      	r3, 2
+    14a4:	0c0a      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14a6:	9869      	ld.w      	r3, (r14, 0x24)
+    14a8:	3b01      	cmphsi      	r3, 2
+    14aa:	0c07      	bf      	0x14b8	// 14b8 <__ledf2+0x34>
+    14ac:	1909      	addi      	r1, r14, 36
+    14ae:	1804      	addi      	r0, r14, 16
+    14b0:	e0000214 	bsr      	0x18d8	// 18d8 <__fpcmp_parts_d>
+    14b4:	140e      	addi      	r14, r14, 56
+    14b6:	1490      	pop      	r15
+    14b8:	3001      	movi      	r0, 1
+    14ba:	140e      	addi      	r14, r14, 56
+    14bc:	1490      	pop      	r15
+	...
+
+000014c0 <__floatsidf>:
+    14c0:	14d1      	push      	r4, r15
+    14c2:	1425      	subi      	r14, r14, 20
+    14c4:	3303      	movi      	r3, 3
+    14c6:	b860      	st.w      	r3, (r14, 0x0)
+    14c8:	3840      	cmpnei      	r0, 0
+    14ca:	487f      	lsri      	r3, r0, 31
+    14cc:	b861      	st.w      	r3, (r14, 0x4)
+    14ce:	0808      	bt      	0x14de	// 14de <__floatsidf+0x1e>
+    14d0:	3302      	movi      	r3, 2
+    14d2:	b860      	st.w      	r3, (r14, 0x0)
+    14d4:	6c3b      	mov      	r0, r14
+    14d6:	e00000d1 	bsr      	0x1678	// 1678 <__pack_d>
+    14da:	1405      	addi      	r14, r14, 20
+    14dc:	1491      	pop      	r4, r15
+    14de:	38df      	btsti      	r0, 31
+    14e0:	0812      	bt      	0x1504	// 1504 <__floatsidf+0x44>
+    14e2:	6d03      	mov      	r4, r0
+    14e4:	6c13      	mov      	r0, r4
+    14e6:	e00000a9 	bsr      	0x1638	// 1638 <__clzsi2>
+    14ea:	321d      	movi      	r2, 29
+    14ec:	6080      	addu      	r2, r0
+    14ee:	2802      	subi      	r0, 3
+    14f0:	38df      	btsti      	r0, 31
+    14f2:	0810      	bt      	0x1512	// 1512 <__floatsidf+0x52>
+    14f4:	7100      	lsl      	r4, r0
+    14f6:	3300      	movi      	r3, 0
+    14f8:	b884      	st.w      	r4, (r14, 0x10)
+    14fa:	b863      	st.w      	r3, (r14, 0xc)
+    14fc:	333c      	movi      	r3, 60
+    14fe:	60ca      	subu      	r3, r2
+    1500:	b862      	st.w      	r3, (r14, 0x8)
+    1502:	07e9      	br      	0x14d4	// 14d4 <__floatsidf+0x14>
+    1504:	3380      	movi      	r3, 128
+    1506:	4378      	lsli      	r3, r3, 24
+    1508:	64c2      	cmpne      	r0, r3
+    150a:	0c0d      	bf      	0x1524	// 1524 <__floatsidf+0x64>
+    150c:	3400      	movi      	r4, 0
+    150e:	6102      	subu      	r4, r0
+    1510:	07ea      	br      	0x14e4	// 14e4 <__floatsidf+0x24>
+    1512:	311f      	movi      	r1, 31
+    1514:	4c61      	lsri      	r3, r4, 1
+    1516:	604a      	subu      	r1, r2
+    1518:	6c13      	mov      	r0, r4
+    151a:	70c5      	lsr      	r3, r1
+    151c:	7008      	lsl      	r0, r2
+    151e:	b864      	st.w      	r3, (r14, 0x10)
+    1520:	b803      	st.w      	r0, (r14, 0xc)
+    1522:	07ed      	br      	0x14fc	// 14fc <__floatsidf+0x3c>
+    1524:	3000      	movi      	r0, 0
+    1526:	1022      	lrw      	r1, 0xc1e00000	// 152c <__floatsidf+0x6c>
+    1528:	07d9      	br      	0x14da	// 14da <__floatsidf+0x1a>
+    152a:	0000      	bkpt
+    152c:	c1e00000 	.long	0xc1e00000
+
+00001530 <__fixdfsi>:
+    1530:	14d0      	push      	r15
+    1532:	1427      	subi      	r14, r14, 28
+    1534:	b800      	st.w      	r0, (r14, 0x0)
+    1536:	b821      	st.w      	r1, (r14, 0x4)
+    1538:	6c3b      	mov      	r0, r14
+    153a:	1902      	addi      	r1, r14, 8
+    153c:	e000016c 	bsr      	0x1814	// 1814 <__unpack_d>
+    1540:	9862      	ld.w      	r3, (r14, 0x8)
+    1542:	3b02      	cmphsi      	r3, 3
+    1544:	0c20      	bf      	0x1584	// 1584 <__fixdfsi+0x54>
+    1546:	3b44      	cmpnei      	r3, 4
+    1548:	0c16      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    154a:	9864      	ld.w      	r3, (r14, 0x10)
+    154c:	3bdf      	btsti      	r3, 31
+    154e:	081b      	bt      	0x1584	// 1584 <__fixdfsi+0x54>
+    1550:	3b3e      	cmplti      	r3, 31
+    1552:	0c11      	bf      	0x1574	// 1574 <__fixdfsi+0x44>
+    1554:	323c      	movi      	r2, 60
+    1556:	5a6d      	subu      	r3, r2, r3
+    1558:	3200      	movi      	r2, 0
+    155a:	2a1f      	subi      	r2, 32
+    155c:	608c      	addu      	r2, r3
+    155e:	3adf      	btsti      	r2, 31
+    1560:	0815      	bt      	0x158a	// 158a <__fixdfsi+0x5a>
+    1562:	9806      	ld.w      	r0, (r14, 0x18)
+    1564:	7009      	lsr      	r0, r2
+    1566:	9863      	ld.w      	r3, (r14, 0xc)
+    1568:	3b40      	cmpnei      	r3, 0
+    156a:	0c0b      	bf      	0x1580	// 1580 <__fixdfsi+0x50>
+    156c:	3300      	movi      	r3, 0
+    156e:	5b01      	subu      	r0, r3, r0
+    1570:	1407      	addi      	r14, r14, 28
+    1572:	1490      	pop      	r15
+    1574:	9863      	ld.w      	r3, (r14, 0xc)
+    1576:	3b40      	cmpnei      	r3, 0
+    1578:	3000      	movi      	r0, 0
+    157a:	6001      	addc      	r0, r0
+    157c:	1068      	lrw      	r3, 0x7fffffff	// 159c <__fixdfsi+0x6c>
+    157e:	600c      	addu      	r0, r3
+    1580:	1407      	addi      	r14, r14, 28
+    1582:	1490      	pop      	r15
+    1584:	3000      	movi      	r0, 0
+    1586:	1407      	addi      	r14, r14, 28
+    1588:	1490      	pop      	r15
+    158a:	9846      	ld.w      	r2, (r14, 0x18)
+    158c:	311f      	movi      	r1, 31
+    158e:	4241      	lsli      	r2, r2, 1
+    1590:	604e      	subu      	r1, r3
+    1592:	9805      	ld.w      	r0, (r14, 0x14)
+    1594:	7084      	lsl      	r2, r1
+    1596:	700d      	lsr      	r0, r3
+    1598:	6c08      	or      	r0, r2
+    159a:	07e6      	br      	0x1566	// 1566 <__fixdfsi+0x36>
+    159c:	7fffffff 	.long	0x7fffffff
+
+000015a0 <__floatunsidf>:
+    15a0:	14d2      	push      	r4-r5, r15
+    15a2:	1425      	subi      	r14, r14, 20
+    15a4:	3840      	cmpnei      	r0, 0
+    15a6:	3500      	movi      	r5, 0
+    15a8:	6d03      	mov      	r4, r0
+    15aa:	b8a1      	st.w      	r5, (r14, 0x4)
+    15ac:	0c15      	bf      	0x15d6	// 15d6 <__floatunsidf+0x36>
+    15ae:	3303      	movi      	r3, 3
+    15b0:	b860      	st.w      	r3, (r14, 0x0)
+    15b2:	e0000043 	bsr      	0x1638	// 1638 <__clzsi2>
+    15b6:	321d      	movi      	r2, 29
+    15b8:	6080      	addu      	r2, r0
+    15ba:	2802      	subi      	r0, 3
+    15bc:	38df      	btsti      	r0, 31
+    15be:	0813      	bt      	0x15e4	// 15e4 <__floatunsidf+0x44>
+    15c0:	7100      	lsl      	r4, r0
+    15c2:	b884      	st.w      	r4, (r14, 0x10)
+    15c4:	b8a3      	st.w      	r5, (r14, 0xc)
+    15c6:	333c      	movi      	r3, 60
+    15c8:	60ca      	subu      	r3, r2
+    15ca:	6c3b      	mov      	r0, r14
+    15cc:	b862      	st.w      	r3, (r14, 0x8)
+    15ce:	e0000055 	bsr      	0x1678	// 1678 <__pack_d>
+    15d2:	1405      	addi      	r14, r14, 20
+    15d4:	1492      	pop      	r4-r5, r15
+    15d6:	3302      	movi      	r3, 2
+    15d8:	6c3b      	mov      	r0, r14
+    15da:	b860      	st.w      	r3, (r14, 0x0)
+    15dc:	e000004e 	bsr      	0x1678	// 1678 <__pack_d>
+    15e0:	1405      	addi      	r14, r14, 20
+    15e2:	1492      	pop      	r4-r5, r15
+    15e4:	311f      	movi      	r1, 31
+    15e6:	4c61      	lsri      	r3, r4, 1
+    15e8:	604a      	subu      	r1, r2
+    15ea:	70c5      	lsr      	r3, r1
+    15ec:	7108      	lsl      	r4, r2
+    15ee:	b864      	st.w      	r3, (r14, 0x10)
+    15f0:	b883      	st.w      	r4, (r14, 0xc)
+    15f2:	07ea      	br      	0x15c6	// 15c6 <__floatunsidf+0x26>
+
+000015f4 <__muldi3>:
+    15f4:	14c4      	push      	r4-r7
+    15f6:	1421      	subi      	r14, r14, 4
+    15f8:	7501      	zexth      	r4, r0
+    15fa:	48b0      	lsri      	r5, r0, 16
+    15fc:	75c9      	zexth      	r7, r2
+    15fe:	6d83      	mov      	r6, r0
+    1600:	b820      	st.w      	r1, (r14, 0x0)
+    1602:	6c13      	mov      	r0, r4
+    1604:	4a30      	lsri      	r1, r2, 16
+    1606:	7c1c      	mult      	r0, r7
+    1608:	7d04      	mult      	r4, r1
+    160a:	7dd4      	mult      	r7, r5
+    160c:	611c      	addu      	r4, r7
+    160e:	7d44      	mult      	r5, r1
+    1610:	4830      	lsri      	r1, r0, 16
+    1612:	6104      	addu      	r4, r1
+    1614:	65d0      	cmphs      	r4, r7
+    1616:	0804      	bt      	0x161e	// 161e <__muldi3+0x2a>
+    1618:	3180      	movi      	r1, 128
+    161a:	4129      	lsli      	r1, r1, 9
+    161c:	6144      	addu      	r5, r1
+    161e:	4c30      	lsri      	r1, r4, 16
+    1620:	7cd8      	mult      	r3, r6
+    1622:	6144      	addu      	r5, r1
+    1624:	6c4f      	mov      	r1, r3
+    1626:	9860      	ld.w      	r3, (r14, 0x0)
+    1628:	7cc8      	mult      	r3, r2
+    162a:	4490      	lsli      	r4, r4, 16
+    162c:	604c      	addu      	r1, r3
+    162e:	7401      	zexth      	r0, r0
+    1630:	6010      	addu      	r0, r4
+    1632:	6054      	addu      	r1, r5
+    1634:	1401      	addi      	r14, r14, 4
+    1636:	1484      	pop      	r4-r7
+
+00001638 <__clzsi2>:
+    1638:	106d      	lrw      	r3, 0xffff	// 166c <__clzsi2+0x34>
+    163a:	640c      	cmphs      	r3, r0
+    163c:	0c07      	bf      	0x164a	// 164a <__clzsi2+0x12>
+    163e:	33ff      	movi      	r3, 255
+    1640:	640c      	cmphs      	r3, r0
+    1642:	0c0f      	bf      	0x1660	// 1660 <__clzsi2+0x28>
+    1644:	3320      	movi      	r3, 32
+    1646:	3200      	movi      	r2, 0
+    1648:	0406      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    164a:	106a      	lrw      	r3, 0xffffff	// 1670 <__clzsi2+0x38>
+    164c:	640c      	cmphs      	r3, r0
+    164e:	080c      	bt      	0x1666	// 1666 <__clzsi2+0x2e>
+    1650:	3308      	movi      	r3, 8
+    1652:	3218      	movi      	r2, 24
+    1654:	7009      	lsr      	r0, r2
+    1656:	1048      	lrw      	r2, 0x43a4	// 1674 <__clzsi2+0x3c>
+    1658:	6008      	addu      	r0, r2
+    165a:	8040      	ld.b      	r2, (r0, 0x0)
+    165c:	5b09      	subu      	r0, r3, r2
+    165e:	783c      	jmp      	r15
+    1660:	3318      	movi      	r3, 24
+    1662:	3208      	movi      	r2, 8
+    1664:	07f8      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    1666:	3310      	movi      	r3, 16
+    1668:	3210      	movi      	r2, 16
+    166a:	07f5      	br      	0x1654	// 1654 <__clzsi2+0x1c>
+    166c:	0000ffff 	.long	0x0000ffff
+    1670:	00ffffff 	.long	0x00ffffff
+    1674:	000043a4 	.long	0x000043a4
+
+00001678 <__pack_d>:
+    1678:	14c4      	push      	r4-r7
+    167a:	1422      	subi      	r14, r14, 8
+    167c:	9060      	ld.w      	r3, (r0, 0x0)
+    167e:	3b01      	cmphsi      	r3, 2
+    1680:	90c3      	ld.w      	r6, (r0, 0xc)
+    1682:	90e4      	ld.w      	r7, (r0, 0x10)
+    1684:	9021      	ld.w      	r1, (r0, 0x4)
+    1686:	0c46      	bf      	0x1712	// 1712 <__pack_d+0x9a>
+    1688:	3b44      	cmpnei      	r3, 4
+    168a:	0c40      	bf      	0x170a	// 170a <__pack_d+0x92>
+    168c:	3b42      	cmpnei      	r3, 2
+    168e:	0c27      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1690:	6cdb      	mov      	r3, r6
+    1692:	6cdc      	or      	r3, r7
+    1694:	3b40      	cmpnei      	r3, 0
+    1696:	0c23      	bf      	0x16dc	// 16dc <__pack_d+0x64>
+    1698:	9062      	ld.w      	r3, (r0, 0x8)
+    169a:	125a      	lrw      	r2, 0xfffffc02	// 1800 <__pack_d+0x188>
+    169c:	648d      	cmplt      	r3, r2
+    169e:	0855      	bt      	0x1748	// 1748 <__pack_d+0xd0>
+    16a0:	1259      	lrw      	r2, 0x3ff	// 1804 <__pack_d+0x18c>
+    16a2:	64c9      	cmplt      	r2, r3
+    16a4:	0833      	bt      	0x170a	// 170a <__pack_d+0x92>
+    16a6:	34ff      	movi      	r4, 255
+    16a8:	3500      	movi      	r5, 0
+    16aa:	6918      	and      	r4, r6
+    16ac:	695c      	and      	r5, r7
+    16ae:	3280      	movi      	r2, 128
+    16b0:	6492      	cmpne      	r4, r2
+    16b2:	0c3f      	bf      	0x1730	// 1730 <__pack_d+0xb8>
+    16b4:	347f      	movi      	r4, 127
+    16b6:	3500      	movi      	r5, 0
+    16b8:	6599      	cmplt      	r6, r6
+    16ba:	6191      	addc      	r6, r4
+    16bc:	61d5      	addc      	r7, r5
+    16be:	1253      	lrw      	r2, 0x1fffffff	// 1808 <__pack_d+0x190>
+    16c0:	65c8      	cmphs      	r2, r7
+    16c2:	0c1a      	bf      	0x16f6	// 16f6 <__pack_d+0x7e>
+    16c4:	1290      	lrw      	r4, 0x3ff	// 1804 <__pack_d+0x18c>
+    16c6:	610c      	addu      	r4, r3
+    16c8:	4718      	lsli      	r0, r7, 24
+    16ca:	4f68      	lsri      	r3, r7, 8
+    16cc:	4e48      	lsri      	r2, r6, 8
+    16ce:	6c80      	or      	r2, r0
+    16d0:	430c      	lsli      	r0, r3, 12
+    16d2:	486c      	lsri      	r3, r0, 12
+    16d4:	120e      	lrw      	r0, 0x7ff	// 180c <__pack_d+0x194>
+    16d6:	6d4b      	mov      	r5, r2
+    16d8:	6900      	and      	r4, r0
+    16da:	0404      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    16dc:	3400      	movi      	r4, 0
+    16de:	3200      	movi      	r2, 0
+    16e0:	3300      	movi      	r3, 0
+    16e2:	430c      	lsli      	r0, r3, 12
+    16e4:	480c      	lsri      	r0, r0, 12
+    16e6:	4474      	lsli      	r3, r4, 20
+    16e8:	419f      	lsli      	r4, r1, 31
+    16ea:	6c43      	mov      	r1, r0
+    16ec:	6c4c      	or      	r1, r3
+    16ee:	6c50      	or      	r1, r4
+    16f0:	6c0b      	mov      	r0, r2
+    16f2:	1402      	addi      	r14, r14, 8
+    16f4:	1484      	pop      	r4-r7
+    16f6:	479f      	lsli      	r4, r7, 31
+    16f8:	4e01      	lsri      	r0, r6, 1
+    16fa:	6d00      	or      	r4, r0
+    16fc:	6d93      	mov      	r6, r4
+    16fe:	3480      	movi      	r4, 128
+    1700:	4f41      	lsri      	r2, r7, 1
+    1702:	4483      	lsli      	r4, r4, 3
+    1704:	6dcb      	mov      	r7, r2
+    1706:	610c      	addu      	r4, r3
+    1708:	07e0      	br      	0x16c8	// 16c8 <__pack_d+0x50>
+    170a:	1281      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    170c:	3200      	movi      	r2, 0
+    170e:	3300      	movi      	r3, 0
+    1710:	07e9      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1712:	4e08      	lsri      	r0, r6, 8
+    1714:	4798      	lsli      	r4, r7, 24
+    1716:	6d00      	or      	r4, r0
+    1718:	3580      	movi      	r5, 128
+    171a:	4705      	lsli      	r0, r7, 5
+    171c:	6c93      	mov      	r2, r4
+    171e:	486d      	lsri      	r3, r0, 13
+    1720:	3400      	movi      	r4, 0
+    1722:	45ac      	lsli      	r5, r5, 12
+    1724:	6c90      	or      	r2, r4
+    1726:	6cd4      	or      	r3, r5
+    1728:	430c      	lsli      	r0, r3, 12
+    172a:	486c      	lsri      	r3, r0, 12
+    172c:	1198      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    172e:	07da      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    1730:	3d40      	cmpnei      	r5, 0
+    1732:	0bc1      	bt      	0x16b4	// 16b4 <__pack_d+0x3c>
+    1734:	4241      	lsli      	r2, r2, 1
+    1736:	6898      	and      	r2, r6
+    1738:	3a40      	cmpnei      	r2, 0
+    173a:	0fc2      	bf      	0x16be	// 16be <__pack_d+0x46>
+    173c:	3480      	movi      	r4, 128
+    173e:	3500      	movi      	r5, 0
+    1740:	6599      	cmplt      	r6, r6
+    1742:	6191      	addc      	r6, r4
+    1744:	61d5      	addc      	r7, r5
+    1746:	07bc      	br      	0x16be	// 16be <__pack_d+0x46>
+    1748:	5a6d      	subu      	r3, r2, r3
+    174a:	3238      	movi      	r2, 56
+    174c:	64c9      	cmplt      	r2, r3
+    174e:	0bc7      	bt      	0x16dc	// 16dc <__pack_d+0x64>
+    1750:	3200      	movi      	r2, 0
+    1752:	2a1f      	subi      	r2, 32
+    1754:	608c      	addu      	r2, r3
+    1756:	3adf      	btsti      	r2, 31
+    1758:	0848      	bt      	0x17e8	// 17e8 <__pack_d+0x170>
+    175a:	6c1f      	mov      	r0, r7
+    175c:	7009      	lsr      	r0, r2
+    175e:	b800      	st.w      	r0, (r14, 0x0)
+    1760:	3000      	movi      	r0, 0
+    1762:	b801      	st.w      	r0, (r14, 0x4)
+    1764:	3adf      	btsti      	r2, 31
+    1766:	083c      	bt      	0x17de	// 17de <__pack_d+0x166>
+    1768:	3301      	movi      	r3, 1
+    176a:	70c8      	lsl      	r3, r2
+    176c:	6d4f      	mov      	r5, r3
+    176e:	3300      	movi      	r3, 0
+    1770:	6d0f      	mov      	r4, r3
+    1772:	3200      	movi      	r2, 0
+    1774:	3300      	movi      	r3, 0
+    1776:	2a00      	subi      	r2, 1
+    1778:	2b00      	subi      	r3, 1
+    177a:	6511      	cmplt      	r4, r4
+    177c:	6109      	addc      	r4, r2
+    177e:	614d      	addc      	r5, r3
+    1780:	6990      	and      	r6, r4
+    1782:	69d4      	and      	r7, r5
+    1784:	6d9c      	or      	r6, r7
+    1786:	3e40      	cmpnei      	r6, 0
+    1788:	3000      	movi      	r0, 0
+    178a:	6001      	addc      	r0, r0
+    178c:	6c83      	mov      	r2, r0
+    178e:	3300      	movi      	r3, 0
+    1790:	9880      	ld.w      	r4, (r14, 0x0)
+    1792:	98a1      	ld.w      	r5, (r14, 0x4)
+    1794:	6d08      	or      	r4, r2
+    1796:	6d4c      	or      	r5, r3
+    1798:	32ff      	movi      	r2, 255
+    179a:	3300      	movi      	r3, 0
+    179c:	6890      	and      	r2, r4
+    179e:	68d4      	and      	r3, r5
+    17a0:	3080      	movi      	r0, 128
+    17a2:	640a      	cmpne      	r2, r0
+    17a4:	081b      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17a6:	3b40      	cmpnei      	r3, 0
+    17a8:	0819      	bt      	0x17da	// 17da <__pack_d+0x162>
+    17aa:	3380      	movi      	r3, 128
+    17ac:	4361      	lsli      	r3, r3, 1
+    17ae:	68d0      	and      	r3, r4
+    17b0:	3b40      	cmpnei      	r3, 0
+    17b2:	0c06      	bf      	0x17be	// 17be <__pack_d+0x146>
+    17b4:	3280      	movi      	r2, 128
+    17b6:	3300      	movi      	r3, 0
+    17b8:	6511      	cmplt      	r4, r4
+    17ba:	6109      	addc      	r4, r2
+    17bc:	614d      	addc      	r5, r3
+    17be:	4518      	lsli      	r0, r5, 24
+    17c0:	4c48      	lsri      	r2, r4, 8
+    17c2:	4d68      	lsri      	r3, r5, 8
+    17c4:	1093      	lrw      	r4, 0xfffffff	// 1810 <__pack_d+0x198>
+    17c6:	6c80      	or      	r2, r0
+    17c8:	6550      	cmphs      	r4, r5
+    17ca:	430c      	lsli      	r0, r3, 12
+    17cc:	486c      	lsri      	r3, r0, 12
+    17ce:	3001      	movi      	r0, 1
+    17d0:	0c02      	bf      	0x17d4	// 17d4 <__pack_d+0x15c>
+    17d2:	3000      	movi      	r0, 0
+    17d4:	108e      	lrw      	r4, 0x7ff	// 180c <__pack_d+0x194>
+    17d6:	6900      	and      	r4, r0
+    17d8:	0785      	br      	0x16e2	// 16e2 <__pack_d+0x6a>
+    17da:	327f      	movi      	r2, 127
+    17dc:	07ed      	br      	0x17b6	// 17b6 <__pack_d+0x13e>
+    17de:	3201      	movi      	r2, 1
+    17e0:	708c      	lsl      	r2, r3
+    17e2:	3500      	movi      	r5, 0
+    17e4:	6d0b      	mov      	r4, r2
+    17e6:	07c6      	br      	0x1772	// 1772 <__pack_d+0xfa>
+    17e8:	341f      	movi      	r4, 31
+    17ea:	610e      	subu      	r4, r3
+    17ec:	4701      	lsli      	r0, r7, 1
+    17ee:	7010      	lsl      	r0, r4
+    17f0:	6d1b      	mov      	r4, r6
+    17f2:	710d      	lsr      	r4, r3
+    17f4:	6d00      	or      	r4, r0
+    17f6:	6c1f      	mov      	r0, r7
+    17f8:	700d      	lsr      	r0, r3
+    17fa:	b880      	st.w      	r4, (r14, 0x0)
+    17fc:	b801      	st.w      	r0, (r14, 0x4)
+    17fe:	07b3      	br      	0x1764	// 1764 <__pack_d+0xec>
+    1800:	fffffc02 	.long	0xfffffc02
+    1804:	000003ff 	.long	0x000003ff
+    1808:	1fffffff 	.long	0x1fffffff
+    180c:	000007ff 	.long	0x000007ff
+    1810:	0fffffff 	.long	0x0fffffff
+
+00001814 <__unpack_d>:
+    1814:	1423      	subi      	r14, r14, 12
+    1816:	b880      	st.w      	r4, (r14, 0x0)
+    1818:	b8c1      	st.w      	r6, (r14, 0x4)
+    181a:	b8e2      	st.w      	r7, (r14, 0x8)
+    181c:	8843      	ld.h      	r2, (r0, 0x6)
+    181e:	4251      	lsli      	r2, r2, 17
+    1820:	9061      	ld.w      	r3, (r0, 0x4)
+    1822:	9080      	ld.w      	r4, (r0, 0x0)
+    1824:	4a55      	lsri      	r2, r2, 21
+    1826:	8007      	ld.b      	r0, (r0, 0x7)
+    1828:	436c      	lsli      	r3, r3, 12
+    182a:	4807      	lsri      	r0, r0, 7
+    182c:	3a40      	cmpnei      	r2, 0
+    182e:	4b6c      	lsri      	r3, r3, 12
+    1830:	b101      	st.w      	r0, (r1, 0x4)
+    1832:	0819      	bt      	0x1864	// 1864 <__unpack_d+0x50>
+    1834:	6c93      	mov      	r2, r4
+    1836:	6c8c      	or      	r2, r3
+    1838:	3a40      	cmpnei      	r2, 0
+    183a:	0c2d      	bf      	0x1894	// 1894 <__unpack_d+0x80>
+    183c:	4c58      	lsri      	r2, r4, 24
+    183e:	4368      	lsli      	r3, r3, 8
+    1840:	6cc8      	or      	r3, r2
+    1842:	3203      	movi      	r2, 3
+    1844:	4408      	lsli      	r0, r4, 8
+    1846:	b140      	st.w      	r2, (r1, 0x0)
+    1848:	1181      	lrw      	r4, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    184a:	11c2      	lrw      	r6, 0xfffffff	// 18d0 <__unpack_d+0xbc>
+    184c:	485f      	lsri      	r2, r0, 31
+    184e:	4361      	lsli      	r3, r3, 1
+    1850:	6cc8      	or      	r3, r2
+    1852:	64d8      	cmphs      	r6, r3
+    1854:	6c93      	mov      	r2, r4
+    1856:	4001      	lsli      	r0, r0, 1
+    1858:	2c00      	subi      	r4, 1
+    185a:	0bf9      	bt      	0x184c	// 184c <__unpack_d+0x38>
+    185c:	b142      	st.w      	r2, (r1, 0x8)
+    185e:	b103      	st.w      	r0, (r1, 0xc)
+    1860:	b164      	st.w      	r3, (r1, 0x10)
+    1862:	0414      	br      	0x188a	// 188a <__unpack_d+0x76>
+    1864:	101c      	lrw      	r0, 0x7ff	// 18d4 <__unpack_d+0xc0>
+    1866:	640a      	cmpne      	r2, r0
+    1868:	0c19      	bf      	0x189a	// 189a <__unpack_d+0x86>
+    186a:	1019      	lrw      	r0, 0xfffffc01	// 18cc <__unpack_d+0xb8>
+    186c:	6080      	addu      	r2, r0
+    186e:	b142      	st.w      	r2, (r1, 0x8)
+    1870:	3203      	movi      	r2, 3
+    1872:	43e8      	lsli      	r7, r3, 8
+    1874:	b140      	st.w      	r2, (r1, 0x0)
+    1876:	3380      	movi      	r3, 128
+    1878:	4c58      	lsri      	r2, r4, 24
+    187a:	6dc8      	or      	r7, r2
+    187c:	44c8      	lsli      	r6, r4, 8
+    187e:	3200      	movi      	r2, 0
+    1880:	4375      	lsli      	r3, r3, 21
+    1882:	6d88      	or      	r6, r2
+    1884:	6dcc      	or      	r7, r3
+    1886:	b1c3      	st.w      	r6, (r1, 0xc)
+    1888:	b1e4      	st.w      	r7, (r1, 0x10)
+    188a:	98e2      	ld.w      	r7, (r14, 0x8)
+    188c:	98c1      	ld.w      	r6, (r14, 0x4)
+    188e:	9880      	ld.w      	r4, (r14, 0x0)
+    1890:	1403      	addi      	r14, r14, 12
+    1892:	783c      	jmp      	r15
+    1894:	3302      	movi      	r3, 2
+    1896:	b160      	st.w      	r3, (r1, 0x0)
+    1898:	07f9      	br      	0x188a	// 188a <__unpack_d+0x76>
+    189a:	6c93      	mov      	r2, r4
+    189c:	6c8c      	or      	r2, r3
+    189e:	3a40      	cmpnei      	r2, 0
+    18a0:	0c10      	bf      	0x18c0	// 18c0 <__unpack_d+0xac>
+    18a2:	3280      	movi      	r2, 128
+    18a4:	424c      	lsli      	r2, r2, 12
+    18a6:	688c      	and      	r2, r3
+    18a8:	3a40      	cmpnei      	r2, 0
+    18aa:	0c0e      	bf      	0x18c6	// 18c6 <__unpack_d+0xb2>
+    18ac:	3201      	movi      	r2, 1
+    18ae:	b140      	st.w      	r2, (r1, 0x0)
+    18b0:	4c58      	lsri      	r2, r4, 24
+    18b2:	4368      	lsli      	r3, r3, 8
+    18b4:	6cc8      	or      	r3, r2
+    18b6:	4408      	lsli      	r0, r4, 8
+    18b8:	3b9b      	bclri      	r3, 27
+    18ba:	b103      	st.w      	r0, (r1, 0xc)
+    18bc:	b164      	st.w      	r3, (r1, 0x10)
+    18be:	07e6      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c0:	3304      	movi      	r3, 4
+    18c2:	b160      	st.w      	r3, (r1, 0x0)
+    18c4:	07e3      	br      	0x188a	// 188a <__unpack_d+0x76>
+    18c6:	b140      	st.w      	r2, (r1, 0x0)
+    18c8:	07f4      	br      	0x18b0	// 18b0 <__unpack_d+0x9c>
+    18ca:	0000      	bkpt
+    18cc:	fffffc01 	.long	0xfffffc01
+    18d0:	0fffffff 	.long	0x0fffffff
+    18d4:	000007ff 	.long	0x000007ff
+
+000018d8 <__fpcmp_parts_d>:
+    18d8:	14c1      	push      	r4
+    18da:	9060      	ld.w      	r3, (r0, 0x0)
+    18dc:	3b01      	cmphsi      	r3, 2
+    18de:	0c12      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e0:	9140      	ld.w      	r2, (r1, 0x0)
+    18e2:	3a01      	cmphsi      	r2, 2
+    18e4:	0c0f      	bf      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    18e6:	3b44      	cmpnei      	r3, 4
+    18e8:	0c17      	bf      	0x1916	// 1916 <__fpcmp_parts_d+0x3e>
+    18ea:	3a44      	cmpnei      	r2, 4
+    18ec:	0c0f      	bf      	0x190a	// 190a <__fpcmp_parts_d+0x32>
+    18ee:	3b42      	cmpnei      	r3, 2
+    18f0:	0c0b      	bf      	0x1906	// 1906 <__fpcmp_parts_d+0x2e>
+    18f2:	3a42      	cmpnei      	r2, 2
+    18f4:	0c13      	bf      	0x191a	// 191a <__fpcmp_parts_d+0x42>
+    18f6:	9061      	ld.w      	r3, (r0, 0x4)
+    18f8:	9141      	ld.w      	r2, (r1, 0x4)
+    18fa:	648e      	cmpne      	r3, r2
+    18fc:	0c14      	bf      	0x1924	// 1924 <__fpcmp_parts_d+0x4c>
+    18fe:	3b40      	cmpnei      	r3, 0
+    1900:	0808      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1902:	3001      	movi      	r0, 1
+    1904:	1481      	pop      	r4
+    1906:	3a42      	cmpnei      	r2, 2
+    1908:	0c28      	bf      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    190a:	9161      	ld.w      	r3, (r1, 0x4)
+    190c:	3b40      	cmpnei      	r3, 0
+    190e:	0bfa      	bt      	0x1902	// 1902 <__fpcmp_parts_d+0x2a>
+    1910:	3000      	movi      	r0, 0
+    1912:	2800      	subi      	r0, 1
+    1914:	1481      	pop      	r4
+    1916:	3a44      	cmpnei      	r2, 4
+    1918:	0c22      	bf      	0x195c	// 195c <__fpcmp_parts_d+0x84>
+    191a:	9061      	ld.w      	r3, (r0, 0x4)
+    191c:	3b40      	cmpnei      	r3, 0
+    191e:	0bf9      	bt      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    1920:	3001      	movi      	r0, 1
+    1922:	07f1      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1924:	9082      	ld.w      	r4, (r0, 0x8)
+    1926:	9142      	ld.w      	r2, (r1, 0x8)
+    1928:	6509      	cmplt      	r2, r4
+    192a:	0bea      	bt      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    192c:	6491      	cmplt      	r4, r2
+    192e:	080d      	bt      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1930:	9044      	ld.w      	r2, (r0, 0x10)
+    1932:	9083      	ld.w      	r4, (r0, 0xc)
+    1934:	9103      	ld.w      	r0, (r1, 0xc)
+    1936:	9124      	ld.w      	r1, (r1, 0x10)
+    1938:	6484      	cmphs      	r1, r2
+    193a:	0fe2      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    193c:	644a      	cmpne      	r2, r1
+    193e:	0803      	bt      	0x1944	// 1944 <__fpcmp_parts_d+0x6c>
+    1940:	6500      	cmphs      	r0, r4
+    1942:	0fde      	bf      	0x18fe	// 18fe <__fpcmp_parts_d+0x26>
+    1944:	6448      	cmphs      	r2, r1
+    1946:	0805      	bt      	0x1950	// 1950 <__fpcmp_parts_d+0x78>
+    1948:	3b40      	cmpnei      	r3, 0
+    194a:	0fe3      	bf      	0x1910	// 1910 <__fpcmp_parts_d+0x38>
+    194c:	3001      	movi      	r0, 1
+    194e:	07db      	br      	0x1904	// 1904 <__fpcmp_parts_d+0x2c>
+    1950:	6486      	cmpne      	r1, r2
+    1952:	0803      	bt      	0x1958	// 1958 <__fpcmp_parts_d+0x80>
+    1954:	6410      	cmphs      	r4, r0
+    1956:	0ff9      	bf      	0x1948	// 1948 <__fpcmp_parts_d+0x70>
+    1958:	3000      	movi      	r0, 0
+    195a:	1481      	pop      	r4
+    195c:	9161      	ld.w      	r3, (r1, 0x4)
+    195e:	9041      	ld.w      	r2, (r0, 0x4)
+    1960:	5b09      	subu      	r0, r3, r2
+    1962:	1481      	pop      	r4
+
+00001964 <__memset_fast>:
+    1964:	14c3      	push      	r4-r6
+    1966:	7444      	zextb      	r1, r1
+    1968:	3a40      	cmpnei      	r2, 0
+    196a:	0c1f      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    196c:	6d43      	mov      	r5, r0
+    196e:	6d03      	mov      	r4, r0
+    1970:	3603      	movi      	r6, 3
+    1972:	6918      	and      	r4, r6
+    1974:	3c40      	cmpnei      	r4, 0
+    1976:	0c1a      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    1978:	a520      	st.b      	r1, (r5, 0x0)
+    197a:	2a00      	subi      	r2, 1
+    197c:	3a40      	cmpnei      	r2, 0
+    197e:	0c15      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1980:	2500      	addi      	r5, 1
+    1982:	6d17      	mov      	r4, r5
+    1984:	3603      	movi      	r6, 3
+    1986:	6918      	and      	r4, r6
+    1988:	3c40      	cmpnei      	r4, 0
+    198a:	0c10      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    198c:	a520      	st.b      	r1, (r5, 0x0)
+    198e:	2a00      	subi      	r2, 1
+    1990:	3a40      	cmpnei      	r2, 0
+    1992:	0c0b      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    1994:	2500      	addi      	r5, 1
+    1996:	6d17      	mov      	r4, r5
+    1998:	3603      	movi      	r6, 3
+    199a:	6918      	and      	r4, r6
+    199c:	3c40      	cmpnei      	r4, 0
+    199e:	0c06      	bf      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a0:	a520      	st.b      	r1, (r5, 0x0)
+    19a2:	2a00      	subi      	r2, 1
+    19a4:	2500      	addi      	r5, 1
+    19a6:	0402      	br      	0x19aa	// 19aa <__memset_fast+0x46>
+    19a8:	1483      	pop      	r4-r6
+    19aa:	4168      	lsli      	r3, r1, 8
+    19ac:	6c4c      	or      	r1, r3
+    19ae:	4170      	lsli      	r3, r1, 16
+    19b0:	6c4c      	or      	r1, r3
+    19b2:	3a2f      	cmplti      	r2, 16
+    19b4:	0809      	bt      	0x19c6	// 19c6 <__memset_fast+0x62>
+    19b6:	b520      	st.w      	r1, (r5, 0x0)
+    19b8:	b521      	st.w      	r1, (r5, 0x4)
+    19ba:	b522      	st.w      	r1, (r5, 0x8)
+    19bc:	b523      	st.w      	r1, (r5, 0xc)
+    19be:	2a0f      	subi      	r2, 16
+    19c0:	250f      	addi      	r5, 16
+    19c2:	3a2f      	cmplti      	r2, 16
+    19c4:	0ff9      	bf      	0x19b6	// 19b6 <__memset_fast+0x52>
+    19c6:	3a23      	cmplti      	r2, 4
+    19c8:	0806      	bt      	0x19d4	// 19d4 <__memset_fast+0x70>
+    19ca:	2a03      	subi      	r2, 4
+    19cc:	b520      	st.w      	r1, (r5, 0x0)
+    19ce:	2503      	addi      	r5, 4
+    19d0:	3a23      	cmplti      	r2, 4
+    19d2:	0ffc      	bf      	0x19ca	// 19ca <__memset_fast+0x66>
+    19d4:	3a40      	cmpnei      	r2, 0
+    19d6:	0fe9      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19d8:	2a00      	subi      	r2, 1
+    19da:	a520      	st.b      	r1, (r5, 0x0)
+    19dc:	3a40      	cmpnei      	r2, 0
+    19de:	0fe5      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e0:	2a00      	subi      	r2, 1
+    19e2:	a521      	st.b      	r1, (r5, 0x1)
+    19e4:	3a40      	cmpnei      	r2, 0
+    19e6:	0fe1      	bf      	0x19a8	// 19a8 <__memset_fast+0x44>
+    19e8:	a522      	st.b      	r1, (r5, 0x2)
+    19ea:	1483      	pop      	r4-r6
+
+000019ec <__memcpy_fast>:
+    19ec:	14c3      	push      	r4-r6
+    19ee:	6d83      	mov      	r6, r0
+    19f0:	6d07      	mov      	r4, r1
+    19f2:	6d18      	or      	r4, r6
+    19f4:	3303      	movi      	r3, 3
+    19f6:	690c      	and      	r4, r3
+    19f8:	3c40      	cmpnei      	r4, 0
+    19fa:	0c0b      	bf      	0x1a10	// 1a10 <__memcpy_fast+0x24>
+    19fc:	3a40      	cmpnei      	r2, 0
+    19fe:	0c08      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a00:	8160      	ld.b      	r3, (r1, 0x0)
+    1a02:	2100      	addi      	r1, 1
+    1a04:	2a00      	subi      	r2, 1
+    1a06:	a660      	st.b      	r3, (r6, 0x0)
+    1a08:	2600      	addi      	r6, 1
+    1a0a:	3a40      	cmpnei      	r2, 0
+    1a0c:	0bfa      	bt      	0x1a00	// 1a00 <__memcpy_fast+0x14>
+    1a0e:	1483      	pop      	r4-r6
+    1a10:	3a2f      	cmplti      	r2, 16
+    1a12:	080e      	bt      	0x1a2e	// 1a2e <__memcpy_fast+0x42>
+    1a14:	91a0      	ld.w      	r5, (r1, 0x0)
+    1a16:	9161      	ld.w      	r3, (r1, 0x4)
+    1a18:	9182      	ld.w      	r4, (r1, 0x8)
+    1a1a:	b6a0      	st.w      	r5, (r6, 0x0)
+    1a1c:	91a3      	ld.w      	r5, (r1, 0xc)
+    1a1e:	b661      	st.w      	r3, (r6, 0x4)
+    1a20:	b682      	st.w      	r4, (r6, 0x8)
+    1a22:	b6a3      	st.w      	r5, (r6, 0xc)
+    1a24:	2a0f      	subi      	r2, 16
+    1a26:	210f      	addi      	r1, 16
+    1a28:	260f      	addi      	r6, 16
+    1a2a:	3a2f      	cmplti      	r2, 16
+    1a2c:	0ff4      	bf      	0x1a14	// 1a14 <__memcpy_fast+0x28>
+    1a2e:	3a23      	cmplti      	r2, 4
+    1a30:	0808      	bt      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+    1a32:	9160      	ld.w      	r3, (r1, 0x0)
+    1a34:	2a03      	subi      	r2, 4
+    1a36:	2103      	addi      	r1, 4
+    1a38:	b660      	st.w      	r3, (r6, 0x0)
+    1a3a:	2603      	addi      	r6, 4
+    1a3c:	3a23      	cmplti      	r2, 4
+    1a3e:	0ffa      	bf      	0x1a32	// 1a32 <__memcpy_fast+0x46>
+    1a40:	3a40      	cmpnei      	r2, 0
+    1a42:	0fe6      	bf      	0x1a0e	// 1a0e <__memcpy_fast+0x22>
+    1a44:	8160      	ld.b      	r3, (r1, 0x0)
+    1a46:	2100      	addi      	r1, 1
+    1a48:	2a00      	subi      	r2, 1
+    1a4a:	a660      	st.b      	r3, (r6, 0x0)
+    1a4c:	2600      	addi      	r6, 1
+    1a4e:	07f9      	br      	0x1a40	// 1a40 <__memcpy_fast+0x54>
+
+Disassembly of section .text.__main:
+
+00001a50 <__main>:
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+    1a50:	14d0      	push      	r15
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+    1a52:	1009      	lrw      	r0, 0x20000000	// 1a74 <__main+0x24>
+    1a54:	1029      	lrw      	r1, 0x4560	// 1a78 <__main+0x28>
+    1a56:	6442      	cmpne      	r0, r1
+    1a58:	0c05      	bf      	0x1a62	// 1a62 <__main+0x12>
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+    1a5a:	1049      	lrw      	r2, 0x2000009c	// 1a7c <__main+0x2c>
+    1a5c:	6082      	subu      	r2, r0
+    1a5e:	e3ffffc7 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+    1a62:	1048      	lrw      	r2, 0x20000648	// 1a80 <__main+0x30>
+    1a64:	1008      	lrw      	r0, 0x2000009c	// 1a84 <__main+0x34>
+    1a66:	640a      	cmpne      	r2, r0
+    1a68:	0c05      	bf      	0x1a72	// 1a72 <__main+0x22>
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+    1a6a:	6082      	subu      	r2, r0
+    1a6c:	3100      	movi      	r1, 0
+    1a6e:	e3ffff7b 	bsr      	0x1964	// 1964 <__memset_fast>
+  }
+
+	
+}
+    1a72:	1490      	pop      	r15
+    1a74:	20000000 	.long	0x20000000
+    1a78:	00004560 	.long	0x00004560
+    1a7c:	2000009c 	.long	0x2000009c
+    1a80:	20000648 	.long	0x20000648
+    1a84:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.SYSCON_General_CMD.part.0:
+
+00001a88 <SYSCON_General_CMD.part.0>:
+/*************************************************************/  
+void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X )
+{
+	if (NewState != DISABLE)
+	{
+		if(ENDIS_X==ENDIS_EMOSC) 
+    1a88:	3848      	cmpnei      	r0, 8
+    1a8a:	080a      	bt      	0x1a9e	// 1a9e <SYSCON_General_CMD.part.0+0x16>
+		GPIOA0->CONLR=(GPIOA0->CONLR & 0XFFF00FFF)|0x00044000;					//enable EMOSC PIN
+    1a8c:	107a      	lrw      	r3, 0x2000004c	// 1af4 <SYSCON_General_CMD.part.0+0x6c>
+    1a8e:	32ff      	movi      	r2, 255
+    1a90:	9320      	ld.w      	r1, (r3, 0x0)
+    1a92:	9160      	ld.w      	r3, (r1, 0x0)
+    1a94:	424c      	lsli      	r2, r2, 12
+    1a96:	68c9      	andn      	r3, r2
+    1a98:	3bae      	bseti      	r3, 14
+    1a9a:	3bb2      	bseti      	r3, 18
+    1a9c:	b160      	st.w      	r3, (r1, 0x0)
+		SYSCON->GCER|=ENDIS_X;													//enable SYSCON General Control
+    1a9e:	1077      	lrw      	r3, 0x2000005c	// 1af8 <SYSCON_General_CMD.part.0+0x70>
+    1aa0:	9360      	ld.w      	r3, (r3, 0x0)
+    1aa2:	9341      	ld.w      	r2, (r3, 0x4)
+    1aa4:	6c80      	or      	r2, r0
+    1aa6:	b341      	st.w      	r2, (r3, 0x4)
+		while(!(SYSCON->GCSR&ENDIS_X));											//check  Enable?	
+    1aa8:	9343      	ld.w      	r2, (r3, 0xc)
+    1aaa:	6880      	and      	r2, r0
+    1aac:	3a40      	cmpnei      	r2, 0
+    1aae:	0ffd      	bf      	0x1aa8	// 1aa8 <SYSCON_General_CMD.part.0+0x20>
+		switch(ENDIS_X)
+    1ab0:	3842      	cmpnei      	r0, 2
+    1ab2:	0807      	bt      	0x1ac0	// 1ac0 <SYSCON_General_CMD.part.0+0x38>
+		{
+			case ENDIS_IMOSC:
+				while (!(SYSCON->CKST & ENDIS_IMOSC)); 	
+    1ab4:	3102      	movi      	r1, 2
+    1ab6:	9344      	ld.w      	r2, (r3, 0x10)
+    1ab8:	6884      	and      	r2, r1
+    1aba:	3a40      	cmpnei      	r2, 0
+    1abc:	0ffd      	bf      	0x1ab6	// 1ab6 <SYSCON_General_CMD.part.0+0x2e>
+	{
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+	}
+}
+    1abe:	783c      	jmp      	r15
+		switch(ENDIS_X)
+    1ac0:	3802      	cmphsi      	r0, 3
+    1ac2:	0809      	bt      	0x1ad4	// 1ad4 <SYSCON_General_CMD.part.0+0x4c>
+    1ac4:	3841      	cmpnei      	r0, 1
+    1ac6:	0bfc      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_ISOSC)); 
+    1ac8:	3101      	movi      	r1, 1
+    1aca:	9344      	ld.w      	r2, (r3, 0x10)
+    1acc:	6884      	and      	r2, r1
+    1ace:	3a40      	cmpnei      	r2, 0
+    1ad0:	0ffd      	bf      	0x1aca	// 1aca <SYSCON_General_CMD.part.0+0x42>
+    1ad2:	07f6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ad4:	3848      	cmpnei      	r0, 8
+    1ad6:	0807      	bt      	0x1ae4	// 1ae4 <SYSCON_General_CMD.part.0+0x5c>
+				while (!(SYSCON->CKST & ENDIS_EMOSC)); 
+    1ad8:	3108      	movi      	r1, 8
+    1ada:	9344      	ld.w      	r2, (r3, 0x10)
+    1adc:	6884      	and      	r2, r1
+    1ade:	3a40      	cmpnei      	r2, 0
+    1ae0:	0ffd      	bf      	0x1ada	// 1ada <SYSCON_General_CMD.part.0+0x52>
+    1ae2:	07ee      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+		switch(ENDIS_X)
+    1ae4:	3850      	cmpnei      	r0, 16
+    1ae6:	0bec      	bt      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+				while (!(SYSCON->CKST & ENDIS_HFOSC)); 
+    1ae8:	3110      	movi      	r1, 16
+    1aea:	9344      	ld.w      	r2, (r3, 0x10)
+    1aec:	6884      	and      	r2, r1
+    1aee:	3a40      	cmpnei      	r2, 0
+    1af0:	0ffd      	bf      	0x1aea	// 1aea <SYSCON_General_CMD.part.0+0x62>
+    1af2:	07e6      	br      	0x1abe	// 1abe <SYSCON_General_CMD.part.0+0x36>
+    1af4:	2000004c 	.long	0x2000004c
+    1af8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_RST_VALUE:
+
+00001afc <SYSCON_RST_VALUE>:
+	SYSCON->RAMCHK=SYSCON_RAMCHK_RST;
+    1afc:	106c      	lrw      	r3, 0x2000005c	// 1b2c <SYSCON_RST_VALUE+0x30>
+    1afe:	104d      	lrw      	r2, 0xffff	// 1b30 <SYSCON_RST_VALUE+0x34>
+    1b00:	9360      	ld.w      	r3, (r3, 0x0)
+    1b02:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EFLCHK=SYSCON_EFLCHK_RST;
+    1b04:	104c      	lrw      	r2, 0xffffff	// 1b34 <SYSCON_RST_VALUE+0x38>
+    1b06:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->SCLKCR=SYSCON_SCLKCR_RST;
+    1b08:	104c      	lrw      	r2, 0xd22d0000	// 1b38 <SYSCON_RST_VALUE+0x3c>
+    1b0a:	b347      	st.w      	r2, (r3, 0x1c)
+	SYSCON->OSTR=SYSCON_OSTR_RST;
+    1b0c:	104c      	lrw      	r2, 0x70ff3bff	// 1b3c <SYSCON_RST_VALUE+0x40>
+    1b0e:	b350      	st.w      	r2, (r3, 0x40)
+	SYSCON->LVDCR=SYSCON_LVDCR_RST;
+    1b10:	320a      	movi      	r2, 10
+    1b12:	b353      	st.w      	r2, (r3, 0x4c)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b14:	102b      	lrw      	r1, 0x70c	// 1b40 <SYSCON_RST_VALUE+0x44>
+	SYSCON->EXIRT=SYSCON_EXIRT_RST;
+    1b16:	237f      	addi      	r3, 128
+    1b18:	3200      	movi      	r2, 0
+    1b1a:	b345      	st.w      	r2, (r3, 0x14)
+	SYSCON->EXIFT=SYSCON_EXIFT_RST;
+    1b1c:	b346      	st.w      	r2, (r3, 0x18)
+	SYSCON->IWDCR=SYSCON_IWDCR_RST;
+    1b1e:	b32d      	st.w      	r1, (r3, 0x34)
+	SYSCON->IWDCNT=SYSCON_IWDCNT_RST;
+    1b20:	1029      	lrw      	r1, 0x3fe	// 1b44 <SYSCON_RST_VALUE+0x48>
+    1b22:	b32e      	st.w      	r1, (r3, 0x38)
+	SYSCON->EVTRG=SYSCON_EVTRG_RST;
+    1b24:	b35d      	st.w      	r2, (r3, 0x74)
+	SYSCON->EVPS=SYSCON_EVPS_RST;
+    1b26:	b35e      	st.w      	r2, (r3, 0x78)
+	SYSCON->EVSWF=SYSCON_EVSWF_RST;
+    1b28:	b35f      	st.w      	r2, (r3, 0x7c)
+}
+    1b2a:	783c      	jmp      	r15
+    1b2c:	2000005c 	.long	0x2000005c
+    1b30:	0000ffff 	.long	0x0000ffff
+    1b34:	00ffffff 	.long	0x00ffffff
+    1b38:	d22d0000 	.long	0xd22d0000
+    1b3c:	70ff3bff 	.long	0x70ff3bff
+    1b40:	0000070c 	.long	0x0000070c
+    1b44:	000003fe 	.long	0x000003fe
+
+Disassembly of section .text.SYSCON_General_CMD:
+
+00001b48 <SYSCON_General_CMD>:
+{
+    1b48:	14d0      	push      	r15
+	if (NewState != DISABLE)
+    1b4a:	3840      	cmpnei      	r0, 0
+    1b4c:	0c05      	bf      	0x1b56	// 1b56 <SYSCON_General_CMD+0xe>
+    1b4e:	6c07      	mov      	r0, r1
+    1b50:	e3ffff9c 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+}
+    1b54:	1490      	pop      	r15
+		SYSCON->GCDR|=ENDIS_X;													//disable SYSCON General Control
+    1b56:	1068      	lrw      	r3, 0x2000005c	// 1b74 <SYSCON_General_CMD+0x2c>
+    1b58:	9360      	ld.w      	r3, (r3, 0x0)
+    1b5a:	9342      	ld.w      	r2, (r3, 0x8)
+    1b5c:	6c84      	or      	r2, r1
+    1b5e:	b342      	st.w      	r2, (r3, 0x8)
+		while(SYSCON->GCSR&ENDIS_X);											//check Disable?
+    1b60:	9343      	ld.w      	r2, (r3, 0xc)
+    1b62:	6884      	and      	r2, r1
+    1b64:	3a40      	cmpnei      	r2, 0
+    1b66:	0bfd      	bt      	0x1b60	// 1b60 <SYSCON_General_CMD+0x18>
+		SYSCON->ICR|=ENDIS_X;													//Clear ENDIS_X stable bit
+    1b68:	237f      	addi      	r3, 128
+    1b6a:	9301      	ld.w      	r0, (r3, 0x4)
+    1b6c:	6c40      	or      	r1, r0
+    1b6e:	b321      	st.w      	r1, (r3, 0x4)
+}
+    1b70:	07f2      	br      	0x1b54	// 1b54 <SYSCON_General_CMD+0xc>
+    1b72:	0000      	bkpt
+    1b74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SystemCLK_HCLKDIV_PCLKDIV_Config:
+
+00001b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>:
+//SystemClk_data_x:EMOSC_24M,EMOSC_16M,EMOSC_12M,EMOSC_8M,EMOSC_4M,EMOSC_36K,
+//ISOSC,IMOSC,HFOSC_48M,HFOSC_24M,HFOSC_12M,HFOSC_6M
+//ReturnValue:NONE
+/*************************************************************/ 
+void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x )
+{
+    1b78:	14c2      	push      	r4-r5
+	if(SystemClk_data_x==HFOSC_48M)
+    1b7a:	3b48      	cmpnei      	r3, 8
+    1b7c:	0828      	bt      	0x1bcc	// 1bcc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x54>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b7e:	109d      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b80:	3501      	movi      	r5, 1
+    1b82:	9480      	ld.w      	r4, (r4, 0x0)
+    1b84:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X04|(0X00<<16);			//High speed mode
+    1b86:	3504      	movi      	r5, 4
+    1b88:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+	}
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1b8a:	5b83      	subi      	r4, r3, 1
+    1b8c:	3c01      	cmphsi      	r4, 2
+    1b8e:	0c2b      	bf      	0x1be4	// 1be4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x6c>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+	}
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b90:	5b8b      	subi      	r4, r3, 3
+	if((SystemClk_data_x==EMOSC_8M)||(SystemClk_data_x==EMOSC_4M)||(SystemClk_data_x==EMOSC_36K)
+    1b92:	3c04      	cmphsi      	r4, 5
+    1b94:	0c03      	bf      	0x1b9a	// 1b9a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x22>
+		||(SystemClk_data_x==IMOSC)||(SystemClk_data_x==ISOSC)||(SystemClk_data_x==HFOSC_6M))
+    1b96:	3b4b      	cmpnei      	r3, 11
+    1b98:	0807      	bt      	0x1ba6	// 1ba6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x2e>
+	{
+		IFC->CEDR=0X01;						//CLKEN
+    1b9a:	1076      	lrw      	r3, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1b9c:	3401      	movi      	r4, 1
+    1b9e:	9360      	ld.w      	r3, (r3, 0x0)
+    1ba0:	b381      	st.w      	r4, (r3, 0x4)
+		IFC->MR=0X00|(0X00<<16);			//Low speed mode
+    1ba2:	3400      	movi      	r4, 0
+    1ba4:	b385      	st.w      	r4, (r3, 0x14)
+	}
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1ba6:	1094      	lrw      	r4, 0xd22d0000	// 1bf4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x7c>
+    1ba8:	6c10      	or      	r0, r4
+    1baa:	1074      	lrw      	r3, 0x2000005c	// 1bf8 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x80>
+    1bac:	6c40      	or      	r1, r0
+    1bae:	9360      	ld.w      	r3, (r3, 0x0)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb0:	3080      	movi      	r0, 128
+	SYSCON->SCLKCR=SYSCLK_KEY | HCLK_DIV_X| SYSCLK_X;
+    1bb2:	b327      	st.w      	r1, (r3, 0x1c)
+	while (!(SYSCON->CKST & (1<<8))); 											// waiting for sysclk stable
+    1bb4:	4001      	lsli      	r0, r0, 1
+    1bb6:	9324      	ld.w      	r1, (r3, 0x10)
+    1bb8:	6840      	and      	r1, r0
+    1bba:	3940      	cmpnei      	r1, 0
+    1bbc:	0ffd      	bf      	0x1bb6	// 1bb6 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x3e>
+	SYSCON->PCLKCR=PCLK_KEY|PCLK_DIV_X;											//PCLK DIV 1 2 4 6 8 16		
+    1bbe:	1030      	lrw      	r1, 0xc33c0000	// 1bfc <SystemCLK_HCLKDIV_PCLKDIV_Config+0x84>
+    1bc0:	6c48      	or      	r1, r2
+    1bc2:	b328      	st.w      	r1, (r3, 0x20)
+	while(SYSCON->PCLKCR!=PCLK_DIV_X);											//Wait PCLK DIV
+    1bc4:	9328      	ld.w      	r1, (r3, 0x20)
+    1bc6:	644a      	cmpne      	r2, r1
+    1bc8:	0bfe      	bt      	0x1bc4	// 1bc4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x4c>
+}
+    1bca:	1482      	pop      	r4-r5
+	if((SystemClk_data_x==EMOSC_24M)||(SystemClk_data_x==HFOSC_24M))
+    1bcc:	3b40      	cmpnei      	r3, 0
+    1bce:	0c03      	bf      	0x1bd4	// 1bd4 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x5c>
+    1bd0:	3b49      	cmpnei      	r3, 9
+    1bd2:	0807      	bt      	0x1be0	// 1be0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x68>
+		IFC->CEDR=0X01;						//CLKEN
+    1bd4:	1087      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1bd6:	3501      	movi      	r5, 1
+    1bd8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bda:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X02|(0X00<<16);			//Medium speed mode
+    1bdc:	3502      	movi      	r5, 2
+    1bde:	b4a5      	st.w      	r5, (r4, 0x14)
+	if((SystemClk_data_x==EMOSC_12M)||(SystemClk_data_x==HFOSC_12M)||(SystemClk_data_x==EMOSC_16M))
+    1be0:	3b4a      	cmpnei      	r3, 10
+    1be2:	0bd4      	bt      	0x1b8a	// 1b8a <SystemCLK_HCLKDIV_PCLKDIV_Config+0x12>
+		IFC->CEDR=0X01;						//CLKEN
+    1be4:	1083      	lrw      	r4, 0x20000060	// 1bf0 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x78>
+    1be6:	3501      	movi      	r5, 1
+    1be8:	9480      	ld.w      	r4, (r4, 0x0)
+    1bea:	b4a1      	st.w      	r5, (r4, 0x4)
+		IFC->MR=0X01|(0X00<<16);			//Low speed mode
+    1bec:	b4a5      	st.w      	r5, (r4, 0x14)
+    1bee:	07d1      	br      	0x1b90	// 1b90 <SystemCLK_HCLKDIV_PCLKDIV_Config+0x18>
+    1bf0:	20000060 	.long	0x20000060
+    1bf4:	d22d0000 	.long	0xd22d0000
+    1bf8:	2000005c 	.long	0x2000005c
+    1bfc:	c33c0000 	.long	0xc33c0000
+
+Disassembly of section .text.SYSCON_HFOSC_SELECTE:
+
+00001c00 <SYSCON_HFOSC_SELECTE>:
+//EntryParameter:HFOSC_SELECTE_X
+//HFOSC_SELECTE_X:HFOSC_SELECTE_48M,HFOSC_SELECTE_24M;HFOSC_SELECTE_12M;HFOSC_SELECTE_6M
+//ReturnValue:NONE
+/*************************************************************/  
+void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X)
+{		
+    1c00:	14d1      	push      	r4, r15
+    1c02:	6d03      	mov      	r4, r0
+	SYSCON_General_CMD(DISABLE,ENDIS_HFOSC);					//disable HFOSC
+    1c04:	3110      	movi      	r1, 16
+    1c06:	3000      	movi      	r0, 0
+    1c08:	e3ffffa0 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	SYSCON->OPT1 = (SYSCON->OPT1 & 0XFFFFFFCF)|HFOSC_SELECTE_X;
+    1c0c:	1066      	lrw      	r3, 0x2000005c	// 1c24 <SYSCON_HFOSC_SELECTE+0x24>
+    1c0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c10:	9319      	ld.w      	r0, (r3, 0x64)
+    1c12:	3884      	bclri      	r0, 4
+    1c14:	3885      	bclri      	r0, 5
+    1c16:	6c10      	or      	r0, r4
+    1c18:	b319      	st.w      	r0, (r3, 0x64)
+    1c1a:	3010      	movi      	r0, 16
+    1c1c:	e3ffff36 	bsr      	0x1a88	// 1a88 <SYSCON_General_CMD.part.0>
+	SYSCON_General_CMD(ENABLE,ENDIS_HFOSC);						//enable HFOSC
+}
+    1c20:	1491      	pop      	r4, r15
+    1c22:	0000      	bkpt
+    1c24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_WDT_CMD:
+
+00001c28 <SYSCON_WDT_CMD>:
+//EntryParameter:,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_WDT_CMD(FunctionalStatus NewState)
+{
+    1c28:	106c      	lrw      	r3, 0x2000005c	// 1c58 <SYSCON_WDT_CMD+0x30>
+	if(NewState != DISABLE)
+    1c2a:	3840      	cmpnei      	r0, 0
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c2c:	9360      	ld.w      	r3, (r3, 0x0)
+    1c2e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1c30:	0c0a      	bf      	0x1c44	// 1c44 <SYSCON_WDT_CMD+0x1c>
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c32:	104b      	lrw      	r2, 0x78870000	// 1c5c <SYSCON_WDT_CMD+0x34>
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c34:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Enable_IWDT;
+    1c36:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(!(SYSCON->IWDCR&Check_IWDT_BUSY));
+    1c38:	4125      	lsli      	r1, r1, 5
+    1c3a:	934d      	ld.w      	r2, (r3, 0x34)
+    1c3c:	6884      	and      	r2, r1
+    1c3e:	3a40      	cmpnei      	r2, 0
+    1c40:	0ffd      	bf      	0x1c3a	// 1c3a <SYSCON_WDT_CMD+0x12>
+	else
+	{
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+	}
+}
+    1c42:	783c      	jmp      	r15
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c44:	1047      	lrw      	r2, 0x788755aa	// 1c60 <SYSCON_WDT_CMD+0x38>
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c46:	3180      	movi      	r1, 128
+		SYSCON->IWDEDR=IWDTEDR_KEY|Disable_IWDT;
+    1c48:	b34f      	st.w      	r2, (r3, 0x3c)
+		while(SYSCON->IWDCR&Check_IWDT_BUSY);
+    1c4a:	4125      	lsli      	r1, r1, 5
+    1c4c:	934d      	ld.w      	r2, (r3, 0x34)
+    1c4e:	6884      	and      	r2, r1
+    1c50:	3a40      	cmpnei      	r2, 0
+    1c52:	0bfd      	bt      	0x1c4c	// 1c4c <SYSCON_WDT_CMD+0x24>
+    1c54:	07f7      	br      	0x1c42	// 1c42 <SYSCON_WDT_CMD+0x1a>
+    1c56:	0000      	bkpt
+    1c58:	2000005c 	.long	0x2000005c
+    1c5c:	78870000 	.long	0x78870000
+    1c60:	788755aa 	.long	0x788755aa
+
+Disassembly of section .text.SYSCON_IWDCNT_Reload:
+
+00001c64 <SYSCON_IWDCNT_Reload>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Reload(void)
+{
+	SYSCON->IWDCNT=CLR_IWDT;
+    1c64:	1064      	lrw      	r3, 0x2000005c	// 1c74 <SYSCON_IWDCNT_Reload+0x10>
+    1c66:	32b4      	movi      	r2, 180
+    1c68:	9360      	ld.w      	r3, (r3, 0x0)
+    1c6a:	237f      	addi      	r3, 128
+    1c6c:	4257      	lsli      	r2, r2, 23
+    1c6e:	b34e      	st.w      	r2, (r3, 0x38)
+}
+    1c70:	783c      	jmp      	r15
+    1c72:	0000      	bkpt
+    1c74:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_IWDCNT_Config:
+
+00001c78 <SYSCON_IWDCNT_Config>:
+//IWDT_INTW_DIV_X:IWDT_INTW_DIV_1/2/3/4/4/5/6
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X )
+{
+	SYSCON->IWDCR=IWDT_KEY|IWDT_TIME_X|IWDT_INTW_DIV_X;
+    1c78:	1044      	lrw      	r2, 0x87780000	// 1c88 <SYSCON_IWDCNT_Config+0x10>
+    1c7a:	1065      	lrw      	r3, 0x2000005c	// 1c8c <SYSCON_IWDCNT_Config+0x14>
+    1c7c:	6c48      	or      	r1, r2
+    1c7e:	9360      	ld.w      	r3, (r3, 0x0)
+    1c80:	6c04      	or      	r0, r1
+    1c82:	237f      	addi      	r3, 128
+    1c84:	b30d      	st.w      	r0, (r3, 0x34)
+}
+    1c86:	783c      	jmp      	r15
+    1c88:	87780000 	.long	0x87780000
+    1c8c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.SYSCON_LVD_Config:
+
+00001c90 <SYSCON_LVD_Config>:
+//X_LVD_INT:ENABLE_LVD_INT,DISABLE_LVD_INT
+//INTDET_POL_X:INTDET_POL_fall,INTDET_POL_X_rise,INTDET_POL_X_riseORfall
+//ReturnValue: NONE
+/*************************************************************/
+void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X)
+{
+    1c90:	14c3      	push      	r4-r6
+    1c92:	9883      	ld.w      	r4, (r14, 0xc)
+	//SYSCON->LVDCR=LVD_KEY;
+	SYSCON->LVDCR=LVD_KEY|X_LVDEN|INTDET_LVL_X|RSTDET_LVL_X|X_LVD_INT|INTDET_POL_X;
+    1c94:	10c5      	lrw      	r6, 0xb44b0000	// 1ca8 <SYSCON_LVD_Config+0x18>
+    1c96:	6d18      	or      	r4, r6
+    1c98:	6cd0      	or      	r3, r4
+    1c9a:	6c8c      	or      	r2, r3
+    1c9c:	6c48      	or      	r1, r2
+    1c9e:	10a4      	lrw      	r5, 0x2000005c	// 1cac <SYSCON_LVD_Config+0x1c>
+    1ca0:	6c04      	or      	r0, r1
+    1ca2:	95a0      	ld.w      	r5, (r5, 0x0)
+    1ca4:	b513      	st.w      	r0, (r5, 0x4c)
+}
+    1ca6:	1483      	pop      	r4-r6
+    1ca8:	b44b0000 	.long	0xb44b0000
+    1cac:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LVD_Int_Enable:
+
+00001cb0 <LVD_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void LVD_Int_Enable(void)
+{
+	SYSCON->ICR = LVD_INT_ST;				//clear LVD INT status
+    1cb0:	1066      	lrw      	r3, 0x2000005c	// 1cc8 <LVD_Int_Enable+0x18>
+    1cb2:	3180      	movi      	r1, 128
+    1cb4:	9360      	ld.w      	r3, (r3, 0x0)
+    1cb6:	3280      	movi      	r2, 128
+    1cb8:	604c      	addu      	r1, r3
+    1cba:	4244      	lsli      	r2, r2, 4
+    1cbc:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= LVD_INT_ST;
+    1cbe:	935d      	ld.w      	r2, (r3, 0x74)
+    1cc0:	3aab      	bseti      	r2, 11
+    1cc2:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1cc4:	783c      	jmp      	r15
+    1cc6:	0000      	bkpt
+    1cc8:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IWDT_Int_Enable:
+
+00001ccc <IWDT_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue: NONE
+/*************************************************************/
+void IWDT_Int_Enable(void)
+{
+	SYSCON->ICR = IWDT_INT_ST;				//clear LVD INT status
+    1ccc:	1066      	lrw      	r3, 0x2000005c	// 1ce4 <IWDT_Int_Enable+0x18>
+    1cce:	3180      	movi      	r1, 128
+    1cd0:	9360      	ld.w      	r3, (r3, 0x0)
+    1cd2:	3280      	movi      	r2, 128
+    1cd4:	604c      	addu      	r1, r3
+    1cd6:	4241      	lsli      	r2, r2, 1
+    1cd8:	b141      	st.w      	r2, (r1, 0x4)
+	SYSCON->IMER  |= IWDT_INT_ST;
+    1cda:	935d      	ld.w      	r2, (r3, 0x74)
+    1cdc:	3aa8      	bseti      	r2, 8
+    1cde:	b35d      	st.w      	r2, (r3, 0x74)
+}
+    1ce0:	783c      	jmp      	r15
+    1ce2:	0000      	bkpt
+    1ce4:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_trigger_CMD:
+
+00001ce8 <EXTI_trigger_CMD>:
+//EXI_tringer_mode:_EXIRT,_EXIFT
+//ReturnValue: LVD detection flag
+/*************************************************************/
+void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode)
+{
+	switch(EXI_tringer_mode)
+    1ce8:	3a40      	cmpnei      	r2, 0
+    1cea:	0c04      	bf      	0x1cf2	// 1cf2 <EXTI_trigger_CMD+0xa>
+    1cec:	3a41      	cmpnei      	r2, 1
+    1cee:	0c0e      	bf      	0x1d0a	// 1d0a <EXTI_trigger_CMD+0x22>
+		{
+			SYSCON->EXIFT &=~EXIPIN;	
+		}
+		break;
+	}	
+}
+    1cf0:	783c      	jmp      	r15
+    1cf2:	106d      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1cf4:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIRT |=EXIPIN;
+    1cf6:	9360      	ld.w      	r3, (r3, 0x0)
+    1cf8:	237f      	addi      	r3, 128
+    1cfa:	9345      	ld.w      	r2, (r3, 0x14)
+		if(NewState != DISABLE)
+    1cfc:	0c04      	bf      	0x1d04	// 1d04 <EXTI_trigger_CMD+0x1c>
+			SYSCON->EXIRT |=EXIPIN;
+    1cfe:	6c48      	or      	r1, r2
+    1d00:	b325      	st.w      	r1, (r3, 0x14)
+    1d02:	07f7      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIRT &=~EXIPIN;	
+    1d04:	6885      	andn      	r2, r1
+    1d06:	b345      	st.w      	r2, (r3, 0x14)
+    1d08:	07f4      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d0a:	1067      	lrw      	r3, 0x2000005c	// 1d24 <EXTI_trigger_CMD+0x3c>
+		if(NewState != DISABLE)
+    1d0c:	3840      	cmpnei      	r0, 0
+			SYSCON->EXIFT |=EXIPIN;
+    1d0e:	9360      	ld.w      	r3, (r3, 0x0)
+    1d10:	237f      	addi      	r3, 128
+    1d12:	9346      	ld.w      	r2, (r3, 0x18)
+		if(NewState != DISABLE)
+    1d14:	0c04      	bf      	0x1d1c	// 1d1c <EXTI_trigger_CMD+0x34>
+			SYSCON->EXIFT |=EXIPIN;
+    1d16:	6c48      	or      	r1, r2
+    1d18:	b326      	st.w      	r1, (r3, 0x18)
+    1d1a:	07eb      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+			SYSCON->EXIFT &=~EXIPIN;	
+    1d1c:	6885      	andn      	r2, r1
+    1d1e:	b346      	st.w      	r2, (r3, 0x18)
+}
+    1d20:	07e8      	br      	0x1cf0	// 1cf0 <EXTI_trigger_CMD+0x8>
+    1d22:	0000      	bkpt
+    1d24:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXTI_interrupt_CMD:
+
+00001d28 <EXTI_interrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/
+void EXTI_interrupt_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN)
+{
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+    1d28:	106b      	lrw      	r3, 0x2000005c	// 1d54 <EXTI_interrupt_CMD+0x2c>
+    1d2a:	104c      	lrw      	r2, 0x3fff	// 1d58 <EXTI_interrupt_CMD+0x30>
+    1d2c:	9360      	ld.w      	r3, (r3, 0x0)
+    1d2e:	237f      	addi      	r3, 128
+	if(NewState != DISABLE)
+    1d30:	3840      	cmpnei      	r0, 0
+	SYSCON->EXICR = 0X3FFF;									//Claer EXI INT status
+    1d32:	b34b      	st.w      	r2, (r3, 0x2c)
+	if(NewState != DISABLE)
+    1d34:	0c0c      	bf      	0x1d4c	// 1d4c <EXTI_interrupt_CMD+0x24>
+	{
+		SYSCON->EXIER|=EXIPIN;								//EXI4 interrupt enable
+    1d36:	9347      	ld.w      	r2, (r3, 0x1c)
+    1d38:	6c84      	or      	r2, r1
+    1d3a:	b347      	st.w      	r2, (r3, 0x1c)
+		while(!(SYSCON->EXIMR&EXIPIN));						//Check EXI is enabled or not
+    1d3c:	9349      	ld.w      	r2, (r3, 0x24)
+    1d3e:	6884      	and      	r2, r1
+    1d40:	3a40      	cmpnei      	r2, 0
+    1d42:	0ffd      	bf      	0x1d3c	// 1d3c <EXTI_interrupt_CMD+0x14>
+		SYSCON->EXICR |=EXIPIN;								// Clear EXI status bit
+    1d44:	934b      	ld.w      	r2, (r3, 0x2c)
+    1d46:	6c48      	or      	r1, r2
+    1d48:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else
+	{
+		SYSCON->EXIDR|=EXIPIN;
+	}
+}
+    1d4a:	783c      	jmp      	r15
+		SYSCON->EXIDR|=EXIPIN;
+    1d4c:	9348      	ld.w      	r2, (r3, 0x20)
+    1d4e:	6c48      	or      	r1, r2
+    1d50:	b328      	st.w      	r1, (r3, 0x20)
+}
+    1d52:	07fc      	br      	0x1d4a	// 1d4a <EXTI_interrupt_CMD+0x22>
+    1d54:	2000005c 	.long	0x2000005c
+    1d58:	00003fff 	.long	0x00003fff
+
+Disassembly of section .text.GPIO_EXTI_interrupt:
+
+00001d5c <GPIO_EXTI_interrupt>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPIO_EXTI_interrupt(CSP_GPIO_T * GPIOX,U32_T GPIO_IECR_VALUE)
+{
+	GPIOX->IECR=GPIO_IECR_VALUE;
+    1d5c:	b02b      	st.w      	r1, (r0, 0x2c)
+}
+    1d5e:	783c      	jmp      	r15
+
+Disassembly of section .text.EXI4_Int_Enable:
+
+00001d60 <EXI4_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4_Int_Enable(void)
+{
+	INTC_ISER_WRITE(EXI4_INT);    
+    1d60:	3380      	movi      	r3, 128
+    1d62:	4370      	lsli      	r3, r3, 16
+    1d64:	1042      	lrw      	r2, 0xe000e100	// 1d6c <EXI4_Int_Enable+0xc>
+    1d66:	b260      	st.w      	r3, (r2, 0x0)
+}
+    1d68:	783c      	jmp      	r15
+    1d6a:	0000      	bkpt
+    1d6c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_Int_Enable:
+
+00001d70 <SYSCON_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Enable(void)
+{
+    INTC_ISER_WRITE(SYSCON_INT);    
+    1d70:	3202      	movi      	r2, 2
+    1d72:	1062      	lrw      	r3, 0xe000e100	// 1d78 <SYSCON_Int_Enable+0x8>
+    1d74:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1d76:	783c      	jmp      	r15
+    1d78:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.SYSCON_Int_Disable:
+
+00001d7c <SYSCON_Int_Disable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_Int_Disable(void)
+{
+    INTC_ICER_WRITE(SYSCON_INT);    
+    1d7c:	3202      	movi      	r2, 2
+    1d7e:	1062      	lrw      	r3, 0xe000e180	// 1d84 <SYSCON_Int_Disable+0x8>
+    1d80:	b340      	st.w      	r2, (r3, 0x0)
+}
+    1d82:	783c      	jmp      	r15
+    1d84:	e000e180 	.long	0xe000e180
+
+Disassembly of section .text.SYSCON_INT_Priority:
+
+00001d88 <SYSCON_INT_Priority>:
+//80:Priority 2
+//C0:Priority 3		lowest
+/*************************************************************/
+void SYSCON_INT_Priority(void)
+{
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d88:	1066      	lrw      	r3, 0xe000e400	// 1da0 <SYSCON_INT_Priority+0x18>
+    1d8a:	1047      	lrw      	r2, 0xc0c0c0c0	// 1da4 <SYSCON_INT_Priority+0x1c>
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d8c:	1027      	lrw      	r1, 0xc0c000c0	// 1da8 <SYSCON_INT_Priority+0x20>
+	INTC_IPR0_WRITE(0XC0C0C0C0);   //IQR0-3  low bit-->high bit
+    1d8e:	b340      	st.w      	r2, (r3, 0x0)
+	INTC_IPR1_WRITE(0XC0C0C0C0);   //IQR4-7  
+    1d90:	b341      	st.w      	r2, (r3, 0x4)
+	INTC_IPR2_WRITE(0XC0C0C0C0);   //IQR8-11  
+    1d92:	b342      	st.w      	r2, (r3, 0x8)
+	INTC_IPR3_WRITE(0XC0C0C0C0);   //IQR12-15  
+    1d94:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_IPR4_WRITE(0XC0C0C0C0);   //IQR16-19  
+    1d96:	b344      	st.w      	r2, (r3, 0x10)
+	INTC_IPR5_WRITE(0XC0C0C0C0);   //IQR20-23 
+    1d98:	b345      	st.w      	r2, (r3, 0x14)
+	INTC_IPR6_WRITE(0XC0C000C0);   //IQR24-27  
+    1d9a:	b326      	st.w      	r1, (r3, 0x18)
+	INTC_IPR7_WRITE(0XC0C0C0C0);   //IQR28-31
+    1d9c:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    1d9e:	783c      	jmp      	r15
+    1da0:	e000e400 	.long	0xe000e400
+    1da4:	c0c0c0c0 	.long	0xc0c0c0c0
+    1da8:	c0c000c0 	.long	0xc0c000c0
+
+Disassembly of section .text.Set_INT_Priority:
+
+00001dac <Set_INT_Priority>:
+//int_name:CORET_IRQ~BT1_IRQ
+//int_level:0~3  0=highest   3=lowest
+//ReturnValue:None
+/*************************************************************/
+void Set_INT_Priority(U8_T int_name,U8_T int_level)
+{
+    1dac:	14c1      	push      	r4
+    1dae:	4862      	lsri      	r3, r0, 2
+    1db0:	4342      	lsli      	r2, r3, 2
+    1db2:	106a      	lrw      	r3, 0x20000064	// 1dd8 <Set_INT_Priority+0x2c>
+	U8_T i_temp,j_temp;
+	U32_T k_temp;
+	i_temp=(int_name%4)*8;
+    1db4:	3403      	movi      	r4, 3
+    1db6:	9360      	ld.w      	r3, (r3, 0x0)
+    1db8:	60c8      	addu      	r3, r2
+	j_temp=int_name/4;
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1dba:	3280      	movi      	r2, 128
+    1dbc:	4243      	lsli      	r2, r2, 3
+	i_temp=(int_name%4)*8;
+    1dbe:	6810      	and      	r0, r4
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1dc0:	60c8      	addu      	r3, r2
+    1dc2:	4003      	lsli      	r0, r0, 3
+    1dc4:	34ff      	movi      	r4, 255
+    1dc6:	9340      	ld.w      	r2, (r3, 0x0)
+    1dc8:	7100      	lsl      	r4, r0
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1dca:	4126      	lsli      	r1, r1, 6
+	k_temp=CK801 -> IPR[j_temp]&(~(0xff<<i_temp));
+    1dcc:	6891      	andn      	r2, r4
+	CK801 -> IPR[j_temp]=k_temp|((int_level*0x40)<<(i_temp));
+    1dce:	7040      	lsl      	r1, r0
+    1dd0:	6c48      	or      	r1, r2
+    1dd2:	b320      	st.w      	r1, (r3, 0x0)
+}
+    1dd4:	1481      	pop      	r4
+    1dd6:	0000      	bkpt
+    1dd8:	20000064 	.long	0x20000064
+
+Disassembly of section .text.GPIO_Init:
+
+00001ddc <GPIO_Init>:
+//byte:Lowbyte(PIN_0~7),Highbyte(PIN_8~15)
+//Dir:0:output 1:input
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir)
+{
+    1ddc:	14d1      	push      	r4, r15
+    uint32_t data_temp;
+    uint8_t GPIO_Pin;
+    if(PinNum<8)
+    1dde:	3907      	cmphsi      	r1, 8
+{
+    1de0:	6d03      	mov      	r4, r0
+    if(PinNum<8)
+    1de2:	0830      	bt      	0x1e42	// 1e42 <GPIO_Init+0x66>
+    {
+    switch (PinNum)
+    1de4:	5903      	subi      	r0, r1, 1
+    1de6:	3806      	cmphsi      	r0, 7
+    1de8:	0827      	bt      	0x1e36	// 1e36 <GPIO_Init+0x5a>
+    1dea:	e3fff789 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1dee:	1004      	.short	0x1004
+    1df0:	1d1a1613 	.long	0x1d1a1613
+    1df4:	0021      	.short	0x0021
+    {
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+        case 1:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1df6:	3300      	movi      	r3, 0
+    1df8:	3104      	movi      	r1, 4
+    1dfa:	2bf0      	subi      	r3, 241
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    }
+        if (Dir)
+    1dfc:	3a40      	cmpnei      	r2, 0
+        {
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1dfe:	9440      	ld.w      	r2, (r4, 0x0)
+    1e00:	68c8      	and      	r3, r2
+        if (Dir)
+    1e02:	0c1e      	bf      	0x1e3e	// 1e3e <GPIO_Init+0x62>
+          (GPIOx)->CONLR =((GPIOx)->CONLR & data_temp) | 1<<GPIO_Pin;
+    1e04:	3201      	movi      	r2, 1
+        }
+        else
+        {
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1e06:	7084      	lsl      	r2, r1
+    1e08:	6cc8      	or      	r3, r2
+    1e0a:	b460      	st.w      	r3, (r4, 0x0)
+        else
+        {
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+        }
+    }
+}
+    1e0c:	1491      	pop      	r4, r15
+        case 2:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e0e:	3108      	movi      	r1, 8
+    1e10:	1166      	lrw      	r3, 0xfffff0ff	// 1ea8 <GPIO_Init+0xcc>
+    1e12:	07f5      	br      	0x1dfc	// 1dfc <GPIO_Init+0x20>
+        case 3:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e14:	310c      	movi      	r1, 12
+    1e16:	1166      	lrw      	r3, 0xffff0fff	// 1eac <GPIO_Init+0xd0>
+    1e18:	07f2      	br      	0x1dfc	// 1dfc <GPIO_Init+0x20>
+        case 4:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e1a:	3110      	movi      	r1, 16
+    1e1c:	1165      	lrw      	r3, 0xfff10000	// 1eb0 <GPIO_Init+0xd4>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e1e:	2b00      	subi      	r3, 1
+    1e20:	07ee      	br      	0x1dfc	// 1dfc <GPIO_Init+0x20>
+        case 5:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e22:	3114      	movi      	r1, 20
+    1e24:	1164      	lrw      	r3, 0xff100000	// 1eb4 <GPIO_Init+0xd8>
+    1e26:	07fc      	br      	0x1e1e	// 1e1e <GPIO_Init+0x42>
+        case 6:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e28:	33f1      	movi      	r3, 241
+    1e2a:	3118      	movi      	r1, 24
+    1e2c:	4378      	lsli      	r3, r3, 24
+    1e2e:	07f8      	br      	0x1e1e	// 1e1e <GPIO_Init+0x42>
+        case 7:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e30:	311c      	movi      	r1, 28
+    1e32:	1162      	lrw      	r3, 0xfffffff	// 1eb8 <GPIO_Init+0xdc>
+    1e34:	07e4      	br      	0x1dfc	// 1dfc <GPIO_Init+0x20>
+        case 0:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e36:	3300      	movi      	r3, 0
+    1e38:	3100      	movi      	r1, 0
+    1e3a:	2b0f      	subi      	r3, 16
+    1e3c:	07e0      	br      	0x1dfc	// 1dfc <GPIO_Init+0x20>
+         (GPIOx)->CONLR = ((GPIOx)->CONLR & data_temp) | 2<<GPIO_Pin; 
+    1e3e:	3202      	movi      	r2, 2
+    1e40:	07e3      	br      	0x1e06	// 1e06 <GPIO_Init+0x2a>
+    else if (PinNum<16)
+    1e42:	390f      	cmphsi      	r1, 16
+    1e44:	0be4      	bt      	0x1e0c	// 1e0c <GPIO_Init+0x30>
+        switch (PinNum)
+    1e46:	2908      	subi      	r1, 9
+    1e48:	3906      	cmphsi      	r1, 7
+    1e4a:	6c07      	mov      	r0, r1
+    1e4c:	0827      	bt      	0x1e9a	// 1e9a <GPIO_Init+0xbe>
+    1e4e:	e3fff757 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1e52:	1004      	.short	0x1004
+    1e54:	1d1a1613 	.long	0x1d1a1613
+    1e58:	0021      	.short	0x0021
+        case 9:data_temp=0xffffff0f;GPIO_Pin=4;break;
+    1e5a:	3300      	movi      	r3, 0
+    1e5c:	3104      	movi      	r1, 4
+    1e5e:	2bf0      	subi      	r3, 241
+      if (Dir)
+    1e60:	3a40      	cmpnei      	r2, 0
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e62:	9441      	ld.w      	r2, (r4, 0x4)
+    1e64:	68c8      	and      	r3, r2
+      if (Dir)
+    1e66:	0c1e      	bf      	0x1ea2	// 1ea2 <GPIO_Init+0xc6>
+        (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 1<<GPIO_Pin;  
+    1e68:	3201      	movi      	r2, 1
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1e6a:	7084      	lsl      	r2, r1
+    1e6c:	6cc8      	or      	r3, r2
+    1e6e:	b461      	st.w      	r3, (r4, 0x4)
+}
+    1e70:	07ce      	br      	0x1e0c	// 1e0c <GPIO_Init+0x30>
+        case 10:data_temp=0xfffff0ff;GPIO_Pin=8;break;
+    1e72:	3108      	movi      	r1, 8
+    1e74:	106d      	lrw      	r3, 0xfffff0ff	// 1ea8 <GPIO_Init+0xcc>
+    1e76:	07f5      	br      	0x1e60	// 1e60 <GPIO_Init+0x84>
+        case 11:data_temp=0xffff0fff;GPIO_Pin=12;break;
+    1e78:	310c      	movi      	r1, 12
+    1e7a:	106d      	lrw      	r3, 0xffff0fff	// 1eac <GPIO_Init+0xd0>
+    1e7c:	07f2      	br      	0x1e60	// 1e60 <GPIO_Init+0x84>
+        case 12:data_temp=0xfff0ffff;GPIO_Pin=16;break;
+    1e7e:	3110      	movi      	r1, 16
+    1e80:	106c      	lrw      	r3, 0xfff10000	// 1eb0 <GPIO_Init+0xd4>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e82:	2b00      	subi      	r3, 1
+    1e84:	07ee      	br      	0x1e60	// 1e60 <GPIO_Init+0x84>
+        case 13:data_temp=0xff0fffff;GPIO_Pin=20;break;
+    1e86:	3114      	movi      	r1, 20
+    1e88:	106b      	lrw      	r3, 0xff100000	// 1eb4 <GPIO_Init+0xd8>
+    1e8a:	07fc      	br      	0x1e82	// 1e82 <GPIO_Init+0xa6>
+        case 14:data_temp=0xf0ffffff;GPIO_Pin=24;break;
+    1e8c:	33f1      	movi      	r3, 241
+    1e8e:	3118      	movi      	r1, 24
+    1e90:	4378      	lsli      	r3, r3, 24
+    1e92:	07f8      	br      	0x1e82	// 1e82 <GPIO_Init+0xa6>
+        case 15:data_temp=0x0fffffff;GPIO_Pin=28;break;
+    1e94:	311c      	movi      	r1, 28
+    1e96:	1069      	lrw      	r3, 0xfffffff	// 1eb8 <GPIO_Init+0xdc>
+    1e98:	07e4      	br      	0x1e60	// 1e60 <GPIO_Init+0x84>
+        case 8:data_temp=0xfffffff0;GPIO_Pin=0;break;
+    1e9a:	3300      	movi      	r3, 0
+    1e9c:	3100      	movi      	r1, 0
+    1e9e:	2b0f      	subi      	r3, 16
+    1ea0:	07e0      	br      	0x1e60	// 1e60 <GPIO_Init+0x84>
+         (GPIOx)->CONHR = ((GPIOx)->CONHR & data_temp) | 2<<GPIO_Pin;    
+    1ea2:	3202      	movi      	r2, 2
+    1ea4:	07e3      	br      	0x1e6a	// 1e6a <GPIO_Init+0x8e>
+    1ea6:	0000      	bkpt
+    1ea8:	fffff0ff 	.long	0xfffff0ff
+    1eac:	ffff0fff 	.long	0xffff0fff
+    1eb0:	fff10000 	.long	0xfff10000
+    1eb4:	ff100000 	.long	0xff100000
+    1eb8:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIO_PullHigh_Init:
+
+00001ebc <GPIO_PullHigh_Init>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->PUDR  = (((GPIOx)->PUDR) & ~(0x03<<(bit*2))) | (0x01<<(bit*2));
+    1ebc:	4121      	lsli      	r1, r1, 1
+    1ebe:	3203      	movi      	r2, 3
+    1ec0:	9068      	ld.w      	r3, (r0, 0x20)
+    1ec2:	7084      	lsl      	r2, r1
+    1ec4:	68c9      	andn      	r3, r2
+    1ec6:	3201      	movi      	r2, 1
+    1ec8:	7084      	lsl      	r2, r1
+    1eca:	6cc8      	or      	r3, r2
+    1ecc:	b068      	st.w      	r3, (r0, 0x20)
+}
+    1ece:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_DriveStrength_EN:
+
+00001ed0 <GPIO_DriveStrength_EN>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+	(GPIOx)->DSCR  = ((GPIOx)->DSCR) | (0x01<<(bit*2));
+    1ed0:	4121      	lsli      	r1, r1, 1
+    1ed2:	3301      	movi      	r3, 1
+    1ed4:	9049      	ld.w      	r2, (r0, 0x24)
+    1ed6:	70c4      	lsl      	r3, r1
+    1ed8:	6cc8      	or      	r3, r2
+    1eda:	b069      	st.w      	r3, (r0, 0x24)
+}
+    1edc:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_IntGroup_Set:
+
+00001ee0 <GPIO_IntGroup_Set>:
+//EXI16~EXI17:GPIOA0.0~GPIOA0.7
+//EXI18~EXI19:GPIOB0.0~GPIOB0.3
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIO_IntGroup_Set(GPIO_Group_TypeDef IO_MODE , uint8_t PinNum , GPIO_EXIPIN_TypeDef Selete_EXI_x)
+{
+    1ee0:	14c1      	push      	r4
+    1ee2:	1422      	subi      	r14, r14, 8
+	volatile unsigned int  R_data_temp;
+    volatile unsigned char R_GPIO_Pin;
+	if(Selete_EXI_x<16)
+    1ee4:	3a0f      	cmphsi      	r2, 16
+    1ee6:	084f      	bt      	0x1f84	// 1f84 <GPIO_IntGroup_Set+0xa4>
+	{
+		if((Selete_EXI_x==0)||(Selete_EXI_x==8))
+    1ee8:	6ccb      	mov      	r3, r2
+    1eea:	3b83      	bclri      	r3, 3
+    1eec:	3b40      	cmpnei      	r3, 0
+    1eee:	0813      	bt      	0x1f14	// 1f14 <GPIO_IntGroup_Set+0x34>
+		{
+			R_data_temp=0xfffffff0;
+    1ef0:	2b0f      	subi      	r3, 16
+    1ef2:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=0;
+    1ef4:	3300      	movi      	r3, 0
+		else if((Selete_EXI_x==7)||(Selete_EXI_x==15))
+		{
+			R_data_temp=0x0fffffff;
+			R_GPIO_Pin=28;
+		}
+		if(Selete_EXI_x<8)
+    1ef6:	3a07      	cmphsi      	r2, 8
+			R_GPIO_Pin=28;
+    1ef8:	dc6e0003 	st.b      	r3, (r14, 0x3)
+    1efc:	1176      	lrw      	r3, 0x20000044	// 1fd4 <GPIO_IntGroup_Set+0xf4>
+		if(Selete_EXI_x<8)
+    1efe:	0c38      	bf      	0x1f6e	// 1f6e <GPIO_IntGroup_Set+0x8e>
+		{
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+		}
+		else if((Selete_EXI_x<16)&&(Selete_EXI_x>=8))
+		{
+			GPIOGRP->IGRPH =(GPIOGRP->IGRPH & R_data_temp) | (IO_MODE<<R_GPIO_Pin);    
+    1f00:	9340      	ld.w      	r2, (r3, 0x0)
+    1f02:	9261      	ld.w      	r3, (r2, 0x4)
+    1f04:	9881      	ld.w      	r4, (r14, 0x4)
+    1f06:	d82e0003 	ld.b      	r1, (r14, 0x3)
+    1f0a:	68d0      	and      	r3, r4
+    1f0c:	7004      	lsl      	r0, r1
+    1f0e:	6c0c      	or      	r0, r3
+    1f10:	b201      	st.w      	r0, (r2, 0x4)
+    1f12:	0437      	br      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+		else if((Selete_EXI_x==1)||(Selete_EXI_x==9))
+    1f14:	3b41      	cmpnei      	r3, 1
+    1f16:	0806      	bt      	0x1f22	// 1f22 <GPIO_IntGroup_Set+0x42>
+			R_data_temp=0xffffff0f;
+    1f18:	3300      	movi      	r3, 0
+    1f1a:	2bf0      	subi      	r3, 241
+    1f1c:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=4;
+    1f1e:	3304      	movi      	r3, 4
+    1f20:	07eb      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==2)||(Selete_EXI_x==10))
+    1f22:	3b42      	cmpnei      	r3, 2
+    1f24:	0805      	bt      	0x1f2e	// 1f2e <GPIO_IntGroup_Set+0x4e>
+			R_data_temp=0xfffff0ff;
+    1f26:	116d      	lrw      	r3, 0xfffff0ff	// 1fd8 <GPIO_IntGroup_Set+0xf8>
+    1f28:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=8;
+    1f2a:	3308      	movi      	r3, 8
+    1f2c:	07e5      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==3)||(Selete_EXI_x==11))
+    1f2e:	3b43      	cmpnei      	r3, 3
+    1f30:	0805      	bt      	0x1f3a	// 1f3a <GPIO_IntGroup_Set+0x5a>
+			R_data_temp=0xffff0fff;
+    1f32:	116b      	lrw      	r3, 0xffff0fff	// 1fdc <GPIO_IntGroup_Set+0xfc>
+    1f34:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=12;
+    1f36:	330c      	movi      	r3, 12
+    1f38:	07df      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==4)||(Selete_EXI_x==12))
+    1f3a:	3b44      	cmpnei      	r3, 4
+    1f3c:	0806      	bt      	0x1f48	// 1f48 <GPIO_IntGroup_Set+0x68>
+			R_data_temp=0xfff0ffff;
+    1f3e:	1169      	lrw      	r3, 0xfff10000	// 1fe0 <GPIO_IntGroup_Set+0x100>
+    1f40:	2b00      	subi      	r3, 1
+    1f42:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=16;
+    1f44:	3310      	movi      	r3, 16
+    1f46:	07d8      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==5)||(Selete_EXI_x==13))
+    1f48:	3b45      	cmpnei      	r3, 5
+    1f4a:	0806      	bt      	0x1f56	// 1f56 <GPIO_IntGroup_Set+0x76>
+			R_data_temp=0xff0fffff;
+    1f4c:	1166      	lrw      	r3, 0xff100000	// 1fe4 <GPIO_IntGroup_Set+0x104>
+    1f4e:	2b00      	subi      	r3, 1
+    1f50:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=20;
+    1f52:	3314      	movi      	r3, 20
+    1f54:	07d1      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+		else if((Selete_EXI_x==6)||(Selete_EXI_x==14))
+    1f56:	3b46      	cmpnei      	r3, 6
+    1f58:	0807      	bt      	0x1f66	// 1f66 <GPIO_IntGroup_Set+0x86>
+			R_data_temp=0xf0ffffff;
+    1f5a:	33f1      	movi      	r3, 241
+    1f5c:	4378      	lsli      	r3, r3, 24
+    1f5e:	2b00      	subi      	r3, 1
+    1f60:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=24;
+    1f62:	3318      	movi      	r3, 24
+    1f64:	07c9      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+			R_data_temp=0x0fffffff;
+    1f66:	1161      	lrw      	r3, 0xfffffff	// 1fe8 <GPIO_IntGroup_Set+0x108>
+    1f68:	b861      	st.w      	r3, (r14, 0x4)
+			R_GPIO_Pin=28;
+    1f6a:	331c      	movi      	r3, 28
+    1f6c:	07c5      	br      	0x1ef6	// 1ef6 <GPIO_IntGroup_Set+0x16>
+			GPIOGRP->IGRPL =(GPIOGRP->IGRPL & R_data_temp) | (IO_MODE<<R_GPIO_Pin);
+    1f6e:	9340      	ld.w      	r2, (r3, 0x0)
+    1f70:	9260      	ld.w      	r3, (r2, 0x0)
+    1f72:	9881      	ld.w      	r4, (r14, 0x4)
+    1f74:	d82e0003 	ld.b      	r1, (r14, 0x3)
+    1f78:	68d0      	and      	r3, r4
+    1f7a:	7004      	lsl      	r0, r1
+    1f7c:	6c0c      	or      	r0, r3
+    1f7e:	b200      	st.w      	r0, (r2, 0x0)
+			{
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+			}
+		}
+	}
+}
+    1f80:	1402      	addi      	r14, r14, 8
+    1f82:	1481      	pop      	r4
+	else if(Selete_EXI_x<20)
+    1f84:	3a13      	cmphsi      	r2, 20
+    1f86:	0bfd      	bt      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+		if((IO_MODE==0)&&((Selete_EXI_x==16)||((Selete_EXI_x==17))))						//PA0.0~PA0.7
+    1f88:	3840      	cmpnei      	r0, 0
+    1f8a:	0814      	bt      	0x1fb2	// 1fb2 <GPIO_IntGroup_Set+0xd2>
+    1f8c:	3300      	movi      	r3, 0
+    1f8e:	2b0f      	subi      	r3, 16
+    1f90:	60c8      	addu      	r3, r2
+    1f92:	3b01      	cmphsi      	r3, 2
+    1f94:	0bf6      	bt      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+			if(Selete_EXI_x==16)
+    1f96:	3a50      	cmpnei      	r2, 16
+    1f98:	106f      	lrw      	r3, 0x20000044	// 1fd4 <GPIO_IntGroup_Set+0xf4>
+    1f9a:	0806      	bt      	0x1fa6	// 1fa6 <GPIO_IntGroup_Set+0xc6>
+				GPIOGRP->IGREX =(GPIOGRP->IGREX)|PinNum;
+    1f9c:	9340      	ld.w      	r2, (r3, 0x0)
+    1f9e:	9262      	ld.w      	r3, (r2, 0x8)
+    1fa0:	6c4c      	or      	r1, r3
+    1fa2:	b222      	st.w      	r1, (r2, 0x8)
+    1fa4:	07ee      	br      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<4);
+    1fa6:	9360      	ld.w      	r3, (r3, 0x0)
+    1fa8:	9342      	ld.w      	r2, (r3, 0x8)
+    1faa:	4124      	lsli      	r1, r1, 4
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+    1fac:	6c48      	or      	r1, r2
+    1fae:	b322      	st.w      	r1, (r3, 0x8)
+}
+    1fb0:	07e8      	br      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+		else if((IO_MODE==2)&&((Selete_EXI_x==18)||(Selete_EXI_x==19)))					//PB0.0~PB0.3
+    1fb2:	3842      	cmpnei      	r0, 2
+    1fb4:	0be6      	bt      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+    1fb6:	3300      	movi      	r3, 0
+    1fb8:	2b11      	subi      	r3, 18
+    1fba:	60c8      	addu      	r3, r2
+    1fbc:	3b01      	cmphsi      	r3, 2
+    1fbe:	0be1      	bt      	0x1f80	// 1f80 <GPIO_IntGroup_Set+0xa0>
+    1fc0:	1065      	lrw      	r3, 0x20000044	// 1fd4 <GPIO_IntGroup_Set+0xf4>
+			if(Selete_EXI_x==18)
+    1fc2:	3a52      	cmpnei      	r2, 18
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+    1fc4:	9360      	ld.w      	r3, (r3, 0x0)
+    1fc6:	9342      	ld.w      	r2, (r3, 0x8)
+			if(Selete_EXI_x==18)
+    1fc8:	0803      	bt      	0x1fce	// 1fce <GPIO_IntGroup_Set+0xee>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<8);
+    1fca:	4128      	lsli      	r1, r1, 8
+    1fcc:	07f0      	br      	0x1fac	// 1fac <GPIO_IntGroup_Set+0xcc>
+				GPIOGRP->IGREX=(GPIOGRP->IGREX)|(PinNum<<12);
+    1fce:	412c      	lsli      	r1, r1, 12
+    1fd0:	07ee      	br      	0x1fac	// 1fac <GPIO_IntGroup_Set+0xcc>
+    1fd2:	0000      	bkpt
+    1fd4:	20000044 	.long	0x20000044
+    1fd8:	fffff0ff 	.long	0xfffff0ff
+    1fdc:	ffff0fff 	.long	0xffff0fff
+    1fe0:	fff10000 	.long	0xfff10000
+    1fe4:	ff100000 	.long	0xff100000
+    1fe8:	0fffffff 	.long	0x0fffffff
+
+Disassembly of section .text.GPIOA0_EXI_Init:
+
+00001fec <GPIOA0_EXI_Init>:
+//IO EXI SET 
+//EntryParameter:EXI_IO(EXI0~EXI13)
+//ReturnValue:NONE
+/*************************************************************/  
+void GPIOA0_EXI_Init(GPIO_EXI_TypeDef EXI_IO)
+{
+    1fec:	14d0      	push      	r15
+    switch (EXI_IO)
+    1fee:	380f      	cmphsi      	r0, 16
+    1ff0:	0812      	bt      	0x2014	// 2014 <GPIOA0_EXI_Init+0x28>
+    1ff2:	117d      	lrw      	r3, 0x2000004c	// 20e4 <GPIOA0_EXI_Init+0xf8>
+    1ff4:	e3fff684 	bsr      	0xcfc	// cfc <___gnu_csky_case_uqi>
+    1ff8:	1d150f08 	.long	0x1d150f08
+    1ffc:	39322b24 	.long	0x39322b24
+    2000:	544c463f 	.long	0x544c463f
+    2004:	7069625b 	.long	0x7069625b
+    {
+        case 0:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFFF0) | 0X00000001;break;
+    2008:	9340      	ld.w      	r2, (r3, 0x0)
+    200a:	9260      	ld.w      	r3, (r2, 0x0)
+    200c:	310f      	movi      	r1, 15
+    200e:	68c5      	andn      	r3, r1
+    2010:	3ba0      	bseti      	r3, 0
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+    2012:	b260      	st.w      	r3, (r2, 0x0)
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    }
+}
+    2014:	1490      	pop      	r15
+        case 1:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF0F) | 0X00000010;break;
+    2016:	9340      	ld.w      	r2, (r3, 0x0)
+    2018:	9260      	ld.w      	r3, (r2, 0x0)
+    201a:	31f0      	movi      	r1, 240
+    201c:	68c5      	andn      	r3, r1
+    201e:	3ba4      	bseti      	r3, 4
+    2020:	07f9      	br      	0x2012	// 2012 <GPIOA0_EXI_Init+0x26>
+        case 2:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFF0FF) | 0X00000100;break;
+    2022:	9320      	ld.w      	r1, (r3, 0x0)
+    2024:	32f0      	movi      	r2, 240
+    2026:	9160      	ld.w      	r3, (r1, 0x0)
+    2028:	4244      	lsli      	r2, r2, 4
+    202a:	68c9      	andn      	r3, r2
+    202c:	3ba8      	bseti      	r3, 8
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+    202e:	b160      	st.w      	r3, (r1, 0x0)
+    2030:	07f2      	br      	0x2014	// 2014 <GPIOA0_EXI_Init+0x28>
+        case 3:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFF0FFF) | 0X00001000;break;
+    2032:	9320      	ld.w      	r1, (r3, 0x0)
+    2034:	32f0      	movi      	r2, 240
+    2036:	9160      	ld.w      	r3, (r1, 0x0)
+    2038:	4248      	lsli      	r2, r2, 8
+    203a:	68c9      	andn      	r3, r2
+    203c:	3bac      	bseti      	r3, 12
+    203e:	07f8      	br      	0x202e	// 202e <GPIOA0_EXI_Init+0x42>
+        case 4:GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF0FFFF) | 0X00010000;break;
+    2040:	9320      	ld.w      	r1, (r3, 0x0)
+    2042:	32f0      	movi      	r2, 240
+    2044:	9160      	ld.w      	r3, (r1, 0x0)
+    2046:	424c      	lsli      	r2, r2, 12
+    2048:	68c9      	andn      	r3, r2
+    204a:	3bb0      	bseti      	r3, 16
+    204c:	07f1      	br      	0x202e	// 202e <GPIOA0_EXI_Init+0x42>
+        case 5:GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF) | 0X00100000;break;
+    204e:	9320      	ld.w      	r1, (r3, 0x0)
+    2050:	32f0      	movi      	r2, 240
+    2052:	9160      	ld.w      	r3, (r1, 0x0)
+    2054:	4250      	lsli      	r2, r2, 16
+    2056:	68c9      	andn      	r3, r2
+    2058:	3bb4      	bseti      	r3, 20
+    205a:	07ea      	br      	0x202e	// 202e <GPIOA0_EXI_Init+0x42>
+        case 6:GPIOA0->CONLR = (GPIOA0->CONLR&0XF0FFFFFF) | 0X01000000;break;
+    205c:	9320      	ld.w      	r1, (r3, 0x0)
+    205e:	32f0      	movi      	r2, 240
+    2060:	9160      	ld.w      	r3, (r1, 0x0)
+    2062:	4254      	lsli      	r2, r2, 20
+    2064:	68c9      	andn      	r3, r2
+    2066:	3bb8      	bseti      	r3, 24
+    2068:	07e3      	br      	0x202e	// 202e <GPIOA0_EXI_Init+0x42>
+        case 7:GPIOA0->CONLR = (GPIOA0->CONLR&0X0FFFFFFF) | 0X10000000;break;
+    206a:	9340      	ld.w      	r2, (r3, 0x0)
+    206c:	9260      	ld.w      	r3, (r2, 0x0)
+    206e:	4364      	lsli      	r3, r3, 4
+    2070:	4b64      	lsri      	r3, r3, 4
+    2072:	3bbc      	bseti      	r3, 28
+    2074:	07cf      	br      	0x2012	// 2012 <GPIOA0_EXI_Init+0x26>
+        case 8:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFFF0) | 0X00000001;break;
+    2076:	9340      	ld.w      	r2, (r3, 0x0)
+    2078:	9261      	ld.w      	r3, (r2, 0x4)
+    207a:	310f      	movi      	r1, 15
+    207c:	68c5      	andn      	r3, r1
+    207e:	3ba0      	bseti      	r3, 0
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    2080:	b261      	st.w      	r3, (r2, 0x4)
+}
+    2082:	07c9      	br      	0x2014	// 2014 <GPIOA0_EXI_Init+0x28>
+        case 9:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFFF0F) | 0X00000010;break;
+    2084:	9340      	ld.w      	r2, (r3, 0x0)
+    2086:	9261      	ld.w      	r3, (r2, 0x4)
+    2088:	31f0      	movi      	r1, 240
+    208a:	68c5      	andn      	r3, r1
+    208c:	3ba4      	bseti      	r3, 4
+    208e:	07f9      	br      	0x2080	// 2080 <GPIOA0_EXI_Init+0x94>
+        case 10:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFFF0FF) | 0X00000100;break;
+    2090:	9320      	ld.w      	r1, (r3, 0x0)
+    2092:	32f0      	movi      	r2, 240
+    2094:	9161      	ld.w      	r3, (r1, 0x4)
+    2096:	4244      	lsli      	r2, r2, 4
+    2098:	68c9      	andn      	r3, r2
+    209a:	3ba8      	bseti      	r3, 8
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+    209c:	b161      	st.w      	r3, (r1, 0x4)
+    209e:	07bb      	br      	0x2014	// 2014 <GPIOA0_EXI_Init+0x28>
+        case 11:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFFF0FFF) | 0X00001000;break;
+    20a0:	9320      	ld.w      	r1, (r3, 0x0)
+    20a2:	32f0      	movi      	r2, 240
+    20a4:	9161      	ld.w      	r3, (r1, 0x4)
+    20a6:	4248      	lsli      	r2, r2, 8
+    20a8:	68c9      	andn      	r3, r2
+    20aa:	3bac      	bseti      	r3, 12
+    20ac:	07f8      	br      	0x209c	// 209c <GPIOA0_EXI_Init+0xb0>
+        case 12:GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF) | 0X00010000;break;
+    20ae:	9320      	ld.w      	r1, (r3, 0x0)
+    20b0:	32f0      	movi      	r2, 240
+    20b2:	9161      	ld.w      	r3, (r1, 0x4)
+    20b4:	424c      	lsli      	r2, r2, 12
+    20b6:	68c9      	andn      	r3, r2
+    20b8:	3bb0      	bseti      	r3, 16
+    20ba:	07f1      	br      	0x209c	// 209c <GPIOA0_EXI_Init+0xb0>
+        case 13:GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF) | 0X00100000;break;
+    20bc:	9320      	ld.w      	r1, (r3, 0x0)
+    20be:	32f0      	movi      	r2, 240
+    20c0:	9161      	ld.w      	r3, (r1, 0x4)
+    20c2:	4250      	lsli      	r2, r2, 16
+    20c4:	68c9      	andn      	r3, r2
+    20c6:	3bb4      	bseti      	r3, 20
+    20c8:	07ea      	br      	0x209c	// 209c <GPIOA0_EXI_Init+0xb0>
+		case 14:GPIOA0->CONHR = (GPIOA0->CONHR&0XF0FFFFFF) | 0X01000000;break;
+    20ca:	9320      	ld.w      	r1, (r3, 0x0)
+    20cc:	32f0      	movi      	r2, 240
+    20ce:	9161      	ld.w      	r3, (r1, 0x4)
+    20d0:	4254      	lsli      	r2, r2, 20
+    20d2:	68c9      	andn      	r3, r2
+    20d4:	3bb8      	bseti      	r3, 24
+    20d6:	07e3      	br      	0x209c	// 209c <GPIOA0_EXI_Init+0xb0>
+		case 15:GPIOA0->CONHR = (GPIOA0->CONHR&0X0FFFFFFF) | 0X10000000;break;
+    20d8:	9340      	ld.w      	r2, (r3, 0x0)
+    20da:	9261      	ld.w      	r3, (r2, 0x4)
+    20dc:	4364      	lsli      	r3, r3, 4
+    20de:	4b64      	lsri      	r3, r3, 4
+    20e0:	3bbc      	bseti      	r3, 28
+    20e2:	07cf      	br      	0x2080	// 2080 <GPIOA0_EXI_Init+0x94>
+    20e4:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPIO_Write_High:
+
+000020e8 <GPIO_Write_High>:
+//bit:0~15
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->SODR = (1ul<<bit);
+    20e8:	3301      	movi      	r3, 1
+    20ea:	70c4      	lsl      	r3, r1
+    20ec:	b063      	st.w      	r3, (r0, 0xc)
+}
+    20ee:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Write_Low:
+
+000020f0 <GPIO_Write_Low>:
+void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+        (GPIOx)->CODR = (1ul<<bit);
+    20f0:	3301      	movi      	r3, 1
+    20f2:	70c4      	lsl      	r3, r1
+    20f4:	b064      	st.w      	r3, (r0, 0x10)
+}
+    20f6:	783c      	jmp      	r15
+
+Disassembly of section .text.GPIO_Reverse:
+
+000020f8 <GPIO_Reverse>:
+//ReturnValue:VALUE
+/*************************************************************/
+void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+     uint32_t dat = 0;
+     dat=((GPIOx)->ODSR>>bit)&1ul;
+    20f8:	9045      	ld.w      	r2, (r0, 0x14)
+    20fa:	3301      	movi      	r3, 1
+    20fc:	7085      	lsr      	r2, r1
+    20fe:	688c      	and      	r2, r3
+     {
+       if (dat==1)  
+    2100:	3a40      	cmpnei      	r2, 0
+    2102:	70c4      	lsl      	r3, r1
+    2104:	0c03      	bf      	0x210a	// 210a <GPIO_Reverse+0x12>
+       {
+           (GPIOx)->CODR = (1ul<<bit);
+    2106:	b064      	st.w      	r3, (r0, 0x10)
+       {
+           (GPIOx)->SODR = (1ul<<bit);
+           return;
+       }
+     }
+}
+    2108:	783c      	jmp      	r15
+           (GPIOx)->SODR = (1ul<<bit);
+    210a:	b063      	st.w      	r3, (r0, 0xc)
+           return;
+    210c:	07fe      	br      	0x2108	// 2108 <GPIO_Reverse+0x10>
+
+Disassembly of section .text.GPIO_Read_Status:
+
+0000210e <GPIO_Read_Status>:
+/*************************************************************/
+uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit)
+{
+    uint8_t value = 0;
+    uint32_t dat = 0;
+    dat=((GPIOx)->PSDR)&(1<<bit);
+    210e:	3301      	movi      	r3, 1
+    2110:	9046      	ld.w      	r2, (r0, 0x18)
+    2112:	70c4      	lsl      	r3, r1
+    2114:	688c      	and      	r2, r3
+    if (dat == (1<<bit))								
+    2116:	64ca      	cmpne      	r2, r3
+    2118:	6403      	mvcv      	r0
+	{
+	    value = 1;
+	} 
+    return value;
+    211a:	7400      	zextb      	r0, r0
+}
+    211c:	783c      	jmp      	r15
+
+Disassembly of section .text.LPT_Soft_Reset:
+
+00002120 <LPT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void LPT_Soft_Reset(void)
+{
+	LPT->RSSR |= (0X5<<12);
+    2120:	1064      	lrw      	r3, 0x20000014	// 2130 <LPT_Soft_Reset+0x10>
+    2122:	9340      	ld.w      	r2, (r3, 0x0)
+    2124:	9261      	ld.w      	r3, (r2, 0x4)
+    2126:	3bac      	bseti      	r3, 12
+    2128:	3bae      	bseti      	r3, 14
+    212a:	b261      	st.w      	r3, (r2, 0x4)
+}
+    212c:	783c      	jmp      	r15
+    212e:	0000      	bkpt
+    2130:	20000014 	.long	0x20000014
+
+Disassembly of section .text.WWDT_CNT_Load:
+
+00002134 <WWDT_CNT_Load>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void WWDT_CNT_Load(U8_T cnt_data)
+{
+	WWDT->CR  |= cnt_data;						//SET
+    2134:	1063      	lrw      	r3, 0x20000010	// 2140 <WWDT_CNT_Load+0xc>
+    2136:	9360      	ld.w      	r3, (r3, 0x0)
+    2138:	9340      	ld.w      	r2, (r3, 0x0)
+    213a:	6c08      	or      	r0, r2
+    213c:	b300      	st.w      	r0, (r3, 0x0)
+}
+    213e:	783c      	jmp      	r15
+    2140:	20000010 	.long	0x20000010
+
+Disassembly of section .text.BT_DeInit:
+
+00002144 <BT_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/    
+void BT_DeInit(CSP_BT_T *BTx)
+{
+	BTx->RSSR=BT_RESET_VALUE;
+    2144:	3300      	movi      	r3, 0
+    2146:	b060      	st.w      	r3, (r0, 0x0)
+	BTx->CR=BT_RESET_VALUE;
+    2148:	b061      	st.w      	r3, (r0, 0x4)
+	BTx->PSCR=BT_RESET_VALUE;
+    214a:	b062      	st.w      	r3, (r0, 0x8)
+	BTx->PRDR=BT_RESET_VALUE;
+    214c:	b063      	st.w      	r3, (r0, 0xc)
+	BTx->CMP=BT_RESET_VALUE;
+    214e:	b064      	st.w      	r3, (r0, 0x10)
+	BTx->CNT=BT_RESET_VALUE;
+    2150:	b065      	st.w      	r3, (r0, 0x14)
+	BTx->EVTRG=BT_RESET_VALUE;
+    2152:	b066      	st.w      	r3, (r0, 0x18)
+	BTx->EVSWF=BT_RESET_VALUE;
+    2154:	b069      	st.w      	r3, (r0, 0x24)
+	BTx->RISR=BT_RESET_VALUE;
+    2156:	b06a      	st.w      	r3, (r0, 0x28)
+	BTx->IMCR=BT_RESET_VALUE;
+    2158:	b06b      	st.w      	r3, (r0, 0x2c)
+	BTx->MISR=BT_RESET_VALUE;
+    215a:	b06c      	st.w      	r3, (r0, 0x30)
+	BTx->ICR=BT_RESET_VALUE;
+    215c:	b06d      	st.w      	r3, (r0, 0x34)
+}
+    215e:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Start:
+
+00002160 <BT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Start(CSP_BT_T *BTx)
+{
+	BTx->RSSR |=0X01;
+    2160:	9060      	ld.w      	r3, (r0, 0x0)
+    2162:	3ba0      	bseti      	r3, 0
+    2164:	b060      	st.w      	r3, (r0, 0x0)
+}
+    2166:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Soft_Reset:
+
+00002168 <BT_Soft_Reset>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_Soft_Reset(CSP_BT_T *BTx)
+{
+	BTx->RSSR |= (0X5<<12);
+    2168:	9060      	ld.w      	r3, (r0, 0x0)
+    216a:	3bac      	bseti      	r3, 12
+    216c:	3bae      	bseti      	r3, 14
+    216e:	b060      	st.w      	r3, (r0, 0x0)
+}
+    2170:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_Configure:
+
+00002172 <BT_Configure>:
+//BT Configure
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM)
+{
+    2172:	14c3      	push      	r4-r6
+    2174:	98a4      	ld.w      	r5, (r14, 0x10)
+    2176:	6d97      	mov      	r6, r5
+    2178:	9883      	ld.w      	r4, (r14, 0xc)
+	BTx->CR |=BTCLK| BTSHDWSTP| BTOPM| BTEXTCKM;
+    217a:	6d18      	or      	r4, r6
+    217c:	6cd0      	or      	r3, r4
+    217e:	90a1      	ld.w      	r5, (r0, 0x4)
+    2180:	6c4c      	or      	r1, r3
+    2182:	6c54      	or      	r1, r5
+    2184:	b021      	st.w      	r1, (r0, 0x4)
+	BTx->PSCR = PSCR_DATA;
+    2186:	b042      	st.w      	r2, (r0, 0x8)
+}
+    2188:	1483      	pop      	r4-r6
+
+Disassembly of section .text.BT_ControlSet_Configure:
+
+0000218a <BT_ControlSet_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD)
+{
+    218a:	14c4      	push      	r4-r7
+    218c:	1421      	subi      	r14, r14, 4
+    218e:	9885      	ld.w      	r4, (r14, 0x14)
+    2190:	6dd3      	mov      	r7, r4
+    2192:	9886      	ld.w      	r4, (r14, 0x18)
+    2194:	b880      	st.w      	r4, (r14, 0x0)
+    2196:	9887      	ld.w      	r4, (r14, 0x1c)
+    2198:	6d93      	mov      	r6, r4
+    219a:	98a8      	ld.w      	r5, (r14, 0x20)
+	BTx->CR |=BTSTART| BTIDLE| BTSYNC| BTSYNCMD| BTOSTMD| BTAREARM| BTCNTRLD;
+    219c:	6d58      	or      	r5, r6
+    219e:	98c0      	ld.w      	r6, (r14, 0x0)
+    21a0:	6d58      	or      	r5, r6
+    21a2:	6d5c      	or      	r5, r7
+    21a4:	6cd4      	or      	r3, r5
+    21a6:	6c8c      	or      	r2, r3
+    21a8:	9081      	ld.w      	r4, (r0, 0x4)
+    21aa:	6c48      	or      	r1, r2
+    21ac:	6d04      	or      	r4, r1
+    21ae:	6d9f      	mov      	r6, r7
+    21b0:	b081      	st.w      	r4, (r0, 0x4)
+}
+    21b2:	1401      	addi      	r14, r14, 4
+    21b4:	1484      	pop      	r4-r7
+
+Disassembly of section .text.BT_Period_CMP_Write:
+
+000021b6 <BT_Period_CMP_Write>:
+//ReturnValue:NONE
+/*************************************************************/
+void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA)
+{
+	//BTx->CR|=0X01<<2;
+	BTx->PRDR =BTPRDR_DATA;
+    21b6:	b023      	st.w      	r1, (r0, 0xc)
+	BTx->CMP =BTCMP_DATA;
+    21b8:	b044      	st.w      	r2, (r0, 0x10)
+}
+    21ba:	783c      	jmp      	r15
+
+Disassembly of section .text.BT_ConfigInterrupt_CMD:
+
+000021bc <BT_ConfigInterrupt_CMD>:
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X)
+{
+	if (NewState != DISABLE)
+    21bc:	3940      	cmpnei      	r1, 0
+	{
+		BTx->IMCR  |= BT_IMSCR_X;						
+    21be:	906b      	ld.w      	r3, (r0, 0x2c)
+	if (NewState != DISABLE)
+    21c0:	0c04      	bf      	0x21c8	// 21c8 <BT_ConfigInterrupt_CMD+0xc>
+		BTx->IMCR  |= BT_IMSCR_X;						
+    21c2:	6c8c      	or      	r2, r3
+    21c4:	b04b      	st.w      	r2, (r0, 0x2c)
+	}
+	else
+	{
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+	}
+}
+    21c6:	783c      	jmp      	r15
+		BTx->IMCR  &= ~BT_IMSCR_X;					
+    21c8:	68c9      	andn      	r3, r2
+    21ca:	b06b      	st.w      	r3, (r0, 0x2c)
+}
+    21cc:	07fd      	br      	0x21c6	// 21c6 <BT_ConfigInterrupt_CMD+0xa>
+
+Disassembly of section .text.BT1_INT_ENABLE:
+
+000021d0 <BT1_INT_ENABLE>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1_INT_ENABLE(void)
+{
+	INTC_ISER_WRITE(BT1_INT);
+    21d0:	3380      	movi      	r3, 128
+    21d2:	4376      	lsli      	r3, r3, 22
+    21d4:	1042      	lrw      	r2, 0xe000e100	// 21dc <BT1_INT_ENABLE+0xc>
+    21d6:	b260      	st.w      	r3, (r2, 0x0)
+}
+    21d8:	783c      	jmp      	r15
+    21da:	0000      	bkpt
+    21dc:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.GPT_IO_Init:
+
+000021e0 <GPT_IO_Init>:
+//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
+{
+	if(IONAME==GPT_CHA_PB01)
+    21e0:	3840      	cmpnei      	r0, 0
+    21e2:	080a      	bt      	0x21f6	// 21f6 <GPT_IO_Init+0x16>
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
+    21e4:	1165      	lrw      	r3, 0x20000048	// 2278 <GPT_IO_Init+0x98>
+    21e6:	31f0      	movi      	r1, 240
+    21e8:	9340      	ld.w      	r2, (r3, 0x0)
+    21ea:	9260      	ld.w      	r3, (r2, 0x0)
+    21ec:	68c5      	andn      	r3, r1
+    21ee:	3ba4      	bseti      	r3, 4
+    21f0:	3ba6      	bseti      	r3, 6
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+	}
+	if(IONAME==GPT_CHB_PB01)
+	{
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    21f2:	b260      	st.w      	r3, (r2, 0x0)
+	}
+}
+    21f4:	040b      	br      	0x220a	// 220a <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHA_PA09)
+    21f6:	3841      	cmpnei      	r0, 1
+    21f8:	080a      	bt      	0x220c	// 220c <GPT_IO_Init+0x2c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
+    21fa:	1161      	lrw      	r3, 0x2000004c	// 227c <GPT_IO_Init+0x9c>
+    21fc:	31f0      	movi      	r1, 240
+    21fe:	9340      	ld.w      	r2, (r3, 0x0)
+    2200:	9261      	ld.w      	r3, (r2, 0x4)
+    2202:	68c5      	andn      	r3, r1
+    2204:	3ba4      	bseti      	r3, 4
+    2206:	3ba6      	bseti      	r3, 6
+    2208:	b261      	st.w      	r3, (r2, 0x4)
+}
+    220a:	783c      	jmp      	r15
+	if(IONAME==GPT_CHA_PA010)
+    220c:	3842      	cmpnei      	r0, 2
+    220e:	080b      	bt      	0x2224	// 2224 <GPT_IO_Init+0x44>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
+    2210:	107b      	lrw      	r3, 0x2000004c	// 227c <GPT_IO_Init+0x9c>
+    2212:	32f0      	movi      	r2, 240
+    2214:	9320      	ld.w      	r1, (r3, 0x0)
+    2216:	9161      	ld.w      	r3, (r1, 0x4)
+    2218:	4244      	lsli      	r2, r2, 4
+    221a:	68c9      	andn      	r3, r2
+    221c:	3ba9      	bseti      	r3, 9
+    221e:	3baa      	bseti      	r3, 10
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    2220:	b161      	st.w      	r3, (r1, 0x4)
+    2222:	07f4      	br      	0x220a	// 220a <GPT_IO_Init+0x2a>
+	if(IONAME==GPT_CHB_PA010)
+    2224:	3843      	cmpnei      	r0, 3
+    2226:	080b      	bt      	0x223c	// 223c <GPT_IO_Init+0x5c>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
+    2228:	1075      	lrw      	r3, 0x2000004c	// 227c <GPT_IO_Init+0x9c>
+    222a:	32f0      	movi      	r2, 240
+    222c:	9320      	ld.w      	r1, (r3, 0x0)
+    222e:	4244      	lsli      	r2, r2, 4
+    2230:	9161      	ld.w      	r3, (r1, 0x4)
+    2232:	68c9      	andn      	r3, r2
+    2234:	32e0      	movi      	r2, 224
+    2236:	4243      	lsli      	r2, r2, 3
+    2238:	6cc8      	or      	r3, r2
+    223a:	07f3      	br      	0x2220	// 2220 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PA011)
+    223c:	3844      	cmpnei      	r0, 4
+    223e:	080a      	bt      	0x2252	// 2252 <GPT_IO_Init+0x72>
+		GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
+    2240:	106f      	lrw      	r3, 0x2000004c	// 227c <GPT_IO_Init+0x9c>
+    2242:	32f0      	movi      	r2, 240
+    2244:	9320      	ld.w      	r1, (r3, 0x0)
+    2246:	9161      	ld.w      	r3, (r1, 0x4)
+    2248:	4248      	lsli      	r2, r2, 8
+    224a:	68c9      	andn      	r3, r2
+    224c:	3bad      	bseti      	r3, 13
+    224e:	3bae      	bseti      	r3, 14
+    2250:	07e8      	br      	0x2220	// 2220 <GPT_IO_Init+0x40>
+	if(IONAME==GPT_CHB_PB00)
+    2252:	3845      	cmpnei      	r0, 5
+    2254:	0808      	bt      	0x2264	// 2264 <GPT_IO_Init+0x84>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
+    2256:	1069      	lrw      	r3, 0x20000048	// 2278 <GPT_IO_Init+0x98>
+    2258:	310f      	movi      	r1, 15
+    225a:	9340      	ld.w      	r2, (r3, 0x0)
+    225c:	9260      	ld.w      	r3, (r2, 0x0)
+    225e:	68c5      	andn      	r3, r1
+    2260:	3ba2      	bseti      	r3, 2
+    2262:	07c8      	br      	0x21f2	// 21f2 <GPT_IO_Init+0x12>
+	if(IONAME==GPT_CHB_PB01)
+    2264:	3846      	cmpnei      	r0, 6
+    2266:	0bd2      	bt      	0x220a	// 220a <GPT_IO_Init+0x2a>
+		GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
+    2268:	1064      	lrw      	r3, 0x20000048	// 2278 <GPT_IO_Init+0x98>
+    226a:	31f0      	movi      	r1, 240
+    226c:	9340      	ld.w      	r2, (r3, 0x0)
+    226e:	9260      	ld.w      	r3, (r2, 0x0)
+    2270:	68c5      	andn      	r3, r1
+    2272:	3ba5      	bseti      	r3, 5
+    2274:	3ba6      	bseti      	r3, 6
+    2276:	07be      	br      	0x21f2	// 21f2 <GPT_IO_Init+0x12>
+    2278:	20000048 	.long	0x20000048
+    227c:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.GPT_Configure:
+
+00002280 <GPT_Configure>:
+//GPT Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
+{
+    2280:	14c1      	push      	r4
+	GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
+    2282:	6c48      	or      	r1, r2
+    2284:	1083      	lrw      	r4, 0x20000024	// 2290 <GPT_Configure+0x10>
+    2286:	6c04      	or      	r0, r1
+    2288:	9480      	ld.w      	r4, (r4, 0x0)
+    228a:	b400      	st.w      	r0, (r4, 0x0)
+	GPT0->PSCR=GPSCX;
+    228c:	b462      	st.w      	r3, (r4, 0x8)
+}
+    228e:	1481      	pop      	r4
+    2290:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveCtrl_Configure:
+
+00002294 <GPT_WaveCtrl_Configure>:
+/*************************************************************/
+//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;	
+//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
+void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
+{
+    2294:	14c4      	push      	r4-r7
+    2296:	1423      	subi      	r14, r14, 12
+    2298:	9887      	ld.w      	r4, (r14, 0x1c)
+    229a:	6dd3      	mov      	r7, r4
+    229c:	9888      	ld.w      	r4, (r14, 0x20)
+    229e:	b880      	st.w      	r4, (r14, 0x0)
+    22a0:	9889      	ld.w      	r4, (r14, 0x24)
+    22a2:	b881      	st.w      	r4, (r14, 0x4)
+    22a4:	988a      	ld.w      	r4, (r14, 0x28)
+    22a6:	b882      	st.w      	r4, (r14, 0x8)
+    22a8:	988b      	ld.w      	r4, (r14, 0x2c)
+    22aa:	6d93      	mov      	r6, r4
+    22ac:	988c      	ld.w      	r4, (r14, 0x30)
+	GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
+    22ae:	3cb2      	bseti      	r4, 18
+    22b0:	6d18      	or      	r4, r6
+    22b2:	98c2      	ld.w      	r6, (r14, 0x8)
+    22b4:	6d18      	or      	r4, r6
+    22b6:	98c1      	ld.w      	r6, (r14, 0x4)
+    22b8:	6d18      	or      	r4, r6
+    22ba:	98c0      	ld.w      	r6, (r14, 0x0)
+    22bc:	6d18      	or      	r4, r6
+    22be:	6d1c      	or      	r4, r7
+    22c0:	6cd0      	or      	r3, r4
+    22c2:	6c8c      	or      	r2, r3
+    22c4:	6c48      	or      	r1, r2
+    22c6:	10a4      	lrw      	r5, 0x20000024	// 22d4 <GPT_WaveCtrl_Configure+0x40>
+    22c8:	6c04      	or      	r0, r1
+    22ca:	95a0      	ld.w      	r5, (r5, 0x0)
+    22cc:	6d9f      	mov      	r6, r7
+    22ce:	b503      	st.w      	r0, (r5, 0xc)
+}
+    22d0:	1403      	addi      	r14, r14, 12
+    22d2:	1484      	pop      	r4-r7
+    22d4:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveLoad_Configure:
+
+000022d8 <GPT_WaveLoad_Configure>:
+//GPT Wave control Init
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
+{
+    22d8:	14c1      	push      	r4
+	GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
+    22da:	6c8c      	or      	r2, r3
+    22dc:	6c48      	or      	r1, r2
+    22de:	1083      	lrw      	r4, 0x20000024	// 22e8 <GPT_WaveLoad_Configure+0x10>
+    22e0:	6c04      	or      	r0, r1
+    22e2:	9480      	ld.w      	r4, (r4, 0x0)
+    22e4:	b411      	st.w      	r0, (r4, 0x44)
+}
+    22e6:	1481      	pop      	r4
+    22e8:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_WaveOut_Configure:
+
+000022ec <GPT_WaveOut_Configure>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
+{
+    22ec:	14c4      	push      	r4-r7
+    22ee:	1425      	subi      	r14, r14, 20
+    22f0:	1c09      	addi      	r4, r14, 36
+    22f2:	8480      	ld.b      	r4, (r4, 0x0)
+    22f4:	b880      	st.w      	r4, (r14, 0x0)
+    22f6:	1c0a      	addi      	r4, r14, 40
+    22f8:	8480      	ld.b      	r4, (r4, 0x0)
+    22fa:	b881      	st.w      	r4, (r14, 0x4)
+    22fc:	1c0b      	addi      	r4, r14, 44
+    22fe:	8480      	ld.b      	r4, (r4, 0x0)
+    2300:	b882      	st.w      	r4, (r14, 0x8)
+    2302:	1c0c      	addi      	r4, r14, 48
+    2304:	8480      	ld.b      	r4, (r4, 0x0)
+    2306:	b883      	st.w      	r4, (r14, 0xc)
+    2308:	1c0d      	addi      	r4, r14, 52
+    230a:	8480      	ld.b      	r4, (r4, 0x0)
+    230c:	1e10      	addi      	r6, r14, 64
+    230e:	b884      	st.w      	r4, (r14, 0x10)
+    2310:	1d0f      	addi      	r5, r14, 60
+    2312:	1c0e      	addi      	r4, r14, 56
+    2314:	86e0      	ld.b      	r7, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    2316:	3840      	cmpnei      	r0, 0
+{
+    2318:	1e11      	addi      	r6, r14, 68
+    231a:	8480      	ld.b      	r4, (r4, 0x0)
+    231c:	85a0      	ld.b      	r5, (r5, 0x0)
+    231e:	86c0      	ld.b      	r6, (r6, 0x0)
+	if(GPTCHX==GPT_CHA)
+    2320:	081f      	bt      	0x235e	// 235e <GPT_WaveOut_Configure+0x72>
+	{
+	GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    2322:	47f0      	lsli      	r7, r7, 16
+    2324:	46d2      	lsli      	r6, r6, 18
+    2326:	45ae      	lsli      	r5, r5, 14
+    2328:	6dd8      	or      	r7, r6
+    232a:	6dd4      	or      	r7, r5
+    232c:	448c      	lsli      	r4, r4, 12
+    232e:	6dd0      	or      	r7, r4
+    2330:	9884      	ld.w      	r4, (r14, 0x10)
+    2332:	448a      	lsli      	r4, r4, 10
+    2334:	6dd0      	or      	r7, r4
+    2336:	9883      	ld.w      	r4, (r14, 0xc)
+    2338:	4488      	lsli      	r4, r4, 8
+    233a:	98a2      	ld.w      	r5, (r14, 0x8)
+    233c:	6d1c      	or      	r4, r7
+    233e:	45e6      	lsli      	r7, r5, 6
+    2340:	6d1c      	or      	r4, r7
+    2342:	6c90      	or      	r2, r4
+    2344:	6cc8      	or      	r3, r2
+    2346:	9841      	ld.w      	r2, (r14, 0x4)
+    2348:	4244      	lsli      	r2, r2, 4
+    234a:	6cc8      	or      	r3, r2
+    234c:	6c4c      	or      	r1, r3
+    234e:	9860      	ld.w      	r3, (r14, 0x0)
+    2350:	4362      	lsli      	r3, r3, 2
+    2352:	1013      	lrw      	r0, 0x20000024	// 239c <GPT_WaveOut_Configure+0xb0>
+    2354:	6c4c      	or      	r1, r3
+    2356:	9000      	ld.w      	r0, (r0, 0x0)
+    2358:	b032      	st.w      	r1, (r0, 0x48)
+	}
+	if(GPTCHX==GPT_CHB)
+	{
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+	}
+}
+    235a:	1405      	addi      	r14, r14, 20
+    235c:	1484      	pop      	r4-r7
+	if(GPTCHX==GPT_CHB)
+    235e:	3841      	cmpnei      	r0, 1
+    2360:	0bfd      	bt      	0x235a	// 235a <GPT_WaveOut_Configure+0x6e>
+	GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
+    2362:	47f0      	lsli      	r7, r7, 16
+    2364:	46d2      	lsli      	r6, r6, 18
+    2366:	45ae      	lsli      	r5, r5, 14
+    2368:	6dd8      	or      	r7, r6
+    236a:	6dd4      	or      	r7, r5
+    236c:	448c      	lsli      	r4, r4, 12
+    236e:	6dd0      	or      	r7, r4
+    2370:	9884      	ld.w      	r4, (r14, 0x10)
+    2372:	448a      	lsli      	r4, r4, 10
+    2374:	6dd0      	or      	r7, r4
+    2376:	9883      	ld.w      	r4, (r14, 0xc)
+    2378:	4488      	lsli      	r4, r4, 8
+    237a:	98a2      	ld.w      	r5, (r14, 0x8)
+    237c:	6d1c      	or      	r4, r7
+    237e:	45e6      	lsli      	r7, r5, 6
+    2380:	6d1c      	or      	r4, r7
+    2382:	6c90      	or      	r2, r4
+    2384:	6cc8      	or      	r3, r2
+    2386:	9841      	ld.w      	r2, (r14, 0x4)
+    2388:	4244      	lsli      	r2, r2, 4
+    238a:	6cc8      	or      	r3, r2
+    238c:	6c4c      	or      	r1, r3
+    238e:	9860      	ld.w      	r3, (r14, 0x0)
+    2390:	4362      	lsli      	r3, r3, 2
+    2392:	1003      	lrw      	r0, 0x20000024	// 239c <GPT_WaveOut_Configure+0xb0>
+    2394:	6c4c      	or      	r1, r3
+    2396:	9000      	ld.w      	r0, (r0, 0x0)
+    2398:	b033      	st.w      	r1, (r0, 0x4c)
+}
+    239a:	07e0      	br      	0x235a	// 235a <GPT_WaveOut_Configure+0x6e>
+    239c:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Start:
+
+000023a0 <GPT_Start>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_Start(void)
+{
+	GPT0->RSSR |= 0X01;
+    23a0:	1063      	lrw      	r3, 0x20000024	// 23ac <GPT_Start+0xc>
+    23a2:	9340      	ld.w      	r2, (r3, 0x0)
+    23a4:	9261      	ld.w      	r3, (r2, 0x4)
+    23a6:	3ba0      	bseti      	r3, 0
+    23a8:	b261      	st.w      	r3, (r2, 0x4)
+}
+    23aa:	783c      	jmp      	r15
+    23ac:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_Period_CMP_Write:
+
+000023b0 <GPT_Period_CMP_Write>:
+//EntryParameter:
+//ReturnValue:NONE
+/*************************************************************/
+void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
+{
+	GPT0->PRDR =PRDR_DATA;
+    23b0:	1063      	lrw      	r3, 0x20000024	// 23bc <GPT_Period_CMP_Write+0xc>
+    23b2:	9360      	ld.w      	r3, (r3, 0x0)
+    23b4:	b309      	st.w      	r0, (r3, 0x24)
+	GPT0->CMPA =CMPA_DATA;
+    23b6:	b32b      	st.w      	r1, (r3, 0x2c)
+	GPT0->CMPB =CMPB_DATA;
+    23b8:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    23ba:	783c      	jmp      	r15
+    23bc:	20000024 	.long	0x20000024
+
+Disassembly of section .text.GPT_ConfigInterrupt_CMD:
+
+000023c0 <GPT_ConfigInterrupt_CMD>:
+//EntryParameter:LPT_IMSCR_X,NewState
+//NewState:ENABLE,DISABLE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
+{
+    23c0:	1066      	lrw      	r3, 0x20000024	// 23d8 <GPT_ConfigInterrupt_CMD+0x18>
+	if (NewState != DISABLE)
+    23c2:	3840      	cmpnei      	r0, 0
+	{
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    23c4:	9360      	ld.w      	r3, (r3, 0x0)
+    23c6:	237f      	addi      	r3, 128
+    23c8:	9356      	ld.w      	r2, (r3, 0x58)
+	if (NewState != DISABLE)
+    23ca:	0c04      	bf      	0x23d2	// 23d2 <GPT_ConfigInterrupt_CMD+0x12>
+		GPT0->IMCR  |= GPT_IMSCR_X;						
+    23cc:	6c48      	or      	r1, r2
+    23ce:	b336      	st.w      	r1, (r3, 0x58)
+	}
+	else
+	{
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+	}
+}
+    23d0:	783c      	jmp      	r15
+		GPT0->IMCR  &= ~GPT_IMSCR_X;					
+    23d2:	6885      	andn      	r2, r1
+    23d4:	b356      	st.w      	r2, (r3, 0x58)
+}
+    23d6:	07fd      	br      	0x23d0	// 23d0 <GPT_ConfigInterrupt_CMD+0x10>
+    23d8:	20000024 	.long	0x20000024
+
+Disassembly of section .text.UART0_DeInit:
+
+000023dc <UART0_DeInit>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0_DeInit(void)
+{
+    UART0->DATA = UART_RESET_VALUE;
+    23dc:	1065      	lrw      	r3, 0x20000040	// 23f0 <UART0_DeInit+0x14>
+    23de:	3200      	movi      	r2, 0
+    23e0:	9360      	ld.w      	r3, (r3, 0x0)
+    23e2:	b340      	st.w      	r2, (r3, 0x0)
+    UART0->SR   = UART_RESET_VALUE;
+    23e4:	b341      	st.w      	r2, (r3, 0x4)
+    UART0->CTRL = UART_RESET_VALUE;
+    23e6:	b342      	st.w      	r2, (r3, 0x8)
+    UART0->ISR  = UART_RESET_VALUE;
+    23e8:	b343      	st.w      	r2, (r3, 0xc)
+    UART0->BRDIV =UART_RESET_VALUE;
+    23ea:	b344      	st.w      	r2, (r3, 0x10)
+}
+    23ec:	783c      	jmp      	r15
+    23ee:	0000      	bkpt
+    23f0:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1_DeInit:
+
+000023f4 <UART1_DeInit>:
+void UART1_DeInit(void)
+{
+    UART1->DATA = UART_RESET_VALUE;
+    23f4:	1065      	lrw      	r3, 0x2000003c	// 2408 <UART1_DeInit+0x14>
+    23f6:	3200      	movi      	r2, 0
+    23f8:	9360      	ld.w      	r3, (r3, 0x0)
+    23fa:	b340      	st.w      	r2, (r3, 0x0)
+    UART1->SR   = UART_RESET_VALUE;
+    23fc:	b341      	st.w      	r2, (r3, 0x4)
+    UART1->CTRL = UART_RESET_VALUE;
+    23fe:	b342      	st.w      	r2, (r3, 0x8)
+    UART1->ISR  = UART_RESET_VALUE;
+    2400:	b343      	st.w      	r2, (r3, 0xc)
+    UART1->BRDIV =UART_RESET_VALUE;
+    2402:	b344      	st.w      	r2, (r3, 0x10)
+}
+    2404:	783c      	jmp      	r15
+    2406:	0000      	bkpt
+    2408:	2000003c 	.long	0x2000003c
+
+Disassembly of section .text.UART2_DeInit:
+
+0000240c <UART2_DeInit>:
+void UART2_DeInit(void)
+{
+	UART2->DATA = UART_RESET_VALUE;
+    240c:	1065      	lrw      	r3, 0x20000038	// 2420 <UART2_DeInit+0x14>
+    240e:	3200      	movi      	r2, 0
+    2410:	9360      	ld.w      	r3, (r3, 0x0)
+    2412:	b340      	st.w      	r2, (r3, 0x0)
+    UART2->SR   = UART_RESET_VALUE;
+    2414:	b341      	st.w      	r2, (r3, 0x4)
+    UART2->CTRL = UART_RESET_VALUE;
+    2416:	b342      	st.w      	r2, (r3, 0x8)
+    UART2->ISR  = UART_RESET_VALUE;
+    2418:	b343      	st.w      	r2, (r3, 0xc)
+    UART2->BRDIV =UART_RESET_VALUE;
+    241a:	b344      	st.w      	r2, (r3, 0x10)
+}
+    241c:	783c      	jmp      	r15
+    241e:	0000      	bkpt
+    2420:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART1_Int_Enable:
+
+00002424 <UART1_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1_Int_Enable(void)
+{
+    UART1->ISR=0x0F;									//clear UART1 INT status
+    2424:	1065      	lrw      	r3, 0x2000003c	// 2438 <UART1_Int_Enable+0x14>
+    2426:	320f      	movi      	r2, 15
+    2428:	9360      	ld.w      	r3, (r3, 0x0)
+    242a:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART1_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    242c:	3380      	movi      	r3, 128
+    242e:	4367      	lsli      	r3, r3, 7
+    2430:	1043      	lrw      	r2, 0xe000e100	// 243c <UART1_Int_Enable+0x18>
+    2432:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2434:	783c      	jmp      	r15
+    2436:	0000      	bkpt
+    2438:	2000003c 	.long	0x2000003c
+    243c:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART2_Int_Enable:
+
+00002440 <UART2_Int_Enable>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2_Int_Enable(void)
+{
+    UART2->ISR=0x0F;									//clear UART1 INT status
+    2440:	1065      	lrw      	r3, 0x20000038	// 2454 <UART2_Int_Enable+0x14>
+    2442:	320f      	movi      	r2, 15
+    2444:	9360      	ld.w      	r3, (r3, 0x0)
+    2446:	b343      	st.w      	r2, (r3, 0xc)
+	INTC_ISER_WRITE(UART2_INT);							//INT Vector Enable UART0/1 Interrupt in CK802
+    2448:	3380      	movi      	r3, 128
+    244a:	4368      	lsli      	r3, r3, 8
+    244c:	1043      	lrw      	r2, 0xe000e100	// 2458 <UART2_Int_Enable+0x18>
+    244e:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2450:	783c      	jmp      	r15
+    2452:	0000      	bkpt
+    2454:	20000038 	.long	0x20000038
+    2458:	e000e100 	.long	0xe000e100
+
+Disassembly of section .text.UART_IO_Init:
+
+0000245c <UART_IO_Init>:
+//UART_IO_G:0 1
+//ReturnValue:NONE
+/*************************************************************/
+void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G)
+{
+    if (IO_UART_NUM==IO_UART0)
+    245c:	3840      	cmpnei      	r0, 0
+    245e:	0821      	bt      	0x24a0	// 24a0 <UART_IO_Init+0x44>
+    {
+		if(UART_IO_G==0)
+    2460:	3940      	cmpnei      	r1, 0
+    2462:	080a      	bt      	0x2476	// 2476 <UART_IO_Init+0x1a>
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000044;       //PA0.1->RXD0, PA0.0->TXD0
+    2464:	1177      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    2466:	31ff      	movi      	r1, 255
+    2468:	9340      	ld.w      	r2, (r3, 0x0)
+    246a:	9260      	ld.w      	r3, (r2, 0x0)
+    246c:	68c5      	andn      	r3, r1
+    246e:	3ba2      	bseti      	r3, 2
+    2470:	3ba6      	bseti      	r3, 6
+    }
+	 if (IO_UART_NUM==IO_UART2)
+    {
+        if(UART_IO_G==0)
+		{
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    2472:	b260      	st.w      	r3, (r2, 0x0)
+    2474:	0415      	br      	0x249e	// 249e <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    2476:	3941      	cmpnei      	r1, 1
+    2478:	0813      	bt      	0x249e	// 249e <UART_IO_Init+0x42>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFF0FFFFF)  | 0x00700000;      //PA0.5->RXD0, PA0.12->TXD0
+    247a:	1172      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    247c:	31f0      	movi      	r1, 240
+    247e:	9340      	ld.w      	r2, (r3, 0x0)
+    2480:	9260      	ld.w      	r3, (r2, 0x0)
+    2482:	4130      	lsli      	r1, r1, 16
+    2484:	68c5      	andn      	r3, r1
+    2486:	31e0      	movi      	r1, 224
+    2488:	412f      	lsli      	r1, r1, 15
+    248a:	6cc4      	or      	r3, r1
+    248c:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFFF0FFFF)  | 0x00070000;      
+    248e:	31f0      	movi      	r1, 240
+    2490:	9261      	ld.w      	r3, (r2, 0x4)
+    2492:	412c      	lsli      	r1, r1, 12
+    2494:	68c5      	andn      	r3, r1
+    2496:	31e0      	movi      	r1, 224
+    2498:	412b      	lsli      	r1, r1, 11
+    249a:	6cc4      	or      	r3, r1
+    249c:	b261      	st.w      	r3, (r2, 0x4)
+		else if(UART_IO_G==2)
+		{
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+		}
+    }
+}
+    249e:	783c      	jmp      	r15
+     if (IO_UART_NUM==IO_UART1)
+    24a0:	3841      	cmpnei      	r0, 1
+    24a2:	082d      	bt      	0x24fc	// 24fc <UART_IO_Init+0xa0>
+        if(UART_IO_G==0)
+    24a4:	3940      	cmpnei      	r1, 0
+    24a6:	0814      	bt      	0x24ce	// 24ce <UART_IO_Init+0x72>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFFFFFFF0)  | 0x00000007;       //PA0.13->RXD1, PB0.0->TXD1
+    24a8:	1167      	lrw      	r3, 0x20000048	// 2544 <UART_IO_Init+0xe8>
+    24aa:	310f      	movi      	r1, 15
+    24ac:	9340      	ld.w      	r2, (r3, 0x0)
+    24ae:	9260      	ld.w      	r3, (r2, 0x0)
+    24b0:	68c5      	andn      	r3, r1
+    24b2:	3107      	movi      	r1, 7
+    24b4:	6cc4      	or      	r3, r1
+    24b6:	b260      	st.w      	r3, (r2, 0x0)
+			GPIOA0->CONHR = (GPIOA0->CONHR&0XFF0FFFFF)  | 0x00700000;       
+    24b8:	32f0      	movi      	r2, 240
+    24ba:	1162      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    24bc:	4250      	lsli      	r2, r2, 16
+    24be:	9320      	ld.w      	r1, (r3, 0x0)
+    24c0:	9161      	ld.w      	r3, (r1, 0x4)
+    24c2:	68c9      	andn      	r3, r2
+    24c4:	32e0      	movi      	r2, 224
+    24c6:	424f      	lsli      	r2, r2, 15
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    24c8:	6cc8      	or      	r3, r2
+    24ca:	b161      	st.w      	r3, (r1, 0x4)
+    24cc:	07e9      	br      	0x249e	// 249e <UART_IO_Init+0x42>
+		else if(UART_IO_G==1)
+    24ce:	3941      	cmpnei      	r1, 1
+    24d0:	080c      	bt      	0x24e8	// 24e8 <UART_IO_Init+0x8c>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFF00FFF) | 0X00077000;        //PA0.4->RXD1, PA0.3->TXD1
+    24d2:	107c      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    24d4:	32ff      	movi      	r2, 255
+    24d6:	9320      	ld.w      	r1, (r3, 0x0)
+    24d8:	424c      	lsli      	r2, r2, 12
+    24da:	9160      	ld.w      	r3, (r1, 0x0)
+    24dc:	68c9      	andn      	r3, r2
+    24de:	32ee      	movi      	r2, 238
+    24e0:	424b      	lsli      	r2, r2, 11
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    24e2:	6cc8      	or      	r3, r2
+    24e4:	b160      	st.w      	r3, (r1, 0x0)
+}
+    24e6:	07dc      	br      	0x249e	// 249e <UART_IO_Init+0x42>
+		else if(UART_IO_G==2)
+    24e8:	3942      	cmpnei      	r1, 2
+    24ea:	0bda      	bt      	0x249e	// 249e <UART_IO_Init+0x42>
+			GPIOA0->CONHR = (GPIOA0->CONHR&0X00FFFFFF) | 0X77000000;        //PA0.15->RXD1, PA0.14->TXD1
+    24ec:	1075      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    24ee:	32ee      	movi      	r2, 238
+    24f0:	9320      	ld.w      	r1, (r3, 0x0)
+    24f2:	9161      	ld.w      	r3, (r1, 0x4)
+    24f4:	4368      	lsli      	r3, r3, 8
+    24f6:	4b68      	lsri      	r3, r3, 8
+    24f8:	4257      	lsli      	r2, r2, 23
+    24fa:	07e7      	br      	0x24c8	// 24c8 <UART_IO_Init+0x6c>
+	 if (IO_UART_NUM==IO_UART2)
+    24fc:	3842      	cmpnei      	r0, 2
+    24fe:	0bd0      	bt      	0x249e	// 249e <UART_IO_Init+0x42>
+        if(UART_IO_G==0)
+    2500:	3940      	cmpnei      	r1, 0
+    2502:	0809      	bt      	0x2514	// 2514 <UART_IO_Init+0xb8>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0XFFFFFF00)  | 0x00000077;       //PA0.0->RXD2, PA0.1->TXD2
+    2504:	106f      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    2506:	31ff      	movi      	r1, 255
+    2508:	9340      	ld.w      	r2, (r3, 0x0)
+    250a:	9260      	ld.w      	r3, (r2, 0x0)
+    250c:	68c5      	andn      	r3, r1
+    250e:	3177      	movi      	r1, 119
+    2510:	6cc4      	or      	r3, r1
+    2512:	07b0      	br      	0x2472	// 2472 <UART_IO_Init+0x16>
+		else if(UART_IO_G==1)
+    2514:	3941      	cmpnei      	r1, 1
+    2516:	0809      	bt      	0x2528	// 2528 <UART_IO_Init+0xcc>
+			GPIOA0->CONLR = (GPIOA0->CONLR&0X00FFFFFF) | 0X77000000;        //PA0.7->RXD2, PA0.6->TXD2
+    2518:	106a      	lrw      	r3, 0x2000004c	// 2540 <UART_IO_Init+0xe4>
+    251a:	32ee      	movi      	r2, 238
+    251c:	9320      	ld.w      	r1, (r3, 0x0)
+    251e:	9160      	ld.w      	r3, (r1, 0x0)
+    2520:	4368      	lsli      	r3, r3, 8
+    2522:	4b68      	lsri      	r3, r3, 8
+    2524:	4257      	lsli      	r2, r2, 23
+    2526:	07de      	br      	0x24e2	// 24e2 <UART_IO_Init+0x86>
+		else if(UART_IO_G==2)
+    2528:	3942      	cmpnei      	r1, 2
+    252a:	0bba      	bt      	0x249e	// 249e <UART_IO_Init+0x42>
+			GPIOB0->CONLR = (GPIOB0->CONLR&0XFF00FFFF) | 0X00660000;        //PB0.5->RXD2, PB0.4->TXD2
+    252c:	1066      	lrw      	r3, 0x20000048	// 2544 <UART_IO_Init+0xe8>
+    252e:	32ff      	movi      	r2, 255
+    2530:	9320      	ld.w      	r1, (r3, 0x0)
+    2532:	4250      	lsli      	r2, r2, 16
+    2534:	9160      	ld.w      	r3, (r1, 0x0)
+    2536:	68c9      	andn      	r3, r2
+    2538:	32cc      	movi      	r2, 204
+    253a:	424f      	lsli      	r2, r2, 15
+    253c:	07d3      	br      	0x24e2	// 24e2 <UART_IO_Init+0x86>
+    253e:	0000      	bkpt
+    2540:	2000004c 	.long	0x2000004c
+    2544:	20000048 	.long	0x20000048
+
+Disassembly of section .text.UARTInitRxTxIntEn:
+
+00002548 <UARTInitRxTxIntEn>:
+//ReturnValue:NONE
+/*************************************************************/
+void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT)
+{
+   // Set Transmitter Enable
+   CSP_UART_SET_CTRL(uart, UART_TX | UART_RX | UART_RX_INT | UART_TX_INT | PAR_DAT | UART_TX_DONE_INT);
+    2548:	1063      	lrw      	r3, 0x8000f	// 2554 <UARTInitRxTxIntEn+0xc>
+    254a:	6c8c      	or      	r2, r3
+    254c:	b042      	st.w      	r2, (r0, 0x8)
+   // Set Baudrate
+   CSP_UART_SET_BRDIV(uart, baudrate_u16);
+    254e:	b024      	st.w      	r1, (r0, 0x10)
+}
+    2550:	783c      	jmp      	r15
+    2552:	0000      	bkpt
+    2554:	0008000f 	.long	0x0008000f
+
+Disassembly of section .text.UARTTransmit:
+
+00002558 <UARTTransmit>:
+//UART Transmit 
+//EntryParameter:UART0,UART1,UART2,sourceAddress_u16,length_u16
+//ReturnValue:NONE
+/*************************************************************/
+void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16)
+{
+    2558:	14c2      	push      	r4-r5
+	unsigned int  DataI,DataJ;
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    255a:	6cc7      	mov      	r3, r1
+	{
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+		do{
+			DataI = CSP_UART_GET_SR(uart);
+			DataI = DataI & UART_TX_FULL;
+    255c:	3501      	movi      	r5, 1
+	for(DataJ = 0;DataJ < length_u16 ;DataJ ++)
+    255e:	5b85      	subu      	r4, r3, r1
+    2560:	6490      	cmphs      	r4, r2
+    2562:	0c02      	bf      	0x2566	// 2566 <UARTTransmit+0xe>
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+	}
+}
+    2564:	1482      	pop      	r4-r5
+		CSP_UART_SET_DATA(uart,*sourceAddress_u16++);
+    2566:	8380      	ld.b      	r4, (r3, 0x0)
+    2568:	b080      	st.w      	r4, (r0, 0x0)
+			DataI = CSP_UART_GET_SR(uart);
+    256a:	9081      	ld.w      	r4, (r0, 0x4)
+			DataI = DataI & UART_TX_FULL;
+    256c:	6914      	and      	r4, r5
+		}while(DataI == UART_TX_FULL);    //Loop  when tx is full
+    256e:	3c40      	cmpnei      	r4, 0
+    2570:	0bfd      	bt      	0x256a	// 256a <UARTTransmit+0x12>
+    2572:	2300      	addi      	r3, 1
+    2574:	07f5      	br      	0x255e	// 255e <UARTTransmit+0x6>
+
+Disassembly of section .text.EPT_Stop:
+
+00002578 <EPT_Stop>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/   
+void EPT_Stop(void)
+{
+	EPT0->REGPROT = (0xA55A<<16) | 0xC73A;
+    2578:	1068      	lrw      	r3, 0x20000020	// 2598 <EPT_Stop+0x20>
+    257a:	3280      	movi      	r2, 128
+    257c:	9360      	ld.w      	r3, (r3, 0x0)
+    257e:	608c      	addu      	r2, r3
+    2580:	1027      	lrw      	r1, 0xa55ac73a	// 259c <EPT_Stop+0x24>
+    2582:	b23a      	st.w      	r1, (r2, 0x68)
+	EPT0->RSSR&=0Xfe;
+    2584:	9341      	ld.w      	r2, (r3, 0x4)
+    2586:	31fe      	movi      	r1, 254
+    2588:	6884      	and      	r2, r1
+    258a:	b341      	st.w      	r2, (r3, 0x4)
+	while(EPT0->RSSR&0x01);
+    258c:	3101      	movi      	r1, 1
+    258e:	9341      	ld.w      	r2, (r3, 0x4)
+    2590:	6884      	and      	r2, r1
+    2592:	3a40      	cmpnei      	r2, 0
+    2594:	0bfd      	bt      	0x258e	// 258e <EPT_Stop+0x16>
+}
+    2596:	783c      	jmp      	r15
+    2598:	20000020 	.long	0x20000020
+    259c:	a55ac73a 	.long	0xa55ac73a
+
+Disassembly of section .text.startup.main:
+
+000025a0 <main>:
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+    25a0:	14d0      	push      	r15
+//	delay_nms(2000);
+	APT32F102_init();							//102 initial
+    25a2:	e000009b 	bsr      	0x26d8	// 26d8 <APT32F102_init>
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+    25a6:	1027      	lrw      	r1, 0x44a4	// 25c0 <main+0x20>
+    25a8:	3000      	movi      	r0, 0
+    25aa:	e00007ab 	bsr      	0x3500	// 3500 <Dbg_Println>
+
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+    25ae:	e3fffb5b 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+
+		UART1_TASK();
+    25b2:	e0000657 	bsr      	0x3260	// 3260 <UART1_TASK>
+		
+		DIP_ScanTask();
+    25b6:	e000080b 	bsr      	0x35cc	// 35cc <DIP_ScanTask>
+		
+		BUS485Send_Task();
+    25ba:	e0000745 	bsr      	0x3444	// 3444 <BUS485Send_Task>
+    25be:	07f8      	br      	0x25ae	// 25ae <main+0xe>
+    25c0:	000044a4 	.long	0x000044a4
+
+Disassembly of section .text.delay_nms:
+
+000025c4 <delay_nms>:
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    25c4:	14d0      	push      	r15
+    25c6:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    25c8:	3232      	movi      	r2, 50
+    volatile unsigned int i,j ,k=0;
+    25ca:	3300      	movi      	r3, 0
+    j = 50* t;
+    25cc:	7c08      	mult      	r0, r2
+    volatile unsigned int i,j ,k=0;
+    25ce:	b862      	st.w      	r3, (r14, 0x8)
+    j = 50* t;
+    25d0:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    25d2:	b860      	st.w      	r3, (r14, 0x0)
+    25d4:	9840      	ld.w      	r2, (r14, 0x0)
+    25d6:	9861      	ld.w      	r3, (r14, 0x4)
+    25d8:	64c8      	cmphs      	r2, r3
+    25da:	0c03      	bf      	0x25e0	// 25e0 <delay_nms+0x1c>
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+    25dc:	1403      	addi      	r14, r14, 12
+    25de:	1490      	pop      	r15
+        k++;
+    25e0:	9862      	ld.w      	r3, (r14, 0x8)
+    25e2:	2300      	addi      	r3, 1
+    25e4:	b862      	st.w      	r3, (r14, 0x8)
+		SYSCON_IWDCNT_Reload(); 
+    25e6:	e3fffb3f 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+    for ( i = 0; i < j; i++ )
+    25ea:	9860      	ld.w      	r3, (r14, 0x0)
+    25ec:	2300      	addi      	r3, 1
+    25ee:	07f2      	br      	0x25d2	// 25d2 <delay_nms+0xe>
+
+Disassembly of section .text.delay_nus:
+
+000025f0 <delay_nus>:
+void delay_nus(unsigned int t)
+{
+    25f0:	1423      	subi      	r14, r14, 12
+    volatile unsigned int i,j ,k=0;
+    25f2:	3300      	movi      	r3, 0
+    25f4:	b862      	st.w      	r3, (r14, 0x8)
+    j = 1* t;
+    25f6:	b801      	st.w      	r0, (r14, 0x4)
+    for ( i = 0; i < j; i++ )
+    25f8:	b860      	st.w      	r3, (r14, 0x0)
+    25fa:	9840      	ld.w      	r2, (r14, 0x0)
+    25fc:	9861      	ld.w      	r3, (r14, 0x4)
+    25fe:	64c8      	cmphs      	r2, r3
+    2600:	0c03      	bf      	0x2606	// 2606 <delay_nus+0x16>
+    {
+        k++;
+    }
+}
+    2602:	1403      	addi      	r14, r14, 12
+    2604:	783c      	jmp      	r15
+        k++;
+    2606:	9862      	ld.w      	r3, (r14, 0x8)
+    2608:	2300      	addi      	r3, 1
+    260a:	b862      	st.w      	r3, (r14, 0x8)
+    for ( i = 0; i < j; i++ )
+    260c:	9860      	ld.w      	r3, (r14, 0x0)
+    260e:	2300      	addi      	r3, 1
+    2610:	07f4      	br      	0x25f8	// 25f8 <delay_nus+0x8>
+
+Disassembly of section .text.BT_CONFIG:
+
+00002614 <BT_CONFIG>:
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+    2614:	14d2      	push      	r4-r5, r15
+    2616:	1424      	subi      	r14, r14, 16
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+    2618:	1095      	lrw      	r4, 0x20000008	// 266c <BT_CONFIG+0x58>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    261a:	3500      	movi      	r5, 0
+	BT_DeInit(BT1);
+    261c:	9400      	ld.w      	r0, (r4, 0x0)
+    261e:	e3fffd93 	bsr      	0x2144	// 2144 <BT_DeInit>
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+    2622:	9400      	ld.w      	r0, (r4, 0x0)
+    2624:	b8a1      	st.w      	r5, (r14, 0x4)
+    2626:	b8a0      	st.w      	r5, (r14, 0x0)
+    2628:	3308      	movi      	r3, 8
+    262a:	3200      	movi      	r2, 0
+    262c:	3101      	movi      	r1, 1
+    262e:	e3fffda2 	bsr      	0x2172	// 2172 <BT_Configure>
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+    2632:	3380      	movi      	r3, 128
+    2634:	4363      	lsli      	r3, r3, 3
+    2636:	b861      	st.w      	r3, (r14, 0x4)
+    2638:	9400      	ld.w      	r0, (r4, 0x0)
+    263a:	3300      	movi      	r3, 0
+    263c:	b8a3      	st.w      	r5, (r14, 0xc)
+    263e:	b8a2      	st.w      	r5, (r14, 0x8)
+    2640:	b8a0      	st.w      	r5, (r14, 0x0)
+    2642:	3200      	movi      	r2, 0
+    2644:	3180      	movi      	r1, 128
+    2646:	e3fffda2 	bsr      	0x218a	// 218a <BT_ControlSet_Configure>
+	BT_Period_CMP_Write(BT1,4780,1);		
+    264a:	3201      	movi      	r2, 1
+    264c:	1029      	lrw      	r1, 0x12ac	// 2670 <BT_CONFIG+0x5c>
+    264e:	9400      	ld.w      	r0, (r4, 0x0)
+    2650:	e3fffdb3 	bsr      	0x21b6	// 21b6 <BT_Period_CMP_Write>
+	BT_Start(BT1);
+    2654:	9400      	ld.w      	r0, (r4, 0x0)
+    2656:	e3fffd85 	bsr      	0x2160	// 2160 <BT_Start>
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+    265a:	9400      	ld.w      	r0, (r4, 0x0)
+    265c:	3202      	movi      	r2, 2
+    265e:	3101      	movi      	r1, 1
+    2660:	e3fffdae 	bsr      	0x21bc	// 21bc <BT_ConfigInterrupt_CMD>
+	BT1_INT_ENABLE();
+    2664:	e3fffdb6 	bsr      	0x21d0	// 21d0 <BT1_INT_ENABLE>
+	
+}
+    2668:	1404      	addi      	r14, r14, 16
+    266a:	1492      	pop      	r4-r5, r15
+    266c:	20000008 	.long	0x20000008
+    2670:	000012ac 	.long	0x000012ac
+
+Disassembly of section .text.SYSCON_CONFIG:
+
+00002674 <SYSCON_CONFIG>:
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+    2674:	14d0      	push      	r15
+    2676:	1421      	subi      	r14, r14, 4
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+    2678:	e3fffa42 	bsr      	0x1afc	// 1afc <SYSCON_RST_VALUE>
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+    267c:	3101      	movi      	r1, 1
+    267e:	3001      	movi      	r0, 1
+    2680:	e3fffa64 	bsr      	0x1b48	// 1b48 <SYSCON_General_CMD>
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+    2684:	3000      	movi      	r0, 0
+    2686:	e3fffabd 	bsr      	0x1c00	// 1c00 <SYSCON_HFOSC_SELECTE>
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+    268a:	3180      	movi      	r1, 128
+    268c:	3308      	movi      	r3, 8
+    268e:	3200      	movi      	r2, 0
+    2690:	4121      	lsli      	r1, r1, 1
+    2692:	3002      	movi      	r0, 2
+    2694:	e3fffa72 	bsr      	0x1b78	// 1b78 <SystemCLK_HCLKDIV_PCLKDIV_Config>
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    2698:	3080      	movi      	r0, 128
+    269a:	3118      	movi      	r1, 24
+    269c:	4002      	lsli      	r0, r0, 2
+    269e:	e3fffaed 	bsr      	0x1c78	// 1c78 <SYSCON_IWDCNT_Config>
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    26a2:	3001      	movi      	r0, 1
+    26a4:	e3fffac2 	bsr      	0x1c28	// 1c28 <SYSCON_WDT_CMD>
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+    26a8:	e3fffade 	bsr      	0x1c64	// 1c64 <SYSCON_IWDCNT_Reload>
+	IWDT_Int_Enable();
+    26ac:	e3fffb10 	bsr      	0x1ccc	// 1ccc <IWDT_Int_Enable>
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    26b0:	3340      	movi      	r3, 64
+    26b2:	b860      	st.w      	r3, (r14, 0x0)
+    26b4:	31c0      	movi      	r1, 192
+    26b6:	3380      	movi      	r3, 128
+    26b8:	4364      	lsli      	r3, r3, 4
+    26ba:	3200      	movi      	r2, 0
+    26bc:	4123      	lsli      	r1, r1, 3
+    26be:	3000      	movi      	r0, 0
+    26c0:	e3fffae8 	bsr      	0x1c90	// 1c90 <SYSCON_LVD_Config>
+    LVD_Int_Enable();	
+    26c4:	e3fffaf6 	bsr      	0x1cb0	// 1cb0 <LVD_Int_Enable>
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+    26c8:	e3fffb54 	bsr      	0x1d70	// 1d70 <SYSCON_Int_Enable>
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+    26cc:	3000      	movi      	r0, 0
+    26ce:	e0000d07 	bsr      	0x40dc	// 40dc <std_clk_calib>
+	
+}
+    26d2:	1401      	addi      	r14, r14, 4
+    26d4:	1490      	pop      	r15
+
+Disassembly of section .text.APT32F102_init:
+
+000026d8 <APT32F102_init>:
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+    26d8:	14d0      	push      	r15
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    26da:	1070      	lrw      	r3, 0x2000005c	// 2718 <APT32F102_init+0x40>
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    26dc:	3101      	movi      	r1, 1
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    26de:	9340      	ld.w      	r2, (r3, 0x0)
+    26e0:	106f      	lrw      	r3, 0xfffffff	// 271c <APT32F102_init+0x44>
+    26e2:	b26a      	st.w      	r3, (r2, 0x28)
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    26e4:	b26d      	st.w      	r3, (r2, 0x34)
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+    26e6:	926c      	ld.w      	r3, (r2, 0x30)
+    26e8:	68c4      	and      	r3, r1
+    26ea:	3b40      	cmpnei      	r3, 0
+    26ec:	0ffd      	bf      	0x26e6	// 26e6 <APT32F102_init+0xe>
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+    26ee:	e3ffffc3 	bsr      	0x2674	// 2674 <SYSCON_CONFIG>
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+    26f2:	e0000507 	bsr      	0x3100	// 3100 <CK_CPU_EnAllNormalIrq>
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+    26f6:	e3fffb49 	bsr      	0x1d88	// 1d88 <SYSCON_INT_Priority>
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART1_IRQ,1);				//串口优先级最高
+    26fa:	3101      	movi      	r1, 1
+    26fc:	300e      	movi      	r0, 14
+    26fe:	e3fffb57 	bsr      	0x1dac	// 1dac <Set_INT_Priority>
+
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	BT_CONFIG();			//BT initial
+    2702:	e3ffff89 	bsr      	0x2614	// 2614 <BT_CONFIG>
+
+//	GPT0_CONFIG();
+	
+	UARTx_Init(UART_1,BLV_RLY_RS485_Pro);
+    2706:	1027      	lrw      	r1, 0x39cc	// 2720 <APT32F102_init+0x48>
+    2708:	3001      	movi      	r0, 1
+    270a:	e0000501 	bsr      	0x310c	// 310c <UARTx_Init>
+	
+	DIP_Switch_Init();
+    270e:	e0000719 	bsr      	0x3540	// 3540 <DIP_Switch_Init>
+	
+	Relay_Init();
+    2712:	e00007a3 	bsr      	0x3658	// 3658 <Relay_Init>
+	
+}
+    2716:	1490      	pop      	r15
+    2718:	2000005c 	.long	0x2000005c
+    271c:	0fffffff 	.long	0x0fffffff
+    2720:	000039cc 	.long	0x000039cc
+
+Disassembly of section .text.SYSCONIntHandler:
+
+00002724 <SYSCONIntHandler>:
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    2724:	1460      	nie
+    2726:	1462      	ipush
+    // ISR content ...
+	nop;
+    2728:	6c03      	mov      	r0, r0
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+    272a:	117a      	lrw      	r3, 0x2000005c	// 2810 <SYSCONIntHandler+0xec>
+    272c:	3280      	movi      	r2, 128
+    272e:	9360      	ld.w      	r3, (r3, 0x0)
+    2730:	60c8      	addu      	r3, r2
+    2732:	9323      	ld.w      	r1, (r3, 0xc)
+    2734:	3001      	movi      	r0, 1
+    2736:	6840      	and      	r1, r0
+    2738:	3940      	cmpnei      	r1, 0
+    273a:	0c04      	bf      	0x2742	// 2742 <SYSCONIntHandler+0x1e>
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+    273c:	b301      	st.w      	r0, (r3, 0x4)
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+    273e:	1463      	ipop
+    2740:	1461      	nir
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+    2742:	9323      	ld.w      	r1, (r3, 0xc)
+    2744:	3002      	movi      	r0, 2
+    2746:	6840      	and      	r1, r0
+    2748:	3940      	cmpnei      	r1, 0
+    274a:	0bf9      	bt      	0x273c	// 273c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+    274c:	9323      	ld.w      	r1, (r3, 0xc)
+    274e:	3008      	movi      	r0, 8
+    2750:	6840      	and      	r1, r0
+    2752:	3940      	cmpnei      	r1, 0
+    2754:	0bf4      	bt      	0x273c	// 273c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+    2756:	9323      	ld.w      	r1, (r3, 0xc)
+    2758:	3010      	movi      	r0, 16
+    275a:	6840      	and      	r1, r0
+    275c:	3940      	cmpnei      	r1, 0
+    275e:	0bef      	bt      	0x273c	// 273c <SYSCONIntHandler+0x18>
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+    2760:	9323      	ld.w      	r1, (r3, 0xc)
+    2762:	6848      	and      	r1, r2
+    2764:	3940      	cmpnei      	r1, 0
+    2766:	0c03      	bf      	0x276c	// 276c <SYSCONIntHandler+0x48>
+		SYSCON->ICR = CMD_ERR_ST;
+    2768:	b341      	st.w      	r2, (r3, 0x4)
+}
+    276a:	07ea      	br      	0x273e	// 273e <SYSCONIntHandler+0x1a>
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+    276c:	3280      	movi      	r2, 128
+    276e:	9323      	ld.w      	r1, (r3, 0xc)
+    2770:	4241      	lsli      	r2, r2, 1
+    2772:	6848      	and      	r1, r2
+    2774:	3940      	cmpnei      	r1, 0
+    2776:	0bf9      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+    2778:	3280      	movi      	r2, 128
+    277a:	9323      	ld.w      	r1, (r3, 0xc)
+    277c:	4242      	lsli      	r2, r2, 2
+    277e:	6848      	and      	r1, r2
+    2780:	3940      	cmpnei      	r1, 0
+    2782:	0bf3      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+    2784:	3280      	movi      	r2, 128
+    2786:	9323      	ld.w      	r1, (r3, 0xc)
+    2788:	4243      	lsli      	r2, r2, 3
+    278a:	6848      	and      	r1, r2
+    278c:	3940      	cmpnei      	r1, 0
+    278e:	0bed      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+    2790:	3280      	movi      	r2, 128
+    2792:	9323      	ld.w      	r1, (r3, 0xc)
+    2794:	4244      	lsli      	r2, r2, 4
+    2796:	6848      	and      	r1, r2
+    2798:	3940      	cmpnei      	r1, 0
+    279a:	0c03      	bf      	0x27a0	// 27a0 <SYSCONIntHandler+0x7c>
+		nop;
+    279c:	6c03      	mov      	r0, r0
+    279e:	07e5      	br      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+    27a0:	3280      	movi      	r2, 128
+    27a2:	9323      	ld.w      	r1, (r3, 0xc)
+    27a4:	4245      	lsli      	r2, r2, 5
+    27a6:	6848      	and      	r1, r2
+    27a8:	3940      	cmpnei      	r1, 0
+    27aa:	0bdf      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+    27ac:	3280      	movi      	r2, 128
+    27ae:	9323      	ld.w      	r1, (r3, 0xc)
+    27b0:	4246      	lsli      	r2, r2, 6
+    27b2:	6848      	and      	r1, r2
+    27b4:	3940      	cmpnei      	r1, 0
+    27b6:	0bd9      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+    27b8:	3280      	movi      	r2, 128
+    27ba:	9323      	ld.w      	r1, (r3, 0xc)
+    27bc:	4247      	lsli      	r2, r2, 7
+    27be:	6848      	and      	r1, r2
+    27c0:	3940      	cmpnei      	r1, 0
+    27c2:	0bd3      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+    27c4:	3280      	movi      	r2, 128
+    27c6:	9323      	ld.w      	r1, (r3, 0xc)
+    27c8:	424b      	lsli      	r2, r2, 11
+    27ca:	6848      	and      	r1, r2
+    27cc:	3940      	cmpnei      	r1, 0
+    27ce:	0bcd      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+    27d0:	3280      	movi      	r2, 128
+    27d2:	9323      	ld.w      	r1, (r3, 0xc)
+    27d4:	424c      	lsli      	r2, r2, 12
+    27d6:	6848      	and      	r1, r2
+    27d8:	3940      	cmpnei      	r1, 0
+    27da:	0bc7      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+    27dc:	3280      	movi      	r2, 128
+    27de:	9323      	ld.w      	r1, (r3, 0xc)
+    27e0:	424d      	lsli      	r2, r2, 13
+    27e2:	6848      	and      	r1, r2
+    27e4:	3940      	cmpnei      	r1, 0
+    27e6:	0bc1      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+    27e8:	3280      	movi      	r2, 128
+    27ea:	9323      	ld.w      	r1, (r3, 0xc)
+    27ec:	424e      	lsli      	r2, r2, 14
+    27ee:	6848      	and      	r1, r2
+    27f0:	3940      	cmpnei      	r1, 0
+    27f2:	0bbb      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+    27f4:	3280      	movi      	r2, 128
+    27f6:	9323      	ld.w      	r1, (r3, 0xc)
+    27f8:	424f      	lsli      	r2, r2, 15
+    27fa:	6848      	and      	r1, r2
+    27fc:	3940      	cmpnei      	r1, 0
+    27fe:	0bb5      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+    2800:	3280      	movi      	r2, 128
+    2802:	9323      	ld.w      	r1, (r3, 0xc)
+    2804:	4256      	lsli      	r2, r2, 22
+    2806:	6848      	and      	r1, r2
+    2808:	3940      	cmpnei      	r1, 0
+    280a:	0baf      	bt      	0x2768	// 2768 <SYSCONIntHandler+0x44>
+    280c:	0799      	br      	0x273e	// 273e <SYSCONIntHandler+0x1a>
+    280e:	0000      	bkpt
+    2810:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.IFCIntHandler:
+
+00002814 <IFCIntHandler>:
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    2814:	1460      	nie
+    2816:	1462      	ipush
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+    2818:	1078      	lrw      	r3, 0x20000060	// 2878 <IFCIntHandler+0x64>
+    281a:	3101      	movi      	r1, 1
+    281c:	9360      	ld.w      	r3, (r3, 0x0)
+    281e:	934b      	ld.w      	r2, (r3, 0x2c)
+    2820:	6884      	and      	r2, r1
+    2822:	3a40      	cmpnei      	r2, 0
+    2824:	0c04      	bf      	0x282c	// 282c <IFCIntHandler+0x18>
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+    2826:	b32c      	st.w      	r1, (r3, 0x30)
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+    2828:	1463      	ipop
+    282a:	1461      	nir
+	else if(IFC->MISR&RGM_END_INT)		
+    282c:	934b      	ld.w      	r2, (r3, 0x2c)
+    282e:	3102      	movi      	r1, 2
+    2830:	6884      	and      	r2, r1
+    2832:	3a40      	cmpnei      	r2, 0
+    2834:	0bf9      	bt      	0x2826	// 2826 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PEP_END_INT)		
+    2836:	934b      	ld.w      	r2, (r3, 0x2c)
+    2838:	3104      	movi      	r1, 4
+    283a:	6884      	and      	r2, r1
+    283c:	3a40      	cmpnei      	r2, 0
+    283e:	0bf4      	bt      	0x2826	// 2826 <IFCIntHandler+0x12>
+	else if(IFC->MISR&PROT_ERR_INT)		
+    2840:	3280      	movi      	r2, 128
+    2842:	932b      	ld.w      	r1, (r3, 0x2c)
+    2844:	4245      	lsli      	r2, r2, 5
+    2846:	6848      	and      	r1, r2
+    2848:	3940      	cmpnei      	r1, 0
+    284a:	0c03      	bf      	0x2850	// 2850 <IFCIntHandler+0x3c>
+		IFC->ICR=OVW_ERR_INT;
+    284c:	b34c      	st.w      	r2, (r3, 0x30)
+}
+    284e:	07ed      	br      	0x2828	// 2828 <IFCIntHandler+0x14>
+	else if(IFC->MISR&UDEF_ERR_INT)		
+    2850:	3280      	movi      	r2, 128
+    2852:	932b      	ld.w      	r1, (r3, 0x2c)
+    2854:	4246      	lsli      	r2, r2, 6
+    2856:	6848      	and      	r1, r2
+    2858:	3940      	cmpnei      	r1, 0
+    285a:	0bf9      	bt      	0x284c	// 284c <IFCIntHandler+0x38>
+	else if(IFC->MISR&ADDR_ERR_INT)		
+    285c:	3280      	movi      	r2, 128
+    285e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2860:	4247      	lsli      	r2, r2, 7
+    2862:	6848      	and      	r1, r2
+    2864:	3940      	cmpnei      	r1, 0
+    2866:	0bf3      	bt      	0x284c	// 284c <IFCIntHandler+0x38>
+	else if(IFC->MISR&OVW_ERR_INT)		
+    2868:	3280      	movi      	r2, 128
+    286a:	932b      	ld.w      	r1, (r3, 0x2c)
+    286c:	4248      	lsli      	r2, r2, 8
+    286e:	6848      	and      	r1, r2
+    2870:	3940      	cmpnei      	r1, 0
+    2872:	0bed      	bt      	0x284c	// 284c <IFCIntHandler+0x38>
+    2874:	07da      	br      	0x2828	// 2828 <IFCIntHandler+0x14>
+    2876:	0000      	bkpt
+    2878:	20000060 	.long	0x20000060
+
+Disassembly of section .text.ADCIntHandler:
+
+0000287c <ADCIntHandler>:
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    287c:	1460      	nie
+    287e:	1462      	ipush
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+    2880:	1078      	lrw      	r3, 0x20000050	// 28e0 <ADCIntHandler+0x64>
+    2882:	3101      	movi      	r1, 1
+    2884:	9360      	ld.w      	r3, (r3, 0x0)
+    2886:	9348      	ld.w      	r2, (r3, 0x20)
+    2888:	6884      	and      	r2, r1
+    288a:	3a40      	cmpnei      	r2, 0
+    288c:	0c04      	bf      	0x2894	// 2894 <ADCIntHandler+0x18>
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+    288e:	b327      	st.w      	r1, (r3, 0x1c)
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+    2890:	1463      	ipop
+    2892:	1461      	nir
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+    2894:	9348      	ld.w      	r2, (r3, 0x20)
+    2896:	3102      	movi      	r1, 2
+    2898:	6884      	and      	r2, r1
+    289a:	3a40      	cmpnei      	r2, 0
+    289c:	0bf9      	bt      	0x288e	// 288e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+    289e:	9348      	ld.w      	r2, (r3, 0x20)
+    28a0:	3104      	movi      	r1, 4
+    28a2:	6884      	and      	r2, r1
+    28a4:	3a40      	cmpnei      	r2, 0
+    28a6:	0bf4      	bt      	0x288e	// 288e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+    28a8:	9348      	ld.w      	r2, (r3, 0x20)
+    28aa:	3110      	movi      	r1, 16
+    28ac:	6884      	and      	r2, r1
+    28ae:	3a40      	cmpnei      	r2, 0
+    28b0:	0bef      	bt      	0x288e	// 288e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+    28b2:	9348      	ld.w      	r2, (r3, 0x20)
+    28b4:	3120      	movi      	r1, 32
+    28b6:	6884      	and      	r2, r1
+    28b8:	3a40      	cmpnei      	r2, 0
+    28ba:	0bea      	bt      	0x288e	// 288e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+    28bc:	9348      	ld.w      	r2, (r3, 0x20)
+    28be:	3140      	movi      	r1, 64
+    28c0:	6884      	and      	r2, r1
+    28c2:	3a40      	cmpnei      	r2, 0
+    28c4:	0be5      	bt      	0x288e	// 288e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+    28c6:	9348      	ld.w      	r2, (r3, 0x20)
+    28c8:	3180      	movi      	r1, 128
+    28ca:	6884      	and      	r2, r1
+    28cc:	3a40      	cmpnei      	r2, 0
+    28ce:	0be0      	bt      	0x288e	// 288e <ADCIntHandler+0x12>
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+    28d0:	3280      	movi      	r2, 128
+    28d2:	9328      	ld.w      	r1, (r3, 0x20)
+    28d4:	4249      	lsli      	r2, r2, 9
+    28d6:	6848      	and      	r1, r2
+    28d8:	3940      	cmpnei      	r1, 0
+    28da:	0fdb      	bf      	0x2890	// 2890 <ADCIntHandler+0x14>
+		ADC0->CSR = ADC12_SEQ_END0;
+    28dc:	b347      	st.w      	r2, (r3, 0x1c)
+}
+    28de:	07d9      	br      	0x2890	// 2890 <ADCIntHandler+0x14>
+    28e0:	20000050 	.long	0x20000050
+
+Disassembly of section .text.EPT0IntHandler:
+
+000028e4 <EPT0IntHandler>:
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    28e4:	1460      	nie
+    28e6:	1462      	ipush
+    28e8:	14d1      	push      	r4, r15
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+    28ea:	1387      	lrw      	r4, 0x20000020	// 2a84 <EPT0IntHandler+0x1a0>
+    28ec:	3280      	movi      	r2, 128
+    28ee:	9460      	ld.w      	r3, (r4, 0x0)
+    28f0:	60c8      	addu      	r3, r2
+    28f2:	9335      	ld.w      	r1, (r3, 0x54)
+    28f4:	3001      	movi      	r0, 1
+    28f6:	6840      	and      	r1, r0
+    28f8:	3940      	cmpnei      	r1, 0
+    28fa:	0c03      	bf      	0x2900	// 2900 <EPT0IntHandler+0x1c>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+    28fc:	b317      	st.w      	r0, (r3, 0x5c)
+    28fe:	0424      	br      	0x2946	// 2946 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+    2900:	9335      	ld.w      	r1, (r3, 0x54)
+    2902:	3002      	movi      	r0, 2
+    2904:	6840      	and      	r1, r0
+    2906:	3940      	cmpnei      	r1, 0
+    2908:	0bfa      	bt      	0x28fc	// 28fc <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+    290a:	9335      	ld.w      	r1, (r3, 0x54)
+    290c:	3004      	movi      	r0, 4
+    290e:	6840      	and      	r1, r0
+    2910:	3940      	cmpnei      	r1, 0
+    2912:	0bf5      	bt      	0x28fc	// 28fc <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+    2914:	9335      	ld.w      	r1, (r3, 0x54)
+    2916:	3008      	movi      	r0, 8
+    2918:	6840      	and      	r1, r0
+    291a:	3940      	cmpnei      	r1, 0
+    291c:	0bf0      	bt      	0x28fc	// 28fc <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+    291e:	9335      	ld.w      	r1, (r3, 0x54)
+    2920:	3010      	movi      	r0, 16
+    2922:	6840      	and      	r1, r0
+    2924:	3940      	cmpnei      	r1, 0
+    2926:	0c1f      	bf      	0x2964	// 2964 <EPT0IntHandler+0x80>
+		EPT0->ICR=EPT_CAP_LD0;
+    2928:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+    292a:	3200      	movi      	r2, 0
+    292c:	3101      	movi      	r1, 1
+    292e:	3000      	movi      	r0, 0
+    2930:	e3fff9dc 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+    2934:	3201      	movi      	r2, 1
+    2936:	3101      	movi      	r1, 1
+    2938:	3001      	movi      	r0, 1
+    293a:	e3fff9d7 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+    293e:	9460      	ld.w      	r3, (r4, 0x0)
+    2940:	934b      	ld.w      	r2, (r3, 0x2c)
+    2942:	1272      	lrw      	r3, 0x20000148	// 2a88 <EPT0IntHandler+0x1a4>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2944:	b340      	st.w      	r2, (r3, 0x0)
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+    2946:	9460      	ld.w      	r3, (r4, 0x0)
+    2948:	3280      	movi      	r2, 128
+    294a:	60c8      	addu      	r3, r2
+    294c:	932b      	ld.w      	r1, (r3, 0x2c)
+    294e:	3001      	movi      	r0, 1
+    2950:	6840      	and      	r1, r0
+    2952:	3940      	cmpnei      	r1, 0
+    2954:	0c61      	bf      	0x2a16	// 2a16 <EPT0IntHandler+0x132>
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+    2956:	b30d      	st.w      	r0, (r3, 0x34)
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+    2958:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    295c:	9880      	ld.w      	r4, (r14, 0x0)
+    295e:	1402      	addi      	r14, r14, 8
+    2960:	1463      	ipop
+    2962:	1461      	nir
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+    2964:	9335      	ld.w      	r1, (r3, 0x54)
+    2966:	3020      	movi      	r0, 32
+    2968:	6840      	and      	r1, r0
+    296a:	3940      	cmpnei      	r1, 0
+    296c:	0c10      	bf      	0x298c	// 298c <EPT0IntHandler+0xa8>
+		EPT0->ICR=EPT_CAP_LD1;
+    296e:	b317      	st.w      	r0, (r3, 0x5c)
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+    2970:	3200      	movi      	r2, 0
+    2972:	3101      	movi      	r1, 1
+    2974:	3001      	movi      	r0, 1
+    2976:	e3fff9b9 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+    297a:	3201      	movi      	r2, 1
+    297c:	3101      	movi      	r1, 1
+    297e:	3000      	movi      	r0, 0
+    2980:	e3fff9b4 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+    2984:	9460      	ld.w      	r3, (r4, 0x0)
+    2986:	934c      	ld.w      	r2, (r3, 0x30)
+    2988:	1261      	lrw      	r3, 0x20000144	// 2a8c <EPT0IntHandler+0x1a8>
+    298a:	07dd      	br      	0x2944	// 2944 <EPT0IntHandler+0x60>
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+    298c:	9335      	ld.w      	r1, (r3, 0x54)
+    298e:	3040      	movi      	r0, 64
+    2990:	6840      	and      	r1, r0
+    2992:	3940      	cmpnei      	r1, 0
+    2994:	0bb4      	bt      	0x28fc	// 28fc <EPT0IntHandler+0x18>
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+    2996:	9335      	ld.w      	r1, (r3, 0x54)
+    2998:	6848      	and      	r1, r2
+    299a:	3940      	cmpnei      	r1, 0
+    299c:	0c03      	bf      	0x29a2	// 29a2 <EPT0IntHandler+0xbe>
+		EPT0->ICR=EPT_CDD;
+    299e:	b357      	st.w      	r2, (r3, 0x5c)
+    29a0:	07d3      	br      	0x2946	// 2946 <EPT0IntHandler+0x62>
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+    29a2:	3280      	movi      	r2, 128
+    29a4:	9335      	ld.w      	r1, (r3, 0x54)
+    29a6:	4241      	lsli      	r2, r2, 1
+    29a8:	6848      	and      	r1, r2
+    29aa:	3940      	cmpnei      	r1, 0
+    29ac:	0bf9      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+    29ae:	3280      	movi      	r2, 128
+    29b0:	9335      	ld.w      	r1, (r3, 0x54)
+    29b2:	4242      	lsli      	r2, r2, 2
+    29b4:	6848      	and      	r1, r2
+    29b6:	3940      	cmpnei      	r1, 0
+    29b8:	0bf3      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+    29ba:	3280      	movi      	r2, 128
+    29bc:	9335      	ld.w      	r1, (r3, 0x54)
+    29be:	4243      	lsli      	r2, r2, 3
+    29c0:	6848      	and      	r1, r2
+    29c2:	3940      	cmpnei      	r1, 0
+    29c4:	0bed      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+    29c6:	3280      	movi      	r2, 128
+    29c8:	9335      	ld.w      	r1, (r3, 0x54)
+    29ca:	4244      	lsli      	r2, r2, 4
+    29cc:	6848      	and      	r1, r2
+    29ce:	3940      	cmpnei      	r1, 0
+    29d0:	0be7      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+    29d2:	3280      	movi      	r2, 128
+    29d4:	9335      	ld.w      	r1, (r3, 0x54)
+    29d6:	4245      	lsli      	r2, r2, 5
+    29d8:	6848      	and      	r1, r2
+    29da:	3940      	cmpnei      	r1, 0
+    29dc:	0be1      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+    29de:	3280      	movi      	r2, 128
+    29e0:	9335      	ld.w      	r1, (r3, 0x54)
+    29e2:	4246      	lsli      	r2, r2, 6
+    29e4:	6848      	and      	r1, r2
+    29e6:	3940      	cmpnei      	r1, 0
+    29e8:	0bdb      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+    29ea:	3280      	movi      	r2, 128
+    29ec:	9335      	ld.w      	r1, (r3, 0x54)
+    29ee:	4247      	lsli      	r2, r2, 7
+    29f0:	6848      	and      	r1, r2
+    29f2:	3940      	cmpnei      	r1, 0
+    29f4:	0bd5      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+    29f6:	3280      	movi      	r2, 128
+    29f8:	9335      	ld.w      	r1, (r3, 0x54)
+    29fa:	4248      	lsli      	r2, r2, 8
+    29fc:	6848      	and      	r1, r2
+    29fe:	3940      	cmpnei      	r1, 0
+    2a00:	0bcf      	bt      	0x299e	// 299e <EPT0IntHandler+0xba>
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+    2a02:	3280      	movi      	r2, 128
+    2a04:	9335      	ld.w      	r1, (r3, 0x54)
+    2a06:	4249      	lsli      	r2, r2, 9
+    2a08:	6848      	and      	r1, r2
+    2a0a:	3940      	cmpnei      	r1, 0
+    2a0c:	0f9d      	bf      	0x2946	// 2946 <EPT0IntHandler+0x62>
+		EPT0->ICR=EPT_PEND;
+    2a0e:	b357      	st.w      	r2, (r3, 0x5c)
+		EPT_Stop();
+    2a10:	e3fffdb4 	bsr      	0x2578	// 2578 <EPT_Stop>
+    2a14:	0799      	br      	0x2946	// 2946 <EPT0IntHandler+0x62>
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+    2a16:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a18:	3002      	movi      	r0, 2
+    2a1a:	6840      	and      	r1, r0
+    2a1c:	3940      	cmpnei      	r1, 0
+    2a1e:	0b9c      	bt      	0x2956	// 2956 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+    2a20:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a22:	3004      	movi      	r0, 4
+    2a24:	6840      	and      	r1, r0
+    2a26:	3940      	cmpnei      	r1, 0
+    2a28:	0b97      	bt      	0x2956	// 2956 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+    2a2a:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a2c:	3008      	movi      	r0, 8
+    2a2e:	6840      	and      	r1, r0
+    2a30:	3940      	cmpnei      	r1, 0
+    2a32:	0b92      	bt      	0x2956	// 2956 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+    2a34:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a36:	3010      	movi      	r0, 16
+    2a38:	6840      	and      	r1, r0
+    2a3a:	3940      	cmpnei      	r1, 0
+    2a3c:	0b8d      	bt      	0x2956	// 2956 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+    2a3e:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a40:	3020      	movi      	r0, 32
+    2a42:	6840      	and      	r1, r0
+    2a44:	3940      	cmpnei      	r1, 0
+    2a46:	0b88      	bt      	0x2956	// 2956 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+    2a48:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a4a:	3040      	movi      	r0, 64
+    2a4c:	6840      	and      	r1, r0
+    2a4e:	3940      	cmpnei      	r1, 0
+    2a50:	0b83      	bt      	0x2956	// 2956 <EPT0IntHandler+0x72>
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+    2a52:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a54:	6848      	and      	r1, r2
+    2a56:	3940      	cmpnei      	r1, 0
+    2a58:	0c03      	bf      	0x2a5e	// 2a5e <EPT0IntHandler+0x17a>
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+    2a5a:	b34d      	st.w      	r2, (r3, 0x34)
+}
+    2a5c:	077e      	br      	0x2958	// 2958 <EPT0IntHandler+0x74>
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+    2a5e:	3280      	movi      	r2, 128
+    2a60:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a62:	4241      	lsli      	r2, r2, 1
+    2a64:	6848      	and      	r1, r2
+    2a66:	3940      	cmpnei      	r1, 0
+    2a68:	0bf9      	bt      	0x2a5a	// 2a5a <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+    2a6a:	3280      	movi      	r2, 128
+    2a6c:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a6e:	4242      	lsli      	r2, r2, 2
+    2a70:	6848      	and      	r1, r2
+    2a72:	3940      	cmpnei      	r1, 0
+    2a74:	0bf3      	bt      	0x2a5a	// 2a5a <EPT0IntHandler+0x176>
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+    2a76:	3280      	movi      	r2, 128
+    2a78:	932b      	ld.w      	r1, (r3, 0x2c)
+    2a7a:	4243      	lsli      	r2, r2, 3
+    2a7c:	6848      	and      	r1, r2
+    2a7e:	3940      	cmpnei      	r1, 0
+    2a80:	0bed      	bt      	0x2a5a	// 2a5a <EPT0IntHandler+0x176>
+    2a82:	076b      	br      	0x2958	// 2958 <EPT0IntHandler+0x74>
+    2a84:	20000020 	.long	0x20000020
+    2a88:	20000148 	.long	0x20000148
+    2a8c:	20000144 	.long	0x20000144
+
+Disassembly of section .text.WWDTHandler:
+
+00002a90 <WWDTHandler>:
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+    2a90:	1460      	nie
+    2a92:	1462      	ipush
+    2a94:	14d2      	push      	r4-r5, r15
+	WWDT->ICR=0X01;
+    2a96:	10ab      	lrw      	r5, 0x20000010	// 2ac0 <WWDTHandler+0x30>
+    2a98:	3401      	movi      	r4, 1
+    2a9a:	9560      	ld.w      	r3, (r5, 0x0)
+    2a9c:	b385      	st.w      	r4, (r3, 0x14)
+	WWDT_CNT_Load(0xFF);
+    2a9e:	30ff      	movi      	r0, 255
+    2aa0:	e3fffb4a 	bsr      	0x2134	// 2134 <WWDT_CNT_Load>
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+    2aa4:	9540      	ld.w      	r2, (r5, 0x0)
+    2aa6:	9263      	ld.w      	r3, (r2, 0xc)
+    2aa8:	68d0      	and      	r3, r4
+    2aaa:	3b40      	cmpnei      	r3, 0
+    2aac:	0c02      	bf      	0x2ab0	// 2ab0 <WWDTHandler+0x20>
+	{
+		WWDT->ICR = WWDT_EVI;
+    2aae:	b285      	st.w      	r4, (r2, 0x14)
+	} 
+}
+    2ab0:	d9ee2002 	ld.w      	r15, (r14, 0x8)
+    2ab4:	98a1      	ld.w      	r5, (r14, 0x4)
+    2ab6:	9880      	ld.w      	r4, (r14, 0x0)
+    2ab8:	1403      	addi      	r14, r14, 12
+    2aba:	1463      	ipop
+    2abc:	1461      	nir
+    2abe:	0000      	bkpt
+    2ac0:	20000010 	.long	0x20000010
+
+Disassembly of section .text.GPT0IntHandler:
+
+00002ac4 <GPT0IntHandler>:
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    2ac4:	1460      	nie
+    2ac6:	1462      	ipush
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+    2ac8:	107e      	lrw      	r3, 0x20000024	// 2b40 <GPT0IntHandler+0x7c>
+    2aca:	3101      	movi      	r1, 1
+    2acc:	9360      	ld.w      	r3, (r3, 0x0)
+    2ace:	237f      	addi      	r3, 128
+    2ad0:	9355      	ld.w      	r2, (r3, 0x54)
+    2ad2:	6884      	and      	r2, r1
+    2ad4:	3a40      	cmpnei      	r2, 0
+    2ad6:	0c04      	bf      	0x2ade	// 2ade <GPT0IntHandler+0x1a>
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+    2ad8:	b337      	st.w      	r1, (r3, 0x5c)
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+    2ada:	1463      	ipop
+    2adc:	1461      	nir
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+    2ade:	9355      	ld.w      	r2, (r3, 0x54)
+    2ae0:	3102      	movi      	r1, 2
+    2ae2:	6884      	and      	r2, r1
+    2ae4:	3a40      	cmpnei      	r2, 0
+    2ae6:	0bf9      	bt      	0x2ad8	// 2ad8 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+    2ae8:	9355      	ld.w      	r2, (r3, 0x54)
+    2aea:	3110      	movi      	r1, 16
+    2aec:	6884      	and      	r2, r1
+    2aee:	3a40      	cmpnei      	r2, 0
+    2af0:	0bf4      	bt      	0x2ad8	// 2ad8 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+    2af2:	9355      	ld.w      	r2, (r3, 0x54)
+    2af4:	3120      	movi      	r1, 32
+    2af6:	6884      	and      	r2, r1
+    2af8:	3a40      	cmpnei      	r2, 0
+    2afa:	0bef      	bt      	0x2ad8	// 2ad8 <GPT0IntHandler+0x14>
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+    2afc:	3280      	movi      	r2, 128
+    2afe:	9335      	ld.w      	r1, (r3, 0x54)
+    2b00:	4241      	lsli      	r2, r2, 1
+    2b02:	6848      	and      	r1, r2
+    2b04:	3940      	cmpnei      	r1, 0
+    2b06:	0c03      	bf      	0x2b0c	// 2b0c <GPT0IntHandler+0x48>
+		GPT0->ICR = GPT_INT_PEND;
+    2b08:	b357      	st.w      	r2, (r3, 0x5c)
+}
+    2b0a:	07e8      	br      	0x2ada	// 2ada <GPT0IntHandler+0x16>
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+    2b0c:	3280      	movi      	r2, 128
+    2b0e:	9335      	ld.w      	r1, (r3, 0x54)
+    2b10:	4242      	lsli      	r2, r2, 2
+    2b12:	6848      	and      	r1, r2
+    2b14:	3940      	cmpnei      	r1, 0
+    2b16:	0bf9      	bt      	0x2b08	// 2b08 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+    2b18:	3280      	movi      	r2, 128
+    2b1a:	9335      	ld.w      	r1, (r3, 0x54)
+    2b1c:	4243      	lsli      	r2, r2, 3
+    2b1e:	6848      	and      	r1, r2
+    2b20:	3940      	cmpnei      	r1, 0
+    2b22:	0bf3      	bt      	0x2b08	// 2b08 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+    2b24:	3280      	movi      	r2, 128
+    2b26:	9335      	ld.w      	r1, (r3, 0x54)
+    2b28:	4244      	lsli      	r2, r2, 4
+    2b2a:	6848      	and      	r1, r2
+    2b2c:	3940      	cmpnei      	r1, 0
+    2b2e:	0bed      	bt      	0x2b08	// 2b08 <GPT0IntHandler+0x44>
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+    2b30:	3280      	movi      	r2, 128
+    2b32:	9335      	ld.w      	r1, (r3, 0x54)
+    2b34:	4249      	lsli      	r2, r2, 9
+    2b36:	6848      	and      	r1, r2
+    2b38:	3940      	cmpnei      	r1, 0
+    2b3a:	0be7      	bt      	0x2b08	// 2b08 <GPT0IntHandler+0x44>
+    2b3c:	07cf      	br      	0x2ada	// 2ada <GPT0IntHandler+0x16>
+    2b3e:	0000      	bkpt
+    2b40:	20000024 	.long	0x20000024
+
+Disassembly of section .text.RTCIntHandler:
+
+00002b44 <RTCIntHandler>:
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    2b44:	1460      	nie
+    2b46:	1462      	ipush
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+    2b48:	1079      	lrw      	r3, 0x20000018	// 2bac <RTCIntHandler+0x68>
+    2b4a:	3101      	movi      	r1, 1
+    2b4c:	9360      	ld.w      	r3, (r3, 0x0)
+    2b4e:	934a      	ld.w      	r2, (r3, 0x28)
+    2b50:	6884      	and      	r2, r1
+    2b52:	3a40      	cmpnei      	r2, 0
+    2b54:	0c14      	bf      	0x2b7c	// 2b7c <RTCIntHandler+0x38>
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+    2b56:	1057      	lrw      	r2, 0xca53	// 2bb0 <RTCIntHandler+0x6c>
+		RTC->ICR=ALRA_INT;
+    2b58:	b32b      	st.w      	r1, (r3, 0x2c)
+		RTC->KEY=0XCA53;
+    2b5a:	b34c      	st.w      	r2, (r3, 0x30)
+		RTC->CR=RTC->CR|0x01;
+    2b5c:	9342      	ld.w      	r2, (r3, 0x8)
+    2b5e:	6c84      	or      	r2, r1
+    2b60:	b342      	st.w      	r2, (r3, 0x8)
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+    2b62:	3280      	movi      	r2, 128
+    2b64:	424d      	lsli      	r2, r2, 13
+    2b66:	b340      	st.w      	r2, (r3, 0x0)
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+    2b68:	3102      	movi      	r1, 2
+    2b6a:	9342      	ld.w      	r2, (r3, 0x8)
+    2b6c:	6884      	and      	r2, r1
+    2b6e:	3a40      	cmpnei      	r2, 0
+    2b70:	0bfd      	bt      	0x2b6a	// 2b6a <RTCIntHandler+0x26>
+		RTC->CR &= ~0x1;
+    2b72:	9342      	ld.w      	r2, (r3, 0x8)
+    2b74:	3a80      	bclri      	r2, 0
+    2b76:	b342      	st.w      	r2, (r3, 0x8)
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+    2b78:	1463      	ipop
+    2b7a:	1461      	nir
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+    2b7c:	934a      	ld.w      	r2, (r3, 0x28)
+    2b7e:	3102      	movi      	r1, 2
+    2b80:	6884      	and      	r2, r1
+    2b82:	3a40      	cmpnei      	r2, 0
+    2b84:	0c03      	bf      	0x2b8a	// 2b8a <RTCIntHandler+0x46>
+		RTC->ICR=RTC_TRGEV1_INT;
+    2b86:	b32b      	st.w      	r1, (r3, 0x2c)
+}
+    2b88:	07f8      	br      	0x2b78	// 2b78 <RTCIntHandler+0x34>
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+    2b8a:	934a      	ld.w      	r2, (r3, 0x28)
+    2b8c:	3104      	movi      	r1, 4
+    2b8e:	6884      	and      	r2, r1
+    2b90:	3a40      	cmpnei      	r2, 0
+    2b92:	0bfa      	bt      	0x2b86	// 2b86 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+    2b94:	934a      	ld.w      	r2, (r3, 0x28)
+    2b96:	3108      	movi      	r1, 8
+    2b98:	6884      	and      	r2, r1
+    2b9a:	3a40      	cmpnei      	r2, 0
+    2b9c:	0bf5      	bt      	0x2b86	// 2b86 <RTCIntHandler+0x42>
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+    2b9e:	934a      	ld.w      	r2, (r3, 0x28)
+    2ba0:	3110      	movi      	r1, 16
+    2ba2:	6884      	and      	r2, r1
+    2ba4:	3a40      	cmpnei      	r2, 0
+    2ba6:	0bf0      	bt      	0x2b86	// 2b86 <RTCIntHandler+0x42>
+    2ba8:	07e8      	br      	0x2b78	// 2b78 <RTCIntHandler+0x34>
+    2baa:	0000      	bkpt
+    2bac:	20000018 	.long	0x20000018
+    2bb0:	0000ca53 	.long	0x0000ca53
+
+Disassembly of section .text.UART0IntHandler:
+
+00002bb4 <UART0IntHandler>:
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+    2bb4:	1460      	nie
+    2bb6:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2bb8:	106d      	lrw      	r3, 0x20000040	// 2bec <UART0IntHandler+0x38>
+    2bba:	3102      	movi      	r1, 2
+    2bbc:	9360      	ld.w      	r3, (r3, 0x0)
+    2bbe:	9343      	ld.w      	r2, (r3, 0xc)
+    2bc0:	6884      	and      	r2, r1
+    2bc2:	3a40      	cmpnei      	r2, 0
+    2bc4:	0c03      	bf      	0x2bca	// 2bca <UART0IntHandler+0x16>
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+    2bc6:	b323      	st.w      	r1, (r3, 0xc)
+	}
+}
+    2bc8:	0410      	br      	0x2be8	// 2be8 <UART0IntHandler+0x34>
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2bca:	9343      	ld.w      	r2, (r3, 0xc)
+    2bcc:	3101      	movi      	r1, 1
+    2bce:	6884      	and      	r2, r1
+    2bd0:	3a40      	cmpnei      	r2, 0
+    2bd2:	0bfa      	bt      	0x2bc6	// 2bc6 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2bd4:	9343      	ld.w      	r2, (r3, 0xc)
+    2bd6:	3108      	movi      	r1, 8
+    2bd8:	6884      	and      	r2, r1
+    2bda:	3a40      	cmpnei      	r2, 0
+    2bdc:	0bf5      	bt      	0x2bc6	// 2bc6 <UART0IntHandler+0x12>
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2bde:	9343      	ld.w      	r2, (r3, 0xc)
+    2be0:	3104      	movi      	r1, 4
+    2be2:	6884      	and      	r2, r1
+    2be4:	3a40      	cmpnei      	r2, 0
+    2be6:	0bf0      	bt      	0x2bc6	// 2bc6 <UART0IntHandler+0x12>
+}
+    2be8:	1463      	ipop
+    2bea:	1461      	nir
+    2bec:	20000040 	.long	0x20000040
+
+Disassembly of section .text.UART1IntHandler:
+
+00002bf0 <UART1IntHandler>:
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+    2bf0:	1460      	nie
+    2bf2:	1462      	ipush
+    2bf4:	14d0      	push      	r15
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2bf6:	107f      	lrw      	r3, 0x2000003c	// 2c70 <UART1IntHandler+0x80>
+    2bf8:	3102      	movi      	r1, 2
+    2bfa:	9360      	ld.w      	r3, (r3, 0x0)
+    2bfc:	9343      	ld.w      	r2, (r3, 0xc)
+    2bfe:	6884      	and      	r2, r1
+    2c00:	3a40      	cmpnei      	r2, 0
+    2c02:	0c0b      	bf      	0x2c18	// 2c18 <UART1IntHandler+0x28>
+	{
+		UART1->ISR=UART_RX_INT_S;
+    2c04:	b323      	st.w      	r1, (r3, 0xc)
+		inchar = CSP_UART_GET_DATA(UART1);
+    2c06:	9300      	ld.w      	r0, (r3, 0x0)
+		UART1_RecvINT_Processing(inchar);
+    2c08:	7400      	zextb      	r0, r0
+    2c0a:	e0000311 	bsr      	0x322c	// 322c <UART1_RecvINT_Processing>
+		if(RS485_Comm_Flag == 0x01){
+			RS485_Comm_End ++;
+		}
+		
+	}	
+}
+    2c0e:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2c12:	1401      	addi      	r14, r14, 4
+    2c14:	1463      	ipop
+    2c16:	1461      	nir
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2c18:	9323      	ld.w      	r1, (r3, 0xc)
+    2c1a:	3201      	movi      	r2, 1
+    2c1c:	6848      	and      	r1, r2
+    2c1e:	3940      	cmpnei      	r1, 0
+    2c20:	0c0d      	bf      	0x2c3a	// 2c3a <UART1IntHandler+0x4a>
+		UART1->ISR=UART_TX_INT_S;
+    2c22:	b343      	st.w      	r2, (r3, 0xc)
+		RS485_Comming = 0x01;
+    2c24:	1074      	lrw      	r3, 0x200000a8	// 2c74 <UART1IntHandler+0x84>
+    2c26:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2c28:	1074      	lrw      	r3, 0x200000ac	// 2c78 <UART1IntHandler+0x88>
+    2c2a:	9360      	ld.w      	r3, (r3, 0x0)
+    2c2c:	3b41      	cmpnei      	r3, 1
+    2c2e:	0bf0      	bt      	0x2c0e	// 2c0e <UART1IntHandler+0x1e>
+			RS485_Comm_Start ++;
+    2c30:	1053      	lrw      	r2, 0x200000b0	// 2c7c <UART1IntHandler+0x8c>
+			RS485_Comm_End ++;
+    2c32:	9260      	ld.w      	r3, (r2, 0x0)
+    2c34:	2300      	addi      	r3, 1
+    2c36:	b260      	st.w      	r3, (r2, 0x0)
+}
+    2c38:	07eb      	br      	0x2c0e	// 2c0e <UART1IntHandler+0x1e>
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2c3a:	9343      	ld.w      	r2, (r3, 0xc)
+    2c3c:	3108      	movi      	r1, 8
+    2c3e:	6884      	and      	r2, r1
+    2c40:	3a40      	cmpnei      	r2, 0
+    2c42:	0c03      	bf      	0x2c48	// 2c48 <UART1IntHandler+0x58>
+		UART1->ISR=UART_TX_IOV_S;
+    2c44:	b323      	st.w      	r1, (r3, 0xc)
+    2c46:	07e4      	br      	0x2c0e	// 2c0e <UART1IntHandler+0x1e>
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2c48:	9343      	ld.w      	r2, (r3, 0xc)
+    2c4a:	3104      	movi      	r1, 4
+    2c4c:	6884      	and      	r2, r1
+    2c4e:	3a40      	cmpnei      	r2, 0
+    2c50:	0bfa      	bt      	0x2c44	// 2c44 <UART1IntHandler+0x54>
+	else if ((UART1->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2c52:	3180      	movi      	r1, 128
+    2c54:	9303      	ld.w      	r0, (r3, 0xc)
+    2c56:	412c      	lsli      	r1, r1, 12
+    2c58:	6804      	and      	r0, r1
+    2c5a:	3840      	cmpnei      	r0, 0
+    2c5c:	0fd9      	bf      	0x2c0e	// 2c0e <UART1IntHandler+0x1e>
+		UART1->ISR=UART_TX_DONE_S;
+    2c5e:	b323      	st.w      	r1, (r3, 0xc)
+		RS485_Comming = 0x00;
+    2c60:	1065      	lrw      	r3, 0x200000a8	// 2c74 <UART1IntHandler+0x84>
+    2c62:	b340      	st.w      	r2, (r3, 0x0)
+		if(RS485_Comm_Flag == 0x01){
+    2c64:	1065      	lrw      	r3, 0x200000ac	// 2c78 <UART1IntHandler+0x88>
+    2c66:	9360      	ld.w      	r3, (r3, 0x0)
+    2c68:	3b41      	cmpnei      	r3, 1
+    2c6a:	0bd2      	bt      	0x2c0e	// 2c0e <UART1IntHandler+0x1e>
+			RS485_Comm_End ++;
+    2c6c:	1045      	lrw      	r2, 0x200000b4	// 2c80 <UART1IntHandler+0x90>
+    2c6e:	07e2      	br      	0x2c32	// 2c32 <UART1IntHandler+0x42>
+    2c70:	2000003c 	.long	0x2000003c
+    2c74:	200000a8 	.long	0x200000a8
+    2c78:	200000ac 	.long	0x200000ac
+    2c7c:	200000b0 	.long	0x200000b0
+    2c80:	200000b4 	.long	0x200000b4
+
+Disassembly of section .text.UART2IntHandler:
+
+00002c84 <UART2IntHandler>:
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+    2c84:	1460      	nie
+    2c86:	1462      	ipush
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+    2c88:	1071      	lrw      	r3, 0x20000038	// 2ccc <UART2IntHandler+0x48>
+    2c8a:	3102      	movi      	r1, 2
+    2c8c:	9360      	ld.w      	r3, (r3, 0x0)
+    2c8e:	9343      	ld.w      	r2, (r3, 0xc)
+    2c90:	6884      	and      	r2, r1
+    2c92:	3a40      	cmpnei      	r2, 0
+    2c94:	0c04      	bf      	0x2c9c	// 2c9c <UART2IntHandler+0x18>
+	{
+		UART2->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART2->ISR=UART_TX_IOV_S;
+    2c96:	b323      	st.w      	r1, (r3, 0xc)
+//			RS485_Comm_End ++;
+//		}
+		
+	}
+	
+}
+    2c98:	1463      	ipop
+    2c9a:	1461      	nir
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    2c9c:	9343      	ld.w      	r2, (r3, 0xc)
+    2c9e:	3101      	movi      	r1, 1
+    2ca0:	6884      	and      	r2, r1
+    2ca2:	3a40      	cmpnei      	r2, 0
+    2ca4:	0bf9      	bt      	0x2c96	// 2c96 <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+    2ca6:	9343      	ld.w      	r2, (r3, 0xc)
+    2ca8:	3108      	movi      	r1, 8
+    2caa:	6884      	and      	r2, r1
+    2cac:	3a40      	cmpnei      	r2, 0
+    2cae:	0bf4      	bt      	0x2c96	// 2c96 <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+    2cb0:	9343      	ld.w      	r2, (r3, 0xc)
+    2cb2:	3104      	movi      	r1, 4
+    2cb4:	6884      	and      	r2, r1
+    2cb6:	3a40      	cmpnei      	r2, 0
+    2cb8:	0bef      	bt      	0x2c96	// 2c96 <UART2IntHandler+0x12>
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+    2cba:	3280      	movi      	r2, 128
+    2cbc:	9323      	ld.w      	r1, (r3, 0xc)
+    2cbe:	424c      	lsli      	r2, r2, 12
+    2cc0:	6848      	and      	r1, r2
+    2cc2:	3940      	cmpnei      	r1, 0
+    2cc4:	0fea      	bf      	0x2c98	// 2c98 <UART2IntHandler+0x14>
+		UART2->ISR=UART_TX_DONE_S;
+    2cc6:	b343      	st.w      	r2, (r3, 0xc)
+}
+    2cc8:	07e8      	br      	0x2c98	// 2c98 <UART2IntHandler+0x14>
+    2cca:	0000      	bkpt
+    2ccc:	20000038 	.long	0x20000038
+
+Disassembly of section .text.SPI0IntHandler:
+
+00002cd0 <SPI0IntHandler>:
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    2cd0:	1460      	nie
+    2cd2:	1462      	ipush
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+    2cd4:	1178      	lrw      	r3, 0x20000034	// 2db4 <SPI0IntHandler+0xe4>
+    2cd6:	3101      	movi      	r1, 1
+    2cd8:	9360      	ld.w      	r3, (r3, 0x0)
+    2cda:	9347      	ld.w      	r2, (r3, 0x1c)
+    2cdc:	6884      	and      	r2, r1
+    2cde:	3a40      	cmpnei      	r2, 0
+    2ce0:	0c03      	bf      	0x2ce6	// 2ce6 <SPI0IntHandler+0x16>
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+    2ce2:	b328      	st.w      	r1, (r3, 0x20)
+	}
+
+}
+    2ce4:	0407      	br      	0x2cf2	// 2cf2 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+    2ce6:	9347      	ld.w      	r2, (r3, 0x1c)
+    2ce8:	3002      	movi      	r0, 2
+    2cea:	6880      	and      	r2, r0
+    2cec:	3a40      	cmpnei      	r2, 0
+    2cee:	0c04      	bf      	0x2cf6	// 2cf6 <SPI0IntHandler+0x26>
+		SPI0->ICR = SPI_RTIM;
+    2cf0:	b308      	st.w      	r0, (r3, 0x20)
+}
+    2cf2:	1463      	ipop
+    2cf4:	1461      	nir
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+    2cf6:	9347      	ld.w      	r2, (r3, 0x1c)
+    2cf8:	3004      	movi      	r0, 4
+    2cfa:	6880      	and      	r2, r0
+    2cfc:	3a40      	cmpnei      	r2, 0
+    2cfe:	0c55      	bf      	0x2da8	// 2da8 <SPI0IntHandler+0xd8>
+		SPI0->ICR = SPI_RXIM;
+    2d00:	b308      	st.w      	r0, (r3, 0x20)
+		if(SPI0->DR==0xaa)
+    2d02:	9302      	ld.w      	r0, (r3, 0x8)
+    2d04:	32aa      	movi      	r2, 170
+    2d06:	6482      	cmpne      	r0, r2
+    2d08:	083e      	bt      	0x2d84	// 2d84 <SPI0IntHandler+0xb4>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2d0a:	3102      	movi      	r1, 2
+    2d0c:	9343      	ld.w      	r2, (r3, 0xc)
+    2d0e:	6884      	and      	r2, r1
+    2d10:	3a40      	cmpnei      	r2, 0
+    2d12:	0ffd      	bf      	0x2d0c	// 2d0c <SPI0IntHandler+0x3c>
+			SPI0->DR = 0x11;
+    2d14:	3211      	movi      	r2, 17
+    2d16:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2d18:	3110      	movi      	r1, 16
+    2d1a:	9343      	ld.w      	r2, (r3, 0xc)
+    2d1c:	6884      	and      	r2, r1
+    2d1e:	3a40      	cmpnei      	r2, 0
+    2d20:	0bfd      	bt      	0x2d1a	// 2d1a <SPI0IntHandler+0x4a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2d22:	3102      	movi      	r1, 2
+    2d24:	9343      	ld.w      	r2, (r3, 0xc)
+    2d26:	6884      	and      	r2, r1
+    2d28:	3a40      	cmpnei      	r2, 0
+    2d2a:	0ffd      	bf      	0x2d24	// 2d24 <SPI0IntHandler+0x54>
+			SPI0->DR = 0x12;
+    2d2c:	3212      	movi      	r2, 18
+    2d2e:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2d30:	3110      	movi      	r1, 16
+    2d32:	9343      	ld.w      	r2, (r3, 0xc)
+    2d34:	6884      	and      	r2, r1
+    2d36:	3a40      	cmpnei      	r2, 0
+    2d38:	0bfd      	bt      	0x2d32	// 2d32 <SPI0IntHandler+0x62>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2d3a:	3102      	movi      	r1, 2
+    2d3c:	9343      	ld.w      	r2, (r3, 0xc)
+    2d3e:	6884      	and      	r2, r1
+    2d40:	3a40      	cmpnei      	r2, 0
+    2d42:	0ffd      	bf      	0x2d3c	// 2d3c <SPI0IntHandler+0x6c>
+			SPI0->DR = 0x13;
+    2d44:	3213      	movi      	r2, 19
+    2d46:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2d48:	3110      	movi      	r1, 16
+    2d4a:	9343      	ld.w      	r2, (r3, 0xc)
+    2d4c:	6884      	and      	r2, r1
+    2d4e:	3a40      	cmpnei      	r2, 0
+    2d50:	0bfd      	bt      	0x2d4a	// 2d4a <SPI0IntHandler+0x7a>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2d52:	3102      	movi      	r1, 2
+    2d54:	9343      	ld.w      	r2, (r3, 0xc)
+    2d56:	6884      	and      	r2, r1
+    2d58:	3a40      	cmpnei      	r2, 0
+    2d5a:	0ffd      	bf      	0x2d54	// 2d54 <SPI0IntHandler+0x84>
+			SPI0->DR = 0x14;
+    2d5c:	3214      	movi      	r2, 20
+    2d5e:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2d60:	3110      	movi      	r1, 16
+    2d62:	9343      	ld.w      	r2, (r3, 0xc)
+    2d64:	6884      	and      	r2, r1
+    2d66:	3a40      	cmpnei      	r2, 0
+    2d68:	0bfd      	bt      	0x2d62	// 2d62 <SPI0IntHandler+0x92>
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+    2d6a:	3102      	movi      	r1, 2
+    2d6c:	9343      	ld.w      	r2, (r3, 0xc)
+    2d6e:	6884      	and      	r2, r1
+    2d70:	3a40      	cmpnei      	r2, 0
+    2d72:	0ffd      	bf      	0x2d6c	// 2d6c <SPI0IntHandler+0x9c>
+			SPI0->DR = 0x15;
+    2d74:	3215      	movi      	r2, 21
+    2d76:	b342      	st.w      	r2, (r3, 0x8)
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+    2d78:	3110      	movi      	r1, 16
+    2d7a:	9343      	ld.w      	r2, (r3, 0xc)
+    2d7c:	6884      	and      	r2, r1
+    2d7e:	3a40      	cmpnei      	r2, 0
+    2d80:	0bfd      	bt      	0x2d7a	// 2d7a <SPI0IntHandler+0xaa>
+    2d82:	07b8      	br      	0x2cf2	// 2cf2 <SPI0IntHandler+0x22>
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+    2d84:	9343      	ld.w      	r2, (r3, 0xc)
+    2d86:	6884      	and      	r2, r1
+    2d88:	3a40      	cmpnei      	r2, 0
+    2d8a:	0bb4      	bt      	0x2cf2	// 2cf2 <SPI0IntHandler+0x22>
+				SPI0->DR=0x0;								//FIFO=0
+    2d8c:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2d8e:	3110      	movi      	r1, 16
+				SPI0->DR=0x0;								//FIFO=0
+    2d90:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2d92:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2d94:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2d96:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2d98:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2d9a:	b342      	st.w      	r2, (r3, 0x8)
+				SPI0->DR=0x0;								//FIFO=0
+    2d9c:	b342      	st.w      	r2, (r3, 0x8)
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+    2d9e:	9343      	ld.w      	r2, (r3, 0xc)
+    2da0:	6884      	and      	r2, r1
+    2da2:	3a40      	cmpnei      	r2, 0
+    2da4:	0bfd      	bt      	0x2d9e	// 2d9e <SPI0IntHandler+0xce>
+    2da6:	07a6      	br      	0x2cf2	// 2cf2 <SPI0IntHandler+0x22>
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+    2da8:	9347      	ld.w      	r2, (r3, 0x1c)
+    2daa:	3108      	movi      	r1, 8
+    2dac:	6884      	and      	r2, r1
+    2dae:	3a40      	cmpnei      	r2, 0
+    2db0:	0b99      	bt      	0x2ce2	// 2ce2 <SPI0IntHandler+0x12>
+    2db2:	07a0      	br      	0x2cf2	// 2cf2 <SPI0IntHandler+0x22>
+    2db4:	20000034 	.long	0x20000034
+
+Disassembly of section .text.SIO0IntHandler:
+
+00002db8 <SIO0IntHandler>:
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    2db8:	1460      	nie
+    2dba:	1462      	ipush
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+    2dbc:	1073      	lrw      	r3, 0x2000002c	// 2e08 <SIO0IntHandler+0x50>
+    2dbe:	3104      	movi      	r1, 4
+    2dc0:	9360      	ld.w      	r3, (r3, 0x0)
+    2dc2:	9349      	ld.w      	r2, (r3, 0x24)
+    2dc4:	6884      	and      	r2, r1
+    2dc6:	3a40      	cmpnei      	r2, 0
+    2dc8:	0c02      	bf      	0x2dcc	// 2dcc <SIO0IntHandler+0x14>
+	{
+		SIO0->ICR=0X04;
+    2dca:	b32b      	st.w      	r1, (r3, 0x2c)
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+    2dcc:	9349      	ld.w      	r2, (r3, 0x24)
+    2dce:	3101      	movi      	r1, 1
+    2dd0:	6884      	and      	r2, r1
+    2dd2:	3a40      	cmpnei      	r2, 0
+    2dd4:	0c02      	bf      	0x2dd8	// 2dd8 <SIO0IntHandler+0x20>
+	{
+		SIO0->ICR=0X01;
+    2dd6:	b32b      	st.w      	r1, (r3, 0x2c)
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+    2dd8:	9349      	ld.w      	r2, (r3, 0x24)
+    2dda:	3102      	movi      	r1, 2
+    2ddc:	6884      	and      	r2, r1
+    2dde:	3a40      	cmpnei      	r2, 0
+    2de0:	0c03      	bf      	0x2de6	// 2de6 <SIO0IntHandler+0x2e>
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+    2de2:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+}
+    2de4:	0410      	br      	0x2e04	// 2e04 <SIO0IntHandler+0x4c>
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+    2de6:	9349      	ld.w      	r2, (r3, 0x24)
+    2de8:	3108      	movi      	r1, 8
+    2dea:	6884      	and      	r2, r1
+    2dec:	3a40      	cmpnei      	r2, 0
+    2dee:	0bfa      	bt      	0x2de2	// 2de2 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X010)				//BREAK
+    2df0:	9349      	ld.w      	r2, (r3, 0x24)
+    2df2:	3110      	movi      	r1, 16
+    2df4:	6884      	and      	r2, r1
+    2df6:	3a40      	cmpnei      	r2, 0
+    2df8:	0bf5      	bt      	0x2de2	// 2de2 <SIO0IntHandler+0x2a>
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+    2dfa:	9349      	ld.w      	r2, (r3, 0x24)
+    2dfc:	3120      	movi      	r1, 32
+    2dfe:	6884      	and      	r2, r1
+    2e00:	3a40      	cmpnei      	r2, 0
+    2e02:	0bf0      	bt      	0x2de2	// 2de2 <SIO0IntHandler+0x2a>
+}
+    2e04:	1463      	ipop
+    2e06:	1461      	nir
+    2e08:	2000002c 	.long	0x2000002c
+
+Disassembly of section .text.EXI0IntHandler:
+
+00002e0c <EXI0IntHandler>:
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    2e0c:	1460      	nie
+    2e0e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+    2e10:	106a      	lrw      	r3, 0x2000005c	// 2e38 <EXI0IntHandler+0x2c>
+    2e12:	3101      	movi      	r1, 1
+    2e14:	9360      	ld.w      	r3, (r3, 0x0)
+    2e16:	237f      	addi      	r3, 128
+    2e18:	934c      	ld.w      	r2, (r3, 0x30)
+    2e1a:	6884      	and      	r2, r1
+    2e1c:	3a40      	cmpnei      	r2, 0
+    2e1e:	0c04      	bf      	0x2e26	// 2e26 <EXI0IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN0;
+    2e20:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+    2e22:	1463      	ipop
+    2e24:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+    2e26:	3280      	movi      	r2, 128
+    2e28:	932c      	ld.w      	r1, (r3, 0x30)
+    2e2a:	4249      	lsli      	r2, r2, 9
+    2e2c:	6848      	and      	r1, r2
+    2e2e:	3940      	cmpnei      	r1, 0
+    2e30:	0ff9      	bf      	0x2e22	// 2e22 <EXI0IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN16;
+    2e32:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2e34:	07f7      	br      	0x2e22	// 2e22 <EXI0IntHandler+0x16>
+    2e36:	0000      	bkpt
+    2e38:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI1IntHandler:
+
+00002e3c <EXI1IntHandler>:
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    2e3c:	1460      	nie
+    2e3e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+    2e40:	106a      	lrw      	r3, 0x2000005c	// 2e68 <EXI1IntHandler+0x2c>
+    2e42:	3102      	movi      	r1, 2
+    2e44:	9360      	ld.w      	r3, (r3, 0x0)
+    2e46:	237f      	addi      	r3, 128
+    2e48:	934c      	ld.w      	r2, (r3, 0x30)
+    2e4a:	6884      	and      	r2, r1
+    2e4c:	3a40      	cmpnei      	r2, 0
+    2e4e:	0c04      	bf      	0x2e56	// 2e56 <EXI1IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN1;
+    2e50:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+    2e52:	1463      	ipop
+    2e54:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+    2e56:	3280      	movi      	r2, 128
+    2e58:	932c      	ld.w      	r1, (r3, 0x30)
+    2e5a:	424a      	lsli      	r2, r2, 10
+    2e5c:	6848      	and      	r1, r2
+    2e5e:	3940      	cmpnei      	r1, 0
+    2e60:	0ff9      	bf      	0x2e52	// 2e52 <EXI1IntHandler+0x16>
+		SYSCON->EXICR = EXI_PIN17;
+    2e62:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2e64:	07f7      	br      	0x2e52	// 2e52 <EXI1IntHandler+0x16>
+    2e66:	0000      	bkpt
+    2e68:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI2to3IntHandler:
+
+00002e6c <EXI2to3IntHandler>:
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    2e6c:	1460      	nie
+    2e6e:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+    2e70:	1070      	lrw      	r3, 0x2000005c	// 2eb0 <EXI2to3IntHandler+0x44>
+    2e72:	3104      	movi      	r1, 4
+    2e74:	9360      	ld.w      	r3, (r3, 0x0)
+    2e76:	237f      	addi      	r3, 128
+    2e78:	934c      	ld.w      	r2, (r3, 0x30)
+    2e7a:	6884      	and      	r2, r1
+    2e7c:	3a40      	cmpnei      	r2, 0
+    2e7e:	0c04      	bf      	0x2e86	// 2e86 <EXI2to3IntHandler+0x1a>
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+    2e80:	b32b      	st.w      	r1, (r3, 0x2c)
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+    2e82:	1463      	ipop
+    2e84:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+    2e86:	934c      	ld.w      	r2, (r3, 0x30)
+    2e88:	3108      	movi      	r1, 8
+    2e8a:	6884      	and      	r2, r1
+    2e8c:	3a40      	cmpnei      	r2, 0
+    2e8e:	0bf9      	bt      	0x2e80	// 2e80 <EXI2to3IntHandler+0x14>
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+    2e90:	3280      	movi      	r2, 128
+    2e92:	932c      	ld.w      	r1, (r3, 0x30)
+    2e94:	424b      	lsli      	r2, r2, 11
+    2e96:	6848      	and      	r1, r2
+    2e98:	3940      	cmpnei      	r1, 0
+    2e9a:	0c03      	bf      	0x2ea0	// 2ea0 <EXI2to3IntHandler+0x34>
+		SYSCON->EXICR = EXI_PIN19;
+    2e9c:	b34b      	st.w      	r2, (r3, 0x2c)
+}
+    2e9e:	07f2      	br      	0x2e82	// 2e82 <EXI2to3IntHandler+0x16>
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+    2ea0:	3280      	movi      	r2, 128
+    2ea2:	932c      	ld.w      	r1, (r3, 0x30)
+    2ea4:	424c      	lsli      	r2, r2, 12
+    2ea6:	6848      	and      	r1, r2
+    2ea8:	3940      	cmpnei      	r1, 0
+    2eaa:	0bf9      	bt      	0x2e9c	// 2e9c <EXI2to3IntHandler+0x30>
+    2eac:	07eb      	br      	0x2e82	// 2e82 <EXI2to3IntHandler+0x16>
+    2eae:	0000      	bkpt
+    2eb0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI4to9IntHandler:
+
+00002eb4 <EXI4to9IntHandler>:
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    2eb4:	1460      	nie
+    2eb6:	1462      	ipush
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+    2eb8:	1066      	lrw      	r3, 0x2000005c	// 2ed0 <EXI4to9IntHandler+0x1c>
+    2eba:	3110      	movi      	r1, 16
+    2ebc:	9360      	ld.w      	r3, (r3, 0x0)
+    2ebe:	237f      	addi      	r3, 128
+    2ec0:	934c      	ld.w      	r2, (r3, 0x30)
+    2ec2:	6884      	and      	r2, r1
+    2ec4:	3a40      	cmpnei      	r2, 0
+    2ec6:	0c02      	bf      	0x2eca	// 2eca <EXI4to9IntHandler+0x16>
+	{
+		SYSCON->EXICR = EXI_PIN4;
+    2ec8:	b32b      	st.w      	r1, (r3, 0x2c)
+//	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN9;
+//	} 
+
+}
+    2eca:	1463      	ipop
+    2ecc:	1461      	nir
+    2ece:	0000      	bkpt
+    2ed0:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.EXI10to15IntHandler:
+
+00002ed4 <EXI10to15IntHandler>:
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    2ed4:	1460      	nie
+    2ed6:	1462      	ipush
+    2ed8:	14d0      	push      	r15
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+    2eda:	1079      	lrw      	r3, 0x2000005c	// 2f3c <EXI10to15IntHandler+0x68>
+    2edc:	3280      	movi      	r2, 128
+    2ede:	9360      	ld.w      	r3, (r3, 0x0)
+    2ee0:	237f      	addi      	r3, 128
+    2ee2:	932c      	ld.w      	r1, (r3, 0x30)
+    2ee4:	4243      	lsli      	r2, r2, 3
+    2ee6:	6848      	and      	r1, r2
+    2ee8:	3940      	cmpnei      	r1, 0
+    2eea:	0c07      	bf      	0x2ef8	// 2ef8 <EXI10to15IntHandler+0x24>
+	{
+		SYSCON->EXICR = EXI_PIN13;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN14;
+    2eec:	b34b      	st.w      	r2, (r3, 0x2c)
+	{
+		SYSCON->EXICR = EXI_PIN15;
+		
+		BusBusy_Task();
+	}
+}
+    2eee:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    2ef2:	1401      	addi      	r14, r14, 4
+    2ef4:	1463      	ipop
+    2ef6:	1461      	nir
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+    2ef8:	3280      	movi      	r2, 128
+    2efa:	932c      	ld.w      	r1, (r3, 0x30)
+    2efc:	4244      	lsli      	r2, r2, 4
+    2efe:	6848      	and      	r1, r2
+    2f00:	3940      	cmpnei      	r1, 0
+    2f02:	0bf5      	bt      	0x2eec	// 2eec <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+    2f04:	3280      	movi      	r2, 128
+    2f06:	932c      	ld.w      	r1, (r3, 0x30)
+    2f08:	4245      	lsli      	r2, r2, 5
+    2f0a:	6848      	and      	r1, r2
+    2f0c:	3940      	cmpnei      	r1, 0
+    2f0e:	0bef      	bt      	0x2eec	// 2eec <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+    2f10:	3280      	movi      	r2, 128
+    2f12:	932c      	ld.w      	r1, (r3, 0x30)
+    2f14:	4246      	lsli      	r2, r2, 6
+    2f16:	6848      	and      	r1, r2
+    2f18:	3940      	cmpnei      	r1, 0
+    2f1a:	0be9      	bt      	0x2eec	// 2eec <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+    2f1c:	3280      	movi      	r2, 128
+    2f1e:	932c      	ld.w      	r1, (r3, 0x30)
+    2f20:	4247      	lsli      	r2, r2, 7
+    2f22:	6848      	and      	r1, r2
+    2f24:	3940      	cmpnei      	r1, 0
+    2f26:	0be3      	bt      	0x2eec	// 2eec <EXI10to15IntHandler+0x18>
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+    2f28:	3280      	movi      	r2, 128
+    2f2a:	932c      	ld.w      	r1, (r3, 0x30)
+    2f2c:	4248      	lsli      	r2, r2, 8
+    2f2e:	6848      	and      	r1, r2
+    2f30:	3940      	cmpnei      	r1, 0
+    2f32:	0fde      	bf      	0x2eee	// 2eee <EXI10to15IntHandler+0x1a>
+		SYSCON->EXICR = EXI_PIN15;
+    2f34:	b34b      	st.w      	r2, (r3, 0x2c)
+		BusBusy_Task();
+    2f36:	e00002bb 	bsr      	0x34ac	// 34ac <BusBusy_Task>
+}
+    2f3a:	07da      	br      	0x2eee	// 2eee <EXI10to15IntHandler+0x1a>
+    2f3c:	2000005c 	.long	0x2000005c
+
+Disassembly of section .text.LPTIntHandler:
+
+00002f40 <LPTIntHandler>:
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    2f40:	1460      	nie
+    2f42:	1462      	ipush
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+    2f44:	106b      	lrw      	r3, 0x20000014	// 2f70 <LPTIntHandler+0x30>
+    2f46:	3101      	movi      	r1, 1
+    2f48:	9360      	ld.w      	r3, (r3, 0x0)
+    2f4a:	934e      	ld.w      	r2, (r3, 0x38)
+    2f4c:	6884      	and      	r2, r1
+    2f4e:	3a40      	cmpnei      	r2, 0
+    2f50:	0c03      	bf      	0x2f56	// 2f56 <LPTIntHandler+0x16>
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+    2f52:	b330      	st.w      	r1, (r3, 0x40)
+	}
+}
+    2f54:	040b      	br      	0x2f6a	// 2f6a <LPTIntHandler+0x2a>
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+    2f56:	934e      	ld.w      	r2, (r3, 0x38)
+    2f58:	3102      	movi      	r1, 2
+    2f5a:	6884      	and      	r2, r1
+    2f5c:	3a40      	cmpnei      	r2, 0
+    2f5e:	0bfa      	bt      	0x2f52	// 2f52 <LPTIntHandler+0x12>
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+    2f60:	934e      	ld.w      	r2, (r3, 0x38)
+    2f62:	3104      	movi      	r1, 4
+    2f64:	6884      	and      	r2, r1
+    2f66:	3a40      	cmpnei      	r2, 0
+    2f68:	0bf5      	bt      	0x2f52	// 2f52 <LPTIntHandler+0x12>
+}
+    2f6a:	1463      	ipop
+    2f6c:	1461      	nir
+    2f6e:	0000      	bkpt
+    2f70:	20000014 	.long	0x20000014
+
+Disassembly of section .text.BT0IntHandler:
+
+00002f74 <BT0IntHandler>:
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    2f74:	1460      	nie
+    2f76:	1462      	ipush
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+    2f78:	1071      	lrw      	r3, 0x2000000c	// 2fbc <BT0IntHandler+0x48>
+    2f7a:	3101      	movi      	r1, 1
+    2f7c:	9360      	ld.w      	r3, (r3, 0x0)
+    2f7e:	934c      	ld.w      	r2, (r3, 0x30)
+    2f80:	6884      	and      	r2, r1
+    2f82:	3a40      	cmpnei      	r2, 0
+    2f84:	0c0a      	bf      	0x2f98	// 2f98 <BT0IntHandler+0x24>
+	{
+		BT0->ICR = BT_PEND;
+    2f86:	b32d      	st.w      	r1, (r3, 0x34)
+		
+		//BT_Stop_Low(BT0);
+
+		BT0->CR =BT0->CR & ~(0x01<<6);
+    2f88:	9341      	ld.w      	r2, (r3, 0x4)
+    2f8a:	3a86      	bclri      	r2, 6
+    2f8c:	b341      	st.w      	r2, (r3, 0x4)
+		BT0->RSSR &=0X0;
+    2f8e:	9340      	ld.w      	r2, (r3, 0x0)
+    2f90:	3200      	movi      	r2, 0
+    2f92:	b340      	st.w      	r2, (r3, 0x0)
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+    2f94:	1463      	ipop
+    2f96:	1461      	nir
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+    2f98:	934c      	ld.w      	r2, (r3, 0x30)
+    2f9a:	3102      	movi      	r1, 2
+    2f9c:	6884      	and      	r2, r1
+    2f9e:	3a40      	cmpnei      	r2, 0
+    2fa0:	0c03      	bf      	0x2fa6	// 2fa6 <BT0IntHandler+0x32>
+		BT0->ICR = BT_EVTRG;
+    2fa2:	b32d      	st.w      	r1, (r3, 0x34)
+}
+    2fa4:	07f8      	br      	0x2f94	// 2f94 <BT0IntHandler+0x20>
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+    2fa6:	934c      	ld.w      	r2, (r3, 0x30)
+    2fa8:	3104      	movi      	r1, 4
+    2faa:	6884      	and      	r2, r1
+    2fac:	3a40      	cmpnei      	r2, 0
+    2fae:	0bfa      	bt      	0x2fa2	// 2fa2 <BT0IntHandler+0x2e>
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+    2fb0:	934c      	ld.w      	r2, (r3, 0x30)
+    2fb2:	3108      	movi      	r1, 8
+    2fb4:	6884      	and      	r2, r1
+    2fb6:	3a40      	cmpnei      	r2, 0
+    2fb8:	0bf5      	bt      	0x2fa2	// 2fa2 <BT0IntHandler+0x2e>
+    2fba:	07ed      	br      	0x2f94	// 2f94 <BT0IntHandler+0x20>
+    2fbc:	2000000c 	.long	0x2000000c
+
+Disassembly of section .text.BT1IntHandler:
+
+00002fc0 <BT1IntHandler>:
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+    2fc0:	1460      	nie
+    2fc2:	1462      	ipush
+    2fc4:	14d0      	push      	r15
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+    2fc6:	1079      	lrw      	r3, 0x20000008	// 3028 <BT1IntHandler+0x68>
+    2fc8:	3101      	movi      	r1, 1
+    2fca:	9360      	ld.w      	r3, (r3, 0x0)
+    2fcc:	934c      	ld.w      	r2, (r3, 0x30)
+    2fce:	6884      	and      	r2, r1
+    2fd0:	3a40      	cmpnei      	r2, 0
+    2fd2:	0c03      	bf      	0x2fd8	// 2fd8 <BT1IntHandler+0x18>
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+    2fd4:	b32d      	st.w      	r1, (r3, 0x34)
+	} 
+}
+    2fd6:	0418      	br      	0x3006	// 3006 <BT1IntHandler+0x46>
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+    2fd8:	934c      	ld.w      	r2, (r3, 0x30)
+    2fda:	3102      	movi      	r1, 2
+    2fdc:	6884      	and      	r2, r1
+    2fde:	3a40      	cmpnei      	r2, 0
+    2fe0:	0c18      	bf      	0x3010	// 3010 <BT1IntHandler+0x50>
+		BT1->ICR = BT_CMP;
+    2fe2:	b32d      	st.w      	r1, (r3, 0x34)
+		NUM++;
+    2fe4:	1072      	lrw      	r3, 0x2000009c	// 302c <BT1IntHandler+0x6c>
+    2fe6:	8340      	ld.b      	r2, (r3, 0x0)
+    2fe8:	2200      	addi      	r2, 1
+    2fea:	7488      	zextb      	r2, r2
+		SysTick_100us++;
+    2fec:	9321      	ld.w      	r1, (r3, 0x4)
+    2fee:	2100      	addi      	r1, 1
+		if(NUM >= 10){
+    2ff0:	3a09      	cmphsi      	r2, 10
+		NUM++;
+    2ff2:	a340      	st.b      	r2, (r3, 0x0)
+		SysTick_100us++;
+    2ff4:	b321      	st.w      	r1, (r3, 0x4)
+		if(NUM >= 10){
+    2ff6:	0c08      	bf      	0x3006	// 3006 <BT1IntHandler+0x46>
+			NUM = 0;
+    2ff8:	3200      	movi      	r2, 0
+    2ffa:	a340      	st.b      	r2, (r3, 0x0)
+			SysTick_1ms++;
+    2ffc:	9342      	ld.w      	r2, (r3, 0x8)
+    2ffe:	2200      	addi      	r2, 1
+    3000:	b342      	st.w      	r2, (r3, 0x8)
+			BusIdle_Task();
+    3002:	e0000237 	bsr      	0x3470	// 3470 <BusIdle_Task>
+}
+    3006:	d9ee2000 	ld.w      	r15, (r14, 0x0)
+    300a:	1401      	addi      	r14, r14, 4
+    300c:	1463      	ipop
+    300e:	1461      	nir
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+    3010:	934c      	ld.w      	r2, (r3, 0x30)
+    3012:	3104      	movi      	r1, 4
+    3014:	6884      	and      	r2, r1
+    3016:	3a40      	cmpnei      	r2, 0
+    3018:	0bde      	bt      	0x2fd4	// 2fd4 <BT1IntHandler+0x14>
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+    301a:	934c      	ld.w      	r2, (r3, 0x30)
+    301c:	3108      	movi      	r1, 8
+    301e:	6884      	and      	r2, r1
+    3020:	3a40      	cmpnei      	r2, 0
+    3022:	0bd9      	bt      	0x2fd4	// 2fd4 <BT1IntHandler+0x14>
+    3024:	07f1      	br      	0x3006	// 3006 <BT1IntHandler+0x46>
+    3026:	0000      	bkpt
+    3028:	20000008 	.long	0x20000008
+    302c:	2000009c 	.long	0x2000009c
+
+Disassembly of section .text.PriviledgeVioHandler:
+
+00003030 <PriviledgeVioHandler>:
+    3030:	783c      	jmp      	r15
+
+Disassembly of section .text.PendTrapHandler:
+
+00003032 <PendTrapHandler>:
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    3032:	1460      	nie
+    3034:	1462      	ipush
+    // ISR content ...
+
+}
+    3036:	1463      	ipop
+    3038:	1461      	nir
+
+Disassembly of section .text.Trap3Handler:
+
+0000303a <Trap3Handler>:
+    303a:	1460      	nie
+    303c:	1462      	ipush
+    303e:	1463      	ipop
+    3040:	1461      	nir
+
+Disassembly of section .text.Trap2Handler:
+
+00003042 <Trap2Handler>:
+    3042:	1460      	nie
+    3044:	1462      	ipush
+    3046:	1463      	ipop
+    3048:	1461      	nir
+
+Disassembly of section .text.Trap1Handler:
+
+0000304a <Trap1Handler>:
+    304a:	1460      	nie
+    304c:	1462      	ipush
+    304e:	1463      	ipop
+    3050:	1461      	nir
+
+Disassembly of section .text.Trap0Handler:
+
+00003052 <Trap0Handler>:
+    3052:	1460      	nie
+    3054:	1462      	ipush
+    3056:	1463      	ipop
+    3058:	1461      	nir
+
+Disassembly of section .text.UnrecExecpHandler:
+
+0000305a <UnrecExecpHandler>:
+    305a:	1460      	nie
+    305c:	1462      	ipush
+    305e:	1463      	ipop
+    3060:	1461      	nir
+
+Disassembly of section .text.BreakPointHandler:
+
+00003062 <BreakPointHandler>:
+    3062:	1460      	nie
+    3064:	1462      	ipush
+    3066:	1463      	ipop
+    3068:	1461      	nir
+
+Disassembly of section .text.AccessErrHandler:
+
+0000306a <AccessErrHandler>:
+    306a:	1460      	nie
+    306c:	1462      	ipush
+    306e:	1463      	ipop
+    3070:	1461      	nir
+
+Disassembly of section .text.IllegalInstrHandler:
+
+00003072 <IllegalInstrHandler>:
+    3072:	1460      	nie
+    3074:	1462      	ipush
+    3076:	1463      	ipop
+    3078:	1461      	nir
+
+Disassembly of section .text.MisalignedHandler:
+
+0000307a <MisalignedHandler>:
+    307a:	1460      	nie
+    307c:	1462      	ipush
+    307e:	1463      	ipop
+    3080:	1461      	nir
+
+Disassembly of section .text.CNTAIntHandler:
+
+00003082 <CNTAIntHandler>:
+    3082:	1460      	nie
+    3084:	1462      	ipush
+    3086:	1463      	ipop
+    3088:	1461      	nir
+
+Disassembly of section .text.I2CIntHandler:
+
+0000308a <I2CIntHandler>:
+    308a:	1460      	nie
+    308c:	1462      	ipush
+    308e:	1463      	ipop
+    3090:	1461      	nir
+
+Disassembly of section .text.__divsi3:
+
+00003094 <__divsi3>:
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+    3094:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    3096:	c0006023 	mfcr      	r3, cr<0, 0>
+    309a:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+    309e:	1046      	lrw      	r2, 0x20000000	// 30b4 <__divsi3+0x20>
+    30a0:	3400      	movi      	r4, 0
+    30a2:	9240      	ld.w      	r2, (r2, 0x0)
+    30a4:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    30a6:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    30a8:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    30aa:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    30ac:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+    30b0:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    30b2:	1481      	pop      	r4
+    30b4:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__udivsi3:
+
+000030b8 <__udivsi3>:
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+    30b8:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    30ba:	c0006023 	mfcr      	r3, cr<0, 0>
+    30be:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    30c2:	1046      	lrw      	r2, 0x20000000	// 30d8 <__udivsi3+0x20>
+    30c4:	3401      	movi      	r4, 1
+    30c6:	9240      	ld.w      	r2, (r2, 0x0)
+    30c8:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    30ca:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    30cc:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    30ce:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    30d0:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+    30d4:	9202      	ld.w      	r0, (r2, 0x8)
+}
+    30d6:	1481      	pop      	r4
+    30d8:	20000000 	.long	0x20000000
+
+Disassembly of section .text.__umodsi3:
+
+000030dc <__umodsi3>:
+					);	
+	return HWD->REMAIN;
+}
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+    30dc:	14c1      	push      	r4
+	int PSR;
+	__asm volatile(
+    30de:	c0006023 	mfcr      	r3, cr<0, 0>
+    30e2:	c0807020 	psrclr      	ie
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+    30e6:	1046      	lrw      	r2, 0x20000000	// 30fc <__umodsi3+0x20>
+    30e8:	3401      	movi      	r4, 1
+    30ea:	9240      	ld.w      	r2, (r2, 0x0)
+    30ec:	b284      	st.w      	r4, (r2, 0x10)
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+    30ee:	3bbf      	bseti      	r3, 31
+	HWD->DIVIDENT = a;
+    30f0:	b200      	st.w      	r0, (r2, 0x0)
+	HWD->DIVISOR = b;
+    30f2:	b221      	st.w      	r1, (r2, 0x4)
+	__asm volatile(
+    30f4:	c0036420 	mtcr      	r3, cr<0, 0>
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+    30f8:	9203      	ld.w      	r0, (r2, 0xc)
+}
+    30fa:	1481      	pop      	r4
+    30fc:	20000000 	.long	0x20000000
+
+Disassembly of section .text.CK_CPU_EnAllNormalIrq:
+
+00003100 <CK_CPU_EnAllNormalIrq>:
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+    3100:	c1807420 	psrset      	ee, ie
+}
+    3104:	783c      	jmp      	r15
+
+Disassembly of section .text.CK_CPU_DisAllNormalIrq:
+
+00003106 <CK_CPU_DisAllNormalIrq>:
+
+void CK_CPU_DisAllNormalIrq(void)
+{
+ asm  ("psrclr ie");
+    3106:	c0807020 	psrclr      	ie
+}
+    310a:	783c      	jmp      	r15
+
+Disassembly of section .text.UARTx_Init:
+
+0000310c <UARTx_Init>:
+UART_t g_uart;		//空间不足，只能用一个串口
+UART_t g_uart1;		//空间不足，只能用一个串口
+MULIT_t m_send;	
+
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    310c:	14d1      	push      	r4, r15
+	switch((U8_T)uart_id){
+    310e:	7400      	zextb      	r0, r0
+    3110:	3841      	cmpnei      	r0, 1
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+    3112:	6d07      	mov      	r4, r1
+	switch((U8_T)uart_id){
+    3114:	0c13      	bf      	0x313a	// 313a <UARTx_Init+0x2e>
+    3116:	3840      	cmpnei      	r0, 0
+    3118:	0c04      	bf      	0x3120	// 3120 <UARTx_Init+0x14>
+    311a:	3842      	cmpnei      	r0, 2
+    311c:	0c64      	bf      	0x31e4	// 31e4 <UARTx_Init+0xd8>
+//			GPIO_DriveStrength_EN(GPIOB0,3);
+//			GPIO_Write_Low(GPIOB0,3);
+
+			break;
+	}
+}
+    311e:	1491      	pop      	r4, r15
+			UART0_DeInit();                                               //clear all UART Register
+    3120:	e3fff95e 	bsr      	0x23dc	// 23dc <UART0_DeInit>
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+    3124:	3100      	movi      	r1, 0
+    3126:	3000      	movi      	r0, 0
+    3128:	e3fff99a 	bsr      	0x245c	// 245c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART0,5000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+    312c:	1176      	lrw      	r3, 0x20000040	// 3204 <UARTx_Init+0xf8>
+    312e:	3200      	movi      	r2, 0
+    3130:	9300      	ld.w      	r0, (r3, 0x0)
+    3132:	1136      	lrw      	r1, 0x1388	// 3208 <UARTx_Init+0xfc>
+    3134:	e3fffa0a 	bsr      	0x2548	// 2548 <UARTInitRxTxIntEn>
+			break;
+    3138:	07f3      	br      	0x311e	// 311e <UARTx_Init+0x12>
+			memset(&g_uart1,0,sizeof(UART_t));
+    313a:	32a0      	movi      	r2, 160
+    313c:	3100      	movi      	r1, 0
+    313e:	1114      	lrw      	r0, 0x20000214	// 320c <UARTx_Init+0x100>
+    3140:	e3fff412 	bsr      	0x1964	// 1964 <__memset_fast>
+			memset(&m_send,0,sizeof(MULIT_t));
+    3144:	32a4      	movi      	r2, 164
+    3146:	3100      	movi      	r1, 0
+    3148:	1112      	lrw      	r0, 0x200002b4	// 3210 <UARTx_Init+0x104>
+    314a:	e3fff40d 	bsr      	0x1964	// 1964 <__memset_fast>
+			g_uart1.RecvTimeout = Recv_9600_TimeOut;
+    314e:	1172      	lrw      	r3, 0x20000294	// 3214 <UARTx_Init+0x108>
+    3150:	3203      	movi      	r2, 3
+    3152:	b345      	st.w      	r2, (r3, 0x14)
+			g_uart1.processing_cf = prt_cf;
+    3154:	b387      	st.w      	r4, (r3, 0x1c)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    3156:	310f      	movi      	r1, 15
+			m_send.BusState_Tick = SysTick_1ms;
+    3158:	1170      	lrw      	r3, 0x200000a4	// 3218 <UARTx_Init+0x10c>
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    315a:	1191      	lrw      	r4, 0x2000004c	// 321c <UARTx_Init+0x110>
+			m_send.BusState_Tick = SysTick_1ms;
+    315c:	9340      	ld.w      	r2, (r3, 0x0)
+    315e:	1171      	lrw      	r3, 0x20000334	// 3220 <UARTx_Init+0x114>
+    3160:	b346      	st.w      	r2, (r3, 0x18)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    3162:	9400      	ld.w      	r0, (r4, 0x0)
+			m_send.HighBit_Flag = 0x01;			
+    3164:	3201      	movi      	r2, 1
+    3166:	a341      	st.b      	r2, (r3, 0x1)
+			GPIO_PullHigh_Init(GPIOA0,15);		
+    3168:	e3fff6aa 	bsr      	0x1ebc	// 1ebc <GPIO_PullHigh_Init>
+			GPIO_IntGroup_Set(PA0,15,Selete_EXI_PIN15); 					//EXI0 set PB0.2
+    316c:	320f      	movi      	r2, 15
+    316e:	310f      	movi      	r1, 15
+    3170:	3000      	movi      	r0, 0
+    3172:	e3fff6b7 	bsr      	0x1ee0	// 1ee0 <GPIO_IntGroup_Set>
+			GPIOA0_EXI_Init(EXI15); 										//PB0.2 as input
+    3176:	300f      	movi      	r0, 15
+    3178:	e3fff73a 	bsr      	0x1fec	// 1fec <GPIOA0_EXI_Init>
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIFT); 					//ENABLE falling edge
+    317c:	3180      	movi      	r1, 128
+    317e:	3201      	movi      	r2, 1
+    3180:	4128      	lsli      	r1, r1, 8
+    3182:	3001      	movi      	r0, 1
+    3184:	e3fff5b2 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIRT);
+    3188:	3180      	movi      	r1, 128
+    318a:	3200      	movi      	r2, 0
+    318c:	4128      	lsli      	r1, r1, 8
+    318e:	3001      	movi      	r0, 1
+    3190:	e3fff5ac 	bsr      	0x1ce8	// 1ce8 <EXTI_trigger_CMD>
+			EXTI_interrupt_CMD(ENABLE,EXI_PIN15); 						//enable EXI
+    3194:	3180      	movi      	r1, 128
+    3196:	4128      	lsli      	r1, r1, 8
+    3198:	3001      	movi      	r0, 1
+    319a:	e3fff5c7 	bsr      	0x1d28	// 1d28 <EXTI_interrupt_CMD>
+			GPIO_EXTI_interrupt(GPIOA0,0b1000000000000000); 			//enable GPIOB02 as EXI
+    319e:	3180      	movi      	r1, 128
+    31a0:	9400      	ld.w      	r0, (r4, 0x0)
+    31a2:	4128      	lsli      	r1, r1, 8
+    31a4:	e3fff5dc 	bsr      	0x1d5c	// 1d5c <GPIO_EXTI_interrupt>
+			EXI4_Int_Enable(); 			
+    31a8:	e3fff5dc 	bsr      	0x1d60	// 1d60 <EXI4_Int_Enable>
+			UART1_DeInit();                                                 //clear all UART Register
+    31ac:	e3fff924 	bsr      	0x23f4	// 23f4 <UART1_DeInit>
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+    31b0:	3102      	movi      	r1, 2
+    31b2:	3001      	movi      	r0, 1
+    31b4:	e3fff954 	bsr      	0x245c	// 245c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART1,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    31b8:	107b      	lrw      	r3, 0x2000003c	// 3224 <UARTx_Init+0x118>
+    31ba:	3200      	movi      	r2, 0
+    31bc:	9300      	ld.w      	r0, (r3, 0x0)
+    31be:	1033      	lrw      	r1, 0x1388	// 3208 <UARTx_Init+0xfc>
+    31c0:	e3fff9c4 	bsr      	0x2548	// 2548 <UARTInitRxTxIntEn>
+			UART1_Int_Enable();
+    31c4:	e3fff930 	bsr      	0x2424	// 2424 <UART1_Int_Enable>
+			GPIO_Init(GPIOA0,UART485_DR_PIN,Output);
+    31c8:	3200      	movi      	r2, 0
+    31ca:	9400      	ld.w      	r0, (r4, 0x0)
+    31cc:	3107      	movi      	r1, 7
+    31ce:	e3fff607 	bsr      	0x1ddc	// 1ddc <GPIO_Init>
+			GPIO_DriveStrength_EN(GPIOA0,UART485_DR_PIN);
+    31d2:	9400      	ld.w      	r0, (r4, 0x0)
+    31d4:	3107      	movi      	r1, 7
+    31d6:	e3fff67d 	bsr      	0x1ed0	// 1ed0 <GPIO_DriveStrength_EN>
+			WRITE_LOW_DR;
+    31da:	9400      	ld.w      	r0, (r4, 0x0)
+    31dc:	3107      	movi      	r1, 7
+    31de:	e3fff789 	bsr      	0x20f0	// 20f0 <GPIO_Write_Low>
+			break;
+    31e2:	079e      	br      	0x311e	// 311e <UARTx_Init+0x12>
+			UART2_DeInit();                                                 //clear all UART Register
+    31e4:	e3fff914 	bsr      	0x240c	// 240c <UART2_DeInit>
+			UART_IO_Init(IO_UART2,2);                                    	//use PB0.4->RXD1, PB0.5->TXD1
+    31e8:	3102      	movi      	r1, 2
+    31ea:	3002      	movi      	r0, 2
+    31ec:	e3fff938 	bsr      	0x245c	// 245c <UART_IO_Init>
+			UARTInitRxTxIntEn(UART2,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+    31f0:	106e      	lrw      	r3, 0x20000038	// 3228 <UARTx_Init+0x11c>
+    31f2:	3200      	movi      	r2, 0
+    31f4:	9300      	ld.w      	r0, (r3, 0x0)
+    31f6:	1025      	lrw      	r1, 0x1388	// 3208 <UARTx_Init+0xfc>
+    31f8:	e3fff9a8 	bsr      	0x2548	// 2548 <UARTInitRxTxIntEn>
+			UART2_Int_Enable();
+    31fc:	e3fff922 	bsr      	0x2440	// 2440 <UART2_Int_Enable>
+}
+    3200:	078f      	br      	0x311e	// 311e <UARTx_Init+0x12>
+    3202:	0000      	bkpt
+    3204:	20000040 	.long	0x20000040
+    3208:	00001388 	.long	0x00001388
+    320c:	20000214 	.long	0x20000214
+    3210:	200002b4 	.long	0x200002b4
+    3214:	20000294 	.long	0x20000294
+    3218:	200000a4 	.long	0x200000a4
+    321c:	2000004c 	.long	0x2000004c
+    3220:	20000334 	.long	0x20000334
+    3224:	2000003c 	.long	0x2000003c
+    3228:	20000038 	.long	0x20000038
+
+Disassembly of section .text.UART1_RecvINT_Processing:
+
+0000322c <UART1_RecvINT_Processing>:
+/*******************************************************************************
+* Function Name  : UART1_RecvINT_Processing 
+* Description    : 串口1 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART1_RecvINT_Processing(char data){
+	if((g_uart1.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart1.RecvLen = 0;
+    322c:	106a      	lrw      	r3, 0x20000294	// 3254 <UART1_RecvINT_Processing+0x28>
+    322e:	8b28      	ld.h      	r1, (r3, 0x10)
+    3230:	3244      	movi      	r2, 68
+    3232:	6449      	cmplt      	r2, r1
+    3234:	0c03      	bf      	0x323a	// 323a <UART1_RecvINT_Processing+0xe>
+    3236:	3200      	movi      	r2, 0
+    3238:	ab48      	st.h      	r2, (r3, 0x10)
+	g_uart1.RecvBuffer[g_uart1.RecvLen++] = (U8_T)data;
+    323a:	8b48      	ld.h      	r2, (r3, 0x10)
+    323c:	5a22      	addi      	r1, r2, 1
+    323e:	ab28      	st.h      	r1, (r3, 0x10)
+    3240:	1026      	lrw      	r1, 0x20000214	// 3258 <UART1_RecvINT_Processing+0x2c>
+    3242:	6084      	addu      	r2, r1
+    3244:	a200      	st.b      	r0, (r2, 0x0)
+	
+	g_uart1.RecvIdleTiming = SysTick_1ms;
+    3246:	1046      	lrw      	r2, 0x200000a4	// 325c <UART1_RecvINT_Processing+0x30>
+    3248:	9240      	ld.w      	r2, (r2, 0x0)
+    324a:	b346      	st.w      	r2, (r3, 0x18)
+	g_uart1.Receiving = 0x01;
+    324c:	3201      	movi      	r2, 1
+    324e:	a34c      	st.b      	r2, (r3, 0xc)
+}
+    3250:	783c      	jmp      	r15
+    3252:	0000      	bkpt
+    3254:	20000294 	.long	0x20000294
+    3258:	20000214 	.long	0x20000214
+    325c:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.UART1_TASK:
+
+00003260 <UART1_TASK>:
+
+void UART1_TASK(void){
+    3260:	14d2      	push      	r4-r5, r15
+	U8_T rev = 0xFF;	
+	if(g_uart1.Receiving == 0x01){
+    3262:	1094      	lrw      	r4, 0x20000294	// 32b0 <UART1_TASK+0x50>
+    3264:	846c      	ld.b      	r3, (r4, 0xc)
+    3266:	3b41      	cmpnei      	r3, 1
+    3268:	0823      	bt      	0x32ae	// 32ae <UART1_TASK+0x4e>
+		if(SysTick_1ms - g_uart1.RecvIdleTiming > g_uart1.RecvTimeout){
+    326a:	10b3      	lrw      	r5, 0x200000a4	// 32b4 <UART1_TASK+0x54>
+    326c:	9560      	ld.w      	r3, (r5, 0x0)
+    326e:	9446      	ld.w      	r2, (r4, 0x18)
+    3270:	60ca      	subu      	r3, r2
+    3272:	9445      	ld.w      	r2, (r4, 0x14)
+    3274:	64c8      	cmphs      	r2, r3
+    3276:	081c      	bt      	0x32ae	// 32ae <UART1_TASK+0x4e>
+			
+			SYSCON_Int_Disable();					//2025-03-19,复制接收缓冲到数据处理缓冲内
+    3278:	e3fff582 	bsr      	0x1d7c	// 1d7c <SYSCON_Int_Disable>
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+    327c:	9560      	ld.w      	r3, (r5, 0x0)
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+    327e:	8c48      	ld.h      	r2, (r4, 0x10)
+    3280:	102e      	lrw      	r1, 0x20000214	// 32b8 <UART1_TASK+0x58>
+    3282:	100f      	lrw      	r0, 0x2000025a	// 32bc <UART1_TASK+0x5c>
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+    3284:	b466      	st.w      	r3, (r4, 0x18)
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+    3286:	e3fff3b3 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+			g_uart1.DealLen = g_uart1.RecvLen;
+    328a:	8c68      	ld.h      	r3, (r4, 0x10)
+    328c:	ac67      	st.h      	r3, (r4, 0xe)
+			g_uart1.RecvLen = 0;
+    328e:	3300      	movi      	r3, 0
+    3290:	ac68      	st.h      	r3, (r4, 0x10)
+			g_uart1.Receiving = 0;
+    3292:	a46c      	st.b      	r3, (r4, 0xc)
+			SYSCON_Int_Enable();
+    3294:	e3fff56e 	bsr      	0x1d70	// 1d70 <SYSCON_Int_Enable>
+
+#if DBG_LOG_EN
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART1 recv Len %d", g_uart1.DealLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART1 buff",g_uart1.DealBuffer,g_uart1.DealLen);
+#endif
+			if(g_uart1.processing_cf != NULL){
+    3298:	9467      	ld.w      	r3, (r4, 0x1c)
+    329a:	3b40      	cmpnei      	r3, 0
+    329c:	0c04      	bf      	0x32a4	// 32a4 <UART1_TASK+0x44>
+                rev = g_uart1.processing_cf(g_uart1.DealBuffer,g_uart1.DealLen);
+    329e:	8c27      	ld.h      	r1, (r4, 0xe)
+    32a0:	1007      	lrw      	r0, 0x2000025a	// 32bc <UART1_TASK+0x5c>
+    32a2:	7bcd      	jsr      	r3
+//			if(rev != 0x00)
+//			{
+//				Boot_Comm_UpgradeProcess(g_uart1.DealBuffer,g_uart1.DealLen);
+//			}
+			
+			memset(g_uart1.DealBuffer,0,USART_BUFFER_SIZE);	
+    32a4:	3246      	movi      	r2, 70
+    32a6:	3100      	movi      	r1, 0
+    32a8:	1005      	lrw      	r0, 0x2000025a	// 32bc <UART1_TASK+0x5c>
+    32aa:	e3fff35d 	bsr      	0x1964	// 1964 <__memset_fast>
+		}
+	}
+}
+    32ae:	1492      	pop      	r4-r5, r15
+    32b0:	20000294 	.long	0x20000294
+    32b4:	200000a4 	.long	0x200000a4
+    32b8:	20000214 	.long	0x20000214
+    32bc:	2000025a 	.long	0x2000025a
+
+Disassembly of section .text.BUS485_Send:
+
+000032c0 <BUS485_Send>:
+ * 			buff:发送数据
+ * 			len：数据长度
+ * @retval 	
+ * */
+U8_T BUS485_Send(U8_T *buff,U16_T len)
+{
+    32c0:	14d4      	push      	r4-r7, r15
+    32c2:	1423      	subi      	r14, r14, 12
+    32c4:	b801      	st.w      	r0, (r14, 0x4)
+    32c6:	b820      	st.w      	r1, (r14, 0x0)
+	unsigned int Dataval = 0,delay_cnt = 0;
+    32c8:	3500      	movi      	r5, 0
+
+	//等待通讯发送完成
+	while(RS485_Comming == 0x01){
+    32ca:	118a      	lrw      	r4, 0x200000a8	// 3370 <BUS485_Send+0xb0>
+		delay_cnt ++;
+		if(delay_cnt >= 100){
+			break;
+		}
+		
+		REVERISE_DR;	//485_DR
+    32cc:	11ca      	lrw      	r6, 0x2000004c	// 3374 <BUS485_Send+0xb4>
+	while(RS485_Comming == 0x01){
+    32ce:	9460      	ld.w      	r3, (r4, 0x0)
+    32d0:	3b41      	cmpnei      	r3, 1
+    32d2:	0c40      	bf      	0x3352	// 3352 <BUS485_Send+0x92>
+	}
+
+	if(m_send.BusState_Flag == UART_BUSIDLE){	//总线空闲
+    32d4:	1169      	lrw      	r3, 0x20000334	// 3378 <BUS485_Send+0xb8>
+    32d6:	83c0      	ld.b      	r6, (r3, 0x0)
+    32d8:	3e40      	cmpnei      	r6, 0
+    32da:	6dcf      	mov      	r7, r3
+    32dc:	0847      	bt      	0x336a	// 336a <BUS485_Send+0xaa>
+		
+		CK_CPU_DisAllNormalIrq();	
+    32de:	e3ffff14 	bsr      	0x3106	// 3106 <CK_CPU_DisAllNormalIrq>
+		
+		WRITE_HIGH_DR;	//485_DR
+    32e2:	1165      	lrw      	r3, 0x2000004c	// 3374 <BUS485_Send+0xb4>
+    32e4:	3107      	movi      	r1, 7
+    32e6:	9300      	ld.w      	r0, (r3, 0x0)
+    32e8:	b862      	st.w      	r3, (r14, 0x8)
+    32ea:	e3fff6ff 	bsr      	0x20e8	// 20e8 <GPIO_Write_High>
+		
+		RS485_Comm_Flag = 0x01;
+		RS485_Comm_Start = 0x00;
+		RS485_Comm_End = 0x00;		
+		
+		m_send.BusState_Flag = UART_BUSBUSY;//发送前总线置位繁忙
+    32ee:	3301      	movi      	r3, 1
+		RS485_Comm_Flag = 0x01;
+    32f0:	3201      	movi      	r2, 1
+    32f2:	b441      	st.w      	r2, (r4, 0x4)
+		m_send.BusState_Flag = UART_BUSBUSY;//发送前总线置位繁忙
+    32f4:	a760      	st.b      	r3, (r7, 0x0)
+		m_send.BUSBUSY_LOCK = 0x01;			//锁定总线状态
+    32f6:	a762      	st.b      	r3, (r7, 0x2)
+		RS485_Comm_Start = 0x00;
+    32f8:	b4c2      	st.w      	r6, (r4, 0x8)
+		RS485_Comm_End = 0x00;		
+    32fa:	b4c3      	st.w      	r6, (r4, 0xc)
+
+		CK_CPU_EnAllNormalIrq();		
+    32fc:	e3ffff02 	bsr      	0x3100	// 3100 <CK_CPU_EnAllNormalIrq>
+		
+		UARTTransmit(UART1,buff,len);
+    3300:	105f      	lrw      	r2, 0x2000003c	// 337c <BUS485_Send+0xbc>
+    3302:	9200      	ld.w      	r0, (r2, 0x0)
+    3304:	9821      	ld.w      	r1, (r14, 0x4)
+    3306:	9840      	ld.w      	r2, (r14, 0x0)
+    3308:	e3fff928 	bsr      	0x2558	// 2558 <UARTTransmit>
+    330c:	9862      	ld.w      	r3, (r14, 0x8)
+    330e:	b861      	st.w      	r3, (r14, 0x4)
+		do{
+			delay_nus(100);
+    3310:	3064      	movi      	r0, 100
+    3312:	e3fff96f 	bsr      	0x25f0	// 25f0 <delay_nus>
+			delay_cnt ++;
+    3316:	2500      	addi      	r5, 1
+			if(delay_cnt >= 100){
+    3318:	3363      	movi      	r3, 99
+    331a:	654c      	cmphs      	r3, r5
+    331c:	0c08      	bf      	0x332c	// 332c <BUS485_Send+0x6c>
+				break;
+			}
+			
+		}while((RS485_Comm_Start < len) || (RS485_Comm_End < len));    //发送完成
+    331e:	9462      	ld.w      	r3, (r4, 0x8)
+    3320:	9840      	ld.w      	r2, (r14, 0x0)
+    3322:	648d      	cmplt      	r3, r2
+    3324:	0bf6      	bt      	0x3310	// 3310 <BUS485_Send+0x50>
+    3326:	9463      	ld.w      	r3, (r4, 0xc)
+    3328:	648d      	cmplt      	r3, r2
+    332a:	0bf3      	bt      	0x3310	// 3310 <BUS485_Send+0x50>
+
+		CK_CPU_DisAllNormalIrq();	
+    332c:	e3fffeed 	bsr      	0x3106	// 3106 <CK_CPU_DisAllNormalIrq>
+
+		WRITE_LOW_DR;	//485_DR
+    3330:	9861      	ld.w      	r3, (r14, 0x4)
+    3332:	9300      	ld.w      	r0, (r3, 0x0)
+    3334:	3107      	movi      	r1, 7
+    3336:	e3fff6dd 	bsr      	0x20f0	// 20f0 <GPIO_Write_Low>
+		
+		RS485_Comm_Flag = 0x00;			
+    333a:	3300      	movi      	r3, 0
+    333c:	b461      	st.w      	r3, (r4, 0x4)
+		
+		m_send.BusState_Tick = SysTick_1ms;
+    333e:	1071      	lrw      	r3, 0x200000a4	// 3380 <BUS485_Send+0xc0>
+    3340:	9360      	ld.w      	r3, (r3, 0x0)
+    3342:	b766      	st.w      	r3, (r7, 0x18)
+		m_send.BUSBUSY_LOCK = 0x00;			//解锁总线状态
+    3344:	3300      	movi      	r3, 0
+    3346:	a762      	st.b      	r3, (r7, 0x2)
+		
+		CK_CPU_EnAllNormalIrq();			
+    3348:	e3fffedc 	bsr      	0x3100	// 3100 <CK_CPU_EnAllNormalIrq>
+	{ 		
+		return UART_BUSBUSY;	//发送失败
+	}	
+	
+	return 0x02;		//传入状态无效
+}
+    334c:	6c1b      	mov      	r0, r6
+    334e:	1403      	addi      	r14, r14, 12
+    3350:	1494      	pop      	r4-r7, r15
+		delay_nus(100);
+    3352:	3064      	movi      	r0, 100
+    3354:	e3fff94e 	bsr      	0x25f0	// 25f0 <delay_nus>
+		delay_cnt ++;
+    3358:	2500      	addi      	r5, 1
+		if(delay_cnt >= 100){
+    335a:	3364      	movi      	r3, 100
+    335c:	64d6      	cmpne      	r5, r3
+    335e:	0fbb      	bf      	0x32d4	// 32d4 <BUS485_Send+0x14>
+		REVERISE_DR;	//485_DR
+    3360:	3107      	movi      	r1, 7
+    3362:	9600      	ld.w      	r0, (r6, 0x0)
+    3364:	e3fff6ca 	bsr      	0x20f8	// 20f8 <GPIO_Reverse>
+    3368:	07b3      	br      	0x32ce	// 32ce <BUS485_Send+0xe>
+		return UART_BUSBUSY;	//发送失败
+    336a:	3601      	movi      	r6, 1
+    336c:	07f0      	br      	0x334c	// 334c <BUS485_Send+0x8c>
+    336e:	0000      	bkpt
+    3370:	200000a8 	.long	0x200000a8
+    3374:	2000004c 	.long	0x2000004c
+    3378:	20000334 	.long	0x20000334
+    337c:	2000003c 	.long	0x2000003c
+    3380:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.MultSend_Task:
+
+00003384 <MultSend_Task>:
+ * 			DatSd：发送标记,0x00:无发送，0x01：有数据发送
+ * 
+ * @retval 	0x00:发送成功	0x01:等待发送	0x02:数据无效
+ * */
+U8_T MultSend_Task(U8_T *buff,U16_T len,U8_T DatSd)
+{
+    3384:	14d3      	push      	r4-r6, r15
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+    3386:	5963      	subi      	r3, r1, 1
+    3388:	74cd      	zexth      	r3, r3
+    338a:	347f      	movi      	r4, 127
+    338c:	64d0      	cmphs      	r4, r3
+    338e:	0c23      	bf      	0x33d4	// 33d4 <MultSend_Task+0x50>
+	
+	if(DatSd == 0x01)	
+    3390:	3a41      	cmpnei      	r2, 1
+    3392:	0c03      	bf      	0x3398	// 3398 <MultSend_Task+0x14>
+		}else{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"retry end,%d",m_send.ResendCnt );
+			return RETRY_END;//没有重发次数
+		}
+	}
+	return BUSSEND_WAIT;//等待
+    3394:	3001      	movi      	r0, 1
+}
+    3396:	1493      	pop      	r4-r6, r15
+		if( m_send.ResendCnt < m_send.TotalCnt)	//判断数据是否还在有效期，是否还有发送次数
+    3398:	1092      	lrw      	r4, 0x20000334	// 33e0 <MultSend_Task+0x5c>
+    339a:	8444      	ld.b      	r2, (r4, 0x4)
+    339c:	8466      	ld.b      	r3, (r4, 0x6)
+    339e:	64c8      	cmphs      	r2, r3
+    33a0:	081c      	bt      	0x33d8	// 33d8 <MultSend_Task+0x54>
+			if(SysTick_1ms - m_send.BusbusyTimeout < m_send.DataValid_Time)
+    33a2:	10b1      	lrw      	r5, 0x200000a4	// 33e4 <MultSend_Task+0x60>
+    33a4:	9560      	ld.w      	r3, (r5, 0x0)
+    33a6:	94c8      	ld.w      	r6, (r4, 0x20)
+    33a8:	60da      	subu      	r3, r6
+    33aa:	94c5      	ld.w      	r6, (r4, 0x14)
+    33ac:	658c      	cmphs      	r3, r6
+    33ae:	0817      	bt      	0x33dc	// 33dc <MultSend_Task+0x58>
+				if((m_send.ResendCnt == 0x00)||(SysTick_1ms - m_send.ASend_Tick >= m_send.DataWait_Time)){//数据发送间隔
+    33b0:	3a40      	cmpnei      	r2, 0
+    33b2:	0c07      	bf      	0x33c0	// 33c0 <MultSend_Task+0x3c>
+    33b4:	9447      	ld.w      	r2, (r4, 0x1c)
+    33b6:	9560      	ld.w      	r3, (r5, 0x0)
+    33b8:	60ca      	subu      	r3, r2
+    33ba:	9444      	ld.w      	r2, (r4, 0x10)
+    33bc:	648c      	cmphs      	r3, r2
+    33be:	0feb      	bf      	0x3394	// 3394 <MultSend_Task+0x10>
+					if(BUS485_Send(buff,len) == UART_BUSIDLE){	//发送数据
+    33c0:	e3ffff80 	bsr      	0x32c0	// 32c0 <BUS485_Send>
+    33c4:	3840      	cmpnei      	r0, 0
+    33c6:	0be7      	bt      	0x3394	// 3394 <MultSend_Task+0x10>
+						m_send.ASend_Tick = SysTick_1ms;
+    33c8:	9560      	ld.w      	r3, (r5, 0x0)
+    33ca:	b467      	st.w      	r3, (r4, 0x1c)
+						m_send.ResendCnt++;
+    33cc:	8464      	ld.b      	r3, (r4, 0x4)
+    33ce:	2300      	addi      	r3, 1
+    33d0:	a464      	st.b      	r3, (r4, 0x4)
+    33d2:	07e2      	br      	0x3396	// 3396 <MultSend_Task+0x12>
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+    33d4:	3004      	movi      	r0, 4
+    33d6:	07e0      	br      	0x3396	// 3396 <MultSend_Task+0x12>
+			return RETRY_END;//没有重发次数
+    33d8:	3003      	movi      	r0, 3
+    33da:	07de      	br      	0x3396	// 3396 <MultSend_Task+0x12>
+				return DATA_END;//数据有效期结束
+    33dc:	3002      	movi      	r0, 2
+    33de:	07dc      	br      	0x3396	// 3396 <MultSend_Task+0x12>
+    33e0:	20000334 	.long	0x20000334
+    33e4:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.Set_GroupSend:
+
+000033e8 <Set_GroupSend>:
+ * 			indate ：	设置数据有效期
+ * 			tim_val :	发送时间间隔
+ * @retval 	None
+ * */
+void Set_GroupSend(U8_T *data,U16_T sled,U8_T SCnt,U32_T indate,U32_T tim_val)
+{
+    33e8:	14d4      	push      	r4-r7, r15
+    33ea:	1421      	subi      	r14, r14, 4
+    33ec:	6dcf      	mov      	r7, r3
+    33ee:	9866      	ld.w      	r3, (r14, 0x18)
+    33f0:	b860      	st.w      	r3, (r14, 0x0)
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    33f2:	5963      	subi      	r3, r1, 1
+{
+    33f4:	6d4b      	mov      	r5, r2
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    33f6:	74cd      	zexth      	r3, r3
+    33f8:	327f      	movi      	r2, 127
+    33fa:	64c8      	cmphs      	r2, r3
+{
+    33fc:	6d83      	mov      	r6, r0
+    33fe:	6d07      	mov      	r4, r1
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+    3400:	0c19      	bf      	0x3432	// 3432 <Set_GroupSend+0x4a>
+	
+	memset(m_send.SendBuffer,0, USART_SEND_SIZE);
+    3402:	3280      	movi      	r2, 128
+    3404:	3100      	movi      	r1, 0
+    3406:	100d      	lrw      	r0, 0x200002b4	// 3438 <Set_GroupSend+0x50>
+    3408:	e3fff2ae 	bsr      	0x1964	// 1964 <__memset_fast>
+	memcpy(m_send.SendBuffer,data,sled);
+    340c:	6c93      	mov      	r2, r4
+    340e:	6c5b      	mov      	r1, r6
+    3410:	100a      	lrw      	r0, 0x200002b4	// 3438 <Set_GroupSend+0x50>
+    3412:	e3fff2ed 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+	m_send.SendLen = sled;
+    3416:	106a      	lrw      	r3, 0x20000334	// 343c <Set_GroupSend+0x54>
+	
+	m_send.DataValid_Time = indate;//数据有效期
+	m_send.TotalCnt = SCnt;			//数据发送次数
+	m_send.DataWait_Time = tim_val;//发送数据间隔
+    3418:	9840      	ld.w      	r2, (r14, 0x0)
+    341a:	b344      	st.w      	r2, (r3, 0x10)
+	
+	m_send.ASend_Flag = 0x01;
+    341c:	3201      	movi      	r2, 1
+    341e:	a345      	st.b      	r2, (r3, 0x5)
+	m_send.SendState = BUSSEND_WAIT;
+    3420:	a343      	st.b      	r2, (r3, 0x3)
+	m_send.ResendCnt = 0x00;
+    3422:	3200      	movi      	r2, 0
+    3424:	a344      	st.b      	r2, (r3, 0x4)
+	m_send.SendLen = sled;
+    3426:	ab85      	st.h      	r4, (r3, 0xa)
+	m_send.DataValid_Time = indate;//数据有效期
+    3428:	b3e5      	st.w      	r7, (r3, 0x14)
+	m_send.TotalCnt = SCnt;			//数据发送次数
+    342a:	a3a6      	st.b      	r5, (r3, 0x6)
+	m_send.BusbusyTimeout = SysTick_1ms;
+    342c:	1045      	lrw      	r2, 0x200000a4	// 3440 <Set_GroupSend+0x58>
+    342e:	9240      	ld.w      	r2, (r2, 0x0)
+    3430:	b348      	st.w      	r2, (r3, 0x20)
+}
+    3432:	1401      	addi      	r14, r14, 4
+    3434:	1494      	pop      	r4-r7, r15
+    3436:	0000      	bkpt
+    3438:	200002b4 	.long	0x200002b4
+    343c:	20000334 	.long	0x20000334
+    3440:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.BUS485Send_Task:
+
+00003444 <BUS485Send_Task>:
+	m_send.Jump_Flag = jump;
+}
+
+//485发送任务
+void BUS485Send_Task(void)	//2025-03-29
+{	
+    3444:	14d1      	push      	r4, r15
+	//空闲等待
+	if(m_send.ASend_Flag == 0x01)
+    3446:	1089      	lrw      	r4, 0x20000334	// 3468 <BUS485Send_Task+0x24>
+    3448:	8465      	ld.b      	r3, (r4, 0x5)
+    344a:	3b41      	cmpnei      	r3, 1
+    344c:	080d      	bt      	0x3466	// 3466 <BUS485Send_Task+0x22>
+	{
+		m_send.SendState = MultSend_Task(m_send.SendBuffer,m_send.SendLen,m_send.ASend_Flag);
+    344e:	8c25      	ld.h      	r1, (r4, 0xa)
+    3450:	3201      	movi      	r2, 1
+    3452:	1007      	lrw      	r0, 0x200002b4	// 346c <BUS485Send_Task+0x28>
+    3454:	e3ffff98 	bsr      	0x3384	// 3384 <MultSend_Task>
+    3458:	a403      	st.b      	r0, (r4, 0x3)
+		
+		if( (m_send.SendState == DATA_END)||(m_send.SendState == RETRY_END) )//判断发送数据是否有效
+    345a:	2801      	subi      	r0, 2
+    345c:	7400      	zextb      	r0, r0
+    345e:	3801      	cmphsi      	r0, 2
+    3460:	0803      	bt      	0x3466	// 3466 <BUS485Send_Task+0x22>
+		{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"send end");
+			
+			m_send.ASend_Flag = 0x00;		//清除发送标志位
+    3462:	3300      	movi      	r3, 0
+    3464:	a465      	st.b      	r3, (r4, 0x5)
+
+		}
+	}
+}
+    3466:	1491      	pop      	r4, r15
+    3468:	20000334 	.long	0x20000334
+    346c:	200002b4 	.long	0x200002b4
+
+Disassembly of section .text.BusIdle_Task:
+
+00003470 <BusIdle_Task>:
+/**********************************************************
+ * @brief	2025-03-25，检测总线空闲，在定时器中断里调用
+ * @retval 	None
+ * */
+void BusIdle_Task(void)
+{
+    3470:	14d1      	push      	r4, r15
+	if((m_send.BusState_Flag != UART_BUSIDLE)&&(m_send.BUSBUSY_LOCK != 0x01))
+    3472:	108d      	lrw      	r4, 0x20000334	// 34a4 <BusIdle_Task+0x34>
+    3474:	8460      	ld.b      	r3, (r4, 0x0)
+    3476:	3b40      	cmpnei      	r3, 0
+    3478:	0c15      	bf      	0x34a2	// 34a2 <BusIdle_Task+0x32>
+    347a:	8462      	ld.b      	r3, (r4, 0x2)
+    347c:	3b41      	cmpnei      	r3, 1
+    347e:	0c12      	bf      	0x34a2	// 34a2 <BusIdle_Task+0x32>
+	{
+		CK_CPU_DisAllNormalIrq();
+    3480:	e3fffe43 	bsr      	0x3106	// 3106 <CK_CPU_DisAllNormalIrq>
+		if( (m_send.HighBit_Flag == 0x01)&&(SysTick_1ms - m_send.BusState_Tick >= (6 + m_send.Bus_DelayTime)) )
+    3484:	8461      	ld.b      	r3, (r4, 0x1)
+    3486:	3b41      	cmpnei      	r3, 1
+    3488:	080b      	bt      	0x349e	// 349e <BusIdle_Task+0x2e>
+    348a:	1068      	lrw      	r3, 0x200000a4	// 34a8 <BusIdle_Task+0x38>
+    348c:	9340      	ld.w      	r2, (r3, 0x0)
+    348e:	9466      	ld.w      	r3, (r4, 0x18)
+    3490:	608e      	subu      	r2, r3
+    3492:	9463      	ld.w      	r3, (r4, 0xc)
+    3494:	2305      	addi      	r3, 6
+    3496:	64c8      	cmphs      	r2, r3
+    3498:	0c03      	bf      	0x349e	// 349e <BusIdle_Task+0x2e>
+		{
+			m_send.BusState_Flag = UART_BUSIDLE;
+    349a:	3300      	movi      	r3, 0
+    349c:	a460      	st.b      	r3, (r4, 0x0)
+		}	
+		CK_CPU_EnAllNormalIrq();
+    349e:	e3fffe31 	bsr      	0x3100	// 3100 <CK_CPU_EnAllNormalIrq>
+	}
+}
+    34a2:	1491      	pop      	r4, r15
+    34a4:	20000334 	.long	0x20000334
+    34a8:	200000a4 	.long	0x200000a4
+
+Disassembly of section .text.BusBusy_Task:
+
+000034ac <BusBusy_Task>:
+/*******************************************************************
+ * @brief	检测总线繁忙，在串口接收RX引脚的外部中断服务函数里调用
+ * @retval 	None
+ * */
+void BusBusy_Task(void)
+{
+    34ac:	14d2      	push      	r4-r5, r15
+	CK_CPU_DisAllNormalIrq();
+    34ae:	e3fffe2c 	bsr      	0x3106	// 3106 <CK_CPU_DisAllNormalIrq>
+	m_send.BusState_Flag = UART_BUSBUSY;
+    34b2:	1091      	lrw      	r4, 0x20000334	// 34f4 <BusBusy_Task+0x48>
+    34b4:	3301      	movi      	r3, 1
+    34b6:	a460      	st.b      	r3, (r4, 0x0)
+	m_send.BusState_Tick = SysTick_1ms;
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    34b8:	310a      	movi      	r1, 10
+	m_send.BusState_Tick = SysTick_1ms;
+    34ba:	1070      	lrw      	r3, 0x200000a4	// 34f8 <BusBusy_Task+0x4c>
+
+	if(READ_RX_LEVEL_STATE == 0x01){
+    34bc:	10b0      	lrw      	r5, 0x2000004c	// 34fc <BusBusy_Task+0x50>
+	m_send.BusState_Tick = SysTick_1ms;
+    34be:	9340      	ld.w      	r2, (r3, 0x0)
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    34c0:	9300      	ld.w      	r0, (r3, 0x0)
+    34c2:	9467      	ld.w      	r3, (r4, 0x1c)
+	m_send.BusState_Tick = SysTick_1ms;
+    34c4:	b446      	st.w      	r2, (r4, 0x18)
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+    34c6:	600e      	subu      	r0, r3
+    34c8:	e3fffe0a 	bsr      	0x30dc	// 30dc <__umodsi3>
+    34cc:	b403      	st.w      	r0, (r4, 0xc)
+	if(READ_RX_LEVEL_STATE == 0x01){
+    34ce:	310f      	movi      	r1, 15
+    34d0:	9500      	ld.w      	r0, (r5, 0x0)
+    34d2:	e3fff61e 	bsr      	0x210e	// 210e <GPIO_Read_Status>
+    34d6:	3841      	cmpnei      	r0, 1
+    34d8:	0806      	bt      	0x34e4	// 34e4 <BusBusy_Task+0x38>
+		m_send.HighBit_Flag = 0x01;			//高电平标志置位
+    34da:	3301      	movi      	r3, 1
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+		m_send.HighBit_Flag = 0x00;			//低电平
+    34dc:	a461      	st.b      	r3, (r4, 0x1)
+	}	
+	CK_CPU_EnAllNormalIrq();
+    34de:	e3fffe11 	bsr      	0x3100	// 3100 <CK_CPU_EnAllNormalIrq>
+}
+    34e2:	1492      	pop      	r4-r5, r15
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+    34e4:	9500      	ld.w      	r0, (r5, 0x0)
+    34e6:	310f      	movi      	r1, 15
+    34e8:	e3fff613 	bsr      	0x210e	// 210e <GPIO_Read_Status>
+    34ec:	3840      	cmpnei      	r0, 0
+    34ee:	0bf8      	bt      	0x34de	// 34de <BusBusy_Task+0x32>
+		m_send.HighBit_Flag = 0x00;			//低电平
+    34f0:	3300      	movi      	r3, 0
+    34f2:	07f5      	br      	0x34dc	// 34dc <BusBusy_Task+0x30>
+    34f4:	20000334 	.long	0x20000334
+    34f8:	200000a4 	.long	0x200000a4
+    34fc:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.Dbg_Println:
+
+00003500 <Dbg_Println>:
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+    3500:	1423      	subi      	r14, r14, 12
+    3502:	b862      	st.w      	r3, (r14, 0x8)
+    3504:	b841      	st.w      	r2, (r14, 0x4)
+    3506:	b820      	st.w      	r1, (r14, 0x0)
+		
+		
+    }
+
+#endif	
+}
+    3508:	1403      	addi      	r14, r14, 12
+    350a:	783c      	jmp      	r15
+
+Disassembly of section .text.DIP_GetSwitchState:
+
+0000350c <DIP_GetSwitchState>:
+
+	/*进入设置界面 - 先决条件*/
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.DIP_val);
+}
+
+U8_T DIP_GetSwitchState(U8_T i){
+    350c:	14d0      	push      	r15
+	U8_T val = 0;
+	
+	switch (i)
+    350e:	3841      	cmpnei      	r0, 1
+    3510:	0c0d      	bf      	0x352a	// 352a <DIP_GetSwitchState+0x1e>
+    3512:	3840      	cmpnei      	r0, 0
+    3514:	0c05      	bf      	0x351e	// 351e <DIP_GetSwitchState+0x12>
+    3516:	3842      	cmpnei      	r0, 2
+    3518:	0c0d      	bf      	0x3532	// 3532 <DIP_GetSwitchState+0x26>
+	U8_T val = 0;
+    351a:	3000      	movi      	r0, 0
+    351c:	0406      	br      	0x3528	// 3528 <DIP_GetSwitchState+0x1c>
+    {
+		case DIP_CH1:
+			val = GPIO_Read_Status(GPIOA0,10);
+    351e:	1068      	lrw      	r3, 0x2000004c	// 353c <DIP_GetSwitchState+0x30>
+    3520:	310a      	movi      	r1, 10
+    3522:	9300      	ld.w      	r0, (r3, 0x0)
+			break;
+		case DIP_CH2:
+			val = GPIO_Read_Status(GPIOA0,9);
+			break;
+		case DIP_CH3:
+			val = GPIO_Read_Status(GPIOA0,8);
+    3524:	e3fff5f5 	bsr      	0x210e	// 210e <GPIO_Read_Status>
+			break;
+
+    }
+    return val;
+}
+    3528:	1490      	pop      	r15
+			val = GPIO_Read_Status(GPIOA0,9);
+    352a:	1065      	lrw      	r3, 0x2000004c	// 353c <DIP_GetSwitchState+0x30>
+    352c:	3109      	movi      	r1, 9
+    352e:	9300      	ld.w      	r0, (r3, 0x0)
+    3530:	07fa      	br      	0x3524	// 3524 <DIP_GetSwitchState+0x18>
+			val = GPIO_Read_Status(GPIOA0,8);
+    3532:	1063      	lrw      	r3, 0x2000004c	// 353c <DIP_GetSwitchState+0x30>
+    3534:	3108      	movi      	r1, 8
+    3536:	9300      	ld.w      	r0, (r3, 0x0)
+    3538:	07f6      	br      	0x3524	// 3524 <DIP_GetSwitchState+0x18>
+    353a:	0000      	bkpt
+    353c:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.DIP_Switch_Init:
+
+00003540 <DIP_Switch_Init>:
+void DIP_Switch_Init(void){
+    3540:	14d2      	push      	r4-r5, r15
+	GPIO_Init(GPIOA0,10,Intput);
+    3542:	1180      	lrw      	r4, 0x2000004c	// 35c0 <DIP_Switch_Init+0x80>
+    3544:	3201      	movi      	r2, 1
+    3546:	9400      	ld.w      	r0, (r4, 0x0)
+    3548:	310a      	movi      	r1, 10
+    354a:	e3fff449 	bsr      	0x1ddc	// 1ddc <GPIO_Init>
+	GPIO_Init(GPIOA0,9,Intput);
+    354e:	9400      	ld.w      	r0, (r4, 0x0)
+    3550:	3201      	movi      	r2, 1
+    3552:	3109      	movi      	r1, 9
+    3554:	e3fff444 	bsr      	0x1ddc	// 1ddc <GPIO_Init>
+	GPIO_Init(GPIOA0,8,Intput);
+    3558:	3201      	movi      	r2, 1
+    355a:	9400      	ld.w      	r0, (r4, 0x0)
+    355c:	3108      	movi      	r1, 8
+    355e:	e3fff43f 	bsr      	0x1ddc	// 1ddc <GPIO_Init>
+	GPIO_PullHigh_Init(GPIOA0,10);
+    3562:	9400      	ld.w      	r0, (r4, 0x0)
+    3564:	310a      	movi      	r1, 10
+    3566:	e3fff4ab 	bsr      	0x1ebc	// 1ebc <GPIO_PullHigh_Init>
+	GPIO_PullHigh_Init(GPIOA0,9);
+    356a:	9400      	ld.w      	r0, (r4, 0x0)
+    356c:	3109      	movi      	r1, 9
+    356e:	e3fff4a7 	bsr      	0x1ebc	// 1ebc <GPIO_PullHigh_Init>
+	GPIO_PullHigh_Init(GPIOA0,8);
+    3572:	9400      	ld.w      	r0, (r4, 0x0)
+    3574:	3108      	movi      	r1, 8
+    3576:	e3fff4a3 	bsr      	0x1ebc	// 1ebc <GPIO_PullHigh_Init>
+	memset(&g_Dip,0,sizeof(DIP_t));
+    357a:	3210      	movi      	r2, 16
+    357c:	3100      	movi      	r1, 0
+    357e:	1012      	lrw      	r0, 0x20000358	// 35c4 <DIP_Switch_Init+0x84>
+    3580:	e3fff1f2 	bsr      	0x1964	// 1964 <__memset_fast>
+	delay_nms(20);
+    3584:	3014      	movi      	r0, 20
+    3586:	e3fff81f 	bsr      	0x25c4	// 25c4 <delay_nms>
+    358a:	3400      	movi      	r4, 0
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+    358c:	10ae      	lrw      	r5, 0x20000358	// 35c4 <DIP_Switch_Init+0x84>
+		if(DIP_GetSwitchState(i) == DIP_PRESS){
+    358e:	7410      	zextb      	r0, r4
+    3590:	e3ffffbe 	bsr      	0x350c	// 350c <DIP_GetSwitchState>
+    3594:	3840      	cmpnei      	r0, 0
+    3596:	0807      	bt      	0x35a4	// 35a4 <DIP_Switch_Init+0x64>
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+    3598:	3301      	movi      	r3, 1
+    359a:	70d0      	lsl      	r3, r4
+    359c:	6c8f      	mov      	r2, r3
+    359e:	9562      	ld.w      	r3, (r5, 0x8)
+    35a0:	6cc8      	or      	r3, r2
+    35a2:	b562      	st.w      	r3, (r5, 0x8)
+    35a4:	2400      	addi      	r4, 1
+	for (U8_T i = 0; i < DIP_CHN_MAX; i++) {
+    35a6:	3c43      	cmpnei      	r4, 3
+    35a8:	0bf3      	bt      	0x358e	// 358e <DIP_Switch_Init+0x4e>
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    35aa:	1067      	lrw      	r3, 0x20000358	// 35c4 <DIP_Switch_Init+0x84>
+	g_Dip.addr = g_Dip.DIP_val & 0x07;
+    35ac:	3107      	movi      	r1, 7
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    35ae:	9342      	ld.w      	r2, (r3, 0x8)
+	g_Dip.addr = g_Dip.DIP_val & 0x07;
+    35b0:	6848      	and      	r1, r2
+    35b2:	a326      	st.b      	r1, (r3, 0x6)
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.DIP_val);
+    35b4:	3000      	movi      	r0, 0
+    35b6:	1025      	lrw      	r1, 0x44af	// 35c8 <DIP_Switch_Init+0x88>
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+    35b8:	b343      	st.w      	r2, (r3, 0xc)
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.DIP_val);
+    35ba:	e3ffffa3 	bsr      	0x3500	// 3500 <Dbg_Println>
+}
+    35be:	1492      	pop      	r4-r5, r15
+    35c0:	2000004c 	.long	0x2000004c
+    35c4:	20000358 	.long	0x20000358
+    35c8:	000044af 	.long	0x000044af
+
+Disassembly of section .text.DIP_ScanTask:
+
+000035cc <DIP_ScanTask>:
+
+void DIP_ScanTask(void)
+{
+    35cc:	14d3      	push      	r4-r6, r15
+    static U32_T update_20ms = 0;
+
+    if (SysTick_1ms - update_20ms > DIP_SCAN_Time)
+    35ce:	1120      	lrw      	r1, 0x200000a4	// 364c <DIP_ScanTask+0x80>
+    35d0:	1140      	lrw      	r2, 0x200000b8	// 3650 <DIP_ScanTask+0x84>
+    35d2:	11a1      	lrw      	r5, 0x20000358	// 3654 <DIP_ScanTask+0x88>
+    35d4:	9200      	ld.w      	r0, (r2, 0x0)
+    35d6:	9160      	ld.w      	r3, (r1, 0x0)
+    35d8:	60c2      	subu      	r3, r0
+    35da:	3b14      	cmphsi      	r3, 21
+    35dc:	0806      	bt      	0x35e8	// 35e8 <DIP_ScanTask+0x1c>
+                }
+            }
+        }
+    }
+
+    if(g_Dip.DIP_val != g_Dip.DIP_last_val)
+    35de:	9562      	ld.w      	r3, (r5, 0x8)
+    35e0:	9543      	ld.w      	r2, (r5, 0xc)
+    35e2:	648e      	cmpne      	r3, r2
+    35e4:	082e      	bt      	0x3640	// 3640 <DIP_ScanTask+0x74>
+		g_Dip.addr = g_Dip.DIP_val & 0x07;
+
+        
+    }
+    
+}
+    35e6:	1493      	pop      	r4-r6, r15
+        update_20ms = SysTick_1ms;
+    35e8:	9160      	ld.w      	r3, (r1, 0x0)
+    35ea:	b260      	st.w      	r3, (r2, 0x0)
+    35ec:	6d17      	mov      	r4, r5
+    35ee:	3600      	movi      	r6, 0
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+    35f0:	7418      	zextb      	r0, r6
+    35f2:	e3ffff8d 	bsr      	0x350c	// 350c <DIP_GetSwitchState>
+    35f6:	3840      	cmpnei      	r0, 0
+                g_Dip.delayCnt_OFF[i] = 0;
+    35f8:	3300      	movi      	r3, 0
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+    35fa:	0814      	bt      	0x3622	// 3622 <DIP_ScanTask+0x56>
+                g_Dip.delayCnt_OFF[i] = 0;
+    35fc:	a463      	st.b      	r3, (r4, 0x3)
+                if (g_Dip.delayCnt_ON[i] < DIP_DELAY_COUNT)
+    35fe:	8460      	ld.b      	r3, (r4, 0x0)
+    3600:	3b04      	cmphsi      	r3, 5
+    3602:	0808      	bt      	0x3612	// 3612 <DIP_ScanTask+0x46>
+                    g_Dip.delayCnt_ON[i]++;
+    3604:	2300      	addi      	r3, 1
+                    g_Dip.delayCnt_ON[i] = 0;
+    3606:	a460      	st.b      	r3, (r4, 0x0)
+    3608:	2600      	addi      	r6, 1
+        for (U8_T i = 0; i < DIP_CHN_MAX; i++)
+    360a:	3e43      	cmpnei      	r6, 3
+    360c:	2400      	addi      	r4, 1
+    360e:	0bf1      	bt      	0x35f0	// 35f0 <DIP_ScanTask+0x24>
+    3610:	07e7      	br      	0x35de	// 35de <DIP_ScanTask+0x12>
+                    g_Dip.DIP_val |= (DIP_VAL_ON << i);              
+    3612:	3301      	movi      	r3, 1
+    3614:	70d8      	lsl      	r3, r6
+    3616:	6c8f      	mov      	r2, r3
+    3618:	9562      	ld.w      	r3, (r5, 0x8)
+    361a:	6cc8      	or      	r3, r2
+    361c:	b562      	st.w      	r3, (r5, 0x8)
+                    g_Dip.delayCnt_ON[i] = 0;
+    361e:	3300      	movi      	r3, 0
+    3620:	07f3      	br      	0x3606	// 3606 <DIP_ScanTask+0x3a>
+                g_Dip.delayCnt_ON[i] = 0;
+    3622:	a460      	st.b      	r3, (r4, 0x0)
+                if (g_Dip.delayCnt_OFF[i] < DIP_DELAY_COUNT)
+    3624:	8463      	ld.b      	r3, (r4, 0x3)
+    3626:	3b04      	cmphsi      	r3, 5
+    3628:	0804      	bt      	0x3630	// 3630 <DIP_ScanTask+0x64>
+                    g_Dip.delayCnt_OFF[i]++;
+    362a:	2300      	addi      	r3, 1
+                    g_Dip.delayCnt_OFF[i] = 0;
+    362c:	a463      	st.b      	r3, (r4, 0x3)
+    362e:	07ed      	br      	0x3608	// 3608 <DIP_ScanTask+0x3c>
+                    g_Dip.DIP_val &= ~(DIP_VAL_ON << i);             
+    3630:	3300      	movi      	r3, 0
+    3632:	2b01      	subi      	r3, 2
+    3634:	9542      	ld.w      	r2, (r5, 0x8)
+    3636:	70db      	rotl      	r3, r6
+    3638:	68c8      	and      	r3, r2
+    363a:	b562      	st.w      	r3, (r5, 0x8)
+                    g_Dip.delayCnt_OFF[i] = 0;
+    363c:	3300      	movi      	r3, 0
+    363e:	07f7      	br      	0x362c	// 362c <DIP_ScanTask+0x60>
+		g_Dip.addr = g_Dip.DIP_val & 0x07;
+    3640:	3207      	movi      	r2, 7
+		g_Dip.DIP_last_val = g_Dip.DIP_val;
+    3642:	b563      	st.w      	r3, (r5, 0xc)
+		g_Dip.addr = g_Dip.DIP_val & 0x07;
+    3644:	68c8      	and      	r3, r2
+    3646:	a566      	st.b      	r3, (r5, 0x6)
+}
+    3648:	07cf      	br      	0x35e6	// 35e6 <DIP_ScanTask+0x1a>
+    364a:	0000      	bkpt
+    364c:	200000a4 	.long	0x200000a4
+    3650:	200000b8 	.long	0x200000b8
+    3654:	20000358 	.long	0x20000358
+
+Disassembly of section .text.Relay_Init:
+
+00003658 <Relay_Init>:
+#include "includes.h"
+
+ZERO_CTRL_RLY c_rly;
+
+void Relay_Init(void)
+{
+    3658:	14d1      	push      	r4, r15
+    365a:	1429      	subi      	r14, r14, 36
+	memset(&c_rly,0, sizeof(ZERO_CTRL_RLY));
+    365c:	118d      	lrw      	r4, 0x20000368	// 3710 <Relay_Init+0xb8>
+    365e:	3216      	movi      	r2, 22
+    3660:	3100      	movi      	r1, 0
+    3662:	6c13      	mov      	r0, r4
+    3664:	e3fff180 	bsr      	0x1964	// 1964 <__memset_fast>
+	c_rly.wind_LOW_vol = 1000;	//测试
+    3668:	33fa      	movi      	r3, 250
+    366a:	4362      	lsli      	r3, r3, 2
+    366c:	ac68      	st.h      	r3, (r4, 0x10)
+	c_rly.wind_MID_vol = 3000;
+    366e:	116c      	lrw      	r3, 0xbb8	// 371c <Relay_Init+0xc4>
+    3670:	ac69      	st.h      	r3, (r4, 0x12)
+	c_rly.wind_HIGH_vol = 5000;
+	
+
+	GPT_IO_Init(GPT_CHB_PB00);
+    3672:	3005      	movi      	r0, 5
+	c_rly.wind_HIGH_vol = 5000;
+    3674:	116b      	lrw      	r3, 0x1388	// 3720 <Relay_Init+0xc8>
+    3676:	ac6a      	st.h      	r3, (r4, 0x14)
+	GPT_IO_Init(GPT_CHB_PB00);
+    3678:	e3fff5b4 	bsr      	0x21e0	// 21e0 <GPT_IO_Init>
+	
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    367c:	3400      	movi      	r4, 0
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+    367e:	3300      	movi      	r3, 0
+    3680:	3240      	movi      	r2, 64
+    3682:	3100      	movi      	r1, 0
+    3684:	3001      	movi      	r0, 1
+    3686:	e3fff5fd 	bsr      	0x2280	// 2280 <GPT_Configure>
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+    368a:	b885      	st.w      	r4, (r14, 0x14)
+    368c:	b884      	st.w      	r4, (r14, 0x10)
+    368e:	b883      	st.w      	r4, (r14, 0xc)
+    3690:	b882      	st.w      	r4, (r14, 0x8)
+    3692:	b881      	st.w      	r4, (r14, 0x4)
+    3694:	b880      	st.w      	r4, (r14, 0x0)
+    3696:	3300      	movi      	r3, 0
+    3698:	3208      	movi      	r2, 8
+    369a:	3100      	movi      	r1, 0
+    369c:	3000      	movi      	r0, 0
+    369e:	e3fff5fb 	bsr      	0x2294	// 2294 <GPT_WaveCtrl_Configure>
+	GPT_Period_CMP_Write(10000,0,0);		
+    36a2:	3200      	movi      	r2, 0
+    36a4:	3100      	movi      	r1, 0
+    36a6:	101c      	lrw      	r0, 0x2710	// 3714 <Relay_Init+0xbc>
+    36a8:	e3fff684 	bsr      	0x23b0	// 23b0 <GPT_Period_CMP_Write>
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+    36ac:	3320      	movi      	r3, 32
+    36ae:	3204      	movi      	r2, 4
+    36b0:	3100      	movi      	r1, 0
+    36b2:	3001      	movi      	r0, 1
+    36b4:	e3fff612 	bsr      	0x22d8	// 22d8 <GPT_WaveLoad_Configure>
+	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+    36b8:	3301      	movi      	r3, 1
+    36ba:	3200      	movi      	r2, 0
+    36bc:	b888      	st.w      	r4, (r14, 0x20)
+    36be:	b887      	st.w      	r4, (r14, 0x1c)
+    36c0:	b886      	st.w      	r4, (r14, 0x18)
+    36c2:	b885      	st.w      	r4, (r14, 0x14)
+    36c4:	b884      	st.w      	r4, (r14, 0x10)
+    36c6:	b883      	st.w      	r4, (r14, 0xc)
+    36c8:	b862      	st.w      	r3, (r14, 0x8)
+    36ca:	b861      	st.w      	r3, (r14, 0x4)
+    36cc:	b880      	st.w      	r4, (r14, 0x0)
+    36ce:	3302      	movi      	r3, 2
+    36d0:	3100      	movi      	r1, 0
+    36d2:	3001      	movi      	r0, 1
+    36d4:	e3fff60c 	bsr      	0x22ec	// 22ec <GPT_WaveOut_Configure>
+	GPT_Start();
+    36d8:	e3fff664 	bsr      	0x23a0	// 23a0 <GPT_Start>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+    36dc:	3180      	movi      	r1, 128
+	
+	//真-继电器
+	GPIO_Init(GPIOA0,12,Output);
+    36de:	108f      	lrw      	r4, 0x2000004c	// 3718 <Relay_Init+0xc0>
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+    36e0:	4129      	lsli      	r1, r1, 9
+    36e2:	3001      	movi      	r0, 1
+    36e4:	e3fff66e 	bsr      	0x23c0	// 23c0 <GPT_ConfigInterrupt_CMD>
+	GPIO_Init(GPIOA0,12,Output);
+    36e8:	9400      	ld.w      	r0, (r4, 0x0)
+    36ea:	3200      	movi      	r2, 0
+    36ec:	310c      	movi      	r1, 12
+    36ee:	e3fff377 	bsr      	0x1ddc	// 1ddc <GPIO_Init>
+	GPIO_Init(GPIOA0,13,Output);	
+    36f2:	3200      	movi      	r2, 0
+    36f4:	9400      	ld.w      	r0, (r4, 0x0)
+    36f6:	310d      	movi      	r1, 13
+    36f8:	e3fff372 	bsr      	0x1ddc	// 1ddc <GPIO_Init>
+	
+	RLY_HOT_CLOSE;
+    36fc:	9400      	ld.w      	r0, (r4, 0x0)
+    36fe:	310d      	movi      	r1, 13
+    3700:	e3fff4f4 	bsr      	0x20e8	// 20e8 <GPIO_Write_High>
+	RLY_COOL_CLOSE;
+    3704:	9400      	ld.w      	r0, (r4, 0x0)
+    3706:	310c      	movi      	r1, 12
+    3708:	e3fff4f0 	bsr      	0x20e8	// 20e8 <GPIO_Write_High>
+	
+}
+    370c:	1409      	addi      	r14, r14, 36
+    370e:	1491      	pop      	r4, r15
+    3710:	20000368 	.long	0x20000368
+    3714:	00002710 	.long	0x00002710
+    3718:	2000004c 	.long	0x2000004c
+    371c:	00000bb8 	.long	0x00000bb8
+    3720:	00001388 	.long	0x00001388
+
+Disassembly of section .text.CheckSum:
+
+00003724 <CheckSum>:
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum(U8_T *data,U16_T len)
+{
+    3724:	6cc3      	mov      	r3, r0
+    3726:	6040      	addu      	r1, r0
+	U8_T data_sum = 0;
+    3728:	3000      	movi      	r0, 0
+	
+	for(U16_T i = 0;i<len;i++)
+    372a:	644e      	cmpne      	r3, r1
+    372c:	0802      	bt      	0x3730	// 3730 <CheckSum+0xc>
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+}
+    372e:	783c      	jmp      	r15
+		data_sum += data[i];
+    3730:	8340      	ld.b      	r2, (r3, 0x0)
+    3732:	6008      	addu      	r0, r2
+    3734:	7400      	zextb      	r0, r0
+    3736:	2300      	addi      	r3, 1
+    3738:	07f9      	br      	0x372a	// 372a <CheckSum+0x6>
+
+Disassembly of section .text.Change_OUTV:
+
+0000373c <Change_OUTV>:
+
+
+//选择输出电压，0 - 10000mV
+U8_T Change_OUTV(U16_T VolOut)
+{
+	if(VolOut > 10000) return 0x01;
+    373c:	1065      	lrw      	r3, 0x2710	// 3750 <Change_OUTV+0x14>
+    373e:	640c      	cmphs      	r3, r0
+    3740:	0c06      	bf      	0x374c	// 374c <Change_OUTV+0x10>
+	
+	GPT0->CMPA = VolOut;
+    3742:	1065      	lrw      	r3, 0x20000024	// 3754 <Change_OUTV+0x18>
+    3744:	9360      	ld.w      	r3, (r3, 0x0)
+    3746:	b30b      	st.w      	r0, (r3, 0x2c)
+	
+//	Dbg_Println(DBG_BIT_SYS_STATUS,"CMPA:%d",VolOut);
+	
+	return 0x00;
+    3748:	3000      	movi      	r0, 0
+}
+    374a:	783c      	jmp      	r15
+	if(VolOut > 10000) return 0x01;
+    374c:	3001      	movi      	r0, 1
+    374e:	07fe      	br      	0x374a	// 374a <Change_OUTV+0xe>
+    3750:	00002710 	.long	0x00002710
+    3754:	20000024 	.long	0x20000024
+
+Disassembly of section .text.BLV_VolOut_Ctrl:
+
+00003758 <BLV_VolOut_Ctrl>:
+ * @param	
+ * @retval 	None
+ * */
+
+void BLV_VolOut_Ctrl(void)
+{
+    3758:	14d1      	push      	r4, r15
+	c_rly.wind = WIND_STOP;
+    375a:	109f      	lrw      	r4, 0x20000368	// 37d4 <BLV_VolOut_Ctrl+0x7c>
+    375c:	3300      	movi      	r3, 0
+    375e:	a46c      	st.b      	r3, (r4, 0xc)
+
+	if(c_rly.rly_state[WINDRLY_HIGH] == Control_ON)	
+    3760:	8465      	ld.b      	r3, (r4, 0x5)
+    3762:	3b41      	cmpnei      	r3, 1
+    3764:	0816      	bt      	0x3790	// 3790 <BLV_VolOut_Ctrl+0x38>
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_HIGH");
+    3766:	103d      	lrw      	r1, 0x44bb	// 37d8 <BLV_VolOut_Ctrl+0x80>
+    3768:	3000      	movi      	r0, 0
+    376a:	e3fffecb 	bsr      	0x3500	// 3500 <Dbg_Println>
+		
+		c_rly.wind = WIND_HIGH;
+    376e:	3303      	movi      	r3, 3
+    3770:	a46c      	st.b      	r3, (r4, 0xc)
+		c_rly.rly_state[WINDRLY_MID] =	Control_OFF;
+    3772:	3300      	movi      	r3, 0
+    3774:	a464      	st.b      	r3, (r4, 0x4)
+	}else if(c_rly.rly_state[WINDRLY_MID] == Control_ON)	
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_MID");
+		
+		c_rly.wind = WIND_MID;
+		c_rly.rly_state[WINDRLY_LOW] = Control_OFF;
+    3776:	a463      	st.b      	r3, (r4, 0x3)
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_LOW");
+		
+		c_rly.wind = WIND_LOW;
+	}	
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"VolOut_Ctrl wind:%d",c_rly.wind);
+    3778:	844c      	ld.b      	r2, (r4, 0xc)
+    377a:	1039      	lrw      	r1, 0x44d7	// 37dc <BLV_VolOut_Ctrl+0x84>
+    377c:	3000      	movi      	r0, 0
+    377e:	e3fffec1 	bsr      	0x3500	// 3500 <Dbg_Println>
+	
+	if(c_rly.wind == WIND_STOP){
+    3782:	846c      	ld.b      	r3, (r4, 0xc)
+    3784:	3b40      	cmpnei      	r3, 0
+    3786:	081a      	bt      	0x37ba	// 37ba <BLV_VolOut_Ctrl+0x62>
+		Change_OUTV(c_rly.wind_STOP_vol);
+    3788:	8c07      	ld.h      	r0, (r4, 0xe)
+	}else if(c_rly.wind == WIND_LOW){
+		Change_OUTV(c_rly.wind_LOW_vol);
+	}else if(c_rly.wind == WIND_MID){
+		Change_OUTV(c_rly.wind_MID_vol);
+	}else if(c_rly.wind == WIND_HIGH){
+		Change_OUTV(c_rly.wind_HIGH_vol);
+    378a:	e3ffffd9 	bsr      	0x373c	// 373c <Change_OUTV>
+	}		
+}
+    378e:	1491      	pop      	r4, r15
+	}else if(c_rly.rly_state[WINDRLY_MID] == Control_ON)	
+    3790:	8464      	ld.b      	r3, (r4, 0x4)
+    3792:	3b41      	cmpnei      	r3, 1
+    3794:	0809      	bt      	0x37a6	// 37a6 <BLV_VolOut_Ctrl+0x4e>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_MID");
+    3796:	1033      	lrw      	r1, 0x44c5	// 37e0 <BLV_VolOut_Ctrl+0x88>
+    3798:	3000      	movi      	r0, 0
+    379a:	e3fffeb3 	bsr      	0x3500	// 3500 <Dbg_Println>
+		c_rly.wind = WIND_MID;
+    379e:	3302      	movi      	r3, 2
+    37a0:	a46c      	st.b      	r3, (r4, 0xc)
+		c_rly.rly_state[WINDRLY_LOW] = Control_OFF;
+    37a2:	3300      	movi      	r3, 0
+    37a4:	07e9      	br      	0x3776	// 3776 <BLV_VolOut_Ctrl+0x1e>
+	}else if(c_rly.rly_state[WINDRLY_LOW] == Control_ON)	// 优先级高>中>抵 , 若同时被控制多个风速继电器，则将按照优先级打开继电器  并自动关闭其他继电器
+    37a6:	8463      	ld.b      	r3, (r4, 0x3)
+    37a8:	3b41      	cmpnei      	r3, 1
+    37aa:	0be7      	bt      	0x3778	// 3778 <BLV_VolOut_Ctrl+0x20>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_LOW");
+    37ac:	102e      	lrw      	r1, 0x44ce	// 37e4 <BLV_VolOut_Ctrl+0x8c>
+    37ae:	3000      	movi      	r0, 0
+    37b0:	e3fffea8 	bsr      	0x3500	// 3500 <Dbg_Println>
+		c_rly.wind = WIND_LOW;
+    37b4:	3301      	movi      	r3, 1
+    37b6:	a46c      	st.b      	r3, (r4, 0xc)
+    37b8:	07e0      	br      	0x3778	// 3778 <BLV_VolOut_Ctrl+0x20>
+	}else if(c_rly.wind == WIND_LOW){
+    37ba:	3b41      	cmpnei      	r3, 1
+    37bc:	0803      	bt      	0x37c2	// 37c2 <BLV_VolOut_Ctrl+0x6a>
+		Change_OUTV(c_rly.wind_LOW_vol);
+    37be:	8c08      	ld.h      	r0, (r4, 0x10)
+    37c0:	07e5      	br      	0x378a	// 378a <BLV_VolOut_Ctrl+0x32>
+	}else if(c_rly.wind == WIND_MID){
+    37c2:	3b42      	cmpnei      	r3, 2
+    37c4:	0803      	bt      	0x37ca	// 37ca <BLV_VolOut_Ctrl+0x72>
+		Change_OUTV(c_rly.wind_MID_vol);
+    37c6:	8c09      	ld.h      	r0, (r4, 0x12)
+    37c8:	07e1      	br      	0x378a	// 378a <BLV_VolOut_Ctrl+0x32>
+	}else if(c_rly.wind == WIND_HIGH){
+    37ca:	3b43      	cmpnei      	r3, 3
+    37cc:	0be1      	bt      	0x378e	// 378e <BLV_VolOut_Ctrl+0x36>
+		Change_OUTV(c_rly.wind_HIGH_vol);
+    37ce:	8c0a      	ld.h      	r0, (r4, 0x14)
+    37d0:	07dd      	br      	0x378a	// 378a <BLV_VolOut_Ctrl+0x32>
+    37d2:	0000      	bkpt
+    37d4:	20000368 	.long	0x20000368
+    37d8:	000044bb 	.long	0x000044bb
+    37dc:	000044d7 	.long	0x000044d7
+    37e0:	000044c5 	.long	0x000044c5
+    37e4:	000044ce 	.long	0x000044ce
+
+Disassembly of section .text.BLV_RLY_Ctrl_Purpose:
+
+000037e8 <BLV_RLY_Ctrl_Purpose>:
+ * @param	rly_id:继电器id
+ * @param	state：继电器要改变的状态
+ * @retval 	None
+ * */
+void BLV_RLY_Ctrl_Purpose(U8_T rly_id,U8_T state)
+{
+    37e8:	14d0      	push      	r15
+	if(rly_id >= RLY_MAX) return;
+    37ea:	3804      	cmphsi      	r0, 5
+    37ec:	0807      	bt      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+
+	switch(state)
+    37ee:	3941      	cmpnei      	r1, 1
+    37f0:	0c06      	bf      	0x37fc	// 37fc <BLV_RLY_Ctrl_Purpose+0x14>
+    37f2:	3940      	cmpnei      	r1, 0
+    37f4:	0c13      	bf      	0x381a	// 381a <BLV_RLY_Ctrl_Purpose+0x32>
+    37f6:	3942      	cmpnei      	r1, 2
+    37f8:	0c20      	bf      	0x3838	// 3838 <BLV_RLY_Ctrl_Purpose+0x50>
+				}
+			}				
+		break;		
+	}
+
+}
+    37fa:	1490      	pop      	r15
+			if(c_rly.rly_state[rly_id] != Control_ON)
+    37fc:	1078      	lrw      	r3, 0x20000368	// 385c <BLV_RLY_Ctrl_Purpose+0x74>
+    37fe:	60c0      	addu      	r3, r0
+    3800:	8341      	ld.b      	r2, (r3, 0x1)
+    3802:	3a41      	cmpnei      	r2, 1
+    3804:	0ffb      	bf      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+				c_rly.rly_state[rly_id] = Control_ON;
+    3806:	3201      	movi      	r2, 1
+				if(rly_id == CTRL_RLY1){
+    3808:	3840      	cmpnei      	r0, 0
+				c_rly.rly_state[rly_id] = Control_ON;
+    380a:	a341      	st.b      	r2, (r3, 0x1)
+				if(rly_id == CTRL_RLY1){
+    380c:	0822      	bt      	0x3850	// 3850 <BLV_RLY_Ctrl_Purpose+0x68>
+					RLY_HOT_OPEN;
+    380e:	1075      	lrw      	r3, 0x2000004c	// 3860 <BLV_RLY_Ctrl_Purpose+0x78>
+    3810:	310d      	movi      	r1, 13
+    3812:	9300      	ld.w      	r0, (r3, 0x0)
+					RLY_COOL_OPEN;
+    3814:	e3fff46e 	bsr      	0x20f0	// 20f0 <GPIO_Write_Low>
+    3818:	07f1      	br      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+    381a:	1071      	lrw      	r3, 0x20000368	// 385c <BLV_RLY_Ctrl_Purpose+0x74>
+    381c:	60c0      	addu      	r3, r0
+    381e:	8341      	ld.b      	r2, (r3, 0x1)
+    3820:	3a40      	cmpnei      	r2, 0
+    3822:	0fec      	bf      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+				c_rly.rly_state[rly_id] = Control_OFF;
+    3824:	3200      	movi      	r2, 0
+				if(rly_id == CTRL_RLY1){
+    3826:	3840      	cmpnei      	r0, 0
+				c_rly.rly_state[rly_id] = Control_OFF;
+    3828:	a341      	st.b      	r2, (r3, 0x1)
+				if(rly_id == CTRL_RLY1){
+    382a:	080d      	bt      	0x3844	// 3844 <BLV_RLY_Ctrl_Purpose+0x5c>
+					RLY_HOT_CLOSE;
+    382c:	106d      	lrw      	r3, 0x2000004c	// 3860 <BLV_RLY_Ctrl_Purpose+0x78>
+    382e:	310d      	movi      	r1, 13
+    3830:	9300      	ld.w      	r0, (r3, 0x0)
+					RLY_COOL_CLOSE;
+    3832:	e3fff45b 	bsr      	0x20e8	// 20e8 <GPIO_Write_High>
+    3836:	07e2      	br      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+    3838:	1069      	lrw      	r3, 0x20000368	// 385c <BLV_RLY_Ctrl_Purpose+0x74>
+    383a:	60c0      	addu      	r3, r0
+    383c:	8341      	ld.b      	r2, (r3, 0x1)
+    383e:	3a40      	cmpnei      	r2, 0
+    3840:	0fe3      	bf      	0x3806	// 3806 <BLV_RLY_Ctrl_Purpose+0x1e>
+    3842:	07f1      	br      	0x3824	// 3824 <BLV_RLY_Ctrl_Purpose+0x3c>
+				}else if(rly_id == CTRL_RLY2){
+    3844:	3841      	cmpnei      	r0, 1
+    3846:	0bda      	bt      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+					RLY_COOL_CLOSE;
+    3848:	1066      	lrw      	r3, 0x2000004c	// 3860 <BLV_RLY_Ctrl_Purpose+0x78>
+    384a:	310c      	movi      	r1, 12
+    384c:	9300      	ld.w      	r0, (r3, 0x0)
+    384e:	07f2      	br      	0x3832	// 3832 <BLV_RLY_Ctrl_Purpose+0x4a>
+				}else if(rly_id == CTRL_RLY2){
+    3850:	3841      	cmpnei      	r0, 1
+    3852:	0bd4      	bt      	0x37fa	// 37fa <BLV_RLY_Ctrl_Purpose+0x12>
+					RLY_COOL_OPEN;
+    3854:	1063      	lrw      	r3, 0x2000004c	// 3860 <BLV_RLY_Ctrl_Purpose+0x78>
+    3856:	310c      	movi      	r1, 12
+    3858:	9300      	ld.w      	r0, (r3, 0x0)
+    385a:	07dd      	br      	0x3814	// 3814 <BLV_RLY_Ctrl_Purpose+0x2c>
+    385c:	20000368 	.long	0x20000368
+    3860:	2000004c 	.long	0x2000004c
+
+Disassembly of section .text.BLV_RLY_Task:
+
+00003864 <BLV_RLY_Task>:
+//继电器动作处理
+void BLV_RLY_Task(void)
+{
+    3864:	14d3      	push      	r4-r6, r15
+	if(c_rly.rly_control != 0x01)return;
+    3866:	10b3      	lrw      	r5, 0x20000368	// 38b0 <BLV_RLY_Task+0x4c>
+    3868:	8560      	ld.b      	r3, (r5, 0x0)
+    386a:	3b41      	cmpnei      	r3, 1
+    386c:	0819      	bt      	0x389e	// 389e <BLV_RLY_Task+0x3a>
+    386e:	6d97      	mov      	r6, r5
+    3870:	3400      	movi      	r4, 0
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_ctrl_state[i] == RLY_OFF)
+    3872:	8666      	ld.b      	r3, (r6, 0x6)
+    3874:	3b41      	cmpnei      	r3, 1
+    3876:	0815      	bt      	0x38a0	// 38a0 <BLV_RLY_Task+0x3c>
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_OFF);
+    3878:	3100      	movi      	r1, 0
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+			
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+		{
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+    387a:	6c13      	mov      	r0, r4
+    387c:	e3ffffb6 	bsr      	0x37e8	// 37e8 <BLV_RLY_Ctrl_Purpose>
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3880:	2400      	addi      	r4, 1
+    3882:	7510      	zextb      	r4, r4
+		}				
+
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+    3884:	3300      	movi      	r3, 0
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    3886:	3c45      	cmpnei      	r4, 5
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+    3888:	a666      	st.b      	r3, (r6, 0x6)
+    388a:	2600      	addi      	r6, 1
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    388c:	0bf3      	bt      	0x3872	// 3872 <BLV_RLY_Task+0xe>
+	}
+	
+	BLV_VolOut_Ctrl();		//风速判断，输出pwm
+    388e:	e3ffff65 	bsr      	0x3758	// 3758 <BLV_VolOut_Ctrl>
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"BLV_RLY_Task");
+    3892:	1029      	lrw      	r1, 0x44eb	// 38b4 <BLV_RLY_Task+0x50>
+    3894:	3000      	movi      	r0, 0
+    3896:	e3fffe35 	bsr      	0x3500	// 3500 <Dbg_Println>
+	
+	c_rly.rly_control = 0x00;
+    389a:	3300      	movi      	r3, 0
+    389c:	a560      	st.b      	r3, (r5, 0x0)
+}
+    389e:	1493      	pop      	r4-r6, r15
+		else if(c_rly.rly_ctrl_state[i] == RLY_ON)
+    38a0:	3b42      	cmpnei      	r3, 2
+    38a2:	0803      	bt      	0x38a8	// 38a8 <BLV_RLY_Task+0x44>
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+    38a4:	3101      	movi      	r1, 1
+    38a6:	07ea      	br      	0x387a	// 387a <BLV_RLY_Task+0x16>
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+    38a8:	3b43      	cmpnei      	r3, 3
+    38aa:	0beb      	bt      	0x3880	// 3880 <BLV_RLY_Task+0x1c>
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+    38ac:	3102      	movi      	r1, 2
+    38ae:	07e6      	br      	0x387a	// 387a <BLV_RLY_Task+0x16>
+    38b0:	20000368 	.long	0x20000368
+    38b4:	000044eb 	.long	0x000044eb
+
+Disassembly of section .text.BLV_A9RLY_CMD_SET_Processing:
+
+000038b8 <BLV_A9RLY_CMD_SET_Processing>:
+
+//1、主机下发设置继电器状态
+void BLV_A9RLY_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+    38b8:	14d2      	push      	r4-r5, r15
+    38ba:	1426      	subi      	r14, r14, 24
+	U16_T SendLen = 0x00;
+	
+	U16_T RLY_STATE = 0x00;
+	U8_T t = 0x00;
+	
+	if(len >= 9)
+    38bc:	3908      	cmphsi      	r1, 9
+{
+    38be:	6d03      	mov      	r4, r0
+	if(len >= 9)
+    38c0:	082a      	bt      	0x3914	// 3914 <BLV_A9RLY_CMD_SET_Processing+0x5c>
+	
+			}				
+		}
+	}
+	
+	BLV_RLY_Task();
+    38c2:	e3ffffd1 	bsr      	0x3864	// 3864 <BLV_RLY_Task>
+	
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    38c6:	1162      	lrw      	r3, 0x20000358	// 394c <BLV_A9RLY_CMD_SET_Processing+0x94>
+    38c8:	8366      	ld.b      	r3, (r3, 0x6)
+    38ca:	dc6e0004 	st.b      	r3, (r14, 0x4)
+	SendData[SendLen++] = data[1];
+    38ce:	8461      	ld.b      	r3, (r4, 0x1)
+    38d0:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    38d4:	8462      	ld.b      	r3, (r4, 0x2)
+    38d6:	dc6e0006 	st.b      	r3, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    38da:	8460      	ld.b      	r3, (r4, 0x0)
+    38dc:	dc6e0007 	st.b      	r3, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    38e0:	3300      	movi      	r3, 0
+    38e2:	dc6e0009 	st.b      	r3, (r14, 0x9)
+	SendData[SendLen++] = 0x30;		//回复CMD
+    38e6:	3330      	movi      	r3, 48
+    38e8:	dc6e000a 	st.b      	r3, (r14, 0xa)
+	
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    38ec:	3107      	movi      	r1, 7
+	SendData[SEND_LEN] = SendLen;	//len
+    38ee:	3307      	movi      	r3, 7
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    38f0:	1801      	addi      	r0, r14, 4
+	SendData[SEND_LEN] = SendLen;	//len
+    38f2:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    38f6:	e3ffff17 	bsr      	0x3724	// 3724 <CheckSum>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    38fa:	3314      	movi      	r3, 20
+    38fc:	b860      	st.w      	r3, (r14, 0x0)
+    38fe:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    3900:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    3904:	4361      	lsli      	r3, r3, 1
+    3906:	3201      	movi      	r2, 1
+    3908:	3107      	movi      	r1, 7
+    390a:	1801      	addi      	r0, r14, 4
+    390c:	e3fffd6e 	bsr      	0x33e8	// 33e8 <Set_GroupSend>
+}
+    3910:	1406      	addi      	r14, r14, 24
+    3912:	1492      	pop      	r4-r5, r15
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+    3914:	8048      	ld.b      	r2, (r0, 0x8)
+    3916:	8067      	ld.b      	r3, (r0, 0x7)
+    3918:	4248      	lsli      	r2, r2, 8
+    391a:	608c      	addu      	r2, r3
+		c_rly.rly_control = 0x01;	//继电器控制标志
+    391c:	3101      	movi      	r1, 1
+    391e:	106d      	lrw      	r3, 0x20000368	// 3950 <BLV_A9RLY_CMD_SET_Processing+0x98>
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+    3920:	7489      	zexth      	r2, r2
+		c_rly.rly_control = 0x01;	//继电器控制标志
+    3922:	a320      	st.b      	r1, (r3, 0x0)
+    3924:	3000      	movi      	r0, 0
+			t = ((RLY_STATE>>(2*i)) & 0x03);
+    3926:	3503      	movi      	r5, 3
+    3928:	6c4b      	mov      	r1, r2
+    392a:	7042      	asr      	r1, r0
+    392c:	6854      	and      	r1, r5
+    392e:	7444      	zextb      	r1, r1
+			if(t == NO_CTRL){
+    3930:	3940      	cmpnei      	r1, 0
+    3932:	0807      	bt      	0x3940	// 3940 <BLV_A9RLY_CMD_SET_Processing+0x88>
+    3934:	2001      	addi      	r0, 2
+		for(U8_T i = 0;i<RLY_MAX;i++)
+    3936:	384a      	cmpnei      	r0, 10
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+    3938:	a326      	st.b      	r1, (r3, 0x6)
+    393a:	2300      	addi      	r3, 1
+		for(U8_T i = 0;i<RLY_MAX;i++)
+    393c:	0bf6      	bt      	0x3928	// 3928 <BLV_A9RLY_CMD_SET_Processing+0x70>
+    393e:	07c2      	br      	0x38c2	// 38c2 <BLV_A9RLY_CMD_SET_Processing+0xa>
+			}else if(t == RLY_OFF){
+    3940:	3941      	cmpnei      	r1, 1
+    3942:	0ff9      	bf      	0x3934	// 3934 <BLV_A9RLY_CMD_SET_Processing+0x7c>
+			}else if(t == RLY_ON){
+    3944:	3942      	cmpnei      	r1, 2
+    3946:	0ff7      	bf      	0x3934	// 3934 <BLV_A9RLY_CMD_SET_Processing+0x7c>
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+    3948:	3103      	movi      	r1, 3
+    394a:	07f5      	br      	0x3934	// 3934 <BLV_A9RLY_CMD_SET_Processing+0x7c>
+    394c:	20000358 	.long	0x20000358
+    3950:	20000368 	.long	0x20000368
+
+Disassembly of section .text.BLV_A9RLY_CMD_READ_Processing:
+
+00003954 <BLV_A9RLY_CMD_READ_Processing>:
+
+//2、读取继电器状态的回复
+void BLV_A9RLY_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+    3954:	14d1      	push      	r4, r15
+    3956:	1426      	subi      	r14, r14, 24
+    3958:	109b      	lrw      	r4, 0x20000368	// 39c4 <BLV_A9RLY_CMD_READ_Processing+0x70>
+    395a:	3200      	movi      	r2, 0
+	U8_T SendData[20];	
+	U16_T SendLen = 0x00;
+	
+	U8_T RLY_State = 0x00;
+    395c:	3300      	movi      	r3, 0
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_state[i] == Control_ON)
+    395e:	8421      	ld.b      	r1, (r4, 0x1)
+    3960:	3941      	cmpnei      	r1, 1
+    3962:	0804      	bt      	0x396a	// 396a <BLV_A9RLY_CMD_READ_Processing+0x16>
+		{
+			RLY_State |= (0x01<<i);
+    3964:	7048      	lsl      	r1, r2
+    3966:	6cc4      	or      	r3, r1
+    3968:	74cc      	zextb      	r3, r3
+    396a:	2200      	addi      	r2, 1
+	for(U8_T i = 0;i<RLY_MAX;i++)
+    396c:	3a45      	cmpnei      	r2, 5
+    396e:	2400      	addi      	r4, 1
+    3970:	0bf7      	bt      	0x395e	// 395e <BLV_A9RLY_CMD_READ_Processing+0xa>
+		}
+	}
+	
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+    3972:	1056      	lrw      	r2, 0x20000358	// 39c8 <BLV_A9RLY_CMD_READ_Processing+0x74>
+    3974:	8246      	ld.b      	r2, (r2, 0x6)
+    3976:	dc4e0004 	st.b      	r2, (r14, 0x4)
+	SendData[SendLen++] = data[1];
+    397a:	8041      	ld.b      	r2, (r0, 0x1)
+    397c:	dc4e0005 	st.b      	r2, (r14, 0x5)
+	SendData[SendLen++] = data[2];
+    3980:	8042      	ld.b      	r2, (r0, 0x2)
+    3982:	dc4e0006 	st.b      	r2, (r14, 0x6)
+	SendData[SendLen++] = data[0];
+    3986:	8040      	ld.b      	r2, (r0, 0x0)
+    3988:	dc4e0007 	st.b      	r2, (r14, 0x7)
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+    398c:	3200      	movi      	r2, 0
+    398e:	dc4e0009 	st.b      	r2, (r14, 0x9)
+	SendData[SendLen++] = 0x34;		//回复CMD
+	SendData[SendLen++] = RLY_State;
+    3992:	dc6e000b 	st.b      	r3, (r14, 0xb)
+	SendData[SendLen++] = 0x34;		//回复CMD
+    3996:	3234      	movi      	r2, 52
+	
+	SendData[SEND_LEN] = SendLen;	//len
+    3998:	3308      	movi      	r3, 8
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    399a:	3108      	movi      	r1, 8
+    399c:	1801      	addi      	r0, r14, 4
+	SendData[SendLen++] = 0x34;		//回复CMD
+    399e:	dc4e000a 	st.b      	r2, (r14, 0xa)
+	SendData[SEND_LEN] = SendLen;	//len
+    39a2:	dc6e0008 	st.b      	r3, (r14, 0x8)
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    39a6:	e3fffebf 	bsr      	0x3724	// 3724 <CheckSum>
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    39aa:	3314      	movi      	r3, 20
+    39ac:	b860      	st.w      	r3, (r14, 0x0)
+    39ae:	3396      	movi      	r3, 150
+	SendData[SEND_SUM] = CheckSum(SendData,SendLen);
+    39b0:	dc0e0009 	st.b      	r0, (r14, 0x9)
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+    39b4:	4361      	lsli      	r3, r3, 1
+    39b6:	3201      	movi      	r2, 1
+    39b8:	3108      	movi      	r1, 8
+    39ba:	1801      	addi      	r0, r14, 4
+    39bc:	e3fffd16 	bsr      	0x33e8	// 33e8 <Set_GroupSend>
+}
+    39c0:	1406      	addi      	r14, r14, 24
+    39c2:	1491      	pop      	r4, r15
+    39c4:	20000368 	.long	0x20000368
+    39c8:	20000358 	.long	0x20000358
+
+Disassembly of section .text.BLV_RLY_RS485_Pro:
+
+000039cc <BLV_RLY_RS485_Pro>:
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+}
+
+
+U8_T BLV_RLY_RS485_Pro(U8_T *RecData, U16_T Len)
+{
+    39cc:	14d2      	push      	r4-r5, r15
+    39ce:	142d      	subi      	r14, r14, 52
+	U8_T ret = 0x00;
+	U8_T ckdata[50];
+	
+	if(Len < 0x05)
+    39d0:	3904      	cmphsi      	r1, 5
+{
+    39d2:	6d03      	mov      	r4, r0
+	if(Len < 0x05)
+    39d4:	0808      	bt      	0x39e4	// 39e4 <BLV_RLY_RS485_Pro+0x18>
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Data Len err");
+    39d6:	1124      	lrw      	r1, 0x44f8	// 3a64 <BLV_RLY_RS485_Pro+0x98>
+		return 0x01;
+	}
+	
+	if(RecData[4] !=  Len)
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check err");
+    39d8:	3000      	movi      	r0, 0
+    39da:	e3fffd93 	bsr      	0x3500	// 3500 <Dbg_Println>
+		return 0x01;
+    39de:	3001      	movi      	r0, 1
+		case 0x28:
+			
+		break;
+	}
+	
+}
+    39e0:	140d      	addi      	r14, r14, 52
+    39e2:	1492      	pop      	r4-r5, r15
+	if(RecData[4] !=  Len)
+    39e4:	80a4      	ld.b      	r5, (r0, 0x4)
+    39e6:	6456      	cmpne      	r5, r1
+    39e8:	0c03      	bf      	0x39ee	// 39ee <BLV_RLY_RS485_Pro+0x22>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check err");
+    39ea:	1120      	lrw      	r1, 0x4505	// 3a68 <BLV_RLY_RS485_Pro+0x9c>
+    39ec:	07f6      	br      	0x39d8	// 39d8 <BLV_RLY_RS485_Pro+0xc>
+	if(RecData[2] !=  A9EXPANDTYPE)			//A9继电器设备类型
+    39ee:	8062      	ld.b      	r3, (r0, 0x2)
+    39f0:	3b4e      	cmpnei      	r3, 14
+    39f2:	0c07      	bf      	0x3a00	// 3a00 <BLV_RLY_RS485_Pro+0x34>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Type Check err");
+    39f4:	3000      	movi      	r0, 0
+    39f6:	103e      	lrw      	r1, 0x4513	// 3a6c <BLV_RLY_RS485_Pro+0xa0>
+    39f8:	e3fffd84 	bsr      	0x3500	// 3500 <Dbg_Println>
+		return 0x02;		
+    39fc:	3002      	movi      	r0, 2
+    39fe:	07f1      	br      	0x39e0	// 39e0 <BLV_RLY_RS485_Pro+0x14>
+	if(RecData[3] !=  g_Dip.addr)			//地址校验
+    3a00:	107c      	lrw      	r3, 0x20000358	// 3a70 <BLV_RLY_RS485_Pro+0xa4>
+    3a02:	8043      	ld.b      	r2, (r0, 0x3)
+    3a04:	8366      	ld.b      	r3, (r3, 0x6)
+    3a06:	64ca      	cmpne      	r2, r3
+    3a08:	0c07      	bf      	0x3a16	// 3a16 <BLV_RLY_RS485_Pro+0x4a>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Addr Check err ");	
+    3a0a:	3000      	movi      	r0, 0
+    3a0c:	103a      	lrw      	r1, 0x4522	// 3a74 <BLV_RLY_RS485_Pro+0xa8>
+    3a0e:	e3fffd79 	bsr      	0x3500	// 3500 <Dbg_Println>
+		return 0x03;		
+    3a12:	3003      	movi      	r0, 3
+    3a14:	07e6      	br      	0x39e0	// 39e0 <BLV_RLY_RS485_Pro+0x14>
+	memcpy(ckdata,RecData,Len);
+    3a16:	6c97      	mov      	r2, r5
+    3a18:	6c43      	mov      	r1, r0
+    3a1a:	6c3b      	mov      	r0, r14
+    3a1c:	e3ffefe8 	bsr      	0x19ec	// 19ec <__memcpy_fast>
+	ckdata[SEND_SUM] = 0x00;
+    3a20:	3300      	movi      	r3, 0
+	if(CheckSum(ckdata,Len) != RecData[SEND_SUM])		//和校验
+    3a22:	6c57      	mov      	r1, r5
+    3a24:	6c3b      	mov      	r0, r14
+	ckdata[SEND_SUM] = 0x00;
+    3a26:	dc6e0005 	st.b      	r3, (r14, 0x5)
+	if(CheckSum(ckdata,Len) != RecData[SEND_SUM])		//和校验
+    3a2a:	e3fffe7d 	bsr      	0x3724	// 3724 <CheckSum>
+    3a2e:	8465      	ld.b      	r3, (r4, 0x5)
+    3a30:	640e      	cmpne      	r3, r0
+    3a32:	6c83      	mov      	r2, r0
+    3a34:	0c07      	bf      	0x3a42	// 3a42 <BLV_RLY_RS485_Pro+0x76>
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Sum Check err: %02x",CheckSum(ckdata,Len));	
+    3a36:	3000      	movi      	r0, 0
+    3a38:	1030      	lrw      	r1, 0x4532	// 3a78 <BLV_RLY_RS485_Pro+0xac>
+    3a3a:	e3fffd63 	bsr      	0x3500	// 3500 <Dbg_Println>
+		return 0x04;		
+    3a3e:	3004      	movi      	r0, 4
+    3a40:	07d0      	br      	0x39e0	// 39e0 <BLV_RLY_RS485_Pro+0x14>
+	switch(RecData[0x06])
+    3a42:	8466      	ld.b      	r3, (r4, 0x6)
+    3a44:	3220      	movi      	r2, 32
+    3a46:	648e      	cmpne      	r3, r2
+    3a48:	0c09      	bf      	0x3a5a	// 3a5a <BLV_RLY_RS485_Pro+0x8e>
+    3a4a:	3224      	movi      	r2, 36
+    3a4c:	648e      	cmpne      	r3, r2
+    3a4e:	0bc9      	bt      	0x39e0	// 39e0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_A9RLY_CMD_READ_Processing(RecData,Len);
+    3a50:	6c13      	mov      	r0, r4
+    3a52:	6c57      	mov      	r1, r5
+    3a54:	e3ffff80 	bsr      	0x3954	// 3954 <BLV_A9RLY_CMD_READ_Processing>
+}
+    3a58:	07c4      	br      	0x39e0	// 39e0 <BLV_RLY_RS485_Pro+0x14>
+			BLV_A9RLY_CMD_SET_Processing(RecData,Len);
+    3a5a:	6c57      	mov      	r1, r5
+    3a5c:	6c13      	mov      	r0, r4
+    3a5e:	e3ffff2d 	bsr      	0x38b8	// 38b8 <BLV_A9RLY_CMD_SET_Processing>
+		break;
+    3a62:	07bf      	br      	0x39e0	// 39e0 <BLV_RLY_RS485_Pro+0x14>
+    3a64:	000044f8 	.long	0x000044f8
+    3a68:	00004505 	.long	0x00004505
+    3a6c:	00004513 	.long	0x00004513
+    3a70:	20000358 	.long	0x20000358
+    3a74:	00004522 	.long	0x00004522
+    3a78:	00004532 	.long	0x00004532
+
+Disassembly of section .text.TK_Sampling_prog:
+
+00003a7c <TK_Sampling_prog>:
+    3a7c:	14c4      	push      	r4-r7
+    3a7e:	1072      	lrw      	r3, 0x20000054	// 3ac4 <TK_Sampling_prog+0x48>
+    3a80:	1012      	lrw      	r0, 0x20000626	// 3ac8 <TK_Sampling_prog+0x4c>
+    3a82:	1093      	lrw      	r4, 0x20000497	// 3acc <TK_Sampling_prog+0x50>
+    3a84:	6d83      	mov      	r6, r0
+    3a86:	93a0      	ld.w      	r5, (r3, 0x0)
+    3a88:	3300      	movi      	r3, 0
+    3a8a:	4342      	lsli      	r2, r3, 2
+    3a8c:	6094      	addu      	r2, r5
+    3a8e:	9220      	ld.w      	r1, (r2, 0x0)
+    3a90:	4341      	lsli      	r2, r3, 1
+    3a92:	6080      	addu      	r2, r0
+    3a94:	7445      	zexth      	r1, r1
+    3a96:	aa20      	st.h      	r1, (r2, 0x0)
+    3a98:	8440      	ld.b      	r2, (r4, 0x0)
+    3a9a:	3a41      	cmpnei      	r2, 1
+    3a9c:	080f      	bt      	0x3aba	// 3aba <TK_Sampling_prog+0x3e>
+    3a9e:	3300      	movi      	r3, 0
+    3aa0:	10ec      	lrw      	r7, 0x20000380	// 3ad0 <TK_Sampling_prog+0x54>
+    3aa2:	4341      	lsli      	r2, r3, 1
+    3aa4:	5e28      	addu      	r1, r6, r2
+    3aa6:	8920      	ld.h      	r1, (r1, 0x0)
+    3aa8:	2300      	addi      	r3, 1
+    3aaa:	7445      	zexth      	r1, r1
+    3aac:	609c      	addu      	r2, r7
+    3aae:	3b51      	cmpnei      	r3, 17
+    3ab0:	aa20      	st.h      	r1, (r2, 0x0)
+    3ab2:	0bf8      	bt      	0x3aa2	// 3aa2 <TK_Sampling_prog+0x26>
+    3ab4:	3300      	movi      	r3, 0
+    3ab6:	a460      	st.b      	r3, (r4, 0x0)
+    3ab8:	3311      	movi      	r3, 17
+    3aba:	2300      	addi      	r3, 1
+    3abc:	74cc      	zextb      	r3, r3
+    3abe:	3b10      	cmphsi      	r3, 17
+    3ac0:	0fe5      	bf      	0x3a8a	// 3a8a <TK_Sampling_prog+0xe>
+    3ac2:	1484      	pop      	r4-r7
+    3ac4:	20000054 	.long	0x20000054
+    3ac8:	20000626 	.long	0x20000626
+    3acc:	20000497 	.long	0x20000497
+    3ad0:	20000380 	.long	0x20000380
+
+Disassembly of section .text.TKEYIntHandler:
+
+00003ad4 <TKEYIntHandler>:
+    3ad4:	1460      	nie
+    3ad6:	1462      	ipush
+    3ad8:	14d1      	push      	r4, r15
+    3ada:	109e      	lrw      	r4, 0x20000068	// 3b50 <TKEYIntHandler+0x7c>
+    3adc:	9460      	ld.w      	r3, (r4, 0x0)
+    3ade:	3b40      	cmpnei      	r3, 0
+    3ae0:	080b      	bt      	0x3af6	// 3af6 <TKEYIntHandler+0x22>
+    3ae2:	3301      	movi      	r3, 1
+    3ae4:	b460      	st.w      	r3, (r4, 0x0)
+    3ae6:	107c      	lrw      	r3, 0x20000414	// 3b54 <TKEYIntHandler+0x80>
+    3ae8:	8360      	ld.b      	r3, (r3, 0x0)
+    3aea:	3b41      	cmpnei      	r3, 1
+    3aec:	0805      	bt      	0x3af6	// 3af6 <TKEYIntHandler+0x22>
+    3aee:	e3ffffc7 	bsr      	0x3a7c	// 3a7c <TK_Sampling_prog>
+    3af2:	3301      	movi      	r3, 1
+    3af4:	a464      	st.b      	r3, (r4, 0x4)
+    3af6:	1079      	lrw      	r3, 0x20000058	// 3b58 <TKEYIntHandler+0x84>
+    3af8:	3101      	movi      	r1, 1
+    3afa:	9360      	ld.w      	r3, (r3, 0x0)
+    3afc:	934a      	ld.w      	r2, (r3, 0x28)
+    3afe:	6884      	and      	r2, r1
+    3b00:	3a40      	cmpnei      	r2, 0
+    3b02:	0c02      	bf      	0x3b06	// 3b06 <TKEYIntHandler+0x32>
+    3b04:	b32c      	st.w      	r1, (r3, 0x30)
+    3b06:	934a      	ld.w      	r2, (r3, 0x28)
+    3b08:	3102      	movi      	r1, 2
+    3b0a:	6884      	and      	r2, r1
+    3b0c:	3a40      	cmpnei      	r2, 0
+    3b0e:	0c02      	bf      	0x3b12	// 3b12 <TKEYIntHandler+0x3e>
+    3b10:	b32c      	st.w      	r1, (r3, 0x30)
+    3b12:	934a      	ld.w      	r2, (r3, 0x28)
+    3b14:	3104      	movi      	r1, 4
+    3b16:	6884      	and      	r2, r1
+    3b18:	3a40      	cmpnei      	r2, 0
+    3b1a:	0c02      	bf      	0x3b1e	// 3b1e <TKEYIntHandler+0x4a>
+    3b1c:	b32c      	st.w      	r1, (r3, 0x30)
+    3b1e:	934a      	ld.w      	r2, (r3, 0x28)
+    3b20:	3108      	movi      	r1, 8
+    3b22:	6884      	and      	r2, r1
+    3b24:	3a40      	cmpnei      	r2, 0
+    3b26:	0c02      	bf      	0x3b2a	// 3b2a <TKEYIntHandler+0x56>
+    3b28:	b32c      	st.w      	r1, (r3, 0x30)
+    3b2a:	934a      	ld.w      	r2, (r3, 0x28)
+    3b2c:	3110      	movi      	r1, 16
+    3b2e:	6884      	and      	r2, r1
+    3b30:	3a40      	cmpnei      	r2, 0
+    3b32:	0c02      	bf      	0x3b36	// 3b36 <TKEYIntHandler+0x62>
+    3b34:	b32c      	st.w      	r1, (r3, 0x30)
+    3b36:	934a      	ld.w      	r2, (r3, 0x28)
+    3b38:	3120      	movi      	r1, 32
+    3b3a:	6884      	and      	r2, r1
+    3b3c:	3a40      	cmpnei      	r2, 0
+    3b3e:	0c02      	bf      	0x3b42	// 3b42 <TKEYIntHandler+0x6e>
+    3b40:	b32c      	st.w      	r1, (r3, 0x30)
+    3b42:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    3b46:	9880      	ld.w      	r4, (r14, 0x0)
+    3b48:	1402      	addi      	r14, r14, 8
+    3b4a:	1463      	ipop
+    3b4c:	1461      	nir
+    3b4e:	0000      	bkpt
+    3b50:	20000068 	.long	0x20000068
+    3b54:	20000414 	.long	0x20000414
+    3b58:	20000058 	.long	0x20000058
+
+Disassembly of section .text.get_key_number:
+
+00003b5c <get_key_number>:
+    3b5c:	14c2      	push      	r4-r5
+    3b5e:	3200      	movi      	r2, 0
+    3b60:	3000      	movi      	r0, 0
+    3b62:	1088      	lrw      	r4, 0x200004b4	// 3b80 <get_key_number+0x24>
+    3b64:	3501      	movi      	r5, 1
+    3b66:	3120      	movi      	r1, 32
+    3b68:	9460      	ld.w      	r3, (r4, 0x0)
+    3b6a:	70c9      	lsr      	r3, r2
+    3b6c:	68d4      	and      	r3, r5
+    3b6e:	3b40      	cmpnei      	r3, 0
+    3b70:	0c02      	bf      	0x3b74	// 3b74 <get_key_number+0x18>
+    3b72:	2000      	addi      	r0, 1
+    3b74:	2200      	addi      	r2, 1
+    3b76:	644a      	cmpne      	r2, r1
+    3b78:	0bf8      	bt      	0x3b68	// 3b68 <get_key_number+0xc>
+    3b7a:	7400      	zextb      	r0, r0
+    3b7c:	1482      	pop      	r4-r5
+    3b7e:	0000      	bkpt
+    3b80:	200004b4 	.long	0x200004b4
+
+Disassembly of section .text.TK_Scan_Start:
+
+00003b84 <TK_Scan_Start>:
+    3b84:	1046      	lrw      	r2, 0x20000068	// 3b9c <TK_Scan_Start+0x18>
+    3b86:	8264      	ld.b      	r3, (r2, 0x4)
+    3b88:	74cc      	zextb      	r3, r3
+    3b8a:	3b41      	cmpnei      	r3, 1
+    3b8c:	0807      	bt      	0x3b9a	// 3b9a <TK_Scan_Start+0x16>
+    3b8e:	1025      	lrw      	r1, 0x20000058	// 3ba0 <TK_Scan_Start+0x1c>
+    3b90:	9120      	ld.w      	r1, (r1, 0x0)
+    3b92:	b162      	st.w      	r3, (r1, 0x8)
+    3b94:	3300      	movi      	r3, 0
+    3b96:	b260      	st.w      	r3, (r2, 0x0)
+    3b98:	a264      	st.b      	r3, (r2, 0x4)
+    3b9a:	783c      	jmp      	r15
+    3b9c:	20000068 	.long	0x20000068
+    3ba0:	20000058 	.long	0x20000058
+
+Disassembly of section .text.TK_Keymap_prog:
+
+00003ba4 <TK_Keymap_prog>:
+    3ba4:	14d4      	push      	r4-r7, r15
+    3ba6:	1425      	subi      	r14, r14, 20
+    3ba8:	1271      	lrw      	r3, 0x200000e8	// 3cec <TK_Keymap_prog+0x148>
+    3baa:	8360      	ld.b      	r3, (r3, 0x0)
+    3bac:	b860      	st.w      	r3, (r14, 0x0)
+    3bae:	3400      	movi      	r4, 0
+    3bb0:	1270      	lrw      	r3, 0x200000bc	// 3cf0 <TK_Keymap_prog+0x14c>
+    3bb2:	8360      	ld.b      	r3, (r3, 0x0)
+    3bb4:	b861      	st.w      	r3, (r14, 0x4)
+    3bb6:	12f0      	lrw      	r7, 0x2000042a	// 3cf4 <TK_Keymap_prog+0x150>
+    3bb8:	1270      	lrw      	r3, 0x200000c5	// 3cf8 <TK_Keymap_prog+0x154>
+    3bba:	83a0      	ld.b      	r5, (r3, 0x0)
+    3bbc:	1270      	lrw      	r3, 0x200000c4	// 3cfc <TK_Keymap_prog+0x158>
+    3bbe:	8360      	ld.b      	r3, (r3, 0x0)
+    3bc0:	b862      	st.w      	r3, (r14, 0x8)
+    3bc2:	6d9f      	mov      	r6, r7
+    3bc4:	126f      	lrw      	r3, 0x20000626	// 3d00 <TK_Keymap_prog+0x15c>
+    3bc6:	b863      	st.w      	r3, (r14, 0xc)
+    3bc8:	4461      	lsli      	r3, r4, 1
+    3bca:	9843      	ld.w      	r2, (r14, 0xc)
+    3bcc:	608c      	addu      	r2, r3
+    3bce:	122e      	lrw      	r1, 0x20000380	// 3d04 <TK_Keymap_prog+0x160>
+    3bd0:	604c      	addu      	r1, r3
+    3bd2:	8a40      	ld.h      	r2, (r2, 0x0)
+    3bd4:	8920      	ld.h      	r1, (r1, 0x0)
+    3bd6:	6086      	subu      	r2, r1
+    3bd8:	748b      	sexth      	r2, r2
+    3bda:	5f2c      	addu      	r1, r7, r3
+    3bdc:	a940      	st.h      	r2, (r1, 0x0)
+    3bde:	8940      	ld.h      	r2, (r1, 0x0)
+    3be0:	748b      	sexth      	r2, r2
+    3be2:	3adf      	btsti      	r2, 31
+    3be4:	1249      	lrw      	r2, 0x200005e2	// 3d08 <TK_Keymap_prog+0x164>
+    3be6:	608c      	addu      	r2, r3
+    3be8:	0c37      	bf      	0x3c56	// 3c56 <TK_Keymap_prog+0xb2>
+    3bea:	3100      	movi      	r1, 0
+    3bec:	aa20      	st.h      	r1, (r2, 0x0)
+    3bee:	9840      	ld.w      	r2, (r14, 0x0)
+    3bf0:	3a01      	cmphsi      	r2, 2
+    3bf2:	0c6d      	bf      	0x3ccc	// 3ccc <TK_Keymap_prog+0x128>
+    3bf4:	4461      	lsli      	r3, r4, 1
+    3bf6:	5e2c      	addu      	r1, r6, r3
+    3bf8:	1205      	lrw      	r0, 0x20000116	// 3d0c <TK_Keymap_prog+0x168>
+    3bfa:	8940      	ld.h      	r2, (r1, 0x0)
+    3bfc:	60c0      	addu      	r3, r0
+    3bfe:	748b      	sexth      	r2, r2
+    3c00:	8b60      	ld.h      	r3, (r3, 0x0)
+    3c02:	648d      	cmplt      	r3, r2
+    3c04:	9840      	ld.w      	r2, (r14, 0x0)
+    3c06:	7cc8      	mult      	r3, r2
+    3c08:	0c2a      	bf      	0x3c5c	// 3c5c <TK_Keymap_prog+0xb8>
+    3c0a:	8940      	ld.h      	r2, (r1, 0x0)
+    3c0c:	748b      	sexth      	r2, r2
+    3c0e:	64c9      	cmplt      	r2, r3
+    3c10:	0c26      	bf      	0x3c5c	// 3c5c <TK_Keymap_prog+0xb8>
+    3c12:	1240      	lrw      	r2, 0x20000418	// 3d10 <TK_Keymap_prog+0x16c>
+    3c14:	6090      	addu      	r2, r4
+    3c16:	8260      	ld.b      	r3, (r2, 0x0)
+    3c18:	2300      	addi      	r3, 1
+    3c1a:	74cc      	zextb      	r3, r3
+    3c1c:	a260      	st.b      	r3, (r2, 0x0)
+    3c1e:	3100      	movi      	r1, 0
+    3c20:	117d      	lrw      	r3, 0x200003fe	// 3d14 <TK_Keymap_prog+0x170>
+    3c22:	60d0      	addu      	r3, r4
+    3c24:	a320      	st.b      	r1, (r3, 0x0)
+    3c26:	117d      	lrw      	r3, 0x200004da	// 3d18 <TK_Keymap_prog+0x174>
+    3c28:	60d0      	addu      	r3, r4
+    3c2a:	a320      	st.b      	r1, (r3, 0x0)
+    3c2c:	117c      	lrw      	r3, 0x20000554	// 3d1c <TK_Keymap_prog+0x178>
+    3c2e:	60d0      	addu      	r3, r4
+    3c30:	a320      	st.b      	r1, (r3, 0x0)
+    3c32:	8260      	ld.b      	r3, (r2, 0x0)
+    3c34:	9821      	ld.w      	r1, (r14, 0x4)
+    3c36:	64c4      	cmphs      	r1, r3
+    3c38:	081f      	bt      	0x3c76	// 3c76 <TK_Keymap_prog+0xd2>
+    3c3a:	3d40      	cmpnei      	r5, 0
+    3c3c:	0852      	bt      	0x3ce0	// 3ce0 <TK_Keymap_prog+0x13c>
+    3c3e:	1139      	lrw      	r1, 0x20000410	// 3d20 <TK_Keymap_prog+0x17c>
+    3c40:	9160      	ld.w      	r3, (r1, 0x0)
+    3c42:	3b40      	cmpnei      	r3, 0
+    3c44:	0806      	bt      	0x3c50	// 3c50 <TK_Keymap_prog+0xac>
+    3c46:	9100      	ld.w      	r0, (r1, 0x0)
+    3c48:	3301      	movi      	r3, 1
+    3c4a:	70d0      	lsl      	r3, r4
+    3c4c:	6cc0      	or      	r3, r0
+    3c4e:	b160      	st.w      	r3, (r1, 0x0)
+    3c50:	3300      	movi      	r3, 0
+    3c52:	a260      	st.b      	r3, (r2, 0x0)
+    3c54:	0411      	br      	0x3c76	// 3c76 <TK_Keymap_prog+0xd2>
+    3c56:	8920      	ld.h      	r1, (r1, 0x0)
+    3c58:	7445      	zexth      	r1, r1
+    3c5a:	07c9      	br      	0x3bec	// 3bec <TK_Keymap_prog+0x48>
+    3c5c:	4441      	lsli      	r2, r4, 1
+    3c5e:	6098      	addu      	r2, r6
+    3c60:	8a40      	ld.h      	r2, (r2, 0x0)
+    3c62:	748b      	sexth      	r2, r2
+    3c64:	648d      	cmplt      	r3, r2
+    3c66:	0c08      	bf      	0x3c76	// 3c76 <TK_Keymap_prog+0xd2>
+    3c68:	3300      	movi      	r3, 0
+    3c6a:	114e      	lrw      	r2, 0x20000410	// 3d20 <TK_Keymap_prog+0x17c>
+    3c6c:	2b01      	subi      	r3, 2
+    3c6e:	9220      	ld.w      	r1, (r2, 0x0)
+    3c70:	70d3      	rotl      	r3, r4
+    3c72:	68c4      	and      	r3, r1
+    3c74:	b260      	st.w      	r3, (r2, 0x0)
+    3c76:	4441      	lsli      	r2, r4, 1
+    3c78:	5e68      	addu      	r3, r6, r2
+    3c7a:	8b60      	ld.h      	r3, (r3, 0x0)
+    3c7c:	74cf      	sexth      	r3, r3
+    3c7e:	b864      	st.w      	r3, (r14, 0x10)
+    3c80:	3105      	movi      	r1, 5
+    3c82:	1163      	lrw      	r3, 0x20000116	// 3d0c <TK_Keymap_prog+0x168>
+    3c84:	608c      	addu      	r2, r3
+    3c86:	8a00      	ld.h      	r0, (r2, 0x0)
+    3c88:	4002      	lsli      	r0, r0, 2
+    3c8a:	e3fffa05 	bsr      	0x3094	// 3094 <__divsi3>
+    3c8e:	9864      	ld.w      	r3, (r14, 0x10)
+    3c90:	640d      	cmplt      	r3, r0
+    3c92:	0c18      	bf      	0x3cc2	// 3cc2 <TK_Keymap_prog+0x11e>
+    3c94:	1140      	lrw      	r2, 0x200003fe	// 3d14 <TK_Keymap_prog+0x170>
+    3c96:	6090      	addu      	r2, r4
+    3c98:	8260      	ld.b      	r3, (r2, 0x0)
+    3c9a:	2300      	addi      	r3, 1
+    3c9c:	74cc      	zextb      	r3, r3
+    3c9e:	a260      	st.b      	r3, (r2, 0x0)
+    3ca0:	3100      	movi      	r1, 0
+    3ca2:	107c      	lrw      	r3, 0x20000418	// 3d10 <TK_Keymap_prog+0x16c>
+    3ca4:	60d0      	addu      	r3, r4
+    3ca6:	a320      	st.b      	r1, (r3, 0x0)
+    3ca8:	8260      	ld.b      	r3, (r2, 0x0)
+    3caa:	9822      	ld.w      	r1, (r14, 0x8)
+    3cac:	64c4      	cmphs      	r1, r3
+    3cae:	080a      	bt      	0x3cc2	// 3cc2 <TK_Keymap_prog+0x11e>
+    3cb0:	3300      	movi      	r3, 0
+    3cb2:	103c      	lrw      	r1, 0x20000410	// 3d20 <TK_Keymap_prog+0x17c>
+    3cb4:	2b01      	subi      	r3, 2
+    3cb6:	9100      	ld.w      	r0, (r1, 0x0)
+    3cb8:	70d3      	rotl      	r3, r4
+    3cba:	68c0      	and      	r3, r0
+    3cbc:	b160      	st.w      	r3, (r1, 0x0)
+    3cbe:	3300      	movi      	r3, 0
+    3cc0:	a260      	st.b      	r3, (r2, 0x0)
+    3cc2:	2400      	addi      	r4, 1
+    3cc4:	3c51      	cmpnei      	r4, 17
+    3cc6:	0b81      	bt      	0x3bc8	// 3bc8 <TK_Keymap_prog+0x24>
+    3cc8:	1405      	addi      	r14, r14, 20
+    3cca:	1494      	pop      	r4-r7, r15
+    3ccc:	60d8      	addu      	r3, r6
+    3cce:	4441      	lsli      	r2, r4, 1
+    3cd0:	102f      	lrw      	r1, 0x20000116	// 3d0c <TK_Keymap_prog+0x168>
+    3cd2:	8b60      	ld.h      	r3, (r3, 0x0)
+    3cd4:	6084      	addu      	r2, r1
+    3cd6:	74cf      	sexth      	r3, r3
+    3cd8:	8a40      	ld.h      	r2, (r2, 0x0)
+    3cda:	64c9      	cmplt      	r2, r3
+    3cdc:	0fcd      	bf      	0x3c76	// 3c76 <TK_Keymap_prog+0xd2>
+    3cde:	079a      	br      	0x3c12	// 3c12 <TK_Keymap_prog+0x6e>
+    3ce0:	3d41      	cmpnei      	r5, 1
+    3ce2:	0bb7      	bt      	0x3c50	// 3c50 <TK_Keymap_prog+0xac>
+    3ce4:	102f      	lrw      	r1, 0x20000410	// 3d20 <TK_Keymap_prog+0x17c>
+    3ce6:	6cd7      	mov      	r3, r5
+    3ce8:	9100      	ld.w      	r0, (r1, 0x0)
+    3cea:	07b0      	br      	0x3c4a	// 3c4a <TK_Keymap_prog+0xa6>
+    3cec:	200000e8 	.long	0x200000e8
+    3cf0:	200000bc 	.long	0x200000bc
+    3cf4:	2000042a 	.long	0x2000042a
+    3cf8:	200000c5 	.long	0x200000c5
+    3cfc:	200000c4 	.long	0x200000c4
+    3d00:	20000626 	.long	0x20000626
+    3d04:	20000380 	.long	0x20000380
+    3d08:	200005e2 	.long	0x200005e2
+    3d0c:	20000116 	.long	0x20000116
+    3d10:	20000418 	.long	0x20000418
+    3d14:	200003fe 	.long	0x200003fe
+    3d18:	200004da 	.long	0x200004da
+    3d1c:	20000554 	.long	0x20000554
+    3d20:	20000410 	.long	0x20000410
+
+Disassembly of section .text.TK_overflow_predict:
+
+00003d24 <TK_overflow_predict>:
+    3d24:	14d4      	push      	r4-r7, r15
+    3d26:	1421      	subi      	r14, r14, 4
+    3d28:	11d9      	lrw      	r6, 0x20000068	// 3e0c <TK_overflow_predict+0xe8>
+    3d2a:	8665      	ld.b      	r3, (r6, 0x5)
+    3d2c:	3b41      	cmpnei      	r3, 1
+    3d2e:	085f      	bt      	0x3dec	// 3dec <TK_overflow_predict+0xc8>
+    3d30:	1158      	lrw      	r2, 0x20000530	// 3e10 <TK_overflow_predict+0xec>
+    3d32:	8260      	ld.b      	r3, (r2, 0x0)
+    3d34:	2300      	addi      	r3, 1
+    3d36:	74cc      	zextb      	r3, r3
+    3d38:	a260      	st.b      	r3, (r2, 0x0)
+    3d3a:	8260      	ld.b      	r3, (r2, 0x0)
+    3d3c:	1136      	lrw      	r1, 0x200000e9	// 3e14 <TK_overflow_predict+0xf0>
+    3d3e:	8120      	ld.b      	r1, (r1, 0x0)
+    3d40:	64c4      	cmphs      	r1, r3
+    3d42:	0855      	bt      	0x3dec	// 3dec <TK_overflow_predict+0xc8>
+    3d44:	3300      	movi      	r3, 0
+    3d46:	a260      	st.b      	r3, (r2, 0x0)
+    3d48:	3500      	movi      	r5, 0
+    3d4a:	11f4      	lrw      	r7, 0x200000ec	// 3e18 <TK_overflow_predict+0xf4>
+    3d4c:	2605      	addi      	r6, 6
+    3d4e:	9760      	ld.w      	r3, (r7, 0x0)
+    3d50:	70d5      	lsr      	r3, r5
+    3d52:	3201      	movi      	r2, 1
+    3d54:	68c8      	and      	r3, r2
+    3d56:	3b40      	cmpnei      	r3, 0
+    3d58:	0c34      	bf      	0x3dc0	// 3dc0 <TK_overflow_predict+0x9c>
+    3d5a:	4581      	lsli      	r4, r5, 1
+    3d5c:	5e70      	addu      	r3, r6, r4
+    3d5e:	8b00      	ld.h      	r0, (r3, 0x0)
+    3d60:	e3ffec20 	bsr      	0x15a0	// 15a0 <__floatunsidf>
+    3d64:	6cc7      	mov      	r3, r1
+    3d66:	3180      	movi      	r1, 128
+    3d68:	6c83      	mov      	r2, r0
+    3d6a:	4137      	lsli      	r1, r1, 23
+    3d6c:	3000      	movi      	r0, 0
+    3d6e:	e3ffe223 	bsr      	0x1b4	// 1b4 <__GI_pow>
+    3d72:	116b      	lrw      	r3, 0x200000f2	// 3e1c <TK_overflow_predict+0xf8>
+    3d74:	60d0      	addu      	r3, r4
+    3d76:	8b60      	ld.h      	r3, (r3, 0x0)
+    3d78:	4364      	lsli      	r3, r3, 4
+    3d7a:	230e      	addi      	r3, 15
+    3d7c:	b860      	st.w      	r3, (r14, 0x0)
+    3d7e:	e3ffe7c9 	bsr      	0xd10	// d10 <__fixunsdfsi>
+    3d82:	9860      	ld.w      	r3, (r14, 0x0)
+    3d84:	7cc0      	mult      	r3, r0
+    3d86:	1147      	lrw      	r2, 0x200005c0	// 3e20 <TK_overflow_predict+0xfc>
+    3d88:	740d      	zexth      	r0, r3
+    3d8a:	6090      	addu      	r2, r4
+    3d8c:	1166      	lrw      	r3, 0x20000626	// 3e24 <TK_overflow_predict+0x100>
+    3d8e:	60d0      	addu      	r3, r4
+    3d90:	aa00      	st.h      	r0, (r2, 0x0)
+    3d92:	8b60      	ld.h      	r3, (r3, 0x0)
+    3d94:	8a00      	ld.h      	r0, (r2, 0x0)
+    3d96:	7401      	zexth      	r0, r0
+    3d98:	325f      	movi      	r2, 95
+    3d9a:	74cd      	zexth      	r3, r3
+    3d9c:	7c08      	mult      	r0, r2
+    3d9e:	3164      	movi      	r1, 100
+    3da0:	b860      	st.w      	r3, (r14, 0x0)
+    3da2:	e3fff979 	bsr      	0x3094	// 3094 <__divsi3>
+    3da6:	9860      	ld.w      	r3, (r14, 0x0)
+    3da8:	64c1      	cmplt      	r0, r3
+    3daa:	0c0b      	bf      	0x3dc0	// 3dc0 <TK_overflow_predict+0x9c>
+    3dac:	107f      	lrw      	r3, 0x200000c6	// 3e28 <TK_overflow_predict+0x104>
+    3dae:	610c      	addu      	r4, r3
+    3db0:	8c60      	ld.h      	r3, (r4, 0x0)
+    3db2:	3b06      	cmphsi      	r3, 7
+    3db4:	0806      	bt      	0x3dc0	// 3dc0 <TK_overflow_predict+0x9c>
+    3db6:	2300      	addi      	r3, 1
+    3db8:	ac60      	st.h      	r3, (r4, 0x0)
+    3dba:	3201      	movi      	r2, 1
+    3dbc:	107c      	lrw      	r3, 0x20000485	// 3e2c <TK_overflow_predict+0x108>
+    3dbe:	a340      	st.b      	r2, (r3, 0x0)
+    3dc0:	2500      	addi      	r5, 1
+    3dc2:	3d51      	cmpnei      	r5, 17
+    3dc4:	0bc5      	bt      	0x3d4e	// 3d4e <TK_overflow_predict+0x2a>
+    3dc6:	107a      	lrw      	r3, 0x20000485	// 3e2c <TK_overflow_predict+0x108>
+    3dc8:	8340      	ld.b      	r2, (r3, 0x0)
+    3dca:	3a41      	cmpnei      	r2, 1
+    3dcc:	0810      	bt      	0x3dec	// 3dec <TK_overflow_predict+0xc8>
+    3dce:	3200      	movi      	r2, 0
+    3dd0:	a340      	st.b      	r2, (r3, 0x0)
+    3dd2:	3200      	movi      	r2, 0
+    3dd4:	1077      	lrw      	r3, 0x20000058	// 3e30 <TK_overflow_predict+0x10c>
+    3dd6:	1018      	lrw      	r0, 0x20000553	// 3e34 <TK_overflow_predict+0x110>
+    3dd8:	10b8      	lrw      	r5, 0x2000058c	// 3e38 <TK_overflow_predict+0x114>
+    3dda:	10d4      	lrw      	r6, 0x200000c6	// 3e28 <TK_overflow_predict+0x104>
+    3ddc:	9360      	ld.w      	r3, (r3, 0x0)
+    3dde:	b342      	st.w      	r2, (r3, 0x8)
+    3de0:	1077      	lrw      	r3, 0x20000054	// 3e3c <TK_overflow_predict+0x118>
+    3de2:	9380      	ld.w      	r4, (r3, 0x0)
+    3de4:	3300      	movi      	r3, 0
+    3de6:	8040      	ld.b      	r2, (r0, 0x0)
+    3de8:	648c      	cmphs      	r3, r2
+    3dea:	0c03      	bf      	0x3df0	// 3df0 <TK_overflow_predict+0xcc>
+    3dec:	1401      	addi      	r14, r14, 4
+    3dee:	1494      	pop      	r4-r7, r15
+    3df0:	5d4c      	addu      	r2, r5, r3
+    3df2:	8240      	ld.b      	r2, (r2, 0x0)
+    3df4:	4241      	lsli      	r2, r2, 1
+    3df6:	4322      	lsli      	r1, r3, 2
+    3df8:	6098      	addu      	r2, r6
+    3dfa:	6050      	addu      	r1, r4
+    3dfc:	8a40      	ld.h      	r2, (r2, 0x0)
+    3dfe:	91f2      	ld.w      	r7, (r1, 0x48)
+    3e00:	4254      	lsli      	r2, r2, 20
+    3e02:	6c9c      	or      	r2, r7
+    3e04:	2300      	addi      	r3, 1
+    3e06:	b152      	st.w      	r2, (r1, 0x48)
+    3e08:	74cc      	zextb      	r3, r3
+    3e0a:	07ee      	br      	0x3de6	// 3de6 <TK_overflow_predict+0xc2>
+    3e0c:	20000068 	.long	0x20000068
+    3e10:	20000530 	.long	0x20000530
+    3e14:	200000e9 	.long	0x200000e9
+    3e18:	200000ec 	.long	0x200000ec
+    3e1c:	200000f2 	.long	0x200000f2
+    3e20:	200005c0 	.long	0x200005c0
+    3e24:	20000626 	.long	0x20000626
+    3e28:	200000c6 	.long	0x200000c6
+    3e2c:	20000485 	.long	0x20000485
+    3e30:	20000058 	.long	0x20000058
+    3e34:	20000553 	.long	0x20000553
+    3e38:	2000058c 	.long	0x2000058c
+    3e3c:	20000054 	.long	0x20000054
+
+Disassembly of section .text.TK_Baseline_tracking:
+
+00003e40 <TK_Baseline_tracking>:
+    3e40:	14c4      	push      	r4-r7
+    3e42:	1422      	subi      	r14, r14, 8
+    3e44:	1348      	lrw      	r2, 0x200004b2	// 3fe4 <TK_Baseline_tracking+0x1a4>
+    3e46:	8260      	ld.b      	r3, (r2, 0x0)
+    3e48:	2300      	addi      	r3, 1
+    3e4a:	74cc      	zextb      	r3, r3
+    3e4c:	a260      	st.b      	r3, (r2, 0x0)
+    3e4e:	8260      	ld.b      	r3, (r2, 0x0)
+    3e50:	1326      	lrw      	r1, 0x200000e9	// 3fe8 <TK_Baseline_tracking+0x1a8>
+    3e52:	8120      	ld.b      	r1, (r1, 0x0)
+    3e54:	644c      	cmphs      	r3, r1
+    3e56:	0cad      	bf      	0x3fb0	// 3fb0 <TK_Baseline_tracking+0x170>
+    3e58:	3300      	movi      	r3, 0
+    3e5a:	a260      	st.b      	r3, (r2, 0x0)
+    3e5c:	1364      	lrw      	r3, 0x20000410	// 3fec <TK_Baseline_tracking+0x1ac>
+    3e5e:	9360      	ld.w      	r3, (r3, 0x0)
+    3e60:	3b40      	cmpnei      	r3, 0
+    3e62:	08a7      	bt      	0x3fb0	// 3fb0 <TK_Baseline_tracking+0x170>
+    3e64:	1323      	lrw      	r1, 0x2000042a	// 3ff0 <TK_Baseline_tracking+0x1b0>
+    3e66:	6dc7      	mov      	r7, r1
+    3e68:	b820      	st.w      	r1, (r14, 0x0)
+    3e6a:	3200      	movi      	r2, 0
+    3e6c:	1362      	lrw      	r3, 0x20000116	// 3ff4 <TK_Baseline_tracking+0x1b4>
+    3e6e:	1323      	lrw      	r1, 0x20000380	// 3ff8 <TK_Baseline_tracking+0x1b8>
+    3e70:	4201      	lsli      	r0, r2, 1
+    3e72:	9880      	ld.w      	r4, (r14, 0x0)
+    3e74:	6100      	addu      	r4, r0
+    3e76:	8c80      	ld.h      	r4, (r4, 0x0)
+    3e78:	7513      	sexth      	r4, r4
+    3e7a:	3cdf      	btsti      	r4, 31
+    3e7c:	0c27      	bf      	0x3eca	// 3eca <TK_Baseline_tracking+0x8a>
+    3e7e:	13a0      	lrw      	r5, 0x20000626	// 3ffc <TK_Baseline_tracking+0x1bc>
+    3e80:	5980      	addu      	r4, r1, r0
+    3e82:	6014      	addu      	r0, r5
+    3e84:	b881      	st.w      	r4, (r14, 0x4)
+    3e86:	8c80      	ld.h      	r4, (r4, 0x0)
+    3e88:	88c0      	ld.h      	r6, (r0, 0x0)
+    3e8a:	7511      	zexth      	r4, r4
+    3e8c:	7599      	zexth      	r6, r6
+    3e8e:	8ba0      	ld.h      	r5, (r3, 0x0)
+    3e90:	611a      	subu      	r4, r6
+    3e92:	6551      	cmplt      	r4, r5
+    3e94:	081b      	bt      	0x3eca	// 3eca <TK_Baseline_tracking+0x8a>
+    3e96:	9881      	ld.w      	r4, (r14, 0x4)
+    3e98:	8c80      	ld.h      	r4, (r4, 0x0)
+    3e9a:	8800      	ld.h      	r0, (r0, 0x0)
+    3e9c:	7511      	zexth      	r4, r4
+    3e9e:	7401      	zexth      	r0, r0
+    3ea0:	5c01      	subu      	r0, r4, r0
+    3ea2:	4581      	lsli      	r4, r5, 1
+    3ea4:	6150      	addu      	r5, r4
+    3ea6:	6541      	cmplt      	r0, r5
+    3ea8:	0c11      	bf      	0x3eca	// 3eca <TK_Baseline_tracking+0x8a>
+    3eaa:	1296      	lrw      	r4, 0x20000554	// 4000 <TK_Baseline_tracking+0x1c0>
+    3eac:	6108      	addu      	r4, r2
+    3eae:	8400      	ld.b      	r0, (r4, 0x0)
+    3eb0:	2000      	addi      	r0, 1
+    3eb2:	7400      	zextb      	r0, r0
+    3eb4:	a400      	st.b      	r0, (r4, 0x0)
+    3eb6:	1214      	lrw      	r0, 0x20000088	// 4004 <TK_Baseline_tracking+0x1c4>
+    3eb8:	84a0      	ld.b      	r5, (r4, 0x0)
+    3eba:	8008      	ld.b      	r0, (r0, 0x8)
+    3ebc:	6540      	cmphs      	r0, r5
+    3ebe:	0806      	bt      	0x3eca	// 3eca <TK_Baseline_tracking+0x8a>
+    3ec0:	1212      	lrw      	r0, 0x20000497	// 4008 <TK_Baseline_tracking+0x1c8>
+    3ec2:	3501      	movi      	r5, 1
+    3ec4:	a0a0      	st.b      	r5, (r0, 0x0)
+    3ec6:	3000      	movi      	r0, 0
+    3ec8:	a400      	st.b      	r0, (r4, 0x0)
+    3eca:	4201      	lsli      	r0, r2, 1
+    3ecc:	5f80      	addu      	r4, r7, r0
+    3ece:	8c80      	ld.h      	r4, (r4, 0x0)
+    3ed0:	7513      	sexth      	r4, r4
+    3ed2:	3c20      	cmplti      	r4, 1
+    3ed4:	0870      	bt      	0x3fb4	// 3fb4 <TK_Baseline_tracking+0x174>
+    3ed6:	128a      	lrw      	r4, 0x20000626	// 3ffc <TK_Baseline_tracking+0x1bc>
+    3ed8:	6100      	addu      	r4, r0
+    3eda:	59a0      	addu      	r5, r1, r0
+    3edc:	8c80      	ld.h      	r4, (r4, 0x0)
+    3ede:	8da0      	ld.h      	r5, (r5, 0x0)
+    3ee0:	7555      	zexth      	r5, r5
+    3ee2:	7511      	zexth      	r4, r4
+    3ee4:	6116      	subu      	r4, r5
+    3ee6:	8ba0      	ld.h      	r5, (r3, 0x0)
+    3ee8:	45a2      	lsli      	r5, r5, 2
+    3eea:	6551      	cmplt      	r4, r5
+    3eec:	0864      	bt      	0x3fb4	// 3fb4 <TK_Baseline_tracking+0x174>
+    3eee:	1288      	lrw      	r4, 0x200004da	// 400c <TK_Baseline_tracking+0x1cc>
+    3ef0:	6108      	addu      	r4, r2
+    3ef2:	84a0      	ld.b      	r5, (r4, 0x0)
+    3ef4:	2500      	addi      	r5, 1
+    3ef6:	7554      	zextb      	r5, r5
+    3ef8:	a4a0      	st.b      	r5, (r4, 0x0)
+    3efa:	12a3      	lrw      	r5, 0x20000088	// 4004 <TK_Baseline_tracking+0x1c4>
+    3efc:	84c0      	ld.b      	r6, (r4, 0x0)
+    3efe:	85a9      	ld.b      	r5, (r5, 0x9)
+    3f00:	6594      	cmphs      	r5, r6
+    3f02:	0806      	bt      	0x3f0e	// 3f0e <TK_Baseline_tracking+0xce>
+    3f04:	12a1      	lrw      	r5, 0x20000497	// 4008 <TK_Baseline_tracking+0x1c8>
+    3f06:	3601      	movi      	r6, 1
+    3f08:	a5c0      	st.b      	r6, (r5, 0x0)
+    3f0a:	3500      	movi      	r5, 0
+    3f0c:	a4a0      	st.b      	r5, (r4, 0x0)
+    3f0e:	5f80      	addu      	r4, r7, r0
+    3f10:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f12:	7513      	sexth      	r4, r4
+    3f14:	3cdf      	btsti      	r4, 31
+    3f16:	0c10      	bf      	0x3f36	// 3f36 <TK_Baseline_tracking+0xf6>
+    3f18:	11d9      	lrw      	r6, 0x20000626	// 3ffc <TK_Baseline_tracking+0x1bc>
+    3f1a:	59a0      	addu      	r5, r1, r0
+    3f1c:	6180      	addu      	r6, r0
+    3f1e:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f20:	8ec0      	ld.h      	r6, (r6, 0x0)
+    3f22:	7599      	zexth      	r6, r6
+    3f24:	7511      	zexth      	r4, r4
+    3f26:	611a      	subu      	r4, r6
+    3f28:	8bc0      	ld.h      	r6, (r3, 0x0)
+    3f2a:	6591      	cmplt      	r4, r6
+    3f2c:	0c05      	bf      	0x3f36	// 3f36 <TK_Baseline_tracking+0xf6>
+    3f2e:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f30:	2c00      	subi      	r4, 1
+    3f32:	7511      	zexth      	r4, r4
+    3f34:	ad80      	st.h      	r4, (r5, 0x0)
+    3f36:	5f80      	addu      	r4, r7, r0
+    3f38:	8c80      	ld.h      	r4, (r4, 0x0)
+    3f3a:	7513      	sexth      	r4, r4
+    3f3c:	3cdf      	btsti      	r4, 31
+    3f3e:	0c11      	bf      	0x3f60	// 3f60 <TK_Baseline_tracking+0x120>
+    3f40:	11cf      	lrw      	r6, 0x20000626	// 3ffc <TK_Baseline_tracking+0x1bc>
+    3f42:	59a0      	addu      	r5, r1, r0
+    3f44:	6180      	addu      	r6, r0
+    3f46:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f48:	8ec0      	ld.h      	r6, (r6, 0x0)
+    3f4a:	7599      	zexth      	r6, r6
+    3f4c:	7511      	zexth      	r4, r4
+    3f4e:	611a      	subu      	r4, r6
+    3f50:	8bc0      	ld.h      	r6, (r3, 0x0)
+    3f52:	4ec1      	lsri      	r6, r6, 1
+    3f54:	6591      	cmplt      	r4, r6
+    3f56:	0805      	bt      	0x3f60	// 3f60 <TK_Baseline_tracking+0x120>
+    3f58:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f5a:	2c01      	subi      	r4, 2
+    3f5c:	7511      	zexth      	r4, r4
+    3f5e:	ad80      	st.h      	r4, (r5, 0x0)
+    3f60:	5fa0      	addu      	r5, r7, r0
+    3f62:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f64:	7513      	sexth      	r4, r4
+    3f66:	3c20      	cmplti      	r4, 1
+    3f68:	080c      	bt      	0x3f80	// 3f80 <TK_Baseline_tracking+0x140>
+    3f6a:	8da0      	ld.h      	r5, (r5, 0x0)
+    3f6c:	8b80      	ld.h      	r4, (r3, 0x0)
+    3f6e:	7557      	sexth      	r5, r5
+    3f70:	4c81      	lsri      	r4, r4, 1
+    3f72:	6515      	cmplt      	r5, r4
+    3f74:	0c06      	bf      	0x3f80	// 3f80 <TK_Baseline_tracking+0x140>
+    3f76:	59a0      	addu      	r5, r1, r0
+    3f78:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f7a:	2400      	addi      	r4, 1
+    3f7c:	7511      	zexth      	r4, r4
+    3f7e:	ad80      	st.h      	r4, (r5, 0x0)
+    3f80:	5fa0      	addu      	r5, r7, r0
+    3f82:	8d80      	ld.h      	r4, (r5, 0x0)
+    3f84:	7513      	sexth      	r4, r4
+    3f86:	3c20      	cmplti      	r4, 1
+    3f88:	0810      	bt      	0x3fa8	// 3fa8 <TK_Baseline_tracking+0x168>
+    3f8a:	8dc0      	ld.h      	r6, (r5, 0x0)
+    3f8c:	759b      	sexth      	r6, r6
+    3f8e:	8b80      	ld.h      	r4, (r3, 0x0)
+    3f90:	6519      	cmplt      	r6, r4
+    3f92:	0c0b      	bf      	0x3fa8	// 3fa8 <TK_Baseline_tracking+0x168>
+    3f94:	8da0      	ld.h      	r5, (r5, 0x0)
+    3f96:	7557      	sexth      	r5, r5
+    3f98:	4c81      	lsri      	r4, r4, 1
+    3f9a:	6515      	cmplt      	r5, r4
+    3f9c:	0806      	bt      	0x3fa8	// 3fa8 <TK_Baseline_tracking+0x168>
+    3f9e:	6004      	addu      	r0, r1
+    3fa0:	8880      	ld.h      	r4, (r0, 0x0)
+    3fa2:	2401      	addi      	r4, 2
+    3fa4:	7511      	zexth      	r4, r4
+    3fa6:	a880      	st.h      	r4, (r0, 0x0)
+    3fa8:	2200      	addi      	r2, 1
+    3faa:	3a51      	cmpnei      	r2, 17
+    3fac:	2301      	addi      	r3, 2
+    3fae:	0b61      	bt      	0x3e70	// 3e70 <TK_Baseline_tracking+0x30>
+    3fb0:	1402      	addi      	r14, r14, 8
+    3fb2:	1484      	pop      	r4-r7
+    3fb4:	5f80      	addu      	r4, r7, r0
+    3fb6:	8c80      	ld.h      	r4, (r4, 0x0)
+    3fb8:	7513      	sexth      	r4, r4
+    3fba:	3cdf      	btsti      	r4, 31
+    3fbc:	0fa9      	bf      	0x3f0e	// 3f0e <TK_Baseline_tracking+0xce>
+    3fbe:	10b0      	lrw      	r5, 0x20000626	// 3ffc <TK_Baseline_tracking+0x1bc>
+    3fc0:	5980      	addu      	r4, r1, r0
+    3fc2:	6140      	addu      	r5, r0
+    3fc4:	8c80      	ld.h      	r4, (r4, 0x0)
+    3fc6:	8da0      	ld.h      	r5, (r5, 0x0)
+    3fc8:	7555      	zexth      	r5, r5
+    3fca:	8bc0      	ld.h      	r6, (r3, 0x0)
+    3fcc:	7511      	zexth      	r4, r4
+    3fce:	6116      	subu      	r4, r5
+    3fd0:	46a1      	lsli      	r5, r6, 1
+    3fd2:	6158      	addu      	r5, r6
+    3fd4:	6551      	cmplt      	r4, r5
+    3fd6:	0b9c      	bt      	0x3f0e	// 3f0e <TK_Baseline_tracking+0xce>
+    3fd8:	108c      	lrw      	r4, 0x20000497	// 4008 <TK_Baseline_tracking+0x1c8>
+    3fda:	3501      	movi      	r5, 1
+    3fdc:	a4a0      	st.b      	r5, (r4, 0x0)
+    3fde:	6c03      	mov      	r0, r0
+    3fe0:	0797      	br      	0x3f0e	// 3f0e <TK_Baseline_tracking+0xce>
+    3fe2:	0000      	bkpt
+    3fe4:	200004b2 	.long	0x200004b2
+    3fe8:	200000e9 	.long	0x200000e9
+    3fec:	20000410 	.long	0x20000410
+    3ff0:	2000042a 	.long	0x2000042a
+    3ff4:	20000116 	.long	0x20000116
+    3ff8:	20000380 	.long	0x20000380
+    3ffc:	20000626 	.long	0x20000626
+    4000:	20000554 	.long	0x20000554
+    4004:	20000088 	.long	0x20000088
+    4008:	20000497 	.long	0x20000497
+    400c:	200004da 	.long	0x200004da
+
+Disassembly of section .text.TK_result_prog:
+
+00004010 <TK_result_prog>:
+    4010:	14d2      	push      	r4-r5, r15
+    4012:	1050      	lrw      	r2, 0x20000410	// 4050 <TK_result_prog+0x40>
+    4014:	1090      	lrw      	r4, 0x200004b4	// 4054 <TK_result_prog+0x44>
+    4016:	9260      	ld.w      	r3, (r2, 0x0)
+    4018:	3b40      	cmpnei      	r3, 0
+    401a:	0c02      	bf      	0x401e	// 401e <TK_result_prog+0xe>
+    401c:	9260      	ld.w      	r3, (r2, 0x0)
+    401e:	b460      	st.w      	r3, (r4, 0x0)
+    4020:	9460      	ld.w      	r3, (r4, 0x0)
+    4022:	3b40      	cmpnei      	r3, 0
+    4024:	10ad      	lrw      	r5, 0x20000588	// 4058 <TK_result_prog+0x48>
+    4026:	0c11      	bf      	0x4048	// 4048 <TK_result_prog+0x38>
+    4028:	9440      	ld.w      	r2, (r4, 0x0)
+    402a:	9560      	ld.w      	r3, (r5, 0x0)
+    402c:	64ca      	cmpne      	r2, r3
+    402e:	0c03      	bf      	0x4034	// 4034 <TK_result_prog+0x24>
+    4030:	9460      	ld.w      	r3, (r4, 0x0)
+    4032:	b560      	st.w      	r3, (r5, 0x0)
+    4034:	e3fffd94 	bsr      	0x3b5c	// 3b5c <get_key_number>
+    4038:	1069      	lrw      	r3, 0x200000f0	// 405c <TK_result_prog+0x4c>
+    403a:	8360      	ld.b      	r3, (r3, 0x0)
+    403c:	640c      	cmphs      	r3, r0
+    403e:	0804      	bt      	0x4046	// 4046 <TK_result_prog+0x36>
+    4040:	3300      	movi      	r3, 0
+    4042:	b460      	st.w      	r3, (r4, 0x0)
+    4044:	b560      	st.w      	r3, (r5, 0x0)
+    4046:	1492      	pop      	r4-r5, r15
+    4048:	1046      	lrw      	r2, 0x200004ac	// 4060 <TK_result_prog+0x50>
+    404a:	b560      	st.w      	r3, (r5, 0x0)
+    404c:	b260      	st.w      	r3, (r2, 0x0)
+    404e:	07fc      	br      	0x4046	// 4046 <TK_result_prog+0x36>
+    4050:	20000410 	.long	0x20000410
+    4054:	200004b4 	.long	0x200004b4
+    4058:	20000588 	.long	0x20000588
+    405c:	200000f0 	.long	0x200000f0
+    4060:	200004ac 	.long	0x200004ac
+
+Disassembly of section .text.CORETHandler:
+
+00004064 <CORETHandler>:
+    4064:	1460      	nie
+    4066:	1462      	ipush
+    4068:	14d1      	push      	r4, r15
+    406a:	1077      	lrw      	r3, 0x20000064	// 40c4 <CORETHandler+0x60>
+    406c:	3400      	movi      	r4, 0
+    406e:	9360      	ld.w      	r3, (r3, 0x0)
+    4070:	b386      	st.w      	r4, (r3, 0x18)
+    4072:	1076      	lrw      	r3, 0x20000414	// 40c8 <CORETHandler+0x64>
+    4074:	8360      	ld.b      	r3, (r3, 0x0)
+    4076:	3b41      	cmpnei      	r3, 1
+    4078:	0820      	bt      	0x40b8	// 40b8 <CORETHandler+0x54>
+    407a:	e3fffd85 	bsr      	0x3b84	// 3b84 <TK_Scan_Start>
+    407e:	e3fffd93 	bsr      	0x3ba4	// 3ba4 <TK_Keymap_prog>
+    4082:	e3fffe51 	bsr      	0x3d24	// 3d24 <TK_overflow_predict>
+    4086:	e3fffedd 	bsr      	0x3e40	// 3e40 <TK_Baseline_tracking>
+    408a:	e3ffffc3 	bsr      	0x4010	// 4010 <TK_result_prog>
+    408e:	1070      	lrw      	r3, 0x200004b4	// 40cc <CORETHandler+0x68>
+    4090:	9360      	ld.w      	r3, (r3, 0x0)
+    4092:	3b40      	cmpnei      	r3, 0
+    4094:	0c12      	bf      	0x40b8	// 40b8 <CORETHandler+0x54>
+    4096:	106f      	lrw      	r3, 0x200000c0	// 40d0 <CORETHandler+0x6c>
+    4098:	9340      	ld.w      	r2, (r3, 0x0)
+    409a:	3a40      	cmpnei      	r2, 0
+    409c:	0c0e      	bf      	0x40b8	// 40b8 <CORETHandler+0x54>
+    409e:	106e      	lrw      	r3, 0x200004ac	// 40d4 <CORETHandler+0x70>
+    40a0:	3064      	movi      	r0, 100
+    40a2:	9320      	ld.w      	r1, (r3, 0x0)
+    40a4:	2100      	addi      	r1, 1
+    40a6:	b320      	st.w      	r1, (r3, 0x0)
+    40a8:	9320      	ld.w      	r1, (r3, 0x0)
+    40aa:	7c80      	mult      	r2, r0
+    40ac:	6448      	cmphs      	r2, r1
+    40ae:	0805      	bt      	0x40b8	// 40b8 <CORETHandler+0x54>
+    40b0:	104a      	lrw      	r2, 0x20000497	// 40d8 <CORETHandler+0x74>
+    40b2:	3101      	movi      	r1, 1
+    40b4:	a220      	st.b      	r1, (r2, 0x0)
+    40b6:	b380      	st.w      	r4, (r3, 0x0)
+    40b8:	d9ee2001 	ld.w      	r15, (r14, 0x4)
+    40bc:	9880      	ld.w      	r4, (r14, 0x0)
+    40be:	1402      	addi      	r14, r14, 8
+    40c0:	1463      	ipop
+    40c2:	1461      	nir
+    40c4:	20000064 	.long	0x20000064
+    40c8:	20000414 	.long	0x20000414
+    40cc:	200004b4 	.long	0x200004b4
+    40d0:	200000c0 	.long	0x200000c0
+    40d4:	200004ac 	.long	0x200004ac
+    40d8:	20000497 	.long	0x20000497
+
+Disassembly of section .text.std_clk_calib:
+
+000040dc <std_clk_calib>:
+    40dc:	14d4      	push      	r4-r7, r15
+    40de:	142d      	subi      	r14, r14, 52
+    40e0:	3201      	movi      	r2, 1
+    40e2:	03ce      	lrw      	r6, 0x2000005c	// 4324 <std_clk_calib+0x248>
+    40e4:	6cc3      	mov      	r3, r0
+    40e6:	dc4e000a 	st.b      	r2, (r14, 0xa)
+    40ea:	9640      	ld.w      	r2, (r6, 0x0)
+    40ec:	9247      	ld.w      	r2, (r2, 0x1c)
+    40ee:	7488      	zextb      	r2, r2
+    40f0:	dc4e0009 	st.b      	r2, (r14, 0x9)
+    40f4:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    40f8:	3a40      	cmpnei      	r2, 0
+    40fa:	0c08      	bf      	0x410a	// 410a <std_clk_calib+0x2e>
+    40fc:	d84e0009 	ld.b      	r2, (r14, 0x9)
+    4100:	3a42      	cmpnei      	r2, 2
+    4102:	0c04      	bf      	0x410a	// 410a <std_clk_calib+0x2e>
+    4104:	3000      	movi      	r0, 0
+    4106:	140d      	addi      	r14, r14, 52
+    4108:	1494      	pop      	r4-r7, r15
+    410a:	0397      	lrw      	r4, 0x2000000c	// 4328 <std_clk_calib+0x24c>
+    410c:	3209      	movi      	r2, 9
+    410e:	9400      	ld.w      	r0, (r4, 0x0)
+    4110:	3b40      	cmpnei      	r3, 0
+    4112:	b041      	st.w      	r2, (r0, 0x4)
+    4114:	0857      	bt      	0x41c2	// 41c2 <std_clk_calib+0xe6>
+    4116:	3307      	movi      	r3, 7
+    4118:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    411c:	037b      	lrw      	r3, 0x2dc6c00	// 432c <std_clk_calib+0x250>
+    411e:	b863      	st.w      	r3, (r14, 0xc)
+    4120:	3380      	movi      	r3, 128
+    4122:	4362      	lsli      	r3, r3, 2
+    4124:	b867      	st.w      	r3, (r14, 0x1c)
+    4126:	d86e000b 	ld.b      	r3, (r14, 0xb)
+    412a:	74cc      	zextb      	r3, r3
+    412c:	b062      	st.w      	r3, (r0, 0x8)
+    412e:	037e      	lrw      	r3, 0xffff	// 4330 <std_clk_calib+0x254>
+    4130:	b063      	st.w      	r3, (r0, 0xc)
+    4132:	3201      	movi      	r2, 1
+    4134:	3101      	movi      	r1, 1
+    4136:	03bf      	lrw      	r5, 0x20000014	// 4334 <std_clk_calib+0x258>
+    4138:	e3fff042 	bsr      	0x21bc	// 21bc <BT_ConfigInterrupt_CMD>
+    413c:	95e0      	ld.w      	r7, (r5, 0x0)
+    413e:	137f      	lrw      	r3, 0xbe9c0005	// 4338 <std_clk_calib+0x25c>
+    4140:	b760      	st.w      	r3, (r7, 0x0)
+    4142:	135f      	lrw      	r2, 0x30010	// 433c <std_clk_calib+0x260>
+    4144:	3300      	movi      	r3, 0
+    4146:	b762      	st.w      	r3, (r7, 0x8)
+    4148:	b743      	st.w      	r2, (r7, 0xc)
+    414a:	32d8      	movi      	r2, 216
+    414c:	b745      	st.w      	r2, (r7, 0x14)
+    414e:	974f      	ld.w      	r2, (r7, 0x3c)
+    4150:	3aa2      	bseti      	r2, 2
+    4152:	b74f      	st.w      	r2, (r7, 0x3c)
+    4154:	9803      	ld.w      	r0, (r14, 0xc)
+    4156:	d82e000b 	ld.b      	r1, (r14, 0xb)
+    415a:	327d      	movi      	r2, 125
+    415c:	2100      	addi      	r1, 1
+    415e:	7c48      	mult      	r1, r2
+    4160:	b861      	st.w      	r3, (r14, 0x4)
+    4162:	e3fff7ab 	bsr      	0x30b8	// 30b8 <__udivsi3>
+    4166:	b804      	st.w      	r0, (r14, 0x10)
+    4168:	32fa      	movi      	r2, 250
+    416a:	9824      	ld.w      	r1, (r14, 0x10)
+    416c:	4242      	lsli      	r2, r2, 2
+    416e:	6448      	cmphs      	r2, r1
+    4170:	0bca      	bt      	0x4104	// 4104 <std_clk_calib+0x28>
+    4172:	9844      	ld.w      	r2, (r14, 0x10)
+    4174:	3178      	movi      	r1, 120
+    4176:	9804      	ld.w      	r0, (r14, 0x10)
+    4178:	b840      	st.w      	r2, (r14, 0x0)
+    417a:	e3fff79f 	bsr      	0x30b8	// 30b8 <__udivsi3>
+    417e:	9840      	ld.w      	r2, (r14, 0x0)
+    4180:	6082      	subu      	r2, r0
+    4182:	b845      	st.w      	r2, (r14, 0x14)
+    4184:	9804      	ld.w      	r0, (r14, 0x10)
+    4186:	3178      	movi      	r1, 120
+    4188:	9844      	ld.w      	r2, (r14, 0x10)
+    418a:	b840      	st.w      	r2, (r14, 0x0)
+    418c:	e3fff796 	bsr      	0x30b8	// 30b8 <__udivsi3>
+    4190:	9840      	ld.w      	r2, (r14, 0x0)
+    4192:	6008      	addu      	r0, r2
+    4194:	b806      	st.w      	r0, (r14, 0x18)
+    4196:	c0807020 	psrclr      	ie
+    419a:	9640      	ld.w      	r2, (r6, 0x0)
+    419c:	9254      	ld.w      	r2, (r2, 0x50)
+    419e:	b848      	st.w      	r2, (r14, 0x20)
+    41a0:	9861      	ld.w      	r3, (r14, 0x4)
+    41a2:	9440      	ld.w      	r2, (r4, 0x0)
+    41a4:	b260      	st.w      	r3, (r2, 0x0)
+    41a6:	b761      	st.w      	r3, (r7, 0x4)
+    41a8:	d86e000a 	ld.b      	r3, (r14, 0xa)
+    41ac:	3b40      	cmpnei      	r3, 0
+    41ae:	083e      	bt      	0x422a	// 422a <std_clk_calib+0x14e>
+    41b0:	e3ffefb8 	bsr      	0x2120	// 2120 <LPT_Soft_Reset>
+    41b4:	9400      	ld.w      	r0, (r4, 0x0)
+    41b6:	e3ffefd9 	bsr      	0x2168	// 2168 <BT_Soft_Reset>
+    41ba:	c1807420 	psrset      	ee, ie
+    41be:	3001      	movi      	r0, 1
+    41c0:	07a3      	br      	0x4106	// 4106 <std_clk_calib+0x2a>
+    41c2:	3b41      	cmpnei      	r3, 1
+    41c4:	0806      	bt      	0x41d0	// 41d0 <std_clk_calib+0xf4>
+    41c6:	3303      	movi      	r3, 3
+    41c8:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    41cc:	127d      	lrw      	r3, 0x16e3600	// 4340 <std_clk_calib+0x264>
+    41ce:	07a8      	br      	0x411e	// 411e <std_clk_calib+0x42>
+    41d0:	3b42      	cmpnei      	r3, 2
+    41d2:	0806      	bt      	0x41de	// 41de <std_clk_calib+0x102>
+    41d4:	3301      	movi      	r3, 1
+    41d6:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    41da:	127b      	lrw      	r3, 0xb71b00	// 4344 <std_clk_calib+0x268>
+    41dc:	07a1      	br      	0x411e	// 411e <std_clk_calib+0x42>
+    41de:	3b43      	cmpnei      	r3, 3
+    41e0:	0806      	bt      	0x41ec	// 41ec <std_clk_calib+0x110>
+    41e2:	3300      	movi      	r3, 0
+    41e4:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    41e8:	1278      	lrw      	r3, 0x5b8d80	// 4348 <std_clk_calib+0x26c>
+    41ea:	079a      	br      	0x411e	// 411e <std_clk_calib+0x42>
+    41ec:	3b44      	cmpnei      	r3, 4
+    41ee:	0809      	bt      	0x4200	// 4200 <std_clk_calib+0x124>
+    41f0:	3300      	movi      	r3, 0
+    41f2:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    41f6:	1276      	lrw      	r3, 0x54c720	// 434c <std_clk_calib+0x270>
+    41f8:	b863      	st.w      	r3, (r14, 0xc)
+    41fa:	3380      	movi      	r3, 128
+    41fc:	4369      	lsli      	r3, r3, 9
+    41fe:	0793      	br      	0x4124	// 4124 <std_clk_calib+0x48>
+    4200:	3b45      	cmpnei      	r3, 5
+    4202:	0806      	bt      	0x420e	// 420e <std_clk_calib+0x132>
+    4204:	3300      	movi      	r3, 0
+    4206:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    420a:	1272      	lrw      	r3, 0x3ffed0	// 4350 <std_clk_calib+0x274>
+    420c:	07f6      	br      	0x41f8	// 41f8 <std_clk_calib+0x11c>
+    420e:	3b46      	cmpnei      	r3, 6
+    4210:	0806      	bt      	0x421c	// 421c <std_clk_calib+0x140>
+    4212:	3300      	movi      	r3, 0
+    4214:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4218:	126f      	lrw      	r3, 0x1fff68	// 4354 <std_clk_calib+0x278>
+    421a:	07ef      	br      	0x41f8	// 41f8 <std_clk_calib+0x11c>
+    421c:	3b47      	cmpnei      	r3, 7
+    421e:	0b84      	bt      	0x4126	// 4126 <std_clk_calib+0x4a>
+    4220:	3300      	movi      	r3, 0
+    4222:	dc6e000b 	st.b      	r3, (r14, 0xb)
+    4226:	126d      	lrw      	r3, 0x1ffb8	// 4358 <std_clk_calib+0x27c>
+    4228:	07e8      	br      	0x41f8	// 41f8 <std_clk_calib+0x11c>
+    422a:	9560      	ld.w      	r3, (r5, 0x0)
+    422c:	3101      	movi      	r1, 1
+    422e:	9440      	ld.w      	r2, (r4, 0x0)
+    4230:	b321      	st.w      	r1, (r3, 0x4)
+    4232:	b220      	st.w      	r1, (r2, 0x0)
+    4234:	3100      	movi      	r1, 0
+    4236:	b327      	st.w      	r1, (r3, 0x1c)
+    4238:	3004      	movi      	r0, 4
+    423a:	b225      	st.w      	r1, (r2, 0x14)
+    423c:	932e      	ld.w      	r1, (r3, 0x38)
+    423e:	6840      	and      	r1, r0
+    4240:	3940      	cmpnei      	r1, 0
+    4242:	0ffd      	bf      	0x423c	// 423c <std_clk_calib+0x160>
+    4244:	9225      	ld.w      	r1, (r2, 0x14)
+    4246:	b82a      	st.w      	r1, (r14, 0x28)
+    4248:	3100      	movi      	r1, 0
+    424a:	b310      	st.w      	r0, (r3, 0x40)
+    424c:	b327      	st.w      	r1, (r3, 0x1c)
+    424e:	3004      	movi      	r0, 4
+    4250:	b225      	st.w      	r1, (r2, 0x14)
+    4252:	932e      	ld.w      	r1, (r3, 0x38)
+    4254:	6840      	and      	r1, r0
+    4256:	3940      	cmpnei      	r1, 0
+    4258:	0ffd      	bf      	0x4252	// 4252 <std_clk_calib+0x176>
+    425a:	9225      	ld.w      	r1, (r2, 0x14)
+    425c:	b82b      	st.w      	r1, (r14, 0x2c)
+    425e:	3100      	movi      	r1, 0
+    4260:	b310      	st.w      	r0, (r3, 0x40)
+    4262:	b327      	st.w      	r1, (r3, 0x1c)
+    4264:	3004      	movi      	r0, 4
+    4266:	b225      	st.w      	r1, (r2, 0x14)
+    4268:	932e      	ld.w      	r1, (r3, 0x38)
+    426a:	6840      	and      	r1, r0
+    426c:	3940      	cmpnei      	r1, 0
+    426e:	0ffd      	bf      	0x4268	// 4268 <std_clk_calib+0x18c>
+    4270:	9225      	ld.w      	r1, (r2, 0x14)
+    4272:	b82c      	st.w      	r1, (r14, 0x30)
+    4274:	b310      	st.w      	r0, (r3, 0x40)
+    4276:	982b      	ld.w      	r1, (r14, 0x2c)
+    4278:	980c      	ld.w      	r0, (r14, 0x30)
+    427a:	6040      	addu      	r1, r0
+    427c:	b829      	st.w      	r1, (r14, 0x24)
+    427e:	9829      	ld.w      	r1, (r14, 0x24)
+    4280:	4921      	lsri      	r1, r1, 1
+    4282:	b829      	st.w      	r1, (r14, 0x24)
+    4284:	3100      	movi      	r1, 0
+    4286:	b321      	st.w      	r1, (r3, 0x4)
+    4288:	b220      	st.w      	r1, (r2, 0x0)
+    428a:	b327      	st.w      	r1, (r3, 0x1c)
+    428c:	b225      	st.w      	r1, (r2, 0x14)
+    428e:	d86e0009 	ld.b      	r3, (r14, 0x9)
+    4292:	3b42      	cmpnei      	r3, 2
+    4294:	9849      	ld.w      	r2, (r14, 0x24)
+    4296:	082c      	bt      	0x42ee	// 42ee <std_clk_calib+0x212>
+    4298:	1171      	lrw      	r3, 0x7ff	// 435c <std_clk_calib+0x280>
+    429a:	648c      	cmphs      	r3, r2
+    429c:	0c03      	bf      	0x42a2	// 42a2 <std_clk_calib+0x1c6>
+    429e:	3300      	movi      	r3, 0
+    42a0:	040f      	br      	0x42be	// 42be <std_clk_calib+0x1e2>
+    42a2:	9849      	ld.w      	r2, (r14, 0x24)
+    42a4:	9866      	ld.w      	r3, (r14, 0x18)
+    42a6:	648c      	cmphs      	r3, r2
+    42a8:	080e      	bt      	0x42c4	// 42c4 <std_clk_calib+0x1e8>
+    42aa:	9868      	ld.w      	r3, (r14, 0x20)
+    42ac:	9847      	ld.w      	r2, (r14, 0x1c)
+    42ae:	60ca      	subu      	r3, r2
+    42b0:	b868      	st.w      	r3, (r14, 0x20)
+    42b2:	32fe      	movi      	r2, 254
+    42b4:	9868      	ld.w      	r3, (r14, 0x20)
+    42b6:	4248      	lsli      	r2, r2, 8
+    42b8:	68c8      	and      	r3, r2
+    42ba:	3b40      	cmpnei      	r3, 0
+    42bc:	0812      	bt      	0x42e0	// 42e0 <std_clk_calib+0x204>
+    42be:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    42c2:	0721      	br      	0x4104	// 4104 <std_clk_calib+0x28>
+    42c4:	9849      	ld.w      	r2, (r14, 0x24)
+    42c6:	9865      	ld.w      	r3, (r14, 0x14)
+    42c8:	64c8      	cmphs      	r2, r3
+    42ca:	0829      	bt      	0x431c	// 431c <std_clk_calib+0x240>
+    42cc:	9868      	ld.w      	r3, (r14, 0x20)
+    42ce:	9847      	ld.w      	r2, (r14, 0x1c)
+    42d0:	60c8      	addu      	r3, r2
+    42d2:	b868      	st.w      	r3, (r14, 0x20)
+    42d4:	33fe      	movi      	r3, 254
+    42d6:	9848      	ld.w      	r2, (r14, 0x20)
+    42d8:	4368      	lsli      	r3, r3, 8
+    42da:	688c      	and      	r2, r3
+    42dc:	64ca      	cmpne      	r2, r3
+    42de:	0fe0      	bf      	0x429e	// 429e <std_clk_calib+0x1c2>
+    42e0:	9660      	ld.w      	r3, (r6, 0x0)
+    42e2:	9848      	ld.w      	r2, (r14, 0x20)
+    42e4:	b354      	st.w      	r2, (r3, 0x50)
+    42e6:	3001      	movi      	r0, 1
+    42e8:	e3fff16e 	bsr      	0x25c4	// 25c4 <delay_nms>
+    42ec:	075e      	br      	0x41a8	// 41a8 <std_clk_calib+0xcc>
+    42ee:	9866      	ld.w      	r3, (r14, 0x18)
+    42f0:	648c      	cmphs      	r3, r2
+    42f2:	0809      	bt      	0x4304	// 4304 <std_clk_calib+0x228>
+    42f4:	9868      	ld.w      	r3, (r14, 0x20)
+    42f6:	9847      	ld.w      	r2, (r14, 0x1c)
+    42f8:	60ca      	subu      	r3, r2
+    42fa:	b868      	st.w      	r3, (r14, 0x20)
+    42fc:	32ff      	movi      	r2, 255
+    42fe:	9868      	ld.w      	r3, (r14, 0x20)
+    4300:	4250      	lsli      	r2, r2, 16
+    4302:	07db      	br      	0x42b8	// 42b8 <std_clk_calib+0x1dc>
+    4304:	9849      	ld.w      	r2, (r14, 0x24)
+    4306:	9865      	ld.w      	r3, (r14, 0x14)
+    4308:	64c8      	cmphs      	r2, r3
+    430a:	0809      	bt      	0x431c	// 431c <std_clk_calib+0x240>
+    430c:	9868      	ld.w      	r3, (r14, 0x20)
+    430e:	9847      	ld.w      	r2, (r14, 0x1c)
+    4310:	60c8      	addu      	r3, r2
+    4312:	b868      	st.w      	r3, (r14, 0x20)
+    4314:	33ff      	movi      	r3, 255
+    4316:	9848      	ld.w      	r2, (r14, 0x20)
+    4318:	4370      	lsli      	r3, r3, 16
+    431a:	07e0      	br      	0x42da	// 42da <std_clk_calib+0x1fe>
+    431c:	3300      	movi      	r3, 0
+    431e:	dc6e000a 	st.b      	r3, (r14, 0xa)
+    4322:	07e2      	br      	0x42e6	// 42e6 <std_clk_calib+0x20a>
+    4324:	2000005c 	.long	0x2000005c
+    4328:	2000000c 	.long	0x2000000c
+    432c:	02dc6c00 	.long	0x02dc6c00
+    4330:	0000ffff 	.long	0x0000ffff
+    4334:	20000014 	.long	0x20000014
+    4338:	be9c0005 	.long	0xbe9c0005
+    433c:	00030010 	.long	0x00030010
+    4340:	016e3600 	.long	0x016e3600
+    4344:	00b71b00 	.long	0x00b71b00
+    4348:	005b8d80 	.long	0x005b8d80
+    434c:	0054c720 	.long	0x0054c720
+    4350:	003ffed0 	.long	0x003ffed0
+    4354:	001fff68 	.long	0x001fff68
+    4358:	0001ffb8 	.long	0x0001ffb8
+    435c:	000007ff 	.long	0x000007ff
diff --git a/Source/Lst/TRF_TM_CR_V03_20250221.map b/Source/Lst/TRF_TM_CR_V03_20250221.map
new file mode 100644
index 0000000..8147ec5
--- /dev/null
+++ b/Source/Lst/TRF_TM_CR_V03_20250221.map
@@ -0,0 +1,2125 @@
+ELF Header:
+  Magic:   7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00 
+  Class:                             ELF32
+  Data:                              2's complement, little endian
+  Version:                           1 (current)
+  OS/ABI:                            UNIX - System V
+  ABI Version:                       0
+  Type:                              EXEC (Executable file)
+  Machine:                           CSKY
+  Version:                           0x1
+  Entry point address:               0x10c
+  Start of program headers:          52 (bytes into file)
+  Start of section headers:          304444 (bytes into file)
+  Flags:                             0x21000000
+  Size of this header:               52 (bytes)
+  Size of program headers:           32 (bytes)
+  Number of program headers:         2
+  Size of section headers:           40 (bytes)
+  Number of section headers:         152
+  Section header string table index: 149
+
+Section Headers:
+  [Nr] Name              Type            Addr     Off    Size   ES Flg Lk Inf Al
+  [ 0]                   NULL            00000000 000000 000000 00      0   0  0
+  [ 1] .text             PROGBITS        00000000 001000 001a50 00  AX  0   0 1024
+  [ 2] .text.__main      PROGBITS        00001a50 002a50 000038 00  AX  0   0  4
+  [ 3] .text.SYSCON_Gene PROGBITS        00001a88 002a88 000074 00  AX  0   0  4
+  [ 4] .text.SYSCON_RST_ PROGBITS        00001afc 002afc 00004c 00  AX  0   0  4
+  [ 5] .text.SYSCON_Gene PROGBITS        00001b48 002b48 000030 00  AX  0   0  4
+  [ 6] .text.SystemCLK_H PROGBITS        00001b78 002b78 000088 00  AX  0   0  4
+  [ 7] .text.SYSCON_HFOS PROGBITS        00001c00 002c00 000028 00  AX  0   0  4
+  [ 8] .text.SYSCON_WDT_ PROGBITS        00001c28 002c28 00003c 00  AX  0   0  4
+  [ 9] .text.SYSCON_IWDC PROGBITS        00001c64 002c64 000014 00  AX  0   0  4
+  [10] .text.SYSCON_IWDC PROGBITS        00001c78 002c78 000018 00  AX  0   0  4
+  [11] .text.SYSCON_LVD_ PROGBITS        00001c90 002c90 000020 00  AX  0   0  4
+  [12] .text.LVD_Int_Ena PROGBITS        00001cb0 002cb0 00001c 00  AX  0   0  4
+  [13] .text.IWDT_Int_En PROGBITS        00001ccc 002ccc 00001c 00  AX  0   0  4
+  [14] .text.EXTI_trigge PROGBITS        00001ce8 002ce8 000040 00  AX  0   0  4
+  [15] .text.EXTI_interr PROGBITS        00001d28 002d28 000034 00  AX  0   0  4
+  [16] .text.GPIO_EXTI_i PROGBITS        00001d5c 002d5c 000004 00  AX  0   0  2
+  [17] .text.EXI4_Int_En PROGBITS        00001d60 002d60 000010 00  AX  0   0  4
+  [18] .text.SYSCON_Int_ PROGBITS        00001d70 002d70 00000c 00  AX  0   0  4
+  [19] .text.SYSCON_Int_ PROGBITS        00001d7c 002d7c 00000c 00  AX  0   0  4
+  [20] .text.SYSCON_INT_ PROGBITS        00001d88 002d88 000024 00  AX  0   0  4
+  [21] .text.Set_INT_Pri PROGBITS        00001dac 002dac 000030 00  AX  0   0  4
+  [22] .text.GPIO_Init   PROGBITS        00001ddc 002ddc 0000e0 00  AX  0   0  4
+  [23] .text.GPIO_PullHi PROGBITS        00001ebc 002ebc 000014 00  AX  0   0  2
+  [24] .text.GPIO_DriveS PROGBITS        00001ed0 002ed0 00000e 00  AX  0   0  2
+  [25] .text.GPIO_IntGro PROGBITS        00001ee0 002ee0 00010c 00  AX  0   0  4
+  [26] .text.GPIOA0_EXI_ PROGBITS        00001fec 002fec 0000fc 00  AX  0   0  4
+  [27] .text.GPIO_Write_ PROGBITS        000020e8 0030e8 000008 00  AX  0   0  2
+  [28] .text.GPIO_Write_ PROGBITS        000020f0 0030f0 000008 00  AX  0   0  2
+  [29] .text.GPIO_Revers PROGBITS        000020f8 0030f8 000016 00  AX  0   0  2
+  [30] .text.GPIO_Read_S PROGBITS        0000210e 00310e 000010 00  AX  0   0  2
+  [31] .text.LPT_Soft_Re PROGBITS        00002120 003120 000014 00  AX  0   0  4
+  [32] .text.WWDT_CNT_Lo PROGBITS        00002134 003134 000010 00  AX  0   0  4
+  [33] .text.BT_DeInit   PROGBITS        00002144 003144 00001c 00  AX  0   0  2
+  [34] .text.BT_Start    PROGBITS        00002160 003160 000008 00  AX  0   0  2
+  [35] .text.BT_Soft_Res PROGBITS        00002168 003168 00000a 00  AX  0   0  2
+  [36] .text.BT_Configur PROGBITS        00002172 003172 000018 00  AX  0   0  2
+  [37] .text.BT_ControlS PROGBITS        0000218a 00318a 00002c 00  AX  0   0  2
+  [38] .text.BT_Period_C PROGBITS        000021b6 0031b6 000006 00  AX  0   0  2
+  [39] .text.BT_ConfigIn PROGBITS        000021bc 0031bc 000012 00  AX  0   0  2
+  [40] .text.BT1_INT_ENA PROGBITS        000021d0 0031d0 000010 00  AX  0   0  4
+  [41] .text.GPT_IO_Init PROGBITS        000021e0 0031e0 0000a0 00  AX  0   0  4
+  [42] .text.GPT_Configu PROGBITS        00002280 003280 000014 00  AX  0   0  4
+  [43] .text.GPT_WaveCtr PROGBITS        00002294 003294 000044 00  AX  0   0  4
+  [44] .text.GPT_WaveLoa PROGBITS        000022d8 0032d8 000014 00  AX  0   0  4
+  [45] .text.GPT_WaveOut PROGBITS        000022ec 0032ec 0000b4 00  AX  0   0  4
+  [46] .text.GPT_Start   PROGBITS        000023a0 0033a0 000010 00  AX  0   0  4
+  [47] .text.GPT_Period_ PROGBITS        000023b0 0033b0 000010 00  AX  0   0  4
+  [48] .text.GPT_ConfigI PROGBITS        000023c0 0033c0 00001c 00  AX  0   0  4
+  [49] .text.UART0_DeIni PROGBITS        000023dc 0033dc 000018 00  AX  0   0  4
+  [50] .text.UART1_DeIni PROGBITS        000023f4 0033f4 000018 00  AX  0   0  4
+  [51] .text.UART2_DeIni PROGBITS        0000240c 00340c 000018 00  AX  0   0  4
+  [52] .text.UART1_Int_E PROGBITS        00002424 003424 00001c 00  AX  0   0  4
+  [53] .text.UART2_Int_E PROGBITS        00002440 003440 00001c 00  AX  0   0  4
+  [54] .text.UART_IO_Ini PROGBITS        0000245c 00345c 0000ec 00  AX  0   0  4
+  [55] .text.UARTInitRxT PROGBITS        00002548 003548 000010 00  AX  0   0  4
+  [56] .text.UARTTransmi PROGBITS        00002558 003558 00001e 00  AX  0   0  2
+  [57] .text.EPT_Stop    PROGBITS        00002578 003578 000028 00  AX  0   0  4
+  [58] .text.startup.mai PROGBITS        000025a0 0035a0 000024 00  AX  0   0  4
+  [59] .text.delay_nms   PROGBITS        000025c4 0035c4 00002c 00  AX  0   0  2
+  [60] .text.delay_nus   PROGBITS        000025f0 0035f0 000022 00  AX  0   0  2
+  [61] .text.BT_CONFIG   PROGBITS        00002614 003614 000060 00  AX  0   0  4
+  [62] .text.SYSCON_CONF PROGBITS        00002674 003674 000062 00  AX  0   0  2
+  [63] .text.APT32F102_i PROGBITS        000026d8 0036d8 00004c 00  AX  0   0  4
+  [64] .text.SYSCONIntHa PROGBITS        00002724 003724 0000f0 00  AX  0   0  4
+  [65] .text.IFCIntHandl PROGBITS        00002814 003814 000068 00  AX  0   0  4
+  [66] .text.ADCIntHandl PROGBITS        0000287c 00387c 000068 00  AX  0   0  4
+  [67] .text.EPT0IntHand PROGBITS        000028e4 0038e4 0001ac 00  AX  0   0  4
+  [68] .text.WWDTHandler PROGBITS        00002a90 003a90 000034 00  AX  0   0  4
+  [69] .text.GPT0IntHand PROGBITS        00002ac4 003ac4 000080 00  AX  0   0  4
+  [70] .text.RTCIntHandl PROGBITS        00002b44 003b44 000070 00  AX  0   0  4
+  [71] .text.UART0IntHan PROGBITS        00002bb4 003bb4 00003c 00  AX  0   0  4
+  [72] .text.UART1IntHan PROGBITS        00002bf0 003bf0 000094 00  AX  0   0  4
+  [73] .text.UART2IntHan PROGBITS        00002c84 003c84 00004c 00  AX  0   0  4
+  [74] .text.SPI0IntHand PROGBITS        00002cd0 003cd0 0000e8 00  AX  0   0  4
+  [75] .text.SIO0IntHand PROGBITS        00002db8 003db8 000054 00  AX  0   0  4
+  [76] .text.EXI0IntHand PROGBITS        00002e0c 003e0c 000030 00  AX  0   0  4
+  [77] .text.EXI1IntHand PROGBITS        00002e3c 003e3c 000030 00  AX  0   0  4
+  [78] .text.EXI2to3IntH PROGBITS        00002e6c 003e6c 000048 00  AX  0   0  4
+  [79] .text.EXI4to9IntH PROGBITS        00002eb4 003eb4 000020 00  AX  0   0  4
+  [80] .text.EXI10to15In PROGBITS        00002ed4 003ed4 00006c 00  AX  0   0  4
+  [81] .text.LPTIntHandl PROGBITS        00002f40 003f40 000034 00  AX  0   0  4
+  [82] .text.BT0IntHandl PROGBITS        00002f74 003f74 00004c 00  AX  0   0  4
+  [83] .text.BT1IntHandl PROGBITS        00002fc0 003fc0 000070 00  AX  0   0  4
+  [84] .text.PriviledgeV PROGBITS        00003030 004030 000002 00  AX  0   0  2
+  [85] .text.PendTrapHan PROGBITS        00003032 004032 000008 00  AX  0   0  2
+  [86] .text.Trap3Handle PROGBITS        0000303a 00403a 000008 00  AX  0   0  2
+  [87] .text.Trap2Handle PROGBITS        00003042 004042 000008 00  AX  0   0  2
+  [88] .text.Trap1Handle PROGBITS        0000304a 00404a 000008 00  AX  0   0  2
+  [89] .text.Trap0Handle PROGBITS        00003052 004052 000008 00  AX  0   0  2
+  [90] .text.UnrecExecpH PROGBITS        0000305a 00405a 000008 00  AX  0   0  2
+  [91] .text.BreakPointH PROGBITS        00003062 004062 000008 00  AX  0   0  2
+  [92] .text.AccessErrHa PROGBITS        0000306a 00406a 000008 00  AX  0   0  2
+  [93] .text.IllegalInst PROGBITS        00003072 004072 000008 00  AX  0   0  2
+  [94] .text.MisalignedH PROGBITS        0000307a 00407a 000008 00  AX  0   0  2
+  [95] .text.CNTAIntHand PROGBITS        00003082 004082 000008 00  AX  0   0  2
+  [96] .text.I2CIntHandl PROGBITS        0000308a 00408a 000008 00  AX  0   0  2
+  [97] .text.__divsi3    PROGBITS        00003094 004094 000024 00  AX  0   0  4
+  [98] .text.__udivsi3   PROGBITS        000030b8 0040b8 000024 00  AX  0   0  4
+  [99] .text.__umodsi3   PROGBITS        000030dc 0040dc 000024 00  AX  0   0  4
+  [100] .text.CK_CPU_EnAl PROGBITS        00003100 004100 000006 00  AX  0   0  2
+  [101] .text.CK_CPU_DisA PROGBITS        00003106 004106 000006 00  AX  0   0  2
+  [102] .text.UARTx_Init  PROGBITS        0000310c 00410c 000120 00  AX  0   0  4
+  [103] .text.UART1_RecvI PROGBITS        0000322c 00422c 000034 00  AX  0   0  4
+  [104] .text.UART1_TASK  PROGBITS        00003260 004260 000060 00  AX  0   0  4
+  [105] .text.BUS485_Send PROGBITS        000032c0 0042c0 0000c4 00  AX  0   0  4
+  [106] .text.MultSend_Ta PROGBITS        00003384 004384 000064 00  AX  0   0  4
+  [107] .text.Set_GroupSe PROGBITS        000033e8 0043e8 00005c 00  AX  0   0  4
+  [108] .text.BUS485Send_ PROGBITS        00003444 004444 00002c 00  AX  0   0  4
+  [109] .text.BusIdle_Tas PROGBITS        00003470 004470 00003c 00  AX  0   0  4
+  [110] .text.BusBusy_Tas PROGBITS        000034ac 0044ac 000054 00  AX  0   0  4
+  [111] .text.Dbg_Println PROGBITS        00003500 004500 00000c 00  AX  0   0  2
+  [112] .text.DIP_GetSwit PROGBITS        0000350c 00450c 000034 00  AX  0   0  4
+  [113] .text.DIP_Switch_ PROGBITS        00003540 004540 00008c 00  AX  0   0  4
+  [114] .text.DIP_ScanTas PROGBITS        000035cc 0045cc 00008c 00  AX  0   0  4
+  [115] .text.Relay_Init  PROGBITS        00003658 004658 0000cc 00  AX  0   0  4
+  [116] .text.CheckSum    PROGBITS        00003724 004724 000016 00  AX  0   0  2
+  [117] .text.Change_OUTV PROGBITS        0000373c 00473c 00001c 00  AX  0   0  4
+  [118] .text.BLV_VolOut_ PROGBITS        00003758 004758 000090 00  AX  0   0  4
+  [119] .text.BLV_RLY_Ctr PROGBITS        000037e8 0047e8 00007c 00  AX  0   0  4
+  [120] .text.BLV_RLY_Tas PROGBITS        00003864 004864 000054 00  AX  0   0  4
+  [121] .text.BLV_A9RLY_C PROGBITS        000038b8 0048b8 00009c 00  AX  0   0  4
+  [122] .text.BLV_A9RLY_C PROGBITS        00003954 004954 000078 00  AX  0   0  4
+  [123] .text.BLV_RLY_RS4 PROGBITS        000039cc 0049cc 0000b0 00  AX  0   0  4
+  [124] .text.TK_Sampling PROGBITS        00003a7c 004a7c 000058 00  AX  0   0  4
+  [125] .text.TKEYIntHand PROGBITS        00003ad4 004ad4 000088 00  AX  0   0  4
+  [126] .text.get_key_num PROGBITS        00003b5c 004b5c 000028 00  AX  0   0  4
+  [127] .text.TK_Scan_Sta PROGBITS        00003b84 004b84 000020 00  AX  0   0  4
+  [128] .text.TK_Keymap_p PROGBITS        00003ba4 004ba4 000180 00  AX  0   0  4
+  [129] .text.TK_overflow PROGBITS        00003d24 004d24 00011c 00  AX  0   0  4
+  [130] .text.TK_Baseline PROGBITS        00003e40 004e40 0001d0 00  AX  0   0  4
+  [131] .text.TK_result_p PROGBITS        00004010 005010 000054 00  AX  0   0  4
+  [132] .text.CORETHandle PROGBITS        00004064 005064 000078 00  AX  0   0  4
+  [133] .text.std_clk_cal PROGBITS        000040dc 0050dc 000284 00  AX  0   0  4
+  [134] .RomCode          PROGBITS        00004360 00609c 000000 00   W  0   0  1
+  [135] .rodata           PROGBITS        00004360 005360 000200 00   A  0   0  4
+  [136] .data             PROGBITS        20000000 006000 00009c 00  WA  0   0  4
+  [137] .bss              NOBITS          2000009c 00609c 0005ac 00  WA  0   0  4
+  [138] .csky.attributes  CSKY_ATTRIBUTES 00000000 00609c 000022 00      0   0  1
+  [139] .comment          PROGBITS        00000000 0060be 000042 01  MS  0   0  1
+  [140] .csky_stack_size  PROGBITS        00000000 006100 0007bc 00      0   0 16
+  [141] .debug_line       PROGBITS        00000000 0068bc 0035d5 00      0   0  1
+  [142] .debug_info       PROGBITS        00000000 009e91 02a208 00      0   0  1
+  [143] .debug_abbrev     PROGBITS        00000000 034099 0026cf 00      0   0  1
+  [144] .debug_aranges    PROGBITS        00000000 036768 000c10 00      0   0  8
+  [145] .debug_ranges     PROGBITS        00000000 037378 000b58 00      0   0  1
+  [146] .debug_str        PROGBITS        00000000 037ed0 008721 01  MS  0   0  1
+  [147] .debug_frame      PROGBITS        00000000 0405f4 001bec 00      0   0  4
+  [148] .debug_loc        PROGBITS        00000000 0421e0 002c1e 00      0   0  1
+  [149] .shstrtab         STRTAB          00000000 04990b 000c30 00      0   0  1
+  [150] .symtab           SYMTAB          00000000 044e00 003920 10     151 631  4
+  [151] .strtab           STRTAB          00000000 048720 0011eb 00      0   0  1
+Key to Flags:
+  W (write), A (alloc), X (execute), M (merge), S (strings), I (info),
+  L (link order), O (extra OS processing required), G (group), T (TLS),
+  C (compressed), x (unknown), o (OS specific), E (exclude),
+  p (processor specific)
+
+Program Headers:
+  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
+  LOAD           0x001000 0x00000000 0x00000000 0x04560 0x04560 R E 0x1000
+  LOAD           0x006000 0x20000000 0x00004560 0x0009c 0x00648 RW  0x1000
+
+ Section to Segment mapping:
+  Segment Sections...
+   00     .text .text.__main .text.SYSCON_General_CMD.part.0 .text.SYSCON_RST_VALUE .text.SYSCON_General_CMD .text.SystemCLK_HCLKDIV_PCLKDIV_Config .text.SYSCON_HFOSC_SELECTE .text.SYSCON_WDT_CMD .text.SYSCON_IWDCNT_Reload .text.SYSCON_IWDCNT_Config .text.SYSCON_LVD_Config .text.LVD_Int_Enable .text.IWDT_Int_Enable .text.EXTI_trigger_CMD .text.EXTI_interrupt_CMD .text.GPIO_EXTI_interrupt .text.EXI4_Int_Enable .text.SYSCON_Int_Enable .text.SYSCON_Int_Disable .text.SYSCON_INT_Priority .text.Set_INT_Priority .text.GPIO_Init .text.GPIO_PullHigh_Init .text.GPIO_DriveStrength_EN .text.GPIO_IntGroup_Set .text.GPIOA0_EXI_Init .text.GPIO_Write_High .text.GPIO_Write_Low .text.GPIO_Reverse .text.GPIO_Read_Status .text.LPT_Soft_Reset .text.WWDT_CNT_Load .text.BT_DeInit .text.BT_Start .text.BT_Soft_Reset .text.BT_Configure .text.BT_ControlSet_Configure .text.BT_Period_CMP_Write .text.BT_ConfigInterrupt_CMD .text.BT1_INT_ENABLE .text.GPT_IO_Init .text.GPT_Configure .text.GPT_WaveCtrl_Configure .text.GPT_WaveLoad_Configure .text.GPT_WaveOut_Configure .text.GPT_Start .text.GPT_Period_CMP_Write .text.GPT_ConfigInterrupt_CMD .text.UART0_DeInit .text.UART1_DeInit .text.UART2_DeInit .text.UART1_Int_Enable .text.UART2_Int_Enable .text.UART_IO_Init .text.UARTInitRxTxIntEn .text.UARTTransmit .text.EPT_Stop .text.startup.main .text.delay_nms .text.delay_nus .text.BT_CONFIG .text.SYSCON_CONFIG .text.APT32F102_init .text.SYSCONIntHandler .text.IFCIntHandler .text.ADCIntHandler .text.EPT0IntHandler .text.WWDTHandler .text.GPT0IntHandler .text.RTCIntHandler .text.UART0IntHandler .text.UART1IntHandler .text.UART2IntHandler .text.SPI0IntHandler .text.SIO0IntHandler .text.EXI0IntHandler .text.EXI1IntHandler .text.EXI2to3IntHandler .text.EXI4to9IntHandler .text.EXI10to15IntHandler .text.LPTIntHandler .text.BT0IntHandler .text.BT1IntHandler .text.PriviledgeVioHandler .text.PendTrapHandler .text.Trap3Handler .text.Trap2Handler .text.Trap1Handler .text.Trap0Handler .text.UnrecExecpHandler .text.BreakPointHandler .text.AccessErrHandler .text.IllegalInstrHandler .text.MisalignedHandler .text.CNTAIntHandler .text.I2CIntHandler .text.__divsi3 .text.__udivsi3 .text.__umodsi3 .text.CK_CPU_EnAllNormalIrq .text.CK_CPU_DisAllNormalIrq .text.UARTx_Init .text.UART1_RecvINT_Processing .text.UART1_TASK .text.BUS485_Send .text.MultSend_Task .text.Set_GroupSend .text.BUS485Send_Task .text.BusIdle_Task .text.BusBusy_Task .text.Dbg_Println .text.DIP_GetSwitchState .text.DIP_Switch_Init .text.DIP_ScanTask .text.Relay_Init .text.CheckSum .text.Change_OUTV .text.BLV_VolOut_Ctrl .text.BLV_RLY_Ctrl_Purpose .text.BLV_RLY_Task .text.BLV_A9RLY_CMD_SET_Processing .text.BLV_A9RLY_CMD_READ_Processing .text.BLV_RLY_RS485_Pro .text.TK_Sampling_prog .text.TKEYIntHandler .text.get_key_number .text.TK_Scan_Start .text.TK_Keymap_prog .text.TK_overflow_predict .text.TK_Baseline_tracking .text.TK_result_prog .text.CORETHandler .text.std_clk_calib .rodata 
+   01     .data .bss 
+======================================================================
+Csky GNU Linker
+
+======================================================================
+
+Section Cross References
+
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_RST_VALUE) for SYSCON_RST_VALUE
+	Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_General_CMD) for SYSCON_General_CMD
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SystemCLK_HCLKDIV_PCLKDIV_Config) for SystemCLK_HCLKDIV_PCLKDIV_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_HFOSC_SELECTE) for SYSCON_HFOSC_SELECTE
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_WDT_CMD) for SYSCON_WDT_CMD
+	Obj/main.o(.text.startup.main) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.delay_nms) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Reload) for SYSCON_IWDCNT_Reload
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_IWDCNT_Config) for SYSCON_IWDCNT_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_LVD_Config) for SYSCON_LVD_Config
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.LVD_Int_Enable) for LVD_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.IWDT_Int_Enable) for IWDT_Int_Enable
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_trigger_CMD) for EXTI_trigger_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXTI_interrupt_CMD) for EXTI_interrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.GPIO_EXTI_interrupt) for GPIO_EXTI_interrupt
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_syscon.o(.text.EXI4_Int_Enable) for EXI4_Int_Enable
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Enable) for SYSCON_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_Int_Disable) for SYSCON_Int_Disable
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.SYSCON_INT_Priority) for SYSCON_INT_Priority
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/FWlib_apt32f102_syscon.o(.text.Set_INT_Priority) for Set_INT_Priority
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_Low) for GPIO_Write_Low
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Reverse) for GPIO_Reverse
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Read_Status) for GPIO_Read_Status
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) for GPIO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_PullHigh_Init) for GPIO_PullHigh_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_DriveStrength_EN) for GPIO_DriveStrength_EN
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_IntGroup_Set) for GPIO_IntGroup_Set
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIOA0_EXI_Init) for GPIOA0_EXI_Init
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) refers to Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Write_High) for GPIO_Write_High
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_lpt.o(.text.LPT_Soft_Reset) for LPT_Soft_Reset
+	Obj/mcu_interrupt.o(.text.WWDTHandler) refers to Obj/FWlib_apt32f102_wwdt.o(.text.WWDT_CNT_Load) for WWDT_CNT_Load
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_DeInit) for BT_DeInit
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Start) for BT_Start
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Soft_Reset) for BT_Soft_Reset
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Configure) for BT_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ControlSet_Configure) for BT_ControlSet_Configure
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_Period_CMP_Write) for BT_Period_CMP_Write
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/FWlib_apt32f102_bt.o(.text.BT_ConfigInterrupt_CMD) for BT_ConfigInterrupt_CMD
+	Obj/mcu_initial.o(.text.BT_CONFIG) refers to Obj/FWlib_apt32f102_bt.o(.text.BT1_INT_ENABLE) for BT1_INT_ENABLE
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_IO_Init) for GPT_IO_Init
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Configure) for GPT_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveCtrl_Configure) for GPT_WaveCtrl_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveLoad_Configure) for GPT_WaveLoad_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_WaveOut_Configure) for GPT_WaveOut_Configure
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Start) for GPT_Start
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_Period_CMP_Write) for GPT_Period_CMP_Write
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to Obj/FWlib_apt32f102_gpt.o(.text.GPT_ConfigInterrupt_CMD) for GPT_ConfigInterrupt_CMD
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART0_DeInit) for UART0_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_DeInit) for UART1_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_DeInit) for UART2_DeInit
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART1_Int_Enable) for UART1_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART2_Int_Enable) for UART2_Int_Enable
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UART_IO_Init) for UART_IO_Init
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTInitRxTxIntEn) for UARTInitRxTxIntEn
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/FWlib_apt32f102_uart.o(.text.UARTTransmit) for UARTTransmit
+	Obj/mcu_interrupt.o(.text.EPT0IntHandler) refers to Obj/FWlib_apt32f102_ept.o(.text.EPT_Stop) for EPT_Stop
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/mcu_initial.o(.text.delay_nms) for delay_nms
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/mcu_initial.o(.text.delay_nus) for delay_nus
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.BT_CONFIG) for BT_CONFIG
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/mcu_initial.o(.text.SYSCON_CONFIG) for SYSCON_CONFIG
+	Obj/main.o(.text.startup.main) refers to Obj/mcu_initial.o(.text.APT32F102_init) for APT32F102_init
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to Obj/drivers_apt32f102.o(.text.__divsi3) for __divsi3
+	FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) refers to Obj/drivers_apt32f102.o(.text.__udivsi3) for __udivsi3
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102.o(.text.__umodsi3) for __umodsi3
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusIdle_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_EnAllNormalIrq) for CK_CPU_EnAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BUS485_Send) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusIdle_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/SYSTEM_uart.o(.text.BusBusy_Task) refers to Obj/drivers_apt32f102_ck801.o(.text.CK_CPU_DisAllNormalIrq) for CK_CPU_DisAllNormalIrq
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_uart.o(.text.Dbg_Println) for Dbg_Println
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_uart.o(.text.UARTx_Init) for UARTx_Init
+	Obj/mcu_interrupt.o(.text.UART1IntHandler) refers to Obj/SYSTEM_uart.o(.text.UART1_RecvINT_Processing) for UART1_RecvINT_Processing
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.UART1_TASK) for UART1_TASK
+	Obj/SYSTEM_uart.o(.text.MultSend_Task) refers to Obj/SYSTEM_uart.o(.text.BUS485_Send) for BUS485_Send
+	Obj/SYSTEM_uart.o(.text.BUS485Send_Task) refers to Obj/SYSTEM_uart.o(.text.MultSend_Task) for MultSend_Task
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) refers to Obj/SYSTEM_uart.o(.text.Set_GroupSend) for Set_GroupSend
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_uart.o(.text.BUS485Send_Task) for BUS485Send_Task
+	Obj/mcu_interrupt.o(.text.BT1IntHandler) refers to Obj/SYSTEM_uart.o(.text.BusIdle_Task) for BusIdle_Task
+	Obj/mcu_interrupt.o(.text.EXI10to15IntHandler) refers to Obj/SYSTEM_uart.o(.text.BusBusy_Task) for BusBusy_Task
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) for DIP_GetSwitchState
+	Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_GetSwitchState) for DIP_GetSwitchState
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) for DIP_Switch_Init
+	Obj/main.o(.text.startup.main) refers to Obj/SYSTEM_dip_switch.o(.text.DIP_ScanTask) for DIP_ScanTask
+	Obj/mcu_initial.o(.text.APT32F102_init) refers to Obj/SYSTEM_control_rly.o(.text.Relay_Init) for Relay_Init
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.CheckSum) for CheckSum
+	Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) refers to Obj/SYSTEM_control_rly.o(.text.Change_OUTV) for Change_OUTV
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_control_rly.o(.text.BLV_VolOut_Ctrl) for BLV_VolOut_Ctrl
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) refers to Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Ctrl_Purpose) for BLV_RLY_Ctrl_Purpose
+	Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) refers to Obj/SYSTEM_control_rly.o(.text.BLV_RLY_Task) for BLV_RLY_Task
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_SET_Processing) for BLV_A9RLY_CMD_SET_Processing
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to Obj/SYSTEM_control_rly.o(.text.BLV_A9RLY_CMD_READ_Processing) for BLV_A9RLY_CMD_READ_Processing
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TKEYIntHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Sampling_prog) for TK_Sampling_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.get_key_number) for get_key_number
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Scan_Start) for TK_Scan_Start
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Keymap_prog) for TK_Keymap_prog
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) for TK_overflow_predict
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_Baseline_tracking) for TK_Baseline_tracking
+	FWlib_apt32f102_tkey_c_1_17.o(.text.CORETHandler) refers to FWlib_apt32f102_tkey_c_1_17.o(.text.TK_result_prog) for TK_result_prog
+	Obj/mcu_initial.o(.text.SYSCON_CONFIG) refers to FWlib_apt32f102_clkcalib.o(.text.std_clk_calib) for std_clk_calib
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to pow.o(.text) for pow
+	pow.o(.text) refers to fabs.o(.text) for fabs
+	pow.o(.text) refers to scalbn.o(.text) for scalbn
+	pow.o(.text) refers to sqrt.o(.text) for sqrt
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIO_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	Obj/FWlib_apt32f102_gpio.o(.text.GPIOA0_EXI_Init) refers to _csky_case_uqi.o(.text) for ___gnu_csky_case_uqi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _fixunsdfsi.o(.text) for __fixunsdfsi
+	pow.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __adddf3
+	pow.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	sqrt.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	_fixunsdfsi.o(.text) refers to _addsub_df.o(.text) for __subdf3
+	pow.o(.text) refers to _mul_df.o(.text) for __muldf3
+	sqrt.o(.text) refers to _mul_df.o(.text) for __muldf3
+	pow.o(.text) refers to _div_df.o(.text) for __divdf3
+	sqrt.o(.text) refers to _div_df.o(.text) for __divdf3
+	pow.o(.text) refers to _gt_df.o(.text) for __gtdf2
+	_fixunsdfsi.o(.text) refers to _ge_df.o(.text) for __gedf2
+	pow.o(.text) refers to _le_df.o(.text) for __ledf2
+	pow.o(.text) refers to _si_to_df.o(.text) for __floatsidf
+	_fixunsdfsi.o(.text) refers to _df_to_si.o(.text) for __fixdfsi
+	FWlib_apt32f102_tkey_c_1_17.o(.text.TK_overflow_predict) refers to _usi_to_df.o(.text) for __floatunsidf
+	_mul_df.o(.text) refers to _muldi3.o(.text) for __muldi3
+	_si_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_usi_to_df.o(.text) refers to _clzsi2.o(.text) for __clzsi2
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_mul_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_div_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_si_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_usi_to_df.o(.text) refers to _pack_df.o(.text) for __pack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_addsub_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_mul_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_div_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_ge_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_le_df.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_df_to_si.o(.text) refers to _unpack_df.o(.text) for __unpack_d
+	_gt_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_ge_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	_le_df.o(.text) refers to _fpcmp_parts_df.o(.text) for __fpcmp_parts_d
+	Obj/arch_mem_init.o(.text.__main) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UARTx_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_uart.o(.text.Set_GroupSend) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_dip_switch.o(.text.DIP_Switch_Init) refers to memset_fast.o(.text) for memset
+	Obj/SYSTEM_control_rly.o(.text.Relay_Init) refers to memset_fast.o(.text) for memset
+	Obj/arch_mem_init.o(.text.__main) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_uart.o(.text.UART1_TASK) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_uart.o(.text.Set_GroupSend) refers to memcpy_fast.o(.text) for memcpy
+	Obj/SYSTEM_control_rly.o(.text.BLV_RLY_RS485_Pro) refers to memcpy_fast.o(.text) for memcpy
+
+
+======================================================================
+
+Removing Unused input sections from the image. 
+
+	Removing .data(Obj/arch_crt0.o), (4 bytes).
+	Removing .bss(Obj/arch_crt0.o), (0 bytes).
+	Removing .text(Obj/arch_mem_init.o), (0 bytes).
+	Removing .data(Obj/arch_mem_init.o), (0 bytes).
+	Removing .bss(Obj/arch_mem_init.o), (0 bytes).
+	Removing .text(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .data(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .bss(Obj/arch_apt32f102_iostring.o), (0 bytes).
+	Removing .text.__putchar__(Obj/arch_apt32f102_iostring.o), (16 bytes).
+	Removing .text.myitoa(Obj/arch_apt32f102_iostring.o), (140 bytes).
+	Removing .text.my_printf(Obj/arch_apt32f102_iostring.o), (198 bytes).
+	Removing .debug_info(Obj/arch_apt32f102_iostring.o), (7541 bytes).
+	Removing .debug_abbrev(Obj/arch_apt32f102_iostring.o), (485 bytes).
+	Removing .debug_loc(Obj/arch_apt32f102_iostring.o), (653 bytes).
+	Removing .debug_aranges(Obj/arch_apt32f102_iostring.o), (48 bytes).
+	Removing .debug_ranges(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .debug_line(Obj/arch_apt32f102_iostring.o), (487 bytes).
+	Removing .debug_str(Obj/arch_apt32f102_iostring.o), (2911 bytes).
+	Removing .comment(Obj/arch_apt32f102_iostring.o), (67 bytes).
+	Removing .debug_frame(Obj/arch_apt32f102_iostring.o), (120 bytes).
+	Removing .csky.attributes(Obj/arch_apt32f102_iostring.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_syscon.o), (0 bytes).
+	Removing .text.EMOSC_OSTR_Config(Obj/FWlib_apt32f102_syscon.o), (28 bytes).
+	Removing .text.SystemCLK_Clear(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.SYSCON_IMOSC_SELECTE(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.LVD_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.IWDT_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.Read_Reset_Status(Obj/FWlib_apt32f102_syscon.o), (24 bytes).
+	Removing .text.PCLK_goto_idle_mode(Obj/FWlib_apt32f102_syscon.o), (6 bytes).
+	Removing .text.PCLK_goto_deepsleep_mode(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.EXI0_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_Int_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI0_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI0_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.EXI1_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI1_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI2_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI3_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.EXI4_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_WakeUp_Enable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_CLO_CONFIG(Obj/FWlib_apt32f102_syscon.o), (52 bytes).
+	Removing .text.SYSCON_CLO_SRC_SET(Obj/FWlib_apt32f102_syscon.o), (32 bytes).
+	Removing .text.SYSCON_WakeUp_Disable(Obj/FWlib_apt32f102_syscon.o), (12 bytes).
+	Removing .text.SYSCON_Read_CINF0(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Read_CINF1(Obj/FWlib_apt32f102_syscon.o), (16 bytes).
+	Removing .text.SYSCON_Software_Reset(Obj/FWlib_apt32f102_syscon.o), (20 bytes).
+	Removing .text.GPIO_Remap(Obj/FWlib_apt32f102_syscon.o), (652 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpio.o), (0 bytes).
+	Removing .text.GPIO_DeInit(Obj/FWlib_apt32f102_gpio.o), (100 bytes).
+	Removing .text.GPIO_Init2(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIO_InPutOutPut_Disable(Obj/FWlib_apt32f102_gpio.o), (164 bytes).
+	Removing .text.GPIO_MODE_Init(Obj/FWlib_apt32f102_gpio.o), (34 bytes).
+	Removing .text.GPIO_PullLow_Init(Obj/FWlib_apt32f102_gpio.o), (20 bytes).
+	Removing .text.GPIO_PullHighLow_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_OpenDrain_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_OpenDrain_DIS(Obj/FWlib_apt32f102_gpio.o), (14 bytes).
+	Removing .text.GPIO_TTL_COSM_Selecte(Obj/FWlib_apt32f102_gpio.o), (72 bytes).
+	Removing .text.GPIO_DriveStrength_DIS(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text.GPIOB0_EXI_Init(Obj/FWlib_apt32f102_gpio.o), (108 bytes).
+	Removing .text.GPIO_EXI_EN(Obj/FWlib_apt32f102_gpio.o), (12 bytes).
+	Removing .text.GPIO_Set_Value(Obj/FWlib_apt32f102_gpio.o), (22 bytes).
+	Removing .text.GPIO_Read_Output(Obj/FWlib_apt32f102_gpio.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_lpt.o), (0 bytes).
+	Removing .text.LPT_DeInit(Obj/FWlib_apt32f102_lpt.o), (60 bytes).
+	Removing .text.LPT_IO_Init(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Configure(Obj/FWlib_apt32f102_lpt.o), (44 bytes).
+	Removing .text.LPT_Debug_Mode(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Period_CMP_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Write(Obj/FWlib_apt32f102_lpt.o), (12 bytes).
+	Removing .text.LPT_PRDR_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CMP_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_CNT_Read(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_ControlSet_Configure(Obj/FWlib_apt32f102_lpt.o), (40 bytes).
+	Removing .text.LPT_SyncSet_Configure(Obj/FWlib_apt32f102_lpt.o), (24 bytes).
+	Removing .text.LPT_Trigger_Configure(Obj/FWlib_apt32f102_lpt.o), (72 bytes).
+	Removing .text.LPT_Trigger_EVPS(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Trigger_Cnt(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_Soft_Trigger(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Start(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_Stop(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Write(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_REARM_Read(Obj/FWlib_apt32f102_lpt.o), (20 bytes).
+	Removing .text.LPT_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_lpt.o), (28 bytes).
+	Removing .text.LPT_INT_ENABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text.LPT_INT_DISABLE(Obj/FWlib_apt32f102_lpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_crc.o), (0 bytes).
+	Removing .text.CRC_CMD(Obj/FWlib_apt32f102_crc.o), (24 bytes).
+	Removing .text.CRC_Soft_Reset(Obj/FWlib_apt32f102_crc.o), (16 bytes).
+	Removing .text.CRC_Configure(Obj/FWlib_apt32f102_crc.o), (36 bytes).
+	Removing .text.CRC_Seed_Write(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Seed_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Datain(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.CRC_Result_Read(Obj/FWlib_apt32f102_crc.o), (12 bytes).
+	Removing .text.Chip_CRC_CRC32(Obj/FWlib_apt32f102_crc.o), (28 bytes).
+	Removing .text.Chip_CRC_CRC16(Obj/FWlib_apt32f102_crc.o), (52 bytes).
+	Removing .text.Chip_CRC_CRC8(Obj/FWlib_apt32f102_crc.o), (44 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_crc.o), (7732 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_crc.o), (592 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_crc.o), (358 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_crc.o), (104 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_crc.o), (112 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_crc.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_crc.o), (3105 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_crc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_crc.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_crc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_wwdt.o), (0 bytes).
+	Removing .text.WWDT_DeInit(Obj/FWlib_apt32f102_wwdt.o), (28 bytes).
+	Removing .text.WWDT_CONFIG(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_CMD(Obj/FWlib_apt32f102_wwdt.o), (24 bytes).
+	Removing .text.WWDT_Int_Config(Obj/FWlib_apt32f102_wwdt.o), (52 bytes).
+	Removing .text(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_countera.o), (0 bytes).
+	Removing .text.COUNT_DeInit(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Int_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Int_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Enable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Wakeup_Disable(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Init(Obj/FWlib_apt32f102_countera.o), (60 bytes).
+	Removing .text.COUNTA_Config(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text.COUNTA_Start(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_Stop(Obj/FWlib_apt32f102_countera.o), (16 bytes).
+	Removing .text.COUNTA_Data_Update(Obj/FWlib_apt32f102_countera.o), (20 bytes).
+	Removing .text.COUNTA_IO_Init(Obj/FWlib_apt32f102_countera.o), (80 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_countera.o), (7799 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_countera.o), (381 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_countera.o), (336 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_countera.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_countera.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_countera.o), (350 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_countera.o), (3422 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_countera.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_countera.o), (224 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_countera.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_et.o), (0 bytes).
+	Removing .text.ET_DeInit(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_ENABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_DISABLE(Obj/FWlib_apt32f102_et.o), (16 bytes).
+	Removing .text.ET_SWTRG_CMD(Obj/FWlib_apt32f102_et.o), (28 bytes).
+	Removing .text.ET_CH0_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH0_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH1_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH1_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CH2_SRCSEL(Obj/FWlib_apt32f102_et.o), (108 bytes).
+	Removing .text.ET_CH2_CONTROL(Obj/FWlib_apt32f102_et.o), (40 bytes).
+	Removing .text.ET_CHx_CONTROL(Obj/FWlib_apt32f102_et.o), (276 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_et.o), (7781 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_et.o), (410 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_et.o), (1318 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_et.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_et.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_et.o), (463 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_et.o), (3167 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_et.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_et.o), (204 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_et.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_bt.o), (0 bytes).
+	Removing .text.BT_IO_Init(Obj/FWlib_apt32f102_bt.o), (332 bytes).
+	Removing .text.BT_Stop(Obj/FWlib_apt32f102_bt.o), (8 bytes).
+	Removing .text.BT_Stop_High(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_Stop_Low(Obj/FWlib_apt32f102_bt.o), (14 bytes).
+	Removing .text.BT_CNT_Write(Obj/FWlib_apt32f102_bt.o), (4 bytes).
+	Removing .text.BT_PRDR_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CMP_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_CNT_Read(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT_Trigger_Configure(Obj/FWlib_apt32f102_bt.o), (10 bytes).
+	Removing .text.BT_Soft_Tigger(Obj/FWlib_apt32f102_bt.o), (6 bytes).
+	Removing .text.BT0_INT_ENABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT0_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text.BT1_INT_DISABLE(Obj/FWlib_apt32f102_bt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_gpt.o), (0 bytes).
+	Removing .text.GPT_DeInit(Obj/FWlib_apt32f102_gpt.o), (96 bytes).
+	Removing .text.GPT_Capture_Config(Obj/FWlib_apt32f102_gpt.o), (68 bytes).
+	Removing .text.GPT_SyncSet_Configure(Obj/FWlib_apt32f102_gpt.o), (36 bytes).
+	Removing .text.GPT_Trigger_Configure(Obj/FWlib_apt32f102_gpt.o), (44 bytes).
+	Removing .text.GPT_EVTRG_Configure(Obj/FWlib_apt32f102_gpt.o), (92 bytes).
+	Removing .text.GPT_OneceForce_Out(Obj/FWlib_apt32f102_gpt.o), (32 bytes).
+	Removing .text.GPT_Force_Out(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CmpLoad_Configure(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Debug_Mode(Obj/FWlib_apt32f102_gpt.o), (24 bytes).
+	Removing .text.GPT_Stop(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Soft_Reset(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_Cap_Rearm(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_Mode_CMD(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Write(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_REARM_Read(Obj/FWlib_apt32f102_gpt.o), (20 bytes).
+	Removing .text.GPT_PRDR_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPA_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CMPB_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_CNT_Read(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_ENABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text.GPT_INT_DISABLE(Obj/FWlib_apt32f102_gpt.o), (16 bytes).
+	Removing .text(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_sio.o), (0 bytes).
+	Removing .text.SIO_DeInit(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_IO_Init(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_TX_Init(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_TX_Configure(Obj/FWlib_apt32f102_sio.o), (80 bytes).
+	Removing .text.SIO_TXBUF_Set(Obj/FWlib_apt32f102_sio.o), (156 bytes).
+	Removing .text.SIO_RX_Init(Obj/FWlib_apt32f102_sio.o), (20 bytes).
+	Removing .text.SIO_RX_Configure0(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .text.SIO_RX_Configure1(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text.SIO_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_sio.o), (28 bytes).
+	Removing .text.SIO_INT_ENABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .text.SIO_INT_DISABLE(Obj/FWlib_apt32f102_sio.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_sio.o), (8669 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_sio.o), (405 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_sio.o), (1996 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_sio.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_sio.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_sio.o), (391 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_sio.o), (4135 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_sio.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_sio.o), (260 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_sio.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_spi.o), (0 bytes).
+	Removing .text.SPI_DeInit(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_NSS_IO_Init(Obj/FWlib_apt32f102_spi.o), (52 bytes).
+	Removing .text.SPI_Master_Init(Obj/FWlib_apt32f102_spi.o), (176 bytes).
+	Removing .text.SPI_Slave_Init(Obj/FWlib_apt32f102_spi.o), (156 bytes).
+	Removing .text.SPI_WRITE_BYTE(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text.SPI_READ_BYTE(Obj/FWlib_apt32f102_spi.o), (100 bytes).
+	Removing .text.SPI_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_spi.o), (28 bytes).
+	Removing .text.SPI_Int_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Int_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Enable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .text.SPI_Wakeup_Disable(Obj/FWlib_apt32f102_spi.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_spi.o), (7854 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_spi.o), (402 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_spi.o), (641 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_spi.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_spi.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_spi.o), (407 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_spi.o), (3538 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_spi.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_spi.o), (240 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_spi.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_uart.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_uart.o), (2 bytes).
+	Removing .text.UART0_Int_Enable(Obj/FWlib_apt32f102_uart.o), (28 bytes).
+	Removing .text.UART0_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_Int_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART0_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART1_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Enable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UART2_WakeUp_Disable(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInit(Obj/FWlib_apt32f102_uart.o), (16 bytes).
+	Removing .text.UARTInitRxIntEn(Obj/FWlib_apt32f102_uart.o), (10 bytes).
+	Removing .text.UARTClose(Obj/FWlib_apt32f102_uart.o), (6 bytes).
+	Removing .text.UARTTxByte(Obj/FWlib_apt32f102_uart.o), (14 bytes).
+	Removing .text.UARTTTransmit_data_set(Obj/FWlib_apt32f102_uart.o), (44 bytes).
+	Removing .text.UARTTransmit_INT_Send(Obj/FWlib_apt32f102_uart.o), (72 bytes).
+	Removing .text.UARTRxByte(Obj/FWlib_apt32f102_uart.o), (22 bytes).
+	Removing .text.UART_ReturnRxByte(Obj/FWlib_apt32f102_uart.o), (24 bytes).
+	Removing .text.UARTReceive(Obj/FWlib_apt32f102_uart.o), (56 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_uart.o), (36 bytes).
+	Removing .text(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_i2c.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_i2c.o), (6 bytes).
+	Removing .text.I2C_DeInit(Obj/FWlib_apt32f102_i2c.o), (24 bytes).
+	Removing .text.I2C_Master_CONFIG(Obj/FWlib_apt32f102_i2c.o), (320 bytes).
+	Removing .text.I2C_Slave_CONFIG(Obj/FWlib_apt32f102_i2c.o), (332 bytes).
+	Removing .text.I2C_SDA_TSETUP_THOLD_CONFIG(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_FIFO_TriggerData(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Stop(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Enable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Disable(Obj/FWlib_apt32f102_i2c.o), (28 bytes).
+	Removing .text.I2C_Abort_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Abort_Status(Obj/FWlib_apt32f102_i2c.o), (20 bytes).
+	Removing .text.I2C_SDA_Recover_EN(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_SDA_Recover_DIS(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Enable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_Int_Disable(Obj/FWlib_apt32f102_i2c.o), (16 bytes).
+	Removing .text.I2C_WRITE_Byte(Obj/FWlib_apt32f102_i2c.o), (112 bytes).
+	Removing .text.I2C_WRITE_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_READ_Byte(Obj/FWlib_apt32f102_i2c.o), (100 bytes).
+	Removing .text.I2C_READ_nByte(Obj/FWlib_apt32f102_i2c.o), (160 bytes).
+	Removing .text.I2C_Slave_Receive(Obj/FWlib_apt32f102_i2c.o), (384 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_i2c.o), (8426 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_i2c.o), (576 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_i2c.o), (1150 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_i2c.o), (184 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_i2c.o), (168 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_i2c.o), (847 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_i2c.o), (3654 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_i2c.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_i2c.o), (452 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_i2c.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_i2c.o), (70 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ept.o), (0 bytes).
+	Removing .text.EPT_Software_Prg(Obj/FWlib_apt32f102_ept.o), (32 bytes).
+	Removing .text.EPT_Start(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_IO_SET(Obj/FWlib_apt32f102_ept.o), (568 bytes).
+	Removing .text.EPT_PWM_Config(Obj/FWlib_apt32f102_ept.o), (56 bytes).
+	Removing .text.EPT_CG_gate_Config(Obj/FWlib_apt32f102_ept.o), (116 bytes).
+	Removing .text.EPT_Capture_Config(Obj/FWlib_apt32f102_ept.o), (104 bytes).
+	Removing .text.EPT_SYNCR_Config(Obj/FWlib_apt32f102_ept.o), (52 bytes).
+	Removing .text.EPT_CPCR_Config(Obj/FWlib_apt32f102_ept.o), (80 bytes).
+	Removing .text.EPT_DBCR_Config(Obj/FWlib_apt32f102_ept.o), (96 bytes).
+	Removing .text.EPT_DB_CLK_Config(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PWMX_Output_Control(Obj/FWlib_apt32f102_ept.o), (216 bytes).
+	Removing .text.EPT_Tevent_Selecte(Obj/FWlib_apt32f102_ept.o), (16 bytes).
+	Removing .text.EPT_PHSEN_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SYNCR_RearmClr(Obj/FWlib_apt32f102_ept.o), (40 bytes).
+	Removing .text.EPT_Caputure_Rearm(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Globle_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_Globle_SwLoad_CMD(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_PRDR_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_CMP_EventLoad_Config(Obj/FWlib_apt32f102_ept.o), (68 bytes).
+	Removing .text.EPT_AQCR_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_DB_Eventload_Config(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_TRGSRCX_Config(Obj/FWlib_apt32f102_ept.o), (136 bytes).
+	Removing .text.EPT_TRGSRCX_SWFTRG(Obj/FWlib_apt32f102_ept.o), (72 bytes).
+	Removing .text.EPT_Int_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Int_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Enable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_EMInt_Disable(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_Vector_Int_Enable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_Vector_Int_Disable(Obj/FWlib_apt32f102_ept.o), (12 bytes).
+	Removing .text.EPT_EPX_Config(Obj/FWlib_apt32f102_ept.o), (176 bytes).
+	Removing .text.EPT_EPIX_POL_Config(Obj/FWlib_apt32f102_ept.o), (24 bytes).
+	Removing .text.EPT_LKCR_TRG_Config(Obj/FWlib_apt32f102_ept.o), (120 bytes).
+	Removing .text.EPT_SHLOCK_OUTPUT_Config(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text.EPT_SLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_HLock_CLR(Obj/FWlib_apt32f102_ept.o), (20 bytes).
+	Removing .text.EPT_SW_Set_lock(Obj/FWlib_apt32f102_ept.o), (28 bytes).
+	Removing .text(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_rtc.o), (0 bytes).
+	Removing .text.RTC_RST_VALUE(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_ALM_IO_SET(Obj/FWlib_apt32f102_rtc.o), (64 bytes).
+	Removing .text.RTCCLK_CONFIG(Obj/FWlib_apt32f102_rtc.o), (72 bytes).
+	Removing .text.RTC_Function_Config(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Start(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_Stop(Obj/FWlib_apt32f102_rtc.o), (44 bytes).
+	Removing .text.RTC_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (68 bytes).
+	Removing .text.RTC_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (84 bytes).
+	Removing .text.RTC_Alarm_TIMR_DATR_SET(Obj/FWlib_apt32f102_rtc.o), (172 bytes).
+	Removing .text.RTC_AlarmA_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_AlarmB_TIMR_DATR_Read(Obj/FWlib_apt32f102_rtc.o), (60 bytes).
+	Removing .text.RTC_TRGSRC0_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC1_Config(Obj/FWlib_apt32f102_rtc.o), (40 bytes).
+	Removing .text.RTC_TRGSRC0_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_TRGSRC1_SWFTRG(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (20 bytes).
+	Removing .text.RTC_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_Vector_Int_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Enable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .text.RTC_WakeUp_Disable(Obj/FWlib_apt32f102_rtc.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_rtc.o), (8815 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_rtc.o), (494 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_rtc.o), (535 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_rtc.o), (192 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_rtc.o), (176 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_rtc.o), (606 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_rtc.o), (4854 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_rtc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_rtc.o), (428 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_rtc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_rtc.o), (15 bytes).
+	Removing .text(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_adc.o), (0 bytes).
+	Removing .text.ADC12_RESET_VALUE(Obj/FWlib_apt32f102_adc.o), (100 bytes).
+	Removing .text.ADC12_Control(Obj/FWlib_apt32f102_adc.o), (16 bytes).
+	Removing .text.ADC12_CMD.part.0(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConfigInterrupt_CMD(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_Read_IntEnStatus(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_CLK_CMD(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC12_Software_Reset(Obj/FWlib_apt32f102_adc.o), (10 bytes).
+	Removing .text.ADC12_CMD(Obj/FWlib_apt32f102_adc.o), (40 bytes).
+	Removing .text.ADC12_ready_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_EOC_wait(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_SEQEND_wait(Obj/FWlib_apt32f102_adc.o), (24 bytes).
+	Removing .text.ADC12_DATA_OUPUT(Obj/FWlib_apt32f102_adc.o), (20 bytes).
+	Removing .text.ADC12_Configure_Mode(Obj/FWlib_apt32f102_adc.o), (124 bytes).
+	Removing .text.ADC12_Configure_VREF_Selecte(Obj/FWlib_apt32f102_adc.o), (408 bytes).
+	Removing .text.ADC12_CompareFunction_set(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text.ADC12_ConversionChannel_Config(Obj/FWlib_apt32f102_adc.o), (384 bytes).
+	Removing .text.ADC12_Compare_statue(Obj/FWlib_apt32f102_adc.o), (44 bytes).
+	Removing .text.ADC_Int_Enable(Obj/FWlib_apt32f102_adc.o), (28 bytes).
+	Removing .text.ADC_Int_Disable(Obj/FWlib_apt32f102_adc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_adc.o), (8666 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_adc.o), (663 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_adc.o), (936 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_adc.o), (176 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_adc.o), (160 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_adc.o), (684 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_adc.o), (4962 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_adc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_adc.o), (400 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_adc.o), (32 bytes).
+	Removing .text(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_ifc.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_ifc.o), (1 bytes).
+	Removing .text.ChipErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.PageErase(Obj/FWlib_apt32f102_ifc.o), (36 bytes).
+	Removing .text.Page_ProgramData_int(Obj/FWlib_apt32f102_ifc.o), (156 bytes).
+	Removing .text.Page_ProgramData(Obj/FWlib_apt32f102_ifc.o), (160 bytes).
+	Removing .text.Page_ProgramData_U32(Obj/FWlib_apt32f102_ifc.o), (124 bytes).
+	Removing .text.ReadDataArry(Obj/FWlib_apt32f102_ifc.o), (46 bytes).
+	Removing .text.ReadDataArry_U8(Obj/FWlib_apt32f102_ifc.o), (42 bytes).
+	Removing .text.ReadDataArry_U32(Obj/FWlib_apt32f102_ifc.o), (22 bytes).
+	Removing .text.IFC_interrupt_CMD(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Enable(Obj/FWlib_apt32f102_ifc.o), (28 bytes).
+	Removing .text.IFC_Int_Disable(Obj/FWlib_apt32f102_ifc.o), (12 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_ifc.o), (9889 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_ifc.o), (525 bytes).
+	Removing .debug_loc(Obj/FWlib_apt32f102_ifc.o), (403 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_ifc.o), (112 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_ifc.o), (96 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_ifc.o), (470 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_ifc.o), (7611 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_ifc.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_ifc.o), (268 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_ifc.o), (32 bytes).
+	Removing COMMON(Obj/FWlib_apt32f102_ifc.o), (4 bytes).
+	Removing .text(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .data(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .bss(Obj/FWlib_apt32f102_coret.o), (0 bytes).
+	Removing .text.CORET_DeInit(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Enable(Obj/FWlib_apt32f102_coret.o), (24 bytes).
+	Removing .text.CORET_Int_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Enable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_WakeUp_Disable(Obj/FWlib_apt32f102_coret.o), (12 bytes).
+	Removing .text.CORET_start(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_stop(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_EX(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_CLKSOURCE_IN(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Enable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_TICKINT_Disable(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .text.CORET_reload(Obj/FWlib_apt32f102_coret.o), (16 bytes).
+	Removing .debug_info(Obj/FWlib_apt32f102_coret.o), (7132 bytes).
+	Removing .debug_abbrev(Obj/FWlib_apt32f102_coret.o), (295 bytes).
+	Removing .debug_aranges(Obj/FWlib_apt32f102_coret.o), (120 bytes).
+	Removing .debug_ranges(Obj/FWlib_apt32f102_coret.o), (104 bytes).
+	Removing .debug_line(Obj/FWlib_apt32f102_coret.o), (323 bytes).
+	Removing .debug_str(Obj/FWlib_apt32f102_coret.o), (2860 bytes).
+	Removing .comment(Obj/FWlib_apt32f102_coret.o), (67 bytes).
+	Removing .debug_frame(Obj/FWlib_apt32f102_coret.o), (208 bytes).
+	Removing .csky.attributes(Obj/FWlib_apt32f102_coret.o), (32 bytes).
+	Removing .text(Obj/main.o), (0 bytes).
+	Removing .data(Obj/main.o), (0 bytes).
+	Removing .bss(Obj/main.o), (7 bytes).
+	Removing .text(Obj/mcu_initial.o), (0 bytes).
+	Removing .data(Obj/mcu_initial.o), (0 bytes).
+	Removing .bss(Obj/mcu_initial.o), (0 bytes).
+	Removing .text.GPIO_CONFIG(Obj/mcu_initial.o), (2 bytes).
+	Removing .text.EPT0_CONFIG(Obj/mcu_initial.o), (108 bytes).
+	Removing .text.GPT0_CONFIG(Obj/mcu_initial.o), (2 bytes).
+	Removing .text.UART0_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART1_CONFIG(Obj/mcu_initial.o), (52 bytes).
+	Removing .text.UART2_CONFIG(Obj/mcu_initial.o), (36 bytes).
+	Removing .text.ADC12_CONFIG(Obj/mcu_initial.o), (114 bytes).
+	Removing .text.SIO_CONFIG(Obj/mcu_initial.o), (64 bytes).
+	Removing .text(Obj/mcu_interrupt.o), (0 bytes).
+	Removing .data(Obj/mcu_interrupt.o), (1 bytes).
+	Removing .text.SystemDesPtr(Obj/mcu_interrupt.o), (2 bytes).
+	Removing .text(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102.o), (0 bytes).
+	Removing .text.__modsi3(Obj/drivers_apt32f102.o), (36 bytes).
+	Removing .text(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .data(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .bss(Obj/drivers_apt32f102_ck801.o), (0 bytes).
+	Removing .text.CK801_Init(Obj/drivers_apt32f102_ck801.o), (108 bytes).
+	Removing .text.force_interrupt(Obj/drivers_apt32f102_ck801.o), (24 bytes).
+	Removing .text(Obj/SYSTEM_uart.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_uart.o), (4 bytes).
+	Removing .text.UART0_TASK(Obj/SYSTEM_uart.o), (60 bytes).
+	Removing .text.UART2_RecvINT_Processing(Obj/SYSTEM_uart.o), (52 bytes).
+	Removing .text.UART0_RecvINT_Processing(Obj/SYSTEM_uart.o), (8 bytes).
+	Removing .text.UART2_TASK(Obj/SYSTEM_uart.o), (96 bytes).
+	Removing .text.UART_Waiting_For_Send(Obj/SYSTEM_uart.o), (32 bytes).
+	Removing .text.MCU485_SendData(Obj/SYSTEM_uart.o), (144 bytes).
+	Removing .text.Clear_SendFlag(Obj/SYSTEM_uart.o), (16 bytes).
+	Removing .text.BUS485_Jump_Boot(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Get_BUS485_Send_State(Obj/SYSTEM_uart.o), (28 bytes).
+	Removing .text.Dbg_Print(Obj/SYSTEM_uart.o), (12 bytes).
+	Removing .text.Dbg_Print_Buff(Obj/SYSTEM_uart.o), (2 bytes).
+	Removing .text(Obj/SYSTEM_dip_switch.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_dip_switch.o), (0 bytes).
+	Removing .text(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .bss(Obj/SYSTEM_control_rly.o), (0 bytes).
+	Removing .text.CheckSum2(Obj/SYSTEM_control_rly.o), (24 bytes).
+	Removing .text.BLV_WINDOUT_CMD_SET_Processing(Obj/SYSTEM_control_rly.o), (160 bytes).
+	Removing .text.set_vol(Obj/SYSTEM_control_rly.o), (124 bytes).
+	Removing .text(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .data(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .bss(Obj/SYSTEM_eeprom.o), (0 bytes).
+	Removing .text.EEPROM_CheckSum(Obj/SYSTEM_eeprom.o), (22 bytes).
+	Removing .text.EEPROM_ReadPara(Obj/SYSTEM_eeprom.o), (428 bytes).
+	Removing .text.EEPROM_ValidateWrite(Obj/SYSTEM_eeprom.o), (116 bytes).
+	Removing .text.EEPROM_WritePara(Obj/SYSTEM_eeprom.o), (164 bytes).
+	Removing .text.EEPROM_ReadMCUDevInfo(Obj/SYSTEM_eeprom.o), (112 bytes).
+	Removing .text.EEPROM_WriteMCUDevInfo(Obj/SYSTEM_eeprom.o), (64 bytes).
+	Removing .text.EEPROM_Default_MCUDevInfo(Obj/SYSTEM_eeprom.o), (52 bytes).
+	Removing .text.EEPROM_Validate_MCUDevInfo(Obj/SYSTEM_eeprom.o), (88 bytes).
+	Removing .text.EEPROM_Init(Obj/SYSTEM_eeprom.o), (64 bytes).
+	Removing .rodata.str1.1(Obj/SYSTEM_eeprom.o), (337 bytes).
+	Removing .debug_info(Obj/SYSTEM_eeprom.o), (9839 bytes).
+	Removing .debug_abbrev(Obj/SYSTEM_eeprom.o), (626 bytes).
+	Removing .debug_loc(Obj/SYSTEM_eeprom.o), (403 bytes).
+	Removing .debug_aranges(Obj/SYSTEM_eeprom.o), (96 bytes).
+	Removing .debug_ranges(Obj/SYSTEM_eeprom.o), (104 bytes).
+	Removing .debug_line(Obj/SYSTEM_eeprom.o), (806 bytes).
+	Removing .debug_str(Obj/SYSTEM_eeprom.o), (4683 bytes).
+	Removing .comment(Obj/SYSTEM_eeprom.o), (67 bytes).
+	Removing .debug_frame(Obj/SYSTEM_eeprom.o), (280 bytes).
+	Removing .csky.attributes(Obj/SYSTEM_eeprom.o), (32 bytes).
+	Removing COMMON(Obj/SYSTEM_eeprom.o), (37 bytes).
+	Removing .text(Obj/__rt_entry.o), (240 bytes).
+	Removing .data(Obj/__rt_entry.o), (0 bytes).
+	Removing .bss(Obj/__rt_entry.o), (0 bytes).
+	Removing .debug_line(Obj/__rt_entry.o), (131 bytes).
+	Removing .debug_info(Obj/__rt_entry.o), (125 bytes).
+	Removing .debug_abbrev(Obj/__rt_entry.o), (20 bytes).
+	Removing .debug_aranges(Obj/__rt_entry.o), (32 bytes).
+	Removing .csky.attributes(Obj/__rt_entry.o), (32 bytes).
+	Removing .text(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_tkey_c_1_17.o), (0 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD.part.0(FWlib_apt32f102_tkey_c_1_17.o), (16 bytes).
+	Removing .text.TK_DeInit(FWlib_apt32f102_tkey_c_1_17.o), (60 bytes).
+	Removing .text.tk_clk_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_con0_config(FWlib_apt32f102_tkey_c_1_17.o), (188 bytes).
+	Removing .text.tk_scan_config(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_ConfigInterrupt_CMD(FWlib_apt32f102_tkey_c_1_17.o), (32 bytes).
+	Removing .text.TK_IO_Enable(FWlib_apt32f102_tkey_c_1_17.o), (308 bytes).
+	Removing .text.lpt_init(FWlib_apt32f102_tkey_c_1_17.o), (76 bytes).
+	Removing .text.TK_setup_sleep(FWlib_apt32f102_tkey_c_1_17.o), (92 bytes).
+	Removing .text.TK_quit_sleep(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.TK_Baseline_prog(FWlib_apt32f102_tkey_c_1_17.o), (132 bytes).
+	Removing .text.get_key_seq(FWlib_apt32f102_tkey_c_1_17.o), (52 bytes).
+	Removing .text.CORET_CONFIG(FWlib_apt32f102_tkey_c_1_17.o), (56 bytes).
+	Removing .text.tk_chxval_seqxcon_clr(FWlib_apt32f102_tkey_c_1_17.o), (28 bytes).
+	Removing .text.tk_reserved_init(FWlib_apt32f102_tkey_c_1_17.o), (40 bytes).
+	Removing .text.tk_init(FWlib_apt32f102_tkey_c_1_17.o), (384 bytes).
+	Removing .text(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .bss(FWlib_apt32f102_clkcalib.o), (0 bytes).
+	Removing .data(pow.o), (0 bytes).
+	Removing .bss(pow.o), (0 bytes).
+	Removing .data(fabs.o), (0 bytes).
+	Removing .bss(fabs.o), (0 bytes).
+	Removing .data(scalbn.o), (0 bytes).
+	Removing .bss(scalbn.o), (0 bytes).
+	Removing .data(sqrt.o), (0 bytes).
+	Removing .bss(sqrt.o), (0 bytes).
+	Removing .data(_csky_case_uqi.o), (0 bytes).
+	Removing .bss(_csky_case_uqi.o), (0 bytes).
+	Removing .data(_fixunsdfsi.o), (0 bytes).
+	Removing .bss(_fixunsdfsi.o), (0 bytes).
+	Removing .data(_addsub_df.o), (0 bytes).
+	Removing .bss(_addsub_df.o), (0 bytes).
+	Removing .data(_mul_df.o), (0 bytes).
+	Removing .bss(_mul_df.o), (0 bytes).
+	Removing .data(_div_df.o), (0 bytes).
+	Removing .bss(_div_df.o), (0 bytes).
+	Removing .data(_gt_df.o), (0 bytes).
+	Removing .bss(_gt_df.o), (0 bytes).
+	Removing .data(_ge_df.o), (0 bytes).
+	Removing .bss(_ge_df.o), (0 bytes).
+	Removing .data(_le_df.o), (0 bytes).
+	Removing .bss(_le_df.o), (0 bytes).
+	Removing .data(_si_to_df.o), (0 bytes).
+	Removing .bss(_si_to_df.o), (0 bytes).
+	Removing .data(_df_to_si.o), (0 bytes).
+	Removing .bss(_df_to_si.o), (0 bytes).
+	Removing .text(_thenan_df.o), (0 bytes).
+	Removing .data(_thenan_df.o), (0 bytes).
+	Removing .bss(_thenan_df.o), (0 bytes).
+	Removing .data(_usi_to_df.o), (0 bytes).
+	Removing .bss(_usi_to_df.o), (0 bytes).
+	Removing .data(_muldi3.o), (0 bytes).
+	Removing .bss(_muldi3.o), (0 bytes).
+	Removing .data(_clzsi2.o), (0 bytes).
+	Removing .bss(_clzsi2.o), (0 bytes).
+	Removing .data(_pack_df.o), (0 bytes).
+	Removing .bss(_pack_df.o), (0 bytes).
+	Removing .data(_unpack_df.o), (0 bytes).
+	Removing .bss(_unpack_df.o), (0 bytes).
+	Removing .data(_fpcmp_parts_df.o), (0 bytes).
+	Removing .bss(_fpcmp_parts_df.o), (0 bytes).
+	Removing .text(_clz.o), (0 bytes).
+	Removing .data(_clz.o), (0 bytes).
+	Removing .bss(_clz.o), (0 bytes).
+	Removing .data(memset_fast.o), (0 bytes).
+	Removing .bss(memset_fast.o), (0 bytes).
+	Removing .data(memcpy_fast.o), (0 bytes).
+	Removing .bss(memcpy_fast.o), (0 bytes).
+	Removing .text(strncmp.o), (38 bytes).
+	Removing .data(strncmp.o), (0 bytes).
+	Removing .bss(strncmp.o), (0 bytes).
+	Removing .csky.attributes(strncmp.o), (32 bytes).
+
+633 unused seciton(s) (total 197032 bytes) removed from the image.
+
+======================================================================
+
+Image Symbol Table 
+
+	Local Symbols
+
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+	$d                                 0x000037d4               0  .text.BLV_VolOut_Ctrl
+	$d                                 0x000037e8               0  .text.BLV_RLY_Ctrl_Purpose
+	$t                                 0x000037e8               0  .text.BLV_RLY_Ctrl_Purpose
+	$d                                 0x0000385c               0  .text.BLV_RLY_Ctrl_Purpose
+	$d                                 0x00003864               0  .text.BLV_RLY_Task
+	$t                                 0x00003864               0  .text.BLV_RLY_Task
+	$d                                 0x000038b0               0  .text.BLV_RLY_Task
+	$d                                 0x000038b8               0  .text.BLV_A9RLY_CMD_SET_Processing
+	$t                                 0x000038b8               0  .text.BLV_A9RLY_CMD_SET_Processing
+	$d                                 0x0000394c               0  .text.BLV_A9RLY_CMD_SET_Processing
+	$d                                 0x00003954               0  .text.BLV_A9RLY_CMD_READ_Processing
+	$t                                 0x00003954               0  .text.BLV_A9RLY_CMD_READ_Processing
+	$d                                 0x000039c4               0  .text.BLV_A9RLY_CMD_READ_Processing
+	$d                                 0x000039cc               0  .text.BLV_RLY_RS485_Pro
+	$t                                 0x000039cc               0  .text.BLV_RLY_RS485_Pro
+	$d                                 0x00003a64               0  .text.BLV_RLY_RS485_Pro
+	$d                                 0x00003a7c               0  .text.TK_Sampling_prog
+	$t                                 0x00003a7c               0  .text.TK_Sampling_prog
+	$d                                 0x00003ac4               0  .text.TK_Sampling_prog
+	$d                                 0x00003ad4               0  .text.TKEYIntHandler
+	$t                                 0x00003ad4               0  .text.TKEYIntHandler
+	$d                                 0x00003b50               0  .text.TKEYIntHandler
+	$d                                 0x00003b5c               0  .text.get_key_number
+	$t                                 0x00003b5c               0  .text.get_key_number
+	$d                                 0x00003b80               0  .text.get_key_number
+	$d                                 0x00003b84               0  .text.TK_Scan_Start
+	$t                                 0x00003b84               0  .text.TK_Scan_Start
+	$d                                 0x00003b9c               0  .text.TK_Scan_Start
+	$d                                 0x00003ba4               0  .text.TK_Keymap_prog
+	$t                                 0x00003ba4               0  .text.TK_Keymap_prog
+	$d                                 0x00003cec               0  .text.TK_Keymap_prog
+	$d                                 0x00003d24               0  .text.TK_overflow_predict
+	$t                                 0x00003d24               0  .text.TK_overflow_predict
+	$d                                 0x00003e0c               0  .text.TK_overflow_predict
+	$d                                 0x00003e40               0  .text.TK_Baseline_tracking
+	$t                                 0x00003e40               0  .text.TK_Baseline_tracking
+	$d                                 0x00003fe4               0  .text.TK_Baseline_tracking
+	$d                                 0x00004010               0  .text.TK_result_prog
+	$t                                 0x00004010               0  .text.TK_result_prog
+	$d                                 0x00004050               0  .text.TK_result_prog
+	$d                                 0x00004064               0  .text.CORETHandler
+	$t                                 0x00004064               0  .text.CORETHandler
+	$d                                 0x000040c4               0  .text.CORETHandler
+	$d                                 0x000040dc               0  .text.std_clk_calib
+	$t                                 0x000040dc               0  .text.std_clk_calib
+	$d                                 0x00004324               0  .text.std_clk_calib
+	bp                                 0x00004360      O       16  .rodata
+	dp_l                               0x00004370      O       16  .rodata
+	dp_h                               0x00004380      O       16  .rodata
+	NUM.6030                           0x2000009c      O        1  .bss
+	update_20ms.5936                   0x200000b8      O        4  .bss
+
+	Global Symbols
+
+	Symbol Name                        Value        Type   Size  Section
+	vector_table                       0x00000000               0  .text
+	__start                            0x0000010c               0  .text
+	__exit                             0x00000160               0  .text
+	__fail                             0x00000176               0  .text
+	DummyHandler                       0x00000184               0  .text
+	__GI_pow                           0x000001b4      F     2474  .text
+	pow                                0x000001b4      F     2474  .text
+	__GI_fabs                          0x00000b5e      F        6  .text
+	fabs                               0x00000b5e      F        6  .text
+	__GI_scalbn                        0x00000b64      F       32  .text
+	scalbn                             0x00000b64      F       32  .text
+	__GI_sqrt                          0x00000b84      F      376  .text
+	sqrt                               0x00000b84      F      376  .text
+	___gnu_csky_case_uqi               0x00000cfc      F       20  .text
+	__fixunsdfsi                       0x00000d10      F       56  .text
+	__adddf3                           0x0000101c      F       46  .text
+	__subdf3                           0x0000104c      F       54  .text
+	__muldf3                           0x00001084      F      564  .text
+	__divdf3                           0x000012b8      F      340  .text
+	__gtdf2                            0x0000140c      F       60  .text
+	__gedf2                            0x00001448      F       60  .text
+	__ledf2                            0x00001484      F       58  .text
+	__floatsidf                        0x000014c0      F      112  .text
+	__fixdfsi                          0x00001530      F      112  .text
+	__floatunsidf                      0x000015a0      F       84  .text
+	__muldi3                           0x000015f4      F       68  .text
+	__clzsi2                           0x00001638      F       64  .text
+	__pack_d                           0x00001678      F      412  .text
+	__unpack_d                         0x00001814      F      196  .text
+	__fpcmp_parts_d                    0x000018d8      F      140  .text
+	__memset_fast                      0x00001964    w F      136  .text
+	memset                             0x00001964    w F      136  .text
+	__memcpy_fast                      0x000019ec    w F      100  .text
+	memcpy                             0x000019ec    w F      100  .text
+	__main                             0x00001a50      F       56  .text.__main
+	SYSCON_RST_VALUE                   0x00001afc      F       76  .text.SYSCON_RST_VALUE
+	SYSCON_General_CMD                 0x00001b48      F       48  .text.SYSCON_General_CMD
+	SystemCLK_HCLKDIV_PCLKDIV_Config   0x00001b78      F      136  .text.SystemCLK_HCLKDIV_PCLKDIV_Config
+	SYSCON_HFOSC_SELECTE               0x00001c00      F       40  .text.SYSCON_HFOSC_SELECTE
+	SYSCON_WDT_CMD                     0x00001c28      F       60  .text.SYSCON_WDT_CMD
+	SYSCON_IWDCNT_Reload               0x00001c64      F       20  .text.SYSCON_IWDCNT_Reload
+	SYSCON_IWDCNT_Config               0x00001c78      F       24  .text.SYSCON_IWDCNT_Config
+	SYSCON_LVD_Config                  0x00001c90      F       32  .text.SYSCON_LVD_Config
+	LVD_Int_Enable                     0x00001cb0      F       28  .text.LVD_Int_Enable
+	IWDT_Int_Enable                    0x00001ccc      F       28  .text.IWDT_Int_Enable
+	EXTI_trigger_CMD                   0x00001ce8      F       64  .text.EXTI_trigger_CMD
+	EXTI_interrupt_CMD                 0x00001d28      F       52  .text.EXTI_interrupt_CMD
+	GPIO_EXTI_interrupt                0x00001d5c      F        4  .text.GPIO_EXTI_interrupt
+	EXI4_Int_Enable                    0x00001d60      F       16  .text.EXI4_Int_Enable
+	SYSCON_Int_Enable                  0x00001d70      F       12  .text.SYSCON_Int_Enable
+	SYSCON_Int_Disable                 0x00001d7c      F       12  .text.SYSCON_Int_Disable
+	SYSCON_INT_Priority                0x00001d88      F       36  .text.SYSCON_INT_Priority
+	Set_INT_Priority                   0x00001dac      F       48  .text.Set_INT_Priority
+	GPIO_Init                          0x00001ddc      F      224  .text.GPIO_Init
+	GPIO_PullHigh_Init                 0x00001ebc      F       20  .text.GPIO_PullHigh_Init
+	GPIO_DriveStrength_EN              0x00001ed0      F       14  .text.GPIO_DriveStrength_EN
+	GPIO_IntGroup_Set                  0x00001ee0      F      268  .text.GPIO_IntGroup_Set
+	GPIOA0_EXI_Init                    0x00001fec      F      252  .text.GPIOA0_EXI_Init
+	GPIO_Write_High                    0x000020e8      F        8  .text.GPIO_Write_High
+	GPIO_Write_Low                     0x000020f0      F        8  .text.GPIO_Write_Low
+	GPIO_Reverse                       0x000020f8      F       22  .text.GPIO_Reverse
+	GPIO_Read_Status                   0x0000210e      F       16  .text.GPIO_Read_Status
+	LPT_Soft_Reset                     0x00002120      F       20  .text.LPT_Soft_Reset
+	WWDT_CNT_Load                      0x00002134      F       16  .text.WWDT_CNT_Load
+	BT_DeInit                          0x00002144      F       28  .text.BT_DeInit
+	BT_Start                           0x00002160      F        8  .text.BT_Start
+	BT_Soft_Reset                      0x00002168      F       10  .text.BT_Soft_Reset
+	BT_Configure                       0x00002172      F       24  .text.BT_Configure
+	BT_ControlSet_Configure            0x0000218a      F       44  .text.BT_ControlSet_Configure
+	BT_Period_CMP_Write                0x000021b6      F        6  .text.BT_Period_CMP_Write
+	BT_ConfigInterrupt_CMD             0x000021bc      F       18  .text.BT_ConfigInterrupt_CMD
+	BT1_INT_ENABLE                     0x000021d0      F       16  .text.BT1_INT_ENABLE
+	GPT_IO_Init                        0x000021e0      F      160  .text.GPT_IO_Init
+	GPT_Configure                      0x00002280      F       20  .text.GPT_Configure
+	GPT_WaveCtrl_Configure             0x00002294      F       68  .text.GPT_WaveCtrl_Configure
+	GPT_WaveLoad_Configure             0x000022d8      F       20  .text.GPT_WaveLoad_Configure
+	GPT_WaveOut_Configure              0x000022ec      F      180  .text.GPT_WaveOut_Configure
+	GPT_Start                          0x000023a0      F       16  .text.GPT_Start
+	GPT_Period_CMP_Write               0x000023b0      F       16  .text.GPT_Period_CMP_Write
+	GPT_ConfigInterrupt_CMD            0x000023c0      F       28  .text.GPT_ConfigInterrupt_CMD
+	UART0_DeInit                       0x000023dc      F       24  .text.UART0_DeInit
+	UART1_DeInit                       0x000023f4      F       24  .text.UART1_DeInit
+	UART2_DeInit                       0x0000240c      F       24  .text.UART2_DeInit
+	UART1_Int_Enable                   0x00002424      F       28  .text.UART1_Int_Enable
+	UART2_Int_Enable                   0x00002440      F       28  .text.UART2_Int_Enable
+	UART_IO_Init                       0x0000245c      F      236  .text.UART_IO_Init
+	UARTInitRxTxIntEn                  0x00002548      F       16  .text.UARTInitRxTxIntEn
+	UARTTransmit                       0x00002558      F       30  .text.UARTTransmit
+	EPT_Stop                           0x00002578      F       40  .text.EPT_Stop
+	main                               0x000025a0      F       36  .text.startup.main
+	delay_nms                          0x000025c4      F       44  .text.delay_nms
+	delay_nus                          0x000025f0      F       34  .text.delay_nus
+	BT_CONFIG                          0x00002614      F       96  .text.BT_CONFIG
+	SYSCON_CONFIG                      0x00002674      F       98  .text.SYSCON_CONFIG
+	APT32F102_init                     0x000026d8      F       76  .text.APT32F102_init
+	SYSCONIntHandler                   0x00002724      F      240  .text.SYSCONIntHandler
+	IFCIntHandler                      0x00002814      F      104  .text.IFCIntHandler
+	ADCIntHandler                      0x0000287c      F      104  .text.ADCIntHandler
+	EPT0IntHandler                     0x000028e4      F      428  .text.EPT0IntHandler
+	WWDTHandler                        0x00002a90      F       52  .text.WWDTHandler
+	GPT0IntHandler                     0x00002ac4      F      128  .text.GPT0IntHandler
+	RTCIntHandler                      0x00002b44      F      112  .text.RTCIntHandler
+	UART0IntHandler                    0x00002bb4      F       60  .text.UART0IntHandler
+	UART1IntHandler                    0x00002bf0      F      148  .text.UART1IntHandler
+	UART2IntHandler                    0x00002c84      F       76  .text.UART2IntHandler
+	SPI0IntHandler                     0x00002cd0      F      232  .text.SPI0IntHandler
+	SIO0IntHandler                     0x00002db8      F       84  .text.SIO0IntHandler
+	EXI0IntHandler                     0x00002e0c      F       48  .text.EXI0IntHandler
+	EXI1IntHandler                     0x00002e3c      F       48  .text.EXI1IntHandler
+	EXI2to3IntHandler                  0x00002e6c      F       72  .text.EXI2to3IntHandler
+	EXI4to9IntHandler                  0x00002eb4      F       32  .text.EXI4to9IntHandler
+	EXI10to15IntHandler                0x00002ed4      F      108  .text.EXI10to15IntHandler
+	LPTIntHandler                      0x00002f40      F       52  .text.LPTIntHandler
+	BT0IntHandler                      0x00002f74      F       76  .text.BT0IntHandler
+	BT1IntHandler                      0x00002fc0      F      112  .text.BT1IntHandler
+	PriviledgeVioHandler               0x00003030      F        2  .text.PriviledgeVioHandler
+	PendTrapHandler                    0x00003032      F        8  .text.PendTrapHandler
+	Trap3Handler                       0x0000303a      F        8  .text.Trap3Handler
+	Trap2Handler                       0x00003042      F        8  .text.Trap2Handler
+	Trap1Handler                       0x0000304a      F        8  .text.Trap1Handler
+	Trap0Handler                       0x00003052      F        8  .text.Trap0Handler
+	UnrecExecpHandler                  0x0000305a      F        8  .text.UnrecExecpHandler
+	BreakPointHandler                  0x00003062      F        8  .text.BreakPointHandler
+	AccessErrHandler                   0x0000306a      F        8  .text.AccessErrHandler
+	IllegalInstrHandler                0x00003072      F        8  .text.IllegalInstrHandler
+	MisalignedHandler                  0x0000307a      F        8  .text.MisalignedHandler
+	CNTAIntHandler                     0x00003082      F        8  .text.CNTAIntHandler
+	I2CIntHandler                      0x0000308a      F        8  .text.I2CIntHandler
+	__divsi3                           0x00003094      F       36  .text.__divsi3
+	__udivsi3                          0x000030b8      F       36  .text.__udivsi3
+	__umodsi3                          0x000030dc      F       36  .text.__umodsi3
+	CK_CPU_EnAllNormalIrq              0x00003100      F        6  .text.CK_CPU_EnAllNormalIrq
+	CK_CPU_DisAllNormalIrq             0x00003106      F        6  .text.CK_CPU_DisAllNormalIrq
+	UARTx_Init                         0x0000310c      F      288  .text.UARTx_Init
+	UART1_RecvINT_Processing           0x0000322c      F       52  .text.UART1_RecvINT_Processing
+	UART1_TASK                         0x00003260      F       96  .text.UART1_TASK
+	BUS485_Send                        0x000032c0      F      196  .text.BUS485_Send
+	MultSend_Task                      0x00003384      F      100  .text.MultSend_Task
+	Set_GroupSend                      0x000033e8      F       92  .text.Set_GroupSend
+	BUS485Send_Task                    0x00003444      F       44  .text.BUS485Send_Task
+	BusIdle_Task                       0x00003470      F       60  .text.BusIdle_Task
+	BusBusy_Task                       0x000034ac      F       84  .text.BusBusy_Task
+	Dbg_Println                        0x00003500      F       12  .text.Dbg_Println
+	DIP_GetSwitchState                 0x0000350c      F       52  .text.DIP_GetSwitchState
+	DIP_Switch_Init                    0x00003540      F      140  .text.DIP_Switch_Init
+	DIP_ScanTask                       0x000035cc      F      140  .text.DIP_ScanTask
+	Relay_Init                         0x00003658      F      196  .text.Relay_Init
+	CheckSum                           0x00003724      F       22  .text.CheckSum
+	Change_OUTV                        0x0000373c      F       28  .text.Change_OUTV
+	BLV_VolOut_Ctrl                    0x00003758      F      144  .text.BLV_VolOut_Ctrl
+	BLV_RLY_Ctrl_Purpose               0x000037e8      F      124  .text.BLV_RLY_Ctrl_Purpose
+	BLV_RLY_Task                       0x00003864      F       84  .text.BLV_RLY_Task
+	BLV_A9RLY_CMD_SET_Processing       0x000038b8      F      156  .text.BLV_A9RLY_CMD_SET_Processing
+	BLV_A9RLY_CMD_READ_Processing      0x00003954      F      120  .text.BLV_A9RLY_CMD_READ_Processing
+	BLV_RLY_RS485_Pro                  0x000039cc      F      176  .text.BLV_RLY_RS485_Pro
+	TK_Sampling_prog                   0x00003a7c      F       88  .text.TK_Sampling_prog
+	TKEYIntHandler                     0x00003ad4      F      136  .text.TKEYIntHandler
+	get_key_number                     0x00003b5c      F       40  .text.get_key_number
+	TK_Scan_Start                      0x00003b84      F       32  .text.TK_Scan_Start
+	TK_Keymap_prog                     0x00003ba4      F      384  .text.TK_Keymap_prog
+	TK_overflow_predict                0x00003d24      F      284  .text.TK_overflow_predict
+	TK_Baseline_tracking               0x00003e40      F      464  .text.TK_Baseline_tracking
+	TK_result_prog                     0x00004010      F       84  .text.TK_result_prog
+	CORETHandler                       0x00004064      F      120  .text.CORETHandler
+	std_clk_calib                      0x000040dc      F      644  .text.std_clk_calib
+	__thenan_df                        0x00004390      O       20  .rodata
+	__clz_tab                          0x000043a4      O      256  .rodata
+	_end_rodata                        0x00004560               0  .rodata
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+	bsae_over_f                        0x20000414      O        1  .bss
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+	sampling_data1                     0x2000044c      O       34  .bss
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+	base_update_f                      0x20000497      O        1  .bss
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+	time_cnt                           0x200004ac      O        4  .bss
+	lpt_scan_pend_cnt                  0x200004b0      O        2  .bss
+	TK_track_cnt                       0x200004b2      O        1  .bss
+	Key_Map                            0x200004b4      O        4  .bss
+	baseline_data1                     0x200004b8      O       34  .bss
+	TK_Postive_build0                  0x200004da      O       17  .bss
+	sampling_data2                     0x200004ec      O       34  .bss
+	offset_data1                       0x2000050e      O       34  .bss
+	TK_ovrdect_cnt                     0x20000530      O        1  .bss
+	Press_debounce2                    0x20000531      O       17  .bss
+	TK_Negtive_build1                  0x20000542      O       17  .bss
+	tk_num                             0x20000553      O        1  .bss
+	TK_Negtive_build0                  0x20000554      O       17  .bss
+	Press_debounce1                    0x20000565      O       17  .bss
+	Release_debounce2                  0x20000576      O       17  .bss
+	r_Key_Map_Temp                     0x20000588      O        4  .bss
+	tk_seque                           0x2000058c      O       17  .bss
+	scan_step                          0x2000059d      O        1  .bss
+	baseline_data2                     0x2000059e      O       34  .bss
+	tk_sampling_max                    0x200005c0      O       34  .bss
+	offset_data0_abs                   0x200005e2      O       34  .bss
+	offset_data2                       0x20000604      O       34  .bss
+	sampling_data0                     0x20000626      O       34  .bss
+	_ebss                              0x20000648               0  .bss
+	_end                               0x20000648               0  .bss
+	end                                0x20000648               0  .bss
+	__kernel_stack                     0x20000ff8               0  .text
+
+	(w:Weak    d:Deubg    F:Function    f:File name    O:Zero)
+
+
+======================================================================
+
+Memory Map of the image
+
+    Image Entry point : 0x0000010c
+
+    Region ROM (Base: 0x00000000, Size: 0x00004560, Max: 0x00010000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x00000000   0x000001b4   Code   RO         16  .text          	Obj/arch_crt0.o
+    0x000001b4   0x000009aa   Code   RO       1003  .text          	pow.o
+    0x00000b5e   0x00000006   Code   RO       1011  .text          	fabs.o
+    0x00000b64   0x00000020   Code   RO       1017  .text          	scalbn.o
+    0x00000b84   0x00000178   Code   RO       1024  .text          	sqrt.o
+    0x00000cfc   0x00000014   Code   RO       1035  .text          	_csky_case_uqi.o
+    0x00000d10   0x00000038   Code   RO       1040  .text          	_fixunsdfsi.o
+    0x00000d48   0x0000033a   Code   RO       1047  .text          	_addsub_df.o
+    0x00001082   0x00000002   PAD
+    0x00001084   0x00000234   Code   RO       1054  .text          	_mul_df.o
+    0x000012b8   0x00000154   Code   RO       1061  .text          	_div_df.o
+    0x0000140c   0x0000003c   Code   RO       1068  .text          	_gt_df.o
+    0x00001448   0x0000003c   Code   RO       1075  .text          	_ge_df.o
+    0x00001484   0x0000003a   Code   RO       1082  .text          	_le_df.o
+    0x000014be   0x00000002   PAD
+    0x000014c0   0x00000070   Code   RO       1089  .text          	_si_to_df.o
+    0x00001530   0x00000070   Code   RO       1096  .text          	_df_to_si.o
+    0x000015a0   0x00000054   Code   RO       1110  .text          	_usi_to_df.o
+    0x000015f4   0x00000044   Code   RO       1117  .text          	_muldi3.o
+    0x00001638   0x00000040   Code   RO       1124  .text          	_clzsi2.o
+    0x00001678   0x0000019c   Code   RO       1130  .text          	_pack_df.o
+    0x00001814   0x000000c4   Code   RO       1137  .text          	_unpack_df.o
+    0x000018d8   0x0000008c   Code   RO       1144  .text          	_fpcmp_parts_df.o
+    0x00001964   0x00000088   Code   RO       1165  .text          	memset_fast.o
+    0x000019ec   0x00000064   Code   RO       1170  .text          	memcpy_fast.o
+    0x00001a50   0x00000038   Code   RO         28  .text.__main   	Obj/arch_mem_init.o
+    0x00001a88   0x00000074   Code   RO         61  .text.SYSCON_General_CMD.part.0	Obj/FWlib_apt32f102_syscon.o
+    0x00001afc   0x0000004c   Code   RO         62  .text.SYSCON_RST_VALUE	Obj/FWlib_apt32f102_syscon.o
+    0x00001b48   0x00000030   Code   RO         64  .text.SYSCON_General_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001b78   0x00000088   Code   RO         65  .text.SystemCLK_HCLKDIV_PCLKDIV_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c00   0x00000028   Code   RO         68  .text.SYSCON_HFOSC_SELECTE	Obj/FWlib_apt32f102_syscon.o
+    0x00001c28   0x0000003c   Code   RO         69  .text.SYSCON_WDT_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001c64   0x00000014   Code   RO         70  .text.SYSCON_IWDCNT_Reload	Obj/FWlib_apt32f102_syscon.o
+    0x00001c78   0x00000018   Code   RO         71  .text.SYSCON_IWDCNT_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001c90   0x00000020   Code   RO         72  .text.SYSCON_LVD_Config	Obj/FWlib_apt32f102_syscon.o
+    0x00001cb0   0x0000001c   Code   RO         73  .text.LVD_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ccc   0x0000001c   Code   RO         75  .text.IWDT_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001ce8   0x00000040   Code   RO         78  .text.EXTI_trigger_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d28   0x00000034   Code   RO         79  .text.EXTI_interrupt_CMD	Obj/FWlib_apt32f102_syscon.o
+    0x00001d5c   0x00000004   Code   RO         80  .text.GPIO_EXTI_interrupt	Obj/FWlib_apt32f102_syscon.o
+    0x00001d60   0x00000010   Code   RO         91  .text.EXI4_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d70   0x0000000c   Code   RO        103  .text.SYSCON_Int_Enable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d7c   0x0000000c   Code   RO        104  .text.SYSCON_Int_Disable	Obj/FWlib_apt32f102_syscon.o
+    0x00001d88   0x00000024   Code   RO        112  .text.SYSCON_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001dac   0x00000030   Code   RO        113  .text.Set_INT_Priority	Obj/FWlib_apt32f102_syscon.o
+    0x00001ddc   0x000000e0   Code   RO        132  .text.GPIO_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001ebc   0x00000014   Code   RO        135  .text.GPIO_PullHigh_Init	Obj/FWlib_apt32f102_gpio.o
+    0x00001ed0   0x0000000e   Code   RO        141  .text.GPIO_DriveStrength_EN	Obj/FWlib_apt32f102_gpio.o
+    0x00001ee0   0x0000010c   Code   RO        143  .text.GPIO_IntGroup_Set	Obj/FWlib_apt32f102_gpio.o
+    0x00001fec   0x000000fc   Code   RO        144  .text.GPIOA0_EXI_Init	Obj/FWlib_apt32f102_gpio.o
+    0x000020e8   0x00000008   Code   RO        147  .text.GPIO_Write_High	Obj/FWlib_apt32f102_gpio.o
+    0x000020f0   0x00000008   Code   RO        148  .text.GPIO_Write_Low	Obj/FWlib_apt32f102_gpio.o
+    0x000020f8   0x00000016   Code   RO        150  .text.GPIO_Reverse	Obj/FWlib_apt32f102_gpio.o
+    0x0000210e   0x00000010   Code   RO        151  .text.GPIO_Read_Status	Obj/FWlib_apt32f102_gpio.o
+    0x00002120   0x00000014   Code   RO        185  .text.LPT_Soft_Reset	Obj/FWlib_apt32f102_lpt.o
+    0x00002134   0x00000010   Code   RO        234  .text.WWDT_CNT_Load	Obj/FWlib_apt32f102_wwdt.o
+    0x00002144   0x0000001c   Code   RO        303  .text.BT_DeInit	Obj/FWlib_apt32f102_bt.o
+    0x00002160   0x00000008   Code   RO        305  .text.BT_Start 	Obj/FWlib_apt32f102_bt.o
+    0x00002168   0x0000000a   Code   RO        309  .text.BT_Soft_Reset	Obj/FWlib_apt32f102_bt.o
+    0x00002172   0x00000018   Code   RO        310  .text.BT_Configure	Obj/FWlib_apt32f102_bt.o
+    0x0000218a   0x0000002c   Code   RO        311  .text.BT_ControlSet_Configure	Obj/FWlib_apt32f102_bt.o
+    0x000021b6   0x00000006   Code   RO        312  .text.BT_Period_CMP_Write	Obj/FWlib_apt32f102_bt.o
+    0x000021bc   0x00000012   Code   RO        319  .text.BT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_bt.o
+    0x000021d0   0x00000010   Code   RO        322  .text.BT1_INT_ENABLE	Obj/FWlib_apt32f102_bt.o
+    0x000021e0   0x000000a0   Code   RO        340  .text.GPT_IO_Init	Obj/FWlib_apt32f102_gpt.o
+    0x00002280   0x00000014   Code   RO        341  .text.GPT_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x00002294   0x00000044   Code   RO        342  .text.GPT_WaveCtrl_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000022d8   0x00000014   Code   RO        343  .text.GPT_WaveLoad_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000022ec   0x000000b4   Code   RO        344  .text.GPT_WaveOut_Configure	Obj/FWlib_apt32f102_gpt.o
+    0x000023a0   0x00000010   Code   RO        353  .text.GPT_Start	Obj/FWlib_apt32f102_gpt.o
+    0x000023b0   0x00000010   Code   RO        360  .text.GPT_Period_CMP_Write	Obj/FWlib_apt32f102_gpt.o
+    0x000023c0   0x0000001c   Code   RO        365  .text.GPT_ConfigInterrupt_CMD	Obj/FWlib_apt32f102_gpt.o
+    0x000023dc   0x00000018   Code   RO        435  .text.UART0_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x000023f4   0x00000018   Code   RO        436  .text.UART1_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x0000240c   0x00000018   Code   RO        437  .text.UART2_DeInit	Obj/FWlib_apt32f102_uart.o
+    0x00002424   0x0000001c   Code   RO        440  .text.UART1_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x00002440   0x0000001c   Code   RO        442  .text.UART2_Int_Enable	Obj/FWlib_apt32f102_uart.o
+    0x0000245c   0x000000ec   Code   RO        450  .text.UART_IO_Init	Obj/FWlib_apt32f102_uart.o
+    0x00002548   0x00000010   Code   RO        452  .text.UARTInitRxTxIntEn	Obj/FWlib_apt32f102_uart.o
+    0x00002558   0x0000001e   Code   RO        456  .text.UARTTransmit	Obj/FWlib_apt32f102_uart.o
+    0x00002578   0x00000028   Code   RO        516  .text.EPT_Stop 	Obj/FWlib_apt32f102_ept.o
+    0x000025a0   0x00000024   Code   RO        690  .text.startup.main	Obj/main.o
+    0x000025c4   0x0000002c   Code   RO        707  .text.delay_nms	Obj/mcu_initial.o
+    0x000025f0   0x00000022   Code   RO        708  .text.delay_nus	Obj/mcu_initial.o
+    0x00002614   0x00000060   Code   RO        712  .text.BT_CONFIG	Obj/mcu_initial.o
+    0x00002674   0x00000062   Code   RO        718  .text.SYSCON_CONFIG	Obj/mcu_initial.o
+    0x000026d8   0x0000004c   Code   RO        719  .text.APT32F102_init	Obj/mcu_initial.o
+    0x00002724   0x000000f0   Code   RO        735  .text.SYSCONIntHandler	Obj/mcu_interrupt.o
+    0x00002814   0x00000068   Code   RO        736  .text.IFCIntHandler	Obj/mcu_interrupt.o
+    0x0000287c   0x00000068   Code   RO        737  .text.ADCIntHandler	Obj/mcu_interrupt.o
+    0x000028e4   0x000001ac   Code   RO        738  .text.EPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002a90   0x00000034   Code   RO        739  .text.WWDTHandler	Obj/mcu_interrupt.o
+    0x00002ac4   0x00000080   Code   RO        740  .text.GPT0IntHandler	Obj/mcu_interrupt.o
+    0x00002b44   0x00000070   Code   RO        741  .text.RTCIntHandler	Obj/mcu_interrupt.o
+    0x00002bb4   0x0000003c   Code   RO        742  .text.UART0IntHandler	Obj/mcu_interrupt.o
+    0x00002bf0   0x00000094   Code   RO        743  .text.UART1IntHandler	Obj/mcu_interrupt.o
+    0x00002c84   0x0000004c   Code   RO        744  .text.UART2IntHandler	Obj/mcu_interrupt.o
+    0x00002cd0   0x000000e8   Code   RO        745  .text.SPI0IntHandler	Obj/mcu_interrupt.o
+    0x00002db8   0x00000054   Code   RO        746  .text.SIO0IntHandler	Obj/mcu_interrupt.o
+    0x00002e0c   0x00000030   Code   RO        747  .text.EXI0IntHandler	Obj/mcu_interrupt.o
+    0x00002e3c   0x00000030   Code   RO        748  .text.EXI1IntHandler	Obj/mcu_interrupt.o
+    0x00002e6c   0x00000048   Code   RO        749  .text.EXI2to3IntHandler	Obj/mcu_interrupt.o
+    0x00002eb4   0x00000020   Code   RO        750  .text.EXI4to9IntHandler	Obj/mcu_interrupt.o
+    0x00002ed4   0x0000006c   Code   RO        751  .text.EXI10to15IntHandler	Obj/mcu_interrupt.o
+    0x00002f40   0x00000034   Code   RO        752  .text.LPTIntHandler	Obj/mcu_interrupt.o
+    0x00002f74   0x0000004c   Code   RO        753  .text.BT0IntHandler	Obj/mcu_interrupt.o
+    0x00002fc0   0x00000070   Code   RO        754  .text.BT1IntHandler	Obj/mcu_interrupt.o
+    0x00003030   0x00000002   Code   RO        755  .text.PriviledgeVioHandler	Obj/mcu_interrupt.o
+    0x00003032   0x00000008   Code   RO        757  .text.PendTrapHandler	Obj/mcu_interrupt.o
+    0x0000303a   0x00000008   Code   RO        758  .text.Trap3Handler	Obj/mcu_interrupt.o
+    0x00003042   0x00000008   Code   RO        759  .text.Trap2Handler	Obj/mcu_interrupt.o
+    0x0000304a   0x00000008   Code   RO        760  .text.Trap1Handler	Obj/mcu_interrupt.o
+    0x00003052   0x00000008   Code   RO        761  .text.Trap0Handler	Obj/mcu_interrupt.o
+    0x0000305a   0x00000008   Code   RO        762  .text.UnrecExecpHandler	Obj/mcu_interrupt.o
+    0x00003062   0x00000008   Code   RO        763  .text.BreakPointHandler	Obj/mcu_interrupt.o
+    0x0000306a   0x00000008   Code   RO        764  .text.AccessErrHandler	Obj/mcu_interrupt.o
+    0x00003072   0x00000008   Code   RO        765  .text.IllegalInstrHandler	Obj/mcu_interrupt.o
+    0x0000307a   0x00000008   Code   RO        766  .text.MisalignedHandler	Obj/mcu_interrupt.o
+    0x00003082   0x00000008   Code   RO        767  .text.CNTAIntHandler	Obj/mcu_interrupt.o
+    0x0000308a   0x00000008   Code   RO        768  .text.I2CIntHandler	Obj/mcu_interrupt.o
+    0x00003094   0x00000024   Code   RO        785  .text.__divsi3 	Obj/drivers_apt32f102.o
+    0x000030b8   0x00000024   Code   RO        786  .text.__udivsi3	Obj/drivers_apt32f102.o
+    0x000030dc   0x00000024   Code   RO        788  .text.__umodsi3	Obj/drivers_apt32f102.o
+    0x00003100   0x00000006   Code   RO        806  .text.CK_CPU_EnAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x00003106   0x00000006   Code   RO        807  .text.CK_CPU_DisAllNormalIrq	Obj/drivers_apt32f102_ck801.o
+    0x0000310c   0x00000120   Code   RO        821  .text.UARTx_Init	Obj/SYSTEM_uart.o
+    0x0000322c   0x00000034   Code   RO        823  .text.UART1_RecvINT_Processing	Obj/SYSTEM_uart.o
+    0x00003260   0x00000060   Code   RO        824  .text.UART1_TASK	Obj/SYSTEM_uart.o
+    0x000032c0   0x000000c4   Code   RO        830  .text.BUS485_Send	Obj/SYSTEM_uart.o
+    0x00003384   0x00000064   Code   RO        831  .text.MultSend_Task	Obj/SYSTEM_uart.o
+    0x000033e8   0x0000005c   Code   RO        832  .text.Set_GroupSend	Obj/SYSTEM_uart.o
+    0x00003444   0x0000002c   Code   RO        835  .text.BUS485Send_Task	Obj/SYSTEM_uart.o
+    0x00003470   0x0000003c   Code   RO        837  .text.BusIdle_Task	Obj/SYSTEM_uart.o
+    0x000034ac   0x00000054   Code   RO        838  .text.BusBusy_Task	Obj/SYSTEM_uart.o
+    0x00003500   0x0000000c   Code   RO        840  .text.Dbg_Println	Obj/SYSTEM_uart.o
+    0x0000350c   0x00000034   Code   RO        858  .text.DIP_GetSwitchState	Obj/SYSTEM_dip_switch.o
+    0x00003540   0x0000008c   Code   RO        859  .text.DIP_Switch_Init	Obj/SYSTEM_dip_switch.o
+    0x000035cc   0x0000008c   Code   RO        860  .text.DIP_ScanTask	Obj/SYSTEM_dip_switch.o
+    0x00003658   0x000000cc   Code   RO        878  .text.Relay_Init	Obj/SYSTEM_control_rly.o
+    0x00003724   0x00000016   Code   RO        879  .text.CheckSum 	Obj/SYSTEM_control_rly.o
+    0x0000373c   0x0000001c   Code   RO        881  .text.Change_OUTV	Obj/SYSTEM_control_rly.o
+    0x00003758   0x00000090   Code   RO        882  .text.BLV_VolOut_Ctrl	Obj/SYSTEM_control_rly.o
+    0x000037e8   0x0000007c   Code   RO        883  .text.BLV_RLY_Ctrl_Purpose	Obj/SYSTEM_control_rly.o
+    0x00003864   0x00000054   Code   RO        884  .text.BLV_RLY_Task	Obj/SYSTEM_control_rly.o
+    0x000038b8   0x0000009c   Code   RO        885  .text.BLV_A9RLY_CMD_SET_Processing	Obj/SYSTEM_control_rly.o
+    0x00003954   0x00000078   Code   RO        886  .text.BLV_A9RLY_CMD_READ_Processing	Obj/SYSTEM_control_rly.o
+    0x000039cc   0x000000b0   Code   RO        888  .text.BLV_RLY_RS485_Pro	Obj/SYSTEM_control_rly.o
+    0x00003a7c   0x00000058   Code   RO        949  .text.TK_Sampling_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003ad4   0x00000088   Code   RO        953  .text.TKEYIntHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003b5c   0x00000028   Code   RO        954  .text.get_key_number	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003b84   0x00000020   Code   RO        956  .text.TK_Scan_Start	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003ba4   0x00000180   Code   RO        957  .text.TK_Keymap_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003d24   0x0000011c   Code   RO        958  .text.TK_overflow_predict	FWlib_apt32f102_tkey_c_1_17.o
+    0x00003e40   0x000001d0   Code   RO        959  .text.TK_Baseline_tracking	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004010   0x00000054   Code   RO        960  .text.TK_result_prog	FWlib_apt32f102_tkey_c_1_17.o
+    0x00004064   0x00000078   Code   RO        961  .text.CORETHandler	FWlib_apt32f102_tkey_c_1_17.o
+    0x000040dc   0x00000284   Code   RO        983  .text.std_clk_calib	FWlib_apt32f102_clkcalib.o
+    0x00004360   0x00000030   Data   RO       1006  .rodata        	pow.o
+    0x00004390   0x00000014   Data   RO       1106  .rodata        	_thenan_df.o
+    0x000043a4   0x00000100   Data   RO       1154  .rodata        	_clz.o
+    0x000044a4   0x0000000b   Data   RO        691  .rodata.str1.1 	Obj/main.o
+    0x000044af   0x0000000c   Data   RO        861  .rodata.str1.1 	Obj/SYSTEM_dip_switch.o
+    0x000044bb   0x000000a4   Data   RO        890  .rodata.str1.1 	Obj/SYSTEM_control_rly.o
+    0x0000455f   0x00000001   PAD
+
+    Region RAM (Base: 0x20000000, Size: 0x00000648, Max: 0x00001000)
+
+    Base Addr    Size         Type   Attr      Idx   Section Name       Object
+    0x20000000   0x00000068   Data   RW        783  .data          	Obj/drivers_apt32f102.o
+    0x20000068   0x00000031   Data   RW        940  .data          	FWlib_apt32f102_tkey_c_1_17.o
+    0x20000099   0x00000003   PAD
+    0x2000009c   0x0000000c   Zero   RW        734  .bss           	Obj/mcu_interrupt.o
+    0x200000a8   0x00000010   Zero   RW        820  .bss           	Obj/SYSTEM_uart.o
+    0x200000b8   0x00000004   Zero   RW        857  .bss           	Obj/SYSTEM_dip_switch.o
+    0x200000bc   0x00000086   Zero   RW        703  COMMON         	Obj/main.o
+    0x20000142   0x00000002   PAD
+    0x20000144   0x00000030   Zero   RW        781  COMMON         	Obj/mcu_interrupt.o
+    0x20000174   0x000001e4   Zero   RW        854  COMMON         	Obj/SYSTEM_uart.o
+    0x20000358   0x00000010   Zero   RW        874  COMMON         	Obj/SYSTEM_dip_switch.o
+    0x20000368   0x00000016   Zero   RW        903  COMMON         	Obj/SYSTEM_control_rly.o
+    0x2000037e   0x00000002   PAD
+    0x20000380   0x000002c8   Zero   RW        979  COMMON         	FWlib_apt32f102_tkey_c_1_17.o
+
+    Region *default* (Base: 0x00000000, Size: 0x00000000, Max: 0xffffffff)
+
+
+======================================================================
+
+Image component sizes
+
+       Code    RO Data    RW Data    ZI Data      Debug   Object Name
+
+          0          0          0          0          0   linker stubs
+        436          0          0          0        286   Obj/arch_crt0.o
+         56          0          0          0        820   Obj/arch_mem_init.o
+          0          0          0          0          0   Obj/arch_apt32f102_iostring.o
+        852          0          0          0      21127   Obj/FWlib_apt32f102_syscon.o
+        832          0          0          0      13094   Obj/FWlib_apt32f102_gpio.o
+         20          0          0          0      13494   Obj/FWlib_apt32f102_lpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_crc.o
+         16          0          0          0       8327   Obj/FWlib_apt32f102_wwdt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_countera.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_et.o
+        154          0          0          0      11840   Obj/FWlib_apt32f102_bt.o
+        508          0          0          0      21406   Obj/FWlib_apt32f102_gpt.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_sio.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_spi.o
+        410          0          0          0      11721   Obj/FWlib_apt32f102_uart.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_i2c.o
+         40          0          0          0      28174   Obj/FWlib_apt32f102_ept.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_rtc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_adc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_ifc.o
+          0          0          0          0          0   Obj/FWlib_apt32f102_coret.o
+         36         11          0        134      11713   Obj/main.o
+        348          0          0          0      15894   Obj/mcu_initial.o
+       2414          0          0         60      14791   Obj/mcu_interrupt.o
+        108          0        104          0       8379   Obj/drivers_apt32f102.o
+         12          0          0          0       8319   Obj/drivers_apt32f102_ck801.o
+       1024          0          0        500      15080   Obj/SYSTEM_uart.o
+        332         12          0         20      10898   Obj/SYSTEM_dip_switch.o
+       1058        164          0         22      14912   Obj/SYSTEM_control_rly.o
+          0          0          0          0          0   Obj/SYSTEM_eeprom.o
+          0          0          0          0          0   Obj/__rt_entry.o
+	------------------------------------------------------------
+       8656        187        104        736     230275   Object Totals
+          4          1          3          4          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102TKey_c_1_16P0.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       1632          0         49        712      16345   FWlib_apt32f102_tkey_c_1_17.o
+	------------------------------------------------------------
+       1632          0         49        712      16345   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: .\lib_102ClkCalib_1_03.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        644          0          0          0       8675   FWlib_apt32f102_clkcalib.o
+	------------------------------------------------------------
+        644          0          0          0       8675   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libm.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+       2474         48          0          0          0   pow.o
+          6          0          0          0          0   fabs.o
+         32          0          0          0          0   scalbn.o
+        376          0          0          0          0   sqrt.o
+	------------------------------------------------------------
+       2888         48          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/ck801\libgcc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+         20          0          0          0          0   _csky_case_uqi.o
+         56          0          0          0          0   _fixunsdfsi.o
+        826          0          0          0          0   _addsub_df.o
+        564          0          0          0          0   _mul_df.o
+        340          0          0          0          0   _div_df.o
+         60          0          0          0          0   _gt_df.o
+         60          0          0          0          0   _ge_df.o
+         58          0          0          0          0   _le_df.o
+        112          0          0          0          0   _si_to_df.o
+        112          0          0          0          0   _df_to_si.o
+          0         20          0          0          0   _thenan_df.o
+         84          0          0          0          0   _usi_to_df.o
+         68          0          0          0          0   _muldi3.o
+         64          0          0          0          0   _clzsi2.o
+        412          0          0          0          0   _pack_df.o
+        196          0          0          0          0   _unpack_df.o
+        140          0          0          0          0   _fpcmp_parts_df.o
+          0        256          0          0          0   _clz.o
+	------------------------------------------------------------
+       3172        276          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+    [Library Name]: d:/app/cdkrepo/toolchain/ckv2elfminilib/v3.10.29/r/bin/../lib/gcc/csky-elfabiv2/6.3.0/../../../../csky-elfabiv2/lib/ck801\libc.a
+	------------------------------------------------------------
+       Code    RO Data    RW Data    ZI Data      Debug   Library Member Name
+
+        136          0          0          0          0   memset_fast.o
+        100          0          0          0          0   memcpy_fast.o
+          0          0          0          0          0   strncmp.o
+	------------------------------------------------------------
+        236          0          0          0          0   Library Totals
+          0          0          0          0          0   Pad
+          0          0          0          0          0   LD_GEN
+
+	------------------------------------------------------------
+
+======================================================================
+
+
+       Code    RO Data    RW Data    ZI Data      Debug
+      17232        512        156       1452     255295   Grand Totals
+      17232        512        156       1452     255295   Elf Image Totals
+      17232        512        156          0          0   ROM Totals
+
+======================================================================
+
+Total	RO	Size (Code + RO Data)				17744 (  17.33kB)
+Total	RW	Size (RW Data + ZI Data)			1608 (  1.57kB)
+Total	ROM	Size (Code + RO Data + RW Data)		17900 (  17.48kB)
+
+======================================================================
diff --git a/Source/MD203F8P.mk b/Source/MD203F8P.mk
new file mode 100644
index 0000000..25d1d29
--- /dev/null
+++ b/Source/MD203F8P.mk
@@ -0,0 +1,263 @@
+##
+## Auto Generated makefile by CDK
+## Do not modify this file, and any manual changes will be erased!!!   
+##
+## BuildSet
+ProjectName            :=MD203F8P
+ConfigurationName      :=BuildSet
+WorkspacePath          :=./
+ProjectPath            :=./
+IntermediateDirectory  :=Obj
+OutDir                 :=$(IntermediateDirectory)
+User                   :=jane
+Date                   :=02/04/2026
+CDKPath                :=D:/app/CDK
+ToolchainPath          :=D:/app/CDKRepo/Toolchain/CKV2ElfMinilib/V3.10.29/R/
+LinkerName             :=csky-elfabiv2-gcc
+LinkerNameoption       :=
+SIZE                   :=csky-elfabiv2-size
+READELF                :=csky-elfabiv2-readelf
+CHECKSUM               :=crc32
+SharedObjectLinkerName :=
+ObjectSuffix           :=.o
+DependSuffix           :=.d
+PreprocessSuffix       :=.i
+DisassemSuffix         :=.asm
+IHexSuffix             :=.ihex
+BinSuffix              :=.bin
+ExeSuffix              :=.elf
+LibSuffix              :=.a
+DebugSwitch            :=-g 
+IncludeSwitch          :=-I
+LibrarySwitch          :=-l
+OutputSwitch           :=-o 
+ElfInfoSwitch          :=-hlS
+LibraryPathSwitch      :=-L
+PreprocessorSwitch     :=-D
+UnPreprocessorSwitch   :=-U
+SourceSwitch           :=-c 
+ObjdumpSwitch          :=-S
+ObjcopySwitch          :=-O ihex
+ObjcopyBinSwitch       :=-O binary
+OutputFile             :=RLY_10V485_V02_20260402
+ObjectSwitch           :=-o 
+ArchiveOutputSwitch    := 
+PreprocessOnlySwitch   :=-E
+PreprocessOnlyDisableLineSwitch   :=-P
+ObjectsFileList        :=$(IntermediateDirectory)/MD203F8P.txt
+MakeDirCommand         :=mkdir
+LinkOptions            := -mcpu=ck801  -nostartfiles -Wl,--gc-sections -T"$(ProjectPath)/ckcpu.ld" -pipe 
+LinkOtherFlagsOption   := -Wl,--ckmap=$(ProjectPath)/Lst/$(OutputFile).map 
+IncludePackagePath     :=
+IncludeCPath           := $(IncludeSwitch)D:/app/CDK/CSKY/csi/csi_core/csi_cdk/ $(IncludeSwitch)D:/app/CDK/CSKY/csi/csi_core/include/ $(IncludeSwitch)D:/app/CDK/CSKY/csi/csi_driver/include/ $(IncludeSwitch). $(IncludeSwitch)SYSTEM/inc $(IncludeSwitch)include  
+IncludeAPath           := $(IncludeSwitch)D:/app/CDK/CSKY/csi/csi_core/csi_cdk/ $(IncludeSwitch)D:/app/CDK/CSKY/csi/csi_core/include/ $(IncludeSwitch)D:/app/CDK/CSKY/csi/csi_driver/include/ $(IncludeSwitch). $(IncludeSwitch)SYSTEM $(IncludeSwitch)SYSTEM/inc  
+Libs                   := -Wl,--start-group  -Wl,--end-group $(LibrarySwitch)_102TKey_c_1_16P0 $(LibrarySwitch)_102ClkCalib_1_03 $(LibrarySwitch)m  
+ArLibs                 := "lib_102TKey_c_1_16P0" "lib_102ClkCalib_1_03" "libm" 
+PackagesLibPath        :=
+LibPath                :=$(LibraryPathSwitch).  $(PackagesLibPath) 
+
+##
+## Common variables
+## AR, CXX, CC, AS, CXXFLAGS and CFLAGS can be overriden using an environment variables
+##
+AR       :=csky-elfabiv2-ar rcu
+CXX      :=csky-elfabiv2-g++
+CC       :=csky-elfabiv2-gcc
+AS       :=csky-elfabiv2-gcc
+OBJDUMP  :=csky-elfabiv2-objdump
+OBJCOPY  :=csky-elfabiv2-objcopy
+CXXFLAGS :=-mcpu=ck801   $(PreprocessorSwitch)CONFIG_CSKY_MMU=0    $(UnPreprocessorSwitch)__CSKY_ABIV2__  -Os  -g  -ffunction-sections -mistack -pipe 
+CFLAGS   :=-mcpu=ck801   $(PreprocessorSwitch)CONFIG_CSKY_MMU=0    $(UnPreprocessorSwitch)__CSKY_ABIV2__  -Os  -g  -ffunction-sections -mistack -pipe 
+ASFLAGS  :=-mcpu=ck801   $(PreprocessorSwitch)CONFIG_CKCPU_MMU=0    $(UnPreprocessorSwitch)__CSKY_ABIV2__   -Wa,-gdwarf-2 -pipe 
+PreprocessFlags  :=-mcpu=ck801   $(PreprocessorSwitch)CONFIG_CSKY_MMU=0    $(UnPreprocessorSwitch)__CSKY_ABIV2__  -Os  -g  -ffunction-sections -mistack -pipe 
+
+
+Objects0=$(IntermediateDirectory)/arch_crt0$(ObjectSuffix) $(IntermediateDirectory)/arch_mem_init$(ObjectSuffix) $(IntermediateDirectory)/arch_apt32f102_iostring$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_syscon$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_gpio$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_lpt$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_crc$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_wwdt$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_countera$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_et$(ObjectSuffix) \
+	$(IntermediateDirectory)/FWlib_apt32f102_bt$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_gpt$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_sio$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_spi$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_uart$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_i2c$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_ept$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_rtc$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_adc$(ObjectSuffix) $(IntermediateDirectory)/FWlib_apt32f102_ifc$(ObjectSuffix) \
+	$(IntermediateDirectory)/FWlib_apt32f102_coret$(ObjectSuffix) $(IntermediateDirectory)/main$(ObjectSuffix) $(IntermediateDirectory)/mcu_initial$(ObjectSuffix) $(IntermediateDirectory)/mcu_interrupt$(ObjectSuffix) $(IntermediateDirectory)/drivers_apt32f102$(ObjectSuffix) $(IntermediateDirectory)/drivers_apt32f102_ck801$(ObjectSuffix) $(IntermediateDirectory)/SYSTEM_uart$(ObjectSuffix) $(IntermediateDirectory)/SYSTEM_dip_switch$(ObjectSuffix) $(IntermediateDirectory)/SYSTEM_control_rly$(ObjectSuffix) $(IntermediateDirectory)/SYSTEM_eeprom$(ObjectSuffix) \
+	$(IntermediateDirectory)/__rt_entry$(ObjectSuffix) 
+
+
+
+Objects=$(Objects0) 
+
+##
+## Main Build Targets 
+##
+.PHONY: all
+all: $(IntermediateDirectory)/$(OutputFile)
+
+$(IntermediateDirectory)/$(OutputFile):  $(Objects) Always_Link 
+	$(LinkerName) $(OutputSwitch) $(IntermediateDirectory)/$(OutputFile)$(ExeSuffix) $(LinkerNameoption) -Wl,--ckmap=$(ProjectPath)/Lst/$(OutputFile).map  @$(ObjectsFileList)  $(LinkOptions) $(LibPath) $(Libs) $(LinkOtherFlagsOption)
+	-@mv $(ProjectPath)/Lst/$(OutputFile).map $(ProjectPath)/Lst/$(OutputFile).temp && $(READELF) $(ElfInfoSwitch) $(ProjectPath)/Obj/$(OutputFile)$(ExeSuffix) > $(ProjectPath)/Lst/$(OutputFile).map && echo ====================================================================== >> $(ProjectPath)/Lst/$(OutputFile).map && cat $(ProjectPath)/Lst/$(OutputFile).temp >> $(ProjectPath)/Lst/$(OutputFile).map && rm -rf $(ProjectPath)/Lst/$(OutputFile).temp
+	$(OBJCOPY) $(ObjcopySwitch) $(ProjectPath)/$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix)  $(ProjectPath)/Obj/$(OutputFile)$(IHexSuffix) 
+	$(OBJDUMP) $(ObjdumpSwitch) $(ProjectPath)/$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix)  > $(ProjectPath)/Lst/$(OutputFile)$(DisassemSuffix) 
+	@echo size of target:
+	@$(SIZE) $(ProjectPath)$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix) 
+	@echo -n checksum value of target:  
+	@$(CHECKSUM) $(ProjectPath)/$(IntermediateDirectory)/$(OutputFile)$(ExeSuffix) 
+	@MD203F8P.modify.bat $(IntermediateDirectory) $(OutputFile)$(ExeSuffix) 
+
+Always_Link:
+
+
+##
+## Objects
+##
+$(IntermediateDirectory)/arch_crt0$(ObjectSuffix): arch/crt0.S  
+	$(AS) $(SourceSwitch) arch/crt0.S $(ASFLAGS) -MMD -MP -MT$(IntermediateDirectory)/arch_crt0$(ObjectSuffix) -MF$(IntermediateDirectory)/arch_crt0$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/arch_crt0$(ObjectSuffix) $(IncludeAPath) $(IncludePackagePath)
+Lst/arch_crt0$(PreprocessSuffix): arch/crt0.S
+	$(CC) $(CFLAGS)$(IncludeAPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/arch_crt0$(PreprocessSuffix) arch/crt0.S
+
+$(IntermediateDirectory)/arch_mem_init$(ObjectSuffix): arch/mem_init.c  
+	$(CC) $(SourceSwitch) arch/mem_init.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/arch_mem_init$(ObjectSuffix) -MF$(IntermediateDirectory)/arch_mem_init$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/arch_mem_init$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/arch_mem_init$(PreprocessSuffix): arch/mem_init.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/arch_mem_init$(PreprocessSuffix) arch/mem_init.c
+
+$(IntermediateDirectory)/arch_apt32f102_iostring$(ObjectSuffix): arch/apt32f102_iostring.c  
+	$(CC) $(SourceSwitch) arch/apt32f102_iostring.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/arch_apt32f102_iostring$(ObjectSuffix) -MF$(IntermediateDirectory)/arch_apt32f102_iostring$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/arch_apt32f102_iostring$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/arch_apt32f102_iostring$(PreprocessSuffix): arch/apt32f102_iostring.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/arch_apt32f102_iostring$(PreprocessSuffix) arch/apt32f102_iostring.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_syscon$(ObjectSuffix): FWlib/apt32f102_syscon.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_syscon.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_syscon$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_syscon$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_syscon$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_syscon$(PreprocessSuffix): FWlib/apt32f102_syscon.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_syscon$(PreprocessSuffix) FWlib/apt32f102_syscon.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_gpio$(ObjectSuffix): FWlib/apt32f102_gpio.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_gpio.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_gpio$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_gpio$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_gpio$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_gpio$(PreprocessSuffix): FWlib/apt32f102_gpio.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_gpio$(PreprocessSuffix) FWlib/apt32f102_gpio.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_lpt$(ObjectSuffix): FWlib/apt32f102_lpt.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_lpt.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_lpt$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_lpt$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_lpt$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_lpt$(PreprocessSuffix): FWlib/apt32f102_lpt.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_lpt$(PreprocessSuffix) FWlib/apt32f102_lpt.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_crc$(ObjectSuffix): FWlib/apt32f102_crc.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_crc.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_crc$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_crc$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_crc$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_crc$(PreprocessSuffix): FWlib/apt32f102_crc.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_crc$(PreprocessSuffix) FWlib/apt32f102_crc.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_wwdt$(ObjectSuffix): FWlib/apt32f102_wwdt.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_wwdt.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_wwdt$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_wwdt$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_wwdt$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_wwdt$(PreprocessSuffix): FWlib/apt32f102_wwdt.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_wwdt$(PreprocessSuffix) FWlib/apt32f102_wwdt.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_countera$(ObjectSuffix): FWlib/apt32f102_countera.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_countera.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_countera$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_countera$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_countera$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_countera$(PreprocessSuffix): FWlib/apt32f102_countera.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_countera$(PreprocessSuffix) FWlib/apt32f102_countera.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_et$(ObjectSuffix): FWlib/apt32f102_et.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_et.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_et$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_et$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_et$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_et$(PreprocessSuffix): FWlib/apt32f102_et.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_et$(PreprocessSuffix) FWlib/apt32f102_et.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_bt$(ObjectSuffix): FWlib/apt32f102_bt.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_bt.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_bt$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_bt$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_bt$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_bt$(PreprocessSuffix): FWlib/apt32f102_bt.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_bt$(PreprocessSuffix) FWlib/apt32f102_bt.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_gpt$(ObjectSuffix): FWlib/apt32f102_gpt.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_gpt.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_gpt$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_gpt$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_gpt$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_gpt$(PreprocessSuffix): FWlib/apt32f102_gpt.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_gpt$(PreprocessSuffix) FWlib/apt32f102_gpt.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_sio$(ObjectSuffix): FWlib/apt32f102_sio.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_sio.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_sio$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_sio$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_sio$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_sio$(PreprocessSuffix): FWlib/apt32f102_sio.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_sio$(PreprocessSuffix) FWlib/apt32f102_sio.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_spi$(ObjectSuffix): FWlib/apt32f102_spi.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_spi.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_spi$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_spi$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_spi$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_spi$(PreprocessSuffix): FWlib/apt32f102_spi.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_spi$(PreprocessSuffix) FWlib/apt32f102_spi.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_uart$(ObjectSuffix): FWlib/apt32f102_uart.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_uart.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_uart$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_uart$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_uart$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_uart$(PreprocessSuffix): FWlib/apt32f102_uart.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_uart$(PreprocessSuffix) FWlib/apt32f102_uart.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_i2c$(ObjectSuffix): FWlib/apt32f102_i2c.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_i2c.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_i2c$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_i2c$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_i2c$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_i2c$(PreprocessSuffix): FWlib/apt32f102_i2c.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_i2c$(PreprocessSuffix) FWlib/apt32f102_i2c.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_ept$(ObjectSuffix): FWlib/apt32f102_ept.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_ept.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_ept$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_ept$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_ept$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_ept$(PreprocessSuffix): FWlib/apt32f102_ept.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_ept$(PreprocessSuffix) FWlib/apt32f102_ept.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_rtc$(ObjectSuffix): FWlib/apt32f102_rtc.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_rtc.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_rtc$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_rtc$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_rtc$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_rtc$(PreprocessSuffix): FWlib/apt32f102_rtc.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_rtc$(PreprocessSuffix) FWlib/apt32f102_rtc.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_adc$(ObjectSuffix): FWlib/apt32f102_adc.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_adc.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_adc$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_adc$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_adc$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_adc$(PreprocessSuffix): FWlib/apt32f102_adc.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_adc$(PreprocessSuffix) FWlib/apt32f102_adc.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_ifc$(ObjectSuffix): FWlib/apt32f102_ifc.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_ifc.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_ifc$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_ifc$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_ifc$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_ifc$(PreprocessSuffix): FWlib/apt32f102_ifc.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_ifc$(PreprocessSuffix) FWlib/apt32f102_ifc.c
+
+$(IntermediateDirectory)/FWlib_apt32f102_coret$(ObjectSuffix): FWlib/apt32f102_coret.c  
+	$(CC) $(SourceSwitch) FWlib/apt32f102_coret.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/FWlib_apt32f102_coret$(ObjectSuffix) -MF$(IntermediateDirectory)/FWlib_apt32f102_coret$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/FWlib_apt32f102_coret$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/FWlib_apt32f102_coret$(PreprocessSuffix): FWlib/apt32f102_coret.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/FWlib_apt32f102_coret$(PreprocessSuffix) FWlib/apt32f102_coret.c
+
+$(IntermediateDirectory)/main$(ObjectSuffix): main.c  
+	$(CC) $(SourceSwitch) main.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/main$(ObjectSuffix) -MF$(IntermediateDirectory)/main$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/main$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/main$(PreprocessSuffix): main.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/main$(PreprocessSuffix) main.c
+
+$(IntermediateDirectory)/mcu_initial$(ObjectSuffix): mcu_initial.c  
+	$(CC) $(SourceSwitch) mcu_initial.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/mcu_initial$(ObjectSuffix) -MF$(IntermediateDirectory)/mcu_initial$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/mcu_initial$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/mcu_initial$(PreprocessSuffix): mcu_initial.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/mcu_initial$(PreprocessSuffix) mcu_initial.c
+
+$(IntermediateDirectory)/mcu_interrupt$(ObjectSuffix): mcu_interrupt.c  
+	$(CC) $(SourceSwitch) mcu_interrupt.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/mcu_interrupt$(ObjectSuffix) -MF$(IntermediateDirectory)/mcu_interrupt$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/mcu_interrupt$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/mcu_interrupt$(PreprocessSuffix): mcu_interrupt.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/mcu_interrupt$(PreprocessSuffix) mcu_interrupt.c
+
+$(IntermediateDirectory)/drivers_apt32f102$(ObjectSuffix): drivers/apt32f102.c  
+	$(CC) $(SourceSwitch) drivers/apt32f102.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/drivers_apt32f102$(ObjectSuffix) -MF$(IntermediateDirectory)/drivers_apt32f102$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/drivers_apt32f102$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/drivers_apt32f102$(PreprocessSuffix): drivers/apt32f102.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/drivers_apt32f102$(PreprocessSuffix) drivers/apt32f102.c
+
+$(IntermediateDirectory)/drivers_apt32f102_ck801$(ObjectSuffix): drivers/apt32f102_ck801.c  
+	$(CC) $(SourceSwitch) drivers/apt32f102_ck801.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/drivers_apt32f102_ck801$(ObjectSuffix) -MF$(IntermediateDirectory)/drivers_apt32f102_ck801$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/drivers_apt32f102_ck801$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/drivers_apt32f102_ck801$(PreprocessSuffix): drivers/apt32f102_ck801.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/drivers_apt32f102_ck801$(PreprocessSuffix) drivers/apt32f102_ck801.c
+
+$(IntermediateDirectory)/SYSTEM_uart$(ObjectSuffix): SYSTEM/uart.c  
+	$(CC) $(SourceSwitch) SYSTEM/uart.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/SYSTEM_uart$(ObjectSuffix) -MF$(IntermediateDirectory)/SYSTEM_uart$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/SYSTEM_uart$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/SYSTEM_uart$(PreprocessSuffix): SYSTEM/uart.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/SYSTEM_uart$(PreprocessSuffix) SYSTEM/uart.c
+
+$(IntermediateDirectory)/SYSTEM_dip_switch$(ObjectSuffix): SYSTEM/dip_switch.c  
+	$(CC) $(SourceSwitch) SYSTEM/dip_switch.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/SYSTEM_dip_switch$(ObjectSuffix) -MF$(IntermediateDirectory)/SYSTEM_dip_switch$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/SYSTEM_dip_switch$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/SYSTEM_dip_switch$(PreprocessSuffix): SYSTEM/dip_switch.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/SYSTEM_dip_switch$(PreprocessSuffix) SYSTEM/dip_switch.c
+
+$(IntermediateDirectory)/SYSTEM_control_rly$(ObjectSuffix): SYSTEM/control_rly.c  
+	$(CC) $(SourceSwitch) SYSTEM/control_rly.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/SYSTEM_control_rly$(ObjectSuffix) -MF$(IntermediateDirectory)/SYSTEM_control_rly$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/SYSTEM_control_rly$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/SYSTEM_control_rly$(PreprocessSuffix): SYSTEM/control_rly.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/SYSTEM_control_rly$(PreprocessSuffix) SYSTEM/control_rly.c
+
+$(IntermediateDirectory)/SYSTEM_eeprom$(ObjectSuffix): SYSTEM/eeprom.c  
+	$(CC) $(SourceSwitch) SYSTEM/eeprom.c $(CFLAGS) -MMD -MP -MT$(IntermediateDirectory)/SYSTEM_eeprom$(ObjectSuffix) -MF$(IntermediateDirectory)/SYSTEM_eeprom$(DependSuffix) $(ObjectSwitch)$(IntermediateDirectory)/SYSTEM_eeprom$(ObjectSuffix) $(IncludeCPath) $(IncludePackagePath)
+Lst/SYSTEM_eeprom$(PreprocessSuffix): SYSTEM/eeprom.c
+	$(CC) $(CFLAGS)$(IncludeCPath) $(PreprocessOnlySwitch) $(OutputSwitch) Lst/SYSTEM_eeprom$(PreprocessSuffix) SYSTEM/eeprom.c
+
+
+$(IntermediateDirectory)/__rt_entry$(ObjectSuffix): $(IntermediateDirectory)/__rt_entry$(DependSuffix)
+	@$(AS) $(SourceSwitch) $(ProjectPath)/$(IntermediateDirectory)/__rt_entry.S $(ASFLAGS) $(ObjectSwitch)$(IntermediateDirectory)/__rt_entry$(ObjectSuffix) $(IncludeAPath)
+$(IntermediateDirectory)/__rt_entry$(DependSuffix):
+	@$(CC) $(CFLAGS) $(IncludeAPath) -MG -MP -MT$(IntermediateDirectory)/__rt_entry$(ObjectSuffix) -MF$(IntermediateDirectory)/__rt_entry$(DependSuffix) -MM $(ProjectPath)/$(IntermediateDirectory)/__rt_entry.S
+
+-include $(IntermediateDirectory)/*$(DependSuffix)
diff --git a/Source/MD203F8P.modify.bat b/Source/MD203F8P.modify.bat
new file mode 100644
index 0000000..fc3c788
--- /dev/null
+++ b/Source/MD203F8P.modify.bat
@@ -0,0 +1,3 @@
+@echo off
+SET PATH=%Systemroot%\System32;%PATH%
+forfiles.exe -P "%1" -M %2 -C "cmd /c echo %1/%2 is modified at: @fdate @ftime" | findstr modified
diff --git a/Source/MD203F8P.txt b/Source/MD203F8P.txt
new file mode 100644
index 0000000..e39585e
--- /dev/null
+++ b/Source/MD203F8P.txt
@@ -0,0 +1 @@
+Obj/arch_crt0.o Obj/arch_mem_init.o Obj/arch_apt32f102_iostring.o Obj/FWlib_apt32f102_syscon.o Obj/FWlib_apt32f102_gpio.o Obj/FWlib_apt32f102_lpt.o Obj/FWlib_apt32f102_crc.o Obj/FWlib_apt32f102_wwdt.o Obj/FWlib_apt32f102_countera.o Obj/FWlib_apt32f102_et.o Obj/FWlib_apt32f102_bt.o Obj/FWlib_apt32f102_gpt.o Obj/FWlib_apt32f102_sio.o Obj/FWlib_apt32f102_spi.o Obj/FWlib_apt32f102_uart.o Obj/FWlib_apt32f102_i2c.o Obj/FWlib_apt32f102_ept.o Obj/FWlib_apt32f102_rtc.o Obj/FWlib_apt32f102_adc.o Obj/FWlib_apt32f102_ifc.o Obj/FWlib_apt32f102_coret.o Obj/main.o Obj/mcu_initial.o Obj/mcu_interrupt.o Obj/drivers_apt32f102.o Obj/drivers_apt32f102_ck801.o Obj/SYSTEM_uart.o Obj/SYSTEM_rc522.o Obj/SYSTEM_logic_ctrl.o Obj/SYSTEM_button.o Obj/__rt_entry.o 
\ No newline at end of file
diff --git a/Source/Makefile b/Source/Makefile
new file mode 100644
index 0000000..dc3cb84
--- /dev/null
+++ b/Source/Makefile
@@ -0,0 +1,8 @@
+.PHONY: clean All
+
+All:
+	@echo "----------Building project:[ apt32f102 - BuildSet ]----------"
+	@cd "C:\Users\yupp.APT-HZ\Desktop\APT32F102_Release_V0_50_20190715\Source" && make -f  "apt32f102.mk"
+clean:
+	@echo "----------Cleaning project:[ apt32f102 - BuildSet ]----------"
+	@cd "C:\Users\yupp.APT-HZ\Desktop\APT32F102_Release_V0_50_20190715\Source" && make -f  "apt32f102.mk" clean
diff --git a/Source/Obj/FWlib_apt32f102_adc.d b/Source/Obj/FWlib_apt32f102_adc.d
new file mode 100644
index 0000000..1b0fd65
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_adc.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_adc.o: FWlib/apt32f102_adc.c include/apt32f102_adc.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_adc.o b/Source/Obj/FWlib_apt32f102_adc.o
new file mode 100644
index 0000000..7dfa10e
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_adc.o differ
diff --git a/Source/Obj/FWlib_apt32f102_bt.d b/Source/Obj/FWlib_apt32f102_bt.d
new file mode 100644
index 0000000..d3afe77
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_bt.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_bt.o: FWlib/apt32f102_bt.c include/apt32f102_bt.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_bt.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_bt.o b/Source/Obj/FWlib_apt32f102_bt.o
new file mode 100644
index 0000000..2b81960
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_bt.o differ
diff --git a/Source/Obj/FWlib_apt32f102_coret.d b/Source/Obj/FWlib_apt32f102_coret.d
new file mode 100644
index 0000000..c348c18
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_coret.d
@@ -0,0 +1,14 @@
+Obj/FWlib_apt32f102_coret.o: FWlib/apt32f102_coret.c \
+ include/apt32f102_coret.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h \
+ include/apt32f102_syscon.h
+
+include/apt32f102_coret.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_syscon.h:
diff --git a/Source/Obj/FWlib_apt32f102_coret.o b/Source/Obj/FWlib_apt32f102_coret.o
new file mode 100644
index 0000000..ed7ab92
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_coret.o differ
diff --git a/Source/Obj/FWlib_apt32f102_countera.d b/Source/Obj/FWlib_apt32f102_countera.d
new file mode 100644
index 0000000..7e6968f
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_countera.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_countera.o: FWlib/apt32f102_countera.c \
+ include/apt32f102_countera.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h
+
+include/apt32f102_countera.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_countera.o b/Source/Obj/FWlib_apt32f102_countera.o
new file mode 100644
index 0000000..22fc6e7
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_countera.o differ
diff --git a/Source/Obj/FWlib_apt32f102_crc.d b/Source/Obj/FWlib_apt32f102_crc.d
new file mode 100644
index 0000000..20a9e11
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_crc.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_crc.o: FWlib/apt32f102_crc.c include/apt32f102_crc.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_crc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_crc.o b/Source/Obj/FWlib_apt32f102_crc.o
new file mode 100644
index 0000000..c86652b
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_crc.o differ
diff --git a/Source/Obj/FWlib_apt32f102_ept.d b/Source/Obj/FWlib_apt32f102_ept.d
new file mode 100644
index 0000000..b340f6c
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_ept.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_ept.o: FWlib/apt32f102_ept.c include/apt32f102_ept.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_ept.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_ept.o b/Source/Obj/FWlib_apt32f102_ept.o
new file mode 100644
index 0000000..59b0fa7
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_ept.o differ
diff --git a/Source/Obj/FWlib_apt32f102_et.d b/Source/Obj/FWlib_apt32f102_et.d
new file mode 100644
index 0000000..53a2f02
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_et.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_et.o: FWlib/apt32f102_et.c include/apt32f102_et.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_et.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_et.o b/Source/Obj/FWlib_apt32f102_et.o
new file mode 100644
index 0000000..a9c282b
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_et.o differ
diff --git a/Source/Obj/FWlib_apt32f102_gpio.d b/Source/Obj/FWlib_apt32f102_gpio.d
new file mode 100644
index 0000000..86af067
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_gpio.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_gpio.o: FWlib/apt32f102_gpio.c \
+ include/apt32f102_gpio.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h
+
+include/apt32f102_gpio.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_gpio.o b/Source/Obj/FWlib_apt32f102_gpio.o
new file mode 100644
index 0000000..d21605a
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_gpio.o differ
diff --git a/Source/Obj/FWlib_apt32f102_gpt.d b/Source/Obj/FWlib_apt32f102_gpt.d
new file mode 100644
index 0000000..fd9e95c
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_gpt.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_gpt.o: FWlib/apt32f102_gpt.c include/apt32f102_gpt.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_gpt.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_gpt.o b/Source/Obj/FWlib_apt32f102_gpt.o
new file mode 100644
index 0000000..3aac154
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_gpt.o differ
diff --git a/Source/Obj/FWlib_apt32f102_i2c.d b/Source/Obj/FWlib_apt32f102_i2c.d
new file mode 100644
index 0000000..d3e7f34
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_i2c.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_i2c.o: FWlib/apt32f102_i2c.c include/apt32f102_i2c.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_i2c.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_i2c.o b/Source/Obj/FWlib_apt32f102_i2c.o
new file mode 100644
index 0000000..b6ff367
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_i2c.o differ
diff --git a/Source/Obj/FWlib_apt32f102_ifc.d b/Source/Obj/FWlib_apt32f102_ifc.d
new file mode 100644
index 0000000..1913cf8
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_ifc.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_ifc.o: FWlib/apt32f102_ifc.c include/apt32f102_ifc.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_ifc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_ifc.o b/Source/Obj/FWlib_apt32f102_ifc.o
new file mode 100644
index 0000000..5229aba
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_ifc.o differ
diff --git a/Source/Obj/FWlib_apt32f102_lpt.d b/Source/Obj/FWlib_apt32f102_lpt.d
new file mode 100644
index 0000000..deda227
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_lpt.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_lpt.o: FWlib/apt32f102_lpt.c include/apt32f102_lpt.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_lpt.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_lpt.o b/Source/Obj/FWlib_apt32f102_lpt.o
new file mode 100644
index 0000000..dd40a55
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_lpt.o differ
diff --git a/Source/Obj/FWlib_apt32f102_rtc.d b/Source/Obj/FWlib_apt32f102_rtc.d
new file mode 100644
index 0000000..615321c
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_rtc.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_rtc.o: FWlib/apt32f102_rtc.c include/apt32f102_rtc.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_rtc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_rtc.o b/Source/Obj/FWlib_apt32f102_rtc.o
new file mode 100644
index 0000000..f7ed60e
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diff --git a/Source/Obj/FWlib_apt32f102_sio.d b/Source/Obj/FWlib_apt32f102_sio.d
new file mode 100644
index 0000000..a96733c
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_sio.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_sio.o: FWlib/apt32f102_sio.c include/apt32f102_sio.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_sio.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_sio.o b/Source/Obj/FWlib_apt32f102_sio.o
new file mode 100644
index 0000000..fe12c7f
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_sio.o differ
diff --git a/Source/Obj/FWlib_apt32f102_spi.d b/Source/Obj/FWlib_apt32f102_spi.d
new file mode 100644
index 0000000..097eac5
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_spi.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_spi.o: FWlib/apt32f102_spi.c include/apt32f102_spi.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h
+
+include/apt32f102_spi.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_spi.o b/Source/Obj/FWlib_apt32f102_spi.o
new file mode 100644
index 0000000..1582149
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_spi.o differ
diff --git a/Source/Obj/FWlib_apt32f102_syscon.d b/Source/Obj/FWlib_apt32f102_syscon.d
new file mode 100644
index 0000000..622babc
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_syscon.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_syscon.o: FWlib/apt32f102_syscon.c \
+ include/apt32f102_syscon.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h
+
+include/apt32f102_syscon.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_syscon.o b/Source/Obj/FWlib_apt32f102_syscon.o
new file mode 100644
index 0000000..d7c70db
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diff --git a/Source/Obj/FWlib_apt32f102_uart.d b/Source/Obj/FWlib_apt32f102_uart.d
new file mode 100644
index 0000000..cb50615
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_uart.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_uart.o: FWlib/apt32f102_uart.c \
+ include/apt32f102_uart.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h
+
+include/apt32f102_uart.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_uart.o b/Source/Obj/FWlib_apt32f102_uart.o
new file mode 100644
index 0000000..7aaad8b
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_uart.o differ
diff --git a/Source/Obj/FWlib_apt32f102_wwdt.d b/Source/Obj/FWlib_apt32f102_wwdt.d
new file mode 100644
index 0000000..671e7e6
--- /dev/null
+++ b/Source/Obj/FWlib_apt32f102_wwdt.d
@@ -0,0 +1,11 @@
+Obj/FWlib_apt32f102_wwdt.o: FWlib/apt32f102_wwdt.c \
+ include/apt32f102_wwdt.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/FWlib_apt32f102_wwdt.o b/Source/Obj/FWlib_apt32f102_wwdt.o
new file mode 100644
index 0000000..1a5827f
Binary files /dev/null and b/Source/Obj/FWlib_apt32f102_wwdt.o differ
diff --git a/Source/Obj/MD203F8P.txt b/Source/Obj/MD203F8P.txt
new file mode 100644
index 0000000..199e355
--- /dev/null
+++ b/Source/Obj/MD203F8P.txt
@@ -0,0 +1 @@
+Obj/arch_crt0.o Obj/arch_mem_init.o Obj/arch_apt32f102_iostring.o Obj/FWlib_apt32f102_syscon.o Obj/FWlib_apt32f102_gpio.o Obj/FWlib_apt32f102_lpt.o Obj/FWlib_apt32f102_crc.o Obj/FWlib_apt32f102_wwdt.o Obj/FWlib_apt32f102_countera.o Obj/FWlib_apt32f102_et.o Obj/FWlib_apt32f102_bt.o Obj/FWlib_apt32f102_gpt.o Obj/FWlib_apt32f102_sio.o Obj/FWlib_apt32f102_spi.o Obj/FWlib_apt32f102_uart.o Obj/FWlib_apt32f102_i2c.o Obj/FWlib_apt32f102_ept.o Obj/FWlib_apt32f102_rtc.o Obj/FWlib_apt32f102_adc.o Obj/FWlib_apt32f102_ifc.o Obj/FWlib_apt32f102_coret.o Obj/main.o Obj/mcu_initial.o Obj/mcu_interrupt.o Obj/drivers_apt32f102.o Obj/drivers_apt32f102_ck801.o Obj/SYSTEM_uart.o Obj/SYSTEM_dip_switch.o Obj/SYSTEM_control_rly.o Obj/SYSTEM_eeprom.o Obj/__rt_entry.o 
\ No newline at end of file
diff --git a/Source/Obj/RLY_10V485_V02_20260402.elf b/Source/Obj/RLY_10V485_V02_20260402.elf
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new file mode 100644
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--- /dev/null
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diff --git a/Source/Obj/RLY_10V485_V02_20260402_0x0.bin b/Source/Obj/RLY_10V485_V02_20260402_0x0.bin
new file mode 100644
index 0000000..9236955
Binary files /dev/null and b/Source/Obj/RLY_10V485_V02_20260402_0x0.bin differ
diff --git a/Source/Obj/SYSTEM_control_rly.d b/Source/Obj/SYSTEM_control_rly.d
new file mode 100644
index 0000000..4dd6cd7
--- /dev/null
+++ b/Source/Obj/SYSTEM_control_rly.d
@@ -0,0 +1,73 @@
+Obj/SYSTEM_control_rly.o: SYSTEM/control_rly.c includes.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h include/apt32f102_adc.h include/apt32f102.h \
+ include/apt32f102_bt.h include/apt32f102_coret.h \
+ include/apt32f102_countera.h include/apt32f102_crc.h \
+ include/apt32f102_ept.h include/apt32f102_et.h include/apt32f102_gpio.h \
+ include/apt32f102_gpt.h include/apt32f102_i2c.h include/apt32f102_ifc.h \
+ include/apt32f102_lpt.h include/apt32f102_rtc.h include/apt32f102_sio.h \
+ include/apt32f102_spi.h include/apt32f102_syscon.h \
+ include/apt32f102_uart.h include/apt32f102_wwdt.h \
+ include/apt32f102_types_local.h include/apt32f102_clkcalib.h \
+ include/apt32f102_tkey.h SYSTEM/inc/uart.h SYSTEM/inc/control_rly.h \
+ SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
diff --git a/Source/Obj/SYSTEM_control_rly.o b/Source/Obj/SYSTEM_control_rly.o
new file mode 100644
index 0000000..e9afa60
Binary files /dev/null and b/Source/Obj/SYSTEM_control_rly.o differ
diff --git a/Source/Obj/SYSTEM_dip_switch.d b/Source/Obj/SYSTEM_dip_switch.d
new file mode 100644
index 0000000..89ccb10
--- /dev/null
+++ b/Source/Obj/SYSTEM_dip_switch.d
@@ -0,0 +1,73 @@
+Obj/SYSTEM_dip_switch.o: SYSTEM/dip_switch.c includes.h \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h include/apt32f102_adc.h include/apt32f102.h \
+ include/apt32f102_bt.h include/apt32f102_coret.h \
+ include/apt32f102_countera.h include/apt32f102_crc.h \
+ include/apt32f102_ept.h include/apt32f102_et.h include/apt32f102_gpio.h \
+ include/apt32f102_gpt.h include/apt32f102_i2c.h include/apt32f102_ifc.h \
+ include/apt32f102_lpt.h include/apt32f102_rtc.h include/apt32f102_sio.h \
+ include/apt32f102_spi.h include/apt32f102_syscon.h \
+ include/apt32f102_uart.h include/apt32f102_wwdt.h \
+ include/apt32f102_types_local.h include/apt32f102_clkcalib.h \
+ include/apt32f102_tkey.h SYSTEM/inc/uart.h SYSTEM/inc/control_rly.h \
+ SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
diff --git a/Source/Obj/SYSTEM_dip_switch.o b/Source/Obj/SYSTEM_dip_switch.o
new file mode 100644
index 0000000..e36dd94
Binary files /dev/null and b/Source/Obj/SYSTEM_dip_switch.o differ
diff --git a/Source/Obj/SYSTEM_eeprom.d b/Source/Obj/SYSTEM_eeprom.d
new file mode 100644
index 0000000..477eb4a
--- /dev/null
+++ b/Source/Obj/SYSTEM_eeprom.d
@@ -0,0 +1,72 @@
+Obj/SYSTEM_eeprom.o: SYSTEM/eeprom.c includes.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h \
+ include/apt32f102_adc.h include/apt32f102.h include/apt32f102_bt.h \
+ include/apt32f102_coret.h include/apt32f102_countera.h \
+ include/apt32f102_crc.h include/apt32f102_ept.h include/apt32f102_et.h \
+ include/apt32f102_gpio.h include/apt32f102_gpt.h include/apt32f102_i2c.h \
+ include/apt32f102_ifc.h include/apt32f102_lpt.h include/apt32f102_rtc.h \
+ include/apt32f102_sio.h include/apt32f102_spi.h \
+ include/apt32f102_syscon.h include/apt32f102_uart.h \
+ include/apt32f102_wwdt.h include/apt32f102_types_local.h \
+ include/apt32f102_clkcalib.h include/apt32f102_tkey.h SYSTEM/inc/uart.h \
+ SYSTEM/inc/control_rly.h SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
diff --git a/Source/Obj/SYSTEM_eeprom.o b/Source/Obj/SYSTEM_eeprom.o
new file mode 100644
index 0000000..442aaa1
Binary files /dev/null and b/Source/Obj/SYSTEM_eeprom.o differ
diff --git a/Source/Obj/SYSTEM_uart.d b/Source/Obj/SYSTEM_uart.d
new file mode 100644
index 0000000..a4f6eea
--- /dev/null
+++ b/Source/Obj/SYSTEM_uart.d
@@ -0,0 +1,72 @@
+Obj/SYSTEM_uart.o: SYSTEM/uart.c includes.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h \
+ include/apt32f102_adc.h include/apt32f102.h include/apt32f102_bt.h \
+ include/apt32f102_coret.h include/apt32f102_countera.h \
+ include/apt32f102_crc.h include/apt32f102_ept.h include/apt32f102_et.h \
+ include/apt32f102_gpio.h include/apt32f102_gpt.h include/apt32f102_i2c.h \
+ include/apt32f102_ifc.h include/apt32f102_lpt.h include/apt32f102_rtc.h \
+ include/apt32f102_sio.h include/apt32f102_spi.h \
+ include/apt32f102_syscon.h include/apt32f102_uart.h \
+ include/apt32f102_wwdt.h include/apt32f102_types_local.h \
+ include/apt32f102_clkcalib.h include/apt32f102_tkey.h SYSTEM/inc/uart.h \
+ SYSTEM/inc/control_rly.h SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
diff --git a/Source/Obj/SYSTEM_uart.o b/Source/Obj/SYSTEM_uart.o
new file mode 100644
index 0000000..a0d1e87
Binary files /dev/null and b/Source/Obj/SYSTEM_uart.o differ
diff --git a/Source/Obj/__rt_entry.S b/Source/Obj/__rt_entry.S
new file mode 100644
index 0000000..8b9bb64
--- /dev/null
+++ b/Source/Obj/__rt_entry.S
@@ -0,0 +1,139 @@
+                                                       
+ .global __main                                         
+ .weak __main                                           
+ .global __e_rom                                        
+ .weak __e_rom                                          
+ .global __s_ram_data_1                                 
+ .weak __s_ram_data_1                                   
+ .global __e_ram_data_1                                 
+ .weak __e_ram_data_1                                   
+ .global __s_ram_bss_1                                  
+ .weak __s_ram_bss_1                                    
+ .global __e_ram_bss_1                                  
+ .weak __e_ram_bss_1                                    
+ .global __s_ram_data_2                                 
+ .weak __s_ram_data_2                                   
+ .global __e_ram_data_2                                 
+ .weak __e_ram_data_2                                   
+ .global __s_ram_bss_2                                  
+ .weak __s_ram_bss_2                                    
+ .global __e_ram_bss_2                                  
+ .weak __e_ram_bss_2                                    
+ .global __s_ram_data_3                                 
+ .weak __s_ram_data_3                                   
+ .global __e_ram_data_3                                 
+ .weak __e_ram_data_3                                   
+ .global __s_ram_bss_3                                  
+ .weak __s_ram_bss_3                                    
+ .global __e_ram_bss_3                                  
+ .weak __e_ram_bss_3                                    
+ .global __s_ram_data_4                                 
+ .weak __s_ram_data_4                                   
+ .global __e_ram_data_4                                 
+ .weak __e_ram_data_4                                   
+ .global __s_ram_bss_4                                  
+ .weak __s_ram_bss_4                                    
+ .global __e_ram_bss_4                                  
+ .weak __e_ram_bss_4                                    
+ .global __s_ram_data_5                                 
+ .weak __s_ram_data_5                                   
+ .global __e_ram_data_5                                 
+ .weak __e_ram_data_5                                   
+ .global __s_ram_bss_5                                  
+ .weak __s_ram_bss_5                                    
+ .global __e_ram_bss_5                                  
+ .weak __e_ram_bss_5                                    
+ .global __ChipInitHandler                              
+ .weak __ChipInitHandler                                
+                                                        
+ .text                                                  
+ .align 3                                               
+ __bss_initialization:                                  
+     subu	a2, a3		                               
+     lsri	a2, 2		                               
+     cmpnei	a2, 0                                      
+     bf		2f                                         
+     movi	a1, 0		                               
+ 1:                                                     
+     stw		a1, (a3)	                               
+     addi	a3, 4		                               
+     subi	a2, 1		                               
+     cmpnei	a2, 0                                      
+     bt		1b			                               
+ 2:                                                     
+     jmp r15                                            
+                                                        
+ __rom_decompression:                                   
+     cmphs	a1, a2                                     
+     bt		4f                                         
+ 3:                                                     
+     ld.w	a3, (a0, 0)                                
+     st.w	a3, (a1, 0)                                
+     addi	a0, 4                                      
+     addi	a1, 4                                      
+     cmphs	a1, a2                                     
+     bf		3b                                         
+ 4:                                                     
+     jmp 	r15                                        
+                                                        
+ __main:                                                
+     mov       r6,     r15                                  
+     lrw         a3, __s_ram_bss_1                          
+     lrw         a2, __e_ram_bss_1                          
+     bsr         __bss_initialization                       
+     lrw         a3, __s_ram_bss_2                          
+     lrw         a2, __e_ram_bss_2                          
+     bsr         __bss_initialization                       
+     lrw         a3, __s_ram_bss_3                          
+     lrw         a2, __e_ram_bss_3                          
+     bsr         __bss_initialization                       
+     lrw         a3, __s_ram_bss_4                          
+     lrw         a2, __e_ram_bss_4                          
+     bsr         __bss_initialization                       
+     lrw         a3, __s_ram_bss_5                          
+     lrw         a2, __e_ram_bss_5                          
+     bsr         __bss_initialization                       
+     lrw         a0, __e_rom                                
+     lrw         a1, __s_ram_data_1                         
+     lrw         a2, __e_ram_data_1                         
+     bsr         __rom_decompression                        
+     lrw         a1, __s_ram_data_2                         
+     lrw         a2, __e_ram_data_2                         
+     bsr         __rom_decompression                        
+     lrw         a1, __s_ram_data_3                         
+     lrw         a2, __e_ram_data_3                         
+     bsr         __rom_decompression                        
+     lrw         a1, __s_ram_data_4                         
+     lrw         a2, __e_ram_data_4                         
+     bsr         __rom_decompression                        
+     lrw         a1, __s_ram_data_5                         
+     lrw         a2, __e_ram_data_5                         
+     bsr         __rom_decompression                        
+ #ifdef __CSKYABIV2__                                       
+     subi        sp, 4                                      
+     stw         r6, (sp, 0)                                
+     lrw         a0, __ChipInitHandler                      
+     cmpnei        a0, 0                                    
+     bf          1f                                         
+     jsr         a0                                         
+ 1:                                                         
+     lrw         a0, main                                   
+     jsr          a0                                        
+ #else                                                      
+     subi        sp, 8                                      
+     stw         r6, (sp, 0)                                
+     lrw         a0, __ChipInitHandler                      
+     cmpnei      a0, 0                                      
+     bf          1f                                         
+     jsri        __ChipInitHandler                          
+ 1:                                                         
+     jsri         main                                      
+ #endif                                                     
+     ldw        r15, (sp, 0)                                
+ #ifdef __CSKYABIV2__                                       
+     addi        sp, 4                                      
+ #else                                                      
+     addi        sp, 8                                      
+ #endif                                                     
+     jmp        r15                                         
+                                                        
\ No newline at end of file
diff --git a/Source/Obj/__rt_entry.d b/Source/Obj/__rt_entry.d
new file mode 100644
index 0000000..21afacb
--- /dev/null
+++ b/Source/Obj/__rt_entry.d
@@ -0,0 +1 @@
+Obj/__rt_entry.o: Obj/__rt_entry.S
diff --git a/Source/Obj/__rt_entry.o b/Source/Obj/__rt_entry.o
new file mode 100644
index 0000000..87d1e82
Binary files /dev/null and b/Source/Obj/__rt_entry.o differ
diff --git a/Source/Obj/arch_apt32f102_iostring.d b/Source/Obj/arch_apt32f102_iostring.d
new file mode 100644
index 0000000..8aea0fc
--- /dev/null
+++ b/Source/Obj/arch_apt32f102_iostring.d
@@ -0,0 +1,13 @@
+Obj/arch_apt32f102_iostring.o: arch/apt32f102_iostring.c \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h include/apt32f102_uart.h include/apt32f102.h
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102.h:
diff --git a/Source/Obj/arch_apt32f102_iostring.o b/Source/Obj/arch_apt32f102_iostring.o
new file mode 100644
index 0000000..eedca58
Binary files /dev/null and b/Source/Obj/arch_apt32f102_iostring.o differ
diff --git a/Source/Obj/arch_crt0.d b/Source/Obj/arch_crt0.d
new file mode 100644
index 0000000..430c939
--- /dev/null
+++ b/Source/Obj/arch_crt0.d
@@ -0,0 +1 @@
+Obj/arch_crt0.o: arch/crt0.S
diff --git a/Source/Obj/arch_crt0.o b/Source/Obj/arch_crt0.o
new file mode 100644
index 0000000..9ce2198
Binary files /dev/null and b/Source/Obj/arch_crt0.o differ
diff --git a/Source/Obj/arch_mem_init.d b/Source/Obj/arch_mem_init.d
new file mode 100644
index 0000000..c3cd9c6
--- /dev/null
+++ b/Source/Obj/arch_mem_init.d
@@ -0,0 +1 @@
+Obj/arch_mem_init.o: arch/mem_init.c
diff --git a/Source/Obj/arch_mem_init.o b/Source/Obj/arch_mem_init.o
new file mode 100644
index 0000000..66b1eef
Binary files /dev/null and b/Source/Obj/arch_mem_init.o differ
diff --git a/Source/Obj/drivers_apt32f102.d b/Source/Obj/drivers_apt32f102.d
new file mode 100644
index 0000000..9d7f972
--- /dev/null
+++ b/Source/Obj/drivers_apt32f102.d
@@ -0,0 +1,8 @@
+Obj/drivers_apt32f102.o: drivers/apt32f102.c include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/drivers_apt32f102.o b/Source/Obj/drivers_apt32f102.o
new file mode 100644
index 0000000..10a9f9c
Binary files /dev/null and b/Source/Obj/drivers_apt32f102.o differ
diff --git a/Source/Obj/drivers_apt32f102_ck801.d b/Source/Obj/drivers_apt32f102_ck801.d
new file mode 100644
index 0000000..8d9ab1a
--- /dev/null
+++ b/Source/Obj/drivers_apt32f102_ck801.d
@@ -0,0 +1,11 @@
+Obj/drivers_apt32f102_ck801.o: drivers/apt32f102_ck801.c \
+ include/apt32f102.h include/apt32f102_types_local.h \
+ include/apt32f102_ck801.h include/apt32f102_ck801.h
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_ck801.h:
diff --git a/Source/Obj/drivers_apt32f102_ck801.o b/Source/Obj/drivers_apt32f102_ck801.o
new file mode 100644
index 0000000..59ea4a7
Binary files /dev/null and b/Source/Obj/drivers_apt32f102_ck801.o differ
diff --git a/Source/Obj/main.d b/Source/Obj/main.d
new file mode 100644
index 0000000..eface32
--- /dev/null
+++ b/Source/Obj/main.d
@@ -0,0 +1,75 @@
+Obj/main.o: main.c includes.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h \
+ include/apt32f102_adc.h include/apt32f102.h include/apt32f102_bt.h \
+ include/apt32f102_coret.h include/apt32f102_countera.h \
+ include/apt32f102_crc.h include/apt32f102_ept.h include/apt32f102_et.h \
+ include/apt32f102_gpio.h include/apt32f102_gpt.h include/apt32f102_i2c.h \
+ include/apt32f102_ifc.h include/apt32f102_lpt.h include/apt32f102_rtc.h \
+ include/apt32f102_sio.h include/apt32f102_spi.h \
+ include/apt32f102_syscon.h include/apt32f102_uart.h \
+ include/apt32f102_wwdt.h include/apt32f102_types_local.h \
+ include/apt32f102_clkcalib.h include/apt32f102_tkey.h SYSTEM/inc/uart.h \
+ SYSTEM/inc/control_rly.h SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h \
+ includes.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
+
+includes.h:
diff --git a/Source/Obj/main.o b/Source/Obj/main.o
new file mode 100644
index 0000000..9ea0d0d
Binary files /dev/null and b/Source/Obj/main.o differ
diff --git a/Source/Obj/mcu_initial.d b/Source/Obj/mcu_initial.d
new file mode 100644
index 0000000..82496b3
--- /dev/null
+++ b/Source/Obj/mcu_initial.d
@@ -0,0 +1,75 @@
+Obj/mcu_initial.o: mcu_initial.c includes.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h \
+ include/apt32f102_adc.h include/apt32f102.h include/apt32f102_bt.h \
+ include/apt32f102_coret.h include/apt32f102_countera.h \
+ include/apt32f102_crc.h include/apt32f102_ept.h include/apt32f102_et.h \
+ include/apt32f102_gpio.h include/apt32f102_gpt.h include/apt32f102_i2c.h \
+ include/apt32f102_ifc.h include/apt32f102_lpt.h include/apt32f102_rtc.h \
+ include/apt32f102_sio.h include/apt32f102_spi.h \
+ include/apt32f102_syscon.h include/apt32f102_uart.h \
+ include/apt32f102_wwdt.h include/apt32f102_types_local.h \
+ include/apt32f102_clkcalib.h include/apt32f102_tkey.h SYSTEM/inc/uart.h \
+ SYSTEM/inc/control_rly.h SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h \
+ includes.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
+
+includes.h:
diff --git a/Source/Obj/mcu_initial.o b/Source/Obj/mcu_initial.o
new file mode 100644
index 0000000..a99b870
Binary files /dev/null and b/Source/Obj/mcu_initial.o differ
diff --git a/Source/Obj/mcu_interrupt.d b/Source/Obj/mcu_interrupt.d
new file mode 100644
index 0000000..51af1d9
--- /dev/null
+++ b/Source/Obj/mcu_interrupt.d
@@ -0,0 +1,75 @@
+Obj/mcu_interrupt.o: mcu_interrupt.c includes.h include/apt32f102.h \
+ include/apt32f102_types_local.h include/apt32f102_ck801.h \
+ include/apt32f102_adc.h include/apt32f102.h include/apt32f102_bt.h \
+ include/apt32f102_coret.h include/apt32f102_countera.h \
+ include/apt32f102_crc.h include/apt32f102_ept.h include/apt32f102_et.h \
+ include/apt32f102_gpio.h include/apt32f102_gpt.h include/apt32f102_i2c.h \
+ include/apt32f102_ifc.h include/apt32f102_lpt.h include/apt32f102_rtc.h \
+ include/apt32f102_sio.h include/apt32f102_spi.h \
+ include/apt32f102_syscon.h include/apt32f102_uart.h \
+ include/apt32f102_wwdt.h include/apt32f102_types_local.h \
+ include/apt32f102_clkcalib.h include/apt32f102_tkey.h SYSTEM/inc/uart.h \
+ SYSTEM/inc/control_rly.h SYSTEM/inc/dip_switch.h SYSTEM/inc/eeprom.h \
+ includes.h
+
+includes.h:
+
+include/apt32f102.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_ck801.h:
+
+include/apt32f102_adc.h:
+
+include/apt32f102.h:
+
+include/apt32f102_bt.h:
+
+include/apt32f102_coret.h:
+
+include/apt32f102_countera.h:
+
+include/apt32f102_crc.h:
+
+include/apt32f102_ept.h:
+
+include/apt32f102_et.h:
+
+include/apt32f102_gpio.h:
+
+include/apt32f102_gpt.h:
+
+include/apt32f102_i2c.h:
+
+include/apt32f102_ifc.h:
+
+include/apt32f102_lpt.h:
+
+include/apt32f102_rtc.h:
+
+include/apt32f102_sio.h:
+
+include/apt32f102_spi.h:
+
+include/apt32f102_syscon.h:
+
+include/apt32f102_uart.h:
+
+include/apt32f102_wwdt.h:
+
+include/apt32f102_types_local.h:
+
+include/apt32f102_clkcalib.h:
+
+include/apt32f102_tkey.h:
+
+SYSTEM/inc/uart.h:
+
+SYSTEM/inc/control_rly.h:
+
+SYSTEM/inc/dip_switch.h:
+
+SYSTEM/inc/eeprom.h:
+
+includes.h:
diff --git a/Source/Obj/mcu_interrupt.o b/Source/Obj/mcu_interrupt.o
new file mode 100644
index 0000000..fc83fb9
Binary files /dev/null and b/Source/Obj/mcu_interrupt.o differ
diff --git a/Source/Project.cdkproj b/Source/Project.cdkproj
new file mode 100644
index 0000000..e27abf2
--- /dev/null
+++ b/Source/Project.cdkproj
@@ -0,0 +1,458 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Project Name="MD203F8P" Version="1">
+  <Description/>
+  <UIControl>
+    <Debug>
+      <DisableSIMConnector>yes</DisableSIMConnector>
+    </Debug>
+  </UIControl>
+  <Dependencies/>
+  <MonitorProgress>
+    <DebugLaunch>101</DebugLaunch>
+    <FlashOperate>91</FlashOperate>
+  </MonitorProgress>
+  <VirtualDirectory Name="arch">
+    <File Name="arch/crt0.S">
+      <FileOption/>
+    </File>
+    <File Name="arch/mem_init.c">
+      <FileOption/>
+    </File>
+    <File Name="arch/apt32f102_iostring.c">
+      <FileOption/>
+    </File>
+    <File Name="arch/apt32f102a.svc">
+      <FileOption/>
+    </File>
+  </VirtualDirectory>
+  <VirtualDirectory Name="FWlib">
+    <File Name="FWlib/apt32f102_syscon.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_gpio.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_lpt.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_crc.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_wwdt.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_countera.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_et.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_bt.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_gpt.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_sio.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_spi.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_uart.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_i2c.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_ept.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_rtc.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_adc.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_ifc.c">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_tkey_parameter.c" ExcludeProjConfig="BuildSet">
+      <FileOption/>
+    </File>
+    <File Name="FWlib/apt32f102_coret.c">
+      <FileOption/>
+    </File>
+  </VirtualDirectory>
+  <VirtualDirectory Name="inc">
+    <File Name="include/apt32f102.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_adc.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_bt.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_ck801.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_countera.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_crc.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_ept.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_et.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_gpio.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_gpt.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_i2c.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_ifc.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_lpt.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_rtc.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_sio.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_spi.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_syscon.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_types_local.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_uart.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_tkey.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_coret.h">
+      <FileOption/>
+    </File>
+    <File Name="include/apt32f102_clkcalib.h">
+      <FileOption/>
+    </File>
+  </VirtualDirectory>
+  <VirtualDirectory Name="source">
+    <File Name="main.c">
+      <FileOption/>
+    </File>
+    <File Name="includes.h">
+      <FileOption/>
+    </File>
+    <File Name="mcu_initial.c">
+      <FileOption/>
+    </File>
+    <File Name="mcu_interrupt.c">
+      <FileOption/>
+    </File>
+    <File Name="ckcpu.ld"/>
+  </VirtualDirectory>
+  <VirtualDirectory Name="drivers">
+    <File Name="drivers/apt32f102.c">
+      <FileOption/>
+    </File>
+    <File Name="drivers/apt32f102_ck801.c">
+      <FileOption/>
+    </File>
+  </VirtualDirectory>
+  <VirtualDirectory Name="doc">
+    <File Name="doc/APT32F102_TKLib_Version.md">
+      <FileOption/>
+    </File>
+    <File Name="doc/APT32F102_Lib_Fix_Log.md">
+      <FileOption/>
+    </File>
+  </VirtualDirectory>
+  <VendorInfo>
+    <VendorName>NULL</VendorName>
+  </VendorInfo>
+  <VirtualDirectory Name="SYSTEM" ExcludeProjConfig="">
+    <File Name="SYSTEM/uart.c">
+      <FileOption/>
+    </File>
+    <VirtualDirectory Name="inc">
+      <File Name="SYSTEM/inc/uart.h">
+        <FileOption/>
+      </File>
+      <File Name="SYSTEM/inc/dip_switch.h">
+        <FileOption/>
+      </File>
+      <File Name="SYSTEM/inc/control_rly.h">
+        <FileOption/>
+      </File>
+      <File Name="SYSTEM/inc/eeprom.h">
+        <FileOption/>
+      </File>
+    </VirtualDirectory>
+    <File Name="SYSTEM/dip_switch.c">
+      <FileOption/>
+    </File>
+    <File Name="SYSTEM/control_rly.c">
+      <FileOption/>
+    </File>
+    <File Name="SYSTEM/eeprom.c">
+      <FileOption/>
+    </File>
+  </VirtualDirectory>
+  <ToolsConfig>
+    <Compiler>
+      <Name>CKV2ElfMinilib</Name>
+      <Version>latest</Version>
+    </Compiler>
+  </ToolsConfig>
+  <DebugSessions>
+    <watchExpressions>CK801:1;i_temp:1;j_temp:1;k_temp:1;GPIOB0:1;GPIOA0:1;SYSCON:1;test_d:1;LPT:1;BT0:1;Key_Map:1;DFLASH_rdata:1;TKEYBUF:1</watchExpressions>
+    <memoryExpressions>0x00080140;;;</memoryExpressions>
+    <statistics>;;32;;MHZ;</statistics>
+    <peripheralTabs>
+      <Tab disFormat="Hex">SYSCON</Tab>
+    </peripheralTabs>
+    <WatchDisplayFormat>1</WatchDisplayFormat>
+    <LocalDisplayFormat>0</LocalDisplayFormat>
+    <debugLayout>layout2|name=Project View;caption=Project View;state=31459324;dir=4;layer=1;row=0;pos=0;prop=68571;bestw=456;besth=277;minw=10;minh=5;maxw=-1;maxh=-1;floatx=-1;floaty=-1;floatw=-1;floath=-1|name=Debugger;caption=Debugger;state=14682108;dir=3;layer=1;row=0;pos=0;prop=86169;bestw=341;besth=315;minw=10;minh=5;maxw=-1;maxh=-1;floatx=60;floaty=707;floatw=418;floath=340|name=Frame Info;caption=Frame Info;state=14698492;dir=3;layer=1;row=0;pos=1;prop=106705;bestw=400;besth=300;minw=10;minh=5;maxw=-1;maxh=-1;floatx=-1;floaty=-1;floatw=-1;floath=-1|name=Peripherals;caption=Peripherals;state=31459326;dir=3;layer=1;row=0;pos=4;prop=100000;bestw=11;besth=43;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=-1;floaty=-1;floatw=-1;floath=-1|name=Serial Pane;caption=Serial Pane;state=14682110;dir=3;layer=1;row=0;pos=4;prop=100000;bestw=400;besth=300;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=-1;floaty=-1;floatw=-1;floath=-1|name=Editor;caption=;state=256;dir=5;layer=0;row=0;pos=0;prop=100000;bestw=20;besth=20;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=-1;floaty=-1;floatw=-1;floath=-1|name=Output View;caption=Output View;state=31459326;dir=3;layer=1;row=0;pos=1;prop=100000;bestw=958;besth=244;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=-1;floaty=-1;floatw=-1;floath=-1|name=Disassemble;caption=Disassemble;state=2099198;dir=3;layer=1;row=0;pos=2;prop=158373;bestw=200;besth=200;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=1746;floaty=812;floatw=216;floath=236|name=Register;caption=Register;state=2099198;dir=4;layer=1;row=0;pos=1;prop=100000;bestw=200;besth=200;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=83;floaty=444;floatw=218;floath=240|name=Outline;caption=Outline;state=2099198;dir=2;layer=0;row=2;pos=0;prop=100000;bestw=200;besth=200;minw=-1;minh=-1;maxw=-1;maxh=-1;floatx=1823;floaty=285;floatw=216;floath=236|dock_size(4,1,0)=210|dock_size(5,0,0)=20|dock_size(3,1,0)=335|</debugLayout>
+    <memoryTabColSizeExpressions>100:4;100:8;100:8;100:8;</memoryTabColSizeExpressions>
+    <QuickWatchDisplayFormat/>
+  </DebugSessions>
+  <BuildConfigs>
+    <BuildConfig Name="BuildSet">
+      <Target>
+        <ROMBank Selected="1">
+          <ROM1>
+            <InUse>yes</InUse>
+            <Start>0x00000000</Start>
+            <Size>0x00010000</Size>
+          </ROM1>
+          <ROM2>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+          </ROM2>
+          <ROM3>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+          </ROM3>
+          <ROM4>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+          </ROM4>
+          <ROM5>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+          </ROM5>
+        </ROMBank>
+        <RAMBank>
+          <RAM1>
+            <InUse>yes</InUse>
+            <Start>0x20000000</Start>
+            <Size>0x20001000</Size>
+            <Init>yes</Init>
+          </RAM1>
+          <RAM2>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+            <Init>yes</Init>
+          </RAM2>
+          <RAM3>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+            <Init>yes</Init>
+          </RAM3>
+          <RAM4>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+            <Init>yes</Init>
+          </RAM4>
+          <RAM5>
+            <InUse>no</InUse>
+            <Start/>
+            <Size/>
+            <Init>yes</Init>
+          </RAM5>
+        </RAMBank>
+        <CPU>ck801</CPU>
+        <UseMiniLib>yes</UseMiniLib>
+        <Endian>little</Endian>
+        <UseHardFloat>no</UseHardFloat>
+        <UseEnhancedLRW>no</UseEnhancedLRW>
+        <UseContinueBuild>no</UseContinueBuild>
+        <UseSemiHost>no</UseSemiHost>
+      </Target>
+      <Output>
+        <OutputName>RLY_10V485_V02_20260402</OutputName>
+        <Type>Executable</Type>
+        <CreateHexFile>yes</CreateHexFile>
+        <CreateBinFile>yes</CreateBinFile>
+        <Preprocessor>no</Preprocessor>
+        <Disassmeble>yes</Disassmeble>
+        <CallGraph>no</CallGraph>
+        <Map>yes</Map>
+      </Output>
+      <User>
+        <BeforeCompile>
+          <RunUserProg>no</RunUserProg>
+          <UserProgName/>
+          <IsBatchScript>no</IsBatchScript>
+        </BeforeCompile>
+        <BeforeMake>
+          <RunUserProg>no</RunUserProg>
+          <UserProgName/>
+          <IsBatchScript>no</IsBatchScript>
+        </BeforeMake>
+        <AfterMake>
+          <RunUserProg>no</RunUserProg>
+          <UserProgName/>
+          <IsBatchScript>no</IsBatchScript>
+        </AfterMake>
+        <Tools/>
+      </User>
+      <Compiler>
+        <Define>CONFIG_CSKY_MMU=0</Define>
+        <Undefine>__CSKY_ABIV2__</Undefine>
+        <Optim>Optimize size (-Os)</Optim>
+        <DebugLevel>Default (-g)</DebugLevel>
+        <IncludePath>$(CDKPath)/CSKY/csi/csi_core/csi_cdk/;$(CDKPath)/CSKY/csi/csi_core/include/;$(CDKPath)/CSKY/csi/csi_driver/include/;$(ProjectPath);$(ProjectPath)/SYSTEM/inc;$(ProjectPath)/include</IncludePath>
+        <OtherFlags>-mistack</OtherFlags>
+        <Verbose>no</Verbose>
+        <Ansi>no</Ansi>
+        <Syntax>no</Syntax>
+        <Pedantic>no</Pedantic>
+        <PedanticErr>no</PedanticErr>
+        <InhibitWarn>no</InhibitWarn>
+        <AllWarn>no</AllWarn>
+        <WarnErr>no</WarnErr>
+        <OneElfS>yes</OneElfS>
+        <OneElfSPerData>no</OneElfSPerData>
+        <Fstrict>no</Fstrict>
+      </Compiler>
+      <Asm>
+        <Define>CONFIG_CKCPU_MMU=0</Define>
+        <Undefine>__CSKY_ABIV2__</Undefine>
+        <IncludePath>$(CDKPath)/CSKY/csi/csi_core/csi_cdk/;$(CDKPath)/CSKY/csi/csi_core/include/;$(CDKPath)/CSKY/csi/csi_driver/include/;$(ProjectPath);$(ProjectPath)//SYSTEM;$(ProjectPath)/SYSTEM/inc</IncludePath>
+        <OtherFlags/>
+        <DebugLevel>gdwarf2</DebugLevel>
+      </Asm>
+      <Linker>
+        <Garbage>yes</Garbage>
+        <Garbage2>yes</Garbage2>
+        <LDFile>$(ProjectPath)/ckcpu.ld</LDFile>
+        <LibName>lib_102TKey_c_1_16P0;lib_102ClkCalib_1_03;libm</LibName>
+        <LibPath>$(ProjectPath)</LibPath>
+        <OtherFlags/>
+        <AutoLDFile>no</AutoLDFile>
+        <LinkType/>
+        <IncludeAllLibs>no</IncludeAllLibs>
+        <LinkSpecsType>none</LinkSpecsType>
+        <LinkUseNewlibNano>no</LinkUseNewlibNano>
+      </Linker>
+      <Debug>
+        <LoadApplicationAtStartup>yes</LoadApplicationAtStartup>
+        <Connector>ICE</Connector>
+        <StopAt>yes</StopAt>
+        <StopAtText>main</StopAtText>
+        <InitFile/>
+        <PreInit/>
+        <AfterLoadFile/>
+        <AutoRun>yes</AutoRun>
+        <ResetType>Soft Reset</ResetType>
+        <SoftResetVal>abcd1234</SoftResetVal>
+        <ResetAfterLoad>no</ResetAfterLoad>
+        <AfterResetFile/>
+        <Dumpcore>no</Dumpcore>
+        <DumpcoreText>$(ProjectPath)/$(ProjectName).cdkcore</DumpcoreText>
+        <SVCFile/>
+        <ConfigICE>
+          <IP>localhost</IP>
+          <PORT>1025</PORT>
+          <CPUNumber>0</CPUNumber>
+          <Clock>1500</Clock>
+          <Delay>10</Delay>
+          <NResetDelay>100</NResetDelay>
+          <WaitReset>50</WaitReset>
+          <DDC>yes</DDC>
+          <TRST>no</TRST>
+          <PreReset>no</PreReset>
+          <DebugPrint>yes</DebugPrint>
+          <Connect>Normal</Connect>
+          <ResetType>Soft Reset</ResetType>
+          <SoftResetVal>abcd1234</SoftResetVal>
+          <RTOSType>Bare Metal</RTOSType>
+          <DownloadToFlash>yes</DownloadToFlash>
+          <ResetAfterConnect>yes</ResetAfterConnect>
+          <GDBName/>
+          <GDBServerType>Local</GDBServerType>
+          <OtherFlags/>
+          <ICEEnablePCSampling>yes</ICEEnablePCSampling>
+          <ICESamplingFreq>1000</ICESamplingFreq>
+          <RemoteICEEnablePCSampling>yes</RemoteICEEnablePCSampling>
+          <RemoteICESamplingPort>1026</RemoteICESamplingPort>
+          <Version>latest</Version>
+          <SupportRemoteICEAsyncDebug>no</SupportRemoteICEAsyncDebug>
+        </ConfigICE>
+        <ConfigSIM>
+          <SIMTarget>soccfg/cskyv2/smart_card_802_cfg.xml</SIMTarget>
+          <OtherFlags/>
+          <NoGraphic>yes</NoGraphic>
+          <Log>no</Log>
+          <SimTrace>no</SimTrace>
+          <Version>latest</Version>
+        </ConfigSIM>
+        <ConfigOpenOCD>
+          <OpenOCDExecutablePath/>
+          <OpenOCDLocally>yes</OpenOCDLocally>
+          <OpenOCDTelnetPortEnable>no</OpenOCDTelnetPortEnable>
+          <OpenOCDTelnetPort>4444</OpenOCDTelnetPort>
+          <OpenOCDTclPortEnable>no</OpenOCDTclPortEnable>
+          <OpenOCDTclPort>6666</OpenOCDTclPort>
+          <OpenOCDConfigOptions/>
+          <OpenOCDTimeout>5000</OpenOCDTimeout>
+          <OpenOCDRemoteIP>localhost</OpenOCDRemoteIP>
+          <OpenOCDRemotePort>3333</OpenOCDRemotePort>
+          <PluginID>openocd-sifive</PluginID>
+          <Version>latest</Version>
+        </ConfigOpenOCD>
+      </Debug>
+      <Flash>
+        <InitFile/>
+        <PreInit/>
+        <Erase>Erase Full Chip</Erase>
+        <Algorithms Path="">$(ProjectPath)/FLASHDOWN/APT32F102_FLASHDOWN.elf</Algorithms>
+        <Program>yes</Program>
+        <Verify>yes</Verify>
+        <ResetAndRun>yes</ResetAndRun>
+        <ResetType>Soft Reset</ResetType>
+        <SoftResetVal>abcd1234</SoftResetVal>
+        <FlashIndex>no</FlashIndex>
+        <FlashIndexVal>0</FlashIndexVal>
+        <External>no</External>
+        <Command/>
+        <Arguments/>
+      </Flash>
+    </BuildConfig>
+  </BuildConfigs>
+</Project>
diff --git a/Source/Project.cdkws b/Source/Project.cdkws
new file mode 100644
index 0000000..2dd9677
--- /dev/null
+++ b/Source/Project.cdkws
@@ -0,0 +1,11 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<CDK_Workspace Name="Project" Database="Project.tags" DoubleClick="Yes">
+  <DefaultPackPath>$(CDKWS)\__workspace_pack__</DefaultPackPath>
+  <Project Name="MD203F8P" Path="Project.cdkproj" RootPath="" Active="Yes"/>
+  <BuildMatrix>
+    <WorkspaceConfiguration Name="Debug" Selected="yes">
+      <Environment/>
+      <Project Name="MD203F8P" ConfigName="BuildSet"/>
+    </WorkspaceConfiguration>
+  </BuildMatrix>
+</CDK_Workspace>
diff --git a/Source/Project.tags b/Source/Project.tags
new file mode 100644
index 0000000..66596bb
Binary files /dev/null and b/Source/Project.tags differ
diff --git a/Source/SYSTEM/control_rly.c b/Source/SYSTEM/control_rly.c
new file mode 100644
index 0000000..991e290
--- /dev/null
+++ b/Source/SYSTEM/control_rly.c
@@ -0,0 +1,608 @@
+#include "includes.h"
+
+ZERO_CTRL_RLY c_rly;
+
+void Relay_Init(void)
+{
+	memset(&c_rly,0, sizeof(ZERO_CTRL_RLY));
+	
+	EEPROM_Init();
+	
+
+	GPT_IO_Init(GPT_CHB_PB00);
+	
+	GPT_Configure(GPTCLK_EN,GPT_PCLK,GPT_IMMEDIATE,0);
+	GPT_WaveCtrl_Configure(GPT_INCREASE,GPT_SWSYNDIS,GPT_IDLE_LOW,GPT_PRDLD_PEND,GPT_OPM_CONTINUOUS,GPT_BURST_DIS,GPT_CKS_PCLK,GPT_CG_CHAX,GPT_CGFLT_00,GPT_PRDLD_ZERO);
+	GPT_Period_CMP_Write(10000,0,0);		
+	GPT_WaveLoad_Configure(GPT_WAVEA_IMMEDIATE,GPT_WAVEB_SHADOW,GPT_AQLDA_ZERO,GPT_AQLDB_ZERO);
+	GPT_WaveOut_Configure(GPT_CHB,GPT_CASEL_CMPA,GPT_CBSEL_CMPA,2,0,1,1,0,0,0,0,0,0);
+	GPT_Start();
+	GPT_ConfigInterrupt_CMD(ENABLE,GPT_INT_PEND);	
+	
+	
+	
+	
+	
+	
+	
+	
+	//真-继电器
+	GPIO_Init(GPIOA0,12,Output);
+	GPIO_Init(GPIOA0,13,Output);	
+	
+	RLY_1_CLOSE;
+	RLY_2_CLOSE;
+	
+	
+	
+	c_rly.rly_control = 0x01;	//继电器控制标志位
+}
+
+/*****************************************
+  * @brief  和校验
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum(U8_T *data,U16_T len)
+{
+	U16_T data_sum = 0;
+	
+	for(U16_T i = 0;i<len;i++)
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+}
+
+U8_T CheckSum3(U8_T *data,U16_T len,U16_T n)
+{
+	U16_T data_sum = 0;
+	
+	for(U16_T i = 0;i<len;i++)
+	{
+		if(n != i){
+			data_sum += data[i];
+		}
+	}
+	return data_sum;
+}
+
+
+/*****************************************
+  * @brief  和校验取反
+  * @param  data: 校验数据
+  * @param  len: 数据长度
+  * @retval 和校验值
+  ******************************************/
+U8_T CheckSum_Check(U8_T *data,U16_T len)
+{
+	U16_T data_sum = 0;
+	
+	for(U16_T i = 0;i<len;i++)
+	{
+		data_sum += data[i];
+	}
+	return ~data_sum;
+}
+U8_T CheckSum_Overlook_Check(U8_T *data, U16_T len, U16_T check_id)
+{
+	U8_T data_sum = 0;
+	
+	for(U8_T i = 0;i<len;i++)
+	{
+		if(check_id != i) data_sum += data[i];
+	}
+	return ~data_sum;
+}
+
+
+//选择输出电压，0 - 10000mV
+U8_T Change_OUTV(U16_T VolOut)
+{
+	if(VolOut > 10000) return 0x01;
+	
+	GPT0->CMPA = VolOut;
+#if DBG_LOG_EN	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"CMPA:%d",VolOut);
+#endif		
+	return 0x00;
+}
+/********************************************************************
+ *@brief	由继电器状态判断当前风速，输出PWM波
+ * @param	
+ * @retval 	None
+ * */
+
+void BLV_VolOut_Ctrl(void)
+{
+	c_rly.wind = WIND_STOP;
+
+	if(c_rly.rly_state[WINDRLY_HIGH] == Control_ON)			// 优先级高>中>抵 , 若同时被控制多个风速继电器，则将按照优先级打开继电器  
+	{
+#if DBG_LOG_EN		
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_HIGH");
+#endif		
+		c_rly.wind = WIND_HIGH;
+		//c_rly.rly_state[WINDRLY_MID] = Control_OFF;
+		//c_rly.rly_state[WINDRLY_LOW] = Control_OFF;		
+	}else if(c_rly.rly_state[WINDRLY_MID] == Control_ON)	
+	{
+#if DBG_LOG_EN
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_MID");
+#endif		
+		c_rly.wind = WIND_MID;
+		//c_rly.rly_state[WINDRLY_LOW] = Control_OFF;
+	}else if(c_rly.rly_state[WINDRLY_LOW] == Control_ON)	
+	{
+#if DBG_LOG_EN
+		Dbg_Println(DBG_BIT_SYS_STATUS,"WIND_LOW");
+#endif		
+		c_rly.wind = WIND_LOW;
+	}	
+
+
+	Dbg_Println(DBG_BIT_SYS_STATUS,"VolOut_Ctrl wind:%d",c_rly.wind);
+
+	
+	if(c_rly.wind == WIND_STOP){
+		Change_OUTV(c_rly.wind_STOP_vol);
+	}else if(c_rly.wind == WIND_LOW){
+		Change_OUTV(c_rly.wind_LOW_vol);
+	}else if(c_rly.wind == WIND_MID){
+		Change_OUTV(c_rly.wind_MID_vol);
+	}else if(c_rly.wind == WIND_HIGH){
+		Change_OUTV(c_rly.wind_HIGH_vol);
+	}		
+}
+/********************************************************************
+ *@brief	产生继电器控制，直接控制两个实体继电器状态
+ * @param	rly_id:继电器id
+ * @param	state：继电器要改变的状态
+ * @retval 	None
+ * */
+void BLV_RLY_Ctrl_Purpose(U8_T rly_id,U8_T state)
+{
+	if(rly_id >= RLY_MAX) return;
+
+	switch(state)
+	{
+		case Control_ON:
+			if(c_rly.rly_state[rly_id] != Control_ON)
+			{
+				c_rly.rly_state[rly_id] = Control_ON;
+				if(rly_id == CTRL_RLY1){
+					RLY_1_OPEN;
+				}else if(rly_id == CTRL_RLY2){
+					RLY_2_OPEN;
+				}
+			}
+		break;
+		case Control_OFF:
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+			{
+				c_rly.rly_state[rly_id] = Control_OFF;
+				if(rly_id == CTRL_RLY1){
+					RLY_1_CLOSE;
+				}else if(rly_id == CTRL_RLY2){
+					RLY_2_CLOSE;
+				}
+			}			
+		break;		
+		case Cnotrol_RES:
+			if(c_rly.rly_state[rly_id] != Control_OFF)
+			{
+				c_rly.rly_state[rly_id] = Control_OFF;
+				if(rly_id == CTRL_RLY1){
+					RLY_1_CLOSE;
+				}else if(rly_id == CTRL_RLY2){
+					RLY_2_CLOSE;
+				}
+			}else if(c_rly.rly_state[rly_id] != Control_ON)
+			{
+				c_rly.rly_state[rly_id] = Control_ON;
+				if(rly_id == CTRL_RLY1){
+					RLY_1_OPEN;
+				}else if(rly_id == CTRL_RLY2){
+					RLY_2_OPEN;
+				}
+			}				
+		break;		
+	}
+
+}
+//继电器动作处理
+void BLV_RLY_Task(void)
+{
+	if(c_rly.rly_control != 0x01)return;
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_ctrl_state[i] == RLY_OFF)
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_OFF);
+		}
+		else if(c_rly.rly_ctrl_state[i] == RLY_ON)
+		{
+			BLV_RLY_Ctrl_Purpose(i,Control_ON);
+			
+		}else if(c_rly.rly_ctrl_state[i] == RLY_RES)
+		{
+			BLV_RLY_Ctrl_Purpose(i,Cnotrol_RES);
+		}				
+
+		c_rly.rly_ctrl_state[i] = NO_CTRL;
+	}
+	
+	BLV_VolOut_Ctrl();		//风速判断，输出pwm
+	
+#if DBG_LOG_EN	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"BLV_RLY_Task");
+#endif	
+	c_rly.rly_control = 0x00;
+}
+
+U8_T BLV_CMD_SN(U8_T sn)
+{
+	U8_T rely_sn = (sn & 0x0f);
+	
+	if(rely_sn <0x0F)
+	{
+		rely_sn += 1;
+	}else{
+		rely_sn = 0x00;
+	}
+	
+	return rely_sn;
+}
+
+
+
+//1、主机下发设置继电器状态
+U8_T BLV_A9RLY_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+	if(len < 9) return 0x01;
+	
+	U8_T t = 0x00;
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	U16_T RLY_STATE = 0x00;
+	
+	
+//	if(len >= 9)
+	{
+		RLY_STATE =(data[SEND_PARA] + (data[SEND_PARA+1]<<8));
+		c_rly.rly_control = 0x01;	//继电器控制标志
+		
+		for(U8_T i = 0;i<RLY_MAX;i++)
+		{
+			t = ((RLY_STATE>>(2*i)) & 0x03);
+			
+			if(t == NO_CTRL){
+				c_rly.rly_ctrl_state[i] = NO_CTRL;	//默认状态，不用处理
+			}else if(t == RLY_OFF){
+				c_rly.rly_ctrl_state[i] = RLY_OFF;
+			}else if(t == RLY_ON){
+				c_rly.rly_ctrl_state[i] = RLY_ON;
+			}else if(t == RLY_RES){
+				c_rly.rly_ctrl_state[i] = RLY_RES;
+	
+			}				
+		}
+	}
+	
+	//BLV_RLY_Task();
+	c_rly.SN = (data[1]&0x0F);
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;		//SN
+	SendData[SendLen++] = data[2];
+	SendData[SendLen++] = data[0];
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_SET_RLYSTATE_REPLY;		//回复CMD
+	
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+	
+	return 0x00;
+}
+
+//2、读取继电器状态的回复
+void BLV_A9RLY_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	U8_T RLY_State2 = 0x00;
+	
+	for(U8_T i = 0;i<RLY_MAX;i++)
+	{
+		if(c_rly.rly_state[i] == Control_ON)
+		{
+			RLY_State2 |= (0x01<<i);
+		}
+	}
+	
+	c_rly.SN = (data[1]&0x0F);
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+	SendData[SendLen++] = data[0];
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_READ_RLYSTATE_REPLY;		//回复CMD
+	SendData[SendLen++] = RLY_State2;
+	SendData[SendLen++] = 0x00;
+	SendData[SendLen++] = 0x00;
+	
+	SendLen = 0x0A;
+	SendData[SEND_LEN] = 0x0A;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+}
+
+//3、设置各个风速档位的电压输出值
+U8_T BLV_WINDOUT_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+	if(len < 15) return 0x01;
+	
+	U8_T save_flag = 0x00;
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	U16_T SetVol = 0x00;
+	
+//	if(len >= 15)
+	{
+		for(U8_T i = 0x00; i < 0x04; i++)
+		{
+			SetVol = (data[(SEND_PARA+(i*2))] + (data[(SEND_PARA+(i*2+1))]<<8 ));
+			if(SetVol <= 10000){
+				switch(i){
+				case 0x00:
+					if(c_rly.wind_STOP_vol != SetVol){
+						c_rly.wind_STOP_vol = SetVol;
+						save_flag++;
+					}
+				break;
+				case 0x01:
+					if(c_rly.wind_LOW_vol != SetVol){
+						c_rly.wind_LOW_vol = SetVol;
+						save_flag++;
+					}
+				break;
+				case 0x02:
+					if(c_rly.wind_MID_vol != SetVol){
+						c_rly.wind_MID_vol = SetVol;
+						save_flag++;
+					}				
+				break;
+				case 0x03:
+					if(c_rly.wind_HIGH_vol != SetVol){
+						c_rly.wind_HIGH_vol = SetVol;
+						save_flag++;
+					}				
+				break;					
+				}
+			}
+		}
+	}
+	
+	if(save_flag != 0x00)
+	{
+		EEPROM_WritePara();	//保存flash
+		
+	}
+	
+	BLV_VolOut_Ctrl();
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+	SendData[SendLen++] = data[0];
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_SET_WINDOUTVOL_REPLY;		//回复CMD
+
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+	
+	return 0x00;
+}
+//4、读取各个风速档位的电压输出值
+U8_T BLV_WINDOUT_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+	SendData[SendLen++] = data[0];
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_READ_WINDOUTVOL_REPLY;		//回复CMD
+	SendData[SendLen++] = (c_rly.wind_STOP_vol & 0xFF);
+	SendData[SendLen++] = (c_rly.wind_STOP_vol >> 8) & 0xFF;
+	SendData[SendLen++] = (c_rly.wind_LOW_vol & 0xFF);
+	SendData[SendLen++] = (c_rly.wind_LOW_vol >> 8) & 0xFF;
+	SendData[SendLen++] = (c_rly.wind_MID_vol & 0xFF);
+	SendData[SendLen++] = (c_rly.wind_MID_vol >> 8) & 0xFF;
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol & 0xFF);
+	SendData[SendLen++] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;
+	
+	SendLen = 0x0F;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包	
+	
+	return 0x00;
+}
+
+//5、设置端口模式
+U8_T BLV_DEVPROT_CMD_SET_Processing(U8_T *data,U16_T len)
+{
+	if(len != 0x08)  return 0x01;
+	
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	if((data[SEND_PARA] == ACTIVE_PORT)||((data[SEND_PARA] == POLLING_PORT)))
+	{
+		if(data[SEND_PARA]  != c_rly.dev_port){
+			c_rly.dev_port = data[SEND_PARA];
+			
+			EEPROM_WritePara();	//保存flash
+		}
+	}else{
+		return 0x02;//设置的端口不合法
+	}
+	
+	c_rly.SN = (data[1]&0x0F);
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+	SendData[SendLen++] = data[0];
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_SET_DEVPORT_REPLY;		//回复CMD
+
+	SendLen = 0x07;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+
+	return 0x00;
+}
+
+
+
+//6、读取端口模式
+U8_T BLV_DEVPROT_CMD_READ_Processing(U8_T *data,U16_T len)
+{
+	U8_T SendData[30];	
+	U16_T SendLen = 0x00;
+	
+	
+	c_rly.SN = (data[1]&0x0F);
+	//回复
+	SendData[SendLen++] = g_Dip.addr;
+	SendData[SendLen++] = c_rly.SN;
+	SendData[SendLen++] = data[2];
+	SendData[SendLen++] = data[0];
+	SendData[SendLen++] = 0x00;		//len
+	SendData[SendLen++] = 0x00;		//sum
+	SendData[SendLen++] = CMD_READ_DEVPORT_REPLY;		//回复CMD
+	SendData[SendLen++] = c_rly.dev_port;		//端口模式
+	SendData[SendLen++] = Project_FW_Version;	//软件版本号
+	SendData[SendLen++] = Project_HW_Version;	//硬件版本号
+	
+	SendLen = 0x0A;
+	SendData[SEND_LEN] = SendLen;	//len
+	SendData[SEND_SUM] = CheckSum_Check(SendData,SendLen);
+	
+	Set_GroupSend(SendData,SendLen,1,BUSSend_WaitTime1,20);	//组包
+
+	return 0x00;
+}
+
+U8_T BLV_RLY_RS485_Pro(U8_T *RecData, U16_T Len)
+{
+	U8_T ret = 0x00;
+	
+	if(Len < 0x07)
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Data Len Err");
+		return 0x01;
+	}
+	
+	if(RecData[4] !=  Len)
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Len Check Err");
+		return 0x01;
+	}	
+	
+	if(RecData[2] !=  A9EXPANDTYPE)			//A9继电器设备类型
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Type Check Err");
+		return 0x02;		
+	}
+	
+	if(RecData[3] !=  g_Dip.addr)			//地址校验
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Addr Check Err ");	
+		return 0x03;		
+	}
+	
+
+	if( CheckSum_Overlook_Check(RecData,Len,SEND_SUM) != RecData[SEND_SUM] )		//和校验
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"Sum Check Err: %02x,%02x",RecData[SEND_SUM],CheckSum_Overlook_Check(RecData,Len,SEND_SUM));
+		Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"Sum Check Err: ",RecData,Len);
+		return 0x05;		
+	}
+	
+	if((RecData[SEND_SN]&0x0F) == c_rly.SN)
+	{
+		Dbg_Println(DBG_BIT_SYS_STATUS,"SN is Equal: %02x",c_rly.SN);	
+		return 0x00;
+	}	
+	switch(RecData[0x06])
+	{
+#if DBG_LOG_EN		
+		Dbg_Println(DBG_BIT_SYS_STATUS,"BLV_RLY_RS485 CMD:%02x",RecData[0x06]);	
+#endif		
+		case CMD_SET_RLYSTATE:
+			BLV_A9RLY_CMD_SET_Processing(RecData,Len);
+		break;
+		case CMD_READ_RLYSTATE:
+			BLV_A9RLY_CMD_READ_Processing(RecData,Len);
+		break;
+		case CMD_SET_WINDOUTVOL:
+			BLV_WINDOUT_CMD_SET_Processing(RecData,Len);
+		break;
+		case CMD_READ_WINDOUTVOL:
+			BLV_WINDOUT_CMD_READ_Processing(RecData,Len);
+		break;		
+		case CMD_SET_DEVPORT:
+			BLV_DEVPROT_CMD_SET_Processing(RecData,Len);
+		break;
+		case CMD_READ_DEVPORT:
+			BLV_DEVPROT_CMD_READ_Processing(RecData,Len);
+		break;		
+	}
+	
+}
+
+
+
+void CTRL_LEDStatus_Task(void)
+{
+	static U32_T Ctrl_LED_tick = 0x00;
+	
+	if(SysTick_1ms - Ctrl_LED_tick >= 500)
+	{
+		Ctrl_LED_tick = SysTick_1ms;
+		
+		REVERISE_STATUS;
+	}
+}
\ No newline at end of file
diff --git a/Source/SYSTEM/dip_switch.c b/Source/SYSTEM/dip_switch.c
new file mode 100644
index 0000000..e423dfe
--- /dev/null
+++ b/Source/SYSTEM/dip_switch.c
@@ -0,0 +1,109 @@
+#include "includes.h"
+
+DIP_t g_Dip;
+
+void DIP_Switch_Init(void){
+	
+	GPIO_Init(GPIOA0,10,Intput);
+	GPIO_Init(GPIOA0,9,Intput);
+	GPIO_Init(GPIOA0,8,Intput);
+
+	
+	GPIO_PullHigh_Init(GPIOA0,10);
+	GPIO_PullHigh_Init(GPIOA0,9);
+	GPIO_PullHigh_Init(GPIOA0,8);
+	
+	memset(&g_Dip,0,sizeof(DIP_t));
+	
+	
+	
+	delay_nms(20);
+	
+	/*上电读取拨码状态*/
+	for (U8_T i = 0; i < DIP_CHN_MAX; i++) {
+		if(DIP_GetSwitchState(i) == DIP_PRESS){
+			g_Dip.DIP_val |= DIP_VAL_ON << i;
+		}
+	}
+	
+	g_Dip.DIP_last_val = g_Dip.DIP_val;
+	g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+	
+
+	/*进入设置界面 - 先决条件*/
+	Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+}
+
+U8_T DIP_GetSwitchState(U8_T i){
+	U8_T val = 0;
+	
+	switch (i)
+    {
+		case DIP_CH1:
+			val = GPIO_Read_Status(GPIOA0,10);
+			break;
+		case DIP_CH2:
+			val = GPIO_Read_Status(GPIOA0,9);
+			break;
+		case DIP_CH3:
+			val = GPIO_Read_Status(GPIOA0,8);
+			break;
+
+    }
+    return val;
+}
+
+void DIP_ScanTask(void)
+{
+    static U32_T update_20ms = 0;
+
+    if (SysTick_1ms - update_20ms > DIP_SCAN_Time)
+    {
+        update_20ms = SysTick_1ms;
+		
+        for (U8_T i = 0; i < DIP_CHN_MAX; i++)
+        {
+            if (DIP_GetSwitchState(i) == DIP_PRESS)
+            {
+                g_Dip.delayCnt_OFF[i] = 0;
+                if (g_Dip.delayCnt_ON[i] < DIP_DELAY_COUNT)
+                {
+                    g_Dip.delayCnt_ON[i]++;
+                }
+                else
+                {
+                    g_Dip.DIP_val |= (DIP_VAL_ON << i);              
+                    g_Dip.delayCnt_ON[i] = 0;
+                }
+            }
+            else
+            {
+                g_Dip.delayCnt_ON[i] = 0;
+                if (g_Dip.delayCnt_OFF[i] < DIP_DELAY_COUNT)
+                {
+                    g_Dip.delayCnt_OFF[i]++;
+                }
+                else
+                {
+                    g_Dip.DIP_val &= ~(DIP_VAL_ON << i);             
+                    g_Dip.delayCnt_OFF[i] = 0;
+                }
+            }
+        }
+    }
+
+    if(g_Dip.DIP_val != g_Dip.DIP_last_val)
+    {
+		g_Dip.DIP_last_val = g_Dip.DIP_val;
+		
+        /*拨码开关 - Bit0~Bit3：设备地址*/
+		g_Dip.addr = ((g_Dip.DIP_val & 0x07)+20);
+		
+
+        Dbg_Println(DBG_BIT_SYS_STATUS,"DIP Addr %d",g_Dip.addr);
+    }
+    
+}
+
+
+
diff --git a/Source/SYSTEM/eeprom.c b/Source/SYSTEM/eeprom.c
new file mode 100644
index 0000000..54e5e7f
--- /dev/null
+++ b/Source/SYSTEM/eeprom.c
@@ -0,0 +1,372 @@
+#include "includes.h"
+
+E_MCU_DEV_INFO g_mcu_dev;
+
+U8_T EEPROM_CheckSum(U8_T *data,U16_T len)
+{
+	U8_T data_sum = 0;
+	
+	for(U16_T i = 0;i<len;i++)
+	{
+		data_sum += data[i];
+	}
+	return data_sum;
+}
+
+
+void EEPROM_Init(void)
+{
+	U8_T rev = 0;	
+	
+	EnIFCClk; //使能 IFC 时钟
+	IFC->MR |= 0x10002; //高速模式，延迟 2 个周期
+	
+	
+	EEPROM_ReadPara();
+	
+	/*boot*/
+	memset(&g_mcu_dev,0,sizeof(E_MCU_DEV_INFO));
+	
+	rev = EEPROM_ReadMCUDevInfo(&g_mcu_dev);
+	
+	if(g_Dip.addr != g_mcu_dev.dev_addr){
+		g_mcu_dev.dev_addr = g_Dip.addr;
+		EEPROM_WriteMCUDevInfo(&g_mcu_dev);
+	}
+	
+	if(rev == 0x00){
+		//读取成功，开始校验以下参数
+		EEPROM_Validate_MCUDevInfo(&g_mcu_dev);
+	}else{
+		//读取失败，恢复默认参数
+		EEPROM_Default_MCUDevInfo(&g_mcu_dev);
+#if DBG_LOG_EN
+		SYSCON_IWDCNT_Reload(); 
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EE Use Defalut Para");
+
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevBootVer:%d",g_mcu_dev.dev_boot_ver);
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevNameLen:%d",g_mcu_dev.dev_name_len);
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevName:%s",g_mcu_dev.dev_name);
+#endif	
+	}	
+	
+}
+
+/*******************************************************************************
+* Function Name  : EEPROM_ReadPara 
+* Description    : 读取参数
+* Parameter		 :
+* 		info	：读取参数指针
+*******************************************************************************/
+U8_T EEPROM_ReadPara(void)
+{
+	U32_T temp_addr = EEPROM_PARA_SaveAddr;
+	U8_T read_info[10];
+	U8_T para_data[EEPROM_PARA_Size];
+	UINT16 read_len = 0;
+	
+	memset(read_info,0,sizeof(read_info));
+	memset(para_data,0,sizeof(para_data));
+	
+	ReadDataArry_U8(temp_addr,4,read_info);
+	
+	if(read_info[0] == EEPROM_SAVE_Flag){
+		read_len = read_info[2];
+		read_len <<= 8;
+		read_len |= read_info[1];
+		
+		if((read_len <= EEPROM_PARA_Size) && (read_len == 0x0A)){
+			temp_addr += EEPROM_Data_Offset;
+			ReadDataArry_U8(temp_addr,read_len,para_data);
+			if(CheckSum(para_data,read_len) == read_info[3]){
+				//校验成功 - 读取参数
+				c_rly.wind_STOP_vol = (para_data[0] + (para_data[1]<<8));
+				if(c_rly.wind_STOP_vol > 10000){
+					c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+				}
+				
+				c_rly.wind_LOW_vol = (para_data[2] + (para_data[3]<<8));
+				if(c_rly.wind_LOW_vol > 10000){
+					c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+				}
+				
+				c_rly.wind_MID_vol = (para_data[4] + (para_data[5]<<8));
+				if(c_rly.wind_MID_vol > 10000){
+					c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+				}
+				
+				c_rly.wind_HIGH_vol = (para_data[6] + (para_data[7]<<8));
+				if(c_rly.wind_HIGH_vol > 10000){
+					c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+				}				
+				
+				//设备端口模式
+				c_rly.dev_port = para_data[9];
+				if((c_rly.dev_port != ACTIVE_PORT)&&(c_rly.dev_port != POLLING_PORT))
+				{
+					c_rly.dev_port = POLLING_PORT;
+				}
+
+
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_STOP_vol : %d",c_rly.wind_STOP_vol);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_LOW_vol  : %d",c_rly.wind_LOW_vol);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_MID_vol  : %d",c_rly.wind_MID_vol);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara dev_port      : %d",c_rly.dev_port);				
+				SYSCON_IWDCNT_Reload(); 
+				return 0x00;
+			}
+		}
+	}
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_ReadPara Default!");
+	//数据读取失败，使用默认参数
+	c_rly.wind_STOP_vol = EEPROM_WINDSTOP_OUT_Default;
+	c_rly.wind_LOW_vol = EEPROM_WINDLOW_OUT_Default;
+	c_rly.wind_MID_vol = EEPROM_WINDMID_OUT_Default;
+	c_rly.wind_HIGH_vol = EEPROM_WINDHIGH_OUT_Default;
+	c_rly.dev_port = POLLING_PORT;
+	
+	SYSCON_IWDCNT_Reload(); 
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_STOP_vol : %d",c_rly.wind_STOP_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_LOW_vol  : %d",c_rly.wind_LOW_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_MID_vol  : %d",c_rly.wind_MID_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"wind_HIGH_vol : %d",c_rly.wind_HIGH_vol);
+	Dbg_Println(DBG_BIT_SYS_STATUS,"dev_port      : %d",c_rly.dev_port);		
+	SYSCON_IWDCNT_Reload(); 
+	return 0x01;
+}
+
+/*******************************************************************************
+* Function Name  : EEPROM_ValidateWrite 
+* Description    : 校验写入参数
+*******************************************************************************/
+U8_T EEPROM_ValidateWrite(U32_T Eeprom_Write_SaveAddr,U8_T* Write_Data,U16_T Write_Len){
+	U8_T Read_para[Write_Len];
+	U16_T i = 0;
+	
+	memset(Read_para,0,sizeof(Read_para));
+	
+	ReadDataArry_U8(Eeprom_Write_SaveAddr,Write_Len,Read_para);
+	for(i=0;i<Write_Len;i++){
+		if (Read_para[i]!=Write_Data[i]) {
+			return 0x01;
+		}
+	}
+	return 0x00;
+}
+
+/*******************************************************************************
+* Function Name  : EEPROM_WritePara 
+* Description    : 保存参数
+*******************************************************************************/
+U8_T EEPROM_WritePara(void)
+{
+	U32_T temp_addr = EEPROM_PARA_SaveAddr;
+	U8_T save_para[EEPROM_PARA_Size+10];
+	UINT16 save_len = 0x0A;
+	
+	memset(save_para,0,sizeof(save_para));
+	
+	if(save_len >= EEPROM_PARA_Size)	save_len = EEPROM_PARA_Size;
+	
+	save_para[0] = EEPROM_SAVE_Flag;
+	save_para[1] = save_len & 0xFF;
+	save_para[2] = (save_len >> 8) & 0xFF;
+	save_para[3] = 0x00;
+	
+	save_para[4] = c_rly.wind_STOP_vol & 0xFF;
+	save_para[5] = (c_rly.wind_STOP_vol >> 8) & 0xFF;	
+	save_para[6] = c_rly.wind_LOW_vol & 0xFF;
+	save_para[7] = (c_rly.wind_LOW_vol >> 8) & 0xFF;	
+	save_para[8] = c_rly.wind_MID_vol & 0xFF;
+	save_para[9] = (c_rly.wind_MID_vol >> 8) & 0xFF;	
+	save_para[10] = c_rly.wind_HIGH_vol & 0xFF;
+	save_para[11] = (c_rly.wind_HIGH_vol >> 8) & 0xFF;	
+	
+	save_para[12] = g_Dip.addr;
+	save_para[13] = c_rly.dev_port;		//端口模式
+	
+	
+	
+	save_para[3] = CheckSum(&save_para[4],save_len);
+	
+	save_len += 4;
+	Page_ProgramData(temp_addr,save_len,save_para);	
+	
+	if(EEPROM_ValidateWrite(temp_addr,save_para,save_len)){
+		Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para Err");
+		return 0x01;
+	}	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"EEPROM_WritePara Save Para");
+	return 0;
+}
+
+
+/****************************<-------   boot   ------ -->***************************************************/
+
+/*******************************************************************************
+* Function Name  : EEPROM_ReadMCUDevInfo 
+* Description    : 从EEPROM中读取设备信息
+*******************************************************************************/
+U8_T EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info)
+{
+	U8_T read_info[6];
+	U8_T para_data[EEPROM_DATA_Size_Max];
+	U16_T read_len = 0;
+	
+	memset(read_info,0,sizeof(read_info));
+	memset(para_data,0,sizeof(para_data));
+	
+	ReadDataArry_U8(EEPROM_MCUDevInfo_Address,4,read_info);
+	
+	if(read_info[0] == EEPROM_SVAE_FLAG){
+		read_len = read_info[2];
+		read_len <<= 8;
+		read_len |= read_info[1];
+		
+		if(read_len <= EEPROM_DATA_Size_Max){
+			
+			ReadDataArry_U8(EEPROM_MCUDevInfo_Address+EEPROM_Offset_Data,read_len,para_data);
+			if(EEPROM_CheckSum(para_data,sizeof(E_MCU_DEV_INFO)) == read_info[3]){
+				//校验成功
+				memcpy((uint8_t *)info,para_data,sizeof(E_MCU_DEV_INFO));
+				
+#if DBG_LOG_EN
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevAddr:%d",g_mcu_dev.dev_addr);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevType:%d",g_mcu_dev.dev_type);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevBootVer:%d",g_mcu_dev.dev_boot_ver);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevAppVer:%d",g_mcu_dev.dev_app_ver);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevNameLen:%d",g_mcu_dev.dev_name_len);
+				Dbg_Println(DBG_BIT_SYS_STATUS,"EE DevName:%s",g_mcu_dev.dev_name);
+#endif
+				return 0x00;
+			}
+		}
+	}
+	
+	return 0x01;
+}
+
+/*******************************************************************************
+* Function Name  : EEPROM_WriteMCUDevInfo 
+* Description    : 将设备信息写入到EEPROM中
+*******************************************************************************/
+U8_T EEPROM_WriteMCUDevInfo(E_MCU_DEV_INFO *info)
+{
+	U8_T save_data[EEPROM_DATA_Size_Max + 6];
+	U16_T save_len = sizeof(E_MCU_DEV_INFO);
+	
+	if(save_len >= EEPROM_DATA_Size_Max) save_len = EEPROM_DATA_Size_Max;
+	
+	save_data[0] = EEPROM_SVAE_FLAG;
+	save_data[1] = save_len & 0xFF;
+	save_data[2] = (save_len >> 8) & 0xFF;
+	
+	memcpy(&save_data[4],(uint8_t *)info,save_len);
+	
+	save_data[3] = EEPROM_CheckSum(&save_data[4],save_len);
+	
+	save_len+=4;
+	
+	Page_ProgramData(EEPROM_MCUDevInfo_Address,save_len,save_data);
+	
+	return 0;
+}
+
+/*******************************************************************************
+* Function Name  : EEPROM_Default_MCUDevInfo 
+* Description    : EEPROM中参数恢复默认值，且将默认参数保存至EEPROM中
+*******************************************************************************/
+void EEPROM_Default_MCUDevInfo(E_MCU_DEV_INFO *info)
+{
+#if (Project_Area == 0x01)
+	/*Boot 区域*/
+	info->dev_addr = 0x00;
+	info->dev_type = 0x00;
+	info->dev_app_ver = 0x00;
+	info->dev_boot_ver = Project_FW_Version;
+	info->dev_name_len = sizeof(Peoject_Name);
+
+	memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
+	memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+
+	EEPROM_WriteMCUDevInfo(info);
+#elif (Project_Area == 0x02)
+	/*APP 区域*/
+	info->dev_addr = 0x00;
+	info->dev_type = Project_Type;
+	info->dev_app_ver = Project_FW_Version;
+	info->dev_name_len = sizeof(Peoject_Name);
+
+	memset((char *)info->dev_name,0,EEPROM_DEV_NAME_Size);
+	memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+
+	EEPROM_WriteMCUDevInfo(info);
+#endif
+}
+
+/*******************************************************************************
+* Function Name  : EEPROM_Validate_MCUDevInfo 
+* Description    : 校验从EEPROM 中读取的参数是否正确，如果不正确的话，便将当前正确的参数写入
+		APP区域中，判断APP参数与EEPROM中记录的是否一致
+		Boot区域中，判断Boot参数与EEPROM中记录的是否一致
+*******************************************************************************/
+void EEPROM_Validate_MCUDevInfo(E_MCU_DEV_INFO *info)
+{
+#if (Project_Area == 0x01)
+	/*Boot 区域*/
+	U8_T save_flag = 0;
+
+	if(info->dev_boot_ver != Project_FW_Version)
+	{
+		info->dev_boot_ver = Project_FW_Version;
+		save_flag = 0x01;
+	}
+
+	if(save_flag == 0x01)
+	{
+		EEPROM_WriteMCUDevInfo(info);
+	}
+#elif (Project_Area == 0x02)
+	/*APP 区域*/
+	U8_T save_flag = 0;
+
+	if(info->dev_app_ver != Project_FW_Version)
+	{
+		info->dev_app_ver = Project_FW_Version;
+		save_flag = 0x01;
+	}
+
+	if(info->dev_type != Project_Type)
+	{
+		info->dev_type = Project_Type;
+		save_flag = 0x01;
+	}
+
+	if(info->dev_name_len != sizeof(Peoject_Name))
+	{
+		info->dev_name_len = sizeof(Peoject_Name);
+		save_flag = 0x01;
+	}
+
+	if(strncmp((char *)info->dev_name,(char *)Peoject_Name,sizeof(Peoject_Name)))
+	{
+		memcpy((char *)info->dev_name,(char *)Peoject_Name,info->dev_name_len);
+		save_flag = 0x01;
+	}
+
+	if(save_flag == 0x01)
+	{
+		EEPROM_WriteMCUDevInfo(info);
+	}
+#endif
+}
+
+
+
+
+
+
+
+
diff --git a/Source/SYSTEM/inc/control_rly.h b/Source/SYSTEM/inc/control_rly.h
new file mode 100644
index 0000000..267dae3
--- /dev/null
+++ b/Source/SYSTEM/inc/control_rly.h
@@ -0,0 +1,107 @@
+#ifndef _RLY_CONTROL_H_
+#define _RLY_CONTROL_H_
+
+#include "apt32f102.h"
+#include "apt32f102_gpio.h"
+
+#define A9EXPANDTYPE		0x0E//14	    //A9RELAY类型
+
+#define CMD_SET_RLYSTATE			0x20	//设置继电器状态
+#define CMD_READ_RLYSTATE			0x24	//读取继电器状态
+#define CMD_SET_WINDOUTVOL			0x27	//设置各个档位的电压输出，0-10000mV
+#define CMD_READ_WINDOUTVOL			0x29	//读取各个档位的电压输出，0-10000mV
+#define CMD_SET_DEVPORT				0x28	//设置端口模式
+#define CMD_READ_DEVPORT			0x2A	//读取端口模式
+
+#define CMD_SET_RLYSTATE_REPLY		0x30	//回复 --  设置继电器状态
+#define CMD_READ_RLYSTATE_REPLY		0x34	//回复 --  读取继电器状态
+#define CMD_SET_WINDOUTVOL_REPLY	0x37	//回复 --  设置各个档位的电压输出，0-10000mV
+#define CMD_READ_WINDOUTVOL_REPLY	0x39	//回复 --  读取各个档位的电压输出，0-10000mV
+#define CMD_SET_DEVPORT_REPLY		0x38	//回复 --  设置端口模式
+#define CMD_READ_DEVPORT_REPLY		0x3A	//回复 --  读取端口模式
+
+#define RLY_1_OPEN		GPIO_Write_High(GPIOA0,13);
+#define RLY_1_CLOSE		GPIO_Write_Low(GPIOA0,13);	
+
+#define RLY_2_OPEN		GPIO_Write_High(GPIOA0,12);
+#define RLY_2_CLOSE		GPIO_Write_Low(GPIOA0,12);	
+
+
+
+#define WIND_LOW	0x01	
+#define WIND_MID	0x02
+#define WIND_HIGH	0x03
+#define WIND_STOP	0x00	
+	
+	
+#define Control_OFF		0x00	//继电器
+#define Control_ON		0x01	//
+#define Cnotrol_RES		0x02
+
+#define ACTIVE_PORT                 0x02      //主动端口
+#define POLLING_PORT                0x01      //轮训端口
+
+//继电器数量
+typedef enum{
+	CTRL_RLY1 = 0x00,
+	CTRL_RLY2,
+	WINDRLY_LOW,
+	WINDRLY_MID,
+	WINDRLY_HIGH,
+	
+	RLY_MAX,
+}RLY_g;
+
+//继电器控制状态
+typedef enum{
+	NO_CTRL = 0x00,	//继电器不控制
+	RLY_OFF,		//继电器关闭
+	RLY_ON,			//继电器打开
+	RLY_RES,		//继电器翻转
+	
+}RLY_CTRL_g;
+
+typedef enum{
+	SEND_ADDR1 = 0x00,	
+	SEND_SN,		
+	SEND_TYPE,			
+	SEND_ADDR2,
+	SEND_LEN,
+	SEND_SUM,
+	SEND_CMD,
+	SEND_PARA,
+	
+}RECV_g;
+
+
+typedef struct{
+	
+	U8_T rly_control;				//继电器控制标志位，0x00：不控制继电器，0x01：直接控制
+	U8_T rly_state[RLY_MAX];		//存储继电器状态，Control_ON，Control_OFF
+	U8_T rly_ctrl_state[RLY_MAX];
+	
+	U8_T dev_port;			//端口模式，0x01,轮询，0x02,主动
+	U8_T SN;
+	
+	U8_T wind;
+	U8_T wind_last;
+	
+	U16_T wind_STOP_vol;
+	U16_T wind_LOW_vol;	//低风速电压记录,0-10000mV
+	U16_T wind_MID_vol;
+	U16_T wind_HIGH_vol;
+	
+}ZERO_CTRL_RLY;
+
+extern ZERO_CTRL_RLY c_rly;
+
+void Relay_Init(void);
+void BLV_RLY_Ctrl_Purpose(U8_T rly_id,U8_T state);
+U8_T CheckSum(U8_T *data,U16_T len);
+U8_T CheckSum2(U8_T *data,U16_T len);
+U8_T BLV_RLY_RS485_Pro(U8_T *RecData, U16_T Len);
+void BLV_RLY_Task(void);
+U8_T Change_OUTV(U16_T VolOut);
+void CTRL_LEDStatus_Task(void);
+#endif
+
diff --git a/Source/SYSTEM/inc/dip_switch.h b/Source/SYSTEM/inc/dip_switch.h
new file mode 100644
index 0000000..f0415c3
--- /dev/null
+++ b/Source/SYSTEM/inc/dip_switch.h
@@ -0,0 +1,44 @@
+#ifndef _DIP_SWITCH_H_
+#define _DIP_SWITCH_H_
+
+#include "apt32f102.h"
+#include "apt32f102_gpio.h"
+
+#define DIP_PRESS               0x00         	//按键按下为低
+#define DIP_LOOSEN              0x01         	//按键松开为高
+#define DIP_DELAY_COUNT         5               //扫描次数
+#define DIP_SCAN_Time           20              //每次扫描时间
+
+typedef enum
+{
+    DIP_CH1,
+    DIP_CH2,
+    DIP_CH3,
+
+    DIP_CHN_MAX,
+}DIP_CHN_e;
+
+typedef enum
+{
+    DIP_VAL_OFF,            //松开
+    DIP_VAL_ON,             //按下
+}DIP_VAL_e;
+
+typedef struct
+{
+    U8_T delayCnt_ON[DIP_CHN_MAX];
+    U8_T delayCnt_OFF[DIP_CHN_MAX];
+	
+	U8_T addr;			//2025-06-23
+	
+    U32_T DIP_val;                    
+    U32_T DIP_last_val;
+}DIP_t;
+
+extern DIP_t g_Dip;
+
+void DIP_Switch_Init(void);
+uint8_t DIP_GetSwitchState(uint8_t i);
+void DIP_ScanTask(void);
+
+#endif
diff --git a/Source/SYSTEM/inc/eeprom.h b/Source/SYSTEM/inc/eeprom.h
new file mode 100644
index 0000000..ff187c6
--- /dev/null
+++ b/Source/SYSTEM/inc/eeprom.h
@@ -0,0 +1,72 @@
+#ifndef _EEPROM_H_
+#define _EEPROM_H_
+#include "includes.h"
+#include "apt32f102.h"
+
+/*地址范围：0x10000000~0x100007FF*/
+#define EEPROM_MCUDevInfo_Address			0x10000000				//MCU 设备信息地址固定为0x10000000，大小为0x40 此区域不可改动
+
+#define EEPROM_PARA_SaveAddr		0x10000100
+
+#define EEPROM_TOUCHPARA1_SaveAddr	0x10000200
+#define EEPROM_TOUCHPARA2_SaveAddr	0x10000280
+#define EEPROM_TOUCHPARA3_SaveAddr	0x10000300
+
+
+/*	EEPROM 保存数据格式：
+ * 		FLAG	- 1Byte		保存标志位
+ * 		LEN		- 2Byte		保存数据长度
+ * 		CHECK	- 1Byte		保存数据校验
+ * 		DATA	- nByte		保存数据内容
+ * 
+ * */
+#define EEPROM_SAVE_Flag	0xA5			//EEPROM保存标志位
+//#define EEPROM_PARA_Size	50
+#define EEPROM_Data_Offset	0x04
+
+/*boot*/
+#define EEPROM_Offset_SaveFlag		0x00
+#define EEPROM_Offset_Datalen		0x01
+#define EEPROM_Offset_Check			0x03
+#define EEPROM_Offset_Data			0x04
+
+
+#define EEPROM_SVAE_FLAG			0xAE
+#define EEPROM_DATA_Size_Max		0x40				//目前保存数据内容最长为100Byte
+#define EEPROM_PARA_Size			50
+#define EEPROM_DEV_NAME_Size		32
+
+
+#define EEPROM_WINDSTOP_OUT_Default             0        //0-10000mV
+#define EEPROM_WINDLOW_OUT_Default             	3000        //
+#define EEPROM_WINDMID_OUT_Default             	6000        //
+#define EEPROM_WINDHIGH_OUT_Default             10000        //
+#define EEPROM_Device_Addr_Default				0x01		//设备初始地址
+
+
+typedef struct{
+	
+	U8_T dev_addr;									//设备地址
+	U8_T dev_type;									//设备类型
+	U8_T dev_boot_ver;								//设备Boot的软件版本号
+	U8_T dev_app_ver;								//设备APP的软件版本号
+	U8_T dev_name_len;								//设备名称的长度
+	U8_T dev_name[EEPROM_DEV_NAME_Size];          	//设备名称
+
+}E_MCU_DEV_INFO;
+
+extern E_MCU_DEV_INFO g_mcu_dev;
+
+
+void EEPROM_Init(void);
+U8_T EEPROM_ReadPara(void);
+U8_T EEPROM_WritePara(void);
+void EEPROM_TouchPara_Printf();
+
+/*boot*/
+U8_T EEPROM_ReadMCUDevInfo(E_MCU_DEV_INFO *info);
+U8_T EEPROM_WriteMCUDevInfo(E_MCU_DEV_INFO *info);
+void EEPROM_Default_MCUDevInfo(E_MCU_DEV_INFO *info);
+void EEPROM_Validate_MCUDevInfo(E_MCU_DEV_INFO *info);
+
+#endif
diff --git a/Source/SYSTEM/inc/uart.h b/Source/SYSTEM/inc/uart.h
new file mode 100644
index 0000000..38ea3e3
--- /dev/null
+++ b/Source/SYSTEM/inc/uart.h
@@ -0,0 +1,175 @@
+#ifndef _UART_H_
+#define _UART_H_
+
+#include "apt32f102.h"
+#include "apt32f102_uart.h"
+
+#define Recv_2400_TimeOut     	3       //ms
+#define Recv_9600_TimeOut     	3       //ms
+#define Recv_115200_TimeOut   	3       //ms
+
+#define USART_BUFFER_NUM        3
+#define USART_BUFFER_SIZE       70
+#define USART_SEND_SIZE			128
+
+#define UART_SEND_BUFFER_NUM    10
+#define UART_SEND_BUFFER_SIZE   20
+
+#define UART485_TX_PIN
+#define UART485_RX_PIN			15		//PA0.15
+#define UART485_DR_PIN			7		//PA0.7
+
+#define READ_RX_LEVEL_STATE		GPIO_Read_Status(GPIOA0,UART485_RX_PIN)		//485总线RX引脚
+
+#define WRITE_HIGH_DR			GPIO_Write_High(GPIOA0,UART485_DR_PIN)		//485 DR
+#define WRITE_LOW_DR			GPIO_Write_Low(GPIOA0,UART485_DR_PIN)		//485 DR
+#define REVERISE_DR				GPIO_Reverse(GPIOA0,UART485_DR_PIN)			//485 DR
+
+#define LED_TX_PIN				0//PA0.0
+#define LED_RX_PIN				1//PA0.1
+#define LED_STATUS_PIN			4//PA0.4
+
+#define TX_LED_ON				GPIO_Write_Low(GPIOA0,LED_TX_PIN)
+#define TX_LED_OFF				GPIO_Write_High(GPIOA0,LED_TX_PIN)
+
+#define RX_LED_ON				GPIO_Write_Low(GPIOA0,LED_RX_PIN)
+#define RX_LED_OFF				GPIO_Write_High(GPIOA0,LED_RX_PIN)
+
+#define STATUS_LED_ON			GPIO_Write_Low(GPIOA0,LED_STATUS_PIN)
+#define STATUS_LED_OFF			GPIO_Write_High(GPIOA0,LED_STATUS_PIN)
+#define REVERISE_STATUS			GPIO_Reverse(GPIOA0,LED_STATUS_PIN)	
+
+
+#define UART_BUSBUSY			0x01	//总线繁忙
+#define UART_BUSIDLE			0x00	//总线空闲
+
+#define BUSSend_WaitTime1		300		//数据有效期：短按数据有效期
+#define BUSSend_WaitTime2		3000	//数据有效期：
+#define BUSSend_WaitTime3		60000	//数据有效期：
+
+#define BUSSendCnt1				1				//点按数据上报次数
+#define BUSSendCnt2				1//强电4，弱电1	//长按按下数据上报次数
+#define BUSSendCnt3				1//强电8，弱电1	//长按松开数据上报次数
+#define BUSSend_Tick			300		//数据发送间隔
+
+
+/*调试信息相关定义*/
+#ifndef DBG_LOG_EN
+#define DBG_LOG_EN           		0      //DEBUG LOG 输出总开关
+#endif
+
+/*调试信息初始状态*/
+#define DBG_OPT_Debug_STATUS        0       //临时调试信息打印开关
+#define DBG_OPT_DEVICE_STATUS       0       //设备驱动层打印调试信息打印开关
+#define DBG_OPT_SYS_STATUS          1      //系统调试信息打印开关
+
+/*调试信息输出控制位*/
+#define DBG_BIT_Debug_STATUS        2
+#define DBG_BIT_DEVICE_STATUS       1
+#define DBG_BIT_SYS_STATUS          0
+
+#if DBG_LOG_EN
+#define DBG_SendByte(data)			//UARTTxByte(UART2,data)
+//#define DBG_Printf(data,len)		UARTTransmit(UART2,data,len)
+
+#define DBG_Printf(data,len)		MCU485_SendData(data,len)
+#else 
+#define DBG_SendByte(data)			
+#define DBG_Printf					//MCU485_SendData(data,len)
+#endif	
+
+typedef U8_T (*Uart_prt)(U8_T *,U16_T);
+
+typedef enum
+{
+    UART_0,
+    UART_1,
+    UART_2,
+    UART_3,
+    UART_MAX,
+}UART_IDX;
+
+typedef enum
+{
+    BUSSEND_SUCC = 0x00,	//等待发送机会
+    BUSSEND_WAIT,			//发送成功
+    DATA_END,				//数据有效期结束
+    RETRY_END,				//重发结束
+    LEN_ERR,				//长度错误
+}BUSSEND_REV;
+
+typedef struct{
+
+    U8_T     RecvBuffer[USART_BUFFER_SIZE];
+	U8_T	 DealBuffer[USART_BUFFER_SIZE];	//数据处理缓冲
+	
+    U8_T     Receiving;
+	U16_T	 DealLen;
+	
+    U16_T    RecvLen;
+	
+    U32_T    RecvTimeout;
+    U32_T    RecvIdleTiming;
+
+    Uart_prt    processing_cf;      //处理函数指针
+}UART_t;
+
+
+typedef struct{			//总线繁忙判断
+	U8_T	SendBuffer[USART_SEND_SIZE];		//发送缓冲
+
+	U8_T    BusState_Flag;		//总线繁忙标记位，  0x01:总线繁忙，0x00:总线空闲
+	U8_T	HighBit_Flag;		//串口RX高电平标记位,默认是高电平0x01.
+	U8_T	BUSBUSY_LOCK;		//锁定总线繁忙状态	
+	
+	U8_T	SendState;			//当前发送状态	
+    U8_T	ResendCnt;			//当前发送次数
+	U8_T	ASend_Flag;			//主动上报发送标记	
+	U8_T	TotalCnt;			//发送总次数
+	U8_T	SetBaudFlag;		//设置波特率	
+	U8_T	Jump_Flag;			//跳转标志位
+	
+    U16_T	SendLen;			//发送缓冲区数据长度
+	
+	U32_T   Bus_DelayTime;		//总线繁忙转换到空闲状态的随机延时时间	
+	U32_T   DataWait_Time;   	//上报数据间隔
+	U32_T	DataValid_Time;		//上报数据有效期
+	
+	
+	U32_T	BusState_Tick;		//总线繁忙状态判断时间戳
+	U32_T	ASend_Tick;			//主动上报发送间隔判断时间戳
+	U32_T	BusbusyTimeout;		//上报数据有效期判断时间戳
+	
+}MULIT_t;
+
+
+extern  MULIT_t m_send;
+extern UART_t g_uart;
+extern U32_T Dbg_Switch;
+
+
+extern volatile int RS485_Comm_Flag,RS485_Comm_Start,RS485_Comm_End,RS485_Comming;
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf);
+void UART0_RecvINT_Processing(char data);
+void UART0_TASK(void);
+void UART1_RecvINT_Processing(char data);
+void UART1_TASK(void);
+void UART2_RecvINT_Processing(char data);
+void UART2_TASK(void);
+void MCU485_SendData(U8_T *buff,U16_T len);
+
+void Dbg_Print(int DbgOptBit, const char *cmd, ...);
+void Dbg_Println(int DbgOptBit, const char *cmd, ...);
+void Dbg_Print_Buff(int DbgOptBit, const char *cmd, U8_T *buff,U16_T len);
+
+void BusIdle_Task(void);
+void BusBusy_Task(void);
+void BUS485Send_Task(void);
+U8_T MultSend_Task(U8_T *buff,U16_T len,U8_T DatSd);
+U8_T BUS485_Send(U8_T *buff,U16_T len);
+void Set_GroupSend(U8_T *data,U16_T sled,U8_T SCnt,U32_T indate,U32_T tim_val);
+void Clear_SendFlag(void);
+void BUS485_Jump_Boot(U8_T jump);
+
+#endif
diff --git a/Source/SYSTEM/uart.c b/Source/SYSTEM/uart.c
new file mode 100644
index 0000000..9b14b87
--- /dev/null
+++ b/Source/SYSTEM/uart.c
@@ -0,0 +1,568 @@
+#include "includes.h"
+#include <string.h>
+#include <stdarg.h>
+
+/**
+ * BLV_C8_PB 串口使用情况
+ * 	UART1 用与RCU进行双向通讯		115200  -> 对应设置 416
+ * 	UART0 用于PB数据发送，没有接收	9600	-> 对应设置 5000
+ * */
+
+UART_t g_uart;		//空间不足，只能用一个串口
+UART_t g_uart1;		//空间不足，只能用一个串口
+MULIT_t m_send;	
+
+
+void UARTx_Init(UART_IDX uart_id, Uart_prt prt_cf) {
+	switch((U8_T)uart_id){
+		case UART_0:
+			UART0_DeInit();                                               //clear all UART Register
+			UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+//			UARTInit(UART0,5000,UART_PAR_NONE);							  //baudrate=sysclock 48M/1000=4800
+			
+			UARTInitRxTxIntEn(UART0,5000,UART_PAR_NONE);				  //baudrate=sysclock 48M/1000=4800,tx rx int enabled 
+			//UART0_Int_Enable();
+			
+			break;
+		case UART_1:
+			memset(&g_uart1,0,sizeof(UART_t));
+			memset(&m_send,0,sizeof(MULIT_t));
+	
+			g_uart1.RecvTimeout = Recv_9600_TimeOut;
+			g_uart1.processing_cf = prt_cf;
+			
+			m_send.BusState_Tick = SysTick_1ms;
+			m_send.HighBit_Flag = 0x01;			
+		
+			//串口1-RX接收中断，用于串口2的通讯总线繁忙状态判断，2025-04-16
+			GPIO_PullHigh_Init(GPIOA0,15);		
+			GPIO_IntGroup_Set(PA0,15,Selete_EXI_PIN15); 					//EXI0 set PB0.2
+			GPIOA0_EXI_Init(EXI15); 										//PB0.2 as input
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIFT); 					//ENABLE falling edge
+			EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIRT);
+			EXTI_interrupt_CMD(ENABLE,EXI_PIN15); 						//enable EXI
+			GPIO_EXTI_interrupt(GPIOA0,0b1000000000000000); 			//enable GPIOB02 as EXI
+			EXI4_Int_Enable(); 			
+		
+	
+			UART1_DeInit();                                                 //clear all UART Register
+			UART_IO_Init(IO_UART1,2);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+			//UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+			UARTInitRxTxIntEn(UART1,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+			UART1_Int_Enable();
+			
+			GPIO_Init(GPIOA0,LED_TX_PIN,Output);
+			GPIO_Init(GPIOA0,LED_RX_PIN,Output);			
+			GPIO_Init(GPIOA0,LED_STATUS_PIN,Output);
+			
+			TX_LED_OFF;
+			RX_LED_OFF;
+			STATUS_LED_ON;
+			//485使能引脚初始化
+			GPIO_Init(GPIOA0,UART485_DR_PIN,Output);
+			GPIO_DriveStrength_EN(GPIOA0,UART485_DR_PIN);
+			WRITE_LOW_DR;
+	
+			break;
+		case UART_2:
+			UART2_DeInit();                                                 //clear all UART Register
+			UART_IO_Init(IO_UART2,2);                                    	//use PB0.4->RXD1, PB0.5->TXD1
+			//UARTInit(UART2,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+			
+			UARTInitRxTxIntEn(UART2,5000,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+			//CSP_UART_SET_CTRL(UART2,UART_TX_DONE_INT);
+			UART2_Int_Enable();
+			
+
+//			//485使能引脚初始化
+//			GPIO_Init(GPIOB0,3,Output);
+//			GPIO_DriveStrength_EN(GPIOB0,3);
+//			GPIO_Write_Low(GPIOB0,3);
+
+			break;
+	}
+}
+
+
+/*******************************************************************************
+* Function Name  : UART0_RecvINT_Processing 
+* Description    : 串口0 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART0_RecvINT_Processing(char data){
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+	g_uart.Receiving = 0x01;
+}
+
+void UART0_TASK(void){
+	U8_T rev = 0xFF;
+	if(g_uart.Receiving == 0x01){
+		if(SysTick_1ms - g_uart.RecvIdleTiming > g_uart.RecvTimeout){
+			g_uart.RecvIdleTiming = SysTick_1ms;
+
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART0 recv Len %d", g_uart.RecvLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART0 buff",g_uart.RecvBuffer,g_uart.RecvLen);
+			
+			if(g_uart.processing_cf != NULL){
+                rev = g_uart.processing_cf(g_uart.RecvBuffer,g_uart.RecvLen);
+            }
+
+            g_uart.RecvLen = 0;
+            g_uart.Receiving = 0;
+		}
+	}
+}
+
+
+/*******************************************************************************
+* Function Name  : UART1_RecvINT_Processing 
+* Description    : 串口1 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART1_RecvINT_Processing(char data){
+	if((g_uart1.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart1.RecvLen = 0;
+	g_uart1.RecvBuffer[g_uart1.RecvLen++] = (U8_T)data;
+	
+	g_uart1.RecvIdleTiming = SysTick_1ms;
+	g_uart1.Receiving = 0x01;
+	
+	RX_LED_ON;
+}
+
+void UART1_TASK(void){
+	U8_T rev = 0xFF;	
+	if(g_uart1.Receiving == 0x01){
+		if(SysTick_1ms - g_uart1.RecvIdleTiming > g_uart1.RecvTimeout){
+			
+			SYSCON_Int_Disable();					//2025-03-19,复制接收缓冲到数据处理缓冲内
+			g_uart1.RecvIdleTiming = SysTick_1ms;
+			memcpy(g_uart1.DealBuffer,g_uart1.RecvBuffer,g_uart1.RecvLen);
+			g_uart1.DealLen = g_uart1.RecvLen;
+			g_uart1.RecvLen = 0;
+			g_uart1.Receiving = 0;
+			SYSCON_Int_Enable();
+
+#if DBG_LOG_EN
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART1 recv Len %d", g_uart1.DealLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART1 buff",g_uart1.DealBuffer,g_uart1.DealLen);
+#endif
+			if(g_uart1.processing_cf != NULL){
+                rev = g_uart1.processing_cf(g_uart1.DealBuffer,g_uart1.DealLen);
+            }
+
+
+			RX_LED_OFF;
+			memset(g_uart1.DealBuffer,0,USART_BUFFER_SIZE);	
+		}
+	}
+}
+
+/*******************************************************************************
+* Function Name  : UART2_RecvINT_Processing 
+* Description    : 串口2 接收中断处理函数 - 接收中断调用
+*******************************************************************************/
+void UART2_RecvINT_Processing(char data){
+	if((g_uart.RecvLen + 1) >= USART_BUFFER_SIZE) g_uart.RecvLen = 0;
+	g_uart.RecvBuffer[g_uart.RecvLen++] = (U8_T)data;
+	
+	g_uart.RecvIdleTiming = SysTick_1ms;
+	g_uart.Receiving = 0x01;
+}
+
+void UART2_TASK(void){
+	U8_T rev = 0xFF;
+	if(g_uart.Receiving == 0x01){
+		if(SysTick_1ms - g_uart.RecvIdleTiming > g_uart.RecvTimeout){
+			
+			SYSCON_Int_Disable();					//2025-03-19,复制接收缓冲到数据处理缓冲内
+			g_uart.RecvIdleTiming = SysTick_1ms;
+			memcpy(g_uart.DealBuffer,g_uart.RecvBuffer,g_uart.RecvLen);
+			g_uart.DealLen = g_uart.RecvLen;
+			g_uart.RecvLen = 0;
+			g_uart.Receiving = 0;
+			SYSCON_Int_Enable();
+
+#if DBG_LOG_EN
+			Dbg_Println(DBG_BIT_SYS_STATUS, "UART2 recv Len %d", g_uart.DealLen);
+			Dbg_Print_Buff(DBG_BIT_SYS_STATUS,"UART2 buff",g_uart.DealBuffer,g_uart.DealLen);
+#endif
+			if(g_uart.processing_cf != NULL){
+                rev = g_uart.processing_cf(g_uart.DealBuffer,g_uart.DealLen);
+            }
+			
+			memset(g_uart.DealBuffer,0,USART_BUFFER_SIZE);	
+		}
+	}
+}
+
+
+/*因为开启了UART_TX_DONE_S 中断，发送完成需要清楚该中断标志位，因此每次调用串口输出后，需调用该函数，否则会在中断出不来
+ * 已取消
+ * */
+void UART_Waiting_For_Send(CSP_UART_T *uart){
+	unsigned int Dataval = 0,delay_cnt = 0;
+	
+	do{
+		Dataval = CSP_UART_GET_ISR(uart);
+		
+		Dataval = Dataval & UART_TX_DONE_S;
+		delay_cnt ++;
+		if(delay_cnt >= 50000){
+			break;
+		}
+	}while(Dataval == 0x00);    //发送完成
+	uart->ISR=UART_TX_DONE_S;
+}
+
+volatile int RS485_Comm_Flag = 0,RS485_Comm_Start = 0,RS485_Comm_End = 0,RS485_Comming = 0;
+void MCU485_SendData(U8_T *buff,U16_T len){
+	unsigned int Dataval = 0,delay_cnt = 0;
+
+	//等待通讯发送完成
+	while(RS485_Comming == 0x01){
+		delay_nus(100);
+		
+		delay_cnt ++;
+		if(delay_cnt >= 100){
+			break;
+		}
+
+		REVERISE_DR;//GPIO_Reverse(GPIOA0,7);
+	}
+	
+	CK_CPU_DisAllNormalIrq();
+
+	WRITE_HIGH_DR;	//GPIO_Write_High(GPIOA0,7);
+	
+	RS485_Comm_Flag = 0x01;
+	RS485_Comm_Start = 0x00;
+	RS485_Comm_End = 0x00;
+	CK_CPU_EnAllNormalIrq();
+	
+	UARTTransmit(UART1,buff,len);
+	
+	do{
+		delay_nus(100);
+		
+		delay_cnt ++;
+		if(delay_cnt >= 100){
+			break;
+		}
+		
+	}while((RS485_Comm_Start < len) || (RS485_Comm_End < len));    //发送完成
+
+	CK_CPU_DisAllNormalIrq();
+	WRITE_LOW_DR;	//GPIO_Write_Low(GPIOA0,7);
+	
+	RS485_Comm_Flag = 0x00;
+	CK_CPU_EnAllNormalIrq();
+}
+
+/**********************************************************
+ * @brief	带总线状态判断的485发送
+ * 			buff:发送数据
+ * 			len：数据长度
+ * @retval 	
+ * */
+U8_T BUS485_Send(U8_T *buff,U16_T len)
+{
+	unsigned int Dataval = 0,delay_cnt = 0;
+
+	//等待通讯发送完成
+	while(RS485_Comming == 0x01){
+		delay_nus(100);
+		
+		delay_cnt ++;
+		if(delay_cnt >= 100){
+			break;
+		}
+		
+		REVERISE_DR;	//485_DR
+	}
+
+	if(m_send.BusState_Flag == UART_BUSIDLE){	//总线空闲
+		
+		TX_LED_ON;
+		CK_CPU_DisAllNormalIrq();	
+		
+		WRITE_HIGH_DR;	//485_DR
+		
+		RS485_Comm_Flag = 0x01;
+		RS485_Comm_Start = 0x00;
+		RS485_Comm_End = 0x00;		
+		
+		m_send.BusState_Flag = UART_BUSBUSY;//发送前总线置位繁忙
+		m_send.BUSBUSY_LOCK = 0x01;			//锁定总线状态
+
+		CK_CPU_EnAllNormalIrq();		
+		
+		UARTTransmit(UART1,buff,len);
+		do{
+			delay_nus(100);
+			delay_cnt ++;
+			if(delay_cnt >= 100){
+				break;
+			}
+			
+		}while((RS485_Comm_Start < len) || (RS485_Comm_End < len));    //发送完成
+
+		CK_CPU_DisAllNormalIrq();	
+
+		WRITE_LOW_DR;	//485_DR
+		
+		RS485_Comm_Flag = 0x00;			
+		
+		m_send.BusState_Tick = SysTick_1ms;
+		m_send.BUSBUSY_LOCK = 0x00;			//解锁总线状态
+		
+		CK_CPU_EnAllNormalIrq();			
+		
+		TX_LED_OFF;
+		
+		return UART_BUSIDLE;	//发送成功
+	}
+	else 	//总线繁忙
+	{ 		
+		return UART_BUSBUSY;	//发送失败
+	}	
+	
+	return 0x02;		//传入状态无效
+}
+
+/**********************************************************
+ * @brief	重发、数据有效期、超时发送判断，2025-03-25
+ * 			buff:发送数据
+ * 			len：数据长度
+ * 			DatSd：发送标记,0x00:无发送，0x01：有数据发送
+ * 
+ * @retval 	0x00:发送成功	0x01:等待发送	0x02:数据无效
+ * */
+U8_T MultSend_Task(U8_T *buff,U16_T len,U8_T DatSd)
+{
+	if( (len == 0)||(len > USART_SEND_SIZE) ) return LEN_ERR;
+	
+	if(DatSd == 0x01)	
+	{
+		if( m_send.ResendCnt < m_send.TotalCnt)	//判断数据是否还在有效期，是否还有发送次数
+		{
+			if(SysTick_1ms - m_send.BusbusyTimeout < m_send.DataValid_Time)
+			{
+				if((m_send.ResendCnt == 0x00)||(SysTick_1ms - m_send.ASend_Tick >= m_send.DataWait_Time)){//数据发送间隔
+					if(BUS485_Send(buff,len) == UART_BUSIDLE){	//发送数据
+						m_send.ASend_Tick = SysTick_1ms;
+						m_send.ResendCnt++;
+						Dbg_Println(DBG_BIT_Debug_STATUS,"SendCnt:%d success",m_send.ResendCnt);
+						return BUSSEND_SUCC;//数据发送成功
+					}
+				}
+			}else{
+				Dbg_Println(DBG_BIT_Debug_STATUS,"data end");
+				return DATA_END;//数据有效期结束
+			}
+		}else{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"retry end,%d",m_send.ResendCnt );
+			return RETRY_END;//没有重发次数
+		}
+	}
+	return BUSSEND_WAIT;//等待
+}
+/**********************************************************
+ * @brief	设置发送标志、组包、选择数据有效期档位，2025-03-25
+ * 			data : 		发送数据
+ * 			sled ：		数据长度
+ * 			SCnt :		设置数据发送次数
+ * 			indate ：	设置数据有效期
+ * 			tim_val :	发送时间间隔
+ * @retval 	None
+ * */
+void Set_GroupSend(U8_T *data,U16_T sled,U8_T SCnt,U32_T indate,U32_T tim_val)
+{
+	if((sled == 0x00)|| (sled > USART_SEND_SIZE)) return;
+	
+	memset(m_send.SendBuffer,0, USART_SEND_SIZE);
+	memcpy(m_send.SendBuffer,data,sled);
+	m_send.SendLen = sled;
+	
+	m_send.DataValid_Time = indate;//数据有效期
+	m_send.TotalCnt = SCnt;			//数据发送次数
+	m_send.DataWait_Time = tim_val;//发送数据间隔
+	
+	m_send.ASend_Flag = 0x01;
+	m_send.SendState = BUSSEND_WAIT;
+	m_send.ResendCnt = 0x00;
+	m_send.BusbusyTimeout = SysTick_1ms;
+}
+//清除发送标志
+void Clear_SendFlag(void)
+{
+	m_send.ASend_Flag = 0x00;
+	m_send.SendState = BUSSEND_SUCC;
+}
+
+void BUS485_Jump_Boot(U8_T jump)
+{
+	m_send.Jump_Flag = jump;
+}
+
+//485发送任务
+void BUS485Send_Task(void)	//2025-03-29
+{	
+	//空闲等待
+	if(m_send.ASend_Flag == 0x01)
+	{
+		m_send.SendState = MultSend_Task(m_send.SendBuffer,m_send.SendLen,m_send.ASend_Flag);
+		
+		if( (m_send.SendState == DATA_END)||(m_send.SendState == RETRY_END) )//判断发送数据是否有效
+		{
+			Dbg_Println(DBG_BIT_Debug_STATUS,"send end");
+			
+			m_send.ASend_Flag = 0x00;		//清除发送标志位
+
+		}
+	}
+}
+//获取当前BUS485 发送状态，获取完状态后清除当前状态
+U8_T Get_BUS485_Send_State(void)
+{
+	U8_T rev_state = 0x0F;
+	
+	if(m_send.ASend_Flag == 0x01){
+		
+		rev_state |= 0x80;
+	}
+	
+	rev_state |= (m_send.SendState & 0x0F);
+	
+	return rev_state;
+}
+/**********************************************************
+ * @brief	2025-03-25，检测总线空闲，在定时器中断里调用
+ * @retval 	None
+ * */
+void BusIdle_Task(void)
+{
+	if((m_send.BusState_Flag != UART_BUSIDLE)&&(m_send.BUSBUSY_LOCK != 0x01))
+	{
+		CK_CPU_DisAllNormalIrq();
+		if( (m_send.HighBit_Flag == 0x01)&&(SysTick_1ms - m_send.BusState_Tick >= (6 + m_send.Bus_DelayTime)) )
+		{
+			m_send.BusState_Flag = UART_BUSIDLE;
+		}	
+		CK_CPU_EnAllNormalIrq();
+	}
+}
+/*******************************************************************
+ * @brief	检测总线繁忙，在串口接收RX引脚的外部中断服务函数里调用
+ * @retval 	None
+ * */
+void BusBusy_Task(void)
+{
+	CK_CPU_DisAllNormalIrq();
+	m_send.BusState_Flag = UART_BUSBUSY;
+	m_send.BusState_Tick = SysTick_1ms;
+	m_send.Bus_DelayTime = (SysTick_1ms - m_send.ASend_Tick)%10;//随机延时
+
+	if(READ_RX_LEVEL_STATE == 0x01){
+		m_send.HighBit_Flag = 0x01;			//高电平标志置位
+	}else if(READ_RX_LEVEL_STATE == 0x00){
+		m_send.HighBit_Flag = 0x00;			//低电平
+	}	
+	CK_CPU_EnAllNormalIrq();
+}
+
+
+/*调试信息输出接口*/
+
+U32_T Dbg_Switch = (DBG_OPT_Debug_STATUS << DBG_BIT_Debug_STATUS)
+        + (DBG_OPT_DEVICE_STATUS << DBG_BIT_DEVICE_STATUS)
+        + (DBG_OPT_SYS_STATUS << DBG_BIT_SYS_STATUS);
+	
+#if DBG_LOG_EN
+
+char Dbg_Buffer[150] = {0};
+U32_T SysTick_Now = 0, SysTick_Last = 0, SysTick_Diff = 0;
+
+#endif
+
+void Dbg_Print(int DbgOptBit, const char *cmd, ...){
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+        SysTick_Now = SysTick_1ms;
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+        SysTick_Last = SysTick_Now;
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer),"%8d [%6d]: ", SysTick_Now, SysTick_Diff);
+		DBG_Printf(Dbg_Buffer,str_offset);
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+		
+    }
+
+#endif	
+}
+
+void Dbg_Println(int DbgOptBit, const char *cmd, ...){
+
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+        SysTick_Now = SysTick_1ms;
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+        SysTick_Last = SysTick_Now;
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+		DBG_Printf(Dbg_Buffer,str_offset);
+		
+        va_list args;       	//定义一个va_list类型的变量，用来储存单个参数
+        va_start(args, cmd); 	//使args指向可变参数的第一个参数
+        str_offset = vsnprintf(Dbg_Buffer, sizeof(Dbg_Buffer) ,cmd, args);  //必须用vprintf等带V的
+        va_end(args);       	//结束可变参数的获取
+        
+		DBG_Printf(Dbg_Buffer,str_offset);
+		
+		DBG_Printf("\r\n",2);
+		
+		
+    }
+
+#endif	
+}
+
+
+void Dbg_Print_Buff(int DbgOptBit, const char *cmd, U8_T *buff,U16_T len){
+#if DBG_LOG_EN
+	U16_T str_offset = 0;
+
+	if (Dbg_Switch & (1 << DbgOptBit)) {
+        SysTick_Now = SysTick_1ms;
+        SysTick_Diff = SysTick_Now - SysTick_Last;      //上一次打印时间差
+        SysTick_Last = SysTick_Now;
+        str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%8ld [%6ld]: ", SysTick_Now, SysTick_Diff);
+		DBG_Printf(Dbg_Buffer,str_offset);
+		
+        for (uint32_t i = 0; i < len; i++) {
+			str_offset = snprintf(Dbg_Buffer, sizeof(Dbg_Buffer) , "%02X ", buff[i]);
+            DBG_Printf(Dbg_Buffer,str_offset);
+        }
+		
+		DBG_Printf("\r\n",2);
+    }
+
+#endif	
+}
+
+
+
+
+
+
+
+
diff --git a/Source/arch/apt32f102_iostring.c b/Source/arch/apt32f102_iostring.c
new file mode 100644
index 0000000..71147a1
--- /dev/null
+++ b/Source/arch/apt32f102_iostring.c
@@ -0,0 +1,143 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_iostring.c
+  * @author  APT AE Team
+  * @version V1.00
+  * @date    2020/05/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+/******************************************************************************
+* Include Files
+******************************************************************************/
+#include "apt32f102.h"
+#include "apt32f102_uart.h"
+#include "stdarg.h"
+#include "stddef.h"
+#include "stdio.h"
+#define LDCC_DATA_P 		0xe001105c /* LDCC Register. */
+#define LDCC_BIT_STATUS 	0x80000000 /* LDCC Status bit. */
+//#define _debug_uart_io
+/******************************************************************************
+* Main code
+******************************************************************************/
+void __putchar__ (char ch) 
+{
+#ifdef _debug_uart_io
+	//UARTTxByte(UART0,s);			//uart 0
+	UARTTxByte(UART1,s);			//uart 1
+#else
+	//select debug serial Pane
+	volatile unsigned int *pdata = (unsigned int *)LDCC_DATA_P;
+	while (*pdata & LDCC_BIT_STATUS);	//Waiting for data read.
+	*pdata = ch;
+#endif
+}
+
+int *myitoa(int value, int* string, int radix)
+{
+
+		int tmp[33];
+		int* tp = tmp;
+		int i;
+		unsigned v;
+		int sign;
+		int* sp;
+		
+		if (radix > 36 || radix <= 1)
+		{
+			return 0;
+		}
+		
+		sign = (radix == 10 && value < 0);
+		if (sign)
+		v = -value;
+		else
+		v = (unsigned)value;
+		while (v || tp == tmp)
+		{
+			i = v % radix;
+			v = v / radix;
+			if (i < 10) {
+			*tp++ = i+'0';
+			
+			} else {
+			*tp++ = i + 'a' - 10;
+			
+			}
+					
+		}
+		
+		sp = string;
+		
+		if (sign)
+		*sp++ = '-';
+		while (tp > tmp)
+		*sp++ = *--tp;
+		*sp = 0;
+		return string;
+}
+
+
+void my_printf(const char *fmt, ...)
+{
+
+//    const char *s;
+	const int *s;
+    int d;
+    //char ch, *pbuf, buf[16];
+	char ch, *pbuf;
+	int buf[16];
+    va_list ap;
+    va_start(ap, fmt);
+    while (*fmt) {
+        if (*fmt != '%') {
+              __putchar__(*fmt++);
+            continue;
+        }
+        switch (*++fmt) {
+            case 's':
+                s = va_arg(ap, const int *);
+                for ( ; *s; s++) {
+                 __putchar__(*s);
+                }
+                break;
+            case 'd':
+                d = va_arg(ap, int);
+                myitoa(d, buf, 10);
+                for (s = buf; *s; s++) {
+                 __putchar__(*s);
+                }
+                break;
+                
+            case 'x':
+            case 'X':
+                d = va_arg(ap, int);
+                myitoa(d, buf, 16);
+                for (s = buf; *s; s++) {
+                 __putchar__(*s);
+                }
+                break;                
+            // Add other specifiers here...
+            case 'c':
+            case 'C':
+            	ch = (unsigned char)va_arg(ap, int);
+        	    pbuf = &ch;
+            	__putchar__(*pbuf);
+                break;
+            default:  
+                __putchar__(*fmt);
+                break;
+        }
+        fmt++;
+    }
+    va_end(ap);
+}
+
diff --git a/Source/arch/apt32f102a.svc b/Source/arch/apt32f102a.svc
new file mode 100644
index 0000000..e6d8764
--- /dev/null
+++ b/Source/arch/apt32f102a.svc
@@ -0,0 +1,3453 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<com.csky.cds.peripheral>
+  <config Version="1.0">
+    <Peripheral Name="IFC">
+      <Register Name="IFC_IDR" Authority="RW" Address="0x40010000" Width="32" Description="闪存控制器ID寄存器">
+        <Bit Name="IDCODE" Authority="RW" Bits="23-0" Description="ID代码 (0x32f102)" />
+      </Register>
+      <Register Name="IFC_CEDR" Authority="RW" Address="0x40010004" Width="32" Description="时钟使能/禁止寄存器">
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="时钟使能/禁止寄存器&#xD;&#xA;&#xD;&#xA;0: 禁止闪存控制器的时钟&#xD;&#xA;1: 使能闪存控制器的时钟&#xD;&#xA;&#xD;&#xA;软件复位 (IFC_SRR)不会影响CLKEN的状态" />
+      </Register>
+      <Register Name="IFC_SRR" Authority="RW" Address="0x40010008" Width="32" Description="软件复位寄存器">
+        <Bit Name="SWRST" Authority="RW" Bits="0" Description="软件复位&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 执行软件复位操作&#xD;&#xA;&#xD;&#xA;除CEDR外的所有寄存器都会恢复初始值" />
+      </Register>
+      <Register Name="IFC_CMR" Authority="RW" Address="0x4001000c" Width="32" Description="指令寄存器">
+        <Bit Name="PROT" Authority="RW" Bits="20-16" Description="保护功能选择寄存器&#xD;&#xA;[20] : ENCRYPT&#xD;&#xA;[19] : SWDP&#xD;&#xA;[18] : RDP&#xD;&#xA;[17] : HDP_FULL&#xD;&#xA;[16] : HDP_4K&#xD;&#xA;&#xD;&#xA;在CMD的写User Option命令中，使用PROT位来选择保护功能的使能，将相应位置1表示使能该项保护功能。" />
+        <Bit Name="HMODE" Authority="RW" Bits="9-8" Description="操作模式寄存器&#xD;&#xA;00: 普通模式&#xD;&#xA;01: 用户特权模式&#xD;&#xA;10: 保留&#xD;&#xA;11: 保留&#xD;&#xA;在普通模式下，只有页擦除和写操作有效。其它指令都必须在用户特权模式下执行。" />
+        <Bit Name="CMD" Authority="RW" Bits="3-0" Description="写/擦除指令寄存器&#xD;&#xA;&#xD;&#xA;CMD[3:0]	指令&#xD;&#xA;0x1	写操作&#xD;&#xA;0x2	页擦除 (Page Erase)&#xD;&#xA;0x3	保留，禁止使用&#xD;&#xA;0x4	片擦除 (Chip Erase)&#xD;&#xA;0x5	自定义选项擦除&#xD;&#xA;0x6	预编程设定&#xD;&#xA;0x7	页缓存清除&#xD;&#xA;0x8 – 0xC	保留，禁止使用&#xD;&#xA;0xD	禁用调试口重映射 (SWD Remap)&#xD;&#xA;0xE	使能调试口重映射 (SWD Remap)&#xD;&#xA;0xF	写User Option操作&#xD;&#xA;&#xD;&#xA;注意：&#xD;&#xA;1. 当执行ISP操作时，禁止读取闪存内容&#xD;&#xA;2. 当操作完成后，IFC_CMR寄存器会自动清零&#xD;&#xA;3. 如果IFC_KR的秘钥值不对，那么指令不会被执行" />
+      </Register>
+      <Register Name="IFC_CR" Authority="RW" Address="0x40010010" Width="32" Description="控制寄存器">
+        <Bit Name="START" Authority="RW" Bits="0" Description="操作启动位&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 根据CMR设置的值开始执行指令&#xD;&#xA;&#xD;&#xA;注意：&#xD;&#xA;1. 当操作完成后，START位会被自动清零&#xD;&#xA;2. 指令的执行过程中，禁止对这位再进行写操作" />
+      </Register>
+      <Register Name="IFC_MR" Authority="RW" Address="0x40010014" Width="32" Description="工作模式寄存器">
+        <Bit Name="SPEED" Authority="RW" Bits="16" Description="FLASH IP速度模式选择&#xD;&#xA;&#xD;&#xA;0: 低速模式&#xD;&#xA;1: 高速模式" />
+        <Bit Name="WAIT" Authority="RW" Bits="2-0" Description="闪存读等待周期&#xD;&#xA;&#xD;&#xA;0: 闪存读取中等待0个周期&#xD;&#xA;n: 闪存读取中等待n个周期" />
+      </Register>
+      <Register Name="IFC_FM_ADDR" Authority="RW" Address="0x40010018" Width="32" Description="ISP地址寄存器">
+        <Bit Name="FM_ADDR" Authority="RW" Bits="31-0" Description="ISP地址寄存器&#xD;&#xA;&#xD;&#xA;写操作和页擦除操作中的目标闪存地址&#xD;&#xA;&#xD;&#xA;注意：&#xD;&#xA;1. 操作完成后，这个寄存器会自动清零。&#xD;&#xA;2. 除了写操作和页擦除操作，其它指令执行时都不需要设置该寄存器" />
+      </Register>
+      <Register Name="IFC_KR" Authority="RW" Address="0x40010020" Width="32" Description="ISP秘钥寄存器">
+        <Bit Name="KEY" Authority="RW" Bits="31-0" Description="ISP安全秘钥寄存器&#xD;&#xA;&#xD;&#xA;秘钥寄存器用来保证ISP操作的安全，必须将该寄存器写0x5A5A_5A5A，所有闪存控制器的指令才会被执行。该寄存器在ISP操作完成后会被自动清零。 " />
+      </Register>
+      <Register Name="IFC_IMCR" Authority="RW" Address="0x40010024" Width="32" Description="中断控制寄存器">
+        <Bit Name="OVW_ERR" Authority="RW" Bits="15" Description="非法操作错误中断使能/禁止&#xD;&#xA;当ISP操作正在进行时，尝试修改CMD，FM_ADDR，FM_DR，START寄存器&#xD;&#xA;0: 禁止中断&#xD;&#xA;1: 使能中断" />
+        <Bit Name="ADDR_ERR" Authority="RW" Bits="14" Description="" />
+        <Bit Name="UDEF_ERR" Authority="RW" Bits="13" Description="未定义指令错误中断使能/禁止&#xD;&#xA;CMD中定义的操作指令非法或者不允许在当前模式中执行&#xD;&#xA;&#xD;&#xA;0: 禁止中断&#xD;&#xA;1: 使能中断" />
+        <Bit Name="PROT_ERR" Authority="RW" Bits="12" Description="保护错误中断使能/禁止&#xD;&#xA;当硬件保护锁使能，仍然进行写操作或擦除操作&#xD;&#xA;&#xD;&#xA;0: 禁止中断&#xD;&#xA;1: 使能中断" />
+        <Bit Name="PEP_END" Authority="RW" Bits="2" Description="预编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 禁止中断&#xD;&#xA;1: 使能中断" />
+        <Bit Name="PGM_END" Authority="RW" Bits="1" Description="编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 禁止中断&#xD;&#xA;1: 使能中断" />
+        <Bit Name="ERS_END" Authority="RW" Bits="0" Description="擦除指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 禁止中断&#xD;&#xA;1: 使能中断" />
+      </Register>
+      <Register Name="IFC_RISR" Authority="RW" Address="0x40010028" Width="32" Description="中断原始状态寄存器">
+        <Bit Name="OVW_ERR" Authority="RO" Bits="15" Description="非法操作错误中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+        <Bit Name="ADDR_ERR" Authority="RO" Bits="14" Description="地址错误中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+        <Bit Name="UDEF_ERR" Authority="RO" Bits="13" Description="未定义指令错误中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+        <Bit Name="PROT_ERR" Authority="RO" Bits="12" Description="保护错误中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+        <Bit Name="PEP_END" Authority="RO" Bits="2" Description="预编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+        <Bit Name="PGM_END" Authority="RO" Bits="1" Description="编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+        <Bit Name="ERS_END" Authority="RO" Bits="0" Description="擦除指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该状态没有发生&#xD;&#xA;1: 该状态发生" />
+      </Register>
+      <Register Name="IFC_MISR" Authority="RW" Address="0x4001002c" Width="32" Description="中断状态寄存器">
+        <Bit Name="OVW_ERR" Authority="RO" Bits="15" Description="非法操作错误中断的状态&#xD;&#xA;&#xD;&#xA;0: 该中断没有发生&#xD;&#xA;1: 该中断发生" />
+        <Bit Name="ADDR_ERR" Authority="RO" Bits="14" Description="" />
+        <Bit Name="UDEF_ERR" Authority="RO" Bits="13" Description="未定义指令错误中断的状态&#xD;&#xA;&#xD;&#xA;0: 该中断没有发生&#xD;&#xA;1: 该中断发生" />
+        <Bit Name="PROT_ERR" Authority="RO" Bits="12" Description="保护错误中断的状态&#xD;&#xA;&#xD;&#xA;0: 该中断没有发生&#xD;&#xA;1: 该中断发生" />
+        <Bit Name="PEP_END" Authority="RO" Bits="2" Description="预编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该中断没有发生&#xD;&#xA;1: 该中断发生" />
+        <Bit Name="PGM_END" Authority="RO" Bits="1" Description="编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该中断没有发生&#xD;&#xA;1: 该中断发生" />
+        <Bit Name="ERS_END" Authority="RO" Bits="0" Description="擦除指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 该中断没有发生&#xD;&#xA;1: 该中断发生" />
+      </Register>
+      <Register Name="IFC_ICR" Authority="RW" Address="0x40010030" Width="32" Description="中断状态清除寄存器">
+        <Bit Name="OVW_ERR" Authority="RW" Bits="15" Description="非法操作错误中断状态清除&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+        <Bit Name="ADDR_ERR" Authority="RW" Bits="14" Description="地址错误中断状态清除&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+        <Bit Name="UDEF_ERR" Authority="RW" Bits="13" Description="未定义指令错误中断状态清除&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+        <Bit Name="PROT_ERR" Authority="RW" Bits="12" Description="保护错误中断状态清除&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+        <Bit Name="PEP_END" Authority="RW" Bits="2" Description="预编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+        <Bit Name="PGM_END" Authority="RW" Bits="1" Description="编程指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+        <Bit Name="ERS_END" Authority="RW" Bits="0" Description="擦除指令执行完成中断的原始状态&#xD;&#xA;&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除中断" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="SYSCON">
+      <Register Name="SYSCON_IDCCR" Authority="RW" Address="0x40011000" Width="32" Description="ID和控制器模块时钟控制寄存器">
+        <Bit Name="IDCODE/ID_KEY" Authority="RW" Bits="31-16" Description="对当前寄存器进行写入时，必须同时写入正确KEY值。只有在ID_KEY等于0xE11E时，写入才有效。" />
+        <Bit Name="IDCODE" Authority="RO" Bits="15-8" Description="读取时，返回ID CODE（IP版本信息）" />
+        <Bit Name="SWRST" Authority="RW" Bits="7" Description="SYSCON产生软件复位。效果和CPU通过软复位指令产生软件复位一致。&#xD;&#xA;0h：没有效果。&#xD;&#xA;1h：执行软件复位。" />
+        <Bit Name="CPUFTRST" Authority="RW" Bits="4-1" Description="CPU Fault发生时硬件触发系统复位使能控制位。（可由User Option加载复位缺省值）&#xD;&#xA;Other：禁止CPU Fault时硬件触发复位。&#xD;&#xA;Ah：   使能CPU Fault时硬件触发复位。" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="使能或禁止SYSCON模块的PCLK时钟。&#xD;&#xA;0h：禁止SYSCON模块的时钟。&#xD;&#xA;1h：使能SYSCON模块的时钟。" />
+      </Register>
+      <Register Name="SYSCON_GCER" Authority="RW" Address="0x40011004" Width="32" Description="通用使能控制寄存器">
+        <Bit Name="EMO_CMRST" Authority="RW" Bits="19" Description="在EMO_CKM功能使能后，使能或禁止外部EMOSC失效复位。（缺省使能）&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止EMOSC失效产生系统复位。当禁止产生系统复位时，EMOSC失效后，会自动切换系统时钟到IMOSC上。" />
+        <Bit Name="EMO_CKM" Authority="RW" Bits="18" Description="使能或禁止外部EMOSC监测功能（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止EMOSC监测。" />
+        <Bit Name="LP_EMOEN" Authority="RW" Bits="15" Description="使能或禁止DEEP-SLEEP模式下EMOSC工作状态（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止EMOSC在DEEP-SLEEP模式下工作。" />
+        <Bit Name="LP_IMOEN" Authority="RW" Bits="13" Description="使能或禁止DEEP-SLEEP模式下IMOSC工作状态（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止IMOSC在DEEP-SLEEP模式下工作。" />
+        <Bit Name="LP_ISOEN" Authority="RW" Bits="12" Description="使能或禁止DEEP-SLEEP模式下ISOSC工作状态（缺省禁止，若IWDT使能，则该控制位设置无效）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止ISOSC在DEEP-SLEEP模式下工作。" />
+        <Bit Name="SYSTICK" Authority="RW" Bits="11" Description="使能或禁止CORET的计数时钟（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定功能。" />
+        <Bit Name="IDLE_HCLK" Authority="RW" Bits="9" Description="使能或禁止SLEEP模式下的HCLK（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定功能。" />
+        <Bit Name="IDLE_PCLK" Authority="RW" Bits="8" Description="使能或禁止SLEEP模式下的PCLK（缺省使能）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定功能。" />
+        <Bit Name="HFOSC" Authority="RW" Bits="4" Description="使能或禁止HFOSC 内部振荡器（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+        <Bit Name="EMOSC" Authority="RW" Bits="3" Description="使能或禁止EMOSC 外部振荡器（XIN和XOUT管脚功能必须已经在GPIO中进行预先配置）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+        <Bit Name="IMOSC" Authority="RW" Bits="1" Description="使能或禁止IMOSC 内部振荡器（缺省使能）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+        <Bit Name="ISOSC" Authority="RW" Bits="0" Description="使能或禁止ISOSC 内部振荡器（缺省使能）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+      </Register>
+      <Register Name="SYSCON_GCDR" Authority="RW" Address="0x40011008" Width="32" Description="通用禁止控制寄存器">
+        <Bit Name="EMO_CMRST" Authority="RW" Bits="19" Description="在EMO_CKM功能使能后，使能或禁止外部EMOSC失效复位。（缺省使能）&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止EMOSC失效产生系统复位。当禁止产生系统复位时，EMOSC失效后，会自动切换系统时钟到IMOSC上。" />
+        <Bit Name="EMO_CKM" Authority="RW" Bits="18" Description="使能或禁止外部EMOSC监测功能（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止EMOSC监测。" />
+        <Bit Name="LP_EMOEN" Authority="RW" Bits="15" Description="使能或禁止DEEP-SLEEP模式下EMOSC工作状态（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止EMOSC在DEEP-SLEEP模式下工作。" />
+        <Bit Name="LP_IMOEN" Authority="RW" Bits="13" Description="使能或禁止DEEP-SLEEP模式下IMOSC工作状态（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止IMOSC在DEEP-SLEEP模式下工作。" />
+        <Bit Name="LP_ISOEN" Authority="RW" Bits="12" Description="使能或禁止DEEP-SLEEP模式下ISOSC工作状态（缺省禁止，若IWDT使能，则该控制位设置无效）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止ISOSC在DEEP-SLEEP模式下工作。" />
+        <Bit Name="SYSTICK" Authority="RW" Bits="11" Description="使能或禁止CORET的计数时钟（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定功能。" />
+        <Bit Name="IDLE_HCLK" Authority="RW" Bits="9" Description="使能或禁止SLEEP模式下的HCLK（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定功能。" />
+        <Bit Name="IDLE_PCLK" Authority="RW" Bits="8" Description="使能或禁止SLEEP模式下的PCLK（缺省使能）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定功能。" />
+        <Bit Name="HFOSC" Authority="RW" Bits="4" Description="使能或禁止HFOSC 内部振荡器（缺省禁止）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+        <Bit Name="EMOSC" Authority="RW" Bits="3" Description="使能或禁止EMOSC 外部振荡器（XIN和XOUT管脚功能必须已经在GPIO中进行预先配置）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+        <Bit Name="IMOSC" Authority="RW" Bits="1" Description="使能或禁止IMOSC 内部振荡器（缺省使能）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+        <Bit Name="ISOSC" Authority="RW" Bits="0" Description="使能或禁止ISOSC 内部振荡器（缺省使能）。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：使能或禁止指定振荡器。" />
+      </Register>
+      <Register Name="SYSCON_GCSR" Authority="RW" Address="0x4001100c" Width="32" Description="通用状态寄存器">
+        <Bit Name="EMO_CMRST" Authority="RO" Bits="19" Description="EMOSC Clock Fail时，产生系统复位。&#xD;&#xA;0h：禁止产生系统复位。&#xD;&#xA;1h：使能产生系统复位。" />
+        <Bit Name="EMO_CKM" Authority="RO" Bits="18" Description="EMOSC Clock Monitor功能状态。&#xD;&#xA;0h：EMO CKM被关闭。&#xD;&#xA;1h：EMO CKM被打开。" />
+        <Bit Name="LP_EMOEN" Authority="RO" Bits="15" Description="DEEP-SLEEP模式下EMOSC工作状态。&#xD;&#xA;0h：EMOSC被关闭。&#xD;&#xA;1h：EMOSC被打开。" />
+        <Bit Name="LP_IMOEN" Authority="RO" Bits="13" Description="DEEP-SLEEP模式下IMOSC工作状态。&#xD;&#xA;0h：IMOSC被关闭。&#xD;&#xA;1h：IMOSC被打开。" />
+        <Bit Name="LP_ISOEN" Authority="RO" Bits="12" Description="DEEP-SLEEP模式下ISOSC工作状态。&#xD;&#xA;0h：ISOSC被关闭。&#xD;&#xA;1h：ISOSC被打开。" />
+        <Bit Name="SYSTICK" Authority="RO" Bits="11" Description="CORET的时钟工作状态。&#xD;&#xA;0h：CORET时钟被关闭。&#xD;&#xA;1h：CORET时钟被打开。" />
+        <Bit Name="IDLE_HCLK" Authority="RO" Bits="9" Description="SLEEP 模式下HCLK状态。&#xD;&#xA;0h：SLEEP模式下HCLK被关闭。&#xD;&#xA;1h：SLEEP模式下HCLK被打开。" />
+        <Bit Name="IDLE_PCLK" Authority="RO" Bits="8" Description="SLEEP 模式下PCLK状态。&#xD;&#xA;0h：SLEEP模式下PCLK被关闭。&#xD;&#xA;1h：SLEEP模式下PCLK被打开。" />
+        <Bit Name="HFOSC" Authority="RO" Bits="4" Description="HFOSC 内部振荡器工作状态。&#xD;&#xA;0h：HFOSC被关闭。&#xD;&#xA;1h：HFOSC被打开。" />
+        <Bit Name="EMOSC" Authority="RO" Bits="3" Description="EMOSC 振荡器工作状态。&#xD;&#xA;0h：EMOSC被关闭。&#xD;&#xA;1h：EMOSC被打开。" />
+        <Bit Name="IMOSC" Authority="RO" Bits="1" Description="IMOSC 内部振荡器工作状态。&#xD;&#xA;0h：IMOSC被关闭。&#xD;&#xA;1h：IMOSC被打开。" />
+        <Bit Name="ISOSC" Authority="RO" Bits="0" Description="ISOSC 内部振荡器工作状态。&#xD;&#xA;0h：ISOSC被关闭。&#xD;&#xA;1h：ISOSC被打开。" />
+      </Register>
+      <Register Name="SYSCON_CKST" Authority="RW" Address="0x40011010" Width="32" Description="时钟状态寄存器">
+        <Bit Name="SYS_CLK" Authority="RO" Bits="8" Description="SYS_CLK （系统时钟）稳定状态。&#xD;&#xA;0h：SYS_CLK时钟未稳定。&#xD;&#xA;1h：SYS_CLK时钟已稳定。" />
+        <Bit Name="HFOSC" Authority="RO" Bits="4" Description="HFOSC 内部振荡器稳定状态。&#xD;&#xA;0h：HFOSC时钟未稳定。&#xD;&#xA;1h：HFOSC时钟已稳定。" />
+        <Bit Name="EMOSC" Authority="RO" Bits="3" Description="EMOSC 振荡器稳定状态。&#xD;&#xA;0h：EMOSC时钟未稳定。&#xD;&#xA;1h：EMOSC时钟已稳定。" />
+        <Bit Name="IMOSC" Authority="RO" Bits="1" Description="IMOSC 内部振荡器稳定状态。&#xD;&#xA;0h：IMOSC时钟未稳定。&#xD;&#xA;1h：ISOSC时钟已稳定。" />
+        <Bit Name="ISOSC" Authority="RO" Bits="0" Description="ISOSC 内部振荡器稳定状态。&#xD;&#xA;0h：ISOSC时钟未稳定。&#xD;&#xA;1h：ISOSC时钟已稳定。" />
+      </Register>
+      <Register Name="SYSCON_RAMCHK" Authority="RW" Address="0x40011014" Width="32" Description="SRAM 校验控制寄存器">
+        <Bit Name="CHKEN" Authority="RW" Bits="31-24" Description="SRAM校验使能控制位。&#xD;&#xA;5Ah：使能SRAM的奇偶校验功能。&#xD;&#xA;其他：关闭SRAM的奇偶校验功能。" />
+        <Bit Name="RSTEN" Authority="RW" Bits="23-16" Description="SRAM校验失败复位控制位。在初次校验失败后，系统会自动重试（RE-READ），当重试次数达到CHKCNT设置值时，校验仍未通过，则系统认为校验失败。&#xD;&#xA;5Ah：SRAM校验失败后复位。&#xD;&#xA;其他：SRAM校验失败后不复位，只产生中断。" />
+        <Bit Name="CHKTIMES" Authority="RW" Bits="15-0" Description="校验重试次数设置。&#xD;&#xA;设置SRAM校验错后的重试次数。如果SRAM校验发生错误，SRAM控制器会再次重读SRAM进行校验，重读的次数由该寄存器设置。连续重读次数满足该寄存器设置的次数后，如果仍然失败，那么会产生SRAM校验错的中断，或者产生系统复位(由RSTEN位控制)。" />
+      </Register>
+      <Register Name="SYSCON_EFLCHK" Authority="RW" Address="0x40011018" Width="32" Description="Embedded Flash 校验控制寄存器">
+        <Bit Name="CHKEN" Authority="RW" Bits="31-24" Description="Flash校验使能控制位。&#xD;&#xA;5Ah：使能Flash的校验功能。&#xD;&#xA;其他：关闭Flash的校验功能。" />
+        <Bit Name="CHKTIMES" Authority="RW" Bits="23-0" Description="校验重试次数设置。&#xD;&#xA;设置Flash校验错后的重试次数。如果Flash校验发生错误，Flash控制器会再次重读当前地址，进行校验，重读的次数由该寄存器设置。重读次数满足该寄存器设置的次数后，如果仍然失败，系统会产生相应系统复位(由CHKEN位控制)。" />
+      </Register>
+      <Register Name="SYSCON_SCLKCR" Authority="RW" Address="0x4001101c" Width="32" Description="系统时钟控制寄存器">
+        <Bit Name="SCLK_KEY" Authority="RW" Bits="31-16" Description="" />
+        <Bit Name="SCLK_DIV" Authority="RW" Bits="11-8" Description="系统时钟分频设置（SYSCLK分频后，即为HCLK频率）。&#xD;&#xA;0h：不分频。&#xD;&#xA;1h：不分频。&#xD;&#xA;2h：2分频。&#xD;&#xA;3h：3分频。&#xD;&#xA;4h：4分频。&#xD;&#xA;5h：5分频。&#xD;&#xA;6h：6分频。&#xD;&#xA;7h：8分频。&#xD;&#xA;8h：12分频。&#xD;&#xA;9h：16分频。&#xD;&#xA;Ah：24分频。&#xD;&#xA;Bh：32分频。&#xD;&#xA;Ch：36分频。&#xD;&#xA;Dh：64分频。&#xD;&#xA;Eh：128分频。&#xD;&#xA;Fh：256分频。" />
+        <Bit Name="SCLK_SEL" Authority="RW" Bits="2-0" Description="系统时钟源控制，选择当前系统时钟SYSCLK工作的时钟。&#xD;&#xA;0h：IMOSC作为系统工作时钟源。&#xD;&#xA;1h：EMOSC作为系统工作时钟源。&#xD;&#xA;2h：HFOSC作为系统工作时钟源。&#xD;&#xA;4h：ISOSC作为系统工作时钟源。&#xD;&#xA;其他：保留" />
+      </Register>
+      <Register Name="SYSCON_PCLKCR" Authority="RW" Address="0x40011020" Width="32" Description="外设时钟控制寄存器">
+        <Bit Name="PCLK_KEY" Authority="RW" Bits="31-16" Description="" />
+        <Bit Name="PCLK_DIV" Authority="RW" Bits="11-8" Description="PCLK的时钟分频设置，PCLK分频基于HCLK的频率。&#xD;&#xA;0000B：不分频。&#xD;&#xA;0001B：2分频。&#xD;&#xA;001xB：4分频。&#xD;&#xA;01xxB：8分频。&#xD;&#xA;1xxxB：16分频。" />
+      </Register>
+      <Register Name="SYSCON_PCER0" Authority="RW" Address="0x40011028" Width="32" Description="外设时钟使能寄存器0">
+        <Bit Name="I2C" Authority="RW" Bits="22" Description="" />
+        <Bit Name="SIO" Authority="RW" Bits="20" Description="" />
+        <Bit Name="SPI" Authority="RW" Bits="16" Description="" />
+        <Bit Name="UART2" Authority="RW" Bits="10" Description="" />
+        <Bit Name="UART1" Authority="RW" Bits="9" Description="" />
+        <Bit Name="UART0" Authority="RW" Bits="8" Description="" />
+        <Bit Name="ETCB" Authority="RW" Bits="7" Description="" />
+        <Bit Name="TOUCH" Authority="RW" Bits="6" Description="" />
+        <Bit Name="ADC" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IFC" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="SYSCON_PCDR0" Authority="RW" Address="0x4001102c" Width="32" Description="外设时钟禁止寄存器0">
+        <Bit Name="I2C" Authority="RW" Bits="22" Description="" />
+        <Bit Name="SIO" Authority="RW" Bits="20" Description="" />
+        <Bit Name="SPI" Authority="RW" Bits="16" Description="" />
+        <Bit Name="UART2" Authority="RW" Bits="10" Description="" />
+        <Bit Name="UART1" Authority="RW" Bits="9" Description="" />
+        <Bit Name="UART0" Authority="RW" Bits="8" Description="" />
+        <Bit Name="ETCB" Authority="RW" Bits="7" Description="" />
+        <Bit Name="TOUCH" Authority="RW" Bits="6" Description="" />
+        <Bit Name="ADC" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IFC" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="SYSCON_PCSR0" Authority="RW" Address="0x40011030" Width="32" Description="外设时钟状态寄存器0">
+        <Bit Name="I2C" Authority="RO" Bits="22" Description="" />
+        <Bit Name="SIO" Authority="RO" Bits="20" Description="" />
+        <Bit Name="SPI" Authority="RO" Bits="16" Description="" />
+        <Bit Name="UART2" Authority="RO" Bits="10" Description="" />
+        <Bit Name="UART1" Authority="RO" Bits="9" Description="" />
+        <Bit Name="UART0" Authority="RO" Bits="8" Description="" />
+        <Bit Name="ETCB" Authority="RO" Bits="7" Description="" />
+        <Bit Name="TOUCH" Authority="RO" Bits="6" Description="" />
+        <Bit Name="ADC" Authority="RO" Bits="4" Description="" />
+        <Bit Name="IFC" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="SYSCON_PCER1" Authority="RW" Address="0x40011034" Width="32" Description="外设时钟使能寄存器1">
+        <Bit Name="EPT" Authority="RW" Bits="17" Description="" />
+        <Bit Name="GPTA" Authority="RW" Bits="13" Description="" />
+        <Bit Name="BT1" Authority="RW" Bits="12" Description="" />
+        <Bit Name="BT0" Authority="RW" Bits="11" Description="" />
+        <Bit Name="CNTA" Authority="RW" Bits="10" Description="" />
+        <Bit Name="LPT" Authority="RW" Bits="9" Description="" />
+        <Bit Name="RTC" Authority="RW" Bits="8" Description="" />
+        <Bit Name="WWDT" Authority="RW" Bits="7" Description="" />
+      </Register>
+      <Register Name="SYSCON_PCDR1" Authority="RW" Address="0x40011038" Width="32" Description="外设时钟禁止寄存器1">
+        <Bit Name="EPT" Authority="RW" Bits="17" Description="" />
+        <Bit Name="GPTA" Authority="RW" Bits="13" Description="" />
+        <Bit Name="BT1" Authority="RW" Bits="12" Description="" />
+        <Bit Name="BT0" Authority="RW" Bits="11" Description="" />
+        <Bit Name="CNTA" Authority="RW" Bits="10" Description="" />
+        <Bit Name="LPT" Authority="RW" Bits="9" Description="" />
+        <Bit Name="RTC" Authority="RW" Bits="8" Description="" />
+        <Bit Name="WWDT" Authority="RW" Bits="7" Description="" />
+      </Register>
+      <Register Name="SYSCON_PCSR1" Authority="RW" Address="0x4001103c" Width="32" Description="外设时钟状态寄存器1">
+        <Bit Name="EPT" Authority="RO" Bits="17" Description="" />
+        <Bit Name="GPTA" Authority="RO" Bits="13" Description="" />
+        <Bit Name="BT1" Authority="RO" Bits="12" Description="" />
+        <Bit Name="BT0" Authority="RO" Bits="11" Description="" />
+        <Bit Name="CNTA" Authority="RO" Bits="10" Description="" />
+        <Bit Name="LPT" Authority="RO" Bits="9" Description="" />
+        <Bit Name="RTC" Authority="RO" Bits="8" Description="" />
+        <Bit Name="WWDT" Authority="RO" Bits="7" Description="" />
+      </Register>
+      <Register Name="SYSCON_OSTR" Authority="RW" Address="0x40011040" Width="32" Description="外部振荡器稳定时间配置寄存器">
+        <Bit Name="EM_FLTSEL" Authority="RW" Bits="27-26" Description="外部振荡器滤波范围选择。选择可滤除的信号间隔幅度。&#xD;&#xA;0h：小于5ns间隔脉冲滤波。&#xD;&#xA;1h：小于10ns间隔脉冲滤波。&#xD;&#xA;2h：小于15ns间隔脉冲滤波。&#xD;&#xA;3h：小于20ns间隔脉冲滤波。" />
+        <Bit Name="EM_FLTEN" Authority="RW" Bits="25" Description="外部振荡器滤波使能控制位。在高噪声环境下，使能该滤波器可以防止时钟路径串入抖动信号造成系统工作错误。&#xD;&#xA;0h：禁止滤波&#xD;&#xA;1h：打开滤波" />
+        <Bit Name="EM_GMCTL" Authority="RW" Bits="15-11" Description="外部晶振的增益控制位。根据不同的震荡频率，选择适当的增益控制，频率越高，选择的GM值应越大。" />
+        <Bit Name="EM_LFSEL" Authority="RW" Bits="10" Description="外部晶振的低速模式设置。当外接32.768KHz晶振，需要将该位设置为使能。&#xD;&#xA;0h：EMOSC为普通模式。&#xD;&#xA;1h：EMOSC为低速模式。" />
+        <Bit Name="EMCNT" Authority="RW" Bits="9-0" Description="外部晶振的时钟稳定计数器。&#xD;&#xA;该计数器值可以在EMOSC禁止时进行修改。EMOSC使能时，时钟稳定计数器开始递减计数，当计数值达到零，RISR状态寄存器中的EMOSC_ST位被置位，同时CKST寄存器中的EMOSC状态位置位。&#xD;&#xA;时钟稳定计数器的计数时钟为外部时钟的256分频，所以在缺省状态下，当外部晶振为8MHz时，稳定计数时间为：&#xD;&#xA;0x3FF x 256 x 125ns = 32.7ms" />
+      </Register>
+      <Register Name="SYSCON_LVDCR" Authority="RW" Address="0x4001104c" Width="32" Description="低电压检测控制寄存器">
+        <Bit Name="LVD_KEY" Authority="RW" Bits="31-16" Description="" />
+        <Bit Name="LVDFLAG" Authority="RO" Bits="15" Description="LVD的当前状态查询&#xD;&#xA;0h：VDD 的当前电压高于 INTLVL 设置的检测阈值。&#xD;&#xA;1h：VDD 的当前电压低于 INTLVL 设置的检测阈值。" />
+        <Bit Name="RSTLVL" Authority="RW" Bits="14-12" Description="低电压复位触发的电压选择。&#xD;&#xA;0h：1.9V&#xD;&#xA;1h：2.2V&#xD;&#xA;2h：2.5V&#xD;&#xA;3h：2.8V&#xD;&#xA;4h：3.1V&#xD;&#xA;5h：3.4V&#xD;&#xA;6h：3.7V&#xD;&#xA;7h：4.0V" />
+        <Bit Name="INTLVL" Authority="RW" Bits="10-8" Description="低电压检测中断触发电压选择。&#xD;&#xA;0h：2.4V&#xD;&#xA;1h：2.1V&#xD;&#xA;2h：2.7V&#xD;&#xA;3h：3.0V&#xD;&#xA;4h：3.3V&#xD;&#xA;5h：3.6V&#xD;&#xA;6h：3.9V&#xD;&#xA;注：比较电压为VDD电压和选择的电压进行比较。" />
+        <Bit Name="INTPOL" Authority="RW" Bits="7-6" Description="低电压检测中断触发的极性选择。&#xD;&#xA;0h：无效。&#xD;&#xA;1h：当电压下降到低于LVDLVL(falling)设置时，触发中断。&#xD;&#xA;2h：当电压升高到超过LVDLVL(rising)设置时，触发中断。&#xD;&#xA;3h：当电压下降到低于或者升高到超过LVDLVL(both)时，触发中断。" />
+        <Bit Name="LVDEN" Authority="RW" Bits="3-0" Description="使能/禁止LVD模块控制位。使能LVD模块后，当VDD电压低于RSTLVL设置值时，系统将产生低电压异常的复位。&#xD;&#xA;0Ah：禁止LVD模块。&#xD;&#xA;其他：使能LVD模块。" />
+      </Register>
+      <Register Name="SYSCON_CLCR" Authority="RW" Address="0x40011050" Width="32" Description="内部振荡器调整寄存器">
+        <Bit Name="ISO_TRM" Authority="RW" Bits="31-24" Description="ISOSC 的 TRIM 调整位&#xD;&#xA;ISOSC 的频率输出随着调整值递增，值越大，频率越高。" />
+        <Bit Name="IMO_TRM" Authority="RW" Bits="23-16" Description="IMOSC 的 TRIM 调整位&#xD;&#xA;IMOSC 的频率输出随着调整值递增，值越大，频率越高。" />
+        <Bit Name="HFO_TRM" Authority="RW" Bits="15-9" Description="HFOSC 的 TRIM 调整位&#xD;&#xA;HFOSC 的频率输出随着调整值递增，值越大，频率越高。" />
+        <Bit Name="HFO_TUNE" Authority="RW" Bits="8-0" Description="HFOSC 频率的微调设置。&#xD;&#xA;通过 HFO_TUNE 控制位，可以精细调整 HFOSC 的输出频率。调整的步进大约为12KHz。&#xD;&#xA;0x1FF：标准输出频率（工程校准后的输出值）。&#xD;&#xA;0x1FE：标准输出频率-12KHz。&#xD;&#xA;0x1FD：标准输出频率-24KHz。&#xD;&#xA;0x1FC：标准输出频率-36KHz&#xD;&#xA;…….." />
+      </Register>
+      <Register Name="SYSCON_PWRCR" Authority="RW" Address="0x40011054" Width="32" Description="功耗控制寄存器">
+        <Bit Name="DSL_CFG" Authority="RW" Bits="28-24" Description="在DEEP-SLEEP模式下VOS控制，只有当VOSEN[2]置位时有效。&#xD;&#xA;Bit0：BGR的配置位：&#xD;&#xA;  0h：BGR被禁止&#xD;&#xA;  1h：BGR被使能&#xD;&#xA;Bit2-Bit1: 低功耗模式配置位：&#xD;&#xA;  0h：低功耗模式0（LP0）&#xD;&#xA;  1h：低功耗模式1（LP1）&#xD;&#xA;  其他：低功耗模式2（LP2），亦为正常模式&#xD;&#xA;Bit3: 保留" />
+        <Bit Name="SLP_CFG" Authority="RW" Bits="20-16" Description="在SLEEP模式下VOS控制，只有当VOSEN[1]置位时有效。&#xD;&#xA;Bit0：BGR的配置位：&#xD;&#xA;  0h：BGR被禁止&#xD;&#xA;  1h：BGR被使能&#xD;&#xA;Bit2-Bit1: 低功耗模式配置位：&#xD;&#xA;  0h：低功耗模式0（LP0）&#xD;&#xA;  1h：低功耗模式1（LP1），亦为正常模式&#xD;&#xA;  2h：低功耗模式2（LP2）&#xD;&#xA;  3h：RSVD&#xD;&#xA;Bit3: 保留" />
+        <Bit Name="RUN_CFG" Authority="RW" Bits="12-8" Description="在RUN模式下VOS控制，只有当VOSEN[0]置位时有效。&#xD;&#xA;Bit0：BGR的配置位：&#xD;&#xA;  0h：BGR被禁止&#xD;&#xA;  1h：BGR被使能&#xD;&#xA;Bit2-Bit1: 低功耗模式配置位：&#xD;&#xA;  0h：低功耗模式0（LP0）&#xD;&#xA;  1h：低功耗模式1（LP1）&#xD;&#xA;  2h：低功耗模式2（LP2）&#xD;&#xA;  3h：RSVD&#xD;&#xA;Bit3：保留" />
+        <Bit Name="VOSEN" Authority="RW" Bits="3-0" Description="VOS模式使能控制。（1）&#xD;&#xA;xxx1b：使能RUN模式下的VOS&#xD;&#xA;xx1xb：使能SLEEP模式下的VOS&#xD;&#xA;x1xxb：使能DEEP-SLEEP模式下的VOS" />
+      </Register>
+      <Register Name="SYSCON_PWRKEY" Authority="RW" Address="0x40011058" Width="32" Description="功耗调整使能寄存器">
+        <Bit Name="PWR_KEY" Authority="RW" Bits="31-16" Description="" />
+        <Bit Name="VOSLCK" Authority="RW" Bits="15-0" Description="VOS全局使能控制。&#xD;&#xA;只有在该控制器被配置为0x6CC7时，PWRCR寄存器的配置才有效。" />
+      </Register>
+      <Register Name="SYSCON_OPT1" Authority="RW" Address="0x40011064" Width="32" Description="系统配置寄存器1 (TRIM value for OSC) [1]">
+        <Bit Name="EMCKM_DUR" Authority="RW" Bits="23-21" Description="EMCKM的检测时间间隔设置，检测周期基于当前IMOSC的频率设置。&#xD;&#xA;0h：18个周期&#xD;&#xA;1h：14个周期&#xD;&#xA;2h：10个周期&#xD;&#xA;3h：8个周期&#xD;&#xA;4h：6个周期&#xD;&#xA;5h：5个周期&#xD;&#xA;6h：4个周期&#xD;&#xA;7h：3个周期" />
+        <Bit Name="EXIFLTCKS" Authority="RW" Bits="18-17" Description="EXI通道的数字滤波器检测频率设置。设置滤波器采用时钟的分频系数。&#xD;&#xA;0h：不分频&#xD;&#xA;1h：2分频&#xD;&#xA;2h：3分频&#xD;&#xA;3h：4分频" />
+        <Bit Name="EXIFLTEN" Authority="RW" Bits="16" Description="EXI通道的数字滤波器使能控制。数字滤波的采用时钟为ISCLK，当ISCLK没有使能时，该控制位无效。&#xD;&#xA;0h：禁止数字滤波&#xD;&#xA;1h：使能数字滤波" />
+        <Bit Name="EFL_LPMD" Authority="RW" Bits="15" Description="Flash的Low Power模式选择。在此模式下，Flash的读取周期保证大于8us。当HCLK频率比较高时，需要配合选择合适的WAIT CYCLE来保证。&#xD;&#xA;0h：禁止Flash LP模式。&#xD;&#xA;1h：使能Flash LP模式。" />
+        <Bit Name="CLODIV" Authority="RW" Bits="14-12" Description="CLO输出分频选择。&#xD;&#xA;0h：4分频。&#xD;&#xA;1h：不分频。&#xD;&#xA;2h：2分频。&#xD;&#xA;4h：8分频。&#xD;&#xA;5h：16分频。&#xD;&#xA;其他：4分频。" />
+        <Bit Name="CLOMX" Authority="RW" Bits="11-8" Description="CLO输出选择。（CLO管脚输出最高频率不超过10MHz，若输出频率较高，可选择CLODIV分频后输出）&#xD;&#xA;0h：ISCLK输出。&#xD;&#xA;1h：IMCLK输出。&#xD;&#xA;3h：EMCLK输出。&#xD;&#xA;4h：HFCLK输出。&#xD;&#xA;6h：RTCCLK输出。&#xD;&#xA;7h：PCLK输出。&#xD;&#xA;8h：HCLK输出。&#xD;&#xA;9h：IWDTCLK输出。&#xD;&#xA;Dh：SYSCLK输出。&#xD;&#xA;其他：保留。" />
+        <Bit Name="HFO_FSEL" Authority="RW" Bits="5-4" Description="HFOSC频率选择。&#xD;&#xA;0h：48MHz。&#xD;&#xA;1h：24MHz。&#xD;&#xA;2h：12MHz。&#xD;&#xA;3h：6MHz。" />
+        <Bit Name="IMO_FSEL" Authority="RW" Bits="1-0" Description="IMOSC频率选择。&#xD;&#xA;0h：5.556MHz。&#xD;&#xA;1h：4.194MHz。&#xD;&#xA;2h：2.097MHz。&#xD;&#xA;3h：131.072KHz。" />
+      </Register>
+      <Register Name="SYSCON_OPT0" Authority="RW" Address="0x40011068" Width="32" Description="系统配置寄存器0 [2]">
+        <Bit Name="RDP" Authority="RO" Bits="27" Description="Read Protection使能User Option状态查询。&#xD;&#xA;0h：缺省关闭Read Protection。&#xD;&#xA;1h：缺省打开Read Protection。" />
+        <Bit Name="HDP_4K" Authority="RO" Bits="17" Description="4K空间Hard Protection使能User Option状态查询。&#xD;&#xA;0h：缺省禁止Hard Protection。&#xD;&#xA;1h：缺省使能Hard Protection。" />
+        <Bit Name="HDP_ALL" Authority="RO" Bits="16" Description="Hard Protection使能User Option状态查询。&#xD;&#xA;0h：缺省禁止Hard Protection。&#xD;&#xA;1h：缺省使能Hard Protection。" />
+        <Bit Name="DBP" Authority="RO" Bits="8" Description="Debug Port 使能User Option状态查询。&#xD;&#xA;0h：缺省打开Debug Port。&#xD;&#xA;1h：缺省关闭Debug Port。" />
+        <Bit Name="CIPVALID" Authority="RO" Bits="7" Description="烧录器加密通讯使能User Option状态查询。&#xD;&#xA;0h：禁止通讯加密。&#xD;&#xA;1h：使能通讯加密。" />
+        <Bit Name="CPUFTRST" Authority="RO" Bits="2" Description="CPU Fault时产生硬件复位User Option设置状态查询。&#xD;&#xA;0h：禁止自动复位。&#xD;&#xA;1h：使能自动复位。" />
+        <Bit Name="EXIRSTEN" Authority="RO" Bits="1" Description="外部复位管脚功能User Option设置状态查询。&#xD;&#xA;0h：外部复位管脚禁用。&#xD;&#xA;1h：外部复位管脚使能。" />
+        <Bit Name="IWDTEN" Authority="RO" Bits="0" Description="独立看门狗User Option设置状态查询。&#xD;&#xA;0h：缺省关闭看门狗。&#xD;&#xA;1h：缺省打开看门狗。" />
+      </Register>
+      <Register Name="SYSCON_WKCR" Authority="RW" Address="0x4001106c" Width="32" Description="低功耗唤醒使能控制寄存器">
+        <Bit Name="TCH_WKEN" Authority="RW" Bits="12" Description="TOUCH中断唤醒DEEP-SLEEP使能控制位。&#xD;&#xA;0h：禁止TCH中断唤醒DEEP-SLEEP。&#xD;&#xA;1h：使能TCH中断唤醒DEEP-SLEEP。" />
+        <Bit Name="LVD_WKEN" Authority="RW" Bits="11" Description="LVD中断唤醒DEEP-SLEEP使能控制位。&#xD;&#xA;0h：禁止LVD中断唤醒DEEP-SLEEP。&#xD;&#xA;1h：使能LVD中断唤醒DEEP-SLEEP。" />
+        <Bit Name="LPT_WKEN" Authority="RW" Bits="10" Description="LPT中断唤醒DEEP-SLEEP使能控制位。&#xD;&#xA;0h：禁止LPT中断唤醒DEEP-SLEEP。&#xD;&#xA;1h：使能LPT中断唤醒DEEP-SLEEP。" />
+        <Bit Name="RTC_WKEN" Authority="RW" Bits="9" Description="RTC中断唤醒DEEP-SLEEP使能控制位。&#xD;&#xA;0h：禁止RTC中断唤醒DEEP-SLEEP。&#xD;&#xA;1h：使能RTC中断唤醒DEEP-SLEEP。" />
+        <Bit Name="IWDT_WKEN" Authority="RW" Bits="8" Description="看门狗中断唤醒DEEP-SLEEP使能控制位。&#xD;&#xA;0h：禁止IWDT中断唤醒DEEP-SLEEP。&#xD;&#xA;1h：使能IWDT中断唤醒DEEP-SLEEP。" />
+      </Register>
+      <Register Name="SYSCON_IMER" Authority="RW" Address="0x40011074" Width="32" Description="中断使能控制寄存器">
+        <Bit Name="CMD_ERR" Authority="RW" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。" />
+        <Bit Name="EV3TRG" Authority="RW" Bits="22" Description="同步触发输出Event3 触发的中断" />
+        <Bit Name="EV2TRG" Authority="RW" Bits="21" Description="同步触发输出Event2 触发的中断" />
+        <Bit Name="EV1TRG" Authority="RW" Bits="20" Description="同步触发输出Event1 触发的中断" />
+        <Bit Name="EV0TRG" Authority="RW" Bits="19" Description="同步触发输出Event0 触发的中断" />
+        <Bit Name="EM_CMFAIL" Authority="RW" Bits="18" Description="EMOSC时钟失效中断" />
+        <Bit Name="OPL_ERR" Authority="RW" Bits="14" Description="Option初始化配置加载失败中断。" />
+        <Bit Name="EFL_ERR" Authority="RW" Bits="13" Description="EFLASH校验失败中断。" />
+        <Bit Name="HWD_ERR" Authority="RW" Bits="12" Description="硬件除法器除零中断。" />
+        <Bit Name="LVD_INT" Authority="RW" Bits="11" Description="LVD中断。" />
+        <Bit Name="RAM_ERR" Authority="RW" Bits="10" Description="SRAM校验失败中断。" />
+        <Bit Name="IWDT_INT" Authority="RW" Bits="8" Description="IWDT中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RW" Bits="7" Description="SYSCLK时钟稳定中断。" />
+        <Bit Name="HFOSC_ST" Authority="RW" Bits="4" Description="HFOSC时钟稳定中断。" />
+        <Bit Name="EMOSC_ST" Authority="RW" Bits="3" Description="EMOSC时钟稳定中断。" />
+        <Bit Name="IMOSC_ST" Authority="RW" Bits="1" Description="IMOSC时钟稳定中断。" />
+        <Bit Name="ISOSC_ST" Authority="RW" Bits="0" Description="ISOSC时钟稳定中断。" />
+      </Register>
+      <Register Name="SYSCON_IMDR" Authority="RW" Address="0x40011078" Width="32" Description="中断禁止控制寄存器">
+        <Bit Name="CMD_ERR" Authority="RW" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。" />
+        <Bit Name="EV3TRG" Authority="RW" Bits="22" Description="同步触发输出Event3 触发的中断" />
+        <Bit Name="EV2TRG" Authority="RW" Bits="21" Description="同步触发输出Event2 触发的中断" />
+        <Bit Name="EV1TRG" Authority="RW" Bits="20" Description="同步触发输出Event1 触发的中断" />
+        <Bit Name="EV0TRG" Authority="RW" Bits="19" Description="同步触发输出Event0 触发的中断" />
+        <Bit Name="EM_CMFAIL" Authority="RW" Bits="18" Description="EMOSC时钟失效中断" />
+        <Bit Name="OPL_ERR" Authority="RW" Bits="14" Description="Option初始化配置加载失败中断。" />
+        <Bit Name="EFL_ERR" Authority="RW" Bits="13" Description="EFLASH校验失败中断。" />
+        <Bit Name="HWD_ERR" Authority="RW" Bits="12" Description="硬件除法器除零中断。" />
+        <Bit Name="LVD_INT" Authority="RW" Bits="11" Description="LVD中断。" />
+        <Bit Name="RAM_ERR" Authority="RW" Bits="10" Description="SRAM校验失败中断。" />
+        <Bit Name="IWDT_INT" Authority="RW" Bits="8" Description="IWDT中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RW" Bits="7" Description="SYSCLK时钟稳定中断。" />
+        <Bit Name="HFOSC_ST" Authority="RW" Bits="4" Description="HFOSC时钟稳定中断。" />
+        <Bit Name="EMOSC_ST" Authority="RW" Bits="3" Description="EMOSC时钟稳定中断。" />
+        <Bit Name="IMOSC_ST" Authority="RW" Bits="1" Description="IMOSC时钟稳定中断。" />
+        <Bit Name="ISOSC_ST" Authority="RW" Bits="0" Description="ISOSC时钟稳定中断。" />
+      </Register>
+      <Register Name="SYSCON_IMCR" Authority="RW" Address="0x4001107c" Width="32" Description="中断使能/禁止状态寄存器">
+        <Bit Name="CMD_ERR" Authority="RW" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EV3TRG" Authority="RW" Bits="22" Description="同步触发输出Event3 触发的中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EV2TRG" Authority="RW" Bits="21" Description="同步触发输出Event2 触发的中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EV1TRG" Authority="RW" Bits="20" Description="同步触发输出Event1 触发的中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EV0TRG" Authority="RW" Bits="19" Description="同步触发输出Event0 触发的中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EM_CMFAIL" Authority="RW" Bits="18" Description="EMOSC时钟失效中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="OPL_ERR" Authority="RW" Bits="14" Description="Option初始化配置加载失败中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EFL_ERR" Authority="RW" Bits="13" Description="EFLASH校验失败中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="HWD_ERR" Authority="RW" Bits="12" Description="硬件除法器除零中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="LVD_INT" Authority="RW" Bits="11" Description="LVD中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="RAM_ERR" Authority="RW" Bits="10" Description="SRAM校验失败中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="IWDT_INT" Authority="RW" Bits="8" Description="IWDT中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RW" Bits="7" Description="SYSCLK时钟稳定中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="HFOSC_ST" Authority="RW" Bits="4" Description="HFOSC时钟稳定中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="EMOSC_ST" Authority="RW" Bits="3" Description="EMOSC时钟稳定中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="IMOSC_ST" Authority="RW" Bits="1" Description="IMOSC时钟稳定中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+        <Bit Name="ISOSC_ST" Authority="RW" Bits="0" Description="ISOSC时钟稳定中断。&#xD;&#xA;0h：禁止中断。&#xD;&#xA;1h：使能中断。" />
+      </Register>
+      <Register Name="SYSCON_IAR" Authority="RW" Address="0x40011080" Width="32" Description="中断软件触发寄存器">
+        <Bit Name="CMD_ERR" Authority="RW" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。" />
+        <Bit Name="EV3TRG" Authority="RW" Bits="22" Description="同步触发输出Event3 触发的中断" />
+        <Bit Name="EV2TRG" Authority="RW" Bits="21" Description="同步触发输出Event2 触发的中断" />
+        <Bit Name="EV1TRG" Authority="RW" Bits="20" Description="同步触发输出Event1 触发的中断" />
+        <Bit Name="EV0TRG" Authority="RW" Bits="19" Description="同步触发输出Event0 触发的中断" />
+        <Bit Name="EM_CMFAIL" Authority="RW" Bits="18" Description="EMOSC时钟失效中断" />
+        <Bit Name="OPL_ERR" Authority="RW" Bits="14" Description="Option初始化配置加载失败中断。" />
+        <Bit Name="EFL_ERR" Authority="RW" Bits="13" Description="EFLASH校验失败中断。" />
+        <Bit Name="HWD_ERR" Authority="RW" Bits="12" Description="硬件除法器除零中断。" />
+        <Bit Name="LVD_INT" Authority="RW" Bits="11" Description="LVD中断。" />
+        <Bit Name="RAM_ERR" Authority="RW" Bits="10" Description="SRAM校验失败中断。" />
+        <Bit Name="IWDT_INT" Authority="RW" Bits="8" Description="IWDT中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RW" Bits="7" Description="SYSCLK时钟稳定中断。" />
+        <Bit Name="HFOSC_ST" Authority="RW" Bits="4" Description="HFOSC时钟稳定中断。" />
+        <Bit Name="EMOSC_ST" Authority="RW" Bits="3" Description="EMOSC时钟稳定中断。" />
+        <Bit Name="IMOSC_ST" Authority="RW" Bits="1" Description="IMOSC时钟稳定中断。" />
+        <Bit Name="ISOSC_ST" Authority="RW" Bits="0" Description="ISOSC时钟稳定中断。" />
+      </Register>
+      <Register Name="SYSCON_ICR" Authority="RW" Address="0x40011084" Width="32" Description="中断清除寄存器">
+        <Bit Name="CMD_ERR" Authority="RW" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。" />
+        <Bit Name="EV3TRG" Authority="RW" Bits="22" Description="同步触发输出Event3 触发的中断" />
+        <Bit Name="EV2TRG" Authority="RW" Bits="21" Description="同步触发输出Event2 触发的中断" />
+        <Bit Name="EV1TRG" Authority="RW" Bits="20" Description="同步触发输出Event1 触发的中断" />
+        <Bit Name="EV0TRG" Authority="RW" Bits="19" Description="同步触发输出Event0 触发的中断" />
+        <Bit Name="EM_CMFAIL" Authority="RW" Bits="18" Description="EMOSC时钟失效中断" />
+        <Bit Name="OPL_ERR" Authority="RW" Bits="14" Description="Option初始化配置加载失败中断。" />
+        <Bit Name="EFL_ERR" Authority="RW" Bits="13" Description="EFLASH校验失败中断。" />
+        <Bit Name="HWD_ERR" Authority="RW" Bits="12" Description="硬件除法器除零中断。" />
+        <Bit Name="LVD_INT" Authority="RW" Bits="11" Description="LVD中断。" />
+        <Bit Name="RAM_ERR" Authority="RW" Bits="10" Description="SRAM校验失败中断。" />
+        <Bit Name="IWDT_INT" Authority="RW" Bits="8" Description="IWDT中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RW" Bits="7" Description="SYSCLK时钟稳定中断。" />
+        <Bit Name="HFOSC_ST" Authority="RW" Bits="4" Description="HFOSC时钟稳定中断。" />
+        <Bit Name="EMOSC_ST" Authority="RW" Bits="3" Description="EMOSC时钟稳定中断。" />
+        <Bit Name="IMOSC_ST" Authority="RW" Bits="1" Description="IMOSC时钟稳定中断。" />
+        <Bit Name="ISOSC_ST" Authority="RW" Bits="0" Description="ISOSC时钟稳定中断。" />
+      </Register>
+      <Register Name="SYSCON_RISR" Authority="RW" Address="0x40011088" Width="32" Description="原始中断标志状态寄存器">
+        <Bit Name="CMD_ERR" Authority="RO" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。" />
+        <Bit Name="EV3TRG" Authority="RO" Bits="22" Description="事件触发输出Event3 触发的中断" />
+        <Bit Name="EV2TRG" Authority="RO" Bits="21" Description="事件触发输出Event2 触发的中断" />
+        <Bit Name="EV1TRG" Authority="RO" Bits="20" Description="事件触发输出Event1 触发的中断" />
+        <Bit Name="EV0TRG" Authority="RO" Bits="19" Description="事件触发输出Event0 触发的中断" />
+        <Bit Name="EM_CMFAIL" Authority="RO" Bits="18" Description="EMOSC时钟失效中断" />
+        <Bit Name="OPL_ERR" Authority="RO" Bits="14" Description="Option初始化配置加载失败中断。" />
+        <Bit Name="EFL_ERR" Authority="RO" Bits="13" Description="EFLASH校验失败中断。" />
+        <Bit Name="HWD_ERR" Authority="RO" Bits="12" Description="硬件除法器除零中断。" />
+        <Bit Name="LVD_INT" Authority="RO" Bits="11" Description="LVD中断。" />
+        <Bit Name="RAM_ERR" Authority="RO" Bits="10" Description="SRAM校验失败中断。" />
+        <Bit Name="IWDT_INT" Authority="RO" Bits="8" Description="IWDT中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RO" Bits="7" Description="SYSCLK时钟稳定中断。" />
+        <Bit Name="HFOSC_ST" Authority="RO" Bits="4" Description="HFOSC时钟稳定中断。" />
+        <Bit Name="EMOSC_ST" Authority="RO" Bits="3" Description="EMOSC时钟稳定中断。" />
+        <Bit Name="IMOSC_ST" Authority="RO" Bits="1" Description="IMOSC时钟稳定中断。" />
+        <Bit Name="ISOSC_ST" Authority="RO" Bits="0" Description="ISOSC时钟稳定中断。" />
+      </Register>
+      <Register Name="SYSCON_MISR" Authority="RW" Address="0x4001108c" Width="32" Description="中断标志状态寄存器">
+        <Bit Name="CMD_ERR" Authority="RO" Bits="29" Description="命令错误中断，在对某些寄存器错误操作时会产生此中断。" />
+        <Bit Name="EV3TRG" Authority="RO" Bits="22" Description="事件触发输出Event3 触发的中断" />
+        <Bit Name="EV2TRG" Authority="RO" Bits="21" Description="事件触发输出Event2 触发的中断" />
+        <Bit Name="EV1TRG" Authority="RO" Bits="20" Description="事件触发输出Event1 触发的中断" />
+        <Bit Name="EV0TRG" Authority="RO" Bits="19" Description="事件触发输出Event0 触发的中断" />
+        <Bit Name="EM_CMFAIL" Authority="RO" Bits="18" Description="EMOSC时钟失效中断" />
+        <Bit Name="OPL_ERR" Authority="RO" Bits="14" Description="Option初始化配置加载失败中断。" />
+        <Bit Name="EFL_ERR" Authority="RO" Bits="13" Description="EFLASH校验失败中断。" />
+        <Bit Name="HWD_ERR" Authority="RO" Bits="12" Description="硬件除法器除零中断。" />
+        <Bit Name="LVD_INT" Authority="RO" Bits="11" Description="LVD中断。" />
+        <Bit Name="RAM_ERR" Authority="RO" Bits="10" Description="SRAM校验失败中断。" />
+        <Bit Name="IWDT_INT" Authority="RO" Bits="8" Description="IWDT中断。" />
+        <Bit Name="SYSCLK_ST" Authority="RO" Bits="7" Description="SYSCLK时钟稳定中断。" />
+        <Bit Name="HFOSC_ST" Authority="RO" Bits="4" Description="HFOSC时钟稳定中断。" />
+        <Bit Name="EMOSC_ST" Authority="RO" Bits="3" Description="EMOSC时钟稳定中断。" />
+        <Bit Name="IMOSC_ST" Authority="RO" Bits="1" Description="IMOSC时钟稳定中断。" />
+        <Bit Name="ISOSC_ST" Authority="RO" Bits="0" Description="ISOSC时钟稳定中断。" />
+      </Register>
+      <Register Name="SYSCON_RSR" Authority="RW" Address="0x40011090" Width="32" Description="复位源记录状态寄存器">
+        <Bit Name="WWDT" Authority="RW" Bits="13" Description="WWDT复位。" />
+        <Bit Name="EFL_ERR" Authority="RW" Bits="12" Description="EFLASH校验错误复位。" />
+        <Bit Name="RAM_ERR" Authority="RW" Bits="11" Description="SRAM校验错误复位。" />
+        <Bit Name="CPUFAULT" Authority="RW" Bits="9" Description="CPU异常自动复位。" />
+        <Bit Name="SWRST" Authority="RW" Bits="8" Description="SYSCON产生软件复位。" />
+        <Bit Name="CPURST" Authority="RW" Bits="7" Description="CPU软件复位。" />
+        <Bit Name="EMCKM" Authority="RW" Bits="6" Description="EMOSC CKM Fail复位。" />
+        <Bit Name="IWDT" Authority="RW" Bits="4" Description="IWDT复位。" />
+        <Bit Name="EXTRST" Authority="RW" Bits="2" Description="外部复位管脚复位。" />
+        <Bit Name="LVR" Authority="RW" Bits="1" Description="LVD复位。" />
+        <Bit Name="POR" Authority="RW" Bits="0" Description="POR上电复位。" />
+      </Register>
+      <Register Name="SYSCON_EXIRT" Authority="RW" Address="0x40011094" Width="32" Description="外部中断上升沿选择寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="外部中断上升沿/下降沿使能控制。&#xD;&#xA;0h：该边沿触发关闭。&#xD;&#xA;1h：该边沿触发打开。" />
+      </Register>
+      <Register Name="SYSCON_EXIFT" Authority="RW" Address="0x40011098" Width="32" Description="外部中断下降沿选择寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="外部中断上升沿/下降沿使能控制。&#xD;&#xA;0h：该边沿触发关闭。&#xD;&#xA;1h：该边沿触发打开。" />
+      </Register>
+      <Register Name="SYSCON_EXIER" Authority="RW" Address="0x4001109c" Width="32" Description="外部中断使能寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="外部中断使能控制。&#xD;&#xA;EXIER和EXIDR为只写寄存器。通过EXIER使能中断，EXIDR禁止中断。只有对寄存器写入’1’时才有效，读取时返回总为‘0’。&#xD;&#xA;寄存器写入时：&#xD;&#xA;0h：无效。&#xD;&#xA;1h：打开/关闭该EXI中断源。" />
+      </Register>
+      <Register Name="SYSCON_EXIDR" Authority="RW" Address="0x400110a0" Width="32" Description="外部中断禁止寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="外部中断使能控制。&#xD;&#xA;EXIER和EXIDR为只写寄存器。通过EXIER使能中断，EXIDR禁止中断。只有对寄存器写入’1’时才有效，读取时返回总为‘0’。&#xD;&#xA;寄存器写入时：&#xD;&#xA;0h：无效。&#xD;&#xA;1h：打开/关闭该EXI中断源。" />
+      </Register>
+      <Register Name="SYSCON_EXIMR" Authority="RW" Address="0x400110a4" Width="32" Description="外部中断使能/禁止状态寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="EXIMR为只读寄存器，读取时返回当前中断使能状态。&#xD;&#xA;读取时：&#xD;&#xA;0h：中断处于关闭状态。&#xD;&#xA;1h：中断处于打开状态。" />
+      </Register>
+      <Register Name="SYSCON_EXIAR" Authority="RW" Address="0x400110a8" Width="32" Description="外部中断软件触发寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="EXIAR为只写寄存器，只有对寄存器写入’1’时才有效，读取时返回总为‘0’。&#xD;&#xA;寄存器写入时：&#xD;&#xA;0h：无效。&#xD;&#xA;1h：软件触发该EXI中断源。" />
+      </Register>
+      <Register Name="SYSCON_EXICR" Authority="RW" Address="0x400110ac" Width="32" Description="外部中断清除寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="EXICR为读写寄存器。读取时返回当前中断pending标志。写入‘1’时，清除当前中断标志；写入‘0’时无效。&#xD;&#xA;读取时：&#xD;&#xA;0h：中断标志处于未Pending状态。&#xD;&#xA;1h：中断标志处于Pending状态。&#xD;&#xA;写入时：&#xD;&#xA;0h：无效。&#xD;&#xA;1h：清除该EXI Pending状态。" />
+      </Register>
+      <Register Name="SYSCON_EXIRS" Authority="RW" Address="0x400110b0" Width="32" Description="外部中断原始标志状态寄存器">
+        <Bit Name="EXI0 ~ EXI19" Authority="RW" Bits="19-0" Description="EXIRS为只读寄存器，读取时返回当前中断原始标志状态。&#xD;&#xA;读取时：&#xD;&#xA;0h：中断处于未Pending状态。&#xD;&#xA;1h：中断处于Pending状态。" />
+      </Register>
+      <Register Name="SYSCON_IWDCR" Authority="RW" Address="0x400110b4" Width="32" Description="独立看门狗控制寄存器">
+        <Bit Name="IWDT_KEY" Authority="RW" Bits="31-16" Description="对本寄存器进行写操作时，需要填入对应的KEY值。&#xD;&#xA;只有在IWDT_KEY等于0x8778时，对本寄存器的写入才有效" />
+        <Bit Name="BUSY" Authority="RO" Bits="12" Description="看门狗工作状态。&#xD;&#xA;0h：看门狗未使能。&#xD;&#xA;1h：看门狗已使能。" />
+        <Bit Name="DBGEN" Authority="RW" Bits="11" Description="调试使能控制。调试使能时，在CPU被调试器挂起时，时基计数器的计数时钟同时也被挂起。&#xD;&#xA;0h：调试禁止&#xD;&#xA;1h：调试使能" />
+        <Bit Name="OVTIME" Authority="RW" Bits="10-8" Description="总溢出时间设置。当看门狗计数器计数溢出时，产生复位。&#xD;&#xA;0h：128ms。&#xD;&#xA;1h：256ms。&#xD;&#xA;2h：512ms。&#xD;&#xA;3h：1.024s。&#xD;&#xA;4h：2.048s。&#xD;&#xA;5h：3.096s。&#xD;&#xA;6h：4.12s。&#xD;&#xA;7h：8.196s。" />
+        <Bit Name="INTVAL" Authority="RW" Bits="4-2" Description="看门狗报警中断的时间设置。当看门狗计数器计数到总溢出时间的一定比例时，产生报警中断。&#xD;&#xA;0h：1/8总溢出时间。&#xD;&#xA;1h：2/8总溢出时间。&#xD;&#xA;2h：3/8总溢出时间。&#xD;&#xA;3h：4/8总溢出时间。&#xD;&#xA;4h：5/8总溢出时间。&#xD;&#xA;5h：6/8总溢出时间。&#xD;&#xA;6h：7/8总溢出时间。&#xD;&#xA;7h：7/8总溢出时间。" />
+        <Bit Name="SHORT" Authority="RW" Bits="0" Description="SHORT工作模式，该模式用于缩短IWDT的溢出时间。正常使用时，保持该位为零。&#xD;&#xA;0h：禁止SHORT模式。&#xD;&#xA;1h：使能SHORT模式。" />
+      </Register>
+      <Register Name="SYSCON_IWDCNT" Authority="RW" Address="0x400110b8" Width="32" Description="独立看门狗控制计数器值">
+        <Bit Name="CLR_BUSY" Authority="RO" Bits="31" Description="看门狗清除请求执行状态。&#xD;&#xA;0h：没有挂起的清除操作。&#xD;&#xA;1h：当前清除正在执行。" />
+        <Bit Name="CLR" Authority="RW" Bits="30-24" Description="看门狗计数器清除请求。&#xD;&#xA;只写控制位，只有写入‘0x5A’时有效。" />
+        <Bit Name="CNT" Authority="RO" Bits="11-0" Description="返回IWDT当前计数值。" />
+      </Register>
+      <Register Name="SYSCON_IWDEDR" Authority="RW" Address="0x400110bc" Width="32" Description="独立看门狗使能寄存器">
+        <Bit Name="IWDTE_KEY" Authority="RW" Bits="31-16" Description="对本寄存器进行写操作时，需要填入对应的KEY值。&#xD;&#xA;只有在IWDTE_KEY等于0x7887时，对本寄存器的写入才有效。" />
+        <Bit Name="ENDIS" Authority="RW" Bits="15-0" Description="IWDT使能控制。&#xD;&#xA;写入0x55AA时，关闭IWDT。&#xD;&#xA;写入其他值时，使能IWDT。" />
+      </Register>
+      <Register Name="SYSCON_IOMAP0" Authority="RW" Address="0x400110c0" Width="32" Description="GPIO分组0的功能映射配置寄存器">
+        <Bit Name="CFGVAL7" Authority="RW" Bits="31-28" Description="" />
+        <Bit Name="CFGVAL6" Authority="RW" Bits="27-24" Description="" />
+        <Bit Name="CFGVAL5" Authority="RW" Bits="23-20" Description="" />
+        <Bit Name="CFGVAL4" Authority="RW" Bits="19-16" Description="" />
+        <Bit Name="CFGVAL3" Authority="RW" Bits="15-12" Description="" />
+        <Bit Name="CFGVAL2" Authority="RW" Bits="11-8" Description="" />
+        <Bit Name="CFGVAL1" Authority="RW" Bits="7-4" Description="" />
+        <Bit Name="CFGVAL0" Authority="RW" Bits="3-0" Description="" />
+      </Register>
+      <Register Name="SYSCON_IOMAP1" Authority="RW" Address="0x400110c4" Width="32" Description="GPIO分组1的功能映射配置寄存器" />
+      <Register Name="SYSCON_UID0" Authority="RW" Address="0x400110e4" Width="32" Description="UID寄存器0">
+        <Bit Name="UID" Authority="RO" Bits="31-0" Description="唯一ID寄存器。&#xD;&#xA;在出厂时，由工厂写入的唯一ID码。" />
+      </Register>
+      <Register Name="SYSCON_UID1" Authority="RW" Address="0x400110e8" Width="32" Description="UID寄存器1" />
+      <Register Name="SYSCON_UID2" Authority="RW" Address="0x400110ec" Width="32" Description="UID寄存器2" />
+      <Register Name="SYSCON_PWROPT" Authority="RW" Address="0x400110f0" Width="32" Description="供电恢复时间调整寄存器">
+        <Bit Name="EFLR_CTL" Authority="RW" Bits="21-20" Description="EFLASH的内部参考源使能硬件控制策略设置。&#xD;&#xA;0h：参考源不随模式改变切换供电开关。&#xD;&#xA;1h：参考源在 SLEEP模式下自动关闭。&#xD;&#xA;3h：参考源在 SLEEP模式、EFL_PD或 EFLASH LP模式下自动关闭。&#xD;&#xA;2h：保留。&#xD;&#xA;EFLASH LP模式通过OPT1[EFL_LPMD]控制位设置。" />
+        <Bit Name="EFLR_PD" Authority="RW" Bits="19-18" Description="EFLASH的内部参考软件使能控制。&#xD;&#xA;当EFLASH断电时，可以关闭EFLASH的参考源，以降低功耗。当写入‘11’时，关闭参考源的供电；当写入其他值时，打开参考源的供电。EFLASH参考源必须在EFLASH断电后，才能关闭；同样在恢复时，需要先恢复参考源，然后再打开EFLASH供电。" />
+        <Bit Name="EFL_PD" Authority="RW" Bits="17-16" Description="EFLASH 的电源控制。&#xD;&#xA;当程序在SRAM中运行时，为降低功耗，可以临时将EFLASH的供电关闭。当写入‘11’时，关闭EFLASH的供电；当写入其他值时，打开EFLASH的供电。" />
+        <Bit Name="TPWRCV_SLP" Authority="RW" Bits="15-8" Description="从SLEEP模式唤醒后的电源稳定时间调整。稳定时间计数器的工作时钟为2MHz。" />
+        <Bit Name="TPWRCV_DSL" Authority="RW" Bits="7-0" Description="从DEEPSLEEP模式唤醒后的电源稳定时间调整。稳定时间计数器的工作时钟为2MHz。" />
+      </Register>
+      <Register Name="SYSCON_EVTRG" Authority="RW" Address="0x400110f4" Width="32" Description="事件触发选择寄存器">
+        <Bit Name="CNTxCLR" Authority="" Bits="31-28" Description="TRGEVxCNT软件清除&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVxCNT重置为零" />
+        <Bit Name="" Authority="" Bits="27-26" Description="" />
+        <Bit Name="TRGxOE" Authority="" Bits="25-20" Description="外部触发端口TRGOUTx使能。&#xD;&#xA;0h：禁止触发输出。&#xD;&#xA;1h：允许触发输出。" />
+        <Bit Name="TRGSEL5" Authority="" Bits="19-18" Description="TRGEVx事件的触发源选择。&#xD;&#xA;0h：选择EXI16事件作为当前触发通道事件。&#xD;&#xA;1h：选择EXI17事件作为当前触发通道事件。&#xD;&#xA;2h：选择EXI18事件作为当前触发通道事件。&#xD;&#xA;3h：选择EXI19事件作为当前触发通道事件。" />
+        <Bit Name="TRGSEL4" Authority="" Bits="17-16" Description="TRGEVx事件的触发源选择。&#xD;&#xA;0h：选择EXI16事件作为当前触发通道事件。&#xD;&#xA;1h：选择EXI17事件作为当前触发通道事件。&#xD;&#xA;2h：选择EXI18事件作为当前触发通道事件。&#xD;&#xA;3h：选择EXI19事件作为当前触发通道事件。" />
+        <Bit Name="TRGSEL3" Authority="" Bits="15-12" Description="TRGEVx事件的触发源选择。&#xD;&#xA;0h：选择EXI0事件作为当前触发通道事件。&#xD;&#xA;1h：选择EXI1事件作为当前触发通道事件。&#xD;&#xA;2h：选择EXI2事件作为当前触发通道事件。&#xD;&#xA;3h：选择EXI3事件作为当前触发通道事件。&#xD;&#xA;……&#xD;&#xA;Fh：选择EXI15事件作为当前触发通道事件。" />
+        <Bit Name="TRGSEL2" Authority="" Bits="11-8" Description="TRGEVx事件的触发源选择。&#xD;&#xA;0h：选择EXI0事件作为当前触发通道事件。&#xD;&#xA;1h：选择EXI1事件作为当前触发通道事件。&#xD;&#xA;2h：选择EXI2事件作为当前触发通道事件。&#xD;&#xA;3h：选择EXI3事件作为当前触发通道事件。&#xD;&#xA;……&#xD;&#xA;Fh：选择EXI15事件作为当前触发通道事件。" />
+        <Bit Name="TRGSEL1" Authority="" Bits="7-4" Description="TRGEVx事件的触发源选择。&#xD;&#xA;0h：选择EXI0事件作为当前触发通道事件。&#xD;&#xA;1h：选择EXI1事件作为当前触发通道事件。&#xD;&#xA;2h：选择EXI2事件作为当前触发通道事件。&#xD;&#xA;3h：选择EXI3事件作为当前触发通道事件。&#xD;&#xA;……&#xD;&#xA;Fh：选择EXI15事件作为当前触发通道事件。" />
+        <Bit Name="TRGSEL0" Authority="" Bits="3-0" Description="TRGEVx事件的触发源选择。&#xD;&#xA;0h：选择EXI0事件作为当前触发通道事件。&#xD;&#xA;1h：选择EXI1事件作为当前触发通道事件。&#xD;&#xA;2h：选择EXI2事件作为当前触发通道事件。&#xD;&#xA;3h：选择EXI3事件作为当前触发通道事件。&#xD;&#xA;……&#xD;&#xA;Fh：选择EXI15事件作为当前触发通道事件。" />
+      </Register>
+      <Register Name="SYSCON_EVPS" Authority="RW" Address="0x400110f8" Width="32" Description="事件触发计数寄存器">
+        <Bit Name="TRGEV3CNT" Authority="RO" Bits="31-28" Description="当前TRGEVx事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。此计数器不能设置初始值，只能通过EVTRG的CNTCLR控制位进行清零。" />
+        <Bit Name="TRGEV2CNT" Authority="RO" Bits="27-24" Description="当前TRGEVx事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。此计数器不能设置初始值，只能通过EVTRG的CNTCLR控制位进行清零。" />
+        <Bit Name="TRGEV1CNT" Authority="RO" Bits="23-20" Description="当前TRGEVx事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。此计数器不能设置初始值，只能通过EVTRG的CNTCLR控制位进行清零。" />
+        <Bit Name="TRGEV0CNT" Authority="RO" Bits="19-16" Description="当前TRGEVx事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。此计数器不能设置初始值，只能通过EVTRG的CNTCLR控制位进行清零。" />
+        <Bit Name="TRGEV3PRD" Authority="RW" Bits="15-12" Description="TRGEVx 的事件计数器周期设置。&#xD;&#xA;当TRGEVx事件发生时，TRGEVxCNT递增一次，当TRGEVxCNT的计数值等于TRGEVxPRD设置周期时，产生TRGEVx触发事件。" />
+        <Bit Name="TRGEV2PRD" Authority="RW" Bits="11-8" Description="TRGEVx 的事件计数器周期设置。&#xD;&#xA;当TRGEVx事件发生时，TRGEVxCNT递增一次，当TRGEVxCNT的计数值等于TRGEVxPRD设置周期时，产生TRGEVx触发事件。" />
+        <Bit Name="TRGEV1PRD" Authority="RW" Bits="7-4" Description="TRGEVx 的事件计数器周期设置。&#xD;&#xA;当TRGEVx事件发生时，TRGEVxCNT递增一次，当TRGEVxCNT的计数值等于TRGEVxPRD设置周期时，产生TRGEVx触发事件。" />
+        <Bit Name="TRGEV0PRD" Authority="RW" Bits="3-0" Description="TRGEVx 的事件计数器周期设置。&#xD;&#xA;当TRGEVx事件发生时，TRGEVxCNT递增一次，当TRGEVxCNT的计数值等于TRGEVxPRD设置周期时，产生TRGEVx触发事件。" />
+      </Register>
+      <Register Name="SYSCON_EVSWF" Authority="RW" Address="0x400110fc" Width="32" Description="事件计数器软件触发控制寄存器">
+        <Bit Name="EV5SWF" Authority="RW" Bits="5" Description="软件产生一次EV5的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV4SWF" Authority="RW" Bits="4" Description="软件产生一次EV4的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV3SWF" Authority="RW" Bits="3" Description="软件产生一次EV3的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV2SWF" Authority="RW" Bits="2" Description="软件产生一次EV2的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV1SWF" Authority="RW" Bits="1" Description="软件产生一次EV1的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV0SWF" Authority="RW" Bits="0" Description="软件产生一次EV0的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+      </Register>
+      <Register Name="SYSCON_UREG0" Authority="RW" Address="0x40011100" Width="32" Description="32位用户寄存器">
+        <Bit Name="UREG" Authority="RW" Bits="31-0" Description="用户寄存器。&#xD;&#xA;可用于用户自定义信息临时保存的寄存器。此寄存器中的内容只有在POR复位时才会清除。" />
+      </Register>
+      <Register Name="SYSCON_UREG1" Authority="RW" Address="0x40011104" Width="32" Description="32位用户寄存器" />
+      <Register Name="SYSCON_UREG2" Authority="RW" Address="0x40011108" Width="32" Description="16位用户寄存器" />
+      <Register Name="SYSCON_UREG3" Authority="RW" Address="0x4001110c" Width="32" Description="16位用户寄存器" />
+    </Peripheral>
+    <Peripheral Name="ETCB">
+      <Register Name="ETCB_ENABLE" Authority="RW" Address="0x40012000" Width="32" Description="ETCB使能寄存器">
+        <Bit Name="ENABLE" Authority="RW" Bits="0" Description="ETCB模块使能控制&#xD;&#xA;&#xD;&#xA;0 : 禁止&#xD;&#xA;1 : 使能" />
+      </Register>
+      <Register Name="ETCB_SWTRG" Authority="RW" Address="0x40012004" Width="32" Description="ETCB软件触发寄存器">
+        <Bit Name="SWTRG_CHx" Authority="RW" Bits="7-0" Description="软件触发控制&#xD;&#xA;&#xD;&#xA;0 : 无效&#xD;&#xA;1 : 触发该通道的事件" />
+      </Register>
+      <Register Name="ETCB_CH0CON0" Authority="RW" Address="0x40012008" Width="32" Description="ETCB通道0控制寄存器0">
+        <Bit Name="SRC2_SEL" Authority="RW" Bits="26-21" Description="触发源2的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC2_EN" Authority="RW" Bits="20" Description="触发源2使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+        <Bit Name="SRC1_SEL" Authority="RW" Bits="16-11" Description="触发源1的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC1_EN" Authority="RW" Bits="10" Description="触发源1使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+        <Bit Name="SRC0_SEL" Authority="RW" Bits="6-1" Description="触发源0的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC0_EN" Authority="RW" Bits="0" Description="触发源0使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH0CON1" Authority="RW" Address="0x4001200c" Width="32" Description="ETCB通道0控制寄存器1">
+        <Bit Name="DST_SEL" Authority="RW" Bits="31-26" Description="触发目标选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH0_EN" Authority="RW" Bits="0" Description="通道0使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH1CON0" Authority="RW" Address="0x40012010" Width="32" Description="ETCB通道1控制寄存器0">
+        <Bit Name="DST2_SEL" Authority="RW" Bits="26-21" Description="触发目标2的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="DST2_EN" Authority="RW" Bits="20" Description="触发目标2使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+        <Bit Name="DST1_SEL" Authority="RW" Bits="16-11" Description="触发目标1的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="DST1_EN" Authority="RW" Bits="10" Description="触发目标1使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+        <Bit Name="DST0_SEL" Authority="RW" Bits="6-1" Description="触发目标0的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="DST0_EN" Authority="RW" Bits="0" Description="触发目标0使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH1CON1" Authority="RW" Address="0x40012014" Width="32" Description="ETCB通道1控制寄存器1">
+        <Bit Name="SRC_SEL" Authority="RW" Bits="31-26" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH1_EN" Authority="RW" Bits="0" Description="通1使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH2CON0" Authority="RW" Address="0x40012018" Width="32" Description="ETCB通道2控制寄存器0">
+        <Bit Name="DST2_EN" Authority="RW" Bits="26-20" Description="触发目标2使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+        <Bit Name="DST1_SEL" Authority="RW" Bits="16-11" Description="触发目标1的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="DST1_EN" Authority="RW" Bits="10" Description="触发目标1使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+        <Bit Name="DST0_SEL" Authority="RW" Bits="6-1" Description="触发目标0的事件选择位&#xD;&#xA;参考事件对应表" />
+        <Bit Name="DST0_EN" Authority="RW" Bits="0" Description="触发目标0使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH2CON1" Authority="RW" Address="0x4001201c" Width="32" Description="ETCB通道2控制寄存器1">
+        <Bit Name="SRC_SEL" Authority="RW" Bits="31-26" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH2_EN" Authority="RW" Bits="0" Description="通道2使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH3CON" Authority="RW" Address="0x40012030" Width="32" Description="ETCB通道3控制寄存器">
+        <Bit Name="DST_SEL" Authority="RW" Bits="31-26" Description="触发目标选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="18-12" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH3_EN" Authority="RW" Bits="0" Description="通道3使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH4CON" Authority="RW" Address="0x40012034" Width="32" Description="ETCB通道4控制寄存器">
+        <Bit Name="DST_SEL" Authority="RW" Bits="31-26" Description="触发目标选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="18-12" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH5_EN" Authority="RW" Bits="0" Description="通道5使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH5CON" Authority="RW" Address="0x40012038" Width="32" Description="ETCB通道5控制寄存器">
+        <Bit Name="DST_SEL" Authority="RW" Bits="31-26" Description="触发目标选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="18-12" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH4_EN" Authority="RW" Bits="0" Description="通道4使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH6CON" Authority="RW" Address="0x4001203c" Width="32" Description="ETCB通道6控制寄存器">
+        <Bit Name="DST_SEL" Authority="RW" Bits="31-26" Description="触发目标选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="18-12" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH6_EN" Authority="RW" Bits="0" Description="通道6使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+      <Register Name="ETCB_CH7CON" Authority="RW" Address="0x40012040" Width="32" Description="ETCB通道7控制寄存器">
+        <Bit Name="DST_SEL" Authority="RW" Bits="31-26" Description="触发目标选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="18-12" Description="触发源选择&#xD;&#xA;参考事件对应表" />
+        <Bit Name="TRIG_MODE" Authority="RW" Bits="1" Description="触发模式选择&#xD;&#xA;0: 硬件触发&#xD;&#xA;1: 软件触发 (由ETCB_SWTRG寄存器触发)" />
+        <Bit Name="CH7_EN" Authority="RW" Bits="0" Description="通道7使能控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="TOUCH">
+      <Register Name="TCH_CCR" Authority="RW" Address="0x40020000" Width="32" Description="Clock Control Register">
+        <Bit Name="IDCODE" Authority="RO" Bits="31-16" Description="当前TOUCH硬件版本信息" />
+        <Bit Name="PCKDIV" Authority="RW" Bits="15-8" Description="时钟分频控制，基于SYSCLK分频，目标时钟频率1Mhz，FTarget = FPCLK / (PCKDIV +1)" />
+        <Bit Name="TCKDIV" Authority="RW" Bits="7-2" Description="时钟分频控制，基于IMOSC分频，目标时钟频率1Mhz，FTarget = FTCLK / (TCKDIV +1)" />
+        <Bit Name="TEST_MODE" Authority="RW" Bits="1" Description="TOUCH TEST MODE，用于调整TRIM值" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="扫描时钟使能控制：&#xD;&#xA;0： 扫描时钟停止&#xD;&#xA;1： 扫描时钟开启" />
+      </Register>
+      <Register Name="TCH_CON0" Authority="RW" Address="0x40020004" Width="32" Description="Touch Sensor General Control Register0">
+        <Bit Name="OTHRCNTCLR" Authority="RW" Bits="27" Description="软件清零当前OTHRCNT&#xD;&#xA;0h：无效&#xD;&#xA;1h：复位OTHRCNT" />
+        <Bit Name="OTHRCNT" Authority="RW" Bits="26-24" Description="超出阈值判定&#xD;&#xA;0h：超出阈值1次认为超出阈值&#xD;&#xA;1h：连续2次超出阈值认为超出阈值&#xD;&#xA;…&#xD;&#xA;7h：连续8次超出阈值认为超出阈值" />
+        <Bit Name="TSCANSTB" Authority="RW" Bits="21-20" Description="发生LowPower-Normal模式切换，扫描稳定次数&#xD;&#xA;0h：1次扫描&#xD;&#xA;1h：2次扫描&#xD;&#xA;2h：3次扫描&#xD;&#xA;3h：4次扫描" />
+        <Bit Name="DIO_EN" Authority="RW" Bits="18" Description="滤波二极管使能控制&#xD;&#xA;0h：禁止&#xD;&#xA;1h：使能" />
+        <Bit Name="DSR" Authority="RW" Bits="17-16" Description="设置在扫描过程中，没有被激活为当前扫描通道的通道状态&#xD;&#xA;0h： 高阻状态&#xD;&#xA;1h： 低电平输出&#xD;&#xA;2h： 高电平输出&#xD;&#xA;3h： 高阻状态" />
+        <Bit Name="IDLE_PDEN" Authority="RW" Bits="14" Description="扫描空闲时，触控Hard-macro 模块使能控制&#xD;&#xA;0h：禁止&#xD;&#xA;1h：使能" />
+        <Bit Name="PSEL" Authority="RW" Bits="13" Description="Power selection &#xD;&#xA;0h:  FVR &#xD;&#xA;1h:  AVDD" />
+        <Bit Name="RSSEL" Authority="RW" Bits="12" Description="TCH_OVW_THR寄存器状态选择&#xD;&#xA;0h:  OVW状态&#xD;&#xA;1h:  OverTHR状态" />
+        <Bit Name="CKFEQSEL" Authority="RW" Bits="11" Description="扫描频率选择&#xD;&#xA;0h: 低频&#xD;&#xA;1h: 高频" />
+        <Bit Name="CKRND" Authority="RW" Bits="10" Description="扫描时钟频率随机化控制&#xD;&#xA;0h：关闭扫描时钟随机化&#xD;&#xA;1h：打开扫描时钟随机化" />
+        <Bit Name="CKSPR" Authority="RW" Bits="9" Description="扫描时钟扩频控制&#xD;&#xA;0h：关闭扫描时钟扩频&#xD;&#xA;1h：打开扫描时钟扩频" />
+        <Bit Name="ECLVL" Authority="RW" Bits="8-7" Description="外部C0端口电压选择&#xD;&#xA;0h：1V&#xD;&#xA;1h：2V&#xD;&#xA;2h：3V&#xD;&#xA;3h：3.6V" />
+        <Bit Name="SEQLEN" Authority="RW" Bits="6-2" Description="SEQUENCE模式下，扫描次数控制：&#xD;&#xA;00000b： 1次扫描&#xD;&#xA;00001b： 2次扫描&#xD;&#xA;…&#xD;&#xA;10000b： 17次扫描" />
+        <Bit Name="MODE" Authority="RW" Bits="1" Description="扫描模式启动位：&#xD;&#xA;0h：RSVD&#xD;&#xA;1h：使能SEQUENCE模式" />
+        <Bit Name="HMEN" Authority="RW" Bits="0" Description="TOUCH使能控制位&#xD;&#xA;0h： 关闭触控Hard-macro 模块&#xD;&#xA;1h： 开启触控Hard-macro 模块" />
+      </Register>
+      <Register Name="TCH_CON1" Authority="RW" Address="0x40020008" Width="32" Description="Touch Sensor General Control Register1">
+        <Bit Name="START" Authority="RW" Bits="0" Description="扫描启动控制位&#xD;&#xA;写操作时：&#xD;&#xA;0： 停止扫描&#xD;&#xA;1： 启动扫描&#xD;&#xA;读操作时：&#xD;&#xA;0： 扫描没有开始&#xD;&#xA;1： 扫描正在进行" />
+      </Register>
+      <Register Name="TCH_VALBUF" Authority="RW" Address="0x40020014" Width="32" Description="Touch Sample Value Buffer">
+        <Bit Name="VALBUF" Authority="RO" Bits="15-0" Description="当前扫描通道采样值" />
+      </Register>
+      <Register Name="TCH_SENCNT" Authority="RW" Address="0x40020018" Width="32" Description="Current Sensor Node Discharge Counter Value">
+        <Bit Name="SENCNT" Authority="RO" Bits="15-0" Description="Sensor Node 充放电次数计数器当前值" />
+      </Register>
+      <Register Name="TCH_TCHCNT" Authority="RW" Address="0x4002001c" Width="32" Description="Current Touch Sample Counter Value">
+        <Bit Name="TCHCNT" Authority="RO" Bits="15-0" Description="扫描时间计数器当前值 " />
+      </Register>
+      <Register Name="TCH_THR" Authority="RW" Address="0x40020020" Width="32" Description="Touch OFFSET Threshold Register">
+        <Bit Name="OFF_THR" Authority="RW" Bits="15-0" Description="扫描偏差阈值" />
+      </Register>
+      <Register Name="TCH_RISR" Authority="RW" Address="0x40020028" Width="32" Description="Touch Senor Raw Interrupt Status Register">
+        <Bit Name="OVR_TIME" Authority="RO" Bits="5" Description="扫描超时中断" />
+        <Bit Name="OVR_OVW" Authority="RO" Bits="4" Description="TCH_CHxVAL over write 中断" />
+        <Bit Name="OVR_FLW" Authority="RO" Bits="3" Description="TCHCNT溢出中断" />
+        <Bit Name="OVR_THR" Authority="RO" Bits="2" Description="两次扫描OFFSET值超出扫描OFFSET阈值中断" />
+        <Bit Name="SEQ_DNE" Authority="RO" Bits="1" Description="SEQUENCE模式所有通道扫描完成中断" />
+        <Bit Name="SIN_DNE" Authority="RO" Bits="0" Description="SEQ模式一个通道扫描完成中断" />
+      </Register>
+      <Register Name="TCH_IER" Authority="RW" Address="0x4002002c" Width="32" Description="Touch Senor Interrupt Masking Control Register">
+        <Bit Name="OVR_TIME" Authority="RW" Bits="5" Description="扫描超时中断使能" />
+        <Bit Name="OVR_OVW" Authority="RW" Bits="4" Description="TCH_CHxVAL over write 中断使能" />
+        <Bit Name="OVR_FLW" Authority="RW" Bits="3" Description="TCHCNT溢出中断使能" />
+        <Bit Name="OVR_THR" Authority="RW" Bits="2" Description="两次扫描OFFSET值超出扫描OFFSET阈值中断使能" />
+        <Bit Name="SEQ_DNE" Authority="RW" Bits="1" Description="SEQUENCE模式所有通道扫描完成中断使能" />
+        <Bit Name="SIN_DNE" Authority="RW" Bits="0" Description="SEQ模式一个通道扫描完成中断使能" />
+      </Register>
+      <Register Name="TCH_ICR" Authority="RW" Address="0x40020030" Width="32" Description="Touch Senor Interrupt Clear Control Register">
+        <Bit Name="OVR_TIME" Authority="RW" Bits="5" Description="清除扫描超时中断" />
+        <Bit Name="OVR_OVW" Authority="RW" Bits="4" Description="清除TCH_CHxVAL over write 中断" />
+        <Bit Name="OVR_FLW" Authority="RW" Bits="3" Description="清除TCHCNT溢出中断" />
+        <Bit Name="OVR_THR" Authority="RW" Bits="2" Description="清除两次扫描OFFSET值超出扫描OFFSET阈值中断" />
+        <Bit Name="SEQ_DNE" Authority="RW" Bits="1" Description="清除SEQUENCE模式所有通道扫描完成中断" />
+        <Bit Name="SIN_DNE" Authority="RW" Bits="0" Description="清除SEQ模式一个通道扫描完成中断" />
+      </Register>
+      <Register Name="TCH_RWSR" Authority="RW" Address="0x40020034" Width="32" Description="Touch Sample Value R/W Status Register">
+        <Bit Name="CHx_RWSR(x=0~16)" Authority="RW" Bits="16-0" Description="通道采样值读写状态位，当采样值写入TCH_SEQxVA时，对应通道读写状态位置1，软件读取TCH_SEQxVA后读写状态位清0。软件也可以通过写入该状态寄存器手动清0&#xD;&#xA;当读取时，返回当前通道采样值写入状态&#xD;&#xA;0h：该通道没有新的采样值写入&#xD;&#xA;1h：该通道有新的采样值写入，软件可以读取对应通道采样值寄存器，读取后自动清0&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道写入状态" />
+      </Register>
+      <Register Name="TCH_OVW_THR" Authority="RW" Address="0x40020038" Width="32" Description="Touch OverThreshold Status Register">
+        <Bit Name="CHx_OVW_THR(x=0~16)" Authority="" Bits="16-0" Description="当TCH_CON0[11]=0时，该状态寄存器表示通道采样值OVW状态。&#xD;&#xA;0h：采样值寄存器的值是最新的&#xD;&#xA;1h: 采样值寄存器当前值未被软件读取时，有新的采样值存入&#xD;&#xA;当CH_CON0[11]=1时，该状态寄存器表示通道采样值偏差状态寄存器&#xD;&#xA;0h：通道相邻两次采样值偏差没有超出阈值&#xD;&#xA;1h：通道相邻两次采样值偏差超出阈值" />
+      </Register>
+      <Register Name="TCH_OVF" Authority="RW" Address="0x4002003c" Width="32" Description="Touch Overflow status Register">
+        <Bit Name="CHx_OVF(x=0~16)" Authority="" Bits="16-0" Description="TCH CNT溢出状态标志" />
+      </Register>
+      <Register Name="TCH_OVT" Authority="RW" Address="0x40020040" Width="32" Description="Touch OverTIME status Register">
+        <Bit Name="CHx_OVT(x=0~16)" Authority="" Bits="16-0" Description="通道扫描时间内，未完成既定目标值扫描状态标志" />
+      </Register>
+      <Register Name="TCH_SYNCR" Authority="RW" Address="0x40020044" Width="32" Description="Touch Sync Control Register">
+        <Bit Name="REARM" Authority="RW" Bits="8" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前触发使能状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：不允许后续触发，需要REARM&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="OSTMD" Authority="RW" Bits="7" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="SYNC2EN" Authority="RW" Bits="2" Description="外部触发START使能控制通道2。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能LPT_PEND触发源通道" />
+        <Bit Name="SYNC1EN" Authority="RW" Bits="1" Description="外部触发START使能控制通道1。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能ETCB TOUCH_SYNCIN触发源通道" />
+        <Bit Name="SYNC0EN" Authority="RW" Bits="0" Description="外部触发START使能控制通道0。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能RTC触发源通道" />
+      </Register>
+      <Register Name="TCH_EVTRG" Authority="RW" Address="0x40020048" Width="32" Description="Touch Trigger Event Generation Control Register">
+        <Bit Name="TRGOE" Authority="RW" Bits="8" Description="外部触发端口输出使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRGSEL" Authority="RW" Bits="2-0" Description="TRGEVT事件的触发源选择&#xD;&#xA;000：禁止TRGOUT触发输出&#xD;&#xA;001：SINGLE_DONE事件&#xD;&#xA;010：SEQ_DONE事件&#xD;&#xA;011：OVR_THR事件&#xD;&#xA;100：OVR_OVF事件&#xD;&#xA;101：OVR_OVW事件&#xD;&#xA;110：OVR_OVT事件" />
+      </Register>
+      <Register Name="TCH_EVPS" Authority="RW" Address="0x4002004c" Width="32" Description="Touch Trigger Event Generation Prescaler">
+        <Bit Name="TRGEVCNT" Authority="RW" Bits="11-8" Description="TRGEVT事件计数器设置。&#xD;&#xA;读取时，返回当前事件计数器值；&#xD;&#xA;写入时，直接更新事件计数器值。" />
+        <Bit Name="TRGEVPRD" Authority="RW" Bits="3-0" Description="TRGEVT事件计数的周期设置。&#xD;&#xA;当TRGEVT事件发生次数满足周期时，才产生TRGEV触发事件" />
+      </Register>
+      <Register Name="TCH_EVSWF" Authority="RW" Address="0x40020050" Width="32" Description="Touch Trigger Event Software Force Generation">
+        <Bit Name="EVSWF" Authority="RW" Bits="0" Description="软件产生一次EV0的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+      </Register>
+      <Register Name="TCH_CH0VAL[18]" Authority="RW" Address="0x40021000" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH1VAL[18]" Authority="RW" Address="0x40021004" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH2VAL[18]" Authority="RW" Address="0x40021008" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH3VAL[18]" Authority="RW" Address="0x4002100c" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH4VAL[18]" Authority="RW" Address="0x40021010" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH5VAL[18]" Authority="RW" Address="0x40021014" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH6VAL[18]" Authority="RW" Address="0x40021018" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH7VAL[18]" Authority="RW" Address="0x4002101c" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH8VAL[18]" Authority="RW" Address="0x40021020" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH9VAL[18]" Authority="RW" Address="0x40021024" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH10VAL[18]" Authority="RW" Address="0x40021028" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH11VAL[18]" Authority="RW" Address="0x4002102c" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH12VAL[18]" Authority="RW" Address="0x40021030" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH13VAL[18]" Authority="RW" Address="0x40021034" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH14VAL[18]" Authority="RW" Address="0x40021038" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH15VAL[18]" Authority="RW" Address="0x4002103c" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH16VAL[18]" Authority="RW" Address="0x40021040" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_CH17VAL[18]" Authority="RW" Address="0x40021044" Width="32" Description="CHx Touch Sample Value Register">
+        <Bit Name="CHxCNT" Authority="RO" Bits="15-0" Description="通道x原值采样值寄存器" />
+      </Register>
+      <Register Name="TCH_SEQ0CON[18]" Authority="RW" Address="0x40021048" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ1CON[18]" Authority="RW" Address="0x4002104c" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ2CON[18]" Authority="RW" Address="0x40021050" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ3CON[18]" Authority="RW" Address="0x40021054" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ4CON[18]" Authority="RW" Address="0x40021058" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ5CON[18]" Authority="RW" Address="0x4002105c" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ6CON[18]" Authority="RW" Address="0x40021060" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ7CON[18]" Authority="RW" Address="0x40021064" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ8CON[18]" Authority="RW" Address="0x40021068" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ9CON[18]" Authority="RW" Address="0x4002106c" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ10CON[18]" Authority="RW" Address="0x40021070" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ11CON[18]" Authority="RW" Address="0x40021074" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ12CON[18]" Authority="RW" Address="0x40021078" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ13CON[18]" Authority="RW" Address="0x4002107c" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ14CON[18]" Authority="RW" Address="0x40021080" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ15CON[18]" Authority="RW" Address="0x40021084" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ16CON[18]" Authority="RW" Address="0x40021088" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+      <Register Name="TCH_SEQ17CON[18]" Authority="RW" Address="0x4002108c" Width="32" Description="SEQ Mode Control Register for each sub-sequence">
+        <Bit Name="DCKDIV" Authority="RW" Bits="25-24" Description="扫描频率分频" />
+        <Bit Name="ICON" Authority="RW" Bits="22-20" Description="补偿电流控制" />
+        <Bit Name="CHSEL" Authority="RW" Bits="19-15" Description="扫描通道配置" />
+        <Bit Name="SCANTIME" Authority="RW" Bits="14-12" Description="当前扫描通道扫描时间值&#xD;&#xA;3’b000-禁止通道扫描时间设置&#xD;&#xA;3’b001-通道扫描时间为1ms&#xD;&#xA;3’b010-通道扫描时间为1.5ms&#xD;&#xA;3’b011-通道扫描时间为2ms&#xD;&#xA;3’b100-通道扫描时间为3ms&#xD;&#xA;3’b101-通道扫描时间为5ms&#xD;&#xA;3’b110-通道扫描时间为10ms&#xD;&#xA;3’b111-通道扫描时间为100ms" />
+        <Bit Name="SENPRD" Authority="RW" Bits="11-0" Description="当前扫描通道目标值，实际值为[SENPRD,4’b1111]" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="ADC">
+      <Register Name="ADC_ECR" Authority="RW" Address="0x40030000" Width="32" Description="时钟使能寄存器">
+        <Bit Name="" Authority="" Bits="31-0" Description="" />
+      </Register>
+      <Register Name="ADC_DCR" Authority="RW" Address="0x40030004" Width="32" Description="时钟禁止寄存器">
+        <Bit Name="DBGEN" Authority="RW" Bits="31" Description="DBGEN: ADC调试模式禁止&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止ADC调试模式" />
+        <Bit Name="ADCCLKEN" Authority="RW" Bits="1" Description="ADC: ADC时钟禁止&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止ADC时钟" />
+      </Register>
+      <Register Name="ADC_PMSR" Authority="RW" Address="0x40030008" Width="32" Description="功耗管理状态寄存器">
+        <Bit Name="DBGEN" Authority="RO" Bits="31" Description="DBGEN : 调试模式&#xD;&#xA;0: ADC在调试模式下不停止 &#xD;&#xA;1: ADC 在调试模式下停止工作" />
+        <Bit Name="IPICODE" Authority="RO" Bits="29-4" Description="IPICODE[25:0] : IP识别码&#xD;&#xA;模块的版本号，共26位" />
+        <Bit Name="ADCCLKEN" Authority="RO" Bits="1" Description="ADC : ADC时钟状态&#xD;&#xA;0: ADC时钟被禁止&#xD;&#xA;1: ADC时钟被使能" />
+      </Register>
+      <Register Name="ADC_CR" Authority="RW" Address="0x40030010" Width="32" Description="控制寄存器">
+        <Bit Name="ACCURACY" Authority="RW" Bits="31" Description="ACCURACY: ADC转换精度选择位&#xD;&#xA;0: 保留&#xD;&#xA;1: 12位&#xD;&#xA;注意：该位请保持为1." />
+        <Bit Name="FVR_LVL" Authority="RW" Bits="25" Description="FVR_LVL: 固定电压参考源的电压值选择&#xD;&#xA; 0: 2.048V&#xD;&#xA; 1: 4.096V&#xD;&#xA;注：AVREF选择FVR时无需操作这位。" />
+        <Bit Name="FVR_EN" Authority="RW" Bits="24" Description="FVR_EN: 使能固定电压参考源&#xD;&#xA; 0: 禁止&#xD;&#xA; 1: 使能&#xD;&#xA;注：AVREF选择FVR时无需操作这位。" />
+        <Bit Name="INTVREF_SEL" Authority="RW" Bits="18-17" Description="INTVREF_SEL: 内部参考电压输入源选择&#xD;&#xA; 00: 保留&#xD;&#xA; 01: 保留&#xD;&#xA; 10: 内部1.0V电压&#xD;&#xA; 11: 保留&#xD;&#xA;注意：目前只提供1.0V作为参考电压。" />
+        <Bit Name="INTVREF_OUTEN" Authority="RW" Bits="16" Description="INTVREF_OUTEN: 使能内部参考电压输出到管脚&#xD;&#xA;0: 输出到管脚(INTV)禁止&#xD;&#xA; 1: 输出到管脚(INTV)使能&#xD;&#xA;注：该位只影响INTVREF是否输出到IO管脚，并不影响AVREF以及ADC输入通道的INTVREF使用" />
+        <Bit Name="VREF_SEL" Authority="RW" Bits="9-6" Description="VREF: ADC电压参考电源选择&#xD;&#xA; 0000: 正向为内部VDD，负向为VSS&#xD;&#xA; 0001: 正向为外部VREF+管脚，负向为VSS&#xD;&#xA; 0010: 正向为FVR 2.048V输出，负向为VSS&#xD;&#xA; 0011: 正向为FVR 4.096V输出，负向为VSS&#xD;&#xA; 0100: 正向为内部INTVREF输出，负向为VSS&#xD;&#xA; 1000: 正向为内部VDD，负向为VREF-&#xD;&#xA; 1001: 正向为外部VREF+管脚，负向为VREF-&#xD;&#xA; 1010: 正向为FVR 2.048V输出，负向为VREF-&#xD;&#xA; 1011: 正向为FVR 4.096V输出，负向为VREF-&#xD;&#xA; 1100: 正向为内部INTVREF输出，负向为VREF-&#xD;&#xA; 其它: 保留&#xD;&#xA;注意：使用FVR做参考时，外部需要接100nF的电容。" />
+        <Bit Name="SWTRG" Authority="RW" Bits="5" Description="SWTRG : 软件触发&#xD;&#xA; 0: 无效&#xD;&#xA; 1: 触发转换序列" />
+        <Bit Name="STOP" Authority="RW" Bits="4" Description="STOP: 在连续转换模式下停止转换&#xD;&#xA;0: 无效&#xD;&#xA;1: 停止连续转换" />
+        <Bit Name="START" Authority="RW" Bits="3" Description="START : 开始转换&#xD;&#xA;0: 无效&#xD;&#xA;1: 开始模数转换，清除EOC标志位&#xD;&#xA;注意：在开始转换前，用户必须保证ADC已经处于准备好转换的状态(ADC_SR中的READY位必须为1)" />
+        <Bit Name="ADCDIS" Authority="RW" Bits="2" Description="ADCDIS : ADC模拟模块禁止&#xD;&#xA;0: 无效&#xD;&#xA;1: 关闭ADC模块(待机模式)&#xD;&#xA;如果ADCEN和ADCDIS都写1，那么ADC会被禁用。" />
+        <Bit Name="ADCEN" Authority="RW" Bits="1" Description="ADCEN : ADC模拟模块使能&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能ADC模块" />
+        <Bit Name="SWRST" Authority="RW" Bits="0" Description="SWRST : ADC软件复位&#xD;&#xA;0: 无效&#xD;&#xA;1: 复位ADC模块&#xD;&#xA;&#xD;&#xA;当软件复位发生时，除了ADC_PMSR寄存器以外，其它所有寄存器都会恢复初始值。" />
+      </Register>
+      <Register Name="ADC_MR" Authority="RW" Address="0x40030014" Width="32" Description="模式寄存器">
+        <Bit Name="CONTCV" Authority="RW" Bits="31" Description="CONTCV: 连续转换&#xD;&#xA;0: 单次转换模式。ADC根据NBRCH[3:0]中设置的值转换输入的信号并且停止&#xD;&#xA;1: 连续转换模式。ADC根据NBRCH[3:0]中设置的值转换输入的信号并且重复不停的循环转换。&#xD;&#xA;该位初始值为0.&#xD;&#xA;注意：在连续转换模式下，ADC收到停止指令后，仍然会完成当前正在进行的转换，看起来像是多转换了一次。" />
+        <Bit Name="CMP_OS" Authority="RW" Bits="30" Description="CMP_OS: 一次性比较&#xD;&#xA;0: 每次得到比较结果时，都会产生ADC_CMPx中断&#xD;&#xA;1: 只有转换结果从比ADC_CMPxH小的值变成比它大的值，或者从比ADC_CMPxL大的值变成比它小的值时，才会产生ADC_CMPx中断。" />
+        <Bit Name="NBRCMP1" Authority="RW" Bits="25-22" Description="NBRCMP1[3:0]: 需要比较的转换序列&#xD;&#xA;当该次转换结果大于或者小于ADC_CMP1寄存器时，将产生一个CMPxH/CMPxL中断" />
+        <Bit Name="NBRCMP0" Authority="RW" Bits="19-16" Description="NBRCMP0[3:0]: 需要比较的转换序列&#xD;&#xA;当该次转换结果大于或者小于ADC_CMP0寄存器时，将产生一个CMPxH/CMPxL中断" />
+        <Bit Name="NBRCH" Authority="RW" Bits="13-10" Description="NBRCH[3:0]: 转换序列个数&#xD;&#xA;0000b:1&#xD;&#xA;0001b:2&#xD;&#xA;…&#xD;&#xA;1111b:16&#xD;&#xA;注意： 即使在单次转换模式，如果NBRCH[3:0]的值大于0，ADC也会进行多次转换。" />
+        <Bit Name="PRLVAL" Authority="RW" Bits="4-0" Description="PRLVAL[4:0]: 分频设置&#xD;&#xA;将PCLK分频，给ADC模拟模块作为时钟。&#xD;&#xA;&#xD;&#xA;如果PRLVAL == 0，那么 FADC = PCLK&#xD;&#xA;否则 FADC = PCLK / (2*PRLVAL)&#xD;&#xA;注意：&#xD;&#xA;- ADC模拟模块的时钟频率不能超过24MHz&#xD;&#xA;- 当选择INTVREF作为ADC参考电压时，ADC模拟模块的时钟频率不能超过2MHz。FVR做参考时，没有限制。&#xD;&#xA;- 如果系统时钟为40MHz，那么PRLVAL至少为1 " />
+      </Register>
+      <Register Name="ADC_SHR" Authority="RW" Address="0x40030018" Width="32" Description="采样保持周期寄存器">
+        <Bit Name="SHR" Authority="RW" Bits="7-0" Description="SHR : 采样保持 (Sample &amp; Hold) 周期数&#xD;&#xA;设置ADC转换中采样保持的周期数，该周期数基于ADC_MR寄存器中PRLVAL分频后的ADC工作时钟频率FADC。采样保持周期数至少为3个周期，小于3的值无法写入该寄存器。" />
+      </Register>
+      <Register Name="ADC_CSR" Authority="RW" Address="0x4003001c" Width="32" Description="状态清除寄存器">
+        <Bit Name="SEQ_END[x](x=0~15)" Authority="RW" Bits="31-16" Description="SEQ_END[x] : SEQx序列转换完成中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+        <Bit Name="CMP1L" Authority="RW" Bits="7" Description="CMP1L : 转换结果小于ADC_CMP1中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+        <Bit Name="CMP1H" Authority="RW" Bits="6" Description="CMP1H : 转换结果大于ADC_CMP1中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+        <Bit Name="CMP0L" Authority="RW" Bits="5" Description="CMP0L : 转换结果小于ADC_CMP0中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+        <Bit Name="CMP0H" Authority="RW" Bits="4" Description="CMP0H : 转换结果大于ADC_CMP0中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+        <Bit Name="OVR" Authority="RW" Bits="2" Description="OVR : 转换溢出中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+        <Bit Name="READY" Authority="RW" Bits="1" Description="READY : ADC已准备好可以转换中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 清除该中断" />
+      </Register>
+      <Register Name="ADC_SR" Authority="RW" Address="0x40030020" Width="32" Description="状态寄存器">
+        <Bit Name="SEQ_END[x](x=0~15)" Authority="RO" Bits="31-16" Description="SEQ_END[x] : SEQx序列转换完成中断&#xD;&#xA;0: 该转换序列没完成&#xD;&#xA;1: 该转换序列已完成" />
+        <Bit Name="SEQ_INDEX" Authority="RO" Bits="13-10" Description="SEQ_INDEX : 当前转换序列&#xD;&#xA;该寄存器的值为当前转换的序列号" />
+        <Bit Name="CTCVS" Authority="RO" Bits="9" Description="CTCVS : 连续转换模式状态&#xD;&#xA;0: 单次模式&#xD;&#xA;1: 连续模式" />
+        <Bit Name="ADCENS" Authority="RO" Bits="8" Description="ADCENS : ADC使能状态&#xD;&#xA;0: ADC被禁止&#xD;&#xA;1: ADC 被使能" />
+        <Bit Name="CMP1L" Authority="RO" Bits="7" Description="CMP1L : 比较功能的状态&#xD;&#xA;0: ADC转换的结果比ADC_CMP1大&#xD;&#xA;1: ADC转换的结果比ADC_CMP1小" />
+        <Bit Name="CMP1H" Authority="RO" Bits="6" Description="CMP1H : 比较功能的状态&#xD;&#xA;0: ADC转换的结果比ADC_CMP1小&#xD;&#xA;1: ADC转换的结果比ADC_CMP1大" />
+        <Bit Name="CMP0L" Authority="RO" Bits="5" Description="CMP0L : 比较功能的状态&#xD;&#xA;0: ADC转换的结果比ADC_CMP0大&#xD;&#xA;1: ADC转换的结果比ADC_CMP0小" />
+        <Bit Name="CMP0H" Authority="RO" Bits="4" Description="CMP0H : 比较功能的状态&#xD;&#xA;0: ADC转换的结果比ADC_CMP0小&#xD;&#xA;1: ADC转换的结果比ADC_CMP0大" />
+        <Bit Name="OVR" Authority="RO" Bits="2" Description="OVR : 转换溢出&#xD;&#xA;0: 最后一次读ADC_DR时，ADC没有完成任何转换或者只完成了1次转换 &#xD;&#xA;1: 最后一次读ADC_DR时，ADC完成了2次或者2次以上的转换" />
+        <Bit Name="READY" Authority="RO" Bits="1" Description="READY : ADC已准备好可以转换&#xD;&#xA;0: ADC忽略开始或者停止指令：因为它还没有准备好或者转换未结束它还在工作中&#xD;&#xA;1: ADC已经准备好，可以开始一个转换" />
+        <Bit Name="EOC" Authority="RO" Bits="0" Description="EOC : 转换结束&#xD;&#xA;0: 转换未结束，仍在进行中&#xD;&#xA;1: 转换完成，ADC_DR中的数据有效。当ADC_DR被读取时该位自动清零 " />
+      </Register>
+      <Register Name="ADC_IER" Authority="RW" Address="0x40030024" Width="32" Description="中断使能寄存器">
+        <Bit Name="SEQ_END[x](x=0~15)" Authority="RW" Bits="31-16" Description="SEQ_END[x] : SEQx序列转换完成中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="CMP1L" Authority="RW" Bits="7" Description="CMP1L : 转换结果低于ADC_CMP1中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="CMP1H" Authority="RW" Bits="6" Description="CMP1H : 转换结果高于ADC_CMP1中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="CMP0L" Authority="RW" Bits="5" Description="CMP0L : 转换结果低于ADC_CMP0中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="CMP0H" Authority="RW" Bits="4" Description="CMP0H : 转换结果高于ADC_CMP0中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="OVR" Authority="RW" Bits="2" Description="OVR : 转换溢出中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="READY" Authority="RW" Bits="1" Description="READY : ADC READY中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+        <Bit Name="EOC" Authority="RW" Bits="0" Description="EOC : 转换结束中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 使能该中断" />
+      </Register>
+      <Register Name="ADC_IDR" Authority="RW" Address="0x40030028" Width="32" Description="中断禁止寄存器">
+        <Bit Name="SEQ_END[x](x=0~15)" Authority="RW" Bits="31-16" Description="SEQ_END[x] : SEQx序列转换完成中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="CMP1L" Authority="RW" Bits="7" Description="CMP1L : 转换结果低于ADC_CMP1中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="CMP1H" Authority="RW" Bits="6" Description="CMP1H : 转换结果高于ADC_CMP1中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="CMP0L" Authority="RW" Bits="5" Description="CMP0L : 转换结果低于ADC_CMP0中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="CMP0H" Authority="RW" Bits="4" Description="CMP0H : 转换结果高于ADC_CMP0中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="OVR" Authority="RW" Bits="2" Description="OVR : 转换溢出中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="READY" Authority="RW" Bits="1" Description="READY : ADC READY中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+        <Bit Name="EOC" Authority="RW" Bits="0" Description="EOC : 转换结束中断&#xD;&#xA;0: 无效&#xD;&#xA;1: 禁止该中断" />
+      </Register>
+      <Register Name="ADC_IMR" Authority="RW" Address="0x4003002c" Width="32" Description="中断使能状态寄存器">
+        <Bit Name="SEQ_END[x](x=0~15)" Authority="RO" Bits="31-16" Description="SEQ_END[x] : SEQx序列转换完成中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="CMP1L" Authority="RO" Bits="7" Description="CMP1L : 转换结果低于ADC_CMP1中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="CMP1H" Authority="RO" Bits="6" Description="CMP1H : 转换结果高于ADC_CMP1中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="CMP0L" Authority="RO" Bits="5" Description="CMP0L : 转换结果低于ADC_CMP0中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="CMP0H" Authority="RO" Bits="4" Description="CMP0H : 转换结果高于ADC_CMP0中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="OVR" Authority="RO" Bits="2" Description="OVR : 转换溢出中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="READY" Authority="RO" Bits="1" Description="READY : ADC READY中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+        <Bit Name="EOC" Authority="RO" Bits="0" Description="EOC : 转换结束中断&#xD;&#xA;0: 该中断没有使能&#xD;&#xA;1: 该中断使能" />
+      </Register>
+      <Register Name="ADC_SEQ0" Authority="RW" Address="0x40030030" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ1" Authority="RW" Address="0x40030034" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ2" Authority="RW" Address="0x40030038" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ3" Authority="RW" Address="0x4003003c" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ4" Authority="RW" Address="0x40030040" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ5" Authority="RW" Address="0x40030044" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ6" Authority="RW" Address="0x40030048" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ7" Authority="RW" Address="0x4003004c" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ8" Authority="RW" Address="0x40030050" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ9" Authority="RW" Address="0x40030054" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ10" Authority="RW" Address="0x40030058" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ11" Authority="RW" Address="0x4003005c" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ12" Authority="RW" Address="0x40030060" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ13" Authority="RW" Address="0x40030064" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ14" Authority="RW" Address="0x40030068" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_SEQ15" Authority="RW" Address="0x4003006c" Width="32" Description="转换序列寄存器x (x=0~15)">
+        <Bit Name="TRG_SRC" Authority="RW" Bits="19-17" Description="TRG_SRC : 触发源选择&#xD;&#xA;000 : 无触发&#xD;&#xA;001 : 软件触发(ADC_CR中的SWTRG位)&#xD;&#xA;010 : ADC_SYNCIN0 (ETCB)&#xD;&#xA;011 : ADC_SYNCIN1 (ETCB)&#xD;&#xA;100 : ADC_SYNCIN2 (ETCB)&#xD;&#xA;101 : ADC_SYNCIN3 (ETCB)&#xD;&#xA;110 : ADC_SYNCIN4 (ETCB)&#xD;&#xA;111 : ADC_SYNCIN5 (ETCB)" />
+        <Bit Name="AVG_SEL" Authority="RW" Bits="16-13" Description="AVG_SEL: 平均系数选择&#xD;&#xA;0000 : 1 (不平均)&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AVG_CAL" Authority="RW" Bits="12" Description="AVG_CAL : 平均值计算&#xD;&#xA;0 : 禁用&#xD;&#xA;1 : 使能&#xD;&#xA;当这位使能时，ADC转换结果寄存器ADC_DRx将保存若干次数转换后的平均值，由CV_CNT和AVG_SEL决定。否则，ADC_DRx将保存最后一次转换的值。" />
+        <Bit Name="CV_CNT" Authority="RW" Bits="11-8" Description="CV_CNT: 连续重复采样次数&#xD;&#xA;0000 : 1&#xD;&#xA;0001 : 2&#xD;&#xA;0010 : 4&#xD;&#xA;0011 : 8&#xD;&#xA;0100 : 16&#xD;&#xA;0101 : 32&#xD;&#xA;0110 : 64&#xD;&#xA;0111 : 128&#xD;&#xA;1000 : 256&#xD;&#xA;1001 : 512&#xD;&#xA;Other : 保留" />
+        <Bit Name="AIN_SEL" Authority="RW" Bits="4-0" Description="模拟输入通道选择&#xD;&#xA;AIN_SEL值	输入选择&#xD;&#xA;BIN	DEC	&#xD;&#xA;00000	0	AIN0&#xD;&#xA;00001	1	AIN1&#xD;&#xA;00010	2	AIN2&#xD;&#xA;……		……&#xD;&#xA;10001	17	AIN17&#xD;&#xA;……	……	N/A&#xD;&#xA;11100	28	INTVREF&#xD;&#xA;11101	29	1/4VDD&#xD;&#xA;11110	30	VSS&#xD;&#xA;11111	31	N/A" />
+      </Register>
+      <Register Name="ADC_PRI" Authority="RW" Address="0x40030070" Width="32" Description="转换序列优先级寄存器">
+        <Bit Name="PRI" Authority="RW" Bits="3-0" Description="PRI : 转换序列优先权选择&#xD;&#xA;&#xD;&#xA;比这个寄存器数值低的序列有更高的优先权" />
+      </Register>
+      <Register Name="ADC_TDL0" Authority="RW" Address="0x40030074" Width="32" Description="触发延时寄存器0">
+        <Bit Name="TRGIN2_TDL" Authority="RW" Bits="23-16" Description="TRGIN2_TDL : ADC_TRGIN2触发延时控制&#xD;&#xA;&#xD;&#xA;触发时，使用计数器延时一段时间后，才开始ADC转换。&#xD;&#xA;延时 = (TRGIN2_TDL+1) x 4 x PCLK周期" />
+        <Bit Name="TRGIN1_TDL" Authority="RW" Bits="15-8" Description="TRGIN1_TDL : ADC_TRGIN1触发延时控制&#xD;&#xA;&#xD;&#xA;触发时，使用计数器延时一段时间后，才开始ADC转换。&#xD;&#xA;延时 = (TRGIN1_TDL+1) x 4 x PCLK周期" />
+        <Bit Name="TRGIN0_TDL" Authority="RW" Bits="7-0" Description="TRGIN0_TDL : ADC_TRGIN0触发延时控制&#xD;&#xA;&#xD;&#xA;触发时，使用计数器延时一段时间后，才开始ADC转换。&#xD;&#xA;延时 = (TRGIN0_TDL+1) x 4 x PCLK周期" />
+      </Register>
+      <Register Name="ADC_TDL1" Authority="RW" Address="0x40030078" Width="32" Description="触发延时寄存器1">
+        <Bit Name="TRGIN5_TDL" Authority="RW" Bits="23-16" Description="TRGIN5_TDL : ADC_TRGIN5触发延时控制&#xD;&#xA;&#xD;&#xA;触发时，使用计数器延时一段时间后，才开始ADC转换。&#xD;&#xA;延时 = (TRGIN5_TDL+1) x 4 x PCLK周期" />
+        <Bit Name="TRGIN4_TDL" Authority="RW" Bits="15-8" Description="TRGIN4_TDL : ADC_TRGIN4触发延时控制&#xD;&#xA;&#xD;&#xA;触发时，使用计数器延时一段时间后，才开始ADC转换。&#xD;&#xA;延时 = (TRGIN4_TDL+1) x 4 x PCLK周期" />
+        <Bit Name="TRGIN3_TDL" Authority="RW" Bits="7-0" Description="TRGIN3_TDL : ADC_TRGIN3触发延时控制&#xD;&#xA;&#xD;&#xA;触发时，使用计数器延时一段时间后，才开始ADC转换。&#xD;&#xA;延时 = (TRGIN3_TDL+1) x 4 x PCLK周期" />
+      </Register>
+      <Register Name="ADC_SYNCR" Authority="RW" Address="0x4003007c" Width="32" Description="触发同步控制寄存器">
+        <Bit Name="REARMx(x=0~5)" Authority="RW" Bits="21-16" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="OSTMDx(x=0~5)" Authority="RW" Bits="13-8" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="SYNCENx(x=0~5)" Authority="RW" Bits="5-0" Description="外部同步触发使能控制。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能当前触发输入通道&#xD;&#xA;SYNCINx： ETCB模块中配置的触发源" />
+      </Register>
+      <Register Name="ADC_EVTRG" Authority="RW" Address="0x40030088" Width="32" Description="事件触发选择寄存器">
+        <Bit Name="TRG1OE" Authority="RW" Bits="21" Description="触发输出端口ADC_ TRGOUT1使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG0OE" Authority="RW" Bits="20" Description="触发输出端口ADC_TRGOUT0使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG1SEL" Authority="RW" Bits="12-8" Description="TRGEV0，TRGEV1事件的触发源选择。&#xD;&#xA;00000：无触发输出&#xD;&#xA;00001：EOC事件&#xD;&#xA;00010：READY事件&#xD;&#xA;00011：OVR事件&#xD;&#xA;00100：CMP0H事件&#xD;&#xA;00101：CMP0L事件&#xD;&#xA;00110：CMP1H事件&#xD;&#xA;00111：CMP1L事件&#xD;&#xA;01000：SEQ_END[0]事件&#xD;&#xA;01001：SEQ_END[1]事件&#xD;&#xA;01010：SEQ_END[2]事件&#xD;&#xA;01011：SEQ_END[3]事件&#xD;&#xA;01100：SEQ_END[4]事件&#xD;&#xA;01101：SEQ_END[5]事件&#xD;&#xA;01110：SEQ_END[6]事件&#xD;&#xA;01111：SEQ_END[7]事件&#xD;&#xA;10000：SEQ_END[8]事件&#xD;&#xA;10001：SEQ_END[9]事件&#xD;&#xA;10010：SEQ_END[10]事件&#xD;&#xA;10011：SEQ_END[11]事件&#xD;&#xA;10100：SEQ_END[12]事件&#xD;&#xA;10101：SEQ_END[13]事件&#xD;&#xA;10110：SEQ_END[14]事件&#xD;&#xA;10111：SEQ_END[15]事件" />
+        <Bit Name="TRG0SEL" Authority="RW" Bits="4-0" Description="TRGEV0，TRGEV1事件的触发源选择。&#xD;&#xA;00000：无触发输出&#xD;&#xA;00001：EOC事件&#xD;&#xA;00010：READY事件&#xD;&#xA;00011：OVR事件&#xD;&#xA;00100：CMP0H事件&#xD;&#xA;00101：CMP0L事件&#xD;&#xA;00110：CMP1H事件&#xD;&#xA;00111：CMP1L事件&#xD;&#xA;01000：SEQ_END[0]事件&#xD;&#xA;01001：SEQ_END[1]事件&#xD;&#xA;01010：SEQ_END[2]事件&#xD;&#xA;01011：SEQ_END[3]事件&#xD;&#xA;01100：SEQ_END[4]事件&#xD;&#xA;01101：SEQ_END[5]事件&#xD;&#xA;01110：SEQ_END[6]事件&#xD;&#xA;01111：SEQ_END[7]事件&#xD;&#xA;10000：SEQ_END[8]事件&#xD;&#xA;10001：SEQ_END[9]事件&#xD;&#xA;10010：SEQ_END[10]事件&#xD;&#xA;10011：SEQ_END[11]事件&#xD;&#xA;10100：SEQ_END[12]事件&#xD;&#xA;10101：SEQ_END[13]事件&#xD;&#xA;10110：SEQ_END[14]事件&#xD;&#xA;10111：SEQ_END[15]事件" />
+      </Register>
+      <Register Name="ADC_DR0" Authority="RW" Address="0x40030100" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR1" Authority="RW" Address="0x40030104" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR2" Authority="RW" Address="0x40030108" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR3" Authority="RW" Address="0x4003010c" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR4" Authority="RW" Address="0x40030110" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR5" Authority="RW" Address="0x40030114" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR6" Authority="RW" Address="0x40030118" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR7" Authority="RW" Address="0x4003011c" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR8" Authority="RW" Address="0x40030120" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR9" Authority="RW" Address="0x40030124" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR10" Authority="RW" Address="0x40030128" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR11" Authority="RW" Address="0x4003012c" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR12" Authority="RW" Address="0x40030130" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR13" Authority="RW" Address="0x40030134" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR14" Authority="RW" Address="0x40030138" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_DR15" Authority="RW" Address="0x4003013c" Width="32" Description="转换结果寄存器x (x=0~15)">
+        <Bit Name="DATA" Authority="RO" Bits="20-0" Description="DATA[20:0] : 转换结果&#xD;&#xA;模数转换的结果在转换结束后，锁存在该寄存器，直到下一个转换完成前一直有效可供读取。&#xD;&#xA;当该寄存器被读取后，ADC_SR的EOC位会被自动清零。&#xD;&#xA;注意： 该寄存器的有效位数跟ADC_SEQx的AVG_SEL位有关，选择的平均次数小于转换次数时，该寄存器的位数会多于12位。" />
+      </Register>
+      <Register Name="ADC_CMP0" Authority="RW" Address="0x40030140" Width="32" Description="比较数据0寄存器">
+        <Bit Name="CMP0" Authority="RW" Bits="20-0" Description="CMP0[20:0] : 比较阈值&#xD;&#xA;模数转换结束后，转换结果会和这个寄存器的值进行比较，根据比较的结果触发相应的中断。" />
+      </Register>
+      <Register Name="ADC_CMP1" Authority="RW" Address="0x40030144" Width="32" Description="比较数据1寄存器">
+        <Bit Name="CMP1" Authority="RW" Bits="20-0" Description="CMP1[20:0] : 比较阈值&#xD;&#xA;模数转换结束后，转换结果会和这个寄存器的值进行比较，根据比较的结果触发相应的中断。" />
+      </Register>
+      <Register Name="ADC_DRMASK" Authority="RW" Address="0x40030148" Width="32" Description="禁止转换结果更新寄存器">
+        <Bit Name="DRMASK" Authority="RW" Bits="15-0" Description="DRMASK : 禁止转换结果更新&#xD;&#xA;如果该位为1 (MASK)，那么对应的ADC_DRx寄存器的转换结果则不会被更新，而是保持MASK之前的值。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="COUNTER A">
+      <Register Name="CADATAH" Authority="RW" Address="0x40050000" Width="32" Description="计数器A DATAH寄存器">
+        <Bit Name="CADATAH" Authority="RW" Bits="15-0" Description="DATAH控制计数器A输出的高电平宽度" />
+      </Register>
+      <Register Name="CADATAL" Authority="RW" Address="0x40050004" Width="32" Description="计数器A DATAL寄存器">
+        <Bit Name="CADATAL" Authority="RW" Bits="15-0" Description="DATAL控制计数器A输出的低电平宽度" />
+      </Register>
+      <Register Name="CACON" Authority="RW" Address="0x40050008" Width="32" Description="计数器A控制寄存器">
+        <Bit Name="CARRIERON" Authority="RW" Bits="25" Description="载波信号控制位&#xD;&#xA;&#xD;&#xA;0: 关闭载波&#xD;&#xA;1: 打开载波" />
+        <Bit Name="ENVELOPE" Authority="RW" Bits="24" Description="REM输出信号选择位&#xD;&#xA;&#xD;&#xA;0: 选择载波信号为输出&#xD;&#xA;1: 选择包络信号为输出" />
+        <Bit Name="REM_STAT" Authority="RW" Bits="23" Description="当关闭载波时REM的输出状态&#xD;&#xA;&#xD;&#xA;0: 低&#xD;&#xA;1: 高" />
+        <Bit Name="BTPEND_REM_CON" Authority="RW" Bits="22-21" Description="当BT周期结束中断发生时，硬件触发控制载波的打开和关闭&#xD;&#xA;&#xD;&#xA;00/11: 禁止CARRIERON的硬件自动触发&#xD;&#xA;01: BT周期结束中断发生时，CARRIERON位会被硬件自动清零&#xD;&#xA;10: BT周期结束中断发生时，CARRIERON位会被硬件自动置位" />
+        <Bit Name="BTMATCH_REM_CON" Authority="RW" Bits="20-19" Description="当BT脉冲匹配中断发生时，硬件触发控制载波的打开和关闭&#xD;&#xA;&#xD;&#xA;00/11: 禁止CARRIERON的硬件自动触发&#xD;&#xA;01: BT脉冲匹配中断发生时，CARRIERON位会被硬件自动清零&#xD;&#xA;10: BT脉冲匹配中断发生时，CARRIERON位会被硬件自动置位" />
+        <Bit Name="HW_STROBE_DATA" Authority="RW" Bits="18-17" Description="使能计数值寄存器的硬件自动更新功能&#xD;&#xA;X1: 当BT脉冲匹配中断发生时，计数值会自动载入计数器&#xD;&#xA;1X: 当BT周期结束中断发生时，计数值会自动载入计数器" />
+        <Bit Name="SW_STROBE_DATA" Authority="RW" Bits="16" Description="使能计数值寄存器软件更新&#xD;&#xA;&#xD;&#xA;当该位置位时，CADATAH和CADATAL的值会更新到计数器中" />
+        <Bit Name="CA_CLK" Authority="RW" Bits="5-4" Description="输入时钟频率选择位&#xD;&#xA;&#xD;&#xA;00: PCLK&#xD;&#xA;01: PCLK/2&#xD;&#xA;10: PCLK/4&#xD;&#xA;11: PCLK/8" />
+        <Bit Name="STOP" Authority="RW" Bits="3" Description="停止位&#xD;&#xA;&#xD;&#xA;计数器A在工作时，该位为0。需要停止计数器A，则需将该位写1。" />
+        <Bit Name="START" Authority="RW" Bits="2" Description="启动位。&#xD;&#xA;&#xD;&#xA;写1会启动计数器A。&#xD;&#xA;计数器A开始计数后，该位会被自动清零。" />
+        <Bit Name="MODE" Authority="RW" Bits="1" Description="模式选择位&#xD;&#xA;&#xD;&#xA;0: 单次(One Shot)模式&#xD;&#xA;1: 重复模式" />
+        <Bit Name="OSP" Authority="RW" Bits="0" Description="载波输出波形的初始极性选择&#xD;&#xA;&#xD;&#xA;0: 低&#xD;&#xA;1: 高" />
+      </Register>
+      <Register Name="CAINTMASK" Authority="RW" Address="0x4005000c" Width="32" Description="计数器A中断控制寄存器">
+        <Bit Name="PLEND_INT" Authority="RW" Bits="1" Description="低电平结束中断的使能/禁止" />
+        <Bit Name="PHEND_INT" Authority="RW" Bits="0" Description="高电平结束中断的使能/禁止" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="BT0">
+      <Register Name="BT_RSSR" Authority="RW" Address="0x40051000" Width="32" Description="Reset/Start Control Register">
+        <Bit Name="SRR" Authority="RW" Bits="15-12" Description="软件复位控制位。&#xD;&#xA;当对当前控制位写入‘0x5’时，BT模块会被复位。复位后，所有寄存器都恢复为RESET状态。" />
+        <Bit Name="START" Authority="RW" Bits="0" Description="计数器启动控制。&#xD;&#xA;0h：写入’0’时，停止计数器。&#xD;&#xA;1h：写入’1’时，启动计数器。&#xD;&#xA;&#xD;&#xA;读取时，返回当前计数器的工作状态。&#xD;&#xA;0h：计数器处于IDLE状态。&#xD;&#xA;1h：计数器处于工作状态。" />
+      </Register>
+      <Register Name="BT_CR" Authority="RW" Address="0x40051004" Width="32" Description="General Control Register">
+        <Bit Name="CNTRLD" Authority="RW" Bits="16" Description="硬件自动重载CNT值控制位。&#xD;&#xA;0：当CNT计数值等于PRDR时，CNT自动清零，重新开始计数。&#xD;&#xA;1：不进行CNT重载，计数器一直计数直到溢出后重新开始计数。" />
+        <Bit Name="SYNCMD" Authority="RW" Bits="15" Description="同步触发结果控制位。&#xD;&#xA;0h：同步触发发生时，计数器重置并触发所有具有缓存（Shadow）的寄存器将缓存内容更新到活动寄存器中。&#xD;&#xA;1h：同步触发发生时，只是计数器重置。" />
+        <Bit Name="AREARM" Authority="RW" Bits="14" Description="硬件自动REARM控制位。&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：计数器周期结束时，自动REARM" />
+        <Bit Name="REARM1" Authority="RW" Bits="13" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="REARM0" Authority="RW" Bits="12" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="OSTMD1" Authority="RW" Bits="11" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="OSTMD0" Authority="RW" Bits="10" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="SYNCEN1" Authority="RW" Bits="9" Description="外部同步触发输入使能控制。&#xD;&#xA;0h：禁止外部触发&#xD;&#xA;1h：使能外部触发" />
+        <Bit Name="SYNCEN0" Authority="RW" Bits="8" Description="外部同步触发输入使能控制。&#xD;&#xA;0h：禁止外部触发&#xD;&#xA;1h：使能外部触发" />
+        <Bit Name="STARTST" Authority="RW" Bits="7" Description="BT开始计数时，BT_OUT状态设置。&#xD;&#xA;0：低电平&#xD;&#xA;1：高电平" />
+        <Bit Name="IDLEST" Authority="RW" Bits="6" Description="BT停止计数时，BT_OUT状态设置。&#xD;&#xA;0：低电平&#xD;&#xA;1：高电平" />
+        <Bit Name="EXTCKM" Authority="RW" Bits="5" Description="计数器时钟源选择。&#xD;&#xA;0h：计数器基于PCLK的分频计数&#xD;&#xA;1h：由同步触发端口触发计数" />
+        <Bit Name="OPM" Authority="RW" Bits="4" Description="计数器单次触发工作模式选择。&#xD;&#xA;0h：连续计数工作模式&#xD;&#xA;1h：单次触发工作模式" />
+        <Bit Name="SHDWSTP" Authority="RW" Bits="3" Description="START控制位的Shadow功能使能控制。START置位不受此位控制，清除时受此位控制。当选择Shadow模式时，START控制位在周期结束时清除。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式" />
+        <Bit Name="UPDATE" Authority="RW" Bits="2" Description="PRDR和PSCR软件强制更新。当对UPDATE写入‘1’时，PRDR和PSCR的Shadow寄存器内容将被载入到活动寄存器中。&#xD;&#xA;0h: 无效. &#xD;&#xA;1h: 触发更新" />
+        <Bit Name="DBGEN" Authority="RW" Bits="1" Description="调试使能控制。调试使能时，在CPU被调试器挂起时，时基计数器的计数时钟同时也被挂起。&#xD;&#xA;0h：调试禁止&#xD;&#xA;1h：调试使能" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="时基计数器的时钟使能控制。&#xD;&#xA;0h：计数器计数时钟禁止。&#xD;&#xA;1h：计数器计数时钟使能。" />
+      </Register>
+      <Register Name="BT_PSCR" Authority="RW" Address="0x40051008" Width="32" Description="Counter Clock Prescaler Register">
+        <Bit Name="PSCR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;BT的计数器时钟频率为PCLK/(PSCR+1)" />
+      </Register>
+      <Register Name="BT_PRDR" Authority="RW" Address="0x4005100c" Width="32" Description="Period Register">
+        <Bit Name="CMPLINK" Authority="RW" Bits="31" Description="CMP寄存器同步写入控制。&#xD;&#xA;当对PRDR进行更新时，若该控制位同时写入’1’时，则CMP寄存器同时被更新成和PRDR一样的值。" />
+        <Bit Name="PRDR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;当计数器计数值等于PRDR的设置值时，下一个计数周期计数器将从零开始计数。" />
+      </Register>
+      <Register Name="BT_CMP" Authority="RW" Address="0x40051010" Width="32" Description="Compare Data">
+        <Bit Name="CMP" Authority="RW" Bits="15-0" Description="比较值寄存器。&#xD;&#xA;当CNT值等于CMP时，下个计数周期开始BT输出将翻转。" />
+      </Register>
+      <Register Name="BT_CNT" Authority="RW" Address="0x40051014" Width="32" Description="Counter Register">
+        <Bit Name="CNT" Authority="RW" Bits="15-0" Description="当前计数器计数值寄存器。&#xD;&#xA;对CNT读取时，返回当前计数器值。对CNT写入时，将直接更新CNT的计数值。CNT计数器没有Shadow寄存器，CPU的写入将直接影响当前计数器值。" />
+      </Register>
+      <Register Name="BT_EVTRG" Authority="RW" Address="0x40051018" Width="32" Description="Event Generation Control Register">
+        <Bit Name="TRGOE" Authority="RW" Bits="20" Description="外部触发端口TRGOUT输出使能。&#xD;&#xA;0h：禁止触发输出到ETCB。&#xD;&#xA;1h：允许触发输出到ETCB。" />
+        <Bit Name="TRGSEL" Authority="RW" Bits="3-0" Description="TRGEV事件的触发源选择控制位。&#xD;&#xA;0h：禁止TRGOUT的触发。&#xD;&#xA;1h：指定PEND事件用于产生TRGEV事件。&#xD;&#xA;2h：指定CMP事件用于产生TRGEV事件。&#xD;&#xA;3h：指定OVF事件用于产生TRGEV事件。&#xD;&#xA;其他：保留" />
+      </Register>
+      <Register Name="BT_EVSWF" Authority="RW" Address="0x40051024" Width="32" Description="Event Counter Software Trigger Register">
+        <Bit Name="EVSWF" Authority="RW" Bits="0" Description="软件产生一次TRGEV事件。&#xD;&#xA;0h：写入’0’无效。&#xD;&#xA;1h：软件产生一次TRGEV事件。" />
+      </Register>
+      <Register Name="BT_RISR" Authority="RW" Address="0x40051028" Width="32" Description="Raw Interrupt Status Register">
+        <Bit Name="TRGEV" Authority="RO" Bits="3" Description="事件触发中断请求原始标志状态。" />
+        <Bit Name="OVF" Authority="RO" Bits="2" Description="OVF中断请求原始标志状态。" />
+        <Bit Name="CMP" Authority="RO" Bits="1" Description="CMP Match中断请求原始标志状态。" />
+        <Bit Name="PEND" Authority="RO" Bits="0" Description="PEND周期结束中断请求原始标志状态。" />
+      </Register>
+      <Register Name="BT_IMCR" Authority="RW" Address="0x4005102c" Width="32" Description="Interrupt Masking Control Register">
+        <Bit Name="EVTRG" Authority="RW" Bits="3" Description="事件触发中断中断使能控制位。" />
+        <Bit Name="OVF" Authority="RW" Bits="2" Description="OVF中断使能控制位。" />
+        <Bit Name="CMP" Authority="RW" Bits="1" Description="CMP Match中断使能控制位" />
+        <Bit Name="PEND" Authority="RW" Bits="0" Description="PEND中断使能控制位。" />
+      </Register>
+      <Register Name="BT_MISR" Authority="RW" Address="0x40051030" Width="32" Description="Masked Interrupt Status Register">
+        <Bit Name="EVTRG" Authority="RO" Bits="3" Description="事件触发中断请求标志状态。" />
+        <Bit Name="OVF" Authority="RO" Bits="2" Description="OVF中断请求标志状态。" />
+        <Bit Name="CMP" Authority="RO" Bits="1" Description="CMP Match中断请求标志状态。" />
+        <Bit Name="PEND" Authority="RO" Bits="0" Description="PEND周期结束中断请求标志状态。" />
+      </Register>
+      <Register Name="BT_ICR" Authority="RW" Address="0x40051034" Width="32" Description="Interrupt Clear Register">
+        <Bit Name="EVTRG" Authority="RW" Bits="3" Description="清除事件触发中断原始中断状态位。" />
+        <Bit Name="OVF" Authority="RW" Bits="2" Description="清除OVF原始中断状态位。" />
+        <Bit Name="CMP" Authority="RW" Bits="1" Description="清除CMP Match原始中断状态位。" />
+        <Bit Name="PEND" Authority="RW" Bits="0" Description="清除PEND原始中断状态位。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="BT1">
+      <Register Name="BT_RSSR" Authority="RW" Address="0x40052000" Width="32" Description="Reset/Start Control Register">
+        <Bit Name="SRR" Authority="RW" Bits="15-12" Description="软件复位控制位。&#xD;&#xA;当对当前控制位写入‘0x5’时，BT模块会被复位。复位后，所有寄存器都恢复为RESET状态。" />
+        <Bit Name="START" Authority="RW" Bits="0" Description="计数器启动控制。&#xD;&#xA;0h：写入’0’时，停止计数器。&#xD;&#xA;1h：写入’1’时，启动计数器。&#xD;&#xA;&#xD;&#xA;读取时，返回当前计数器的工作状态。&#xD;&#xA;0h：计数器处于IDLE状态。&#xD;&#xA;1h：计数器处于工作状态。" />
+      </Register>
+      <Register Name="BT_CR" Authority="RW" Address="0x40052004" Width="32" Description="General Control Register">
+        <Bit Name="CNTRLD" Authority="RW" Bits="16" Description="硬件自动重载CNT值控制位。&#xD;&#xA;0：当CNT计数值等于PRDR时，CNT自动清零，重新开始计数。&#xD;&#xA;1：不进行CNT重载，计数器一直计数直到溢出后重新开始计数。" />
+        <Bit Name="SYNCMD" Authority="RW" Bits="15" Description="同步触发结果控制位。&#xD;&#xA;0h：同步触发发生时，计数器重置并触发所有具有缓存（Shadow）的寄存器将缓存内容更新到活动寄存器中。&#xD;&#xA;1h：同步触发发生时，只是计数器重置。" />
+        <Bit Name="AREARM" Authority="RW" Bits="14" Description="硬件自动REARM控制位。&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：计数器周期结束时，自动REARM" />
+        <Bit Name="REARM1" Authority="RW" Bits="13" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="REARM0" Authority="RW" Bits="12" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="OSTMD1" Authority="RW" Bits="11" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="OSTMD0" Authority="RW" Bits="10" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="SYNCEN1" Authority="RW" Bits="9" Description="外部同步触发输入使能控制。&#xD;&#xA;0h：禁止外部触发&#xD;&#xA;1h：使能外部触发" />
+        <Bit Name="SYNCEN0" Authority="RW" Bits="8" Description="外部同步触发输入使能控制。&#xD;&#xA;0h：禁止外部触发&#xD;&#xA;1h：使能外部触发" />
+        <Bit Name="STARTST" Authority="RW" Bits="7" Description="BT开始计数时，BT_OUT状态设置。&#xD;&#xA;0：低电平&#xD;&#xA;1：高电平" />
+        <Bit Name="IDLEST" Authority="RW" Bits="6" Description="BT停止计数时，BT_OUT状态设置。&#xD;&#xA;0：低电平&#xD;&#xA;1：高电平" />
+        <Bit Name="EXTCKM" Authority="RW" Bits="5" Description="计数器时钟源选择。&#xD;&#xA;0h：计数器基于PCLK的分频计数&#xD;&#xA;1h：由同步触发端口触发计数" />
+        <Bit Name="OPM" Authority="RW" Bits="4" Description="计数器单次触发工作模式选择。&#xD;&#xA;0h：连续计数工作模式&#xD;&#xA;1h：单次触发工作模式" />
+        <Bit Name="SHDWSTP" Authority="RW" Bits="3" Description="START控制位的Shadow功能使能控制。START置位不受此位控制，清除时受此位控制。当选择Shadow模式时，START控制位在周期结束时清除。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式" />
+        <Bit Name="UPDATE" Authority="RW" Bits="2" Description="PRDR和PSCR软件强制更新。当对UPDATE写入‘1’时，PRDR和PSCR的Shadow寄存器内容将被载入到活动寄存器中。&#xD;&#xA;0h: 无效. &#xD;&#xA;1h: 触发更新" />
+        <Bit Name="DBGEN" Authority="RW" Bits="1" Description="调试使能控制。调试使能时，在CPU被调试器挂起时，时基计数器的计数时钟同时也被挂起。&#xD;&#xA;0h：调试禁止&#xD;&#xA;1h：调试使能" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="时基计数器的时钟使能控制。&#xD;&#xA;0h：计数器计数时钟禁止。&#xD;&#xA;1h：计数器计数时钟使能。" />
+      </Register>
+      <Register Name="BT_PSCR" Authority="RW" Address="0x40052008" Width="32" Description="Counter Clock Prescaler Register">
+        <Bit Name="PSCR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;BT的计数器时钟频率为PCLK/(PSCR+1)" />
+      </Register>
+      <Register Name="BT_PRDR" Authority="RW" Address="0x4005200c" Width="32" Description="Period Register">
+        <Bit Name="CMPLINK" Authority="RW" Bits="31" Description="CMP寄存器同步写入控制。&#xD;&#xA;当对PRDR进行更新时，若该控制位同时写入’1’时，则CMP寄存器同时被更新成和PRDR一样的值。" />
+        <Bit Name="PRDR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;当计数器计数值等于PRDR的设置值时，下一个计数周期计数器将从零开始计数。" />
+      </Register>
+      <Register Name="BT_CMP" Authority="RW" Address="0x40052010" Width="32" Description="Compare Data">
+        <Bit Name="CMP" Authority="RW" Bits="15-0" Description="比较值寄存器。&#xD;&#xA;当CNT值等于CMP时，下个计数周期开始BT输出将翻转。" />
+      </Register>
+      <Register Name="BT_CNT" Authority="RW" Address="0x40052014" Width="32" Description="Counter Register">
+        <Bit Name="CNT" Authority="RW" Bits="15-0" Description="当前计数器计数值寄存器。&#xD;&#xA;对CNT读取时，返回当前计数器值。对CNT写入时，将直接更新CNT的计数值。CNT计数器没有Shadow寄存器，CPU的写入将直接影响当前计数器值。" />
+      </Register>
+      <Register Name="BT_EVTRG" Authority="RW" Address="0x40052018" Width="32" Description="Event Generation Control Register">
+        <Bit Name="TRGOE" Authority="RW" Bits="20" Description="外部触发端口TRGOUT输出使能。&#xD;&#xA;0h：禁止触发输出到ETCB。&#xD;&#xA;1h：允许触发输出到ETCB。" />
+        <Bit Name="TRGSEL" Authority="RW" Bits="3-0" Description="TRGEV事件的触发源选择控制位。&#xD;&#xA;0h：禁止TRGOUT的触发。&#xD;&#xA;1h：指定PEND事件用于产生TRGEV事件。&#xD;&#xA;2h：指定CMP事件用于产生TRGEV事件。&#xD;&#xA;3h：指定OVF事件用于产生TRGEV事件。&#xD;&#xA;其他：保留" />
+      </Register>
+      <Register Name="BT_EVSWF" Authority="RW" Address="0x40052024" Width="32" Description="Event Counter Software Trigger Register">
+        <Bit Name="EVSWF" Authority="RW" Bits="0" Description="软件产生一次TRGEV事件。&#xD;&#xA;0h：写入’0’无效。&#xD;&#xA;1h：软件产生一次TRGEV事件。" />
+      </Register>
+      <Register Name="BT_RISR" Authority="RW" Address="0x40052028" Width="32" Description="Raw Interrupt Status Register">
+        <Bit Name="TRGEV" Authority="RO" Bits="3" Description="事件触发中断请求原始标志状态。" />
+        <Bit Name="OVF" Authority="RO" Bits="2" Description="OVF中断请求原始标志状态。" />
+        <Bit Name="CMP" Authority="RO" Bits="1" Description="CMP Match中断请求原始标志状态。" />
+        <Bit Name="PEND" Authority="RO" Bits="0" Description="PEND周期结束中断请求原始标志状态。" />
+      </Register>
+      <Register Name="BT_IMCR" Authority="RW" Address="0x4005202c" Width="32" Description="Interrupt Masking Control Register">
+        <Bit Name="EVTRG" Authority="RW" Bits="3" Description="事件触发中断中断使能控制位。" />
+        <Bit Name="OVF" Authority="RW" Bits="2" Description="OVF中断使能控制位。" />
+        <Bit Name="CMP" Authority="RW" Bits="1" Description="CMP Match中断使能控制位" />
+        <Bit Name="PEND" Authority="RW" Bits="0" Description="PEND中断使能控制位。" />
+      </Register>
+      <Register Name="BT_MISR" Authority="RW" Address="0x40052030" Width="32" Description="Masked Interrupt Status Register">
+        <Bit Name="EVTRG" Authority="RO" Bits="3" Description="事件触发中断请求标志状态。" />
+        <Bit Name="OVF" Authority="RO" Bits="2" Description="OVF中断请求标志状态。" />
+        <Bit Name="CMP" Authority="RO" Bits="1" Description="CMP Match中断请求标志状态。" />
+        <Bit Name="PEND" Authority="RO" Bits="0" Description="PEND周期结束中断请求标志状态。" />
+      </Register>
+      <Register Name="BT_ICR" Authority="RW" Address="0x40052034" Width="32" Description="Interrupt Clear Register">
+        <Bit Name="EVTRG" Authority="RW" Bits="3" Description="清除事件触发中断原始中断状态位。" />
+        <Bit Name="OVF" Authority="RW" Bits="2" Description="清除OVF原始中断状态位。" />
+        <Bit Name="CMP" Authority="RW" Bits="1" Description="清除CMP Match原始中断状态位。" />
+        <Bit Name="PEND" Authority="RW" Bits="0" Description="清除PEND原始中断状态位。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="GPT">
+      <Register Name="GPTA_CEDR" Authority="RW" Address="0x40055000" Width="32" Description="ID &amp; Clock Enable/Disable Register">
+        <Bit Name="IDCODE" Authority="RO" Bits="31-16" Description="当前GPTA模块的版本信息。" />
+        <Bit Name="FLTCKPRS" Authority="RW" Bits="15-8" Description="数字滤波器的时钟分频控制。&#xD;&#xA;数字滤波器的时钟频率为PCLK/( FLTCKPRS+1)" />
+        <Bit Name="SHDWSTP" Authority="RW" Bits="6" Description="START控制位的Shadow功能使能控制。START置位不受此位控制，清除时受此位控制。当选择Shadow模式时，START控制位在周期结束时清除。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式" />
+        <Bit Name="CSS" Authority="RW" Bits="3" Description="计数器时钟源选择位。&#xD;&#xA;0h：PCLK&#xD;&#xA;1h：由SYNCIN3控制&#xD;&#xA;其他：保留" />
+        <Bit Name="DBGEN" Authority="RW" Bits="2-1" Description="调试使能控制。调试使能时，在CPU被调试器挂起时，时基计数器的计数时钟同时也被挂起。&#xD;&#xA;0h：调试禁止&#xD;&#xA;1h：调试使能，PWM输出高阻&#xD;&#xA;其他：调试使能，PWM输出保持" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="时基计数器的时钟使能控制。&#xD;&#xA;0h：计数器计数时钟禁止。&#xD;&#xA;1h：计数器计数时钟使能。" />
+      </Register>
+      <Register Name="GPTA_RSSR" Authority="RW" Address="0x40055004" Width="32" Description="RESET/START/STOP Register">
+        <Bit Name="SRR" Authority="RW" Bits="15-12" Description="软件复位控制位。&#xD;&#xA;当对当前控制位写入‘0x5’时，TIMER模块会被复位。复位后，所有寄存器都恢复为RESET状态。" />
+        <Bit Name="CNTDIR" Authority="RO" Bits="3" Description="当前计数器计数方向状态。&#xD;&#xA;0h：当前计数器方向为递减&#xD;&#xA;1h：当前计数器方向为递增" />
+        <Bit Name="START" Authority="RW" Bits="0" Description="计数器启动控制位。&#xD;&#xA;0h：当写‘0’时，停止计数器&#xD;&#xA;1h：当写‘1’时，启动计数器&#xD;&#xA;当对START位进行读取时，返回当前计数器工作状态&#xD;&#xA;0h：计数器处于IDLE状态&#xD;&#xA;1h：计数器正在工作&#xD;&#xA;&#xD;&#xA;当GPTA_CR[SWSYNEN]控制位为低时，START控制位用于控制GPTA的启动，当GPTA启动后，再次写入START将被忽略；&#xD;&#xA;当GPTA_CR[SWSYNEN]控制位为高时，START控制位用于软件触发同步事件，每次对START的写入，会产生一次外部Sync事件（等同于SYNCR中的SYNCIN0触发）。" />
+      </Register>
+      <Register Name="GPTA_PSCR" Authority="RW" Address="0x40055008" Width="32" Description="Counter Clock Prescaler Register">
+        <Bit Name="PSC" Authority="RW" Bits="15-0" Description="时钟分频控制。&#xD;&#xA;TCLK作为时基模块的计时时钟和工作时钟。TCLK的时钟从PCLK分频得到。TCLK的频率：FTCLK = FPCLK / (PSC+1)&#xD;&#xA;此寄存器具有Shadow寄存器，可通过GPTA_CR[PSCLD]设置载入的条件。" />
+      </Register>
+      <Register Name="GPTA_CR(WAVE=0)" Authority="RW" Address="0x4005500c" Width="32" Description="General Control Register">
+        <Bit Name="LDDRST" Authority="RW" Bits="26" Description="CMPB(Active)捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：当前捕获触发后，计数器值不进行重置&#xD;&#xA;1h：当前捕获触发后，计数器值进行重置" />
+        <Bit Name="LDCRST" Authority="RW" Bits="25" Description="CMPA(Active)捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：当前捕获触发后，计数器值不进行重置&#xD;&#xA;1h：当前捕获触发后，计数器值进行重置" />
+        <Bit Name="LDBRST" Authority="RW" Bits="24" Description="CMPB(Shadow)捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：当前捕获触发后，计数器值不进行重置&#xD;&#xA;1h：当前捕获触发后，计数器值进行重置" />
+        <Bit Name="LDARST" Authority="RW" Bits="23" Description="CMPA(Shadow)捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：当前捕获触发后，计数器值不进行重置&#xD;&#xA;1h：当前捕获触发后，计数器值进行重置" />
+        <Bit Name="STOP_WRAP" Authority="RW" Bits="22-21" Description="Capture模式下，捕获事件计数器周期设置值。（GPTA最大可设为2）" />
+        <Bit Name="CAPMD" Authority="RW" Bits="20" Description="捕捉模式设置。&#xD;&#xA;0h：连续捕捉模式&#xD;&#xA;1h：一次性捕捉模式" />
+        <Bit Name="REARM" Authority="RW" Bits="19" Description="重置CAPTURE控制。&#xD;&#xA;0h：无效&#xD;&#xA;1h：重置捕捉&#xD;&#xA;重置时，捕捉事件计数器被清零，自动打开CAPLDEN" />
+        <Bit Name="WAVE" Authority="RW" Bits="18" Description="GPTA工作模式选择。&#xD;&#xA;0h：捕捉模式&#xD;&#xA;1h：波形发生模式" />
+        <Bit Name="PSCLD" Authority="RW" Bits="17-16" Description="PSCR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;01b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：不进行载入" />
+        <Bit Name="CGFLT" Authority="RW" Bits="15-13" Description="门控输入数字滤波控制。此控制定义了滤波器监测的步数，只有连续N次监测结果一致时，滤波器才输出有效的电平翻转。滤波器的采样时钟频率通过CEDR[FLTCKPRS] 控制位定义。&#xD;&#xA;000b：Bypass&#xD;&#xA;001b：N = 2&#xD;&#xA;010b：N = 3&#xD;&#xA;011b：N = 4&#xD;&#xA;100b：N = 6&#xD;&#xA;101b：N = 8&#xD;&#xA;110b：N = 16&#xD;&#xA;111b：N = 32" />
+        <Bit Name="CGSRC" Authority="RW" Bits="12-11" Description="群脉冲模式下，时钟门控的输入源选择。&#xD;&#xA;0h：GPTA_CHA作为CG的输入源&#xD;&#xA;1h：GPTA_CHB作为CG的输入源&#xD;&#xA;其他：保留" />
+        <Bit Name="FLTIPSCLD" Authority="RW" Bits="10" Description="数字滤波器初始化控制。对该控制写’1’可以初始化数字滤波器计数器.&#xD;&#xA;0h：无效&#xD;&#xA;1h：执行初始化" />
+        <Bit Name="BURST" Authority="RW" Bits="9" Description="群脉冲模式。&#xD;&#xA;0h：禁止群脉冲模式&#xD;&#xA;1h：使能群脉冲模式" />
+        <Bit Name="CAPLDEN" Authority="RW" Bits="8" Description="CMPA和CMPB在捕捉事件触发时，载入使能控制。&#xD;&#xA;0h：禁止对CMP寄存器的捕获载入&#xD;&#xA;1h：使能对CMP寄存器的捕获载入&#xD;&#xA;此控制位在禁止对CMP寄存器载入时，并不影响捕捉事件SYNCIN2的触发。" />
+        <Bit Name="PRDLD" Authority="RW" Bits="5-4" Description="PRDR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：PRDR活动寄存器更新发生在周期结束(PEND)&#xD;&#xA;01b：PRDR活动寄存器更新发生在SYNCIN1被触发时&#xD;&#xA;10b：PRDR活动寄存器更新发生在计数器值等于零或SYNCIN1触发时&#xD;&#xA;11b：立即更新，所有对PRDR操作直接作用于活动寄存器 [1]" />
+        <Bit Name="IDLEST" Authority="RW" Bits="3" Description="" />
+        <Bit Name="SWSYNEN" Authority="RW" Bits="2" Description="软件使能同步触发使能控制（RSSR中START控制位）。&#xD;&#xA;0h：设置SW START控制只用于启动。&#xD;&#xA;1h：设置SW START控制用于启动和以产生一次SYNCIN0事件，以外部触发的方式重新启动。" />
+        <Bit Name="CNTMD" Authority="RW" Bits="1-0" Description="计数模式设置。&#xD;&#xA;计数模式一般只设置一次，并且在计数过程中不做改变。如果计数模式被改变，变化将发生在下一个TCLK的边沿，并且基于上一个计数器值进行递增或者递减。&#xD;&#xA;00b：递增模式&#xD;&#xA;01b：递减模式&#xD;&#xA;10b：递增递减模式&#xD;&#xA;11b：保留" />
+      </Register>
+      <Register Name="GPTA_CR(WAVE=1)" Authority="RW" Address="0x4005500c" Width="32" Description="General Control Register">
+        <Bit Name="WAVE" Authority="RW" Bits="18" Description="GPTA工作模式选择。&#xD;&#xA;0h：捕捉模式&#xD;&#xA;1h：波形发生模式" />
+        <Bit Name="PSCLD" Authority="RW" Bits="17-16" Description="PSCR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;01b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：不进行载入" />
+        <Bit Name="CGFLT" Authority="RW" Bits="15-13" Description="门控输入数字滤波控制。此控制定义了滤波器监测的步数，只有连续N次监测结果一致时，滤波器才输出有效的电平翻转。滤波器的采样时钟频率通过CEDR[FLTCKPRS] 控制位定义。&#xD;&#xA;000b：Bypass&#xD;&#xA;001b：N = 2&#xD;&#xA;010b：N = 3&#xD;&#xA;011b：N = 4&#xD;&#xA;100b：N = 6&#xD;&#xA;101b：N = 8&#xD;&#xA;110b：N = 16&#xD;&#xA;111b：N = 32" />
+        <Bit Name="CGSRC" Authority="RW" Bits="12-11" Description="群脉冲模式下，时钟门控的输入源选择。&#xD;&#xA;0h：GPTA_CHA作为CG的输入源&#xD;&#xA;1h：GPTA_CHB作为CG的输入源&#xD;&#xA;其他：保留" />
+        <Bit Name="CKS" Authority="RW" Bits="10" Description="采样时钟频率控制位。此控制位决定数字滤波器的采样时钟频率。&#xD;&#xA;0h：PCLK&#xD;&#xA;1h：PCLK/2" />
+        <Bit Name="BURST" Authority="RW" Bits="9" Description="群脉冲模式。&#xD;&#xA;0h：禁止群脉冲模式&#xD;&#xA;1h：使能群脉冲模式" />
+        <Bit Name="OPM" Authority="RW" Bits="6" Description="计数器单次触发工作模式选择。&#xD;&#xA;0h：连续计数工作模式&#xD;&#xA;1h：单次触发工作模式&#xD;&#xA;其他：保留" />
+        <Bit Name="PRDLD" Authority="RW" Bits="5-4" Description="PRDR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：PRDR活动寄存器更新发生在周期结束(PEND)&#xD;&#xA;01b：PRDR活动寄存器更新发生在SYNCIN1被触发时&#xD;&#xA;10b：PRDR活动寄存器更新发生在计数器值等于零或SYNCIN1触发时&#xD;&#xA;11b：立即更新，所有对PRDR操作直接作用于活动寄存器 [1]" />
+        <Bit Name="IDLEST" Authority="RO" Bits="3" Description="波形输出被停止时，输出端口的缺省状态。&#xD;&#xA;0h：高阻输出&#xD;&#xA;1h：低电平输出" />
+        <Bit Name="SWSYNEN" Authority="RW" Bits="2" Description="软件使能同步触发使能控制（RSSR中START控制位）。&#xD;&#xA;0h：设置SW START控制只用于启动。&#xD;&#xA;1h：设置SW START控制用于启动和以产生一次SYNCIN0事件，以外部触发的方式重新启动。" />
+        <Bit Name="CNTMD" Authority="RW" Bits="1-0" Description="计数模式设置。&#xD;&#xA;计数模式一般只设置一次，并且在计数过程中不做改变。如果计数模式被改变，变化将发生在下一个TCLK的边沿，并且基于上一个计数器值进行递增或者递减。&#xD;&#xA;00b：递增模式&#xD;&#xA;01b：递减模式&#xD;&#xA;10b：递增递减模式&#xD;&#xA;11b：保留" />
+      </Register>
+      <Register Name="GPTA_SYNCR" Authority="RW" Address="0x40055010" Width="32" Description="Synchronization Control Register">
+        <Bit Name="AREARM" Authority="RW" Bits="31-30" Description="硬件自动REARM控制位。&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：CNT = ZRO时，自动REARM&#xD;&#xA;2：CNT = PRD时，自动REARM&#xD;&#xA;3：CNT = ZRO or CNT = PRD时，自动REARM" />
+        <Bit Name="TRGO1SEL" Authority="RW" Bits="29-27" Description="输入触发通道直通作为TRGSRC1的ExtSync条件的选择。只有当EVTRG寄存器中TRGSRC1控制位选择为ExtSync条件时有效。&#xD;&#xA;0h：选择SYNCIN0作为TRGSRC1的ExtSync触发&#xD;&#xA;1h：选择SYNCIN1作为TRGSRC1的ExtSync触发&#xD;&#xA;2h：选择SYNCIN2作为TRGSRC1的ExtSync触发&#xD;&#xA;3h：选择SYNCIN3作为TRGSRC1的ExtSync触发&#xD;&#xA;4h：选择SYNCIN4作为TRGSRC1的ExtSync触发&#xD;&#xA;5h：选择SYNCIN5作为TRGSRC1的ExtSync触发&#xD;&#xA;其他：保留" />
+        <Bit Name="TRGO0SEL" Authority="RW" Bits="26-24" Description="输入触发通道直通作为TRGSRC0的ExtSync条件的选择。只有当EVTRG寄存器中TRGSRC0控制位选择为ExtSync条件时有效。&#xD;&#xA;0h：选择SYNCIN0作为TRGSRC0的ExtSync触发&#xD;&#xA;1h：选择SYNCIN1作为TRGSRC0的ExtSync触发&#xD;&#xA;2h：选择SYNCIN2作为TRGSRC0的ExtSync触发&#xD;&#xA;3h：选择SYNCIN3作为TRGSRC0的ExtSync触发&#xD;&#xA;4h：选择SYNCIN4作为TRGSRC0的ExtSync触发&#xD;&#xA;5h：选择SYNCIN5作为TRGSRC0的ExtSync触发&#xD;&#xA;其他：保留" />
+        <Bit Name="TXREARM0" Authority="RW" Bits="23-22" Description="Tx信号触发SYNCIN0的REARM&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：T1发生触发，自动REARM SYNCIN0通道&#xD;&#xA;2：T2发生触发，自动REARM SYNCIN0通道&#xD;&#xA;3：T1或者T2发生触发，自动REARM SYNCIN0通道" />
+        <Bit Name="REARM5" Authority="RW" Bits="21" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="REARM4" Authority="RW" Bits="20" Description="" />
+        <Bit Name="REARM3" Authority="RW" Bits="19" Description="" />
+        <Bit Name="REARM2" Authority="RW" Bits="18" Description="" />
+        <Bit Name="REARM1" Authority="RW" Bits="17" Description="" />
+        <Bit Name="REARM0" Authority="RW" Bits="16" Description="" />
+        <Bit Name="OSTMD5" Authority="RW" Bits="13" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="OSTMD4" Authority="RW" Bits="12" Description="" />
+        <Bit Name="OSTMD3" Authority="RW" Bits="11" Description="" />
+        <Bit Name="OSTMD2" Authority="RW" Bits="10" Description="" />
+        <Bit Name="OSTMD1" Authority="RW" Bits="9" Description="" />
+        <Bit Name="OSTMD0" Authority="RW" Bits="8" Description="" />
+        <Bit Name="SYNCEN5" Authority="RW" Bits="5" Description="外部同步触发使能控制。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能当前触发输入通道&#xD;&#xA;SYNCIN0：外部Sync事件&#xD;&#xA;SYNCIN1：Load触发&#xD;&#xA;SYNCIN2：Capture触发事件&#xD;&#xA;SYNCIN3：CNT增减一拍触发事件&#xD;&#xA;SYNCIN4：外部COS事件（用于PWM波形输出控制）&#xD;&#xA;SYNCIN5：外部COS事件（用于PWM波形输出控制）" />
+        <Bit Name="SYNCEN4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="SYNCEN3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="SYNCEN2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="SYNCEN1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="SYNCEN0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPTA_GLDCR" Authority="RW" Address="0x40055014" Width="32" Description="Global Load Control Register">
+        <Bit Name="GLDCNT" Authority="RW" Bits="12-10" Description="全局载入事件计数器。&#xD;&#xA;计数器值表示当前已发生多少次事件触发。" />
+        <Bit Name="GLDPRD" Authority="RW" Bits="9-7" Description="全局载入触发周期选择。&#xD;&#xA;可以选择N次触发条件满足后，才进行一次全局载入。&#xD;&#xA;000b：Disable Counter（立即触发）&#xD;&#xA;001b：第2次条件满足时触发&#xD;&#xA;010b：第3次条件满足时触发&#xD;&#xA;011b：第4次条件满足时触发&#xD;&#xA;100b：第5次条件满足时触发&#xD;&#xA;101b：第6次条件满足时触发&#xD;&#xA;110b：第7次条件满足时触发&#xD;&#xA;111b：第8次条件满足时触发" />
+        <Bit Name="OSTMD" Authority="RW" Bits="5" Description="One Shot 载入模式使能控制位&#xD;&#xA;0h：禁止One Shot模式，只要条件满足，Active寄存器都会从Shadow寄存器载入&#xD;&#xA;1h：使能One Shot模式，只有在GLDCR2[OSREARM]写入‘1’后，才会进行一次载入。一旦载入被触发，需要再次对GLDCR2[OSREARM]写入‘1’，才能允许下一次载入触发。" />
+        <Bit Name="GLDMD" Authority="RW" Bits="4-1" Description="全局载入触发事件选择。&#xD;&#xA;0h：CNT = ZRO&#xD;&#xA;1h：CNT = PRD&#xD;&#xA;2h：CNT = ZRO or CNT = PRD&#xD;&#xA;3h：CNT = ZRO or 外部LOAD触发或SYNC触发&#xD;&#xA;4h：CNT = PRD or 外部LOAD触发或SYNC触发&#xD;&#xA;5h：CNT = ZRO or CNT = PRD or 外部LOAD触发或SYNC触发&#xD;&#xA;Others：Reserved&#xD;&#xA;Fh：在GLDCR2[GFRCLD]写入‘1’时  [1]" />
+        <Bit Name="GLDEN" Authority="RW" Bits="0" Description="全局的Shadow到Active寄存器载入控制。&#xD;&#xA;0：使用独立的单个配置（在各个寄存器中LDMD控制位分别指派的载入控制）&#xD;&#xA;1：使用GLDMD中的设置，其他设置被屏蔽" />
+      </Register>
+      <Register Name="GPTA_GLDCFG" Authority="RW" Address="0x40055018" Width="32" Description="Global Load Configuration Register">
+        <Bit Name="AQCSF" Authority="RW" Bits="12" Description="AQCSF寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCRB" Authority="RW" Bits="9" Description="AQCRB寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCRA" Authority="RW" Bits="8" Description="AQCRA寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="CMPB" Authority="RW" Bits="2" Description="CMPB寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="CMPA" Authority="RW" Bits="1" Description="CMPA寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="PRDR" Authority="RW" Bits="0" Description="PRDR寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+      </Register>
+      <Register Name="GPTA_GLDCR2" Authority="RW" Address="0x4005501c" Width="32" Description="Global Load Control Register2">
+        <Bit Name="GFRCLD" Authority="RW" Bits="1" Description="软件产生一次GLD触发。&#xD;&#xA;0：写入‘0’无效，读取时总是返回‘0’&#xD;&#xA;1：软件产生一次GLD触发事件" />
+        <Bit Name="OSREARM" Authority="RW" Bits="0" Description="重置ONE SHOT模式&#xD;&#xA;0：写入‘0’无效，读取时总是返回‘0’&#xD;&#xA;1：重置ONE SHOT模式。ONE SHOT模式下，一次触发后，需要重置模式才允许再次触发" />
+      </Register>
+      <Register Name="GPTA_PRDR" Authority="RW" Address="0x40055024" Width="32" Description="Period Register">
+        <Bit Name="PRDR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;此控制位决定了PWM输出波形的周期值。通过设置GPTA_CR[PRDLD]可以选择Shadow到Active载入的触发条件。" />
+      </Register>
+      <Register Name="GPTA_CMPA" Authority="RW" Address="0x4005502c" Width="32" Description="Compare A Register">
+        <Bit Name="OVWRT" Authority="RO" Bits="31" Description="Over Write Flag 标志位。&#xD;&#xA;表示当前Capture值是否被Over Written。当连续两次针对于当前寄存器的捕获事件发生，而两次捕获之间未对当前寄存器进行过读取操作，则Over Written标志被置位。读取当前寄存器会自动清除Over Written标志。&#xD;&#xA;此标志位只有在Capture模式下有效。" />
+        <Bit Name="CMPA" Authority="RW" Bits="15-0" Description="比较值A寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，Shadow模式可以通过CMPLDR[SHDWCMPA]进行设置。在Shadow模式下，可以通过CMPLDR[LDAMD]选择Shadow到Active载入的触发条件。在写入前，可以通过SHDWAFULL控制位检测当前寄存器状态。&#xD;&#xA;&#xD;&#xA;当工作于Capture模式下，此寄存器对应CAPLD0事件触发的捕获值。" />
+      </Register>
+      <Register Name="GPTA_CMPB" Authority="RW" Address="0x40055030" Width="32" Description="Compare B Register">
+        <Bit Name="OVWRT" Authority="RO" Bits="31" Description="Over Write Flag 标志位。&#xD;&#xA;表示当前Capture值是否被Over Written。当连续两次针对于当前寄存器的捕获事件发生，而两次捕获之间未对当前寄存器进行过读取操作，则Over Written标志被置位。读取当前寄存器会自动清除Over Written标志。&#xD;&#xA;此标志位只有在Capture模式下有效。" />
+        <Bit Name="CMPB" Authority="RW" Bits="15-0" Description="比较值B寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，Shadow模式可以通过CMPLDR[SHDWCMPB]进行设置。在Shadow模式下，可以通过CMPLDR[LDBMD]选择Shadow到Active载入的触发条件。在写入前，可以通过SHDWBFULL控制位检测当前寄存器状态。&#xD;&#xA;&#xD;&#xA;当工作于Capture模式下，此寄存器对应CAPLD1事件触发的捕获值。" />
+      </Register>
+      <Register Name="GPTA_CMPLDR" Authority="RW" Address="0x4005503c" Width="32" Description="Compare Data Load Control Register">
+        <Bit Name="SHDWAFULL" Authority="RO" Bits="21-20" Description="CMPB的Shadow寄存器非空标志位。&#xD;&#xA;当对CMPB进行写操作时，该标志位置位。该标志位在Shadow被载入到Active后，会自动清除。&#xD;&#xA;0h：Shadow空&#xD;&#xA;1h：Shadow非空，对当前CMP寄存器写入会覆盖Shadow中未被载入的值" />
+        <Bit Name="LDBMD" Authority="RW" Bits="9-7" Description="Shadow模式下，Active CMPB从Shadow CMPB载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入" />
+        <Bit Name="LDAMD" Authority="RW" Bits="6-4" Description="Shadow模式下，Active CMPA从Shadow CMPA载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="SHDWCMPB" Authority="RW" Bits="1" Description="CMPB的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式 [1]" />
+        <Bit Name="SHDWCMPA" Authority="RW" Bits="0" Description="CMPA的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式 [1]" />
+      </Register>
+      <Register Name="GPTA_CNT" Authority="RW" Address="0x40055040" Width="32" Description="Counter Register">
+        <Bit Name="CNT" Authority="RW" Bits="15-0" Description="时基计数器寄存器。&#xD;&#xA;对CNT读取时，返回当前计数器值。对CNT写入时，将直接更新CNT的计数值。CNT计数器没有Shadow寄存器，CPU的写入将直接影响当前计数器值。" />
+      </Register>
+      <Register Name="GPTA_AQLDR" Authority="RW" Address="0x40055044" Width="32" Description="Action Qualifier Load Control Register">
+        <Bit Name="LDBMD" Authority="RW" Bits="7-5" Description="Shadow模式下，Active AQCRB从Shadow载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="LDAMD" Authority="RW" Bits="4-2" Description="Shadow模式下，Active AQCRA从Shadow载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="SHDWAQB" Authority="RW" Bits="1" Description="AQCRB寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="SHDWAQA" Authority="RW" Bits="0" Description="AQCRA寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+      </Register>
+      <Register Name="GPTA_AQCRA" Authority="RW" Address="0x40055048" Width="32" Description="Action Qualifier Control Register A">
+        <Bit Name="CBSEL" Authority="RW" Bits="23-22" Description="CB比较值数据源选择。&#xD;&#xA;0h：CMPA寄存器作为CA的数据源。&#xD;&#xA;1h：CMPB寄存器作为CA的数据源。&#xD;&#xA;其他：保留。" />
+        <Bit Name="CASEL" Authority="RW" Bits="21-20" Description="CA比较值的数据源选择。&#xD;&#xA;0h：CMPA寄存器作为CA的数据源。&#xD;&#xA;1h：CMPB寄存器作为CA的数据源。&#xD;&#xA;其他：保留。" />
+        <Bit Name="T2D" Authority="RW" Bits="19-18" Description="当T2事件发生，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T2U" Authority="RW" Bits="17-16" Description="当T2事件发生，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1D" Authority="RW" Bits="15-14" Description="当T1事件发生，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1U" Authority="RW" Bits="13-12" Description="当T1事件发生，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBD" Authority="RW" Bits="11-10" Description="当CNT值等于CB，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBU" Authority="RW" Bits="9-8" Description="当CNT值等于CB，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAD" Authority="RW" Bits="7-6" Description="当CNT值等于CA，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAU" Authority="RW" Bits="5-4" Description="当CNT值等于CA，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="PRD" Authority="RW" Bits="3-2" Description="当CNT值等于PRDR时，在通道A上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于PRDR时，计数方向为递减模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="ZRO" Authority="RW" Bits="1-0" Description="当CNT值等于零时，在通道A上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于零时，计数方向为递增模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+      </Register>
+      <Register Name="GPTA_AQCRB" Authority="RW" Address="0x4005504c" Width="32" Description="Action Qualifier Control Register B">
+        <Bit Name="CBSEL" Authority="RW" Bits="23-22" Description="CB比较值数据源选择。&#xD;&#xA;0h：CMPA寄存器作为CA的数据源。&#xD;&#xA;1h：CMPB寄存器作为CA的数据源。&#xD;&#xA;其他：保留。" />
+        <Bit Name="CASEL" Authority="RW" Bits="21-20" Description="CA比较值的数据源选择。&#xD;&#xA;0h：CMPA寄存器作为CA的数据源。&#xD;&#xA;1h：CMPB寄存器作为CA的数据源。&#xD;&#xA;其他：保留。" />
+        <Bit Name="T2D" Authority="RW" Bits="19-18" Description="当T2事件发生，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T2U" Authority="RW" Bits="17-16" Description="当T2事件发生，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1D" Authority="RW" Bits="15-14" Description="当T1事件发生，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1U" Authority="RW" Bits="13-12" Description="当T1事件发生，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBD" Authority="RW" Bits="11-10" Description="当CNT值等于CMPB，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBU" Authority="RW" Bits="9-8" Description="当CNT值等于CMPB，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAD" Authority="RW" Bits="7-6" Description="当CNT值等于CMPA，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAU" Authority="RW" Bits="5-4" Description="当CNT值等于CMPA，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="PRD" Authority="RW" Bits="3-2" Description="当CNT值等于PRDR时，在通道B上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于PRDR时，计数方向为递减模式&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="ZRO" Authority="RW" Bits="1-0" Description="当CNT值等于零时，在通道B上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于零时，计数方向为递增模式&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+      </Register>
+      <Register Name="GPTA_AQOSF" Authority="RW" Address="0x4005505c" Width="32" Description="Action Qualifier One Shot Force Register">
+        <Bit Name="RLDCSF" Authority="RW" Bits="17-16" Description="AQCSF寄存器从Shadow载入到Active的控制。&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;00b：立即载入" />
+        <Bit Name="ACTB" Authority="RW" Bits="6-5" Description="当软件强制输出时，通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="OSTSFB" Authority="RW" Bits="4" Description="在通道B上产生一次性软件强制输出。&#xD;&#xA;0h：对当前位写‘0’无效&#xD;&#xA;1h：产生一次性软件强制输出，此输出状态保持，直到有其他改变通道A输出状态的触发事件发生。" />
+        <Bit Name="ACTA" Authority="RW" Bits="2-1" Description="当软件强制输出时，通道A上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="OSTSFA" Authority="RW" Bits="0" Description="在通道A上产生一次性软件强制输出。&#xD;&#xA;0h：对当前位写‘0’无效&#xD;&#xA;1h：产生一次性软件强制输出，此输出状态保持，直到有其他改变通道A输出状态的触发事件发生。" />
+      </Register>
+      <Register Name="GPTA_AQCSF" Authority="RW" Address="0x40055060" Width="32" Description="Action Qualifier Continuous Force Register">
+        <Bit Name="CSFB" Authority="RW" Bits="3-2" Description="通过软件对通道B做连续强制赋值。在立即更新模式下，赋值将在配置后下一个TCLK输出。在Shadow模式下，在Shadow更新到Active后的下一个TCLK后输出。对Shadow更新到Active的控制，可以通过AQOSF寄存器中的RLDCSF控制位进行配置。&#xD;&#xA;0h：禁止强制赋值&#xD;&#xA;1h：强制输出低&#xD;&#xA;2h：强制输出高&#xD;&#xA;3h：禁止强制赋值" />
+        <Bit Name="CSFA" Authority="RW" Bits="1-0" Description="通过软件对通道A做连续强制赋值。在立即更新模式下，赋值将在配置后下一个TCLK输出。在Shadow模式下，在Shadow更新到Active后的下一个TCLK后输出。对Shadow更新到Active的控制，可以通过AQOSF寄存器中的RLDCSF控制位进行配置。&#xD;&#xA;0h：禁止强制赋值&#xD;&#xA;1h：强制输出低&#xD;&#xA;2h：强制输出高&#xD;&#xA;3h：禁止强制赋值" />
+      </Register>
+      <Register Name="GPTA_TRGFTCR" Authority="RW" Address="0x400550b8" Width="32" Description="Digital Compare Filter Control Register">
+        <Bit Name="CROSSMD" Authority="RW" Bits="7" Description="允许滤波窗跨越多个TB的周期。&#xD;&#xA;缺省条件下，当滤波窗在周期结束时若任然有效，将跨过周期点，一直持续到窗口计数器溢出。当禁止跨周期时，在周期结束时，窗口计数器将被停止。&#xD;&#xA;0h：禁止跨周期&#xD;&#xA;1h：允许跨周期" />
+        <Bit Name="ALIGNMD" Authority="RW" Bits="6-5" Description="窗口对齐模式选择。&#xD;&#xA;0h：CNT=PRD&#xD;&#xA;1h：CNT=ZRO&#xD;&#xA;2h：CNT=PRD or CNT=ZRO&#xD;&#xA;3h：T1事件" />
+        <Bit Name="BLKINV" Authority="RW" Bits="4" Description="窗口使能反转控制。&#xD;&#xA;0h：窗口不反转&#xD;&#xA;1h：窗口反转" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="2-0" Description="滤波模块的输入信号选择。&#xD;&#xA;0h：禁止滤波&#xD;&#xA;1h：使能SYNCIN0滤波&#xD;&#xA;2h：使能SYNCIN1滤波&#xD;&#xA;3h：使能SYNCIN2滤波&#xD;&#xA;4h：使能SYNCIN3滤波&#xD;&#xA;5h：使能SYNCIN4滤波&#xD;&#xA;6h：使能SYNCIN5滤波&#xD;&#xA;7h：保留" />
+      </Register>
+      <Register Name="GPTA_TRGFTWR" Authority="RW" Address="0x400550bc" Width="32" Description="Digital Compare Filter Window Register">
+        <Bit Name="WINDOW" Authority="RW" Bits="31-16" Description="滤波窗的宽度设置。&#xD;&#xA;此16bit控制位定义了滤波窗的宽度，窗口宽度是基于TCLK的计数值。当OFFSET计数器溢出时，WINDOW计数器被重置，并开始计数直到溢出。当OFFSET计数器溢出，但WINDOW状态已经激活时，WINDOW计数器不会重置。在应用时必须注意此条件的设置。" />
+        <Bit Name="OFFSET" Authority="RW" Bits="15-0" Description="滤波窗的OFFSET设置。&#xD;&#xA;此16bit控制位定义了从窗口参考起始位置开始计数多少个TCLK后，开始有效的滤波窗口。参考位置的定义，在TRGFTCR[ALIGNMD]控制位中进行选择。OFFSET的Shadow寄存器在ALIGNMD指定的条件满足时，载入到Active寄存器中，并重新开始计数。" />
+      </Register>
+      <Register Name="GPTA_EVTRG" Authority="RW" Address="0x400550c0" Width="32" Description="Event Generation Control Register">
+        <Bit Name="CNT1INITFRC" Authority="RO" Bits="25" Description="TRGEV1CNT软件触发更新&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVCNT1INIT内容更新到EVCNT1中" />
+        <Bit Name="CNT0INITFRC" Authority="RO" Bits="24" Description="TRGEV0CNT软件触发更新&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVCNT0INIT内容更新到EVCNT0中" />
+        <Bit Name="TRG1OE" Authority="RW" Bits="21" Description="外部触发端口TRGOUT1使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG0OE" Authority="RW" Bits="20" Description="外部触发端口TRGOUT0使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="CNT1INITEN" Authority="RW" Bits="17" Description="TRGEV1CNT寄存器更新模式控制&#xD;&#xA;0h：无效&#xD;&#xA;1h：TRGEV1CNT在发生LOAD事件触发时，或者EV1CNTINITFRC控制位软件写入‘1’时，EV1CNTINIT的内容更新到EV1CNT中。" />
+        <Bit Name="CNT0INITEN" Authority="RW" Bits="16" Description="TRGEV0CNT寄存器更新模式控制&#xD;&#xA;0h：无效&#xD;&#xA;1h：TRGEV0CNT在发生LOAD事件触发时，或者EV0CNTINITFRC控制位软件写入‘1’时，EV0CNTINIT的内容更新到EV0CNT中。" />
+        <Bit Name="TRGSEL1" Authority="RW" Bits="7-4" Description="TRGEV1事件的触发源选择。&#xD;&#xA;0000：禁止TRGOUT触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGEV事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGEV事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGEV事件&#xD;&#xA;0100：当 CNT = CMPA 且计数方向为递增时，产生TRGEV事件&#xD;&#xA;0101：当 CNT = CMPA 且计数方向为递减时，产生TRGEV事件&#xD;&#xA;0110：当 CNT = CMPB 且计数方向为递增时，产生TRGEV事件&#xD;&#xA;0111：当 CNT = CMPB 且计数方向为递减时，产生TRGEV事件&#xD;&#xA;1100：ExtSync通道&#xD;&#xA;1101：PE0 event&#xD;&#xA;1110：PE1 event&#xD;&#xA;1111：PE2 event" />
+        <Bit Name="TRGSEL0" Authority="RW" Bits="3-0" Description="TRGEV0事件的触发源选择。&#xD;&#xA;0000：禁止TRGOUT触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGEV事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGEV事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGEV事件&#xD;&#xA;0100：当 CNT = CMPA 且计数方向为递增时，产生TRGEV事件&#xD;&#xA;0101：当 CNT = CMPA 且计数方向为递减时，产生TRGEV事件&#xD;&#xA;0110：当 CNT = CMPB 且计数方向为递增时，产生TRGEV事件&#xD;&#xA;0111：当 CNT = CMPB 且计数方向为递减时，产生TRGEV事件&#xD;&#xA;1100：ExtSync通道&#xD;&#xA;1101：PE0 event&#xD;&#xA;1110：PE1 event&#xD;&#xA;1111：PE2 event" />
+      </Register>
+      <Register Name="GPTA_EVPS" Authority="RW" Address="0x400550c4" Width="32" Description="Event Counter Prescaler">
+        <Bit Name="TRGEV1CNT" Authority="RW" Bits="23-20" Description="TRGEV1事件计数器设置。&#xD;&#xA;读取时，返回当前事件计数器值；&#xD;&#xA;写入时，直接更新事件计数器值。" />
+        <Bit Name="TRGEV0CNT" Authority="RW" Bits="19-16" Description="TRGEV0事件计数器设置。&#xD;&#xA;读取时，返回当前事件计数器值；&#xD;&#xA;写入时，直接更新事件计数器值。" />
+        <Bit Name="TRGEV1PRD" Authority="RW" Bits="7-4" Description="TRGEV1事件计数的周期设置。&#xD;&#xA;当TRGEV1事件发生次数满足周期时，才产生TRGEV1触发事件" />
+        <Bit Name="TRGEV0PRD" Authority="RW" Bits="3-0" Description="TRGEV0事件计数的周期设置。&#xD;&#xA;当TRGEV0事件发生次数满足周期时，才产生TRGEV0触发事件" />
+      </Register>
+      <Register Name="GPTA_EVCNTINIT" Authority="RW" Address="0x400550c8" Width="32" Description="Event Counter Initial Value">
+        <Bit Name="CNT1INIT" Authority="RW" Bits="7-4" Description="TRGEV1CNT计数器的初始化值设置。&#xD;&#xA;当EVTRG[CNT1INITEN]控制位有效时，CNT1INIT的值将在触发条件满足时(LOAD事件)，或EVTRG[CNT1INITFRC]软件置位时，被载入到TRGEV1CNT寄存器中。" />
+        <Bit Name="CNT0INIT" Authority="RW" Bits="3-0" Description="TRGEV0CNT计数器的初始化值设置。&#xD;&#xA;当EVTRG[CNT0INITEN]控制位有效时，CNT0INIT的值将在触发条件满足时(LOAD事件)，或EVTRG[CNT0INITFRC]软件置位时，被载入到TRGEV0CNT寄存器中。" />
+      </Register>
+      <Register Name="GPTA_EVSWF" Authority="RW" Address="0x400550cc" Width="32" Description="Event Counter Load Control Register">
+        <Bit Name="EV1SWF" Authority="RW" Bits="1" Description="软件产生一次EV1的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV0SWF" Authority="RW" Bits="0" Description="软件产生一次EV0的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+      </Register>
+      <Register Name="GPTA_RISR" Authority="RW" Address="0x400550d0" Width="32" Description="Raw Interrupt Status Register">
+        <Bit Name="PEND" Authority="RO" Bits="16" Description="周期结束中断请求原始标志状态" />
+        <Bit Name="CBD" Authority="RO" Bits="11" Description="递减阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CBU" Authority="RO" Bits="10" Description="递增阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CAD" Authority="RO" Bits="9" Description="递减阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAU" Authority="RO" Bits="8" Description="递增阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAP_LD1" Authority="RO" Bits="5" Description="Capture Load to CMPB Shadow中断请求原始标志状态" />
+        <Bit Name="CAP_LD0" Authority="RO" Bits="4" Description="Capture Load to CMPA Shadow中断请求原始标志状态" />
+        <Bit Name="TRGEV1" Authority="RW" Bits="1" Description="TRGEV1中断请求原始标志状态" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="TRGEV0中断请求原始标志状态" />
+      </Register>
+      <Register Name="GPTA_MISR" Authority="RW" Address="0x400550d4" Width="32" Description="Masked Interrupt Status Register">
+        <Bit Name="PEND" Authority="RO" Bits="16" Description="周期结束中断请求原始标志状态" />
+        <Bit Name="CBD" Authority="RO" Bits="11" Description="递减阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CBU" Authority="RO" Bits="10" Description="递增阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CAD" Authority="RO" Bits="9" Description="递减阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAU" Authority="RO" Bits="8" Description="递增阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAP_LD1" Authority="RO" Bits="5" Description="Capture Load to CMPB Shadow中断请求原始标志状态" />
+        <Bit Name="CAP_LD0" Authority="RO" Bits="4" Description="Capture Load to CMPA Shadow中断请求原始标志状态" />
+        <Bit Name="TRGEV1" Authority="RW" Bits="1" Description="TRGEV1中断请求标志状态" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="TRGEV0中断请求标志状态" />
+      </Register>
+      <Register Name="GPTA_IMCR" Authority="RW" Address="0x400550d8" Width="32" Description="Interrupt Masking Control Register">
+        <Bit Name="PEND" Authority="RW" Bits="16" Description="周期结束中断请求原始标志状态" />
+        <Bit Name="CBD" Authority="RW" Bits="11" Description="递减阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CBU" Authority="RW" Bits="10" Description="递增阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CAD" Authority="RW" Bits="9" Description="递减阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAU" Authority="RW" Bits="8" Description="递增阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAP_LD1" Authority="RW" Bits="5" Description="Capture Load to CMPB Shadow中断请求原始标志状态" />
+        <Bit Name="CAP_LD0" Authority="RW" Bits="4" Description="Capture Load to CMPA Shadow中断请求原始标志状态" />
+        <Bit Name="TRGEV1" Authority="RW" Bits="1" Description="TRGEV1中断使能控制位" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="TRGEV0中断使能控制位" />
+      </Register>
+      <Register Name="GPTA_ICR" Authority="RW" Address="0x400550dc" Width="32" Description="Interrupt Clear Register">
+        <Bit Name="PEND" Authority="RO" Bits="16" Description="周期结束中断请求原始标志状态" />
+        <Bit Name="CBD" Authority="RO" Bits="11" Description="递减阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CBU" Authority="RO" Bits="10" Description="递增阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CAD" Authority="RO" Bits="9" Description="递减阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAU" Authority="RO" Bits="8" Description="递增阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAP_LD1" Authority="RO" Bits="5" Description="Capture Load to CMPB Shadow中断请求原始标志状态" />
+        <Bit Name="CAP_LD0" Authority="RO" Bits="4" Description="Capture Load to CMPA Shadow中断请求原始标志状态" />
+        <Bit Name="TRGEV1" Authority="RW" Bits="1" Description="清除TRGEV1原始中断状态位" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="清除TRGEV0原始中断状态位" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="EPT">
+      <Register Name="CEDR" Authority="RW" Address="0x40059000" Width="32" Description="ID &amp; Clock Enable/Disable Register">
+        <Bit Name="IDCODE" Authority="RO" Bits="31-16" Description="当前EPT模块的版本信息。" />
+        <Bit Name="FLTCKPRS" Authority="RW" Bits="15-8" Description="CGFLT数字滤波器的时钟分频控制。&#xD;&#xA;数字滤波器的时钟频率为PCLK/( FLTCKPRS+1)" />
+        <Bit Name="SHDWSTP" Authority="RW" Bits="6" Description="START控制位的Shadow功能使能控制。START置位不受此位控制，清除时受此位控制。当选择Shadow模式时，START控制位在周期结束时清除。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式" />
+        <Bit Name="TINSEL" Authority="RW" Bits="5-4" Description="TIN输入源选择控制位。TIN可以作为计数器计数时钟的使能控制，或者作为载波输出模式下的载波。&#xD;&#xA;0h：禁止TIN输入&#xD;&#xA;1h：BT0_OUT作为TIN的输入&#xD;&#xA;2h：BT1_OUT作为TIN的输入&#xD;&#xA;3h：保留" />
+        <Bit Name="CSS" Authority="RW" Bits="3" Description="计数器时钟源选择位。&#xD;&#xA;0h：PCLK&#xD;&#xA;1h：由SYNCIN3控制&#xD;&#xA;其他：保留" />
+        <Bit Name="DBGEN" Authority="RW" Bits="2-1" Description="调试使能控制。调试使能时，在CPU被调试器挂起时，时基计数器的计数时钟同时也被挂起。&#xD;&#xA;0h：调试禁止&#xD;&#xA;1h：调试使能，PWM输出高阻&#xD;&#xA;其他：调试使能，PWM输出保持" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="时基计数器的时钟使能控制。&#xD;&#xA;0h：计数器计数时钟禁止。&#xD;&#xA;1h：计数器计数时钟使能。" />
+      </Register>
+      <Register Name="RSSR" Authority="RW" Address="0x40059004" Width="32" Description="RESET/START/STOP Register">
+        <Bit Name="SRR" Authority="RW" Bits="15-12" Description="软件复位控制位。&#xD;&#xA;当对当前控制位写入‘0x5’时，TIMER模块会被复位。复位后，所有寄存器都恢复为RESET状态。" />
+        <Bit Name="CNTDIR" Authority="RO" Bits="3" Description="当前计数器计数方向状态。&#xD;&#xA;0h：当前计数器方向为递增&#xD;&#xA;1h：当前计数器方向为递减" />
+        <Bit Name="START" Authority="RW" Bits="0" Description="计数器启动控制位。&#xD;&#xA;0h：当写‘0’时，停止计数器&#xD;&#xA;1h：当写‘1’时，启动计数器&#xD;&#xA;当对START位进行读取时，返回当前计数器工作状态&#xD;&#xA;0h：计数器处于IDLE状态&#xD;&#xA;1h：计数器正在工作&#xD;&#xA;&#xD;&#xA;当CR[SWSYNEN]控制位为低时，START控制位用于控制EPT的启动，当EPT启动后，再次写入START将被忽略；当CR[SWSYNEN]控制位为高时，START控制位用于软件触发同步事件，每次对START的写入，会产生一次外部Sync事件（等同于SYNCR中的SYNCIN0触发）。" />
+      </Register>
+      <Register Name="PSCR" Authority="RW" Address="0x40059008" Width="32" Description="Counter Clock Prescaler Register">
+        <Bit Name="PSC" Authority="RW" Bits="15-0" Description="时钟分频控制。&#xD;&#xA;TCLK作为时基模块的计时时钟和工作时钟。TCLK的时钟从PCLK分频得到。此寄存器具有Shadow寄存器，可通过CR[PSCLD]设置载入的条件。&#xD;&#xA;TCLK的频率：FTCLK = FPCLK / (PSC+1)" />
+      </Register>
+      <Register Name="CR(WAVE=0)" Authority="RW" Address="0x4005900c" Width="32" Description="General Control Register">
+        <Bit Name="LDDRST" Authority="RW" Bits="26" Description="CMPD捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：CMPD触发后，计数器值进行重置&#xD;&#xA;1h：CMPD触发后，计数器值不进行重置" />
+        <Bit Name="LDCRST" Authority="RW" Bits="25" Description="CMPC捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：CMPC触发后，计数器值进行重置&#xD;&#xA;1h：CMPC触发后，计数器值不进行重置" />
+        <Bit Name="LDBRST" Authority="RW" Bits="24" Description="CMPB捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：CMPB触发后，计数器值进行重置&#xD;&#xA;1h：CMPB触发后，计数器值不进行重置" />
+        <Bit Name="LDARST" Authority="RW" Bits="23" Description="CMPA捕捉载入后，计数器值计数状态控制位。&#xD;&#xA;0h：CMPA触发后，计数器值进行重置&#xD;&#xA;1h：CMPA触发后，计数器值不进行重置" />
+        <Bit Name="STOP_WRAP" Authority="RW" Bits="22-21" Description="Capture模式下，捕获事件计数器周期设置值。" />
+        <Bit Name="CAPMD" Authority="RW" Bits="20" Description="捕捉模式设置。在一次性捕捉模式下，当捕捉事件计数器等于STOP_WRAP设置值时，后续的捕捉事件将不能触发捕捉。必须通过软件REARM后才能继续触发捕捉。&#xD;&#xA;0h：连续捕捉模式&#xD;&#xA;1h：一次性捕捉模式" />
+        <Bit Name="REARM" Authority="RW" Bits="19" Description="重置CAPTURE 捕捉事件计数器控制。&#xD;&#xA;0h：无效&#xD;&#xA;1h：重置捕捉计数器&#xD;&#xA;重置时，捕捉事件计数器被清零，自动打开CAPLDEN。捕捉事件计数器周期通过STOP_WRAP进行设置。" />
+        <Bit Name="WAVE" Authority="RW" Bits="18" Description="EPT工作模式选择。&#xD;&#xA;0h：捕捉模式&#xD;&#xA;1h：波形发生模式" />
+        <Bit Name="PSCLD" Authority="RW" Bits="17-16" Description="PSCR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;01b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：不进行载入" />
+        <Bit Name="CGFLT" Authority="RW" Bits="15-13" Description="门控输入数字滤波控制。此控制定义了滤波器监测的步数，只有连续N次监测结果一致时，滤波器才输出有效的电平翻转。滤波器的采样时钟频率在通过CKS控制位定义。&#xD;&#xA;000b：Bypass&#xD;&#xA;001b：N = 2&#xD;&#xA;010b：N = 3&#xD;&#xA;011b：N = 4&#xD;&#xA;100b：N = 6&#xD;&#xA;101b：N = 8&#xD;&#xA;110b：N = 16&#xD;&#xA;111b：N = 32" />
+        <Bit Name="CGSRC" Authority="RW" Bits="12-11" Description="群脉冲模式下，时钟门控的输入源选择。&#xD;&#xA;0h：CHAX作为CG的输入源&#xD;&#xA;1h：CHBX作为CG的输入源&#xD;&#xA;2h：TIN作为CG的输入源&#xD;&#xA;3h：保留" />
+        <Bit Name="FLTIPSCLD" Authority="RW" Bits="10" Description="数字滤波器初始化控制。对该控制写’1’可以初始化数字滤波器计数器，计数器值被初始化为CEDR[FLTCKPRS]中的设置值。&#xD;&#xA;0h：无效&#xD;&#xA;1h：执行初始化" />
+        <Bit Name="BURST" Authority="RW" Bits="9" Description="群脉冲模式。&#xD;&#xA;0h：禁止群脉冲模式&#xD;&#xA;1h：使能群脉冲模式" />
+        <Bit Name="CAPLDEN" Authority="RW" Bits="8" Description="CMPA和CMPB在捕捉事件触发时，载入使能控制。此控制位在禁止对CMP寄存器载入时，并不影响捕捉事件CEV的触发。&#xD;&#xA;0h：禁止对CMP寄存器的捕获载入&#xD;&#xA;1h：使能对CMP寄存器的捕获载入" />
+        <Bit Name="PRDLD" Authority="RW" Bits="5-4" Description="PRDR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：PRDR活动寄存器更新发生在周期结束(PEND)&#xD;&#xA;01b：PRDR活动寄存器更新发生在外部LOAD触发或SYNC触发时&#xD;&#xA;10b：PRDR活动寄存器更新发生在计数器值等于零和外部LOAD触发或SYNC触发时&#xD;&#xA;11b：立即更新，所有对PRDR操作直接作用于活动寄存器 [1]" />
+        <Bit Name="IDLEST" Authority="RW" Bits="3" Description="波形输出被停止时，GPIO输出控制&#xD;&#xA;0h：GPIO高阻输出&#xD;&#xA;1h：PWM信号低电平（此PWM信号为内部PWMx信号，GPIO输出电平取决于是否使能死区控制，以及死区控制的配置）" />
+        <Bit Name="SWSYNEN" Authority="RW" Bits="2" Description="软件使能同步触发使能控制（RSSR中START控制位）。&#xD;&#xA;0h：设置SW START控制只用于启动。&#xD;&#xA;1h：设置SW START控制用于启动和以产生一次外部触发的方式重新启动。" />
+        <Bit Name="CNTMD" Authority="RW" Bits="1-0" Description="计数模式设置。&#xD;&#xA;计数模式一般只设置一次，并且在计数过程中不做改变。如果计数模式被改变，变化将发生在下一个TCLK的边沿，并且基于上一个计数器值进行递增或者递减。&#xD;&#xA;00b：递增模式&#xD;&#xA;01b：递减模式 （该模式不支持输出满幅波形）&#xD;&#xA;10b：递增递减模式&#xD;&#xA;11b：保留" />
+      </Register>
+      <Register Name="CR(WAVE=1)" Authority="RW" Address="0x4005900c" Width="32" Description="">
+        <Bit Name="WAVE" Authority="RW" Bits="18" Description="EPT工作模式选择。&#xD;&#xA;0h：捕捉模式&#xD;&#xA;1h：波形发生模式" />
+        <Bit Name="PSCLD" Authority="RO" Bits="17-16" Description="PSCR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;01b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：不进行载入" />
+        <Bit Name="CGFLT" Authority="RW" Bits="15-13" Description="门控输入数字滤波控制。此控制定义了滤波器监测的步数，只有连续N次监测结果一致时，滤波器才输出有效的电平翻转。滤波器的采样时钟频率在通过CKS控制位定义。&#xD;&#xA;000b：Bypass&#xD;&#xA;001b：N = 2&#xD;&#xA;010b：N = 3&#xD;&#xA;011b：N = 4&#xD;&#xA;100b：N = 6&#xD;&#xA;101b：N = 8&#xD;&#xA;110b：N = 16&#xD;&#xA;111b：N = 32" />
+        <Bit Name="CGSRC" Authority="RW" Bits="12-11" Description="群脉冲模式下，时钟门控的输入源选择。&#xD;&#xA;0h：CHAX作为CG的输入源&#xD;&#xA;1h：CHBX作为CG的输入源&#xD;&#xA;2h：TIN作为CG的输入源&#xD;&#xA;3h：保留" />
+        <Bit Name="FLTIPSCLD" Authority="RW" Bits="10" Description="数字滤波器初始化控制。对该控制写’1’可以初始化数字滤波器计数器，计数器值被初始化为CEDR[FLTCKPRS]中的设置值。&#xD;&#xA;0h：无效&#xD;&#xA;1h：执行初始化" />
+        <Bit Name="BURST" Authority="RW" Bits="9" Description="群脉冲模式。&#xD;&#xA;0h：禁止群脉冲模式&#xD;&#xA;1h：使能群脉冲模式" />
+        <Bit Name="PHSEN" Authority="RO" Bits="7" Description="PHSR使能控制位，当控制位有效时，计数器将在启动时被初始化为PHSR中的设置值。&#xD;&#xA;0h：禁止通过PHSR初始化&#xD;&#xA;1h：使能通过PHSR初始化" />
+        <Bit Name="OPM" Authority="RO" Bits="6" Description="计数器单次触发工作模式选择。&#xD;&#xA;0h：连续计数工作模式&#xD;&#xA;1h：单次触发工作模式&#xD;&#xA;其他：保留" />
+        <Bit Name="PRDLD" Authority="RW" Bits="5-4" Description="PRDR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;00b：PRDR活动寄存器更新发生在周期结束(PEND)&#xD;&#xA;01b：PRDR活动寄存器更新发生在外部LOAD触发或SYNC触发时&#xD;&#xA;10b：PRDR活动寄存器更新发生在计数器值等于零和外部LOAD触发或SYNC触发时&#xD;&#xA;11b：立即更新，所有对PRDR操作直接作用于活动寄存器" />
+        <Bit Name="IDLEST" Authority="RO" Bits="3" Description="波形输出被停止时，GPIO输出控制&#xD;&#xA;0h：GPIO高阻输出&#xD;&#xA;1h：PWM信号低电平（此PWM信号为内部PWMx信号，GPIO输出电平取决于是否使能死区控制，以及死区控制的配置）" />
+        <Bit Name="SWSYNEN" Authority="RW" Bits="2" Description="软件使能同步触发使能控制（RSSR中START控制位）。&#xD;&#xA;0h：设置SW START控制只用于启动。&#xD;&#xA;1h：设置SW START控制用于启动和以产生一次外部触发的方式重新启动。" />
+        <Bit Name="CNTMD" Authority="RW" Bits="1-0" Description="计数模式设置。&#xD;&#xA;计数模式一般只设置一次，并且在计数过程中不做改变。如果计数模式被改变，变化将发生在下一个TCLK的边沿，并且基于上一个计数器值进行递增或者递减。&#xD;&#xA;00b：递增模式&#xD;&#xA;01b：递减模式&#xD;&#xA;10b：递增递减模式&#xD;&#xA;11b：保留" />
+      </Register>
+      <Register Name="SYNCR" Authority="RW" Address="0x40059010" Width="32" Description="Synchronization Control Register">
+        <Bit Name="AREARM" Authority="RW" Bits="31-30" Description="硬件自动REARM控制位。&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：CNT = ZRO时，自动REARM&#xD;&#xA;2：CNT = PRD时，自动REARM&#xD;&#xA;3：CNT = ZRO or CNT = PRD时，自动REARM" />
+        <Bit Name="TRGO1SEL" Authority="RW" Bits="29-27" Description="输入触发通道直通作为TRGSRC1的ExtSync条件的选择。只有当EVTRG寄存器中TRGSRC1控制位选择为ExtSync条件时有效。&#xD;&#xA;0h：选择SYNCIN0作为TRGSRC1的ExtSync触发&#xD;&#xA;1h：选择SYNCIN1作为TRGSRC1的ExtSync触发&#xD;&#xA;2h：选择SYNCIN2作为TRGSRC1的ExtSync触发&#xD;&#xA;3h：选择SYNCIN3作为TRGSRC1的ExtSync触发&#xD;&#xA;4h：选择SYNCIN4作为TRGSRC1的ExtSync触发&#xD;&#xA;5h：选择SYNCIN5作为TRGSRC1的ExtSync触发&#xD;&#xA;其他：保留" />
+        <Bit Name="TRGO0SEL" Authority="RW" Bits="26-24" Description="输入触发通道直通作为TRGSRC0的ExtSync条件的选择。只有当EVTRG寄存器中TRGSRC0控制位选择为ExtSync条件时有效。&#xD;&#xA;0h：选择SYNCIN0作为TRGSRC0的ExtSync触发&#xD;&#xA;1h：选择SYNCIN1作为TRGSRC0的ExtSync触发&#xD;&#xA;2h：选择SYNCIN2作为TRGSRC0的ExtSync触发&#xD;&#xA;3h：选择SYNCIN3作为TRGSRC0的ExtSync触发&#xD;&#xA;4h：选择SYNCIN4作为TRGSRC0的ExtSync触发&#xD;&#xA;5h：选择SYNCIN5作为TRGSRC0的ExtSync触发&#xD;&#xA;其他：保留" />
+        <Bit Name="TXREARM0" Authority="RW" Bits="23-22" Description="Tx信号触发SYNCIN0的REARM&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：T1发生触发，自动REARM SYNCIN0通道&#xD;&#xA;2：T2发生触发，自动REARM SYNCIN0通道&#xD;&#xA;3：T1或者T2发生触发，自动REARM SYNCIN0通道" />
+        <Bit Name="REARMx" Authority="RW" Bits="21-16" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="OSTMDx" Authority="RW" Bits="13-8" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="SYNCENx" Authority="RW" Bits="5-0" Description="外部同步触发使能控制。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能当前触发输入通道&#xD;&#xA;SYNCIN0：外部Sync事件&#xD;&#xA;SYNCIN1：Load触发&#xD;&#xA;SYNCIN2：Capture触发事件&#xD;&#xA;SYNCIN3：CNT增减一拍触发事件&#xD;&#xA;SYNCIN4：外部COS事件（用于PWM波形输出控制）&#xD;&#xA;SYNCIN5：外部COS事件（用于PWM波形输出控制）" />
+      </Register>
+      <Register Name="GLDCR" Authority="RW" Address="0x40059014" Width="32" Description="Global Load Control Register">
+        <Bit Name="GLDCNT" Authority="RW" Bits="12-10" Description="全局载入事件计数器。&#xD;&#xA;计数器值表示当前已发生多少次事件触发。" />
+        <Bit Name="GLDPRD" Authority="RW" Bits="9-7" Description="全局载入触发周期选择。&#xD;&#xA;可以选择N次触发条件满足后，才进行一次全局载入。&#xD;&#xA;000b：Disable Counter（立即触发）&#xD;&#xA;001b：第2次条件满足时触发&#xD;&#xA;010b：第3次条件满足时触发&#xD;&#xA;011b：第4次条件满足时触发&#xD;&#xA;100b：第5次条件满足时触发&#xD;&#xA;101b：第6次条件满足时触发&#xD;&#xA;110b：第7次条件满足时触发&#xD;&#xA;111b：第8次条件满足时触发" />
+        <Bit Name="OSTMD" Authority="RW" Bits="5" Description="One Shot 载入模式使能控制位&#xD;&#xA;0h：禁止One Shot模式，只要条件满足，Active寄存器都会从Shadow寄存器载入&#xD;&#xA;1h：使能One Shot模式，一旦载入被触发，需要再次对GLDCR2[OSREARM]写入‘1’，才能允许下一次载入触发。" />
+        <Bit Name="GLDMD" Authority="RW" Bits="4-1" Description="全局载入触发事件选择。&#xD;&#xA;0h：CNT = ZRO&#xD;&#xA;1h：CNT = PRD&#xD;&#xA;2h：CNT = ZRO or CNT = PRD&#xD;&#xA;3h：CNT = ZRO or 外部LOAD触发或SYNC触发&#xD;&#xA;4h：CNT = PRD or 外部LOAD触发或SYNC触发&#xD;&#xA;5h：CNT = ZRO or CNT = PRD or 外部LOAD触发或SYNC触发&#xD;&#xA;Others：Reserved&#xD;&#xA;Fh：在GLDCR2[GFRCLD]写入‘1’时  [1]" />
+        <Bit Name="GLDEN" Authority="RW" Bits="0" Description="全局的Shadow到Active寄存器载入控制。&#xD;&#xA;0：使用独立的单个配置（在各个寄存器中LDMD控制位分别指派的载入控制）&#xD;&#xA;1：使用GLDMD中的设置，其他设置被屏蔽" />
+      </Register>
+      <Register Name="GLDCFG" Authority="RW" Address="0x40059018" Width="32" Description="Global Load Configuration Register">
+        <Bit Name="EMOSR" Authority="RW" Bits="13" Description="EMOSR寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCSF" Authority="RW" Bits="12" Description="AQCSF寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCRD" Authority="RW" Bits="11" Description="AQCRB寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCRC" Authority="RW" Bits="10" Description="AQCRA寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCRB" Authority="RW" Bits="9" Description="AQCRB寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="AQCRA" Authority="RW" Bits="8" Description="AQCRA寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="DBCR" Authority="RW" Bits="7" Description="DBCR寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="DBDTF" Authority="RW" Bits="6" Description="DBDTF寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="DBDTR" Authority="RW" Bits="5" Description="DBDTR寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="CMPD" Authority="RW" Bits="4" Description="CMPD寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="CMPC" Authority="RW" Bits="3" Description="CMPC寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="CMPB" Authority="RW" Bits="2" Description="CMPB寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="CMPA" Authority="RW" Bits="1" Description="CMPA寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+        <Bit Name="PRDR" Authority="RW" Bits="0" Description="PRDR寄存器Shadow到Active寄存器载入控制。&#xD;&#xA;0：即使GLDEN=1，仍旧使用独立的载入配置&#xD;&#xA;1：当GLDEN=1时，使用全局载入配置" />
+      </Register>
+      <Register Name="GLDCR2" Authority="RW" Address="0x4005901c" Width="32" Description="Global Load Control Register2">
+        <Bit Name="GFRCLD" Authority="RW" Bits="1" Description="软件产生一次GLD触发。&#xD;&#xA;0：写入‘0’无效，读取时总是返回‘0’&#xD;&#xA;1：软件产生一次GLD触发事件" />
+        <Bit Name="OSREARM" Authority="RW" Bits="0" Description="重置ONE SHOT模式&#xD;&#xA;0：写入‘0’无效，读取时总是返回‘0’&#xD;&#xA;1：重置ONE SHOT模式。ONE SHOT模式下，一次触发后，需要重置模式才允许再次触发" />
+      </Register>
+      <Register Name="PRDR" Authority="RW" Address="0x40059024" Width="32" Description="Period Register">
+        <Bit Name="PRDR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;此控制位决定了PWM输出波形的周期值。通过设置CR[PRDLD]可以选择Shadow到Active载入的触发条件。" />
+      </Register>
+      <Register Name="PHSR" Authority="RW" Address="0x40059028" Width="32" Description="Phase Control Register">
+        <Bit Name="PHSDIR" Authority="RW" Bits="31" Description="相位方向控制位。&#xD;&#xA;此控制位只在计数模式为递增递减模式下有效。此控制位配置在同步事件发生时，计数器值从PHSR载入后，计数器的计数方向。新的配置方向与同步前计数器的计数方向无关。在递增模式或递减模式下，此控制位无效。&#xD;&#xA;0h：同步后递减&#xD;&#xA;1h：同步后递增" />
+        <Bit Name="PHSR" Authority="RW" Bits="15-0" Description="相位控制寄存器。&#xD;&#xA;此控制位决定了PWM输出波形的相位。当CR[PHSEN] = 0时，同步事件不会触发PHSR载入到CNT中，当CR[PHSEN] = 1时，同步事件发生会触发PHSR载入到CNT中。" />
+      </Register>
+      <Register Name="CMPA" Authority="RW" Address="0x4005902c" Width="32" Description="Compare A Register">
+        <Bit Name="OVWRT" Authority="RW" Bits="31" Description="Over Write Flag 标志位。&#xD;&#xA;表示当前Capture值是否被Over Written。当连续两次针对于当前寄存器的捕获事件发生，而两次捕获之间未对当前寄存器进行过读取操作，则Over Written标志被置位。读取当前寄存器会自动清除Over Written标志。&#xD;&#xA;此标志位只有在Capture模式下有效。" />
+        <Bit Name="CMPA" Authority="RW" Bits="15-0" Description="比较值A寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，Shadow模式可以通过CMPLDR[SHDWCMPA]进行设置。在Shadow模式下，可以通过CMPLDR[LDAMD]选择Shadow到Active载入的触发条件。在写入前，可以通过SHDWAFULL控制位检测当前寄存器状态。&#xD;&#xA;&#xD;&#xA;当工作于Capture模式下，此寄存器对应CAPLD0事件触发的捕获值。" />
+      </Register>
+      <Register Name="CMPB" Authority="RW" Address="0x40059030" Width="32" Description="Compare B Register">
+        <Bit Name="OVWRT" Authority="RW" Bits="31" Description="Over Write Flag 标志位。&#xD;&#xA;表示当前Capture值是否被Over Written。当连续两次针对于当前寄存器的捕获事件发生，而两次捕获之间未对当前寄存器进行过读取操作，则Over Written标志被置位。读取当前寄存器会自动清除Over Written标志。&#xD;&#xA;此标志位只有在Capture模式下有效。" />
+        <Bit Name="CMPB" Authority="RW" Bits="15-0" Description="比较值B寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，Shadow模式可以通过CMPLDR[SHDWCMPB]进行设置。在Shadow模式下，可以通过CMPLDR[LDBMD]选择Shadow到Active载入的触发条件。在写入前，可以通过SHDWBFULL控制位检测当前寄存器状态。&#xD;&#xA;&#xD;&#xA;当工作于Capture模式下，此寄存器对应CAPLD1事件触发的捕获值。" />
+      </Register>
+      <Register Name="CMPC" Authority="RW" Address="0x40059034" Width="32" Description="Compare C Register">
+        <Bit Name="OVWRT" Authority="RW" Bits="31" Description="Over Write Flag 标志位。&#xD;&#xA;表示当前Capture值是否被Over Written。当连续两次针对于当前寄存器的捕获事件发生，而两次捕获之间未对当前寄存器进行过读取操作，则Over Written标志被置位。读取当前寄存器会自动清除Over Written标志。&#xD;&#xA;此标志位只有在Capture模式下有效。" />
+        <Bit Name="CMPC" Authority="RW" Bits="15-0" Description="比较值C寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，Shadow模式可以通过CMPLDR[SHDWCMPC]进行设置。在Shadow模式下，可以通过CMPLDR[LDCMD]选择Shadow到Active载入的触发条件。&#xD;&#xA;&#xD;&#xA;当工作于Capture模式下，此寄存器对应CAPLD2事件触发的捕获值。" />
+      </Register>
+      <Register Name="CMPD" Authority="RW" Address="0x40059038" Width="32" Description="Compare D Register">
+        <Bit Name="OVWRT" Authority="RW" Bits="31" Description="Over Write Flag 标志位。&#xD;&#xA;表示当前Capture值是否被Over Written。当连续两次针对于当前寄存器的捕获事件发生，而两次捕获之间未对当前寄存器进行过读取操作，则Over Written标志被置位。读取当前寄存器会自动清除Over Written标志。&#xD;&#xA;此标志位只有在Capture模式下有效。" />
+        <Bit Name="CMPD" Authority="RW" Bits="15-0" Description="比较值D寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，Shadow模式可以通过CMPLDR[SHDWCMPD]进行设置。在Shadow模式下，可以通过CMPLDR[LDDMD]选择Shadow到Active载入的触发条件。&#xD;&#xA;&#xD;&#xA;当工作于Capture模式下，此寄存器对应CAPLD3事件触发的捕获值。" />
+      </Register>
+      <Register Name="CMPLDR" Authority="RW" Address="0x4005903c" Width="32" Description="Compare Data Load Control Register">
+        <Bit Name="SHDWAFULL" Authority="RW" Bits="21-20" Description="CMPB的Shadow寄存器非空标志位。&#xD;&#xA;当对CMPB进行写操作时，该标志位置位。该标志位在Shadow被载入到Active后，会自动清除。&#xD;&#xA;0h：Shadow空&#xD;&#xA;1h：Shadow非空，对当前CMP寄存器写入会覆盖Shadow中未被载入的值" />
+        <Bit Name="LDDMD" Authority="RW" Bits="15-13" Description="Shadow模式下，Active CMPD从Shadow CMPD载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入" />
+        <Bit Name="LDCMD" Authority="RW" Bits="12-10" Description="Shadow模式下，Active CMPC从Shadow CMPC载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入" />
+        <Bit Name="LDBMD" Authority="RW" Bits="9-7" Description="Shadow模式下，Active CMPB从Shadow CMPB载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入" />
+        <Bit Name="LDAMD" Authority="RW" Bits="6-4" Description="Shadow模式下，Active CMPA从Shadow CMPA载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="SHDWCMPD" Authority="RW" Bits="3" Description="CMPD的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式 [1]" />
+        <Bit Name="SHDWCMPC" Authority="RW" Bits="2" Description="CMPC的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式 [1]" />
+        <Bit Name="SHDWCMPB" Authority="RW" Bits="1" Description="CMPB的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式 [1]" />
+        <Bit Name="SHDWCMPA" Authority="RW" Bits="0" Description="CMPA的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式 [1]" />
+      </Register>
+      <Register Name="CNT" Authority="RW" Address="0x40059040" Width="32" Description="Counter Register">
+        <Bit Name="CNT" Authority="RW" Bits="15-0" Description="时基计数器寄存器。&#xD;&#xA;对CNT读取时，返回当前计数器值。对CNT写入时，将直接更新CNT的计数值。CNT计数器没有Shadow寄存器，CPU的写入将直接影响当前计数器值。" />
+      </Register>
+      <Register Name="AQLDR" Authority="RW" Address="0x40059044" Width="32" Description="Action Qualifier Load Control Register">
+        <Bit Name="LDDMD" Authority="RW" Bits="15-13" Description="Shadow模式下，Active AQCRD从Shadow载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="LDCMD" Authority="RW" Bits="12-10" Description="Shadow模式下，Active AQCRC从Shadow载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="SHDWAQD" Authority="RW" Bits="9" Description="AQCRD寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="SHDWAQC" Authority="RW" Bits="8" Description="AQCRC寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="LDBMD" Authority="RW" Bits="7-5" Description="Shadow模式下，Active AQCRB从Shadow载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="LDAMD" Authority="RW" Bits="4-2" Description="Shadow模式下，Active AQCRA从Shadow载入控制。&#xD;&#xA;xx1b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;x1xb：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;1xxb：外部LOAD触发或SYNC触发时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;000b：不进行载入&#xD;&#xA;每个控制位分别对应一个触发条件，可以同时使能多个触发条件。例如，当设置011b时，CNT=ZRO或CNT=PRD时，都会触发寄存器载入。" />
+        <Bit Name="SHDWAQB" Authority="RW" Bits="1" Description="AQCRB寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="SHDWAQA" Authority="RW" Bits="0" Description="AQCRA寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+      </Register>
+      <Register Name="AQCRA" Authority="RW" Address="0x40059048" Width="32" Description="Action Qualifier Control Register A">
+        <Bit Name="CBSEL" Authority="RW" Bits="23-22" Description="CB比较值数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="CASEL" Authority="RW" Bits="21-20" Description="CA比较值的数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="T2D" Authority="RW" Bits="19-18" Description="当T2事件发生，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T2U" Authority="RW" Bits="17-16" Description="当T2事件发生，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1D" Authority="RW" Bits="15-14" Description="当T1事件发生，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1U" Authority="RW" Bits="13-12" Description="当T1事件发生，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBD" Authority="RW" Bits="11-10" Description="当CNT值等于CB，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBU" Authority="RW" Bits="9-8" Description="当CNT值等于CB，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAD" Authority="RW" Bits="7-6" Description="当CNT值等于CA，且此时计数方向为递减时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAU" Authority="RW" Bits="5-4" Description="当CNT值等于CA，且此时计数方向为递增时，在通道A上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="PRD" Authority="RW" Bits="3-2" Description="当CNT值等于PRDR时，在通道A上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于PRDR时，计数方向为递减模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="ZRO" Authority="RW" Bits="1-0" Description="当CNT值等于零时，在通道A上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于零时，计数方向为递增模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+      </Register>
+      <Register Name="AQCRB" Authority="RW" Address="0x4005904c" Width="32" Description="Action Qualifier Control Register B">
+        <Bit Name="CBSEL" Authority="RW" Bits="23-22" Description="CB比较值数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="CASEL" Authority="RW" Bits="21-20" Description="CA比较值的数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="T2D" Authority="RW" Bits="19-18" Description="当T2事件发生，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T2U" Authority="RW" Bits="17-16" Description="当T2事件发生，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1D" Authority="RW" Bits="15-14" Description="当T1事件发生，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1U" Authority="RW" Bits="13-12" Description="当T1事件发生，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBD" Authority="RW" Bits="11-10" Description="当CNT值等于CB，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBU" Authority="RW" Bits="9-8" Description="当CNT值等于CB，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAD" Authority="RW" Bits="7-6" Description="当CNT值等于CA，且此时计数方向为递减时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAU" Authority="RW" Bits="5-4" Description="当CNT值等于CA，且此时计数方向为递增时，在通道B上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="PRD" Authority="RW" Bits="3-2" Description="当CNT值等于PRDR时，在通道B上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于PRDR时，计数方向为递减模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="ZRO" Authority="RW" Bits="1-0" Description="当CNT值等于零时，在通道B上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于零时，计数方向为递增模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+      </Register>
+      <Register Name="AQCRC" Authority="RW" Address="0x40059050" Width="32" Description="Action Qualifier Control Register C">
+        <Bit Name="CBSEL" Authority="RW" Bits="23-22" Description="CB比较值数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="CASEL" Authority="RW" Bits="21-20" Description="CA比较值的数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="T2D" Authority="RW" Bits="19-18" Description="当T2事件发生，且此时计数方向为递减时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T2U" Authority="RW" Bits="17-16" Description="当T2事件发生，且此时计数方向为递增时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1D" Authority="RW" Bits="15-14" Description="当T1事件发生，且此时计数方向为递减时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1U" Authority="RW" Bits="13-12" Description="当T1事件发生，且此时计数方向为递增时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBD" Authority="RW" Bits="11-10" Description="当CNT值等于CB，且此时计数方向为递减时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBU" Authority="RW" Bits="9-8" Description="当CNT值等于CB，且此时计数方向为递增时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAD" Authority="RW" Bits="7-6" Description="当CNT值等于CA，且此时计数方向为递减时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAU" Authority="RW" Bits="5-4" Description="当CNT值等于CA，且此时计数方向为递增时，在通道C上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="PRD" Authority="RW" Bits="3-2" Description="当CNT值等于PRDR时，在通道C上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于PRDR时，计数方向为递减模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="ZRO" Authority="RW" Bits="1-0" Description="当CNT值等于零时，在通道C上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于零时，计数方向为递增模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+      </Register>
+      <Register Name="AQCRD" Authority="RW" Address="0x40059050" Width="32" Description="Action Qualifier Control Register C">
+        <Bit Name="CBSEL" Authority="RW" Bits="23-22" Description="CB比较值数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="CASEL" Authority="RW" Bits="21-20" Description="CA比较值的数据源选择&#xD;&#xA;0h：CMPA寄存器作为CA的数据源&#xD;&#xA;1h：CMPB寄存器作为CA的数据源&#xD;&#xA;2h：CMPC寄存器作为CA的数据源&#xD;&#xA;3h：CMPD寄存器作为CA的数据源" />
+        <Bit Name="T2D" Authority="RW" Bits="19-18" Description="当T2事件发生，且此时计数方向为递减时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T2U" Authority="RW" Bits="17-16" Description="当T2事件发生，且此时计数方向为递增时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1D" Authority="RW" Bits="15-14" Description="当T1事件发生，且此时计数方向为递减时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="T1U" Authority="RW" Bits="13-12" Description="当T1事件发生，且此时计数方向为递增时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBD" Authority="RW" Bits="11-10" Description="当CNT值等于CB，且此时计数方向为递减时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CBU" Authority="RW" Bits="9-8" Description="当CNT值等于CB，且此时计数方向为递增时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAD" Authority="RW" Bits="7-6" Description="当CNT值等于CA，且此时计数方向为递减时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="CAU" Authority="RW" Bits="5-4" Description="当CNT值等于CA，且此时计数方向为递增时，在通道D上做出的波形输出动作定义。&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="PRD" Authority="RW" Bits="3-2" Description="当CNT值等于PRDR时，在通道D上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于PRDR时，计数方向为递减模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="ZRO" Authority="RW" Bits="1-0" Description="当CNT值等于零时，在通道D上做出的波形输出动作定义。&#xD;&#xA;在递增递减模式时，当计数器值等于零时，计数方向为递增模式&#xD;&#xA;0h：不动作（过滤该处理事件）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+      </Register>
+      <Register Name="AQTSCR" Authority="RW" Address="0x40059058" Width="32" Description="Action Qualifier T Event Source Selection Register">
+        <Bit Name="T2SEL" Authority="RW" Bits="7-4" Description="T2事件触发源选择。每个Bit独立控制单独输入源的使能，当多个Bit同时有效时，被使能的输入源通过逻辑或组成T1事件。&#xD;&#xA;0h：SYNCIN5触发&#xD;&#xA;Bit1：EP0&#xD;&#xA;Bit2：EP1&#xD;&#xA;Bit3：EP2&#xD;&#xA;Bit4：EP3&#xD;&#xA;Bit5：EP4&#xD;&#xA;Bit6：EP5&#xD;&#xA;Bit7：EP6" />
+        <Bit Name="T1SEL" Authority="RW" Bits="3-0" Description="T1事件触发源选择。每个Bit独立控制单独输入源的使能，当多个Bit同时有效时，被使能的输入源通过逻辑或组成T1事件。&#xD;&#xA;Bit0：SYNCIN4触发&#xD;&#xA;Bit1：EP0&#xD;&#xA;Bit2：EP1&#xD;&#xA;Bit3：EP2&#xD;&#xA;Bit4：EP3&#xD;&#xA;Bit5：EP4&#xD;&#xA;Bit6：EP5&#xD;&#xA;Bit7：EP6" />
+      </Register>
+      <Register Name="AQOSF" Authority="RW" Address="0x4005905c" Width="32" Description="Action Qualifier One Shot Force Register">
+        <Bit Name="RLDCSF" Authority="RW" Bits="17-16" Description="AQCSF寄存器从Shadow载入到Active的控制。&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;00b：立即载入" />
+        <Bit Name="ACTD" Authority="RW" Bits="14-13" Description="当软件强制输出时，通道D上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="OSTSFD" Authority="RW" Bits="12" Description="在通道D上产生一次性软件强制输出。&#xD;&#xA;0h：对当前位写‘0’无效&#xD;&#xA;1h：产生一次性软件强制输出，此输出状态保持，直到有其他改变通道A输出状态的触发事件发生。" />
+        <Bit Name="ACTC" Authority="RW" Bits="10-9" Description="当软件强制输出时，通道C上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="OSTSFC" Authority="RW" Bits="8" Description="在通道C上产生一次性软件强制输出。&#xD;&#xA;0h：对当前位写‘0’无效&#xD;&#xA;1h：产生一次性软件强制输出，此输出状态保持，直到有其他改变通道A输出状态的触发事件发生。" />
+        <Bit Name="ACTB" Authority="RW" Bits="6-5" Description="当软件强制输出时，通道B上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="OSTSFB" Authority="RW" Bits="4" Description="在通道B上产生一次性软件强制输出。&#xD;&#xA;0h：对当前位写‘0’无效&#xD;&#xA;1h：产生一次性软件强制输出，此输出状态保持，直到有其他改变通道A输出状态的触发事件发生。" />
+        <Bit Name="ACTA" Authority="RW" Bits="2-1" Description="当软件强制输出时，通道A上做出的波形输出动作定义。&#xD;&#xA;0h：保持原来的输出（不动作）&#xD;&#xA;1h：清除输出（低电平）&#xD;&#xA;2h：置位输出（高电平）&#xD;&#xA;3h：反向（翻转）" />
+        <Bit Name="OSTSFA" Authority="RW" Bits="0" Description="在通道A上产生一次性软件强制输出。&#xD;&#xA;0h：对当前位写‘0’无效&#xD;&#xA;1h：产生一次性软件强制输出，此输出状态保持，直到有其他改变通道A输出状态的触发事件发生。" />
+      </Register>
+      <Register Name="AQCSF" Authority="RW" Address="0x40059060" Width="32" Description="Action Qualifier Continuous Force Register">
+        <Bit Name="CSFD" Authority="RW" Bits="7-6" Description="通过软件对通道D做连续强制赋值。在立即更新模式下，赋值将在配置后下一个TCLK输出。在Shadow模式下，在Shadow更新到Active后的下一个TCLK后输出。对Shadow更新到Active的控制，可以通过AQOSF寄存器中的RLDCSF控制位进行配置。&#xD;&#xA;0h：禁止强制赋值&#xD;&#xA;1h：强制输出低&#xD;&#xA;2h：强制输出高&#xD;&#xA;3h：禁止强制赋值" />
+        <Bit Name="CSFC" Authority="RW" Bits="5-4" Description="通过软件对通道C做连续强制赋值。在立即更新模式下，赋值将在配置后下一个TCLK输出。在Shadow模式下，在Shadow更新到Active后的下一个TCLK后输出。对Shadow更新到Active的控制，可以通过AQOSF寄存器中的RLDCSF控制位进行配置。&#xD;&#xA;0h：禁止强制赋值&#xD;&#xA;1h：强制输出低&#xD;&#xA;2h：强制输出高&#xD;&#xA;3h：禁止强制赋值" />
+        <Bit Name="CSFB" Authority="RW" Bits="3-2" Description="通过软件对通道B做连续强制赋值。在立即更新模式下，赋值将在配置后下一个TCLK输出。在Shadow模式下，在Shadow更新到Active后的下一个TCLK后输出。对Shadow更新到Active的控制，可以通过AQOSF寄存器中的RLDCSF控制位进行配置。&#xD;&#xA;0h：禁止强制赋值&#xD;&#xA;1h：强制输出低&#xD;&#xA;2h：强制输出高&#xD;&#xA;3h：禁止强制赋值" />
+        <Bit Name="CSFA" Authority="RW" Bits="1-0" Description="通过软件对通道A做连续强制赋值。在立即更新模式下，赋值将在配置后下一个TCLK输出。在Shadow模式下，在Shadow更新到Active后的下一个TCLK后输出。对Shadow更新到Active的控制，可以通过AQOSF寄存器中的RLDCSF控制位进行配置。&#xD;&#xA;0h：禁止强制赋值&#xD;&#xA;1h：强制输出低&#xD;&#xA;2h：强制输出高&#xD;&#xA;3h：禁止强制赋值" />
+      </Register>
+      <Register Name="DBLDR" Authority="RW" Address="0x40059064" Width="32" Description="Dead-Band Load Control Register">
+        <Bit Name="LDPSCMD" Authority="RW" Bits="11-10" Description="Shadow模式下，Active DCKPSC从Shadow载入控制。&#xD;&#xA;00b：不进行载入&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中" />
+        <Bit Name="SHDWPSC" Authority="RW" Bits="9" Description="DCKPSC寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="LDDTFMD" Authority="RW" Bits="8-7" Description="Shadow模式下，Active DBDTF从Shadow载入控制。&#xD;&#xA;00b：不进行载入&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中" />
+        <Bit Name="SHDWDTF" Authority="RW" Bits="6" Description="DBDTF寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="LDDTRMD" Authority="RW" Bits="5-4" Description="Shadow模式下，Active DBDTR从Shadow载入控制。&#xD;&#xA;00b：不进行载入&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中" />
+        <Bit Name="SHDWDTR" Authority="RW" Bits="3" Description="DBDTR寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="CRLDMODE" Authority="RW" Bits="2-1" Description="Shadow模式下，Active DBCR从Shadow载入控制。&#xD;&#xA;00b：不进行载入&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中" />
+        <Bit Name="CRSHDWEN" Authority="RW" Bits="0" Description="DBCR寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+      </Register>
+      <Register Name="DBCR" Authority="RW" Address="0x40059068" Width="32" Description="Dead-Band Control Register">
+        <Bit Name="CHC_DEDB" Authority="RW" Bits="27" Description="在通道C DBCOUTB上选择死区双沿模式（S6）&#xD;&#xA;0h：不使用死区双沿&#xD;&#xA;1h：使用死区双沿" />
+        <Bit Name="CHB_DEDB" Authority="RW" Bits="26" Description="在通道B DBCOUTB上选择死区双沿模式（S6）&#xD;&#xA;0h：不使用死区双沿&#xD;&#xA;1h：使用死区双沿" />
+        <Bit Name="CHA_DEDB" Authority="RW" Bits="25" Description="在通道A DBCOUTB 上选择死区双沿模式（S6）&#xD;&#xA;0h：不使用死区双沿&#xD;&#xA;1h：使用死区双沿" />
+        <Bit Name="DCKSEL" Authority="RW" Bits="24" Description="半周期时钟使能控制。&#xD;&#xA;0：死区控制延时计数器以TCLK频率工作&#xD;&#xA;1：死区控制延时计数器以HCLK/(DPSC+1)工作" />
+        <Bit Name="CHC_OUTSWAP" Authority="RW" Bits="23-22" Description="死区输出交换控制。&#xD;&#xA;0h：OUTA=通道A输出，OUTB=通道B输出&#xD;&#xA;1h：OUTA=通道A输出，OUTB=通道A输出&#xD;&#xA;2h：OUTB=通道B输出，OUTB=通道B输出&#xD;&#xA;3h：OUTA=通道B输出，OUTB=通道A输出" />
+        <Bit Name="CHC_INSEL" Authority="RW" Bits="21-20" Description="延时模块输入选择（S5、S4开关）。在经典死区控制模式下，上升沿延时和下降沿延时都选择同一个输入信号进行处理。&#xD;&#xA;0h：PWMC作为上升沿和下降沿延时处理的输入信号&#xD;&#xA;1h：PWMD作为上升沿延时输入，PWMC作为下降沿延时输入&#xD;&#xA;2h：PWMC作为上升沿延时输入，PWMD作为下降沿延时输入&#xD;&#xA;3h：PWMD作为上升沿和下降沿延时处理的输入信号" />
+        <Bit Name="CHC_POLARITY" Authority="RW" Bits="19-18" Description="输出极性控制（S3、S2开关）。&#xD;&#xA;0h：通道A和通道B延时输出不反向&#xD;&#xA;1h：通道A的延时输出反向&#xD;&#xA;2h：通道B的延时输出反向&#xD;&#xA;3h：通道A和通道B延时输出全部反向" />
+        <Bit Name="CHC_OUTSEL" Authority="RW" Bits="17-16" Description="死区输出配置（S1、S0开关）。&#xD;&#xA;0h：禁止死区控制，PWMC和PWMD直接Bypass到斩波控制模块&#xD;&#xA;1h：关闭通道A的上升沿延时，使能通道B的下降沿延时&#xD;&#xA;2h：使能通道A的上升沿延时，关闭通道B的下降沿延时&#xD;&#xA;3h：使能通道A的上升沿延时，使能通道B的下降沿延时" />
+        <Bit Name="CHB_OUTSWAP" Authority="RW" Bits="15-14" Description="死区输出交换控制。&#xD;&#xA;0h：OUTA=通道A输出，OUTB=通道B输出&#xD;&#xA;1h：OUTA=通道A输出，OUTB=通道A输出&#xD;&#xA;2h：OUTB=通道B输出，OUTB=通道B输出&#xD;&#xA;3h：OUTA=通道B输出，OUTB=通道A输出" />
+        <Bit Name="CHB_INSEL" Authority="RW" Bits="13-12" Description="延时模块输入选择（S5、S4开关）。&#xD;&#xA;0h：PWMB作为上升沿和下降沿延时处理的输入信号&#xD;&#xA;1h：PWMC作为上升沿延时输入，PWMB作为下降沿延时输入&#xD;&#xA;2h：PWMB作为上升沿延时输入，PWMC作为下降沿延时输入&#xD;&#xA;3h：PWMC作为上升沿和下降沿延时处理的输入信号&#xD;&#xA;在经典死区控制模式下，上升沿延时和下降沿延时始终选择同一个输入信号进行处理。" />
+        <Bit Name="CHB_POLARITY" Authority="RW" Bits="11-10" Description="输出极性控制（S3、S2开关）。&#xD;&#xA;0h：通道A和通道B延时输出不反向&#xD;&#xA;1h：通道A的延时输出反向&#xD;&#xA;2h：通道B的延时输出反向&#xD;&#xA;3h：通道A和通道B延时输出全部反向" />
+        <Bit Name="CHB_OUTSEL" Authority="RW" Bits="9-8" Description="死区输出配置（S1、S0开关）。&#xD;&#xA;0h：禁止死区控制，PWMB和PWMC直接Bypass到斩波控制模块&#xD;&#xA;1h：关闭通道A的上升沿延时，使能通道B的下降沿延时&#xD;&#xA;2h：使能通道A的上升沿延时，关闭通道B的下降沿延时&#xD;&#xA;3h：使能通道A的上升沿延时，使能通道B的下降沿延时" />
+        <Bit Name="CHA_OUTSWAP" Authority="RW" Bits="7-6" Description="死区输出交换控制。&#xD;&#xA;0h：OUTA=通道A输出，OUTB=通道B输出&#xD;&#xA;1h：OUTA=通道B输出，OUTB=通道B输出&#xD;&#xA;2h：OUTA=通道A输出，OUTB=通道A输出&#xD;&#xA;3h：OUTA=通道B输出，OUTB=通道A输出" />
+        <Bit Name="CHA_INSEL" Authority="RW" Bits="5-4" Description="延时模块输入选择（S5、S4开关）。在经典死区控制模式下，上升沿延时和下降沿延时都选择同一个输入信号进行处理。&#xD;&#xA;0h：PWMA作为上升沿和下降沿延时处理的输入信号&#xD;&#xA;1h：PWMB作为上升沿延时输入，PWMA作为下降沿延时输入&#xD;&#xA;2h：PWMA作为上升沿延时输入，PWMB作为下降沿延时输入&#xD;&#xA;3h：PWMB作为上升沿和下降沿延时处理的输入信号" />
+        <Bit Name="CHA_POLARITY" Authority="RW" Bits="3-2" Description="输出极性控制（S3、S2开关）。&#xD;&#xA;0h：通道A和通道B延时输出不反向&#xD;&#xA;1h：通道A的延时输出反向&#xD;&#xA;2h：通道B的延时输出反向&#xD;&#xA;3h：通道A和通道B延时输出全部反向" />
+        <Bit Name="CHA_OUTSEL" Authority="RW" Bits="1-0" Description="死区输出配置（S1、S0开关）。&#xD;&#xA;0h：禁止死区控制，PWMA和PWMB直接Bypass到斩波控制模块&#xD;&#xA;1h：关闭通道A的上升沿延时，使能通道B的下降沿延时&#xD;&#xA;2h：使能通道A的上升沿延时，关闭通道B的下降沿延时&#xD;&#xA;3h：使能通道A的上升沿延时，使能通道B的下降沿延时" />
+      </Register>
+      <Register Name="DPSCR" Authority="RW" Address="0x4005906c" Width="32" Description="Dead-Band Delay Control Clock Prescaler">
+        <Bit Name="DPSC" Authority="RW" Bits="15-0" Description="时钟分频控制。&#xD;&#xA;DBCLK作为死区控制延时计数器的时钟，可以选择TCLK作为时钟源或者从HCLK分频得到。当DBCR[DCKSEL]选择HCLK的分频时，分频系数通过DPSC设置。&#xD;&#xA;DBCLK的频率：FDBCLK = FHCLK / (DPSC+1)" />
+      </Register>
+      <Register Name="DBDTR" Authority="RW" Address="0x40059070" Width="32" Description="Dead-Band Rising Edge Delay Time Regiser">
+        <Bit Name="DTR" Authority="RW" Bits="15-0" Description="上升沿延时数值&#xD;&#xA;TRED = DTR x TDBCLK" />
+      </Register>
+      <Register Name="DBDTF" Authority="RW" Address="0x40059074" Width="32" Description="Dead-Band Falling Edge Delay Time Regiser">
+        <Bit Name="DTF" Authority="RW" Bits="15-0" Description="下降沿延时数值&#xD;&#xA;TRED = DTF x TDBCLK" />
+      </Register>
+      <Register Name="CPCR" Authority="RW" Address="0x40059078" Width="32" Description="Chop Control Register">
+        <Bit Name="CHx_CPEN" Authority="RW" Bits="21-16" Description="斩波输出使能控制位。&#xD;&#xA;0b：禁止当前通道斩波输出&#xD;&#xA;1b：开启当前通道斩波输出" />
+        <Bit Name="CASEL" Authority="RW" Bits="15-14" Description="载波信号源选择控制位。&#xD;&#xA;0h：EPT内部产生载波&#xD;&#xA;1h：TIN的输入&#xD;&#xA;其他：保留" />
+        <Bit Name="CDUTY" Authority="RW" Bits="13-11" Description="载波的占空比设置。&#xD;&#xA;0h：禁止载波&#xD;&#xA;1h：Duty = 7/8&#xD;&#xA;2h：Duty = 6/8&#xD;&#xA;……..&#xD;&#xA;6h：Duty = 2/8&#xD;&#xA;7h：Duty = 1/8" />
+        <Bit Name="CDIV" Authority="RW" Bits="10-7" Description="载波频率设置。载波的频率设置基于PCLK的8倍分频进行设置。&#xD;&#xA;Fchop = PCLK / ((CDIV+1) x 8)" />
+        <Bit Name="OSPWTH" Authority="RW" Bits="6-2" Description="首脉冲宽度设置。首脉冲的宽度可以配置为载波周期的整数倍。当该控制位设为零时，所有脉冲宽度均由CDIV和CDUTY配置。&#xD;&#xA;Twidth = Tchop x OSPWTH （Tchop为一个载波的周期时间）" />
+      </Register>
+      <Register Name="EMSRC" Authority="RW" Address="0x4005907c" Width="32" Description="Emergency Condition Input Config Register1">
+        <Bit Name="EP7_SEL" Authority="RW" Bits="31-28" Description="" />
+        <Bit Name="EP6_SEL" Authority="RW" Bits="27-24" Description="" />
+        <Bit Name="EP5_SEL" Authority="RW" Bits="23-20" Description="" />
+        <Bit Name="EP4_SEL" Authority="RW" Bits="19-16" Description="" />
+        <Bit Name="EP3_SEL" Authority="RW" Bits="15-12" Description="" />
+        <Bit Name="EP2_SEL" Authority="RW" Bits="11-8" Description="" />
+        <Bit Name="EP1_SEL" Authority="RW" Bits="7-4" Description="" />
+        <Bit Name="EP0_SEL" Authority="RW" Bits="3-0" Description="" />
+      </Register>
+      <Register Name="EMSRC2" Authority="RW" Address="0x40059080" Width="32" Description="Emergency Condition Input Config Register2">
+        <Bit Name="ORL1_EP7" Authority="RW" Bits="23" Description="多路EP的逻辑OR输出作为EPx中的可选一路输入信号(ORL1)。&#xD;&#xA;0h：屏蔽当前EP通道作为OR输入&#xD;&#xA;1h：使能当前EP通道作为OR输入" />
+        <Bit Name="ORL1_EP6" Authority="RW" Bits="22" Description="" />
+        <Bit Name="ORL1_EP5" Authority="RW" Bits="21" Description="" />
+        <Bit Name="ORL1_EP4" Authority="RW" Bits="20" Description="" />
+        <Bit Name="ORL1_EP3" Authority="RW" Bits="19" Description="" />
+        <Bit Name="ORL1_EP2" Authority="RW" Bits="18" Description="" />
+        <Bit Name="ORL1_EP1" Authority="RW" Bits="17" Description="" />
+        <Bit Name="ORL1_EP0" Authority="RW" Bits="16" Description="" />
+        <Bit Name="FLT_PACE1" Authority="RW" Bits="15-12" Description="" />
+        <Bit Name="FLT_PACE0" Authority="RW" Bits="11-8" Description="EP4、EP5、EP6和EP7的数字去抖滤波检查周期数。&#xD;&#xA;0h：1个周期&#xD;&#xA;1h：2个周期&#xD;&#xA;2h：3个周期&#xD;&#xA;3h：4个周期" />
+        <Bit Name="ORL0_EP7" Authority="RW" Bits="7" Description="多路EP的逻辑OR输出作为EPx中的可选一路输入信号(ORL0)。&#xD;&#xA;0h：屏蔽当前EP通道作为OR输入&#xD;&#xA;1h：使能当前EP通道作为OR输入" />
+        <Bit Name="ORL0_EP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="ORL0_EP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="ORL0_EP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="ORL0_EP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="ORL0_EP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="ORL0_EP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="ORL0_EP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMPOL" Authority="RW" Address="0x40059084" Width="32" Description="Emergency Condition Input Poloarity Register">
+        <Bit Name="EBIx_POL(x=0~4)" Authority="RW" Bits="4-0" Description="EBIx的输入有效极性选择控制。&#xD;&#xA;0h：高电平有效&#xD;&#xA;1h：低电平有效&#xD;&#xA;&#xD;&#xA;当EBIx作为异常处理输入时，以电平方式工作。当EBIx作为事件触发源时，设置为高电压有效时，即上升沿触发；设置为低电平有效时，即下降沿触发。" />
+      </Register>
+      <Register Name="EMECR" Authority="RW" Address="0x40059088" Width="32" Description="Emergency Condition Enable Register">
+        <Bit Name="EOM_FAULT" Authority="RW" Bits="30" Description="外部晶振错误触发硬锁止控制位。（需要同时使能外部晶振监测功能）&#xD;&#xA;0h：禁止当前事件触发硬锁止&#xD;&#xA;1h：使能当前事件触发硬锁止" />
+        <Bit Name="MEM_FAULT" Authority="RW" Bits="29" Description="MEM错误触发硬锁止控制位。（需要同时使能SRAM或者Flash校验功能）&#xD;&#xA;0h：禁止当前事件触发硬锁止&#xD;&#xA;1h：使能当前事件触发硬锁止" />
+        <Bit Name="CPU_FAULT" Authority="RW" Bits="28" Description="CPU错误触发硬锁止控制位。&#xD;&#xA;0h：禁止当前事件触发硬锁止&#xD;&#xA;1h：使能当前事件触发硬锁止" />
+        <Bit Name="EMASYNC" Authority="RW" Bits="26" Description="EP端口同步设置控制位。&#xD;&#xA;0h：使能同步&#xD;&#xA;1h：禁止同步" />
+        <Bit Name="SLCLRMD" Authority="RW" Bits="25-24" Description="软锁止清除条件设置。当CNT值等于设置值，且软锁止不再触发时，硬件自动清除软锁止状态和标志位。&#xD;&#xA;00h：CNT = ZRO时，清除软锁止&#xD;&#xA;01h：CNT = PRD时，清除软锁止&#xD;&#xA;10h：CNT = ZRO或CNT = PRD时，清除软锁止&#xD;&#xA;11h：不自动清除软锁止，必须通过软件清除" />
+        <Bit Name="OSRLDMD" Authority="RW" Bits="23-22" Description="Shadow模式下，Active EMOSR从Shadow载入控制。&#xD;&#xA;00b：不进行载入&#xD;&#xA;01b：当CNT=ZRO时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;10b：当CNT=PRD时，Shadow寄存器载入到Active寄存器中&#xD;&#xA;11b：当CNT=ZRO或者PRD时，Shadow寄存器载入到Active寄存器中" />
+        <Bit Name="OSRSHDW" Authority="RW" Bits="21" Description="EMOSR寄存器的Shadow功能使能控制。&#xD;&#xA;0h：Immediate模式&#xD;&#xA;1h：Shadow模式" />
+        <Bit Name="EP7_LCKMD" Authority="RW" Bits="15-14" Description="EPx端触发锁止模式控制。&#xD;&#xA;0h：禁止当前EPx触发锁止&#xD;&#xA;1h：使能当前EPx触发软锁止&#xD;&#xA;2h：使能当前EPx触发硬锁止&#xD;&#xA;3h：禁止当前EPx触发锁止" />
+        <Bit Name="EP6_LCKMD" Authority="RW" Bits="13-12" Description="" />
+        <Bit Name="EP5_LCKMD" Authority="RW" Bits="11-10" Description="" />
+        <Bit Name="EP4_LCKMD" Authority="RW" Bits="9-8" Description="" />
+        <Bit Name="EP3_LCKMD" Authority="RW" Bits="7-6" Description="" />
+        <Bit Name="EP2_LCKMD" Authority="RW" Bits="5-4" Description="" />
+        <Bit Name="EP1_LCKMD" Authority="RW" Bits="3-2" Description="" />
+        <Bit Name="EP0_LCKMD" Authority="RW" Bits="1-0" Description="" />
+      </Register>
+      <Register Name="EMOSR" Authority="RW" Address="0x4005908c" Width="32" Description="Emergency Condition Output Status Set Register1">
+        <Bit Name="EM_COCY" Authority="RW" Bits="13-12" Description="当发生EP触发的软锁止或者硬锁止时，在CHCY通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+        <Bit Name="EM_COBY" Authority="RW" Bits="11-10" Description="当发生EP触发的软锁止或者硬锁止时，在CHBY通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+        <Bit Name="EM_COAY" Authority="RW" Bits="9-8" Description="当发生EP触发的软锁止或者硬锁止时，在CHAY通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+        <Bit Name="EM_COD" Authority="RW" Bits="7-6" Description="当发生EP触发的软锁止或者硬锁止时，在CHD通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+        <Bit Name="EM_COCX" Authority="RW" Bits="5-4" Description="当发生EP触发的软锁止或者硬锁止时，在CHCX通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+        <Bit Name="EM_COBX" Authority="RW" Bits="3-2" Description="当发生EP触发的软锁止或者硬锁止时，在CHBX通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+        <Bit Name="EM_COAX" Authority="RW" Bits="1-0" Description="当发生EP触发的软锁止或者硬锁止时，在CHAX通道上的输出状态设置。&#xD;&#xA;0h：高阻态&#xD;&#xA;1h：高电平&#xD;&#xA;2h：低电平&#xD;&#xA;3h：不做处理" />
+      </Register>
+      <Register Name="EMSLSR" Authority="RW" Address="0x40059094" Width="32" Description="Emergency Condition Soft-lock Status Register">
+        <Bit Name="EP7" Authority="RO" Bits="7" Description="EPx触发的软锁止状态标志。&#xD;&#xA;0h：软锁止未触发&#xD;&#xA;1h：软锁止已触发" />
+        <Bit Name="EP6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMSLCLR" Authority="RW" Address="0x40059098" Width="32" Description="Emergency Condition Soft-lock Clear Register">
+        <Bit Name="" Authority="" Bits="31-30" Description="" />
+        <Bit Name="EP7" Authority="RW" Bits="7" Description="软件清除EPx触发的软锁止状态标志。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="EP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMHLSR" Authority="RW" Address="0x4005909c" Width="32" Description="Emergency Condition Hard-lock Status Register">
+        <Bit Name="EOM_FAULT" Authority="RO" Bits="10" Description="EOM FAULT事件触发的硬锁止状态位。&#xD;&#xA;0h：硬锁止未触发&#xD;&#xA;1h：硬锁止已触发" />
+        <Bit Name="MEM_FAULT" Authority="RO" Bits="9" Description="MEM FAULT事件触发的硬锁止状态位。&#xD;&#xA;0h：硬锁止未触发&#xD;&#xA;1h：硬锁止已触发" />
+        <Bit Name="CPU_FAULT" Authority="RO" Bits="8" Description="CPU FAULT事件触发的硬锁止状态位。&#xD;&#xA;0h：硬锁止未触发&#xD;&#xA;1h：硬锁止已触发" />
+        <Bit Name="EP7" Authority="RO" Bits="7" Description="EPx触发的硬锁止状态标志。&#xD;&#xA;0h：硬锁止未触发&#xD;&#xA;1h：硬锁止已触发" />
+        <Bit Name="EP6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMHLCLR" Authority="RW" Address="0x400590a0" Width="32" Description="Emergency Condition Hard-lock Clear Register">
+        <Bit Name="" Authority="" Bits="31-30" Description="" />
+        <Bit Name="EOM_FAULT" Authority="RW" Bits="10" Description="软件清除EOM FAULT事件触发的硬锁止状态位。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="MEM_FAULT" Authority="RW" Bits="9" Description="软件清除MEM FAULT事件触发的硬锁止状态位。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="CPU_FAULT" Authority="RW" Bits="8" Description="软件清除CPU FAULT事件触发的硬锁止状态位。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="EP7" Authority="RW" Bits="7" Description="软件清除EPx触发的硬锁止状态标志。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="EP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMFRCR" Authority="RW" Address="0x400590a4" Width="32" Description="Emergency Condition Software Force Register">
+        <Bit Name="FRC_EP7" Authority="RW" Bits="7" Description="软件触发EPx事件。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：触发EPx事件，置高标志位" />
+        <Bit Name="FRC_EP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="FRC_EP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="FRC_EP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="FRC_EP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="FRC_EP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="FRC_EP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="FRC_EP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMRISR" Authority="RW" Address="0x400590a8" Width="32" Description="Emergency Condition Raw Interrupt Status Register">
+        <Bit Name="EOM_FAULT" Authority="RO" Bits="10" Description="EOM_FAULT事件触发的异常事件中断原始标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="MEM_FAULT" Authority="RO" Bits="9" Description="MEM_FAULT事件触发的异常事件中断原始标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="CPU_FAULT" Authority="RO" Bits="8" Description="CPU_FAULT事件触发的异常事件中断原始标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="EP7" Authority="RO" Bits="7" Description="EPx事件触发的异常事件中断原始标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="EP6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMMISR" Authority="RW" Address="0x400590ac" Width="32" Description="Emergency Condition Masked Interrupt Status Register">
+        <Bit Name="EOM_FAULT" Authority="RO" Bits="10" Description="EOM_FAULT事件触发的异常事件中断标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="MEM_FAULT" Authority="RO" Bits="9" Description="MEM_FAULT事件触发的异常事件中断标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="CPU_FAULT" Authority="RO" Bits="8" Description="CPU_FAULT事件触发的异常事件中断标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="EP7" Authority="RO" Bits="7" Description="EPx事件触发的异常事件中断标志位。&#xD;&#xA;0h：无中断请求发生&#xD;&#xA;1h：中断请求发生" />
+        <Bit Name="EP6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMIMCR" Authority="RW" Address="0x400590b0" Width="32" Description="Emergency Condition Interrupt Masking Control Register">
+        <Bit Name="EOM_FAULT" Authority="RW" Bits="10" Description="EOM FAULT事件触发的异常中断使能控制。&#xD;&#xA;0h：禁止对CPU发起中断请求&#xD;&#xA;1h：允许对CPU发起中断请求" />
+        <Bit Name="MEM_FAULT" Authority="RW" Bits="9" Description="MEM FAULT事件触发的异常中断使能控制。&#xD;&#xA;0h：禁止对CPU发起中断请求&#xD;&#xA;1h：允许对CPU发起中断请求" />
+        <Bit Name="CPU_FAULT" Authority="RW" Bits="8" Description="CPU FAULT事件触发的异常中断使能控制。&#xD;&#xA;0h：禁止对CPU发起中断请求&#xD;&#xA;1h：允许对CPU发起中断请求" />
+        <Bit Name="EP7" Authority="RW" Bits="7" Description="EPx事件触发的异常中断使能控制。&#xD;&#xA;0h：禁止对CPU发起中断请求&#xD;&#xA;1h：允许对CPU发起中断请求" />
+        <Bit Name="EP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="EMICR" Authority="RW" Address="0x400590b4" Width="32" Description="Emergency Condition Interrupt Clear Register">
+        <Bit Name="EOM_FAULT" Authority="RW" Bits="10" Description="软件清除EOM FAULT事件触发的中断标志。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="MEM_FAULT" Authority="RW" Bits="9" Description="软件清除MEM FAULT事件触发的中断标志。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="CPU_FAULT" Authority="RW" Bits="8" Description="软件清除CPU FAULT事件触发的中断标志。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="EP7" Authority="RW" Bits="7" Description="软件清除EPx事件触发的中断标志。&#xD;&#xA;0h：对当前控制位写‘0’无效，读取时总返回‘0’&#xD;&#xA;1h：清除当前标志位" />
+        <Bit Name="EP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="EP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="EP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="EP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="EP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="EP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="EP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="TRGFTCR" Authority="RW" Address="0x400590b8" Width="32" Description="Digital Compare Filter Control Register">
+        <Bit Name="CROSSMD" Authority="RW" Bits="7" Description="允许滤波窗跨越窗口对齐点。&#xD;&#xA;缺省条件下，当滤波窗在Align条件满足时若任然有效，将跨过窗口对齐点，一直持续到窗口计数器溢出。当禁止跨周期时，在Align条件满足时，窗口计数器将被停止。&#xD;&#xA;0h：禁止对齐点跨窗口&#xD;&#xA;1h：允许对齐点跨窗口" />
+        <Bit Name="ALIGNMD" Authority="RW" Bits="6-5" Description="窗口对齐模式选择。当对齐模式条件满足时，OFFSET将被重置；但窗口宽度将根据CORSSMD设置进行调整。&#xD;&#xA;0h：CNT=ZRO&#xD;&#xA;1h：CNT=PRD&#xD;&#xA;2h：CNT=PRD or CNT=ZRO&#xD;&#xA;3h：T1事件" />
+        <Bit Name="BLKINV" Authority="RW" Bits="4" Description="窗口使能反转控制。&#xD;&#xA;0h：窗口不反转，窗口有效区间禁止滤波输入&#xD;&#xA;1h：窗口反转，窗口有效区间使能滤波输入" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="2-0" Description="滤波模块的输入信号选择。&#xD;&#xA;0h：禁止滤波&#xD;&#xA;1h：使能SYNCIN0滤波&#xD;&#xA;2h：使能SYNCIN1滤波&#xD;&#xA;3h：使能SYNCIN2滤波&#xD;&#xA;4h：使能SYNCIN3滤波&#xD;&#xA;5h：使能SYNCIN4滤波&#xD;&#xA;6h：使能SYNCIN5滤波&#xD;&#xA;7h：保留" />
+      </Register>
+      <Register Name="TRGFTWR" Authority="RW" Address="0x400590bc" Width="32" Description="Digital Compare Filter Window Register">
+        <Bit Name="WINDOW" Authority="RW" Bits="31-16" Description="滤波窗的宽度设置。&#xD;&#xA;此16bit控制位定义了滤波窗的宽度，窗口宽度是基于TCLK的计数值。当OFFSET计数器溢出时，WINDOW计数器被重置，并开始计数直到溢出。当OFFSET计数器溢出，但WINDOW状态已经激活时，WINDOW计数器不会重置。在应用时必须注意此条件的设置。" />
+        <Bit Name="OFFSET" Authority="RW" Bits="15-0" Description="滤波窗的OFFSET设置。&#xD;&#xA;此16bit控制位定义了从窗口参考起始位置开始计数多少个TCLK后，开始有效的滤波窗口。参考位置的定义，在TRGFTCR[ALIGNMD]控制位中进行选择。OFFSET的Shadow寄存器在ALIGNMD指定的条件满足时，载入到Active寄存器中，并重新开始计数。" />
+      </Register>
+      <Register Name="EVTRG" Authority="RW" Address="0x400590c0" Width="32" Description="Event Generation Control Register">
+        <Bit Name="CNT3INITFRC" Authority="RW" Bits="27" Description="TRGEV3CNT软件触发更新&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVCNT3INIT内容更新到EVCNT3中" />
+        <Bit Name="CNT2INITFRC" Authority="RW" Bits="26" Description="TRGEV2CNT软件触发更新&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVCNT2INIT内容更新到EVCNT2中" />
+        <Bit Name="CNT1INITFRC" Authority="RW" Bits="25" Description="TRGEV1CNT软件触发更新&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVCNT1INIT内容更新到EVCNT1中" />
+        <Bit Name="CNT0INITFRC" Authority="RW" Bits="24" Description="TRGEV0CNT软件触发更新&#xD;&#xA;0h：无效&#xD;&#xA;1h：EVCNT0INIT内容更新到EVCNT0中" />
+        <Bit Name="TRG3OE" Authority="RW" Bits="23" Description="外部触发端口TRGOUT3使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG2OE" Authority="RW" Bits="22" Description="外部触发端口TRGOUT2使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG1OE" Authority="RW" Bits="21" Description="外部触发端口TRGOUT1使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG0OE" Authority="RW" Bits="20" Description="外部触发端口TRGOUT0使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="CNT3INITEN" Authority="RW" Bits="19" Description="TRGEV3CNT寄存器更新模式控制&#xD;&#xA;0h：无效&#xD;&#xA;1h：TRGEV3CNT在发生LOAD事件触发时，或者EV3CNTINITFRC控制位软件写入‘1’时，EV3CNTINIT的内容更新到EV3CNT中。" />
+        <Bit Name="CNT2INITEN" Authority="RW" Bits="18" Description="TRGEV2CNT寄存器更新模式控制&#xD;&#xA;0h：无效&#xD;&#xA;1h：TRGEV2CNT在发生LOAD事件触发时，或者EV2CNTINITFRC控制位软件写入‘1’时，EV2CNTINIT的内容更新到EV2CNT中。" />
+        <Bit Name="CNT1INITEN" Authority="RW" Bits="17" Description="TRGEV1CNT寄存器更新模式控制&#xD;&#xA;0h：无效&#xD;&#xA;1h：TRGEV1CNT在发生LOAD事件触发时，或者EV1CNTINITFRC控制位软件写入‘1’时，EV1CNTINIT的内容更新到EV1CNT中。" />
+        <Bit Name="CNT0INITEN" Authority="RW" Bits="16" Description="TRGEV0CNT寄存器更新模式控制&#xD;&#xA;0h：无效&#xD;&#xA;1h：TRGEV0CNT在发生LOAD事件触发时，或者EV0CNTINITFRC控制位软件写入‘1’时，EV0CNTINIT的内容更新到EV0CNT中。" />
+        <Bit Name="TRG3SEL" Authority="RW" Bits="15-12" Description="TRGEV3事件的触发源选择。&#xD;&#xA;0000：禁止TRGSRC触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGx事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGx事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGx事件&#xD;&#xA;0100：当 CNT = CMPA 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0101：当 CNT = CMPA 且计数方向为递减时，产生TRGx事件&#xD;&#xA;0110：当 CNT = CMPB 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0111：当 CNT = CMPB 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1000：当 CNT = CMPC 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1001：当 CNT = CMPC 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1010：当 CNT = CMPD 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1011：当 CNT = CMPD 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1100：Period End&#xD;&#xA;1101：PE0 event&#xD;&#xA;1110：PE1 event&#xD;&#xA;1111：PE2 event" />
+        <Bit Name="TRG2SEL" Authority="RW" Bits="11-8" Description="TRGEV2事件的触发源选择。&#xD;&#xA;0000：禁止TRGSRC触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGx事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGx事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGx事件&#xD;&#xA;0100：当 CNT = CMPA 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0101：当 CNT = CMPA 且计数方向为递减时，产生TRGx事件&#xD;&#xA;0110：当 CNT = CMPB 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0111：当 CNT = CMPB 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1000：当 CNT = CMPC 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1001：当 CNT = CMPC 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1010：当 CNT = CMPD 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1011：当 CNT = CMPD 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1100：Period End&#xD;&#xA;1101：PE0 event&#xD;&#xA;1110：PE1 event&#xD;&#xA;1111：PE2 event" />
+        <Bit Name="TRG1SEL" Authority="RW" Bits="7-4" Description="TRGEV1事件的触发源选择。&#xD;&#xA;0000：禁止TRGSRC触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGx事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGx事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGx事件&#xD;&#xA;0100：当 CNT = CMPA 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0101：当 CNT = CMPA 且计数方向为递减时，产生TRGx事件&#xD;&#xA;0110：当 CNT = CMPB 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0111：当 CNT = CMPB 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1000：当 CNT = CMPC 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1001：当 CNT = CMPC 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1010：当 CNT = CMPD 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1011：当 CNT = CMPD 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1100：ExtSync通道&#xD;&#xA;1101：PE0 event&#xD;&#xA;1110：PE1 event&#xD;&#xA;1111：PE2 event" />
+        <Bit Name="TRG0SEL" Authority="RW" Bits="3-0" Description="TRGEV0事件的触发源选择。&#xD;&#xA;0000：禁止TRGSRC触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGx事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGx事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGx事件&#xD;&#xA;0100：当 CNT = CMPA 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0101：当 CNT = CMPA 且计数方向为递减时，产生TRGx事件&#xD;&#xA;0110：当 CNT = CMPB 且计数方向为递增时，产生TRGx事件&#xD;&#xA;0111：当 CNT = CMPB 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1000：当 CNT = CMPC 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1001：当 CNT = CMPC 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1010：当 CNT = CMPD 且计数方向为递增时，产生TRGx事件&#xD;&#xA;1011：当 CNT = CMPD 且计数方向为递减时，产生TRGx事件&#xD;&#xA;1100：ExtSync通道&#xD;&#xA;1101：PE0 event&#xD;&#xA;1110：PE1 event&#xD;&#xA;1111：PE2 event" />
+      </Register>
+      <Register Name="EVPS" Authority="RW" Address="0x400590c4" Width="32" Description="Event Counter Prescaler">
+        <Bit Name="TRGEV3CNT" Authority="RO" Bits="31-28" Description="TRGEV3事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。" />
+        <Bit Name="TRGEV2CNT" Authority="RO" Bits="27-24" Description="TRGEV2事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。" />
+        <Bit Name="TRGEV1CNT" Authority="RO" Bits="23-20" Description="TRGEV1事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。" />
+        <Bit Name="TRGEV0CNT" Authority="RO" Bits="19-16" Description="TRGEV0事件计数器值。&#xD;&#xA;读取时，返回当前事件计数器值。" />
+        <Bit Name="TRGEV3PRD" Authority="RW" Bits="15-12" Description="TRGEV3事件计数的周期设置。&#xD;&#xA;当TRGEV3事件发生次数满足周期时，才产生TRGEV3触发事件" />
+        <Bit Name="TRGEV2PRD" Authority="RW" Bits="11-8" Description="TRGEV2事件计数的周期设置。&#xD;&#xA;当TRGEV2事件发生次数满足周期时，才产生TRGEV2触发事件" />
+        <Bit Name="TRGEV1PRD" Authority="RW" Bits="7-4" Description="TRGEV1事件计数的周期设置。&#xD;&#xA;当TRGEV1事件发生次数满足周期时，才产生TRGEV1触发事件" />
+        <Bit Name="TRGEV0PRD" Authority="RW" Bits="3-0" Description="TRGEV0事件计数的周期设置。&#xD;&#xA;当TRGEV0事件发生次数满足周期时，才产生TRGEV0触发事件" />
+      </Register>
+      <Register Name="EVCNTINIT" Authority="RW" Address="0x400590c8" Width="32" Description="Event Counter Initial Value">
+        <Bit Name="CNT3INIT" Authority="RW" Bits="15-12" Description="TRGEV3CNT计数器的初始化值设置。&#xD;&#xA;当EVTRG[CNT3INITEN]控制位有效时，CNT3INIT的值将在触发条件满足时(LOAD事件)，或EVTRG[CNT3INITFRC]软件置位时，被载入到TRGEV3CNT寄存器中。" />
+        <Bit Name="CNT2INIT" Authority="RW" Bits="11-8" Description="TRGEV2CNT计数器的初始化值设置。&#xD;&#xA;当EVTRG[CNT2INITEN]控制位有效时，CNT2INIT的值将在触发条件满足时(LOAD事件)，或EVTRG[CNT2INITFRC]软件置位时，被载入到TRGEV2CNT寄存器中。" />
+        <Bit Name="CNT1INIT" Authority="RW" Bits="7-4" Description="TRGEV1CNT计数器的初始化值设置。&#xD;&#xA;当EVTRG[CNT1INITEN]控制位有效时，CNT1INIT的值将在触发条件满足时(LOAD事件)，或EVTRG[CNT1INITFRC]软件置位时，被载入到TRGEV1CNT寄存器中。" />
+        <Bit Name="CNT0INIT" Authority="RW" Bits="3-0" Description="TRGEV0CNT计数器的初始化值设置。&#xD;&#xA;当EVTRG[CNT0INITEN]控制位有效时，CNT0INIT的值将在触发条件满足时(LOAD事件)，或EVTRG[CNT0INITFRC]软件置位时，被载入到TRGEV0CNT寄存器中。" />
+      </Register>
+      <Register Name="EVSWF" Authority="RW" Address="0x400590cc" Width="32" Description="Event Counter Software Trigger Register">
+        <Bit Name="EV3SWF" Authority="RW" Bits="3" Description="软件产生一次EV3的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV2SWF" Authority="RW" Bits="2" Description="软件产生一次EV2的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV1SWF" Authority="RW" Bits="1" Description="软件产生一次EV1的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV0SWF" Authority="RW" Bits="0" Description="软件产生一次EV0的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+      </Register>
+      <Register Name="RISR" Authority="RW" Address="0x400590d0" Width="32" Description="Raw Interrupt Status Register">
+        <Bit Name="PEND" Authority="RO" Bits="16" Description="周期结束中断请求原始标志状态" />
+        <Bit Name="CDD" Authority="RO" Bits="15" Description="递减阶段CNT = CMPD中断请求原始标志状态" />
+        <Bit Name="CDU" Authority="RO" Bits="14" Description="递增阶段CNT = CMPD中断请求原始标志状态" />
+        <Bit Name="CCD" Authority="RO" Bits="13" Description="递减阶段CNT = CMPC中断请求原始标志状态" />
+        <Bit Name="CCU" Authority="RO" Bits="12" Description="递增阶段CNT = CMPC中断请求原始标志状态" />
+        <Bit Name="CBD" Authority="RO" Bits="11" Description="递减阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CBU" Authority="RO" Bits="10" Description="递增阶段CNT = CMPB中断请求原始标志状态" />
+        <Bit Name="CAD" Authority="RO" Bits="9" Description="递减阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAU" Authority="RO" Bits="8" Description="递增阶段CNT = CMPA中断请求原始标志状态" />
+        <Bit Name="CAP_LD3" Authority="RO" Bits="7" Description="Capture Load to CMPD中断请求原始标志状态" />
+        <Bit Name="CAP_LD2" Authority="RO" Bits="6" Description="Capture Load to CMPC中断请求原始标志状态" />
+        <Bit Name="CAP_LD1" Authority="RO" Bits="5" Description="Capture Load to CMPB中断请求原始标志状态" />
+        <Bit Name="CAP_LD0" Authority="RO" Bits="4" Description="Capture Load to CMPA中断请求原始标志状态" />
+        <Bit Name="TRGEV3" Authority="RO" Bits="3" Description="TRGEV3中断请求原始标志状态" />
+        <Bit Name="TRGEV2" Authority="RO" Bits="2" Description="TRGEV2中断请求原始标志状态" />
+        <Bit Name="TRGEV1" Authority="RO" Bits="1" Description="TRGEV1中断请求原始标志状态" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="0" Description="TRGEV0中断请求原始标志状态" />
+      </Register>
+      <Register Name="MISR" Authority="RW" Address="0x400590d4" Width="32" Description="Masked Interrupt Status Register">
+        <Bit Name="PEND" Authority="RO" Bits="16" Description="周期结束中断请求标志状态" />
+        <Bit Name="CDD" Authority="RO" Bits="15" Description="递减阶段CNT = CMPD中断请求标志状态" />
+        <Bit Name="CDU" Authority="RO" Bits="14" Description="递增阶段CNT = CMPD中断请求标志状态" />
+        <Bit Name="CCD" Authority="RO" Bits="13" Description="递减阶段CNT = CMPC中断请求标志状态" />
+        <Bit Name="CCU" Authority="RO" Bits="12" Description="递增阶段CNT = CMPC中断请求标志状态" />
+        <Bit Name="CBD" Authority="RO" Bits="11" Description="递减阶段CNT = CMPB中断请求标志状态" />
+        <Bit Name="CBU" Authority="RO" Bits="10" Description="递增阶段CNT = CMPB中断请求标志状态" />
+        <Bit Name="CAD" Authority="RO" Bits="9" Description="递减阶段CNT = CMPA中断请求标志状态" />
+        <Bit Name="CAU" Authority="RO" Bits="8" Description="递增阶段CNT = CMPA中断请求标志状态" />
+        <Bit Name="CAP_LD3" Authority="RO" Bits="7" Description="Capture Load to CMPD中断请求标志状态" />
+        <Bit Name="CAP_LD2" Authority="RO" Bits="6" Description="Capture Load to CMPC中断请求标志状态" />
+        <Bit Name="CAP_LD1" Authority="RO" Bits="5" Description="Capture Load to CMPB中断请求标志状态" />
+        <Bit Name="CAP_LD0" Authority="RO" Bits="4" Description="Capture Load to CMPA中断请求标志状态" />
+        <Bit Name="TRGEV3" Authority="RO" Bits="3" Description="TRGEV3中断请求标志状态" />
+        <Bit Name="TRGEV2" Authority="RO" Bits="2" Description="TRGEV2中断请求标志状态" />
+        <Bit Name="TRGEV1" Authority="RO" Bits="1" Description="TRGEV1中断请求标志状态" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="0" Description="TRGEV0中断请求标志状态" />
+      </Register>
+      <Register Name="IMCR" Authority="RW" Address="0x400590d8" Width="32" Description="Interrupt Masking Control Register">
+        <Bit Name="PEND" Authority="RW" Bits="16" Description="周期结束中断中断使能控制位。" />
+        <Bit Name="CDD" Authority="RW" Bits="15" Description="递减阶段CNT = CMPD中断使能控制位。" />
+        <Bit Name="CDU" Authority="RW" Bits="14" Description="递增阶段CNT = CMPD中断使能控制位。" />
+        <Bit Name="CCD" Authority="RW" Bits="13" Description="递减阶段CNT = CMPC中断使能控制位。" />
+        <Bit Name="CCU" Authority="RW" Bits="12" Description="递增阶段CNT = CMPC中断使能控制位。" />
+        <Bit Name="CBD" Authority="RW" Bits="11" Description="递减阶段CNT = CMPB中断使能控制位。" />
+        <Bit Name="CBU" Authority="RW" Bits="10" Description="递增阶段CNT = CMPB中断使能控制位。" />
+        <Bit Name="CAD" Authority="RW" Bits="9" Description="递减阶段CNT = CMPA中断使能控制位。" />
+        <Bit Name="CAU" Authority="RW" Bits="8" Description="递增阶段CNT = CMPA中断使能控制位。" />
+        <Bit Name="CAP_LD3" Authority="RW" Bits="7" Description="Capture Load to CMPD中断使能控制位。" />
+        <Bit Name="CAP_LD2" Authority="RW" Bits="6" Description="Capture Load to CMPC中断使能控制位。" />
+        <Bit Name="CAP_LD1" Authority="RW" Bits="5" Description="Capture Load to CMPB中断使能控制位。" />
+        <Bit Name="CAP_LD0" Authority="RW" Bits="4" Description="Capture Load to CMPA中断使能控制位。" />
+        <Bit Name="TRGEV3" Authority="RW" Bits="3" Description="TRGEV3中断使能控制位。" />
+        <Bit Name="TRGEV2" Authority="RW" Bits="2" Description="TRGEV2中断使能控制位。" />
+        <Bit Name="TRGEV1" Authority="RW" Bits="1" Description="TRGEV1中断使能控制位。" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="TRGEV0中断使能控制位。" />
+      </Register>
+      <Register Name="ICR" Authority="RW" Address="0x400590dc" Width="32" Description="Interrupt Clear Register">
+        <Bit Name="PEND" Authority="RO" Bits="16" Description="周期结束中断中断清除。" />
+        <Bit Name="CDD" Authority="RO" Bits="15" Description="递减阶段CNT = CMPD中断清除。" />
+        <Bit Name="CDU" Authority="RO" Bits="14" Description="递增阶段CNT = CMPD中断清除。" />
+        <Bit Name="CCD" Authority="RO" Bits="13" Description="递减阶段CNT = CMPC中断清除。" />
+        <Bit Name="CCU" Authority="RO" Bits="12" Description="递增阶段CNT = CMPC中断清除。" />
+        <Bit Name="CBD" Authority="RO" Bits="11" Description="递减阶段CNT = CMPB中断清除。" />
+        <Bit Name="CBU" Authority="RO" Bits="10" Description="递增阶段CNT = CMPB中断清除。" />
+        <Bit Name="CAD" Authority="RO" Bits="9" Description="递减阶段CNT = CMPA中断清除。" />
+        <Bit Name="CAU" Authority="RO" Bits="8" Description="递增阶段CNT = CMPA中断清除。" />
+        <Bit Name="CAP_LD3" Authority="RO" Bits="7" Description="Capture Load to CMPD中断清除。" />
+        <Bit Name="CAP_LD2" Authority="RO" Bits="6" Description="Capture Load to CMPC中断清除。" />
+        <Bit Name="CAP_LD1" Authority="RO" Bits="5" Description="Capture Load to CMPB中断清除。" />
+        <Bit Name="CAP_LD0" Authority="RO" Bits="4" Description="Capture Load to CMPA中断清除。" />
+        <Bit Name="TRGEV3" Authority="RO" Bits="3" Description="TRGEV3中断清除。" />
+        <Bit Name="TRGEV2" Authority="RO" Bits="2" Description="TRGEV2中断清除。" />
+        <Bit Name="TRGEV1" Authority="RO" Bits="1" Description="TRGEV1中断清除。" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="0" Description="TRGEV0中断清除。" />
+      </Register>
+      <Register Name="PROT" Authority="RW" Address="0x400590e8" Width="32" Description="Protection Register">
+        <Bit Name="WRKEY" Authority="RW" Bits="31-16" Description="写入保护KEY&#xD;&#xA;当对PROTKEY进行写操作时，必须将KEY设置为A55Ah，否则写入无效。" />
+        <Bit Name="PROTKEY" Authority="RW" Bits="15-0" Description="写保护使能控制。&#xD;&#xA;当此寄存器的值不等于C73Ah时，具有写保护功能的寄存器(参看寄存器表)将禁止写入操作。只有解锁后，具有写保护功能的寄存器才允许写操作。对于具有写保护寄存器的写操作完成后，写保护寄存器会自动清除（自动保护使能），所以每次对任意具有写保护功能的寄存器写入之前，都必须进行解锁操作。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="RTC">
+      <Register Name="RTC_TIMR" Authority="RW" Address="0x40060000" Width="32" Description="时间控制寄存器">
+        <Bit Name="PM" Authority="RW" Bits="22" Description="AM或PM标志。&#xD;&#xA;0h：AM 或 24小时格式。&#xD;&#xA;1h：PM。" />
+        <Bit Name="HORT" Authority="RW" Bits="21-20" Description="BCD格式中，小时单位的十位数配置。" />
+        <Bit Name="HORU" Authority="RW" Bits="19-16" Description="BCD格式中，小时单位的个位数配置。" />
+        <Bit Name="MINT" Authority="RW" Bits="14-12" Description="BCD格式中，分钟单位的十位数配置。" />
+        <Bit Name="MINU" Authority="RW" Bits="11-8" Description="BCD格式中，分钟单位的个位数配置。" />
+        <Bit Name="SECT" Authority="RW" Bits="6-4" Description="BCD格式中，秒单位的十位数配置。" />
+        <Bit Name="SECU" Authority="RW" Bits="3-0" Description="BCD格式中，秒单位的个位数配置。" />
+      </Register>
+      <Register Name="RTC_DATR" Authority="RW" Address="0x40060004" Width="32" Description="日期控制寄存器">
+        <Bit Name="WKD" Authority="RW" Bits="26-24" Description="一周中星期的配置。&#xD;&#xA;0h：RSVD。&#xD;&#xA;1h：星期一。&#xD;&#xA;2h：星期二。&#xD;&#xA;3h：星期三。&#xD;&#xA;4h：星期四。&#xD;&#xA;5h：星期五。&#xD;&#xA;6h：星期六。&#xD;&#xA;7h：星期日。" />
+        <Bit Name="YEAT" Authority="RW" Bits="23-20" Description="BCD格式中，年单位的十位数配置。" />
+        <Bit Name="YEAU" Authority="RW" Bits="19-16" Description="BCD格式中，年单位的个位数配置。" />
+        <Bit Name="MONT" Authority="RW" Bits="12" Description="BCD格式中，月单位的十位数配置。" />
+        <Bit Name="MONU" Authority="RW" Bits="11-8" Description="BCD格式中，月单位的个位数配置。" />
+        <Bit Name="DAYT" Authority="RW" Bits="5-4" Description="BCD格式中，日单位的十位数配置。" />
+        <Bit Name="DAYU" Authority="RW" Bits="3-0" Description="BCD格式中，日单位的个位数配置。" />
+      </Register>
+      <Register Name="RTC_CR" Authority="RW" Address="0x40060008" Width="32" Description="通用控制寄存器">
+        <Bit Name="TKEYTRG" Authority="RW" Bits="18-17" Description="RTC触发TOUCH扫描控制。&#xD;&#xA;0h：禁止触发输出。&#xD;&#xA;1h：由CPRD事件进行触发。&#xD;&#xA;2h：由RTC_CLK触发。&#xD;&#xA;3h：由RTC_CLK的2分频触发。" />
+        <Bit Name="RBEN" Authority="RW" Bits="16" Description="TIMR和DATR回读控制。只有在回读使能时，RTC的状态可以被更新到TIMR和DATR中。关闭回读可以降低功耗。&#xD;&#xA;0h：回读禁止。&#xD;&#xA;1h：回读使能。" />
+        <Bit Name="CPRD" Authority="RW" Bits="15-13" Description="周期事件选择。该配置适用RTC_CLK设置为2Hz情况，当RTC_CLK不为2Hz时，需要用户自己根据比例进行换算。&#xD;&#xA;0h：禁止周期事件。&#xD;&#xA;1h：每0.5秒发生一次。&#xD;&#xA;2h：每秒发生一次。&#xD;&#xA;3h：每分钟发生一次（在秒为0的时候）。&#xD;&#xA;4h：每小时发生一次（在秒和分钟为0的时候）。&#xD;&#xA;5h：每天发生一次（在秒、分钟和小时为0的时候）。&#xD;&#xA;6h：每月发生一次（每个月的第一天）。&#xD;&#xA;其他：保留。" />
+        <Bit Name="OSEL" Authority="RW" Bits="12-10" Description="RTC_ALM管脚输出信号选择。&#xD;&#xA;0h：闹钟A的脉冲输出。&#xD;&#xA;1h：闹钟A触发输出高。&#xD;&#xA;2h：闹钟A触发输出低。&#xD;&#xA;4h：闹钟B的脉冲输出。&#xD;&#xA;5h：闹钟B触发输出高。&#xD;&#xA;6h：闹钟B触发输出低。&#xD;&#xA;其他：保留。" />
+        <Bit Name="FMT" Authority="RW" Bits="5" Description="计时模式设置。&#xD;&#xA;0h：24小时制。&#xD;&#xA;1h：12小时制(AM/PM)。" />
+        <Bit Name="ALRAE" Authority="RW" Bits="3" Description="闹钟A使能控制。&#xD;&#xA;0h：关闭闹钟A。&#xD;&#xA;1h：打开闹钟A。" />
+        <Bit Name="UPD_BSY" Authority="RO" Bits="1" Description="更新状态查询寄存器。当RTC处于Free Running模式下，对于CR寄存器的修改，需要查询UPD_BSY以确认更新完成。&#xD;&#xA;0h：更新完成。&#xD;&#xA;1h：更新正在进行。" />
+        <Bit Name="INIT" Authority="RW" Bits="0" Description="初始化控制位。&#xD;&#xA;0h：设置RTC到Free Running模式。在此模式下，TIMR和DATR不能修改。&#xD;&#xA;1h：设置RTC到初始化模式。该模式下，RTC停止工作，TIMR和DATR可以通过软件修改。" />
+      </Register>
+      <Register Name="RTC_CCR" Authority="RW" Address="0x4006000c" Width="32" Description="时钟控制寄存器">
+        <Bit Name="CLKEN" Authority="RW" Bits="27" Description="时钟使能控制。&#xD;&#xA;0h：RTC_CLK关闭。&#xD;&#xA;1h：RTC_CLK打开。" />
+        <Bit Name="RTCCK_ST" Authority="RW" Bits="26" Description="时钟稳定状态查询。&#xD;&#xA;0h：RTC_CLK时钟未稳定。&#xD;&#xA;1h：RTC_CLK时钟已稳定。" />
+        <Bit Name="CLKSRC" Authority="RW" Bits="25-24" Description="RTC时钟源选择。&#xD;&#xA;0h：ISOSC。&#xD;&#xA;1h：IMOSC/4。&#xD;&#xA;2h：EMOSC。&#xD;&#xA;3h：EMOSC/4。" />
+        <Bit Name="DBGEN" Authority="RW" Bits="23" Description="RTC在调试挂起时是否继续工作。&#xD;&#xA;0h：保持RTC一直工作。&#xD;&#xA;1h：调试挂起时，RTC自动暂停。" />
+        <Bit Name="DIVA" Authority="RW" Bits="22-16" Description="异步分频器分频设置。" />
+        <Bit Name="DIVS" Authority="RW" Bits="14-0" Description="同步分频器分频设置。" />
+      </Register>
+      <Register Name="RTC_ALRA" Authority="RW" Address="0x40060010" Width="32" Description="闹钟A设置寄存器">
+        <Bit Name="DMSK" Authority="RW" Bits="31" Description="屏蔽日的闹钟控制。&#xD;&#xA;0h：打开日单位的比较。&#xD;&#xA;1h：关闭日单位的比较。" />
+        <Bit Name="WDSEL" Authority="RW" Bits="30" Description="星期/日闹钟选择控制。&#xD;&#xA;0h：根据DAYT/DAYU的设置日期比较闹钟。&#xD;&#xA;1h：根据DAYU设置的星期比较闹钟。" />
+        <Bit Name="DAYT" Authority="RW" Bits="29-28" Description="BCD格式中，天的十位数配置。" />
+        <Bit Name="DAYU" Authority="RW" Bits="27-24" Description="BCD格式中，天的个位数配置。" />
+        <Bit Name="HMSK" Authority="RW" Bits="23" Description="屏蔽小时闹钟控制。&#xD;&#xA;0h：打开小时单位的比较。&#xD;&#xA;1h：关闭小时单位的比较。" />
+        <Bit Name="PM" Authority="RW" Bits="22" Description="AM/PM控制。24小时制下，该位控制无效。&#xD;&#xA;0h：AM。&#xD;&#xA;1h：PM。" />
+        <Bit Name="HORT" Authority="RW" Bits="21-20" Description="BCD格式中，小时单位的十位数配置。" />
+        <Bit Name="HORU" Authority="RW" Bits="19-16" Description="BCD格式中，小时单位的个位数配置。" />
+        <Bit Name="MMSK" Authority="RW" Bits="15" Description="屏蔽分钟闹钟控制。&#xD;&#xA;0h：打开分钟单位的比较。&#xD;&#xA;1h：关闭分钟单位的比较。" />
+        <Bit Name="MINT" Authority="RW" Bits="14-12" Description="BCD格式中，分钟单位的十位数配置。" />
+        <Bit Name="MINU" Authority="RW" Bits="11-8" Description="BCD格式中，分钟单位的个位数配置。" />
+        <Bit Name="SMSK" Authority="RW" Bits="7" Description="屏蔽秒闹钟控制。&#xD;&#xA;0h：打开秒单位的比较。&#xD;&#xA;1h：关闭秒单位的比较。" />
+        <Bit Name="SECT" Authority="RW" Bits="6-4" Description="BCD格式中，秒单位的十位数配置。" />
+        <Bit Name="SECU" Authority="RW" Bits="3-0" Description="BCD格式中，秒单位的个位数配置。" />
+      </Register>
+      <Register Name="RTC_SSR" Authority="RW" Address="0x40060018" Width="32" Description="毫秒计数器">
+        <Bit Name="SSR" Authority="RW" Bits="16-0" Description="毫秒计数器值。返回当前RTC的毫秒单位计数值。&#xD;&#xA;Bit[16:7]为毫秒值。bit[6:0]为微秒值，每个Step为8uS。&#xD;&#xA;以上计时均在RTC_CLK为2Hz条件下获得。" />
+      </Register>
+      <Register Name="RTC_RISR" Authority="RW" Address="0x40060020" Width="32" Description="中断原始状态标志寄存器">
+        <Bit Name="TRGEV1" Authority="RO" Bits="4" Description="同步触发事件1的原始中断标志位。" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="3" Description="同步触发事件0的原始中断标志位。" />
+        <Bit Name="CPRD" Authority="RO" Bits="2" Description="CPRD的原始中断标志位。" />
+        <Bit Name="ALRA" Authority="RO" Bits="0" Description="闹钟A的原始中断标志位。" />
+      </Register>
+      <Register Name="RTC_IMCR" Authority="RW" Address="0x40060024" Width="32" Description="中断使能控制寄存器">
+        <Bit Name="TRGEV1" Authority="RW" Bits="4" Description="同步触发事件1的中断使能控制。&#xD;&#xA;0h：关闭中断。&#xD;&#xA;1h：打开中断。" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="3" Description="同步触发事件0的中断使能控制。&#xD;&#xA;0h：关闭中断。&#xD;&#xA;1h：打开中断。" />
+        <Bit Name="CPRD" Authority="RW" Bits="2" Description="CPRD的中断使能控制。&#xD;&#xA;0h：关闭中断。&#xD;&#xA;1h：打开中断。" />
+        <Bit Name="ALRA" Authority="RW" Bits="0" Description="闹钟A的中断使能控制。&#xD;&#xA;0h：关闭中断。&#xD;&#xA;1h：打开中断。" />
+      </Register>
+      <Register Name="RTC_MISR" Authority="RW" Address="0x40060028" Width="32" Description="中断状态标志寄存器">
+        <Bit Name="TRGEV1" Authority="RO" Bits="4" Description="同步触发事件1的中断标志位。" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="3" Description="同步触发事件0的中断标志位。" />
+        <Bit Name="CPRD" Authority="RO" Bits="2" Description="CPRD的中断标志位。" />
+        <Bit Name="ALRA" Authority="RO" Bits="0" Description="闹钟A的中断标志位。" />
+      </Register>
+      <Register Name="RTC_ICR" Authority="RW" Address="0x4006002c" Width="32" Description="中断状态清除寄存器">
+        <Bit Name="TRGEV1" Authority="RW" Bits="4" Description="清除同步触发事件1的原始中断标志位。" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="3" Description="清除同步触发事件0的原始中断标志位。" />
+        <Bit Name="CPRD" Authority="RW" Bits="2" Description="清除CPRD的原始中断标志位。" />
+        <Bit Name="ALRA" Authority="RW" Bits="0" Description="清除闹钟A的原始中断标志位。" />
+      </Register>
+      <Register Name="RTC_KEY" Authority="RW" Address="0x40060030" Width="32" Description="保护寄存器">
+        <Bit Name="RTCKEY" Authority="RW" Bits="15-0" Description="RTC的保护寄存器。&#xD;&#xA;只有对当前控制位写入0xCA53后，才能对具有保护功能的寄存器进行修改。" />
+      </Register>
+      <Register Name="RTC_EVTRG" Authority="RW" Address="0x40060034" Width="32" Description="同步事件触发控制寄存器">
+        <Bit Name="TRG1OE" Authority="RW" Bits="21" Description="外部触发端口TRGOUT1使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG0OE" Authority="RW" Bits="20" Description="外部触发端口TRGOUT0使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRGSEL1" Authority="RW" Bits="7-4" Description="TRGEV1事件的触发源选择。&#xD;&#xA;0h：禁止TRGSRC触发输出&#xD;&#xA;1h：AlarmA事件产生ESYNC事件&#xD;&#xA;2h：AlarmB事件产生ESYNC事件&#xD;&#xA;3h：AlarmA或AlarmB事件产生ESYNC事件&#xD;&#xA;4h：CPRD事件产生ESYNC事件&#xD;&#xA;其他：保留" />
+        <Bit Name="TRGSEL0" Authority="RW" Bits="3-0" Description="TRGEV0事件的触发源选择。&#xD;&#xA;0h：禁止TRGSRC触发输出&#xD;&#xA;1h：AlarmA事件产生ESYNC事件&#xD;&#xA;2h：AlarmB事件产生ESYNC事件&#xD;&#xA;3h：AlarmA或AlarmB事件产生ESYNC事件&#xD;&#xA;4h：CPRD事件产生ESYNC事件&#xD;&#xA;其他：保留" />
+      </Register>
+      <Register Name="RTC_EVPS" Authority="RW" Address="0x40060038" Width="32" Description="同步事件计数控制器">
+        <Bit Name="TRGEV1CNT" Authority="RW" Bits="23-20" Description="TRGEV1事件计数器设置。&#xD;&#xA;读取时，返回当前事件计数器值；&#xD;&#xA;写入时，直接更新事件计数器值。" />
+        <Bit Name="TRGEV0CNT" Authority="RW" Bits="19-16" Description="TRGEV0事件计数器设置。&#xD;&#xA;读取时，返回当前事件计数器值；&#xD;&#xA;写入时，直接更新事件计数器值。" />
+        <Bit Name="TRGEV1PRD" Authority="RW" Bits="7-4" Description="TRGEV1事件计数的周期设置。&#xD;&#xA;当TRGEV1事件发生次数满足周期时，才产生TRGEV1触发事件" />
+        <Bit Name="TRGEV0PRD" Authority="RW" Bits="3-0" Description="TRGEV0事件计数的周期设置。&#xD;&#xA;当TRGEV0事件发生次数满足周期时，才产生TRGEV0触发事件" />
+      </Register>
+      <Register Name="RTC_EVSWF" Authority="RW" Address="0x4006003c" Width="32" Description="同步事件软件触发寄存器">
+        <Bit Name="EV1SWF" Authority="RW" Bits="1" Description="软件产生一次EV1的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+        <Bit Name="EV0SWF" Authority="RW" Bits="0" Description="软件产生一次EV0的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="LPT">
+      <Register Name="LPT_CEDR" Authority="RW" Address="0x40061000" Width="32" Description="">
+        <Bit Name="IDCODE" Authority="RO" Bits="31-16" Description="当前LPT模块的版本信息。" />
+        <Bit Name="FLTCKPRS" Authority="RO" Bits="15-8" Description="数字滤波器的时钟分频控制。&#xD;&#xA;数字滤波器的时钟频率为PCLK/( FLTCKPRS+1)" />
+        <Bit Name="SHDWSTP" Authority="RW" Bits="6" Description="START控制位的Shadow功能使能控制。&#xD;&#xA;0h：Shadow模式&#xD;&#xA;1h：Immediate模式" />
+        <Bit Name="CSS" Authority="RW" Bits="4-2" Description="计数器时钟源选择位。&#xD;&#xA;0h：PCLK/4&#xD;&#xA;1h：ISCLK&#xD;&#xA;2h：IMCLK/4&#xD;&#xA;3h：EMCLK&#xD;&#xA;4h：LPT_IN的上升沿&#xD;&#xA;5h：LPT_IN的下降沿&#xD;&#xA;其他：保留" />
+        <Bit Name="DBGEN" Authority="RW" Bits="1" Description="调试使能控制。调试使能时，在CPU被调试器挂起时，时基计数器的计数时钟同时也被挂起。&#xD;&#xA;0h：调试禁止&#xD;&#xA;1h：调试使能" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="时基计数器的时钟使能控制。&#xD;&#xA;0h：计数器计数时钟禁止。&#xD;&#xA;1h：计数器计数时钟使能。" />
+      </Register>
+      <Register Name="LPT_RSSR" Authority="RW" Address="0x40061004" Width="32" Description="">
+        <Bit Name="SRR" Authority="RW" Bits="15-12" Description="软件复位控制位。&#xD;&#xA;当对当前控制位写入‘0x5’时，TIMER模块会被复位。复位后，所有寄存器都恢复为RESET状态。" />
+        <Bit Name="START" Authority="RW" Bits="0" Description="计数器启动控制位。&#xD;&#xA;0h：当写‘0’时，停止计数器&#xD;&#xA;1h：当写‘1’时，启动计数器&#xD;&#xA;当对START位进行读取时，返回当前计数器工作状态&#xD;&#xA;0h：计数器处于IDLE状态&#xD;&#xA;1h：计数器正在工作&#xD;&#xA;&#xD;&#xA;当LPT_CR[SWSYNEN]控制位为低时，START控制位用于控制LPT的启动，当LPT启动后，再次写入START将被忽略；当LPT_CR[SWSYNEN]控制位为高时，START控制位用于软件触发同步事件，每次对START的写入，会产生一次外部Sync事件（等同于SYNCR中的TRGUSR0触发）。" />
+      </Register>
+      <Register Name="LPT_PSCR" Authority="RW" Address="0x40061008" Width="32" Description="">
+        <Bit Name="PSC" Authority="RW" Bits="3-0" Description="时钟分频控制。&#xD;&#xA;TCLK作为时基模块的计时时钟和工作时钟。&#xD;&#xA;0x0：不分频&#xD;&#xA;0x1：2分频&#xD;&#xA;0x2：4分频&#xD;&#xA;0x3：8分频&#xD;&#xA;0x4：16分频&#xD;&#xA;0x5：32分频&#xD;&#xA;0x6：64分频&#xD;&#xA;0x7：128分频&#xD;&#xA;0x8：256分频&#xD;&#xA;0x9：512分频&#xD;&#xA;0xA：1024分频&#xD;&#xA;0xB：2048分频&#xD;&#xA;0xC：4096分频&#xD;&#xA;其他：保留" />
+      </Register>
+      <Register Name="LPT_CR" Authority="RW" Address="0x4006100c" Width="32" Description="">
+        <Bit Name="CMPLD" Authority="RW" Bits="17" Description="CMP寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;0h：立即更新，所有对CMP操作直接作用于活动寄存器 [2]&#xD;&#xA;1h：CMP活动寄存器更新发生在周期结束时" />
+        <Bit Name="PSCLD" Authority="RW" Bits="16" Description="PSCR寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;0h：PSCR活动寄存器更新发生在启动或者外部触发时&#xD;&#xA;1h：PSCR活动寄存器更新发生在周期结束，启动或者外部触发时" />
+        <Bit Name="FLTDEB" Authority="RW" Bits="15-13" Description="数字滤波去抖控制。此控制定义了滤波器监测的步数，只有连续N次监测结果一致时，滤波器才输出有效的电平翻转。滤波器的采样时钟频率在通过CKS控制位定义。&#xD;&#xA;000b：Bypass&#xD;&#xA;001b：N = 2&#xD;&#xA;010b：N = 3&#xD;&#xA;011b：N = 4&#xD;&#xA;100b：N = 6&#xD;&#xA;101b：N = 8&#xD;&#xA;110b：N = 16&#xD;&#xA;111b：N = 32" />
+        <Bit Name="FLTIPSCLD" Authority="RW" Bits="10" Description="数字滤波器初始化控制。对该控制写’1’可以初始化数字滤波器计数器，计数器值被初始化为CEDR[FLTCKPRS]中的设置值。&#xD;&#xA;0h：无效&#xD;&#xA;1h：执行初始化" />
+        <Bit Name="OPM" Authority="RW" Bits="6" Description="计数器单次触发工作模式选择。&#xD;&#xA;0h：连续计数工作模式&#xD;&#xA;1h：单次触发工作模式&#xD;&#xA;其他：保留" />
+        <Bit Name="POL" Authority="RW" Bits="5" Description="波形输出极性控制。&#xD;&#xA;0h：当CNT的值小于CMP时，输出高电平&#xD;&#xA;1h：当CNT的值小于CMP时，输出低电平" />
+        <Bit Name="PRDLD" Authority="RW" Bits="4" Description="PRDR活动寄存器载入控制。活动寄存器在配置条件满足时，从影子寄存器载入更新值。&#xD;&#xA;0h：立即更新，所有对PRDR操作直接作用于活动寄存器 [1]&#xD;&#xA;1h：PRDR活动寄存器更新发生在周期结束时" />
+        <Bit Name="IDLEST" Authority="RW" Bits="3" Description="波形输出被停止时，输出端口的缺省状态。&#xD;&#xA;0h：高阻输出&#xD;&#xA;1h：低电平输出" />
+        <Bit Name="SWSYNEN" Authority="RW" Bits="2" Description="软件使能同步触发使能控制（RSSR中START控制位）。&#xD;&#xA;0h：设置SW START控制只用于启动。&#xD;&#xA;1h：设置SW START控制用于启动和以产生一次外部触发的方式重新启动。" />
+      </Register>
+      <Register Name="LPT_SYNCR" Authority="RW" Address="0x40061010" Width="32" Description="">
+        <Bit Name="AREARM" Authority="RW" Bits="30" Description="硬件自动REARM控制位。&#xD;&#xA;0：禁止硬件自动REARM&#xD;&#xA;1：周期结束时，自动REARM" />
+        <Bit Name="REARMx" Authority="RW" Bits="16" Description="在一次性同步触发模式下，软件重置当前通道状态控制位。&#xD;&#xA;当读取时，返回当前通道状态&#xD;&#xA;0h：允许触发&#xD;&#xA;1h：已经检测到触发，不允许后续触发&#xD;&#xA;当写入时，&#xD;&#xA;0h：无效&#xD;&#xA;1h：清除当前通道状态，并允许新的触发" />
+        <Bit Name="OSTMDx" Authority="RW" Bits="8" Description="一次性同步触发模式选择。&#xD;&#xA;0h：连续触发模式&#xD;&#xA;1h：一次性触发模式&#xD;&#xA;当该输入通道被设置为一次性触发模式后，在一次触发事件被检测到后，该通道将不允许后续的触发事件通过，直到被软件重置（REARM）后才允许新的触发事件通过。" />
+        <Bit Name="SYNCEN0" Authority="RW" Bits="0" Description="外部同步触发使能控制。&#xD;&#xA;0：禁止当前触发输入通道&#xD;&#xA;1：使能当前触发输入通道&#xD;&#xA;LPT_SYNCIN0：外部Sync事件 (来自ETCB模块)" />
+      </Register>
+      <Register Name="LPT_PRDR" Authority="RW" Address="0x40061014" Width="32" Description="">
+        <Bit Name="PRDR" Authority="RW" Bits="15-0" Description="时基控制周期寄存器。&#xD;&#xA;此控制位决定了PWM输出波形的周期值。通过设置LPT_CR[PRDLD]可以选择Shadow到Active载入的触发条件。" />
+      </Register>
+      <Register Name="LPT_CMP" Authority="RW" Address="0x40061018" Width="32" Description="">
+        <Bit Name="CMP" Authority="RW" Bits="15-0" Description="比较值寄存器。&#xD;&#xA;此寄存器有Shadow寄存器，只有在周期结束时才会对活动寄存器进行更新。" />
+      </Register>
+      <Register Name="LPT_CNT" Authority="RW" Address="0x4006101c" Width="32" Description="">
+        <Bit Name="CNT" Authority="RW" Bits="15-0" Description="时基计数器寄存器。&#xD;&#xA;对CNT读取时，返回当前计数器值。对CNT写入时，将直接更新CNT的计数值。CNT计数器没有Shadow寄存器，CPU的写入将直接影响当前计数器值。" />
+      </Register>
+      <Register Name="LPT_TRGFCR" Authority="RW" Address="0x40061020" Width="32" Description="">
+        <Bit Name="CROSSMD" Authority="RW" Bits="7" Description="允许滤波窗跨越多个TB的周期。&#xD;&#xA;缺省条件下，当滤波窗在周期结束时若任然有效，将跨过周期点，一直持续到窗口计数器溢出。当禁止跨周期时，在周期结束时，窗口计数器将被停止。&#xD;&#xA;0h：禁止跨周期&#xD;&#xA;1h：允许跨周期" />
+        <Bit Name="BLKINV" Authority="RW" Bits="4" Description="窗口使能反转控制。&#xD;&#xA;0h：窗口不反转&#xD;&#xA;1h：窗口反转" />
+        <Bit Name="SRC_SEL" Authority="RW" Bits="0" Description="滤波模块的输入信号选择。&#xD;&#xA;0h：禁止滤波&#xD;&#xA;1h：使能LPT_SYNCIN滤波" />
+      </Register>
+      <Register Name="LPT_TRGFWR" Authority="RW" Address="0x40061024" Width="32" Description="">
+        <Bit Name="WINDOW" Authority="RW" Bits="31-16" Description="滤波窗的宽度设置。&#xD;&#xA;此16bit控制位定义了滤波窗的宽度，窗口宽度是基于TCLK的计数值。当OFFSET计数器溢出时，WINDOW计数器被重置，并开始计数直到溢出。当OFFSET计数器溢出，但WINDOW状态已经激活时，WINDOW计数器不会重置。在应用时必须注意此条件的设置。" />
+        <Bit Name="OFFSET" Authority="RW" Bits="15-0" Description="滤波窗的OFFSET设置。&#xD;&#xA;此16bit控制位定义了从周期起始位置开始计数多少个TCLK后，开始有效的滤波窗口。OFFSET的Shadow寄存器在周期起始时，载入到Active寄存器中，并重新开始计数。" />
+      </Register>
+      <Register Name="LPT_EVTRG" Authority="RW" Address="0x40061028" Width="32" Description="">
+        <Bit Name="TRG0OE" Authority="RW" Bits="20" Description="外部触发端口TRGOUT0使能&#xD;&#xA;0h：禁止触发输出&#xD;&#xA;1h：允许触发输出" />
+        <Bit Name="TRG0SEL" Authority="RW" Bits="3-0" Description="TRGEV0事件的触发源选择。&#xD;&#xA;0000：禁止TRGOUT触发输出&#xD;&#xA;0001：当 CNT = ZRO 产生TRGEV0事件&#xD;&#xA;0010：当 CNT = PRD 产生TRGEV0事件&#xD;&#xA;0011：当 CNT = ZRO or CNT = PRD 产生TRGEV0事件&#xD;&#xA;0100：当 CNT = CMP时，产生TRGEV0事件&#xD;&#xA;其他：保留" />
+      </Register>
+      <Register Name="LPT_EVPS" Authority="RW" Address="0x4006102c" Width="32" Description="">
+        <Bit Name="TRGEV0CNT" Authority="RW" Bits="19-16" Description="TRGEV0事件计数器设置。&#xD;&#xA;读取时，返回当前事件计数器值；&#xD;&#xA;写入时，直接更新事件计数器值。" />
+        <Bit Name="TRGEV0PRD" Authority="RW" Bits="3-0" Description="TRGEV0事件计数的周期设置。&#xD;&#xA;当TRGEV0事件发生次数满足周期时，才产生TRGEV0触发事件" />
+      </Register>
+      <Register Name="LPT_EVSWF" Authority="RW" Address="0x40061030" Width="32" Description="">
+        <Bit Name="EV0SWF" Authority="RW" Bits="0" Description="软件产生一次EV0的触发&#xD;&#xA;0h：写入‘0’无效&#xD;&#xA;1h：软件产生一次触发" />
+      </Register>
+      <Register Name="LPT_RISR" Authority="RW" Address="0x40061034" Width="32" Description="">
+        <Bit Name="PEND" Authority="RO" Bits="2" Description="PEND中断请求原始标志状态" />
+        <Bit Name="MATCH" Authority="RO" Bits="1" Description="MATCH中断请求原始标志状态" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="0" Description="TRGEV0中断请求原始标志状态" />
+      </Register>
+      <Register Name="LPT_MISR" Authority="RW" Address="0x40061038" Width="32" Description="">
+        <Bit Name="PEND" Authority="RO" Bits="2" Description="PEND中断请求标志状态" />
+        <Bit Name="MATCH" Authority="RO" Bits="1" Description="MATCH中断请求标志状态" />
+        <Bit Name="TRGEV0" Authority="RO" Bits="0" Description="TRGEV0中断请求标志状态" />
+      </Register>
+      <Register Name="LPT_IMCR" Authority="RW" Address="0x4006103c" Width="32" Description="">
+        <Bit Name="PEND" Authority="RW" Bits="2" Description="PEND中断使能控制位" />
+        <Bit Name="MATCH" Authority="RW" Bits="1" Description="MATCH中断使能控制位" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="TRGEV0中断使能控制位" />
+      </Register>
+      <Register Name="LPT_ICR" Authority="RW" Address="0x40061040" Width="32" Description="">
+        <Bit Name="PEND" Authority="RW" Bits="2" Description="清除PEND原始中断状态位" />
+        <Bit Name="MATCH" Authority="RW" Bits="1" Description="清除MATCH原始中断状态位" />
+        <Bit Name="TRGEV0" Authority="RW" Bits="0" Description="清除TRGEV0原始中断状态位" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="WWDT">
+      <Register Name="WWDT_CR" Authority="RW" Address="0x40062000" Width="32" Description="Control Register">
+        <Bit Name="WDTEN" Authority="RW" Bits="8" Description="看门狗使能控制位。&#xD;&#xA;0h：禁止看门狗&#xD;&#xA;1h：使能看门狗&#xD;&#xA;该使能控制位一旦使能后，不能通过软件关闭。需要复位后才能恢复初始禁止状态。" />
+        <Bit Name="CNT" Authority="RW" Bits="7-0" Description="计数器刷新值。&#xD;&#xA;写入时，将当前计数器设置为CNT的值。&#xD;&#xA;读取时，返回当前计数器值。" />
+      </Register>
+      <Register Name="WWDT_CFGR" Authority="RW" Address="0x40062004" Width="32" Description="Configuration Register">
+        <Bit Name="DBGEN" Authority="RW" Bits="10" Description="调试模式控制位。&#xD;&#xA;0h：禁止调试模式&#xD;&#xA;1h：使能调试模式" />
+        <Bit Name="PSC" Authority="RW" Bits="9-8" Description="计数器时钟分频控制位。分频控制是基于PCLK/4096后的分频。&#xD;&#xA;0h：PCLK/4096&#xD;&#xA;1h：PCLK/4096/2&#xD;&#xA;2h：PCLK/4096/4&#xD;&#xA;3h：PCLK/4096/8" />
+        <Bit Name="WND" Authority="RW" Bits="7-0" Description="窗口预设值。&#xD;&#xA;当CNT的当前计数值大于窗口设置时，任何对CNT的刷新操作都会触发复位事件，窗口预设值寄存器没有缓冲，设置后立即生效。" />
+      </Register>
+      <Register Name="WWDT_RISR" Authority="RW" Address="0x40062008" Width="32" Description="Raw Interrupt Status Register">
+        <Bit Name="EVI" Authority="RO" Bits="0" Description="EVI中断请求原始标志状态" />
+      </Register>
+      <Register Name="WWDT_MISR" Authority="RW" Address="0x4006200c" Width="32" Description="Masked Interrupt Status Register">
+        <Bit Name="EVI" Authority="RO" Bits="0" Description="EVI中断请求标志状态" />
+      </Register>
+      <Register Name="WWDT_IMCR" Authority="RW" Address="0x40062010" Width="32" Description="Interrupt Masking Control Register">
+        <Bit Name="EVI" Authority="RW" Bits="0" Description="EVI中断使能控制位" />
+      </Register>
+      <Register Name="WWDT_ICR" Authority="RW" Address="0x40062014" Width="32" Description="Interrupt Pending Clear Register">
+        <Bit Name="EVI" Authority="RW" Bits="0" Description="" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="UART0">
+      <Register Name="UART_DATA" Authority="RW" Address="0x40080000" Width="32" Description="数据寄存器">
+        <Bit Name="DATA" Authority="RW" Bits="7-0" Description="发送或接收到的数据&#xD;&#xA;读 = 接收到的数据&#xD;&#xA;写 = 发送的数据" />
+      </Register>
+      <Register Name="UART_SR" Authority="RW" Address="0x40080004" Width="32" Description="状态寄存器">
+        <Bit Name="RFF" Authority="RO" Bits="8" Description="接收FIFO是否已满状态位&#xD;&#xA;0 = 接收FIFO未满&#xD;&#xA;1 = 接收FIFO已满" />
+        <Bit Name="RNE" Authority="RO" Bits="7" Description="接收FIFO是否为空状态位&#xD;&#xA;0 = 接收FIFO为空&#xD;&#xA;1 = 接收FIFO非空" />
+        <Bit Name="TNF" Authority="RO" Bits="6" Description="发送FIFO是否已满状态位&#xD;&#xA;0 = 发送FIFO已满&#xD;&#xA;1 = 发送FIFO未满" />
+        <Bit Name="TFE" Authority="RO" Bits="5" Description="发送FIFO是否为空状态位&#xD;&#xA;0 = 发送FIFO非空&#xD;&#xA;1 = 发送FIFO为空" />
+        <Bit Name="PARITY_SR" Authority="RW" Bits="4" Description="PARITY 错误状态位&#xD;&#xA;0 = 校验没有错误&#xD;&#xA;1 = 校验出错&#xD;&#xA;1 = 清除校验错误状态位(写)" />
+        <Bit Name="RX_OVER" Authority="RW" Bits="3" Description="RX缓冲区溢出状态&#xD;&#xA;0 = RX缓冲区没有溢出&#xD;&#xA;1 = RX缓冲区溢出(读取)&#xD;&#xA;1 =清除RX缓冲区溢出标志(写)" />
+        <Bit Name="TX_OVER" Authority="RW" Bits="2" Description="TX缓冲区溢出状态&#xD;&#xA;0 = TX缓冲区没有溢出&#xD;&#xA;1 = TX缓冲区溢出(读取)&#xD;&#xA;1 = 清除TX缓冲区溢出标志(写)" />
+        <Bit Name="RX_FULL" Authority="RO" Bits="1" Description="RX缓冲区状态&#xD;&#xA;0 = RX缓冲区没有满(未收到数据或数据已被读取)&#xD;&#xA;1 = RX缓冲区已满(收到数据，并且未被读取)" />
+        <Bit Name="TX_FULL" Authority="RO" Bits="0" Description="TX缓冲区状态&#xD;&#xA;0 = TX缓冲区没有满(可以发送数据)&#xD;&#xA;1 = TX缓冲区已满(正在发送数据)" />
+      </Register>
+      <Register Name="UART_CTRL" Authority="RW" Address="0x40080008" Width="32" Description="控制寄存器">
+        <Bit Name="DBGEN" Authority="RW" Bits="31" Description="调试使能&#xD;&#xA;0= 调试禁止&#xD;&#xA;1= 调试使能，进入调试模式后，UART不工作" />
+        <Bit Name="INT_TX_DONE_EN" Authority="RW" Bits="19" Description="发送完成中断使能/禁止&#xD;&#xA;0= 禁止发送完成中断&#xD;&#xA;1= 使能发送完成中断" />
+        <Bit Name="INT_OVER" Authority="RW" Bits="18" Description="FIFO使能下的RX溢出中断使能/禁止&#xD;&#xA;0= 禁止RX溢出中断&#xD;&#xA;1= 使能RX溢出中断" />
+        <Bit Name="RXIFLSEL" Authority="RW" Bits="16-14" Description="接收FIFO中断触发点选择位&#xD;&#xA;001 接收FIFO占用&gt;=1/8&#xD;&#xA;010 接收FIFO占用&gt;=1/4&#xD;&#xA;100 接收FIFO占用&gt;=1/2&#xD;&#xA;Others=保留" />
+        <Bit Name="INT_FIFO" Authority="RW" Bits="13-12" Description="[13]：FIFO使能下的RX中断使能/禁止&#xD;&#xA;0= 禁止RX中断&#xD;&#xA;1= 使能RX中断" />
+        <Bit Name="FIFO_EN" Authority="RW" Bits="11" Description="FIFO模块有效，接收和发送模式下都需要经过相应的FIFO模块&#xD;&#xA;0= 禁用FIFO&#xD;&#xA;1= 使能FIFO" />
+        <Bit Name="PARITY" Authority="RW" Bits="10-8" Description="校验位类型&#xD;&#xA;0XX：无校验位&#xD;&#xA;100：偶校验&#xD;&#xA;101：奇校验&#xD;&#xA;110：0校验，校验位一直为0(Space)&#xD;&#xA;111：1校验，校验位一直为1(Mark)" />
+        <Bit Name="INT_PARITY" Authority="RW" Bits="7" Description="PARITY中断使能/禁止&#xD;&#xA;0 = 禁止PARITY中断&#xD;&#xA;1 = 使能PARITY中断" />
+        <Bit Name="TEST" Authority="RW" Bits="6" Description="测试模式&#xD;&#xA;此为请保持为0" />
+        <Bit Name="INT_OVER_RX" Authority="RW" Bits="5" Description="RX溢出中断使能/禁止&#xD;&#xA;0 = 禁止RX溢出中断&#xD;&#xA;1 = 使能RX溢出中断" />
+        <Bit Name="INT_OVER_TX" Authority="RW" Bits="4" Description="TX溢出中断使能/禁止&#xD;&#xA;0 = 禁止TX溢出中断&#xD;&#xA;1 = 使能TX溢出中断" />
+        <Bit Name="INT_RX" Authority="RW" Bits="3" Description="RX 中断使能/禁止&#xD;&#xA;0 = 禁止RX中断&#xD;&#xA;1 = 使能RX中断" />
+        <Bit Name="INT_TX" Authority="RW" Bits="2" Description="TX 中断使能/禁止&#xD;&#xA;0 = 禁止TX中断&#xD;&#xA;1 = 使能TX中断" />
+        <Bit Name="RX" Authority="RW" Bits="1" Description="RX 使能/禁止&#xD;&#xA;0 = 禁止RX&#xD;&#xA;1 = 使能RX" />
+        <Bit Name="TX" Authority="RW" Bits="0" Description="TX 使能/禁止&#xD;&#xA;0 = 禁止TX&#xD;&#xA;1 = 使能TX" />
+      </Register>
+      <Register Name="UART_ISR" Authority="RW" Address="0x4008000c" Width="32" Description="中断状态寄存器">
+        <Bit Name="TX_DONE_INT" Authority="RO" Bits="19" Description="发送完成中断&#xD;&#xA;0= 发送完成中断没发生&#xD;&#xA;1= 发送完成中断发生(读取)&#xD;&#xA;1= 清除发送完成中断(写)" />
+        <Bit Name="RORMIS" Authority="RO" Bits="7" Description="接收FIFO溢出中断&#xD;&#xA;0= 溢出中断没发生&#xD;&#xA;1= 溢出中断发生(读取)&#xD;&#xA;1= 清除溢出中断(写)" />
+        <Bit Name="RXMIS" Authority="RO" Bits="6" Description="接收FIFO中断&#xD;&#xA;0= RX中断没发生&#xD;&#xA;1= RX中断发生(读取)" />
+        <Bit Name="TXMIS" Authority="RO" Bits="5" Description="发送FIFO中断&#xD;&#xA;0= TX中断没发生&#xD;&#xA;1= TX中断发生(读取)" />
+        <Bit Name="PARITY_ERR" Authority="RW" Bits="4" Description="PARITY错误中断&#xD;&#xA;0= PARITY错误中断没发生&#xD;&#xA;1= PARITY错误中断发生(读取)&#xD;&#xA;1= 清除PARITY中断(写)" />
+        <Bit Name="RX_OVER_INT" Authority="RW" Bits="3" Description="RX溢出中断&#xD;&#xA;0 = RX溢出中断没发生&#xD;&#xA;1 = RX溢出中断发生(读取)&#xD;&#xA;1 = 清除RX溢出中断(写)" />
+        <Bit Name="TX_OVER_INT" Authority="RW" Bits="2" Description="TX溢出中断&#xD;&#xA;0 = TX溢出中断没发生&#xD;&#xA;1 = TX溢出中断发生(读取)&#xD;&#xA;1 = 清除TX溢出中断(写)" />
+        <Bit Name="RX_INT" Authority="RW" Bits="1" Description="RX中断&#xD;&#xA;0 = RX中断没发生&#xD;&#xA;1 = RX中断发生(读取)&#xD;&#xA;1 = 清除RX中断(写)" />
+        <Bit Name="TX_INT" Authority="RW" Bits="0" Description="TX中断&#xD;&#xA;0 = TX中断没发生&#xD;&#xA;1 = TX中断发生(读取)&#xD;&#xA;1 = 清除TX中断(写)" />
+      </Register>
+      <Register Name="UART_BRDIV" Authority="RW" Address="0x40080010" Width="32" Description="波特率分频寄存器">
+        <Bit Name="DIV" Authority="RW" Bits="19-0" Description="波特率分频&#xD;&#xA;最小值为16" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="UART1">
+      <Register Name="UART_DATA" Authority="RW" Address="0x40081000" Width="32" Description="数据寄存器">
+        <Bit Name="DATA" Authority="RW" Bits="7-0" Description="发送或接收到的数据&#xD;&#xA;读 = 接收到的数据&#xD;&#xA;写 = 发送的数据" />
+      </Register>
+      <Register Name="UART_SR" Authority="RW" Address="0x40081004" Width="32" Description="状态寄存器">
+        <Bit Name="RFF" Authority="RO" Bits="8" Description="接收FIFO是否已满状态位&#xD;&#xA;0 = 接收FIFO未满&#xD;&#xA;1 = 接收FIFO已满" />
+        <Bit Name="RNE" Authority="RO" Bits="7" Description="接收FIFO是否为空状态位&#xD;&#xA;0 = 接收FIFO为空&#xD;&#xA;1 = 接收FIFO非空" />
+        <Bit Name="TNF" Authority="RO" Bits="6" Description="发送FIFO是否已满状态位&#xD;&#xA;0 = 发送FIFO已满&#xD;&#xA;1 = 发送FIFO未满" />
+        <Bit Name="TFE" Authority="RO" Bits="5" Description="发送FIFO是否为空状态位&#xD;&#xA;0 = 发送FIFO非空&#xD;&#xA;1 = 发送FIFO为空" />
+        <Bit Name="PARITY_SR" Authority="RW" Bits="4" Description="PARITY 错误状态位&#xD;&#xA;0 = 校验没有错误&#xD;&#xA;1 = 校验出错&#xD;&#xA;1 = 清除校验错误状态位(写)" />
+        <Bit Name="RX_OVER" Authority="RW" Bits="3" Description="RX缓冲区溢出状态&#xD;&#xA;0 = RX缓冲区没有溢出&#xD;&#xA;1 = RX缓冲区溢出(读取)&#xD;&#xA;1 =清除RX缓冲区溢出标志(写)" />
+        <Bit Name="TX_OVER" Authority="RW" Bits="2" Description="TX缓冲区溢出状态&#xD;&#xA;0 = TX缓冲区没有溢出&#xD;&#xA;1 = TX缓冲区溢出(读取)&#xD;&#xA;1 = 清除TX缓冲区溢出标志(写)" />
+        <Bit Name="RX_FULL" Authority="RO" Bits="1" Description="RX缓冲区状态&#xD;&#xA;0 = RX缓冲区没有满(未收到数据或数据已被读取)&#xD;&#xA;1 = RX缓冲区已满(收到数据，并且未被读取)" />
+        <Bit Name="TX_FULL" Authority="RO" Bits="0" Description="TX缓冲区状态&#xD;&#xA;0 = TX缓冲区没有满(可以发送数据)&#xD;&#xA;1 = TX缓冲区已满(正在发送数据)" />
+      </Register>
+      <Register Name="UART_CTRL" Authority="RW" Address="0x40081008" Width="32" Description="控制寄存器">
+        <Bit Name="DBGEN" Authority="RW" Bits="31" Description="调试使能&#xD;&#xA;0= 调试禁止&#xD;&#xA;1= 调试使能，进入调试模式后，UART不工作" />
+        <Bit Name="INT_TX_DONE_EN" Authority="RW" Bits="19" Description="发送完成中断使能/禁止&#xD;&#xA;0= 禁止发送完成中断&#xD;&#xA;1= 使能发送完成中断" />
+        <Bit Name="INT_OVER" Authority="RW" Bits="18" Description="FIFO使能下的RX溢出中断使能/禁止&#xD;&#xA;0= 禁止RX溢出中断&#xD;&#xA;1= 使能RX溢出中断" />
+        <Bit Name="RXIFLSEL" Authority="RW" Bits="16-14" Description="接收FIFO中断触发点选择位&#xD;&#xA;001 接收FIFO占用&gt;=1/8&#xD;&#xA;010 接收FIFO占用&gt;=1/4&#xD;&#xA;100 接收FIFO占用&gt;=1/2&#xD;&#xA;Others=保留" />
+        <Bit Name="INT_FIFO" Authority="RW" Bits="13-12" Description="[13]：FIFO使能下的RX中断使能/禁止&#xD;&#xA;0= 禁止RX中断&#xD;&#xA;1= 使能RX中断" />
+        <Bit Name="FIFO_EN" Authority="RW" Bits="11" Description="FIFO模块有效，接收和发送模式下都需要经过相应的FIFO模块&#xD;&#xA;0= 禁用FIFO&#xD;&#xA;1= 使能FIFO" />
+        <Bit Name="PARITY" Authority="RW" Bits="10-8" Description="校验位类型&#xD;&#xA;0XX：无校验位&#xD;&#xA;100：偶校验&#xD;&#xA;101：奇校验&#xD;&#xA;110：0校验，校验位一直为0(Space)&#xD;&#xA;111：1校验，校验位一直为1(Mark)" />
+        <Bit Name="INT_PARITY" Authority="RW" Bits="7" Description="PARITY中断使能/禁止&#xD;&#xA;0 = 禁止PARITY中断&#xD;&#xA;1 = 使能PARITY中断" />
+        <Bit Name="TEST" Authority="RW" Bits="6" Description="测试模式&#xD;&#xA;此为请保持为0" />
+        <Bit Name="INT_OVER_RX" Authority="RW" Bits="5" Description="RX溢出中断使能/禁止&#xD;&#xA;0 = 禁止RX溢出中断&#xD;&#xA;1 = 使能RX溢出中断" />
+        <Bit Name="INT_OVER_TX" Authority="RW" Bits="4" Description="TX溢出中断使能/禁止&#xD;&#xA;0 = 禁止TX溢出中断&#xD;&#xA;1 = 使能TX溢出中断" />
+        <Bit Name="INT_RX" Authority="RW" Bits="3" Description="RX 中断使能/禁止&#xD;&#xA;0 = 禁止RX中断&#xD;&#xA;1 = 使能RX中断" />
+        <Bit Name="INT_TX" Authority="RW" Bits="2" Description="TX 中断使能/禁止&#xD;&#xA;0 = 禁止TX中断&#xD;&#xA;1 = 使能TX中断" />
+        <Bit Name="RX" Authority="RW" Bits="1" Description="RX 使能/禁止&#xD;&#xA;0 = 禁止RX&#xD;&#xA;1 = 使能RX" />
+        <Bit Name="TX" Authority="RW" Bits="0" Description="TX 使能/禁止&#xD;&#xA;0 = 禁止TX&#xD;&#xA;1 = 使能TX" />
+      </Register>
+      <Register Name="UART_ISR" Authority="RW" Address="0x4008100c" Width="32" Description="中断状态寄存器">
+        <Bit Name="TX_DONE_INT" Authority="RO" Bits="19" Description="发送完成中断&#xD;&#xA;0= 发送完成中断没发生&#xD;&#xA;1= 发送完成中断发生(读取)&#xD;&#xA;1= 清除发送完成中断(写)" />
+        <Bit Name="RORMIS" Authority="RO" Bits="7" Description="接收FIFO溢出中断&#xD;&#xA;0= 溢出中断没发生&#xD;&#xA;1= 溢出中断发生(读取)&#xD;&#xA;1= 清除溢出中断(写)" />
+        <Bit Name="RXMIS" Authority="RO" Bits="6" Description="接收FIFO中断&#xD;&#xA;0= RX中断没发生&#xD;&#xA;1= RX中断发生(读取)" />
+        <Bit Name="TXMIS" Authority="RO" Bits="5" Description="发送FIFO中断&#xD;&#xA;0= TX中断没发生&#xD;&#xA;1= TX中断发生(读取)" />
+        <Bit Name="PARITY_ERR" Authority="RW" Bits="4" Description="PARITY错误中断&#xD;&#xA;0= PARITY错误中断没发生&#xD;&#xA;1= PARITY错误中断发生(读取)&#xD;&#xA;1= 清除PARITY中断(写)" />
+        <Bit Name="RX_OVER_INT" Authority="RW" Bits="3" Description="RX溢出中断&#xD;&#xA;0 = RX溢出中断没发生&#xD;&#xA;1 = RX溢出中断发生(读取)&#xD;&#xA;1 = 清除RX溢出中断(写)" />
+        <Bit Name="TX_OVER_INT" Authority="RW" Bits="2" Description="TX溢出中断&#xD;&#xA;0 = TX溢出中断没发生&#xD;&#xA;1 = TX溢出中断发生(读取)&#xD;&#xA;1 = 清除TX溢出中断(写)" />
+        <Bit Name="RX_INT" Authority="RW" Bits="1" Description="RX中断&#xD;&#xA;0 = RX中断没发生&#xD;&#xA;1 = RX中断发生(读取)&#xD;&#xA;1 = 清除RX中断(写)" />
+        <Bit Name="TX_INT" Authority="RW" Bits="0" Description="TX中断&#xD;&#xA;0 = TX中断没发生&#xD;&#xA;1 = TX中断发生(读取)&#xD;&#xA;1 = 清除TX中断(写)" />
+      </Register>
+      <Register Name="UART_BRDIV" Authority="RW" Address="0x40081010" Width="32" Description="波特率分频寄存器">
+        <Bit Name="DIV" Authority="RW" Bits="19-0" Description="波特率分频&#xD;&#xA;最小值为16" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="UART2">
+      <Register Name="UART_DATA" Authority="RW" Address="0x40082000" Width="32" Description="数据寄存器">
+        <Bit Name="DATA" Authority="RW" Bits="7-0" Description="发送或接收到的数据&#xD;&#xA;读 = 接收到的数据&#xD;&#xA;写 = 发送的数据" />
+      </Register>
+      <Register Name="UART_SR" Authority="RW" Address="0x40082004" Width="32" Description="状态寄存器">
+        <Bit Name="RFF" Authority="RO" Bits="8" Description="接收FIFO是否已满状态位&#xD;&#xA;0 = 接收FIFO未满&#xD;&#xA;1 = 接收FIFO已满" />
+        <Bit Name="RNE" Authority="RO" Bits="7" Description="接收FIFO是否为空状态位&#xD;&#xA;0 = 接收FIFO为空&#xD;&#xA;1 = 接收FIFO非空" />
+        <Bit Name="TNF" Authority="RO" Bits="6" Description="发送FIFO是否已满状态位&#xD;&#xA;0 = 发送FIFO已满&#xD;&#xA;1 = 发送FIFO未满" />
+        <Bit Name="TFE" Authority="RO" Bits="5" Description="发送FIFO是否为空状态位&#xD;&#xA;0 = 发送FIFO非空&#xD;&#xA;1 = 发送FIFO为空" />
+        <Bit Name="PARITY_SR" Authority="RW" Bits="4" Description="PARITY 错误状态位&#xD;&#xA;0 = 校验没有错误&#xD;&#xA;1 = 校验出错&#xD;&#xA;1 = 清除校验错误状态位(写)" />
+        <Bit Name="RX_OVER" Authority="RW" Bits="3" Description="RX缓冲区溢出状态&#xD;&#xA;0 = RX缓冲区没有溢出&#xD;&#xA;1 = RX缓冲区溢出(读取)&#xD;&#xA;1 =清除RX缓冲区溢出标志(写)" />
+        <Bit Name="TX_OVER" Authority="RW" Bits="2" Description="TX缓冲区溢出状态&#xD;&#xA;0 = TX缓冲区没有溢出&#xD;&#xA;1 = TX缓冲区溢出(读取)&#xD;&#xA;1 = 清除TX缓冲区溢出标志(写)" />
+        <Bit Name="RX_FULL" Authority="RO" Bits="1" Description="RX缓冲区状态&#xD;&#xA;0 = RX缓冲区没有满(未收到数据或数据已被读取)&#xD;&#xA;1 = RX缓冲区已满(收到数据，并且未被读取)" />
+        <Bit Name="TX_FULL" Authority="RO" Bits="0" Description="TX缓冲区状态&#xD;&#xA;0 = TX缓冲区没有满(可以发送数据)&#xD;&#xA;1 = TX缓冲区已满(正在发送数据)" />
+      </Register>
+      <Register Name="UART_CTRL" Authority="RW" Address="0x40082008" Width="32" Description="控制寄存器">
+        <Bit Name="DBGEN" Authority="RW" Bits="31" Description="调试使能&#xD;&#xA;0= 调试禁止&#xD;&#xA;1= 调试使能，进入调试模式后，UART不工作" />
+        <Bit Name="INT_TX_DONE_EN" Authority="RW" Bits="19" Description="发送完成中断使能/禁止&#xD;&#xA;0= 禁止发送完成中断&#xD;&#xA;1= 使能发送完成中断" />
+        <Bit Name="INT_OVER" Authority="RW" Bits="18" Description="FIFO使能下的RX溢出中断使能/禁止&#xD;&#xA;0= 禁止RX溢出中断&#xD;&#xA;1= 使能RX溢出中断" />
+        <Bit Name="RXIFLSEL" Authority="RW" Bits="16-14" Description="接收FIFO中断触发点选择位&#xD;&#xA;001 接收FIFO占用&gt;=1/8&#xD;&#xA;010 接收FIFO占用&gt;=1/4&#xD;&#xA;100 接收FIFO占用&gt;=1/2&#xD;&#xA;Others=保留" />
+        <Bit Name="INT_FIFO" Authority="RW" Bits="13-12" Description="[13]：FIFO使能下的RX中断使能/禁止&#xD;&#xA;0= 禁止RX中断&#xD;&#xA;1= 使能RX中断" />
+        <Bit Name="FIFO_EN" Authority="RW" Bits="11" Description="FIFO模块有效，接收和发送模式下都需要经过相应的FIFO模块&#xD;&#xA;0= 禁用FIFO&#xD;&#xA;1= 使能FIFO" />
+        <Bit Name="PARITY" Authority="RW" Bits="10-8" Description="校验位类型&#xD;&#xA;0XX：无校验位&#xD;&#xA;100：偶校验&#xD;&#xA;101：奇校验&#xD;&#xA;110：0校验，校验位一直为0(Space)&#xD;&#xA;111：1校验，校验位一直为1(Mark)" />
+        <Bit Name="INT_PARITY" Authority="RW" Bits="7" Description="PARITY中断使能/禁止&#xD;&#xA;0 = 禁止PARITY中断&#xD;&#xA;1 = 使能PARITY中断" />
+        <Bit Name="TEST" Authority="RW" Bits="6" Description="测试模式&#xD;&#xA;此为请保持为0" />
+        <Bit Name="INT_OVER_RX" Authority="RW" Bits="5" Description="RX溢出中断使能/禁止&#xD;&#xA;0 = 禁止RX溢出中断&#xD;&#xA;1 = 使能RX溢出中断" />
+        <Bit Name="INT_OVER_TX" Authority="RW" Bits="4" Description="TX溢出中断使能/禁止&#xD;&#xA;0 = 禁止TX溢出中断&#xD;&#xA;1 = 使能TX溢出中断" />
+        <Bit Name="INT_RX" Authority="RW" Bits="3" Description="RX 中断使能/禁止&#xD;&#xA;0 = 禁止RX中断&#xD;&#xA;1 = 使能RX中断" />
+        <Bit Name="INT_TX" Authority="RW" Bits="2" Description="TX 中断使能/禁止&#xD;&#xA;0 = 禁止TX中断&#xD;&#xA;1 = 使能TX中断" />
+        <Bit Name="RX" Authority="RW" Bits="1" Description="RX 使能/禁止&#xD;&#xA;0 = 禁止RX&#xD;&#xA;1 = 使能RX" />
+        <Bit Name="TX" Authority="RW" Bits="0" Description="TX 使能/禁止&#xD;&#xA;0 = 禁止TX&#xD;&#xA;1 = 使能TX" />
+      </Register>
+      <Register Name="UART_ISR" Authority="RW" Address="0x4008200c" Width="32" Description="中断状态寄存器">
+        <Bit Name="TX_DONE_INT" Authority="RO" Bits="19" Description="发送完成中断&#xD;&#xA;0= 发送完成中断没发生&#xD;&#xA;1= 发送完成中断发生(读取)&#xD;&#xA;1= 清除发送完成中断(写)" />
+        <Bit Name="RORMIS" Authority="RO" Bits="7" Description="接收FIFO溢出中断&#xD;&#xA;0= 溢出中断没发生&#xD;&#xA;1= 溢出中断发生(读取)&#xD;&#xA;1= 清除溢出中断(写)" />
+        <Bit Name="RXMIS" Authority="RO" Bits="6" Description="接收FIFO中断&#xD;&#xA;0= RX中断没发生&#xD;&#xA;1= RX中断发生(读取)" />
+        <Bit Name="TXMIS" Authority="RO" Bits="5" Description="发送FIFO中断&#xD;&#xA;0= TX中断没发生&#xD;&#xA;1= TX中断发生(读取)" />
+        <Bit Name="PARITY_ERR" Authority="RW" Bits="4" Description="PARITY错误中断&#xD;&#xA;0= PARITY错误中断没发生&#xD;&#xA;1= PARITY错误中断发生(读取)&#xD;&#xA;1= 清除PARITY中断(写)" />
+        <Bit Name="RX_OVER_INT" Authority="RW" Bits="3" Description="RX溢出中断&#xD;&#xA;0 = RX溢出中断没发生&#xD;&#xA;1 = RX溢出中断发生(读取)&#xD;&#xA;1 = 清除RX溢出中断(写)" />
+        <Bit Name="TX_OVER_INT" Authority="RW" Bits="2" Description="TX溢出中断&#xD;&#xA;0 = TX溢出中断没发生&#xD;&#xA;1 = TX溢出中断发生(读取)&#xD;&#xA;1 = 清除TX溢出中断(写)" />
+        <Bit Name="RX_INT" Authority="RW" Bits="1" Description="RX中断&#xD;&#xA;0 = RX中断没发生&#xD;&#xA;1 = RX中断发生(读取)&#xD;&#xA;1 = 清除RX中断(写)" />
+        <Bit Name="TX_INT" Authority="RW" Bits="0" Description="TX中断&#xD;&#xA;0 = TX中断没发生&#xD;&#xA;1 = TX中断发生(读取)&#xD;&#xA;1 = 清除TX中断(写)" />
+      </Register>
+      <Register Name="UART_BRDIV" Authority="RW" Address="0x40082010" Width="32" Description="波特率分频寄存器">
+        <Bit Name="DIV" Authority="RW" Bits="19-0" Description="波特率分频&#xD;&#xA;最小值为16" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="SPI">
+      <Register Name="SSP_CR0" Authority="RW" Address="0x40090000" Width="32" Description="SSP控制寄存器0">
+        <Bit Name="SCR" Authority="RW" Bits="15-8" Description="串行时钟分频位&#xD;&#xA;SCR用来产生发送和接收的比特率 &#xD;&#xA;比特率 = FPCLK/ (CPSDVR  (1 + SCR))&#xD;&#xA;CPSDVSR为2到254之间的偶数，在SSPCPSR寄存器设置，SCR为0到255之间任意值。" />
+        <Bit Name="SPH" Authority="RW" Bits="7" Description="SSPCLKOUT相位&#xD;&#xA;0 = 数据在第一个时钟沿捕捉&#xD;&#xA;1 = 数据在第二个时钟沿捕捉" />
+        <Bit Name="SPO" Authority="RW" Bits="6" Description="SSPCLK极性选择&#xD;&#xA;0 = 没有数据传送时，SSPCLK管脚的稳定状态为低电平&#xD;&#xA;1 = 没有数据传送时，SSPCLK管脚的稳定状态为高电平" />
+        <Bit Name="FRF" Authority="RW" Bits="5-4" Description="帧格式选择位&#xD;&#xA;Motorola SPI格式必须设置为00" />
+        <Bit Name="DSS" Authority="RW" Bits="3-0" Description="数据大小选择位&#xD;&#xA;0000–0010 = 保留&#xD;&#xA;0011 = 4位数据&#xD;&#xA;0100 = 5位数据&#xD;&#xA;0101 = 6位数据&#xD;&#xA;0110 = 7位数据&#xD;&#xA;0111 = 8位数据&#xD;&#xA;1000 = 9位数据&#xD;&#xA;1001 = 10位数据&#xD;&#xA;1010 = 11位数据&#xD;&#xA;1011 = 12位数据&#xD;&#xA;1100 = 13位数据&#xD;&#xA;1101 = 14位数据&#xD;&#xA;1110 = 15位数据&#xD;&#xA;1111 = 16位数据" />
+      </Register>
+      <Register Name="SSP_CR1" Authority="RW" Address="0x40090004" Width="32" Description="SSP控制寄存器1">
+        <Bit Name="LPTXOE" Authority="RW" Bits="8" Description="主机单线模式下，数据发送使能控制&#xD;&#xA;0 = 禁止数据发送&#xD;&#xA;1 = 使能数据发送" />
+        <Bit Name="LPMD" Authority="RW" Bits="7" Description="0 = SPI普通模式&#xD;&#xA;1 = 主机单线模式" />
+        <Bit Name="RXIFLSEL" Authority="RW" Bits="6-4" Description="接收FIFO中断触发点选择位&#xD;&#xA;001 接收FIFO占用&gt;= 1/8 &#xD;&#xA;010 接收FIFO占用&gt;= 1/4 &#xD;&#xA;100 接收FIFO占用&gt;= 1/2&#xD;&#xA;Others = 保留" />
+        <Bit Name="SOD" Authority="RW" Bits="3" Description="从机模式输出禁止位&#xD;&#xA;该位只有在从机模式(MS=1)下有效。在多从机系统里，SSP主机可以向系统里的所有从机广播，但是必须保证只有一个从机能够输出数据。在这样的系统里，多从机的RXD必须短接在一起，所以当SSP从机不应该输出数据驱动SSPTXD的时候，SOD位必须置1。 &#xD;&#xA;0 = SSP在从机模式可以驱动SSPTXD输出&#xD;&#xA;1 = SSP在从机模式不驱动SSPTXD输出" />
+        <Bit Name="MS" Authority="RW" Bits="2" Description="主机或者从机模式&#xD;&#xA;0 = 配置为主机&#xD;&#xA;1 = 配置为从机" />
+        <Bit Name="SSE" Authority="RW" Bits="1" Description="SSP使能位&#xD;&#xA;0 = SSP禁止&#xD;&#xA;1 = SSP使能" />
+        <Bit Name="LBM" Authority="RW" Bits="0" Description="回送模式位&#xD;&#xA;0 = 正常串行输出操作&#xD;&#xA;1 = 发送移位寄存器的输出内部短接到接收串行移位寄存器" />
+      </Register>
+      <Register Name="SSP_DR" Authority="RW" Address="0x40090008" Width="32" Description="SSP接收FIFO数据寄存器 (读该寄存器时)SSP发送FIFO数据寄存器 (写该寄存器时)">
+        <Bit Name="DATA" Authority="RW" Bits="15-0" Description="" />
+      </Register>
+      <Register Name="SSP_SR" Authority="RW" Address="0x4009000c" Width="32" Description="SSP状态寄存器">
+        <Bit Name="BSY" Authority="RO" Bits="4" Description="SSP工作状态标志位&#xD;&#xA;0 = SSP空闲&#xD;&#xA;1 = SSP正在发送并且/或者正在接收，或者发送FIFO非空" />
+        <Bit Name="RFF" Authority="RO" Bits="3" Description="接收FIFO是否已满状态位&#xD;&#xA;0 = 接收FIFO未满&#xD;&#xA;1 = 接收FIFO已满" />
+        <Bit Name="RNF" Authority="RO" Bits="2" Description="接收FIFO是否为空状态位&#xD;&#xA;0 = 接收FIFO为空&#xD;&#xA;1 = 接收FIFO非空" />
+        <Bit Name="TNF" Authority="RO" Bits="1" Description="发送FIFO是否已满状态位&#xD;&#xA;0 = 发送FIFO已满&#xD;&#xA;1 = 发送FIFO未满" />
+        <Bit Name="TFE" Authority="RO" Bits="0" Description="发送FIFO是否为空状态位&#xD;&#xA;0 = 发送FIFO非空&#xD;&#xA;1 = 发送FIFO空" />
+      </Register>
+      <Register Name="SSP_CPSR" Authority="RW" Address="0x40090010" Width="32" Description="SSP时钟分频寄存器">
+        <Bit Name="CPSDVSR" Authority="RW" Bits="7-0" Description="" />
+      </Register>
+      <Register Name="SSP_IMSCR" Authority="RW" Address="0x40090014" Width="32" Description="SSP中断使能/禁止寄存器">
+        <Bit Name="TXIM" Authority="RW" Bits="3" Description="发送FIFO中断 &#xD;&#xA;0 = 禁止发送FIFO中断&#xD;&#xA;1 = 使能发送FIFO中断" />
+        <Bit Name="RXIM" Authority="RW" Bits="2" Description="接收FIFO中断 &#xD;&#xA;0 = 禁止接收FIFO中断 (1/2, 1/4, or 1/8可选) &#xD;&#xA;1 = 使能接收FIFO中断 (1/2, 1/4, or 1/8可选)" />
+        <Bit Name="RTIM" Authority="RW" Bits="1" Description="接收超时中断 &#xD;&#xA;0 = 禁止RxFIFO超时中断&#xD;&#xA;1 = 使能RxFIFO超时中断" />
+        <Bit Name="RORIM" Authority="RW" Bits="0" Description="接收溢出中断&#xD;&#xA;0 = 禁止RxFIFO溢出中断&#xD;&#xA;1 = 使能RxFIFO溢出中断" />
+      </Register>
+      <Register Name="SSP_RISR" Authority="RW" Address="0x40090018" Width="32" Description="SSP中断原始状态寄存器">
+        <Bit Name="TXRIS" Authority="RO" Bits="3" Description="发送FIFO中断原始状态&#xD;&#xA;SSPTXINTR中断的原始状态，不管该中断使能与否" />
+        <Bit Name="RXRIS" Authority="RO" Bits="2" Description="接收FIFO中断原始状态&#xD;&#xA;SSPRXINTR中断的原始状态，不管该中断使能与否" />
+        <Bit Name="RTRIS" Authority="RO" Bits="1" Description="接收超时中断原始状态&#xD;&#xA;SSPRTINTR中断的原始状态，不管该中断使能与否" />
+        <Bit Name="RORRIS" Authority="RO" Bits="0" Description="接收中断原始状态&#xD;&#xA;SSPRORINTR中断的原始状态，不管该中断使能与否" />
+      </Register>
+      <Register Name="SSP_MISR" Authority="RW" Address="0x4009001c" Width="32" Description="SSP中断状态寄存器">
+        <Bit Name="TXMIS" Authority="RO" Bits="3" Description="发送FIFO中断原始状态&#xD;&#xA;SSPTXINTR中断的原始状态，该中断使能后才能读到，否则一直为0" />
+        <Bit Name="RXMIS" Authority="RO" Bits="2" Description="接收FIFO中断原始状态&#xD;&#xA;SSPRXINTR中断的原始状态，该中断使能后才能读到，否则一直为0" />
+        <Bit Name="RTMIS" Authority="RO" Bits="1" Description="接收超时中断原始状态&#xD;&#xA;SSPRTINTR中断的原始状态，该中断使能后才能读到，否则一直为0" />
+        <Bit Name="ROMIS" Authority="RO" Bits="0" Description="接收中断原始状态&#xD;&#xA;SSPRORINTR中断的原始状态，该中断使能后才能读到，否则一直为0" />
+      </Register>
+      <Register Name="SSP_ICR" Authority="RW" Address="0x40090020" Width="32" Description="SSP中断清除寄存器">
+        <Bit Name="RORIC" Authority="RW" Bits="1" Description="接收超时中断清除&#xD;&#xA;0 = 无效&#xD;&#xA;1 = 清除SSPRTINTR中断" />
+        <Bit Name="RTIC" Authority="RW" Bits="0" Description="接收溢出中断清除&#xD;&#xA;0 = 无效&#xD;&#xA;1 = 清除SSPRORINTR中断" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="I2C">
+      <Register Name="I2C_CR" Authority="RW" Address="0x400a0000" Width="32" Description="控制寄存器">
+        <Bit Name="BUS_CLR_EN" Authority="RW" Bits="11" Description="总线清除功能控制(只有在主机模式下有效)：&#xD;&#xA;0: 禁用&#xD;&#xA;1: 使能&#xD;&#xA;从机模式下该功能不工作。" />
+        <Bit Name="RXFULL_HLD" Authority="RW" Bits="9" Description="当接收FIFO溢出时的总线控制&#xD;&#xA;0: 不占用总线&#xD;&#xA;1: 占用总线 (hold bus)" />
+        <Bit Name="TX_EMPTY_CON" Authority="RW" Bits="8" Description="TX_EMPTY (I2C_RISR)状态控制&#xD;&#xA;0: 当发送缓冲的指针小于或则等于I2C_TX_FLSEL寄存器设置的阈值时，TX_EMPTY位置1&#xD;&#xA;1: 当发送缓冲的指针小于或则等于I2C_TX_FLSEL寄存器设置的阈值，并且最近一个地址或者数据的传输完成时，TX_EMPTY位置1" />
+        <Bit Name="STOP_DET_CON" Authority="RW" Bits="7" Description="STOP_DET中断控制 (只在从机模式下有效):&#xD;&#xA;0: 不管被寻址成功与否，都产生STOP_DET中断&#xD;&#xA;1: 只有被成功寻址到，才产生STOP_DET&#xD;&#xA;注意：在general call寻址模式下，如果STOP_DET_CON=1，即使该从机设备产生了ACK去响应general call地址，该设备也不会产生STOP_DET中断。&#xD;&#xA;只有当传输地址跟从机地址(SADDR)匹配的时候，才会产生STOP_DET中断。" />
+        <Bit Name="SLAVEn" Authority="RW" Bits="6" Description="从机模式控制位&#xD;&#xA;0 = 使能从机模式               1 = 禁用从机模式&#xD;&#xA;注意如果此位写了0，那么第0位MASTER也必须写0。" />
+        <Bit Name="RESTART_EN" Authority="RW" Bits="5" Description="重复起始位控制&#xD;&#xA;0: 禁止&#xD;&#xA;1: 使能&#xD;&#xA;控制主机模式下是否发送重复起始位，有些老的从机设备不支持重复起始位。" />
+        <Bit Name="MASTER_10BIT" Authority="RW" Bits="4" Description="主机模式寻址控制&#xD;&#xA;0: 7位寻址&#xD;&#xA;1: 10位寻址" />
+        <Bit Name="SLAVE_10BIT" Authority="RW" Bits="3" Description="从机模式寻址控制&#xD;&#xA;0: 7位寻址&#xD;&#xA;1: 10位寻址" />
+        <Bit Name="SPEED" Authority="RW" Bits="2-1" Description="I2C工作速度&#xD;&#xA;0x0: 无效&#xD;&#xA;0x1: 标准模式 (0 到 100 Kb/s)&#xD;&#xA;0x2: 高速模式 (&lt;=400 Kb/s) 或超高速模式 (&lt;=1000 Kb/s)&#xD;&#xA;0x3: 无效" />
+        <Bit Name="MASTER" Authority="RW" Bits="0" Description="主机模式控制位&#xD;&#xA;0: 禁用主机模式&#xD;&#xA;1: 使能主机模式&#xD;&#xA;注意如果此位写了1，那么第6位SLAVEn也必须写1." />
+      </Register>
+      <Register Name="I2C_TADDR" Authority="RW" Address="0x400a0004" Width="32" Description="目标地址寄存器">
+        <Bit Name="SPECIAL" Authority="RW" Bits="11-10" Description="I2C地址的特殊命令控制，表示I2C的操作类型：普通地址，general call或者起始字节。&#xD;&#xA;0x0: 普通I2C_TADDR地址&#xD;&#xA;0x1: 普通I2C_TADDR地址&#xD;&#xA;0x2: General Call地址 – 在发送General Call后，只有写操作有效，任何尝试读的操作都会导致RISR寄存器中的第6位(TX_ABRT)位变1。I2C会一直保持在General Call模式直到SPECIAL位被配置为普通地址。&#xD;&#xA;0x3: 起始字节 (START BYTE)" />
+        <Bit Name="TADDR" Authority="RW" Bits="9-0" Description="主机模式下传输的目标地址。&#xD;&#xA;当发送general call的时候，该位无效。&#xD;&#xA;产生起始字节时，CPU只需要对该位写一次。" />
+      </Register>
+      <Register Name="I2C_SADDR" Authority="RW" Address="0x400a0008" Width="32" Description="从机地址寄存器">
+        <Bit Name="SADDR" Authority="RW" Bits="9-0" Description="当I2C工作为从机时， SADDR为从机地址。7位寻址模式下，只有I2C_SADDR[6:0]有效。&#xD;&#xA;该寄存器只有在I2C接口被禁用(I2C_ENABLE[0]=0)的时候可写。&#xD;&#xA;&#xD;&#xA;注意：从机地址不能配置成保留地址：0x00 to 0x07, 或者 0x78 到 0x7f. 如果I2C_SADDR或者I2C_TADDR被配置成以上保留地址，那么I2C有可能工作异常。" />
+      </Register>
+      <Register Name="I2C_DATA_CMD" Authority="RW" Address="0x400a0010" Width="32" Description="数据和命令寄存器">
+        <Bit Name="RESTART" Authority="RW" Bits="10" Description="重复起始位(RESTART)控制。&#xD;&#xA;0: 如果I2C_CR.RESTART_EN为1，并且传输的方向发生改变，那么I2C会发送一个重复起始位；如果I2C_CR.RESTART_EN为0，那么I2C会发送停止位并且跟着再重新发送一个起始位。&#xD;&#xA;1: 如果I2C_CR.RESTART_EN为1，不管传输方向是否发生改变，I2C都会在数据发送或者接收前(根据CMD位的值)发送一个重复起始位；如果I2C_CR.RESTART_EN为0，那么I2C会发送停止位并且跟着再重新发送一个起始位。" />
+        <Bit Name="STOP" Authority="RW" Bits="9" Description="停止位(STOP)控制。&#xD;&#xA;0: 不管发送FIFO是否为空，都不发送停止位。如果发送FIFO非空，那么主机根据CMD位的值继续当前的发送或者接收传输。如果发送FIFO为空，那么主机将SCL拉低占用总线，直到发送FIFO中有新的命令。&#xD;&#xA;1: 不管发送FIFO是否为空，都在当前字节传输完成后发送停止位。如果发送FIFO非空，那么主机会立即发送起始位申请总线仲裁来尝试重新开始一个新的传输。" />
+        <Bit Name="CMD" Authority="RW" Bits="8" Description="读写控制。&#xD;&#xA;1: 读&#xD;&#xA;0: 写&#xD;&#xA;&#xD;&#xA;在I2C工作在从机模式下，该位不能控制传输的方向。在工作在主机模式时，该位用来控制传输方向。&#xD;&#xA;当一个命令被写入发送FIFO时，该位被用来区分读和写。在从机接收模式下，该位为无效操作位，因为不需要对该位进行操作。在从机发送模式下，0表示I2C_DATA_CMD中的数据需要被发送。" />
+        <Bit Name="DATA" Authority="RW" Bits="7-0" Description="I2C总线发送或者收到的数据。&#xD;&#xA;&#xD;&#xA;在I2C进行读操作的时候，如果写这个寄存器，那么写操作将无效，如果读这个寄存器，那么返回的是I2C接口从总线上收到的数据。" />
+      </Register>
+      <Register Name="I2C_SS_SCLH" Authority="RW" Address="0x400a0014" Width="32" Description="标准模式SCL高电平长度计数寄存器">
+        <Bit Name="SCL_HCNT" Authority="RW" Bits="15-0" Description="该寄存器设置标准速度模式下，SCL时钟高电平的周期长度计数值。为了保证IO时序的正确性，该寄存器必须在任何I2C总线传输开始之前设置。&#xD;&#xA;该寄存器必须在I2C接口被禁用(I2C_ENABLE[0]=0)时进行配置。&#xD;&#xA;可配置的最小值为6，硬件上禁止写任何比6小的数，如果尝试写比6小的数，结果就是寄存器的值为6。 &#xD;&#xA;&#xD;&#xA;注意：该寄存器的值不能超过65525，因为该I2C模块使用了一个16位的计数器来检测I2C总线的空闲状态，当这个计数器的值达到SCL_HCNT+10的时候，标记为空闲。" />
+      </Register>
+      <Register Name="I2C_SS_SCLL" Authority="RW" Address="0x400a0018" Width="32" Description="标准模式SCL低电平长度计数寄存器">
+        <Bit Name="SCL_LCNT" Authority="RW" Bits="15-0" Description="该寄存器设置标准速度模式下，SCL时钟低电平的周期长度计数值。为了保证IO时序的正确性，该寄存器必须在任何I2C总线传输开始之前设置。&#xD;&#xA;该寄存器必须在I2C接口被禁用(I2C_ENABLE[0]=0)时进行配置。&#xD;&#xA;可配置的最小值为8，硬件上禁止写任何比8小的数，如果尝试写比8小的数，结果就是寄存器的值为8。 " />
+      </Register>
+      <Register Name="I2C_FS_SCLH" Authority="RW" Address="0x400a001c" Width="32" Description="高速模式SCL高电平长度计数寄存器">
+        <Bit Name="SCL_HCNT" Authority="RW" Bits="15-0" Description="该寄存器设置高速模式下，SCL时钟高电平的周期长度计数值。为了保证IO时序的正确性，该寄存器必须在任何I2C总线传输开始之前设置。&#xD;&#xA;该寄存器必须在I2C接口被禁用(I2C_ENABLE[0]=0)时进行配置。&#xD;&#xA;可配置的最小值为6，硬件上禁止写任何比6小的数，如果尝试写比6小的数，结果就是寄存器的值为6。 " />
+      </Register>
+      <Register Name="I2C_FS_SCLL" Authority="RW" Address="0x400a0020" Width="32" Description="高速模式SCL低电平长度计数寄存器">
+        <Bit Name="SCL_LCNT" Authority="RW" Bits="15-0" Description="该寄存器设置高速或者超高速模式下，SCL时钟低电平的周期长度计数值。为了保证IO时序的正确性，该寄存器必须在任何I2C总线传输开始之前设置。&#xD;&#xA;该寄存器必须在I2C接口被禁用(I2C_ENABLE[0]=0)时进行配置。&#xD;&#xA;可配置的最小值为8，硬件上禁止写任何比8小的数，如果尝试写比8小的数，结果就是寄存器的值为8。 " />
+      </Register>
+      <Register Name="I2C_RX_FLSEL" Authority="RW" Address="0x400a002c" Width="32" Description="接收FIFO阈值寄存器">
+        <Bit Name="RX_FLSEL" Authority="RW" Bits="7-0" Description="接收FIFO阈值。&#xD;&#xA;&#xD;&#xA;FIFO中数据的数量超过或者等于该阈值时，将触发RX_FULL中断(I2C_RISR的第2位)。该阈值不能超过FIFO深度(8)，如果设置的值超过了FIFO深度，那么实际写入的值为FIFO的深度值。&#xD;&#xA;该寄存器的值0表示有1个数据，7表示阈值为8个数据。" />
+      </Register>
+      <Register Name="I2C_TX_FLSEL" Authority="RW" Address="0x400a0030" Width="32" Description="发送FIFO阈值寄存器">
+        <Bit Name="TX_FLSEL" Authority="RW" Bits="7-0" Description="发送FIFO阈值。&#xD;&#xA;&#xD;&#xA;FIFO中数据的数量少于或者等于该阈值时，将触发TX_EMPTY中断(I2C_RISR的第4位)。该阈值不能超过FIFO深度(8)，如果设置的值超过了FIFO深度，那么实际写入的值为FIFO的深度值。&#xD;&#xA;该寄存器的值0表示0个数据，7表示阈值为8个数据。" />
+      </Register>
+      <Register Name="I2C_RX_FL" Authority="RW" Address="0x400a0034" Width="32" Description="接收FIFO状态寄存器">
+        <Bit Name="RX_FL" Authority="RO" Bits="3-0" Description="接收FIFO中有效数据的个数。 " />
+      </Register>
+      <Register Name="I2C_TX_FL" Authority="RW" Address="0x400a0038" Width="32" Description="发送FIFO状态寄存器">
+        <Bit Name="TX_FL" Authority="RO" Bits="3-0" Description="发送FIFO中有效数据的个数。 " />
+      </Register>
+      <Register Name="I2C_ENABLE" Authority="RW" Address="0x400a003c" Width="32" Description="使能寄存器">
+        <Bit Name="RECOVER_EN" Authority="RW" Bits="3" Description="SDA被拉低锁死后的恢复功能控制&#xD;&#xA;0: 禁用&#xD;&#xA;1: 使能&#xD;&#xA;&#xD;&#xA;如果TX_ABRT中断(I2C_ABRT[17])显示SDA被拉低锁死，那么该位可以控制使能SDA的恢复机制(发送最多9个SCL时钟和停止位尝试释放SDA)，然后该位自动清零。" />
+        <Bit Name="ABORT" Authority="RW" Bits="1" Description="中止I2C传输。&#xD;&#xA;0: 中止操作没有发生或则中止操作已完成&#xD;&#xA;1: 中止操作正在进行&#xD;&#xA;&#xD;&#xA;在主机模式下，软件可以将该位置1，用来中止I2C传输。只有在I2C使能状态下(ENABLE=1)，才可以对该位置1，否则任何写操作都无效。发起中止操作后，I2C会在当前传输完成后产生一个停止位并且清空发送FIFO，然后在中止操作后产生TX_ABRT中断。ABORT位会在中止操作后自动清零。" />
+        <Bit Name="ENABLE" Authority="RW" Bits="0" Description="使能I2C模块&#xD;&#xA;0：禁用&#xD;&#xA;1：使能&#xD;&#xA;&#xD;&#xA;当I2C被禁用，会发生下面的事件：&#xD;&#xA;- 发送FIFO和接收FIFO被清空&#xD;&#xA;- 状态标志位仍然保持有效状态直到I2C进入空闲状态&#xD;&#xA;如果模块正在发送状态，那么它会在当前传输完成后停止并且删除发送缓冲中的内容。如果模块正在接收，那么I2C会在当前字节接收完成后停止，并且不发送应答位。" />
+      </Register>
+      <Register Name="I2C_STATUS" Authority="RW" Address="0x400a0040" Width="32" Description="状态寄存器">
+        <Bit Name="ENABLE" Authority="RO" Bits="15-12" Description="同I2C_ENABLE" />
+        <Bit Name="RECOVER_FAIL" Authority="RO" Bits="11" Description="SDA拉低锁死的恢复状态&#xD;&#xA;0: 恢复没有失败&#xD;&#xA;1: 恢复失败&#xD;&#xA;&#xD;&#xA;该位表示SDA拉低锁死后的恢复机制是否成功。" />
+        <Bit Name="SLV_BUSY" Authority="RO" Bits="6" Description="从机模式的状态机工作状态 &#xD;&#xA;0: 从机模式状态机处于空闲状态，I2C的从机部分不在工作&#xD;&#xA;1: 从机模式状态机处于工作状态，I2C的从机部分正在工作" />
+        <Bit Name="MST_BUSY" Authority="RO" Bits="5" Description="主机模式的状态机工作状态 &#xD;&#xA;0: 主机模式状态机处于空闲状态，I2C的主机部分不在工作&#xD;&#xA;1: 主机模式状态机处于工作状态，I2C的主机部分正在工作&#xD;&#xA;注意：I2C_STATUS[0] – 也就是工作状态位 – 是MST_BUSY和SLV_BUSY位的或逻辑结果。" />
+        <Bit Name="RFF" Authority="RO" Bits="4" Description="接收FIFO已满 &#xD;&#xA;0: 接收FIFO未满&#xD;&#xA;1: 接收FIFO已满&#xD;&#xA;&#xD;&#xA;当接收FIFO已满时置1，当FIFO含有至少1个或者多个空位时会被清0。" />
+        <Bit Name="RFNE" Authority="RO" Bits="3" Description="接收FIFO非空&#xD;&#xA;0: 接收FIFO为空&#xD;&#xA;1: 接收FIFO非空&#xD;&#xA;&#xD;&#xA;当接收FIFO含有至少1个或者多个数据时置1，当FIFO为空时会被清0。" />
+        <Bit Name="TFE" Authority="RO" Bits="2" Description="发送FIFO为空 &#xD;&#xA;0: 发送FIFO非空&#xD;&#xA;1: 发送FIFO为空&#xD;&#xA;&#xD;&#xA;当发送FIFO完全为空时置1，当FIFO含有至少1个或者多个数据时会被清0。该位不会产生中断。" />
+        <Bit Name="TFNF" Authority="RO" Bits="1" Description="发送FIFO未满 &#xD;&#xA;0: 发送FIFO已满&#xD;&#xA;1: 发送FIFO未满&#xD;&#xA;&#xD;&#xA;当发送FIFO含有至少1个或者多个数据时置1，当FIFO为满时会被清0。" />
+        <Bit Name="BUSY" Authority="RO" Bits="0" Description="I2C工作状态&#xD;&#xA;0: 空闲&#xD;&#xA;1: 工作中" />
+      </Register>
+      <Register Name="I2C_SDA_TSETUP" Authority="RW" Address="0x400a0048" Width="32" Description="SDA Setup时间寄存器">
+        <Bit Name="SDA_TSETUP" Authority="RW" Bits="7-0" Description="Setup时间的长度使用下面公式计算：&#xD;&#xA;&#xD;&#xA;[(SDA_TSETUP - 1) * (PCLK周期)]&#xD;&#xA;&#xD;&#xA;如果需要的延时是1000ns，PCLK频率是10MHz，那么建议设置SDA_TSETUP的值为11.&#xD;&#xA;SDA_TSETUP的最小值为2." />
+      </Register>
+      <Register Name="I2C_SDA_THOLD" Authority="RW" Address="0x400a004c" Width="32" Description="SDA Hold 时间寄存器">
+        <Bit Name="SDA_RX_THOLD" Authority="RW" Bits="23-16" Description="当I2C作为接收端时，设置SDA的hold时间，单位为PCLK的周期。" />
+        <Bit Name="SDA_TX_THOLD" Authority="RW" Bits="15-0" Description="当I2C作为发送端时，设置SDA的hold时间，单位为PCLK的周期。&#xD;&#xA;&#xD;&#xA;SDA_TX_THOLD的值必须大于最小的hold时间：&#xD;&#xA;- 主机模式下1个时钟周期&#xD;&#xA;- 从机模式下7个时钟周期" />
+      </Register>
+      <Register Name="I2C_SPKLEN" Authority="RW" Address="0x400a0050" Width="32" Description="毛刺干扰滤波控制寄存器">
+        <Bit Name="SPKLEN" Authority="RW" Bits="7-0" Description="该寄存器设置毛刺干扰过滤逻辑可以过滤的SCL和SDA上最长的毛刺信号长度，以PCLK周期为单位。&#xD;&#xA;该寄存器必须在I2C总线传输开始之前设置，以保证稳定的传输。&#xD;&#xA;该寄存器只有在I2C接口被禁止(I2C_ENABLE[0]=0)的时候可以设置，否则写操作无效。可以设置的最小值为1，硬件禁止写比1小的值，写0仍然为1。" />
+      </Register>
+      <Register Name="I2C_MISR" Authority="RW" Address="0x400a0058" Width="32" Description="中断状态寄存器">
+        <Bit Name="SCL_S_LOW" Authority="RO" Bits="14" Description="" />
+        <Bit Name="RESTART_DET" Authority="RO" Bits="12" Description="" />
+        <Bit Name="GEN_CALL" Authority="RO" Bits="11" Description="" />
+        <Bit Name="START_DET" Authority="RO" Bits="10" Description="" />
+        <Bit Name="STOP_DET" Authority="RO" Bits="9" Description="" />
+        <Bit Name="BUSY" Authority="RO" Bits="8" Description="" />
+        <Bit Name="RX_DONE" Authority="RO" Bits="7" Description="" />
+        <Bit Name="TX_ABRT" Authority="RO" Bits="6" Description="" />
+        <Bit Name="RD_REQ" Authority="RO" Bits="5" Description="" />
+        <Bit Name="TX_EMPTY" Authority="RO" Bits="4" Description="" />
+        <Bit Name="TX_OVER" Authority="RO" Bits="3" Description="" />
+        <Bit Name="RX_FULL" Authority="RO" Bits="2" Description="" />
+        <Bit Name="RX_OVER" Authority="RO" Bits="1" Description="" />
+        <Bit Name="RX_UNDER" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="I2C_IMCR" Authority="RW" Address="0x400a005c" Width="32" Description="中断使能寄存器">
+        <Bit Name="SCL_S_LOW" Authority="RW" Bits="14" Description="" />
+        <Bit Name="RESTART_DET" Authority="RW" Bits="12" Description="" />
+        <Bit Name="GEN_CALL" Authority="RW" Bits="11" Description="" />
+        <Bit Name="START_DET" Authority="RW" Bits="10" Description="" />
+        <Bit Name="STOP_DET" Authority="RW" Bits="9" Description="" />
+        <Bit Name="BUSY" Authority="RW" Bits="8" Description="" />
+        <Bit Name="RX_DONE" Authority="RW" Bits="7" Description="" />
+        <Bit Name="TX_ABRT" Authority="RW" Bits="6" Description="" />
+        <Bit Name="RD_REQ" Authority="RW" Bits="5" Description="" />
+        <Bit Name="TX_EMPTY" Authority="RW" Bits="4" Description="" />
+        <Bit Name="TX_OVER" Authority="RW" Bits="3" Description="" />
+        <Bit Name="RX_FULL" Authority="RW" Bits="2" Description="" />
+        <Bit Name="RX_OVER" Authority="RW" Bits="1" Description="" />
+        <Bit Name="RX_UNDER" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="I2C_RISR" Authority="RW" Address="0x400a0060" Width="32" Description="原始中断状态寄存器">
+        <Bit Name="SCL_S_LOW" Authority="RO" Bits="14" Description="" />
+        <Bit Name="RESTART_DET" Authority="RO" Bits="12" Description="" />
+        <Bit Name="GEN_CALL" Authority="RO" Bits="11" Description="" />
+        <Bit Name="START_DET" Authority="RO" Bits="10" Description="" />
+        <Bit Name="STOP_DET" Authority="RO" Bits="9" Description="" />
+        <Bit Name="BUSY" Authority="RO" Bits="8" Description="" />
+        <Bit Name="RX_DONE" Authority="RO" Bits="7" Description="" />
+        <Bit Name="TX_ABRT" Authority="RO" Bits="6" Description="" />
+        <Bit Name="RD_REQ" Authority="RO" Bits="5" Description="" />
+        <Bit Name="TX_EMPTY" Authority="RO" Bits="4" Description="" />
+        <Bit Name="TX_OVER" Authority="RO" Bits="3" Description="" />
+        <Bit Name="RX_FULL" Authority="RO" Bits="2" Description="" />
+        <Bit Name="RX_OVER" Authority="RO" Bits="1" Description="" />
+        <Bit Name="RX_UNDER" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="I2C_ICR" Authority="RW" Address="0x400a0064" Width="32" Description="中断清除寄存器">
+        <Bit Name="SCL_S_LOW" Authority="RW" Bits="14" Description="" />
+        <Bit Name="RESTART_DET" Authority="RW" Bits="12" Description="" />
+        <Bit Name="GEN_CALL" Authority="RW" Bits="11" Description="" />
+        <Bit Name="START_DET" Authority="RW" Bits="10" Description="" />
+        <Bit Name="STOP_DET" Authority="RW" Bits="9" Description="" />
+        <Bit Name="BUSY" Authority="RW" Bits="8" Description="" />
+        <Bit Name="RX_DONE" Authority="RW" Bits="7" Description="" />
+        <Bit Name="TX_ABRT" Authority="RW" Bits="6" Description="" />
+        <Bit Name="RD_REQ" Authority="RW" Bits="5" Description="" />
+        <Bit Name="TX_EMPTY" Authority="RW" Bits="4" Description="" />
+        <Bit Name="TX_OVER" Authority="RW" Bits="3" Description="" />
+        <Bit Name="RX_FULL" Authority="RW" Bits="2" Description="" />
+        <Bit Name="RX_OVER" Authority="RW" Bits="1" Description="" />
+        <Bit Name="RX_UNDER" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="I2C_SCL_TOUT" Authority="RW" Address="0x400a006c" Width="32" Description="SCL锁死超时控制寄存器">
+        <Bit Name="SCL_TOUT" Authority="RW" Bits="31-0" Description="" />
+      </Register>
+      <Register Name="I2C_SDA_TOUT" Authority="RW" Address="0x400a0070" Width="32" Description="SDA锁死超时控制寄存器">
+        <Bit Name="SDA_TOUT" Authority="RW" Bits="31-0" Description="" />
+      </Register>
+      <Register Name="I2C_TX_ABRT" Authority="RW" Address="0x400a0074" Width="32" Description="发送中止状态寄存器">
+        <Bit Name="SDA_S_LOW" Authority="RO" Bits="17" Description="只在主机模式有效。主机检测到SDA被锁死在低电平超过I2C_SDA_TOUT个PCLK周期。" />
+        <Bit Name="USER_ABRT" Authority="RO" Bits="16" Description="只在主机模式有效。主机检测到发送中止(IC_ENABLE[1])." />
+        <Bit Name="SLVRD_INTX" Authority="RO" Bits="15" Description="1: 当处理器(从机模式)响应了一个给远程主机发送数据的请求时，用户对I2C_DATA_CMD寄存器的第8位CMD写1。" />
+        <Bit Name="SLV_ARBLOST" Authority="RO" Bits="14" Description="1: 从机在发送数据到远端主机时丢失了总线。I2C_TX_ABRT[12]会被同时置1。" />
+        <Bit Name="SLVFLUSH_TX" Authority="RO" Bits="13" Description="1: 从机收到了一个读命令并且发送FIFO中有数据，所以从机产生了一个TX_ABRT中断去清除发送FIFO中的旧数据。" />
+        <Bit Name="ARB_LOST" Authority="RO" Bits="12" Description="1: 主机丢失了仲裁，或者在I2C_TX_ABRT[14]置1的情况下从机发送端丢失了仲裁" />
+        <Bit Name="MASTER_DIS" Authority="RO" Bits="11" Description="1: 用户在主机模式没有使能的情况下尝试主机操作" />
+        <Bit Name="10B_RD_NRSTRT" Authority="RO" Bits="10" Description="1: 重复起始位被禁止(RESTART_EN (I2C_CR[5]) = 0)并且主机在10位寻址模式发送了一个读命令。" />
+        <Bit Name="SBYTE_NRSTRT" Authority="RO" Bits="9" Description="1: 重复起始位被禁止(RESTART_EN (I2C_CR[5]) = 0)并且用户正在尝试发送一个起始字节。&#xD;&#xA;&#xD;&#xA;如果要清除第9位，SBYTE_NRSTRT的触发源必须固定；重复起始位必须使能(I2C_CR[5]=1)，SPECIAL位不能为0x3 (I2C_TADDR[11:10])。一旦触发源固定，该位就可以跟清除其它位的方法一样进行清除，否则该位在清除后又会被置起。" />
+        <Bit Name="SBYTE_ACK" Authority="RO" Bits="7" Description="1: 主机发送了一个起始字节并且这个起始字节被应答了(错误行为)" />
+        <Bit Name="GCALL_READ" Authority="RO" Bits="5" Description="1: I2C在主机模式发送了一个general call但是用户的程序在general call后从总线上读数据 (I2C_DATA_CMD[9]被设置为1)" />
+        <Bit Name="GCALL_NACK" Authority="RO" Bits="4" Description="1: I2C在主机模式发送了一个general call并且总线上没有从机应答该general call" />
+        <Bit Name="TXDATA_NACK" Authority="RO" Bits="3" Description="1: 该位只在主机模式下有效。主机收到了地址的应答，但是当它发送数据到该地址时，却没有收到任何从机的应答。" />
+        <Bit Name="10ADDR2_NACK" Authority="RO" Bits="2" Description="1: 主机工作在10位寻址模式并且没有任何从机应答主机发送的10位地址的第二个字节" />
+        <Bit Name="10ADDR1_NACK" Authority="RO" Bits="1" Description="1: 主机工作在10位寻址模式并且没有任何从机应答主机发送的10位地址的第一个字节" />
+        <Bit Name="7ADDR_NACK" Authority="RO" Bits="0" Description="1: 主机工作在7位寻址模式并且没有任何从机应答主机发送的地址" />
+      </Register>
+      <Register Name="I2C_GCALL" Authority="RW" Address="0x400a0078" Width="32" Description="General Call控制寄存器">
+        <Bit Name="ACK_GCALL" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="I2C_NACK" Authority="RW" Address="0x400a007c" Width="32" Description="从机NACK控制寄存器">
+        <Bit Name="NACK" Authority="RW" Bits="0" Description="NACK的产生控制 &#xD;&#xA;1: 在数据字节收到后产生NACK&#xD;&#xA;0: 按正常情况产生NACK/ACK&#xD;&#xA;&#xD;&#xA;该位只有在I2C工作在从机接收端时有效。如果该位为1，I2C在收到一个数据字节后只会产生一个NACK，此后的数据传输会被中止并且收到的数据不会被存入接收缓冲区内。如果该位为0，I2C按照正常的情况产生NACK/ACK。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="SIO">
+      <Register Name="SIO_CR" Authority="RW" Address="0x400b0000" Width="32" Description="控制寄存器">
+        <Bit Name="TCKPRS" Authority="RW" Bits="31-16" Description="发送时钟分频系数。&#xD;&#xA;发送分频时钟TXCLK的频率：FTXCLK = FPCLK / (TCKPRS +1)" />
+        <Bit Name="MODE" Authority="RW" Bits="8" Description="SIO发送与接收控制。&#xD;&#xA;0h：发送模式。&#xD;&#xA;1h：接收模式。" />
+        <Bit Name="DEBCKS" Authority="RW" Bits="7-4" Description="接收去抖滤波时钟分频系数。&#xD;&#xA;去抖滤波分频时钟DBCLK的频率：FDBCLK = FPCLK / (DEBCKS +1)" />
+        <Bit Name="DEBDEP" Authority="RW" Bits="3-1" Description="接收去抖滤波检查周期数。&#xD;&#xA;0h：1个周期&#xD;&#xA;1h：2个周期&#xD;&#xA;2h：3个周期&#xD;&#xA;3h：4个周期&#xD;&#xA;4h：5个周期&#xD;&#xA;5h：6个周期&#xD;&#xA;6h：7个周期&#xD;&#xA;7h：8个周期" />
+        <Bit Name="CLKEN" Authority="RW" Bits="0" Description="SIO时钟使能控制。&#xD;&#xA;0h：工作时钟禁止。&#xD;&#xA;1h：工作时钟使能。" />
+      </Register>
+      <Register Name="SIO_TXCR0" Authority="RW" Address="0x400b0004" Width="32" Description="发送控制寄存器0">
+        <Bit Name="TXCNT" Authority="RW" Bits="15-8" Description="发送模式时，发送序列的长度控制。&#xD;&#xA;当发送开始时，发送计数器在完成一个对象的发送后自动增加1。当发送到TXCNT+1个对象完成后，结束当前发送。" />
+        <Bit Name="TXBUFLEN" Authority="RW" Bits="7-4" Description="发送数据BUFFER长度。&#xD;&#xA;当发送开始时，发送计数器在完成一个对象的发送后自动增加1。当发送到TXBUFLEN +1个对象完成后，若发送BIT数仍小于TXCNT+1则重新载入SIO_TXBUF并发送。" />
+        <Bit Name="TDIR" Authority="RW" Bits="2" Description="发送数据方向。&#xD;&#xA;0h：将SIO_TXBUF数据按LSB到MSB方式移出。&#xD;&#xA;1h：将SIO_TXBUF数据按MSB到LSB方式移出。" />
+        <Bit Name="IDLEST" Authority="RW" Bits="1-0" Description="空闲时输出状态选择。&#xD;&#xA;0h：高阻态。&#xD;&#xA;1h：高电平输出。&#xD;&#xA;2h：低电平输出。&#xD;&#xA;3h：高阻态。" />
+      </Register>
+      <Register Name="SIO_TXCR1" Authority="RW" Address="0x400b0008" Width="32" Description="发送控制寄存器1">
+        <Bit Name="LSQ" Authority="RW" Bits="31-24" Description="DL对象的序列定义&#xD;&#xA;发送LSQ序列时,按LSQ[0]到LSQ[7]的顺序依次移位发送, 发送序列长度由SIO_TXCR1[13:11] (LENOBL)决定。" />
+        <Bit Name="HSQ" Authority="RW" Bits="23-16" Description="DH对象的序列定义&#xD;&#xA;发送HSQ序列时,按HSQ[0]到HSQ[7]的顺序依次移位发送, 发送序列长度由SIO_TXCR1[10:8] (LENOBH)决定。" />
+        <Bit Name="LENOBL" Authority="RW" Bits="13-11" Description="DL对象序列长度选择&#xD;&#xA;0h：1bit。&#xD;&#xA;1h：2bit。&#xD;&#xA;2h：3bit。&#xD;&#xA;……&#xD;&#xA;7h：8bit。" />
+        <Bit Name="LENOBH" Authority="RW" Bits="10-8" Description="DH对象序列长度选择&#xD;&#xA;0h：1bit。&#xD;&#xA;1h：2bit。&#xD;&#xA;2h：3bit。&#xD;&#xA;……&#xD;&#xA;7h：8bit。" />
+        <Bit Name="D1DUR" Authority="RW" Bits="7-5" Description="D1状态的时间长度&#xD;&#xA;(D1DUR+1) x Ttxshft" />
+        <Bit Name="D0DUR" Authority="RW" Bits="4-2" Description="D0状态的时间长度&#xD;&#xA;(D0DUR+1) x Ttxshft" />
+      </Register>
+      <Register Name="SIO_TXBUF" Authority="RW" Address="0x400b000c" Width="32" Description="发送数据缓存寄存器">
+        <Bit Name="DATA15" Authority="RW" Bits="31-30" Description="" />
+        <Bit Name="DATA14" Authority="RW" Bits="29-28" Description="" />
+        <Bit Name="DATA13" Authority="RW" Bits="27-26" Description="" />
+        <Bit Name="DATA12" Authority="RW" Bits="25-24" Description="" />
+        <Bit Name="DATA11" Authority="RW" Bits="23-22" Description="" />
+        <Bit Name="DATA10" Authority="RW" Bits="21-20" Description="" />
+        <Bit Name="DATA9" Authority="RW" Bits="19-18" Description="" />
+        <Bit Name="DATA8" Authority="RW" Bits="17-16" Description="" />
+        <Bit Name="DATA7" Authority="RW" Bits="15-14" Description="" />
+        <Bit Name="DATA6" Authority="RW" Bits="13-12" Description="" />
+        <Bit Name="DATA5" Authority="RW" Bits="11-10" Description="" />
+        <Bit Name="DATA4" Authority="RW" Bits="9-8" Description="" />
+        <Bit Name="DATA3" Authority="RW" Bits="7-6" Description="" />
+        <Bit Name="DATA2" Authority="RW" Bits="5-4" Description="" />
+        <Bit Name="DATA1" Authority="RW" Bits="3-2" Description="" />
+        <Bit Name="DATA0" Authority="RW" Bits="1-0" Description="" />
+      </Register>
+      <Register Name="SIO_RXCR0" Authority="RW" Address="0x400b0010" Width="32" Description="接收控制寄存器0">
+        <Bit Name="RMODE" Authority="RW" Bits="31-30" Description="采样模式&#xD;&#xA;0h: 在当前bit采样结束后, 检测到SIO端口有沿跳变, 才开始采样下一个数据&#xD;&#xA;1h: 在当前bit采样结束后, 无论SIO端口是否有沿跳变均立即开始采样下一个数据&#xD;&#xA;其他: 无效模式" />
+        <Bit Name="RDIR" Authority="RW" Bits="29" Description="接收数据方向。&#xD;&#xA;0h: 接收到的数据，即发送端的数据是从MSB到LSB移出。依次从第0位开始移入RXBUF。&#xD;&#xA;1h: 接收到的数据，即发送端的数据是从LSB到MSB移出。依次从第31位开始移入RXBUF" />
+        <Bit Name="ALIGNEN" Authority="RW" Bits="28" Description="采样对准使能&#xD;&#xA;0h: 不使能采样对准.&#xD;&#xA;1h: 使能采样对准, 在采样触发沿对准采样结果" />
+        <Bit Name="HITHR" Authority="RW" Bits="20-16" Description="接收原始数据抽取高的判断阈值&#xD;&#xA;当SIO_RXCR0[15:10] （EXTRACT）为20H时，在接收到的原始数据的1的个数大于HITHR时, 采样提取为1否则抽取为 0。" />
+        <Bit Name="EXTRACT" Authority="RW" Bits="15-10" Description="采样提取策略设置。&#xD;&#xA;0h：接收到的原始数据的第0位作为提取值。&#xD;&#xA;1h：接收到的原始数据的第1位作为提取值。&#xD;&#xA;2h：接收到的原始数据的第3位作为提取值。&#xD;&#xA;……&#xD;&#xA;1Dh：接收到的原始数据的第29位作为提取值。&#xD;&#xA;1Eh：接收到的原始数据的第30位作为提取值。&#xD;&#xA;1Fh：接收到的原始数据的第31位作为提取值。&#xD;&#xA;20h：接收到的原始数据的1的个数大于SIO_RXCR2[20:16] (HITHR)时提取为H，否则提取为L&#xD;&#xA;其他：保留" />
+        <Bit Name="SPLCNT" Authority="RW" Bits="8-4" Description="采样的长度，即一个BIT数据由SPLCNT+1个采样决定。" />
+        <Bit Name="TRGMODE" Authority="RW" Bits="3" Description="采样触发模式选择。&#xD;&#xA;0h：选择去抖后采样信号。&#xD;&#xA;1h：选择30ns滤波后的采样信号。" />
+        <Bit Name="BSTSEL" Authority="RW" Bits="1-0" Description="采样触发边沿。&#xD;&#xA;0h：上升沿触发。&#xD;&#xA;1h：下降沿触发。&#xD;&#xA;2h：上升、下降沿均触发。&#xD;&#xA;3h：上升沿触发。" />
+      </Register>
+      <Register Name="SIO_RXCR1" Authority="RW" Address="0x400b0014" Width="32" Description="接收控制寄存器1">
+        <Bit Name="RCKPRS" Authority="RW" Bits="31-16" Description="" />
+        <Bit Name="BUFCNT" Authority="RW" Bits="12-8" Description="" />
+        <Bit Name="RXCNT" Authority="RW" Bits="7-0" Description="" />
+      </Register>
+      <Register Name="SIO_RXCR2" Authority="RW" Address="0x400b0018" Width="32" Description="接收控制寄存器2">
+        <Bit Name="TOCNT" Authority="RW" Bits="23-16" Description="采样超时长度，在采样触发后，TOCNT+1个周期内未检测到采样触发边沿，则复位接收模块。" />
+        <Bit Name="TORSTEN" Authority="RW" Bits="15" Description="采样超时复位。&#xD;&#xA;0h：禁止采样超时复位。&#xD;&#xA;1h：使能采样超时复位。" />
+        <Bit Name="BREAKCNT" Authority="RW" Bits="7-3" Description="复位检测周期数。&#xD;&#xA;使能复位检测，在BREAKCNT+1个采样长度内，接收到数据都为BREAKLVL则复位接收模块，并产生BREAK中断。" />
+        <Bit Name="BREAKLVL" Authority="RW" Bits="1" Description="复位检测电平。&#xD;&#xA;0h：低电平。&#xD;&#xA;1h：高电平" />
+        <Bit Name="BREAKEN" Authority="RW" Bits="0" Description="复位检测使能控制。&#xD;&#xA;0h：禁止复位检测。&#xD;&#xA;1h：使能复位检测，在BREAKCNT+1个采样长度内，接收到数据都为BREAKLVL则复位接收模块，并产生BREAK中断。" />
+      </Register>
+      <Register Name="SIO_RXBUF" Authority="RW" Address="0x400b001c" Width="32" Description="接收数据缓存寄存器">
+        <Bit Name="RXBUF" Authority="RO" Bits="31-0" Description="" />
+      </Register>
+      <Register Name="SIO_RISR" Authority="RW" Address="0x400b0020" Width="32" Description="原始中断状态寄存器">
+        <Bit Name="TIMEOUT" Authority="RO" Bits="5" Description="TIMEOUT中断请求原始标志状态" />
+        <Bit Name="BREAK" Authority="RO" Bits="4" Description="BREAK中断请求原始标志状态" />
+        <Bit Name="RXBUFFULL" Authority="RO" Bits="3" Description="RXBUFFULL中断请求原始标志状态" />
+        <Bit Name="TXBUFEMPT" Authority="RO" Bits="2" Description="TXBUFEMPT中断请求原始标志状态" />
+        <Bit Name="RXDNE" Authority="RO" Bits="1" Description="RXDNE中断请求原始标志状态" />
+        <Bit Name="TXDNE" Authority="RO" Bits="0" Description="TXDNE中断请求原始标志状态" />
+      </Register>
+      <Register Name="SIO_MISR" Authority="RW" Address="0x400b0024" Width="32" Description="中断状态寄存器">
+        <Bit Name="TIMEOUT" Authority="RO" Bits="5" Description="TIMEOUT中断请求标志状态" />
+        <Bit Name="BREAK" Authority="RO" Bits="4" Description="BREAK中断请求标志状态" />
+        <Bit Name="RXBUFFULL" Authority="RO" Bits="3" Description="RXBUFFULL中断请求标志状态" />
+        <Bit Name="TXBUFEMPT" Authority="RO" Bits="2" Description="TXBUFEMPT中断请求标志状态" />
+        <Bit Name="RXDNE" Authority="RO" Bits="1" Description="RXDNE中断请求标志状态" />
+        <Bit Name="TXDNE" Authority="RO" Bits="0" Description="TXDNE中断请求标志状态" />
+      </Register>
+      <Register Name="SIO_IMCR" Authority="RW" Address="0x400b0028" Width="32" Description="中断使能控制寄存器">
+        <Bit Name="TIMEOUT" Authority="RW" Bits="5" Description="TIMEOUT中断使能控制位" />
+        <Bit Name="BREAK" Authority="RW" Bits="4" Description="BREAK中断使能控制位" />
+        <Bit Name="RXBUFFULL" Authority="RW" Bits="3" Description="RXBUFFULL中断使能控制位" />
+        <Bit Name="TXBUFEMPT" Authority="RW" Bits="2" Description="TXBUFEMPT中断使能控制位" />
+        <Bit Name="RXDNE" Authority="RW" Bits="1" Description="RXDNE中断使能控制位" />
+        <Bit Name="TXDNE" Authority="RW" Bits="0" Description="TXDNE中断使能控制位" />
+      </Register>
+      <Register Name="SIO_ICR" Authority="RW" Address="0x400b002c" Width="32" Description="中断清除寄存器">
+        <Bit Name="TIMEOUT" Authority="RW" Bits="5" Description="清除TIMEOUT中断请求原始标志状态" />
+        <Bit Name="BREAK" Authority="RW" Bits="4" Description="清除BREAK中断请求原始标志状态" />
+        <Bit Name="RXBUFFULL" Authority="RW" Bits="3" Description="清除RXBUFFULL中断请求原始标志状态" />
+        <Bit Name="TXBUFEMPT" Authority="RW" Bits="2" Description="清除TXBUFEMPT中断请求原始标志状态" />
+        <Bit Name="RXDNE" Authority="RW" Bits="1" Description="清除RXDNE中断请求原始标志状态" />
+        <Bit Name="TXDNE" Authority="RW" Bits="0" Description="清除TXDNE中断请求原始标志状态" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="CRC">
+      <Register Name="CRC_CEDR" Authority="RW" Address="0x50000004" Width="32" Description="时钟使能/禁止寄存器">
+        <Bit Name="CKEN" Authority="RW" Bits="0" Description="CRC 引擎使能：0 : 禁止1 : 使能" />
+      </Register>
+      <Register Name="CRC_SRR" Authority="RW" Address="0x50000008" Width="32" Description="软件复位寄存器">
+        <Bit Name="SWRST" Authority="RW" Bits="31" Description="软件复位写1会复位该模块" />
+      </Register>
+      <Register Name="CRC_CR" Authority="RW" Address="0x5000000c" Width="32" Description="控制寄存器">
+        <Bit Name="POLY" Authority="RW" Bits="5-4" Description="多项式控制 0x: CRC-CCITT 10: CRC-16 11: CRC-32" />
+        <Bit Name="REFOUT" Authority="RW" Bits="3" Description="CRC输出数据的按位反转控制0: 无反转1: 使能反转" />
+        <Bit Name="REFIN" Authority="RW" Bits="2" Description="CRC输入数据的按位反转控制0: 无反转1: 使能反转" />
+        <Bit Name="XOROUT" Authority="RW" Bits="1" Description="CRC输出数据的异或控制0: 无异或1: 使能异或" />
+        <Bit Name="XORIN" Authority="RW" Bits="0" Description="CRC输入数据的异或控制0: 无异或1: 使能异或" />
+      </Register>
+      <Register Name="CRC_SEED" Authority="RW" Address="0x50000010" Width="32" Description="种子值寄存器">
+        <Bit Name="SEED" Authority="RW" Bits="31-0" Description="对该寄存器的写操作会将该种子值载入CRC_DATAOUT寄存器中作为预置值(初值)。&#xD;&#xA;SEED值必须在每次CRC计算前都操作一次。" />
+      </Register>
+      <Register Name="CRC_DATAIN" Authority="RW" Address="0x50000014" Width="32" Description="输入数据寄存器">
+        <Bit Name="DATAIN" Authority="RW" Bits="31-0" Description="用来计算CRC的输入数据。&#xD;&#xA;支持字节，半字，全字三种格式。" />
+      </Register>
+      <Register Name="CRC_DATAOUT" Authority="RW" Address="0x50000018" Width="32" Description="输出数据寄存器">
+        <Bit Name="DATAOUT" Authority="RO" Bits="31-0" Description="该寄存器保存CRC计算结果。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="GPIOA">
+      <Register Name="GPIO_CONLR" Authority="RW" Address="0x60000000" Width="32" Description="低位控制寄存器">
+        <Bit Name="P7" Authority="RW" Bits="31-28" Description="IO管脚7的模式配置" />
+        <Bit Name="P6" Authority="RW" Bits="27-24" Description="IO管脚6的模式配置" />
+        <Bit Name="P5" Authority="RW" Bits="23-20" Description="IO管脚5的模式配置" />
+        <Bit Name="P4" Authority="RW" Bits="19-16" Description="IO管脚4的模式配置" />
+        <Bit Name="P3" Authority="RW" Bits="15-12" Description="IO管脚3的模式配置" />
+        <Bit Name="P2" Authority="RW" Bits="11-8" Description="IO管脚2的模式配置" />
+        <Bit Name="P1" Authority="RW" Bits="7-4" Description="IO管脚1的模式配置" />
+        <Bit Name="P0" Authority="RW" Bits="3-0" Description="IO管脚0的模式配置" />
+      </Register>
+      <Register Name="GPIO_CONHR" Authority="RW" Address="0x60000004" Width="32" Description="高位控制寄存器">
+        <Bit Name="P15" Authority="RW" Bits="31-28" Description="IO管脚15的模式配置" />
+        <Bit Name="P14" Authority="RW" Bits="27-24" Description="IO管脚14的模式配置" />
+        <Bit Name="P13" Authority="RW" Bits="23-20" Description="IO管脚13的模式配置" />
+        <Bit Name="P12" Authority="RW" Bits="19-16" Description="IO管脚12的模式配置" />
+        <Bit Name="P11" Authority="RW" Bits="15-12" Description="IO管脚11的模式配置" />
+        <Bit Name="P10" Authority="RW" Bits="11-8" Description="IO管脚10的模式配置" />
+        <Bit Name="P9" Authority="RW" Bits="7-4" Description="IO管脚9的模式配置" />
+        <Bit Name="P8" Authority="RW" Bits="3-0" Description="IO管脚8的模式配置" />
+      </Register>
+      <Register Name="GPIO_WODR" Authority="RW" Address="0x60000008" Width="32" Description="输出数据寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_SODR" Authority="RW" Address="0x6000000c" Width="32" Description="输出置位寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_CODR" Authority="RW" Address="0x60000010" Width="32" Description="输出清除寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_ODSR" Authority="RW" Address="0x60000014" Width="32" Description="输出状态寄存器">
+        <Bit Name="P15" Authority="RO" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RO" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RO" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RO" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RO" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RO" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RO" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RO" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RO" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_PSDR" Authority="RW" Address="0x60000018" Width="32" Description="管脚状态寄存器">
+        <Bit Name="P15" Authority="RO" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RO" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RO" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RO" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RO" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RO" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RO" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RO" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RO" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_FLTEN" Authority="RW" Address="0x6000001c" Width="32" Description="输入信号滤波器使能控制寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_PUDR" Authority="RW" Address="0x60000020" Width="32" Description="上拉/下拉配置寄存器">
+        <Bit Name="P15" Authority="RW" Bits="31-30" Description="上拉/下拉IO 管脚15" />
+        <Bit Name="P14" Authority="RW" Bits="29-28" Description="上拉/下拉IO 管脚14" />
+        <Bit Name="P13" Authority="RW" Bits="27-26" Description="上拉/下拉IO 管脚13" />
+        <Bit Name="P12" Authority="RW" Bits="25-24" Description="上拉/下拉IO 管脚12" />
+        <Bit Name="P11" Authority="RW" Bits="23-22" Description="上拉/下拉IO 管脚11" />
+        <Bit Name="P10" Authority="RW" Bits="21-20" Description="上拉/下拉IO 管脚10" />
+        <Bit Name="P9" Authority="RW" Bits="19-18" Description="上拉/下拉IO 管脚9" />
+        <Bit Name="P8" Authority="RW" Bits="17-16" Description="上拉/下拉IO 管脚8" />
+        <Bit Name="P7" Authority="RW" Bits="15-14" Description="上拉/下拉IO 管脚7" />
+        <Bit Name="P6" Authority="RW" Bits="13-12" Description="上拉/下拉IO 管脚6" />
+        <Bit Name="P5" Authority="RW" Bits="11-10" Description="上拉/下拉IO 管脚5" />
+        <Bit Name="P4" Authority="RW" Bits="9-8" Description="上拉/下拉IO 管脚4" />
+        <Bit Name="P3" Authority="RW" Bits="7-6" Description="上拉/下拉IO 管脚3" />
+        <Bit Name="P2" Authority="RW" Bits="5-4" Description="上拉/下拉IO 管脚2" />
+        <Bit Name="P1" Authority="RW" Bits="3-2" Description="上拉/下拉IO 管脚1" />
+        <Bit Name="P0" Authority="RW" Bits="1-0" Description="上拉/下拉IO 管脚0" />
+      </Register>
+      <Register Name="GPIO_DSCR" Authority="RW" Address="0x60000024" Width="32" Description="驱动强度配置寄存器">
+        <Bit Name="P15" Authority="RW" Bits="31-30" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="29-28" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="27-26" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="25-24" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="23-22" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="21-20" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="19-18" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="17-16" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="15-14" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="13-12" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="11-10" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="9-8" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="7-6" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="5-4" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="3-2" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="1-0" Description="" />
+      </Register>
+      <Register Name="GPIO_OMCR" Authority="RW" Address="0x60000028" Width="32" Description="输出模式配置寄存器">
+        <Bit Name="CCM15" Authority="RW" Bits="31" Description="" />
+        <Bit Name="CCM14" Authority="RW" Bits="30" Description="" />
+        <Bit Name="CCM13" Authority="RW" Bits="29" Description="" />
+        <Bit Name="CCM12" Authority="RW" Bits="28" Description="" />
+        <Bit Name="CCM11" Authority="RW" Bits="27" Description="" />
+        <Bit Name="CCM10" Authority="RW" Bits="26" Description="" />
+        <Bit Name="CCM9" Authority="RW" Bits="25" Description="" />
+        <Bit Name="CCM8" Authority="RW" Bits="24" Description="" />
+        <Bit Name="CCM7" Authority="RW" Bits="23" Description="" />
+        <Bit Name="CCM6" Authority="RW" Bits="22" Description="" />
+        <Bit Name="CCM5" Authority="RW" Bits="21" Description="" />
+        <Bit Name="CCM4" Authority="RW" Bits="20" Description="" />
+        <Bit Name="CCM3" Authority="RW" Bits="19" Description="" />
+        <Bit Name="CCM2" Authority="RW" Bits="18" Description="" />
+        <Bit Name="CCM1" Authority="RW" Bits="17" Description="" />
+        <Bit Name="CCM0" Authority="RW" Bits="16" Description="" />
+        <Bit Name="ODP15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="ODP14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="ODP13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="ODP12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="ODP11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="ODP10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="ODP9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="ODP8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="ODP7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="ODP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="ODP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="ODP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="ODP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="ODP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="ODP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="ODP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_IECR" Authority="RW" Address="0x6000002c" Width="32" Description="外部中断使能寄存器">
+        <Bit Name="IEN15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="IEN14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="IEN13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="IEN12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="IEN11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="IEN10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="IEN9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="IEN8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="IEN7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="IEN6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="IEN5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="IEN4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IEN3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="IEN2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="IEN1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="IEN0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_IEER" Authority="RW" Address="0x60000030" Width="32" Description="外部中断使能设置寄存器">
+        <Bit Name="IEE15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="IEE14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="IEE13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="IEE12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="IEE11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="IEE10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="IEE9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="IEE8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="IEE7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="IEE6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="IEE5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="IEE4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IEE3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="IEE2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="IEE1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="IEE0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_IEDR" Authority="RW" Address="0x60000034" Width="32" Description="外部中断使能清除寄存器">
+        <Bit Name="IED15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="IED14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="IED13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="IED12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="IED11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="IED10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="IED9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="IED8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="IED7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="IED6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="IED5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="IED4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IED3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="IED2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="IED1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="IED0" Authority="RW" Bits="0" Description="" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="GPIOB">
+      <Register Name="GPIO_CONLR" Authority="RW" Address="0x60002000" Width="32" Description="低位控制寄存器">
+        <Bit Name="P7" Authority="RW" Bits="31-28" Description="IO管脚7的模式配置" />
+        <Bit Name="P6" Authority="RW" Bits="27-24" Description="IO管脚6的模式配置" />
+        <Bit Name="P5" Authority="RW" Bits="23-20" Description="IO管脚5的模式配置" />
+        <Bit Name="P4" Authority="RW" Bits="19-16" Description="IO管脚4的模式配置" />
+        <Bit Name="P3" Authority="RW" Bits="15-12" Description="IO管脚3的模式配置" />
+        <Bit Name="P2" Authority="RW" Bits="11-8" Description="IO管脚2的模式配置" />
+        <Bit Name="P1" Authority="RW" Bits="7-4" Description="IO管脚1的模式配置" />
+        <Bit Name="P0" Authority="RW" Bits="3-0" Description="IO管脚0的模式配置" />
+      </Register>
+      <Register Name="GPIO_CONHR" Authority="RW" Address="0x60002004" Width="32" Description="高位控制寄存器">
+        <Bit Name="P15" Authority="RW" Bits="31-28" Description="IO管脚15的模式配置" />
+        <Bit Name="P14" Authority="RW" Bits="27-24" Description="IO管脚14的模式配置" />
+        <Bit Name="P13" Authority="RW" Bits="23-20" Description="IO管脚13的模式配置" />
+        <Bit Name="P12" Authority="RW" Bits="19-16" Description="IO管脚12的模式配置" />
+        <Bit Name="P11" Authority="RW" Bits="15-12" Description="IO管脚11的模式配置" />
+        <Bit Name="P10" Authority="RW" Bits="11-8" Description="IO管脚10的模式配置" />
+        <Bit Name="P9" Authority="RW" Bits="7-4" Description="IO管脚9的模式配置" />
+        <Bit Name="P8" Authority="RW" Bits="3-0" Description="IO管脚8的模式配置" />
+      </Register>
+      <Register Name="GPIO_WODR" Authority="RW" Address="0x60002008" Width="32" Description="输出数据寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_SODR" Authority="RW" Address="0x6000200c" Width="32" Description="输出置位寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_CODR" Authority="RW" Address="0x60002010" Width="32" Description="输出清除寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_ODSR" Authority="RW" Address="0x60002014" Width="32" Description="输出状态寄存器">
+        <Bit Name="P15" Authority="RO" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RO" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RO" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RO" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RO" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RO" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RO" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RO" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RO" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_PSDR" Authority="RW" Address="0x60002018" Width="32" Description="管脚状态寄存器">
+        <Bit Name="P15" Authority="RO" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RO" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RO" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RO" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RO" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RO" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RO" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RO" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RO" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RO" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RO" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RO" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RO" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RO" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RO" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RO" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_FLTEN" Authority="RW" Address="0x6000201c" Width="32" Description="输入信号滤波器使能控制寄存器">
+        <Bit Name="P15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_PUDR" Authority="RW" Address="0x60002020" Width="32" Description="上拉/下拉配置寄存器">
+        <Bit Name="P15" Authority="RW" Bits="31-30" Description="上拉/下拉IO 管脚15" />
+        <Bit Name="P14" Authority="RW" Bits="29-28" Description="上拉/下拉IO 管脚14" />
+        <Bit Name="P13" Authority="RW" Bits="27-26" Description="上拉/下拉IO 管脚13" />
+        <Bit Name="P12" Authority="RW" Bits="25-24" Description="上拉/下拉IO 管脚12" />
+        <Bit Name="P11" Authority="RW" Bits="23-22" Description="上拉/下拉IO 管脚11" />
+        <Bit Name="P10" Authority="RW" Bits="21-20" Description="上拉/下拉IO 管脚10" />
+        <Bit Name="P9" Authority="RW" Bits="19-18" Description="上拉/下拉IO 管脚9" />
+        <Bit Name="P8" Authority="RW" Bits="17-16" Description="上拉/下拉IO 管脚8" />
+        <Bit Name="P7" Authority="RW" Bits="15-14" Description="上拉/下拉IO 管脚7" />
+        <Bit Name="P6" Authority="RW" Bits="13-12" Description="上拉/下拉IO 管脚6" />
+        <Bit Name="P5" Authority="RW" Bits="11-10" Description="上拉/下拉IO 管脚5" />
+        <Bit Name="P4" Authority="RW" Bits="9-8" Description="上拉/下拉IO 管脚4" />
+        <Bit Name="P3" Authority="RW" Bits="7-6" Description="上拉/下拉IO 管脚3" />
+        <Bit Name="P2" Authority="RW" Bits="5-4" Description="上拉/下拉IO 管脚2" />
+        <Bit Name="P1" Authority="RW" Bits="3-2" Description="上拉/下拉IO 管脚1" />
+        <Bit Name="P0" Authority="RW" Bits="1-0" Description="上拉/下拉IO 管脚0" />
+      </Register>
+      <Register Name="GPIO_DSCR" Authority="RW" Address="0x60002024" Width="32" Description="驱动强度配置寄存器">
+        <Bit Name="P15" Authority="RW" Bits="31-30" Description="" />
+        <Bit Name="P14" Authority="RW" Bits="29-28" Description="" />
+        <Bit Name="P13" Authority="RW" Bits="27-26" Description="" />
+        <Bit Name="P12" Authority="RW" Bits="25-24" Description="" />
+        <Bit Name="P11" Authority="RW" Bits="23-22" Description="" />
+        <Bit Name="P10" Authority="RW" Bits="21-20" Description="" />
+        <Bit Name="P9" Authority="RW" Bits="19-18" Description="" />
+        <Bit Name="P8" Authority="RW" Bits="17-16" Description="" />
+        <Bit Name="P7" Authority="RW" Bits="15-14" Description="" />
+        <Bit Name="P6" Authority="RW" Bits="13-12" Description="" />
+        <Bit Name="P5" Authority="RW" Bits="11-10" Description="" />
+        <Bit Name="P4" Authority="RW" Bits="9-8" Description="" />
+        <Bit Name="P3" Authority="RW" Bits="7-6" Description="" />
+        <Bit Name="P2" Authority="RW" Bits="5-4" Description="" />
+        <Bit Name="P1" Authority="RW" Bits="3-2" Description="" />
+        <Bit Name="P0" Authority="RW" Bits="1-0" Description="" />
+      </Register>
+      <Register Name="GPIO_OMCR" Authority="RW" Address="0x60002028" Width="32" Description="输出模式配置寄存器">
+        <Bit Name="CCM15" Authority="RW" Bits="31" Description="" />
+        <Bit Name="CCM14" Authority="RW" Bits="30" Description="" />
+        <Bit Name="CCM13" Authority="RW" Bits="29" Description="" />
+        <Bit Name="CCM12" Authority="RW" Bits="28" Description="" />
+        <Bit Name="CCM11" Authority="RW" Bits="27" Description="" />
+        <Bit Name="CCM10" Authority="RW" Bits="26" Description="" />
+        <Bit Name="CCM9" Authority="RW" Bits="25" Description="" />
+        <Bit Name="CCM8" Authority="RW" Bits="24" Description="" />
+        <Bit Name="CCM7" Authority="RW" Bits="23" Description="" />
+        <Bit Name="CCM6" Authority="RW" Bits="22" Description="" />
+        <Bit Name="CCM5" Authority="RW" Bits="21" Description="" />
+        <Bit Name="CCM4" Authority="RW" Bits="20" Description="" />
+        <Bit Name="CCM3" Authority="RW" Bits="19" Description="" />
+        <Bit Name="CCM2" Authority="RW" Bits="18" Description="" />
+        <Bit Name="CCM1" Authority="RW" Bits="17" Description="" />
+        <Bit Name="CCM0" Authority="RW" Bits="16" Description="" />
+        <Bit Name="ODP15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="ODP14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="ODP13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="ODP12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="ODP11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="ODP10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="ODP9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="ODP8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="ODP7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="ODP6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="ODP5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="ODP4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="ODP3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="ODP2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="ODP1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="ODP0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_IECR" Authority="RW" Address="0x6000202c" Width="32" Description="外部中断使能寄存器">
+        <Bit Name="IEN15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="IEN14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="IEN13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="IEN12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="IEN11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="IEN10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="IEN9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="IEN8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="IEN7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="IEN6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="IEN5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="IEN4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IEN3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="IEN2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="IEN1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="IEN0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_IEER" Authority="RW" Address="0x60002030" Width="32" Description="外部中断使能设置寄存器">
+        <Bit Name="IEE15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="IEE14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="IEE13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="IEE12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="IEE11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="IEE10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="IEE9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="IEE8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="IEE7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="IEE6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="IEE5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="IEE4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IEE3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="IEE2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="IEE1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="IEE0" Authority="RW" Bits="0" Description="" />
+      </Register>
+      <Register Name="GPIO_IEDR" Authority="RW" Address="0x60002034" Width="32" Description="外部中断使能清除寄存器">
+        <Bit Name="IED15" Authority="RW" Bits="15" Description="" />
+        <Bit Name="IED14" Authority="RW" Bits="14" Description="" />
+        <Bit Name="IED13" Authority="RW" Bits="13" Description="" />
+        <Bit Name="IED12" Authority="RW" Bits="12" Description="" />
+        <Bit Name="IED11" Authority="RW" Bits="11" Description="" />
+        <Bit Name="IED10" Authority="RW" Bits="10" Description="" />
+        <Bit Name="IED9" Authority="RW" Bits="9" Description="" />
+        <Bit Name="IED8" Authority="RW" Bits="8" Description="" />
+        <Bit Name="IED7" Authority="RW" Bits="7" Description="" />
+        <Bit Name="IED6" Authority="RW" Bits="6" Description="" />
+        <Bit Name="IED5" Authority="RW" Bits="5" Description="" />
+        <Bit Name="IED4" Authority="RW" Bits="4" Description="" />
+        <Bit Name="IED3" Authority="RW" Bits="3" Description="" />
+        <Bit Name="IED2" Authority="RW" Bits="2" Description="" />
+        <Bit Name="IED1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="IED0" Authority="RW" Bits="0" Description="" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="GPIO_IGRP">
+      <Register Name="GPIO_IGRPL" Authority="RW" Address="0x6000f000" Width="32" Description="外部中断组配置寄存器">
+        <Bit Name="GRP7" Authority="RW" Bits="30-28" Description="选择外部中断组7" />
+        <Bit Name="GRP6" Authority="RW" Bits="26-24" Description="选择外部中断组6" />
+        <Bit Name="GRP5" Authority="RW" Bits="22-20" Description="选择外部中断组5" />
+        <Bit Name="GRP4" Authority="RW" Bits="18-16" Description="选择外部中断组4" />
+        <Bit Name="GRP3" Authority="RW" Bits="14-12" Description="选择外部中断组3" />
+        <Bit Name="GRP2" Authority="RW" Bits="10-8" Description="选择外部中断组2" />
+        <Bit Name="GRP1" Authority="RW" Bits="6-4" Description="选择外部中断组1" />
+        <Bit Name="GRP0" Authority="RW" Bits="2-0" Description="选择外部中断组0" />
+      </Register>
+      <Register Name="GPIO_IGRPH" Authority="RW" Address="0x6000f004" Width="32" Description="外部中断组配置寄存器">
+        <Bit Name="GRP15" Authority="RW" Bits="30-28" Description="选择外部中断组15" />
+        <Bit Name="GRP14" Authority="RW" Bits="26-24" Description="选择外部中断组14" />
+        <Bit Name="GRP13" Authority="RW" Bits="22-20" Description="选择外部中断组13" />
+        <Bit Name="GRP12" Authority="RW" Bits="18-16" Description="选择外部中断组12" />
+        <Bit Name="GRP11" Authority="RW" Bits="14-12" Description="选择外部中断组11" />
+        <Bit Name="GRP10" Authority="RW" Bits="10-8" Description="选择外部中断组10" />
+        <Bit Name="GRP9" Authority="RW" Bits="6-4" Description="选择外部中断组9" />
+        <Bit Name="GRP8" Authority="RW" Bits="2-0" Description="选择外部中断组8" />
+      </Register>
+      <Register Name="GPIO_IGREX" Authority="RW" Address="0x6000f008" Width="32" Description="外部中断组扩展配置寄存器">
+        <Bit Name="GRP19" Authority="RW" Bits="15-12" Description="选择外部中断组19&#xD;&#xA;配置同GPR18控制位" />
+        <Bit Name="GRP18" Authority="RW" Bits="11-8" Description="选择外部中断组18&#xD;&#xA;0h：GPIOB0.0 被选中&#xD;&#xA;1h：GPIOB0.1 被选中&#xD;&#xA;2h：GPIOB0.2 被选中&#xD;&#xA;3h：GPIOB0.3 被选中&#xD;&#xA;其他：保留" />
+        <Bit Name="GRP17" Authority="RW" Bits="7-4" Description="选择外部中断组17&#xD;&#xA;配置同GPR16控制位" />
+        <Bit Name="GRP16" Authority="RW" Bits="3-0" Description="选择外部中断组16&#xD;&#xA;0h：GPIOA0.0 被选中&#xD;&#xA;1h：GPIOA0.1 被选中&#xD;&#xA;2h：GPIOA0.2 被选中&#xD;&#xA;3h：GPIOA0.3 被选中&#xD;&#xA;4h：GPIOA0.4 被选中&#xD;&#xA;5h：GPIOA0.5 被选中&#xD;&#xA;6h：GPIOA0.6 被选中&#xD;&#xA;7h：GPIOA0.7 被选中&#xD;&#xA;其他：GPIOA0.0 被选中" />
+      </Register>
+      <Register Name="GPIO_CLKEN" Authority="RW" Address="0x6000f00c" Width="32" Description="GPIO组时钟使能控制寄存器">
+        <Bit Name="CLK_B0" Authority="RW" Bits="2" Description="" />
+        <Bit Name="CLK_A1" Authority="RW" Bits="1" Description="" />
+        <Bit Name="CLK_A0" Authority="RW" Bits="0" Description="" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="HWDIV">
+      <Register Name="HWD_DIVIDEND" Authority="RW" Address="0x70000000" Width="32" Description="被除数寄存器">
+        <Bit Name="DIVIDEND" Authority="RW" Bits="31-0" Description="被除数寄存器" />
+      </Register>
+      <Register Name="HWD_DIVISOR" Authority="RW" Address="0x70000004" Width="32" Description="除数寄存器">
+        <Bit Name="DIVISOR" Authority="RW" Bits="31-0" Description="除数寄存器" />
+      </Register>
+      <Register Name="HWD_QUOTIENT" Authority="RW" Address="0x70000008" Width="32" Description="商寄存器">
+        <Bit Name="QUOTIENT" Authority="RO" Bits="31-0" Description="商寄存器" />
+      </Register>
+      <Register Name="HWD_REMAINDER" Authority="RW" Address="0x7000000c" Width="32" Description="余数寄存器">
+        <Bit Name="REMAINDER" Authority="RO" Bits="31-0" Description="余数寄存器" />
+      </Register>
+      <Register Name="HWD_CR" Authority="RW" Address="0x70000010" Width="32" Description="控制寄存器">
+        <Bit Name="UNSIGN" Authority="RW" Bits="0" Description="运算符号位控制寄存器 &#xD;&#xA;0h：有符号除法运算 &#xD;&#xA;1h：无符号除法运算  " />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="INTERRUPT">
+      <Register Name="VIC_ISER" Authority="RW" Address="0xe000e100" Width="32" Description="Interrupt Set Enable Register">
+        <Bit Name="SETENA0~31" Authority="RW" Bits="31-0" Description="中断向量号使能&#xD;&#xA;读操作：&#xD;&#xA;0： 对应中断未使能&#xD;&#xA;1： 对应中断已使能&#xD;&#xA;写操作：&#xD;&#xA;0： 无效&#xD;&#xA;1： 使能对应中断" />
+      </Register>
+      <Register Name="VIC_IWER" Authority="RW" Address="0xe000e140" Width="32" Description="Interrupt Wakeup Enable Register">
+        <Bit Name="SETENA0~31" Authority="RW" Bits="31-0" Description="设置中断低功耗唤醒功能&#xD;&#xA;读操作：&#xD;&#xA;0： 对应中断的低功耗唤醒未使能&#xD;&#xA;1： 对应中断的低功耗唤醒已使能&#xD;&#xA;写操作：&#xD;&#xA;0： 无效&#xD;&#xA;1： 使能对应中断的低功耗唤醒功能" />
+      </Register>
+      <Register Name="VIC_ICER" Authority="RW" Address="0xe000e180" Width="32" Description="Interrupt Clear Enable Register">
+        <Bit Name="CLRENA0~31" Authority="RW" Bits="31-0" Description="清除中断使能&#xD;&#xA;读操作：&#xD;&#xA;0： 对应中断未使能&#xD;&#xA;1： 对应中断已使能&#xD;&#xA;写操作：&#xD;&#xA;0： 无效&#xD;&#xA;1： 清除对应中断的使能" />
+      </Register>
+      <Register Name="VIC_IWDR" Authority="RW" Address="0xe000e1c0" Width="32" Description="Interrupt Wakeup Disable Register">
+        <Bit Name="CLRENA0~31" Authority="RW" Bits="31-0" Description="清除中断低功耗唤醒功能&#xD;&#xA;读操作：&#xD;&#xA;0： 对应中断的低功耗唤醒未使能&#xD;&#xA;1： 对应中断的低功耗唤醒已使能&#xD;&#xA;写操作：&#xD;&#xA;0： 无效&#xD;&#xA;1： 清除对应中断的低功耗唤醒功能" />
+      </Register>
+      <Register Name="VIC_ISPR" Authority="RW" Address="0xe000e200" Width="32" Description="Interrupt Set Pending Register">
+        <Bit Name="SETPEND0~31" Authority="RW" Bits="31-0" Description="更改中断的等待状态&#xD;&#xA;读操作：&#xD;&#xA;0： 对应中断未处于等待状态&#xD;&#xA;1： 对应中断已处于等待状态&#xD;&#xA;写操作：&#xD;&#xA;0： 无效&#xD;&#xA;1： 改变对应中断为等待状态" />
+      </Register>
+      <Register Name="VIC_ICPR" Authority="RW" Address="0xe000e280" Width="32" Description="Interrupt Clear Pending Register">
+        <Bit Name="CLRPEND0~31" Authority="RW" Bits="31-0" Description="清除中断的等待状态&#xD;&#xA;读操作：&#xD;&#xA;0： 对应中断未处于等待状态&#xD;&#xA;1： 对应中断已处于等待状态&#xD;&#xA;写操作：&#xD;&#xA;0： 无效&#xD;&#xA;1： 清除对应中断的等待状态" />
+      </Register>
+      <Register Name="VIC_IABR" Authority="RW" Address="0xe000e300" Width="32" Description="Interrupt Active Status Register">
+        <Bit Name="ACTIVE0~31" Authority="RW" Bits="31-0" Description="指示对应的中断源是否已经被CPU响应但还没有处理完成。&#xD;&#xA;读操作：&#xD;&#xA;0： 没有被CPU响应&#xD;&#xA;1： 已经被CPU响应，但还没有处理完&#xD;&#xA;写操作：&#xD;&#xA;0： 清除当前Active状态&#xD;&#xA;1： 不允许（软件写1可能导致不可预期的错误）" />
+      </Register>
+      <Register Name="VIC_IPR0" Authority="RW" Address="0xe000e400" Width="32" Description="Interrupt Priority Register 0">
+        <Bit Name="PRI_3" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_3： 中断号3的优先级设置&#xD;&#xA;" />
+        <Bit Name="PRI_2" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_2： 中断号2的优先级设置" />
+        <Bit Name="PRI_1" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_1： 中断号1的优先级设置" />
+        <Bit Name="PRI_0" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_0： 中断号0的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR1" Authority="RW" Address="0xe000e404" Width="32" Description="Interrupt Priority Register 1">
+        <Bit Name="PRI_7" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_7： 中断号7的优先级设置&#xD;&#xA;" />
+        <Bit Name="PRI_6" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_6： 中断号6的优先级设置" />
+        <Bit Name="PRI_5" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_5： 中断号5的优先级设置" />
+        <Bit Name="PRI_4" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_4： 中断号4的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR2" Authority="RW" Address="0xe000e408" Width="32" Description="Interrupt Priority Register 2">
+        <Bit Name="PRI_11" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_11： 中断号11的优先级设置&#xD;&#xA;" />
+        <Bit Name="PRI_10" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_10： 中断号10的优先级设置" />
+        <Bit Name="PRI_9" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_9： 中断号9的优先级设置" />
+        <Bit Name="PRI_8" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_8： 中断号8的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR3" Authority="RW" Address="0xe000e40c" Width="32" Description="Interrupt Priority Register 3">
+        <Bit Name="PRI_15" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_15： 中断号15的优先级设置" />
+        <Bit Name="PRI_14" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_14： 中断号14的优先级设置&#xD;&#xA;" />
+        <Bit Name="PRI_13" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_13： 中断号13的优先级设置" />
+        <Bit Name="PRI_12" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_12： 中断号12的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR4" Authority="RW" Address="0xe000e410" Width="32" Description="Interrupt Priority Register 4">
+        <Bit Name="PRI_19" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_19： 中断号19的优先级设置&#xD;&#xA;" />
+        <Bit Name="PRI_18" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_18： 中断号18的优先级设置" />
+        <Bit Name="PRI_17" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_17： 中断号17的优先级设置" />
+        <Bit Name="PRI_16" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_16： 中断号16的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR5" Authority="RW" Address="0xe000e414" Width="32" Description="Interrupt Priority Register 5">
+        <Bit Name="PRI_23" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_23： 中断号23的优先级设置" />
+        <Bit Name="PRI_22" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_22： 中断号22的优先级设置" />
+        <Bit Name="PRI_21" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_21： 中断号21的优先级设置" />
+        <Bit Name="PRI_20" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_20： 中断号20的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR6" Authority="RW" Address="0xe000e418" Width="32" Description="Interrupt Priority Register 6">
+        <Bit Name="PRI_27" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_27： 中断号27的优先级设置" />
+        <Bit Name="PRI_26" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_26： 中断号26的优先级设置" />
+        <Bit Name="PRI_25" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_25： 中断号25的优先级设置" />
+        <Bit Name="PRI_24" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_24： 中断号24的优先级设置" />
+      </Register>
+      <Register Name="VIC_IPR7" Authority="RW" Address="0xe000e41c" Width="32" Description="Interrupt Priority Register 7">
+        <Bit Name="PRI_31" Authority="RW" Bits="31-30" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_31： 中断号31的优先级设置" />
+        <Bit Name="PRI_30" Authority="RW" Bits="23-22" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_30： 中断号30的优先级设置" />
+        <Bit Name="PRI_29" Authority="RW" Bits="15-14" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_29： 中断号29的优先级设置" />
+        <Bit Name="PRI_28" Authority="RW" Bits="7-6" Description="设置对应中断号的优先级，数值越小，优先级越高&#xD;&#xA;PRI_28： 中断号28的优先级设置" />
+      </Register>
+      <Register Name="VIC_ISR" Authority="RW" Address="0xe000ec00" Width="32" Description="Interrupt Status Register">
+        <Bit Name="VECPENDING" Authority="RW" Bits="20-12" Description="指示当前等待的最高优先级中断向量号" />
+        <Bit Name="VECACTIVE" Authority="RW" Bits="8-0" Description="指示当前CPU正在处理的中断向量号" />
+      </Register>
+      <Register Name="VIC_IPTR" Authority="RW" Address="0xe000ec04" Width="32" Description="Interrupt Priority Threshold Register">
+        <Bit Name="THDEN" Authority="RW" Bits="31" Description="中断优先级阈值有效位&#xD;&#xA;0： 中断抢占不需要高于优先级阈值&#xD;&#xA;1： 中断抢占需要优先级高于阈值" />
+        <Bit Name="VECTHD" Authority="RW" Bits="16-8" Description="优先级阈值对应的中断向量号。当VIC发现CPU从VECTHD所设置的中断服务程序退出时，会硬件清除中断优先级阈值有效位（THDEN）" />
+        <Bit Name="PRITHD" Authority="RW" Bits="7-0" Description="中断抢占的优先级阈值设置&#xD;&#xA;仅最高两位[7:6]有效，剩下[5:0]保留。" />
+      </Register>
+    </Peripheral>
+    <Peripheral Name="CORET">
+      <Register Name="CORET_CSR" Authority="RW" Address="0xe000e010" Width="32" Description="控制寄存器">
+        <Bit Name="COUNTFLAG" Authority="RO" Bits="16" Description="表示在上一次读此寄存器后计数器是否计数到 0：&#xD;&#xA;0 : 计数器还没有计数到0&#xD;&#xA;1 : 计数器已经计数到0&#xD;&#xA;在计数器的值由1变到0时，COUNTFLAG会被置位。&#xD;&#xA;读CSR寄存器以及任何写CVR寄存器会使COUNTFLAG 清零。" />
+        <Bit Name="CLKSOURCE" Authority="RW" Bits="2" Description="系统定时器时钟(STCLK)的时钟源选择：&#xD;&#xA;0 : 时钟源为(CORECLK/8)&#xD;&#xA;1 : 时钟源为CORECLK" />
+        <Bit Name="TICKINT" Authority="RW" Bits="1" Description="中断使能：&#xD;&#xA;0 : 禁止计数到0的中断&#xD;&#xA;1 : 使能计数到0的中断&#xD;&#xA;写CVR寄存器会使计数器清零，但不会导致系统计时器的中断状态位发生改变。" />
+        <Bit Name="ENABLE" Authority="RW" Bits="0" Description="定时器的使能控制：&#xD;&#xA;0 : 禁止定时器&#xD;&#xA;1 : 使能定时器" />
+      </Register>
+      <Register Name="CORET_RVR" Authority="RW" Address="0xe000e014" Width="32" Description="回填值寄存器">
+        <Bit Name="RELOAD" Authority="RW" Bits="23-0" Description="在计数器计数到0时，RELOAD值会被赋给CORET_CVR寄存器。&#xD;&#xA;向CORET_RVR寄存器写0会使计数器在下一次循环时停止工作，此后计数器的值将一直保持为0。当使用外部参考&#xD;&#xA;时钟使能计数器后，必须等到计数器正常计数开始后(即&#xD;&#xA;CORET_CVR 变为非0值时)，才可以将 CORET_RVR 置为0以让计数器在下一次循环时停止工作，否则计数器无法开始第一次计数。" />
+      </Register>
+      <Register Name="CORET_CVR" Authority="RW" Address="0xe000e018" Width="32" Description="当前值寄存器">
+        <Bit Name="CURRENT" Authority="RW" Bits="23-0" Description="计数器的当前值。&#xD;&#xA;&#xD;&#xA;写CORET_CVR寄存器会同时使此寄存器和COUNTFLAG&#xD;&#xA;状态位清零，并且会导致下一个时钟周期开始时，系统计时器取出寄存器CORET_RVR里的值并赋给CORET_CVR。&#xD;&#xA;注意写CORET_CVR不会导致系统计时器的中断状态位发生改变。&#xD;&#xA;读 CORET_CVR 会返回访问寄存器时计数器的值。" />
+      </Register>
+    </Peripheral>
+  </config>
+</com.csky.cds.peripheral>
\ No newline at end of file
diff --git a/Source/arch/crt0.S b/Source/arch/crt0.S
new file mode 100644
index 0000000..cc28c85
--- /dev/null
+++ b/Source/arch/crt0.S
@@ -0,0 +1,213 @@
+//start from __start, 
+//(0)initialize vector table
+//(1)initialize all registers
+//(2)prepare initial reg values for user process
+//(3)initialize supervisor mode stack pointer
+//(4)construct ASID Table
+//(5)prepare PTE entry for user process start virtual address
+//(6)creat a mapping between VPN:0 and PFN:0 for kernel
+//(7)set VBR register
+//(8)enable EE and MMU
+//(9)jump to the main procedure using jsri main
+
+
+#define UserOption   0x55aa0005
+.export vector_table
+//.import VecTable
+.align  10
+vector_table:           //totally 256 entries
+//  .long   __start
+//  .rept   128
+//  .long   __dummy
+//  .endr
+
+.long __start
+.long MisalignedHandler
+.long AccessErrHandler
+.long DummyHandler
+.long IllegalInstrHandler
+.long PriviledgeVioHandler
+.long DummyHandler
+.long BreakPointHandler
+.long UnrecExecpHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long Trap0Handler
+.long Trap1Handler
+.long Trap2Handler
+.long Trap3Handler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long DummyHandler
+.long PendTrapHandler
+.long CORETHandler
+.long SYSCONIntHandler
+.long IFCIntHandler
+.long ADCIntHandler
+.long EPT0IntHandler
+.long DummyHandler//EPT0EMIntHandler
+.long WWDTHandler
+.long EXI0IntHandler
+.long EXI1IntHandler
+.long GPT0IntHandler
+.long DummyHandler//GPT1IntHandler
+.long DummyHandler
+.long RTCIntHandler
+.long UART0IntHandler
+.long UART1IntHandler
+.long UART2IntHandler//USARTIntHandler
+.long DummyHandler
+.long I2CIntHandler
+.long DummyHandler
+.long SPI0IntHandler
+.long SIO0IntHandler
+.long EXI2to3IntHandler
+.long EXI4to9IntHandler
+.long EXI10to15IntHandler
+.long CNTAIntHandler
+.long TKEYIntHandler
+.long LPTIntHandler
+.long DummyHandler//LEDIntHandler
+.long BT0IntHandler
+.long BT1IntHandler
+.long DummyHandler//BT2IntHandler
+.long DummyHandler//BT3IntHandler
+.long UserOption
+
+.text
+.export __start
+.long 0x00000000
+.long 0x00000000
+//  .long __start
+__start:
+
+	
+  //initialize all registers
+  movi r0, 0
+  movi r1, 0
+  movi r2, 0
+  movi r3, 0
+  movi r4, 0
+  movi r5, 0
+  movi r6, 0
+  movi r7, 0
+  //movi r8, 0
+  //movi r9, 0
+  //movi r10, 0
+  //movi r11, 0
+  //movi r12, 0
+  //movi r13, 0
+  //movi r14, 0
+  //movi r15, 0
+
+//set VBR
+  lrw r2, vector_table
+  mtcr r2, cr<1,0>
+
+//enable EE bit of psr
+  mfcr r2, cr<0,0>
+  bseti r2, r2, 8
+  mtcr r2, cr<0,0>
+
+////set rom access delay
+//  lrw     r1, 0xe00000
+//  lrw     r2, 0x7
+//  st.w    r2, (r1,0x0)
+
+////enable cache
+//  lrw     r1, 0xe000f000
+//  movi    r2, 0x2
+//  st.w    r2, (r1,0x0)
+//  lrw     r2, 0x29
+//  st.w    r2, (r1,0x4)
+//  movi    r2, 0x1
+//  st.w    r2, (r1,0x0)
+
+//disable power peak 
+  lrw     r1, 0xe000ef90
+  movi    r2, 0x0
+  st.w    r2, (r1, 0x0)
+
+
+
+//initialize kernel stack
+  lrw  r7, __kernel_stack
+  mov r14,r7
+  subi r6,r7,0x4
+
+  //lrw  r3, 0x40
+  lrw  r3, 0x04
+	
+  subu r4, r7, r3
+  lrw  r5, 0x0
+INIT_KERLE_STACK:
+  addi r4, 0x4
+  st.w r5, (r4)
+  //cmphs r7, r4
+  cmphs r6, r4
+  bt  INIT_KERLE_STACK
+        
+__to_main:
+  lrw r0,__main
+  jsr r0
+  mov r0, r0
+  mov r0, r0
+
+
+  
+  lrw r15, __exit
+  lrw r0,main
+  jmp r0
+  mov r0, r0
+  mov r0, r0
+  mov r0, r0
+  mov r0, r0
+  mov r0, r0
+
+.export __exit
+__exit:
+
+  lrw r4, 0x20003000
+  //lrw r5, 0x0
+  mov r5, r0
+  st.w r5, (r4)
+
+  mfcr r1, cr<0,0>
+  lrw  r1, 0xFFFF
+  mtcr r1, cr<11,0>
+  lrw     r1, 0xFFF
+  movi    r0, 0x0
+  st      r1, (r0)
+
+.export __fail
+__fail:
+  lrw  r1, 0xEEEE
+  mtcr r1, cr<11,0>
+  lrw     r1, 0xEEE
+  movi    r0, 0x0
+  st      r1, (r0)
+
+__dummy:
+  br      __fail
+
+.export DummyHandler
+DummyHandler:
+  br      __fail
+
+
+.data
+.align  10
+.long __start
diff --git a/Source/arch/mem_init.c b/Source/arch/mem_init.c
new file mode 100644
index 0000000..d9d8c00
--- /dev/null
+++ b/Source/arch/mem_init.c
@@ -0,0 +1,44 @@
+/*
+ * Filename : mem_init.c
+ *
+ * Memory Initialization
+ *
+ * Copyrights 2015 @ APTCHIP
+ *
+ *
+ */
+#include "string.h"
+
+extern char _end_rodata[];
+extern char _start_data[];
+extern char _end_data[];
+
+extern char _bss_start[];
+extern char _ebss[];
+
+
+void __main( void ) 
+{
+
+  char *dst = _start_data;
+  char *src = _end_rodata;
+
+  /* if the start of data (dst)
+     is not equal to end of text (src) then
+     copy it, else it's already in the right place
+     */
+  if( _start_data != _end_rodata ) {
+//    __memcpy_fast( dst, src, (_end_data - _start_data));
+    memcpy( dst, src, (_end_data - _start_data));
+  }
+
+  /* zero the bss 
+   */
+  if( _ebss - _bss_start ) {
+//    __memset_fast( _bss_start, 0x00, ( _ebss - _bss_start ));
+    memset( _bss_start, 0x00, ( _ebss - _bss_start ));
+  }
+
+	
+}
+
diff --git a/Source/cdkws.mk b/Source/cdkws.mk
new file mode 100644
index 0000000..c897709
--- /dev/null
+++ b/Source/cdkws.mk
@@ -0,0 +1,14 @@
+.PHONY: clean All Project_Title Project_Build
+
+All: Project_Title Project_Build
+
+Project_Title:
+	@echo "----------Building project:[ MD203F8P - BuildSet ]----------"
+
+Project_Build:
+	@make -r -f MD203F8P.mk -j 8 -C  ./ 
+
+
+clean:
+	@echo "----------Cleaning project:[ MD203F8P - BuildSet ]----------"
+
diff --git a/Source/ckcpu.ld b/Source/ckcpu.ld
new file mode 100644
index 0000000..69c30de
--- /dev/null
+++ b/Source/ckcpu.ld
@@ -0,0 +1,58 @@
+MEMORY
+{
+ROM(RX)   : ORIGIN = 0x00000000,  LENGTH = 64K
+RAM(RWX)  : ORIGIN = 0x20000000,  LENGTH = 4K
+}
+__kernel_stack = ORIGIN(RAM) + LENGTH(RAM) -8 ;
+ENTRY(__start)
+
+SECTIONS {
+    .text :
+    {
+    . = ALIGN(0x4) ;
+        *crt0.o (.text)
+        *(.text)
+    } >ROM
+
+    .RomCode :
+    {
+    . = ALIGN(0x4) ;
+        *(.text)
+    } >ROM
+	
+    .rodata :
+    {
+    . = ALIGN(0x4) ;
+        *(.rodata) 
+        *(.rodata.*)
+    . = ALIGN(0x4) ; 
+        _end_rodata = .;
+    } >ROM
+
+    .data : AT(_end_rodata)
+    { 
+    . = ALIGN(0x4) ;
+	_start_data = .;
+    	*( .data );
+    . = ALIGN(0x4) ;
+    	_end_data = .; 
+    } >RAM
+
+    .bss :
+    {
+         . = ALIGN(0x4) ;
+         _bss_start = . ;
+             *(.sbss)
+             *(.sbss.*)
+             *(.scommon)
+             *(.bss)
+             *(.bss.*)
+             *(COMMON)
+             . = ALIGN(0x4) ;
+          _ebss = . ;
+          _end = . ;
+          end = . ;
+    } >RAM
+
+}
+
diff --git a/Source/doc/APT32F102_Lib_Fix_Log.md b/Source/doc/APT32F102_Lib_Fix_Log.md
new file mode 100644
index 0000000..f4df6c0
--- /dev/null
+++ b/Source/doc/APT32F102_Lib_Fix_Log.md
@@ -0,0 +1,84 @@
+#20180129 V1.00  初版
+
+#20180131 V1.02：
+	           1.apt32f102_i2c.h，修改I2C_Slave_CONFIG(); PA0.1定义错误
+	           2.apt32f102_i2c.c，修改void I2C_Slave_Receive(void)
+	           3.apt32f102_interrupt.c，修改LPTIntHandler();
+	           4.syscon.h，修改“SYSCON_SCLKCR_RST      	((CSP_REGISTER_T)0xD22Dul<<16)”
+	           5.syscon.C， SYSCON_RST_VALUE(void)	；
+	           5.EPT.C &EPT.H 修改
+	           6.syscon.h，修改  INTDET_POL_X_TypeDef枚举;
+	           7.apt32f102_initial.c ，修改EPT0_Config()；
+	           8.apt32f102_interrupt.c，修改EPT0IntHandler();
+	           9.修改了CRC输入函数，分32/16/8bit数据输入
+	           10.增加了GPT同步及触发事件函数
+               11.增加了WWDT初始化函数
+#20201124 V1.02：	 
+	           1.修改UART_IO_Init();  PA0.15 PA0.14初始化
+	           2.删除SYSCON_CONFIG()；"EVTRG function 程序屏蔽"
+	           3.删除了tkey相关残留的程序
+#20201124 V1.03：
+				1.增加了touch key库文件
+#20201202 V1.04：
+				1.修改了SYSCON_General_CMD();函数，fix 使用外部晶振后调试口被占用的问题
+				2.修改了BT PB0.0配置错误的问题
+				3.修改了外部中断向量EXI9错误的问题
+				4.修改了外部中断向量EXI4to9IntHandle，EXI10to15IntHandler
+				5.修改了GPT.h中PB0.1定义错误的问题
+				6.增加了IFC读ReadDataArry_U8函数，读数据时字节长度可不按4的倍数
+				7.修改了spi.c中PA0.8配置错误的问题
+#20200121 V1.05：
+				1.修改了ADC初始化中的错误
+				2.修改了apt32f102_interrupt.c中EXI15的错误
+				3.修改了BT.c中BT0和BT1混淆的问题
+				4.修复了使用触摸FVR参考时，调用ADC造成触摸失灵的问题
+				5.增加了tkey的睡眠睡醒功能
+				6.修改了1.04 .s文件中外部中断定义错误的问题
+#20210601 V1.06：
+				1.修改了COUNTERA IO配置错误
+				2.修改了BT中IO配置错误
+				3.修改了EPT PB0.5 CHAY配置错误
+				4.修改了EPT 外部触发端口使能配置相反的错误
+				5.增加了I2C做从机时配置i2c中断优先级为最高的配置
+				6.修改了调用GPIO_DeInit后调试口被修改的问题
+				7.修复了TK在FVR模式以外开启TCH3后触摸初始化卡死的问题
+				8.修改了TK参数配置中，使能TK的方式，采用更直观的方式
+				9.修改了TK参数配置中，EC默认电压为3V，FVR参考默认2.048V，防止客户使用3.3V工作电压时一开始TK无法工作的问题
+#20210621 V1.08：
+				1.解决了触摸长时间睡眠后，唤醒失败的问题（功耗增加10uA）
+				2.修改了注释为英文
+				3.修改了不同版本的触摸库文件方便不同应用
+#20210801 V1.09：
+				1.修改了syscon.c，解决了系统主频在切换时偶尔遇到的时钟卡死问题
+				2.增加了IO remap功能函数
+				3.修正1_09和1_09M这两个版本.a库，多键模式按键误清零的问题
+				4.删除之前版本initial.c中对EVTRG function的配置，以解决因此产生的某些情况下睡眠后功耗异常的问题
+#20210825 V1.10：
+				1.修改了SPI做从机时，PA0.14/PA0.15配置错误的问题
+				2.修改了RTC中参数的定义为volatile，解决某些意外情况下进位时小时位出现错误值的问题
+				3.增加了BT中控制波形stop时输出高/低电平函数
+				4.修改gpio.c中配置外部组扩展配置时PB0组IO无法配置的问题,增加了EXI16~19的中断函数
+				5.syscon中加入clo输出配置函数
+				6.在syscon.c中增加Set_INT_Priority();函数，可直接配置中断优先级
+				7.在fwlib文件夹增加了iostring.c文件
+				8.修改库文件包名称为APT32F102x_StdPeriph_Lib
+#20211101 V1.11：
+				1.修改了SIO做RX时，配置错误的问题
+				2.增加了debug print功能
+				3.增加了芯片svc文件，方便查看芯片register内容
+				4.解决了TK和ADC选择不同参考源时造成的互相影响的问题，修改了ADC.c和TK库文件
+				5.修改了EPT中EVTRG配置移位错误
+#20211122 V1.12：
+				1.修改了GPT 同步触发模式的配置定义错误
+				2.增加了频率校准函数std_clk_calib();支持HFOSC IMOSC频率软件校准；
+				3.lib_102ClkCalib_1_03，修改了1.02的校准库在与触摸低功耗共同使用时，会造成睡眠功耗偏大到1.2mA的问题
+#20211213 V1.13：
+				1.修改了在使用ADC时，因为配置ADC序列和序列个数不一致而可能引起的ADC卡死问题
+				2.修改了UART初始化使能函数，解决了因配置顺序导致INT_TX_DONE中断无法进入的问题
+				3.修改了IFC_MR中不同时钟频率下WAIT和SPEED默认值
+				4.解除了TK使用FVR模式参考电压固定选择4.096V的限制，可选择2.048V"抗干扰能力低于4.096V"
+#20220825 V1.15：
+				1.修改去除部分编译中出现的警告
+				2.修改触摸库函数，增加因异常情况overflow后造成的按键扫描卡住问题
+				3.修改部分代码中注释的书写问题
+				4.修改了uart初始化中奇偶校验错误的问题
\ No newline at end of file
diff --git a/Source/doc/APT32F102_TKLib_Version.md b/Source/doc/APT32F102_TKLib_Version.md
new file mode 100644
index 0000000..0c108e4
--- /dev/null
+++ b/Source/doc/APT32F102_TKLib_Version.md
@@ -0,0 +1,16 @@
+#Touch Key库最新版本V1.15
+#Touch Key中断扫描版本
+lib_102TKey_1_15.a        触摸库文件完整版(默认库文件)
+lib_102TKey_1_15C.a       触摸库文件精简版，程序占用空间更小，扫描速度更快，抗干扰性能降低，睡眠功耗更低
+#Touch Key主循环扫描版本
+lib_102TKey_1_15M.a      触摸库文件主循环扫描完整版，不支持睡眠唤醒
+lib_102TKey_1_15MC.a    触摸库文件主循环扫描精简版，程序占用空间更小，扫描速度更快，抗干扰性能降低，去除coret占用，没有长按强制更新功能，不支持睡眠唤醒
+#说明：
+C---Compression
+M---Main Loop
+#注意：
+1.	使用Touch Key主循环扫描版本，需要在主循环中添加tk_prgm();函数，每次执行时间在1~1.8ms之间
+2.	未使用coret功能的版本，需要在apt32f102_interrupt.c中重新打开CORETHandler()入口
+3.  中断扫描版本：每一轮的按键扫描时间可控，触摸体验良好；会占用中断资源，如果有高时序要求的中断，没有配置中断好中断优先级的话会影响高时序要求的中断
+4.  主循环版本：不会占用中断资源，对别的中断不会有影响；每一轮的按键扫描时间不可控，如果主循环一次循环里有函数占用大量时间，会影响按键的触摸体验
+5.  使用1.15版本，必须在linker中包含libm数学库
diff --git a/Source/drivers/apt32f102.c b/Source/drivers/apt32f102.c
new file mode 100644
index 0000000..0eb4720
--- /dev/null
+++ b/Source/drivers/apt32f102.c
@@ -0,0 +1,146 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102.c
+  * @author  APT AE Team
+  * @version V1.01
+  * @date    2019/04/05
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+/**
+  * @addtogroup Struct pointer assignment Functions
+  * @{
+  */
+CSP_CK801_T   	*CK801 = (CSP_CK801_T   *)CK801_BASEADDR ;
+
+CSP_IFC_T   	*IFC     = (CSP_IFC_T    *)APB_IFCBase ;
+CSP_SYSCON_T 	*SYSCON = (CSP_SYSCON_T *)APB_SYSCONBase ;
+
+CSP_TKEY_T  	*TKEY    = (CSP_TKEY_T  *)APB_TKEYBase ;
+CSP_TKEYBUF_T   *TKEYBUF = (CSP_TKEYBUF_T  *)APB_TKEYBUFBase;
+CSP_ADC12_T 	*ADC0    = (CSP_ADC12_T  *)APB_ADC0Base ;
+
+CSP_GPIO_T  	*GPIOA0   = (CSP_GPIO_T  *)APB_GPIOA0Base ; // A0
+CSP_GPIO_T  	*GPIOB0   = (CSP_GPIO_T  *)APB_GPIOB0Base ; // B0
+CSP_IGRP_T  	*GPIOGRP  = (CSP_IGRP_T *)APB_IGRPBase;
+
+CSP_UART_T  	*UART0    = (CSP_UART_T  *)APB_UART0Base ;
+CSP_UART_T  	*UART1    = (CSP_UART_T  *)APB_UART1Base ;
+CSP_UART_T  	*UART2    = (CSP_UART_T  *)APB_UART2Base ;
+CSP_SSP_T   	*SPI0     = (CSP_SSP_T   *)APB_SPI0Base ;
+CSP_I2C_T   	*I2C0     = (CSP_I2C_T   *)APB_I2C0Base ;
+CSP_SIO_T   	*SIO0     = (CSP_SIO_T   *)APB_SIO0Base ;
+CSP_CA_T    	*CA0      = (CSP_CA_T    *)APB_CNTABase ;
+
+CSP_GPT_T		*GPT0	  =	(CSP_GPT_T *)APB_GPT0Base;
+CSP_EPT_T   	*EPT0     = (CSP_EPT_T  *)APB_EPT0Base ;
+CSP_ETCB_T  	*ETCB     = (CSP_ETCB_T *)APB_ETCBBase ;
+CSP_RTC_T   	*RTC      = (CSP_RTC_T  *)APB_RTCBase ;
+CSP_LPT_T   	*LPT      = (CSP_LPT_T  *)APB_LPTBase ;
+CSP_WWDT_T   	*WWDT      = (CSP_WWDT_T  *)APB_WWDTBase ;
+CSP_BT_T    	*BT0      = (CSP_BT_T   *)APB_BT0Base ;
+CSP_BT_T    	*BT1      = (CSP_BT_T   *)APB_BT1Base ;
+CSP_CRC_T   	*CRC      = (CSP_CRC_T  *)AHB_CRCBase ;
+CSP_HWD_T   	*HWD      = (CSP_HWD_T  *)APB_HWDBase ;
+
+int __divsi3 (  int a,   int b)
+{   
+	int PSR;
+	__asm volatile(
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+
+	HWD->CR = 0;
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+	__asm volatile(
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+					
+	return HWD->QUOTIENT;
+}
+ unsigned int __udivsi3 ( unsigned int a,  unsigned int b)
+{   
+	int PSR;
+	__asm volatile(
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+	__asm volatile(
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);
+
+	return HWD->QUOTIENT;
+}
+
+int __modsi3 ( int a,  int b)
+{   
+	int PSR;
+	__asm volatile(
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 0;
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+	__asm volatile(
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+}
+
+unsigned int __umodsi3 ( unsigned int a,  unsigned int b)
+{   
+	int PSR;
+	__asm volatile(
+					"mfcr %0 , psr \n\r"
+					"psrclr ie \n\r"
+					: "=r"(PSR)
+				   );
+	
+	HWD->CR = 1;
+	HWD->DIVIDENT = a;
+	HWD->DIVISOR = b;
+
+	PSR |= 0x80000000;
+	__asm volatile(
+					 "mtcr %0 , psr \n\r"
+					 : 
+					 :"r"(PSR)
+					);	
+	return HWD->REMAIN;
+}
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/drivers/apt32f102_ck801.c b/Source/drivers/apt32f102_ck801.c
new file mode 100644
index 0000000..3cf5be2
--- /dev/null
+++ b/Source/drivers/apt32f102_ck801.c
@@ -0,0 +1,275 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_ck801.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+#include "apt32f102_ck801.h"
+
+void CK801_Init(void)
+{
+        /* Initial the Interrupt source priority level registers */
+        CK801->IPR[0] = 0xC0804000;
+        CK801->IPR[1] = 0xC0004000;
+        CK801->IPR[2] = 0xC0804000;
+        CK801->IPR[3] = 0xC0804000;
+        CK801->IPR[4] = 0xC0804000;
+        CK801->IPR[5] = 0xC0804000;
+        CK801->IPR[6] = 0xC0804000;
+        CK801->IPR[7] = 0xC0804000;
+
+        CK801->IPTR 	 = 0x00000000;//disable threshold
+}
+
+void force_interrupt(IRQn_Type IRQn)
+{
+	CK801->ISPR = (1 << (uint32_t)(IRQn));
+}
+
+
+void CK_CPU_EnAllNormalIrq(void)
+{
+  asm  ("psrset ee,ie");
+}
+
+void CK_CPU_DisAllNormalIrq(void)
+{
+ asm  ("psrclr ie");
+}
+
+/* ##########################   NVIC functions  #################################### */
+
+
+/**
+ * @brief  Enable Interrupt in NVIC Interrupt Controller
+ *
+ * @param  IRQn   The positive number of the external interrupt to enable
+ *
+ * Enable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+__INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+
+        CK801->ISER = 1 << (uint32_t)(IRQn);
+}
+
+/**
+ * @brief  Disable the interrupt line for external interrupt specified
+ * 
+ * @param  IRQn   The positive number of the external interrupt to disable
+ * 
+ * Disable a device specific interupt in the NVIC interrupt controller.
+ * The interrupt number cannot be a negative value.
+ */
+__INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+        CK801->ICER = 1 << (uint32_t)(IRQn);
+}
+
+/**
+ * @brief  Read the interrupt pending bit for a device specific interrupt source
+ * 
+ * @param  IRQn    The number of the device specifc interrupt
+ * @return         always 0
+ */
+__INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+        return (uint32_t)(CK801->ISPR);
+}
+
+/**
+ * @brief  Set the pending bit for an external interrupt
+ * 
+ * @param  IRQn    The number of the interrupt for set pending
+ *
+ * No effect.
+ */
+__INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+	CK801->ISPR = (1 << (uint32_t)(IRQn));
+}
+/**
+ * @brief  Clear the pending bit for an external interrupt
+ *
+ * @param  IRQn    The number of the interrupt for clear pending
+ *
+ * No effect.
+ */
+__INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+	CK801->ICPR = (1 << (uint32_t)(IRQn));
+}
+
+/**
+ * @brief  Read the active bit for an external interrupt
+ *
+ * @return         always 0
+ *
+ */
+__INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+{
+    return (CK801->IABR & (1 << IRQn));
+}
+
+__INLINE uint32_t NVIC_GetActiveVector(void)
+{
+	unsigned int vectactive = 0;
+	//isr low 8bits gives the active vector
+	vectactive = (CK801 ->ISR & 0xff);
+    return vectactive;
+}
+
+/**
+ * @brief  Set the priority for an interrupt
+ *
+ * @param  IRQn      The number of the interrupt for set priority
+ * @param  priority  The priority to set ,the number rang: [0-3]
+ *
+ * Set the priority for the specified interrupt. The interrupt 
+ * number must be positive to specify an external (device specific) 
+ * interrupt.
+ */
+__INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+
+	uint32_t tmp = ((IRQn & 0x03) << 3);
+	uint8_t index = IRQn>>2;
+    if(IRQn >= 0) {
+    	CK801->IPR[index] &= ~(0xff << tmp);
+    	CK801->IPR[index] |= priority << (tmp+6);
+    }
+
+}
+/**
+ * @brief  Read the priority for an interrupt
+ *
+ * @param  IRQn      The number of the interrupt for get priority
+ * @return           The priority for the interrupt
+ *
+ * Read the priority for the specified interrupt. The interrupt 
+ * number must be positive to specify an external (device specific) 
+ * interrupt.
+ */
+__INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+{
+	uint32_t tmp = ((IRQn & 0x03) << 3);
+	uint8_t index = IRQn>>2;
+	return (uint32_t)(CK801->IPR[index])>>(tmp + 6);
+}
+
+
+/*###################################################################*/
+/*#############    Threshold Enable & Set Threshold   ###############*/
+/*###################################################################*/
+
+/************************************************************
+ * @brief	enable NVIC threshold
+ * @name: NVIC_EnableThreshold
+ * @no param
+ *
+ */
+
+__INLINE void NVIC_EnableThreshold(void)
+{
+	CK801 ->IPTR |= 0x80000000;
+}
+
+/************************************************************
+ * @brief	disnable NVIC threshold
+ * @name: NVIC_DisableThreshold
+ * @no param
+ *
+ */
+
+__INLINE void NVIC_DisableThreshold(void)
+{
+	CK801 ->IPTR &= ~0x80000000;
+}
+
+
+/************************************************************
+ * @brief	set NVIC Priothreshold
+ * @name: NVIC_SetPrioThreshold
+ * @param prioshreshold		the priority of threshold[0,3]
+ *
+ */
+
+__INLINE void NVIC_SetPrioThreshold(uint8_t prioshreshold)
+{
+	CK801 -> IPTR &= 0xffffff00;
+	CK801 -> IPTR |= (prioshreshold << 6);
+}
+
+/************************************************************
+ * @brief	set NVIC Vectthreshold
+ * @name: NVIC_SetVectThreshold
+ * @param vectthreshold		the vector of threshold[0,31]
+ *
+ */
+
+__INLINE void NVIC_SetVectThreshold(uint8_t vectthreshold)
+{
+	CK801 -> IPTR &= 0xffff00ff;
+	CK801 -> IPTR |= ((vectthreshold + 32) << 8);
+}
+
+
+/*###################################################################*/
+/*################    Low Power Wakeup Enable     ###################*/
+/*###################################################################*/
+
+/*************************************************************
+ * @name:	NVIC_PowerWakeUp_Enable
+ * @brief:	enable the bit for Power wake up
+ * @param:	irqn	the irqnumber,eg:CK802_CORETIM_IRQn
+ */
+__INLINE void NVIC_PowerWakeUp_Enable(IRQn_Type irqn)
+{
+	CK801->IWER |= (1 << irqn);
+}
+
+/*************************************************************
+ * @name:	NVIC_PowerWakeUp_Disable
+ * @func:	disable the bit for Power wake up
+ * @param:	irqn	the irqnumber,eg:CK802_CORETIM_IRQn
+ */
+__INLINE void NVIC_PowerWakeUp_Disable(IRQn_Type irqn)
+{
+	CK801->IWDR |= (1 << irqn);
+}
+
+/*************************************************************
+ * @name:	NVIC_PowerWakeUp_EnableAll
+ * @func:	enable all bits for Power wake up
+ * @param:	none
+ */
+__INLINE void NVIC_PowerWakeUp_EnableAll(void)
+{
+	CK801->IWER = 0xffffffff;
+}
+
+/*************************************************************
+ * @name:	NVIC_PowerWakeUp_EnableAll
+ * @func:	disable all bits for Power wake up
+ * @param:	none
+ */
+__INLINE void NVIC_PowerWakeUp_DisableAll(void)
+{
+	CK801->IWDR = 0xffffffff;
+}
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102.h b/Source/include/apt32f102.h
new file mode 100644
index 0000000..05a3ad0
--- /dev/null
+++ b/Source/include/apt32f102.h
@@ -0,0 +1,774 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_initial.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2018/11/01
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/ 
+#ifndef _apt32f102_H
+#define _apt32f102_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102_types_local.h"
+#include "apt32f102_ck801.h"
+
+/**
+@brief CK801 bits Structure
+*/
+typedef struct {
+	volatile unsigned int ReservedA[4];		//0xE000E000
+	volatile unsigned int CORET_CSR;			//0xE000E010
+	volatile unsigned int CORET_RVR;			//0xE000E014
+	volatile unsigned int CORET_CVR;			//0xE000E018
+	volatile unsigned int CORET_CALIB;		//0xE000E01C
+	volatile unsigned int ReservedB[56];		//0xE000E020
+	volatile unsigned int ISER;				//0xE000E100
+	volatile unsigned int ReservedC[15];		//
+	volatile unsigned int IWER;				//0xE000E140
+	volatile unsigned int ReservedD[15];		//
+	volatile unsigned int ICER;				//0xE000E180
+	volatile unsigned int ReservedE[15];		//
+	volatile unsigned int IWDR;				//0xE000E1C0
+	volatile unsigned int ReservedF[15];		//
+	volatile unsigned int ISPR;				//0xE000E200
+	volatile unsigned int ReservedG[31];		//
+	volatile unsigned int ICPR;				//0xE000E280
+	volatile unsigned int ReservedH[31];		//
+	volatile unsigned int IABR;				//0xE000E300
+	volatile unsigned int ReservedI[63];		//
+	volatile unsigned int IPR[8];			//0xE000E400 ~ 0xE000E41C
+	volatile unsigned int ReservedJ[504];	//
+	volatile unsigned int ISR; 				//0xE000EC00
+	volatile unsigned int IPTR; 				//0xE000EC04
+} CSP_CK801_T;
+/**
+@brief IFC bits Structure
+*/
+typedef volatile struct {
+	volatile unsigned int IDR ;
+	volatile unsigned int CEDR ;
+	volatile unsigned int SRR ;
+	volatile unsigned int CMR ;
+	volatile unsigned int CR ;
+	volatile unsigned int MR ;
+	volatile unsigned int FM_ADDR ;
+	volatile unsigned int Reserved ;
+	volatile unsigned int KR ;
+	volatile unsigned int IMCR ;
+	volatile unsigned int RISR ;
+	volatile unsigned int MISR ;
+	volatile unsigned int ICR ;
+} CSP_IFC_T ;
+/**
+@brief SYSCON bits Structure
+*/
+typedef volatile struct {                   			/*!< SYSCON Structure                         */
+	volatile unsigned int IDCCR;                        /*!< 0x000: Identification & System Controller Clock Control Register */
+	volatile unsigned int GCER;                         /*!< 0x004: System Controller General Control Enable Register */
+	volatile unsigned int GCDR;                         /*!< 0x008: System Controller General Control Disable Register */
+	volatile unsigned int GCSR;                         /*!< 0x00C: System Controller General Control Status Register */
+	volatile unsigned int CKST;                         /*!< 0x010*/
+	volatile unsigned int RAMCHK;                       /*!< 0x014*/
+	volatile unsigned int EFLCHK;                       	/*!< 0x018*/
+	volatile unsigned int SCLKCR;                       /*!< 0x01C: System Controller System Clock Selection & Division Register */
+	volatile unsigned int PCLKCR;                       /*!< 0x020: System Controller Peripheral Clock Selection & Division Register */
+	volatile unsigned int _RSVD0;                       /*!< 0x024*/
+	volatile unsigned int PCER0;                        /*!< 0x028: System Controller Peripheral Clock Enable Register */
+	volatile unsigned int PCDR0;                        /*!< 0x02C: System Controller Peripheral Clock Disable Register */
+	volatile unsigned int PCSR0;                        /*!< 0x030: System Controller Peripheral Clock Status Register */
+	volatile unsigned int PCER1;                        /*!< 0x034: System Controller Peripheral Clock Enable Register */
+	volatile unsigned int PCDR1;                        /*!< 0x038: System Controller Peripheral Clock Disable Register */
+	volatile unsigned int PCSR1;                        /*!< 0x03C: System Controller Peripheral Clock Status Register */
+	volatile unsigned int OSTR;                         /*!< 0x040: System Controller External OSC Stable Time Control Register */
+	volatile unsigned int _RSVD1;                       /*!< 0x044: System Controller PLL Stable Time Control Register */
+	volatile unsigned int _RSVD2;                       /*!< 0x048: System Controller PLL PMS Value Control Register */
+	volatile unsigned int LVDCR;                        /*!< 0x04C: System Controller LVD Control Register */
+	volatile unsigned int CLCR;                         /*!< 0x050: System Controller IMOSC Fine Adjustment Register*/
+	volatile unsigned int PWRCR;                        /*!< 0x054: System Controller Power Control Register */
+	volatile unsigned int PWRKEY;                       /*!< 0x058: System Controller Power Control Register */
+	volatile unsigned int _RSVD3;                       /*!< 0x05C: */
+	volatile unsigned int _RSVD4;                       /*!< 0x060: */
+	volatile unsigned int OPT1;                         /*!< 0x064: System Controller OSC Trim Control Register */
+	volatile unsigned int OPT0;                         /*!< 0x068: System Controller Protection Control Register */
+	volatile unsigned int WKCR;                         /*!< 0x06C: System Controller Clock Quality Check Control Register */
+	volatile unsigned int _RSVD5;                       /*!< 0x070: System Controller Clock Quality Check Control Register */
+	volatile unsigned int IMER;                         /*!< 0x074: System Controller Interrupt Enable Register */
+	volatile unsigned int IMDR;                         /*!< 0x078: System Controller Interrupt Disable Register */
+	volatile unsigned int IMCR;                         /*!< 0x07C: System Controller Interrupt Mask Register */
+	volatile unsigned int IAR;                          /*!< 0x080: System Controller Interrupt Active Register */
+	volatile unsigned int ICR;                          /*!< 0x084: System Controller Clear Status Register */
+	volatile unsigned int RISR;                         /*!< 0x088: System Controller Raw Interrupt Status Register */
+	volatile unsigned int MISR;                          /*!< 0x08C: System Controller Raw Interrupt Status Register */
+	volatile unsigned int RSR;                          /*!< 0x090: System Controller Raw Interrupt Status Register */
+	volatile unsigned int EXIRT;                        /*!< 0x094: System Controller Reset Status Register */
+	volatile unsigned int EXIFT;                        /*!< 0x098: System Controller External Interrupt Mode 1 (Positive Edge) Register */
+	volatile unsigned int EXIER;                        /*!< 0x09C: System Controller External Interrupt Mode 2 (Negative Edge) Register */
+	volatile unsigned int EXIDR;                        /*!< 0x0A0: System Controller External Interrupt Enable Register */
+	volatile unsigned int EXIMR;                        /*!< 0x0A4: System Controller External Interrupt Disable Register */
+	volatile unsigned int EXIAR;                        /*!< 0x0A8: System Controller External Interrupt Mask Register */
+	volatile unsigned int EXICR;                        /*!< 0x0AC: System Controller External Interrupt Active Register */
+	volatile unsigned int EXIRS;                        /*!< 0x0B0: System Controller External Interrupt Clear Status Register */
+	volatile unsigned int IWDCR;                        /*!< 0x0B4: System Controller Independent Watchdog Control Register */
+	volatile unsigned int IWDCNT;                       /*!< 0x0B8: SystCem Controller Independent Watchdog Counter Value Register */
+	volatile unsigned int IWDEDR;                       /*!< 0x0BC: System Controller Independent Watchdog Enable/disable Register*/
+	volatile unsigned int IOMAP0;                        /*!< 0x0C0: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int IOMAP1;                        /*!< 0x0C4: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int CINF0;                        /*!< 0x0C8: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int CINF1;                        /*!< 0x0CC: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int FINF0;                        /*!< 0x0D0: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int FINF1;                        /*!< 0x0D4: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int FINF2;                        /*!< 0x0D8: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int _RSVD6;                        /*!< 0x0DC: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int ERRINF;                       /*!< 0x0E0:*/
+	volatile unsigned int UID0 ;                        /*!< 0x0E4: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int UID1 ;                        /*!< 0x0E8: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int UID2 ;                        /*!< 0x0EC: Customer Information Content mirror of 1st byte*/
+	volatile unsigned int PWROPT;                       /*!< 0x0F0: Power recovery timmming control */
+	volatile unsigned int EVTRG;                       /*!< 0x0F4: Trigger gen                                    */
+	volatile unsigned int EVPS;                       /*!< 0x0F8: Trigger prs                                    */
+	volatile unsigned int EVSWF;                       /*!< 0x0FC: Trigger software force                         */
+	volatile unsigned int UREG0;                       /*!< 0x100: User defined reg0                              */
+	volatile unsigned int UREG1;                       /*!< 0x104: User defined reg1                              */
+	volatile unsigned int UREG2;                       /*!< 0x108: User defined reg0                              */
+	volatile unsigned int UREG3;                       /*!< 0x10C: User defined reg1                              */
+} CSP_SYSCON_T;  
+/**
+@brief ETCB  bits Structure
+*/
+ typedef volatile struct
+ {
+    volatile unsigned int  EN;            /* ETCB Enable                            */
+    volatile unsigned int  SWTRG;         /* ETCB Software Trigger Generator         */
+    volatile unsigned int  CH0CON0;       /* ETCB Channel 0 Control Register 0       */
+    volatile unsigned int  CH0CON1;       /* ETCB Channel 0 Control Register 1       */
+    volatile unsigned int  CH1CON0;       /* ETCB Channel 1 Control Register 0       */
+    volatile unsigned int  CH1CON1;       /* ETCB Channel 1 Control Register 1       */
+    volatile unsigned int  CH2CON0;       /* ETCB Channel 2 Control Register 0       */
+    volatile unsigned int  CH2CON1;       /* ETCB Channel 2 Control Register 1       */
+	volatile unsigned int  _RSVD0;
+	volatile unsigned int  _RSVD1;
+	volatile unsigned int  _RSVD2;
+	volatile unsigned int  _RSVD3;
+    volatile unsigned int  CH3CON;       /*  ETCB Channel 3 Control Register        */
+	volatile unsigned int  CH4CON;       /*  ETCB Channel 3 Control Register        */
+	volatile unsigned int  CH5CON;       /*  ETCB Channel 3 Control Register        */
+	volatile unsigned int  CH6CON;       /*  ETCB Channel 3 Control Register        */
+	volatile unsigned int  CH7CON;       /*  ETCB Channel 3 Control Register        */
+ } CSP_ETCB_T, *CSP_ETCB_PTR;    
+/**
+@brief TKEY  bits Structure
+*/
+typedef volatile struct
+{
+   volatile unsigned int  TCH_CCR;               /* Control Register */
+   volatile unsigned int  TCH_CON0;               /* Control Register */
+   volatile unsigned int  TCH_CON1;               /* Control Register */
+   volatile unsigned int  TCH_SCCR;               /* Hardmacro control    */
+   volatile unsigned int  TCH_SENPRD;            /* Sensing target value */
+   volatile unsigned int  TCH_VALBUF;            /* Reference value capture value*/
+   volatile unsigned int  TCH_SENCNT;            /* Sensing counter value*/
+   volatile unsigned int  TCH_TCHCNT;            /* Reference counter value*/
+   volatile unsigned int  TCH_THR;                /* Match Status           */
+   volatile unsigned int  Reserved0;			
+   volatile unsigned int  TCH_RISR;               /* Interrupt Enable       */
+   volatile unsigned int  TCH_IER;               /* Interrupt Clear        */
+   volatile unsigned int  TCH_ICR;            /* Sensing target value */
+   volatile unsigned int  TCH_RWSR;            /* Reference value capture value*/
+   volatile unsigned int  TCH_OVW_THR;            /* Sensing counter value*/
+   volatile unsigned int  TCH_OVF;            /* Reference counter value*/
+   volatile unsigned int  TCH_OVT;                /* Match Status           */
+   volatile unsigned int  TCH_SYNCR;               /* Interrupt Enable       */
+   volatile unsigned int  TCH_EVTRG;               /* Interrupt Clear        */
+   volatile unsigned int  TCH_EVPS;            /* Sensing target value */
+   volatile unsigned int  TCH_EVSWF;            /* Reference value capture value*/
+} CSP_TKEY_T, *CSP_TKEY_PTR; 
+/**
+@brief TKEY advance bits Structure
+*/
+typedef volatile struct
+{
+   volatile unsigned int  TCH_CHVAL[18];          /* Reference value capture value */
+   volatile unsigned int  TCH_SEQCON[18];         /* SEQ Hardmacro control  */
+} CSP_TKEYBUF_T, *CSP_TKEYBUF_PTR;  
+/**
+@brief ADC0  bits Structure
+*/    
+ typedef volatile struct
+ {
+    volatile unsigned int  ECR;              /**< Clock Enable Register             */
+    volatile unsigned int  DCR;              /**< Clock Disable Register            */
+    volatile unsigned int  PMSR;             /**< Power Management Status Register  */
+    volatile unsigned int  Reserved0;
+    volatile unsigned int  CR;               /**< Control Register                  */
+    volatile unsigned int  MR;               /**< Mode Register                     */
+    volatile unsigned int  SHR;
+    volatile unsigned int  CSR;              /**< Clear Status Register             */
+    volatile unsigned int  SR;               /**< Status Register                   */
+    volatile unsigned int  IER;              /**< Interrupt Enable Register         */
+    volatile unsigned int  IDR;              /**< Interrupt Disable Register        */
+    volatile unsigned int  IMR;              /**< Interrupt Mask Register           */
+    volatile unsigned int  SEQ[16];          /**< Conversion Mode Register 0~11     */
+    volatile unsigned int  PRI;              /**< Conversion Priority Register      */
+    volatile unsigned int  TDL0;             /**< Trigger Delay control Register    */
+    volatile unsigned int  TDL1;             /**< Trigger Delay control Register    */
+    volatile unsigned int  SYNCR;            /**< Sync Control Register             */
+    volatile unsigned int  Reserved1;           /**< Trigger Filter Control Register   */
+    volatile unsigned int  Reserved2;           /**< Trigger Filter Window  Register   */
+    volatile unsigned int  EVTRG;            /**< Event Trigger Control  Register   */
+    volatile unsigned int  EVPS;             /**< Event Prescale Register           */
+    volatile unsigned int  EVSWF;            /**< Event Softtrig Register           */
+    volatile unsigned int  ReservedD[27];
+    volatile unsigned int  DR[16];           /**< Convert Data Register             */
+    volatile unsigned int  CMP0;             /**< Comparison Data Register             */
+    volatile unsigned int  CMP1;             /**< Comparison Data Register             */
+	volatile unsigned int  DRMASK; 
+ } CSP_ADC12_T, *CSP_ADC12_PTR;
+/**
+@brief GPIOX   bits Structure
+*/   
+ typedef volatile struct
+ {
+    volatile unsigned int  CONLR;                /**< Control Low  Register                */
+    volatile unsigned int  CONHR;                /**< Control High Register                */
+    volatile unsigned int  WODR;                 /**< Write Output Data Register           */              
+    volatile unsigned int  SODR;                 /**< Set Output Data (bit-wise) Register  */
+    volatile unsigned int  CODR;                 /**< Clear Output Data (bit-wise) Register*/
+    volatile unsigned int  ODSR;                 /**< Output Data Status Register          */
+    volatile unsigned int  PSDR;                 /**< Pin Data Status Register             */              
+    volatile unsigned int  FLTEN;         
+    volatile unsigned int  PUDR;                 /**< IO Pullup_Pulldown Register          */
+    volatile unsigned int  DSCR;                 /**< Output Driving Strength Register     */
+    volatile unsigned int  OMCR;                 /**< Slew-rate, Open-Drain Control        */  
+    volatile unsigned int  IECR;                 /**< EXI enable control                   */  
+	volatile unsigned int  IEER;
+	volatile unsigned int  IEDR;
+ } CSP_GPIO_T, *CSP_GPIO_PTR; 
+
+ typedef volatile struct
+ {
+	volatile unsigned int  IGRPL;                	/**< EXI group control                   */
+    volatile unsigned int  IGRPH;	                /**< EXI group control               */
+	volatile unsigned int  IGREX;
+    volatile unsigned int  IO_CLKEN;	
+ } CSP_IGRP_T, *CSP_IGRP_PTR;     
+/**
+@brief UART0~UART1  bits Structure
+*/    
+ typedef volatile struct
+ {
+    volatile unsigned int  DATA;               /**< Write and Read Data Register    */
+    volatile unsigned int  SR;                 /**< Status Register                 */
+    volatile unsigned int  CTRL;                /**< Control Register                */
+    volatile unsigned int  ISR;                /**< Interrupt Status Register       */
+    volatile unsigned int  BRDIV;               /**< Baud Rate Generator Register    */
+    volatile unsigned int  ReservedA[20];
+ } CSP_UART_T, *CSP_UART_PTR;   
+/**
+@brief SPI0  bits Structure
+*/  
+typedef struct
+{
+	volatile unsigned int  CR0;			/**< Control Register 0 */
+	volatile unsigned int  CR1;			/**< Control Register 1 */
+	volatile unsigned int  DR; 			/**< Receive FIFO(read) and transmit FIFO data register(write) */
+	volatile unsigned int  SR;				/**< Status register */
+	volatile unsigned int  CPSR;			/**< Clock prescale register */
+	volatile unsigned int  IMSCR;			/**< Interrupt mask set and clear register */
+	volatile unsigned int  RISR;			/**< Raw interrupt status register */
+	volatile unsigned int  MISR;			/**< Masked interrupt status register */
+	volatile unsigned int  ICR;			/**< Interrupt clear register */
+} CSP_SSP_T, *CSP_SSP_PTR;
+/**
+@brief SIO0  bits Structure
+*/
+typedef struct
+{
+	volatile unsigned int  CR;			
+	volatile unsigned int  TXCR0;			
+	volatile unsigned int  TXCR1; 			
+	volatile unsigned int  TXBUF;			
+	volatile unsigned int  RXCR0;			
+	volatile unsigned int  RXCR1;	
+	volatile unsigned int  RXCR2;		
+	volatile unsigned int  RXBUF;			
+	volatile unsigned int  RISR;			
+	volatile unsigned int  MISR;
+	volatile unsigned int  IMCR;
+	volatile unsigned int  ICR;		
+} CSP_SIO_T, *CSP_SIO_PTR;
+/**
+@brief I2C0  bits Structure
+*/      
+ typedef volatile struct
+ {
+    unsigned int  CR;           /* I2C Control                            */
+    unsigned int  TADDR;           /* I2C Target Address                     */
+    unsigned int  SADDR;           /* I2C Slave Address                      */
+    unsigned int  ReservedD;      
+    unsigned int  DATA_CMD;      /* I2C Rx/Tx Data Buffer and Command      */
+    unsigned int  SS_SCLH;       /* I2C Standard Speed SCL High Count      */
+    unsigned int  SS_SCLL;       /* I2C Standard Speed SCL Low  Count      */
+    unsigned int  FS_SCLH;       /* I2C Fast mode and Fast Plus SCL High Count*/
+    unsigned int  FS_SCLL;       /* I2C Fast mode and Fast Plus SCL Low  Count*/
+    unsigned int  ReservedA;      /* I2C High Speed SCL High Count          */
+    unsigned int  ReservedC;      /* I2C High Speed SCL Low  Count          */
+    unsigned int  RX_FLSEL;      /* I2C Receive FIFO Threshold             */
+    unsigned int  TX_FLSEL;      /* I2C Transmit FIFO Threshold            */
+    unsigned int  RX_FL;         /* I2C Receive  FIFO Level                */
+    unsigned int  TX_FL;         /* I2C Transmit FIFO Level                */
+    unsigned int  ENABLE;        /* I2C Enable                             */
+    unsigned int  STATUS;        /* I2C Status                             */
+    unsigned int  ReservedB;    /* I2C Enable Status                      */
+    unsigned int  SDA_TSETUP;    /* I2C SDA Setup Time                     */
+    unsigned int  SDA_THOLD;     /* I2C SDA hold time length               */
+    unsigned int  SPKLEN;     /* I2C SS and FS Spike Suppression Limit  */
+    //unsigned int  HS_SPKLEN;     /* I2C HS Spike Suppression Limit         */
+    unsigned int  ReservedE;
+	unsigned int  MISR;          /* I2C Masked Interrupt Status            */
+    unsigned int  IMSCR;         /* I2C Interrupt Enable                   */
+    unsigned int  RISR;          /* I2C Raw Interrupt Status               */
+    unsigned int  ICR;           /* I2C Interrupt Clear                    */
+    unsigned int  ReservedF;
+    unsigned int  SCL_TOUT; 	/* I2C SCL Stuck at Low Timeout           */
+    unsigned int  SDA_TOUT; 	/* I2C SDA Stuck at Low Timeout           */
+    unsigned int  TX_ABRT;   	/* I2C Transmit Abort Status              */
+    unsigned int  GCALL;     	/* I2C ACK General Call                   */
+    unsigned int  NACK; 		/* I2C Generate SLV_DATA_NACK             */
+ } CSP_I2C_T, *CSP_I2C_PTR;
+/**
+@brief CA0   bits Structure
+*/      
+ typedef struct
+ {
+    volatile unsigned int      CADATAH;        /**< DATA High Register            */
+    volatile unsigned int      CADATAL;        /**< DATA Low Register             */
+    volatile unsigned int      CACON;          /**< Control Register              */
+    volatile unsigned int      INTMASK;        /**< Interrupt Mask CR             */
+ } CSP_CA_T, *CSP_CA_PTR;  
+/**
+@brief	GPTX   bits Structure
+*/   
+ typedef struct
+ {
+	volatile unsigned int	CEDR;  		//0x0000	Clock control & ID
+	volatile unsigned int	RSSR;		//0x0004	Start & Stop Ctrl
+	volatile unsigned int	PSCR;		//0x0008	Clock prescaler
+	volatile unsigned int	CR;  		//0x000C	Control register
+	volatile unsigned int	SYNCR;		//0x0010	Synchronization control reg
+	volatile unsigned int	GLDCR;		//0x0014	Global load control reg
+	volatile unsigned int	GLDCFG; 	//0x0018	Global load config
+	volatile unsigned int	GLDCR2;		//0x001C	Global load control reg2
+	volatile unsigned int	Reserved0;		//0x0020
+	volatile unsigned int	PRDR;   	//0x0024	Period reg
+	volatile unsigned int	Reserved1;		//0x0028
+	volatile unsigned int	CMPA;  		//0x002C	Compare Value A
+	volatile unsigned int	CMPB;   	//0x0030	Compare Value B
+	volatile unsigned int	Reserved2;		//0x0034
+	volatile unsigned int	Reserved3;		//0x0038
+	volatile unsigned int	CMPLDR;	    //0x003C	Cmp reg load control
+	volatile unsigned int	CNT;      	//0x0040	Counter reg
+	volatile unsigned int	AQLDR; 		//0x0044	AQ reg load control
+	volatile unsigned int	AQCRA;      //0x0048	Action qualify of ch-A
+	volatile unsigned int	AQCRB;    	//0x004C	Action qualify of ch-B
+	volatile unsigned int	Reserved4;		//0x0050
+	volatile unsigned int	Reserved5;		//0x0054
+	volatile unsigned int	Reserved6;		//0x0058
+	volatile unsigned int	AQOSF; 		//0x005C	AQ output one-shot software forcing
+	volatile unsigned int	AQCSF;      //0x0060	AQ output conti-software forcing
+	volatile unsigned int	Reserved7;		//0x0064
+	volatile unsigned int	Reserved8;		//0x0068
+	volatile unsigned int	Reserved9;		//0x006c
+	volatile unsigned int	Reserved10;		//0x0070
+	volatile unsigned int	Reserved11;		//0x0074
+	volatile unsigned int	Reserved12;		//0x0078
+	volatile unsigned int	Reserved13;		//0x007c
+	volatile unsigned int	Reserved14;		//0x0080
+	volatile unsigned int	Reserved15;		//0x0084
+	volatile unsigned int	Reserved16;		//0x0088
+	volatile unsigned int	Reserved17;		//0x008c
+	volatile unsigned int	Reserved18;		//0x0090
+	volatile unsigned int	Reserved19;		//0x0094
+	volatile unsigned int	Reserved20;		//0x0098
+	volatile unsigned int	Reserved21;		//0x009c
+	volatile unsigned int	Reserved22;		//0x00a0
+	volatile unsigned int	Reserved23;		//0x00a4
+	volatile unsigned int	Reserved24;		//0x00a8
+	volatile unsigned int	Reserved25;		//0x00ac
+	volatile unsigned int	Reserved26;		//0x00b0
+	volatile unsigned int	Reserved27;		//0x00b4
+	volatile unsigned int  TRGFTCR;    //0x00B8    Trigger Filter control reg
+	volatile unsigned int  TRGFTWR;    //0x00BC    Trigger filter window
+	volatile unsigned int  EVTRG;      //0x00C0    Event trigger setting
+	volatile unsigned int  EVPS;       //0x00C4    Event presaler
+	volatile unsigned int  EVCNTINIT;	//0x00C8
+	volatile unsigned int  EVSWF;      //0x00CC    Event software forcing
+	volatile unsigned int  RISR;       //0x00D0    Interrupt RISR
+	volatile unsigned int  MISR;       //0x00D4    Interrupt MISR
+	volatile unsigned int  IMCR;       //0x00D8    Interrupt IMCR
+	volatile unsigned int  ICR;        //0x00DC    Interrupt clear
+	volatile unsigned int  REGLINK;    //0x00E0    Register link
+	
+ }CSP_GPT_T,*CSP_GPT_PTR;
+/**
+@brief EPT0    bits Structure
+*/   
+ typedef struct
+ {
+   volatile unsigned int	CEDR;  		//0x0000	Clock control & ID
+   volatile unsigned int	RSSR;		//0x0004	Start & Stop Ctrl
+   volatile unsigned int	PSCR;		//0x0008	Clock prescaler
+   volatile unsigned int	CR;  		//0x000C	Control register
+   volatile unsigned int	SYNCR;		//0x0010	Synchronization control reg
+   volatile unsigned int	GLDCR;		//0x0014	Global load control reg
+   volatile unsigned int	GLDCFG; 	//0x0018	Global load config
+   volatile unsigned int	GLDCR2;		//0x001C	Global load control reg2
+   volatile unsigned int    HRCFG;      //0x0020
+   volatile unsigned int	PRDR;   	//0x0024	Period reg
+   volatile unsigned int	PHSR;     	//0x0028	Phase control reg
+   volatile unsigned int	CMPA;  		//0x002C	Compare Value A
+   volatile unsigned int	CMPB;   	//0x0030	Compare Value B
+   volatile unsigned int	CMPC;     	//0x0034	Compare Value C 
+   volatile unsigned int	CMPD;  		//0x0038	Compare Value D
+   volatile unsigned int	CMPLDR;	    //0x003C	Cmp reg load control
+   volatile unsigned int	CNT;      	//0x0040	Counter reg
+   volatile unsigned int	AQLDR; 		//0x0044	AQ reg load control
+   volatile unsigned int	AQCRA;      //0x0048	Action qualify of ch-A
+   volatile unsigned int	AQCRB;    	//0x004C	Action qualify of ch-B
+   volatile unsigned int	AQCRC; 		//0x0050	Action qualify of ch-C
+   volatile unsigned int	AQCRD;  	//0x0054	Action qualify of ch-D
+   volatile unsigned int	AQTSCR;   	//0x0058	T event selection
+   volatile unsigned int	AQOSF; 		//0x005C	AQ output one-shot software forcing
+   volatile unsigned int	AQCSF;      //0x0060	AQ output conti-software forcing
+   volatile unsigned int	DBLDR;    	//0x0064	Deadband control reg load control
+   volatile unsigned int	DBCR;       //0x0068	Deadband control reg
+   volatile unsigned int	DPSCR;		//0x006C	Deadband clock prescaler
+   volatile unsigned int	DBDTR;		//0x0070	Deadband rising delay control
+   volatile unsigned int	DBDTF; 		//0x0074	Deadband falling delay control
+   volatile unsigned int	CPCR;  		//0x0078	Chop control
+   volatile unsigned int	EMSRC; 		//0x007C	EM source setting
+   volatile unsigned int	EMSRC2;		//0x0080	EM source setting
+   volatile unsigned int	EMPOL; 		//0x0084	EM polarity setting
+   volatile unsigned int	EMECR; 		//0x0088	EM enable control
+   volatile unsigned int	EMOSR;     	//0x008C	EM trip out status setting
+   volatile unsigned int	Reserved;	//0x0090	Reserved
+   volatile unsigned int	EMSLSR;     //0x0094	Softlock status
+   volatile unsigned int	EMSLCLR;    //0x0098	Softlock clear
+   volatile unsigned int   EMHLSR;     //0x009C    Hardlock status
+   volatile unsigned int   EMHLCLR;    //0x00A0    Hardlock clear
+   volatile unsigned int   EMFRCR;     //0x00A4    Software forcing EM
+   volatile unsigned int   EMRISR;     //0x00A8    EM RISR
+   volatile unsigned int   EMMISR;     //0x00AC    EM MISR
+   volatile unsigned int   EMIMCR;     //0x00B0    EM masking enable
+   volatile unsigned int   EMICR;      //0x00B4    EM pending clear
+   volatile unsigned int   TRGFTCR;    //0x00B8    Trigger Filter control reg
+   volatile unsigned int   TRGFTWR;    //0x00BC    Trigger filter window
+   volatile unsigned int   EVTRG;      //0x00C0    Event trigger setting
+   volatile unsigned int   EVPS;       //0x00C4    Event presaler
+   volatile unsigned int   EVCNTINIT;     //0x00C8    
+   volatile unsigned int   EVSWF;      //0x00CC    Event software forcing
+   volatile unsigned int   RISR;       //0x00D0    Interrupt RISR
+   volatile unsigned int   MISR;       //0x00D4    Interrupt MISR
+   volatile unsigned int   IMCR;       //0x00D8    Interrupt IMCR
+   volatile unsigned int   ICR;        //0x00DC    Interrupt clear
+   volatile unsigned int   REGLINK;    //0x00E0    Register link
+   volatile unsigned int   REGLINK2;   //0x00E4    Register link2
+   volatile unsigned int   REGPROT;    //0x00E8    Register protection
+} CSP_EPT_T, *CSP_EPT_PTR; 
+/**
+@brief LPT     bits Structure
+*/  
+ typedef volatile struct
+ {
+   volatile unsigned int    	CEDR;  		//0x0000	Clock control & ID
+   volatile unsigned int    	RSSR;		//0x0004	Start & Stop Ctrl
+   volatile unsigned int    	PSCR;		//0x0008	Clock prescaler
+   volatile unsigned int    	CR;  		//0x000C	Control register
+   volatile unsigned int    	SYNCR;		//0x0010	Synchronization control reg
+   volatile unsigned int    	PRDR;   	//0x0024	Period reg
+   volatile unsigned int    	CMP;   		//0x002C	Compare Value A
+   volatile unsigned int    	CNT;      	//0x0040	Counter reg
+   volatile unsigned int       TRGFTCR;    //0x00B8    Trigger Filter control reg
+   volatile unsigned int       TRGFTWR;    //0x00BC    Trigger filter window
+   volatile unsigned int       EVTRG;      //0x00C0    Event trigger setting
+   volatile unsigned int       EVPS;       //0x00C4    Event presaler
+   volatile unsigned int       EVSWF;      //0x00C8    Event software forcing
+   volatile unsigned int       RISR;       //0x00CC    Interrupt RISR
+   volatile unsigned int       MISR;       //0x00D0    Interrupt MISR
+   volatile unsigned int       IMCR;       //0x00D4    Interrupt IMCR
+   volatile unsigned int       ICR;        //0x00D8    Interrupt clear
+} CSP_LPT_T, *CSP_LPT_PTR;
+/**
+@brief BT0     bits Structure
+*/       
+ typedef struct
+ {
+   volatile unsigned int	RSSR;  		//0x0000	Reset/Start Control
+   volatile unsigned int	CR;		    //0x0004	General Control
+   volatile unsigned int	PSCR;		//0x0008	Prescaler
+   volatile unsigned int	PRDR; 		//0x000C	Period
+   volatile unsigned int	CMP;		//0X0010
+   volatile unsigned int	CNT;		//0x0014	Counter
+   volatile unsigned int	EVTRG;		//0x0018	Event Trigger
+   volatile unsigned int	EVPS;   	//0x001C	Event Prescaler
+   volatile unsigned int	EVCNTINTI;  //0x0020	Event Counter
+   volatile unsigned int   EVSWF;      //0x0024    Software force Event Trigger
+   volatile unsigned int	RISR;   	//0x0028    
+   volatile unsigned int	IMCR;     	//0x002C
+   volatile unsigned int	MISR;  		//0x0030
+   volatile unsigned int	ICR;    	//0x0034
+} CSP_BT_T, *CSP_BT_PTR; 
+/**
+@brief CRC     bits Structure
+*/ 
+typedef struct
+{
+   volatile unsigned int  IDR;             /**< ID Register	                     */
+   volatile unsigned int  CEDR;            /**< Clock Enable/Disable Register	     */
+   volatile unsigned int  SRR;             /**< Software Reset Register	     */
+   volatile unsigned int  CR;              /**< Control Register	             */
+   volatile unsigned int  SEED;            /**< Seed Value Register	             */
+   volatile unsigned int  DATAIN;          /**< Data in Value Register	             */
+   volatile unsigned int  DATAOUT;         /**< Data out Value Register	     */
+  //  TBD... //
+} CSP_CRC_T, *CSP_CRC_PTR;
+/**
+@brief RTC     bits Structure
+*/ 
+ typedef struct
+ {
+   volatile unsigned int	TIMR;  		//0x0000	Time Control Register
+   volatile unsigned int	DATR;		//0x0004	Date Control Register
+   volatile unsigned int	CR;  		//0x0008	Control Register
+   volatile unsigned int	CCR;  		//0x000C	Clock Control register
+   volatile unsigned int	ALRAR;		//0x0010	Alarm A
+   volatile unsigned int	ALRBR;		//0x0014	Alarm B
+   volatile unsigned int	SSR;    	//0x0018	Sub second
+   volatile unsigned int	CAL;   		//0x001C	Calibration
+   volatile unsigned int   RISR;       //0x0020
+   volatile unsigned int	IMCR;   	//0x0024
+   volatile unsigned int	MISR;     	//0x0028
+   volatile unsigned int	ICR;   		//0x002C
+   volatile unsigned int	KEY;    	//0x0030
+   volatile unsigned int	EVTRG;  	//0x0034
+   volatile unsigned int	EVPS;   	//0x0038
+   volatile unsigned int	EVSWF;  	//0x003C
+} CSP_RTC_T, *CSP_RTC_PTR; 	
+    
+/**
+@brief WWDT     bits Structure
+*/ 	
+ typedef struct
+ {
+	 volatile unsigned int	CR;
+	 volatile unsigned int	CFGR;
+	 volatile unsigned int	RISR;
+	 volatile unsigned int MISR;
+	 volatile unsigned int	IMCR;
+	 volatile unsigned int	ICR;
+ }CSP_WWDT_T,*CSP_WWDT_PTR;
+/**
+@brief HWD     bits Structure
+*/ 	
+ typedef struct
+ {
+	 volatile S32_T	DIVIDENT;
+	 volatile S32_T	DIVISOR;
+	 volatile S32_T	QUOTIENT;
+	 volatile S32_T	REMAIN;
+	 volatile unsigned int	CR;
+ }CSP_HWD_T,*CSP_HWD_PTR; 
+	
+ #define FLASHBase 0x00000000
+ #define FLASHSize 0x00010000
+ #define FLASHLimit (FLASHBase + FLASHSize) 
+ #define DFLASHBase 0x10000000
+ #define DFLASHSize 0x10001000
+ #define DFLASHLimit (FLASHBase + FLASHSize) 
+
+#ifdef REMAP
+  #define SRAMBase 0x00000000
+  #define SRAMSize 0x00000800
+  #define SRAMLimit (SRAMBase + SRAMSize) 
+  #define MEMVectorBase 0x00000700
+  #define MEMVectorSize (0x50<<2)
+#else
+  #define SRAMBase 0x20000000
+  #define SRAMSize 0x00001000
+  #define SRAMLimit (SRAMBase + SRAMSize) 
+  #define MEMVectorBase 0x20000F00
+  #define MEMVectorSize (0x50<<2)
+#endif
+
+//--Peripheral Address Setting
+#define APBPeriBase     0x40000000 
+
+//--Each Peripheral Address Setting
+//#define APB_SFMBase     (APBPeriBase + 0x10000)
+#define APB_IFCBase    	(APBPeriBase + 0x10000)
+#define APB_SYSCONBase  (APBPeriBase + 0x11000)
+#define APB_ETCBBase    (APBPeriBase + 0x12000)
+
+#define APB_TKEYBase    (APBPeriBase + 0x20000)
+#define APB_TKEYBUFBase	(APBPeriBase + 0x21000)
+#define APB_ADC0Base    (APBPeriBase + 0x30000)
+
+#define AHBGPIOBase 	0x60000000
+#define APB_GPIOA0Base  (AHBGPIOBase + 0x0000) //A0  
+#define APB_GPIOB0Base  (AHBGPIOBase + 0x2000) //B0 
+#define APB_IGRPBase	(AHBGPIOBase + 0xF000)
+
+#define APB_BT1Base      (APBPeriBase + 0x52000)
+#define APB_BT0Base      (APBPeriBase + 0x51000)
+#define APB_CNTABase    (APBPeriBase + 0x50000)
+
+#define APB_GPT0Base    (APBPeriBase + 0x55000)
+
+#define APB_EPT0Base    (APBPeriBase + 0x59000)
+
+#define APB_RTCBase     (APBPeriBase + 0x60000)
+#define APB_LPTBase     (APBPeriBase + 0x61000)
+#define APB_WWDTBase	(APBPeriBase + 0x62000)
+
+#define APB_UART0Base   (APBPeriBase + 0x80000)
+#define APB_UART1Base   (APBPeriBase + 0x81000)
+#define APB_UART2Base   (APBPeriBase + 0x82000)
+
+#define APB_SPI0Base    (APBPeriBase + 0x90000)
+#define APB_SIO0Base    (APBPeriBase + 0xB0000)
+
+#define APB_I2C0Base    (APBPeriBase + 0xA0000)
+
+
+
+#define AHB_CRCBase     0x50000000
+#define APB_HWDBase		0x70000000		
+
+//--Interrupt Bit Position
+#define CORET_INT   (0x01ul<<0)       //IRQ0
+#define SYSCON_INT  (0x01ul<<1)       //IRQ1
+#define IFC_INT     (0x01ul<<2)       //IRQ2
+#define ADC_INT     (0x01ul<<3)       //IRQ3
+#define EPT0_INT    (0x01ul<<4)       //IRQ4
+//DUMMY       //IRQ5
+#define WWDT_INT    (0x01ul<<6)       //IRQ6
+#define EXI0_INT    (0x01ul<<7)       //IRQ7
+#define EXI1_INT    (0x01ul<<8)       //IRQ8
+#define GPT0_INT    (0x01ul<<9)       //IRQ9 
+//DUMMY      //IRQ10
+//DUMMY      //IRQ11
+#define RTC_INT     (0x01ul<<12)      //IRQ12
+#define UART0_INT   (0x01ul<<13)      //IRQ13
+#define UART1_INT   (0x01ul<<14)      //IRQ14
+#define UART2_INT   (0x01ul<<15)      //IRQ15
+//DUMMY      //IRQ16
+#define I2C_INT     (0x01ul<<17)      //IRQ17
+//DUMMY      //IRQ18
+#define SPI_INT     (0x01ul<<19)      //IRQ19
+#define SIO_INT      (0x01ul<<20)      //IRQ20
+#define EXI2_INT    (0x01ul<<21)      //IRQ21
+#define EXI3_INT    (0x01ul<<22)      //IRQ22
+#define EXI4_INT    (0x01ul<<23)      //IRQ23
+#define CA_INT      (0x01ul<<24)      //IRQ24
+#define TKEY_INT    (0x01ul<<25)      //IRQ25
+#define LPT_INT     (0x01ul<<26)      //IRQ26
+//DUMMY      //IRQ27
+#define BT0_INT      (0x01ul<<28)      //IRQ28
+#define BT1_INT      (0x01ul<<29)      //IRQ29
+//DUMMY      //IRQ30
+//DUMMY      //IRQ31
+
+
+extern CSP_CK801_T  *CK801     ;
+
+extern CSP_IFC_T 	*IFC     ;
+extern CSP_SYSCON_T *SYSCON   ;
+extern CSP_ETCB_T   *ETCB ;
+
+extern CSP_TKEY_T 	*TKEY     ;
+extern CSP_TKEYBUF_T 	*TKEYBUF     ;
+extern CSP_ADC12_T 	*ADC0     ;
+
+extern CSP_GPIO_T 	*GPIOA0   ;
+extern CSP_GPIO_T 	*GPIOB0   ;
+extern CSP_IGRP_T	*GPIOGRP  ;
+
+extern CSP_UART_T 	*UART0    ;
+extern CSP_UART_T 	*UART1    ;
+extern CSP_UART_T 	*UART2    ;
+extern CSP_SSP_T  	*SPI0     ;
+extern CSP_SIO_T  	*SIO0     ;
+extern CSP_I2C_T  	*I2C0     ;
+extern CSP_CA_T  	*CA0      ;
+
+extern CSP_GPT_T 	*GPT0     ;
+
+extern CSP_EPT_T 	*EPT0     ;
+
+extern CSP_LPT_T 	*LPT      ;
+extern CSP_HWD_T 	*HWD      ;
+extern CSP_WWDT_T 	*WWDT      ;
+extern CSP_BT_T  	*BT0      ;
+extern CSP_BT_T  	*BT1      ;
+
+extern CSP_CRC_T 	*CRC      ;
+extern CSP_RTC_T 	*RTC      ;
+
+//ISR Define for generating special interrupt related ASM (CK802), with compile option -mistack
+void MisalignedHandler(void) __attribute__((isr));
+void IllegalInstrHandler(void) __attribute__((isr));
+void AccessErrHandler(void) __attribute__((isr));
+void BreakPointHandler(void) __attribute__((isr));
+void UnrecExecpHandler(void) __attribute__((isr));
+void Trap0Handler(void) __attribute__((isr));
+void Trap1Handler(void) __attribute__((isr));
+void Trap2Handler(void) __attribute__((isr));
+void Trap3Handler(void) __attribute__((isr));
+void PendTrapHandler(void) __attribute__((isr));
+
+void CORETHandler(void) __attribute__((isr));
+void SYSCONIntHandler(void) __attribute__((isr));
+void IFCIntHandler(void) __attribute__((isr));
+void ADCIntHandler(void) __attribute__((isr));
+void EPT0IntHandler(void) __attribute__((isr));
+void WWDTHandler(void) __attribute__((isr));
+void EXI0IntHandler(void) __attribute__((isr));
+void EXI1IntHandler(void) __attribute__((isr));
+void EXI2to3IntHandler(void) __attribute__((isr));
+void EXI4to9IntHandler(void) __attribute__((isr));
+void EXI10to15IntHandler(void) __attribute__((isr));
+void UART0IntHandler(void) __attribute__((isr));
+void UART1IntHandler(void) __attribute__((isr));
+void UART2IntHandler(void) __attribute__((isr));
+void I2CIntHandler(void) __attribute__((isr));
+void GPT0IntHandler(void) __attribute__((isr));
+void LEDIntHandler(void) __attribute__((isr));
+void TKEYIntHandler(void) __attribute__((isr));
+void SPI0IntHandler(void) __attribute__((isr));
+void SIO0IntHandler(void) __attribute__((isr));
+void CNTAIntHandler(void) __attribute__((isr));
+void RTCIntHandler(void) __attribute__((isr));
+void LPTIntHandler(void) __attribute__((isr));
+void BT0IntHandler(void) __attribute__((isr));
+void BT1IntHandler(void) __attribute__((isr));
+
+extern int __divsi3 (int a, int b);
+extern unsigned int __udivsi3 (unsigned int a, unsigned int b);
+extern int __modsi3 (int a, int b);
+extern unsigned int __umodsi3 (unsigned int a, unsigned int b);
+extern void delay_nms(unsigned int t);
+extern void delay_nus(unsigned int t);
+
+#endif
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_adc.h b/Source/include/apt32f102_adc.h
new file mode 100644
index 0000000..97896bf
--- /dev/null
+++ b/Source/include/apt32f102_adc.h
@@ -0,0 +1,236 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_adc.h
+  * @author  APT AE Team
+  * @version V1.13
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_adc_H
+#define _apt32f102_adc_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+/******************************************************************************
+************************* ADC12 Registers reset value ************************
+******************************************************************************/
+ #define ADC_ECR_RST          (0x00000000ul)          /**< ECR  reset value  */
+ #define ADC_DCR_RST          (0x00000000ul)          /**< DCR  reset value  */
+ #define ADC_PMSR_RST         (0x00000000ul)   		  /**< PMSR reset value  */
+ #define ADC_CR_RST           (0x80000000ul)          /**< CR   reset value  */
+ #define ADC_MR_RST           (0x00000000ul)          /**< MR   reset value  */
+ #define ADC_CSR_RST		  (0x00000000ul)		  /**< CSR   reset value  */
+ #define ADC_SR_RST           (0x00000000ul)          /**< SR   reset value  */
+ #define ADC_IER_RST          (0x00000000ul)          /**< IER  reset value  */
+ #define ADC_IDR_RST          (0x00000000ul)          /**< IDR  reset value  */
+ #define ADC_IMR_RST          (0x00000000ul)          /**< IMR  reset value  */
+ #define ADC_SEQx_RST         (0x00000000ul)          /**< SEQx  reset value */
+ #define ADC_DR_RST           (0x00000000ul)          /**< DR   reset value  */
+ #define ADC_CMP0_RST         (0x00000000ul)          /**< CMP0 reset value  */
+ #define ADC_CMP1_RST         (0x00000000ul)          /**< CMP1 reset value  */
+/**
+  * @brief  ADC12 Control register
+  */
+typedef enum
+{
+	ADC12_SWRST     =		((CSP_REGISTER_T)(0x01ul << 0)),            /**< Software Reset        */
+	ADC12_ADCEN     =		((CSP_REGISTER_T)(0x01ul << 1)),            /**< ADC Enable            */
+	ADC12_ADCDIS    =		((CSP_REGISTER_T)(0x01ul << 2)),            /**< ADC Disable           */
+	ADC12_START     =		((CSP_REGISTER_T)(0x01ul << 3)),            /**< Start Conversion      */
+	ADC12_STOP      =		((CSP_REGISTER_T)(0x01ul << 4)),            /**< Stop Conversion       */
+	ADC12_SWTRG      =		((CSP_REGISTER_T)(0x01ul << 5)),            /**< Stop Conversion       */
+	ADC12_AVGEN		=		((CSP_REGISTER_T)(0x01ul << 12)),            /**< Conversion data get average      */
+	ADC12_AVGDIS	=		((CSP_REGISTER_T)(0x00ul << 12)),            /**< Conversion data get last one     */
+}ADC12_Control_TypeDef;
+/**
+  * @brief  ADC12 IMR register 
+  */
+typedef enum
+{
+	//CSR SR, IER, IDR, IMR Registers
+	ADC12_EOC        =		((CSP_REGISTER_T)(0x01ul << 0)),     /**< End Of Conversion           */
+	ADC12_READY      =		((CSP_REGISTER_T)(0x01ul << 1)),     /**< Ready to Start              */
+	ADC12_OVR        =		((CSP_REGISTER_T)(0x01ul << 2)),     /**< Over Run                    */
+	ADC12_CMP0H      =		((CSP_REGISTER_T)(0x01ul << 4)),     /**< Higher than CMP1            */
+	ADC12_CMP0L      =		((CSP_REGISTER_T)(0x01ul << 5)),     /**< Lower than CMP1             */
+	ADC12_CMP1H      =		((CSP_REGISTER_T)(0x01ul << 6)),     /**< Higher than CMP2            */
+	ADC12_CMP1L      =		((CSP_REGISTER_T)(0x01ul << 7)),     /**< Lower than CMP2              */
+	ADC12_SEQ_END0   =		((CSP_REGISTER_T)(0x01ul << 16)),     /**< SEQ0 Convert end              */
+	ADC12_SEQ_END1   =		((CSP_REGISTER_T)(0x01ul << 17)),     /**< SEQ1 Convert end              */
+	ADC12_SEQ_END2   =		((CSP_REGISTER_T)(0x01ul << 18)),     /**< SEQ2 Convert end              */
+	ADC12_SEQ_END3   =		((CSP_REGISTER_T)(0x01ul << 19)),     /**< SEQ3 Convert end              */
+	ADC12_SEQ_END4   =		((CSP_REGISTER_T)(0x01ul << 20)),     /**< SEQ4 Convert end              */
+	ADC12_SEQ_END5   =		((CSP_REGISTER_T)(0x01ul << 21)),     /**< SEQ5 Convert end              */
+	ADC12_SEQ_END6   =		((CSP_REGISTER_T)(0x01ul << 22)),     /**< SEQ6 Convert end              */
+	ADC12_SEQ_END7   =		((CSP_REGISTER_T)(0x01ul << 23)),     /**< SEQ7 Convert end              */
+	ADC12_SEQ_END8   =		((CSP_REGISTER_T)(0x01ul << 24)),     /**< SEQ8 Convert end              */
+	ADC12_SEQ_END9   =		((CSP_REGISTER_T)(0x01ul << 25)),     /**< SEQ9 Convert end              */
+	ADC12_SEQ_END10   =		((CSP_REGISTER_T)(0x01ul << 26)),     /**< SEQ10 Convert end              */
+	ADC12_SEQ_END11   =		((CSP_REGISTER_T)(0x01ul << 27)),     /**< SEQ11 Convert end              */
+	ADC12_SEQ_END12   =		((CSP_REGISTER_T)(0x01ul << 28)),     /**< SEQ12 Convert end              */
+	ADC12_SEQ_END13   =		((CSP_REGISTER_T)(0x01ul << 29)),     /**< SEQ13 Convert end              */
+	ADC12_SEQ_END14   =		((CSP_REGISTER_T)(0x01ul << 30)),     /**< SEQ14 Convert end              */
+	ADC12_SEQ_END15   =		((CSP_REGISTER_T)(0x01ul << 31)),     /**< SEQ15 Convert end              */
+	/* SR Register Only                                                          */
+	ADC12_ADCENS     =		((CSP_REGISTER_T)(0x01ul << 8)),     /**< ADC Enable Status           */
+	ADC12_CTCVS      =		((CSP_REGISTER_T)(0x01ul << 9))      /**< Continuous Conversion Status*/
+}
+ADC12_IMR_TypeDef;
+/**
+  * @brief  ADC12 CLK ENABLE AND DISABLE 
+  */
+typedef enum
+{
+	ADC_CLK_CR 			=		((CSP_REGISTER_T)(0x01ul << 1)),				/**< ADC Clock             */
+	ADC12_IPIDCODE_MASK =		((CSP_REGISTER_T)(0x3FFFFFFul << 4)),			/**< ADC IPIDCODE mask     */
+	ADC_DEBUG_MODE		=		((CSP_REGISTER_T)(0x01ul << 31))				/**< Debug Mode Enable     */
+}
+ADC12_CLK_TypeDef;
+/**
+  * @brief  ADC12 Bit slection
+  */
+typedef enum
+{
+	ADC12_12BIT     	=		1,           								/**< 12bit mode            */
+	ADC12_10BIT    	 	=		0,           								/**< 10bit mode            */
+	ADC12_10BITor12BIT	=		((CSP_REGISTER_T)(0x01ul<<31))
+}ADC12_10bitor12bit_TypeDef;
+/**
+  * @brief  ADC12 Convertion mode
+  */
+typedef enum
+{
+	One_shot_mode	=	0,
+	Continuous_mode =	1,
+	CONTCV			=	(CSP_REGISTER_T)0x01<<31					//Continuous Conversion	 0: One shot mode.  1: Continuous mode.
+}ADC12_ConverMode_TypeDef;
+/**
+  * @brief  ADC12 NBRCMPx selection 
+  */
+typedef enum
+{
+	NBRCMP0_TypeDef		=	0,
+	NBRCMP1_TypeDef		=	1
+}
+ADC12_NBRCMPx_TypeDef;
+/**
+  * @brief  ADC12 NBRCMPx_HorL selection 
+  */
+typedef enum
+{
+	NBRCMPX_L_TypeDef	=	0,
+	NBRCMPX_H_TypeDef	=	1
+}
+ADC12_NBRCMPx_HorL_TypeDef;
+/**
+  * @brief  ADC12 SEQx register
+  */
+typedef enum
+{
+	 ADC12_ADCIN0       =	(CSP_REGISTER_T)(0x0ul),                   /**< ADC Analog Input 0 */
+	 ADC12_ADCIN1       =	(CSP_REGISTER_T)(0x1ul),                    /**< ADC Analog Input 1 */
+	 ADC12_ADCIN2       =	(CSP_REGISTER_T)(0x2ul),                   /**< ADC Analog Input 2 */
+	 ADC12_ADCIN3       =	(CSP_REGISTER_T)(0x3ul),                    /**< ADC Analog Input 3 */
+	 ADC12_ADCIN4       =	(CSP_REGISTER_T)(0x4ul),                   /**< ADC Analog Input 4 */
+	 ADC12_ADCIN5       =	(CSP_REGISTER_T)(0x5ul),                    /**< ADC Analog Input 5 */
+	 ADC12_ADCIN6       =	(CSP_REGISTER_T)(0x6ul),                    /**< ADC Analog Input 6 */
+	 ADC12_ADCIN7       =	(CSP_REGISTER_T)(0x7ul),                    /**< ADC Analog Input 7 */
+	 ADC12_ADCIN8       =	(CSP_REGISTER_T)(0x8ul),                   /**< ADC Analog Input 8 */
+	 ADC12_ADCIN9       =	(CSP_REGISTER_T)(0x9ul),                    /**< ADC Analog Input 9 */
+	 ADC12_ADCIN10      =	(CSP_REGISTER_T)(0x0Aul),                   /**< ADC Analog Input 10 */
+	 ADC12_ADCIN11      =	(CSP_REGISTER_T)(0x0Bul),                    /**< ADC Analog Input 11 */
+	 ADC12_ADCIN12      =	(CSP_REGISTER_T)(0x0Cul),                    /**< ADC Analog Input 12 */
+	 ADC12_ADCIN13       =	(CSP_REGISTER_T)(0x0Dul),                   /**< ADC Analog Input 13 */
+	 ADC12_ADCIN14       =	(CSP_REGISTER_T)(0x0Eul),                    /**< ADC Analog Input 14 */
+	 ADC12_ADCIN15       =	(CSP_REGISTER_T)(0x0Ful),                   /**< ADC Analog Input 15 */
+	 //ADC12_ADCIN16       =	(CSP_REGISTER_T)(0x10ul),                    /**< ADC Analog Input 16 */
+	 //ADC12_ADCIN17      =	(CSP_REGISTER_T)(0x11ul),                   /**< ADC Analog Input 17 */
+	 //ADC12_ADCIN18       =	(CSP_REGISTER_T)(0x12ul),                    /**< ADC Analog Input 18 */
+	 //ADC12_ADCIN19       =	(CSP_REGISTER_T)(0x13ul),                    /**< ADC Analog Input 19 */
+	 //ADC12_ADCIN20       =	(CSP_REGISTER_T)(0x14ul),                    /**< ADC Analog Input 20 */
+	 //ADC12_ADCIN21       =	(CSP_REGISTER_T)(0x15ul),                   /**< ADC Analog Input 21 */
+	 //ADC12_ADCIN22       =	(CSP_REGISTER_T)(0x16ul),                    /**< ADC Analog Input 22 */
+	 //ADC12_ADCIN23      =	(CSP_REGISTER_T)(0x17ul),                   /**< ADC Analog Input 23 */
+	 //ADC12_ADCIN24      =	(CSP_REGISTER_T)(0x18ul),                    /**< ADC Analog Input 24 */
+	 //ADC12_ADCIN25      =	(CSP_REGISTER_T)(0x19ul),                    /**< ADC Analog Input 25 */
+	 //ADC12_ADCIN26      =	(CSP_REGISTER_T)(0x1Aul),                    /**< ADC Analog Input 26 */
+	 //ADC12_ADCIN27      =	(CSP_REGISTER_T)(0x1Bul)                    /**< ADC Analog Input 27 */
+	 ADC12_INTVREF		      =	(CSP_REGISTER_T)(0x1Cul), 
+	 ADC12_DIV4_VDD		  =	(CSP_REGISTER_T)(0x1Dul),
+	 ADC12_VSS		  	  =	(CSP_REGISTER_T)(0x1Eul),
+}
+ADC12_InputSet_TypeDef;
+
+/**
+  * @brief  ADC12 Convertion repeat number
+  */
+typedef enum
+{	
+	 ADC12_CV_RepeatNum1   	   =	(CSP_REGISTER_T)(0x0ul<<8)|(0x0ul<<13),                   /**< ADC Convertion number 1 */
+	 ADC12_CV_RepeatNum2       =	(CSP_REGISTER_T)(0x1ul<<8)|(0x1ul<<13),                    /**< ADC Convertion number 2 */
+	 ADC12_CV_RepeatNum4       =	(CSP_REGISTER_T)(0x2ul<<8)|(0x2ul<<13),                   /**< ADC Convertion number 4 */
+	 ADC12_CV_RepeatNum8       =	(CSP_REGISTER_T)(0x3ul<<8)|(0x3ul<<13),                    /**< ADC Convertion number 8 */
+	 ADC12_CV_RepeatNum16      =	(CSP_REGISTER_T)(0x4ul<<8)|(0x4ul<<13),                   /**< ADC Convertion number 16 */
+	 ADC12_CV_RepeatNum32      =	(CSP_REGISTER_T)(0x5ul<<8)|(0x5ul<<13),                    /**< ADC Convertion number 32 */
+	 ADC12_CV_RepeatNum64      =	(CSP_REGISTER_T)(0x6ul<<8)|(0x6ul<<13),                    /**< ADC Convertion number 64 */
+	 ADC12_CV_RepeatNum128     =	(CSP_REGISTER_T)(0x7ul<<8)|(0x7ul<<13),                    /**< ADC Convertion number 128 */
+	 ADC12_CV_RepeatNum256     =	(CSP_REGISTER_T)(0x8ul<<8)|(0x8ul<<13),                    /**< ADC Convertion number 256 */
+	 ADC12_CV_RepeatNum512     =	(CSP_REGISTER_T)(0x9ul<<8)|(0x9ul<<13)                     /**< ADC Convertion number 512 */
+}ADC12_CV_RepeatNum_TypeDef;
+
+/**
+  * @brief  ADC12 VREFP VREFN Selecte
+  */
+typedef enum
+{
+	ADC12_VREFP_VDD_VREFN_VSS				=		0,
+	ADC12_VREFP_EXIT_VREFN_VSS				=		1,
+	ADC12_VREFP_FVR2048_VREFN_VSS			=		2,
+	ADC12_VREFP_FVR4096_VREFN_VSS			=		3,
+	//ADC12_VREFP_INTVREF0750_VREFN_VSS		=		4,
+	ADC12_VREFP_INTVREF1000_VREFN_VSS		=		5,
+	ADC12_VREFP_VDD_VREFN_EXIT				=		6,
+	ADC12_VREFP_EXIT_VREFN_EXIT				=		7,
+	ADC12_VREFP_FVR2048_VREFN_EXIT			=		8,
+	ADC12_VREFP_FVR4096_VREFN_EXIT			=		9,
+	//ADC12_VREFP_INTVREF0750_VREFN_EXIT		=		10,
+	ADC12_VREFP_INTVREF1000_VREFN_EXIT		=		11
+}ADC12_VREFP_VREFN_Selected_TypeDef;
+
+extern void ADC12_RESET_VALUE(void);
+extern void ADC12_Control(ADC12_Control_TypeDef ADC12_Control_x );
+extern void ADC12_ConfigInterrupt_CMD( ADC12_IMR_TypeDef ADC_IMR_X , FunctionalStatus NewState);
+extern uint8_t ADC12_Read_IntEnStatus(ADC12_IMR_TypeDef EnStatus_bit);
+extern void ADC12_CLK_CMD(ADC12_CLK_TypeDef ADC_CLK_CMD , FunctionalStatus NewState);
+extern void ADC12_Software_Reset(void);
+extern void ADC12_CMD(FunctionalStatus NewState);
+extern void ADC12_ready_wait(void);  
+extern void ADC12_EOC_wait(void);
+extern void ADC12_SEQEND_wait(U8_T val);
+extern U16_T ADC12_DATA_OUPUT(U16_T Data_index );
+extern void  ADC12_Configure_Mode(ADC12_10bitor12bit_TypeDef ADC12_BIT_SELECTED  , ADC12_ConverMode_TypeDef  ADC12_ConverMode  , U8_T ADC12_PRI, U8_T adc12_SHR , U8_T ADC12_DIV , U8_T NumConver );
+extern void ADC12_Configure_VREF_Selecte(ADC12_VREFP_VREFN_Selected_TypeDef ADC12_VREFP_X_VREFN_X );
+extern void ADC12_CompareFunction_set(U8_T ConverNum_CM0 , U8_T ConverNum_CM1 , U16_T CMP0_data , U16_T CMP1_data );
+extern void ADC12_ConversionChannel_Config(ADC12_InputSet_TypeDef ADC12_ADCINX ,
+						ADC12_CV_RepeatNum_TypeDef CV_RepeatTime, ADC12_Control_TypeDef AVG_Set, U8_T SEQx);
+extern U8_T ADC12_Compare_statue(ADC12_NBRCMPx_TypeDef ADC12_NBRCMPx, ADC12_NBRCMPx_HorL_TypeDef ADC12_NBRCMPx_HorL);
+extern void ADC_Int_Enable(void);		
+extern void ADC_Int_Disable(void);	
+extern void ADC12_CONFIG(void);	
+extern void adc12_SHR_SET(U8_T adc12_SHR);		
+
+#endif   /**< apt32f102_adc_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_bt.h b/Source/include/apt32f102_bt.h
new file mode 100644
index 0000000..cb203fc
--- /dev/null
+++ b/Source/include/apt32f102_bt.h
@@ -0,0 +1,193 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_bt.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_bt_H
+#define _apt32f102_bt_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+#define BT_RESET_VALUE  (0x00000000)
+
+
+/**
+  * @brief  bt pin numbner
+  */
+typedef enum
+{
+  BT0_PA00    = 0,  	/*!< Pin 0 selected */
+  BT0_PA02    = 1,  	/*!< Pin 1 selected */
+  BT0_PA05    = 2,  	/*!< Pin 2 selected */
+  BT0_PB02    = 3,   	/*!< Pin 3 selected */
+  BT0_PB05    = 4,  	/*!< Pin 4 selected */
+  BT0_PA11    = 5,  	/*!< Pin 5 selected */
+  BT0_PA13    = 6,  	/*!< Pin 6 selected */
+  BT0_PA15    = 7,  	/*!< Pin 7 selected */
+  BT1_PA01    = 8,  	/*!< Pin 8 selected */
+  BT1_PA06    = 9,  	/*!< Pin 9 selected */
+  BT1_PA08   = 10,  	/*!< Pin 10 selected */
+  BT1_PA12   = 11,   	/*!< Pin 11 selected */
+  BT1_PA14   = 12,  	/*!< Pin 12 selected */
+  BT1_PB00   = 13,  	/*!< Pin 13 selected */
+  BT1_PB04   = 14,  	/*!< Pin 13 selected */
+}BT_Pin_TypeDef;
+/**
+  * @brief  BT CLK EN register
+  */
+typedef enum
+{
+    BTCLK_DIS = 0,
+	BTCLK_EN = 1,
+}BT_CLK_TypeDef;
+/**
+  * @brief  BT START SHADOW register
+  */
+typedef enum
+{
+    BT_SHADOW = (0<<3),
+	BT_IMMEDIATE= (1<<3),
+}BT_SHDWSTP_TypeDef;
+/**
+  * @brief  BT OPM register
+  */
+typedef enum
+{
+    BT_CONTINUOUS= (0<<4),         
+	BT_ONCE= (1<<4),	
+}BT_OPM_TypeDef;
+/**
+  * @brief  BT EXTCKM register
+  */
+typedef enum
+{
+    BT_PCLKDIV= (0<<5),         
+	BT_EXTCKM= (1<<5),	
+}BT_EXTCKM_TypeDef;
+/**
+  * @brief  BT IDLEST register
+  */
+typedef enum
+{
+    BT_IDLE_LOW= (0<<6),         
+	BT_IDLE_HIGH= (1<<6),	
+}BT_IDLEST_TypeDef;
+/**
+  * @brief  BT STARTST register
+  */
+typedef enum
+{
+    BT_START_LOW= (0<<7),         
+	BT_START_HIGH= (1<<7),	
+}BT_STARTST_TypeDef;
+/**
+  * @brief  BT STARTST register
+  */
+typedef enum
+{
+    BT_SYNC_DIS= (0<<8),         
+	BT_SYNC_EN= (1<<8),	
+}BT_SYNCEN_TypeDef;
+/**
+  * @brief  BT OSTMDX register
+  */
+typedef enum
+{
+    BT_OSTMDX_CONTINUOUS= (0<<10),  	       
+	BT_OSTMDX_ONCE= (1<<10),	
+}BT_OSTMDX_TypeDef;
+/**
+  * @brief  BT AREARM register
+  */
+typedef enum
+{
+    BT_AREARM_DIS= (0<<14),  	       
+	BT_AREARM_EN= (1<<14),	
+}BT_AREARM_TypeDef;
+/**
+  * @brief  BT SYNCMD register
+  */
+typedef enum
+{
+    BT_SYNCMD_DIS= (0<<15),  	       
+	BT_SYNCMD_EN= (1<<15),	
+}BT_SYNCMD_TypeDef;
+/**
+  * @brief  BT CNTRLD register
+  */
+typedef enum
+{
+    BT_CNTRLD_EN= (0<<16),  	       
+	BT_CNTRLD_DIS= (1<<16),	
+}BT_CNTRLD_TypeDef;
+/**
+  * @brief  BT CNTRLD register
+  */
+typedef enum
+{
+    BT_TRGSRC_DIS= (0<<0),  	       
+	BT_TRGSRC_PEND= (1<<0),	
+	BT_TRGSRC_CMP= (2<<0),	
+	BT_TRGSRC_OVF= (3<<0),	
+}BT_TRGSRC_TypeDef;
+/**
+  * @brief  BT CNTRLD register
+  */
+typedef enum
+{
+    BT_TRGOE_DIS= (0<<20),  	       
+	BT_TRGOE_EN= (1<<20),	
+}BT_TRGOE_TypeDef;
+/**
+  * @brief  BT INT MASK SET/CLR  Set
+  */
+typedef enum
+{
+	BT_PEND    	=	(0x01 << 0), 
+	BT_CMP    	=	(0x01 << 1),     
+	BT_OVF     	=	(0x01 << 2),  
+	BT_EVTRG    =	(0x01 << 3), 
+}BT_IMSCR_TypeDef;  
+
+
+extern void BT_DeInit(CSP_BT_T *BTx);
+extern void BT_IO_Init(BT_Pin_TypeDef BT_IONAME);
+extern void BT_Start(CSP_BT_T *BTx);
+extern void BT_Stop(CSP_BT_T *BTx);
+extern void BT_Soft_Reset(CSP_BT_T *BTx);
+extern void BT_Configure(CSP_BT_T *BTx,BT_CLK_TypeDef BTCLK,U16_T PSCR_DATA,BT_SHDWSTP_TypeDef BTSHDWSTP,BT_OPM_TypeDef BTOPM,BT_EXTCKM_TypeDef BTEXTCKM);
+extern void BT_ControlSet_Configure(CSP_BT_T *BTx,BT_STARTST_TypeDef BTSTART,BT_IDLEST_TypeDef BTIDLE,BT_SYNCEN_TypeDef BTSYNC,BT_SYNCMD_TypeDef BTSYNCMD,
+							BT_OSTMDX_TypeDef BTOSTMD,BT_AREARM_TypeDef BTAREARM,BT_CNTRLD_TypeDef BTCNTRLD);
+extern void BT_Period_CMP_Write(CSP_BT_T *BTx,U16_T BTPRDR_DATA,U16_T BTCMP_DATA);
+extern void BT_CNT_Write(CSP_BT_T *BTx,U16_T BTCNT_DATA);
+extern U16_T BT_PRDR_Read(CSP_BT_T *BTx);
+extern U16_T BT_CMP_Read(CSP_BT_T *BTx);
+extern U16_T BT_CNT_Read(CSP_BT_T *BTx);
+extern void BT_Trigger_Configure(CSP_BT_T *BTx,BT_TRGSRC_TypeDef BTTRG,BT_TRGOE_TypeDef BTTRGOE);
+extern void BT_Soft_Tigger(CSP_BT_T *BTx);
+extern void BT_ConfigInterrupt_CMD(CSP_BT_T *BTx,FunctionalStatus NewState,BT_IMSCR_TypeDef BT_IMSCR_X);
+extern void BT0_INT_ENABLE(void);
+extern void BT0_INT_DISABLE(void);
+extern void BT1_INT_ENABLE(void);
+extern void BT1_INT_DISABLE(void);
+extern void BT_Stop_High(CSP_BT_T *BTx);
+extern void BT_Stop_Low(CSP_BT_T *BTx);
+
+
+#endif   /**< apt32f102_bt_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_ck801.h b/Source/include/apt32f102_ck801.h
new file mode 100644
index 0000000..1d99c9e
--- /dev/null
+++ b/Source/include/apt32f102_ck801.h
@@ -0,0 +1,130 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_ck801.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/ 
+#ifndef _apt32f102_ck801_H
+#define _apt32f102_ck801_H
+
+//---------------------------------------------------------------------------- 
+//                      Interrupt Controller
+//---------------------------------------------------------------------------- 
+//#define CK801_BASEADDR        	((unsigned int) 0xE000E000)
+#define CK801_BASEADDR        	0xE000E000
+
+#define INTC_ISER     CK801_BASEADDR+0x100    //INTC interrupt enable register
+#define INTC_IWER     CK801_BASEADDR+0x140    //INTC wake-up interrupt enable register
+#define INTC_ICER     CK801_BASEADDR+0x180    //INTC interrupt enable clear register
+#define INTC_IWDR     CK801_BASEADDR+0x1C0    //INTC wake-up interrupt enable clear register
+#define INTC_ISPR     CK801_BASEADDR+0x200    //INTC interrupt pending register
+#define INTC_ICPR     CK801_BASEADDR+0x280    //INTC interrupt pending clear register
+#define INTC_IABR     CK801_BASEADDR+0x300    //INTC interrupt acknowledge status register
+#define INTC_IPR0    CK801_BASEADDR+0x400    //INTC interrupt priority register
+#define INTC_IPR1    CK801_BASEADDR+0x404    //INTC interrupt priority register
+#define INTC_IPR2    CK801_BASEADDR+0x408    //INTC interrupt priority register
+#define INTC_IPR3    CK801_BASEADDR+0x40C    //INTC interrupt priority register
+#define INTC_IPR4    CK801_BASEADDR+0x410    //INTC interrupt priority register
+#define INTC_IPR5    CK801_BASEADDR+0x414    //INTC interrupt priority register
+#define INTC_IPR6    CK801_BASEADDR+0x418    //INTC interrupt priority register
+#define INTC_IPR7    CK801_BASEADDR+0x41C    //INTC interrupt priority register
+#define INTC_ISR      CK801_BASEADDR+0xC00    //INTC interrupt status register
+#define INTC_IPTR     CK801_BASEADDR+0xC04    //INTC interrupt pending threshold register
+
+
+#define INTC_ISER_WRITE(val)     *(volatile UINT32 *) (INTC_ISER  ) = val
+#define INTC_IWER_WRITE(val)     *(volatile UINT32 *) (INTC_IWER  ) = val
+#define INTC_ICER_WRITE(val)     *(volatile UINT32 *) (INTC_ICER  ) = val
+#define INTC_IWDR_WRITE(val)     *(volatile UINT32 *) (INTC_IWDR  ) = val
+#define INTC_ISPR_WRITE(val)     *(volatile UINT32 *) (INTC_ISPR  ) = val
+#define INTC_ICPR_WRITE(val)     *(volatile UINT32 *) (INTC_ICPR  ) = val
+#define INTC_IABR_WRITE(val)     *(volatile UINT32 *) (INTC_IABR  ) = val
+#define INTC_IPR0_WRITE(val)   	 *(volatile UINT32 *) (INTC_IPR0  ) = val
+#define INTC_IPR1_WRITE(val)     *(volatile UINT32 *) (INTC_IPR1  ) = val
+#define INTC_IPR2_WRITE(val)     *(volatile UINT32 *) (INTC_IPR2  ) = val
+#define INTC_IPR3_WRITE(val)     *(volatile UINT32 *) (INTC_IPR3  ) = val
+#define INTC_IPR4_WRITE(val)     *(volatile UINT32 *) (INTC_IPR4  ) = val
+#define INTC_IPR5_WRITE(val)     *(volatile UINT32 *) (INTC_IPR5  ) = val
+#define INTC_IPR6_WRITE(val)     *(volatile UINT32 *) (INTC_IPR6  ) = val
+#define INTC_IPR7_WRITE(val)     *(volatile UINT32 *) (INTC_IPR7  ) = val
+#define INTC_ISR_WRITE(val)      *(volatile UINT32 *) (INTC_ISR   ) = val
+#define INTC_IPTR_WRITE(val)     *(volatile UINT32 *) (INTC_IPTR  ) = val
+
+
+#define INTC_ISER_READ(intc)   (intc->ISER  )
+#define INTC_IWER_READ(intc)   (intc->IWER  )
+#define INTC_ICER_READ(intc)   (intc->ICER  )
+#define INTC_IWDR_READ(intc)   (intc->IWDR  )
+#define INTC_ISPR_READ(intc)   (intc->ISPR  )
+#define INTC_ICPR_READ(intc)   (intc->ICPR  )
+#define INTC_IABR_READ(intc)   (intc->IABR  )
+#define INTC_IPR0_READ(intc)   (intc->IPR0  )
+#define INTC_IPR1_READ(intc)   (intc->IPR1  )
+#define INTC_IPR2_READ(intc)   (intc->IPR2  )
+#define INTC_IPR3_READ(intc)   (intc->IPR3  )
+#define INTC_IPR4_READ(intc)   (intc->IPR4  )
+#define INTC_IPR5_READ(intc)   (intc->IPR5  )
+#define INTC_IPR6_READ(intc)   (intc->IPR6  )
+#define INTC_IPR7_READ(intc)   (intc->IPR7  )
+#define INTC_ISR_READ(intc)    (intc->ISR   )
+#define INTC_IPTR_READ(intc)   (intc->IPTR  )
+
+
+typedef enum IRQn
+{
+
+        ISR_Restart                     = -32,
+        ISR_Misaligned_Access           = -31,
+        ISR_Access_Error                = -30,
+        ISR_Divided_By_Zero             = -29,
+        ISR_Illegal                     = -28,
+        ISR_Privlege_Violation          = -27,
+        ISR_Trace_Exection              = -26,
+        ISR_Breakpoint_Exception        = -25,
+        ISR_Unrecoverable_Error         = -24,
+        ISR_Idly4_Error                 = -23,
+        ISR_Auto_INT                    = -22,
+        ISR_Auto_FINT                   = -21,
+        ISR_Reserved_HAI                = -20,
+        ISR_Reserved_FP                 = -19,
+        ISR_TLB_Ins_Empty               = -18,
+        ISR_TLB_Data_Empty              = -17,
+
+        INTC_CORETIM_IRQn               = 0,      
+        INTC_TIME1_IRQn                	= 1,      
+        INTC_UART0_IRQn                 = 2,
+        INTC_GPIOA2_IRQn                = 8,
+} IRQn_Type;
+
+
+void INTC_Init(void);
+void force_interrupt(IRQn_Type IRQn);
+
+void CK_CPU_EnAllNormalIrq(void);
+void CK_CPU_DisAllNormalIrq(void);
+
+#ifndef __INLINE
+#define __INLINE inline
+#endif
+#ifndef uint32_t
+#define uint32_t unsigned int
+#endif
+
+#ifndef uint8_t
+#define uint8_t unsigned char
+#endif
+
+#endif
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_clkcalib.h b/Source/include/apt32f102_clkcalib.h
new file mode 100644
index 0000000..17bfa98
--- /dev/null
+++ b/Source/include/apt32f102_clkcalib.h
@@ -0,0 +1,37 @@
+  /******************************************************************************
+  * @file    apt32f102_clkcalib.h
+  * @author  APT AE Team
+  * @version V1.22
+  * @date    2021/11/22
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+
+#include "apt32f102.h"
+
+
+/**
+  * @brief  CALIB OSC SELECTE SET
+  */
+typedef enum
+{
+	CLK_HFOSC_48M	=	(0x0ul),
+	CLK_HFOSC_24M	=	(0x1ul),
+	CLK_HFOSC_12M	=	(0x2ul),
+	CLK_HFOSC_6M	=	(0x3ul),
+	CLK_IMOSC_5556K	=	(0x4ul),
+	CLK_IMOSC_4194K	=	(0x5ul),
+	CLK_IMOSC_2097K	=	(0x6ul),
+	CLK_IMOSC_131K	=	(0x7ul)
+}CALIB_OSC_SELECTE_TypeDef;
+
+
+extern U8_T std_clk_calib(CALIB_OSC_SELECTE_TypeDef OSC_CALIB_X);
\ No newline at end of file
diff --git a/Source/include/apt32f102_coret.h b/Source/include/apt32f102_coret.h
new file mode 100644
index 0000000..190130e
--- /dev/null
+++ b/Source/include/apt32f102_coret.h
@@ -0,0 +1,51 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_CORET.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_CORET_H
+#define _apt32f102_CORET_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+/******************************************************************************
+************************* syscon Registers Definition *************************
+******************************************************************************/
+#define CORET_CSR_RST     	((CSP_REGISTER_T)0x00000004)
+#define CORET_RVR_RST     	((CSP_REGISTER_T)0x00000000)
+#define CORET_CVR_RST     	((CSP_REGISTER_T)0x00000000)
+#define CORET_CALIB_RST     ((CSP_REGISTER_T)0x00000000)
+
+
+
+
+extern void CORET_DeInit(void);
+extern void CORET_Int_Enable(void);
+extern void CORET_Int_Disable(void);
+extern void CORET_WakeUp_Enable(void);
+extern void CORET_WakeUp_Disable(void);
+extern void CORET_start(void);
+extern void CORET_stop(void);
+extern void CORET_CLKSOURCE_EX(void);
+extern void CORET_CLKSOURCE_IN(void);
+extern void CORET_TICKINT_Enable(void);
+extern void CORET_TICKINT_Disable(void);
+extern void CORET_reload(void);
+
+#endif   /**< apt32f102_coret_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_countera.h b/Source/include/apt32f102_countera.h
new file mode 100644
index 0000000..6492c35
--- /dev/null
+++ b/Source/include/apt32f102_countera.h
@@ -0,0 +1,150 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_countera.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_countera_H
+#define _apt32f102_countera_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define CA_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------countA  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  countA Period int 
+  */
+typedef enum
+{
+    Period_NA  = 0,                            //Interrupt enable/disable for High/low period elapsed              
+    Period_H   = 1,
+    Period_L   = 2,
+    Period_H_L = 3,                                                  
+}CA_INT_TypeDef;
+/**
+  * @brief  countA DIV 
+  */
+typedef enum
+{
+    DIV1    =	((0 & 0x03ul)<<4) ,            //Counter A input clock frequency selection 
+    DIV2    =	((1 & 0x03ul)<<4) ,
+    DIV4    =	((2 & 0x03ul)<<4) ,
+    DIV8    =	((3 & 0x03ul)<<4) ,
+}CA_CLKDIV_TypeDef;
+/**
+  * @brief  countA mode
+  */
+typedef enum
+{
+    ONESHOT_MODE    =	(0x00ul << 1),          //Mode Selection:oneshotmode/repeat mode
+    REPEAT_MODE     =	(0x01ul << 1),
+}CA_Mode_TypeDef;
+/**
+  * @brief  countA carrier setting 
+  */
+typedef enum
+{
+    CARRIER_OFF 	=	(0x00ul << 25),         //Carrier signal
+    CARRIER_ON  	=	(0x01ul << 25),
+}CA_CARRIER_TypeDef;
+/**
+  * @brief  Carrier Waveform Output Starting Polarity
+  */
+typedef enum
+{
+    OSP_LOW 	=	0,                          //Carrier Waveform Output Starting Polarity
+    OSP_HIGH    =	1,
+}CA_OSP_TypeDef;
+/**
+  * @brief  Carrier register load
+  */
+typedef enum
+{
+    HW_STROBE_0 =   (0x01ul<<17),               //Counter A data register Hardware/software load enable.  
+    HW_STROBE_1 =   (0x01ul<<18),
+    SW_STROBE   =   (0x01ul<<16), 
+}CA_STROBE_TypeDef;
+/**
+  * @brief  Carrier rem output signal
+  */
+typedef enum
+{
+    ENVELOPE_0    =	(0x00ul << 24),             //REM output signal selection bit
+    ENVELOPE_1    =	(0x01ul << 24),
+}CA_ENVELOPE_TypeDef;
+/**
+  * @brief  Carrier PENDREM 
+  */
+typedef enum
+{
+    PENDREM_OFF  =	((0 & 0x03ul)<<21),
+    PENDREM_1    =	((1 & 0x03ul)<<21),
+    PENDREM_2    =	((2 & 0x03ul)<<21),
+}CA_PENDREM_TypeDef;
+/**
+  * @brief  Carrier ATCHREM 
+  */
+typedef enum
+{
+    MATCHREM_OFF  =	((0 & 0x03ul)<<19),
+    MATCHREM_1    =	((1 & 0x03ul)<<19),
+    MATCHREM_2    =	((2 & 0x03ul)<<19),
+}CA_MATCHREM_TypeDef;
+/**
+  * @brief  Carrier REMSTAT
+  */
+typedef enum
+{
+   REMSTAT_0   =	((0 & 0x01ul)<<23),
+   REMSTAT_1   =	((1 & 0x01ul)<<23),
+}CA_REMSTAT_TypeDef;
+/**
+  * @brief  counterA IO
+  */
+typedef enum
+{
+   COUNTA_PB01   =	0,
+   COUNTA_PA05   =	1,
+   COUNTA_PA11   =	2,
+}CA_COUNTAIO_TypeDef;
+
+
+
+extern void COUNTA_Init(uint32_t Data_H,uint32_t Data_L,CA_INT_TypeDef INT_Mode,
+                     CA_CLKDIV_TypeDef DIVx,CA_Mode_TypeDef Mode,CA_CARRIER_TypeDef Carrier,
+                     CA_OSP_TypeDef OSP_Mode) ;
+extern void COUNTA_Config(CA_STROBE_TypeDef STROBE,CA_PENDREM_TypeDef Pend_CON,
+                        CA_MATCHREM_TypeDef Match_CON,CA_REMSTAT_TypeDef Stat_CON,CA_ENVELOPE_TypeDef ENVELOPE );
+extern void COUNT_DeInit(void);
+extern void COUNTA_Start(void);
+extern void COUNTA_Stop(void);
+extern void COUNTA_Int_Disable(void);
+extern void COUNTA_Int_Enable(void);
+extern void COUNTA_Wakeup_Disable(void);
+extern void COUNTA_Wakeup_Enable(void);
+extern void COUNTA_IO_Init(CA_COUNTAIO_TypeDef COUNTA_IO_G);
+extern void COUNTA_Data_Update(uint32_t Data_H,uint32_t Data_L);
+
+
+
+/*************************************************************/
+
+#endif   /**< apt32f102_countera_H */
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_crc.h b/Source/include/apt32f102_crc.h
new file mode 100644
index 0000000..8516a64
--- /dev/null
+++ b/Source/include/apt32f102_crc.h
@@ -0,0 +1,87 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_crc.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_crc_H
+#define _apt32f102_crc_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+#define CRC_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------CRC  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  CRC COMPIN register
+  */
+typedef enum
+{
+    XORIN_DIS = 0,
+	XORIN_EN = 1,
+}CRC_COMPIN_TypeDef;
+/**
+  * @brief  CRC COMPOUT register
+  */
+typedef enum
+{
+    XOROUT_DIS = (0<<1),
+	XOROUT_EN = (1<<1),
+}CRC_COMPOUT_TypeDef;
+/**
+  * @brief  CRC ENDIANIN register
+  */
+typedef enum
+{
+    REFIN_DIS = (0<<2),
+	REFIN_EN = (1<<2),
+}CRC_ENDIANIN_TypeDef;
+/**
+  * @brief  CRC ENDIANOUT register
+  */
+typedef enum
+{
+    REFOUT_DIS = (0<<3),
+	REFOUT_EN = (1<<3),
+}CRC_ENDIANOUT_TypeDef;
+/**
+  * @brief  CRC poly register
+  */
+typedef enum
+{
+    POLY_CCITT = (0<<4),
+	POLY_16 = (2<<4),
+	POLY_32 = (3<<4),
+}CRC_POLY_TypeDef;
+
+
+extern void CRC_CMD(FunctionalStatus NewState);
+extern void CRC_Soft_Reset(void);
+extern void CRC_Configure(CRC_COMPIN_TypeDef COMPINX,CRC_COMPOUT_TypeDef COMPOUTX,CRC_ENDIANIN_TypeDef ENDIANINX,
+				   CRC_ENDIANOUT_TypeDef ENDIANOUT,CRC_POLY_TypeDef POLYX);
+extern void CRC_Seed_Write(U32_T seed_data);
+extern U32_T CRC_Seed_Read(void);
+extern void CRC_Datain(U32_T data_in);
+extern U32_T CRC_Result_Read(void);
+extern U32_T Chip_CRC_CRC32(U32_T *data, U32_T words);
+extern U32_T Chip_CRC_CRC16(U16_T *data, U32_T size);
+extern U32_T Chip_CRC_CRC8(U8_T *data, U32_T size);
+/*************************************************************/
+
+#endif   /**< apt32f102_crc_H */
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_ept.h b/Source/include/apt32f102_ept.h
new file mode 100644
index 0000000..d172a14
--- /dev/null
+++ b/Source/include/apt32f102_ept.h
@@ -0,0 +1,783 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_ept.h
+  * @author  APT AE Team
+  * @version V1.020
+  * @date    2021/06/21
+   ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_ept_H
+#define _apt32f102_ept_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+/******************************************************************************
+************************* ept Registers Definition *************************
+******************************************************************************/
+/**
+  * @brief  EPT io Mode set
+  */
+typedef enum
+{
+	EPT_IO_CHAX			=	 	0,
+	EPT_IO_CHAY			=	 	1,
+	EPT_IO_CHBX			=	 	2,
+	EPT_IO_CHBY			=	 	3,	
+	EPT_IO_CHCX			=	 	4,
+	EPT_IO_CHCY			=	 	5,
+	EPT_IO_CHD			=	 	6,
+	EPT_IO_EPI			=	 	7
+}EPT_IO_Mode_Type;
+/**
+  * @brief  EPT io NUM set
+  */
+typedef enum
+{
+	IO_NUM_PA07			=		0X10,
+	IO_NUM_PA10			=		0X11,
+	IO_NUM_PA15			=		0X12,
+	IO_NUM_PB03			=		0X13,
+	IO_NUM_PB05			=		0X14,
+	IO_NUM_PA12			=		0X15,
+	IO_NUM_PB02			=		0X16,
+	IO_NUM_PA11			=		0X17,
+	IO_NUM_PA14			=		0X18,
+	IO_NUM_PB04			=		0X19,
+	IO_NUM_PA05			=		0X1A,
+	IO_NUM_PA08			=		0X1B,
+	IO_NUM_PA03			=		0X1C,
+	IO_NUM_PB00			=		0X1D,
+	IO_NUM_PA04			=		0X1E,
+	IO_NUM_PA09			=		0X1F,
+	IO_NUM_PA013		=		0X20
+}EPT_IO_NUM_Type;	
+/**
+  * @brief  EPT TCLK selected
+  */
+typedef enum
+{
+	EPT_Selecte_PCLK		=	0<<3,
+	EPT_Selecte_SYNCUSR3	=	1<<3
+}EPT_TCLK_Selecte_Type;
+/**
+  * @brief  EPT TIN selected
+  */
+typedef enum
+{
+	EPT_CGSRC_TIN_BT0OUT	=	0,
+	EPT_CGSRC_TIN_BT1OUT	=	1,
+	EPT_CGSRC_CHAX		=	2,				//设置CHAX CHBX后对应管脚将不能输出PWM
+	EPT_CGSRC_CHBX		=	3,
+	EPT_CGSRC_DIS		=	4
+}EPT_CGSRC_TIN_Selecte_Type;
+
+typedef enum
+{
+	EPT_BURST_ENABLE		=	1<<9,
+	EPT_BURST_DIABLE		=	0<<9
+}EPT_BURST_CMD_Type;
+/**
+  * @brief  EPT CNTMD selected
+  */
+typedef enum		
+{
+	EPT_CNTMD_increase 				=  ((CSP_REGISTER_T)(0x00ul << 0)),
+	EPT_CNTMD_decrease  			=  ((CSP_REGISTER_T)(0x01ul << 0)),
+	EPT_CNTMD_increaseTOdecrease	=  ((CSP_REGISTER_T)(0x02ul << 0))
+}EPT_CNTMD_SELECTE_Type;	
+/**
+  * @brief  EPT OPM selected
+  */
+typedef enum		
+{
+	EPT_OPM_Once 				=  ((CSP_REGISTER_T)(0x01ul << 6)),
+	EPT_OPM_Continue  			=  ((CSP_REGISTER_T)(0x00ul << 6))
+}EPT_OPM_SELECTE_Type;	
+/**
+  * @brief  EPT CAP CMD
+  */
+typedef enum		
+{	
+	EPT_CAP_EN			=			((CSP_REGISTER_T)(0x01ul << 8)),	
+	EPT_CAP_DIS			=			((CSP_REGISTER_T)(0x00ul << 8))
+}EPT_CAPLDEN_CMD_Type;
+	
+/**
+  * @brief  EPT CAPMD selected
+  */
+typedef enum		
+{
+	EPT_CAPMD_Once 					=  ((CSP_REGISTER_T)(0x01ul << 20)),
+	EPT_CAPMD_Continue  			=  ((CSP_REGISTER_T)(0x00ul << 20))
+}EPT_CAPMD_SELECTE_Type;
+
+/**
+  * @brief  EPT CMPA RST CMD
+  */
+typedef enum		
+{
+	EPT_LDARST_EN 					=  ((CSP_REGISTER_T)(0x00ul << 23)),
+	EPT_LDARST_DIS  				=  ((CSP_REGISTER_T)(0x01ul << 23))
+}EPT_LOAD_CMPA_RST_CMD_Type;	
+/**
+  * @brief  EPT CMPB RST CMD
+  */
+typedef enum		
+{
+	EPT_LDBRST_EN 					=  ((CSP_REGISTER_T)(0x00ul << 24)),
+	EPT_LDBRST_DIS  				=  ((CSP_REGISTER_T)(0x01ul << 24))
+}EPT_LOAD_CMPB_RST_CMD_Type;		
+/**
+  * @brief  EPT CMPC RST CMD
+  */
+typedef enum		
+{
+	EPT_LDCRST_EN 					=  ((CSP_REGISTER_T)(0x00ul << 25)),
+	EPT_LDCRST_DIS  				=  ((CSP_REGISTER_T)(0x01ul << 25))
+}EPT_LOAD_CMPC_RST_CMD_Type;	
+/**
+  * @brief  EPT CMPD RST CMD
+  */
+typedef enum		
+{
+	EPT_LDDRST_EN 					=  ((CSP_REGISTER_T)(0x00ul << 26)),
+	EPT_LDDRST_DIS  				=  ((CSP_REGISTER_T)(0x01ul << 26))
+}EPT_LOAD_CMPD_RST_CMD_Type;	
+/**
+  * @brief  EPT FLT CMD
+  */
+typedef enum		
+{
+	EPT_FLT_DIS 					=  ((CSP_REGISTER_T)(0x00ul << 10)),
+	EPT_FLT_EN  					=  ((CSP_REGISTER_T)(0x01ul << 10))
+}EPT_FLT_CMD_Type;		
+/**
+  * @brief  EPT FLT CGFLT
+  */
+typedef enum		
+{
+	EPT_FLT_Bypass 					=  ((CSP_REGISTER_T)(0x00ul << 13)),
+	EPT_FLT_2  						=  ((CSP_REGISTER_T)(0x01ul << 13)),
+	EPT_FLT_3  						=  ((CSP_REGISTER_T)(0x02ul << 13)),
+	EPT_FLT_4  						=  ((CSP_REGISTER_T)(0x03ul << 13)),
+	EPT_FLT_6  						=  ((CSP_REGISTER_T)(0x04ul << 13)),
+	EPT_FLT_8  						=  ((CSP_REGISTER_T)(0x05ul << 13)),
+	EPT_FLT_16  					=  ((CSP_REGISTER_T)(0x06ul << 13)),
+	EPT_FLT_32  					=  ((CSP_REGISTER_T)(0x07ul << 13))
+}EPT_FLT_CGFLT_Type;
+/**
+  * @brief  EPT Triggle Mode 
+  */
+typedef enum		
+{
+	EPT_Triggle_Continue 					=  ((CSP_REGISTER_T)(0x00ul << 8)),
+	EPT_Triggle_Once  						=  ((CSP_REGISTER_T)(0x01ul << 8))
+}EPT_Triggle_Mode_Type;
+/**
+  * @brief  EPT Rearm select
+  */
+typedef enum		
+{
+	EPT_REARM_SYNCEN0 					=  ((CSP_REGISTER_T)(0x01ul << 16)),
+	EPT_REARM_SYNCEN1 					=  ((CSP_REGISTER_T)(0x02ul << 16)),
+	EPT_REARM_SYNCEN2 					=  ((CSP_REGISTER_T)(0x04ul << 16)),
+	EPT_REARM_SYNCEN3 					=  ((CSP_REGISTER_T)(0x08ul << 16)),
+	EPT_REARM_SYNCEN4 					=  ((CSP_REGISTER_T)(0x10ul << 16)),
+	EPT_REARM_SYNCEN5 					=  ((CSP_REGISTER_T)(0x20ul << 16))
+}EPT_REARMX_Type;
+/**
+  * @brief  EPT Rearm select
+  */
+typedef enum		
+{
+	EPT_REARM_Selected_DIS				=	((CSP_REGISTER_T)(0x00ul << 30)),
+	EPT_REARM_Selected_ZRO_AUTO			=	((CSP_REGISTER_T)(0x01ul << 30)),
+	EPT_REARM_Selected_PRD_AUTO			=	((CSP_REGISTER_T)(0x02ul << 30)),
+	EPT_REARM_Selected_ZRO_PRD_AUTO		=	((CSP_REGISTER_T)(0x03ul << 30))
+}EPT_REARM_MODE_Type;
+/**
+  * @brief  EPT Syncusr0 Trig select 
+  */
+typedef enum		
+{
+	EPT_SYNCUSR0_REARMTrig_DIS			=	((CSP_REGISTER_T)(0x00ul << 22)),
+	EPT_SYNCUSR0_REARMTrig_T1			=	((CSP_REGISTER_T)(0x01ul << 22)),
+	EPT_SYNCUSR0_REARMTrig_T2			=	((CSP_REGISTER_T)(0x02ul << 22)),
+	EPT_SYNCUSR0_REARMTrig_T1T2			=	((CSP_REGISTER_T)(0x03ul << 22))
+}EPT_SYNCUSR0_REARMTrig_Selecte_Type;
+/**
+  * @brief  EPT TRGSRC0 ExtSync Selected
+  */
+typedef enum		
+{
+	EPT_TRGSRC0_ExtSync_SYNCUSR0			=	((CSP_REGISTER_T)(0x00ul << 24)),
+	EPT_TRGSRC0_ExtSync_SYNCUSR1			=	((CSP_REGISTER_T)(0x01ul << 24)),
+	EPT_TRGSRC0_ExtSync_SYNCUSR2			=	((CSP_REGISTER_T)(0x02ul << 24)),
+	EPT_TRGSRC0_ExtSync_SYNCUSR3			=	((CSP_REGISTER_T)(0x03ul << 24)),
+	EPT_TRGSRC0_ExtSync_SYNCUSR4			=	((CSP_REGISTER_T)(0x04ul << 24)),
+	EPT_TRGSRC0_ExtSync_SYNCUSR5			=	((CSP_REGISTER_T)(0x05ul << 24))
+}EPT_TRGSRC0_ExtSync_Selected_Type;
+/**
+  * @brief  EPT TRGSRC1 ExtSync Selected
+  */
+typedef enum		
+{
+	EPT_TRGSRC1_ExtSync_SYNCUSR0			=	((CSP_REGISTER_T)(0x00ul << 27)),
+	EPT_TRGSRC1_ExtSync_SYNCUSR1			=	((CSP_REGISTER_T)(0x01ul << 27)),
+	EPT_TRGSRC1_ExtSync_SYNCUSR2			=	((CSP_REGISTER_T)(0x02ul << 27)),
+	EPT_TRGSRC1_ExtSync_SYNCUSR3			=	((CSP_REGISTER_T)(0x03ul << 27)),
+	EPT_TRGSRC1_ExtSync_SYNCUSR4			=	((CSP_REGISTER_T)(0x04ul << 27)),
+	EPT_TRGSRC1_ExtSync_SYNCUSR5			=	((CSP_REGISTER_T)(0x05ul << 27))
+}EPT_TRGSRC1_ExtSync_Selected_Type;
+/**
+  * @brief  EPT PHSEN CMD
+  */
+typedef enum		
+{
+	EPT_PHSEN_DIS			=	((CSP_REGISTER_T)(0x00ul << 8)),
+	EPT_PHSEN_EN			=	((CSP_REGISTER_T)(0x01ul << 8))
+}EPT_PHSEN_CMD_Type;
+/**
+  * @brief  EPT PHSDIR selecte
+  */
+typedef enum		
+{
+	EPT_PHSDIR_increase			=	((CSP_REGISTER_T)(0x01ul << 31)),
+	EPT_PHSEN_decrease			=	((CSP_REGISTER_T)(0x00ul << 31))
+}EPT_PHSDIR_Type;
+/**
+  * @brief  EPT GLDCR Config
+  */
+typedef enum		
+{
+	EPT_GLDMD_Selecte_ZRO						=	((CSP_REGISTER_T)(0x00ul << 1)),
+	EPT_GLDMD_Selecte_PRD						=	((CSP_REGISTER_T)(0x01ul << 1)),
+	EPT_GLDMD_Selecte_ZRO_PRD					=	((CSP_REGISTER_T)(0x02ul << 1)),
+	EPT_GLDMD_Selecte_ZRO_ExiLoad_SYNC			=	((CSP_REGISTER_T)(0x03ul << 1)),
+	EPT_GLDMD_Selecte_PRD_ExiLoad_SYNC			=	((CSP_REGISTER_T)(0x04ul << 1)),
+	EPT_GLDMD_Selecte_ZRO_PRD_ExiLoad_SYNC		=	((CSP_REGISTER_T)(0x05ul << 1)),
+	EPT_GLDMD_Selecte_SW						=	((CSP_REGISTER_T)(0x0Ful << 1))
+}EPT_GLDMD_Selecte_Type;
+/**
+  * @brief  EPT OSTMD Selecte
+  */
+typedef enum		
+{
+	EPT_GLD_OneShot_DIS						=	((CSP_REGISTER_T)(0x00ul << 5)),
+	EPT_GLD_OneShot_EN						=	((CSP_REGISTER_T)(0x01ul << 5))
+}EPT_GLD_OneShot_CMD_Type;
+/**
+  * @brief  EPT PRDR Event Load
+  */
+typedef enum		
+{
+	EPT_PRDR_EventLoad_PEND						=	((CSP_REGISTER_T)(0x00ul << 4)),
+	EPT_PRDR_EventLoad_ExiLoad_SYNC				=	((CSP_REGISTER_T)(0x01ul << 4)),
+	EPT_PRDR_EventLoad_Zro_ExiLoad_SYNC			=	((CSP_REGISTER_T)(0x02ul << 4)),
+	EPT_PRDR_EventLoad_Immediate				=	((CSP_REGISTER_T)(0x03ul << 4))
+} EPT_PRDR_EventLoad_Type;
+
+/**
+  * @brief  EPT CMPX Event load 
+  */
+typedef enum		
+{
+	EPT_CMPX_EventLoad_DIS							=		0,
+	EPT_CMPX_EventLoad_Immediate					=		1,
+	EPT_CMPX_EventLoad_ZRO							=		2,
+	EPT_CMPX_EventLoad_PRD							=		3,
+	EPT_CMPX_EventLoad_ExiLoad_SYNC					=		4
+}EPT_CMPX_EventLoad_Type;
+/**
+  * @brief  EPT AQCRX Event load 
+  */
+typedef enum		
+{
+	EPT_AQCRX_EventLoad_DIS							=		0,
+	EPT_AQCRX_EventLoad_Immediate					=		1,
+	EPT_AQCRX_EventLoad_ZRO							=		2,
+	EPT_AQCRX_EventLoad_PRD							=		3,
+	EPT_AQCRX_EventLoad_ExiLoad_SYNC				=		4
+}EPT_AQCRX_EventLoad_Type;
+/**
+  * @brief  EPT PWMX Selecte 
+  */
+typedef enum		
+{
+	EPT_PWMA				=			0,
+	EPT_PWMB				=			1,
+	EPT_PWMC				=			2,
+	EPT_PWMD				=			3
+}EPT_PWMX_Selecte_Type;
+/**
+  * @brief  EPT CA Selecte
+  */
+typedef enum		
+{
+	EPT_CA_Selecte_CMPA				=			((CSP_REGISTER_T)(0x00ul << 20)),
+	EPT_CA_Selecte_CMPB				=			((CSP_REGISTER_T)(0x01ul << 20)),
+	EPT_CA_Selecte_CMPC				=			((CSP_REGISTER_T)(0x02ul << 20)),
+	EPT_CA_Selecte_CMPD				=			((CSP_REGISTER_T)(0x03ul << 20))
+}EPT_CA_Selecte_Type;
+/**
+  * @brief  EPT CB Selecte
+  */
+typedef enum		
+{
+	EPT_CB_Selecte_CMPA				=			((CSP_REGISTER_T)(0x00ul << 22)),
+	EPT_CB_Selecte_CMPB				=			((CSP_REGISTER_T)(0x01ul << 22)),
+	EPT_CB_Selecte_CMPC				=			((CSP_REGISTER_T)(0x02ul << 22)),
+	EPT_CB_Selecte_CMPD				=			((CSP_REGISTER_T)(0x03ul << 22))
+}EPT_CB_Selecte_Type;
+/**
+  * @brief  EPT PWM ZRO Output
+  */
+typedef enum		
+{
+	EPT_PWM_ZRO_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul )),
+	EPT_PWM_ZRO_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul )),
+	EPT_PWM_ZRO_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul )),
+	EPT_PWM_ZRO_Event_Negate				=	((CSP_REGISTER_T)(0x03ul ))
+}EPT_PWM_ZRO_Output_Type;
+/**
+  * @brief  EPT PWM PRD Output
+  */
+typedef enum		
+{
+	EPT_PWM_PRD_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<2 )),
+	EPT_PWM_PRD_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<2 )),
+	EPT_PWM_PRD_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<2 )),
+	EPT_PWM_PRD_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<2 ))
+}EPT_PWM_PRD_Output_Type;
+/**
+  * @brief  EPT PWM CAU Output
+  */
+typedef enum		
+{
+	EPT_PWM_CAU_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<4 )),
+	EPT_PWM_CAU_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<4 )),
+	EPT_PWM_CAU_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<4 )),
+	EPT_PWM_CAU_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<4 ))
+}EPT_PWM_CAU_Output_Type;
+/**
+  * @brief  EPT PWM CAD Output
+  */
+typedef enum		
+{
+	EPT_PWM_CAD_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<6 )),
+	EPT_PWM_CAD_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<6 )),
+	EPT_PWM_CAD_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<6 )),
+	EPT_PWM_CAD_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<6 ))
+}EPT_PWM_CAD_Output_Type;
+/**
+  * @brief  EPT PWM CBU Output
+  */
+typedef enum		
+{
+	EPT_PWM_CBU_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<8 )),
+	EPT_PWM_CBU_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<8 )),
+	EPT_PWM_CBU_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<8 )),
+	EPT_PWM_CBU_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<8 ))
+}EPT_PWM_CBU_Output_Type;
+/**
+  * @brief  EPT PWM CBD Output
+  */
+typedef enum		
+{
+	EPT_PWM_CBD_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<10 )),
+	EPT_PWM_CBD_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<10 )),
+	EPT_PWM_CBD_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<10 )),
+	EPT_PWM_CBD_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<10 ))
+}EPT_PWM_CBD_Output_Type;
+/**
+  * @brief  EPT PWM T1U Output
+  */
+typedef enum		
+{
+	EPT_PWM_T1U_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<12 )),
+	EPT_PWM_T1U_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<12 )),
+	EPT_PWM_T1U_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<12 )),
+	EPT_PWM_T1U_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<12 ))
+}EPT_PWM_T1U_Output_Type;
+/**
+  * @brief  EPT PWM T1D Output
+  */
+typedef enum		
+{
+	EPT_PWM_T1D_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<14 )),
+	EPT_PWM_T1D_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<14 )),
+	EPT_PWM_T1D_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<14 )),
+	EPT_PWM_T1D_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<14 ))
+}EPT_PWM_T1D_Output_Type;
+/**
+  * @brief  EPT PWM T2U Output
+  */
+typedef enum		
+{
+	EPT_PWM_T2U_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<16 )),
+	EPT_PWM_T2U_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<16 )),
+	EPT_PWM_T2U_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<16 )),
+	EPT_PWM_T2U_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<16 ))
+}EPT_PWM_T2U_Output_Type;
+/**
+  * @brief  EPT PWM T2D Output
+  */
+typedef enum		
+{
+	EPT_PWM_T2D_Event_Nochange				=	((CSP_REGISTER_T)(0x00ul<<18 )),
+	EPT_PWM_T2D_Event_OutLow				=	((CSP_REGISTER_T)(0x01ul<<18 )),
+	EPT_PWM_T2D_Event_OutHigh				=	((CSP_REGISTER_T)(0x02ul<<18 )),
+	EPT_PWM_T2D_Event_Negate				=	((CSP_REGISTER_T)(0x03ul<<18 ))
+}EPT_PWM_T2D_Output_Type;
+/**
+  * @brief  EPT CPCR CMD
+  */
+typedef enum		
+{
+	EPT_CPCR_ENALBE		=	((CSP_REGISTER_T)(0x01ul<<16 )),
+	EPT_CPCR_Disable	=	((CSP_REGISTER_T)(0x00ul<<16 ))
+}EPT_CPCR_CMD_Type;
+/**
+  * @brief  EPT CPCR Source Selecte
+  */
+typedef enum		
+{
+	EPT_CPCR_Source_TCLK			=		((CSP_REGISTER_T)(0)),
+	EPT_CPCR_Source_TIN_BT0OUT		=		((CSP_REGISTER_T)(1)),
+	EPT_CPCR_Source_TIN_BT1OUT		=		((CSP_REGISTER_T)(2))
+}EPT_CPCR_Source_Selecte_Type;
+/**
+  * @brief  EPT CPCR CDUTY
+  */
+typedef enum		
+{
+	EPT_CDUTY_DIS			=			((CSP_REGISTER_T)(0<<11)),	
+	EPT_CDUTY_7_8			=			((CSP_REGISTER_T)(1<<11)),
+	EPT_CDUTY_6_8			=			((CSP_REGISTER_T)(2<<11)),
+	EPT_CDUTY_5_8			=			((CSP_REGISTER_T)(3<<11)),
+	EPT_CDUTY_4_8			=			((CSP_REGISTER_T)(4<<11)),
+	EPT_CDUTY_3_8			=			((CSP_REGISTER_T)(5<<11)),
+	EPT_CDUTY_2_8			=			((CSP_REGISTER_T)(6<<11)),
+	EPT_CDUTY_1_8			=			((CSP_REGISTER_T)(7<<11))
+}EPT_CDUTY_Type;
+/**
+  * @brief  EPT EPX 
+  */
+typedef enum		
+{
+	EPT_EP0		=		0,	
+	EPT_EP1		=		1,	
+	EPT_EP2		=		2,	
+	EPT_EP3		=		3,	
+	EPT_EP4		=		4,	
+	EPT_EP5		=		5,	
+	EPT_EP6		=		6,	
+	EPT_EP7		=		7
+}EPT_EPX_Type;
+/**
+  * @brief  EPT Input selecte  
+  */
+typedef enum	
+{
+	EPT_Input_selecte_EPI0			=		((CSP_REGISTER_T)(1)),		
+	EPT_Input_selecte_EPI1			=		((CSP_REGISTER_T)(2)),
+	EPT_Input_selecte_EPI2			=		((CSP_REGISTER_T)(3)),
+	EPT_Input_selecte_EPI3			=		((CSP_REGISTER_T)(4)),
+	EPT_Input_selecte_EPI4			=		((CSP_REGISTER_T)(5)),
+	EPT_Input_selecte_ORL0			=		((CSP_REGISTER_T)(0XE)),
+	EPT_Input_selecte_ORL1			=		((CSP_REGISTER_T)(0XF))	
+}EPT_Input_selecte_Type;
+/**
+  * @brief  EPT FLT PACE0 
+  */
+typedef enum	
+{
+	EPT_FLT_PACE0_DIS			=			((CSP_REGISTER_T)(0<<8)),
+	EPT_FLT_PACE0_2CLK			=			((CSP_REGISTER_T)(1<<8)),
+	EPT_FLT_PACE0_3CLK			=			((CSP_REGISTER_T)(2<<8)),
+	EPT_FLT_PACE0_4CLK			=			((CSP_REGISTER_T)(3<<8))
+}EPT_FLT_PACE0_Type;
+/**
+  * @brief  EPT FLT PACE1 
+  */
+typedef enum	
+{
+	EPT_FLT_PACE1_DIS			=			((CSP_REGISTER_T)(0<<10)),
+	EPT_FLT_PACE1_2CLK			=			((CSP_REGISTER_T)(1<<10)),
+	EPT_FLT_PACE1_3CLK			=			((CSP_REGISTER_T)(2<<10)),
+	EPT_FLT_PACE1_4CLK			=			((CSP_REGISTER_T)(3<<10))
+}EPT_FLT_PACE1_Type;
+/**
+  * @brief  EPT DB EventLoad
+  */
+typedef enum	
+{
+	EPT_DB_EventLoad_DIS							=		0,
+	EPT_DB_EventLoad_Immediate						=		1,
+	EPT_DB_EventLoad_ZRO							=		2,
+	EPT_DB_EventLoad_PRD							=		3,
+	EPT_DB_EventLoad_ZRO_PRD						=		4
+}EPT_DB_EventLoad_Type;
+/**
+  * @brief  EPT CHX Selecte
+  */
+typedef enum	
+{
+	EPT_CHA_Selecte 		=		0,
+	EPT_CHB_Selecte 		=		1,
+	EPT_CHC_Selecte 		=		2,
+}EPT_CHX_Selecte_Type;
+/**
+  * @brief  EPT INSEL
+  */
+typedef enum	
+{
+	EPT_CHAINSEL_PWMA_RISE_FALL			=		((CSP_REGISTER_T)(0<<4)),
+	EPT_CHAINSEL_PWMB_RISE_PWMA_FALL		=		((CSP_REGISTER_T)(1<<4)),
+	EPT_CHAINSEL_PWMA_RISE_PWMB_FALL		=		((CSP_REGISTER_T)(2<<4)),
+	EPT_CHAINSEL_PWMB_RISE_FALL			=		((CSP_REGISTER_T)(3<<4)),	
+	EPT_CHBINSEL_PWMB_RISE_FALL			=		((CSP_REGISTER_T)(0<<12)),
+	EPT_CHBINSEL_PWMC_RISE_PWMB_FALL		=		((CSP_REGISTER_T)(1<<12)),
+	EPT_CHBINSEL_PWMB_RISE_PWMC_FALL		=		((CSP_REGISTER_T)(2<<12)),
+	EPT_CHBINSEL_PWMC_RISE_FALL			=		((CSP_REGISTER_T)(3<<12)),	
+	EPT_CHCINSEL_PWMC_RISE_FALL			=		((CSP_REGISTER_T)(0<<20)),
+	EPT_CHCINSEL_PWMD_RISE_PWMC_FALL		=		((CSP_REGISTER_T)(1<<20)),
+	EPT_CHCINSEL_PWMC_RISE_PWMD_FALL		=		((CSP_REGISTER_T)(2<<20)),
+	EPT_CHCINSEL_PWMD_RISE_FALL			=		((CSP_REGISTER_T)(3<<20))	
+}EPT_INSEL_Type;
+/**
+  * @brief  EPT OUTSEL
+  */
+typedef enum	
+{
+	EPT_CHA_OUTSEL_PWMA_PWMB_Bypass			=		((CSP_REGISTER_T)(0)),
+	EPT_CHA_OUTSEL_DisRise_EnFall			=		((CSP_REGISTER_T)(1)),
+	EPT_CHA_OUTSEL_EnRise_DisFall			=		((CSP_REGISTER_T)(2)),
+	EPT_CHA_OUTSEL_EnRise_EnFall			=		((CSP_REGISTER_T)(3)),
+	EPT_CHB_OUTSEL_PWMB_PWMC_Bypass			=		((CSP_REGISTER_T)(0<<8)),
+	EPT_CHB_OUTSEL_DisRise_EnFall			=		((CSP_REGISTER_T)(1<<8)),
+	EPT_CHB_OUTSEL_EnRise_DisFall			=		((CSP_REGISTER_T)(2<<8)),
+	EPT_CHB_OUTSEL_EnRise_EnFall			=		((CSP_REGISTER_T)(3<<8)),
+	EPT_CHC_OUTSEL_PWMC_PWMD_Bypass			=		((CSP_REGISTER_T)(0<<16)),
+	EPT_CHC_OUTSEL_DisRise_EnFall			=		((CSP_REGISTER_T)(1<<16)),
+	EPT_CHC_OUTSEL_EnRise_DisFall			=		((CSP_REGISTER_T)(2<<16)),
+	EPT_CHC_OUTSEL_EnRise_EnFall			=		((CSP_REGISTER_T)(3<<16))
+}EPT_OUTSEL_Type;
+/**
+  * @brief  EPT OUT POLARITY
+  */
+typedef enum	
+{
+	EPT_PA_PB_OUT_Direct				=		((CSP_REGISTER_T)(0)),
+	EPT_PA_OUT_Reverse					=		((CSP_REGISTER_T)(1)),
+	EPT_PB_OUT_Reverse					=		((CSP_REGISTER_T)(2)),
+	EPT_PA_PB_OUT_Reverse				=		((CSP_REGISTER_T)(3))
+}EPT_OUT_POLARITY_Type;
+/**
+  * @brief  EPT OUT SWAP
+  */
+typedef enum	
+{
+	EPT_PAtoCHX_PBtoCHY					=		((CSP_REGISTER_T)(0)),
+	EPT_PBtoCHX_PBtoCHY					=		((CSP_REGISTER_T)(1)),
+	EPT_PAtoCHX_PAtoCHY					=		((CSP_REGISTER_T)(2)),
+	EPT_PBtoCHX_PAtoCHY					=		((CSP_REGISTER_T)(3))
+}EPT_OUT_SWAP_Type;
+/**
+  * @brief  EPT TRGSRCX Selecte
+  */
+typedef enum	
+{
+	EPT_TRGSRC0			=		0,
+	EPT_TRGSRC1			=		1,
+	EPT_TRGSRC2			=		2,
+	EPT_TRGSRC3			=		3
+}EPT_TRGSRCX_Select_Type;
+/**
+  * @brief  EPT EVTRG TRGSRCX SET
+  */
+ typedef enum
+{	
+	EPT_EVTRG_TRGSRCX_DIS			=	((CSP_REGISTER_T)(0x00ul )),  
+	EPT_EVTRG_TRGSRCX_ZRO			=	((CSP_REGISTER_T)(0x01ul )),  
+	EPT_EVTRG_TRGSRCX_PRD			=	((CSP_REGISTER_T)(0x02ul )),  
+	EPT_EVTRG_TRGSRCX_ZROorPRD		=	((CSP_REGISTER_T)(0x03ul )),
+	EPT_EVTRG_TRGSRCX_CMPAU			=	((CSP_REGISTER_T)(0x04ul )),
+	EPT_EVTRG_TRGSRCX_CMPAD			=	((CSP_REGISTER_T)(0x05ul )),
+	EPT_EVTRG_TRGSRCX_CMPBU			=	((CSP_REGISTER_T)(0x06ul )),
+	EPT_EVTRG_TRGSRCX_CMPBD			=	((CSP_REGISTER_T)(0x07ul )),
+	EPT_EVTRG_TRGSRCX_CMPCU			=	((CSP_REGISTER_T)(0x08ul )),
+	EPT_EVTRG_TRGSRCX_CMPCD			=	((CSP_REGISTER_T)(0x09ul )),
+	EPT_EVTRG_TRGSRCX_CMPDU			=	((CSP_REGISTER_T)(0x0Aul )),
+	EPT_EVTRG_TRGSRCX_CMPDD			=	((CSP_REGISTER_T)(0x0Bul )),
+	EPT_EVTRG_TRGSRC01_ExtSync		=	((CSP_REGISTER_T)(0x0Cul )),
+	EPT_EVTRG_TRGSRC23_PeriodEnd	=	((CSP_REGISTER_T)(0x0Cul )),
+	EPT_EVTRG_TRGSRCX_PE0			=	((CSP_REGISTER_T)(0x0Dul )),
+	EPT_EVTRG_TRGSRCX_PE1			=	((CSP_REGISTER_T)(0x0Eul )),
+	EPT_EVTRG_TRGSRCX_PE2			=	((CSP_REGISTER_T)(0x0Ful ))
+}EPT_EVTRG_TRGSRCX_TypeDef;	
+ typedef enum
+{
+	EPT_TRGSRCX_EN	=	((CSP_REGISTER_T)0x01ul),  
+	EPT_TRGSRCX_DIS	=	((CSP_REGISTER_T)0x00ul)  
+}EPT_TRGSRCX_CMD_TypeDef;
+/**
+  * @brief  EPT INT register 
+  */
+typedef enum
+{
+	//RISR IMCR MISR ICR
+	EPT_TRGEV0_INT        		=		((CSP_REGISTER_T)(0x01ul << 0)),  
+	EPT_TRGEV1_INT      		=		((CSP_REGISTER_T)(0x01ul << 1)),    
+	EPT_TRGEV2_INT        		=		((CSP_REGISTER_T)(0x01ul << 2)),   
+	EPT_TRGEV3_INT      		=		((CSP_REGISTER_T)(0x01ul << 3)),   
+	EPT_CAP_LD0					=		((CSP_REGISTER_T)(0x01ul << 4)),   
+	EPT_CAP_LD1					=		((CSP_REGISTER_T)(0x01ul << 5)),
+	EPT_CAP_LD2					=		((CSP_REGISTER_T)(0x01ul << 6)),
+	EPT_CAP_LD3					=		((CSP_REGISTER_T)(0x01ul << 7)),
+	EPT_CAU						=		((CSP_REGISTER_T)(0x01ul <<8)),
+	EPT_CAD						=		((CSP_REGISTER_T)(0x01ul <<9)),
+	EPT_CBU						=		((CSP_REGISTER_T)(0x01ul <<10)),
+	EPT_CBD						=		((CSP_REGISTER_T)(0x01ul <<11)),
+	EPT_CCU						=		((CSP_REGISTER_T)(0x01ul <<12)),
+	EPT_CCD						=		((CSP_REGISTER_T)(0x01ul <<13)),
+	EPT_CDU						=		((CSP_REGISTER_T)(0x01ul <<14)),
+	EPT_CDD						=		((CSP_REGISTER_T)(0x01ul <<15)),
+	EPT_PEND					=		((CSP_REGISTER_T)(0x01ul <<16))
+}EPT_INT_TypeDef;
+/**
+  * @brief  EPT EMINT register 
+  */
+typedef enum
+{
+	//EMRISR EMIMCR EMMISR EMICR
+	EPT_EP0_EMINT        		=		((CSP_REGISTER_T)(0x01ul << 0)),  
+	EPT_EP1_EMINT      			=		((CSP_REGISTER_T)(0x01ul << 1)),    
+	EPT_EP2_EMINT        		=		((CSP_REGISTER_T)(0x01ul << 2)),   
+	EPT_EP3_EMINT      			=		((CSP_REGISTER_T)(0x01ul << 3)),
+	EPT_EP4_EMINT        		=		((CSP_REGISTER_T)(0x01ul << 4)),  
+	EPT_EP5_EMINT      			=		((CSP_REGISTER_T)(0x01ul << 5)),    
+	EPT_EP6_EMINT        		=		((CSP_REGISTER_T)(0x01ul << 6)),   
+	EPT_EP7_EMINT      			=		((CSP_REGISTER_T)(0x01ul << 7)),
+	EPT_CPU_FAULT_EMINT      	=		((CSP_REGISTER_T)(0x01ul << 8)),
+	EPT_MEM_FAULT_EMINT      	=		((CSP_REGISTER_T)(0x01ul << 9)),
+	EPT_EOM_FAULT_EMINT      	=		((CSP_REGISTER_T)(0x01ul << 10))
+}EPT_EMINT_TypeDef;
+/**
+  * @brief  EPT LKCR TRG Source
+  */
+typedef enum
+{
+	EPT_LKCR_TRG_EP0			=		0,
+	EPT_LKCR_TRG_EP1			=		2,
+	EPT_LKCR_TRG_EP2			=		4,
+	EPT_LKCR_TRG_EP3			=		6,
+	EPT_LKCR_TRG_EP4			=		8,
+	EPT_LKCR_TRG_EP5			=		10,
+	EPT_LKCR_TRG_EP6			=		12,
+	EPT_LKCR_TRG_EP7			=		14,
+	EPT_LKCR_TRG_CPU_FAULT		=		15,
+	EPT_LKCR_TRG_MEM_FAULT		=		16,
+	EPT_LKCR_TRG_EOM_FAULT		=		17
+}EPT_LKCR_TRG_Source_Type;
+/**
+  * @brief  EPT LKCR Mode Selecte	
+  */
+typedef enum
+{
+	EPT_LKCR_Mode_LOCK_DIS		=		((CSP_REGISTER_T)0x00ul),
+	EPT_LKCR_Mode_SLOCK_EN		=		((CSP_REGISTER_T)0x01ul),
+	EPT_LKCR_Mode_HLOCK_EN		=		((CSP_REGISTER_T)0x02ul),
+	EPT_LKCR_TRG_X_FAULT_HLOCK_EN		=		((CSP_REGISTER_T)0x03ul),
+	EPT_LKCR_TRG_X_FAULT_HLOCK_DIS		=		((CSP_REGISTER_T)0x04ul),
+}EPT_LKCR_Mode_Type;
+/**
+  * @brief  EPT OUTPUT Channel	
+  */
+typedef enum
+{
+	EPT_OUTPUT_Channel_CHAX		=		0,
+	EPT_OUTPUT_Channel_CHBX		=		2,
+	EPT_OUTPUT_Channel_CHCX		=		4,
+	EPT_OUTPUT_Channel_CHD		=		6,
+	EPT_OUTPUT_Channel_CHAY		=		8,
+	EPT_OUTPUT_Channel_CHBY		=		10,
+	EPT_OUTPUT_Channel_CHCY		=		12
+}EPT_OUTPUT_Channel_Type;
+/**
+  * @brief  EPT SHLOCK OUTPUT Statue
+  */
+typedef enum
+{
+	EPT_SHLOCK_OUTPUT_HImpedance		=	0,
+	EPT_SHLOCK_OUTPUT_High				=	1,
+	EPT_SHLOCK_OUTPUT_Low				=	2,
+	EPT_SHLOCK_OUTPUT_Nochange			=	3
+}EPT_SHLOCK_OUTPUT_Statue_Type;
+
+/** @addtogroup EPT_Exported_functions
+  * @{
+  */
+extern void EPT_Software_Prg(void);
+extern void EPT_Start(void);  
+extern void EPT_Stop(void);  
+extern void EPT_IO_SET(EPT_IO_Mode_Type EPT_IO_X , EPT_IO_NUM_Type IO_Num_X);
+extern void EPT_PWM_Config(EPT_TCLK_Selecte_Type EPT_TCLK_Selecte_X , EPT_CNTMD_SELECTE_Type EPT_CNTMD_SELECTE_X  , EPT_OPM_SELECTE_Type EPT_OPM_SELECTE_X
+					, U16_T EPT_PSCR);	
+extern void EPT_CG_gate_Config(EPT_CGSRC_TIN_Selecte_Type EPT_CGSRC_TIN_Selecte_X , U8_T EPT_CGFLT_DIV , U8_T EPT_CGFLT_CNT , EPT_BURST_CMD_Type EPT_BURST_CMD);					
+extern void EPT_Capture_Config(EPT_TCLK_Selecte_Type EPT_TCLK_Selecte_X , EPT_CNTMD_SELECTE_Type EPT_CNTMD_SELECTE_X  , EPT_CAPMD_SELECTE_Type EPT_CAPMD_SELECTE_X , EPT_CAPLDEN_CMD_Type CAP_CMD 
+					, EPT_LOAD_CMPA_RST_CMD_Type EPT_LOAD_CMPA_RST_CMD , EPT_LOAD_CMPB_RST_CMD_Type EPT_LOAD_CMPB_RST_CMD , EPT_LOAD_CMPC_RST_CMD_Type EPT_LOAD_CMPC_RST_CMD
+					, EPT_LOAD_CMPD_RST_CMD_Type EPT_LOAD_CMPD_RST_CMD , U8_T EPT_STOP_WRAP , U16_T EPT_PSCR);
+extern void EPT_SYNCR_Config(EPT_Triggle_Mode_Type EPT_Triggle_X , EPT_SYNCUSR0_REARMTrig_Selecte_Type EPT_SYNCUSR0_REARMTrig_Selecte , EPT_TRGSRC0_ExtSync_Selected_Type EPT_TRGSRC0_ExtSync_Selected ,
+					  EPT_TRGSRC1_ExtSync_Selected_Type EPT_TRGSRC1_ExtSync_Selected , U8_T EPT_SYNCR_EN);
+extern void EPT_PHSEN_Config(EPT_PHSEN_CMD_Type EPT_PHSEN_CMD , EPT_PHSDIR_Type EPT_PHSDIR , U16_T PHSR);			  
+extern void EPT_SYNCR_RearmClr(EPT_REARMX_Type EPT_REARMX );
+extern void EPT_Caputure_Rearm(void);  
+extern void EPT_Globle_Eventload_Config(EPT_GLD_OneShot_CMD_Type EPT_GLD_OneShot_CMD , EPT_GLDMD_Selecte_Type EPT_GLDMD_Selecte_X , U8_T GLDPRD_CNT , U16_T GLDCFG_EN);
+extern void EPT_Globle_SwLoad_CMD(void);
+extern void EPT_CPCR_Config(EPT_CPCR_CMD_Type EPT_CPCR_CMD , EPT_CPCR_Source_Selecte_Type EPT_CPCR_Source_X , EPT_CDUTY_Type EPT_CDUTY_X , U8_T EPT_CPCR_OSPWTH , U8_T EPT_CPCR_CDIV);
+extern void EPT_PWMX_Output_Control(
+							 EPT_PWMX_Selecte_Type EPT_PWMX_Selecte ,EPT_CA_Selecte_Type EPT_CA_Selecte_X , EPT_CB_Selecte_Type EPT_CB_Selecte_X ,
+							 EPT_PWM_ZRO_Output_Type EPT_PWM_ZRO_Event_Output , EPT_PWM_PRD_Output_Type EPT_PWM_PRD_Event_Output , 
+							 EPT_PWM_CAU_Output_Type EPT_PWM_CAU_Event_Output , EPT_PWM_CAD_Output_Type EPT_PWM_CAD_Event_Output ,
+							 EPT_PWM_CBU_Output_Type EPT_PWM_CBU_Event_Output , EPT_PWM_CBD_Output_Type EPT_PWM_CBD_Event_Output ,
+							 EPT_PWM_T1U_Output_Type EPT_PWM_T1U_Event_Output , EPT_PWM_T1D_Output_Type EPT_PWM_T1D_Event_Output ,
+							 EPT_PWM_T2U_Output_Type EPT_PWM_T2U_Event_Output , EPT_PWM_T2D_Output_Type EPT_PWM_T2D_Event_Output 
+							 );
+extern void EPT_Tevent_Selecte( U8_T EPT_T1_Selecte, U8_T EPT_T2_Selecte);						 
+extern void EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(U16_T EPT_PRDR_Value , U16_T EPT_CMPA_Value , U16_T EPT_CMPB_Value , U16_T EPT_CMPC_Value , U16_T EPT_CMPD_Value);
+extern void EPT_PRDR_EventLoad_Config(EPT_PRDR_EventLoad_Type EPT_PRDR_EventLoad_x);
+extern void EPT_CMP_EventLoad_Config(EPT_CMPX_EventLoad_Type EPT_CMPX_EventLoad_x);  
+extern void EPT_AQCR_Eventload_Config(EPT_AQCRX_EventLoad_Type EPT_AQCRX_EventLoad_X);
+extern void EPT_EPX_Config(EPT_EPX_Type EPT_EPX , EPT_Input_selecte_Type EPT_Input_selecte_x , EPT_FLT_PACE0_Type EPT_FLT_PACE0_x , EPT_FLT_PACE1_Type EPT_FLT_PACE1_x , U8_T ORL0_EPIx , U8_T ORL1_EPIx);
+extern void EPT_EPIX_POL_Config(U8_T EPT_EPIX_POL);
+extern void EPT_DB_Eventload_Config(EPT_DB_EventLoad_Type EPT_DB_EventLoad_X);  
+extern void EPT_DBCR_Config(EPT_CHX_Selecte_Type EPT_CHX_Selecte , EPT_INSEL_Type EPT_INSEL_X , EPT_OUTSEL_Type EPT_OUTSEL_X , EPT_OUT_POLARITY_Type EPT_OUT_POLARITY_X , EPT_OUT_SWAP_Type EPT_OUT_SWAP_X);
+extern void EPT_DB_CLK_Config(U16_T DPSC , U16_T DTR , U16_T DTF);
+extern void EPT_TRGSRCX_Config(EPT_TRGSRCX_Select_Type EPT_TRGSRCX_Select , EPT_EVTRG_TRGSRCX_TypeDef EPT_EVTRG_TRGSRCX_X , EPT_TRGSRCX_CMD_TypeDef EPT_TRGSRCX_CMD , U8_T TRGEVXPRD);  
+extern void EPT_TRGSRCX_SWFTRG(EPT_TRGSRCX_Select_Type EPT_TRGSRCX_Select); 
+extern void EPT_Int_Enable(EPT_INT_TypeDef EPT_X_INT);
+extern void EPT_Int_Disable(EPT_INT_TypeDef EPT_X_INT);
+extern void EPT_EMInt_Enable(EPT_EMINT_TypeDef EPT_X_EMINT);
+extern void EPT_EMInt_Disable(EPT_EMINT_TypeDef EPT_X_EMINT);
+extern void EPT_Vector_Int_Enable(void);
+extern void EPT_Vector_Int_Disable(void);
+extern void EPT_SLock_CLR(EPT_EMINT_TypeDef EPT_X_EMINT);
+extern void EPT_HLock_CLR(EPT_EMINT_TypeDef EPT_X_EMINT);
+extern void EPT_SW_Set_lock(EPT_EMINT_TypeDef EPT_X_EMINT);  
+extern void EPT_LKCR_TRG_Config(EPT_LKCR_TRG_Source_Type EPT_LKCR_TRG_X , EPT_LKCR_Mode_Type EPT_LKCR_Mode_X);
+extern void EPT_SHLOCK_OUTPUT_Config(EPT_OUTPUT_Channel_Type EPT_OUTPUT_Channel_X , EPT_SHLOCK_OUTPUT_Statue_Type EPT_SHLOCK_OUTPUT_X);
+
+#endif   /**< apt32f102_ept_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_et.h b/Source/include/apt32f102_et.h
new file mode 100644
index 0000000..8c66ee3
--- /dev/null
+++ b/Source/include/apt32f102_et.h
@@ -0,0 +1,146 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_et.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_et_H
+#define _apt32f102_et_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define ET_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------ET  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  ET SWTRG register
+  */
+typedef enum
+{
+    ET_SWTRG_CH0 = 0,
+	ET_SWTRG_CH1 = (1<<1),
+	ET_SWTRG_CH2 = (1<<2),
+	ET_SWTRG_CH3 = (1<<3),
+	ET_SWTRG_CH4 = (1<<4),
+	ET_SWTRG_CH5 = (1<<5),
+	ET_SWTRG_CH6 = (1<<6),
+	ET_SWTRG_CH7 = (1<<7),
+}CRC_ETSWTRG_TypeDef;
+/**
+  * @brief  SRCSEL register
+  */
+typedef enum
+{
+    ET_SRC0 = 0,
+	ET_SRC1 = 1,
+	ET_SRC2 = 2,
+}CRC_ESRCSEL_TypeDef;
+/**
+  * @brief  SRCSEL register
+  */
+typedef enum
+{
+    ET_DST0 = 0,
+	ET_DST1 = 1,
+	ET_DST2 = 2,
+}CRC_DSTSEL_TypeDef;
+/**
+  * @brief  SRCSEL register
+  */
+typedef enum
+{
+    ET_CH3 = 0,
+	ET_CH4 = 1,
+	ET_CH5 = 2,
+	ET_CH6 = 3,
+	ET_CH7 = 4,
+}CRC_ETCHX_TypeDef;
+/**
+  * @brief  TRIG MODE register
+  */
+typedef enum
+{
+    TRG_HW = (0X00<<1),
+	TRG_SW = (0X01<<1),
+}CRC_TRIGMODE_TypeDef;
+
+//Source IP Event
+#define ET_LPT_SYNC  (0X0)
+#define ET_EXI_SYNC0 (0X4)
+#define ET_EXI_SYNC1 (0X5)
+#define ET_EXI_SYNC2 (0X6)
+#define ET_EXI_SYNC3 (0X7)
+#define ET_EXI_SYNC4 (0X8)
+#define ET_EXI_SYNC5 (0X9)
+#define ET_RTC_SYNC0 (0XA)
+#define ET_RTC_SYNC1 (0XB)
+#define ET_BT_SYNC0 (0XC)
+#define ET_BT_SYNC1 (0XD)
+#define ET_EPT0_SYNC0 (0X10)
+#define ET_EPT0_SYNC1 (0X11)
+#define ET_EPT0_SYNC2 (0X12)
+#define ET_EPT0_SYNC3 (0X13)
+#define ET_GPT0_SYNC0 (0X20)
+#define ET_GPT0_SYNC1 (0X21)
+#define ET_ADC_SYNC0 (0X30)
+#define ET_ADC_SYNC1 (0X31)
+#define ET_TOUCH_SYNC (0X3C)
+//Destination IP Event
+#define ET_LPT_TRGSRC  (0X0)
+#define ET_BT0_TRGSRC0  (0X2)
+#define ET_BT0_TRGSRC1  (0X3)
+#define ET_BT1_TRGSRC0  (0X4)
+#define ET_BT1_TRGSRC1  (0X5)
+#define ET_ADC_TRGSRC0  (0X6)
+#define ET_ADC_TRGSRC1  (0X7)
+#define ET_ADC_TRGSRC2  (0X8)
+#define ET_ADC_TRGSRC3  (0X9)
+#define ET_ADC_TRGSRC4  (0XA)
+#define ET_ADC_TRGSRC5  (0XB)
+#define ET_EPT0_TRGSRC0  (0X10)
+#define ET_EPT0_TRGSRC1  (0X11)
+#define ET_EPT0_TRGSRC2  (0X12)
+#define ET_EPT0_TRGSRC3  (0X13)
+#define ET_EPT0_TRGSRC4  (0X14)
+#define ET_EPT0_TRGSRC5  (0X15)
+#define ET_GPT0_TRGSRC0  (0X24)
+#define ET_GPT0_TRGSRC1  (0X25)
+#define ET_GPT0_TRGSRC2  (0X26)
+#define ET_GPT0_TRGSRC3  (0X27)
+#define ET_GPT0_TRGSRC4  (0X28)
+#define ET_GPT0_TRGSRC5  (0X29)
+#define ET_TOUCH_TRGSRC  (0X3C)
+
+
+
+
+extern void ET_DeInit(void);
+extern void ET_ENABLE(void);
+extern void ET_DISABLE(void);
+extern void ET_SWTRG_CMD(CRC_ETSWTRG_TypeDef ETSWTRG_X,FunctionalStatus NewState);
+extern void ET_CH0_SRCSEL(CRC_ESRCSEL_TypeDef ESRCSEL_X,FunctionalStatus NewState,U8_T SRCSEL_X);
+extern void ET_CH0_CONTROL(FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T DSTSEL_X);
+extern void ET_CH1_SRCSEL(CRC_DSTSEL_TypeDef DST_X,FunctionalStatus NewState,U8_T DSTSEL_X);
+extern void ET_CH1_CONTROL(FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T DSTSEL_X);
+extern void ET_CH2_SRCSEL(CRC_DSTSEL_TypeDef DST_X,FunctionalStatus NewState,U8_T DSTSEL_X);
+extern void ET_CH2_CONTROL(FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T DSTSEL_X);
+extern void ET_CHx_CONTROL(CRC_ETCHX_TypeDef ETCHX,FunctionalStatus NewState,CRC_TRIGMODE_TypeDef TRIGMODEX,U8_T SRCSEL_X,U8_T DSTSEL_X);
+
+
+
+#endif   /**< apt32f102_crc_H */
\ No newline at end of file
diff --git a/Source/include/apt32f102_gpio.h b/Source/include/apt32f102_gpio.h
new file mode 100644
index 0000000..5e6994a
--- /dev/null
+++ b/Source/include/apt32f102_gpio.h
@@ -0,0 +1,221 @@
+/*
+  ******************************************************************************
+  * @file    main.c
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_gpio_H
+#define _apt32f102_gpio_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define GPIO_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------GPIO  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  GPIO pin numbner
+  */
+typedef enum
+{
+  PIN_0    = 0,  	/*!< Pin 0 selected */
+  PIN_1    = 4,  	/*!< Pin 1 selected */
+  PIN_2    = 8,  	/*!< Pin 2 selected */
+  PIN_3    = 12,   	/*!< Pin 3 selected */
+  PIN_4    = 16,  	/*!< Pin 4 selected */
+  PIN_5    = 20,  	/*!< Pin 5 selected */
+  PIN_6    = 24,  	/*!< Pin 6 selected */
+  PIN_7    = 28,  	/*!< Pin 7 selected */
+  PIN_8    = 0,  	/*!< Pin 8 selected */
+  PIN_9    = 4,  	/*!< Pin 9 selected */
+  PIN_10   = 8,  	/*!< Pin 10 selected */
+  PIN_11   = 12,   	/*!< Pin 11 selected */
+  PIN_12   = 16,  	/*!< Pin 12 selected */
+  PIN_13   = 20,  	/*!< Pin 13 selected */
+  PIN_14   = 24,  	/*!< Pin 13 selected */
+  PIN_15   = 28,  	/*!< Pin 13 selected */
+}GPIO_Pin_TypeDef;
+/**
+  * @brief  GPIO  high/low register
+  */
+typedef enum
+{
+    LowByte = 0,
+    HighByte = 1,
+}GPIO_byte_TypeDef;
+/**
+  * @brief  GPIO  IO status
+  */
+typedef enum
+{
+    Intput = 1,
+    Output = 0,
+}GPIO_Dir_TypeDef;
+/**
+  * @brief  GPIO  IO mode
+  */
+typedef enum
+{
+    PUDR = 0,                       //pull high or low
+    DSCR =1,                        //drive strenth
+    OMCR =2,                        //open drain
+    IECR =3,                        //int
+}GPIO_Mode_TypeDef;
+/**
+  * @brief  GPIO  IO Group
+  */
+typedef enum
+{
+    PA0 = 0,
+    PB0 = 2,
+    GPIOA = 0,
+    GPIOB = 2,
+}GPIO_Group_TypeDef;
+/**
+  * @brief  GPIO  exi number
+  */
+typedef enum
+{
+    EXI0 = 0,
+    EXI1 = 1,
+    EXI2 = 2,
+    EXI3 = 3,
+    EXI4 = 4,
+    EXI5 = 5,
+    EXI6 = 6,
+    EXI7 = 7,
+    EXI8 = 8,
+    EXI9 = 9,
+    EXI10 = 10,
+    EXI11 = 11,
+    EXI12 = 12,
+    EXI13 = 13,
+	EXI14 = 14,
+	EXI15 = 15,
+}GPIO_EXI_TypeDef;
+
+/**
+  * @brief  EXI PIN
+  */
+typedef enum
+{
+	Selete_EXI_PIN0		=		(CSP_REGISTER_T)(0),						
+	Selete_EXI_PIN1		=		(CSP_REGISTER_T)(1),
+	Selete_EXI_PIN2		=		(CSP_REGISTER_T)(2),
+	Selete_EXI_PIN3		=		(CSP_REGISTER_T)(3),
+	Selete_EXI_PIN4		=		(CSP_REGISTER_T)(4),
+	Selete_EXI_PIN5		=		(CSP_REGISTER_T)(5),
+	Selete_EXI_PIN6		=		(CSP_REGISTER_T)(6),
+	Selete_EXI_PIN7		=		(CSP_REGISTER_T)(7),
+	Selete_EXI_PIN8		=		(CSP_REGISTER_T)(8),
+	Selete_EXI_PIN9		=		(CSP_REGISTER_T)(9),
+	Selete_EXI_PIN10		=		(CSP_REGISTER_T)(10),
+	Selete_EXI_PIN11		=		(CSP_REGISTER_T)(11),
+	Selete_EXI_PIN12		=		(CSP_REGISTER_T)(12),
+	Selete_EXI_PIN13		=		(CSP_REGISTER_T)(13),
+	Selete_EXI_PIN14		=		(CSP_REGISTER_T)(14),
+	Selete_EXI_PIN15		=		(CSP_REGISTER_T)(15),
+	Selete_EXI_PIN16		=		(CSP_REGISTER_T)(16),
+	Selete_EXI_PIN17		=		(CSP_REGISTER_T)(17),
+	Selete_EXI_PIN18		=		(CSP_REGISTER_T)(18),
+	Selete_EXI_PIN19		=		(CSP_REGISTER_T)(19)
+}GPIO_EXIPIN_TypeDef;
+
+
+/**
+  * @brief  GPIO INPUT MODE SETECTED
+  */
+typedef enum
+{
+	INPUT_MODE_SETECTED_CMOS			=		0,
+	INPUT_MODE_SETECTED_TTL1			=		1,
+	INPUT_MODE_SETECTED_TTL2			=		2
+}INPUT_MODE_SETECTED_TypeDef;
+
+#define nop      asm ("nop")
+
+#define SetPA0(n)   (GPIOA0->SODR = (1ul<<n))
+#define ClrPA0(n)   (GPIOA0->CODR = (1ul<<n))
+
+#define SetPB0(n)   (GPIOB0->SODR = (1ul<<n))
+#define ClrPB0(n)   (GPIOB0->CODR = (1ul<<n))
+
+#define PA0in(n)    (((GPIOA0->PSDR)>>n) & 1ul)
+#define PB0in(n)    (((GPIOB0->PSDR)>>n) & 1ul)
+
+
+#define CSP_GPIO_SET_CONLR(cm,val) ((cm)->CONLR = val)
+#define CSP_GPIO_GET_CONLR(cm)     ((cm)->CONLR)
+
+#define CSP_GPIO_SET_CONHR(cm,val) ((cm)->CONHR = val)
+#define CSP_GPIO_GET_CONHR(cm)     ((cm)->CONHR)
+
+#define CSP_GPIO_SET_WODR(cm,val) ((cm)->WODR = val)
+#define CSP_GPIO_SET_SODR(cm,val) ((cm)->SODR = val)
+#define CSP_GPIO_SET_CODR(cm,val) ((cm)->CODR = val)
+#define CSP_GPIO_GET_PSDR(cm)     ((cm)->PSDR)
+
+#define CSP_GPIO_SET_PUDR(cm,val) ((cm)->PUDR = val)
+#define CSP_GPIO_GET_PUDR(cm)     ((cm)->PUDR)
+
+#define CSP_GPIO_SET_DSCR(cm,val) ((cm)->DSCR = val)
+#define CSP_GPIO_GET_DSCR(cm)     ((cm)->DSCR)
+
+#define CSP_GPIO_SET_OMCR(cm,val) ((cm)->OMCR = val)
+#define CSP_GPIO_GET_OMCR(cm)     ((cm)->OMCR)
+
+#define CSP_GPIO_SET_IECR(cm,val) ((cm)->IECR = val)
+#define CSP_GPIO_GET_IECR(cm)     ((cm)->IECR)
+
+#define CSP_GPIO_SET_IGRP(cm,val) ((cm)->IGRP = val)
+#define CSP_GPIO_GET_IGRP(cm)     ((cm)->IGRP)
+
+/******************************************************************************
+************************** Exported functions ************************
+******************************************************************************/
+extern void GPIOA0_DeInit(GPIO_Pin_TypeDef GPIO_Pin);
+extern void GPIO_DeInit(void);
+extern void GPIO_TTL_COSM_Selecte(CSP_GPIO_T *GPIOx,uint8_t bit,INPUT_MODE_SETECTED_TypeDef INPUT_MODE_SETECTED_X);
+extern void GPIO_Init2(CSP_GPIO_T *GPIOx,GPIO_byte_TypeDef byte,uint32_t val);
+extern void GPIO_InPutOutPut_Disable(CSP_GPIO_T *GPIOx,uint8_t PinNum);
+extern void GPIO_Init(CSP_GPIO_T *GPIOx,uint8_t PinNum,GPIO_Dir_TypeDef Dir);
+extern void GPIO_Write_Low(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_Write_High(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_MODE_Init(CSP_GPIO_T *GPIOx,GPIO_Mode_TypeDef IO_MODE,uint32_t val);
+extern uint8_t GPIO_Read_Status(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern uint8_t GPIO_Read_Output(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_Reverse(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_Set_Value(CSP_GPIO_T *GPIOx,uint8_t bitposi,uint8_t bitval);
+extern void GPIOA0_EXI_Init(GPIO_EXI_TypeDef EXI_IO);
+extern void GPIOB0_EXI_Init(GPIO_EXI_TypeDef EXI_IO);
+extern void GPIO_EXI_EN(CSP_GPIO_T *GPIOx,GPIO_EXI_TypeDef EXI_IO);
+extern void GPIO_Debug_IO_12_13(void);
+extern void GPIO_Debug_IO_01_02(void);
+extern void GPIO_IntGroup_Set(GPIO_Group_TypeDef IO_MODE , uint8_t PinNum , GPIO_EXIPIN_TypeDef EXIPIN_x);
+extern void GPIOA00_Set_ResetPin();
+extern void GPIO_PullHigh_Init(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_PullLow_Init(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_PullHighLow_DIS(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_OpenDrain_EN(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_OpenDrain_DIS(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_DriveStrength_EN(CSP_GPIO_T *GPIOx,uint8_t bit);
+extern void GPIO_DriveStrength_DIS(CSP_GPIO_T *GPIOx,uint8_t bit);
+/*************************************************************/
+
+#endif   /**< apt32f102_gpio_H */
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_gpt.h b/Source/include/apt32f102_gpt.h
new file mode 100644
index 0000000..ad6a874
--- /dev/null
+++ b/Source/include/apt32f102_gpt.h
@@ -0,0 +1,695 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_gpt.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_gpt_H
+#define _apt32f102_gpt_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define GPT_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------GPT  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  GPT CLK EN register
+  */
+typedef enum
+{
+    GPTCLK_DIS = 0,
+	GPTCLK_EN = 1,
+}GPT_CLK_TypeDef;
+/**
+  * @brief  GPT CLK SOURCE register
+  */
+typedef enum
+{
+    GPT_PCLK = (0<<3),
+	GPT_TRGUSR3 = (1<<3),
+}GPT_CSS_TypeDef;
+/**
+  * @brief  GPT START SHADOW register
+  */
+typedef enum
+{
+    GPT_SHADOW = (0<<6),
+	GPT_IMMEDIATE= (1<<6),
+}GPT_SHDWSTP_TypeDef;
+/**
+  * @brief  GPT COUNT EDGE register
+  */
+typedef enum
+{
+    DIR_INCREASE = (0<<3),
+	DIR_DECREASE= (1<<3),
+}GPT_CNTDIR_TypeDef;
+/**
+  * @brief  GPT COUNT EDGE register
+  */
+typedef enum
+{
+    GPT_INCREASE = (0<<0),
+	GPT_DECREASE= (1<<0),
+	GPT_IN_DECREASE= (2<<0),
+}GPT_CNTMD_TypeDef;
+/**
+  * @brief  GPT START SYN EN register
+  */
+typedef enum
+{
+    GPT_SWSYNDIS= (0<<2),
+	GPT_SWSYNEN= (1<<2),
+}GPT_SWSYN_TypeDef;
+/**
+  * @brief  GPT ILDE IO Status register
+  */
+typedef enum
+{
+    GPT_IDLE_Z= (0<<3),
+	GPT_IDLE_LOW= (1<<3),
+}GPT_IDLEST_TypeDef;
+/**
+  * @brief  GPT PRDLD register
+  */
+typedef enum
+{
+	GPT_PRDLD_PEND= (0<<4),	
+	GPT_PRDLD_LOAD_SYNC= (1<<4),	
+	GPT_PRDLD_ZERO_LOAD_SYNC= (2<<4),	
+	GPT_PRDLD_IMMEDIATELY= (3<<4),         
+}GPT_PRDLD0_TypeDef;
+/**
+  * @brief  GPT CAPLDEN register
+  */
+typedef enum
+{
+    GPT_CAP_DIS= (0<<8),
+	GPT_CAP_EN= (1<<8),
+}GPT_CAPLDEN_TypeDef;
+/**
+  * @brief  GPT BURST register
+  */
+typedef enum
+{
+    GPT_BURST_DIS= (0<<9),
+	GPT_BURST_EN= (1<<9),
+}GPT_BURST_TypeDef;
+/**
+  * @brief  GPT BURST register
+  */
+typedef enum
+{
+    GPT_CG_CHAX= (0<<11),
+	GPT_CG_CHBX= (1<<11),
+}GPT_CGSRC_TypeDef;
+/**
+  * @brief  GPT CGFLT register
+  */
+typedef enum
+{
+    GPT_CGFLT_00= (0<<13),
+	GPT_CGFLT_02= (1<<13),
+	GPT_CGFLT_03= (2<<13),
+	GPT_CGFLT_04= (3<<13),
+	GPT_CGFLT_06= (4<<13),
+	GPT_CGFLT_08= (5<<13),
+	GPT_CGFLT_16= (6<<13),
+	GPT_CGFLT_32= (7<<13),
+}GPT_CGFLT_TypeDef;
+/**
+  * @brief  GPT PSCLD register
+  */
+typedef enum
+{
+	GPT_PRDLD_ZERO= (0<<16),	
+	GPT_PRDLD_PRD= (1<<16),	
+	GPT_PRDLD_ZERO_PRD= (2<<16),	
+	GPT_PRDLD_NONE= (3<<16),         
+}GPT_PSCLD_TypeDef;
+/**
+  * @brief  GPT CAPMD register
+  */
+typedef enum
+{
+	GPT_CAPMD_CONTINUOUS= (0<<20),	
+	GPT_CAPMD_ONCE= (1<<20),	        
+}GPT_CAPMD_TypeDef;
+/**
+  * @brief  GPT LDARST register
+  */
+typedef enum
+{
+	GPT_LDARST_EN= (0<<23),	
+	GPT_LDARST_DIS= (1<<23),	        
+}GPT_LDARST_TypeDef;
+/**
+  * @brief  GPT LDBRST register
+  */
+typedef enum
+{
+	GPT_LDBRST_EN= (0<<24),	
+	GPT_LDBRST_DIS= (1<<24),	        
+}GPT_LDBRST_TypeDef;
+/**
+  * @brief  GPT OPM register
+  */
+typedef enum
+{
+	GPT_OPM_CONTINUOUS= (0<<6),	
+	GPT_OPM_ONCE= (1<<6),	        
+}GPT_OPM_TypeDef;
+/**
+  * @brief  GPT CKS register
+  */
+typedef enum
+{
+	GPT_CKS_PCLK= (0<<10),	
+	GPT_CKS_PCLKDIV2= (1<<10),	        
+}GPT_CKS_TypeDef;
+/**
+  * @brief  GPT WAVE register
+  */
+typedef enum
+{
+	GPT_CAPTURE_MODE= (0<<18),	
+	GPT_WAVE_MODE= (1<<18),	        
+}GPT_WAVE_TypeDef;
+/**
+  * @brief  GPT SYNCEN register
+  */
+typedef enum
+{
+	GPT_SYNCUSR0_EN= (1<<0),	
+	GPT_SYNCUSR1_EN= (1<<1),
+	GPT_SYNCUSR2_EN= (1<<2),
+	GPT_SYNCUSR3_EN= (1<<3),
+	GPT_SYNCUSR4_EN= (1<<4),    
+	GPT_SYNCUSR5_EN= (1<<5)   
+}GPT_SYNCENX_TypeDef;
+
+/**
+  * @brief  GPT OSTMDX register
+  */
+typedef enum
+{
+	GPT_OSTMD0_CONTINUOUS= (0<<8),	
+	GPT_OSTMD0_ONCE= (1<<8),	
+    GPT_OSTMD1_CONTINUOUS= (0<<9),	
+	GPT_OSTMD1_ONCE= (1<<9),	 
+    GPT_OSTMD2_CONTINUOUS= (0<<10),	
+	GPT_OSTMD2_ONCE= (1<<10),	 
+    GPT_OSTMD3_CONTINUOUS= (0<<11),	
+	GPT_OSTMD3_ONCE= (1<<11),	 
+    GPT_OSTMD4_CONTINUOUS= (0<<12),	
+	GPT_OSTMD4_ONCE= (1<<12),	 
+    GPT_OSTMD5_CONTINUOUS= (0<<13),	
+	GPT_OSTMD5_ONCE= (1<<13),	         
+}GPT_OSTMDX_TypeDef;
+/**
+  * @brief  GPT TXREARM0 register
+  */
+typedef enum
+{
+	GPT_TXREARM_DIS= (0<<22),	
+	GPT_TXREARM_T1= (1<<22),	
+	GPT_TXREARM_T2= (2<<22),   
+	GPT_TXREARM_T1_T2= (3<<22),  
+}GPT_TXREARM0_TypeDef;
+
+/**
+  * @brief  GPT TRGO0SEL register
+  */
+typedef enum
+{
+	GPT_TRGO0SEL_SR0= (0<<24),	
+	GPT_TRGO0SEL_SR1= (1<<24),	
+	GPT_TRGO0SEL_SR2= (2<<24),   
+	GPT_TRGO0SEL_SR3= (3<<24), 
+	GPT_TRGO0SEL_SR4= (4<<24),   
+	GPT_TRGO0SEL_SR5= (5<<24), 
+	GPT_TRGO0SEL_RSVD= (6<<24), 
+}GPT_TRGO0SEL_TypeDef;
+
+/**
+  * @brief  GPT TRGO0SEL register
+  */
+typedef enum
+{
+	GPT_TRG10SEL_SR0= (0<<27),	
+	GPT_TRG10SEL_SR1= (1<<27),	
+	GPT_TRG10SEL_SR2= (2<<27),   
+	GPT_TRG10SEL_SR3= (3<<27), 
+	GPT_TRG10SEL_SR4= (4<<27),   
+	GPT_TRG10SEL_SR5= (5<<27), 
+	GPT_TRG10SEL_RSVD= (6<<27), 
+}GPT_TRGO1SEL_TypeDef;
+/**
+  * @brief  GPT AREARM register
+  */
+typedef enum
+{
+	GPT_AREARM_DIS= (0<<30),	
+	GPT_AREARM_ZERO= (1<<30),		
+	GPT_AREARM_PRD= (2<<30),	   
+	GPT_AREARM_ZERO_PRD= (3<<30),	
+}GPT_AREARM_TypeDef;
+/**
+  * @brief  BT INT MASK SET/CLR  Set
+  */
+typedef enum
+{
+	GPT_TRGEV0    	=	(0x01 << 0), 
+	GPT_TRGEV1    	=	(0x01 << 1),     
+	GPT_TRGEV2     	=	(0x01 << 2),  
+	GPT_TRGEV3     =	(0x01 << 3), 
+}GPT_IMSCR_TypeDef;  
+/**
+  * @brief  GPT IO  Set
+  */
+typedef enum
+{
+	GPT_CHA_PB01    =	0,  
+	GPT_CHA_PA09   	=	1,      
+	GPT_CHA_PA010   =	2, 
+	GPT_CHB_PA010	=	3,  
+	GPT_CHB_PA011   =	4,      
+	GPT_CHB_PB00    =	5,
+	GPT_CHB_PB01    =	6,
+}GPT_IOSET_TypeDef; 
+/**
+  * @brief  CMPA SHADOW/IMMEDIATE
+  */
+typedef enum
+{
+	GPT_CMPA_SHADOW    	=	(0x00 << 0), 
+	GPT_CMPA_IMMEDIATE    =	(0x01 << 0),     
+}GPT_SHDWCMPA_TypeDef;  
+/**
+  * @brief  CMPB SHADOW/IMMEDIATE
+  */
+typedef enum
+{
+	GPT_CMPB_SHADOW    	=	(0x00 << 1), 
+	GPT_CMPB_IMMEDIATE    =	(0x01 << 1),     
+}GPT_SHDWCMPB_TypeDef; 
+/**
+  * @brief  CMPA LOAD MODE
+  */
+typedef enum
+{
+	GPT_LoadA_ZERO   	=	(0x01 << 4), 
+	GPT_LoadA_PRD    	=	(0x02 << 4),    
+	GPT_LoadA_EXT_SYNC  =	(0x04 << 4),  
+	GPT_LoadA_NONE		=	(0x00 << 4),
+}GPT_LDAMD_TypeDef;  
+/**
+  * @brief  CMPB LOAD MODE
+  */
+typedef enum
+{
+	GPT_LoadB_ZERO   	=	(0x01 << 4), 
+	GPT_LoadB_PRD    	=	(0x02 << 4),    
+	GPT_LoadB_EXT_SYNC  =	(0x04 << 4),  
+	GPT_LoadB_NONE		=	(0x00 << 4),
+}GPT_LDBMD_TypeDef;  
+
+/**
+  * @brief  WAVEA SHADOW/IMMEDIATE
+  */
+typedef enum
+{
+	GPT_WAVEA_SHADOW    	=	(0x00 << 0), 
+	GPT_WAVEA_IMMEDIATE    =	(0x01 << 0),     
+}GPT_SHDWAQA_TypeDef;  
+/**
+  * @brief  WAVEB SHADOW/IMMEDIATE
+  */
+typedef enum
+{
+	GPT_WAVEB_SHADOW    	=	(0x00 << 1), 
+	GPT_WAVEB_IMMEDIATE    =	(0x01 << 1),     
+}GPT_SHDWAQB_TypeDef; 
+/**
+  * @brief  ACTIVE A LOAD MODE
+  */
+typedef enum
+{
+	GPT_AQLDA_ZERO   	=	(0x01 << 2), 
+	GPT_AQLDA_PRD    	=	(0x02 << 2),    
+	GPT_AQLDA_EXT_SYNC  =	(0x04 << 2),  
+	GPT_AQLDA_NONE		=	(0x00 << 2),
+}GPT_AQLDA_TypeDef;  
+/**
+  * @brief  ACTIVE B LOAD MODE
+  */
+typedef enum
+{
+	GPT_AQLDB_ZERO   	=	(0x01 << 5), 
+	GPT_AQLDB_PRD    	=	(0x02 << 5),    
+	GPT_AQLDB_EXT_SYNC  =	(0x04 << 5),  
+	GPT_AQLDB_NONE		=	(0x00 << 5),
+}GPT_AQLDB_TypeDef; 
+/**
+  * @brief CASEL MODE
+  */
+typedef enum
+{
+	GPT_CASEL_CMPA   	=	(0x00 << 20), 
+	GPT_CASEL_CMPB  	=	(0x01 << 20), 
+}GPT_CASEL_TypeDef; 
+/**
+  * @brief CBSEL MODE
+  */
+typedef enum
+{
+	GPT_CBSEL_CMPA    	=	(0x00 << 22), 
+	GPT_CBSEL_CMPB     	=	(0x01 << 22), 
+}GPT_CBSEL_TypeDef; 
+/**
+  * @brief CBSEL MODE
+  */
+typedef enum
+{
+	GPT_CHA    	=	0, 
+	GPT_CHB     =	1, 
+}GPT_GPTCHX_TypeDef; 
+/**
+  * @brief A FORCE ENABLE
+  */
+typedef enum
+{
+	GPT_CHA_FORCE_DIS    =	0, 
+	GPT_CHA_FORCE_EN     =	1, 
+}GPT_CHAFORCE_TypeDef; 
+/**
+  * @brief B FORCE ENABLE
+  */
+typedef enum
+{
+	GPT_CHB_FORCE_DIS    =	0<<4, 
+	GPT_CHB_FORCE_EN     =	1<<4, 
+}GPT_CHBFORCE_TypeDef; 
+/**
+  * @brief FORCE LOAD
+  */
+typedef enum
+{
+	GPT_FORCELD_ZERO    =	(0<<16), 
+	GPT_FORCELD_PRD    =	(1<<16), 
+	GPT_FORCELD__ZERO_PRD    =	(3<<16), 
+}GPT_FORCELD_TypeDef; 
+/**
+  * @brief FORCE A
+  */
+typedef enum
+{
+	GPT_FORCECHA_LOW    =	(1<<0), 
+	GPT_FORCECHA_HIGH    =	(2<<0), 
+}GPT_FORCEA_TypeDef;
+/**
+  * @brief FORCE B
+  */
+typedef enum
+{
+	GPT_FORCECHB_LOW    =	(1<<2), 
+	GPT_FORCECHB_HIGH    =	(2<<2), 
+}GPT_FORCEB_TypeDef;
+/**
+  * @brief  GPT SRCSEL register
+  */
+typedef enum
+{
+    GPT_SRCSEL_DIS= (0<<0),  	       
+	GPT_SRCSEL_TRGUSR0EN= (1<<0),	
+	GPT_SRCSEL_TRGUSR1EN= (2<<0),	
+	GPT_SRCSEL_TRGUSR2EN= (3<<0),	
+	GPT_SRCSEL_TRGUSR3EN= (4<<0),	
+	GPT_SRCSEL_TRGUSR4EN= (5<<0),
+	GPT_SRCSEL_TRGUSR5EN= (6<<0)	
+}GPT_SRCSEL_TypeDef;
+/**
+  * @brief  GPT BLKINV register
+  */
+typedef enum
+{
+    GPT_BLKINV_DIS= (0<<4),  	       
+	GPT_BLKINV_EN= (1<<4),	
+}GPT_BLKINV_TypeDef;
+/**
+  * @brief  GPT CROSSMD register
+  */
+typedef enum
+{
+    GPT_ALIGNMD_PRD= (0<<5),  	       
+	GPT_ALIGNMD_ZRO= (1<<5),
+	GPT_ALIGNMD_PRD_ZRO= (2<<5),
+	GPT_ALIGNMD_T1= (3<<5),
+}GPT_ALIGNMD_TypeDef;
+/**
+  * @brief  GPT CROSSMD register
+  */
+typedef enum
+{
+    GPT_CROSSMD_DIS= (0<<7),  	       
+	GPT_CROSSMD_EN= (1<<7),	
+}GPT_CROSSMD_TypeDef;
+/**
+  * @brief  GPT TRGSRC0 register
+  */
+typedef enum
+{
+    GPT_TRGSRC0_DIS= (0<<0),  	       
+	GPT_TRGSRC0_ZRO= (1<<0),
+	GPT_TRGSRC0_PRD= (2<<0),
+	GPT_TRGSRC0_ZRO_PRD= (3<<0),
+	GPT_TRGSRC0_CMPA_INC= (4<<0),
+	GPT_TRGSRC0_CMPA_DEC= (5<<0),
+	GPT_TRGSRC0_CMPB_INC= (6<<0),
+	GPT_TRGSRC0_CMPB_DEC= (7<<0),
+	GPT_TRGSRC0_EXTSYNC= (0X0C<<0),
+	GPT_TRGSRC0_PE0= (0X0D<<0),
+	GPT_TRGSRC0_PE1= (0X0E<<0),
+	GPT_TRGSRC0_PE2= (0X0F<<0),
+}GPT_TRGSRC0_TypeDef;
+/**
+  * @brief  GPT TRGSRC1 register
+  */
+typedef enum
+{
+    GPT_TRGSRC1_DIS= (0<<4),  	       
+	GPT_TRGSRC1_ZRO= (1<<4),
+	GPT_TRGSRC1_PRD= (2<<4),
+	GPT_TRGSRC1_ZRO_PRD= (3<<4),
+	GPT_TRGSRC1_CMPA_INC= (4<<4),
+	GPT_TRGSRC1_CMPA_DEC= (5<<4),
+	GPT_TRGSRC1_CMPB_INC= (6<<4),
+	GPT_TRGSRC1_CMPB_DEC= (7<<4),
+	GPT_TRGSRC1_EXTSYNC= (0X0C<<4),
+	GPT_TRGSRC1_PE0= (0X0D<<4),
+	GPT_TRGSRC1_PE1= (0X0E<<4),
+	GPT_TRGSRC1_PE2= (0X0F<<4),
+}GPT_TRGSRC1_TypeDef;
+
+/**
+  * @brief  GPT CNT0INITEN register
+  */
+typedef enum
+{
+    GPT_CNT0INIT_DIS= (0<<16),  	       
+	GPT_CNT0INIT_EN= (1<<16),	
+}GPT_CNT0INIT_TypeDef;
+
+/**
+  * @brief  GPT CNT1INITEN register
+  */
+typedef enum
+{
+    GPT_CNT1INIT_DIS= (0<<17),  	       
+	GPT_CNT1INIT_EN= (1<<17),	
+}GPT_CNT1INIT_TypeDef;
+
+/**
+  * @brief  GPT ESYN0OE register
+  */
+typedef enum
+{
+    GPT_ESYN0OE_DIS= (0<<20),  	       
+	GPT_ESYN0OE_EN= (1<<20),	
+}GPT_ESYN0OE_TypeDef;
+
+/**
+  * @brief  GPT ESYN1OE register
+  */
+typedef enum
+{
+    GPT_ESYN1OE_DIS= (0<<21),  	       
+	GPT_ESYN1OE_EN= (1<<21),	
+}GPT_ESYN1OE_TypeDef;
+
+
+/**
+  * @brief  GPT CNTMD selected
+  */
+typedef enum		
+{
+	GPT_CNTMD_increase 				=  ((CSP_REGISTER_T)(0x00ul << 0)),
+	GPT_CNTMD_decrease  			=  ((CSP_REGISTER_T)(0x01ul << 0)),
+	GPT_CNTMD_increaseTOdecrease	=  ((CSP_REGISTER_T)(0x02ul << 0))
+}GPT_CNTMD_SELECTE_Type;	
+
+/**
+  * @brief  GPT CAPMD selected
+  */
+typedef enum		
+{
+	GPT_CAPMD_Once 					=  ((CSP_REGISTER_T)(0x01ul << 20)),
+	GPT_CAPMD_Continue  			=  ((CSP_REGISTER_T)(0x00ul << 20))
+}GPT_CAPMD_SELECTE_Type;
+
+/**
+  * @brief  GPT CMPC RST CMD
+  */
+typedef enum		
+{
+	GPT_LDCRST_EN 					=  ((CSP_REGISTER_T)(0x00ul << 25)),
+	GPT_LDCRST_DIS  				=  ((CSP_REGISTER_T)(0x01ul << 25))
+}GPT_LOAD_CMPC_RST_CMD_Type;	
+/**
+  * @brief  GPT CMPD RST CMD
+  */
+typedef enum		
+{
+	GPT_LDDRST_EN 					=  ((CSP_REGISTER_T)(0x00ul << 26)),
+	GPT_LDDRST_DIS  				=  ((CSP_REGISTER_T)(0x01ul << 26))
+}GPT_LOAD_CMPD_RST_CMD_Type;			
+
+#define CH_ZRO_NONE	(0X00)
+#define CH_ZRO_LOW	(0X01)
+#define CH_ZRO_HIGH	(0X02)
+#define CH_ZRO_REVS	(0X03)
+#define CH_PRD_NONE	(0X00)
+#define CH_PRD_LOW	(0X01)
+#define CH_PRD_HIGH	(0X02)
+#define CH_PRD_REVS	(0X03)
+#define CH_CAU_NONE	(0X00)
+#define CH_CAU_LOW	(0X01)
+#define CH_CAU_HIGH	(0X02)
+#define CH_CAU_REVS	(0X03)
+#define CH_CAD_NONE	(0X00)
+#define CH_CAD_LOW	(0X01)
+#define CH_CAD_HIGH	(0X02)
+#define CH_CAD_REVS	(0X03)
+#define CH_CBU_NONE	(0X00)
+#define CH_CBU_LOW	(0X01)
+#define CH_CBU_HIGH	(0X02)
+#define CH_CBU_REVS	(0X03)
+#define CH_CBD_NONE	(0X00)
+#define CH_CBD_LOW	(0X01)
+#define CH_CBD_HIGH	(0X02)
+#define CH_CBD_REVS	(0X03)
+#define CH_T1U_NONE	(0X00)
+#define CH_T1U_LOW	(0X01)
+#define CH_T1U_HIGH	(0X02)
+#define CH_T1U_REVS	(0X03)
+#define CH_T1D_NONE	(0X00)
+#define CH_T1D_LOW	(0X01)
+#define CH_T1D_HIGH	(0X02)
+#define CH_T1D_REVS	(0X03)
+#define CH_T2U_NONE	(0X00)
+#define CH_T2U_LOW	(0X01)
+#define CH_T2U_HIGH	(0X02)
+#define CH_T2U_REVS	(0X03)
+#define CH_T2D_NONE	(0X00)
+#define CH_T2D_LOW	(0X01)
+#define CH_T2D_HIGH	(0X02)
+#define CH_T2D_REVS	(0X03)
+
+
+#define FORCE_ACT_NONE 0
+#define FORCE_ACT_LOW 1
+#define FORCE_ACT_HIGH 2
+#define FORCE_ACT_REVS 3
+
+
+#define GPT_INT_TRGEV0 	(0X01)
+#define GPT_INT_TRGEV1 	(0X01<<1)
+#define GPT_INT_TRGEV2 	(0X01<<2)
+#define GPT_INT_TRGEV3 	(0X01<<3)
+#define GPT_INT_CAPLD0 	(0X01<<4)
+#define GPT_INT_CAPLD1 	(0X01<<5)
+#define GPT_INT_CAPLD2 	(0X01<<6)
+#define GPT_INT_CAPLD3 	(0X01<<7)
+#define GPT_INT_CAU 	(0X01<<8)
+#define GPT_INT_CAD 	(0X01<<9)
+#define GPT_INT_CBU 	(0X01<<10)
+#define GPT_INT_CBD 	(0X01<<11)
+#define GPT_INT_PEND 	(0X01<<16)
+
+
+
+#define GPT_SYNCUSR0 (0X01)
+#define GPT_SYNCUSR1 (0X01<<1)
+#define GPT_SYNCUSR2 (0X01<<2)
+#define GPT_SYNCUSR3 (0X01<<3)
+#define GPT_SYNCUSR4 (0X01<<4)
+#define GPT_SYNCUSR5 (0X01<<5)
+#define GPT_DEBUG_MODE (0x01<<1)
+
+
+
+extern void GPT_DeInit(void);
+extern void GPT_IO_Init(GPT_IOSET_TypeDef IONAME);
+extern void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX);
+extern void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
+						GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX);
+extern void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX);
+extern void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
+						U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX);
+extern void GPT_OneceForce_Out(GPT_CHAFORCE_TypeDef CHAFORCEX,U8_T AFORCE_STATUS,GPT_CHBFORCE_TypeDef CHBFORCEX,U8_T BFORCE_STATUS,GPT_FORCELD_TypeDef FORCELDX);
+extern void GPT_Force_Out(GPT_FORCEA_TypeDef FORCEAX,GPT_FORCEB_TypeDef FORCEBX);
+extern void GPT_CmpLoad_Configure(GPT_SHDWCMPA_TypeDef SHDWCMPAX,GPT_SHDWCMPB_TypeDef SHDWCMPBX,GPT_LDAMD_TypeDef LDAMDX,GPT_LDBMD_TypeDef LDBMDX);
+extern void GPT_Debug_Mode(FunctionalStatus NewState);
+extern void GPT_Start(void);
+extern void GPT_Stop(void);
+extern void GPT_Soft_Reset(void);
+extern void GPT_Cap_Rearm(void);
+extern void GPT_REARM_Write(void);
+extern U8_T GPT_REARM_Read(void);
+extern void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA);
+extern U16_T GPT_PRDR_Read(void);
+extern U16_T GPT_CMPA_Read(void);
+extern U16_T GPT_CMPB_Read(void);
+extern U16_T GPT_CNT_Read(void);
+extern void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X);
+extern void GPT_INT_ENABLE(void);
+extern void GPT_INT_DISABLE(void);
+extern void GPT_SyncSet_Configure(GPT_SYNCENX_TypeDef SYNCENx,GPT_OSTMDX_TypeDef OSTMDx,GPT_TXREARM0_TypeDef TXREARM0x,GPT_TRGO0SEL_TypeDef TRGO0SELx,
+							GPT_TRGO1SEL_TypeDef TRGO1SELx,GPT_AREARM_TypeDef AREARMx);
+extern void GPT_Trigger_Configure(GPT_SRCSEL_TypeDef SRCSELx,GPT_BLKINV_TypeDef BLKINVx,GPT_ALIGNMD_TypeDef ALIGNMDx,GPT_CROSSMD_TypeDef CROSSMDx,
+						U16_T G_OFFSET_DATA,U16_T G_WINDOW_DATA);
+extern void GPT_EVTRG_Configure(GPT_TRGSRC0_TypeDef TRGSRC0x,GPT_TRGSRC1_TypeDef TRGSRC1x,GPT_ESYN0OE_TypeDef ESYN0OEx,GPT_ESYN1OE_TypeDef ESYN1OEx,
+						GPT_CNT0INIT_TypeDef CNT0INITx,GPT_CNT1INIT_TypeDef CNT1INITx,U8_T TRGEV0prd,U8_T TRGEV1prd,U8_T TRGEV0cnt,U8_T TRGEV1cnt);
+extern void GPT_Capture_Config(GPT_CNTMD_SELECTE_Type GPT_CNTMD_SELECTE_X  , GPT_CAPMD_SELECTE_Type GPT_CAPMD_SELECTE_X , GPT_CAPLDEN_TypeDef CAP_CMD 
+					, GPT_LDARST_TypeDef GPT_LOAD_CMPA_RST_CMD , GPT_LDBRST_TypeDef GPT_LOAD_CMPB_RST_CMD , 
+					GPT_LOAD_CMPC_RST_CMD_Type GPT_LOAD_CMPC_RST_CMD , GPT_LOAD_CMPD_RST_CMD_Type GPT_LOAD_CMPD_RST_CMD, U8_T GPT_STOP_WRAP );
+/*************************************************************/
+
+#endif   /**< apt32f102_gpt_H */
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_hwdiv.h b/Source/include/apt32f102_hwdiv.h
new file mode 100644
index 0000000..821f6d9
--- /dev/null
+++ b/Source/include/apt32f102_hwdiv.h
@@ -0,0 +1,51 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_hwdiv.h
+  * @author  APT AE Team
+  * @version V1.02
+  * @date    2019/04/05
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_hwdiv_H
+#define _apt32f102_hwdiv_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define HWDIV_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------HWDIV  value enum define--------------------------
+//--------------------------------------------------------------------------------
+#define HWDIV_UNSIGN_BIT (0X01<<0)
+
+extern U32_T HWDIV_Calc_Remain(void);
+extern U32_T HWDIV_Calc_Quotient(void);
+extern void HWDIV_Calc_UNSIGN(U32_T DIVIDENDx,U32_T DIVISOR_x);
+extern void HWDIV_UNSIGN_CMD(FunctionalStatus NewState);
+extern void HWDIV_DeInit(void);
+extern void HWDIV_Calc_SIGN(long DIVIDENDx,long DIVISOR_x);
+extern void HWDIV_Calc_float(float DIVIDENDx,float DIVISOR_x);
+
+
+
+
+
+
+
+
+
+
+#endif   /**< apt32f102_hwdiv_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_i2c.h b/Source/include/apt32f102_i2c.h
new file mode 100644
index 0000000..474e5a1
--- /dev/null
+++ b/Source/include/apt32f102_i2c.h
@@ -0,0 +1,250 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_i2c.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_i2c_H
+#define _apt32f102_i2c_H
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "apt32f102.h"
+
+#define BUFSIZE             32
+
+
+/******************************************************************************
+************************** I2C Structure Definition ***************************
+******************************************************************************/
+
+
+/**
+*******************************************************************************
+@brief description CSP_I2C_T and CSP_I2C_PTR
+*******************************************************************************
+*/
+
+
+/******************************************************************************
+************************** I2C Registers Definition ***************************
+******************************************************************************/
+
+
+/******************************************************************************
+* CR : I2C Control Register 
+******************************************************************************/
+ #define I2C_MASTER_EN      (0x01ul << 0)   /**< I2C Master Mode             */
+ #define I2C_MASTER_DIS     (0x00ul << 0)   /**< I2C Master Mode             */
+ #define I2C_SS             (0x01ul << 1)   /**< I2C Standard Speed Mode     */ 
+ #define I2C_FS             (0x02ul << 1)   /**< I2C Fast Speed Mode         */ 
+ #define I2C_HS             (0x03ul << 1)   /**< I2C High Speed Mode         */ 
+ #define I2C_10BIT_SLAVE    (0x01ul << 3)   /**< I2C 10bit or 7bit in Slave  */
+ #define I2C_7BIT_SLAVE     (0x00ul << 3)   /**< I2C 10bit or 7bit in Slave  */
+ #define I2C_10BIT_MASTER   (0x01ul << 4)   /**< I2C 10bit or 7bit in Master */
+ #define I2C_7BIT_MASTER    (0x00ul << 4)   /**< I2C 10bit or 7bit in Master */            
+ #define I2C_RESTART_EN     (0x01ul << 5)   /**< I2C Restart Enable          */
+ #define I2C_RESTART_DIS    (0x00ul << 5)   /**< I2C Restart Disable         */
+ #define I2C_SLAVE_EN       (0x00ul << 6)   /**< I2C Slave Enable            */
+ #define I2C_SLAVE_DIS      (0x01ul << 6)   /**< I2C Slave Disable           */
+ #define I2C_STOPDET_IFADD  (0x01ul << 7)   /**< I2C STOPDET If Addressed    */
+ #define I2C_STOPDET_ALS    (0x00ul << 7)   /**< I2C STOPDET Always          */
+ #define I2C_TX_EMPTY_CTRL  (0x01ul << 8)   /**< I2C TX_EMPTY Control        */
+ #define I2C_TX_EMPTY_DONE  (0x00ul << 8)   /**< I2C TX_EMPTY and Send Done  */
+ #define I2C_RX_HOLD_CTRL   (0x01ul << 9)   /**< I2C Rx Hold Ctrl @FIFO Full */
+ #define I2C_RX_HOLD_NONE   (0x00ul << 9)   /**< I2C Rx Hold None @FIFO Full */
+ #define I2C_STOPDET_MM     (0x01ul <<10)   /**< I2C STOPDET only in Master  */
+ #define I2C_BUSCLR_EN      (0x01ul <<11)   /**< I2C Enable Bus Clear Feature*/
+ #define I2C_BUSCLR_DIS     (0x00ul <<11)   /**< I2C Disable Bus Clear Feature*/
+
+
+/******************************************************************************
+* DATA_CMD : I2C Data and Command Register 
+******************************************************************************/
+ #define I2C_CMD_READ       (0x01ul << 8)   /**< I2C Read Command            */
+ #define I2C_CMD_WRITE      (0x00ul << 8)   /**< I2C Write Command           */
+ #define I2C_CMD_STOP       (0x01ul << 9)   /**< I2C Stop after this byte    */
+ #define I2C_CMD_NONESTOP   (0x00ul << 9)   /**< I2C None Stop When FIFO Empty or Not    */
+ #define I2C_CMD_RESTART0    (0x00ul <<10)   /**< I2C Restart Mode0          */
+ #define I2C_CMD_RESTART1    (0x01ul <<10)   /**< I2C Restart Mode1          */
+ //#define I2C_CMD_1stDATA    (0x01ul <<11)   /**< I2C First Data Byte       */
+ #define I2C_DATA(val)      (((val) & 0xFFul) << 0)  /**< Data Writing Macro */
+
+/*****************************************************************************
+* ENABLE : I2C Enable Register
+******************************************************************************/                     
+ #define I2C_ENABLE         (0x01ul << 0)   /**< I2C Enable                  */
+ #define I2C_DISABLE        (0x00ul << 0)   /**< I2C Enable                  */
+ #define I2C_ABORT          (0x01ul << 1)   /**< I2C Abort Transfer          */
+ #define I2C_ABORT_OV       (0x00ul << 1)   /**< I2C Abort Transfer Over or No Abort          */
+ //#define I2C_TX_CMD_BLOCK   (0x01ul << 2)   /**< I2C Block Transmission      */
+ #define I2C_SDA_REC_EN     (0x01ul << 3)   /**< I2C Enable Stuck Recovery   */
+ #define I2C_SDA_REC_DIS    (0x00ul << 3)   /**< I2C Enable Stuck Recovery   */
+
+/*****************************************************************************
+* STATUS : I2C STATUS Register
+******************************************************************************/                     
+ #define I2C_BUSY           (0x01ul << 0)   /**< I2C Activity                */
+ #define I2C_FREE           (0x00ul << 0)   /**< I2C Activity                */
+ #define I2C_TFNF           (0x01ul << 1)   /**< I2C Transmit FIFO Not Full  */
+ #define I2C_TFNF_FULL      (0x00ul << 1)   /**< I2C Transmit FIFO Is Full   */
+ #define I2C_TFE            (0x01ul << 2)   /**< I2C Transmit FIFO Empty     */
+ #define I2C_TFE_NOT        (0x00ul << 2)   /**< I2C Transmit FIFO Not Empty     */
+ #define I2C_RFNE           (0x01ul << 3)   /**< I2C Receive FIFO Not Empty  */
+ #define I2C_RFNE_EMPTY     (0x00ul << 3)   /**< I2C Receive FIFO Is Empty  */
+ #define I2C_RFF            (0x01ul << 4)   /**< I2C Receive FIFO Full       */
+ #define I2C_MST_BUSY       (0x01ul << 5)   /**< I2C Master FSM Activity     */
+ #define I2C_MST_FREE       (0x00ul << 5)   /**< I2C Master FSM Free     */
+ #define I2C_SLV_BUSY       (0x01ul << 6)   /**< I2C Slave  FSM Activity     */
+ #define I2C_SLV_FREE       (0x01ul << 6)   /**< I2C Slave  FSM Free     */
+ #define I2C_REC_FREE       (0x00ul << 6)   /**< I2C Recovery No FAIL    */
+ #define I2C_REC_FAIL       (0x01ul << 11)   /**< I2C Recovery FAIL    */
+ 
+/*****************************************************************************
+* RISR/MISR/IMSCR/ICR : I2C Interrupt Mask/Status Register
+******************************************************************************/                     
+ #define I2C_RX_UNDER       (0x01ul << 0)   /**< I2C Interrupt Status        */
+ #define I2C_RX_OVER        (0x01ul << 1)   /**< I2C Interrupt Status        */
+ #define I2C_RX_FULL        (0x01ul << 2)   /**< I2C Interrupt Status        */
+ #define I2C_TX_OVER        (0x01ul << 3)   /**< I2C Interrupt Status        */
+ #define I2C_TX_EMPTY       (0x01ul << 4)   /**< I2C Interrupt Status        */
+ #define I2C_RD_REQ         (0x01ul << 5)   /**< I2C Interrupt Status        */
+ #define I2C_TX_ABRT        (0x01ul << 6)   /**< I2C Interrupt Status        */
+ #define I2C_RX_DONE        (0x01ul << 7)   /**< I2C Interrupt Status        */
+ #define I2C_INT_BUSY       (0x01ul << 8)   /**< I2C Interrupt Status        */
+ #define I2C_STOP_DET       (0x01ul << 9)   /**< I2C Interrupt Status        */
+ #define I2C_START_DET      (0x01ul <<10)   /**< I2C Interrupt Status        */
+ #define I2C_GEN_CALL       (0x01ul <<11)   /**< I2C Interrupt Status        */
+ #define I2C_RESTART_DET    (0x01ul <<12)   /**< I2C Interrupt Status        */
+ #define I2C_MST_ON_HOLD    (0x01ul <<13)   /**< I2C Interrupt Status        */
+ #define I2C_SCL_SLOW       (0x01ul <<14)   /**< I2C Interrupt Status        */
+
+ 
+/*****************************************************************************
+* SDA_HOLD/SETUP : I2C SDA hold/setup Timing Register
+******************************************************************************/                     
+ #define I2C_TX_HOLD(val)   (((val) & 0xFFul) << 0)   /**< SDA TX Hold Delay */
+ #define I2C_RX_HOLD(val)   (((val) & 0xFFul) <<16)   /**< SDA RX Hold Delay */
+ #define I2C_SETUP(val)     (((val) & 0xFFul) << 0)   /**< SDA Setup Delay   */
+ 
+/*****************************************************************************
+* I2C_SPKLEN : I2C Burr Interference Filter Control Register
+******************************************************************************/                     
+ #define I2C_SPKLEN(val)     (((val) & 0xFFul) << 0)   /**<I2C Burr interference filter control register   */
+ 
+/*****************************************************************************
+* SCL/SDA TOUT : I2C SCL/SDA Stuck Time Out
+******************************************************************************/                     
+ #define I2C_SCL_TOUT(val)   (((val) & 0xFFFFFFFFul) << 0)   /**<I2C SCL Stuck Time Out   */
+ #define I2C_SDA_TOUT(val)   (((val) & 0xFFFFFFFFul) << 0)   /**<I2C SDA Stuck Time Out   */
+
+/*****************************************************************************
+* GCALL : I2C General Call Register
+******************************************************************************/                     
+ #define I2C_GCALL_EN          (0x01ul << 0)   /**< I2C uses ACK to answer General Call     */
+ #define I2C_GCALL_DIS         (0x00ul << 0)   /**< I2C does not generate a General Call interrupt     */
+
+/*****************************************************************************
+* NACK : I2C Slave NACK Control Register
+******************************************************************************/                     
+ #define I2C_NACK_DATA          (0x01ul << 0)   /**< I2C Generate a NACK after the data byte is received     */
+ #define I2C_NACK_NORMAL       (0x00ul << 0)   /**< I2C Generate NACK/ACK as normal  */ 
+
+
+/**
+  * @brief  I2C IO selection
+  */
+typedef enum
+{
+    I2C_SDA_PA00= 0,
+	I2C_SDA_PA03 = 1,
+	I2C_SDA_PA07= 2,
+    I2C_SDA_PA013= 3,
+    I2C_SDA_PA014 = 4,
+}I2C_SDA_TypeDef;
+
+/**
+  * @brief  I2C IO selection
+  */
+typedef enum
+{
+    I2C_SCL_PB00 = 0,
+	I2C_SCL_PB02 = 1,
+    I2C_SCL_PA01 = 2,
+    I2C_SCL_PA04 = 3,
+	I2C_SCL_PA06 = 4,
+	I2C_SCL_PA015 = 5,
+}I2C_SCL_TypeDef;
+
+/**
+  * @brief  I2C MODE
+  */
+typedef enum
+{
+	STANDARD_MODE = (0x01ul << 1),
+    FAST_MODE=(0x02ul << 1),
+}I2C_SPEEDMODE_TypeDef;
+
+/**
+  * @brief I2C SLAVE BIT
+  */
+typedef enum
+{
+	I2C_SLAVE_7BIT= (0x00ul << 3),
+    I2C_SLAVE_10BIT=(0x01ul << 3),
+}I2C_SLAVEBITS_TypeDef;
+
+/**
+  * @brief  I2C MASTER BITS
+  */
+typedef enum
+{
+	I2C_MASTRER_7BIT= (0x00ul << 4),
+    I2C_MASTRER_10BIT=(0x01ul << 4),
+}I2C_MASTRERBITS_TypeDef;
+
+/******************************************************************************
+********************* I2C External Functions Declaration **********************
+******************************************************************************/
+extern void I2C_Master_CONFIG(I2C_SDA_TypeDef I2C_SDA_IO,I2C_SCL_TypeDef I2C_SCL_IO,I2C_SPEEDMODE_TypeDef SPEEDMODE,
+								I2C_MASTRERBITS_TypeDef MASTERBITS,U16_T I2C_MASTER_ADD,U16_T SS_SCLH,U16_T SS_SCLL);
+extern void I2C_Slave_CONFIG(I2C_SDA_TypeDef I2C_SDA_IO,I2C_SCL_TypeDef I2C_SCL_IO,I2C_SPEEDMODE_TypeDef SPEEDMODE,
+						I2C_SLAVEBITS_TypeDef SLAVEBITS,U16_T I2C_SALVE_ADDS,U16_T SS_SCLHX,U16_T SS_SCLLX);
+extern void I2C_SDA_TSETUP_THOLD_CONFIG(U8_T SDA_TSETUP , U8_T SDA_RX_THOLD , U16_T SDA_TX_THOLD);						 
+extern void I2C_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T INT_TYPE);
+extern void I2C_FIFO_TriggerData(U16_T RX_FLSEL,U16_T TX_FLSEL);
+extern void I2C_Stop(void);
+extern void I2C_Enable(void);
+extern void I2C_Disable(void);
+extern void I2C_Abort_EN(void);
+extern U8_T I2C_Abort_Status(void);
+extern void I2C_SDA_Recover_EN(void);
+extern void I2C_SDA_Recover_DIS(void);
+extern void I2C_Int_Enable(void);
+extern void I2C_Int_Disable(void);
+extern void I2C_WRITE_Byte(U8_T write_adds,U8_T i2c_data);
+extern void I2C_WRITE_nByte(U8_T write_adds,volatile U8_T *i2c_data,U8_T NumByteToWrite);
+extern U8_T I2C_READ_Byte(U8_T read_adds);
+extern void I2C_READ_nByte(U8_T read_adds,volatile U8_T *i2c_data,U8_T NumByteToWrite);
+extern void I2C_Slave_Receive(void);
+extern void I2C_DeInit(void);
+
+extern volatile uint8_t I2CWrBuffer[BUFSIZE];
+extern volatile uint8_t I2CRdBuffer[BUFSIZE];
+extern volatile U8_T f_ERROR;
+extern void I2C_SLAVE_CONFIG(void);
+#endif   /**< apt32f102_i2c_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_ifc.h b/Source/include/apt32f102_ifc.h
new file mode 100644
index 0000000..908d021
--- /dev/null
+++ b/Source/include/apt32f102_ifc.h
@@ -0,0 +1,421 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_ifc.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_ifc_H
+#define _apt32f102_ifc_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+/******************************************************************************
+************************ ifc Registers Definition *************************
+******************************************************************************/
+
+#define   IFC_CLK_EN          (0x01ul)
+#define   IFC_CLK_DIS         (0xfeul)
+#define   EnIFCClk            (IFC->CEDR = (IFC_CLK_EN))
+#define   DisIFCClk           (IFC->CEDR = (IFC_CLK_DIS))
+
+#define   USER_KEY            (0x5A5A5A5Aul)
+#define   SetUserKey          (IFC->KR = (USER_KEY))
+#define   StartOp             (0x01ul)
+
+#define  IFC_CLKEN  (0x01ul) //IFC CLKEN
+#define  IFC_SWRST  (0x01ul) //IFC SWRST 
+
+#define  HIDM0  ((0x0ul)<<8) //HID0
+#define  HIDM1  ((0x1ul)<<8) //HID1
+#define  HIDM2  ((0x2ul)<<8) //HID2
+#define  HIDM3  ((0x3ul)<<8) //HID3
+
+// IFC Command
+#define  PROGRAM    (0x01ul)
+#define  PAGE_ERASE (0x02ul)
+#define  CHIP_ERASE (0x04ul)
+#define  OPTION_ERASE (0x05ul)
+#define  PEP_ENABLE (0x06ul)			//预编程设定
+#define  PAGE_BUF_CLR (0x07ul)			//页缓存清除
+#define  DIS_SWD_SET (0x0Dul)			//SWD 禁止重映射
+#define  EN_SWD_SET (0x0Eul)			//SWD 使能重映射
+#define  USER_OPTION (0x0Ful)			//User OPTION操作
+
+#define  USER_KEY (0x5A5A5A5Aul)
+#define  CSP_IFC_SET_KR(ifc, val) (ifc->KR = (val))
+
+//
+#define   StartErase          (IFC->CR=(StartOp))
+#define   EnChipErase         (IFC->CMR=(CHIP_ERASE|HIDM1))
+#define   EnPageErase         (IFC->CMR=(PAGE_ERASE|HIDM0))
+
+/**
+  * @brief  IFC page address
+  */
+typedef enum
+{
+	PROM_PageAdd0           =  ((CSP_REGISTER_T)0x00000000),					//PROM 每页256BYTE
+	PROM_PageAdd1         =  ((CSP_REGISTER_T)0x00000100),
+	PROM_PageAdd2          =  ((CSP_REGISTER_T)0x00000200),
+	PROM_PageAdd3          =  ((CSP_REGISTER_T)0x00000300),
+	PROM_PageAdd4          =  ((CSP_REGISTER_T)0x00000400),
+	PROM_PageAdd5          =  ((CSP_REGISTER_T)0x00000500),
+	PROM_PageAdd6          =  ((CSP_REGISTER_T)0x00000600),
+	PROM_PageAdd7          =  ((CSP_REGISTER_T)0x00000700),
+	PROM_PageAdd8          =  ((CSP_REGISTER_T)0x00000800),
+	PROM_PageAdd9          =  ((CSP_REGISTER_T)0x00000900),
+	
+	PROM_PageAdd10          =  ((CSP_REGISTER_T)0x00000A00),
+	PROM_PageAdd11          =  ((CSP_REGISTER_T)0x00000B00),
+	PROM_PageAdd12          =  ((CSP_REGISTER_T)0x00000C00),
+	PROM_PageAdd13          =  ((CSP_REGISTER_T)0x00000D00),
+	PROM_PageAdd14          =  ((CSP_REGISTER_T)0x00000E00),
+	PROM_PageAdd15          =  ((CSP_REGISTER_T)0x00000F00),
+	PROM_PageAdd16          =  ((CSP_REGISTER_T)0x00001000),
+	PROM_PageAdd17          =  ((CSP_REGISTER_T)0x00001100),
+	PROM_PageAdd18          =  ((CSP_REGISTER_T)0x00001200),
+	PROM_PageAdd19          =  ((CSP_REGISTER_T)0x00001300),
+	
+	PROM_PageAdd20          =  ((CSP_REGISTER_T)0x00001400),
+	PROM_PageAdd21          =  ((CSP_REGISTER_T)0x00001500),
+	PROM_PageAdd22          =  ((CSP_REGISTER_T)0x00001600),
+	PROM_PageAdd23          =  ((CSP_REGISTER_T)0x00001700),
+	PROM_PageAdd24          =  ((CSP_REGISTER_T)0x00001800),
+	PROM_PageAdd25          =  ((CSP_REGISTER_T)0x00001900),
+	PROM_PageAdd26          =  ((CSP_REGISTER_T)0x00001A00),
+	PROM_PageAdd27          =  ((CSP_REGISTER_T)0x00001B00),
+	PROM_PageAdd28          =  ((CSP_REGISTER_T)0x00001C00),
+	PROM_PageAdd29          =  ((CSP_REGISTER_T)0x00001D00),
+	
+	PROM_PageAdd30          =  ((CSP_REGISTER_T)0x00001E00),
+	PROM_PageAdd31          =  ((CSP_REGISTER_T)0x00001F00),
+	PROM_PageAdd32          =  ((CSP_REGISTER_T)0x00002000),
+	PROM_PageAdd33          =  ((CSP_REGISTER_T)0x00002100),
+	PROM_PageAdd34          =  ((CSP_REGISTER_T)0x00002200),
+	PROM_PageAdd35          =  ((CSP_REGISTER_T)0x00002300),
+	PROM_PageAdd36          =  ((CSP_REGISTER_T)0x00002400),
+	PROM_PageAdd37          =  ((CSP_REGISTER_T)0x00002500),
+	PROM_PageAdd38          =  ((CSP_REGISTER_T)0x00002600),
+	PROM_PageAdd39          =  ((CSP_REGISTER_T)0x00002700),
+	
+	PROM_PageAdd40          =  ((CSP_REGISTER_T)0x00002800),
+	PROM_PageAdd41          =  ((CSP_REGISTER_T)0x00002900),
+	PROM_PageAdd42          =  ((CSP_REGISTER_T)0x00002A00),
+	PROM_PageAdd43          =  ((CSP_REGISTER_T)0x00002B00),
+	PROM_PageAdd44          =  ((CSP_REGISTER_T)0x00002C00),
+	PROM_PageAdd45          =  ((CSP_REGISTER_T)0x00002D00),
+	PROM_PageAdd46          =  ((CSP_REGISTER_T)0x00002E00),
+	PROM_PageAdd47          =  ((CSP_REGISTER_T)0x00002F00),
+	PROM_PageAdd48          =  ((CSP_REGISTER_T)0x00003000),
+	PROM_PageAdd49          =  ((CSP_REGISTER_T)0x00003100),
+	
+	PROM_PageAdd50          =  ((CSP_REGISTER_T)0x00003200),
+	PROM_PageAdd51          =  ((CSP_REGISTER_T)0x00003300),
+	PROM_PageAdd52          =  ((CSP_REGISTER_T)0x00003400),
+	PROM_PageAdd53          =  ((CSP_REGISTER_T)0x00003500),
+	PROM_PageAdd54          =  ((CSP_REGISTER_T)0x00003600),
+	PROM_PageAdd55          =  ((CSP_REGISTER_T)0x00003700),
+	PROM_PageAdd56          =  ((CSP_REGISTER_T)0x00003800),
+	PROM_PageAdd57          =  ((CSP_REGISTER_T)0x00003900),
+	PROM_PageAdd58          =  ((CSP_REGISTER_T)0x00003A00),
+	PROM_PageAdd59          =  ((CSP_REGISTER_T)0x00003B00),
+	
+	PROM_PageAdd60          =  ((CSP_REGISTER_T)0x00003C00),
+	PROM_PageAdd61          =  ((CSP_REGISTER_T)0x00003D00),
+	PROM_PageAdd62          =  ((CSP_REGISTER_T)0x00003E00),
+	PROM_PageAdd63          =  ((CSP_REGISTER_T)0x00003F00),
+	PROM_PageAdd64          =  ((CSP_REGISTER_T)0x00004000),
+	PROM_PageAdd65          =  ((CSP_REGISTER_T)0x00004100),
+	PROM_PageAdd66          =  ((CSP_REGISTER_T)0x00004200),
+	PROM_PageAdd67          =  ((CSP_REGISTER_T)0x00004300),
+	PROM_PageAdd68          =  ((CSP_REGISTER_T)0x00004400),
+	PROM_PageAdd69          =  ((CSP_REGISTER_T)0x00004500),
+	
+	PROM_PageAdd70          =  ((CSP_REGISTER_T)0x00004600),
+	PROM_PageAdd71          =  ((CSP_REGISTER_T)0x00004700),
+	PROM_PageAdd72          =  ((CSP_REGISTER_T)0x00004800),
+	PROM_PageAdd73          =  ((CSP_REGISTER_T)0x00004900),
+	PROM_PageAdd74          =  ((CSP_REGISTER_T)0x00004A00),
+	PROM_PageAdd75          =  ((CSP_REGISTER_T)0x00004B00),
+	PROM_PageAdd76          =  ((CSP_REGISTER_T)0x00004C00),
+	PROM_PageAdd77          =  ((CSP_REGISTER_T)0x00004D00),
+	PROM_PageAdd78          =  ((CSP_REGISTER_T)0x00004E00),
+	PROM_PageAdd79          =  ((CSP_REGISTER_T)0x00004F00),
+	
+	PROM_PageAdd80          =  ((CSP_REGISTER_T)0x00005000),
+	PROM_PageAdd81          =  ((CSP_REGISTER_T)0x00005100),
+	PROM_PageAdd82          =  ((CSP_REGISTER_T)0x00005200),
+	PROM_PageAdd83          =  ((CSP_REGISTER_T)0x00005300),
+	PROM_PageAdd84          =  ((CSP_REGISTER_T)0x00005400),
+	PROM_PageAdd85          =  ((CSP_REGISTER_T)0x00005500),
+	PROM_PageAdd86          =  ((CSP_REGISTER_T)0x00005600),
+	PROM_PageAdd87          =  ((CSP_REGISTER_T)0x00005700),
+	PROM_PageAdd88          =  ((CSP_REGISTER_T)0x00005800),
+	PROM_PageAdd89          =  ((CSP_REGISTER_T)0x00005900),
+	
+	PROM_PageAdd90          =  ((CSP_REGISTER_T)0x00005A00),
+	PROM_PageAdd91          =  ((CSP_REGISTER_T)0x00005B00),
+	PROM_PageAdd92          =  ((CSP_REGISTER_T)0x00005C00),
+	PROM_PageAdd93          =  ((CSP_REGISTER_T)0x00005D00),
+	PROM_PageAdd94          =  ((CSP_REGISTER_T)0x00005E00),
+	PROM_PageAdd95          =  ((CSP_REGISTER_T)0x00005F00),
+	PROM_PageAdd96          =  ((CSP_REGISTER_T)0x00006000),
+	PROM_PageAdd97          =  ((CSP_REGISTER_T)0x00006100),
+	PROM_PageAdd98          =  ((CSP_REGISTER_T)0x00006200),
+	PROM_PageAdd99          =  ((CSP_REGISTER_T)0x00006300),
+	
+	PROM_PageAdd100          =  ((CSP_REGISTER_T)0x00006400),
+	PROM_PageAdd101          =  ((CSP_REGISTER_T)0x00006500),
+	PROM_PageAdd102          =  ((CSP_REGISTER_T)0x00006600),
+	PROM_PageAdd103          =  ((CSP_REGISTER_T)0x00006700),
+	PROM_PageAdd104          =  ((CSP_REGISTER_T)0x00006800),
+	PROM_PageAdd105          =  ((CSP_REGISTER_T)0x00006900),
+	PROM_PageAdd106          =  ((CSP_REGISTER_T)0x00006A00),
+	PROM_PageAdd107          =  ((CSP_REGISTER_T)0x00006B00),
+	PROM_PageAdd108          =  ((CSP_REGISTER_T)0x00006C00),
+	PROM_PageAdd109          =  ((CSP_REGISTER_T)0x00006D00),
+	
+	PROM_PageAdd110          =  ((CSP_REGISTER_T)0x00006E00),
+	PROM_PageAdd111          =  ((CSP_REGISTER_T)0x00006F00),
+	PROM_PageAdd112          =  ((CSP_REGISTER_T)0x00007000),
+	PROM_PageAdd113          =  ((CSP_REGISTER_T)0x00007100),
+	PROM_PageAdd114          =  ((CSP_REGISTER_T)0x00007200),
+	PROM_PageAdd115          =  ((CSP_REGISTER_T)0x00007300),
+	PROM_PageAdd116          =  ((CSP_REGISTER_T)0x00007400),
+	PROM_PageAdd117          =  ((CSP_REGISTER_T)0x00007500),
+	PROM_PageAdd118          =  ((CSP_REGISTER_T)0x00007600),
+	PROM_PageAdd119          =  ((CSP_REGISTER_T)0x00007700),
+	
+	PROM_PageAdd120          =  ((CSP_REGISTER_T)0x00007800),
+	PROM_PageAdd121          =  ((CSP_REGISTER_T)0x00007900),
+	PROM_PageAdd122          =  ((CSP_REGISTER_T)0x00007A00),
+	PROM_PageAdd123          =  ((CSP_REGISTER_T)0x00007B00),
+	PROM_PageAdd124          =  ((CSP_REGISTER_T)0x00007C00),
+	PROM_PageAdd125          =  ((CSP_REGISTER_T)0x00007D00),
+	PROM_PageAdd126          =  ((CSP_REGISTER_T)0x00007E00),
+	PROM_PageAdd127          =  ((CSP_REGISTER_T)0x00007F00),
+	PROM_PageAdd128          =  ((CSP_REGISTER_T)0x00008000),
+	PROM_PageAdd129          =  ((CSP_REGISTER_T)0x00008100),
+	
+	PROM_PageAdd130          =  ((CSP_REGISTER_T)0x00008200),
+	PROM_PageAdd131          =  ((CSP_REGISTER_T)0x00008300),
+	PROM_PageAdd132          =  ((CSP_REGISTER_T)0x00008400),
+	PROM_PageAdd133          =  ((CSP_REGISTER_T)0x00008500),
+	PROM_PageAdd134          =  ((CSP_REGISTER_T)0x00008600),
+	PROM_PageAdd135          =  ((CSP_REGISTER_T)0x00008700),
+	PROM_PageAdd136          =  ((CSP_REGISTER_T)0x00008800),
+	PROM_PageAdd137          =  ((CSP_REGISTER_T)0x00008900),
+	PROM_PageAdd138          =  ((CSP_REGISTER_T)0x00008A00),
+	PROM_PageAdd139          =  ((CSP_REGISTER_T)0x00008B00),
+	
+	PROM_PageAdd140          =  ((CSP_REGISTER_T)0x00008C00),
+	PROM_PageAdd141          =  ((CSP_REGISTER_T)0x00008D00),
+	PROM_PageAdd142          =  ((CSP_REGISTER_T)0x00008E00),
+	PROM_PageAdd143          =  ((CSP_REGISTER_T)0x00008F00),
+	PROM_PageAdd144          =  ((CSP_REGISTER_T)0x00009000),
+	PROM_PageAdd145          =  ((CSP_REGISTER_T)0x00009100),
+	PROM_PageAdd146          =  ((CSP_REGISTER_T)0x00009200),
+	PROM_PageAdd147          =  ((CSP_REGISTER_T)0x00009300),
+	PROM_PageAdd148          =  ((CSP_REGISTER_T)0x00009400),
+	PROM_PageAdd149          =  ((CSP_REGISTER_T)0x00009500),
+	
+	PROM_PageAdd150          =  ((CSP_REGISTER_T)0x00009600),
+	PROM_PageAdd151          =  ((CSP_REGISTER_T)0x00009700),
+	PROM_PageAdd152          =  ((CSP_REGISTER_T)0x00009800),
+	PROM_PageAdd153          =  ((CSP_REGISTER_T)0x00009900),
+	PROM_PageAdd154          =  ((CSP_REGISTER_T)0x00009A00),
+	PROM_PageAdd155          =  ((CSP_REGISTER_T)0x00009B00),
+	PROM_PageAdd156          =  ((CSP_REGISTER_T)0x00009C00),
+	PROM_PageAdd157          =  ((CSP_REGISTER_T)0x00009D00),
+	PROM_PageAdd158          =  ((CSP_REGISTER_T)0x00009E00),
+	PROM_PageAdd159          =  ((CSP_REGISTER_T)0x00009F00),
+	
+	PROM_PageAdd160          =  ((CSP_REGISTER_T)0x0000A000),
+	PROM_PageAdd161          =  ((CSP_REGISTER_T)0x0000A100),
+	PROM_PageAdd162          =  ((CSP_REGISTER_T)0x0000A200),
+	PROM_PageAdd163          =  ((CSP_REGISTER_T)0x0000A300),
+	PROM_PageAdd164          =  ((CSP_REGISTER_T)0x0000A400),
+	PROM_PageAdd165          =  ((CSP_REGISTER_T)0x0000A500),
+	PROM_PageAdd166          =  ((CSP_REGISTER_T)0x0000A600),
+	PROM_PageAdd167          =  ((CSP_REGISTER_T)0x0000A700),
+	PROM_PageAdd168          =  ((CSP_REGISTER_T)0x0000A800),
+	PROM_PageAdd169          =  ((CSP_REGISTER_T)0x0000A900),
+	
+	PROM_PageAdd170          =  ((CSP_REGISTER_T)0x0000AA00),
+	PROM_PageAdd171          =  ((CSP_REGISTER_T)0x0000AB00),
+	PROM_PageAdd172          =  ((CSP_REGISTER_T)0x0000AC00),
+	PROM_PageAdd173          =  ((CSP_REGISTER_T)0x0000AD00),
+	PROM_PageAdd174          =  ((CSP_REGISTER_T)0x0000AE00),
+	PROM_PageAdd175          =  ((CSP_REGISTER_T)0x0000AF00),
+	PROM_PageAdd176          =  ((CSP_REGISTER_T)0x0000B000),
+	PROM_PageAdd177          =  ((CSP_REGISTER_T)0x0000B100),
+	PROM_PageAdd178          =  ((CSP_REGISTER_T)0x0000B200),
+	PROM_PageAdd179          =  ((CSP_REGISTER_T)0x0000B300),
+	
+	PROM_PageAdd180          =  ((CSP_REGISTER_T)0x0000B400),
+	PROM_PageAdd181          =  ((CSP_REGISTER_T)0x0000B500),
+	PROM_PageAdd182          =  ((CSP_REGISTER_T)0x0000B600),
+	PROM_PageAdd183          =  ((CSP_REGISTER_T)0x0000B700),
+	PROM_PageAdd184          =  ((CSP_REGISTER_T)0x0000B800),
+	PROM_PageAdd185          =  ((CSP_REGISTER_T)0x0000B900),
+	PROM_PageAdd186          =  ((CSP_REGISTER_T)0x0000BA00),
+	PROM_PageAdd187          =  ((CSP_REGISTER_T)0x0000BB00),
+	PROM_PageAdd188          =  ((CSP_REGISTER_T)0x0000BC00),
+	PROM_PageAdd189          =  ((CSP_REGISTER_T)0x0000BD00),
+	
+	PROM_PageAdd190          =  ((CSP_REGISTER_T)0x0000BE00),
+	PROM_PageAdd191          =  ((CSP_REGISTER_T)0x0000BF00),
+	PROM_PageAdd192          =  ((CSP_REGISTER_T)0x0000C000),
+	PROM_PageAdd193          =  ((CSP_REGISTER_T)0x0000C100),
+	PROM_PageAdd194          =  ((CSP_REGISTER_T)0x0000C200),
+	PROM_PageAdd195          =  ((CSP_REGISTER_T)0x0000C300),
+	PROM_PageAdd196          =  ((CSP_REGISTER_T)0x0000C400),
+	PROM_PageAdd197          =  ((CSP_REGISTER_T)0x0000C500),
+	PROM_PageAdd198          =  ((CSP_REGISTER_T)0x0000C600),
+	PROM_PageAdd199          =  ((CSP_REGISTER_T)0x0000C700),
+	
+	PROM_PageAdd200          =  ((CSP_REGISTER_T)0x0000C800),
+	PROM_PageAdd201          =  ((CSP_REGISTER_T)0x0000C900),
+	PROM_PageAdd202          =  ((CSP_REGISTER_T)0x0000CA00),
+	PROM_PageAdd203          =  ((CSP_REGISTER_T)0x0000CB00),
+	PROM_PageAdd204          =  ((CSP_REGISTER_T)0x0000CC00),
+	PROM_PageAdd205          =  ((CSP_REGISTER_T)0x0000CD00),
+	PROM_PageAdd206          =  ((CSP_REGISTER_T)0x0000CE00),
+	PROM_PageAdd207          =  ((CSP_REGISTER_T)0x0000CF00),
+	PROM_PageAdd208          =  ((CSP_REGISTER_T)0x0000D000),
+	PROM_PageAdd209          =  ((CSP_REGISTER_T)0x0000D100),
+	
+	PROM_PageAdd210          =  ((CSP_REGISTER_T)0x0000D200),
+	PROM_PageAdd211          =  ((CSP_REGISTER_T)0x0000D300),
+	PROM_PageAdd212          =  ((CSP_REGISTER_T)0x0000D400),
+	PROM_PageAdd213          =  ((CSP_REGISTER_T)0x0000D500),
+	PROM_PageAdd214          =  ((CSP_REGISTER_T)0x0000D600),
+	PROM_PageAdd215          =  ((CSP_REGISTER_T)0x0000D700),
+	PROM_PageAdd216          =  ((CSP_REGISTER_T)0x0000D800),
+	PROM_PageAdd217          =  ((CSP_REGISTER_T)0x0000D900),
+	PROM_PageAdd218          =  ((CSP_REGISTER_T)0x0000DA00),
+	PROM_PageAdd219          =  ((CSP_REGISTER_T)0x0000DB00),
+	
+	PROM_PageAdd220          =  ((CSP_REGISTER_T)0x0000DC00),
+	PROM_PageAdd221          =  ((CSP_REGISTER_T)0x0000DD00),
+	PROM_PageAdd222          =  ((CSP_REGISTER_T)0x0000DE00),
+	PROM_PageAdd223          =  ((CSP_REGISTER_T)0x0000DF00),
+	PROM_PageAdd224          =  ((CSP_REGISTER_T)0x0000E000),
+	PROM_PageAdd225          =  ((CSP_REGISTER_T)0x0000E100),
+	PROM_PageAdd226          =  ((CSP_REGISTER_T)0x0000E200),
+	PROM_PageAdd227          =  ((CSP_REGISTER_T)0x0000E300),
+	PROM_PageAdd228          =  ((CSP_REGISTER_T)0x0000E400),
+	PROM_PageAdd229          =  ((CSP_REGISTER_T)0x0000E500),
+	
+	PROM_PageAdd230          =  ((CSP_REGISTER_T)0x0000E600),
+	PROM_PageAdd231          =  ((CSP_REGISTER_T)0x0000E700),
+	PROM_PageAdd232          =  ((CSP_REGISTER_T)0x0000E800),
+	PROM_PageAdd233          =  ((CSP_REGISTER_T)0x0000E900),
+	PROM_PageAdd234          =  ((CSP_REGISTER_T)0x0000EA00),
+	PROM_PageAdd235          =  ((CSP_REGISTER_T)0x0000EB00),
+	PROM_PageAdd236          =  ((CSP_REGISTER_T)0x0000EC00),
+	PROM_PageAdd237          =  ((CSP_REGISTER_T)0x0000ED00),
+	PROM_PageAdd238          =  ((CSP_REGISTER_T)0x0000EE00),
+	PROM_PageAdd239          =  ((CSP_REGISTER_T)0x0000EF00),
+	
+	PROM_PageAdd240          =  ((CSP_REGISTER_T)0x0000F000),
+	PROM_PageAdd241          =  ((CSP_REGISTER_T)0x0000F100),
+	PROM_PageAdd242          =  ((CSP_REGISTER_T)0x0000F200),
+	PROM_PageAdd243          =  ((CSP_REGISTER_T)0x0000F300),
+	PROM_PageAdd244          =  ((CSP_REGISTER_T)0x0000F400),
+	PROM_PageAdd245          =  ((CSP_REGISTER_T)0x0000F50),
+	PROM_PageAdd246          =  ((CSP_REGISTER_T)0x0000F600),
+	PROM_PageAdd247          =  ((CSP_REGISTER_T)0x0000F700),
+	PROM_PageAdd248          =  ((CSP_REGISTER_T)0x0000F800),
+	PROM_PageAdd249          =  ((CSP_REGISTER_T)0x0000F900),
+	
+	PROM_PageAdd250          =  ((CSP_REGISTER_T)0x0000FA00),
+	PROM_PageAdd251          =  ((CSP_REGISTER_T)0x0000FB00),
+	PROM_PageAdd252          =  ((CSP_REGISTER_T)0x0000FC00),
+	PROM_PageAdd253          =  ((CSP_REGISTER_T)0x0000FD00),
+	PROM_PageAdd254          =  ((CSP_REGISTER_T)0x0000FE00),
+	PROM_PageAdd255          =  ((CSP_REGISTER_T)0x0000FF00),
+
+	DROM_PageAdd0           =  ((CSP_REGISTER_T)0x10000000),					//DROM 每页64BYTE
+	DROM_PageAdd1           =  ((CSP_REGISTER_T)0x10000040),
+	DROM_PageAdd2           =  ((CSP_REGISTER_T)0x10000080),
+	DROM_PageAdd3           =  ((CSP_REGISTER_T)0x100000C0),
+	DROM_PageAdd4           =  ((CSP_REGISTER_T)0x10000100),					
+	DROM_PageAdd5           =  ((CSP_REGISTER_T)0x10000140),
+	DROM_PageAdd6           =  ((CSP_REGISTER_T)0x10000180),
+	DROM_PageAdd7           =  ((CSP_REGISTER_T)0x100001C0),
+	DROM_PageAdd8           =  ((CSP_REGISTER_T)0x10000200),
+	DROM_PageAdd9           =  ((CSP_REGISTER_T)0x10000240),
+	
+	DROM_PageAdd10           =  ((CSP_REGISTER_T)0x10000280),	
+	DROM_PageAdd11           =  ((CSP_REGISTER_T)0x100002C0),
+	DROM_PageAdd12           =  ((CSP_REGISTER_T)0x10000300),
+	DROM_PageAdd13           =  ((CSP_REGISTER_T)0x10000340),
+	DROM_PageAdd14           =  ((CSP_REGISTER_T)0x10000380),	
+	DROM_PageAdd15           =  ((CSP_REGISTER_T)0x100003C0),
+	DROM_PageAdd16           =  ((CSP_REGISTER_T)0x10000400),
+	DROM_PageAdd17           =  ((CSP_REGISTER_T)0x10000440),
+	DROM_PageAdd18           =  ((CSP_REGISTER_T)0x10000480),
+	DROM_PageAdd19           =  ((CSP_REGISTER_T)0x100004C0),
+	
+	DROM_PageAdd20           =  ((CSP_REGISTER_T)0x10000500),	
+	DROM_PageAdd21           =  ((CSP_REGISTER_T)0x10000540),
+	DROM_PageAdd22           =  ((CSP_REGISTER_T)0x10000580),
+	DROM_PageAdd23           =  ((CSP_REGISTER_T)0x100005C0),
+	DROM_PageAdd24           =  ((CSP_REGISTER_T)0x10000600),	
+	DROM_PageAdd25           =  ((CSP_REGISTER_T)0x10000640),
+	DROM_PageAdd26           =  ((CSP_REGISTER_T)0x10000680),
+	DROM_PageAdd27           =  ((CSP_REGISTER_T)0x100006C0),
+	DROM_PageAdd28           =  ((CSP_REGISTER_T)0x10000700),
+	DROM_PageAdd29           =  ((CSP_REGISTER_T)0x10000740),
+	
+	DROM_PageAdd30           =  ((CSP_REGISTER_T)0x10000780),	
+	DROM_PageAdd31           =  ((CSP_REGISTER_T)0x100007C0)
+}IFC_ROMSELETED_TypeDef;
+
+/**
+  * @brief  IFC INT mode
+  */
+typedef enum
+{
+	ERS_END_INT          =  (0x01ul),
+	RGM_END_INT          =  ((0x01ul)<<1),
+	PEP_END_INT      	 =  ((0x01ul)<<2),
+	PROT_ERR_INT         =  ((0x01ul)<<12),
+	UDEF_ERR_INT     	 =  ((0x01ul)<<13),
+	ADDR_ERR_INT     	 =  ((0x01ul)<<14),
+	OVW_ERR_INT     	 =  ((0x01ul)<<15)
+}IFC_INT_TypeDef;
+
+
+extern void ChipErase(void);
+extern void PageErase(IFC_ROMSELETED_TypeDef XROM_PageAd);
+extern void IFC_interrupt_CMD(FunctionalStatus NewState ,IFC_INT_TypeDef IFC_INT_x);
+extern void IFC_Int_Enable(void);
+extern void IFC_Int_Disable(void);
+extern void Page_ProgramData(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry);
+extern void Page_ProgramData_int(unsigned int FlashAdd,unsigned int DataSize,volatile unsigned char *BufArry);
+extern void ReadDataArry(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint);
+extern void ReadDataArry_U8(unsigned int RdStartAdd,unsigned int DataLength,volatile unsigned char *DataArryPoint);
+extern volatile unsigned int R_INT_FlashAdd;
+extern volatile unsigned char f_Drom_write_complete;
+extern volatile unsigned char f_Drom_writing;
+extern volatile unsigned char ifc_step;
+extern void Page_ProgramData_U32(unsigned int FlashAdd,unsigned int DataSize,volatile U32_T *BufArry);
+extern void ReadDataArry_U32(unsigned int RdStartAdd,unsigned int DataLength,volatile U32_T *DataArryPoint);
+#endif   /**< apt32f102_ifc_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
diff --git a/Source/include/apt32f102_lpt.h b/Source/include/apt32f102_lpt.h
new file mode 100644
index 0000000..7226993
--- /dev/null
+++ b/Source/include/apt32f102_lpt.h
@@ -0,0 +1,280 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_lpt.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_lpt_H
+#define _apt32f102_lpt_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define LPT_RESET_VALUE  (0x00000000)
+//--------------------------------------------------------------------------------
+//-----------------------------LPT  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  LPT CLK EN register
+  */
+typedef enum
+{
+    LPTCLK_DIS = 0,
+	LPTCLK_EN = 1,
+}LPT_CLK_TypeDef;
+/**
+  * @brief  LPT CLK source register
+  */
+typedef enum
+{
+	LPT_PCLK_DIV4= (0<<2),
+    LPT_ISCLK = (1<<2),
+	LPT_IMCLK_DIV4 = (2<<2),
+	LPT_EMCLK = (3<<2),
+	LPT_IN_RISE = (4<<2),
+	LPT_IN_FALL = (5<<2),	
+}LPT_CSS_TypeDef;
+/**
+  * @brief  LPT START SHADOW register
+  */
+typedef enum
+{
+    LPT_SHADOW = (0<<6),
+	LPT_IMMEDIATE= (1<<6),
+}LPT_SHDWSTP_TypeDef;
+/**
+  * @brief  LPT CLK div register
+  */
+typedef enum
+{
+	LPT_PSC_DIV0= 0,
+	LPT_PSC_DIV2= 1,
+	LPT_PSC_DIV4= 2,
+    LPT_PSC_DIV8= 3,
+	LPT_PSC_DIV16= 4,
+	LPT_PSC_DIV32= 5,
+	LPT_PSC_DIV64= 6,
+	LPT_PSC_DIV128= 7,
+    LPT_PSC_DIV256= 8,
+	LPT_PSC_DIV512= 9,
+	LPT_PSC_DIV1024= 0X0A,
+	LPT_PSC_DIV2048= 0X0B,
+	LPT_PSC_DIV4096= 0X0C,	
+}LPT_PSCDIV_TypeDef;
+/**
+  * @brief  LPT START SYN EN register
+  */
+typedef enum
+{
+    LPT_SWSYNDIS= (0<<2),
+	LPT_SWSYNEN= (1<<2),
+}LPT_SWSYN_TypeDef;
+/**
+  * @brief  LPT IO stop status register
+  */
+typedef enum
+{
+    LPT_IDLE_Z= (0<<3),         //High-impedance output
+	LPT_IDLE_LOW= (1<<3),	
+}LPT_IDLEST_TypeDef;
+/**
+  * @brief  LPT PRDLD register
+  */
+typedef enum
+{
+    LPT_PRDLD_IMMEDIATELY= (0<<4),         
+	LPT_PRDLD_DUTY_END= (1<<4),	
+}LPT_PRDLD_TypeDef;
+/**
+  * @brief  LPT POL register
+  */
+typedef enum
+{
+    LPT_POL_HIGH= (0<<5),         
+	LPT_POL_LOW= (1<<5),	
+}LPT_POL_TypeDef;
+/**
+  * @brief  LPT OPM register
+  */
+typedef enum
+{
+    LPT_OPM_CONTINUOUS= (0<<6),         
+	LPT_OPM_ONCE= (1<<6),	
+}LPT_OPM_TypeDef;
+/**
+  * @brief  LPT FLTIPSCLD register
+  */
+typedef enum
+{
+    LPT_FLTIPSCLD_NULL= (0<<10),         
+	LPT_FLTIPSCLD_EN= (1<<10),	
+}LPT_FLTIPSCLD_TypeDef;
+/**
+  * @brief  LPT FLTDEB register
+  */
+typedef enum
+{
+    LPT_FLTDEB_00= (0<<13),         
+	LPT_FLTDEB_02= (1<<13), 
+    LPT_FLTDEB_03= (2<<13),         
+	LPT_FLTDEB_04= (3<<13), 
+    LPT_FLTDEB_06= (4<<13),         
+	LPT_FLTDEB_08= (5<<13), 
+    LPT_FLTDEB_16= (6<<13),         
+	LPT_FLTDEB_32= (7<<13), 	
+}LPT_FLTDEB_TypeDef;
+/**
+  * @brief  LPT PSCLD register
+  */
+typedef enum
+{
+    LPT_PSCLD_0= (0<<16),  		//PSCR        
+	LPT_PSCLD_1= (1<<16),	
+}LPT_PSCLD_TypeDef;
+/**
+  * @brief  LPT CMPLD register
+  */
+typedef enum
+{
+    LPT_CMPLD_IMMEDIATELY= (0<<17),  	       
+	LPT_CMPLD_DUTY_END= (1<<17),	
+}LPT_CMPLD_TypeDef;
+/**
+  * @brief  LPT TRGENX register
+  */
+typedef enum
+{
+    LPT_TRGEN_DIS= (0<<0),  	       
+	LPT_TRGEN_EN= (1<<0),	
+}LPT_TRGENX_TypeDef;
+/**
+  * @brief  LPT OSTMDX register
+  */
+typedef enum
+{
+    LPT_OSTMD_CONTINUOUS= (0<<8),  	       
+	LPT_OSTMD_ONCE= (1<<8),	
+}LPT_OSTMDX_TypeDef;
+/**
+  * @brief  LPT AREARM register
+  */
+typedef enum
+{
+    LPT_AREARM_DIS= (0<<30),  	       
+	LPT_AREARM_EN= (1<<30),	
+}LPT_AREARM_TypeDef;
+/**
+  * @brief  LPT SRCSEL register
+  */
+typedef enum
+{
+    LPT_SRCSEL_DIS= (0<<0),  	       
+	LPT_SRCSEL_EN= (1<<0),	
+}LPT_SRCSEL_TypeDef;
+/**
+  * @brief  LPT BLKINV register
+  */
+typedef enum
+{
+    LPT_BLKINV_DIS= (0<<4),  	       
+	LPT_BLKINV_EN= (1<<4),	
+}LPT_BLKINV_TypeDef;
+/**
+  * @brief  LPT CROSSMD register
+  */
+typedef enum
+{
+    LPT_CROSSMD_DIS= (0<<7),  	       
+	LPT_CROSSMD_EN= (1<<7),	
+}LPT_CROSSMD_TypeDef;
+/**
+  * @brief  LPT TRGSRC0 register
+  */
+typedef enum
+{
+    LPT_TRGSRC0_DIS= (0<<0),  	       
+	LPT_TRGSRC0_ZRO= (1<<0),
+	LPT_TRGSRC0_PRD= (2<<0),
+	LPT_TRGSRC0_ZRO_PRD= (3<<0),
+	LPT_TRGSRC0_CMP= (4<<0),
+}LPT_TRGSRC0_TypeDef;
+/**
+  * @brief  LPT ESYN0OE register
+  */
+typedef enum
+{
+    LPT_ESYN0OE_DIS= (0<<20),  	       
+	LPT_ESYN0OE_EN= (1<<20),	
+}LPT_ESYN0OE_TypeDef;
+
+/**
+  * @brief  LPT INT MASK SET/CLR  Set
+  */
+typedef enum
+{
+	LPT_TRGEV0     	=	(0x01 << 0),  
+	LPT_MATCH    	=	(0x01 << 1),      
+	LPT_PEND    	=	(0x01 << 2), 
+}LPT_IMSCR_TypeDef;  
+
+/**
+  * @brief  LPT IO  Set
+  */
+typedef enum
+{
+	LPT_OUT_PA09    =	0,  
+	LPT_OUT_PB01   	=	1,      
+	LPT_IN_PA10    =	2, 
+}LPT_IOSET_TypeDef; 
+
+
+#define LPT_DEBUG_MODE (0X01<<1)
+
+
+extern void LPT_DeInit(void);
+extern void LPT_IO_Init(LPT_IOSET_TypeDef IONAME);
+extern void LPT_Configure(LPT_CLK_TypeDef CLKX,LPT_CSS_TypeDef CSSX,LPT_SHDWSTP_TypeDef SHDWSTPX,
+						LPT_PSCDIV_TypeDef PSCDIVX,U8_T FLTCKPRSX,LPT_OPM_TypeDef OPMX);
+extern void LPT_Debug_Mode(FunctionalStatus NewState);
+extern void LPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMP_DATA);
+extern void LPT_CNT_Write(U16_T CNT_DATA);
+extern U16_T LPT_PRDR_Read(void);
+extern U16_T LPT_CMP_Read(void);
+extern U16_T LPT_CNT_Read(void);
+extern void LPT_ControlSet_Configure(LPT_SWSYN_TypeDef SWSYNX,LPT_IDLEST_TypeDef IDLESTX,LPT_PRDLD_TypeDef PRDLDX,LPT_POL_TypeDef POLX,
+							 LPT_FLTDEB_TypeDef FLTDEBX,LPT_PSCLD_TypeDef PSCLDX,LPT_CMPLD_TypeDef CMPLDX);
+extern void LPT_SyncSet_Configure(LPT_TRGENX_TypeDef TRGENX,LPT_OSTMDX_TypeDef OSTMDX,LPT_AREARM_TypeDef AREARMX);
+extern void LPT_Trigger_Configure(LPT_SRCSEL_TypeDef SRCSELX,LPT_BLKINV_TypeDef BLKINVX,LPT_CROSSMD_TypeDef CROSSMDX,LPT_TRGSRC0_TypeDef TRGSRC0X,
+						LPT_ESYN0OE_TypeDef ESYN0OEX,U16_T OFFSET_DATA,U16_T WINDOW_DATA,U8_T TRGEC0PRD_DATA);
+extern void LPT_Trigger_Cnt(U8_T TRGEV0CNT_DATA);
+extern void LPT_Trigger_EVPS(U8_T TRGEC0PRD_DATA,U8_T TRGEV0CNT_DATA);
+extern void LPT_Soft_Trigger(void);
+extern void LPT_Start(void);
+extern void LPT_Stop(void);
+extern void LPT_Soft_Reset(void);
+extern void LPT_REARM_Write(void);
+extern U8_T LPT_REARM_Read(void);
+extern void LPT_ConfigInterrupt_CMD(FunctionalStatus NewState,LPT_IMSCR_TypeDef LPT_IMSCR_X);
+extern void LPT_INT_ENABLE(void);
+extern void LPT_INT_DISABLE(void);
+
+
+
+/*************************************************************/
+
+#endif   /**< apt32f102_lpt_H */
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_rtc.h b/Source/include/apt32f102_rtc.h
new file mode 100644
index 0000000..746da50
--- /dev/null
+++ b/Source/include/apt32f102_rtc.h
@@ -0,0 +1,254 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_interrupt.c
+  * @author  APT AE Team
+  * @version V1.10
+  * @date    2021/08/25
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_rtc_H
+#define _apt32f102_rtc_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+/******************************************************************************
+************************* rtc Registers Definition *************************
+******************************************************************************/
+/** @addtogroup RTC Registers Reset Value
+  * @{
+  */
+
+#define RTC_TIMR_RST     	((CSP_REGISTER_T)0x00000000)
+#define RTC_DATR_RST     	((CSP_REGISTER_T)0x00000000)
+#define RTC_CR_RST     		((CSP_REGISTER_T)0x00000001)
+#define RTC_CCR_RST     	((CSP_REGISTER_T)0x00800000)
+#define RTC_ALRAR_RST		((CSP_REGISTER_T)0x00000000)
+#define	RTC_ALRBR_RST		((CSP_REGISTER_T)0x00000000)
+#define RTC_SSR_RST			((CSP_REGISTER_T)0x00000000)
+#define RTC_CAL_RST			((CSP_REGISTER_T)0x00000000)
+#define RTC_IMCR_RST		((CSP_REGISTER_T)0x00000000)
+#define RTC_EVTRG_RST		((CSP_REGISTER_T)0x00000000)
+#define RTC_EVPS_RST		((CSP_REGISTER_T)0x00000000)
+
+//RTC KEY
+#define  RTC_KEY 	(0XCA53ul)
+
+/**
+  * @brief  RTC DIVS Control
+  */
+typedef enum
+{
+	CLKSRC_ISOSC				=	 	(CSP_REGISTER_T)(0x00ul<<24),
+	CLKSRC_IMOSC_4div			=	 	(CSP_REGISTER_T)(0x01ul<<24),
+	CLKSRC_EMOSC				=	 	(CSP_REGISTER_T)(0x02ul<<24),
+	CLKSRC_EMOSC_4div			=	 	(CSP_REGISTER_T)(0x03ul<<24)
+}RTC_CLKSRC_TypeDef;
+	
+
+/**
+  * @brief  RTC INT register 
+  */
+typedef enum
+{
+	//RISR IMCR MISR ICR
+	ALRA_INT        	=		((CSP_REGISTER_T)(0x01ul << 0)),  
+	ALRB_INT      		=		((CSP_REGISTER_T)(0x01ul << 1)),    
+	CPRD_INT        	=		((CSP_REGISTER_T)(0x01ul << 2)),   
+	RTC_TRGEV0_INT      =		((CSP_REGISTER_T)(0x01ul << 3)),    
+	RTC_TRGEV1_INT      =		((CSP_REGISTER_T)(0x01ul << 4))     
+}RTC_INT_TypeDef;
+
+/**
+  * @brief  RTC Alarm SEC MIN DAY mask
+  */
+ typedef enum
+{
+	Alarm_Second_Compare_EN			=		((CSP_REGISTER_T)(0x00ul << 7)),  
+	Alarm_Second_Compare_DIS		=		((CSP_REGISTER_T)(0x01ul << 7)),  
+} RTC_Alarm_Second_mask_TypeDef;	
+ typedef enum
+{
+	Alarm_Minute_Compare_EN			=		((CSP_REGISTER_T)(0x00ul << 15)),  
+	Alarm_Minute_Compare_DIS		=		((CSP_REGISTER_T)(0x01ul << 15)), 
+} RTC_Alarm_Minute_mask_TypeDef;
+ typedef enum
+{	 
+	Alarm_Hour_Compare_EN			=		((CSP_REGISTER_T)(0x00ul << 23)),  
+	Alarm_Hour_Compare_DIS			=		((CSP_REGISTER_T)(0x01ul << 23)), 
+} RTC_Alarm_Hour_mask_TypeDef;		
+ typedef enum
+{
+	Alarm_DataOrWeek_Compare_EN		=		((CSP_REGISTER_T)(0x00ul << 31)), 
+	Alarm_DataOrWeek_Compare_DIS	=		((CSP_REGISTER_T)(0x01ul << 31)) 
+} RTC_Alarm_DataOrWeek_mask_TypeDef;	;
+/**
+  * @brief  RTC Alarm week data select
+  */
+ typedef enum
+{
+	Alarm_data_selecte		=		((CSP_REGISTER_T)(0x00ul << 30)),  
+	Alarm_week_selecte		=		((CSP_REGISTER_T)(0x01ul << 30))  
+} RTC_Alarm_WeekData_select_TypeDef;
+/**
+  * @brief  RTC Alarm Register select
+  */
+ typedef enum
+{
+	Alarm_A		=		0,  
+	Alarm_B		=		1 
+}RTC_Alarm_Register_select_TypeDef;  
+
+/**
+  * @brief  RTC Alarm io output mode
+  */
+ typedef enum
+{
+	Alarm_A_pulse_output 	=	((CSP_REGISTER_T)(0x00ul << 10)),  
+	Alarm_A_High			=	((CSP_REGISTER_T)(0x01ul << 10)),  
+	Alarm_A_Low				=	((CSP_REGISTER_T)(0x02ul << 10)),  
+	Alarm_B_pulse_output	=	((CSP_REGISTER_T)(0x04ul << 10)),  
+	Alarm_B_High			=	((CSP_REGISTER_T)(0x05ul << 10)), 
+	Alarm_B_Low				=	((CSP_REGISTER_T)(0x06ul << 10)), 
+}Rtc_Output_Mode_TypeDef;
+/**
+  * @brief  RTC Alarm IO clock outpu
+  */
+ typedef enum
+{
+	COSEL_Cali_512hz 		=	((CSP_REGISTER_T)(0x00ul << 8)),  
+	COSEL_Cali_1hz			=	((CSP_REGISTER_T)(0x01ul << 8)),  
+	COSEL_NoCali_512hz		=	((CSP_REGISTER_T)(0x02ul << 8)),  
+	COSEL_NoCali_1hz		=	((CSP_REGISTER_T)(0x03ul << 8)),  
+}
+Rtc_ClockOutput_Mode_TypeDef;
+/**
+  * @brief  RTC AlarmA cmd select
+  */
+ typedef enum
+{
+	Alarm_A_EN 			=	((CSP_REGISTER_T)(0x01ul << 3)),  
+	Alarm_A_DIS			=	((CSP_REGISTER_T)(0x00ul << 3)),  
+
+}RTC_AlarmA_CMD_TypeDef;
+/**
+  * @brief  RTC AlarmB cmd  select
+  */
+ typedef enum
+{
+	Alarm_B_EN			=	((CSP_REGISTER_T)(0x01ul << 4)),  
+	Alarm_B_DIS			=	((CSP_REGISTER_T)(0x00ul << 4)),  
+}RTC_AlarmB_CMD_TypeDef;
+/**
+  * @brief  RTC FMT mode select
+  */
+ typedef enum
+{
+	RTC_24H			=	((CSP_REGISTER_T)(0x00ul << 5)),  
+	RTC_12H			=	((CSP_REGISTER_T)(0x01ul << 5)),  
+}RTC_FMT_MODE_TypeDef;
+/**
+  * @brief  RTC CPRD  select
+  */
+ typedef enum
+{
+	CPRD_NONE				=	((CSP_REGISTER_T)(0x00ul << 13)),  
+	CPRD_05S				=	((CSP_REGISTER_T)(0x01ul << 13)),  
+	CPRD_1S					=	((CSP_REGISTER_T)(0x02ul << 13)),  
+	CPRD_1MIN				=	((CSP_REGISTER_T)(0x03ul << 13)),  
+	CPRD_1HOUR				=	((CSP_REGISTER_T)(0x04ul << 13)),  
+	CPRD_1DAY				=	((CSP_REGISTER_T)(0x05ul << 13)),  
+	CPRD_1MONTH				=	((CSP_REGISTER_T)(0x06ul << 13)),  
+}RTC_CPRD_TypeDef;
+/**
+  * @brief  RTC EVTRG TRGSRC0 SET
+  */
+ typedef enum
+{	
+	RTC_EVTRG_TRGSRC0_DIS		=	((CSP_REGISTER_T)(0x00ul )),  
+	RTC_EVTRG_TRGSRC0_AlarmA	=	((CSP_REGISTER_T)(0x01ul )),  
+	RTC_EVTRG_TRGSRC0_AlarmB	=	((CSP_REGISTER_T)(0x02ul )),  
+	RTC_EVTRG_TRGSRC0_AlarmAB	=	((CSP_REGISTER_T)(0x03ul )),  
+	RTC_EVTRG_TRGSRC0_CPRD		=	((CSP_REGISTER_T)(0x04ul )),  
+}RTC_EVTRG_TRGSRC0_TypeDef;	
+/**
+  * @brief  RTC EVTRG TRGSRC1 SET
+  */
+ typedef enum
+{	
+	RTC_EVTRG_TRGSRC1_DIS		=	((CSP_REGISTER_T)(0x00ul<<4 )),  
+	RTC_EVTRG_TRGSRC1_AlarmA	=	((CSP_REGISTER_T)(0x01ul<<4 )),  
+	RTC_EVTRG_TRGSRC1_AlarmB	=	((CSP_REGISTER_T)(0x02ul<<4 )),  
+	RTC_EVTRG_TRGSRC1_AlarmAB	=	((CSP_REGISTER_T)(0x03ul<<4 )),  
+	RTC_EVTRG_TRGSRC1_CPRD		=	((CSP_REGISTER_T)(0x04ul<<4 )),  
+}RTC_EVTRG_TRGSRC1_TypeDef;	
+ typedef enum
+{
+	RTC_TRGSRC0_EN	=	((CSP_REGISTER_T)(0x00ul<<20 )),  
+	RTC_TRGSRC0_DIS	=	((CSP_REGISTER_T)(0x01ul<<20 )),  
+	RTC_TRGSRC1_EN	=	((CSP_REGISTER_T)(0x00ul<<21 )),  
+	RTC_TRGSRC1_DIS	=	((CSP_REGISTER_T)(0x01ul<<21 )),  
+}RTC_TRGSRCX_CMD_TypeDef;
+typedef struct 
+{
+	volatile uint8_t  u8Second; ///<闹钟分钟
+    volatile uint8_t  u8Minute; ///<闹钟分钟
+    volatile uint8_t  u8Hour;   ///<闹钟小时
+    volatile uint8_t  u8WeekOrData;   ///<闹钟周
+}RTC_Alarmset_T;
+
+typedef struct 
+{
+    volatile uint8_t  u8Second;      ///<秒    
+    volatile uint8_t  u8Minute;      ///<分
+    volatile uint8_t  u8Hour;        ///<时
+    volatile uint8_t  u8DayOfWeek;   ///<周
+    volatile uint8_t  u8Day;         ///<日    
+    volatile uint8_t  u8Month;       ///<月
+    volatile uint8_t  u8Year;        ///<年
+} RTC_time_t;
+
+
+/** @addtogroup RTC_Exported_functions
+  * @{
+  */	
+extern void RTC_RST_VALUE(void);
+extern void RTCCLK_CONFIG(U16_T DIVS , U16_T DIVA , RTC_CLKSRC_TypeDef CLKSRC_X);
+extern void RTC_ALM_IO_SET(Rtc_Output_Mode_TypeDef Rtc_Output_Mode_x );
+extern void RTC_TIMR_DATR_SET(RTC_time_t *RTC_TimeDate);
+extern void RTC_TIMR_DATR_Read(RTC_time_t *RTC_TimeDate);
+extern void RTC_Alarm_TIMR_DATR_SET(RTC_Alarm_Register_select_TypeDef Alarm_x  , RTC_Alarmset_T *RTC_AlarmA , RTC_Alarm_Second_mask_TypeDef RTC_Alarm_Second_x ,
+						RTC_Alarm_Minute_mask_TypeDef RTC_Alarm_Minute_x , RTC_Alarm_Hour_mask_TypeDef RTC_Alarm_Hour_x,
+						RTC_Alarm_DataOrWeek_mask_TypeDef RTC_Alarm_DataOrWeek_x,
+						RTC_Alarm_WeekData_select_TypeDef Alarm_x_selecte);
+extern void RTC_Function_Config(RTC_FMT_MODE_TypeDef RTC_FMT_MODE , RTC_CPRD_TypeDef RTC_CPRD_x , Rtc_ClockOutput_Mode_TypeDef Rtc_ClockOutput_x);
+extern void RTC_TRGSRC0_Config(RTC_EVTRG_TRGSRC0_TypeDef RTC_EVTRG_TRGSRC0_x , RTC_TRGSRCX_CMD_TypeDef RTC_TRGSRCX_CMD , U8_T Trgev0Prd);
+extern void RTC_TRGSRC1_Config(RTC_EVTRG_TRGSRC1_TypeDef RTC_EVTRG_TRGSRC1_x , RTC_TRGSRCX_CMD_TypeDef RTC_TRGSRCX_CMD , U8_T Trgev1Prd);
+extern void RTC_TRGSRC0_SWFTRG(void);
+extern void RTC_TRGSRC1_SWFTRG(void);
+extern void RTC_Start(void);
+extern void RTC_Stop(void);					
+extern void RTC_AlarmA_TIMR_DATR_Read(RTC_Alarmset_T *RTC_AlarmA);						
+extern void RTC_AlarmB_TIMR_DATR_Read(RTC_Alarmset_T *RTC_AlarmB);
+extern void RTC_Int_Enable(RTC_INT_TypeDef RTC_X_INT);
+extern void RTC_Int_Disable(RTC_INT_TypeDef RTC_X_INT);
+extern void RTC_Vector_Int_Enable(void);
+extern void RTC_Vector_Int_Disable(void);
+extern void RTC_WakeUp_Enable(void);
+extern void RTC_WakeUp_Disable(void);
+extern RTC_time_t  RTC_TimeDate_buf;
+extern RTC_Alarmset_T RTC_AlarmA_buf;
+extern RTC_Alarmset_T RTC_AlarmB_buf;	
+	
+#endif   /**< apt32f102_rtc_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_sio.h b/Source/include/apt32f102_sio.h
new file mode 100644
index 0000000..e090013
--- /dev/null
+++ b/Source/include/apt32f102_sio.h
@@ -0,0 +1,211 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_sio.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_sio_H
+#define _apt32f102_sio_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+
+#define SIO_RESET_VALUE  (0x00000000)
+
+
+//--------------------------------------------------------------------------------
+//-----------------------------SIO  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  SIO IO group register
+  */
+typedef enum
+{
+    SIO_PA02  = 0,
+	SIO_PA03  = 1,
+	SIO_PA012 = 2,
+	SIO_PB01  = 3,
+}SIO_IOG_TypeDef;
+/**
+  * @brief  SIO CLK EN register
+  */
+typedef enum
+{
+    SIOCLK_DIS = 0,
+	SIOCLK_EN = 1,
+}SIO_CLK_TypeDef;
+/**
+  * @brief  SIO TXDEB register
+  */
+typedef enum
+{
+    SIO_TXDEB_1CYCLE = (0<<1),
+	SIO_TXDEB_2CYCLE = (1<<1),
+	SIO_TXDEB_3CYCLE = (2<<1),
+	SIO_TXDEB_4CYCLE = (3<<1),
+	SIO_TXDEB_5CYCLE = (4<<1),
+	SIO_TXDEB_6CYCLE = (5<<1),
+	SIO_TXDEB_7CYCLE = (6<<1),
+	SIO_TXDEB_8CYCLE = (7<<1),
+}SIO_RXDEB_TypeDef;
+/**
+  * @brief  SIO IO IDLE STATUS register
+  */
+typedef enum
+{
+    SIO_IDLE_Z = 0,
+	SIO_IDLE_HIGH = 1,
+	SIO_IDLE_LOW = 2,
+}SIO_IDLEST_TypeDef;
+/**
+  * @brief  SIO TX DIR register
+  */
+typedef enum
+{
+    SIO_TX_LSB = (0<<2),
+	SIO_TX_MSB = (1<<2),
+}SIO_TXDIR_TypeDef;
+/**
+  * @brief  SIO LENOBH register
+  */
+typedef enum
+{
+    SIO_OBH_1BIT = (0<<8),
+	SIO_OBH_2BIT = (1<<8),
+	SIO_OBH_3BIT = (2<<8),
+	SIO_OBH_4BIT = (3<<8),
+	SIO_OBH_5BIT = (4<<8),
+	SIO_OBH_6BIT = (5<<8),
+	SIO_OBH_7BIT = (6<<8),
+	SIO_OBH_8BIT = (7<<8),
+}SIO_LENOBH_TypeDef;
+/**
+  * @brief  SIO LENOBL register
+  */
+typedef enum
+{
+    SIO_OBL_1BIT = (0<<11),
+	SIO_OBL_2BIT = (1<<11),
+	SIO_OBL_3BIT = (2<<11),
+	SIO_OBL_4BIT = (3<<11),
+	SIO_OBL_5BIT = (4<<11),
+	SIO_OBL_6BIT = (5<<11),
+	SIO_OBL_7BIT = (6<<11),
+	SIO_OBL_8BIT = (7<<11),
+}SIO_LENOBL_TypeDef;
+/**
+  * @brief  SIO RX EDGE register
+  */
+typedef enum
+{
+    SIO_RX_RISE = 0,
+	SIO_RX_FALL = 1,
+	SIO_RX_RISE_FALL = 2,
+}SIO_BSTSEL_TypeDef;
+/**
+  * @brief  SIO RX TRG MODE register
+  */
+typedef enum
+{
+    SIO_RX_DEB = (0<<3),
+	SIO_RX_FLT30NS = (1<<3),
+}SIO_TRGMODE_TypeDef;
+/**
+  * @brief  SIO RX ALIGNEN register
+  */
+typedef enum
+{
+    SIO_RX_ALIGNDIS = (0<<28),
+	SIO_RX_ALIGNEN = (1<<28),
+}SIO_ALIGNEN_TypeDef;
+/**
+  * @brief  SIO RX DIR register
+  */
+typedef enum
+{
+    SIO_RX_MSB = (0<<29),
+	SIO_RX_LSB = (1<<29),
+}SIO_RXDIR_TypeDef;
+/**
+  * @brief  SIO RX MODE register
+  */
+typedef enum
+{
+    SIO_RMODE0 = (0<<30),
+	SIO_RMODE1 = (1<<30),
+}SIO_RXMODE_TypeDef;
+/**
+  * @brief  SIO BREAKEN register
+  */
+typedef enum
+{
+    SIO_BREAKDIS = (0<<0),
+	SIO_BREAKEN = (1<<0),
+}SIO_BREAKEN_TypeDef;
+/**
+  * @brief  SIO BREAKLVL register
+  */
+typedef enum
+{
+    SIO_BREAKLVL_LOW = (0<<1),
+	SIO_BREAKLVL_HIGH = (1<<1),
+}SIO_BREAKLVL_TypeDef;
+/**
+  * @brief  SIO TORSTEN register
+  */
+typedef enum
+{
+    SIO_TORSTDIS = (0<<15),
+	SIO_TORSTEN = (1<<15),
+}SIO_TORSTEN_TypeDef;
+/**
+  * @brief  LPT INT MASK SET/CLR  Set
+  */
+typedef enum
+{
+	SIO_TXDNE     	=	(0x01 << 0),  
+	SIO_RXDNE    	=	(0x01 << 1),      
+	SIO_TXBUFEMPT   =	(0x01 << 2), 
+	SIO_RXBUFEMPT	=	(0x01 << 3), 
+	SIO_BREAK		=	(0x01 << 4), 
+	SIO_TIME		=	(0x01 << 5), 
+}SIO_IMSCR_TypeDef;  
+
+
+
+#define TX_D0 (0X00)
+#define TX_D1 (0X01)
+#define TX_DL (0X02)
+#define TX_DH (0X03)
+
+
+extern void SIO_DeInit(void);
+extern void SIO_IO_Init(SIO_IOG_TypeDef IOGx);
+extern void SIO_TX_Init(SIO_CLK_TypeDef CLKX,U8_T TCKPRSX);
+extern void SIO_TX_Configure(SIO_IDLEST_TypeDef IDLEX,SIO_TXDIR_TypeDef TXDIRX,U8_T TXBUFLENX,U8_T TXCNTX,U8_T D0DURX,U8_T D1DURX,SIO_LENOBH_TypeDef LENOBHX,
+					SIO_LENOBL_TypeDef LENOBLX,U8_T HSQX,U8_T LSQX);
+extern void SIO_TXBUF_Set(U8_T D30,U8_T D28,U8_T D26,U8_T D24,U8_T D22,U8_T D20,U8_T D18,U8_T D16,
+					U8_T D14,U8_T D12,U8_T D10,U8_T D08,U8_T D06,U8_T D04,U8_T D02,U8_T D00);
+extern void SIO_RX_Init(SIO_CLK_TypeDef CLKX,SIO_RXDEB_TypeDef RXDEBX,U8_T DEBCKSX);
+extern void SIO_RX_Configure0(SIO_BSTSEL_TypeDef BSTSELX,SIO_TRGMODE_TypeDef TRGMX,U8_T SPLCNTX,U8_T EXTRACTX,U8_T HITHRX,
+					SIO_ALIGNEN_TypeDef ALIGNX,SIO_RXDIR_TypeDef RXDIRX,SIO_RXMODE_TypeDef RXMODEX,U8_T RXLENX,U8_T RXBUFLENX,U8_T RXKPRSX);
+extern void SIO_RX_Configure1(SIO_BREAKEN_TypeDef BREAKX,SIO_BREAKLVL_TypeDef BREAKLVLX,U8_T BREKCNTX,SIO_TORSTEN_TypeDef TORSTX,U8_T TOCNTX);
+extern void SIO_ConfigInterrupt_CMD(FunctionalStatus NewState,SIO_IMSCR_TypeDef SIO_IMSCR_X);
+extern void SIO_INT_ENABLE(void);
+extern void SIO_INT_DISABLE(void);
+/*************************************************************/
+
+#endif   /**< apt32f102_sio_H */
\ No newline at end of file
diff --git a/Source/include/apt32f102_spi.h b/Source/include/apt32f102_spi.h
new file mode 100644
index 0000000..0829ccd
--- /dev/null
+++ b/Source/include/apt32f102_spi.h
@@ -0,0 +1,293 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_spi.c
+  * @author  APT AE Team
+  * @version V1.025
+  * @date    2020/06/08
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/ 
+#ifndef _apt32f102_spi_H
+#define _apt32f102_spi_H
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+/******************************************************************************
+************************** spi Registers Definition ****************************
+******************************************************************************/
+/*******************************************************************************
+* SSPCR0 : Control Register 0
+*******************************************************************************/
+#define SSP_DSS(val)	(((val-1) & 0x0Ful) << 0)	/**< Data Size Select */
+#define SSP_FRF(val)	(((val) & 0x03ul) << 4)	/**< Frame Format */
+#define SSP_SPO  	   (0x01ul << 6)			/**< SSPCLK Polarity */
+#define SSP_SPH  	    (0x01ul << 7)			/**< SSPCLK Phase */
+#define SSP_SCR(val)	(((val) & 0x0FFul) << 8)	/**< Serial Clock Rate */
+
+/*******************************************************************************
+* SSPCR1 : Control Register 1
+*******************************************************************************/
+#define SSP_LBM  	    (0x01ul << 0)		/**< Loopback mode */
+#define SSP_SSE  	    (0x01ul << 1)		/**< Synchronous Serial Port Enable */
+#define SSP_MS 	 	    (0x01ul << 2)		/**< Master or Slave Mode Select */
+#define SSP_SOD  	    (0x01ul << 3)		/**< Slave Mode Output Disable */
+#define SSP_RXIFLSELFRF(val)    (((val) & 0x07ul) << 4)
+						/**< Receive interrupt FIFO level select */
+
+/*******************************************************************************
+* SSPDR : Data Register
+*******************************************************************************/
+#define SSP_DATA(val)	(((val) & 0x0FFFF) << 0)	/**< Transmit/Receive FIFO */
+
+/*******************************************************************************
+* SSPSR : Status Register
+*******************************************************************************/
+#define SSP_TFE  	    (0x01ul << 0)		/**< Transmit FIFO Empty */
+#define SSP_TNF  	    (0x01ul << 1)		/**< Transmit FIFO is not Full */
+#define SSP_RNE 	 	(0x01ul << 2)		/**< Receive is not Empty */
+#define SSP_RFF 	 	(0x01ul << 3)		/**< Receive FIFO Full */
+#define SSP_BSY	 	    (0x01ul << 4)		/**< PrimeCell SSP Busy Flag */
+
+/*******************************************************************************
+* SSPCPSR : Clock prescale register
+*******************************************************************************/
+#define SSP_CPSDVSR(val) (((val) & 0x0FF) << 0)	/**< Clock Prescale Devisor */
+
+/*******************************************************************************
+* SSPIMSC : Interrupt mask set and clear register
+*******************************************************************************/
+#define SSP_RORIM  	(0x01ul << 0)		/**< Receive Overrun Interrupt Mask */
+#define SSP_RTIM  	(0x01ul << 1)		/**< Receive Timeout Interrupt Mask */
+#define SSP_RXIM 	(0x01ul << 2)		/**< Receive FIFO Interrupt Mask */
+#define SSP_TXIM 	(0x01ul << 3)		/**< Transmit FIFO interrupt Mask */
+
+/*******************************************************************************
+* SSPRIS : Raw interrupt status register
+*******************************************************************************/
+#define SSP_RORRIS 	(0x01ul << 0)
+			/**< Gives the Raw Interrupt Status of the SSPRORINTR Interrupt */
+#define SSP_RTRIS   (0x01ul << 1)
+			/**< Gives the raw interrupt state of the SSPRTINTR interrupt */
+#define SSP_RXRIS 	(0x01ul << 2)
+			/**< Gives the raw interrupt state of the SSPRXINTR interrupt  */
+#define SSP_TXRIS	(0x01ul << 3)
+			/**< Gives the raw interrupt state of the SSPTXINTR interrupt  */
+
+/*******************************************************************************
+* SSPMIS : Masked interrupt status register
+*******************************************************************************/
+#define SSP_RORRIS  (0x01ul << 0)
+/**<Gives the receive over run masked interrupt status of SSPRORINTR interrupt*/
+#define SSP_RTRIS  	(0x01ul << 1)
+/**<Gives the receive timeout masked interrupt state of SSPRTINTR interrupt */
+#define SSP_RXRIS 	(0x01ul << 2)
+/**<Gives the receive FIFO masked interrupt state of SSPRXINTR interrupt */
+#define SSP_TXRIS	(0x01ul << 3)
+/**<Gives the transmit FIFO masked interrupt state of SSPTXINTR interrupt */
+
+/*******************************************************************************
+* SSPICR : Interrupt clear register
+*******************************************************************************/
+#define SSP_RORIC 	(0x01ul << 0)		/**< Clears the SSPRORINTR interrupt */
+#define SSP_RTIC  	(0x01ul << 1)		/**< Clears the SSPRTINTR interrupt */
+
+
+/*******************************************************************************
+***************************** SSP REGISTER MASK  *******************************
+*******************************************************************************/
+#define SSP_CR0_MASK 	(0x0000FFFFul)  /**< Control Register 0 mask */
+#define SSP_CR1_MASK 	(0x0000007Ful)  /**< Control Register 1 mask */
+#define SSP_DR_MASK 	(0x0000FFFFul)
+	/**< Receive FIFO(read) and transmit FIFO data register(write) mask */
+#define SSP_SR_MASK    (0x0000001Ful)  /**< Status register  mask */
+#define SSP_CPSR_MASK 	(0x000000FFul)  /**< Clock prescale register mask */
+#define SSP_IMSCR_MASK	(0x0000000Ful)
+				/**< Interrupt mask set and clear register mask */
+#define SSP_RISR_MASK 	(0x0000000Ful)  /**< Raw interrupt status register mask*/
+#define SSP_MISR_MASK 	(0x0000000Ful)
+				 /**< Masked interrupt status register mask */
+#define SSP_ICR_MASK 	(0x00000003ul)  /**< Interrupt clear register mask */
+
+/*******************************************************************************
+************************* SSP REGISTER RESET VALUE  ****************************
+*******************************************************************************/
+#define SSP_CR0_RST 		(0x00000000ul) /**< Control Register 0 reset value */
+#define SSP_CR1_RST 		(0x00000010ul) /**< Control Register 1 reset value */
+#define SSP_DR_RST		(0x00000000ul)
+	/**< Receive FIFO(read) and transmit FIFO data register(write) reset value */
+#define SSP_SR_RST		(0x00000003ul)  /**< Status register  reset value */
+#define SSP_CPSR_RST	    (0x00000000ul)
+							/**< Clock prescale register reset value */
+#define SSP_IMSCR_RST 	(0x00000000ul)
+							/**< Interrupt mask set and clear register reset value */
+#define SSP_RISR_RST 		(0x00000008ul)
+							/**< Raw interrupt status register reset value*/
+#define SSP_MISR_RST 		(0x00000000ul)
+							 /**< Masked interrupt status register reset value */
+#define SSP_ICR_RST 		(0x00000000ul)
+							/**< Interrupt clear register reset value */
+
+/*******************************************************************************
+*****************************  SSP MACROS DEFINITION  **************************
+*******************************************************************************/
+/** Set CR0 register */
+#define CSP_SSP_SET_CR0(ssp, val)	((ssp)->CR0 = (val & 0xFFFFFFCFul))
+
+/** Get CR0 register */
+#define CSP_SSP_GET_CR0(ssp)		    ((ssp)->CR0)
+
+/** Set CR1 register */
+#define CSP_SSP_SET_CR1(ssp, val)	((ssp)->CR1 = (val & 0xFFFF000Ful))
+
+/** Get CR1 register */
+#define CSP_SSP_GET_CR1(ssp)		    ((ssp)->CR1)
+
+/** Set DR register */
+#define CSP_SSP_SET_DR(ssp, val)		((ssp)->DR = (val))
+
+/** Get DR register */
+#define CSP_SSP_GET_DR(ssp)			((ssp)->DR)
+
+/** Get SR register */
+#define CSP_SSP_GET_SR(ssp)			((ssp)->SR)
+
+/** Set CPSR register */
+#define CSP_SSP_SET_CPSR(ssp, val)	((ssp)->CPSR = (val & 0xFFFF00FFul))
+
+/** Get CPSR register */
+#define CSP_SSP_GET_CPSR(ssp)		((ssp)->CPSR)
+
+/** Set IMSC register */
+#define CSP_SSP_SET_IMSCR(ssp, val)	((ssp)->IMSC = (val & 0xFFFF000Ful))
+
+/** Get IMSC register */
+#define CSP_SSP_GET_IMSCR(ssp)		((ssp)->IMSCR)
+
+/** Get RIS register */
+#define CSP_SSP_GET_RISR(ssp)			((ssp)->RISR)
+
+/** Get MIS register */
+#define CSP_SSP_GET_MISR(ssp)		    ((ssp)->MISR
+
+/** Set ICR register */
+#define CSP_SSP_SET_ICR(ssp, val)	((ssp)->ICR = (val & 0xFFFF0003ul))
+
+
+
+/** @addtogroup spi Registers RST  Value
+  * @{
+  */
+#define SPI_CR0_RST          	(0x00000000)    	/**< CR0 reset value      */
+#define SPI_CR1_RST          	(0x00000000)    	/**< CR1 reset value      */
+#define SPI_DR_RST          	(0x00000000)   	 	/**< DR reset value       */
+#define SPI_SR_RST          	(0x00000003)    	/**< SR reset value       */
+#define SPI_CPSR_RST          	(0x00000000)    	/**< CPSR reset value     */
+#define SPI_IMSCR_RST          	(0x00000000)   	 	/**< IMSCR reset value    */
+#define SPI_RISR_RST          	(0x00000008)    	/**< RISR reset value     */
+#define SPI_MISR_RST          	(0x00000000)    	/**< MISR reset value     */
+#define SPI_ICR_RST          	(0x00000000)    	/**< ICR reset value      */
+
+/**
+  * @brief  SPI INT MASK SET/CLR  Set
+  */
+typedef enum
+{
+	SPI_PORIM     	=	((CSP_REGISTER_T)(0x01ul << 0)),      /**< Receive overflow Interrupt     */
+	SPI_RTIM    	=	((CSP_REGISTER_T)(0x01ul << 1)),      /**< Receive timeout Interrupt     */
+	SPI_RXIM    	=	((CSP_REGISTER_T)(0x01ul << 2)),      /**< Receive FIFO Interrupt     */
+	SPI_TXIM    	=	((CSP_REGISTER_T)(0x01ul << 3))      /**< transmit FIFO Interrupt     */
+}SPI_IMSCR_TypeDef; 
+
+/**
+  * @brief  SPI IO selection
+  */
+typedef enum
+{
+	SPI_G0 = 0,
+    SPI_G1 = 1,
+	SPI_G2 = 2
+}SPI_IO_TypeDef; 
+
+/**
+  * @brief  SPI Data Size selection
+  */
+typedef enum
+{
+	SPI_DATA_SIZE_4BIT	=	3,
+	SPI_DATA_SIZE_5BIT	=	4,
+	SPI_DATA_SIZE_6BIT	=	5,
+	SPI_DATA_SIZE_7BIT	=	6,
+	SPI_DATA_SIZE_8BIT	=	7,
+	SPI_DATA_SIZE_9BIT	=	8,
+	SPI_DATA_SIZE_10BIT	=	9,
+	SPI_DATA_SIZE_11BIT	=	10,
+	SPI_DATA_SIZE_12BIT	=	11,
+	SPI_DATA_SIZE_13BIT	=	12,
+	SPI_DATA_SIZE_14BIT	=	13,
+	SPI_DATA_SIZE_15BIT	=	14,
+	SPI_DATA_SIZE_16BIT	=	15
+}SPI_DATA_SIZE_TypeDef;
+
+/**
+  * @brief  SPI SPO selection
+  */
+typedef enum
+{
+	SPI_SPO_0	=	0,
+	SPI_SPO_1	=	1
+}SPI_SPO_TypeDef;
+
+/**
+  * @brief  SPI SPH selection
+  */
+typedef enum
+{
+	SPI_SPH_0	=	0,
+	SPI_SPH_1	=	1
+}SPI_SPH_TypeDef;
+
+/**
+  * @brief  SPI LBM selection
+  */
+typedef enum
+{
+	SPI_LBM_0	=	0,
+	SPI_LBM_1	=	1
+}SPI_LBM_TypeDef;
+
+/**
+  * @brief  SPI RXIFLSEL selection
+  */
+typedef enum
+{
+	SPI_RXIFLSEL_1_8	=	0x01,
+	SPI_RXIFLSEL_1_4	=	0x02,
+	SPI_RXIFLSEL_1_2	=	0x04
+}SPI_RXIFLSEL_TypeDef;
+/******************************************************************************
+********************** SPI External Functions Declaration **********************
+******************************************************************************/
+extern void SPI_DeInit(void);
+extern void SPI_NSS_IO_Init(U8_T SPI_NSS_IO_GROUP);
+extern void SPI_Master_Init(SPI_IO_TypeDef SPI_IO , SPI_DATA_SIZE_TypeDef SPI_DATA_SIZE_x , SPI_SPO_TypeDef SPI_SPO_X , SPI_SPH_TypeDef SPI_SPH_X , SPI_LBM_TypeDef SPI_LBM_X , SPI_RXIFLSEL_TypeDef SPI_RXIFLSEL_X , U8_T SPI_SCR , U8_T SPI_CPSDVSR );
+extern void SPI_Slave_Init(SPI_IO_TypeDef SPI_IO , SPI_DATA_SIZE_TypeDef SPI_DATA_SIZE_x , SPI_SPH_TypeDef SPI_SPH_X , SPI_RXIFLSEL_TypeDef SPI_RXIFLSEL_X , U8_T SPI_SCR , U8_T SPI_CPSDVSR);
+extern void SPI_WRITE_BYTE(U16_T wdata);
+extern void SPI_READ_BYTE(U16_T wdata , volatile U16_T *rdata , U8_T Longth);
+extern void SPI_ConfigInterrupt_CMD(FunctionalStatus NewState,SPI_IMSCR_TypeDef SPI_IMSCR_X);
+extern void SPI_Int_Enable(void);
+extern void SPI_Int_Disable(void);
+extern void SPI_Wakeup_Enable(void);
+extern void SPI_Wakeup_Disable(void);
+
+#endif   /**< apt32f102_spi_H */
+
+/******************* (C) COPYRIGHT 2018 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_syscon.h b/Source/include/apt32f102_syscon.h
new file mode 100644
index 0000000..f023b74
--- /dev/null
+++ b/Source/include/apt32f102_syscon.h
@@ -0,0 +1,526 @@
+/*
+  ******************************************************************************
+  * @file    main.c
+  * @author  APT AE Team
+  * @version V1.09
+  * @date    2021/07/30
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+  
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_syscon_H
+#define _apt32f102_syscon_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+/******************************************************************************
+************************* syscon Registers Definition *************************
+******************************************************************************/
+/** @addtogroup SYSCON Registers Reset Value
+  * @{
+  */
+
+#define SYSCON_IDCCR_RST     	((CSP_REGISTER_T)0x00000001)
+#define SYSCON_GCER_RST     	((CSP_REGISTER_T)0x00000000)
+#define SYSCON_GCDR_RST     	((CSP_REGISTER_T)0x00000000)
+#define SYSCON_GCSR_RST     	((CSP_REGISTER_T)0x00081103)
+#define SYSCON_CKST_RST			((CSP_REGISTER_T)0x00000103)
+#define SYSCON_RAMCHK_RST		((CSP_REGISTER_T)0x0000ffff)
+#define SYSCON_EFLCHK_RST		((CSP_REGISTER_T)(0X0<<24)|0xffffff)
+#define SYSCON_SCLKCR_RST      	((CSP_REGISTER_T)0xD22Dul<<16)
+#define SYSCON_PCLKCR_RST     	((CSP_REGISTER_T)0x00000100)
+#define SYSCON_PCER0_RST   		((CSP_REGISTER_T)0x00000000)
+#define SYSCON_PCDR0_RST  		((CSP_REGISTER_T)0x00000000)
+#define SYSCON_PCSR0_RST  		((CSP_REGISTER_T)0x005107d1)
+#define SYSCON_PCER1_RST     	((CSP_REGISTER_T)0x00000000)
+#define SYSCON_PCDR1_RST     	((CSP_REGISTER_T)0x00000000)
+#define SYSCON_PCSR1_RST 		((CSP_REGISTER_T)0x3023f80)
+#define SYSCON_OSTR_RST  		((CSP_REGISTER_T)0x70ff3bff)
+#define SYSCON_LVDCR_RST  		((CSP_REGISTER_T)0x0000000a)
+#define	SYSCON_CLCR_RST			((CSP_REGISTER_T)0x00000100)
+#define	SYSCON_PWRCR_RST		((CSP_REGISTER_T)0x141f1f00)
+#define	SYSCON_IMER_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_IMDR_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_IMCR_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_IAR_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_ICR_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_RISR_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_MISR_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIRT_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIFT_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIER_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIDR_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIMR_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIAR_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXICR_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EXIRS_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_IWDCR_RST		((CSP_REGISTER_T)0x0000070C)
+#define	SYSCON_IWDCNT_RST		((CSP_REGISTER_T)0x000003fe)
+#define	SYSCON_PWROPT_RST		((CSP_REGISTER_T)0x00004040)
+#define	SYSCON_EVTRG_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EVPS_RST			((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_EVSWF_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_UREG0_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_UREG1_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_UREG2_RST		((CSP_REGISTER_T)0x00000000)
+#define	SYSCON_UREG3_RST		((CSP_REGISTER_T)0x00000000)
+
+//SCLKCR
+#define SYSCLK_KEY 		(0xD22Dul<<16)
+
+//PCLK CONTROL
+#define PCLK_KEY 	 	(0xC33Cul<<16)
+
+//IDCCR 
+#define	CLKEN			(0X01ul)
+#define	CPUFTRST_EN		(0X00<<1)
+#define	CPUFTRST_DIS	(0XA<<1)
+#define	SWRST			(0X01ul<<7)
+#define IDCCR_KEY 		(0xE11Eul<<16)
+
+//LVDCR		
+#define	LVDFLAG			(0x01ul<<15)					//0: VDD is higher than LVD threshold selected with INTDET_LVL bits.   1: VDD is lower than LVD threshold selected with INTDET_LVL bits
+#define LVD_KEY 		(0xB44Bul<<16)
+
+//IECR IEDR IAR ICR IMSR RISR ISR
+//Interrupt Enable/Disable/Active/Clear Control Register
+//Interrupt Masking/Raw Interrupt/Masked Status Register
+#define ISOSC_ST 		(0x01ul)
+#define IMOSC_ST 		(0x01ul<<1)
+#define ESOSC_ST 		(0x01ul<<2)
+#define EMOSC_ST 		(0x01ul<<3)
+#define HFOSC_ST 		(0x01ul<<4)
+#define SYSCLK_ST 		(0x01ul<<7)
+#define	IWDT_INT_ST 	(0x01ul<<8)
+#define	WKI_INT_ST		(0x01ul<<9)
+#define RAMERRINT_ST	(0X01ul<<10)
+#define	LVD_INT_ST 		(0x01ul<<11)
+#define HWD_ERR_ST			(0X01ul<<12)
+#define EFL_ERR_ST		(0X01ul<<13)
+#define OPTERR_INT		(0X01ul<<14)
+#define	EM_CMLST_ST 	(0x01ul<<18)
+#define	EM_EVTRG0_ST 	(0x01ul<<19)
+#define	EM_EVTRG1_ST 	(0x01ul<<20)
+#define	EM_EVTRG2_ST 	(0x01ul<<21)
+#define	EM_EVTRG3_ST 	(0x01ul<<22)
+#define	CMD_ERR_ST		(0x01ul<<29)
+
+//RSR
+//SYSCON Reset Status Register
+#define	PORST			(0X01ul)
+#define	LVRRST			(0X01ul<<1)
+#define	EXTRST			(0X01ul<<2)
+#define	ALVRST			(0X01ul<<3)
+#define	IWDRST			(0X01ul<<4)
+#define	EMCMRST			(0X01ul<<6)
+#define	CPURSTREQ		(0X01ul<<7)
+#define	SWRST_RSR		(0X01ul<<8)
+#define	CPUFAULT_RSR	(0X01ul<<9)
+#define	SRAM_RSR		(0X01ul<<11)
+#define	EFL_ERR			(0X01ul<<12)
+#define WWDTRST			(0X01ul<<13)
+
+//IWDCR
+#define	Check_IWDT_BUSY			(0x01ul<<12)					//Indicates the independent watchdog operation
+#define IWDT_KEY 				(0x8778ul<<16)
+
+//IWDCNT
+#define	CLR_IWDT				(0x5aul<<24)
+
+//IWDEDR
+#define	Enable_IWDT				(0x0)
+#define	Disable_IWDT			(0x55aa)
+#define IWDTEDR_KEY 			(0x7887ul<<16)
+
+#define CORET_IRQ   0
+#define SYSCON_IRQ  1
+#define IFC_IRQ     2
+#define ADC_IRQ     3
+#define EPT0_IRQ    4
+#define WWDT_IRQ    6
+#define EXI0_IRQ    7
+#define EXI1_IRQ    8
+#define GPT0_IRQ    9 
+#define RTC_IRQ     12
+#define UART0_IRQ   13
+#define UART1_IRQ   14
+#define UART2_IRQ   15
+#define I2C_IRQ     17
+#define SPI_IRQ     19
+#define SIO_IRQ     20
+#define EXI2_IRQ    21
+#define EXI3_IRQ    22
+#define EXI4_IRQ    23
+#define CA_IRQ      24
+#define TKEY_IRQ    25
+#define LPT_IRQ     26
+#define BT0_IRQ     28
+#define BT1_IRQ     29
+
+/**
+  * @brief  SYSCON General Control
+  */
+typedef enum
+{
+	ENDIS_ISOSC			=	 	(CSP_REGISTER_T)(0x01ul),
+	ENDIS_IMOSC 		=		(CSP_REGISTER_T)(0x01ul<<1),
+	ENDIS_EMOSC 		=		(CSP_REGISTER_T)(0x01ul<<3),
+	ENDIS_HFOSC 		=		(CSP_REGISTER_T)(0x01ul<<4),
+	ENDIS_IDLE_PCLK 	=		(CSP_REGISTER_T)(0x01ul<<8),
+	ENDIS_SYSTICK 		=		(CSP_REGISTER_T)(0x01ul<<11)
+}SYSCON_General_CMD_TypeDef;
+
+/**
+  * @brief  Selected SYSCON CLK
+  */
+typedef enum
+{
+	SYSCLK_IMOSC	=		(CSP_REGISTER_T)0x0ul,				//IMOSC  selected
+	SYSCLK_EMOSC	=		(CSP_REGISTER_T)0x1ul,				//EMOSC  selected
+	SYSCLK_HFOSC	=		(CSP_REGISTER_T)0x2ul,				//HFOSC  selected
+	SYSCLK_ISOSC 	=		(CSP_REGISTER_T)0x4ul				//ISOSC	 selected
+}SystemCLK_TypeDef;
+/**
+  * @brief  SYSCON CLK Div
+  */
+typedef enum
+{
+	HCLK_DIV_1   =		(CSP_REGISTER_T)(0x1ul<<8),				
+	HCLK_DIV_2   =		(CSP_REGISTER_T)(0x2ul<<8),
+	HCLK_DIV_3   =		(CSP_REGISTER_T)(0x3ul<<8),
+	HCLK_DIV_4   =		(CSP_REGISTER_T)(0x4ul<<8),
+	HCLK_DIV_5   =		(CSP_REGISTER_T)(0x5ul<<8),
+	HCLK_DIV_6   =		(CSP_REGISTER_T)(0x6ul<<8),
+	HCLK_DIV_7   =		(CSP_REGISTER_T)(0x7ul<<8),
+	HCLK_DIV_8   =		(CSP_REGISTER_T)(0x8ul<<8),
+	HCLK_DIV_12  =		(CSP_REGISTER_T)(0x9ul<<8),
+	HCLK_DIV_16  =		(CSP_REGISTER_T)(0xAul<<8),
+	HCLK_DIV_24  =		(CSP_REGISTER_T)(0xBul<<8),
+	HCLK_DIV_32  =		(CSP_REGISTER_T)(0xCul<<8),
+	HCLK_DIV_64  =		(CSP_REGISTER_T)(0xDul<<8),
+	HCLK_DIV_128 =		(CSP_REGISTER_T)(0xEul<<8),
+	HCLK_DIV_256 =		(CSP_REGISTER_T)(0xFul<<8)
+}SystemCLK_Div_TypeDef;
+
+/**
+  * @brief  PCLK Div
+  */
+typedef enum
+{
+	PCLK_DIV_1   =		(CSP_REGISTER_T)(0x00ul<<8),				
+	PCLK_DIV_2   =		(CSP_REGISTER_T)(0x01ul<<8),
+	PCLK_DIV_4   =		(CSP_REGISTER_T)(0x02ul<<8),
+	PCLK_DIV_8   =		(CSP_REGISTER_T)(0x04ul<<8),
+	PCLK_DIV_16  =		(CSP_REGISTER_T)(0x08ul<<8)
+}PCLK_Div_TypeDef;
+  
+/**
+  * @brief  LVD enable and disable
+  */
+typedef enum
+{
+	ENABLE_LVDEN		=		(CSP_REGISTER_T)0x00,			//Power down LVD module
+	DISABLE_LVDEN		=		(CSP_REGISTER_T)0x0a			//Power down LVD module
+}X_LVDEN_TypeDef;
+
+/**
+  * @brief  Detection voltage level to trigger the LVD interrupt
+  */
+typedef enum
+{
+	INTDET_LVL_2_1V		=	(CSP_REGISTER_T)(0X00ul<<8),					//2.1V	
+	INTDET_LVL_2_4V		=	(CSP_REGISTER_T)(0X01ul<<8),					//2.4V
+	INTDET_LVL_2_7V		=	(CSP_REGISTER_T)(0X02ul<<8),					//2.7V
+	INTDET_LVL_3_0V		=	(CSP_REGISTER_T)(0X03ul<<8),					//3.0V
+	INTDET_LVL_3_3V		=	(CSP_REGISTER_T)(0X04ul<<8),					//3.3V
+	INTDET_LVL_3_6V		=	(CSP_REGISTER_T)(0X05ul<<8),					//3.6V
+	INTDET_LVL_3_9V		=	(CSP_REGISTER_T)(0X06ul<<8),					//3.9V
+}INTDET_LVL_X_TypeDef;
+
+/**
+  * @brief  Detection voltage level to generate reset
+  */
+typedef enum
+{
+	RSTDET_LVL_1_9V		=		(CSP_REGISTER_T)(0X00ul<<12),			//1.9V
+	RSTDET_LVL_2_2V		=		(CSP_REGISTER_T)(0X01ul<<12),			//2.2V
+    RSTDET_LVL_2_5V		=		(CSP_REGISTER_T)(0X02ul<<12),			//2.5V
+	RSTDET_LVL_2_8V		=		(CSP_REGISTER_T)(0X03ul<<12),			//2.8V
+	RSTDET_LVL_3_1V		=		(CSP_REGISTER_T)(0X04ul<<12),			//3.1V
+	RSTDET_LVL_3_4V		=		(CSP_REGISTER_T)(0X05ul<<12),			//3.4V
+	RSTDET_LVL_3_7V		=		(CSP_REGISTER_T)(0X06ul<<12),			//3.7V
+	RSTDET_LVL_4_0V		=		(CSP_REGISTER_T)(0X07ul<<12)			//4.0V
+}RSTDET_LVL_X_TypeDef;
+
+/**
+  * @brief  Detection voltage level to trigger the LVD interrupt
+  */
+typedef enum
+{
+	ENABLE_LVD_INT		=		(CSP_REGISTER_T)(0X01ul<<11),			//ENABLE LVD INT
+	DISABLE_LVD_INT		=		(CSP_REGISTER_T)(0X00ul<<11)			//DISABLE LVD INT
+}X_LVD_INT_TypeDef;
+
+/**
+  * @brief  EXI PIN
+  */
+typedef enum
+{
+	EXI_PIN0		=		(CSP_REGISTER_T)(0X01ul),						
+	EXI_PIN1		=		(CSP_REGISTER_T)(0X01ul<<1),
+	EXI_PIN2		=		(CSP_REGISTER_T)(0X01ul<<2),
+	EXI_PIN3		=		(CSP_REGISTER_T)(0X01ul<<3),
+	EXI_PIN4		=		(CSP_REGISTER_T)(0X01ul<<4),
+	EXI_PIN5		=		(CSP_REGISTER_T)(0X01ul<<5),
+	EXI_PIN6		=		(CSP_REGISTER_T)(0X01ul<<6),
+	EXI_PIN7		=		(CSP_REGISTER_T)(0X01ul<<7),
+	EXI_PIN8		=		(CSP_REGISTER_T)(0X01ul<<8),
+	EXI_PIN9		=		(CSP_REGISTER_T)(0X01ul<<9),
+	EXI_PIN10		=		(CSP_REGISTER_T)(0X01ul<<10),
+	EXI_PIN11		=		(CSP_REGISTER_T)(0X01ul<<11),
+	EXI_PIN12		=		(CSP_REGISTER_T)(0X01ul<<12),
+	EXI_PIN13		=		(CSP_REGISTER_T)(0X01ul<<13),
+	EXI_PIN14		=		(CSP_REGISTER_T)(0X01ul<<14),
+	EXI_PIN15		=		(CSP_REGISTER_T)(0X01ul<<15),
+	EXI_PIN16		=		(CSP_REGISTER_T)(0X01ul<<16),
+	EXI_PIN17		=		(CSP_REGISTER_T)(0X01ul<<17),
+	EXI_PIN18		=		(CSP_REGISTER_T)(0X01ul<<18),
+	EXI_PIN19		=		(CSP_REGISTER_T)(0X01ul<<19),
+}SYSCON_EXIPIN_TypeDef;
+
+/**
+  * @brief  EXT register
+  */
+typedef enum
+{
+	_EXIRT		=		0,
+	_EXIFT		=		1,	
+}EXI_tringer_mode_TypeDef;
+
+
+/**
+  * @brief  SYSON IWDT TIME SET
+  */
+typedef enum
+{
+	IWDT_TIME_125MS		=	(CSP_REGISTER_T)(0x00ul<<8),						//IWDT_TIME      0x00fff			
+	IWDT_TIME_250MS		=	(CSP_REGISTER_T)(0x01ul<<8),						//IWDT_TIME      0x01fff
+	IWDT_TIME_500MS		=	(CSP_REGISTER_T)(0x02ul<<8),						//IWDT_TIME      0x03fff	
+	IWDT_TIME_1S		=	(CSP_REGISTER_T)(0x03ul<<8),						//IWDT_TIME      0x07fff
+	IWDT_TIME_2S		=	(CSP_REGISTER_T)(0x04ul<<8),						//IWDT_TIME      0x0ffff			//2M ISOSC  2sec
+	IWDT_TIME_3S		=	(CSP_REGISTER_T)(0x05ul<<8),						//IWDT_TIME      0x16fff
+	IWDT_TIME_4S		=	(CSP_REGISTER_T)(0x06ul<<8),						//IWDT_TIME      0x1ffff
+	IWDT_TIME_8S		=	(CSP_REGISTER_T)(0x07ul<<8)							//IWDT_TIME      0x3ffff
+}IWDT_TIME_TypeDef;  
+
+/**
+  * @brief  SYSON IWDT TIME DIV SET
+  */
+typedef enum
+{
+	IWDT_INTW_DIV_1		=	(0x00ul<<2),						//1/8 of IWDT_TIME
+	IWDT_INTW_DIV_2		=	(0x01ul<<2),						//2/8 of IWDT_TIME	
+	IWDT_INTW_DIV_3		=	(0x02ul<<2),						//3/8 of IWDT_TIME
+	IWDT_INTW_DIV_4		=	(0x03ul<<2),						//4/8 of IWDT_TIME
+	IWDT_INTW_DIV_5		=	(0x04ul<<2),						//5/8 of IWDT_TIME
+	IWDT_INTW_DIV_6		=	(0x05ul<<2),						//6/8 of IWDT_TIME
+	IWDT_INTW_DIV_7		=	(0x06ul<<2)							//7/8 of IWDT_TIME
+}IWDT_TIMEDIV_TypeDef;
+
+/**
+  * @brief  IMOSC SELECTE SET
+  */
+typedef enum
+{
+	IMOSC_SELECTE_5556K	=	(0x00ul<<0),
+	IMOSC_SELECTE_4194K	=	(0x01ul<<0),
+	IMOSC_SELECTE_2097K	=	(0x02ul<<0),
+	IMOSC_SELECTE_131K	=	(0x03ul<<0)
+}IMOSC_SELECTE_TypeDef;
+
+/**
+  * @brief  HFOSC SELECTE SET
+  */
+typedef enum
+{
+	HFOSC_SELECTE_48M	=	(0x0ul<<4),
+	HFOSC_SELECTE_24M	=	(0x1ul<<4),
+	HFOSC_SELECTE_12M	=	(0x2ul<<4),
+	HFOSC_SELECTE_6M	=	(0x3ul<<4)
+}HFOSC_SELECTE_TypeDef;
+
+/**
+  * @brief  EM Filter set
+  */
+typedef enum
+{
+	EM_FLSEL_5ns	=	(0x0ul<<26),
+	EM_FLSEL_10ns	=	(0x1ul<<26),
+	EM_FLSEL_15ns	=	(0x2ul<<26),
+	EM_FLSEL_20ns	=	(0x3ul<<26)
+}EM_Filter_TypeDef;
+/**
+  * @brief  EM Filter CMD
+  */
+typedef enum
+{
+	EM_FLEN_DIS	=	(0x0ul<<25),
+	EM_FLEN_EN	=	(0x1ul<<25)
+}EM_Filter_CMD_TypeDef;
+/**
+  * @brief  EM LFSEL BIT
+  */
+typedef enum
+{
+	EM_LFSEL_DIS	=	(0x0ul<<10),
+	EM_LFSEL_EN		=	(0x1ul<<10)
+}EM_LFSEL_TypeDef;
+/**
+  * @brief  EM Systemclk data
+  */
+typedef enum
+{
+	EMOSC_24M		=	0,
+	EMOSC_16M		=	1,
+	EMOSC_12M		=	2,
+	EMOSC_8M		=	3,
+	EMOSC_4M		=	4,
+	EMOSC_36K		=	5,
+	IMOSC			=	6,
+	ISOSC			=	7,
+	HFOSC_48M		=	8,
+	HFOSC_24M		=	9,
+	HFOSC_12M		=	10,
+	HFOSC_6M		=	11
+}SystemClk_data_TypeDef;
+typedef enum
+{
+	CLO_PA02		=	0,						//PA0.0 as clo
+	CLO_PA08		=	1,						//PA0.8 as clo	
+}CLO_IO_TypeDef;
+
+typedef enum
+{
+	INTDET_POL_fall				=	(1<<6),						//fall Trigger
+	INTDET_POL_X_rise			=	(2<<6),						//rise Trigger
+	INTDET_POL_X_riseORfall		=	(3<<6),						//fall or rise Trigger
+}INTDET_POL_X_TypeDef;
+
+typedef enum
+{
+	//IOMAP0
+	PIN_I2C_SCL				=	0X00,						//
+	PIN_I2C_SDA				=	0X01,						//
+	PIN_GPT_CHA				=	0X02,						//
+	PIN_GPT_CHB				=	0X03,						//
+	PIN_SPI_MOSI			=	0X04,						//
+	PIN_SPI_MISO			=	0X05,						//
+	PIN_SPI_SCK				=	0X06,						//
+	PIN_SPI_NSS				=	0X07,						//
+	//IOMAP1
+	PIN_UART0_RX			=	0X10,						//
+	PIN_UART0_TX			=	0X11,						//
+	PIN_EPT_CHAX			=	0X12,						//
+	PIN_EPT_CHBX			=	0X13,						//
+	PIN_EPT_CHCX			=	0X14,						//
+	PIN_EPT_CHAY			=	0X15,						//
+	PIN_EPT_CHBY			=	0X16,						//
+	PIN_EPT_CHCY			=	0X17,						//
+}IOMAP_DIR_TypeDef;
+
+/**
+  * @brief  CLOMX Systemclk data
+  */
+typedef enum
+{
+	CLO_ISCLK		=	0,
+	CLO_IMCLK		=	1,
+	CLO_EMCLK		=	3,
+	CLO_HFCLK		=	4,
+	CLO_RTCCLK		=	6,
+	CLO_PCLK		=	7,
+	CLO_HCLK		=	8,
+	CLO_IWDTCLK		=	9,
+	CLO_SYSCLK		=	0X0D,
+}SystemClk_CLOMX_TypeDef;
+
+/**
+  * @brief  CLOMX Systemclk data
+  */
+typedef enum
+{
+	CLO_DIV0			=	1,
+	CLO_DIV4			=	0,
+	CLO_DIV2			=	2,
+	CLO_DIV8			=	4,
+	CLO_DIV16		    =	5,
+}SystemClk_CLODIV_TypeDef;
+
+/** @addtogroup SYSCON_Exported_functions
+  * @{
+  */	
+extern void SYSCON_RST_VALUE(void); 
+extern void SYSCON_General_CMD(FunctionalStatus NewState, SYSCON_General_CMD_TypeDef ENDIS_X );
+extern void EMOSC_OSTR_Config(U16_T EM_CNT, U8_T EM_GM,EM_LFSEL_TypeDef EM_LFSEL_X, EM_Filter_CMD_TypeDef EM_FLEN_X, EM_Filter_TypeDef EM_FLSEL_X);
+extern void SystemCLK_HCLKDIV_PCLKDIV_Config(SystemCLK_TypeDef SYSCLK_X , SystemCLK_Div_TypeDef HCLK_DIV_X , PCLK_Div_TypeDef PCLK_DIV_X , SystemClk_data_TypeDef SystemClk_data_x );
+extern void SYSCON_WDT_CMD(FunctionalStatus NewState);
+extern void SYSCON_IWDCNT_Reload(void);
+extern void SYSCON_IWDCNT_Config(IWDT_TIME_TypeDef IWDT_TIME_X , IWDT_TIMEDIV_TypeDef IWDT_INTW_DIV_X );
+extern void SYSCON_LVD_Config(X_LVDEN_TypeDef X_LVDEN , INTDET_LVL_X_TypeDef INTDET_LVL_X , RSTDET_LVL_X_TypeDef RSTDET_LVL_X , X_LVD_INT_TypeDef X_LVD_INT , INTDET_POL_X_TypeDef INTDET_POL_X);
+extern void EXTI_trigger_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN , EXI_tringer_mode_TypeDef EXI_tringer_mode);
+extern void EXTI_interrupt_CMD(FunctionalStatus NewState , SYSCON_EXIPIN_TypeDef  EXIPIN);
+extern void SYSCON_CLO_CONFIG(CLO_IO_TypeDef clo_io);
+extern U32_T SYSCON_Read_CINF0(void);
+extern U32_T SYSCON_Read_CINF1(void);
+extern void SYSCON_INT_Priority(void);
+extern void EXI0_Int_Enable(void);
+extern void EXI0_Int_Disable(void);
+extern void EXI1_Int_Enable(void);
+extern void EXI1_Int_Disable(void);
+extern void EXI2_Int_Enable(void);
+extern void EXI2_Int_Disable(void);
+extern void EXI3_Int_Enable(void);
+extern void EXI3_Int_Disable(void);
+extern void EXI4_Int_Enable(void);
+extern void EXI4_Int_Disable(void);
+extern void SYSCON_Int_Enable(void);
+extern void SYSCON_Int_Disable(void);
+extern void PCLK_goto_idle_mode(void);
+extern void PCLK_goto_deepsleep_mode(void);
+extern void LVD_Int_Enable(void);
+extern void LVD_Int_Disable(void);
+extern void IWDT_Int_Enable(void);
+extern void IWDT_Int_Disable(void);
+extern void EXI0_WakeUp_Enable(void);
+extern void EXI0_WakeUp_Disable(void);
+extern void EXI1_WakeUp_Enable(void);
+extern void EXI1_WakeUp_Disable(void);
+extern void EXI2_WakeUp_Enable(void);
+extern void EXI2_WakeUp_Disable(void);
+extern void EXI3_WakeUp_Enable(void);
+extern void EXI3_WakeUp_Disable(void);
+extern void EXI4_WakeUp_Enable(void);
+extern void EXI4_WakeUp_Disable(void);
+extern void SYSCON_WakeUp_Enable(void);
+extern void SYSCON_WakeUp_Disable(void);
+extern void GPIO_EXTI_interrupt(CSP_GPIO_T * GPIOX,U32_T GPIO_IECR_VALUE);   
+extern void SYSCON_Software_Reset(void);   
+extern void SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_TypeDef HFOSC_SELECTE_X);
+extern void SYSCON_IMOSC_SELECTE(IMOSC_SELECTE_TypeDef IMOSC_SELECTE_X);
+extern void SystemCLK_Clear(void);
+extern void GPIO_Remap(CSP_GPIO_T *GPIOx,uint8_t bit,IOMAP_DIR_TypeDef iomap_data);
+extern void SYSCON_CLO_SRC_SET(SystemClk_CLOMX_TypeDef clomxr,SystemClk_CLODIV_TypeDef clodivr);
+extern void Set_INT_Priority(U8_T int_name,U8_T int_level);
+
+extern U32_T Read_Reset_Status(void);
+#endif   /**< apt32f102_syscon_H */
+
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_tkey.h b/Source/include/apt32f102_tkey.h
new file mode 100644
index 0000000..bf1cf36
--- /dev/null
+++ b/Source/include/apt32f102_tkey.h
@@ -0,0 +1,184 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_tkey.h
+  * @author  APT AE Team
+  * @version V1.01
+  * @date    2019/04/05
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+#ifndef _apt32f102_TK_H
+#define _apt32f102_TK_H
+
+#include "apt32f102.h"
+  
+/**
+  * @brief  tkey mode register
+  */
+typedef enum
+{
+    TK_HM_DIS = 0<<0,
+	TK_HM_EN = 1<<0,
+}TKEY_HMEN_TypeDef;
+/**
+  * @brief  tkey mode register
+  */
+typedef enum
+{
+    TK_SINGLE = 0<<1,
+	TK_SEQ = 1<<1,
+}TKEY_MODE_TypeDef;
+/**
+  * @brief  tkey ckspr register
+  */
+typedef enum
+{
+    TK_CKSPR_DIS = 0<<9,
+	TK_CKSPR_EN = 1<<9,
+}TKEY_CKSPR_TypeDef;
+/**
+  * @brief  tkey CKRND register
+  */
+typedef enum
+{
+    TK_CKRND_DIS = 0<<10,
+	TK_CKRND_EN = 1<<10,
+}TKEY_CKRND_TypeDef;
+/**
+  * @brief  tkey CKFEQ register
+  */
+typedef enum
+{
+    TK_CKFEQ_LOW = 0<<11,
+	TK_CKREQ_HIGH = 1<<11,
+}TKEY_CKFEQ_TypeDef;
+
+/**
+  * @brief  tkey RSSEL register
+  */
+typedef enum
+{
+    TK_RSSEL_OVW = 0<<12,
+	TK_RSSEL_OverTHR = 1<<12,
+}TKEY_RSSEL_TypeDef;
+/**
+  * @brief  tkey IDLEP register
+  */
+typedef enum
+{
+    TK_IDLEP_DIS = 0<<14,
+	TK_IDLEP_EN = 1<<14,
+}TKEY_IDLEP_TypeDef;
+
+/**
+  * @brief  tkey DSR register
+  */
+typedef enum
+{
+    TK_DSR_Z = 0<<16,
+	TK_DSR_LOW = 1<<16,
+	TK_DSR_HIGH = 2<<16,
+}TKEY_DSR_TypeDef;
+
+/**
+  * @brief  tkey TSCANSTB register
+  */
+typedef enum
+{
+    TK_STB_1 = 0<<20,
+	TK_STB_2 = 1<<20,
+	TK_STB_3 = 2<<20,
+	TK_STB_4 = 3<<20,
+}TKEY_TSSTB_TypeDef;
+
+/**
+  * @brief  tkey OTHRCN register
+  */
+typedef enum
+{
+    TK_DCKDIV_0 = 0<<12,
+	TK_DCKDIV_2 = 1<<12,
+	TK_DCKDIV_4 = 2<<12,
+	TK_DCKDIV_8 = 3<<12,
+}TKEY_DCKDIV_TypeDef;
+#define     TK_PSEL_FVR  0
+#define 	TK_PSEL_AVDD 1
+#define 	TK_FVR_2048V 0
+#define		TK_FVR_4096V 1
+#define 	TK_EC_1V 	 0
+#define		TK_EC_2V 	 1
+#define		TK_EC_3V 	 2
+#define		TK_EC_3_6V   3
+
+U32_T TK_IO_ENABLE;					//Tkey IO使能 bit=1 表示使能对应的 TCHx 做 touch key 功能，低位至高位的顺序对应 TCH0~TCH16
+U16_T TK_senprd[17];				//Tkey 通道扫描周期配置 值越大灵敏度越高，但不能超过理论值否则按键无法扫描通过，常用值不大于 150
+U16_T TK_Triggerlevel[17];			//Tkey 通道触发门槛值配置 值越大门槛值越高，取值范围为按键差值的 50%~60%，未使用的通道设置成 0xFF
+U8_T Press_debounce_data;			//Tkey 触发去抖配置 按下去抖 1~10，默认配置为 5
+U8_T Release_debounce_data;			//Tkey 释放去抖配置 释放去抖 1~10，默认配置为 5
+U16_T TK_icon[17];
+U8_T MultiTimes_Filter;				//OFFSET 滤波倍数 大于等于 4 时，表示开启相应的倍数滤波；小于 4 时表示倍数滤波关闭；默认配置关闭
+U8_T Valid_Key_Num;					//最多有效按键个数 此配置表示允许同时按下按键时最多有效个数。默认为 4
+U8_T Key_mode;						//Tkey 按键模式 0 表示单键模式，1 表示多键模式
+U8_T Base_Speed;					//Baseline 更新速度  数值越小，baseline 更新速度越快；数值越大，baseline 更新速度越慢；默认为 10 约 100ms	
+U32_T TK_longpress_time;			//按键长按强制更新时间设置 长按键强制更新配置。时间= TK_longpress_time*1s；默认 16 秒
+U32_T TK_BaseCnt;					//按键扫描基准时间配置 若系统时钟修改时需要修改此参数，保证基准时间为 10ms；计算公式 TK_BaseCnt=10ms*PCLK/8-1，默认 59999 数值基于 48MHz
+U16_T TK_PSEL_MODE;		
+U16_T TK_FVR_LEVEL;		
+U16_T TK_EC_LEVEL;
+U8_T TK_Lowpower_mode;
+U8_T TK_Lowpower_level;	
+U8_T TK_Wakeup_level;	
+//****************************************************************
+#define TK_CLK_EN 	(TKEY->CLKEN|=0X01)
+#define TK_CLK_DIS 	(TKEY->CLKEN&=0XFFE)
+#define TK_SCANTIME_DIS (0<<12)
+#define TK_SCANTIME_1ms (1<<12)
+#define TK_SCANTIME_1_5ms (2<<12)
+#define TK_SCANTIME_2ms (3<<12)
+#define TK_SCANTIME_3ms (4<<12)
+#define TK_SCANTIME_5ms (5<<12)
+#define TK_SCANTIME_10ms (6<<12)
+#define TK_SCANTIME_100ms (7<<12)
+  
+#define TKEY_TCHEN(val) (val)     /**< TKEY CH Enable         */
+#define TKEY_ICON(val)  (((val) & 0x0Ful) << 8)  
+#define TKEY_START      (0x01ul << 0) 
+
+#define TKEY_SINDNE      (0x01ul << 0)
+#define TKEY_DNE      (0x01ul << 1)
+#define TKEY_THR      (0x01ul << 2)
+#define TKEY_FLW      (0x01ul << 3)
+#define TKEY_OVW      (0x01ul << 4)
+#define TKEY_TIME      (0x01ul << 5)
+#define TCH_EN(val)   (0x01<<val)
+
+extern void tk_init(void);
+extern void tk_Reinit(void);
+extern void tk_prgm(void);
+extern void TK_Baseline_prog(void);
+extern void tk_parameter_init(void);
+extern volatile U16_T offset_data0_abs[17];
+extern volatile U16_T offset_data1_abs[17];
+extern volatile U16_T offset_data2_abs[17];
+extern volatile U16_T sampling_data0[17];
+extern volatile U16_T baseline_data0[17];
+extern volatile S16_T offset_data0[17];
+extern volatile U16_T sampling_data1[17];
+extern volatile U16_T baseline_data1[17];
+extern volatile S16_T offset_data1[17];
+extern volatile U16_T sampling_data2[17];
+extern volatile U16_T baseline_data2[17];
+extern volatile S16_T offset_data2[17];
+extern volatile U32_T Key_Map;
+extern void TK_setup_sleep(void);
+extern void TK_quit_sleep(void);
+extern volatile U8_T base_update_f;
+#endif		/**< apt32f102_tkey.h */
\ No newline at end of file
diff --git a/Source/include/apt32f102_types_local.h b/Source/include/apt32f102_types_local.h
new file mode 100644
index 0000000..6db38d1
--- /dev/null
+++ b/Source/include/apt32f102_types_local.h
@@ -0,0 +1,245 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_types_local.h
+  * @author  APT AE Team
+  * @version V1.08
+  * @date    2021/06/21
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+
+#ifndef TYPES_LOCAL_H
+#define TYPES_LOCAL_H
+/**************************************************************************/
+
+/**************************************************************************
+STANDARD DEFINES
+**************************************************************************/
+#define NIL             '\000'
+
+#define TRUE            1
+#define FALSE           0
+#define YES             1
+#define NO              0
+#define ON              1
+#define OFF             0
+#define GOOD            1
+#define BAD             0
+
+#define BELL            7        /*   Ring the bell          */
+#define MAX_SINT16      32767
+#define CPNULL          ((char *)0)
+#define NONENTRY        -1.0E12
+#define DPIE            (DOUBLE)3.141592653589793
+
+/* other stuff... */
+#define STRNCPY(a,b,c)          strncpy (a,b,c); (*((a)+(c)) = 0x00);
+
+
+/**************************************************************************
+STANDARD TYPEDEFS
+
+The ANSI C std defines:
+        short <= int <= long
+        char >= 8 bits
+        short >= 16 bits
+        long >= 32 bits
+        (from Harbison & Steele, "C, A Ref. Manual" 3rd ed. p. 99)
+
+        so all ANSI C compliant compilers will accept the following.
+**************************************************************************/
+#ifndef CSP_TYPES_H
+#define CSP_TYPES_H
+
+
+/* Signed Types                                                              */
+typedef signed char     S8_T;
+typedef short           S16_T;
+typedef long            S32_T;
+
+/* Unsigned Types                                                            */
+typedef unsigned char   	U8_T;
+typedef unsigned short  	U16_T;
+typedef unsigned long   	U32_T;
+typedef unsigned long long 	U64_T;
+
+/* Float Types                                                               */
+typedef float           F32_T;
+typedef double          F64_T;
+
+/* Boolean types declared as U8_T, as enums are generated as 16 bit          */
+typedef U8_T            B_T;
+
+/* Definitions for the two members of the Boolean type                       */
+#ifndef FALSE
+#define FALSE ((B_T) 0)
+#endif
+
+#ifndef TRUE
+#define TRUE  ((B_T) 1)
+#endif
+
+/* UNUSED Definition for unused Interrupt numbers * and unused PDC channels  */
+/* in the CHIP structure. (cf. CSP.C file)                                   */
+#ifndef UNUSED
+#define UNUSED ((U8_T) 0xFF)
+#endif
+
+/* NULL definition */
+#ifndef NULL
+#define NULL  0
+#endif
+
+typedef enum {ENABLE = 1, DISABLE = !ENABLE} ClockStatus, FunctionalStatus;
+typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus;
+typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus;
+
+/******************************************************************************
+* Peripherals Type
+******************************************************************************/
+typedef volatile U32_T CSP_REGISTER_T; 
+typedef volatile U16_T CSP_REGISTER16_T;
+typedef volatile U8_T  CSP_REGISTER8_T;
+
+#endif   /* CSP_TYPE_H */
+
+/* define 8 bit types */
+typedef unsigned char           UINT8;
+typedef signed char             SINT8;
+
+/* define 16 bit types */
+typedef unsigned short          UINT16;
+typedef signed short            SINT16;
+
+/* define 32 bit types */
+typedef unsigned long           UINT32;
+typedef signed long             SINT32;
+
+typedef void                    VOID;
+typedef signed char             CHAR;   /* be careful of EOF!!! (EOF = -1) */
+typedef unsigned char           BOOL;
+typedef signed long             TIME_T;
+
+typedef float                   SINGLE;
+#ifdef  DOUBLE
+#undef  DOUBLE
+#endif
+typedef double                  DOUBLE;
+
+typedef struct
+{
+  unsigned bit0 : 1;
+  unsigned bit1 : 1;
+  unsigned bit2 : 1;
+  unsigned bit3 : 1;
+  unsigned bit4 : 1;
+  unsigned bit5 : 1;
+  unsigned bit6 : 1;
+  unsigned bit7 : 1;
+} REG8;
+
+typedef struct
+{
+  unsigned bit0 : 1;
+  unsigned bit1 : 1;
+  unsigned bit2 : 1;
+  unsigned bit3 : 1;
+  unsigned bit4 : 1;
+  unsigned bit5 : 1;
+  unsigned bit6 : 1;
+  unsigned bit7 : 1;
+  unsigned bit8 : 1;
+  unsigned bit9 : 1;
+  unsigned bit10: 1;
+  unsigned bit11: 1;
+  unsigned bit12: 1;
+  unsigned bit13: 1;
+  unsigned bit14: 1;
+  unsigned bit15: 1;
+} REG16;
+
+
+
+/**************************************************************************
+STANDARD STRING TYPEDEFS
+**************************************************************************/
+typedef char    STRING_3[4];
+typedef char    STRING_5[6];
+typedef char    STRING_8[9];
+typedef char    STRING_10[11];
+typedef char    STRING_12[13];
+typedef char    STRING_16[17];
+typedef char    STRING_24[25];
+typedef char    STRING_30[31];
+typedef char    STRING_32[33];
+typedef char    STRING_48[49];
+typedef char    STRING_50[51];
+typedef char    STRING_60[61];
+typedef char    STRING_80[81];
+typedef char    STRING_132[133];
+typedef char    STRING_256[257];
+typedef char    STRING_512[513];
+
+
+/********************************************/
+/* STANDARD SYSTEM SIZES                                        */
+/********************************************/
+#define SIZE_UINT8              (size_t)(sizeof (UINT8 ))
+#define SIZE_SINT8              (size_t)(sizeof (SINT8 ))
+
+#define SIZE_UINT16             (size_t)(sizeof (UINT16))
+#define SIZE_SINT16             (size_t)(sizeof (SINT16))
+
+#define SIZE_UINT32             (size_t)(sizeof (UINT32))
+#define SIZE_SINT32             (size_t)(sizeof (SINT32))
+
+#define SIZE_VOID               (size_t)(sizeof (VOID  ))
+#define SIZE_CHAR               (size_t)(sizeof (CHAR  ))
+#define SIZE_BOOL               (size_t)(sizeof (BOOL  ))
+#define SIZE_TIME_T             (size_t)(sizeof (TIME_T))
+
+#define SIZE_SINGLE             (size_t)(sizeof (SINGLE))
+#define SIZE_DOUBLE             (size_t)(sizeof (DOUBLE))
+
+#define SIZE_STRING_3           (size_t)(sizeof (STRING_3  ))
+#define SIZE_STRING_5           (size_t)(sizeof (STRING_5  ))
+#define SIZE_STRING_8           (size_t)(sizeof (STRING_8  ))
+#define SIZE_STRING_10          (size_t)(sizeof (STRING_10 ))
+#define SIZE_STRING_12          (size_t)(sizeof (STRING_12 ))
+#define SIZE_STRING_16          (size_t)(sizeof (STRING_16 ))
+#define SIZE_STRING_24          (size_t)(sizeof (STRING_24 ))
+#define SIZE_STRING_30          (size_t)(sizeof (STRING_30 ))
+#define SIZE_STRING_32          (size_t)(sizeof (STRING_32 ))
+#define SIZE_STRING_48          (size_t)(sizeof (STRING_48 ))
+#define SIZE_STRING_50          (size_t)(sizeof (STRING_50 ))
+#define SIZE_STRING_60          (size_t)(sizeof (STRING_60 ))
+#define SIZE_STRING_80          (size_t)(sizeof (STRING_80 ))
+#define SIZE_STRING_132         (size_t)(sizeof (STRING_132))
+#define SIZE_STRING_256         (size_t)(sizeof (STRING_256))
+#define SIZE_STRING_512         (size_t)(sizeof (STRING_512))
+
+
+/**************************************************************************
+STANDARD BIT MANIPULATIONS
+**************************************************************************/
+#define SETBIT( target, bit )   ((target) |= (1u << (bit)))
+#define CLRBIT( target, bit )   ((target) &= ~(1u << (bit)))
+#define TOGBIT( target, bit )   ((target) ^= (1u << (bit)))
+
+#define ISBITSET( target, bit ) (!!((target) & (1u << (bit))))
+#define ISBITCLR( target, bit ) ( !((target) & (1u << (bit))))
+
+
+/**************************************************************************/
+#endif
+
+
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_uart.h b/Source/include/apt32f102_uart.h
new file mode 100644
index 0000000..03502ad
--- /dev/null
+++ b/Source/include/apt32f102_uart.h
@@ -0,0 +1,145 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_uart.h
+  * @author  APT AE Team
+  * @version V1.13
+  * @date    2021/12/13
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/ 
+#ifndef _apt32f102_uart_H
+#define _apt32f102_uart_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+typedef enum
+{
+	UART_PAR_NONE	=0<<8,			//无校验位
+	UART_PAR_EVEN	=4<<8,			//偶校验位
+	UART_PAR_ODD	=5<<8,			//奇校验位
+	UART_PAR_SPACE	=6<<8,			//0校验位
+	UART_PAR_MARK	=7<<8			//1校验位
+}UART_PAR_TypeDef;
+/**
+  * @brief  UART IO setting
+  */
+typedef enum
+{
+    IO_UART0 = 0,
+    IO_UART1 = 1,
+	IO_UART2 = 2,
+}UART_NUM_TypeDef;
+/*****************************************************************************
+************************** UART Function defined *****************************
+******************************************************************************/
+#define UART_RESET_VALUE  (0x00000000)
+/**  SR : UART Status Register											  */
+#define UART_TX_FULL     (0x01ul << 0)  /**< Transmitter full             */
+#define UART_RX_FULL     (0x01ul << 1)  /**< Receiver full                */
+#define UART_TX_OVER     (0x01ul << 2)  /**< Transmitter buff over        */
+#define UART_RX_OVER     (0x01ul << 3)  /**< Receiver buff over           */
+
+/** CTRL : UART Control Register										  	  */ 
+#define UART_TX         (0x01ul << 0)  /**< Transmitter Enable/disable        */
+#define UART_RX         (0x01ul << 1)  /**< Receiver Enable/disable           */
+#define UART_TX_INT     (0x01ul << 2)  /**< Transmitter INT Enable/disable    */
+#define UART_RX_INT     (0x01ul << 3)  /**< Receiver INT Enable/disable       */
+#define UART_TX_IOV     (0x01ul << 4)  /**< Transmitter INTOver Enable/disable*/
+#define UART_RX_IOV     (0x01ul << 5)  /**< Receiver INTOver Enable/disable   */
+#define UART_PARUTY_ERR_INT    (0x01ul << 7)  /**< PARUTY ERROR Status        */
+#define UART_TX_FIFO_INT    (0x01ul << 12)  /**< TX fifo int Enable/disable    */
+#define UART_RX_FIFO_INT    (0x01ul << 13)  /**< RX fifo int Enable/disable    */
+#define UART_RX_FIFOOV_INT    (0x01ul << 18)  /**< RX fifo int over Enable/disable    */
+#define UART_TX_DONE_INT     (0x01ul << 19)  /**< Receiver TX  done Enable/disable   */
+
+//#define UART_TEST_MODE  (0x01ul << 6)  /**< =1 Test mode                      */									
+
+/** ISR : UART Interrupt Status Register									*/
+#define UART_TX_INT_S    (0x01ul << 0)  /**< Transmitter INT Status         */
+#define UART_RX_INT_S    (0x01ul << 1)  /**< Receiver INTStatus             */
+#define UART_TX_IOV_S    (0x01ul << 2)  /**< Transmitter INTOver Status     */
+#define UART_RX_IOV_S    (0x01ul << 3)  /**< Receiver INTOver Status        */
+#define UART_PARUTY_ERR_S    (0x01ul << 4)  /**< PARUTY ERROR Status        */
+#define UART_TXMIS_S    (0x01ul << 5)  /**< tx fifo Status        */
+#define UART_RXMIS_S    (0x01ul << 6)  /**< rx fifo Status        */
+#define UART_RORMIS_S    (0x01ul << 7)  /**< rx fifo over Status        */
+#define UART_TX_DONE_S    (0x01ul << 19)  /**< Receiver INTOver Status        */
+
+/** Set DATA register                                                       */
+#define CSP_UART_SET_DATA(uart, val)  ((uart)->DATA = (val))
+/** Get DATA register                                                       */
+#define CSP_UART_GET_DATA(uart)       ((uart)->DATA)
+
+/** Set SR register                                                         */
+#define CSP_UART_SET_SR(uart, val)  ((uart)->SR = (val))
+/** Get SR register                                                         */
+#define CSP_UART_GET_SR(uart)       ((uart)->SR)
+
+/** Set CTRL register                                                       */
+#define CSP_UART_SET_CTRL(uart, val)  ((uart)->CTRL = (val))
+/** Get CTRL register                                                       */
+#define CSP_UART_GET_CTRL(uart)       ((uart)->CTRL)
+
+/** Set ISR register                                                        */
+#define CSP_UART_SET_ISR(uart, val)  ((uart)->ISR = (val))
+/** Get ISR register                                                        */
+#define CSP_UART_GET_ISR(uart)       ((uart)->ISR)
+
+/** Set BRDIV register                                                      */
+#define CSP_UART_SET_BRDIV(uart, val)  ((uart)->BRDIV = (val))
+/** Get BRDIV register                                                      */
+#define CSP_UART_GET_BRDIV(uart)       ((uart)->BRDIV)
+/** UART External Variable Declaration 										*/
+#define UART_BUFSIZE             32
+extern	volatile U16_T RxDataBuf[12];
+extern	volatile U16_T RxDataPtr;
+extern	volatile U16_T TxDataPtr;
+extern	volatile U8_T RxDataFlag;
+extern	volatile U8_T TxDataFlag;
+extern	volatile U8_T Uart_send_Length;
+extern volatile U16_T Uart_send_Length_temp;
+extern volatile U8_T Uart_buffer[UART_BUFSIZE];
+ /** UART External Functions Declaration  									*/
+extern void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT);
+extern void UARTClose(CSP_UART_T *uart);
+extern void UARTInitRxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT);
+extern void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT);
+extern void UARTTxByte(CSP_UART_T *uart,U8_T txdata_u8);
+extern void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16);
+extern U16_T UARTRxByte(CSP_UART_T *uart,U8_T *Rxdata_u16);
+extern U8_T UART_ReturnRxByte(CSP_UART_T *uart);
+extern U16_T UARTReceive(CSP_UART_T *uart,U8_T *destAddress_u16,U16_T length_u16);	
+extern void UART0_DeInit(void);
+extern void UART1_DeInit(void);
+extern void UART2_DeInit(void);
+extern void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G);
+extern void UART0_Int_Enable(void);
+extern void UART1_Int_Enable(void);
+extern void UART2_Int_Enable(void);
+extern void UART0_Int_Disable(void);
+extern void UART1_Int_Disable(void);
+extern void UART2_Int_Disable(void);
+extern void UART0_WakeUp_Enable(void);
+extern void UART1_WakeUp_Enable(void);
+extern void UART2_WakeUp_Enable(void);
+extern void UART0_WakeUp_Disable(void);
+extern void UART1_WakeUp_Disable(void);
+extern void UART2_WakeUp_Disable(void);
+extern void UART0_CONFIG(void);
+extern void UART1_CONFIG(void);
+extern void UART2_CONFIG(void);
+extern void UARTTTransmit_data_set(CSP_UART_T *uart );
+extern void UARTTransmit_INT_Send(CSP_UART_T *uart );
+#endif		/**< apt32f102_types_local_H */
+
+/******************* (C) COPYRIGHT 2016 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/include/apt32f102_wwdt.h b/Source/include/apt32f102_wwdt.h
new file mode 100644
index 0000000..3afc329
--- /dev/null
+++ b/Source/include/apt32f102_wwdt.h
@@ -0,0 +1,65 @@
+/*
+  ******************************************************************************
+  * @file    apt32f102_wwdt.h
+  * @author  APT AE Team
+  * @version V1.02
+  * @date    2020/11/20
+  ******************************************************************************
+  *THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES 
+  *CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
+  *APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT, 
+  *INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF 
+  *SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION 
+  *CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES 
+  *THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef _apt32f102_wwdt_H
+#define _apt32f102_wwdt_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "apt32f102.h"
+
+#define WWDT_RESET_VALUE  (0x00000000)
+
+
+//--------------------------------------------------------------------------------
+//-----------------------------wwdt  value enum define--------------------------
+//--------------------------------------------------------------------------------
+/**
+  * @brief  PSC DIV register
+  */
+typedef enum
+{
+    PCLK_4096_DIV0 = (0<<8),
+	PCLK_4096_DIV2 = (1<<8),
+	PCLK_4096_DIV4 = (2<<8),
+	PCLK_4096_DIV8 = (3<<8),
+}WWDT_PSCDIV_TypeDef;
+/**
+  * @brief  WWDT DEBUG MODE register
+  */
+typedef enum
+{
+    WWDT_DBGDIS = (0<<10),
+	WWDT_DBGEN = (1<<10),
+}WWDT_DBGEN_TypeDef;
+
+#define WWDT_EVI 0X01
+
+
+extern void WWDT_DeInit(void);
+extern void WWDT_CONFIG(WWDT_PSCDIV_TypeDef PSCDIVX,U8_T WND_DATA,WWDT_DBGEN_TypeDef DBGENX);
+extern void WWDT_CMD(FunctionalStatus NewState);
+extern void WWDT_CNT_Load(U8_T cnt_data);
+extern void WWDT_Int_Config(FunctionalStatus NewState);
+
+
+
+/*************************************************************/
+
+#endif   /**< apt32f102_wwdt_H */
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/includes.h b/Source/includes.h
new file mode 100644
index 0000000..6d2facd
--- /dev/null
+++ b/Source/includes.h
@@ -0,0 +1,52 @@
+#ifndef _INCLUDES_H_
+#define _INCLUDES_H_
+
+#include "apt32f102.h"
+#include "apt32f102_adc.h"
+#include "apt32f102_bt.h"
+#include "apt32f102_coret.h"
+#include "apt32f102_countera.h"
+#include "apt32f102_crc.h"
+#include "apt32f102_ept.h"
+#include "apt32f102_et.h"
+#include "apt32f102_gpio.h"
+#include "apt32f102_gpt.h"
+#include "apt32f102_i2c.h"
+#include "apt32f102_ifc.h"
+#include "apt32f102_lpt.h"
+#include "apt32f102_rtc.h"
+#include "apt32f102_sio.h"
+#include "apt32f102_spi.h"
+#include "apt32f102_syscon.h"
+#include "apt32f102_uart.h"
+#include "apt32f102_wwdt.h"
+#include "apt32f102_types_local.h"
+#include "apt32f102_clkcalib.h"
+#include "apt32f102_tkey.h"
+
+#include <stdio.h>
+#include <string.h>
+
+/*应用代码头文件*/
+#include "uart.h"
+#include "control_rly.h"
+#include "dip_switch.h"
+#include "eeprom.h"
+
+/*工程名称及软件版本号
+    此定义在每个工程中必须定义，用于识别当前工程对应的机型
+        Boot中会通过读取EEPROM中保存的设备信息来判断当前是什么机型
+        如果EEPROM 中没有保存设备信息，那么当前就是Boot程序，设备地址为0x00，设备类型为0x00
+*/
+#define Project_Area		0x02					//工程所处区域为APP区域		0x01:Boot区域；0x02:APP区域
+#define Peoject_Name        "BLV_10V485_V02"    	//工程名称
+#define Project_Type        0x00                    //工程对应的设备类型        Boot默认设备类型
+
+#define Project_FW_Version	0x02		            //工程对应的软件版本号
+#define Project_HW_Version	0x02					//软件对应的硬件版本号
+
+extern volatile U32_T SysTick_100us;
+extern volatile U32_T SysTick_1ms;
+
+
+#endif
diff --git a/Source/lib_102ClkCalib_1_03.a b/Source/lib_102ClkCalib_1_03.a
new file mode 100644
index 0000000..fe1f46c
Binary files /dev/null and b/Source/lib_102ClkCalib_1_03.a differ
diff --git a/Source/lib_102TKey_1_15.a b/Source/lib_102TKey_1_15.a
new file mode 100644
index 0000000..c4b7504
Binary files /dev/null and b/Source/lib_102TKey_1_15.a differ
diff --git a/Source/lib_102TKey_1_15C.a b/Source/lib_102TKey_1_15C.a
new file mode 100644
index 0000000..78b7518
Binary files /dev/null and b/Source/lib_102TKey_1_15C.a differ
diff --git a/Source/lib_102TKey_1_15M.a b/Source/lib_102TKey_1_15M.a
new file mode 100644
index 0000000..d442d99
Binary files /dev/null and b/Source/lib_102TKey_1_15M.a differ
diff --git a/Source/lib_102TKey_1_15MC.a b/Source/lib_102TKey_1_15MC.a
new file mode 100644
index 0000000..bb55e43
Binary files /dev/null and b/Source/lib_102TKey_1_15MC.a differ
diff --git a/Source/lib_102TKey_c_1_16P0.a b/Source/lib_102TKey_c_1_16P0.a
new file mode 100644
index 0000000..4f1cc58
Binary files /dev/null and b/Source/lib_102TKey_c_1_16P0.a differ
diff --git a/Source/main.c b/Source/main.c
new file mode 100644
index 0000000..d8d96f9
--- /dev/null
+++ b/Source/main.c
@@ -0,0 +1,33 @@
+#include "includes.h"
+
+
+extern void delay_nms(unsigned int t);
+extern void APT32F102_init(void);
+
+
+/***************************************************/
+//main
+/**************************************************/
+int main(void) 
+{
+//	delay_nms(2000);
+	APT32F102_init();							//102 initial
+	
+	Dbg_Println(DBG_BIT_SYS_STATUS,"MCU Start!");
+
+    while(1)
+	{
+		SYSCON_IWDCNT_Reload(); 				//IWDT Clear
+
+		UART1_TASK();
+		
+		DIP_ScanTask();
+		
+		BLV_RLY_Task();
+		
+		CTRL_LEDStatus_Task();
+		
+		BUS485Send_Task();
+		
+    }
+}
diff --git a/Source/mcu_initial.c b/Source/mcu_initial.c
new file mode 100644
index 0000000..955faf1
--- /dev/null
+++ b/Source/mcu_initial.c
@@ -0,0 +1,327 @@
+#include "includes.h"
+
+
+/*************************************************************/
+//software delay
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void delay_nms(unsigned int t)
+{
+    volatile unsigned int i,j ,k=0;
+    j = 50* t;
+    for ( i = 0; i < j; i++ )
+    {
+        k++;
+		SYSCON_IWDCNT_Reload(); 
+    }
+}
+void delay_nus(unsigned int t)
+{
+    volatile unsigned int i,j ,k=0;
+    j = 1* t;
+    for ( i = 0; i < j; i++ )
+    {
+        k++;
+    }
+}
+/*************************************************************/
+//GPIO Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void GPIO_CONFIG(void)
+{
+
+//	//外部中断初始化
+//	GPIO_PullHigh_Init(GPIOA0,4);							//PA0.14
+//
+//	GPIO_IntGroup_Set(PA0,4,Selete_EXI_PIN4); 					//EXI0 set PB0.2
+//	GPIOA0_EXI_Init(EXI4); 										//PB0.2 as input
+////	EXTI_trigger_CMD(ENABLE,EXI_PIN14,_EXIFT); 					//ENABLE falling edge，下降沿触发
+//	EXTI_trigger_CMD(ENABLE,EXI_PIN4,_EXIRT);
+//	EXTI_interrupt_CMD(ENABLE,EXI_PIN4); 						//enable EXI
+//	GPIO_EXTI_interrupt(GPIOA0,0b0000000000010000); 			//enable GPIOB02 as EXI
+//	EXI3_Int_Enable(); 	
+
+//	//串口1-RX接收中断，用于串口2的通讯总线繁忙状态判断，2025-04-16
+//	GPIO_PullHigh_Init(GPIOA0,15);		
+//
+//	GPIO_IntGroup_Set(PA0,15,Selete_EXI_PIN15); 					//EXI0 set PB0.2
+//	GPIOA0_EXI_Init(EXI15); 										//PB0.2 as input
+//	EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIFT); 					//ENABLE falling edge
+//	EXTI_trigger_CMD(ENABLE,EXI_PIN15,_EXIRT);
+//	EXTI_interrupt_CMD(ENABLE,EXI_PIN15); 						//enable EXI
+//	GPIO_EXTI_interrupt(GPIOA0,0b1000000000000000); 			//enable GPIOB02 as EXI
+//	
+//	EXI4_Int_Enable(); 	
+
+
+}
+
+/*************************************************************/
+//ETP0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void EPT0_CONFIG(void)
+{
+	//4路 PWM初始化
+	EPT_Software_Prg();								//EPT software reset
+//------------  EPT GPIO Setting  --------------------------------/
+	//EPT_IO_SET(EPT_IO_CHAX,IO_NUM_PA10);			//AX channel selection
+	EPT_IO_SET(EPT_IO_CHBX,IO_NUM_PB02);			//BX channel selection
+	//EPT_IO_SET(EPT_IO_CHCX,IO_NUM_PB05);			//CX channel selection
+	//EPT_IO_SET(EPT_IO_CHD,IO_NUM_PA08);			//D channel selection
+//------------  EPT Control  --------------------------------/
+	EPT_PWM_Config(EPT_Selecte_PCLK,EPT_CNTMD_increase,EPT_OPM_Continue,0);//PCLK as clock，increasing mode,continuous mode,TCLK=PCLK/(0+1) 
+
+//	EPT_PWMX_Output_Control(EPT_PWMA,EPT_CA_Selecte_CMPA,EPT_CB_Selecte_CMPA,EPT_PWM_ZRO_Event_OutLow,EPT_PWM_PRD_Event_Nochange,
+//							EPT_PWM_CAU_Event_OutHigh,EPT_PWM_CAD_Event_OutHigh,
+//							EPT_PWM_CBU_Event_Nochange,EPT_PWM_CBD_Event_Nochange,
+//							EPT_PWM_T1U_Event_Nochange,EPT_PWM_T1D_Event_Nochange,
+//							EPT_PWM_T2U_Event_Nochange,EPT_PWM_T2D_Event_Nochange);
+	EPT_PWMX_Output_Control(EPT_PWMB,EPT_CA_Selecte_CMPB,EPT_CB_Selecte_CMPB,EPT_PWM_ZRO_Event_OutLow,EPT_PWM_PRD_Event_OutLow,
+							EPT_PWM_CAU_Event_OutHigh,EPT_PWM_CAD_Event_OutHigh,
+							EPT_PWM_CBU_Event_Nochange,EPT_PWM_CBD_Event_Nochange,
+							EPT_PWM_T1U_Event_Nochange,EPT_PWM_T1D_Event_Nochange,
+							EPT_PWM_T2U_Event_Nochange,EPT_PWM_T2D_Event_Nochange);						
+//	EPT_PWMX_Output_Control(EPT_PWMC,EPT_CA_Selecte_CMPC,EPT_CB_Selecte_CMPC,EPT_PWM_ZRO_Event_OutLow,EPT_PWM_PRD_Event_Nochange,
+//							EPT_PWM_CAU_Event_OutHigh,EPT_PWM_CAD_Event_OutHigh,
+//							EPT_PWM_CBU_Event_Nochange,EPT_PWM_CBD_Event_Nochange,
+//							EPT_PWM_T1U_Event_Nochange,EPT_PWM_T1D_Event_Nochange,
+//							EPT_PWM_T2U_Event_Nochange,EPT_PWM_T2D_Event_Nochange);	
+//	EPT_PWMX_Output_Control(EPT_PWMD,EPT_CA_Selecte_CMPD,EPT_CB_Selecte_CMPD,EPT_PWM_ZRO_Event_OutLow,EPT_PWM_PRD_Event_Nochange,
+//							EPT_PWM_CAU_Event_OutHigh,EPT_PWM_CAD_Event_OutHigh,
+//							EPT_PWM_CBU_Event_Nochange,EPT_PWM_CBD_Event_Nochange,
+//							EPT_PWM_T1U_Event_Nochange,EPT_PWM_T1D_Event_Nochange,
+//							EPT_PWM_T2U_Event_Nochange,EPT_PWM_T2D_Event_Nochange);	
+	
+	EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(3000,0,10,0,0);//PRDR=2400,CMPA=1200,CMPB=600,CMPC=2400,CMPD=0	
+
+	EPT_Int_Enable(EPT_PEND);//End of cycle interrupt request raw status
+	EPT_Vector_Int_Enable();	//开启EPT中断
+//------------  EPT start  --------------------------------/	
+	EPT_Start();
+
+}
+
+/*************************************************************/
+//GPT0 Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/ 
+void GPT0_CONFIG(void)
+{
+
+
+}
+
+/*************************************************************/
+//BT Initial
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void BT_CONFIG(void)
+{
+	//PB 保护电流PWM_CURR_LMT
+//	BT_DeInit(BT0);
+//	BT_IO_Init(BT0_PB02);
+//	BT_Configure(BT0,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);//TCLK=PCLK/(0+1)
+//	BT_ControlSet_Configure(BT0,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+//	//BT_ControlSet_Configure(BT0,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_EN,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+//	//BT_Trigger_Configure(BT0,BT_TRGSRC_PEND,BT_TRGOE_EN);
+//	BT_Period_CMP_Write(BT0,50,1);
+//	BT_Start(BT0);
+//	BT_ConfigInterrupt_CMD(BT0,ENABLE,BT_PEND);
+//	BT0_INT_ENABLE();
+	
+	
+	//100us 定时器初始化
+	BT_DeInit(BT1);
+	BT_Configure(BT1,BTCLK_EN,0,BT_IMMEDIATE,BT_CONTINUOUS,BT_PCLKDIV);
+	BT_ControlSet_Configure(BT1,BT_START_HIGH,BT_IDLE_LOW,BT_SYNC_DIS,BT_SYNCMD_DIS,BT_OSTMDX_ONCE,BT_AREARM_DIS,BT_CNTRLD_EN);
+	BT_Period_CMP_Write(BT1,4780,1);		
+	BT_Start(BT1);
+	BT_ConfigInterrupt_CMD(BT1,ENABLE,BT_CMP);
+	BT1_INT_ENABLE();
+	
+}
+
+
+
+/*************************************************************/
+//UART0  CONFIG
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void UART0_CONFIG(void)
+{
+	UART0_DeInit();                                               //clear all UART Register
+    UART_IO_Init(IO_UART0,0);                                     //use PA0.1->RXD0, PA0.0->TXD0
+	UARTInit(UART0,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+	
+    UARTInitRxTxIntEn(UART0,416,UART_PAR_NONE);				  //baudrate=sysclock 48M/416=115200,tx rx int enabled 
+	UART0_Int_Enable();
+}	
+/*************************************************************/
+//UART1  CONFIG
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void UART1_CONFIG(void)
+{
+	UART1_DeInit();                                                 //clear all UART Register
+    UART_IO_Init(IO_UART1,0);                                    	//use PA0.13->RXD1, PB0.0->TXD1
+	UARTInit(UART1,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+	
+	UARTInitRxTxIntEn(UART1,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+	UART1_Int_Enable();
+}	
+/*************************************************************/
+//UART2  CONFIG
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void UART2_CONFIG(void)
+{
+	UART2_DeInit();                                                 //clear all UART Register
+    UART_IO_Init(IO_UART2,2);                                    	//use PA0.7->RXD2, PA0.6->TXD2
+	UARTInit(UART2,416,UART_PAR_NONE);							  //baudrate=sysclock 48M/416=115200
+	//UARTInitRxTxIntEn(UART2,416,UART_PAR_NONE);					//baudrate=sysclock 48M/416=115200 tx rx int enabled 
+	//UART2_Int_Enable();
+}	
+/*************************************************************/
+//adc config
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/	
+void ADC12_CONFIG(void)
+{
+
+	ADC12_RESET_VALUE();				//ADC所有寄存器复位
+	ADC12_Software_Reset();				//ADC软件复位
+	ADC12_CLK_CMD(ADC_CLK_CR,ENABLE);	//使能ADC CLK
+	
+
+	ADC12_Configure_Mode(ADC12_12BIT,Continuous_mode,0,6,2,4);
+	
+	ADC12_Configure_VREF_Selecte(ADC12_VREFP_VDD_VREFN_VSS);
+	
+	ADC12_ConversionChannel_Config(ADC12_ADCIN4,ADC12_CV_RepeatNum1,ADC12_AVGDIS,0);
+	ADC12_ConversionChannel_Config(ADC12_ADCIN7,ADC12_CV_RepeatNum1,ADC12_AVGDIS,1);
+	ADC12_ConversionChannel_Config(ADC12_ADCIN8,ADC12_CV_RepeatNum1,ADC12_AVGDIS,2);
+	ADC12_ConversionChannel_Config(ADC12_ADCIN10,ADC12_CV_RepeatNum1,ADC12_AVGDIS,3);
+	
+	
+	ADC12_CMD(ENABLE);
+	
+	ADC12_ready_wait();
+	
+	ADC12_Control(ADC12_START);
+}
+
+/*************************************************************/
+//SIO Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+// sio 驱动RGB LED(ws2812), RGB DATA = 24bit; 驱动数据输出排列方式:GRB
+/*************************************************************/
+void SIO_CONFIG(void)
+{
+	SIO_DeInit();
+	//
+	SIO_IO_Init(SIO_PA03);			//配置IO为SIO模式
+	//tx clk =4MHz, Ttxshift = 1/4 = 250ns；发送每bit时间是250ns
+	SIO_TX_Init(SIOCLK_EN,9);		//
+	//TXCR1  TXCR0--空闲输出L
+	//TXBUFLEN = 8-1  TXCNT =24-1
+	// D0 D1 不使用
+	//
+	SIO_TX_Configure(SIO_IDLE_LOW,SIO_TX_LSB,7,23,0,0,SIO_OBH_6BIT,SIO_OBL_6BIT,0x0F,0x03);
+	//SIO_TXBUF_Set(TX_DH,TX_DL,TX_DH,TX_DL,TX_DH,TX_DL,TX_DH,TX_DL,TX_D1,TX_D0,TX_D1,TX_D0,TX_D1,TX_D0,TX_D1,TX_D0);
+//	SIO_ConfigInterrupt_CMD(ENABLE,SIO_TXDNE);		//配置
+//	SIO_INT_ENABLE();
+}
+
+/*************************************************************/
+//syscon Functions
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCON_CONFIG(void)
+{
+//------SYSTEM CLK AND PCLK FUNTION---------------------------/
+	SYSCON_RST_VALUE();                                                         //SYSCON all register clr
+	SYSCON_General_CMD(ENABLE,ENDIS_ISOSC);										//SYSCON enable/disable clock source
+	//EMOSC_OSTR_Config(0XAD,0X1f,EM_LFSEL_EN,EM_FLEN_EN,EM_FLSEL_10ns);		//EM_CNT=0X3FF,0xAD(36K),EM_GM=0,Low F modedisable,EM filter disable,if enable,cont set 5ns
+	//SYSCON_General_CMD(ENABLE,ENDIS_EMOSC);
+	SYSCON_HFOSC_SELECTE(HFOSC_SELECTE_48M);									//HFOSC selected 48MHz
+	SystemCLK_HCLKDIV_PCLKDIV_Config(SYSCLK_HFOSC,HCLK_DIV_1,PCLK_DIV_1,HFOSC_48M);//system clock set, Hclk div ,Pclk div  set system clock=SystemCLK/Hclk div/Pclk div
+//------------  WDT FUNTION  --------------------------------/
+    SYSCON_IWDCNT_Config(IWDT_TIME_500MS,IWDT_INTW_DIV_7);      					//WDT TIME 1s,WDT alarm interrupt time=1s-1s*1/8=0.875S
+    SYSCON_WDT_CMD(ENABLE);                                                  	//enable/disable WDT		
+    SYSCON_IWDCNT_Reload();                                                   	//reload WDT
+	IWDT_Int_Enable();
+//------------  WWDT FUNTION  --------------------------------/
+//	WWDT_CNT_Load(0xFF);
+//	WWDT_CONFIG(PCLK_4096_DIV0,0xFF,WWDT_DBGDIS);
+//	WWDT_Int_Config(ENABLE);													
+	//WWDT_CMD(ENABLE);															//enable wwdt
+//------------  CLO Output --------------------------------/	
+	//SYSCON_CLO_CONFIG(CLO_PA08);												//CLO output setting
+	//SYSCON_CLO_SRC_SET(CLO_HFCLK,CLO_DIV16);									//CLO output clock and div
+//------------  LVD FUNTION  --------------------------------/ 
+    SYSCON_LVD_Config(ENABLE_LVDEN,INTDET_LVL_3_9V,RSTDET_LVL_1_9V,ENABLE_LVD_INT,INTDET_POL_fall);   //LVD LVR Enable/Disable
+    LVD_Int_Enable();	
+//------------  SYSCON Vector  --------------------------------/ 	
+	SYSCON_Int_Enable();    														//SYSCON VECTOR
+	//SYSCON_WakeUp_Enable();    													//Enable WDT wakeup INT
+//------------------------------------------------------------/
+//OSC CLOCK Calibration
+//------------------------------------------------------------/	
+	std_clk_calib(CLK_HFOSC_48M);												//Select the same clock source as the system
+	
+}
+/*********************************************************************************/  
+/*********************************************************************************/
+//APT32F102_init                                                                  /
+//EntryParameter:NONE                                                             /
+//ReturnValue:NONE                                                                /
+/*********************************************************************************/
+void APT32F102_init(void) 
+{
+//------------------------------------------------------------/
+//Peripheral clock enable and disable
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON->PCER0=0xFFFFFFF;                                        //PCLK Enable
+    SYSCON->PCER1=0xFFFFFFF;                                        //PCLK Enable
+    while(!(SYSCON->PCSR0&0x1));                                    //Wait PCLK enabled	
+//------------------------------------------------------------/
+//ISOSC/IMOSC/EMOSC/SYSCLK/IWDT/LVD/EM_CMFAIL/EM_CMRCV/CMD_ERR OSC stable interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+//------------------------------------------------------------/
+    SYSCON_CONFIG();                                                 //syscon  initial
+	CK_CPU_EnAllNormalIrq();                                         //enable all IRQ
+	SYSCON_INT_Priority();										 //initial all Priority=0xC0
+	
+	//设置中断优先级 	0最高，3最低
+	Set_INT_Priority(UART1_IRQ,1);				//串口优先级最高
+
+//------------------------------------------------------------/
+//Other IP config
+//------------------------------------------------------------/	
+	BT_CONFIG();			//BT initial
+	
+	UARTx_Init(UART_1,BLV_RLY_RS485_Pro);
+	
+	DIP_Switch_Init();
+	
+	Relay_Init();
+	
+}
+
+/******************* (C) COPYRIGHT 2019 APT Chip *****END OF FILE****/
\ No newline at end of file
diff --git a/Source/mcu_interrupt.c b/Source/mcu_interrupt.c
new file mode 100644
index 0000000..fbeb9a5
--- /dev/null
+++ b/Source/mcu_interrupt.c
@@ -0,0 +1,1009 @@
+#include "includes.h"
+
+/****************************************************
+//define
+*****************************************************/
+volatile int R_CMPA_BUF,R_CMPB_BUF;
+//volatile int R_SIOTX_count,R_SIORX_count;
+volatile int R_SIORX_buf[10];
+
+/****************************************************
+//extern
+*****************************************************/
+extern void delay_nms(unsigned int t);
+/*************************************************************/
+//CORET Interrupt
+//If you use a touch library file that does not contain coret
+//you need to open this interrupt entry
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+//void CORETHandler(void)
+//{
+//	// ISR content ...
+//}
+/*************************************************************/
+//SYSCON Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SYSCONIntHandler(void) 
+{
+    // ISR content ...
+	nop;
+	if((SYSCON->MISR&ISOSC_ST)==ISOSC_ST)				//ISOSC stable interrupt
+	{
+		SYSCON->ICR = ISOSC_ST;
+	} 
+	else if((SYSCON->MISR&IMOSC_ST)==IMOSC_ST)			//IMOSC stable interrupt
+	{
+		SYSCON->ICR = IMOSC_ST;
+	} 
+	else if((SYSCON->MISR&EMOSC_ST)==EMOSC_ST)			//EMOSC stable interrupt
+	{
+		SYSCON->ICR = EMOSC_ST;
+	} 
+	else if((SYSCON->MISR&HFOSC_ST)==HFOSC_ST)			//HFOSC stable interrupt
+	{
+		SYSCON->ICR = HFOSC_ST;
+	} 
+	else if((SYSCON->MISR&SYSCLK_ST)==SYSCLK_ST)		//SYSCLK change end & stable interrupt
+	{
+		SYSCON->ICR = SYSCLK_ST;
+	}
+	else if((SYSCON->MISR&IWDT_INT_ST)==IWDT_INT_ST)	//IWDT alarm window interrupt
+	{
+		SYSCON->ICR = IWDT_INT_ST;
+//		SYSCON->IWDCNT=0x5aul<<24;
+	}
+	else if((SYSCON->MISR&WKI_INT_ST)==WKI_INT_ST)
+	{
+		SYSCON->ICR = WKI_INT_ST;
+	}
+	else if((SYSCON->MISR&RAMERRINT_ST)==RAMERRINT_ST)	//SRAM check fail interrupt
+	{
+		SYSCON->ICR = RAMERRINT_ST;
+	}
+	else if((SYSCON->MISR&LVD_INT_ST)==LVD_INT_ST)		//LVD threshold interrupt
+	{
+		nop;
+		SYSCON->ICR = LVD_INT_ST;
+	}
+	else if((SYSCON->MISR&HWD_ERR_ST)==HWD_ERR_ST)		//Hardware Divider divisor = 0 interrupt
+	{
+		SYSCON->ICR = HWD_ERR_ST;
+	}
+	else if((SYSCON->MISR&EFL_ERR_ST)==EFL_ERR_ST)		//Flash check fail interrupt
+	{
+		SYSCON->ICR = EFL_ERR_ST;
+	}
+	else if((SYSCON->MISR&OPTERR_INT)==OPTERR_INT)		//Option load fail interrupt
+	{
+		SYSCON->ICR = OPTERR_INT;
+	}
+	else if((SYSCON->MISR&EM_CMLST_ST)==EM_CMLST_ST)	//EMOSC clock monitor fail interrupt
+	{
+		SYSCON->ICR = EM_CMLST_ST;
+	}
+	else if((SYSCON->MISR&EM_EVTRG0_ST)==EM_EVTRG0_ST)	//Event Trigger Channel 0 Interrupt
+	{
+		SYSCON->ICR = EM_EVTRG0_ST;
+	}
+	else if((SYSCON->MISR&EM_EVTRG1_ST)==EM_EVTRG1_ST)	//Event Trigger Channel 1 Interrupt
+	{
+		SYSCON->ICR = EM_EVTRG1_ST;
+	}
+	else if((SYSCON->MISR&EM_EVTRG2_ST)==EM_EVTRG2_ST)	//Event Trigger Channel 2 Interrupt
+	{
+		SYSCON->ICR = EM_EVTRG2_ST;
+	}
+	else if((SYSCON->MISR&EM_EVTRG3_ST)==EM_EVTRG3_ST)	//Event Trigger Channel 3 Interrupt
+	{
+		SYSCON->ICR = EM_EVTRG3_ST;
+	}
+	else if((SYSCON->MISR&CMD_ERR_ST)==CMD_ERR_ST)		//Command error interrupt
+	{
+		SYSCON->ICR = CMD_ERR_ST;
+	}
+}
+/*************************************************************/
+//IFC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void IFCIntHandler(void) 
+{
+    // ISR content ...
+	if(IFC->MISR&ERS_END_INT)			
+	{
+		IFC->ICR=ERS_END_INT;
+	}
+	else if(IFC->MISR&RGM_END_INT)		
+	{
+		IFC->ICR=RGM_END_INT;
+	}
+	else if(IFC->MISR&PEP_END_INT)		
+	{
+		IFC->ICR=PEP_END_INT;
+	}
+	else if(IFC->MISR&PROT_ERR_INT)		
+	{
+		IFC->ICR=PROT_ERR_INT;
+	}
+	else if(IFC->MISR&UDEF_ERR_INT)		
+	{
+		IFC->ICR=UDEF_ERR_INT;
+	}
+	else if(IFC->MISR&ADDR_ERR_INT)		
+	{
+		IFC->ICR=ADDR_ERR_INT;
+	}
+	else if(IFC->MISR&OVW_ERR_INT)		
+	{
+		IFC->ICR=OVW_ERR_INT;
+	}
+}
+/*************************************************************/
+//ADC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void ADCIntHandler(void) 
+{
+    // ISR content ...
+	if((ADC0->SR&ADC12_EOC)==ADC12_EOC)				//ADC EOC interrupt
+	{
+		ADC0->CSR = ADC12_EOC;
+	}
+	else if((ADC0->SR&ADC12_READY)==ADC12_READY)	//ADC READY interrupt
+	{
+		ADC0->CSR = ADC12_READY;
+	}
+	else if((ADC0->SR&ADC12_OVR)==ADC12_OVR)		//ADC OVR interrupt
+	{
+		ADC0->CSR = ADC12_OVR;
+	}
+	else if((ADC0->SR&ADC12_CMP0H)==ADC12_CMP0H)	//ADC CMP0H interrupt
+	{
+		ADC0->CSR = ADC12_CMP0H;
+	}
+	else if((ADC0->SR&ADC12_CMP0L)==ADC12_CMP0L)	//ADC CMP0L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP0L;
+	}
+	else if((ADC0->SR&ADC12_CMP1H)==ADC12_CMP1H)	//ADC CMP1H interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1H;
+	}
+	else if((ADC0->SR&ADC12_CMP1L)==ADC12_CMP1L)	//ADC CMP1L interrupt.
+	{
+		ADC0->CSR = ADC12_CMP1L;
+	}
+	else if((ADC0->SR&ADC12_SEQ_END0)==ADC12_SEQ_END0) //ADC SEQ0 interrupt,SEQ1~SEQ15 replace the parameter with ADC12_SEQ_END1~ADC12_SEQ_END15
+	{
+		ADC0->CSR = ADC12_SEQ_END0;
+	}
+}
+/*************************************************************/
+//EPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EPT0IntHandler(void) 
+{
+    // ISR content ...
+	if((EPT0->MISR&EPT_TRGEV0_INT)==EPT_TRGEV0_INT)			//TRGEV0 interrupt
+	{
+		EPT0->ICR=EPT_TRGEV0_INT;
+	}
+	else if((EPT0->MISR&EPT_TRGEV1_INT)==EPT_TRGEV1_INT)	//TRGEV1 interrupt
+	{
+		EPT0->ICR=EPT_TRGEV1_INT;
+	}
+	else if((EPT0->MISR&EPT_TRGEV2_INT)==EPT_TRGEV2_INT)	//TRGEV2 interrupt
+	{
+		EPT0->ICR=EPT_TRGEV2_INT;
+	}
+	else if((EPT0->MISR&EPT_TRGEV3_INT)==EPT_TRGEV3_INT)	//TRGEV3 interrupt
+	{
+		EPT0->ICR=EPT_TRGEV3_INT;
+	}	
+	else if((EPT0->MISR&EPT_CAP_LD0)==EPT_CAP_LD0)			//Capture Load to CMPA interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD0;
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIRT);
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIFT);
+		R_CMPA_BUF=EPT0->CMPA;			//Low voltage counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD1)==EPT_CAP_LD1)			//Capture Load to CMPB interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD1;
+		EXTI_trigger_CMD(ENABLE,EXI_PIN0,_EXIRT);
+		EXTI_trigger_CMD(DISABLE,EXI_PIN0,_EXIFT);
+		R_CMPB_BUF=EPT0->CMPB;			//Duty counter
+	}
+	else if((EPT0->MISR&EPT_CAP_LD2)==EPT_CAP_LD2)			//Capture Load to CMPC interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD2;
+	}
+	else if((EPT0->MISR&EPT_CAP_LD3)==EPT_CAP_LD3)			//Capture Load to CMPD interrupt
+	{
+		EPT0->ICR=EPT_CAP_LD3;
+	}
+	else if((EPT0->MISR&EPT_CAU)==EPT_CAU)					//Up-Counting phase CNT = CMPA interrupt
+	{
+		EPT0->ICR=EPT_CAU;
+	}
+	else if((EPT0->MISR&EPT_CAD)==EPT_CAD)					//Down-Counting phase CNT = CMPA interrupt
+	{
+		EPT0->ICR=EPT_CAD;
+	}
+	else if((EPT0->MISR&EPT_CBU)==EPT_CBU)					//Up-Counting phase CNT = CMPB interrupt 
+	{
+		EPT0->ICR=EPT_CBU;
+	}
+	else if((EPT0->MISR&EPT_CBD)==EPT_CBD)					//Down-Counting phase CNT = CMPB interrupt
+	{
+		EPT0->ICR=EPT_CBD;
+	}
+	else if((EPT0->MISR&EPT_CCU)==EPT_CCU)					//Up-Counting phase CNT = CMPC interrupt 
+	{
+		EPT0->ICR=EPT_CCU;
+	}
+	else if((EPT0->MISR&EPT_CCD)==EPT_CCD)					//Down-Counting phase CNT = CMPC interrupt
+	{
+		EPT0->ICR=EPT_CCD;
+	}
+	else if((EPT0->MISR&EPT_CDU)==EPT_CDU)					//Up-Counting phase CNT = CMPD interrupt
+	{
+		EPT0->ICR=EPT_CDU;
+	}
+	else if((EPT0->MISR&EPT_CDD)==EPT_CDD)					//Down-Counting phase CNT = CMPD interrupt
+	{
+		EPT0->ICR=EPT_CDD;
+	}
+	else if((EPT0->MISR&EPT_PEND)==EPT_PEND)				//End of cycle interrupt
+	{
+		EPT0->ICR=EPT_PEND;
+		//EPT_PRDR_CMPA_CMPB_CMPC_CMPD_Config(50,0,50,0,0);
+		EPT_Stop();
+	}
+	//Emergency interruption
+	if((EPT0->EMMISR&EPT_EP0_EMINT)==EPT_EP0_EMINT)			//interrupt flag of EP0 event
+	{
+		EPT0->EMICR=EPT_EP0_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP1_EMINT)==EPT_EP1_EMINT)	//interrupt flag of EP1 event
+	{
+		EPT0->EMICR=EPT_EP1_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP2_EMINT)==EPT_EP2_EMINT)	//interrupt flag of EP2 event
+	{
+		EPT0->EMICR=EPT_EP2_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP3_EMINT)==EPT_EP3_EMINT)	//interrupt flag of EP3 event
+	{
+		EPT0->EMICR=EPT_EP3_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP4_EMINT)==EPT_EP4_EMINT)	//interrupt flag of EP4 event
+	{
+		EPT0->EMICR=EPT_EP4_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP5_EMINT)==EPT_EP5_EMINT)	//interrupt flag of EP5 event
+	{
+		EPT0->EMICR=EPT_EP5_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP6_EMINT)==EPT_EP6_EMINT)	//interrupt flag of EP6 event
+	{
+		EPT0->EMICR=EPT_EP6_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EP7_EMINT)==EPT_EP7_EMINT)	//interrupt flag of EP7 event
+	{
+		EPT0->EMICR=EPT_EP7_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_CPU_FAULT_EMINT)==EPT_CPU_FAULT_EMINT)	//interrupt flag of CPU_FAULT event
+	{
+		EPT0->EMICR=EPT_CPU_FAULT_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_MEM_FAULT_EMINT)==EPT_MEM_FAULT_EMINT)	//interrupt flag of MEM_FAULT event
+	{
+		EPT0->EMICR=EPT_MEM_FAULT_EMINT;
+	}
+	else if((EPT0->EMMISR&EPT_EOM_FAULT_EMINT)==EPT_EOM_FAULT_EMINT)	//interrupt flag of EOM_FAULT event
+	{
+		EPT0->EMICR=EPT_EOM_FAULT_EMINT;
+	}
+}
+/*************************************************************/
+//WWDT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void WWDTHandler(void)
+{
+	WWDT->ICR=0X01;
+	WWDT_CNT_Load(0xFF);
+	if((WWDT->MISR&WWDT_EVI)==WWDT_EVI)					//WWDT EVI interrupt
+	{
+		WWDT->ICR = WWDT_EVI;
+	} 
+}
+/*************************************************************/
+//GPT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void GPT0IntHandler(void) 
+{
+    // ISR content ...
+	if((GPT0->MISR&GPT_INT_TRGEV0)==GPT_INT_TRGEV0)			//TRGEV0 interrupt
+	{
+		GPT0->ICR = GPT_INT_TRGEV0;
+	} 
+	else if((GPT0->MISR&GPT_INT_TRGEV1)==GPT_INT_TRGEV1)	//TRGEV1 interrupt
+	{
+		GPT0->ICR = GPT_INT_TRGEV1;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD0)==GPT_INT_CAPLD0)		//Capture Load to CMPA interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD0;
+	}
+	else if((GPT0->MISR&GPT_INT_CAPLD1)==GPT_INT_CAPLD1)		//Capture Load to CMPB interrupt
+	{
+		GPT0->ICR = GPT_INT_CAPLD1;
+	}
+	else if((GPT0->MISR&GPT_INT_CAU)==GPT_INT_CAU)			//Up-Counting phase CNT = CMPA Interrupt
+	{
+		GPT0->ICR = GPT_INT_CAU;
+	}
+	else if((GPT0->MISR&GPT_INT_CAD)==GPT_INT_CAD)			//Down-Counting phase CNT = CMPA Interrupt
+	{
+		GPT0->ICR = GPT_INT_CAD;
+	}
+	else if((GPT0->MISR&GPT_INT_CBU)==GPT_INT_CBU)			//Up-Counting phase CNT = CMPB Interrupt
+	{
+		GPT0->ICR = GPT_INT_CBU;
+	}
+	else if((GPT0->MISR&GPT_INT_CBD)==GPT_INT_CBD)			//Down-Counting phase CNT = CMPB Interrupt
+	{
+		GPT0->ICR = GPT_INT_CBD;
+	}
+	else if((GPT0->MISR&GPT_INT_PEND)==GPT_INT_PEND)		//End of cycle interrupt 
+	{
+		GPT0->ICR = GPT_INT_PEND;
+	}
+}
+/*************************************************************/
+//RTC Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void RTCIntHandler(void) 
+{
+    // ISR content ...
+	if((RTC->MISR&ALRA_INT)==ALRA_INT)			//Interrupt of alarm A
+	{
+		RTC->ICR=ALRA_INT;
+		RTC->KEY=0XCA53;
+		RTC->CR=RTC->CR|0x01;
+		RTC->TIMR=(0x10<<16)|(0x00<<8)|(0x00);			//Hour bit6->0:am 1:pm	
+		while(RTC->CR&0x02);							//busy TIMR DATR ALRAR ALRBR Update done
+		RTC->CR &= ~0x1;
+	}
+	else if((RTC->MISR&ALRB_INT)==ALRB_INT)			//Interrupt of alarm B				
+	{
+		RTC->ICR=ALRB_INT;
+	}
+	else if((RTC->MISR&CPRD_INT)==CPRD_INT)			//Interrupt of alarm CPRD
+	{
+		RTC->ICR=CPRD_INT;
+	}
+	else if((RTC->MISR&RTC_TRGEV0_INT)==RTC_TRGEV0_INT)		//Interrupt of trigger event 0
+	{
+		RTC->ICR=RTC_TRGEV0_INT;
+	}
+	else if((RTC->MISR&RTC_TRGEV1_INT)==RTC_TRGEV1_INT)		//Interrupt of trigger event 1
+	{
+		RTC->ICR=RTC_TRGEV1_INT;
+	}
+}
+/*************************************************************/
+//UART0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART0IntHandler(void) 
+{
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART0->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+	{
+		UART0->ISR=UART_RX_INT_S;
+//		inchar = CSP_UART_GET_DATA(UART0);
+//		UARTTxByte(UART0,inchar);
+	}
+	else if( (UART0->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    {
+		UART0->ISR=UART_TX_INT_S;
+		//TxDataFlag = TRUE;
+	}
+	else if ((UART0->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+	{
+		UART0->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART0->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART0->ISR=UART_TX_IOV_S;
+	}
+}
+/*************************************************************/
+//UART1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART1IntHandler(void) 
+{
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART1->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+	{
+		UART1->ISR=UART_RX_INT_S;
+		inchar = CSP_UART_GET_DATA(UART1);
+		UART1_RecvINT_Processing(inchar);
+		
+	}
+	else if( (UART1->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    {
+		UART1->ISR=UART_TX_INT_S;
+		//TxDataFlag = TRUE;
+		
+		RS485_Comming = 0x01;
+		
+		if(RS485_Comm_Flag == 0x01){
+			RS485_Comm_Start ++;
+		}		
+	}
+	else if ((UART1->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+	{
+		UART1->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART1->ISR=UART_TX_IOV_S;
+	}
+	else if ((UART1->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+	{
+		UART1->ISR=UART_TX_DONE_S;
+		
+		RS485_Comming = 0x00;
+		if(RS485_Comm_Flag == 0x01){
+			RS485_Comm_End ++;
+		}
+		
+	}	
+}
+/*************************************************************/
+//UART2 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void UART2IntHandler(void) 
+{
+	char inchar = 0;
+	
+    // ISR content ...
+	if ((UART2->ISR&UART_RX_INT_S)==UART_RX_INT_S)				//RX interrupt
+	{
+		UART2->ISR=UART_RX_INT_S;
+//		inchar = CSP_UART_GET_DATA(UART2);
+//		UART2_RecvINT_Processing(inchar);
+	}
+	else if( (UART2->ISR&UART_TX_INT_S)==UART_TX_INT_S ) 		//TX interrupt
+    {
+		UART2->ISR=UART_TX_INT_S;
+		//TxDataFlag = TRUE;
+		
+		
+//		RS485_Comming = 0x01;
+//		
+//		if(RS485_Comm_Flag == 0x01){
+//			RS485_Comm_Start ++;
+//		}
+	}
+	else if ((UART2->ISR&UART_RX_IOV_S)==UART_RX_IOV_S)			//RX overrun interrupt
+	{
+		UART2->ISR=UART_RX_IOV_S;
+	}
+	else if ((UART2->ISR&UART_TX_IOV_S)==UART_TX_IOV_S)			//TX overrun interrupt
+	{
+		UART2->ISR=UART_TX_IOV_S;
+	}
+	else if ((UART2->ISR&UART_TX_DONE_S)==UART_TX_DONE_S)			
+	{
+		UART2->ISR=UART_TX_DONE_S;
+		
+//		RS485_Comming = 0x00;
+//		if(RS485_Comm_Flag == 0x01){
+//			RS485_Comm_End ++;
+//		}
+		
+	}
+	
+}
+/*************************************************************/
+//I2C Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void I2CIntHandler(void) 
+{
+    // ISR content ...
+	//I2C_Slave_Receive();										//I2C slave receive function in interruption
+}
+/*************************************************************/
+//SPI Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SPI0IntHandler(void) 
+{
+    // ISR content ...
+	if((SPI0->MISR&SPI_PORIM)==SPI_PORIM)					//Receive Overrun Interrupt
+	{
+		SPI0->ICR = SPI_PORIM;
+	} 
+	else if((SPI0->MISR&SPI_RTIM)==SPI_RTIM)				//Receive Timeout Interrupt
+	{
+		SPI0->ICR = SPI_RTIM;
+	}
+	else if((SPI0->MISR&SPI_RXIM)==SPI_RXIM)				//Receive FIFO Interrupt,FIFO can be set 1/8,1/4,1/2 FIFO Interrupt
+	{
+		SPI0->ICR = SPI_RXIM;
+		if(SPI0->DR==0xaa)
+		{
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x11;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x12;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x13;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x14;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x15;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+/*			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x16;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x17;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？
+			
+			while(((SPI0->SR) & SSP_TNF) != SSP_TNF);	//Transmit FIFO is not full？
+			SPI0->DR = 0x18;
+			while(((SPI0->SR) & SSP_BSY) == SSP_BSY);	//Send or receive over？*/
+		}
+		else
+		{
+			if(((SPI0->SR) & SSP_TFE)!=SSP_TFE)
+			{
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				SPI0->DR=0x0;								//FIFO=0
+				while(((SPI0->SR) & SSP_BSY) == SSP_BSY);		//Send or receive over？
+			}
+		}
+	}
+	else if((SPI0->MISR&SPI_TXIM)==SPI_TXIM)				//Transmit FIFO Interrupt
+	{
+		SPI0->ICR = SPI_TXIM;
+	}
+
+}
+/*************************************************************/
+//SIO Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void SIO0IntHandler(void) 
+{
+    // ISR content ...
+	//The sequence is more than 16bit to send the program
+	//1.disable interrupt in main loop 2.set the highest priority in the interrupt
+	/*CK801->IPR[0]=0X40404040;
+	CK801->IPR[1]=0X40404040;
+	CK801->IPR[2]=0X40404040;
+	CK801->IPR[3]=0X40404040;
+	CK801->IPR[4]=0X40404040;
+	CK801->IPR[5]=0X40404000;
+	CK801->IPR[6]=0X40404040;
+	CK801->IPR[7]=0X40404040;*/
+	//TXBUFEMPT  The sequence length exceeds 15bit needs to be updated into this interrupt
+	if(SIO0->MISR&0X04)
+	{
+		SIO0->ICR=0X04;
+		
+	}
+	if(SIO0->MISR&0X01)					//TXDNE  发送完成
+	{
+		SIO0->ICR=0X01;
+		//SIO0->TXBUF=0x00;		//0:D0,1:D1,2:DL,3:DH;
+				
+		//tm1812_param.write_cnt=0;
+		
+		//INTC_ICER_WRITE(SIO_INT);
+		
+	}
+	
+	//The sequence is less than 16bit to send the program
+	/*if(SIO0->MISR&0X01)					//TXDNE
+	{
+		SIO0->ICR=0X01;
+		delay_nms(10);
+		SIO0->TXBUF=(0x03<<30)|(0x02<<28)|(0x03<<26)|(0x02<<24)|(0x03<<22)|(0x02<<20)|(0x03<<18)|(0x02<<16)|
+				(0x01<<14)|(0x00<<12)|(0x01<<10)|(0x00<<8)|(0x01<<6)|(0x00<<4)|(0x01<<2)|(0x0<<0);		//0:D0,1:D1,2:DL,3:DH;	
+	}*/
+	
+	if(SIO0->MISR&0X02)					//RXDNE
+	{
+		SIO0->ICR=0X02;
+//		if(R_SIORX_count>=1)
+//		{
+//			R_SIORX_buf[R_SIORX_count]=SIO0->RXBUF&0xff000000;			//8bit
+//			nop;
+//			R_SIORX_count=0;
+//		}
+	}
+	else if(SIO0->MISR&0X08)					//RXBUFFULL	
+	{
+		SIO0->ICR=0X08;
+//		if(R_SIORX_count<1)
+//		{
+//			R_SIORX_buf[R_SIORX_count]=SIO0->RXBUF;				//32bit
+//			R_SIORX_count++;
+//		}
+	}
+	else if(SIO0->MISR&0X010)				//BREAK
+	{
+		SIO0->ICR=0X10;
+	}
+	else if(SIO0->MISR&0X020)				//TIMEOUT
+	{
+		SIO0->ICR=0X20;
+	}
+}
+/*************************************************************/
+//EXT0/16 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI0IntHandler(void) 
+{
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN0)==EXI_PIN0) 			//EXT0 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN0;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN16)==EXI_PIN16) 		//EXT16 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN16;
+	}
+}
+/*************************************************************/
+//EXT1/17 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI1IntHandler(void) 
+{
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN1)==EXI_PIN1) 			//EXT1 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN1;
+
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN17)==EXI_PIN17) 		//EXT17 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN17;
+	}
+}
+/*************************************************************/
+//EXI2~3 18~19Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI2to3IntHandler(void) 
+{
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN2)==EXI_PIN2) 			//EXT2 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN2;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN3)==EXI_PIN3) 		//EXT3 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN3;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN18)==EXI_PIN18) 		//EXT18 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN18;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN19)==EXI_PIN19) 		//EXT19 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN19;
+	}
+}
+/*************************************************************/
+//EXI4~9 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI4to9IntHandler(void) 
+{
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN4)==EXI_PIN4) 			//EXT4 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN4;
+		
+		
+	} 
+//	else if ((SYSCON->EXIRS&EXI_PIN5)==EXI_PIN5) 		//EXT5 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN5;
+//	} 
+//	else if ((SYSCON->EXIRS&EXI_PIN6)==EXI_PIN6) 		//EXT6 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN6;
+//	} 
+//	else if ((SYSCON->EXIRS&EXI_PIN7)==EXI_PIN7) 		//EXT7 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN7;
+//	} 
+//	else if ((SYSCON->EXIRS&EXI_PIN8)==EXI_PIN8) 		//EXT8 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN8;
+//	}
+//	else if ((SYSCON->EXIRS&EXI_PIN9)==EXI_PIN9) 		//EXT9 Interrupt
+//	{
+//		SYSCON->EXICR = EXI_PIN9;
+//	} 
+
+}
+/*************************************************************/
+//EXI4 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void EXI10to15IntHandler(void) 
+{
+    // ISR content ...
+	if ((SYSCON->EXIRS&EXI_PIN10)==EXI_PIN10) 			//EXT10 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN10;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN11)==EXI_PIN11) 		//EXT11 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN11;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN12)==EXI_PIN12) 		//EXT12 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN12;
+	} 
+	else if ((SYSCON->EXIRS&EXI_PIN13)==EXI_PIN13) 		//EXT13 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN13;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN14)==EXI_PIN14) 		//EXT14 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN14;
+	}
+	else if ((SYSCON->EXIRS&EXI_PIN15)==EXI_PIN15) 		//EXT15 Interrupt
+	{
+		SYSCON->EXICR = EXI_PIN15;
+		
+		BusBusy_Task();
+	}
+}
+/*************************************************************/
+//CONTA Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void CNTAIntHandler(void) 
+{
+    // ISR content ...
+}
+/*************************************************************/
+//LPT Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void LPTIntHandler(void) 
+{
+    // ISR content ...
+	if((LPT->MISR&LPT_TRGEV0)==LPT_TRGEV0)			//TRGEV0 interrupt
+	{
+		LPT->ICR = LPT_TRGEV0;
+	} 
+	else if((LPT->MISR&LPT_MATCH)==LPT_MATCH)		//MATCH interrupt
+	{
+		LPT->ICR = LPT_MATCH;
+	}
+	else if((LPT->MISR&LPT_PEND)==LPT_PEND)			//PEND interrupt
+	{
+		LPT->ICR = LPT_PEND;
+	}
+}
+
+
+/*************************************************************/
+//BT0 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+U8_T BT_TEMP_State = 1;
+void BT0IntHandler(void) 
+{
+    // ISR content ...
+	if((BT0->MISR&BT_PEND)==BT_PEND)				//BT0 PEND interrupt
+	{
+		BT0->ICR = BT_PEND;
+		
+		//BT_Stop_Low(BT0);
+
+		BT0->CR =BT0->CR & ~(0x01<<6);
+		BT0->RSSR &=0X0;
+	} 
+	else if((BT0->MISR&BT_CMP)==BT_CMP)				//BT0 CMP Match interrupt 
+	{
+		BT0->ICR = BT_CMP;
+		
+	}
+	else if((BT0->MISR&BT_OVF)==BT_OVF)				//BT0 OVF interrupt
+	{
+		BT0->ICR = BT_OVF;
+	} 
+	else if((BT0->MISR&BT_EVTRG)==BT_EVTRG)			//BT0 Event trigger interrupt
+	{
+		BT0->ICR = BT_EVTRG;
+	} 
+}
+
+volatile U32_T SysTick_100us = 0;
+volatile U32_T SysTick_1ms = 0;
+
+/*************************************************************/
+//BT1 Interrupt
+//EntryParameter:NONE
+//ReturnValue:NONE
+/*************************************************************/
+void BT1IntHandler(void) 
+{
+	static U8_T NUM = 0;
+    // ISR content ...
+	if((BT1->MISR&BT_PEND)==BT_PEND)				//BT1 PEND interrupt
+	{
+		BT1->ICR = BT_PEND;
+	} 
+	else if((BT1->MISR&BT_CMP)==BT_CMP)				//BT1 CMP Match interrupt 
+	{
+		BT1->ICR = BT_CMP;
+		
+		NUM++;
+		SysTick_100us++;
+		
+		if(NUM >= 10){
+			NUM = 0;
+			SysTick_1ms++;
+			
+			BusIdle_Task();
+		}
+		
+	}
+	else if((BT1->MISR&BT_OVF)==BT_OVF)				//BT1 OVF interrupt
+	{
+		BT1->ICR = BT_OVF;
+	} 
+	else if((BT1->MISR&BT_EVTRG)==BT_EVTRG)			//BT1 Event trigger interrupt
+	{
+		BT1->ICR = BT_EVTRG;
+	} 
+}
+/*************************************************************/
+/*************************************************************/
+/*************************************************************/
+//void TKEYIntHandler(void) 
+//{
+//    // ISR content ...
+//
+//}
+
+void PriviledgeVioHandler(void) 
+{
+    // ISR content ...
+
+}
+
+void SystemDesPtr(void) 
+{
+    // ISR content ...
+
+}
+
+void MisalignedHandler(void) 
+{
+    // ISR content ...
+
+}
+
+void IllegalInstrHandler(void) 
+{
+    // ISR content ...
+
+}
+
+void AccessErrHandler(void) 
+{
+    // ISR content ...
+
+}
+
+void BreakPointHandler(void) 
+{
+    // ISR content ...
+
+}
+
+void UnrecExecpHandler(void) 
+{
+    // ISR content ...
+
+}
+
+void Trap0Handler(void) 
+{
+    // ISR content ...
+
+}
+
+void Trap1Handler(void) 
+{
+    // ISR content ...
+
+}
+
+void Trap2Handler(void) 
+{
+    // ISR content ...
+
+}
+
+void Trap3Handler(void) 
+{
+    // ISR content ...
+
+}
+
+void PendTrapHandler(void) 
+{
+    // ISR content ...
+
+}
+/******************* (C) COPYRIGHT 2020 APT Chip *****END OF FILE****/
+
diff --git a/TCRLY_10V温控继电器说明.txt b/TCRLY_10V温控继电器说明.txt
new file mode 100644
index 0000000..083479f
--- /dev/null
+++ b/TCRLY_10V温控继电器说明.txt
@@ -0,0 +1,10 @@
+2025-06-26
+
+	0V-10V温控继电器功能描述：
+		1、设备地址设置为硬件拨码开关地址加上20，如拨码开关为1，实际设备地址为21.
+		2、部分文档中记录数据包校验为和校验，实际主机固件中数据包为和校验取反
+		3、继电器1，2是实体继电器，这两个继电器有状态指示灯。
+		4、继电器3，继电器4，继电器5是低、中、高风速继电器，继电器开时输出电压。
+	        注意：当控制多个风速继电器开时，高风速会覆盖低风速，所以如果控制多个风速继电器时，输出电压为高位继电器的电压。
+		5、默认低风速3000mV、中风速6000mV、高风速10000mV、风速停0mV。
+		6、协议使用A9继电器协议，对应前五位继电器。
\ No newline at end of file
diff --git a/Workspace/APT32F102x_StdPeriph_Lib/.cdk/APT32F102x_StdPeriph_Lib.session b/Workspace/APT32F102x_StdPeriph_Lib/.cdk/APT32F102x_StdPeriph_Lib.session
new file mode 100644
index 0000000..ed59b42
--- /dev/null
+++ b/Workspace/APT32F102x_StdPeriph_Lib/.cdk/APT32F102x_StdPeriph_Lib.session
@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<Session Name="E:\BLV_SYNC\BLV_RD\2023-Project\PB 2.0\BLV-C8\Design Files\BLV_PB_C8_V03\APT32F1023_PB_V01\Workspace\APT32F102x_StdPeriph_Lib\APT32F102x_StdPeriph_Lib.cdkws">
+  <int Value="0" Name="m_selectedTab"/>
+  <wxString Value="E:\BLV_SYNC\BLV_RD\2023-Project\PB 2.0\BLV-C8\Design Files\BLV_PB_C8_V03\APT32F1023_PB_V01\Workspace\APT32F102x_StdPeriph_Lib\APT32F102x_StdPeriph_Lib.cdkws" Name="m_workspaceName"/>
+  <TabInfoArray Name="TabInfoArray"/>
+  <SerializedObject Name="m_breakpoints">
+    <long Value="0" Name="Count"/>
+  </SerializedObject>
+</Session>
diff --git a/Workspace/APT32F102x_StdPeriph_Lib/.cdk/APT32F102x_StdPeriph_Lib.tags b/Workspace/APT32F102x_StdPeriph_Lib/.cdk/APT32F102x_StdPeriph_Lib.tags
new file mode 100644
index 0000000..6755c29
Binary files /dev/null and b/Workspace/APT32F102x_StdPeriph_Lib/.cdk/APT32F102x_StdPeriph_Lib.tags differ
diff --git a/Workspace/APT32F102x_StdPeriph_Lib/.cdk/refactoring.db b/Workspace/APT32F102x_StdPeriph_Lib/.cdk/refactoring.db
new file mode 100644
index 0000000..602adc9
Binary files /dev/null and b/Workspace/APT32F102x_StdPeriph_Lib/.cdk/refactoring.db differ
diff --git a/Workspace/APT32F102x_StdPeriph_Lib/APT32F102x_StdPeriph_Lib.cdkws b/Workspace/APT32F102x_StdPeriph_Lib/APT32F102x_StdPeriph_Lib.cdkws
new file mode 100644
index 0000000..9af6a88
--- /dev/null
+++ b/Workspace/APT32F102x_StdPeriph_Lib/APT32F102x_StdPeriph_Lib.cdkws
@@ -0,0 +1,11 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<CDK_Workspace Name="APT32F102x_StdPeriph_Lib" Database="">
+  <DefaultPackPath>$(CDKWS)\__workspace_pack__</DefaultPackPath>
+  <Project Name="apt32f102" Path="../../Source/apt32f102.cdkproj" Active="Yes"/>
+  <BuildMatrix>
+    <WorkspaceConfiguration Name="Debug" Selected="yes">
+      <Environment/>
+      <Project Name="apt32f102" ConfigName="BuildSet"/>
+    </WorkspaceConfiguration>
+  </BuildMatrix>
+</CDK_Workspace>
diff --git a/Workspace/APT32F102x_StdPeriph_Lib/cdkws.mk b/Workspace/APT32F102x_StdPeriph_Lib/cdkws.mk
new file mode 100644
index 0000000..f0f7a3b
--- /dev/null
+++ b/Workspace/APT32F102x_StdPeriph_Lib/cdkws.mk
@@ -0,0 +1,14 @@
+.PHONY: clean All Project_Title Project_Build
+
+All: Project_Title Project_Build
+
+Project_Title:
+	@echo "----------Building project:[ apt32f102 - BuildSet ]----------"
+
+Project_Build:
+	@make -r -f apt32f102.mk -j 8 -C  D:/MyCode/APT/Project_Code/APT32F1023_Test_20230728/Source 
+
+
+clean:
+	@echo "----------Cleaning project:[ apt32f102 - BuildSet ]----------"
+