378 lines
13 KiB
C
378 lines
13 KiB
C
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/*
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******************************************************************************
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* @file apt32f102_gpt.c
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* @author APT AE Team
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* @version V1.08
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* @date 2021/06/21
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******************************************************************************
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*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
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*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
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*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
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*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
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*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
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*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "apt32f102_gpt.h"
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/*************************************************************/
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//GPT RESET CLEAR ALL REGISTER
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_DeInit(void)
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{
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GPT0->CEDR = 0xBE980000;
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GPT0->RSSR = GPT_RESET_VALUE;
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GPT0->PSCR = GPT_RESET_VALUE;
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GPT0->CR = 0X00010010;
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GPT0->SYNCR = GPT_RESET_VALUE;
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GPT0->GLDCR = GPT_RESET_VALUE;
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GPT0->GLDCFG = GPT_RESET_VALUE;
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GPT0->GLDCR2 = GPT_RESET_VALUE;
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GPT0->PRDR = GPT_RESET_VALUE;
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GPT0->CMPA = GPT_RESET_VALUE;
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GPT0->CMPB = GPT_RESET_VALUE;
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GPT0->CMPLDR = 0X00002490;
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GPT0->CNT = GPT_RESET_VALUE;
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GPT0->AQLDR = 0X00000024;
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GPT0->AQCRA = GPT_RESET_VALUE;
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GPT0->AQCRB = GPT_RESET_VALUE;
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GPT0->AQOSF = 0X00000100;
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GPT0->AQCSF = GPT_RESET_VALUE;
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GPT0->TRGFTCR = GPT_RESET_VALUE;
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GPT0->TRGFTWR = GPT_RESET_VALUE;
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GPT0->EVTRG = GPT_RESET_VALUE;
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GPT0->EVPS = GPT_RESET_VALUE;
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GPT0->EVCNTINIT = GPT_RESET_VALUE;
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GPT0->EVSWF = GPT_RESET_VALUE;
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GPT0->RISR = GPT_RESET_VALUE;
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GPT0->MISR = GPT_RESET_VALUE;
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GPT0->IMCR = GPT_RESET_VALUE;
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GPT0->ICR = GPT_RESET_VALUE;
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GPT0->REGLINK = GPT_RESET_VALUE;
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}
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/*************************************************************/
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//GPT IO Init
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//EntryParameter:GPT_CHA_PB01,GPT_CHA_PA09,GPT_CHA_PA010,GPT_CHB_PA010,GPT_CHB_PA011,GPT_CHB_PB00,GPT_CHB_PB01
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_IO_Init(GPT_IOSET_TypeDef IONAME)
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{
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if(IONAME==GPT_CHA_PB01)
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{
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GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000050;
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}
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if(IONAME==GPT_CHA_PA09)
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{
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GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFFF0F)|0x00000050;
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}
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if(IONAME==GPT_CHA_PA010)
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{
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GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000600;
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}
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if(IONAME==GPT_CHB_PA010)
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{
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GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFFF0FF)|0x00000700;
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}
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if(IONAME==GPT_CHB_PA011)
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{
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GPIOA0->CONHR=(GPIOA0->CONHR & 0XFFFF0FFF)|0x00006000;
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}
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if(IONAME==GPT_CHB_PB00)
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{
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GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFFF0)|0x00000004;
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}
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if(IONAME==GPT_CHB_PB01)
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{
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GPIOB0->CONLR=(GPIOB0->CONLR & 0XFFFFFF0F)|0x00000060;
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}
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}
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/*************************************************************/
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//GPT Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Configure(GPT_CLK_TypeDef GPTCLKX,GPT_CSS_TypeDef GCSSX,GPT_SHDWSTP_TypeDef GSHDWSTPX,U16_T GPSCX)
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{
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GPT0->CEDR = GPTCLKX| GCSSX|GSHDWSTPX;
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GPT0->PSCR=GPSCX;
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}
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/*************************************************************/
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//GPT Wave control Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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//GPT0->CR = (0X0<<0)|(0x00<<2)|(0x01<<3)|(0x00<<4)|(0X00<<6)|(0x01<<18)|(0x00<<9)|(0X00<<10)|(0x00<<11)|(0x00<<13) ;
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//GPT0->CMPLDR=(0X00<<0)|(0X00<<1)|(0X03<<4)|(0X03<<7);
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void GPT_WaveCtrl_Configure(GPT_CNTMD_TypeDef GCNTMDX,GPT_SWSYN_TypeDef GSWSYNX,GPT_IDLEST_TypeDef GIDLEX,GPT_PRDLD0_TypeDef GPRDLD0,GPT_OPM_TypeDef GOPMX,
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GPT_BURST_TypeDef GBURSTX,GPT_CKS_TypeDef GCKS,GPT_CGSRC_TypeDef CGSRCX,GPT_CGFLT_TypeDef CGFLT,GPT_PSCLD_TypeDef PSCLDX)
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{
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GPT0->CR =GCNTMDX|GSWSYNX|GIDLEX|GPRDLD0|GOPMX|GBURSTX|GCKS|CGSRCX|CGFLT|PSCLDX|GPT_WAVE_MODE;
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}
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/*************************************************************/
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//GPT Wave control Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_WaveLoad_Configure(GPT_SHDWAQA_TypeDef SHDWAQAX,GPT_SHDWAQB_TypeDef SHDWAQBX,GPT_AQLDA_TypeDef AQLDAX, GPT_AQLDB_TypeDef AQLDBX)
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{
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GPT0->AQLDR=SHDWAQAX|SHDWAQBX|AQLDAX|AQLDBX;
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}
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/*************************************************************/
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//GPT Wave A OUT Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_WaveOut_Configure(GPT_GPTCHX_TypeDef GPTCHX,GPT_CASEL_TypeDef CASELX,GPT_CBSEL_TypeDef CBSELX,U8_T ZROX,U8_T PRDX,U8_T CAUX,
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U8_T CADX,U8_T CBUX,U8_T CBDX,U8_T T1UX,U8_T T1DX,U8_T T2UX,U8_T T2DX)
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{
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if(GPTCHX==GPT_CHA)
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{
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GPT0->AQCRA=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
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}
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if(GPTCHX==GPT_CHB)
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{
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GPT0->AQCRB=CASELX|CBSELX|(ZROX<<0)|(PRDX<<2)|(CAUX<<4)|(CADX<<6)|(CBUX<<8)|(CBDX<<10)|(T1UX<<12)|(T1DX<<14)|(T2UX<<16)|(T2DX<<18);
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}
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}
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/*************************************************************/
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//Deinitializes the GPT Caputer Config
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//EntryParameter:GPT_CNTMD_SELECTE_X,GPT_CAPMD_SELECTE_X,GPT_LOAD_CMPA_RST_CMD~GPT_LOAD_CMPB_RST_CMD,GPT_STOP_WRAP,GPT_PSCR
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//GPT_CNTMD_SELECTE_X:GPT_CNTMD_increase,GPT_CNTMD_decrease,GPT_CNTMD_increaseTOdecrease
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//GPT_CAPMD_SELECTE_X:GPT_CAPMD_Once,GPT_CAPMD_Continue
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//GPT_LOAD_CMPA_RST_CMD:GPT_LDARST_EN,GPT_LDARST_DIS
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//GPT_LOAD_CMPB_RST_CMD:GPT_LDBRST_EN,GPT_LDBRST_DIS
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//GPT_STOP_WRAP:0~3
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//GPT_PSCR:0~0XFFFF
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Capture_Config(GPT_CNTMD_SELECTE_Type GPT_CNTMD_SELECTE_X , GPT_CAPMD_SELECTE_Type GPT_CAPMD_SELECTE_X , GPT_CAPLDEN_TypeDef CAP_CMD
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, GPT_LDARST_TypeDef GPT_LOAD_CMPA_RST_CMD , GPT_LDBRST_TypeDef GPT_LOAD_CMPB_RST_CMD ,
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GPT_LOAD_CMPC_RST_CMD_Type GPT_LOAD_CMPC_RST_CMD , GPT_LOAD_CMPD_RST_CMD_Type GPT_LOAD_CMPD_RST_CMD, U8_T GPT_STOP_WRAP )
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{
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GPT0->CR=(GPT0->CR&0xf800fec0)|GPT_CNTMD_SELECTE_X|(0x0<<2)|(0x0<<3)|(0x0<<4)|CAP_CMD|GPT_CAPMD_SELECTE_X|(0X0<<16)|(0x0<<18)|(GPT_STOP_WRAP<<21)|
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GPT_LOAD_CMPA_RST_CMD|GPT_LOAD_CMPB_RST_CMD|GPT_LOAD_CMPC_RST_CMD|GPT_LOAD_CMPD_RST_CMD;
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}
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/*************************************************************/
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//GPT SYNC Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_SyncSet_Configure(GPT_SYNCENX_TypeDef SYNCENx,GPT_OSTMDX_TypeDef OSTMDx,GPT_TXREARM0_TypeDef TXREARM0x,GPT_TRGO0SEL_TypeDef TRGO0SELx,
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GPT_TRGO1SEL_TypeDef TRGO1SELx,GPT_AREARM_TypeDef AREARMx)
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{
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GPT0->SYNCR |= SYNCENx| OSTMDx| TXREARM0x |TRGO0SELx|TRGO1SELx|AREARMx;
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}
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/*************************************************************/
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//GPT Trigger Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Trigger_Configure(GPT_SRCSEL_TypeDef SRCSELx,GPT_BLKINV_TypeDef BLKINVx,GPT_ALIGNMD_TypeDef ALIGNMDx,GPT_CROSSMD_TypeDef CROSSMDx,
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U16_T G_OFFSET_DATA,U16_T G_WINDOW_DATA)
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{
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GPT0->TRGFTCR |= SRCSELx| BLKINVx|ALIGNMDx| CROSSMDx;
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GPT0->TRGFTWR |= G_OFFSET_DATA |(G_WINDOW_DATA<<16);
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}
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/*************************************************************/
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//GPT Trigger Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_EVTRG_Configure(GPT_TRGSRC0_TypeDef TRGSRC0x,GPT_TRGSRC1_TypeDef TRGSRC1x,GPT_ESYN0OE_TypeDef ESYN0OEx,GPT_ESYN1OE_TypeDef ESYN1OEx,
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GPT_CNT0INIT_TypeDef CNT0INITx,GPT_CNT1INIT_TypeDef CNT1INITx,U8_T TRGEV0prd,U8_T TRGEV1prd,U8_T TRGEV0cnt,U8_T TRGEV1cnt)
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{
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GPT0->EVTRG |= TRGSRC0x |TRGSRC1x|ESYN0OEx|ESYN1OEx|CNT0INITx|CNT1INITx;
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GPT0->EVPS |= TRGEV0prd|(TRGEV1prd<<4)|(TRGEV0cnt<<16)|(TRGEV1cnt<<20);
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}
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/*************************************************************/
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//GPT OneceForce Out
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_OneceForce_Out(GPT_CHAFORCE_TypeDef CHAFORCEX,U8_T AFORCE_STATUS,GPT_CHBFORCE_TypeDef CHBFORCEX,U8_T BFORCE_STATUS,GPT_FORCELD_TypeDef FORCELDX)
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{
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GPT0->AQOSF =CHAFORCEX|CHBFORCEX|FORCELDX|(AFORCE_STATUS<<1)|(BFORCE_STATUS<<5);
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}
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/*************************************************************/
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//GPT Continue Force Out
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Force_Out(GPT_FORCEA_TypeDef FORCEAX,GPT_FORCEB_TypeDef FORCEBX)
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{
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GPT0->AQCSF =FORCEAX|FORCEBX;
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}
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/*************************************************************/
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//GPT Wave Compare Load Init
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_CmpLoad_Configure(GPT_SHDWCMPA_TypeDef SHDWCMPAX,GPT_SHDWCMPB_TypeDef SHDWCMPBX,GPT_LDAMD_TypeDef LDAMDX,GPT_LDBMD_TypeDef LDBMDX)
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{
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GPT0->CMPLDR=SHDWCMPAX|SHDWCMPBX|LDAMDX|LDBMDX;
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}
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/*************************************************************/
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//GPT DEBUG MODE
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//EntryParameter:
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Debug_Mode(FunctionalStatus NewState)
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{
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if (NewState != DISABLE)
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{
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GPT0->CEDR |= GPT_DEBUG_MODE;
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}
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else
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{
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GPT0->CEDR &= ~GPT_DEBUG_MODE;
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}
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}
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/*************************************************************/
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// GPT start
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Start(void)
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{
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GPT0->RSSR |= 0X01;
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}
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/*************************************************************/
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// GPT stop
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Stop(void)
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{
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GPT0->RSSR &= 0XFFFFFFFE;
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}
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/*************************************************************/
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// GPT soft reset
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Soft_Reset(void)
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{
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GPT0->RSSR |= (0X5<<12);
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}
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/*************************************************************/
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// GPT Capture rearm
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Cap_Rearm(void)
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{
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GPT0->CR |= (0X01<<19);
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}
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/*************************************************************/
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// GPT MODE
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_Mode_CMD(GPT_WAVE_TypeDef WAVEX)
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{
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GPT0->CR |= WAVEX;
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}
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/*************************************************************/
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// GPT soft reset at once sync mode
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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void GPT_REARM_Write(void)
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{
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GPT0->SYNCR |= (0X1<<16);
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}
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/*************************************************************/
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// GPT soft read at once sync mode
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//EntryParameter:NONE
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//ReturnValue:NONE
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/*************************************************************/
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U8_T GPT_REARM_Read(void)
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{
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uint8_t value = 0;
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uint32_t dat = 0;
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dat=(GPT0->SYNCR)&(1<<16);
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if (dat)
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|
|
{
|
||
|
|
value = 1;
|
||
|
|
}
|
||
|
|
return value;
|
||
|
|
}
|
||
|
|
/*************************************************************/
|
||
|
|
//GPT Period / Compare set
|
||
|
|
//EntryParameter:
|
||
|
|
//ReturnValue:NONE
|
||
|
|
/*************************************************************/
|
||
|
|
void GPT_Period_CMP_Write(U16_T PRDR_DATA,U16_T CMPA_DATA,U16_T CMPB_DATA)
|
||
|
|
{
|
||
|
|
GPT0->PRDR =PRDR_DATA;
|
||
|
|
GPT0->CMPA =CMPA_DATA;
|
||
|
|
GPT0->CMPB =CMPB_DATA;
|
||
|
|
}
|
||
|
|
/*************************************************************/
|
||
|
|
//GPT read counters
|
||
|
|
//EntryParameter:
|
||
|
|
//ReturnValue:NONE
|
||
|
|
/*************************************************************/
|
||
|
|
U16_T GPT_PRDR_Read(void)
|
||
|
|
{
|
||
|
|
return GPT0->PRDR;
|
||
|
|
}
|
||
|
|
U16_T GPT_CMPA_Read(void)
|
||
|
|
{
|
||
|
|
return GPT0->CMPA;
|
||
|
|
}
|
||
|
|
U16_T GPT_CMPB_Read(void)
|
||
|
|
{
|
||
|
|
return GPT0->CMPB;
|
||
|
|
}
|
||
|
|
U16_T GPT_CNT_Read(void)
|
||
|
|
{
|
||
|
|
return GPT0->CNT;
|
||
|
|
}
|
||
|
|
/*************************************************************/
|
||
|
|
//GPT inturrpt Configure
|
||
|
|
//EntryParameter:LPT_IMSCR_X,NewState
|
||
|
|
//NewState:ENABLE,DISABLE
|
||
|
|
//ReturnValue:NONE
|
||
|
|
/*************************************************************/
|
||
|
|
void GPT_ConfigInterrupt_CMD(FunctionalStatus NewState,U32_T GPT_IMSCR_X)
|
||
|
|
{
|
||
|
|
if (NewState != DISABLE)
|
||
|
|
{
|
||
|
|
GPT0->IMCR |= GPT_IMSCR_X;
|
||
|
|
}
|
||
|
|
else
|
||
|
|
{
|
||
|
|
GPT0->IMCR &= ~GPT_IMSCR_X;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/*************************************************************/
|
||
|
|
//GPT Interrupt enable
|
||
|
|
//EntryParameter:NONE
|
||
|
|
//ReturnValue:NONE
|
||
|
|
/*************************************************************/
|
||
|
|
void GPT_INT_ENABLE(void)
|
||
|
|
{
|
||
|
|
INTC_ISER_WRITE(GPT0_INT);
|
||
|
|
}
|
||
|
|
/*************************************************************/
|
||
|
|
//LPT Interrupt disable
|
||
|
|
//EntryParameter:NONE
|
||
|
|
//ReturnValue:NONE
|
||
|
|
/*************************************************************/
|
||
|
|
void GPT_INT_DISABLE(void)
|
||
|
|
{
|
||
|
|
INTC_ICER_WRITE(GPT0_INT);
|
||
|
|
}
|
||
|
|
|
||
|
|
|