145 lines
7.1 KiB
C
145 lines
7.1 KiB
C
/*
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******************************************************************************
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* @file apt32f102_uart.h
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* @author APT AE Team
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* @version V1.13
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* @date 2021/12/13
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******************************************************************************
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*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
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*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
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*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
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*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
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*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
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*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef _apt32f102_uart_H
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#define _apt32f102_uart_H
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/* Includes ------------------------------------------------------------------*/
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#include "apt32f102.h"
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typedef enum
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{
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UART_PAR_NONE =0<<8, //无校验位
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UART_PAR_EVEN =4<<8, //偶校验位
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UART_PAR_ODD =5<<8, //奇校验位
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UART_PAR_SPACE =6<<8, //0校验位
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UART_PAR_MARK =7<<8 //1校验位
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}UART_PAR_TypeDef;
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/**
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* @brief UART IO setting
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*/
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typedef enum
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{
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IO_UART0 = 0,
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IO_UART1 = 1,
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IO_UART2 = 2,
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}UART_NUM_TypeDef;
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/*****************************************************************************
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************************** UART Function defined *****************************
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******************************************************************************/
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#define UART_RESET_VALUE (0x00000000)
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/** SR : UART Status Register */
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#define UART_TX_FULL (0x01ul << 0) /**< Transmitter full */
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#define UART_RX_FULL (0x01ul << 1) /**< Receiver full */
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#define UART_TX_OVER (0x01ul << 2) /**< Transmitter buff over */
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#define UART_RX_OVER (0x01ul << 3) /**< Receiver buff over */
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/** CTRL : UART Control Register */
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#define UART_TX (0x01ul << 0) /**< Transmitter Enable/disable */
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#define UART_RX (0x01ul << 1) /**< Receiver Enable/disable */
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#define UART_TX_INT (0x01ul << 2) /**< Transmitter INT Enable/disable */
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#define UART_RX_INT (0x01ul << 3) /**< Receiver INT Enable/disable */
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#define UART_TX_IOV (0x01ul << 4) /**< Transmitter INTOver Enable/disable*/
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#define UART_RX_IOV (0x01ul << 5) /**< Receiver INTOver Enable/disable */
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#define UART_PARUTY_ERR_INT (0x01ul << 7) /**< PARUTY ERROR Status */
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#define UART_TX_FIFO_INT (0x01ul << 12) /**< TX fifo int Enable/disable */
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#define UART_RX_FIFO_INT (0x01ul << 13) /**< RX fifo int Enable/disable */
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#define UART_RX_FIFOOV_INT (0x01ul << 18) /**< RX fifo int over Enable/disable */
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#define UART_TX_DONE_INT (0x01ul << 19) /**< Receiver TX done Enable/disable */
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//#define UART_TEST_MODE (0x01ul << 6) /**< =1 Test mode */
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/** ISR : UART Interrupt Status Register */
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#define UART_TX_INT_S (0x01ul << 0) /**< Transmitter INT Status */
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#define UART_RX_INT_S (0x01ul << 1) /**< Receiver INTStatus */
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#define UART_TX_IOV_S (0x01ul << 2) /**< Transmitter INTOver Status */
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#define UART_RX_IOV_S (0x01ul << 3) /**< Receiver INTOver Status */
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#define UART_PARUTY_ERR_S (0x01ul << 4) /**< PARUTY ERROR Status */
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#define UART_TXMIS_S (0x01ul << 5) /**< tx fifo Status */
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#define UART_RXMIS_S (0x01ul << 6) /**< rx fifo Status */
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#define UART_RORMIS_S (0x01ul << 7) /**< rx fifo over Status */
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#define UART_TX_DONE_S (0x01ul << 19) /**< Receiver INTOver Status */
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/** Set DATA register */
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#define CSP_UART_SET_DATA(uart, val) ((uart)->DATA = (val))
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/** Get DATA register */
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#define CSP_UART_GET_DATA(uart) ((uart)->DATA)
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/** Set SR register */
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#define CSP_UART_SET_SR(uart, val) ((uart)->SR = (val))
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/** Get SR register */
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#define CSP_UART_GET_SR(uart) ((uart)->SR)
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/** Set CTRL register */
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#define CSP_UART_SET_CTRL(uart, val) ((uart)->CTRL = (val))
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/** Get CTRL register */
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#define CSP_UART_GET_CTRL(uart) ((uart)->CTRL)
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/** Set ISR register */
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#define CSP_UART_SET_ISR(uart, val) ((uart)->ISR = (val))
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/** Get ISR register */
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#define CSP_UART_GET_ISR(uart) ((uart)->ISR)
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/** Set BRDIV register */
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#define CSP_UART_SET_BRDIV(uart, val) ((uart)->BRDIV = (val))
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/** Get BRDIV register */
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#define CSP_UART_GET_BRDIV(uart) ((uart)->BRDIV)
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/** UART External Variable Declaration */
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#define UART_BUFSIZE 32
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extern volatile U16_T RxDataBuf[12];
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extern volatile U16_T RxDataPtr;
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extern volatile U16_T TxDataPtr;
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extern volatile U8_T RxDataFlag;
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extern volatile U8_T TxDataFlag;
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extern volatile U8_T Uart_send_Length;
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extern volatile U16_T Uart_send_Length_temp;
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extern volatile U8_T Uart_buffer[UART_BUFSIZE];
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/** UART External Functions Declaration */
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extern void UARTInit(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT);
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extern void UARTClose(CSP_UART_T *uart);
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extern void UARTInitRxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT);
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extern void UARTInitRxTxIntEn(CSP_UART_T *uart,U16_T baudrate_u16,UART_PAR_TypeDef PAR_DAT);
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extern void UARTTxByte(CSP_UART_T *uart,U8_T txdata_u8);
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extern void UARTTransmit(CSP_UART_T *uart,U8_T *sourceAddress_u16,U16_T length_u16);
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extern U16_T UARTRxByte(CSP_UART_T *uart,U8_T *Rxdata_u16);
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extern U8_T UART_ReturnRxByte(CSP_UART_T *uart);
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extern U16_T UARTReceive(CSP_UART_T *uart,U8_T *destAddress_u16,U16_T length_u16);
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extern void UART0_DeInit(void);
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extern void UART1_DeInit(void);
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extern void UART2_DeInit(void);
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extern void UART_IO_Init(UART_NUM_TypeDef IO_UART_NUM , U8_T UART_IO_G);
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extern void UART0_Int_Enable(void);
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extern void UART1_Int_Enable(void);
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extern void UART2_Int_Enable(void);
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extern void UART0_Int_Disable(void);
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extern void UART1_Int_Disable(void);
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extern void UART2_Int_Disable(void);
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extern void UART0_WakeUp_Enable(void);
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extern void UART1_WakeUp_Enable(void);
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extern void UART2_WakeUp_Enable(void);
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extern void UART0_WakeUp_Disable(void);
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extern void UART1_WakeUp_Disable(void);
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extern void UART2_WakeUp_Disable(void);
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extern void UART0_CONFIG(void);
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extern void UART1_CONFIG(void);
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extern void UART2_CONFIG(void);
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extern void UARTTTransmit_data_set(CSP_UART_T *uart );
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extern void UARTTransmit_INT_Send(CSP_UART_T *uart );
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#endif /**< apt32f102_types_local_H */
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/******************* (C) COPYRIGHT 2016 APT Chip *****END OF FILE****/ |