211 lines
5.3 KiB
C
211 lines
5.3 KiB
C
/*
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******************************************************************************
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* @file apt32f102_sio.h
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* @author APT AE Team
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* @version V1.08
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* @date 2021/06/21
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******************************************************************************
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*THIS SOFTWARE WHICH IS FOR ILLUSTRATIVE PURPOSES ONLY WHICH PROVIDES
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*CUSTOMER WITH CODING INFORMATION REGARDING THEIR PRODUCTS.
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*APT CHIP SHALL NOT BE HELD RESPONSIBILITY ADN LIABILITY FOR ANY DIRECT,
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*INDIRECT DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE CONTENT OF
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*SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING INFORMATION
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*CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.AND APT CHIP RESERVES
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*THE RIGHT TO MAKE CHANGES IN THE SOFTWARE WITHOUT NOTIFICATION
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef _apt32f102_sio_H
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#define _apt32f102_sio_H
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/* Includes ------------------------------------------------------------------*/
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#include "apt32f102.h"
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#define SIO_RESET_VALUE (0x00000000)
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//--------------------------------------------------------------------------------
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//-----------------------------SIO value enum define--------------------------
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//--------------------------------------------------------------------------------
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/**
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* @brief SIO IO group register
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*/
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typedef enum
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{
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SIO_PA02 = 0,
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SIO_PA03 = 1,
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SIO_PA012 = 2,
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SIO_PB01 = 3,
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}SIO_IOG_TypeDef;
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/**
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* @brief SIO CLK EN register
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*/
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typedef enum
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{
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SIOCLK_DIS = 0,
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SIOCLK_EN = 1,
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}SIO_CLK_TypeDef;
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/**
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* @brief SIO TXDEB register
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*/
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typedef enum
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{
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SIO_TXDEB_1CYCLE = (0<<1),
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SIO_TXDEB_2CYCLE = (1<<1),
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SIO_TXDEB_3CYCLE = (2<<1),
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SIO_TXDEB_4CYCLE = (3<<1),
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SIO_TXDEB_5CYCLE = (4<<1),
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SIO_TXDEB_6CYCLE = (5<<1),
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SIO_TXDEB_7CYCLE = (6<<1),
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SIO_TXDEB_8CYCLE = (7<<1),
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}SIO_RXDEB_TypeDef;
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/**
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* @brief SIO IO IDLE STATUS register
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*/
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typedef enum
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{
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SIO_IDLE_Z = 0,
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SIO_IDLE_HIGH = 1,
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SIO_IDLE_LOW = 2,
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}SIO_IDLEST_TypeDef;
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/**
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* @brief SIO TX DIR register
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*/
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typedef enum
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{
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SIO_TX_LSB = (0<<2),
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SIO_TX_MSB = (1<<2),
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}SIO_TXDIR_TypeDef;
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/**
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* @brief SIO LENOBH register
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*/
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typedef enum
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{
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SIO_OBH_1BIT = (0<<8),
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SIO_OBH_2BIT = (1<<8),
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SIO_OBH_3BIT = (2<<8),
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SIO_OBH_4BIT = (3<<8),
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SIO_OBH_5BIT = (4<<8),
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SIO_OBH_6BIT = (5<<8),
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SIO_OBH_7BIT = (6<<8),
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SIO_OBH_8BIT = (7<<8),
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}SIO_LENOBH_TypeDef;
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/**
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* @brief SIO LENOBL register
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*/
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typedef enum
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{
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SIO_OBL_1BIT = (0<<11),
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SIO_OBL_2BIT = (1<<11),
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SIO_OBL_3BIT = (2<<11),
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SIO_OBL_4BIT = (3<<11),
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SIO_OBL_5BIT = (4<<11),
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SIO_OBL_6BIT = (5<<11),
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SIO_OBL_7BIT = (6<<11),
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SIO_OBL_8BIT = (7<<11),
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}SIO_LENOBL_TypeDef;
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/**
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* @brief SIO RX EDGE register
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*/
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typedef enum
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{
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SIO_RX_RISE = 0,
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SIO_RX_FALL = 1,
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SIO_RX_RISE_FALL = 2,
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}SIO_BSTSEL_TypeDef;
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/**
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* @brief SIO RX TRG MODE register
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*/
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typedef enum
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{
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SIO_RX_DEB = (0<<3),
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SIO_RX_FLT30NS = (1<<3),
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}SIO_TRGMODE_TypeDef;
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/**
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* @brief SIO RX ALIGNEN register
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*/
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typedef enum
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{
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SIO_RX_ALIGNDIS = (0<<28),
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SIO_RX_ALIGNEN = (1<<28),
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}SIO_ALIGNEN_TypeDef;
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/**
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* @brief SIO RX DIR register
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*/
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typedef enum
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{
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SIO_RX_MSB = (0<<29),
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SIO_RX_LSB = (1<<29),
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}SIO_RXDIR_TypeDef;
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/**
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* @brief SIO RX MODE register
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*/
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typedef enum
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{
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SIO_RMODE0 = (0<<30),
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SIO_RMODE1 = (1<<30),
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}SIO_RXMODE_TypeDef;
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/**
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* @brief SIO BREAKEN register
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*/
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typedef enum
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{
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SIO_BREAKDIS = (0<<0),
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SIO_BREAKEN = (1<<0),
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}SIO_BREAKEN_TypeDef;
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/**
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* @brief SIO BREAKLVL register
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*/
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typedef enum
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{
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SIO_BREAKLVL_LOW = (0<<1),
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SIO_BREAKLVL_HIGH = (1<<1),
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}SIO_BREAKLVL_TypeDef;
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/**
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* @brief SIO TORSTEN register
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*/
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typedef enum
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{
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SIO_TORSTDIS = (0<<15),
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SIO_TORSTEN = (1<<15),
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}SIO_TORSTEN_TypeDef;
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/**
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* @brief LPT INT MASK SET/CLR Set
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*/
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typedef enum
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{
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SIO_TXDNE = (0x01 << 0),
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SIO_RXDNE = (0x01 << 1),
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SIO_TXBUFEMPT = (0x01 << 2),
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SIO_RXBUFEMPT = (0x01 << 3),
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SIO_BREAK = (0x01 << 4),
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SIO_TIME = (0x01 << 5),
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}SIO_IMSCR_TypeDef;
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#define TX_D0 (0X00)
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#define TX_D1 (0X01)
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#define TX_DL (0X02)
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#define TX_DH (0X03)
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extern void SIO_DeInit(void);
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extern void SIO_IO_Init(SIO_IOG_TypeDef IOGx);
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extern void SIO_TX_Init(SIO_CLK_TypeDef CLKX,U8_T TCKPRSX);
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extern void SIO_TX_Configure(SIO_IDLEST_TypeDef IDLEX,SIO_TXDIR_TypeDef TXDIRX,U8_T TXBUFLENX,U8_T TXCNTX,U8_T D0DURX,U8_T D1DURX,SIO_LENOBH_TypeDef LENOBHX,
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SIO_LENOBL_TypeDef LENOBLX,U8_T HSQX,U8_T LSQX);
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extern void SIO_TXBUF_Set(U8_T D30,U8_T D28,U8_T D26,U8_T D24,U8_T D22,U8_T D20,U8_T D18,U8_T D16,
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U8_T D14,U8_T D12,U8_T D10,U8_T D08,U8_T D06,U8_T D04,U8_T D02,U8_T D00);
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extern void SIO_RX_Init(SIO_CLK_TypeDef CLKX,SIO_RXDEB_TypeDef RXDEBX,U8_T DEBCKSX);
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extern void SIO_RX_Configure0(SIO_BSTSEL_TypeDef BSTSELX,SIO_TRGMODE_TypeDef TRGMX,U8_T SPLCNTX,U8_T EXTRACTX,U8_T HITHRX,
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SIO_ALIGNEN_TypeDef ALIGNX,SIO_RXDIR_TypeDef RXDIRX,SIO_RXMODE_TypeDef RXMODEX,U8_T RXLENX,U8_T RXBUFLENX,U8_T RXKPRSX);
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extern void SIO_RX_Configure1(SIO_BREAKEN_TypeDef BREAKX,SIO_BREAKLVL_TypeDef BREAKLVLX,U8_T BREKCNTX,SIO_TORSTEN_TypeDef TORSTX,U8_T TOCNTX);
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extern void SIO_ConfigInterrupt_CMD(FunctionalStatus NewState,SIO_IMSCR_TypeDef SIO_IMSCR_X);
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extern void SIO_INT_ENABLE(void);
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extern void SIO_INT_DISABLE(void);
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/*************************************************************/
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#endif /**< apt32f102_sio_H */ |